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authorGravatarGravatar Firehawke <Firehawke@users.noreply.github.com>2017-12-13 21:31:27 -0700
committerGravatarGravatar Firehawke <Firehawke@users.noreply.github.com>2017-12-13 21:31:27 -0700
commit9ece34eb218c5c1960468294c733fd00ac7fa696 (patch) (github)
tree7160ed8d2cbe2127aaaef0a21f8736403b0f8a7c /src
parent54155441e9ba9941e85d80c4834a66376a11e791 (diff)
downloadmame-9ece34eb218c5c1960468294c733fd00ac7fa696.tar.bz2
mame-9ece34eb218c5c1960468294c733fd00ac7fa696.zip
Revert "Revert "Merge branch 'master' of https://github.com/mamedev/mame""
Diffstat (limited to 'src')
-rw-r--r--src/devices/bus/a2bus/agat7langcard.cpp19
-rw-r--r--src/devices/bus/a2bus/agat7langcard.h4
-rw-r--r--src/devices/bus/a2bus/agat7ram.cpp27
-rw-r--r--src/devices/bus/a2bus/agat7ram.h4
-rw-r--r--src/devices/bus/a2bus/agat840k_hle.cpp449
-rw-r--r--src/devices/bus/a2bus/agat840k_hle.h103
-rw-r--r--src/devices/bus/c64/silverrock.cpp4
-rw-r--r--src/devices/bus/c64/stardos.cpp2
-rw-r--r--src/devices/bus/c64/vizastar.cpp4
-rw-r--r--src/devices/bus/c64/vw64.cpp4
-rw-r--r--src/devices/bus/c64/warp_speed.cpp4
-rw-r--r--src/devices/bus/cbmiec/c1541.cpp2
-rw-r--r--src/devices/bus/chanf/rom.cpp2
-rw-r--r--src/devices/bus/coco/coco_fdc.cpp23
-rw-r--r--src/devices/bus/coco/coco_fdc.h2
-rw-r--r--src/devices/bus/gameboy/mbc.cpp16
-rw-r--r--src/devices/bus/msx_cart/dooly.cpp2
-rw-r--r--src/devices/bus/neogeo/boot_kof10th.cpp2
-rw-r--r--src/devices/bus/neogeo/prot_cmc.cpp6
-rw-r--r--src/devices/bus/neogeo/prot_cthd.cpp4
-rw-r--r--src/devices/bus/neogeo/prot_kof2k3bl.cpp4
-rw-r--r--src/devices/bus/neogeo/prot_misc.cpp28
-rw-r--r--src/devices/bus/neogeo/prot_pcm2.cpp2
-rw-r--r--src/devices/bus/neogeo/prot_pvc.cpp30
-rw-r--r--src/devices/bus/neogeo/prot_sma.cpp30
-rw-r--r--src/devices/bus/neogeo/sbp.cpp2
-rw-r--r--src/devices/bus/nes/jy.cpp2
-rw-r--r--src/devices/bus/nes/mmc3_clones.cpp2
-rw-r--r--src/devices/bus/nes/waixing.cpp4
-rw-r--r--src/devices/bus/nubus/nubus_spec8.cpp2
-rw-r--r--src/devices/bus/nubus/pds30_procolor816.cpp2
-rw-r--r--src/devices/bus/s100/wunderbus.cpp2
-rw-r--r--src/devices/bus/saturn/sat_slot.cpp2
-rw-r--r--src/devices/bus/sega8/rom.cpp2
-rw-r--r--src/devices/bus/snes/rom.cpp6
-rw-r--r--src/devices/bus/snes_ctrl/pachinko.cpp2
-rw-r--r--src/devices/bus/ss50/interface.cpp4
-rw-r--r--src/devices/bus/ss50/mpc.cpp194
-rw-r--r--src/devices/bus/ss50/mpc.h14
-rw-r--r--src/devices/bus/ti99x/990_hd.cpp2
-rw-r--r--src/devices/bus/vcs/dpc.cpp4
-rw-r--r--src/devices/bus/vic20/exp.cpp1
-rw-r--r--src/devices/bus/vic20/vic1112.cpp4
-rw-r--r--src/devices/cpu/arm7/arm7.cpp38
-rw-r--r--src/devices/cpu/arm7/arm7.h18
-rw-r--r--src/devices/cpu/arm7/arm7core.h5
-rw-r--r--src/devices/cpu/arm7/arm7help.h5
-rw-r--r--src/devices/cpu/arm7/arm7thmb.cpp5
-rw-r--r--src/devices/cpu/e132xs/32xsdasm.cpp25
-rw-r--r--src/devices/cpu/e132xs/32xsdasm.h14
-rw-r--r--src/devices/cpu/e132xs/32xsdefs.h46
-rw-r--r--src/devices/cpu/e132xs/e132xs.cpp253
-rw-r--r--src/devices/cpu/e132xs/e132xs.h268
-rw-r--r--src/devices/cpu/e132xs/e132xsop.hxx1275
-rw-r--r--src/devices/cpu/hmcs40/hmcs40.cpp2
-rw-r--r--src/devices/cpu/hmcs40/hmcs40d.cpp2
-rw-r--r--src/devices/cpu/hmcs40/hmcs40op.cpp4
-rw-r--r--src/devices/cpu/hphybrid/hphybrid.cpp10
-rw-r--r--src/devices/cpu/i386/i386.cpp106
-rw-r--r--src/devices/cpu/m6502/m6502.cpp1
-rw-r--r--src/devices/cpu/m68000/m68000.h307
-rw-r--r--src/devices/cpu/m68000/m68k_in.cpp7567
-rw-r--r--src/devices/cpu/m68000/m68kcpu.cpp1408
-rw-r--r--src/devices/cpu/m68000/m68kcpu.h1582
-rw-r--r--src/devices/cpu/m68000/m68kfpu.hxx1073
-rw-r--r--src/devices/cpu/m68000/m68kmake.cpp25
-rw-r--r--src/devices/cpu/m68000/m68kmmu.h534
-rw-r--r--src/devices/cpu/m6809/hd6309.cpp15
-rw-r--r--src/devices/cpu/m6809/hd6309.h15
-rw-r--r--src/devices/cpu/m6809/m6809.cpp52
-rw-r--r--src/devices/cpu/m6809/m6809.h41
-rw-r--r--src/devices/cpu/sm510/sm510.h2
-rw-r--r--src/devices/cpu/tms1000/tms0970.cpp2
-rw-r--r--src/devices/cpu/tms1000/tms0980.cpp4
-rw-r--r--src/devices/cpu/tms1000/tms1000.cpp20
-rw-r--r--src/devices/cpu/tms1000/tms1000.h2
-rw-r--r--src/devices/cpu/tms1000/tms1100.cpp5
-rw-r--r--src/devices/cpu/tms1000/tms1k_base.cpp43
-rw-r--r--src/devices/cpu/tms1000/tms1k_base.h93
-rw-r--r--src/devices/cpu/tms1000/tp0320.cpp2
-rw-r--r--src/devices/cpu/tms34010/34010gfx.hxx4
-rw-r--r--src/devices/cpu/tms9900/tms9995.cpp8
-rw-r--r--src/devices/cpu/uml.h16
-rw-r--r--src/devices/cpu/upd7725/upd7725.cpp4
-rw-r--r--src/devices/machine/6522via.cpp9
-rw-r--r--src/devices/machine/68307.cpp180
-rw-r--r--src/devices/machine/68307.h40
-rw-r--r--src/devices/machine/68307bus.cpp8
-rw-r--r--src/devices/machine/68307sim.cpp8
-rw-r--r--src/devices/machine/68307tmu.cpp12
-rw-r--r--src/devices/machine/68340.cpp78
-rw-r--r--src/devices/machine/68340.h6
-rw-r--r--src/devices/machine/68340dma.cpp6
-rw-r--r--src/devices/machine/68340ser.cpp2
-rw-r--r--src/devices/machine/68340sim.cpp40
-rw-r--r--src/devices/machine/68340tmu.cpp4
-rw-r--r--src/devices/machine/eepromser.cpp12
-rw-r--r--src/devices/machine/ldpr8210.cpp2
-rw-r--r--src/devices/machine/ripple_counter.cpp202
-rw-r--r--src/devices/machine/ripple_counter.h92
-rw-r--r--src/devices/machine/roc10937.cpp2
-rw-r--r--src/devices/machine/sdlc.cpp2
-rw-r--r--src/devices/machine/smc91c9x.cpp430
-rw-r--r--src/devices/machine/smc91c9x.h42
-rw-r--r--src/devices/machine/stvcd.cpp2
-rw-r--r--src/devices/machine/tms6100.cpp2
-rw-r--r--src/devices/machine/vrc4373.h2
-rw-r--r--src/devices/machine/vrc5074.cpp2
-rw-r--r--src/devices/machine/z80sio.cpp2
-rw-r--r--src/devices/sound/astrocde.cpp2
-rw-r--r--src/devices/sound/rf5c400.cpp82
-rw-r--r--src/devices/sound/rf5c400.h11
-rw-r--r--src/devices/sound/tms5110.cpp2
-rw-r--r--src/devices/sound/ymz770.cpp63
-rw-r--r--src/devices/sound/ymz770.h10
-rw-r--r--src/devices/video/dp8510.cpp211
-rw-r--r--src/devices/video/dp8510.h87
-rw-r--r--src/devices/video/ef9340_1.cpp2
-rw-r--r--src/devices/video/gba_lcd.cpp34
-rw-r--r--src/devices/video/voodoo.cpp5
-rw-r--r--src/emu/debug/debugcmd.cpp29
-rw-r--r--src/emu/debug/debugcmd.h1
-rw-r--r--src/emu/debug/debugcpu.cpp98
-rw-r--r--src/emu/debug/debughlp.cpp16
-rw-r--r--src/emu/debug/dvdisasm.cpp8
-rw-r--r--src/emu/debug/dvmemory.cpp57
-rw-r--r--src/emu/debug/dvmemory.h1
-rw-r--r--src/emu/device.h1
-rw-r--r--src/emu/diexec.cpp3
-rw-r--r--src/emu/dirom.cpp20
-rw-r--r--src/emu/dirom.h16
-rw-r--r--src/emu/drivers/xtal.h6
-rw-r--r--src/emu/emucore.h11
-rw-r--r--src/emu/emumem.cpp86
-rw-r--r--src/emu/emuopts.cpp2
-rw-r--r--src/emu/emuopts.h4
-rw-r--r--src/emu/http.cpp1
-rw-r--r--src/emu/inpttype.h7
-rw-r--r--src/emu/ioport.h1
-rw-r--r--src/emu/machine.cpp39
-rw-r--r--src/emu/machine.h5
-rw-r--r--src/emu/save.cpp465
-rw-r--r--src/emu/save.h68
-rw-r--r--src/emu/softlist_dev.cpp10
-rw-r--r--src/emu/softlist_dev.h8
-rw-r--r--src/emu/validity.cpp4
-rw-r--r--src/frontend/mame/mame.cpp9
-rw-r--r--src/frontend/mame/ui/filesel.cpp142
-rw-r--r--src/frontend/mame/ui/filesel.h44
-rw-r--r--src/frontend/mame/ui/submenu.cpp2
-rw-r--r--src/frontend/mame/ui/ui.cpp5
-rw-r--r--src/lib/formats/agat840k_hle_dsk.cpp59
-rw-r--r--src/lib/formats/agat840k_hle_dsk.h17
-rw-r--r--src/mame/arcade.flt3
-rw-r--r--src/mame/audio/decobsmt.cpp4
-rw-r--r--src/mame/audio/exidy440.cpp10
-rw-r--r--src/mame/audio/harddriv.cpp4
-rw-r--r--src/mame/audio/midway.cpp2
-rw-r--r--src/mame/audio/midway.h2
-rw-r--r--src/mame/audio/rax.cpp8
-rw-r--r--src/mame/audio/s11c_bg.cpp4
-rw-r--r--src/mame/audio/seibu.cpp14
-rw-r--r--src/mame/audio/williams.cpp10
-rw-r--r--src/mame/audio/williams.h8
-rw-r--r--src/mame/audio/wpcsnd.cpp2
-rw-r--r--src/mame/drivers/24cdjuke.cpp2
-rw-r--r--src/mame/drivers/39in1.cpp4
-rw-r--r--src/mame/drivers/4enraya.cpp2
-rw-r--r--src/mame/drivers/8080bw.cpp4
-rw-r--r--src/mame/drivers/a6809.cpp2
-rw-r--r--src/mame/drivers/accomm.cpp60
-rw-r--r--src/mame/drivers/acesp.cpp14
-rw-r--r--src/mame/drivers/aerofgt.cpp2
-rw-r--r--src/mame/drivers/agat.cpp340
-rw-r--r--src/mame/drivers/aim65.cpp4
-rw-r--r--src/mame/drivers/aim65_40.cpp6
-rw-r--r--src/mame/drivers/airraid.cpp4
-rw-r--r--src/mame/drivers/ajax.cpp4
-rw-r--r--src/mame/drivers/alesis.cpp2
-rw-r--r--src/mame/drivers/alphatpx.cpp76
-rw-r--r--src/mame/drivers/altos5.cpp4
-rw-r--r--src/mame/drivers/amaticmg.cpp2
-rw-r--r--src/mame/drivers/ampoker2.cpp2
-rw-r--r--src/mame/drivers/apc.cpp4
-rw-r--r--src/mame/drivers/apollo.cpp9
-rw-r--r--src/mame/drivers/apple2e.cpp2
-rw-r--r--src/mame/drivers/applix.cpp6
-rw-r--r--src/mame/drivers/aquarium.cpp4
-rw-r--r--src/mame/drivers/aristmk4.cpp4
-rw-r--r--src/mame/drivers/aristmk5.cpp568
-rw-r--r--src/mame/drivers/arkanoid.cpp4
-rw-r--r--src/mame/drivers/arsystems.cpp2
-rw-r--r--src/mame/drivers/astrcorp.cpp30
-rw-r--r--src/mame/drivers/astrof.cpp2
-rw-r--r--src/mame/drivers/atarisy1.cpp2
-rw-r--r--src/mame/drivers/atarisy2.cpp2
-rw-r--r--src/mame/drivers/attache.cpp12
-rw-r--r--src/mame/drivers/atvtrack.cpp6
-rw-r--r--src/mame/drivers/backfire.cpp2
-rw-r--r--src/mame/drivers/bagman.cpp6
-rw-r--r--src/mame/drivers/balsente.cpp2
-rw-r--r--src/mame/drivers/baraduke.cpp2
-rw-r--r--src/mame/drivers/barni.cpp13
-rw-r--r--src/mame/drivers/beezer.cpp12
-rw-r--r--src/mame/drivers/berzerk.cpp2
-rw-r--r--src/mame/drivers/beta.cpp2
-rw-r--r--src/mame/drivers/bfcobra.cpp6
-rw-r--r--src/mame/drivers/bfm_sc4.cpp2
-rw-r--r--src/mame/drivers/big10.cpp2
-rw-r--r--src/mame/drivers/bigbord2.cpp2
-rw-r--r--src/mame/drivers/bking.cpp2
-rw-r--r--src/mame/drivers/blktiger.cpp2
-rw-r--r--src/mame/drivers/bloodbro.cpp2
-rw-r--r--src/mame/drivers/bmcpokr.cpp6
-rw-r--r--src/mame/drivers/bob85.cpp2
-rw-r--r--src/mame/drivers/boogwing.cpp4
-rw-r--r--src/mame/drivers/bublbobl.cpp4
-rw-r--r--src/mame/drivers/by35.cpp2
-rw-r--r--src/mame/drivers/byvid.cpp6
-rw-r--r--src/mame/drivers/c64dtv.cpp13
-rw-r--r--src/mame/drivers/c900.cpp65
-rw-r--r--src/mame/drivers/cabal.cpp4
-rw-r--r--src/mame/drivers/calcune.cpp334
-rw-r--r--src/mame/drivers/camplynx.cpp4
-rw-r--r--src/mame/drivers/capbowl.cpp10
-rw-r--r--src/mame/drivers/cave.cpp6
-rw-r--r--src/mame/drivers/cd2650.cpp2
-rw-r--r--src/mame/drivers/centiped.cpp2
-rw-r--r--src/mame/drivers/champbwl.cpp10
-rw-r--r--src/mame/drivers/chessmst.cpp2
-rw-r--r--src/mame/drivers/chesstrv.cpp2
-rw-r--r--src/mame/drivers/chinagat.cpp8
-rw-r--r--src/mame/drivers/chqflag.cpp15
-rw-r--r--src/mame/drivers/chsuper.cpp6
-rw-r--r--src/mame/drivers/cischeat.cpp2
-rw-r--r--src/mame/drivers/cninja.cpp16
-rw-r--r--src/mame/drivers/cntsteer.cpp2
-rw-r--r--src/mame/drivers/coco12.cpp4
-rw-r--r--src/mame/drivers/coinmstr.cpp4
-rw-r--r--src/mame/drivers/compc.cpp139
-rw-r--r--src/mame/drivers/contra.cpp2
-rw-r--r--src/mame/drivers/coolpool.cpp4
-rw-r--r--src/mame/drivers/cops.cpp18
-rw-r--r--src/mame/drivers/cortex.cpp195
-rw-r--r--src/mame/drivers/cps1.cpp4
-rw-r--r--src/mame/drivers/cps2.cpp6
-rw-r--r--src/mame/drivers/csplayh5.cpp29
-rw-r--r--src/mame/drivers/cswat.cpp2
-rw-r--r--src/mame/drivers/cubo.cpp14
-rw-r--r--src/mame/drivers/cvs.cpp4
-rw-r--r--src/mame/drivers/cybertnk.cpp2
-rw-r--r--src/mame/drivers/d400.cpp2
-rw-r--r--src/mame/drivers/d6809.cpp2
-rw-r--r--src/mame/drivers/dambustr.cpp8
-rw-r--r--src/mame/drivers/darkmist.cpp22
-rw-r--r--src/mame/drivers/datum.cpp4
-rw-r--r--src/mame/drivers/dblewing.cpp4
-rw-r--r--src/mame/drivers/dcheese.cpp4
-rw-r--r--src/mame/drivers/ddragon.cpp20
-rw-r--r--src/mame/drivers/ddribble.cpp6
-rw-r--r--src/mame/drivers/de_2.cpp107
-rw-r--r--src/mame/drivers/de_3.cpp10
-rw-r--r--src/mame/drivers/dec8.cpp16
-rw-r--r--src/mame/drivers/deco156.cpp2
-rw-r--r--src/mame/drivers/deco32.cpp6
-rw-r--r--src/mame/drivers/deco_mlc.cpp6
-rw-r--r--src/mame/drivers/decocass.cpp2
-rw-r--r--src/mame/drivers/didact.cpp2
-rw-r--r--src/mame/drivers/dietgo.cpp4
-rw-r--r--src/mame/drivers/digel804.cpp2
-rw-r--r--src/mame/drivers/divebomb.cpp2
-rw-r--r--src/mame/drivers/dkong.cpp6
-rw-r--r--src/mame/drivers/dreambal.cpp4
-rw-r--r--src/mame/drivers/dynax.cpp16
-rw-r--r--src/mame/drivers/eacc.cpp2
-rw-r--r--src/mame/drivers/ecoinf3.cpp2
-rw-r--r--src/mame/drivers/ecoinfr.cpp4
-rw-r--r--src/mame/drivers/elwro800.cpp2
-rw-r--r--src/mame/drivers/enigma2.cpp4
-rw-r--r--src/mame/drivers/enmirage.cpp4
-rw-r--r--src/mame/drivers/epos.cpp8
-rw-r--r--src/mame/drivers/esq1.cpp3
-rw-r--r--src/mame/drivers/et3400.cpp2
-rw-r--r--src/mame/drivers/ettrivia.cpp2
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-rw-r--r--src/mame/drivers/evmbug.cpp66
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-rw-r--r--src/mame/drivers/hh_sm510.cpp939
-rw-r--r--src/mame/drivers/hh_tms1k.cpp551
-rw-r--r--src/mame/drivers/hh_ucom4.cpp128
-rw-r--r--src/mame/drivers/hnayayoi.cpp2
-rw-r--r--src/mame/drivers/hp64k.cpp4
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-rw-r--r--src/mame/video/mz700.cpp2
-rw-r--r--src/mame/video/naughtyb.cpp2
-rw-r--r--src/mame/video/nmk16.cpp4
-rw-r--r--src/mame/video/pc9801.cpp4
-rw-r--r--src/mame/video/pgm2.cpp24
-rw-r--r--src/mame/video/pingpong.cpp2
-rw-r--r--src/mame/video/qix.cpp6
-rw-r--r--src/mame/video/redclash.cpp4
-rw-r--r--src/mame/video/retofinv.cpp4
-rw-r--r--src/mame/video/segaic16.cpp2
-rw-r--r--src/mame/video/seibu_crtc.cpp4
-rw-r--r--src/mame/video/seibuspi.cpp2
-rw-r--r--src/mame/video/seta2.cpp7
-rw-r--r--src/mame/video/snookr10.cpp8
-rw-r--r--src/mame/video/splash.cpp39
-rw-r--r--src/mame/video/tatsumi.cpp123
-rw-r--r--src/mame/video/thepit.cpp4
-rw-r--r--src/mame/video/tia.cpp8
-rw-r--r--src/mame/video/tx1.cpp2
-rw-r--r--src/mame/video/vectrex.cpp6
-rw-r--r--src/mame/video/xevious.cpp2
-rw-r--r--src/osd/eigccx86.h10
-rw-r--r--src/osd/eivc.h4
-rw-r--r--src/osd/modules/file/posixdir.cpp1
-rw-r--r--src/osd/modules/file/posixfile.cpp2
-rw-r--r--src/tools/unidasm.cpp13
723 files changed, 23070 insertions, 12987 deletions
diff --git a/src/devices/bus/a2bus/agat7langcard.cpp b/src/devices/bus/a2bus/agat7langcard.cpp
index 9bb00b38c60..b4d2a168f38 100644
--- a/src/devices/bus/a2bus/agat7langcard.cpp
+++ b/src/devices/bus/a2bus/agat7langcard.cpp
@@ -10,6 +10,9 @@
#include "agat7langcard.h"
+//#define VERBOSE 1
+#include "logmacro.h"
+
/***************************************************************************
PARAMETERS
***************************************************************************/
@@ -30,7 +33,7 @@ DEFINE_DEVICE_TYPE(A2BUS_AGAT7LANGCARD, a2bus_agat7langcard_device, "a7lang", "A
a2bus_agat7langcard_device::a2bus_agat7langcard_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, type, tag, owner, clock),
- device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_dxxx_bank(0), m_main_bank(0)
+ device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_dxxx_bank(0), m_main_bank(0), m_csr(0)
{
}
@@ -48,13 +51,13 @@ void a2bus_agat7langcard_device::device_start()
// set_a2bus_device makes m_slot valid
set_a2bus_device();
- memset(m_ram, 0, 32*1024);
+ memset(m_ram, 0, 32 * 1024);
save_item(NAME(m_inh_state));
save_item(NAME(m_ram));
save_item(NAME(m_dxxx_bank));
save_item(NAME(m_main_bank));
- save_item(NAME(m_last_offset));
+ save_item(NAME(m_csr));
}
void a2bus_agat7langcard_device::device_reset()
@@ -62,7 +65,7 @@ void a2bus_agat7langcard_device::device_reset()
m_inh_state = INH_NONE;
m_dxxx_bank = 0;
m_main_bank = 0;
- m_last_offset = -1;
+ m_csr = 0;
m_mode = 0;
}
@@ -70,7 +73,7 @@ void a2bus_agat7langcard_device::do_io(int offset)
{
int old_inh_state = m_inh_state;
- m_last_offset = offset;
+ m_csr = offset & 0x7f;
m_inh_state = INH_WRITE;
m_dxxx_bank = 0;
@@ -91,13 +94,11 @@ void a2bus_agat7langcard_device::do_io(int offset)
recalc_slot_inh();
}
-#if 1
- logerror("LC: (ofs %02x) new state %c%c dxxx=%04x main=%05x\n",
+ LOG("LC: (ofs %02x) new state %c%c dxxx=%04x main=%05x\n",
offset,
(m_inh_state & INH_READ) ? 'R' : 'x',
(m_inh_state & INH_WRITE) ? 'W' : 'x',
m_dxxx_bank, m_main_bank);
-#endif
}
@@ -107,7 +108,7 @@ void a2bus_agat7langcard_device::do_io(int offset)
uint8_t a2bus_agat7langcard_device::read_cnxx(address_space &space, uint8_t offset)
{
- return m_last_offset < 0 ? 0x80 : (0x80 | m_last_offset);
+ return (0x80 | m_csr);
}
diff --git a/src/devices/bus/a2bus/agat7langcard.h b/src/devices/bus/a2bus/agat7langcard.h
index 13647abfb11..be3a650a222 100644
--- a/src/devices/bus/a2bus/agat7langcard.h
+++ b/src/devices/bus/a2bus/agat7langcard.h
@@ -47,11 +47,11 @@ private:
void do_io(int offset);
int m_inh_state;
- int m_last_offset;
int m_dxxx_bank;
int m_main_bank;
- uint8_t m_ram[32*1024];
+ uint8_t m_ram[32 * 1024];
uint8_t m_mode;
+ uint8_t m_csr;
};
// device type definition
diff --git a/src/devices/bus/a2bus/agat7ram.cpp b/src/devices/bus/a2bus/agat7ram.cpp
index dde0260db3f..51bbabb792c 100644
--- a/src/devices/bus/a2bus/agat7ram.cpp
+++ b/src/devices/bus/a2bus/agat7ram.cpp
@@ -10,6 +10,9 @@
#include "agat7ram.h"
+//#define VERBOSE 1
+#include "logmacro.h"
+
/***************************************************************************
PARAMETERS
***************************************************************************/
@@ -30,7 +33,7 @@ DEFINE_DEVICE_TYPE(A2BUS_AGAT7RAM, a2bus_agat7ram_device, "a7ram", "Agat-7 32K R
a2bus_agat7ram_device::a2bus_agat7ram_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, type, tag, owner, clock),
- device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_main_bank(0)
+ device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_main_bank(0), m_csr(0)
{
}
@@ -48,32 +51,32 @@ void a2bus_agat7ram_device::device_start()
// set_a2bus_device makes m_slot valid
set_a2bus_device();
- memset(m_ram, 0, 32*1024);
+ memset(m_ram, 0, 32 * 1024);
save_item(NAME(m_inh_state));
save_item(NAME(m_ram));
save_item(NAME(m_main_bank));
- save_item(NAME(m_last_offset));
+ save_item(NAME(m_csr));
}
void a2bus_agat7ram_device::device_reset()
{
m_inh_state = INH_NONE;
m_main_bank = 0;
- m_last_offset = -1;
+ m_csr = 0;
}
void a2bus_agat7ram_device::do_io(int offset)
{
int old_inh_state = m_inh_state;
- m_last_offset = offset;
+ m_csr = offset & 0x7f;
m_inh_state = INH_NONE;
m_main_bank = 0;
if (offset & 0x8)
{
- m_inh_state = INH_READ|INH_WRITE;
+ m_inh_state = INH_READ | INH_WRITE;
}
if (offset & 0x1)
@@ -86,13 +89,11 @@ void a2bus_agat7ram_device::do_io(int offset)
recalc_slot_inh();
}
-#if 1
- logerror("RAM: (ofs %02x) new state %c%c main=%05x\n",
+ LOG("RAM: (ofs %02x) new state %c%c main=%05x\n",
offset,
(m_inh_state & INH_READ) ? 'R' : 'x',
(m_inh_state & INH_WRITE) ? 'W' : 'x',
m_main_bank);
-#endif
}
@@ -102,7 +103,7 @@ void a2bus_agat7ram_device::do_io(int offset)
uint8_t a2bus_agat7ram_device::read_cnxx(address_space &space, uint8_t offset)
{
- return m_last_offset < 0 ? 0 : (m_last_offset & 0x7f);
+ return m_csr;
}
@@ -125,12 +126,10 @@ uint8_t a2bus_agat7ram_device::read_inh_rom(address_space &space, uint16_t offse
void a2bus_agat7ram_device::write_inh_rom(address_space &space, uint16_t offset, uint8_t data)
{
// are writes enabled?
- if (!(m_inh_state & INH_WRITE))
+ if ((m_inh_state & INH_WRITE) && !BIT(m_csr, 4))
{
- return;
+ m_ram[(offset & 0x3fff) + m_main_bank] = data;
}
-
- m_ram[(offset & 0x3fff) + m_main_bank] = data;
}
int a2bus_agat7ram_device::inh_type()
diff --git a/src/devices/bus/a2bus/agat7ram.h b/src/devices/bus/a2bus/agat7ram.h
index e30aaf7b94b..3476e738179 100644
--- a/src/devices/bus/a2bus/agat7ram.h
+++ b/src/devices/bus/a2bus/agat7ram.h
@@ -47,9 +47,9 @@ private:
void do_io(int offset);
int m_inh_state;
- int m_last_offset;
int m_main_bank;
- uint8_t m_ram[32*1024];
+ uint8_t m_ram[32 * 1024];
+ uint8_t m_csr;
};
// device type definition
diff --git a/src/devices/bus/a2bus/agat840k_hle.cpp b/src/devices/bus/a2bus/agat840k_hle.cpp
new file mode 100644
index 00000000000..72217fbe464
--- /dev/null
+++ b/src/devices/bus/a2bus/agat840k_hle.cpp
@@ -0,0 +1,449 @@
+// license:BSD-3-Clause
+// copyright-holders:Sergey Svishchev
+/*********************************************************************
+
+ agat840k_hle.cpp
+
+ High-level simulation of the Agat 840K floppy controller card
+
+ http://agatcomp.ru/Reading/docs/es5323.txt
+ https://github.com/sintech/AGAT/blob/master/docs/agat-840k-format.txt
+ http://www.torlus.com/floppy/forum/viewtopic.php?f=19&t=1385
+
+*********************************************************************/
+
+#include "emu.h"
+#include "agat840k_hle.h"
+
+#include "formats/agat840k_hle_dsk.h"
+
+//#define VERBOSE 1
+#include "logmacro.h"
+
+
+/***************************************************************************
+ PARAMETERS
+***************************************************************************/
+
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
+
+DEFINE_DEVICE_TYPE(A2BUS_AGAT840K_HLE, a2bus_agat840k_hle_device, "agat840k_hle", "Agat 840K floppy card")
+
+#define AGAT840K_ROM_REGION "agat840k_hle_rom"
+
+
+ROM_START( agat840k_hle )
+ ROM_REGION(0x100, AGAT840K_ROM_REGION, 0)
+ // "Zagorsk" variant
+ ROM_LOAD( "teac.rom", 0x0000, 0x0100, CRC(94266928) SHA1(5d369bad6cdd6a70b0bb16480eba69640de87a2e) )
+ROM_END
+
+//-------------------------------------------------
+// device_add_mconfig - add device configuration
+//-------------------------------------------------
+
+static const floppy_interface agat840k_hle_floppy_interface =
+{
+ FLOPPY_STANDARD_5_25_DSHD,
+ LEGACY_FLOPPY_OPTIONS_NAME(agat840k_hle),
+ "floppy_5_25"
+};
+
+MACHINE_CONFIG_MEMBER( a2bus_agat840k_hle_device::device_add_mconfig )
+ MCFG_DEVICE_ADD(FLOPPY_0, LEGACY_FLOPPY, 0)
+ MCFG_LEGACY_FLOPPY_CONFIG(agat840k_hle_floppy_interface)
+ MCFG_LEGACY_FLOPPY_IDX_CB(WRITELINE(a2bus_agat840k_hle_device, index_0_w))
+ MCFG_DEVICE_ADD(FLOPPY_1, LEGACY_FLOPPY, 0)
+ MCFG_LEGACY_FLOPPY_CONFIG(agat840k_hle_floppy_interface)
+ MCFG_LEGACY_FLOPPY_IDX_CB(WRITELINE(a2bus_agat840k_hle_device, index_1_w))
+
+ MCFG_DEVICE_ADD("d14", I8255, 0)
+ // PA not connected
+ MCFG_I8255_IN_PORTB_CB(READ8(a2bus_agat840k_hle_device, d14_i_b)) // status signals from drive
+ MCFG_I8255_OUT_PORTC_CB(WRITE8(a2bus_agat840k_hle_device, d14_o_c)) // control
+
+ MCFG_DEVICE_ADD("d15", I8255, 0)
+ MCFG_I8255_IN_PORTA_CB(READ8(a2bus_agat840k_hle_device, d15_i_a)) // read data
+// MCFG_I8255_OUT_PORTB_CB(WRITE8(a2bus_agat840k_hle_device, d15_o_b)) // write data
+ MCFG_I8255_IN_PORTC_CB(READ8(a2bus_agat840k_hle_device, d15_i_c))
+ MCFG_I8255_OUT_PORTC_CB(WRITE8(a2bus_agat840k_hle_device, d15_o_c))
+MACHINE_CONFIG_END
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+const tiny_rom_entry *a2bus_agat840k_hle_device::device_rom_region() const
+{
+ return ROM_NAME(agat840k_hle);
+}
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+a2bus_agat840k_hle_device::a2bus_agat840k_hle_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+ : device_t(mconfig, type, tag, owner, clock)
+ , device_a2bus_card_interface(mconfig, *this)
+ , m_d14(*this, "d14")
+ , m_d15(*this, "d15")
+ , m_rom(nullptr)
+{
+}
+
+a2bus_agat840k_hle_device::a2bus_agat840k_hle_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ a2bus_agat840k_hle_device(mconfig, A2BUS_AGAT840K_HLE, tag, owner, clock)
+{
+}
+
+WRITE_LINE_MEMBER(a2bus_agat840k_hle_device::index_0_w)
+{
+ index_callback(0, state);
+}
+
+WRITE_LINE_MEMBER(a2bus_agat840k_hle_device::index_1_w)
+{
+ index_callback(1, state);
+}
+
+void a2bus_agat840k_hle_device::index_callback(int unit, int state)
+{
+ if (unit != m_unit) return;
+
+ LOG("index: unit %d state %d (%s)\n", unit, state, m_seen_magic ? "MAGIC" : "magic");
+
+#if 0
+ if (!state && !m_seen_magic)
+ {
+ m_seen_magic = true;
+ m_count_read = 0;
+ m_count_write = 0;
+ m_d15->pc4_w(0); // latch data into port A
+ m_d15->pc4_w(1);
+ m_timer_wait->adjust(attotime::from_usec(m_waittime), 0, attotime::from_usec(m_waittime));
+ }
+#endif
+}
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void a2bus_agat840k_hle_device::device_start()
+{
+ // set_a2bus_device makes m_slot valid
+ set_a2bus_device();
+
+ m_rom = device().machine().root_device().memregion(this->subtag(AGAT840K_ROM_REGION).c_str())->base();
+
+ m_mxcs = MXCSR_SYNC;
+
+ m_timer_wait = timer_alloc(TIMER_ID_WAIT);
+ m_timer_seek = timer_alloc(TIMER_ID_SEEK);
+
+ m_seektime = 6000; // 6 ms, per es5323.txt
+ m_waittime = 32; // 16 bits x 2 us
+}
+
+void a2bus_agat840k_hle_device::device_reset()
+{
+ u8 buf[256];
+
+ for (int i = 0; i < 2; i++)
+ {
+ legacy_floppy_image_device *img = floppy_image(i);
+ if (img)
+ {
+ img->floppy_drive_set_ready_state(FLOPPY_DRIVE_READY, 0);
+ img->floppy_drive_set_rpm(300.);
+ img->floppy_drive_seek(-img->floppy_drive_get_current_track());
+ }
+ }
+ m_floppy = floppy_image(0);
+
+ // generate track images in memory, using default volume ID and gap padding bytes
+ int t = 0;
+ for (auto &elem : m_tracks)
+ {
+ elem = std::make_unique<uint16_t[]>(6250);
+
+ for (int i = 0; i < 13; i++)
+ {
+ elem[i] = 0xaa;
+ }
+ for (int j = 0; j < 21; j++)
+ {
+ const int s = (j * 1) % 21;
+ int cksum = 0;
+
+ m_floppy->floppy_drive_read_sector_data(t & 1, s, buf, 256);
+
+ enum
+ {
+ BAUX = 22,
+ BLOB = 256 + 19 + BAUX
+ };
+
+ for (int k = 0; k < 256; k++)
+ {
+ if (cksum > 255) { cksum++; cksum &= 255; }
+ cksum += buf[k];
+ elem[13 + (BLOB * j) + 17 + k] = buf[k];
+ }
+ cksum &= 255;
+
+ elem[13 + (BLOB * j) + 0] = 0xa4;
+ elem[13 + (BLOB * j) + 1] = 0x80ff; // desync
+ elem[13 + (BLOB * j) + 2] = 0x95;
+ elem[13 + (BLOB * j) + 3] = 0x6a;
+ elem[13 + (BLOB * j) + 4] = 0x40fe; // volume id
+ elem[13 + (BLOB * j) + 5] = t;
+ elem[13 + (BLOB * j) + 6] = s;
+ elem[13 + (BLOB * j) + 7] = 0x5a;
+ elem[13 + (BLOB * j) + 8] = 0xaa;
+ elem[13 + (BLOB * j) + 9] = 0xaa;
+ elem[13 + (BLOB * j) + 10] = 0xaa;
+ elem[13 + (BLOB * j) + 11] = 0xaa;
+ elem[13 + (BLOB * j) + 12] = 0xaa;
+ elem[13 + (BLOB * j) + 13] = 0xa4;
+ elem[13 + (BLOB * j) + 14] = 0x80ff; // desync
+ elem[13 + (BLOB * j) + 15] = 0x6a;
+ elem[13 + (BLOB * j) + 16] = 0x95;
+ elem[13 + (BLOB * j) + 17 + 256] = cksum + 0x2000;
+ elem[13 + (BLOB * j) + 17 + 257] = 0x5a;
+
+ // gap3
+ for (int k = 0; k < BAUX; k++)
+ {
+ elem[13 + (BLOB * j) + 17 + 258 + k] = 0xaa;
+ }
+ }
+
+ t++;
+ if ((t & 1) == 0)
+ {
+ m_floppy->floppy_drive_seek(1);
+ }
+ }
+ m_floppy->floppy_drive_seek(-m_floppy->floppy_drive_get_current_track());
+
+ m_mxcs |= MXCSR_SYNC;
+ m_mxcs &= ~MXCSR_TR;
+}
+
+void a2bus_agat840k_hle_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
+{
+ switch (id)
+ {
+ case TIMER_ID_WAIT:
+ {
+ m_count_read++;
+ m_count_read %= 6250;
+ m_d15->pc4_w(0);
+ m_d15->pc4_w(1);
+ if (BIT(m_tracks[(2 * m_floppy->floppy_drive_get_current_track()) + m_side][m_count_read], 15))
+ m_mxcs &= ~MXCSR_SYNC;
+ }
+ break;
+
+ case TIMER_ID_SEEK:
+ m_floppy->floppy_stp_w(1);
+ m_floppy->floppy_stp_w(0);
+ break;
+ }
+}
+
+
+/*-------------------------------------------------
+ read_c0nx - called for reads from this card's c0nx space
+-------------------------------------------------*/
+
+uint8_t a2bus_agat840k_hle_device::read_c0nx(address_space &space, uint8_t offset)
+{
+ u8 data;
+
+ switch (offset)
+ {
+ case 0: case 1: case 2: case 3:
+ data = m_d14->read(space, offset);
+ break;
+
+ case 4: case 5: case 6: case 7:
+ data = m_d15->read(space, offset - 4);
+ break;
+
+ default:
+ data = 0xff;
+ break;
+ }
+
+ return data;
+}
+
+
+/*-------------------------------------------------
+ write_c0nx - called for writes to this card's c0nx space
+-------------------------------------------------*/
+
+void a2bus_agat840k_hle_device::write_c0nx(address_space &space, uint8_t offset, uint8_t data)
+{
+ switch (offset)
+ {
+ case 0: case 1: case 2: case 3:
+ m_d14->write(space, offset, data);
+ break;
+
+ case 4: case 5: case 6: case 7:
+ m_d15->write(space, offset - 4, data);
+ break;
+
+ case 8: // write desync
+ break;
+
+ case 9: // step
+ LOG("step at %11.6f\n", machine().time().as_double());
+ m_seen_magic = false;
+ m_timer_wait->adjust(attotime::from_usec(m_seektime), 0, attotime::from_usec(m_waittime));
+ m_floppy->floppy_stp_w(1);
+ m_floppy->floppy_stp_w(0);
+ break;
+
+ case 10: // reset desync flipflop
+ m_mxcs |= MXCSR_SYNC;
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*-------------------------------------------------
+ read_cnxx - called for reads from this card's c0nx space
+-------------------------------------------------*/
+
+uint8_t a2bus_agat840k_hle_device::read_cnxx(address_space &space, uint8_t offset)
+{
+ return m_rom[offset];
+}
+
+legacy_floppy_image_device *a2bus_agat840k_hle_device::floppy_image(int drive)
+{
+ const char *floppy_name = nullptr;
+
+ switch (drive)
+ {
+ case 0:
+ floppy_name = FLOPPY_0;
+ break;
+ case 1:
+ floppy_name = FLOPPY_1;
+ break;
+ }
+ return subdevice<legacy_floppy_image_device>(floppy_name);
+}
+
+// all signals active low. write support not implemented; WPT is always active.
+READ8_MEMBER(a2bus_agat840k_hle_device::d14_i_b)
+{
+ u8 data = 0x03; // one drive present, because drive select is broken
+
+ m_floppy->floppy_drive_set_ready_state(FLOPPY_DRIVE_READY, 1);
+
+ data |= (m_floppy->floppy_index_r() << 4) ^ 0x10;
+// data |= m_floppy->floppy_wpt_r() << 5;
+ data |= m_floppy->floppy_tk00_r() << 6;
+ data |= m_floppy->floppy_ready_r() << 7;
+
+ LOG("status A: %s %s (t %d) %s %s\n", BIT(data, 7) ? "ready" : "READY", BIT(data, 6) ? "tk00" : "TK00",
+ m_floppy->floppy_drive_get_current_track(),
+ BIT(data, 5) ? "wpt" : "WPT", BIT(data, 4) ? "index" : "INDEX");
+
+ return data;
+}
+
+/*
+ * b0 AH strong write precomp
+ * b1 -- NC
+ * b2 -- step direction (1 - inward, 0 - outward)
+ * b3 -- drive select (0 - drive 1, 1 - drive 2)
+ * b4 -- head select (0 - bottom, 1 - top)
+ * b5 AH write precomp off
+ * b6 AH write enable
+ * b7 AH motor on
+ *
+ * C0x2
+ */
+WRITE8_MEMBER(a2bus_agat840k_hle_device::d14_o_c)
+{
+ // drive select is broken in legacy flopdrv.cpp -- floppy_get_drive
+ m_unit = BIT(data, 3);
+ m_floppy = floppy_image(m_unit);
+ if (m_unit)
+ m_floppy->floppy_ds1_w(m_unit != 1);
+ else
+ m_floppy->floppy_ds0_w(m_unit != 0);
+
+ m_floppy->floppy_drtn_w(!BIT(data, 2));
+ m_side = BIT(data, 4);
+ m_floppy->floppy_wtg_w(!BIT(data, 6));
+ m_floppy->floppy_mon_w(!BIT(data, 7)); // tied to 'drive select', 'motor on' and 'head load'
+
+ if (!BIT(data, 7))
+ {
+ m_seen_magic = false;
+ m_timer_wait->adjust(attotime::never);
+ }
+ else
+ {
+ m_d15->pc4_w(0);
+ m_d15->pc4_w(1);
+ m_timer_wait->adjust(attotime::from_usec(m_waittime), 0, attotime::from_usec(m_waittime));
+ }
+
+ LOG("D14 C <- %02X (unit %d side %d drtn %d wtg %d mon %d)\n",
+ data, m_unit, m_side, !BIT(data, 2), !BIT(data, 6), !BIT(data, 7));
+}
+
+// data are latched in by write to PC4
+READ8_MEMBER(a2bus_agat840k_hle_device::d15_i_a)
+{
+ const u16 data = m_tracks[(2 * m_floppy->floppy_drive_get_current_track()) + m_side][m_count_read];
+ LOG("sector data: %02x @ %4d (head %d track %2d)%s\n", data & 0xff, m_count_read,
+ m_side, m_floppy->floppy_drive_get_current_track(),
+ BIT(data, 14) ? " volume" : (BIT(data, 13) ? " cksum" : ""));
+
+ return data & 0xff;
+}
+
+// C0x6
+//
+// b6 AL desync detected
+// b7 AH read or write data ready
+READ8_MEMBER(a2bus_agat840k_hle_device::d15_i_c)
+{
+ LOG("status B: @ %4d %s %s (%s)\n", m_count_read,
+ BIT(m_mxcs, 7) ? "ready" : "READY", BIT(m_mxcs, 6) ? "SYNC" : "sync",
+ m_seen_magic ? "MAGIC" : "magic");
+
+ return m_mxcs;
+}
+
+// C0x7
+//
+// b0 -- connected to b7, set if m_intr[PORT_B]
+// b2 AH b7 = ready for write data
+// b3 -- connected to b7, set if m_intr[PORT_A]
+// b4 AH b7 = read data ready
+WRITE8_MEMBER(a2bus_agat840k_hle_device::d15_o_c)
+{
+ if (BIT(data, 0) || BIT(data, 3))
+ {
+ m_mxcs |= MXCSR_TR;
+ }
+ else
+ {
+ m_mxcs &= ~MXCSR_TR;
+ }
+}
diff --git a/src/devices/bus/a2bus/agat840k_hle.h b/src/devices/bus/a2bus/agat840k_hle.h
new file mode 100644
index 00000000000..cab186c2c62
--- /dev/null
+++ b/src/devices/bus/a2bus/agat840k_hle.h
@@ -0,0 +1,103 @@
+// license:BSD-3-Clause
+// copyright-holders:Sergey Svishchev
+/*********************************************************************
+
+ agat840k_hle.h
+
+ High-level simulation of the Agat 840K floppy controller card
+
+*********************************************************************/
+
+#ifndef MAME_BUS_A2BUS_AGAT840K_HLE_H
+#define MAME_BUS_A2BUS_AGAT840K_HLE_H
+
+#pragma once
+
+#include "a2bus.h"
+#include "imagedev/flopdrv.h"
+#include "machine/i8255.h"
+
+
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+class a2bus_agat840k_hle_device:
+ public device_t,
+ public device_a2bus_card_interface
+{
+public:
+ enum : u8
+ {
+ MXCSR_SYNC = 0x40,
+ MXCSR_TR = 0x80
+ };
+
+ // construction/destruction
+ a2bus_agat840k_hle_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ DECLARE_READ8_MEMBER(d14_i_b);
+ DECLARE_READ8_MEMBER(d15_i_a);
+ DECLARE_READ8_MEMBER(d15_i_c);
+ DECLARE_WRITE8_MEMBER(d14_o_c);
+ DECLARE_WRITE8_MEMBER(d15_o_b);
+ DECLARE_WRITE8_MEMBER(d15_o_c);
+
+ DECLARE_WRITE_LINE_MEMBER(index_0_w);
+ DECLARE_WRITE_LINE_MEMBER(index_1_w);
+
+ void index_callback(int unit, int state);
+
+protected:
+ // construction/destruction
+ a2bus_agat840k_hle_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
+ virtual void device_start() override;
+ virtual void device_reset() override;
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
+ virtual void device_add_mconfig(machine_config &config) override;
+ virtual const tiny_rom_entry *device_rom_region() const override;
+
+ // overrides of standard a2bus slot functions
+ virtual uint8_t read_c0nx(address_space &space, uint8_t offset) override;
+ virtual void write_c0nx(address_space &space, uint8_t offset, uint8_t data) override;
+ virtual uint8_t read_cnxx(address_space &space, uint8_t offset) override;
+
+ enum
+ {
+ TIMER_ID_WAIT = 0,
+ TIMER_ID_SEEK
+ };
+
+ required_device<i8255_device> m_d14;
+ required_device<i8255_device> m_d15;
+
+private:
+ legacy_floppy_image_device *floppy_image(int drive);
+ legacy_floppy_image_device *m_floppy;
+ bool m_side;
+
+ std::unique_ptr<uint16_t[]> m_tracks[160];
+ int m_count_read;
+ int m_count_write;
+ bool m_seen_magic;
+ int m_current_track;
+
+ u8 m_mxcs;
+ int m_unit;
+ int m_state;
+
+ int m_seektime;
+ int m_waittime;
+
+ emu_timer *m_timer_wait = nullptr;
+ emu_timer *m_timer_seek = nullptr;
+
+ uint8_t *m_rom;
+};
+
+// device type definition
+DECLARE_DEVICE_TYPE(A2BUS_AGAT840K_HLE, a2bus_agat840k_hle_device)
+
+#endif // MAME_BUS_A2BUS_AGAT840K_HLE_H
diff --git a/src/devices/bus/c64/silverrock.cpp b/src/devices/bus/c64/silverrock.cpp
index 2260b82738a..a34f21d17a7 100644
--- a/src/devices/bus/c64/silverrock.cpp
+++ b/src/devices/bus/c64/silverrock.cpp
@@ -37,10 +37,10 @@
//**************************************************************************
#define UNSCRAMBLE_ADDRESS(_offset) \
- BITSWAP16(_offset,15,14,13,12,1,0,2,3,11,10,9,8,7,6,5,4)
+ bitswap<16>(_offset,15,14,13,12,1,0,2,3,11,10,9,8,7,6,5,4)
#define UNSCRAMBLE_DATA(_data) \
- BITSWAP8(_data,7,6,5,4,0,1,2,3)
+ bitswap<8>(_data,7,6,5,4,0,1,2,3)
diff --git a/src/devices/bus/c64/stardos.cpp b/src/devices/bus/c64/stardos.cpp
index ce3d19f0b9b..c8e47d300e8 100644
--- a/src/devices/bus/c64/stardos.cpp
+++ b/src/devices/bus/c64/stardos.cpp
@@ -142,7 +142,7 @@ uint8_t c64_stardos_cartridge_device::c64_cd_r(address_space &space, offs_t offs
{
if (!roml || !romh)
{
- // TODO BITSWAP8(7,6,5,4,3,1,2,0) ?
+ // TODO bitswap<8>(7,6,5,4,3,1,2,0) ?
data = m_roml[offset & 0x3fff];
}
else if (!io1)
diff --git a/src/devices/bus/c64/vizastar.cpp b/src/devices/bus/c64/vizastar.cpp
index 03043e7de93..444ff656b68 100644
--- a/src/devices/bus/c64/vizastar.cpp
+++ b/src/devices/bus/c64/vizastar.cpp
@@ -36,10 +36,10 @@
//**************************************************************************
#define UNSCRAMBLE_ADDRESS(_offset) \
- BITSWAP16(_offset,15,14,13,12,5,0,7,10,11,9,8,6,4,3,2,1)
+ bitswap<16>(_offset,15,14,13,12,5,0,7,10,11,9,8,6,4,3,2,1)
#define UNSCRAMBLE_DATA(_data) \
- BITSWAP8(_data,7,6,0,5,1,4,2,3)
+ bitswap<8>(_data,7,6,0,5,1,4,2,3)
diff --git a/src/devices/bus/c64/vw64.cpp b/src/devices/bus/c64/vw64.cpp
index f6ed996765a..ea0d3c3dac2 100644
--- a/src/devices/bus/c64/vw64.cpp
+++ b/src/devices/bus/c64/vw64.cpp
@@ -40,10 +40,10 @@
//**************************************************************************
#define UNSCRAMBLE_ADDRESS(_offset) \
- BITSWAP16(_offset,15,14,13,12,6,2,8,10,11,9,7,5,4,3,1,0)
+ bitswap<16>(_offset,15,14,13,12,6,2,8,10,11,9,7,5,4,3,1,0)
#define UNSCRAMBLE_DATA(_data) \
- BITSWAP8(_data,7,6,0,5,1,4,2,3)
+ bitswap<8>(_data,7,6,0,5,1,4,2,3)
// 74LS122 tW=0.45*R*C = 1.1844s
diff --git a/src/devices/bus/c64/warp_speed.cpp b/src/devices/bus/c64/warp_speed.cpp
index e9098dadb44..3c266e3618d 100644
--- a/src/devices/bus/c64/warp_speed.cpp
+++ b/src/devices/bus/c64/warp_speed.cpp
@@ -38,10 +38,10 @@
//**************************************************************************
#define UNSCRAMBLE_ADDRESS(_offset) \
- BITSWAP16(_offset,15,14,12,13,5,2,7,9,11,10,8,6,4,3,1,0)
+ bitswap<16>(_offset,15,14,12,13,5,2,7,9,11,10,8,6,4,3,1,0)
#define UNSCRAMBLE_DATA(_data) \
- BITSWAP8(_data,7,6,5,0,1,4,2,3)
+ bitswap<8>(_data,7,6,5,0,1,4,2,3)
diff --git a/src/devices/bus/cbmiec/c1541.cpp b/src/devices/bus/cbmiec/c1541.cpp
index 4d0f9748966..427cebe1e31 100644
--- a/src/devices/bus/cbmiec/c1541.cpp
+++ b/src/devices/bus/cbmiec/c1541.cpp
@@ -1071,7 +1071,7 @@ void fsd2_device::device_start()
for (offs_t offset = 0; offset < 0x4000; offset++)
{
- uint8_t data = BITSWAP8(rom[offset], 7, 6, 5, 3, 4, 2, 1, 0);
+ uint8_t data = bitswap<8>(rom[offset], 7, 6, 5, 3, 4, 2, 1, 0);
rom[offset] = data;
}
diff --git a/src/devices/bus/chanf/rom.cpp b/src/devices/bus/chanf/rom.cpp
index 3dc509a29d9..a3a213ba7ed 100644
--- a/src/devices/bus/chanf/rom.cpp
+++ b/src/devices/bus/chanf/rom.cpp
@@ -192,7 +192,7 @@ void chanf_rom_device::common_write_2102(uint32_t offset, uint8_t data)
m_latch[1] = data;
// all bits but 2,3 come from this write, but they are shuffled
// notice that data is 8bits, so when swapping bit8 & bit9 are always 0!
- m_addr_latch = (m_addr_latch & 0x0c) | (BITSWAP16((uint16_t) data, 15, 14, 13, 12, 11, 10, 7, 6, 5, 3, 2, 1, 9, 8, 4, 0));
+ m_addr_latch = (m_addr_latch & 0x0c) | (bitswap<16>((uint16_t) data, 15, 14, 13, 12, 11, 10, 7, 6, 5, 3, 2, 1, 9, 8, 4, 0));
}
}
diff --git a/src/devices/bus/coco/coco_fdc.cpp b/src/devices/bus/coco/coco_fdc.cpp
index 64268c8b17b..01f91976db2 100644
--- a/src/devices/bus/coco/coco_fdc.cpp
+++ b/src/devices/bus/coco/coco_fdc.cpp
@@ -494,22 +494,27 @@ namespace
DEFINE_DEVICE_TYPE(COCO3_HDB1, coco3_hdb1_device, "coco3_hdb1", "CoCo3 HDB-DOS")
//**************************************************************************
-// CP400 FDC
+// Prológica CP-450 BASIC Disco V. 1.0 (1984)
+//
+// There is a photo of the CP-450 disk controller unit at:
+// https://datassette.org/softwares/tandy-trs-color/cp-450-basic-disco-v-10
+// http://files.datassette.org/softwares/img/wp_20141212_22_08_26_pro.jpg
+//
//**************************************************************************
-ROM_START(cp400_fdc)
+ROM_START(cp450_fdc)
ROM_REGION(0x4000, "eprom", ROMREGION_ERASE00)
- ROM_LOAD("cp400dsk.rom", 0x0000, 0x2000, CRC(e9ad60a0) SHA1(827697fa5b755f5dc1efb054cdbbeb04e405405b))
+ ROM_LOAD("cp450_basic_disco_v1.0.rom", 0x0000, 0x2000, CRC(e9ad60a0) SHA1(827697fa5b755f5dc1efb054cdbbeb04e405405b))
ROM_END
namespace
{
- class cp400_fdc_device : public coco_fdc_device_base
+ class cp450_fdc_device : public coco_fdc_device_base
{
public:
// construction/destruction
- cp400_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : coco_fdc_device_base(mconfig, CP400_FDC, tag, owner, clock)
+ cp450_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : coco_fdc_device_base(mconfig, CP450_FDC, tag, owner, clock)
{
}
@@ -517,12 +522,12 @@ namespace
// optional information overrides
virtual const tiny_rom_entry *device_rom_region() const override
{
- return ROM_NAME(cp400_fdc);
+ return ROM_NAME(cp450_fdc);
}
};
}
-DEFINE_DEVICE_TYPE(CP400_FDC, cp400_fdc_device, "cp400_fdc", "CP400 FDC")
+DEFINE_DEVICE_TYPE(CP450_FDC, cp450_fdc_device, "cp450_fdc", "Prológica CP-450 BASIC Disco V. 1.0 (1984)")
//**************************************************************************
// Codimex CD-6809 FDC (1986)
@@ -556,4 +561,4 @@ namespace
};
}
-DEFINE_DEVICE_TYPE(CD6809_FDC, cd6809_fdc_device, "cd6809_fdc", "CD6809 FDC")
+DEFINE_DEVICE_TYPE(CD6809_FDC, cd6809_fdc_device, "cd6809_fdc", "Codimex CD-6809 Disk BASIC (1986)")
diff --git a/src/devices/bus/coco/coco_fdc.h b/src/devices/bus/coco/coco_fdc.h
index 11343ec2610..7ca2ca9e6fe 100644
--- a/src/devices/bus/coco/coco_fdc.h
+++ b/src/devices/bus/coco/coco_fdc.h
@@ -64,7 +64,7 @@ private:
extern const device_type COCO_FDC;
extern const device_type COCO_FDC_V11;
extern const device_type COCO3_HDB1;
-extern const device_type CP400_FDC;
+extern const device_type CP450_FDC;
extern const device_type CD6809_FDC;
#endif // MAME_BUS_COCO_COCO_FDC_H
diff --git a/src/devices/bus/gameboy/mbc.cpp b/src/devices/bus/gameboy/mbc.cpp
index de71f483779..4a48d896a94 100644
--- a/src/devices/bus/gameboy/mbc.cpp
+++ b/src/devices/bus/gameboy/mbc.cpp
@@ -1057,26 +1057,26 @@ WRITE8_MEMBER(gb_rom_sintax_device::write_bank)
switch (m_sintax_mode & 0x0f)
{
case 0x0d:
- data = BITSWAP8(data, 1,0,7,6,5,4,3,2);
+ data = bitswap<8>(data, 1,0,7,6,5,4,3,2);
break;
case 0x09:
- //data = BITSWAP8(data, 3,2,5,4,0,1,6,7); // Monkey..no
- data = BITSWAP8(data, 4,5,2,3,0,1,6,7);
+ //data = bitswap<8>(data, 3,2,5,4,0,1,6,7); // Monkey..no
+ data = bitswap<8>(data, 4,5,2,3,0,1,6,7);
break;
case 0x00: // 0x10=lion 0x00 hmmmmm // 1 and 0 unconfirmed
- data = BITSWAP8(data, 7,0,5,6,3,4,1,2);
+ data = bitswap<8>(data, 7,0,5,6,3,4,1,2);
break;
case 0x01:
- data = BITSWAP8(data, 0,1,6,7,4,5,2,3);
+ data = bitswap<8>(data, 0,1,6,7,4,5,2,3);
break;
case 0x05:
- data = BITSWAP8(data, 7,6,1,0,3,2,5,4); // Not 100% on this one
+ data = bitswap<8>(data, 7,6,1,0,3,2,5,4); // Not 100% on this one
break;
case 0x07:
- data = BITSWAP8(data, 2,0,3,1,5,4,7,6); // 5 and 7 unconfirmed
+ data = bitswap<8>(data, 2,0,3,1,5,4,7,6); // 5 and 7 unconfirmed
break;
case 0x0b:
- data = BITSWAP8(data, 2,3,0,1,6,7,4,5); // 5 and 6 unconfirmed
+ data = bitswap<8>(data, 2,3,0,1,6,7,4,5); // 5 and 6 unconfirmed
break;
}
m_latch_bank2 = (m_latch_bank2 & 0x100) | data;
diff --git a/src/devices/bus/msx_cart/dooly.cpp b/src/devices/bus/msx_cart/dooly.cpp
index 389e0c3da77..d1d3ad9ff39 100644
--- a/src/devices/bus/msx_cart/dooly.cpp
+++ b/src/devices/bus/msx_cart/dooly.cpp
@@ -45,7 +45,7 @@ READ8_MEMBER(msx_cart_dooly_device::read_cart)
switch (m_prot)
{
case 0x04:
- data = BITSWAP8(data, 7, 6, 5, 4, 3, 1, 0, 2);
+ data = bitswap<8>(data, 7, 6, 5, 4, 3, 1, 0, 2);
break;
}
return data;
diff --git a/src/devices/bus/neogeo/boot_kof10th.cpp b/src/devices/bus/neogeo/boot_kof10th.cpp
index 6f31cf6717a..167692f986d 100644
--- a/src/devices/bus/neogeo/boot_kof10th.cpp
+++ b/src/devices/bus/neogeo/boot_kof10th.cpp
@@ -102,7 +102,7 @@ WRITE16_MEMBER(neogeo_kof10th_cart_device::protection_w)
if (!m_cart_ram[0xffe])
COMBINE_DATA(&m_cart_ram2[(0x00000/2) + (offset & 0xffff)]); // Write to RAM bank A
else
- m_fixed[offset] = BITSWAP8(data, 7,6,0,4,3,2,1,5); // Write S data on-the-fly
+ m_fixed[offset] = bitswap<8>(data, 7,6,0,4,3,2,1,5); // Write S data on-the-fly
}
else if (offset >= 0xfe000/2)
{
diff --git a/src/devices/bus/neogeo/prot_cmc.cpp b/src/devices/bus/neogeo/prot_cmc.cpp
index 336bb543a21..77591827f54 100644
--- a/src/devices/bus/neogeo/prot_cmc.cpp
+++ b/src/devices/bus/neogeo/prot_cmc.cpp
@@ -689,15 +689,15 @@ int cmc_prot_device::m1_address_scramble(int address, uint16_t key)
int block = (address >> 16) & 7;
int aux = address & 0xffff;
- aux ^= BITSWAP16(key,12,0,2,4,8,15,7,13,10,1,3,6,11,9,14,5);
- aux = BITSWAP16(aux,
+ aux ^= bitswap<16>(key,12,0,2,4,8,15,7,13,10,1,3,6,11,9,14,5);
+ aux = bitswap<16>(aux,
p1[block][15], p1[block][14], p1[block][13], p1[block][12],
p1[block][11], p1[block][10], p1[block][9], p1[block][8],
p1[block][7], p1[block][6], p1[block][5], p1[block][4],
p1[block][3], p1[block][2], p1[block][1], p1[block][0]);
aux ^= m1_address_0_7_xor[(aux >> 8) & 0xff];
aux ^= m1_address_8_15_xor[aux & 0xff] << 8;
- aux = BITSWAP16(aux, 7,15,14,6,5,13,12,4,11,3,10,2,9,1,8,0);
+ aux = bitswap<16>(aux, 7,15,14,6,5,13,12,4,11,3,10,2,9,1,8,0);
return (block << 16) | aux;
}
diff --git a/src/devices/bus/neogeo/prot_cthd.cpp b/src/devices/bus/neogeo/prot_cthd.cpp
index dd641e64537..d2c427d6ac7 100644
--- a/src/devices/bus/neogeo/prot_cthd.cpp
+++ b/src/devices/bus/neogeo/prot_cthd.cpp
@@ -189,7 +189,7 @@ void cthd_prot_device::ct2k3sp_sx_decrypt( uint8_t* fixedrom, uint32_t fixedrom_
for (int i = 0; i < rom_size; i++)
{
- int ofst = BITSWAP24((i & 0x1ffff), 23, 22, 21, 20, 19, 18, 17, 3,
+ int ofst = bitswap<24>((i & 0x1ffff), 23, 22, 21, 20, 19, 18, 17, 3,
0, 1, 4, 2, 13, 14, 16, 15,
5, 6, 11, 10, 9, 8, 7, 12 );
ofst += (i >> 17) << 17;
@@ -275,7 +275,7 @@ void cthd_prot_device::patch_ct2k3sa(uint8_t* cpurom, uint32_t cpurom_size)
/* Matrimelee / Shin Gouketsuji Ichizoku Toukon (bootleg) */
-#define MATRIMBLZ80(i) (i ^ (BITSWAP8(i & 0x3,4,3,1,2,0,7,6,5) << 8))
+#define MATRIMBLZ80(i) (i ^ (bitswap<8>(i & 0x3,4,3,1,2,0,7,6,5) << 8))
void cthd_prot_device::matrimbl_decrypt(uint8_t* sprrom, uint32_t sprrom_size, uint8_t* audiorom, uint32_t audiorom_size)
{
diff --git a/src/devices/bus/neogeo/prot_kof2k3bl.cpp b/src/devices/bus/neogeo/prot_kof2k3bl.cpp
index 5afe9a0e548..456f164c042 100644
--- a/src/devices/bus/neogeo/prot_kof2k3bl.cpp
+++ b/src/devices/bus/neogeo/prot_kof2k3bl.cpp
@@ -102,7 +102,7 @@ void kof2k3bl_prot_device::pl_px_decrypt(uint8_t* cpurom, uint32_t cpurom_size)
{
memcpy(&tmp[0], &rom16[i], 0x100000);
for (int j = 0; j < 0x100000/2; j++)
- rom16[i+j] = tmp[BITSWAP24(j,23,22,21,20,19,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18)];
+ rom16[i+j] = tmp[bitswap<24>(j,23,22,21,20,19,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18)];
}
/* patched by Altera protection chip on PCB */
@@ -124,7 +124,7 @@ void kof2k3bl_prot_device::upl_px_decrypt(uint8_t* cpurom, uint32_t cpurom_size)
uint8_t *buf = cpurom + 0xd0610;
for (int i = 0; i < 0x2000 / 2; i++)
{
- int ofst = (i & 0xff00) + BITSWAP8((i & 0x00ff), 7, 6, 0, 4, 3, 2, 1, 5);
+ int ofst = (i & 0xff00) + bitswap<8>((i & 0x00ff), 7, 6, 0, 4, 3, 2, 1, 5);
memcpy(&rom[i * 2], &buf[ofst * 2], 2);
}
diff --git a/src/devices/bus/neogeo/prot_misc.cpp b/src/devices/bus/neogeo/prot_misc.cpp
index 54b9c5b8792..47150bbabee 100644
--- a/src/devices/bus/neogeo/prot_misc.cpp
+++ b/src/devices/bus/neogeo/prot_misc.cpp
@@ -77,7 +77,7 @@ void neoboot_prot_device::sx_decrypt(uint8_t* fixed, uint32_t fixed_size, int va
else if (value == 2)
{
for (int i = 0; i < sx_size; i++)
- rom[i] = BITSWAP8(rom[i], 7, 6, 0, 4, 3, 2, 1, 5);
+ rom[i] = bitswap<8>(rom[i], 7, 6, 0, 4, 3, 2, 1, 5);
}
}
@@ -139,7 +139,7 @@ void neoboot_prot_device::kf2k5uni_px_decrypt(uint8_t* cpurom, uint32_t cpurom_s
{
for (int j = 0; j < 0x80; j += 2)
{
- int ofst = BITSWAP8(j, 0, 3, 4, 5, 6, 1, 2, 7);
+ int ofst = bitswap<8>(j, 0, 3, 4, 5, 6, 1, 2, 7);
memcpy(&dst[j], src + i + ofst, 2);
}
memcpy(src + i, &dst[0], 0x80);
@@ -154,7 +154,7 @@ void neoboot_prot_device::kf2k5uni_sx_decrypt(uint8_t* fixedrom, uint32_t fixedr
uint8_t *srom = fixedrom;
for (int i = 0; i < 0x20000; i++)
- srom[i] = BITSWAP8(srom[i], 4, 5, 6, 7, 0, 1, 2, 3);
+ srom[i] = bitswap<8>(srom[i], 4, 5, 6, 7, 0, 1, 2, 3);
}
void neoboot_prot_device::kf2k5uni_mx_decrypt(uint8_t* audiorom, uint32_t audiorom_size)
@@ -162,7 +162,7 @@ void neoboot_prot_device::kf2k5uni_mx_decrypt(uint8_t* audiorom, uint32_t audior
uint8_t *mrom = audiorom;
for (int i = 0; i < 0x30000; i++)
- mrom[i] = BITSWAP8(mrom[i], 4, 5, 6, 7, 0, 1, 2, 3);
+ mrom[i] = bitswap<8>(mrom[i], 4, 5, 6, 7, 0, 1, 2, 3);
}
@@ -187,7 +187,7 @@ void neoboot_prot_device::lans2004_vx_decrypt(uint8_t* ymsndrom, uint32_t ymsndr
{
uint8_t *rom = ymsndrom;
for (int i = 0; i < 0xA00000; i++)
- rom[i] = BITSWAP8(rom[i], 0, 1, 5, 4, 3, 2, 6, 7);
+ rom[i] = bitswap<8>(rom[i], 0, 1, 5, 4, 3, 2, 6, 7);
}
void neoboot_prot_device::lans2004_decrypt_68k(uint8_t* cpurom, uint32_t cpurom_size)
@@ -239,7 +239,7 @@ void neoboot_prot_device::samsho5b_px_decrypt(uint8_t* cpurom, uint32_t cpurom_s
for (int i = 0; i < px_size / 2; i++)
{
- int ofst = BITSWAP8((i & 0x000ff), 7, 6, 5, 4, 3, 0, 1, 2);
+ int ofst = bitswap<8>((i & 0x000ff), 7, 6, 5, 4, 3, 0, 1, 2);
ofst += (i & 0xfffff00);
ofst ^= 0x060005;
@@ -259,7 +259,7 @@ void neoboot_prot_device::samsho5b_vx_decrypt(uint8_t* ymsndrom, uint32_t ymsndr
uint8_t *rom = ymsndrom;
for (int i = 0; i < vx_size; i++)
- rom[i] = BITSWAP8(rom[i], 0, 1, 5, 4, 3, 2, 6, 7);
+ rom[i] = bitswap<8>(rom[i], 0, 1, 5, 4, 3, 2, 6, 7);
}
@@ -381,7 +381,7 @@ void neoboot_prot_device::svcboot_px_decrypt(uint8_t* cpurom, uint32_t cpurom_si
for (int i = 0; i < size / 2; i++)
{
- int ofst = BITSWAP8((i & 0x0000ff), 7, 6, 1, 0, 3, 2, 5, 4);
+ int ofst = bitswap<8>((i & 0x0000ff), 7, 6, 1, 0, 3, 2, 5, 4);
ofst += (i & 0xffff00);
memcpy(&src[i * 2], &dst[ofst * 2], 0x02);
}
@@ -410,7 +410,7 @@ void neoboot_prot_device::svcboot_cx_decrypt(uint8_t* sprrom, uint32_t sprrom_si
int bit1 = bitswap4_tbl[idx][1];
int bit2 = bitswap4_tbl[idx][2];
int bit3 = bitswap4_tbl[idx][3];
- int ofst = BITSWAP8((i & 0x0000ff), 7, 6, 5, 4, bit3, bit2, bit1, bit0);
+ int ofst = bitswap<8>((i & 0x0000ff), 7, 6, 5, 4, bit3, bit2, bit1, bit0);
ofst += (i & 0xfffff00);
memcpy(&src[i * 0x80], &dst[ofst * 0x80], 0x80);
}
@@ -429,7 +429,7 @@ void neoboot_prot_device::svcplus_px_decrypt(uint8_t* cpurom, uint32_t cpurom_si
memcpy(&dst[0], src, size);
for (int i = 0; i < size / 2; i++)
{
- int ofst = BITSWAP24((i & 0xfffff), 0x17, 0x16, 0x15, 0x14, 0x13, 0x00, 0x01, 0x02,
+ int ofst = bitswap<24>((i & 0xfffff), 0x17, 0x16, 0x15, 0x14, 0x13, 0x00, 0x01, 0x02,
0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08,
0x07, 0x06, 0x05, 0x04, 0x03, 0x10, 0x11, 0x12);
ofst ^= 0x0f0007;
@@ -478,7 +478,7 @@ void neoboot_prot_device::svcsplus_px_decrypt(uint8_t* cpurom, uint32_t cpurom_s
memcpy(&dst[0], src, size);
for (int i = 0; i < size / 2; i++)
{
- int ofst = BITSWAP16((i & 0x007fff), 0x0f, 0x00, 0x08, 0x09, 0x0b, 0x0a, 0x0c, 0x0d,
+ int ofst = bitswap<16>((i & 0x007fff), 0x0f, 0x00, 0x08, 0x09, 0x0b, 0x0a, 0x0c, 0x0d,
0x04, 0x03, 0x01, 0x07, 0x06, 0x02, 0x05, 0x0e);
ofst += (i & 0x078000);
@@ -524,7 +524,7 @@ void neoboot_prot_device::kof2002b_gfx_decrypt(uint8_t *src, int size)
for (int j = 0; j < 0x200; j++)
{
int n = (j & 0x38) >> 3;
- int ofst = BITSWAP16(j, 15, 14, 13, 12, 11, 10, 9, t[n][0], t[n][1], t[n][2], 5, 4, 3, t[n][3], t[n][4], t[n][5]);
+ int ofst = bitswap<16>(j, 15, 14, 13, 12, 11, 10, 9, t[n][0], t[n][1], t[n][2], 5, 4, 3, t[n][3], t[n][4], t[n][5]);
memcpy(src + i + ofst * 128, &dst[j * 128], 128);
}
}
@@ -544,7 +544,7 @@ void neoboot_prot_device::kf2k2mp_decrypt(uint8_t* cpurom, uint32_t cpurom_size)
{
for (int j = 0; j < 0x80 / 2; j++)
{
- int ofst = BITSWAP8( j, 6, 7, 2, 3, 4, 5, 0, 1 );
+ int ofst = bitswap<8>( j, 6, 7, 2, 3, 4, 5, 0, 1 );
memcpy(dst + j * 2, src + i + ofst * 2, 2);
}
memcpy(src + i, dst, 0x80);
@@ -580,7 +580,7 @@ void neoboot_prot_device::kof10th_decrypt(uint8_t* cpurom, uint32_t cpurom_size)
for (int i = 0; i < 0x900000; i++)
{
- int j = BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,12,11,2,9,8,7,1,5,4,3,10,6,0);
+ int j = bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,12,11,2,9,8,7,1,5,4,3,10,6,0);
src[j] = dst[i];
}
diff --git a/src/devices/bus/neogeo/prot_pcm2.cpp b/src/devices/bus/neogeo/prot_pcm2.cpp
index 80fa21eafe0..82f3175eb8b 100644
--- a/src/devices/bus/neogeo/prot_pcm2.cpp
+++ b/src/devices/bus/neogeo/prot_pcm2.cpp
@@ -82,7 +82,7 @@ void pcm2_prot_device::swap(uint8_t* ymrom, uint32_t ymsize, int value)
for (int i = 0; i < 0x1000000; i++)
{
- j = BITSWAP24(i,23,22,21,20,19,18,17,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,16);
+ j = bitswap<24>(i,23,22,21,20,19,18,17,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,16);
j ^= addrs[value][1];
d = ((i + addrs[value][0]) & 0xffffff);
src[j] = buf[d] ^ xordata[value][j & 0x7];
diff --git a/src/devices/bus/neogeo/prot_pvc.cpp b/src/devices/bus/neogeo/prot_pvc.cpp
index 99c70142222..8e290596576 100644
--- a/src/devices/bus/neogeo/prot_pvc.cpp
+++ b/src/devices/bus/neogeo/prot_pvc.cpp
@@ -112,7 +112,7 @@ void pvc_prot_device::mslug5_decrypt_68k(uint8_t* rom, uint32_t size)
for (int i = 0x100000; i < 0x0800000; i += 4)
{
uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8;
- rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0);
+ rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0);
rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff;
rom[BYTE_XOR_LE(i+2)] = rom16 >> 8;
}
@@ -120,12 +120,12 @@ void pvc_prot_device::mslug5_decrypt_68k(uint8_t* rom, uint32_t size)
memcpy(&buf[0], rom, rom_size);
for (int i = 0; i < 0x0100000 / 0x10000; i++)
{
- int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2);
+ int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2);
memcpy(&rom[i * 0x10000], &buf[ofst * 0x10000], 0x10000);
}
for (int i = 0x100000; i < 0x800000; i += 0x100)
{
- int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00700) + (BITSWAP8(((i & 0x0ff000) >> 12), 5, 4, 7, 6, 1, 0, 3, 2) << 12);
+ int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00700) + (bitswap<8>(((i & 0x0ff000) >> 12), 5, 4, 7, 6, 1, 0, 3, 2) << 12);
memcpy(&rom[i], &buf[ofst], 0x100);
}
@@ -151,7 +151,7 @@ void pvc_prot_device::svc_px_decrypt(uint8_t* rom, uint32_t size)
for (int i = 0x100000; i < 0x0800000; i += 4)
{
uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8;
- rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0);
+ rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0);
rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff;
rom[BYTE_XOR_LE(i+2)] = rom16 >> 8;
}
@@ -159,13 +159,13 @@ void pvc_prot_device::svc_px_decrypt(uint8_t* rom, uint32_t size)
memcpy(&buf[0], rom, rom_size);
for (int i = 0; i < 0x0100000 / 0x10000; i++)
{
- int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 2, 3, 0, 1);
+ int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 2, 3, 0, 1);
memcpy(&rom[i * 0x10000], &buf[ofst * 0x10000], 0x10000);
}
for (int i = 0x100000; i < 0x800000; i += 0x100)
{
- int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00a00) + (BITSWAP8(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12);
+ int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00a00) + (bitswap<8>(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12);
memcpy(&rom[i], &buf[ofst], 0x100);
}
memcpy(&buf[0], rom, rom_size );
@@ -189,20 +189,20 @@ void pvc_prot_device::kf2k3pcb_decrypt_68k(uint8_t* rom, uint32_t size)
for (int i = 0x100000; i < 0x800000; i += 4)
{
uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8;
- rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 4, 5, 6, 7, 8, 9, 10, 11, 3, 2, 1, 0);
+ rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 4, 5, 6, 7, 8, 9, 10, 11, 3, 2, 1, 0);
rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff;
rom[BYTE_XOR_LE(i+2)] = rom16 >> 8;
}
for (int i = 0; i < 0x0100000 / 0x10000; i++)
{
- int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2);
+ int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2);
memcpy(&buf[i * 0x10000], &rom[ofst * 0x10000], 0x10000);
}
for (int i = 0x100000; i < 0x900000; i += 0x100)
{
- int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00300) + (BITSWAP8(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12);
+ int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00300) + (bitswap<8>(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12);
memcpy(&buf[i], &rom[ofst], 0x100);
}
memcpy(&rom[0x000000], &buf[0x000000], 0x100000);
@@ -230,20 +230,20 @@ void pvc_prot_device::kof2003_decrypt_68k(uint8_t* rom, uint32_t size)
for (int i = 0x100000; i < 0x800000; i += 4)
{
uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8;
- rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 5, 4, 7, 6, 9, 8, 11, 10, 3, 2, 1, 0);
+ rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 5, 4, 7, 6, 9, 8, 11, 10, 3, 2, 1, 0);
rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff;
rom[BYTE_XOR_LE(i+2)] = rom16 >> 8;
}
for (int i = 0; i < 0x0100000 / 0x10000; i++)
{
- int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 0, 1, 2, 3);
+ int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 0, 1, 2, 3);
memcpy(&buf[i * 0x10000], &rom[ofst * 0x10000], 0x10000);
}
for (int i = 0x100000; i < 0x900000; i += 0x100)
{
- int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00800) + (BITSWAP8(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12);
+ int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00800) + (bitswap<8>(((i & 0x0ff000) >> 12), 4, 5, 6, 7, 1, 0, 3, 2) << 12);
memcpy(&buf[i], &rom[ofst], 0x100);
}
memcpy(&rom[0x000000], &buf[0x000000], 0x100000);
@@ -271,19 +271,19 @@ void pvc_prot_device::kof2003h_decrypt_68k(uint8_t* rom, uint32_t size)
for (int i = 0x100000; i < 0x800000; i += 4)
{
uint16_t rom16 = rom[BYTE_XOR_LE(i+1)] | rom[BYTE_XOR_LE(i+2)] << 8;
- rom16 = BITSWAP16(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0);
+ rom16 = bitswap<16>(rom16, 15, 14, 13, 12, 10, 11, 8, 9, 6, 7, 4, 5, 3, 2, 1, 0);
rom[BYTE_XOR_LE(i+1)] = rom16 & 0xff;
rom[BYTE_XOR_LE(i+2)] = rom16 >> 8;
}
for (int i = 0; i < 0x0100000 / 0x10000; i++)
{
- int ofst = (i & 0xf0) + BITSWAP8((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2);
+ int ofst = (i & 0xf0) + bitswap<8>((i & 0x0f), 7, 6, 5, 4, 1, 0, 3, 2);
memcpy(&buf[i * 0x10000], &rom[ofst * 0x10000], 0x10000);
}
for (int i = 0x100000; i < 0x900000; i += 0x100)
{
- int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00400) + (BITSWAP8(((i & 0x0ff000) >> 12), 6, 7, 4, 5, 0, 1, 2, 3) << 12);
+ int ofst = (i & 0xf000ff) + ((i & 0x000f00) ^ 0x00400) + (bitswap<8>(((i & 0x0ff000) >> 12), 6, 7, 4, 5, 0, 1, 2, 3) << 12);
memcpy(&buf[i], &rom[ofst], 0x100);
}
memcpy(&rom[0x000000], &buf[0x000000], 0x100000);
diff --git a/src/devices/bus/neogeo/prot_sma.cpp b/src/devices/bus/neogeo/prot_sma.cpp
index 1b6e2322cd9..bfd15ab208a 100644
--- a/src/devices/bus/neogeo/prot_sma.cpp
+++ b/src/devices/bus/neogeo/prot_sma.cpp
@@ -398,7 +398,7 @@ void sma_prot_device::kof99_decrypt_68k(uint8_t* base)
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
- rom[i] = BITSWAP16(rom[i],13,7,3,0,9,4,5,6,1,12,8,14,10,11,2,15);
+ rom[i] = bitswap<16>(rom[i],13,7,3,0,9,4,5,6,1,12,8,14,10,11,2,15);
// swap address lines for the banked part
for (int i = 0; i < 0x600000/2; i += 0x800/2)
@@ -406,13 +406,13 @@ void sma_prot_device::kof99_decrypt_68k(uint8_t* base)
uint16_t buffer[0x800/2];
memcpy(buffer, &rom[i], 0x800);
for (int j = 0; j < 0x800/2; j++)
- rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,6,2,4,9,8,3,1,7,0,5)];
+ rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,6,2,4,9,8,3,1,7,0,5)];
}
// swap address lines & relocate fixed part
rom = (uint16_t *)base;
for (int i = 0; i < 0x0c0000/2; i++)
- rom[i] = rom[0x700000/2 + BITSWAP24(i,23,22,21,20,19,18,11,6,14,17,16,5,8,10,12,0,4,3,2,7,9,15,13,1)];
+ rom[i] = rom[0x700000/2 + bitswap<24>(i,23,22,21,20,19,18,11,6,14,17,16,5,8,10,12,0,4,3,2,7,9,15,13,1)];
}
@@ -423,12 +423,12 @@ void sma_prot_device::garou_decrypt_68k(uint8_t* base)
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
- rom[i] = BITSWAP16(rom[i],13,12,14,10,8,2,3,1,5,9,11,4,15,0,6,7);
+ rom[i] = bitswap<16>(rom[i],13,12,14,10,8,2,3,1,5,9,11,4,15,0,6,7);
// swap address lines & relocate fixed part
rom = (uint16_t *)base;
for (int i = 0; i < 0x0c0000/2; i++)
- rom[i] = rom[0x710000/2 + BITSWAP24(i,23,22,21,20,19,18,4,5,16,14,7,9,6,13,17,15,3,1,2,12,11,8,10,0)];
+ rom[i] = rom[0x710000/2 + bitswap<24>(i,23,22,21,20,19,18,4,5,16,14,7,9,6,13,17,15,3,1,2,12,11,8,10,0)];
// swap address lines for the banked part
rom = (uint16_t *)(base + 0x100000);
@@ -437,7 +437,7 @@ void sma_prot_device::garou_decrypt_68k(uint8_t* base)
uint16_t buffer[0x8000/2];
memcpy(buffer, &rom[i], 0x8000);
for (int j = 0; j < 0x8000/2; j++)
- rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,9,4,8,3,13,6,2,7,0,12,1,11,10,5)];
+ rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,9,4,8,3,13,6,2,7,0,12,1,11,10,5)];
}
}
@@ -449,12 +449,12 @@ void sma_prot_device::garouh_decrypt_68k(uint8_t* base)
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
- rom[i] = BITSWAP16(rom[i],14,5,1,11,7,4,10,15,3,12,8,13,0,2,9,6);
+ rom[i] = bitswap<16>(rom[i],14,5,1,11,7,4,10,15,3,12,8,13,0,2,9,6);
// swap address lines & relocate fixed part
rom = (uint16_t *)base;
for (int i = 0; i < 0x0c0000/2; i++)
- rom[i] = rom[0x7f8000/2 + BITSWAP24(i,23,22,21,20,19,18,5,16,11,2,6,7,17,3,12,8,14,4,0,9,1,10,15,13)];
+ rom[i] = rom[0x7f8000/2 + bitswap<24>(i,23,22,21,20,19,18,5,16,11,2,6,7,17,3,12,8,14,4,0,9,1,10,15,13)];
// swap address lines for the banked part
rom = (uint16_t *)(base + 0x100000);
@@ -463,7 +463,7 @@ void sma_prot_device::garouh_decrypt_68k(uint8_t* base)
uint16_t buffer[0x8000/2];
memcpy(buffer, &rom[i], 0x8000);
for (int j = 0; j < 0x8000/2; j++)
- rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,12,8,1,7,11,3,13,10,6,9,5,4,0,2)];
+ rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,12,8,1,7,11,3,13,10,6,9,5,4,0,2)];
}
}
@@ -475,12 +475,12 @@ void sma_prot_device::mslug3_decrypt_68k(uint8_t* base)
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
- rom[i] = BITSWAP16(rom[i],4,11,14,3,1,13,0,7,2,8,12,15,10,9,5,6);
+ rom[i] = bitswap<16>(rom[i],4,11,14,3,1,13,0,7,2,8,12,15,10,9,5,6);
// swap address lines & relocate fixed part
rom = (uint16_t *)base;
for (int i = 0; i < 0x0c0000/2; i++)
- rom[i] = rom[0x5d0000/2 + BITSWAP24(i,23,22,21,20,19,18,15,2,1,13,3,0,9,6,16,4,11,5,7,12,17,14,10,8)];
+ rom[i] = rom[0x5d0000/2 + bitswap<24>(i,23,22,21,20,19,18,15,2,1,13,3,0,9,6,16,4,11,5,7,12,17,14,10,8)];
// swap address lines for the banked part
rom = (uint16_t *)(base + 0x100000);
@@ -489,7 +489,7 @@ void sma_prot_device::mslug3_decrypt_68k(uint8_t* base)
uint16_t buffer[0x10000/2];
memcpy(buffer, &rom[i], 0x10000);
for (int j = 0; j < 0x10000/2; j++)
- rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,2,11,0,14,6,4,13,8,9,3,10,7,5,12,1)];
+ rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,2,11,0,14,6,4,13,8,9,3,10,7,5,12,1)];
}
}
@@ -501,7 +501,7 @@ void sma_prot_device::kof2000_decrypt_68k(uint8_t* base)
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
- rom[i] = BITSWAP16(rom[i],12,8,11,3,15,14,7,0,10,13,6,5,9,2,1,4);
+ rom[i] = bitswap<16>(rom[i],12,8,11,3,15,14,7,0,10,13,6,5,9,2,1,4);
// swap address lines for the banked part
for (int i = 0; i < 0x63a000/2; i += 0x800/2)
@@ -509,11 +509,11 @@ void sma_prot_device::kof2000_decrypt_68k(uint8_t* base)
uint16_t buffer[0x800/2];
memcpy(buffer, &rom[i], 0x800);
for (int j = 0; j < 0x800/2; j++)
- rom[i+j] = buffer[BITSWAP24(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,4,1,3,8,6,2,7,0,9,5)];
+ rom[i+j] = buffer[bitswap<24>(j,23,22,21,20,19,18,17,16,15,14,13,12,11,10,4,1,3,8,6,2,7,0,9,5)];
}
// swap address lines & relocate fixed part
rom = (uint16_t *)base;
for (int i = 0; i < 0x0c0000/2; i++)
- rom[i] = rom[0x73a000/2 + BITSWAP24(i,23,22,21,20,19,18,8,4,15,13,3,14,16,2,6,17,7,12,10,0,5,11,1,9)];
+ rom[i] = rom[0x73a000/2 + bitswap<24>(i,23,22,21,20,19,18,8,4,15,13,3,14,16,2,6,17,7,12,10,0,5,11,1,9)];
}
diff --git a/src/devices/bus/neogeo/sbp.cpp b/src/devices/bus/neogeo/sbp.cpp
index f5c25a2210a..6b6920cb5e8 100644
--- a/src/devices/bus/neogeo/sbp.cpp
+++ b/src/devices/bus/neogeo/sbp.cpp
@@ -36,7 +36,7 @@ READ16_MEMBER( neogeo_sbp_cart_device::protection_r )
{
uint16_t* rom = (get_rom_size()) ? get_rom_base() : get_region_rom_base();
uint16_t origdata = rom[offset + (0x200/2)];
- uint16_t data = BITSWAP16(origdata, 11,10,9,8,15,14,13,12,3,2,1,0,7,6,5,4);
+ uint16_t data = bitswap<16>(origdata, 11,10,9,8,15,14,13,12,3,2,1,0,7,6,5,4);
int realoffset = 0x200 + (offset * 2);
logerror("sbp_lowerrom_r offset %08x data %04x\n", realoffset, data);
diff --git a/src/devices/bus/nes/jy.cpp b/src/devices/bus/nes/jy.cpp
index 38a30848859..191892ef544 100644
--- a/src/devices/bus/nes/jy.cpp
+++ b/src/devices/bus/nes/jy.cpp
@@ -296,7 +296,7 @@ READ8_MEMBER(nes_jy_typea_device::read_m)
inline uint8_t nes_jy_typea_device::unscramble(uint8_t bank)
{
- return BITSWAP8(bank & 0x7f,7,0,1,2,3,4,5,6);
+ return bitswap<8>(bank & 0x7f,7,0,1,2,3,4,5,6);
}
void nes_jy_typea_device::update_prg()
diff --git a/src/devices/bus/nes/mmc3_clones.cpp b/src/devices/bus/nes/mmc3_clones.cpp
index 5d776c5d86c..5c578c0fcbd 100644
--- a/src/devices/bus/nes/mmc3_clones.cpp
+++ b/src/devices/bus/nes/mmc3_clones.cpp
@@ -2565,7 +2565,7 @@ void nes_a9746_device::pcb_reset()
void nes_a9746_device::update_banks(uint8_t value)
{
- uint8_t bank = BITSWAP8(value & 0x3c,7,6,0,1,2,3,4,5);
+ uint8_t bank = bitswap<8>(value & 0x3c,7,6,0,1,2,3,4,5);
switch (m_reg[0])
{
diff --git a/src/devices/bus/nes/waixing.cpp b/src/devices/bus/nes/waixing.cpp
index f4d9c338f48..7e95102c029 100644
--- a/src/devices/bus/nes/waixing.cpp
+++ b/src/devices/bus/nes/waixing.cpp
@@ -929,7 +929,7 @@ READ8_MEMBER(nes_waixing_sh2_device::chr_r)
void nes_waixing_sec_device::prg_cb(int start, int bank)
{
if (m_reg)
- bank = BITSWAP8(bank & 0x1f,7,6,5,2,1,3,4,0);
+ bank = bitswap<8>(bank & 0x1f,7,6,5,2,1,3,4,0);
prg8_x(start, bank);
}
@@ -937,7 +937,7 @@ void nes_waixing_sec_device::prg_cb(int start, int bank)
void nes_waixing_sec_device::chr_cb(int start, int bank, int source)
{
if (m_reg)
- bank = BITSWAP8(bank, 5,4,2,6,7,3,1,0);
+ bank = bitswap<8>(bank, 5,4,2,6,7,3,1,0);
chr1_x(start, bank, source);
}
diff --git a/src/devices/bus/nubus/nubus_spec8.cpp b/src/devices/bus/nubus/nubus_spec8.cpp
index a8289667de6..1cc905670a6 100644
--- a/src/devices/bus/nubus/nubus_spec8.cpp
+++ b/src/devices/bus/nubus/nubus_spec8.cpp
@@ -257,7 +257,7 @@ WRITE32_MEMBER( nubus_spec8s3_device::spec8s3_w )
if (m_count == 3)
{
- int actual_color = BITSWAP8(m_clutoffs, 0, 1, 2, 3, 4, 5, 6, 7);
+ int actual_color = bitswap<8>(m_clutoffs, 0, 1, 2, 3, 4, 5, 6, 7);
// printf("RAMDAC: color %d = %02x %02x %02x (PC=%x)\n", actual_color, m_colors[0], m_colors[1], m_colors[2], space.device().safe_pc() );
m_palette[actual_color] = rgb_t(m_colors[0], m_colors[1], m_colors[2]);
diff --git a/src/devices/bus/nubus/pds30_procolor816.cpp b/src/devices/bus/nubus/pds30_procolor816.cpp
index 366eb8eb1b3..869e91986c0 100644
--- a/src/devices/bus/nubus/pds30_procolor816.cpp
+++ b/src/devices/bus/nubus/pds30_procolor816.cpp
@@ -272,7 +272,7 @@ WRITE32_MEMBER( nubus_procolor816_device::procolor816_w )
if (mem_mask == 0x00ff0000)
{
// printf("%08x to DAC control (PC=%x)\n", data, space.device().safe_pc());
- m_clutoffs = BITSWAP8((data>>16)&0xff, 0, 1, 2, 3, 4, 5, 6, 7);
+ m_clutoffs = bitswap<8>((data>>16)&0xff, 0, 1, 2, 3, 4, 5, 6, 7);
}
else if (mem_mask == 0x000000ff)
{
diff --git a/src/devices/bus/s100/wunderbus.cpp b/src/devices/bus/s100/wunderbus.cpp
index e0eec1b3b4f..1bd7df7cb2a 100644
--- a/src/devices/bus/s100/wunderbus.cpp
+++ b/src/devices/bus/s100/wunderbus.cpp
@@ -345,7 +345,7 @@ uint8_t s100_wunderbus_device::s100_sinp_r(address_space &space, offs_t offset)
*/
- data = BITSWAP8(m_10a->read(),0,1,2,3,4,5,6,7) & 0xfc;
+ data = bitswap<8>(m_10a->read(),0,1,2,3,4,5,6,7) & 0xfc;
break;
case 2: // R.T. Clock IN/RESET CLK. Int.
diff --git a/src/devices/bus/saturn/sat_slot.cpp b/src/devices/bus/saturn/sat_slot.cpp
index 13f69c8ba92..defdd4d025b 100644
--- a/src/devices/bus/saturn/sat_slot.cpp
+++ b/src/devices/bus/saturn/sat_slot.cpp
@@ -156,7 +156,7 @@ image_init_result sat_cart_slot_device::call_load()
// fix endianness....
for (int i = 0; i < len/4; i ++)
- ROM[i] = BITSWAP32(ROM[i],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24);
+ ROM[i] = bitswap<32>(ROM[i],7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24);
// {
// uint8_t tempa = ROM[i+0];
// uint8_t tempb = ROM[i+1];
diff --git a/src/devices/bus/sega8/rom.cpp b/src/devices/bus/sega8/rom.cpp
index 9006cc1f013..e3fa290489c 100644
--- a/src/devices/bus/sega8/rom.cpp
+++ b/src/devices/bus/sega8/rom.cpp
@@ -871,7 +871,7 @@ READ8_MEMBER(sega8_janggun_device::read_cart)
if (m_rom_bank_base[bank] < 0x80)
return m_rom[(m_rom_bank_base[bank] & 0x3f) * 0x2000 + (offset & 0x1fff)];
else
- return BITSWAP8(m_rom[(m_rom_bank_base[bank] & 0x3f) * 0x2000 + (offset & 0x1fff)], 0, 1, 2, 3, 4, 5, 6, 7);
+ return bitswap<8>(m_rom[(m_rom_bank_base[bank] & 0x3f) * 0x2000 + (offset & 0x1fff)], 0, 1, 2, 3, 4, 5, 6, 7);
}
diff --git a/src/devices/bus/snes/rom.cpp b/src/devices/bus/snes/rom.cpp
index 628ab1a212d..bae27f21fad 100644
--- a/src/devices/bus/snes/rom.cpp
+++ b/src/devices/bus/snes/rom.cpp
@@ -291,7 +291,7 @@ WRITE8_MEMBER( sns_rom_obc1_device::chip_write )
// Address range for read/write depends on the game (check snes.xml)
READ8_MEMBER( sns_rom_pokemon_device::chip_read )
{
- return BITSWAP8(m_latch,0,6,7,1,2,3,4,5);
+ return bitswap<8>(m_latch,0,6,7,1,2,3,4,5);
}
WRITE8_MEMBER( sns_rom_pokemon_device::chip_write )
@@ -488,7 +488,7 @@ WRITE8_MEMBER( sns_rom_20col_device::chip_write )
READ8_MEMBER( sns_rom_banana_device::chip_read )
{
- return BITSWAP8(m_latch[0xf],0,6,7,1,2,3,4,5);
+ return bitswap<8>(m_latch[0xf],0,6,7,1,2,3,4,5);
}
WRITE8_MEMBER( sns_rom_banana_device::chip_write )
@@ -499,7 +499,7 @@ WRITE8_MEMBER( sns_rom_banana_device::chip_write )
READ8_MEMBER( sns_rom_bugs_device::chip_read )
{
- return BITSWAP8(m_latch[offset & 0xff],0,6,7,1,2,3,4,5);
+ return bitswap<8>(m_latch[offset & 0xff],0,6,7,1,2,3,4,5);
}
WRITE8_MEMBER( sns_rom_bugs_device::chip_write )
diff --git a/src/devices/bus/snes_ctrl/pachinko.cpp b/src/devices/bus/snes_ctrl/pachinko.cpp
index 44d81066d83..010385e6459 100644
--- a/src/devices/bus/snes_ctrl/pachinko.cpp
+++ b/src/devices/bus/snes_ctrl/pachinko.cpp
@@ -83,7 +83,7 @@ void snes_pachinko_device::device_reset()
void snes_pachinko_device::port_poll()
{
- uint8_t dial = BITSWAP8(m_dial->read() ^ 0xff,7,6,5,4,3,2,1,0);
+ uint8_t dial = bitswap<8>(m_dial->read() ^ 0xff,7,6,5,4,3,2,1,0);
m_latch = m_button->read() | (dial << 25) | 0xee7000; // add ID
}
diff --git a/src/devices/bus/ss50/interface.cpp b/src/devices/bus/ss50/interface.cpp
index e5f2620b0a8..3d51f76ba53 100644
--- a/src/devices/bus/ss50/interface.cpp
+++ b/src/devices/bus/ss50/interface.cpp
@@ -79,7 +79,7 @@
#include "emu.h"
#include "bus/ss50/interface.h"
-//#include "bus/ss50/mpc.h"
+#include "bus/ss50/mpc.h"
//#include "bus/ss50/mpl.h"
//#include "bus/ss50/mpr.h"
#include "bus/ss50/mps.h"
@@ -214,7 +214,7 @@ ss50_card_interface::ss50_card_interface(const machine_config &mconfig, device_t
}
SLOT_INTERFACE_START(ss50_default_2rs_devices)
- //SLOT_INTERFACE("mpc", SS50_MPC)
+ SLOT_INTERFACE("mpc", SS50_MPC)
//SLOT_INTERFACE("mpl", SS50_MPL)
//SLOT_INTERFACE("mpn", SS50_MPN)
SLOT_INTERFACE("mps", SS50_MPS)
diff --git a/src/devices/bus/ss50/mpc.cpp b/src/devices/bus/ss50/mpc.cpp
new file mode 100644
index 00000000000..8a1ac577a5e
--- /dev/null
+++ b/src/devices/bus/ss50/mpc.cpp
@@ -0,0 +1,194 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+/**********************************************************************
+
+ SWTPC MP-C Serial Control Interface
+
+**********************************************************************/
+
+#include "emu.h"
+#include "bus/ss50/mpc.h"
+#include "bus/ss50/interface.h"
+
+#include "bus/rs232/rs232.h"
+#include "machine/6821pia.h"
+#include "machine/input_merger.h"
+#include "machine/ripple_counter.h"
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> ss50_mpc_device
+
+class ss50_mpc_device : public device_t, public ss50_card_interface
+{
+public:
+ // construction/destruction
+ ss50_mpc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : device_t(mconfig, SS50_MPC, tag, owner, clock),
+ ss50_card_interface(mconfig, *this),
+ m_pia(*this, "pia"),
+ m_loopback(*this, "loopback"),
+ m_counter(*this, "counter"),
+ m_baud_jumper(*this, "BAUD"),
+ m_count_select(false)
+ {
+ }
+
+protected:
+ // device-specific overrides
+ virtual ioport_constructor device_input_ports() const override;
+ virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_start() override;
+
+ // interface-specific overrides
+ virtual DECLARE_READ8_MEMBER(register_read) override;
+ virtual DECLARE_WRITE8_MEMBER(register_write) override;
+ virtual DECLARE_WRITE_LINE_MEMBER(f110_w) override;
+ virtual DECLARE_WRITE_LINE_MEMBER(f300_w) override;
+
+private:
+ DECLARE_WRITE_LINE_MEMBER(serial_input_w);
+ DECLARE_WRITE_LINE_MEMBER(reader_control_w);
+ DECLARE_READ_LINE_MEMBER(count_r);
+ DECLARE_WRITE_LINE_MEMBER(count_select_w);
+
+ required_device<pia6821_device> m_pia;
+ required_device<input_merger_device> m_loopback;
+ required_device<ripple_counter_device> m_counter;
+ required_ioport m_baud_jumper;
+
+ bool m_count_select;
+};
+
+
+static INPUT_PORTS_START( mpc )
+ PORT_START("BAUD")
+ PORT_DIPNAME(1, 0, "Baud Rate")
+ PORT_DIPSETTING(1, "110")
+ PORT_DIPSETTING(0, "300")
+
+ PORT_START("STOP")
+ PORT_DIPNAME(1, 0, "Stop Bits")
+ PORT_DIPSETTING(0, "1")
+ PORT_DIPSETTING(1, "2")
+INPUT_PORTS_END
+
+
+//-------------------------------------------------
+// input_ports - device-specific input ports
+//-------------------------------------------------
+
+ioport_constructor ss50_mpc_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME(mpc);
+}
+
+
+static DEVICE_INPUT_DEFAULTS_START( terminal )
+ DEVICE_INPUT_DEFAULTS("RS232_RXBAUD", 0xff, RS232_BAUD_300)
+ DEVICE_INPUT_DEFAULTS("RS232_TXBAUD", 0xff, RS232_BAUD_300)
+ DEVICE_INPUT_DEFAULTS("RS232_STARTBITS", 0xff, RS232_STARTBITS_1)
+ DEVICE_INPUT_DEFAULTS("RS232_DATABITS", 0xff, RS232_DATABITS_8)
+ DEVICE_INPUT_DEFAULTS("RS232_PARITY", 0xff, RS232_PARITY_NONE)
+ DEVICE_INPUT_DEFAULTS("RS232_STOPBITS", 0xff, RS232_STOPBITS_1)
+DEVICE_INPUT_DEFAULTS_END
+
+
+//-------------------------------------------------
+// device_add_mconfig - add device-specific
+// machine configuration
+//-------------------------------------------------
+
+MACHINE_CONFIG_MEMBER(ss50_mpc_device::device_add_mconfig)
+ MCFG_DEVICE_ADD("pia", PIA6821, 0) // actually MC6820
+ MCFG_PIA_WRITEPA_HANDLER(DEVWRITELINE("outgate", input_merger_device, in_w<0>)) MCFG_DEVCB_BIT(0)
+ MCFG_PIA_CB2_HANDLER(WRITELINE(ss50_mpc_device, reader_control_w))
+ MCFG_PIA_READPB_HANDLER(IOPORT("STOP")) MCFG_DEVCB_BIT(6)
+ MCFG_DEVCB_CHAIN_INPUT(READLINE(ss50_mpc_device, count_r)) MCFG_DEVCB_BIT(7)
+ MCFG_PIA_WRITEPB_HANDLER(WRITELINE(ss50_mpc_device, count_select_w)) MCFG_DEVCB_BIT(2)
+ MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("counter", ripple_counter_device, reset_w)) MCFG_DEVCB_BIT(0)
+ //MCFG_PIA_IRQA_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w))
+ //MCFG_PIA_IRQB_HANDLER(WRITELINE(ss50_mpc_device, pia_irq_w))
+
+ MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
+ MCFG_RS232_RXD_HANDLER(WRITELINE(ss50_mpc_device, serial_input_w))
+ MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", terminal)
+
+ MCFG_INPUT_MERGER_ALL_HIGH("outgate")
+ MCFG_INPUT_MERGER_OUTPUT_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd))
+
+ MCFG_INPUT_MERGER_ANY_HIGH("loopback")
+ MCFG_INPUT_MERGER_OUTPUT_HANDLER(DEVWRITELINE("outgate", input_merger_device, in_w<1>))
+
+ MCFG_DEVICE_ADD("counter", RIPPLE_COUNTER, 0) // CD4024AE (IC3)
+ MCFG_RIPPLE_COUNTER_STAGES(7) // only Q5 (÷32) and Q4 (÷16) are actually used
+MACHINE_CONFIG_END
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void ss50_mpc_device::device_start()
+{
+ save_item(NAME(m_count_select));
+}
+
+WRITE_LINE_MEMBER(ss50_mpc_device::serial_input_w)
+{
+ m_pia->set_a_input(state << 7, 0x7f);
+ m_loopback->in_w<0>(state);
+}
+
+
+WRITE_LINE_MEMBER(ss50_mpc_device::reader_control_w)
+{
+ m_loopback->in_w<1>(state);
+}
+
+READ_LINE_MEMBER(ss50_mpc_device::count_r)
+{
+ return BIT(m_counter->count(), m_count_select ? 4 : 3);
+}
+
+WRITE_LINE_MEMBER(ss50_mpc_device::count_select_w)
+{
+ m_count_select = bool(state);
+}
+
+
+//-------------------------------------------------
+// register_read - read from a port register
+//-------------------------------------------------
+
+READ8_MEMBER(ss50_mpc_device::register_read)
+{
+ return m_pia->read(space, offset & 3, 0);
+}
+
+//-------------------------------------------------
+// register_write - write to a port register
+//-------------------------------------------------
+
+WRITE8_MEMBER(ss50_mpc_device::register_write)
+{
+ m_pia->write(space, offset & 3, data);
+}
+
+WRITE_LINE_MEMBER(ss50_mpc_device::f110_w)
+{
+ if (m_baud_jumper->read())
+ m_counter->clock_w(state);
+}
+
+WRITE_LINE_MEMBER(ss50_mpc_device::f300_w)
+{
+ if (!m_baud_jumper->read())
+ m_counter->clock_w(state);
+}
+
+
+// device type definition
+DEFINE_DEVICE_TYPE(SS50_MPC, ss50_mpc_device, "ss50_mpc", "MP-C Serial Control Interface")
diff --git a/src/devices/bus/ss50/mpc.h b/src/devices/bus/ss50/mpc.h
new file mode 100644
index 00000000000..2e769932b0c
--- /dev/null
+++ b/src/devices/bus/ss50/mpc.h
@@ -0,0 +1,14 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+/**********************************************************************
+
+ SWTPC MP-C Serial Control Interface
+
+**********************************************************************/
+
+#ifndef MAME_DEVICE_BUS_SS50_MPC_H
+#define MAME_DEVICE_BUS_SS50_MPC_H
+
+extern const device_type SS50_MPC;
+
+#endif // MAME_DEVICE_BUS_SS50_MPC_H
diff --git a/src/devices/bus/ti99x/990_hd.cpp b/src/devices/bus/ti99x/990_hd.cpp
index 0bb3b475086..9c2ce32ae51 100644
--- a/src/devices/bus/ti99x/990_hd.cpp
+++ b/src/devices/bus/ti99x/990_hd.cpp
@@ -241,7 +241,7 @@ DEVICE_IMAGE_LOAD_MEMBER( ti990_hdc_device, ti990_hd )
*/
DEVICE_IMAGE_UNLOAD_MEMBER( ti990_hdc_device, ti990_hd )
{
- int id = get_id_from_device( image );
+ int id = get_id_from_device(&image.device());
hd_unit_t *d;
d = &m_d[id];
diff --git a/src/devices/bus/vcs/dpc.cpp b/src/devices/bus/vcs/dpc.cpp
index f15e426fec7..bcddc3e96ae 100644
--- a/src/devices/bus/vcs/dpc.cpp
+++ b/src/devices/bus/vcs/dpc.cpp
@@ -160,10 +160,10 @@ READ8_MEMBER(dpc_device::read)
data = m_df[data_fetcher].flag ? display_data : 0x00;
break;
case 0x18: // display data AND'd w/flag, nibbles swapped
- data = m_df[data_fetcher].flag ? BITSWAP8(display_data,3,2,1,0,7,6,5,4) : 0x00;
+ data = m_df[data_fetcher].flag ? bitswap<8>(display_data,3,2,1,0,7,6,5,4) : 0x00;
break;
case 0x20: // display data AND'd w/flag, byte reversed
- data = m_df[data_fetcher].flag ? BITSWAP8(display_data,0,1,2,3,4,5,6,7) : 0x00;
+ data = m_df[data_fetcher].flag ? bitswap<8>(display_data,0,1,2,3,4,5,6,7) : 0x00;
break;
case 0x28: // display data AND'd w/flag, rotated right
data = m_df[data_fetcher].flag ? (display_data >> 1) : 0x00;
diff --git a/src/devices/bus/vic20/exp.cpp b/src/devices/bus/vic20/exp.cpp
index 535375536be..e70bda544bc 100644
--- a/src/devices/bus/vic20/exp.cpp
+++ b/src/devices/bus/vic20/exp.cpp
@@ -219,5 +219,6 @@ SLOT_INTERFACE_START( vic20_expansion_cards )
// the following need ROMs from the software list
SLOT_INTERFACE_INTERNAL("standard", VIC20_STD)
SLOT_INTERFACE_INTERNAL("ieee488", VIC1112)
+ MCFG_SLOT_OPTION_CLOCK("ieee488", DERIVED_CLOCK(1, 1))
SLOT_INTERFACE_INTERNAL("megacart", VIC20_MEGACART)
SLOT_INTERFACE_END
diff --git a/src/devices/bus/vic20/vic1112.cpp b/src/devices/bus/vic20/vic1112.cpp
index a38bf02eb7f..25e6b6d6804 100644
--- a/src/devices/bus/vic20/vic1112.cpp
+++ b/src/devices/bus/vic20/vic1112.cpp
@@ -98,12 +98,12 @@ WRITE_LINE_MEMBER( vic1112_device::via1_irq_w )
//-------------------------------------------------
MACHINE_CONFIG_MEMBER( vic1112_device::device_add_mconfig )
- MCFG_DEVICE_ADD(M6522_0_TAG, VIA6522, 0)
+ MCFG_DEVICE_ADD(M6522_0_TAG, VIA6522, DERIVED_CLOCK(1, 1))
MCFG_VIA6522_READPB_HANDLER(READ8(vic1112_device, via0_pb_r))
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(vic1112_device, via0_pb_w))
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(vic1112_device, via0_irq_w))
- MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, 0)
+ MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, DERIVED_CLOCK(1, 1))
MCFG_VIA6522_READPB_HANDLER(DEVREAD8(IEEE488_TAG, ieee488_device, dio_r))
MCFG_VIA6522_WRITEPA_HANDLER(DEVWRITE8(IEEE488_TAG, ieee488_device, dio_w))
MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(IEEE488_TAG, ieee488_device, atn_w))
diff --git a/src/devices/cpu/arm7/arm7.cpp b/src/devices/cpu/arm7/arm7.cpp
index 7a3a7ba30db..19530ed9e66 100644
--- a/src/devices/cpu/arm7/arm7.cpp
+++ b/src/devices/cpu/arm7/arm7.cpp
@@ -148,14 +148,16 @@ arm920t_cpu_device::arm920t_cpu_device(const machine_config &mconfig, const char
}
-arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : arm9_cpu_device(mconfig, ARM946ES, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE),
+
+
+arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+ : arm9_cpu_device(mconfig, type, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE),
cp15_control(0x78)
{
m_copro_id = ARM9_COPRO_ID_MFR_ARM
- | ARM9_COPRO_ID_ARCH_V5TE
- | ARM9_COPRO_ID_PART_ARM946
- | ARM9_COPRO_ID_STEP_ARM946_A0;
+ | ARM9_COPRO_ID_ARCH_V5TE
+ | ARM9_COPRO_ID_PART_ARM946
+ | ARM9_COPRO_ID_STEP_ARM946_A0;
memset(ITCM, 0, 0x8000);
memset(DTCM, 0, 0x4000);
@@ -169,6 +171,17 @@ arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const ch
cp15_itcm_reg = cp15_dtcm_reg = 0;
}
+arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : arm946es_cpu_device(mconfig, ARM946ES, tag, owner, clock)
+{
+}
+
+// unknown configuration, but uses MPU not MMU, so closer to ARM946ES
+igs036_cpu_device::igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : arm946es_cpu_device(mconfig, IGS036, tag, owner, clock)
+{
+}
+
pxa255_cpu_device::pxa255_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, PXA255, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E | ARCHFLAG_XSCALE, ENDIANNESS_LITTLE)
{
@@ -189,13 +202,6 @@ sa1110_cpu_device::sa1110_cpu_device(const machine_config &mconfig, const char *
| ARM9_COPRO_ID_STEP_SA1110_A0;
}
-// unknown configuration
-igs036_cpu_device::igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : arm9_cpu_device(mconfig, IGS036, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE)
-{
-}
-
-
device_memory_interface::space_config_vector arm7_cpu_device::memory_space_config() const
{
return space_config_vector {
@@ -1459,14 +1465,6 @@ uint8_t arm946es_cpu_device::arm7_cpu_read8(uint32_t addr)
return m_program->read_byte(addr);
}
-WRITE32_MEMBER(igs036_cpu_device::arm7_rt_w_callback)
-{
- arm7_cpu_device::arm7_rt_w_callback(space, offset, data, mem_mask);
- /* disable the MMU for now, it doesn't seem to set up valid mappings
- so could be entirely different here */
- COPRO_CTRL &= ~COPRO_CTRL_MMU_EN;
-}
-
void arm7_cpu_device::arm7_dt_r_callback(uint32_t insn, uint32_t *prn)
{
uint8_t cpn = (insn >> 8) & 0xF;
diff --git a/src/devices/cpu/arm7/arm7.h b/src/devices/cpu/arm7/arm7.h
index f6eecc4e4e1..23df9469073 100644
--- a/src/devices/cpu/arm7/arm7.h
+++ b/src/devices/cpu/arm7/arm7.h
@@ -626,6 +626,9 @@ public:
virtual uint32_t arm7_cpu_read16(uint32_t addr) override;
virtual uint8_t arm7_cpu_read8(uint32_t addr) override;
+protected:
+ arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
private:
uint32_t cp15_control, cp15_itcm_base, cp15_dtcm_base, cp15_itcm_size, cp15_dtcm_size;
uint32_t cp15_itcm_end, cp15_dtcm_end, cp15_itcm_reg, cp15_dtcm_reg;
@@ -635,6 +638,12 @@ private:
void RefreshDTCM();
};
+class igs036_cpu_device : public arm946es_cpu_device
+{
+public:
+ // construction/destruction
+ igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
class pxa255_cpu_device : public arm7_cpu_device
{
@@ -651,15 +660,6 @@ public:
sa1110_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
-class igs036_cpu_device : public arm9_cpu_device
-{
-public:
- // construction/destruction
- igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual DECLARE_WRITE32_MEMBER( arm7_rt_w_callback ) override;
-};
-
-
DECLARE_DEVICE_TYPE(ARM7, arm7_cpu_device)
DECLARE_DEVICE_TYPE(ARM7_BE, arm7_be_cpu_device)
DECLARE_DEVICE_TYPE(ARM7500, arm7500_cpu_device)
diff --git a/src/devices/cpu/arm7/arm7core.h b/src/devices/cpu/arm7/arm7core.h
index 9ae499ae109..c33bdee9dd2 100644
--- a/src/devices/cpu/arm7/arm7core.h
+++ b/src/devices/cpu/arm7/arm7core.h
@@ -470,11 +470,6 @@ enum
COND_NV /* 0 never */
};
-#define LSL(v, s) ((v) << (s))
-#define LSR(v, s) ((v) >> (s))
-#define ROL(v, s) (LSL((v), (s)) | (LSR((v), 32u - (s))))
-#define ROR(v, s) (LSR((v), (s)) | (LSL((v), 32u - (s))))
-
/* Convenience Macros */
#define R15 m_r[eR15]
#define SPSR 17 // SPSR is always the 18th register in our 0 based array sRegisterTable[][18]
diff --git a/src/devices/cpu/arm7/arm7help.h b/src/devices/cpu/arm7/arm7help.h
index 4b0b4f21c8a..c006bfbf1af 100644
--- a/src/devices/cpu/arm7/arm7help.h
+++ b/src/devices/cpu/arm7/arm7help.h
@@ -166,3 +166,8 @@
#define WRITE32(addr,data) arm7_cpu_write32(addr,data)
#define PTR_READ32 &arm7_cpu_read32
#define PTR_WRITE32 &arm7_cpu_write32
+
+#define LSL(v, s) ((v) << (s))
+#define LSR(v, s) ((v) >> (s))
+#define ROL(v, s) (LSL((v), (s)) | (LSR((v), 32u - (s))))
+#define ROR(v, s) (LSR((v), (s)) | (LSL((v), 32u - (s))))
diff --git a/src/devices/cpu/arm7/arm7thmb.cpp b/src/devices/cpu/arm7/arm7thmb.cpp
index 0d25d62fcf3..a6fe0400721 100644
--- a/src/devices/cpu/arm7/arm7thmb.cpp
+++ b/src/devices/cpu/arm7/arm7thmb.cpp
@@ -1307,8 +1307,7 @@ void arm7_cpu_device::tg0b_f(uint32_t pc, uint32_t op)
// "The address should normally be a word aligned quantity and non-word aligned addresses do not affect the instruction."
// "However, the bottom 2 bits of the address will appear on A[1:0] and might be interpreted by the memory system."
-// GBA "BB Ball" performs an unaligned read with A[1:0] = 2 and expects A[1] not to be ignored [BP 800B90A,(R4&3)!=0]
-// GBA "Gadget Racers" performs an unaligned read with A[1:0] = 1 and expects A[0] to be ignored [BP B72,(R0&3)!=0]
+// Endrift says LDMIA/STMIA ignore the low 2 bits and GBA Test Suite assumes it.
void arm7_cpu_device::tg0c_0(uint32_t pc, uint32_t op) /* Store */
{
@@ -1335,7 +1334,7 @@ void arm7_cpu_device::tg0c_1(uint32_t pc, uint32_t op) /* Load */
{
if (op & (1 << offs))
{
- SetRegister(offs, READ32(ld_st_address & ~1));
+ SetRegister(offs, READ32(ld_st_address & ~3));
ld_st_address += 4;
}
}
diff --git a/src/devices/cpu/e132xs/32xsdasm.cpp b/src/devices/cpu/e132xs/32xsdasm.cpp
index 2060350c5b8..339c7b9c0b0 100644
--- a/src/devices/cpu/e132xs/32xsdasm.cpp
+++ b/src/devices/cpu/e132xs/32xsdasm.cpp
@@ -391,32 +391,31 @@ u32 hyperstone_disassembler::opcode_alignment() const
return 2;
}
+hyperstone_disassembler::hyperstone_disassembler(config *conf) : m_config(conf)
+{
+}
+
/*****************************/
/* Main disassembly function */
/*****************************/
offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
- uint16_t op;
- uint8_t op_num;
-
- uint8_t source_code, dest_code, source_bit, dest_bit;
-
char source[5] = "\0", dest[5] = "\0";
uint32_t flags = 0;
- op = opcodes.r16(pc);
+ uint16_t op = opcodes.r16(pc);
size = 2;
- source_code = SOURCECODE(op);
- dest_code = DESTCODE(op);
- source_bit = SOURCEBIT(op);
- dest_bit = DESTBIT(op);
+ uint8_t source_code = SOURCECODE(op);
+ uint8_t dest_code = DESTCODE(op);
+ uint8_t source_bit = SOURCEBIT(op);
+ uint8_t dest_bit = DESTBIT(op);
- global_fp = 0;
- int h_flag = 0;
+ global_fp = m_config->get_fp();
+ int h_flag = m_config->get_h();
- op_num = (op & 0xff00) >> 8;
+ uint8_t op_num = (op & 0xff00) >> 8;
switch( op_num )
{
diff --git a/src/devices/cpu/e132xs/32xsdasm.h b/src/devices/cpu/e132xs/32xsdasm.h
index 6c5b0fa4482..0ee99457c55 100644
--- a/src/devices/cpu/e132xs/32xsdasm.h
+++ b/src/devices/cpu/e132xs/32xsdasm.h
@@ -15,7 +15,14 @@
class hyperstone_disassembler : public util::disasm_interface
{
public:
- hyperstone_disassembler() = default;
+ struct config {
+ virtual ~config() = default;
+
+ virtual u8 get_fp() const = 0;
+ virtual bool get_h() const = 0;
+ };
+
+ hyperstone_disassembler(config *conf);
virtual ~hyperstone_disassembler() = default;
virtual u32 opcode_alignment() const override;
@@ -26,8 +33,11 @@ private:
static const char *const G_REG[];
static const char *const SETxx[];
- int size, global_fp;
+ config *m_config;
+ int size;
+ u8 global_fp;
+
void LL_format(char *source, char *dest, uint16_t op);
void LR_format(char *source, char *dest, uint16_t op);
void RR_format(char *source, char *dest, uint16_t op, unsigned h_flag);
diff --git a/src/devices/cpu/e132xs/32xsdefs.h b/src/devices/cpu/e132xs/32xsdefs.h
index a4a5ff876df..b49aba069a4 100644
--- a/src/devices/cpu/e132xs/32xsdefs.h
+++ b/src/devices/cpu/e132xs/32xsdefs.h
@@ -54,15 +54,15 @@
/* Trap numbers */
#define TRAPNO_IO2 48
#define TRAPNO_IO1 49
-#define TRAPNO_INT4 50
-#define TRAPNO_INT3 51
-#define TRAPNO_INT2 52
-#define TRAPNO_INT1 53
+#define TRAPNO_INT4 50
+#define TRAPNO_INT3 51
+#define TRAPNO_INT2 52
+#define TRAPNO_INT1 53
#define TRAPNO_IO3 54
#define TRAPNO_TIMER 55
#define TRAPNO_RESERVED1 56
#define TRAPNO_TRACE_EXCEPTION 57
-#define TRAPNO_PARITY_ERROR 58
+#define TRAPNO_PARITY_ERROR 58
#define TRAPNO_EXTENDED_OVERFLOW 59
#define TRAPNO_RANGE_ERROR 60
#define TRAPNO_PRIVILEGE_ERROR TRAPNO_RANGE_ERROR
@@ -125,27 +125,6 @@
/* Internal registers */
-#define SREG decode.src_value
-#define SREGF decode.next_src_value
-#define DREG decode.dst_value
-#define DREGF decode.next_dst_value
-#define EXTRA_U decode.extra.u
-#define EXTRA_S decode.extra.s
-
-#define SET_SREG( _data_ ) (decode.src_is_local ? set_local_register(decode.src, (uint32_t)_data_) : set_global_register(decode.src, (uint32_t)_data_))
-#define SET_SREGF( _data_ ) (decode.src_is_local ? set_local_register(decode.src + 1, (uint32_t)_data_) : set_global_register(decode.src + 1, (uint32_t)_data_))
-#define SET_DREG( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst, (uint32_t)_data_) : set_global_register(decode.dst, (uint32_t)_data_))
-#define SET_DREGF( _data_ ) (decode.dst_is_local ? set_local_register(decode.dst + 1, (uint32_t)_data_) : set_global_register(decode.dst + 1, (uint32_t)_data_))
-
-#define SRC_IS_PC (!decode.src_is_local && decode.src == PC_REGISTER)
-#define DST_IS_PC (!decode.dst_is_local && decode.dst == PC_REGISTER)
-#define SRC_IS_SR (!decode.src_is_local && decode.src == SR_REGISTER)
-#define DST_IS_SR (!decode.dst_is_local && decode.dst == SR_REGISTER)
-#define SAME_SRC_DST decode.same_src_dst
-#define SAME_SRC_DSTF decode.same_src_dstf
-#define SAME_SRCF_DST decode.same_srcf_dst
-
-
#define OP m_op
#define PC m_global_regs[0] //Program Counter
#define SR m_global_regs[1] //Status Register
@@ -175,6 +154,13 @@
#define T_MASK 0x00010000
#define P_MASK 0x00020000
#define S_MASK 0x00040000
+#define ILC_MASK 0x00180000
+
+#define C_SHIFT 0
+#define Z_SHIFT 1
+#define N_SHIFT 2
+#define V_SHIFT 3
+#define S_SHIFT 18
/* SR flags */
#define GET_C ( SR & C_MASK) // bit 0 //CARRY
@@ -220,17 +206,11 @@
#define SET_LOW_SR(val) (SR = (SR & 0xffff0000) | ((val) & 0x0000ffff)) // when SR is addressed, only low 16 bits can be changed
-#define CHECK_C(x) (SR = (SR & ~0x00000001) | (uint32_t)((x & 0x100000000L) >> 32))
-#define CHECK_VADD(x,y,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) >> 29))
-#define CHECK_VADD3(x,y,w,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & ((w) ^ (z)) & 0x80000000) >> 29))
-#define CHECK_VSUB(x,y,z) (SR = (SR & ~0x00000008) | (((z ^ y) & (y ^ x) & 0x80000000) >> 29))
-
-
/* FER flags */
#define GET_ACCRUED (FER & 0x0000001f) //bits 4 - 0 //Floating-Point Accrued Exceptions
#define GET_ACTUAL (FER & 0x00001f00) //bits 12 - 8 //Floating-Point Actual Exceptions
//other bits are reversed, in particular 7 - 5 for the operating system.
-//the user program can only changes the above 2 flags
+//the user program can only change the above 2 flags
#endif // MAME_CPU_E132XS_XS32DEFS_H
diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp
index 73725ec8a25..3793e351b73 100644
--- a/src/devices/cpu/e132xs/e132xs.cpp
+++ b/src/devices/cpu/e132xs/e132xs.cpp
@@ -33,6 +33,7 @@
TODO:
- some wrong cycle counts
- verify register wrapping with sregf/dregf on hardware
+
CHANGELOG:
Pierpaolo Prazzoli
@@ -147,7 +148,6 @@
#include "debugger.h"
#include "32xsdefs.h"
-#include "32xsdasm.h"
//#define VERBOSE 1
#include "logmacro.h"
@@ -195,10 +195,10 @@ ADDRESS_MAP_END
hyperstone_device::hyperstone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map)
- : cpu_device(mconfig, type, tag, owner, clock),
- m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map),
- m_io_config("io", ENDIANNESS_BIG, io_data_width, 15),
- m_icount(0)
+ : cpu_device(mconfig, type, tag, owner, clock)
+ , m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map)
+ , m_io_config("io", ENDIANNESS_BIG, io_data_width, 15)
+ , m_icount(0)
{
}
@@ -374,46 +374,26 @@ uint32_t hyperstone_device::get_emu_code_addr(uint8_t num) /* num is OP */
return addr;
}
-void hyperstone_device::hyperstone_set_trap_entry(int which)
-{
- switch( which )
- {
- case E132XS_ENTRY_MEM0:
- m_trap_entry = 0x00000000;
- break;
-
- case E132XS_ENTRY_MEM1:
- m_trap_entry = 0x40000000;
- break;
-
- case E132XS_ENTRY_MEM2:
- m_trap_entry = 0x80000000;
- break;
-
- case E132XS_ENTRY_MEM3:
- m_trap_entry = 0xffffff00;
- break;
-
- case E132XS_ENTRY_IRAM:
- m_trap_entry = 0xc0000000;
- break;
-
- default:
- LOG("Set entry point to a reserved value: %d\n", which);
- break;
- }
-}
+/*static*/ const uint32_t hyperstone_device::s_trap_entries[8] = {
+ 0x00000000, // MEM0
+ 0x40000000, // MEM1
+ 0x80000000, // MEM2
+ 0xc0000000, // IRAM
+ 0,
+ 0,
+ 0,
+ 0xffffff00, // MEM3
+};
-uint32_t hyperstone_device::compute_tr()
+void hyperstone_device::compute_tr()
{
uint64_t cycles_since_base = total_cycles() - m_tr_base_cycles;
uint64_t clocks_since_base = cycles_since_base >> m_clck_scale;
- return m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick);
+ m_tr_result = m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick);
}
void hyperstone_device::update_timer_prescale()
{
- uint32_t prevtr = compute_tr();
TPR &= ~0x80000000;
m_clck_scale = (TPR >> 26) & m_clock_scale_mask;
m_clock_cycles_1 = 1 << m_clck_scale;
@@ -422,7 +402,7 @@ void hyperstone_device::update_timer_prescale()
m_clock_cycles_4 = 4 << m_clck_scale;
m_clock_cycles_6 = 6 << m_clck_scale;
m_tr_clocks_per_tick = ((TPR >> 16) & 0xff) + 2;
- m_tr_base_value = prevtr;
+ m_tr_base_value = m_tr_result;
m_tr_base_cycles = total_cycles();
}
@@ -472,10 +452,13 @@ TIMER_CALLBACK_MEMBER( hyperstone_device::timer_callback )
/* update the values if necessary */
if (update)
+ {
update_timer_prescale();
+ }
/* see if the timer is right for firing */
- if (!((compute_tr() - TCR) & 0x80000000))
+ compute_tr();
+ if (!((m_tr_result - TCR) & 0x80000000))
m_timer_int_pending = 1;
/* adjust ourselves for the next time */
@@ -525,7 +508,8 @@ uint32_t hyperstone_device::get_global_register(uint8_t code)
/* it is common to poll this in a loop */
if (m_icount > m_tr_clocks_per_tick / 2)
m_icount -= m_tr_clocks_per_tick / 2;
- return compute_tr();
+ compute_tr();
+ return m_tr_result;
}
return m_global_regs[code & 0x1f];
}
@@ -579,7 +563,10 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val)
case TPR_REGISTER:
m_global_regs[code] = val;
if (!(val & 0x80000000)) /* change immediately */
+ {
+ compute_tr();
update_timer_prescale();
+ }
adjust_timer_interrupt();
return;
case TCR_REGISTER:
@@ -610,10 +597,14 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val)
m_intblock = 1;
return;
case MCR_REGISTER:
+ {
// bits 14..12 EntryTableMap
- hyperstone_set_trap_entry((val & 0x7000) >> 12);
+ const int which = (val & 0x7000) >> 12;
+ assert(which < 4 || which == 7);
+ m_trap_entry = s_trap_entries[which];
m_global_regs[code] = val;
return;
+ }
case 28:
case 29:
case 30:
@@ -634,10 +625,8 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val)
#define SIGN_BIT(val) ((val & 0x80000000) >> 31)
#define SIGN_TO_N(val) ((val & 0x80000000) >> 29)
-static constexpr int32_t immediate_values[32] =
+/*static*/ const int32_t hyperstone_device::s_immediate_values[16] =
{
- 0, 1, 2, 3, 4, 5, 6, 7,
- 8, 9, 10, 11, 12, 13, 14, 15,
16, 0, 0, 0, 32, 64, 128, int32_t(0x80000000),
-8, -7, -6, -5, -4, -3, -2, -1
};
@@ -651,7 +640,7 @@ do
if (m_delay_slot) \
{ \
PC = m_delay_pc; \
- m_delay_slot = false; \
+ m_delay_slot = 0; \
} \
} while (0)
@@ -670,8 +659,7 @@ uint32_t hyperstone_device::decode_immediate_s()
switch (nybble)
{
case 0:
- default:
- return immediate_values[0x10 + nybble];
+ return 16;
case 1:
{
m_instruction_length = (3<<19);
@@ -693,6 +681,8 @@ uint32_t hyperstone_device::decode_immediate_s()
PC += 2;
return extra_u;
}
+ default:
+ return s_immediate_values[nybble];
}
}
@@ -764,7 +754,7 @@ void hyperstone_device::ignore_pcrel()
}
}
-void hyperstone_device::execute_br()
+void hyperstone_device::hyperstone_br()
{
const int32_t offset = decode_pcrel();
check_delay_PC();
@@ -777,24 +767,18 @@ void hyperstone_device::execute_br()
void hyperstone_device::execute_trap(uint32_t addr)
{
- uint8_t reg;
- uint32_t oldSR;
- reg = GET_FP + GET_FL;
-
+ const uint8_t reg = GET_FP + GET_FL;
SET_ILC(m_instruction_length);
-
- oldSR = SR;
+ const uint32_t oldSR = SR;
SET_FL(6);
SET_FP(reg);
- set_local_register(0, (PC & 0xfffffffe) | GET_S);
- set_local_register(1, oldSR);
+ m_local_regs[(0 + reg) & 0x3f] = (PC & ~1) | GET_S;
+ m_local_regs[(1 + reg) & 0x3f] = oldSR;
- SET_M(0);
- SET_T(0);
- SET_L(1);
- SET_S(1);
+ SR &= ~(M_MASK | T_MASK);
+ SR |= (L_MASK | S_MASK);
PC = addr;
@@ -829,8 +813,8 @@ void hyperstone_device::execute_exception(uint32_t addr)
SET_ILC(m_instruction_length);
const uint32_t oldSR = SR;
- SET_FP(reg);
SET_FL(2);
+ SET_FP(reg);
m_local_regs[(0 + reg) & 0x3f] = (PC & ~1) | GET_S;
m_local_regs[(1 + reg) & 0x3f] = oldSR;
@@ -1021,6 +1005,7 @@ void hyperstone_device::init(int scale_mask)
m_tr_base_cycles = 0;
m_tr_base_value = 0;
+ m_tr_result = 0;
m_tr_clocks_per_tick = 0;
m_timer_int_pending = 0;
@@ -1274,7 +1259,7 @@ void hyperstone_device::device_reset()
m_tr_clocks_per_tick = 2;
- hyperstone_set_trap_entry(E132XS_ENTRY_MEM3); /* default entry point @ MEM3 */
+ m_trap_entry = s_trap_entries[E132XS_ENTRY_MEM3]; // default entry point @ MEM3
set_global_register(BCR_REGISTER, ~0);
set_global_register(MCR_REGISTER, ~0);
@@ -1356,79 +1341,45 @@ void hyperstone_device::state_string_export(const device_state_entry &entry, std
util::disasm_interface *hyperstone_device::create_disassembler()
{
- return new hyperstone_disassembler;
+ return new hyperstone_disassembler(this);
+}
+
+u8 hyperstone_device::get_fp() const
+{
+ return GET_FP;
+}
+
+bool hyperstone_device::get_h() const
+{
+ return GET_H;
}
/* Opcodes */
void hyperstone_device::hyperstone_trap()
{
+ static const uint32_t conditions[16] = {
+ 0, 0, 0, 0, N_MASK | Z_MASK, N_MASK | Z_MASK, N_MASK, N_MASK, C_MASK | Z_MASK, C_MASK | Z_MASK, C_MASK, C_MASK, Z_MASK, Z_MASK, V_MASK, 0
+ };
+ static const bool trap_if_set[16] = {
+ false, false, false, false, true, false, true, false, true, false, true, false, true, false, true, false
+ };
+
check_delay_PC();
const uint8_t trapno = (m_op & 0xfc) >> 2;
const uint32_t addr = get_trap_addr(trapno);
const uint8_t code = ((m_op & 0x300) >> 6) | (m_op & 0x03);
- switch (code)
+ if (trap_if_set[code])
{
- case TRAPLE:
- if (SR & (N_MASK | Z_MASK))
- execute_trap(addr);
- break;
-
- case TRAPGT:
- if(!(SR & (N_MASK | Z_MASK)))
- execute_trap(addr);
- break;
-
- case TRAPLT:
- if (SR & N_MASK)
- execute_trap(addr);
- break;
-
- case TRAPGE:
- if (!(SR & N_MASK))
- execute_trap(addr);
- break;
-
- case TRAPSE:
- if (SR & (C_MASK | Z_MASK))
- execute_trap(addr);
- break;
-
- case TRAPHT:
- if (!(SR & (C_MASK | Z_MASK)))
- execute_trap(addr);
- break;
-
- case TRAPST:
- if (SR & C_MASK)
- execute_trap(addr);
- break;
-
- case TRAPHE:
- if (!(SR & C_MASK))
- execute_trap(addr);
- break;
-
- case TRAPE:
- if (SR & Z_MASK)
- execute_trap(addr);
- break;
-
- case TRAPNE:
- if (!(SR & Z_MASK))
- execute_trap(addr);
- break;
-
- case TRAPV:
- if (SR & V_MASK)
- execute_trap(addr);
- break;
-
- case TRAP:
+ if (SR & conditions[code])
+ execute_trap(addr);
+ }
+ else
+ {
+ if (!(SR & conditions[code]))
execute_trap(addr);
- break;
}
m_icount -= m_clock_cycles_1;
@@ -1515,7 +1466,7 @@ void hyperstone_device::execute_run()
m_instruction_length = (1<<19);
- switch ((OP >> 8) & 0x00ff)
+ switch (m_op >> 8)
{
case 0x00: hyperstone_chk<GLOBAL, GLOBAL>(); break;
case 0x01: hyperstone_chk<GLOBAL, LOCAL>(); break;
@@ -1729,8 +1680,8 @@ void hyperstone_device::execute_run()
case 0xd1: hyperstone_ldwr<LOCAL>(); break;
case 0xd2: hyperstone_lddr<GLOBAL>(); break;
case 0xd3: hyperstone_lddr<LOCAL>(); break;
- case 0xd4: hypesrtone_ldwp<GLOBAL>(); break;
- case 0xd5: hypesrtone_ldwp<LOCAL>(); break;
+ case 0xd4: hyperstone_ldwp<GLOBAL>(); break;
+ case 0xd5: hyperstone_ldwp<LOCAL>(); break;
case 0xd6: hyperstone_lddp<GLOBAL>(); break;
case 0xd7: hyperstone_lddp<LOCAL>(); break;
case 0xd8: hyperstone_stwr<GLOBAL>(); break;
@@ -1741,35 +1692,35 @@ void hyperstone_device::execute_run()
case 0xdd: hyperstone_stwp<LOCAL>(); break;
case 0xde: hyperstone_stdp<GLOBAL>(); break;
case 0xdf: hyperstone_stdp<LOCAL>(); break;
- case 0xe0: hyperstone_dbv(); break;
- case 0xe1: hyperstone_dbnv(); break;
- case 0xe2: hyperstone_dbe(); break;
- case 0xe3: hyperstone_dbne(); break;
- case 0xe4: hyperstone_dbc(); break;
- case 0xe5: hyperstone_dbnc(); break;
- case 0xe6: hyperstone_dbse(); break;
- case 0xe7: hyperstone_dbht(); break;
- case 0xe8: hyperstone_dbn(); break;
- case 0xe9: hyperstone_dbnn(); break;
- case 0xea: hyperstone_dble(); break;
- case 0xeb: hyperstone_dbgt(); break;
+ case 0xe0: hyperstone_db<COND_V, IS_SET>(); break;
+ case 0xe1: hyperstone_db<COND_V, IS_CLEAR>(); break;
+ case 0xe2: hyperstone_db<COND_Z, IS_SET>(); break;
+ case 0xe3: hyperstone_db<COND_Z, IS_CLEAR>(); break;
+ case 0xe4: hyperstone_db<COND_C, IS_SET>(); break;
+ case 0xe5: hyperstone_db<COND_C, IS_CLEAR>(); break;
+ case 0xe6: hyperstone_db<COND_CZ, IS_SET>(); break;
+ case 0xe7: hyperstone_db<COND_CZ, IS_CLEAR>(); break;
+ case 0xe8: hyperstone_db<COND_N, IS_SET>(); break;
+ case 0xe9: hyperstone_db<COND_N, IS_CLEAR>(); break;
+ case 0xea: hyperstone_db<COND_NZ, IS_SET>(); break;
+ case 0xeb: hyperstone_db<COND_NZ, IS_CLEAR>(); break;
case 0xec: hyperstone_dbr(); break;
case 0xed: hyperstone_frame(); break;
- case 0xee: hyperstone_call_global(); break;
- case 0xef: hyperstone_call_local(); break;
- case 0xf0: hyperstone_bv(); break;
- case 0xf1: hyperstone_bnv(); break;
- case 0xf2: hyperstone_be(); break;
- case 0xf3: hyperstone_bne(); break;
- case 0xf4: hyperstone_bc(); break;
- case 0xf5: hyperstone_bnc(); break;
- case 0xf6: hyperstone_bse(); break;
- case 0xf7: hyperstone_bht(); break;
- case 0xf8: hyperstone_bn(); break;
- case 0xf9: hyperstone_bnn(); break;
- case 0xfa: hyperstone_ble(); break;
- case 0xfb: hyperstone_bgt(); break;
- case 0xfc: execute_br(); break;
+ case 0xee: hyperstone_call<GLOBAL>(); break;
+ case 0xef: hyperstone_call<LOCAL>(); break;
+ case 0xf0: hyperstone_b<COND_V, IS_SET>(); break;
+ case 0xf1: hyperstone_b<COND_V, IS_CLEAR>(); break;
+ case 0xf2: hyperstone_b<COND_Z, IS_SET>(); break;
+ case 0xf3: hyperstone_b<COND_Z, IS_CLEAR>(); break;
+ case 0xf4: hyperstone_b<COND_C, IS_SET>(); break;
+ case 0xf5: hyperstone_b<COND_C, IS_CLEAR>(); break;
+ case 0xf6: hyperstone_b<COND_CZ, IS_SET>(); break;
+ case 0xf7: hyperstone_b<COND_CZ, IS_CLEAR>(); break;
+ case 0xf8: hyperstone_b<COND_N, IS_SET>(); break;
+ case 0xf9: hyperstone_b<COND_N, IS_CLEAR>(); break;
+ case 0xfa: hyperstone_b<COND_NZ, IS_SET>(); break;
+ case 0xfb: hyperstone_b<COND_NZ, IS_CLEAR>(); break;
+ case 0xfc: hyperstone_br(); break;
case 0xfd: hyperstone_trap(); break;
case 0xfe: hyperstone_trap(); break;
case 0xff: hyperstone_trap(); break;
diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h
index 81575c4f0cf..4ccc09de6ff 100644
--- a/src/devices/cpu/e132xs/e132xs.h
+++ b/src/devices/cpu/e132xs/e132xs.h
@@ -5,6 +5,7 @@
#pragma once
+#include "32xsdasm.h"
/*
A note about clock multipliers and dividers:
@@ -22,17 +23,27 @@
-/* Functions */
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
+class e132xs_frontend;
+
// ======================> hyperstone_device
// Used by core CPU interface
-class hyperstone_device : public cpu_device
+class hyperstone_device : public cpu_device, public hyperstone_disassembler::config
{
+ friend class e132xs_frontend;
+
+public:
+ inline void ccfunc_unimplemented();
+ inline void ccfunc_print();
+ inline void ccfunc_total_cycles();
+ void update_timer_prescale();
+ void compute_tr();
+ void adjust_timer_interrupt();
+
protected:
enum
{
@@ -114,6 +125,45 @@ protected:
IS_SIGNED = 1
};
+ enum branch_condition
+ {
+ COND_V = 0,
+ COND_Z = 1,
+ COND_C = 2,
+ COND_CZ = 3,
+ COND_N = 4,
+ COND_NZ = 5
+ };
+
+ enum condition_set
+ {
+ IS_CLEAR = 0,
+ IS_SET = 1
+ };
+
+ enum
+ {
+ EXCEPTION_IO2 = 48,
+ EXCEPTION_IO1 = 49,
+ EXCEPTION_INT4 = 50,
+ EXCEPTION_INT3 = 51,
+ EXCEPTION_INT2 = 52,
+ EXCEPTION_INT1 = 53,
+ EXCEPTION_IO3 = 54,
+ EXCEPTION_TIMER = 55,
+ EXCEPTION_RESERVED1 = 56,
+ EXCEPTION_TRACE = 57,
+ EXCEPTION_PARITY_ERROR = 58,
+ EXCEPTION_EXTENDED_OVERFLOW = 59,
+ EXCEPTION_RANGE_ERROR = 60,
+ EXCEPTION_PRIVILEGE_ERROR = EXCEPTION_RANGE_ERROR,
+ EXCEPTION_FRAME_ERROR = EXCEPTION_RANGE_ERROR,
+ EXCEPTION_RESERVED2 = 61,
+ EXCEPTION_RESET = 62, // reserved if not mapped @ MEM3
+ EXCEPTION_ERROR_ENTRY = 63, // for instruction code of all ones
+ EXCEPTION_COUNT
+ };
+
// construction/destruction
hyperstone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map);
@@ -137,6 +187,8 @@ protected:
// device_disasm_interface overrides
virtual util::disasm_interface *create_disassembler() override;
+ virtual u8 get_fp() const override;
+ virtual bool get_h() const override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -166,12 +218,16 @@ protected:
uint64_t m_tr_base_cycles;
uint32_t m_tr_base_value;
+ uint32_t m_tr_result;
uint32_t m_tr_clocks_per_tick;
uint8_t m_timer_int_pending;
emu_timer *m_timer;
+ uint64_t m_numcycles;
+
+ uint32_t m_prev_pc;
uint32_t m_delay_pc;
- bool m_delay_slot;
+ uint32_t m_delay_slot;
uint32_t m_opcodexor;
@@ -182,6 +238,10 @@ protected:
int m_icount;
uint8_t m_fl_lut[16];
+ static const uint32_t s_trap_entries[8];
+ static const int32_t s_immediate_values[16];
+
+ uint32_t get_trap_addr(uint8_t trapno);
private:
// internal functions
@@ -192,25 +252,22 @@ private:
uint32_t get_global_register(uint8_t code);
- uint32_t get_trap_addr(uint8_t trapno);
uint32_t get_emu_code_addr(uint8_t num);
- void hyperstone_set_trap_entry(int which);
- uint32_t compute_tr();
- void update_timer_prescale();
- void adjust_timer_interrupt();
TIMER_CALLBACK_MEMBER(timer_callback);
- void execute_br();
+ uint32_t decode_const();
+ uint32_t decode_immediate_s();
+ void ignore_immediate_s();
+ int32_t decode_pcrel();
+ void ignore_pcrel();
+
+ void hyperstone_br();
void execute_trap(uint32_t addr);
void execute_int(uint32_t addr);
void execute_exception(uint32_t addr);
void execute_software();
- void ignore_immediate_s();
- uint32_t decode_immediate_s();
- uint32_t decode_const();
-
template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_chk();
template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_movd();
template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void hyperstone_divsu();
@@ -268,7 +325,7 @@ private:
template <reg_bank SRC_GLOBAL> void hyperstone_ldwr();
template <reg_bank SRC_GLOBAL> void hyperstone_lddr();
- template <reg_bank SRC_GLOBAL> void hypesrtone_ldwp();
+ template <reg_bank SRC_GLOBAL> void hyperstone_ldwp();
template <reg_bank SRC_GLOBAL> void hyperstone_lddp();
template <reg_bank SRC_GLOBAL> void hyperstone_stwr();
@@ -276,192 +333,18 @@ private:
template <reg_bank SRC_GLOBAL> void hyperstone_stwp();
template <reg_bank SRC_GLOBAL> void hyperstone_stdp();
- void hyperstone_dbv();
- void hyperstone_dbnv();
- void hyperstone_dbe();
- void hyperstone_dbne();
- void hyperstone_dbc();
- void hyperstone_dbnc();
- void hyperstone_dbse();
- void hyperstone_dbht();
- void hyperstone_dbn();
- void hyperstone_dbnn();
- void hyperstone_dble();
- void hyperstone_dbgt();
+ template <branch_condition CONDITION, condition_set COND_SET> void hyperstone_b();
+ template <branch_condition CONDITION, condition_set COND_SET> void hyperstone_db();
void hyperstone_dbr();
void hyperstone_frame();
- void hyperstone_call_global();
- void hyperstone_call_local();
-
- void hyperstone_bv();
- void hyperstone_bnv();
- void hyperstone_be();
- void hyperstone_bne();
- void hyperstone_bc();
- void hyperstone_bnc();
- void hyperstone_bse();
- void hyperstone_bht();
- void hyperstone_bn();
- void hyperstone_bnn();
- void hyperstone_ble();
- void hyperstone_bgt();
+ template <hyperstone_device::reg_bank SRC_GLOBAL> void hyperstone_call();
void hyperstone_trap();
void hyperstone_extend();
void hyperstone_reserved();
void hyperstone_do();
-
- int32_t decode_pcrel();
- void ignore_pcrel();
-
-#if 0
- void execute_run_drc();
- void flush_drc_cache();
- void code_flush_cache();
- void code_compile_block(offs_t pc);
- inline void ccfunc_unimplemented();
- void static_generate_entry_point();
- void static_generate_nocode_handler();
- void static_generate_out_of_cycles();
- void static_generate_memory_accessor(int size, int iswrite, const char *name, code_handle *&handleptr);
- void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception);
- void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
- void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-#endif
-
-#if 0
- void generate_op00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op14(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op16(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op17(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op18(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op19(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op1a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op1c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op1e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op24(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op25(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op26(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op27(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op28(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op29(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op2a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op2c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op2e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op2f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op34(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op35(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op36(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op37(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op38(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op39(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op3a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op3c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op3e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op40(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op41(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op42(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op43(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op44(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op45(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op46(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op47(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op48(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op49(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op4a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op4c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op4e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op4f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op50(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op51(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op52(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op53(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op54(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op55(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op56(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op57(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op58(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op59(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op5a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op5c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op5e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op5f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op60(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op61(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op62(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op63(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op65(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op66(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op67(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op68(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op69(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op6a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op6c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op6e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op6f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op70(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op71(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op72(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op73(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op74(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op75(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op76(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op77(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op78(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op79(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op7a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op7c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op7e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op7f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op80(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op81(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op82(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op83(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op84(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op85(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op86(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op87(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op88(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op8a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op8c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op8e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op8f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op90(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op91(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op92(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op93(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op94(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op95(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op96(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op97(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op98(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op99(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op9a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op9c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_op9e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_op9f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opa0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opa2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opa4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opa6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opa8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opa9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opaa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opac(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opad(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opae(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opaf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opb0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opb2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opb4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opb6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opb8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opb9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opba(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opbc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opbe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opbf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opc0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opc2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opc4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opc6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opc8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opc9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opca(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opcc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opce(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opcf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opd0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opd2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opd4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opd6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opd8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opd9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opda(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opdc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opde(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opdf(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_ope0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_ope2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_ope4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_ope6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_ope8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_ope9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opeb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opec(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_oped(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opee(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opef(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opf0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opf2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opf4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opf6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opf8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opf9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opfa(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opfc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opfd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_opfe(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); void generate_opff(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-#endif
};
// device type definition
@@ -662,4 +545,5 @@ protected:
virtual void device_start() override;
};
+
#endif // MAME_CPU_E132XS_E132XS_H
diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx
index acaa1d99aa9..9d55b78d233 100644
--- a/src/devices/cpu/e132xs/e132xsop.hxx
+++ b/src/devices/cpu/e132xs/e132xsop.hxx
@@ -51,7 +51,7 @@ void hyperstone_device::hyperstone_movd()
const uint32_t old_s = SR & S_MASK;
const uint32_t old_l = SR & L_MASK;
PC = sreg & ~1;
- SR = (sregf & 0xffe00000) | ((sreg & 0x01) << 18 ) | (sregf & 0x3ffff);
+ SR = (sregf & 0xffe3ffff) | ((sreg & 0x01) << 18);
if (m_intblock < 1)
m_intblock = 1;
@@ -81,6 +81,8 @@ void hyperstone_device::hyperstone_movd()
}
else if (SRC_GLOBAL && (src_code == SR_REGISTER)) // Rd doesn't denote PC and Rs denotes SR
{
+ SR |= Z_MASK;
+ SR &= ~N_MASK;
if (DST_GLOBAL)
{
set_global_register(dst_code, 0);
@@ -91,13 +93,16 @@ void hyperstone_device::hyperstone_movd()
m_local_regs[dst_code] = 0;
m_local_regs[dstf_code] = 0;
}
- SR |= Z_MASK;
- SR &= ~N_MASK;
m_icount -= m_clock_cycles_2;
}
else // Rd doesn't denote PC and Rs doesn't denote SR
{
+ SR &= ~(Z_MASK | N_MASK);
+ if (concat_64(sreg, sregf) == 0)
+ SR |= Z_MASK;
+ SR |= SIGN_TO_N(sreg);
+
if (DST_GLOBAL)
{
set_global_register(dst_code, sreg);
@@ -109,11 +114,6 @@ void hyperstone_device::hyperstone_movd()
m_local_regs[dstf_code] = sregf;
}
- SR &= ~(Z_MASK | N_MASK);
- if (concat_64(sreg, sregf) == 0)
- SR |= Z_MASK;
- SR |= SIGN_TO_N(sreg);
-
m_icount -= m_clock_cycles_2;
}
}
@@ -152,12 +152,12 @@ void hyperstone_device::hyperstone_divsu()
{
/* TODO: add quotient overflow */
const uint32_t quotient = SIGNED ? (uint32_t)((int64_t)dividend / (int32_t)sreg) : (dividend / sreg);
- (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = SIGNED ? (uint32_t)((int64_t)dividend % (int32_t)sreg) : (dividend % sreg);
- (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)quotient;
SR &= ~(V_MASK | Z_MASK | N_MASK);
if (quotient == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(quotient);
+ (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = SIGNED ? (uint32_t)((int64_t)dividend % (int32_t)sreg) : (dividend % sreg);
+ (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)quotient;
}
m_icount -= 36 << m_clck_scale;
@@ -219,20 +219,19 @@ template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SR
void hyperstone_device::hyperstone_mask()
{
const uint32_t extra_u = decode_const();
-
check_delay_PC();
-
const uint32_t dreg = (SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]) & extra_u;
- if (DST_GLOBAL)
- set_global_register(DST_CODE, dreg);
- else
- m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg;
if (dreg == 0)
SR |= Z_MASK;
else
SR &= ~Z_MASK;
+ if (DST_GLOBAL)
+ set_global_register(DST_CODE, dreg);
+ else
+ m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg;
+
m_icount -= m_clock_cycles_1;
}
@@ -240,28 +239,28 @@ template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SR
void hyperstone_device::hyperstone_sum()
{
const uint32_t extra_u = decode_const();
-
check_delay_PC();
-
const uint32_t fp = GET_FP;
const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
const uint32_t sreg = SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_global_regs[src_code]) : m_local_regs[src_code];
const uint64_t tmp = uint64_t(sreg) + uint64_t(extra_u);
- SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK);
+ SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK);
SR |= (tmp & 0x100000000) >> 32;
SR |= ((sreg ^ tmp) & (extra_u ^ tmp) & 0x80000000) >> 28;
const uint32_t dreg = sreg + extra_u;
+
+ if (dreg == 0)
+ SR |= Z_MASK;
+ SR |= SIGN_TO_N(dreg);
+
if (DST_GLOBAL)
set_global_register(DST_CODE, dreg);
else
m_local_regs[(DST_CODE + fp) & 0x3f] = dreg;
- if (dreg == 0)
- SR |= Z_MASK;
- SR |= SIGN_TO_N(dreg);
m_icount -= m_clock_cycles_1;
}
@@ -278,22 +277,25 @@ void hyperstone_device::hyperstone_sums()
const int32_t sreg = int32_t(SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_global_regs[src_code]) : m_local_regs[src_code]);
const int64_t tmp = int64_t(sreg) + int64_t(extra_s);
+
+ SR &= ~(Z_MASK | N_MASK | V_MASK);
SR |= ((sreg ^ tmp) & (extra_s ^ tmp) & 0x80000000) >> 28;
//#if SETCARRYS
-// CHECK_C(tmp);
+// SR |= (tmp & 0x100000000) >> 32;
//#endif
const int32_t res = sreg + extra_s;
- if (DST_GLOBAL)
- set_global_register(DST_CODE, res);
- else
- m_local_regs[(DST_CODE + fp) & 0x3f] = res;
if (res == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(res);
+ if (DST_GLOBAL)
+ set_global_register(DST_CODE, res);
+ else
+ m_local_regs[(DST_CODE + fp) & 0x3f] = res;
+
m_icount -= m_clock_cycles_1;
if ((SR & V_MASK) && src_code != SR_REGISTER)
@@ -318,15 +320,14 @@ void hyperstone_device::hyperstone_cmp()
SR &= ~(Z_MASK | N_MASK | V_MASK | C_MASK);
SR |= ((tmp ^ dreg) & (dreg ^ sreg) & 0x80000000) >> 28;
- if (dreg == sreg)
+ if (dreg < sreg)
+ SR |= C_MASK;
+ else if (dreg == sreg)
SR |= Z_MASK;
if (int32_t(dreg) < int32_t(sreg))
SR |= N_MASK;
- if (dreg < sreg)
- SR |= C_MASK;
-
m_icount -= m_clock_cycles_1;
}
@@ -346,6 +347,11 @@ void hyperstone_device::hyperstone_mov()
const uint32_t src_code = SRC_GLOBAL ? (SRC_CODE + (h ? 16 : 0)) : ((SRC_CODE + fp) & 0x3f);
const uint32_t sreg = SRC_GLOBAL ? ((WRITE_ONLY_REGMASK & (1 << src_code)) ? 0 : get_global_register(src_code)) : m_local_regs[src_code];
+ SR &= ~(Z_MASK | N_MASK);
+ if (sreg == 0)
+ SR |= Z_MASK;
+ SR |= SIGN_TO_N(sreg);
+
if (DST_GLOBAL)
{
const uint32_t dst_code = DST_CODE + (h ? 16 : 0);
@@ -358,11 +364,6 @@ void hyperstone_device::hyperstone_mov()
{
m_local_regs[(DST_CODE + fp) & 0x3f] = sreg;
}
-
- SR &= ~(Z_MASK | N_MASK);
- if (sreg == 0)
- SR |= Z_MASK;
- SR |= SIGN_TO_N(sreg);
}
m_icount -= m_clock_cycles_1;
@@ -388,6 +389,11 @@ void hyperstone_device::hyperstone_add()
SR |= ((sreg ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28;
dreg += sreg;
+
+ if (dreg == 0)
+ SR |= Z_MASK;
+ SR |= SIGN_TO_N(dreg);
+
if (DST_GLOBAL)
{
set_global_register(dst_code, dreg);
@@ -400,10 +406,6 @@ void hyperstone_device::hyperstone_add()
m_local_regs[dst_code] = dreg;
}
- if (dreg == 0)
- SR |= Z_MASK;
- SR |= SIGN_TO_N(dreg);
-
m_icount -= m_clock_cycles_1;
}
@@ -424,19 +426,20 @@ void hyperstone_device::hyperstone_adds()
SR |= ((sreg ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28;
//#if SETCARRYS
-// CHECK_C(tmp);
+// SR |= (tmp & 0x100000000) >> 32;
//#endif
const int32_t res = sreg + dreg;
- if (DST_GLOBAL)
- set_global_register(dst_code, res);
- else
- m_local_regs[dst_code] = res;
if (res == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(res);
+ if (DST_GLOBAL)
+ set_global_register(dst_code, res);
+ else
+ m_local_regs[dst_code] = res;
+
m_icount -= m_clock_cycles_1;
if (SR & V_MASK)
@@ -473,16 +476,17 @@ void hyperstone_device::hyperstone_andn()
const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f];
const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] & ~sreg;
- if (DST_GLOBAL)
- set_global_register(dst_code, dreg);
- else
- m_local_regs[dst_code] = dreg;
if (dreg == 0)
SR |= Z_MASK;
else
SR &= ~Z_MASK;
+ if (DST_GLOBAL)
+ set_global_register(dst_code, dreg);
+ else
+ m_local_regs[dst_code] = dreg;
+
m_icount -= m_clock_cycles_1;
}
@@ -494,16 +498,17 @@ void hyperstone_device::hyperstone_or()
const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f];
const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] | sreg;
- if (DST_GLOBAL)
- set_global_register(dst_code, dreg);
- else
- m_local_regs[dst_code] = dreg;
if (dreg == 0)
SR |= Z_MASK;
else
SR &= ~Z_MASK;
+ if (DST_GLOBAL)
+ set_global_register(dst_code, dreg);
+ else
+ m_local_regs[dst_code] = dreg;
+
m_icount -= m_clock_cycles_1;
}
@@ -515,16 +520,17 @@ void hyperstone_device::hyperstone_xor()
const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f];
const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] ^ sreg;
- if (DST_GLOBAL)
- set_global_register(dst_code, dreg);
- else
- m_local_regs[dst_code] = dreg;
if (dreg == 0)
SR |= Z_MASK;
else
SR &= ~Z_MASK;
+ if (DST_GLOBAL)
+ set_global_register(dst_code, dreg);
+ else
+ m_local_regs[dst_code] = dreg;
+
m_icount -= m_clock_cycles_1;
}
@@ -563,15 +569,15 @@ void hyperstone_device::hyperstone_subc()
dreg -= sreg_c;
}
+ if (old_z && dreg == 0)
+ SR |= Z_MASK;
+ SR |= SIGN_TO_N(dreg);
+
if (DST_GLOBAL)
set_global_register(DST_CODE, dreg);
else
m_local_regs[dst_code] = dreg;
- if (old_z && dreg == 0)
- SR |= Z_MASK;
- SR |= SIGN_TO_N(dreg);
-
m_icount -= m_clock_cycles_1;
}
@@ -581,16 +587,17 @@ void hyperstone_device::hyperstone_not()
check_delay_PC();
const uint32_t dreg = ~(SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f]);
- if (DST_GLOBAL)
- set_global_register(DST_CODE, dreg);
- else
- m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg;
if (dreg == 0)
SR |= Z_MASK;
else
SR &= ~Z_MASK;
+ if (DST_GLOBAL)
+ set_global_register(DST_CODE, dreg);
+ else
+ m_local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg;
+
m_icount -= m_clock_cycles_1;
}
@@ -609,11 +616,15 @@ void hyperstone_device::hyperstone_sub()
const uint64_t tmp = uint64_t(dreg) - uint64_t(sreg);
SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK);
-
SR |= (tmp & 0x100000000) >> 32;
SR |= ((tmp ^ dreg) & (dreg ^ sreg) & 0x80000000) >> 28;
dreg -= sreg;
+
+ if (dreg == 0)
+ SR |= Z_MASK;
+ SR |= SIGN_TO_N(dreg);
+
if (DST_GLOBAL)
{
set_global_register(dst_code, dreg);
@@ -626,10 +637,6 @@ void hyperstone_device::hyperstone_sub()
m_local_regs[dst_code] = dreg;
}
- if (dreg == 0)
- SR |= Z_MASK;
- SR |= SIGN_TO_N(dreg);
-
m_icount -= m_clock_cycles_1;
}
@@ -649,21 +656,22 @@ void hyperstone_device::hyperstone_subs()
SR &= ~(V_MASK | Z_MASK | N_MASK);
//#ifdef SETCARRYS
-// CHECK_C(tmp);
+// SR |= (tmp & 0x100000000) >> 32;
//#endif
SR |= ((tmp ^ dreg) & (dreg ^ sreg) & 0x80000000) >> 28;
const int32_t res = dreg - sreg;
- if (DST_GLOBAL)
- set_global_register(dst_code, res);
- else
- m_local_regs[dst_code] = res;
if (res == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(res);
+ if (DST_GLOBAL)
+ set_global_register(dst_code, res);
+ else
+ m_local_regs[dst_code] = res;
+
m_icount -= m_clock_cycles_1;
if (SR & V_MASK)
@@ -693,27 +701,27 @@ void hyperstone_device::hyperstone_addc()
if (SRC_GLOBAL && (src_code == SR_REGISTER))
{
tmp = uint64_t(dreg) + uint64_t(c);
- SR |= ((dreg ^ tmp) & (c ^ tmp) & 0x80000000) >> 28;
+ SR |= ((dreg ^ tmp) & tmp & 0x80000000) >> 28;
dreg += c;
}
else
{
tmp = uint64_t(sreg) + uint64_t(dreg) + uint64_t(c);
- SR |= ((sreg ^ tmp) & (dreg ^ tmp) & (c ^ tmp) & 0x80000000) >> 28;
+ SR |= ((sreg ^ tmp) & (dreg ^ tmp) & tmp & 0x80000000) >> 28;
dreg += sreg + c;
}
SR |= (tmp & 0x100000000) >> 32;
+ if (dreg == 0 && old_z)
+ SR |= Z_MASK;
+ SR |= SIGN_TO_N(dreg);
+
if (DST_GLOBAL)
set_global_register(dst_code, dreg);
else
m_local_regs[dst_code] = dreg;
- if (dreg == 0 && old_z)
- SR |= Z_MASK;
- SR |= SIGN_TO_N(dreg);
-
m_icount -= m_clock_cycles_1;
}
@@ -725,16 +733,17 @@ void hyperstone_device::hyperstone_and()
const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
const uint32_t sreg = SRC_GLOBAL ? m_global_regs[SRC_CODE] : m_local_regs[(SRC_CODE + GET_FP) & 0x3f];
const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] & sreg;
- if (DST_GLOBAL)
- set_global_register(dst_code, dreg);
- else
- m_local_regs[dst_code] = dreg;
if (dreg == 0)
SR |= Z_MASK;
else
SR &= ~Z_MASK;
+ if (DST_GLOBAL)
+ set_global_register(dst_code, dreg);
+ else
+ m_local_regs[dst_code] = dreg;
+
m_icount -= m_clock_cycles_1;
}
@@ -754,15 +763,16 @@ void hyperstone_device::hyperstone_neg()
SR |= (tmp & sreg & 0x80000000) >> 28;
const uint32_t dreg = -sreg;
- if (DST_GLOBAL)
- set_global_register(DST_CODE, dreg);
- else
- m_local_regs[(DST_CODE + fp) & 0x3f] = dreg;
if (dreg == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(dreg);
+ if (DST_GLOBAL)
+ set_global_register(DST_CODE, dreg);
+ else
+ m_local_regs[(DST_CODE + fp) & 0x3f] = dreg;
+
m_icount -= m_clock_cycles_1;
}
@@ -783,19 +793,20 @@ void hyperstone_device::hyperstone_negs()
SR |= V_MASK;
//#if SETCARRYS
-// CHECK_C(tmp);
+// SR |= (tmp & 0x100000000) >> 32;
//#endif
const int32_t res = -sreg;
- if (DST_GLOBAL)
- set_global_register(DST_CODE, res);
- else
- m_local_regs[(DST_CODE + fp) & 0x3f] = res;
if (res == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(res);
+ if (DST_GLOBAL)
+ set_global_register(DST_CODE, res);
+ else
+ m_local_regs[(DST_CODE + fp) & 0x3f] = res;
+
m_icount -= m_clock_cycles_1;
if (GET_V)
@@ -814,7 +825,7 @@ void hyperstone_device::hyperstone_cmpi()
check_delay_PC();
if (!IMM_LONG)
- imm = immediate_values[m_op & 0x0f];
+ imm = m_op & 0x0f;
const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code];
@@ -823,15 +834,14 @@ void hyperstone_device::hyperstone_cmpi()
uint64_t tmp = (uint64_t)dreg - (uint64_t)imm;
SR |= ((tmp ^ dreg) & (dreg ^ imm) & 0x80000000) >> 28;
- if (dreg == imm)
+ if (dreg < imm)
+ SR |= C_MASK;
+ else if (dreg == imm)
SR |= Z_MASK;
if ((int32_t)dreg < (int32_t)imm)
SR |= N_MASK;
- if (dreg < imm)
- SR |= C_MASK;
-
m_icount -= m_clock_cycles_1;
}
@@ -844,7 +854,7 @@ void hyperstone_device::hyperstone_movi()
check_delay_PC();
if (!IMM_LONG)
- imm = immediate_values[m_op & 0x0f];
+ imm = m_op & 0x0f;
const bool h = (SR & H_MASK) != 0;
if (DST_GLOBAL && h && !(SR & S_MASK))
@@ -853,6 +863,15 @@ void hyperstone_device::hyperstone_movi()
}
else
{
+ SR &= ~(Z_MASK | N_MASK);
+ if (imm == 0)
+ SR |= Z_MASK;
+ SR |= SIGN_TO_N(imm);
+
+#if MISSIONCRAFT_FLAGS
+ SR &= ~V_MASK; // or V undefined ?
+#endif
+
if (DST_GLOBAL)
{
const uint32_t dst_code = DST_CODE + (h ? 16 : 0);
@@ -865,15 +884,6 @@ void hyperstone_device::hyperstone_movi()
{
m_local_regs[(DST_CODE + GET_FP) & 0x3f] = imm;
}
-
- SR &= ~(Z_MASK | N_MASK);
- if (imm == 0)
- SR |= Z_MASK;
- SR |= SIGN_TO_N(imm);
-
-#if MISSIONCRAFT_FLAGS
- SR &= ~V_MASK; // or V undefined ?
-#endif
}
m_icount -= m_clock_cycles_1;
@@ -893,7 +903,7 @@ void hyperstone_device::hyperstone_addi()
if (!N_OP_MASK)
imm = GET_C & (((SR & Z_MASK) ? 0 : 1) | (dreg & 0x01));
else if (!IMM_LONG)
- imm = immediate_values[m_op & 0x0f];
+ imm = m_op & 0x0f;
SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK);
@@ -903,6 +913,11 @@ void hyperstone_device::hyperstone_addi()
SR |= ((imm ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28;
dreg += imm;
+
+ if (dreg == 0)
+ SR |= Z_MASK;
+ SR |= SIGN_TO_N(dreg);
+
if (DST_GLOBAL)
{
set_global_register(dst_code, dreg);
@@ -915,10 +930,6 @@ void hyperstone_device::hyperstone_addi()
m_local_regs[dst_code] = dreg;
}
- if (dreg == 0)
- SR |= Z_MASK;
- SR |= SIGN_TO_N(dreg);
-
m_icount -= m_clock_cycles_1;
}
@@ -941,7 +952,7 @@ void hyperstone_device::hyperstone_addsi()
}
else
{
- imm = immediate_values[m_op & 0x0f];
+ imm = m_op & 0x0f;
}
}
else
@@ -960,20 +971,20 @@ void hyperstone_device::hyperstone_addsi()
SR |= ((imm ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28;
//#if SETCARRYS
-// CHECK_C(tmp);
+// SR |= (tmp & 0x100000000) >> 32;
//#endif
const int32_t res = imm + (int32_t)dreg;
+ if (res == 0)
+ SR |= Z_MASK;
+ SR |= SIGN_TO_N(res);
+
if (DST_GLOBAL)
set_global_register(dst_code, res);
else
m_local_regs[dst_code] = res;
- if (res == 0)
- SR |= Z_MASK;
- SR |= SIGN_TO_N(res);
-
m_icount -= m_clock_cycles_1;
if (SR & V_MASK)
@@ -1012,7 +1023,7 @@ void hyperstone_device::hyperstone_cmpbi()
}
else
{
- imm = immediate_values[m_op & 0x0f];
+ imm = m_op & 0x0f;
}
}
@@ -1049,13 +1060,19 @@ void hyperstone_device::hyperstone_andni()
if (N_OP_MASK == 0x10f)
imm = 0x7fffffff; // bit 31 = 0, others = 1
else if (!IMM_LONG)
- imm = immediate_values[m_op & 0x0f];
+ imm = m_op & 0x0f;
uint32_t dreg;
if (DST_GLOBAL)
{
const uint32_t dst_code = DST_CODE;
dreg = m_global_regs[dst_code] & ~imm;
+
+ if (dreg == 0)
+ SR |= Z_MASK;
+ else
+ SR &= ~Z_MASK;
+
set_global_register(dst_code, dreg);
}
else
@@ -1063,12 +1080,12 @@ void hyperstone_device::hyperstone_andni()
const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f;
dreg = m_local_regs[dst_code] & ~imm;
m_local_regs[dst_code] = dreg;
- }
- if (dreg == 0)
- SR |= Z_MASK;
- else
- SR &= ~Z_MASK;
+ if (dreg == 0)
+ SR |= Z_MASK;
+ else
+ SR &= ~Z_MASK;
+ }
m_icount -= m_clock_cycles_1;
}
@@ -1083,24 +1100,30 @@ void hyperstone_device::hyperstone_ori()
check_delay_PC();
if (!IMM_LONG)
- imm = immediate_values[m_op & 0x0f];
- uint32_t dreg;
+ imm = m_op & 0x0f;
+
if (DST_GLOBAL)
{
const uint32_t dst_code = DST_CODE;
- dreg = m_global_regs[dst_code] | imm;
+ const uint32_t dreg = m_global_regs[dst_code] | imm;
+
+ if (dreg)
+ SR &= ~Z_MASK;
+ else
+ SR |= Z_MASK;
+
set_global_register(dst_code, dreg);
}
else
{
const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f;
- dreg = m_local_regs[dst_code] |= imm;
- }
+ const uint32_t dreg = m_local_regs[dst_code] |= imm;
- if (dreg)
- SR &= ~Z_MASK;
- else
- SR |= Z_MASK;
+ if (dreg)
+ SR &= ~Z_MASK;
+ else
+ SR |= Z_MASK;
+ }
m_icount -= m_clock_cycles_1;
}
@@ -1115,24 +1138,30 @@ void hyperstone_device::hyperstone_xori()
check_delay_PC();
if (!IMM_LONG)
- imm = immediate_values[m_op & 0x0f];
+ imm = m_op & 0x0f;
uint32_t dreg;
if (DST_GLOBAL)
{
const uint32_t dst_code = DST_CODE;
dreg = m_global_regs[dst_code] ^ imm;
+
+ if (dreg)
+ SR &= ~Z_MASK;
+ else
+ SR |= Z_MASK;
+
set_global_register(dst_code, dreg);
}
else
{
const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f;
dreg = m_local_regs[dst_code] ^= imm;
- }
- if (dreg)
- SR &= ~Z_MASK;
- else
- SR |= Z_MASK;
+ if (dreg)
+ SR &= ~Z_MASK;
+ else
+ SR |= Z_MASK;
+ }
m_icount -= m_clock_cycles_1;
}
@@ -1164,13 +1193,13 @@ void hyperstone_device::hyperstone_shrdi()
high_order = extract_64hi(val);
- m_local_regs[dst_code] = high_order;
- m_local_regs[dstf_code] = extract_64lo(val);
-
if (val == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(high_order);
+ m_local_regs[dst_code] = high_order;
+ m_local_regs[dstf_code] = extract_64lo(val);
+
m_icount -= m_clock_cycles_2;
}
@@ -1203,13 +1232,13 @@ void hyperstone_device::hyperstone_shrd()
val >>= n;
}
- m_local_regs[dst_code] = (uint32_t)(val >> 32);
- m_local_regs[dstf_code] = (uint32_t)val;
-
if (val == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(m_local_regs[dst_code]);
+ m_local_regs[dst_code] = (uint32_t)(val >> 32);
+ m_local_regs[dstf_code] = (uint32_t)val;
+
m_icount -= m_clock_cycles_2;
}
@@ -1229,11 +1258,12 @@ void hyperstone_device::hyperstone_shr()
dreg >>= n;
- m_local_regs[dst_code] = dreg;
if (dreg == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(dreg);
+ m_local_regs[dst_code] = dreg;
+
m_icount -= m_clock_cycles_1;
}
@@ -1261,13 +1291,13 @@ void hyperstone_device::hyperstone_sardi()
val |= 0xffffffff00000000U << (32 - n);
}
- m_local_regs[dst_code] = (uint32_t)(val >> 32);
- m_local_regs[dstf_code] = (uint32_t)val;
-
if (val == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(m_local_regs[dst_code]);
+ m_local_regs[dst_code] = (uint32_t)(val >> 32);
+ m_local_regs[dstf_code] = (uint32_t)val;
+
m_icount -= m_clock_cycles_2;
}
@@ -1306,12 +1336,13 @@ void hyperstone_device::hyperstone_sard()
}
}
- m_local_regs[dst_code] = (uint32_t)(val >> 32);
- m_local_regs[dstf_code] = (uint32_t)val;
if (val == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(m_local_regs[dst_code]);
+ m_local_regs[dst_code] = (uint32_t)(val >> 32);
+ m_local_regs[dstf_code] = (uint32_t)val;
+
m_icount -= m_clock_cycles_2;
}
@@ -1339,12 +1370,12 @@ void hyperstone_device::hyperstone_sar()
ret |= 0xffffffff << (32 - n);
}
- m_local_regs[dst_code] = ret;
-
if (ret == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(ret);
+ m_local_regs[dst_code] = ret;
+
m_icount -= m_clock_cycles_1;
}
@@ -1378,13 +1409,13 @@ void hyperstone_device::hyperstone_shldi()
high_order = extract_64hi(val);
- m_local_regs[dst_code] = high_order;
- m_local_regs[dstf_code] = extract_64lo(val);
-
if (val == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(high_order);
+ m_local_regs[dst_code] = high_order;
+ m_local_regs[dstf_code] = extract_64lo(val);
+
m_icount -= m_clock_cycles_2;
}
@@ -1423,13 +1454,13 @@ void hyperstone_device::hyperstone_shld()
val <<= n;
- m_local_regs[dst_code] = extract_64hi(val);
- m_local_regs[dstf_code] = extract_64lo(val);
-
if (val == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(m_local_regs[dst_code]);
+ m_local_regs[dst_code] = extract_64hi(val);
+ m_local_regs[dstf_code] = extract_64lo(val);
+
m_icount -= m_clock_cycles_2;
}
@@ -1453,12 +1484,12 @@ void hyperstone_device::hyperstone_shl()
if (((base & mask) && (!(ret & 0x80000000))) || (((base & mask) ^ mask) && (ret & 0x80000000)))
SR |= V_MASK;
- m_local_regs[dst_code & 0x3f] = ret;
-
if (ret == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(ret);
+ m_local_regs[dst_code & 0x3f] = ret;
+
m_icount -= m_clock_cycles_1;
}
@@ -1508,12 +1539,12 @@ void hyperstone_device::hyperstone_rol()
SR &= ~(Z_MASK | C_MASK | N_MASK);
#endif
- m_local_regs[dst_code] = val;
-
if (val == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(val);
+ m_local_regs[dst_code] = val;
+
m_icount -= m_clock_cycles_1;
}
@@ -1553,167 +1584,84 @@ void hyperstone_device::hyperstone_ldxx1()
const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t dreg = ((DST_GLOBAL && dst_code == SR_REGISTER) ? 0 : (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]);
- if (DST_GLOBAL && dst_code == SR_REGISTER)
+ switch (sub_type)
{
- switch (sub_type)
- {
- case 0: // LDBS.A
- if (SRC_GLOBAL)
- set_global_register(src_code, (int32_t)(int8_t)READ_B(extra_s));
- else
- m_local_regs[src_code] = (int32_t)(int8_t)READ_B(extra_s);
- break;
-
- case 1: // LDBU.A
- if (SRC_GLOBAL)
- m_global_regs[src_code] = READ_B(extra_s);
- else
- m_local_regs[src_code] = READ_B(extra_s);
- break;
+ case 0: // LDBS.D
+ if (SRC_GLOBAL)
+ set_global_register(src_code, (int32_t)(int8_t)READ_B(dreg + extra_s));
+ else
+ m_local_regs[src_code] = (int32_t)(int8_t)READ_B(dreg + extra_s);
+ break;
- case 2:
- if (SRC_GLOBAL)
- {
- if (extra_s & 1) // LDHS.A
- set_global_register(src_code, (int32_t)(int16_t)READ_HW(extra_s));
- else // LDHU.A
- set_global_register(src_code, READ_HW(extra_s));
- }
- else
- {
- if (extra_s & 1) // LDHS.A
- m_local_regs[src_code] = (int32_t)(int16_t)READ_HW(extra_s);
- else // LDHU.A
- m_local_regs[src_code] = READ_HW(extra_s);
- }
- break;
+ case 1: // LDBU.D
+ if (SRC_GLOBAL)
+ set_global_register(src_code, READ_B(dreg + extra_s));
+ else
+ m_local_regs[src_code] = READ_B(dreg + extra_s);
+ break;
- case 3:
- switch (extra_s & 3)
- {
- case 0: // LDW.A
- if (SRC_GLOBAL)
- set_global_register(src_code, READ_W(extra_s));
- else
- m_local_regs[src_code] = READ_W(extra_s);
- break;
- case 1: // LDD.A
- if (SRC_GLOBAL)
- {
- set_global_register(src_code, READ_W(extra_s));
- set_global_register(srcf_code, READ_W(extra_s + 4));
- }
- else
- {
- m_local_regs[src_code] = READ_W(extra_s);
- m_local_regs[srcf_code] = READ_W(extra_s + 4);
- }
- m_icount -= m_clock_cycles_1; // extra cycle
- break;
- case 2: // LDW.IOA
- if (SRC_GLOBAL)
- set_global_register(src_code, IO_READ_W(extra_s));
- else
- m_local_regs[src_code] = IO_READ_W(extra_s);
- break;
- case 3: // LDD.IOA
- if (SRC_GLOBAL)
- {
- set_global_register(src_code, IO_READ_W(extra_s));
- set_global_register(srcf_code, IO_READ_W(extra_s + 4));
- }
- else
- {
- m_local_regs[src_code] = IO_READ_W(extra_s);
- m_local_regs[srcf_code] = IO_READ_W(extra_s + 4);
- }
- m_icount -= m_clock_cycles_1; // extra cycle
- break;
- }
- break;
- }
- }
- else
- {
- const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code];
- switch (sub_type)
- {
- case 0: // LDBS.D
- if (SRC_GLOBAL)
- set_global_register(src_code, (int32_t)(int8_t)READ_B(dreg + extra_s));
+ case 2:
+ if (SRC_GLOBAL)
+ {
+ if (extra_s & 1)
+ set_global_register(src_code, (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1)));
else
- m_local_regs[src_code] = (int32_t)(int8_t)READ_B(dreg + extra_s);
- break;
-
- case 1: // LDBU.D
- if (SRC_GLOBAL)
- set_global_register(src_code, READ_B(dreg + extra_s));
+ set_global_register(src_code, READ_HW(dreg + (extra_s & ~1)));
+ }
+ else
+ {
+ if (extra_s & 1)
+ m_local_regs[src_code] = (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1));
else
- m_local_regs[src_code] = READ_B(dreg + extra_s);
- break;
+ m_local_regs[src_code] = READ_HW(dreg + (extra_s & ~1));
+ }
+ break;
- case 2:
- if (SRC_GLOBAL)
- {
- if (extra_s & 1)
- set_global_register(src_code, (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1)));
+ case 3:
+ switch (extra_s & 3)
+ {
+ case 0: // LDW.D
+ if (SRC_GLOBAL)
+ set_global_register(src_code, READ_W(dreg + extra_s));
else
- set_global_register(src_code, READ_HW(dreg + (extra_s & ~1)));
- }
- else
- {
- if (extra_s & 1)
- m_local_regs[src_code] = (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1));
+ m_local_regs[src_code] = READ_W(dreg + extra_s);
+ break;
+ case 1: // LDD.D
+ if (SRC_GLOBAL)
+ {
+ set_global_register(src_code, READ_W(dreg + (extra_s & ~1)));
+ set_global_register(srcf_code, READ_W(dreg + (extra_s & ~1) + 4));
+ }
else
- m_local_regs[src_code] = READ_HW(dreg + (extra_s & ~1));
- }
- break;
-
- case 3:
- switch (extra_s & 3)
- {
- case 0: // LDW.D
- if (SRC_GLOBAL)
- set_global_register(src_code, READ_W(dreg + extra_s));
- else
- m_local_regs[src_code] = READ_W(dreg + extra_s);
- break;
- case 1: // LDD.D
- if (SRC_GLOBAL)
- {
- set_global_register(src_code, READ_W(dreg + (extra_s & ~1)));
- set_global_register(srcf_code, READ_W(dreg + (extra_s & ~1) + 4));
- }
- else
- {
- m_local_regs[src_code] = READ_W(dreg + (extra_s & ~1));
- m_local_regs[srcf_code] = READ_W(dreg + (extra_s & ~1) + 4);
- }
- m_icount -= m_clock_cycles_1; // extra cycle
- break;
- case 2: // LDW.IOD
- if (SRC_GLOBAL)
- set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3)));
- else
- m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3));
- break;
- case 3: // LDD.IOD
- if (SRC_GLOBAL)
- {
- set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3)));
- set_global_register(srcf_code, IO_READ_W(dreg + (extra_s & ~3) + 4));
- }
- else
- {
- m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3));
- m_local_regs[srcf_code] = IO_READ_W(dreg + (extra_s & ~3) + 4);
- }
- m_icount -= m_clock_cycles_1; // extra cycle
- break;
- }
- break;
- }
+ {
+ m_local_regs[src_code] = READ_W(dreg + (extra_s & ~1));
+ m_local_regs[srcf_code] = READ_W(dreg + (extra_s & ~1) + 4);
+ }
+ m_icount -= m_clock_cycles_1; // extra cycle
+ break;
+ case 2: // LDW.IOD
+ if (SRC_GLOBAL)
+ set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3)));
+ else
+ m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3));
+ break;
+ case 3: // LDD.IOD
+ if (SRC_GLOBAL)
+ {
+ set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3)));
+ set_global_register(srcf_code, IO_READ_W(dreg + (extra_s & ~3) + 4));
+ }
+ else
+ {
+ m_local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3));
+ m_local_regs[srcf_code] = IO_READ_W(dreg + (extra_s & ~3) + 4);
+ }
+ m_icount -= m_clock_cycles_1; // extra cycle
+ break;
+ }
+ break;
}
m_icount -= m_clock_cycles_1;
@@ -1899,110 +1847,56 @@ void hyperstone_device::hyperstone_stxx1()
const uint32_t fp = GET_FP;
const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const uint32_t dreg = (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code];
+ const uint32_t dreg = ((DST_GLOBAL && dst_code == SR_REGISTER) ? 0 : (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code]);
const uint32_t sreg = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[src_code]);
- if (DST_GLOBAL && dst_code == SR_REGISTER)
+ switch (sub_type)
{
- switch (sub_type)
- {
- case 0: // STBS.A
- // TODO: missing trap on range error
- WRITE_B(extra_s, (uint8_t)sreg);
- break;
-
- case 1: // STBU.A
- WRITE_B(extra_s, (uint8_t)sreg);
- break;
-
- case 2: // STHS.A, STHU.A
- WRITE_HW(extra_s, (uint16_t)sreg);
- // TODO: missing trap on range error with STHS.A
- break;
-
- case 3:
- switch (extra_s & 3)
+ case 0: // STBS.D
+ // TODO: missing trap on range error
+ WRITE_B(dreg + extra_s, (uint8_t)sreg);
+ break;
+
+ case 1: // STBU.D
+ WRITE_B(dreg + extra_s, (uint8_t)sreg);
+ break;
+
+ case 2: // STHS.D, STHU.D
+ WRITE_HW(dreg + (extra_s & ~1), (uint16_t)sreg);
+ // TODO: missing trap on range error with STHS.D
+ break;
+
+ case 3:
+ switch (extra_s & 3)
+ {
+ case 0: // STW.D
+ WRITE_W(dreg + (extra_s & ~1), sreg);
+ break;
+ case 1: // STD.D
{
- case 0: // STW.A
- WRITE_W(extra_s & ~1, sreg);
- break;
- case 1: // STD.A
- {
- const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
- const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]);
- extra_s &= ~1;
- WRITE_W(extra_s, sreg);
- WRITE_W(extra_s + 4, sregf);
- m_icount -= m_clock_cycles_1; // extra cycle
- break;
- }
- case 2: // STW.IOA
- IO_WRITE_W(extra_s & ~3, sreg);
- break;
- case 3: // STD.IOA
- {
- const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
- const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]);
- extra_s &= ~3;
- IO_WRITE_W(extra_s, sreg);
- IO_WRITE_W(extra_s + 4, sregf);
- m_icount -= m_clock_cycles_1; // extra cycle
- break;
- }
+ const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
+ const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]);
+ extra_s &= ~1;
+ WRITE_W(dreg + extra_s, sreg);
+ WRITE_W(dreg + extra_s + 4, sregf);
+ m_icount -= m_clock_cycles_1; // extra cycle
+ break;
}
- break;
- }
- }
- else
- {
- switch (sub_type)
- {
- case 0: // STBS.D
- // TODO: missing trap on range error
- WRITE_B(dreg + extra_s, (uint8_t)sreg);
- break;
-
- case 1: // STBU.D
- WRITE_B(dreg + extra_s, (uint8_t)sreg);
- break;
-
- case 2: // STHS.D, STHU.D
- WRITE_HW(dreg + (extra_s & ~1), (uint16_t)sreg);
- // TODO: missing trap on range error with STHS.D
- break;
-
- case 3:
- switch (extra_s & 3)
+ case 2: // STW.IOD
+ IO_WRITE_W(dreg + (extra_s & ~3), sreg);
+ break;
+ case 3: // STD.IOD
{
- case 0: // STW.D
- WRITE_W(dreg + (extra_s & ~1), sreg);
- break;
- case 1: // STD.D
- {
- const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
- const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]);
- extra_s &= ~1;
- WRITE_W(dreg + extra_s, sreg);
- WRITE_W(dreg + extra_s + 4, sregf);
- m_icount -= m_clock_cycles_1; // extra cycle
- break;
- }
- case 2: // STW.IOD
- IO_WRITE_W(dreg + (extra_s & ~3), sreg);
- break;
- case 3: // STD.IOD
- {
- const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
- const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]);
- extra_s &= ~3;
- IO_WRITE_W(dreg + extra_s, sreg);
- IO_WRITE_W(dreg + extra_s + 4, sregf);
- m_icount -= m_clock_cycles_1; // extra cycle
- break;
- }
+ const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
+ const uint32_t sregf = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[srcf_code]);
+ extra_s &= ~3;
+ IO_WRITE_W(dreg + extra_s, sreg);
+ IO_WRITE_W(dreg + extra_s + 4, sregf);
+ m_icount -= m_clock_cycles_1; // extra cycle
+ break;
}
- break;
- }
+ }
+ break;
}
m_icount -= m_clock_cycles_1;
@@ -2129,15 +2023,15 @@ void hyperstone_device::hyperstone_shri()
val >>= n;
+ if (val == 0)
+ SR |= Z_MASK;
+ SR |= SIGN_TO_N(val);
+
if (DST_GLOBAL)
set_global_register(dst_code, val);
else
m_local_regs[dst_code] = val;
- if (val == 0)
- SR |= Z_MASK;
- SR |= SIGN_TO_N(val);
-
m_icount -= m_clock_cycles_1;
}
@@ -2163,15 +2057,15 @@ void hyperstone_device::hyperstone_sari()
val |= 0xffffffff << (32 - n);
}
+ if (val == 0)
+ SR |= Z_MASK;
+ SR |= SIGN_TO_N(val);
+
if (DST_GLOBAL)
set_global_register(dst_code, val);
else
m_local_regs[dst_code] = val;
- if (val == 0)
- SR |= Z_MASK;
- SR |= SIGN_TO_N(val);
-
m_icount -= m_clock_cycles_1;
}
@@ -2192,15 +2086,15 @@ void hyperstone_device::hyperstone_shli()
if (((val & mask) && (!(val2 & 0x80000000))) || (((val & mask) ^ mask) && (val2 & 0x80000000)))
SR |= V_MASK;
+ if (val2 == 0)
+ SR |= Z_MASK;
+ SR |= SIGN_TO_N(val2);
+
if (DST_GLOBAL)
set_global_register(dst_code, val2);
else
m_local_regs[dst_code] = val2;
- if (val2 == 0)
- SR |= Z_MASK;
- SR |= SIGN_TO_N(val2);
-
m_icount -= m_clock_cycles_1;
}
@@ -2226,14 +2120,14 @@ void hyperstone_device::hyperstone_mulsu()
const uint32_t high_order = (uint32_t)(double_word >> 32);
- (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = high_order;
- (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)double_word;
-
SR &= ~(Z_MASK | N_MASK);
if (double_word == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(high_order);
+ (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = high_order;
+ (DST_GLOBAL ? m_global_regs : m_local_regs)[dstf_code] = (uint32_t)double_word;
+
if(SIGNED == IS_SIGNED && (sreg >= 0xffff8000 && sreg <= 0x7fff) && (dreg >= 0xffff8000 && dreg <= 0x7fff))
m_icount -= m_clock_cycles_4;
else if(SIGNED == IS_UNSIGNED && sreg <= 0xffff && dreg <= 0xffff)
@@ -2321,13 +2215,13 @@ void hyperstone_device::hyperstone_mul()
const uint32_t sreg = (SRC_GLOBAL ? m_global_regs : m_local_regs)[src_code];
const uint32_t result = sreg * dreg;
- (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = result;
-
SR &= ~(Z_MASK | N_MASK);
if (result == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(result);
+ (DST_GLOBAL ? m_global_regs : m_local_regs)[dst_code] = result;
+
if ((sreg >= 0xffff8000 && sreg <= 0x7fff) && (dreg >= 0xffff8000 && dreg <= 0x7fff))
m_icount -= 3 << m_clck_scale;
else
@@ -2504,7 +2398,7 @@ void hyperstone_device::hyperstone_lddr()
}
template <hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::hypesrtone_ldwp()
+void hyperstone_device::hyperstone_ldwp()
{
check_delay_PC();
@@ -2636,228 +2530,41 @@ void hyperstone_device::hyperstone_stdp()
m_icount -= m_clock_cycles_2;
}
-void hyperstone_device::hyperstone_dbv()
-{
- if (SR & V_MASK)
- {
- const int32_t offset = decode_pcrel();
- check_delay_PC();
- m_delay_slot = true;
- m_delay_pc = PC + offset;
- m_intblock = 3;
- }
- else
- {
- ignore_pcrel();
- check_delay_PC();
- }
-
- m_icount -= m_clock_cycles_1;
-}
-
-void hyperstone_device::hyperstone_dbnv()
+template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET>
+void hyperstone_device::hyperstone_db()
{
- if (SR & V_MASK)
+ static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK };
+ if (COND_SET)
{
- ignore_pcrel();
- check_delay_PC();
- }
- else
- {
- const int32_t offset = decode_pcrel();
- check_delay_PC();
- m_delay_slot = true;
- m_delay_pc = PC + offset;
- m_intblock = 3;
- }
-
- m_icount -= m_clock_cycles_1;
-}
-
-void hyperstone_device::hyperstone_dbe()
-{
- if (SR & Z_MASK)
- {
- const int32_t offset = decode_pcrel();
- check_delay_PC();
- m_delay_slot = true;
- m_delay_pc = PC + offset;
- m_intblock = 3;
- }
- else
- {
- ignore_pcrel();
- check_delay_PC();
- }
-
- m_icount -= m_clock_cycles_1;
-}
-
-void hyperstone_device::hyperstone_dbne()
-{
- if (SR & Z_MASK)
- {
- ignore_pcrel();
- check_delay_PC();
- }
- else
- {
- const int32_t offset = decode_pcrel();
- check_delay_PC();
- m_delay_slot = true;
- m_delay_pc = PC + offset;
- m_intblock = 3;
- }
- m_icount -= m_clock_cycles_1;
-}
-
-void hyperstone_device::hyperstone_dbc()
-{
- if (SR & C_MASK)
- {
- const int32_t offset = decode_pcrel();
- check_delay_PC();
- m_delay_slot = true;
- m_delay_pc = PC + offset;
- m_intblock = 3;
- }
- else
- {
- ignore_pcrel();
- check_delay_PC();
- }
-
- m_icount -= m_clock_cycles_1;
-}
-
-void hyperstone_device::hyperstone_dbnc()
-{
- if (SR & C_MASK)
- {
- ignore_pcrel();
- check_delay_PC();
- }
- else
- {
- const int32_t offset = decode_pcrel();
- check_delay_PC();
- m_delay_slot = true;
- m_delay_pc = PC + offset;
- m_intblock = 3;
- }
-
- m_icount -= m_clock_cycles_1;
-}
-
-void hyperstone_device::hyperstone_dbse()
-{
- if (SR & (C_MASK | Z_MASK))
- {
- const int32_t offset = decode_pcrel();
- check_delay_PC();
- m_delay_slot = true;
- m_delay_pc = PC + offset;
- m_intblock = 3;
- }
- else
- {
- ignore_pcrel();
- check_delay_PC();
- }
-
- m_icount -= m_clock_cycles_1;
-}
-
-void hyperstone_device::hyperstone_dbht()
-{
- if (SR & (C_MASK | Z_MASK))
- {
- ignore_pcrel();
- check_delay_PC();
- }
- else
- {
- const int32_t offset = decode_pcrel();
- check_delay_PC();
- m_delay_slot = true;
- m_delay_pc = PC + offset;
- m_intblock = 3;
- }
-
- m_icount -= m_clock_cycles_1;
-}
-
-void hyperstone_device::hyperstone_dbn()
-{
- if (SR & N_MASK)
- {
- const int32_t offset = decode_pcrel();
- check_delay_PC();
- m_delay_slot = true;
- m_delay_pc = PC + offset;
- m_intblock = 3;
- }
- else
- {
- ignore_pcrel();
- check_delay_PC();
- }
-
- m_icount -= m_clock_cycles_1;
-}
-
-void hyperstone_device::hyperstone_dbnn()
-{
- if (SR & N_MASK)
- {
- ignore_pcrel();
- check_delay_PC();
- }
- else
- {
- const int32_t offset = decode_pcrel();
- check_delay_PC();
- m_delay_slot = true;
- m_delay_pc = PC + offset;
- m_intblock = 3;
- }
-
- m_icount -= m_clock_cycles_1;
-}
-
-void hyperstone_device::hyperstone_dble()
-{
- if (SR & (N_MASK | Z_MASK))
- {
- const int32_t offset = decode_pcrel();
- check_delay_PC();
- m_delay_slot = true;
- m_delay_pc = PC + offset;
- m_intblock = 3;
- }
- else
- {
- ignore_pcrel();
- check_delay_PC();
- }
-
- m_icount -= m_clock_cycles_1;
-}
-
-void hyperstone_device::hyperstone_dbgt()
-{
- if (SR & (N_MASK | Z_MASK))
- {
- ignore_pcrel();
- check_delay_PC();
+ if (SR & condition_masks[CONDITION])
+ {
+ const int32_t offset = decode_pcrel();
+ check_delay_PC();
+ m_delay_slot = 1;
+ m_delay_pc = PC + offset;
+ m_intblock = 3;
+ }
+ else
+ {
+ ignore_pcrel();
+ check_delay_PC();
+ }
}
else
{
- const int32_t offset = decode_pcrel();
- check_delay_PC();
- m_delay_slot = true;
- m_delay_pc = PC + offset;
- m_intblock = 3;
+ if (SR & condition_masks[CONDITION])
+ {
+ ignore_pcrel();
+ check_delay_PC();
+ }
+ else
+ {
+ const int32_t offset = decode_pcrel();
+ check_delay_PC();
+ m_delay_slot = 1;
+ m_delay_pc = PC + offset;
+ m_intblock = 3;
+ }
}
m_icount -= m_clock_cycles_1;
@@ -2868,7 +2575,7 @@ void hyperstone_device::hyperstone_dbr()
const int32_t offset = decode_pcrel();
check_delay_PC();
- m_delay_slot = true;
+ m_delay_slot = 1;
m_delay_pc = PC + offset;
m_intblock = 3;
}
@@ -2904,8 +2611,7 @@ void hyperstone_device::hyperstone_frame()
if (tmp_flag)
{
- uint32_t addr = get_trap_addr(TRAPNO_FRAME_ERROR);
- execute_exception(addr);
+ execute_exception(get_trap_addr(TRAPNO_FRAME_ERROR));
}
}
@@ -2913,14 +2619,15 @@ void hyperstone_device::hyperstone_frame()
m_icount -= m_clock_cycles_1;
}
-void hyperstone_device::hyperstone_call_global()
+template <hyperstone_device::reg_bank SRC_GLOBAL>
+void hyperstone_device::hyperstone_call()
{
uint16_t imm_1 = READ_OP(PC);
PC += 2;
int32_t extra_s = 0;
- if (E_BIT(imm_1))
+ if (imm_1 & 0x8000)
{
uint16_t imm_2 = READ_OP(PC);
@@ -2930,7 +2637,7 @@ void hyperstone_device::hyperstone_call_global()
extra_s = imm_2;
extra_s |= ((imm_1 & 0x3fff) << 16);
- if (S_BIT_CONST(imm_1))
+ if (imm_1 & 0x4000)
extra_s |= 0xc0000000;
}
else
@@ -2939,24 +2646,21 @@ void hyperstone_device::hyperstone_call_global()
SET_ILC(2<<19);
- if (S_BIT_CONST(imm_1))
+ if (imm_1 & 0x4000)
extra_s |= 0xffffc000;
}
check_delay_PC();
- uint32_t src_code = SRC_CODE;
+ uint32_t fp = GET_FP;
+ uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
uint32_t dst_code = DST_CODE;
- uint32_t sreg = m_global_regs[src_code];
-
- if (src_code == SR_REGISTER)
- sreg = 0;
+ uint32_t sreg = (SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_global_regs : m_local_regs)[src_code];
if (!DST_CODE)
dst_code = 16;
- uint32_t fp = GET_FP;
uint32_t dreg_index = dst_code + fp;
m_local_regs[dreg_index & 0x3f] = (PC & ~1) | GET_S;
m_local_regs[(dreg_index + 1) & 0x3f] = SR;
@@ -2975,231 +2679,34 @@ void hyperstone_device::hyperstone_call_global()
m_icount -= m_clock_cycles_1;
}
-void hyperstone_device::hyperstone_call_local()
-{
- uint16_t imm_1 = READ_OP(PC);
- PC += 2;
-
- int32_t extra_s = 0;
-
- if (E_BIT(imm_1))
- {
- uint16_t imm_2 = READ_OP(PC);
-
- PC += 2;
- SET_ILC(3<<19);
-
- extra_s = imm_2;
- extra_s |= ((imm_1 & 0x3fff) << 16);
-
- if (S_BIT_CONST(imm_1))
- extra_s |= 0xc0000000;
- }
- else
- {
- extra_s = imm_1 & 0x3fff;
-
- SET_ILC(2<<19);
-
- if (S_BIT_CONST(imm_1))
- extra_s |= 0xffffc000;
- }
-
- check_delay_PC();
-
- uint32_t src_code = SRC_CODE;
- uint32_t dst_code = DST_CODE;
-
- if (!DST_CODE)
- dst_code = 16;
-
- uint32_t fp = GET_FP;
- extra_s = (extra_s & ~1) + m_local_regs[(src_code + fp) & 0x3f];
-
- uint32_t dreg_index = dst_code + fp;
- m_local_regs[dreg_index & 0x3f] = (PC & ~1) | GET_S;
- m_local_regs[(dreg_index + 1) & 0x3f] = SR;
-
- SET_FP(fp + dst_code);
- SET_FL(6); //default value for call
- SR &= ~M_MASK;
-
- PC = extra_s;
-
- m_intblock = 2;
-
- //TODO: add interrupt locks, errors, ....
-
- //TODO: no 1!
- m_icount -= m_clock_cycles_1;
-}
-
-
-
-void hyperstone_device::hyperstone_bv()
-{
- if (SR & V_MASK)
- {
- execute_br();
- }
- else
- {
- ignore_pcrel();
- check_delay_PC();
- m_icount -= m_clock_cycles_1;
- }
-}
-
-void hyperstone_device::hyperstone_bnv()
+template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET>
+void hyperstone_device::hyperstone_b()
{
- if (SR & V_MASK)
- {
- ignore_pcrel();
- check_delay_PC();
- m_icount -= m_clock_cycles_1;
- }
- else
+ static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK };
+ if (COND_SET)
{
- execute_br();
- }
-}
-
-void hyperstone_device::hyperstone_be()
-{
- if (SR & Z_MASK)
- {
- execute_br();
- }
- else
- {
- ignore_pcrel();
- check_delay_PC();
- m_icount -= m_clock_cycles_1;
- }
-}
-
-void hyperstone_device::hyperstone_bne()
-{
- if (SR & Z_MASK)
- {
- ignore_pcrel();
- check_delay_PC();
- m_icount -= m_clock_cycles_1;
- }
- else
- {
- execute_br();
- }
-}
-
-void hyperstone_device::hyperstone_bc()
-{
- if (SR & C_MASK)
- {
- execute_br();
- }
- else
- {
- ignore_pcrel();
- check_delay_PC();
- m_icount -= m_clock_cycles_1;
- }
-}
-
-void hyperstone_device::hyperstone_bnc()
-{
- if (SR & C_MASK)
- {
- ignore_pcrel();
- check_delay_PC();
- m_icount -= m_clock_cycles_1;
- }
- else
- {
- execute_br();
- }
-}
-
-void hyperstone_device::hyperstone_bse()
-{
- if (SR & (C_MASK | Z_MASK))
- {
- execute_br();
- }
- else
- {
- ignore_pcrel();
- check_delay_PC();
- m_icount -= m_clock_cycles_1;
- }
-}
-
-void hyperstone_device::hyperstone_bht()
-{
- if (SR & (C_MASK | Z_MASK))
- {
- ignore_pcrel();
- check_delay_PC();
- m_icount -= m_clock_cycles_1;
- }
- else
- {
- execute_br();
- }
-}
-
-void hyperstone_device::hyperstone_bn()
-{
- if (SR & N_MASK)
- {
- execute_br();
- }
- else
- {
- ignore_pcrel();
- check_delay_PC();
- m_icount -= m_clock_cycles_1;
- }
-}
-
-void hyperstone_device::hyperstone_bnn()
-{
- if (SR & N_MASK)
- {
- ignore_pcrel();
- check_delay_PC();
- m_icount -= m_clock_cycles_1;
- }
- else
- {
- execute_br();
- }
-}
-
-void hyperstone_device::hyperstone_ble()
-{
- if (SR & (N_MASK | Z_MASK))
- {
- execute_br();
- }
- else
- {
- ignore_pcrel();
- check_delay_PC();
- m_icount -= m_clock_cycles_1;
- }
-}
-
-void hyperstone_device::hyperstone_bgt()
-{
- if (SR & (N_MASK | Z_MASK))
- {
- ignore_pcrel();
- check_delay_PC();
- m_icount -= m_clock_cycles_1;
+ if (SR & condition_masks[CONDITION])
+ {
+ hyperstone_br();
+ }
+ else
+ {
+ ignore_pcrel();
+ check_delay_PC();
+ m_icount -= m_clock_cycles_1;
+ }
}
else
{
- execute_br();
+ if (SR & condition_masks[CONDITION])
+ {
+ ignore_pcrel();
+ check_delay_PC();
+ m_icount -= m_clock_cycles_1;
+ }
+ else
+ {
+ hyperstone_br();
+ }
}
}
diff --git a/src/devices/cpu/hmcs40/hmcs40.cpp b/src/devices/cpu/hmcs40/hmcs40.cpp
index a80c067aaeb..fa874022938 100644
--- a/src/devices/cpu/hmcs40/hmcs40.cpp
+++ b/src/devices/cpu/hmcs40/hmcs40.cpp
@@ -620,7 +620,7 @@ void hmcs40_cpu_device::execute_run()
debugger_instruction_hook(this, m_pc);
m_icount--;
m_op = m_program->read_word(m_pc) & 0x3ff;
- m_i = BITSWAP8(m_op,7,6,5,4,0,1,2,3) & 0xf; // reversed bit-order for 4-bit immediate param (except for XAMR)
+ m_i = bitswap<8>(m_op,7,6,5,4,0,1,2,3) & 0xf; // reversed bit-order for 4-bit immediate param (except for XAMR)
increment_pc();
// handle opcode
diff --git a/src/devices/cpu/hmcs40/hmcs40d.cpp b/src/devices/cpu/hmcs40/hmcs40d.cpp
index 48ae33ccfaa..96e4b6399ea 100644
--- a/src/devices/cpu/hmcs40/hmcs40d.cpp
+++ b/src/devices/cpu/hmcs40/hmcs40d.cpp
@@ -181,7 +181,7 @@ offs_t hmcs40_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
// reverse bits
if (bits < 0)
{
- param = BITSWAP8(param,0,1,2,3,4,5,6,7);
+ param = bitswap<8>(param,0,1,2,3,4,5,6,7);
param >>= (8 + bits);
bits = -bits;
}
diff --git a/src/devices/cpu/hmcs40/hmcs40op.cpp b/src/devices/cpu/hmcs40/hmcs40op.cpp
index 2078d5e765b..1886768bc8d 100644
--- a/src/devices/cpu/hmcs40/hmcs40op.cpp
+++ b/src/devices/cpu/hmcs40/hmcs40op.cpp
@@ -669,13 +669,13 @@ void hmcs40_cpu_device::op_p()
if (o & 0x100)
{
// B3 B2 B1 B0 A0 A1 A2 A3
- m_a = BITSWAP8(o,7,6,5,4,0,1,2,3) & 0xf;
+ m_a = bitswap<8>(o,7,6,5,4,0,1,2,3) & 0xf;
m_b = o >> 4 & 0xf;
}
if (o & 0x200)
{
// R20 R21 R22 R23 R30 R31 R32 R33
- o = BITSWAP8(o,0,1,2,3,4,5,6,7);
+ o = bitswap<8>(o,0,1,2,3,4,5,6,7);
write_r(2, o & 0xf);
write_r(3, o >> 4 & 0xf);
}
diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp
index 9e8457b255d..f85fd4b9a06 100644
--- a/src/devices/cpu/hphybrid/hphybrid.cpp
+++ b/src/devices/cpu/hphybrid/hphybrid.cpp
@@ -761,7 +761,7 @@ uint16_t hp_hybrid_cpu_device::RM(uint32_t addr)
return read_non_common_reg(addr_wo_bsc);
}
} else {
- return m_direct->read_word(addr << 1);
+ return m_direct->read_word(addr);
}
}
@@ -1026,8 +1026,8 @@ void hp_hybrid_cpu_device::do_pw(uint16_t opcode)
WM(tmp_addr >> 1 , tmp);
} else {
// Extend address, form byte address
- uint16_t val = (tmp_addr & 1) ? uint8_t(tmp) << 8 : uint8_t(tmp);
- uint16_t mask = (tmp_addr & 1) ? 0xff00 : 0x00ff;
+ uint16_t val = (tmp_addr & 1) ? uint8_t(tmp) : (tmp << 8);
+ uint16_t mask = (tmp_addr & 1) ? 0x00ff : 0xff00;
tmp_addr = add_mae(AEC_CASE_C , tmp_addr >> 1);
m_program->write_word(tmp_addr , val, mask);
}
@@ -1125,12 +1125,12 @@ void hp_hybrid_cpu_device::handle_dma(void)
uint16_t hp_hybrid_cpu_device::RIO(uint8_t pa , uint8_t ic)
{
- return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1);
+ return m_io->read_word(HP_MAKE_IOADDR(pa, ic));
}
void hp_hybrid_cpu_device::WIO(uint8_t pa , uint8_t ic , uint16_t v)
{
- m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v);
+ m_io->write_word(HP_MAKE_IOADDR(pa, ic) , v);
}
hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp
index 15379c18d7b..dd6d86928e2 100644
--- a/src/devices/cpu/i386/i386.cpp
+++ b/src/devices/cpu/i386/i386.cpp
@@ -3788,59 +3788,59 @@ void i386_device::pentium_smi()
m_smi_latched = false;
// save state
- WRITE32(m_cr[4], smram_state+SMRAM_IP5_CR4);
- WRITE32(m_sreg[ES].limit, smram_state+SMRAM_IP5_ESLIM);
- WRITE32(m_sreg[ES].base, smram_state+SMRAM_IP5_ESBASE);
- WRITE32(m_sreg[ES].flags, smram_state+SMRAM_IP5_ESACC);
- WRITE32(m_sreg[CS].limit, smram_state+SMRAM_IP5_CSLIM);
- WRITE32(m_sreg[CS].base, smram_state+SMRAM_IP5_CSBASE);
- WRITE32(m_sreg[CS].flags, smram_state+SMRAM_IP5_CSACC);
- WRITE32(m_sreg[SS].limit, smram_state+SMRAM_IP5_SSLIM);
- WRITE32(m_sreg[SS].base, smram_state+SMRAM_IP5_SSBASE);
- WRITE32(m_sreg[SS].flags, smram_state+SMRAM_IP5_SSACC);
- WRITE32(m_sreg[DS].limit, smram_state+SMRAM_IP5_DSLIM);
- WRITE32(m_sreg[DS].base, smram_state+SMRAM_IP5_DSBASE);
- WRITE32(m_sreg[DS].flags, smram_state+SMRAM_IP5_DSACC);
- WRITE32(m_sreg[FS].limit, smram_state+SMRAM_IP5_FSLIM);
- WRITE32(m_sreg[FS].base, smram_state+SMRAM_IP5_FSBASE);
- WRITE32(m_sreg[FS].flags, smram_state+SMRAM_IP5_FSACC);
- WRITE32(m_sreg[GS].limit, smram_state+SMRAM_IP5_GSLIM);
- WRITE32(m_sreg[GS].base, smram_state+SMRAM_IP5_GSBASE);
- WRITE32(m_sreg[GS].flags, smram_state+SMRAM_IP5_GSACC);
- WRITE32(m_ldtr.flags, smram_state+SMRAM_IP5_LDTACC);
- WRITE32(m_ldtr.limit, smram_state+SMRAM_IP5_LDTLIM);
- WRITE32(m_ldtr.base, smram_state+SMRAM_IP5_LDTBASE);
- WRITE32(m_gdtr.limit, smram_state+SMRAM_IP5_GDTLIM);
- WRITE32(m_gdtr.base, smram_state+SMRAM_IP5_GDTBASE);
- WRITE32(m_idtr.limit, smram_state+SMRAM_IP5_IDTLIM);
- WRITE32(m_idtr.base, smram_state+SMRAM_IP5_IDTBASE);
- WRITE32(m_task.limit, smram_state+SMRAM_IP5_TRLIM);
- WRITE32(m_task.base, smram_state+SMRAM_IP5_TRBASE);
- WRITE32(m_task.flags, smram_state+SMRAM_IP5_TRACC);
-
- WRITE32(m_sreg[ES].selector, smram_state+SMRAM_ES);
- WRITE32(m_sreg[CS].selector, smram_state+SMRAM_CS);
- WRITE32(m_sreg[SS].selector, smram_state+SMRAM_SS);
- WRITE32(m_sreg[DS].selector, smram_state+SMRAM_DS);
- WRITE32(m_sreg[FS].selector, smram_state+SMRAM_FS);
- WRITE32(m_sreg[GS].selector, smram_state+SMRAM_GS);
- WRITE32(m_ldtr.segment, smram_state+SMRAM_LDTR);
- WRITE32(m_task.segment, smram_state+SMRAM_TR);
-
- WRITE32(m_dr[7], smram_state+SMRAM_DR7);
- WRITE32(m_dr[6], smram_state+SMRAM_DR6);
- WRITE32(REG32(EAX), smram_state+SMRAM_EAX);
- WRITE32(REG32(ECX), smram_state+SMRAM_ECX);
- WRITE32(REG32(EDX), smram_state+SMRAM_EDX);
- WRITE32(REG32(EBX), smram_state+SMRAM_EBX);
- WRITE32(REG32(ESP), smram_state+SMRAM_ESP);
- WRITE32(REG32(EBP), smram_state+SMRAM_EBP);
- WRITE32(REG32(ESI), smram_state+SMRAM_ESI);
- WRITE32(REG32(EDI), smram_state+SMRAM_EDI);
- WRITE32(m_eip, smram_state+SMRAM_EIP);
- WRITE32(old_flags, smram_state+SMRAM_EFLAGS);
- WRITE32(m_cr[3], smram_state+SMRAM_CR3);
- WRITE32(old_cr0, smram_state+SMRAM_CR0);
+ WRITE32(smram_state + SMRAM_IP5_CR4, m_cr[4]);
+ WRITE32(smram_state + SMRAM_IP5_ESLIM, m_sreg[ES].limit);
+ WRITE32(smram_state + SMRAM_IP5_ESBASE, m_sreg[ES].base);
+ WRITE32(smram_state + SMRAM_IP5_ESACC, m_sreg[ES].flags);
+ WRITE32(smram_state + SMRAM_IP5_CSLIM, m_sreg[CS].limit);
+ WRITE32(smram_state + SMRAM_IP5_CSBASE, m_sreg[CS].base);
+ WRITE32(smram_state + SMRAM_IP5_CSACC, m_sreg[CS].flags);
+ WRITE32(smram_state + SMRAM_IP5_SSLIM, m_sreg[SS].limit);
+ WRITE32(smram_state + SMRAM_IP5_SSBASE, m_sreg[SS].base);
+ WRITE32(smram_state + SMRAM_IP5_SSACC, m_sreg[SS].flags);
+ WRITE32(smram_state + SMRAM_IP5_DSLIM, m_sreg[DS].limit);
+ WRITE32(smram_state + SMRAM_IP5_DSBASE, m_sreg[DS].base);
+ WRITE32(smram_state + SMRAM_IP5_DSACC, m_sreg[DS].flags);
+ WRITE32(smram_state + SMRAM_IP5_FSLIM, m_sreg[FS].limit);
+ WRITE32(smram_state + SMRAM_IP5_FSBASE, m_sreg[FS].base);
+ WRITE32(smram_state + SMRAM_IP5_FSACC, m_sreg[FS].flags);
+ WRITE32(smram_state + SMRAM_IP5_GSLIM, m_sreg[GS].limit);
+ WRITE32(smram_state + SMRAM_IP5_GSBASE, m_sreg[GS].base);
+ WRITE32(smram_state + SMRAM_IP5_GSACC, m_sreg[GS].flags);
+ WRITE32(smram_state + SMRAM_IP5_LDTACC, m_ldtr.flags);
+ WRITE32(smram_state + SMRAM_IP5_LDTLIM, m_ldtr.limit);
+ WRITE32(smram_state + SMRAM_IP5_LDTBASE, m_ldtr.base);
+ WRITE32(smram_state + SMRAM_IP5_GDTLIM, m_gdtr.limit);
+ WRITE32(smram_state + SMRAM_IP5_GDTBASE, m_gdtr.base);
+ WRITE32(smram_state + SMRAM_IP5_IDTLIM, m_idtr.limit);
+ WRITE32(smram_state + SMRAM_IP5_IDTBASE, m_idtr.base);
+ WRITE32(smram_state + SMRAM_IP5_TRLIM, m_task.limit);
+ WRITE32(smram_state + SMRAM_IP5_TRBASE, m_task.base);
+ WRITE32(smram_state + SMRAM_IP5_TRACC, m_task.flags);
+
+ WRITE32(smram_state + SMRAM_ES, m_sreg[ES].selector);
+ WRITE32(smram_state + SMRAM_CS, m_sreg[CS].selector);
+ WRITE32(smram_state + SMRAM_SS, m_sreg[SS].selector);
+ WRITE32(smram_state + SMRAM_DS, m_sreg[DS].selector);
+ WRITE32(smram_state + SMRAM_FS, m_sreg[FS].selector);
+ WRITE32(smram_state + SMRAM_GS, m_sreg[GS].selector);
+ WRITE32(smram_state + SMRAM_LDTR, m_ldtr.segment);
+ WRITE32(smram_state + SMRAM_TR, m_task.segment);
+
+ WRITE32(smram_state + SMRAM_DR7, m_dr[7]);
+ WRITE32(smram_state + SMRAM_DR6, m_dr[6]);
+ WRITE32(smram_state + SMRAM_EAX, REG32(EAX));
+ WRITE32(smram_state + SMRAM_ECX, REG32(ECX));
+ WRITE32(smram_state + SMRAM_EDX, REG32(EDX));
+ WRITE32(smram_state + SMRAM_EBX, REG32(EBX));
+ WRITE32(smram_state + SMRAM_ESP, REG32(ESP));
+ WRITE32(smram_state + SMRAM_EBP, REG32(EBP));
+ WRITE32(smram_state + SMRAM_ESI, REG32(ESI));
+ WRITE32(smram_state + SMRAM_EDI, REG32(EDI));
+ WRITE32(smram_state + SMRAM_EIP, m_eip);
+ WRITE32(smram_state + SMRAM_EFLAGS, old_flags);
+ WRITE32(smram_state + SMRAM_CR3, m_cr[3]);
+ WRITE32(smram_state + SMRAM_CR0, old_cr0);
m_sreg[DS].selector = m_sreg[ES].selector = m_sreg[FS].selector = m_sreg[GS].selector = m_sreg[SS].selector = 0;
m_sreg[DS].base = m_sreg[ES].base = m_sreg[FS].base = m_sreg[GS].base = m_sreg[SS].base = 0x00000000;
diff --git a/src/devices/cpu/m6502/m6502.cpp b/src/devices/cpu/m6502/m6502.cpp
index 2cbded54949..39975d6127b 100644
--- a/src/devices/cpu/m6502/m6502.cpp
+++ b/src/devices/cpu/m6502/m6502.cpp
@@ -64,6 +64,7 @@ void m6502_device::init()
save_item(NAME(PC));
save_item(NAME(NPC));
+ save_item(NAME(PPC));
save_item(NAME(A));
save_item(NAME(X));
save_item(NAME(Y));
diff --git a/src/devices/cpu/m68000/m68000.h b/src/devices/cpu/m68000/m68000.h
index a6a885d6f54..bc14bea27dc 100644
--- a/src/devices/cpu/m68000/m68000.h
+++ b/src/devices/cpu/m68000/m68000.h
@@ -10,43 +10,30 @@
#define softfloat_h 1
#include "softfloat/milieu.h"
#include "softfloat/softfloat.h"
+extern flag floatx80_is_nan(floatx80 a);
#endif
/* MMU constants */
-#define MMU_ATC_ENTRIES (22) // 68851 has 64, 030 has 22
+constexpr int MMU_ATC_ENTRIES = (22); // 68851 has 64, 030 has 22
/* instruction cache constants */
-#define M68K_IC_SIZE 128
-
-
-
-
-#define m68ki_check_address_error(m68k, ADDR, WRITE_MODE, FC) \
- if((ADDR)&1) \
- { \
- m68k->aerr_address = ADDR; \
- m68k->aerr_write_mode = WRITE_MODE; \
- m68k->aerr_fc = FC; \
- throw 10; \
- }
-
-
+constexpr int M68K_IC_SIZE = 128;
/* There are 7 levels of interrupt to the 68K.
* A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
*/
-#define M68K_IRQ_NONE 0
-#define M68K_IRQ_1 1
-#define M68K_IRQ_2 2
-#define M68K_IRQ_3 3
-#define M68K_IRQ_4 4
-#define M68K_IRQ_5 5
-#define M68K_IRQ_6 6
-#define M68K_IRQ_7 7
+constexpr int M68K_IRQ_NONE = 0;
+constexpr int M68K_IRQ_1 = 1;
+constexpr int M68K_IRQ_2 = 2;
+constexpr int M68K_IRQ_3 = 3;
+constexpr int M68K_IRQ_4 = 4;
+constexpr int M68K_IRQ_5 = 5;
+constexpr int M68K_IRQ_6 = 6;
+constexpr int M68K_IRQ_7 = 7;
// special input lines
-#define M68K_LINE_BUSERROR 16
+constexpr int M68K_LINE_BUSERROR = 16;
/* CPU types for use in m68k_set_cpu_type() */
enum
@@ -78,9 +65,9 @@ enum
};
/* HMMU enable types for use with m68k_set_hmmu_enable() */
-#define M68K_HMMU_DISABLE 0 /* no translation */
-#define M68K_HMMU_ENABLE_II 1 /* Mac II style fixed translation */
-#define M68K_HMMU_ENABLE_LC 2 /* Mac LC style fixed translation */
+constexpr int M68K_HMMU_DISABLE = 0; /* no translation */
+constexpr int M68K_HMMU_ENABLE_II = 1; /* Mac II style fixed translation */
+constexpr int M68K_HMMU_ENABLE_LC = 2; /* Mac LC style fixed translation */
/* Special interrupt acknowledge values.
* Use these as special returns from the interrupt acknowledge callback
@@ -91,30 +78,25 @@ enum
* This happens in a real 68K if VPA or AVEC is asserted during an interrupt
* acknowledge cycle instead of DTACK.
*/
-#define M68K_INT_ACK_AUTOVECTOR 0xffffffff
+constexpr uint32_t M68K_INT_ACK_AUTOVECTOR = 0xffffffff;
/* Causes the spurious interrupt vector (0x18) to be taken
* This happens in a real 68K if BERR is asserted during the interrupt
* acknowledge cycle (i.e. no devices responded to the acknowledge).
*/
-#define M68K_INT_ACK_SPURIOUS 0xfffffffe
+constexpr uint32_t M68K_INT_ACK_SPURIOUS = 0xfffffffe;
enum
{
/* NOTE: M68K_SP fetches the current SP, be it USP, ISP, or MSP */
M68K_PC = STATE_GENPC, M68K_SP = 1, M68K_ISP, M68K_USP, M68K_MSP, M68K_SR, M68K_VBR,
- M68K_SFC, M68K_DFC, M68K_CACR, M68K_CAAR, M68K_PREF_ADDR, M68K_PREF_DATA,
+ M68K_SFC, M68K_DFC, M68K_CACR, M68K_CAAR, M68K_IR, M68K_PREF_ADDR, M68K_PREF_DATA,
M68K_D0, M68K_D1, M68K_D2, M68K_D3, M68K_D4, M68K_D5, M68K_D6, M68K_D7,
M68K_A0, M68K_A1, M68K_A2, M68K_A3, M68K_A4, M68K_A5, M68K_A6, M68K_A7,
M68K_FP0, M68K_FP1, M68K_FP2, M68K_FP3, M68K_FP4, M68K_FP5, M68K_FP6, M68K_FP7,
M68K_FPSR, M68K_FPCR
};
-class m68000_base_device;
-
-
-extern const device_type M68K;
-
class m68000_base_device : public cpu_device
{
public:
@@ -122,6 +104,7 @@ public:
// construction/destruction
m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+protected:
void presave();
void postload();
@@ -150,6 +133,7 @@ public:
void define_state(void);
+public:
void set_reset_callback(write_line_delegate callback);
void set_cmpild_callback(write32_delegate callback);
void set_rte_callback(write_line_delegate callback);
@@ -157,8 +141,6 @@ public:
uint16_t get_fc();
void set_hmmu_enable(int enable);
void set_fpu_enable(int enable);
- int get_fpu_enable();
- void set_instruction_hook(read32_delegate ihook);
void set_buserror_details(uint32_t fault_addr, uint8_t rw, uint8_t fc);
protected:
@@ -168,91 +150,89 @@ protected:
m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map);
-private:
- int has_fpu; /* Indicates if a FPU is available (yes on 030, 040, may be on 020) */
-public:
-
-
- uint32_t cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */
-// uint32_t dasm_type; /* disassembly type */
- uint32_t dar[16]; /* Data and Address Registers */
- uint32_t ppc; /* Previous program counter */
- uint32_t pc; /* Program Counter */
- uint32_t sp[7]; /* User, Interrupt, and Master Stack Pointers */
- uint32_t vbr; /* Vector Base Register (m68010+) */
- uint32_t sfc; /* Source Function Code Register (m68010+) */
- uint32_t dfc; /* Destination Function Code Register (m68010+) */
- uint32_t cacr; /* Cache Control Register (m68020, unemulated) */
- uint32_t caar; /* Cache Address Register (m68020, unemulated) */
- uint32_t ir; /* Instruction Register */
- floatx80 fpr[8]; /* FPU Data Register (m68030/040) */
- uint32_t fpiar; /* FPU Instruction Address Register (m68040) */
- uint32_t fpsr; /* FPU Status Register (m68040) */
- uint32_t fpcr; /* FPU Control Register (m68040) */
- uint32_t t1_flag; /* Trace 1 */
- uint32_t t0_flag; /* Trace 0 */
- uint32_t s_flag; /* Supervisor */
- uint32_t m_flag; /* Master/Interrupt state */
- uint32_t x_flag; /* Extend */
- uint32_t n_flag; /* Negative */
- uint32_t not_z_flag; /* Zero, inverted for speedups */
- uint32_t v_flag; /* Overflow */
- uint32_t c_flag; /* Carry */
- uint32_t int_mask; /* I0-I2 */
- uint32_t int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
- uint32_t stopped; /* Stopped state */
- uint32_t pref_addr; /* Last prefetch address */
- uint32_t pref_data; /* Data in the prefetch queue */
- uint32_t sr_mask; /* Implemented status register bits */
- uint32_t instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
- uint32_t run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
- int has_pmmu; /* Indicates if a PMMU available (yes on 030, 040, no on EC030) */
- int has_hmmu; /* Indicates if an Apple HMMU is available in place of the 68851 (020 only) */
- int pmmu_enabled; /* Indicates if the PMMU is enabled */
- int hmmu_enabled; /* Indicates if the HMMU is enabled */
- int fpu_just_reset; /* Indicates the FPU was just reset */
+ int m_has_fpu; /* Indicates if a FPU is available (yes on 030, 040, may be on 020) */
+
+
+ uint32_t m_cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */
+//
+ uint32_t m_dar[16]; /* Data and Address Registers */
+ uint32_t m_ppc; /* Previous program counter */
+ uint32_t m_pc; /* Program Counter */
+ uint32_t m_sp[7]; /* User, Interrupt, and Master Stack Pointers */
+ uint32_t m_vbr; /* Vector Base Register (m68010+) */
+ uint32_t m_sfc; /* Source Function Code Register (m68010+) */
+ uint32_t m_dfc; /* Destination Function Code Register (m68010+) */
+ uint32_t m_cacr; /* Cache Control Register (m68020, unemulated) */
+ uint32_t m_caar; /* Cache Address Register (m68020, unemulated) */
+ uint32_t m_ir; /* Instruction Register */
+ floatx80 m_fpr[8]; /* FPU Data Register (m68030/040) */
+ uint32_t m_fpiar; /* FPU Instruction Address Register (m68040) */
+ uint32_t m_fpsr; /* FPU Status Register (m68040) */
+ uint32_t m_fpcr; /* FPU Control Register (m68040) */
+ uint32_t m_t1_flag; /* Trace 1 */
+ uint32_t m_t0_flag; /* Trace 0 */
+ uint32_t m_s_flag; /* Supervisor */
+ uint32_t m_m_flag; /* Master/Interrupt state */
+ uint32_t m_x_flag; /* Extend */
+ uint32_t m_n_flag; /* Negative */
+ uint32_t m_not_z_flag; /* Zero, inverted for speedups */
+ uint32_t m_v_flag; /* Overflow */
+ uint32_t m_c_flag; /* Carry */
+ uint32_t m_int_mask; /* I0-I2 */
+ uint32_t m_int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
+ uint32_t m_stopped; /* Stopped state */
+ uint32_t m_pref_addr; /* Last prefetch address */
+ uint32_t m_pref_data; /* Data in the prefetch queue */
+ uint32_t m_sr_mask; /* Implemented status register bits */
+ uint32_t m_instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
+ uint32_t m_run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
+ int m_has_pmmu; /* Indicates if a PMMU available (yes on 030, 040, no on EC030) */
+ int m_has_hmmu; /* Indicates if an Apple HMMU is available in place of the 68851 (020 only) */
+ int m_pmmu_enabled; /* Indicates if the PMMU is enabled */
+ int m_hmmu_enabled; /* Indicates if the HMMU is enabled */
+ int m_fpu_just_reset; /* Indicates the FPU was just reset */
/* Clocks required for instructions / exceptions */
- uint32_t cyc_bcc_notake_b;
- uint32_t cyc_bcc_notake_w;
- uint32_t cyc_dbcc_f_noexp;
- uint32_t cyc_dbcc_f_exp;
- uint32_t cyc_scc_r_true;
- uint32_t cyc_movem_w;
- uint32_t cyc_movem_l;
- uint32_t cyc_shift;
- uint32_t cyc_reset;
-
- int initial_cycles;
- int remaining_cycles; /* Number of clocks remaining */
- int reset_cycles;
- uint32_t tracing;
+ uint32_t m_cyc_bcc_notake_b;
+ uint32_t m_cyc_bcc_notake_w;
+ uint32_t m_cyc_dbcc_f_noexp;
+ uint32_t m_cyc_dbcc_f_exp;
+ uint32_t m_cyc_scc_r_true;
+ uint32_t m_cyc_movem_w;
+ uint32_t m_cyc_movem_l;
+ uint32_t m_cyc_shift;
+ uint32_t m_cyc_reset;
+
+ int m_initial_cycles;
+ int m_remaining_cycles; /* Number of clocks remaining */
+ int m_reset_cycles;
+ uint32_t m_tracing;
int m_address_error;
- uint32_t aerr_address;
- uint32_t aerr_write_mode;
- uint32_t aerr_fc;
+ uint32_t m_aerr_address;
+ uint32_t m_aerr_write_mode;
+ uint32_t m_aerr_fc;
/* Virtual IRQ lines state */
- uint32_t virq_state;
- uint32_t nmi_pending;
+ uint32_t m_virq_state;
+ uint32_t m_nmi_pending;
- void (**jump_table)(m68000_base_device *m68k);
- const uint8_t* cyc_instruction;
- const uint8_t* cyc_exception;
+ void (m68000_base_device::**m_jump_table)();
+ const uint8_t* m_cyc_instruction;
+ const uint8_t* m_cyc_exception;
/* Callbacks to host */
- device_irq_acknowledge_delegate int_ack_callback; /* Interrupt Acknowledge */
- write32_delegate bkpt_ack_callback; /* Breakpoint Acknowledge */
- write_line_delegate reset_instr_callback; /* Called when a RESET instruction is encountered */
- write32_delegate cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */
- write_line_delegate rte_instr_callback; /* Called when a RTE instruction is encountered */
- write8_delegate tas_write_callback; /* Called instead of normal write8 by the TAS instruction,
+ device_irq_acknowledge_delegate m_int_ack_callback; /* Interrupt Acknowledge */
+ write32_delegate m_bkpt_ack_callback; /* Breakpoint Acknowledge */
+ write_line_delegate m_reset_instr_callback; /* Called when a RESET instruction is encountered */
+ write32_delegate m_cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */
+ write_line_delegate m_rte_instr_callback; /* Called when a RTE instruction is encountered */
+ write8_delegate m_tas_write_callback; /* Called instead of normal write8 by the TAS instruction,
allowing writeback to be disabled globally or selectively
or other side effects to be implemented */
- address_space *program, *oprogram;
+ address_space *m_program, *m_oprogram;
/* Redirect memory calls */
@@ -264,25 +244,21 @@ public:
typedef delegate<void (offs_t, uint16_t)> m68k_write16_delegate;
typedef delegate<void (offs_t, uint32_t)> m68k_write32_delegate;
-// class m68k_memory_interface
-// {
- public:
void init8(address_space &space, address_space &ospace);
void init16(address_space &space, address_space &ospace);
void init32(address_space &space, address_space &ospace);
void init32mmu(address_space &space, address_space &ospace);
void init32hmmu(address_space &space, address_space &ospace);
- offs_t opcode_xor; // Address Calculation
- m68k_readimm16_delegate readimm16; // Immediate read 16 bit
- m68k_read8_delegate read8;
- m68k_read16_delegate read16;
- m68k_read32_delegate read32;
- m68k_write8_delegate write8;
- m68k_write16_delegate write16;
- m68k_write32_delegate write32;
+ offs_t m_opcode_xor; // Address Calculation
+ m68k_readimm16_delegate m_readimm16; // Immediate read 16 bit
+ m68k_read8_delegate m_read8;
+ m68k_read16_delegate m_read16;
+ m68k_read32_delegate m_read32;
+ m68k_write8_delegate m_write8;
+ m68k_write16_delegate m_write16;
+ m68k_write32_delegate m_write32;
- private:
uint16_t m68008_read_immediate_16(offs_t address);
uint16_t read_immediate_16(offs_t address);
uint16_t simple_read_immediate_16(offs_t address);
@@ -305,57 +281,47 @@ public:
uint32_t readlong_d32_hmmu(offs_t address);
void writelong_d32_hmmu(offs_t address, uint32_t data);
-// m68000_base_device *m_cpustate;
-// };
-
- public:
-// m68k_memory_interface memory;
address_space *m_space, *m_ospace;
direct_read_data<0> *m_direct, *m_odirect;
- uint32_t iotemp;
+ uint32_t m_iotemp;
/* save state data */
- uint16_t save_sr;
- uint8_t save_stopped;
- uint8_t save_halted;
+ uint16_t m_save_sr;
+ uint8_t m_save_stopped;
+ uint8_t m_save_halted;
/* PMMU registers */
- uint32_t mmu_crp_aptr, mmu_crp_limit;
- uint32_t mmu_srp_aptr, mmu_srp_limit;
- uint32_t mmu_urp_aptr; /* 040 only */
- uint32_t mmu_tc;
- uint16_t mmu_sr;
- uint32_t mmu_sr_040;
- uint32_t mmu_atc_tag[MMU_ATC_ENTRIES], mmu_atc_data[MMU_ATC_ENTRIES];
- uint32_t mmu_atc_rr;
- uint32_t mmu_tt0, mmu_tt1;
- uint32_t mmu_itt0, mmu_itt1, mmu_dtt0, mmu_dtt1;
- uint32_t mmu_acr0, mmu_acr1, mmu_acr2, mmu_acr3;
- uint32_t mmu_last_page_entry, mmu_last_page_entry_addr;
-
- uint16_t mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */
- uint16_t mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */
- uint16_t mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */
- uint32_t mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */
- uint16_t mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */
- uint16_t mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */
- uint16_t mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */
-
- uint32_t ic_address[M68K_IC_SIZE]; /* instruction cache address data */
- uint32_t ic_data[M68K_IC_SIZE]; /* instruction cache content data */
- bool ic_valid[M68K_IC_SIZE]; /* instruction cache valid flags */
+ uint32_t m_mmu_crp_aptr, m_mmu_crp_limit;
+ uint32_t m_mmu_srp_aptr, m_mmu_srp_limit;
+ uint32_t m_mmu_urp_aptr; /* 040 only */
+ uint32_t m_mmu_tc;
+ uint16_t m_mmu_sr;
+ uint32_t m_mmu_sr_040;
+ uint32_t m_mmu_atc_tag[MMU_ATC_ENTRIES], m_mmu_atc_data[MMU_ATC_ENTRIES];
+ uint32_t m_mmu_atc_rr;
+ uint32_t m_mmu_tt0, m_mmu_tt1;
+ uint32_t m_mmu_itt0, m_mmu_itt1, m_mmu_dtt0, m_mmu_dtt1;
+ uint32_t m_mmu_acr0, m_mmu_acr1, m_mmu_acr2, m_mmu_acr3;
+ uint32_t m_mmu_last_page_entry, m_mmu_last_page_entry_addr;
+
+ uint16_t m_mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */
+ uint16_t m_mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */
+ uint16_t m_mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */
+ uint32_t m_mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */
+ uint16_t m_mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */
+ uint16_t m_mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */
+ uint16_t m_mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */
+
+ uint32_t m_ic_address[M68K_IC_SIZE]; /* instruction cache address data */
+ uint32_t m_ic_data[M68K_IC_SIZE]; /* instruction cache content data */
+ bool m_ic_valid[M68K_IC_SIZE]; /* instruction cache valid flags */
/* 68307 / 68340 internal address map */
- address_space *internal;
-
-
-
- /* external instruction hook (does not depend on debug mode) */
- read32_delegate instruction_hook;
+ address_space *m_internal;
@@ -378,10 +344,18 @@ public:
void init_cpu_coldfire(void);
- void m68ki_exception_interrupt(m68000_base_device *m68k, uint32_t int_level);
+ void m68ki_exception_interrupt(uint32_t int_level);
- void reset_cpu(void);
- inline void cpu_execute(void);
+ inline void m68ki_check_address_error(uint32_t ADDR, uint32_t WRITE_MODE, uint32_t FC)
+ {
+ if((ADDR)&1)
+ {
+ m_aerr_address = ADDR;
+ m_aerr_write_mode = WRITE_MODE;
+ m_aerr_fc = FC;
+ throw 10;
+ }
+ }
// device_state_interface overrides
virtual void state_import(const device_state_entry &entry) override;
@@ -390,6 +364,11 @@ public:
// device_memory_interface overrides
virtual bool memory_translate(int space, int intention, offs_t &address) override;
+
+#include "m68kcpu.h"
+#include "m68kops.h"
+#include "m68kfpu.hxx"
+#include "m68kmmu.h"
};
diff --git a/src/devices/cpu/m68000/m68k_in.cpp b/src/devices/cpu/m68000/m68k_in.cpp
index 3b557865db9..08538d33443 100644
--- a/src/devices/cpu/m68000/m68k_in.cpp
+++ b/src/devices/cpu/m68000/m68k_in.cpp
@@ -83,6 +83,26 @@ M68KMAKE_PROTOTYPE_HEADER
// license:BSD-3-Clause
// copyright-holders:Karl Stenerud
+
+static constexpr int NUM_CPU_TYPES = 7;
+
+typedef void (m68000_base_device::*opcode_handler_ptr)();
+static opcode_handler_ptr m68ki_instruction_jump_table[NUM_CPU_TYPES][0x10000]; /* opcode handler jump table */
+static unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */
+
+/* This is used to generate the opcode handler jump table */
+struct opcode_handler_struct
+{
+ opcode_handler_ptr opcode_handler; /* handler function */
+ unsigned int mask; /* mask on opcode */
+ unsigned int match; /* what to match after masking */
+ unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */
+};
+
+/* Build the opcode handler table */
+static void m68ki_set_one(unsigned short opcode, const opcode_handler_struct *s);
+static void m68ki_build_opcode_table(void);
+
/* ======================================================================== */
/* ============================ OPCODE HANDLERS =========================== */
/* ======================================================================== */
@@ -92,13 +112,6 @@ M68KMAKE_PROTOTYPE_HEADER
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
M68KMAKE_PROTOTYPE_FOOTER
-/* Build the opcode handler table */
-void m68ki_build_opcode_table(void);
-
-extern void (*m68ki_instruction_jump_table[][0x10000])(m68000_base_device *m68k); /* opcode handler jump table */
-extern unsigned char m68ki_cycles[][0x10000];
-
-
/* ======================================================================== */
/* ============================== END OF FILE ============================= */
/* ======================================================================== */
@@ -113,23 +126,22 @@ M68KMAKE_TABLE_HEADER
/* ========================= OPCODE TABLE BUILDER ========================= */
/* ======================================================================== */
-#include "m68kops.h"
+m68000_base_device::opcode_handler_ptr m68000_base_device::m68ki_instruction_jump_table[NUM_CPU_TYPES][0x10000]; /* opcode handler jump table */
+unsigned char m68000_base_device::m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */
-#define NUM_CPU_TYPES 7
-
-void (*m68ki_instruction_jump_table[NUM_CPU_TYPES][0x10000])(m68000_base_device *m68k); /* opcode handler jump table */
-unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */
+/* Build the opcode handler jump table */
-/* This is used to generate the opcode handler jump table */
-struct opcode_handler_struct
+void m68000_base_device::m68ki_set_one(unsigned short opcode, const opcode_handler_struct *s)
{
- void (*opcode_handler)(m68000_base_device *m68k); /* handler function */
- unsigned int mask; /* mask on opcode */
- unsigned int match; /* what to match after masking */
- unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */
-};
-
+ for(int i=0; i<NUM_CPU_TYPES; i++)
+ if(s->cycles[i] != 0xff) {
+ m68ki_cycles[i][opcode] = s->cycles[i];
+ m68ki_instruction_jump_table[i][opcode] = s->opcode_handler;
+ }
+}
+void m68000_base_device::m68ki_build_opcode_table(void)
+{
/* Opcode handler table */
static const opcode_handler_struct m68k_opcode_handler_table[] =
{
@@ -144,19 +156,6 @@ M68KMAKE_TABLE_FOOTER
};
-/* Build the opcode handler jump table */
-
-static void m68ki_set_one(unsigned short opcode, const opcode_handler_struct *s)
-{
- for(int i=0; i<NUM_CPU_TYPES; i++)
- if(s->cycles[i] != 0xff) {
- m68ki_cycles[i][opcode] = s->cycles[i];
- m68ki_instruction_jump_table[i][opcode] = s->opcode_handler;
- }
-}
-
-void m68ki_build_opcode_table(void)
-{
const opcode_handler_struct *ostruct;
int i;
int j;
@@ -167,7 +166,7 @@ void m68ki_build_opcode_table(void)
/* default to illegal */
for(k=0;k<NUM_CPU_TYPES;k++)
{
- m68ki_instruction_jump_table[k][i] = m68000_base_device_ops::m68k_op_illegal;
+ m68ki_instruction_jump_table[k][i] = &m68000_base_device::m68k_op_illegal;
m68ki_cycles[k][i] = 0;
}
}
@@ -261,11 +260,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
M68KMAKE_OPCODE_HANDLER_HEADER
#include "emu.h"
-#include "m68kcpu.h"
-extern void m68040_fpu_op0(m68000_base_device *m68k);
-extern void m68040_fpu_op1(m68000_base_device *m68k);
-extern void m68881_mmu_ops(m68000_base_device *m68k);
-extern void m68881_ftrap(m68000_base_device *m68k);
+#include "m68000.h"
/* ======================================================================== */
/* ========================= INSTRUCTION HANDLERS ========================= */
@@ -890,61 +885,61 @@ M68KMAKE_OPCODE_HANDLER_BODY
M68KMAKE_OP(1010, 0, ., .)
{
- m68ki_exception_1010(mc68kcpu);
+ m68ki_exception_1010();
}
M68KMAKE_OP(1111, 0, ., .)
{
- m68ki_exception_1111(mc68kcpu);
+ m68ki_exception_1111();
}
M68KMAKE_OP(040fpu0, 32, ., .)
{
- if((mc68kcpu)->get_fpu_enable())
+ if(m_has_fpu)
{
- m68040_fpu_op0(mc68kcpu);
+ m68040_fpu_op0();
return;
}
- m68ki_exception_1111(mc68kcpu);
+ m68ki_exception_1111();
}
M68KMAKE_OP(040fpu1, 32, ., .)
{
- if((mc68kcpu)->get_fpu_enable())
+ if(m_has_fpu)
{
- m68040_fpu_op1(mc68kcpu);
+ m68040_fpu_op1();
return;
}
- m68ki_exception_1111(mc68kcpu);
+ m68ki_exception_1111();
}
M68KMAKE_OP(abcd, 8, rr, .)
{
- uint32_t* r_dst = &DX(mc68kcpu);
- uint32_t src = DY(mc68kcpu);
+ uint32_t* r_dst = &DX();
+ uint32_t src = DY();
uint32_t dst = *r_dst;
- uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu);
+ uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1();
uint32_t corf = 0;
if(res > 9)
corf = 6;
res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
- (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
+ m_v_flag = ~res; /* Undefined V behavior */
res += corf;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8;
- if((mc68kcpu)->c_flag)
+ m_x_flag = m_c_flag = (res > 0x9f) << 8;
+ if(m_c_flag)
res -= 0xa0;
- (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */
- (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */
+ m_v_flag &= res; /* Undefined V behavior part II */
+ m_n_flag = NFLAG_8(res); /* Undefined N behavior */
res = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
}
@@ -952,307 +947,307 @@ M68KMAKE_OP(abcd, 8, rr, .)
M68KMAKE_OP(abcd, 8, mm, ax7)
{
- uint32_t src = OPER_AY_PD_8(mc68kcpu);
- uint32_t ea = EA_A7_PD_8(mc68kcpu);
- uint32_t dst = m68ki_read_8((mc68kcpu), ea);
- uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_8();
+ uint32_t ea = EA_A7_PD_8();
+ uint32_t dst = m68ki_read_8(ea);
+ uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1();
uint32_t corf = 0;
if(res > 9)
corf = 6;
res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
- (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
+ m_v_flag = ~res; /* Undefined V behavior */
res += corf;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8;
- if((mc68kcpu)->c_flag)
+ m_x_flag = m_c_flag = (res > 0x9f) << 8;
+ if(m_c_flag)
res -= 0xa0;
- (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */
- (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */
+ m_v_flag &= res; /* Undefined V behavior part II */
+ m_n_flag = NFLAG_8(res); /* Undefined N behavior */
res = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
}
M68KMAKE_OP(abcd, 8, mm, ay7)
{
- uint32_t src = OPER_A7_PD_8(mc68kcpu);
- uint32_t ea = EA_AX_PD_8(mc68kcpu);
- uint32_t dst = m68ki_read_8((mc68kcpu), ea);
- uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu);
+ uint32_t src = OPER_A7_PD_8();
+ uint32_t ea = EA_AX_PD_8();
+ uint32_t dst = m68ki_read_8(ea);
+ uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1();
uint32_t corf = 0;
if(res > 9)
corf = 6;
res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
- (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
+ m_v_flag = ~res; /* Undefined V behavior */
res += corf;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8;
- if((mc68kcpu)->c_flag)
+ m_x_flag = m_c_flag = (res > 0x9f) << 8;
+ if(m_c_flag)
res -= 0xa0;
- (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */
- (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */
+ m_v_flag &= res; /* Undefined V behavior part II */
+ m_n_flag = NFLAG_8(res); /* Undefined N behavior */
res = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
}
M68KMAKE_OP(abcd, 8, mm, axy7)
{
- uint32_t src = OPER_A7_PD_8(mc68kcpu);
- uint32_t ea = EA_A7_PD_8(mc68kcpu);
- uint32_t dst = m68ki_read_8((mc68kcpu), ea);
- uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu);
+ uint32_t src = OPER_A7_PD_8();
+ uint32_t ea = EA_A7_PD_8();
+ uint32_t dst = m68ki_read_8(ea);
+ uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1();
uint32_t corf = 0;
if(res > 9)
corf = 6;
res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
- (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
+ m_v_flag = ~res; /* Undefined V behavior */
res += corf;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8;
- if((mc68kcpu)->c_flag)
+ m_x_flag = m_c_flag = (res > 0x9f) << 8;
+ if(m_c_flag)
res -= 0xa0;
- (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */
- (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */
+ m_v_flag &= res; /* Undefined V behavior part II */
+ m_n_flag = NFLAG_8(res); /* Undefined N behavior */
res = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
}
M68KMAKE_OP(abcd, 8, mm, .)
{
- uint32_t src = OPER_AY_PD_8(mc68kcpu);
- uint32_t ea = EA_AX_PD_8(mc68kcpu);
- uint32_t dst = m68ki_read_8((mc68kcpu), ea);
- uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_8();
+ uint32_t ea = EA_AX_PD_8();
+ uint32_t dst = m68ki_read_8(ea);
+ uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_1();
uint32_t corf = 0;
if(res > 9)
corf = 6;
res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
- (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
+ m_v_flag = ~res; /* Undefined V behavior */
res += corf;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (res > 0x9f) << 8;
- if((mc68kcpu)->c_flag)
+ m_x_flag = m_c_flag = (res > 0x9f) << 8;
+ if(m_c_flag)
res -= 0xa0;
- (mc68kcpu)->v_flag &= res; /* Undefined V behavior part II */
- (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */
+ m_v_flag &= res; /* Undefined V behavior part II */
+ m_n_flag = NFLAG_8(res); /* Undefined N behavior */
res = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
}
M68KMAKE_OP(add, 8, er, d)
{
- uint32_t* r_dst = &DX(mc68kcpu);
- uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t* r_dst = &DX();
+ uint32_t src = MASK_OUT_ABOVE_8(DY());
uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_v_flag = VFLAG_ADD_8(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
- *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag;
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag;
}
M68KMAKE_OP(add, 8, er, .)
{
- uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t* r_dst = &DX();
uint32_t src = M68KMAKE_GET_OPER_AY_8;
uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_v_flag = VFLAG_ADD_8(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
- *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag;
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag;
}
M68KMAKE_OP(add, 16, er, d)
{
- uint32_t* r_dst = &DX(mc68kcpu);
- uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t* r_dst = &DX();
+ uint32_t src = MASK_OUT_ABOVE_16(DY());
uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_v_flag = VFLAG_ADD_16(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
- *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag;
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag;
}
M68KMAKE_OP(add, 16, er, a)
{
- uint32_t* r_dst = &DX(mc68kcpu);
- uint32_t src = MASK_OUT_ABOVE_16(AY(mc68kcpu));
+ uint32_t* r_dst = &DX();
+ uint32_t src = MASK_OUT_ABOVE_16(AY());
uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_v_flag = VFLAG_ADD_16(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
- *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag;
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag;
}
M68KMAKE_OP(add, 16, er, .)
{
- uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t* r_dst = &DX();
uint32_t src = M68KMAKE_GET_OPER_AY_16;
uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_v_flag = VFLAG_ADD_16(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
- *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag;
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag;
}
M68KMAKE_OP(add, 32, er, d)
{
- uint32_t* r_dst = &DX(mc68kcpu);
- uint32_t src = DY(mc68kcpu);
+ uint32_t* r_dst = &DX();
+ uint32_t src = DY();
uint32_t dst = *r_dst;
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_n_flag = NFLAG_32(res);
+ m_v_flag = VFLAG_ADD_32(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
- *r_dst = (mc68kcpu)->not_z_flag;
+ *r_dst = m_not_z_flag;
}
M68KMAKE_OP(add, 32, er, a)
{
- uint32_t* r_dst = &DX(mc68kcpu);
- uint32_t src = AY(mc68kcpu);
+ uint32_t* r_dst = &DX();
+ uint32_t src = AY();
uint32_t dst = *r_dst;
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_n_flag = NFLAG_32(res);
+ m_v_flag = VFLAG_ADD_32(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
- *r_dst = (mc68kcpu)->not_z_flag;
+ *r_dst = m_not_z_flag;
}
M68KMAKE_OP(add, 32, er, .)
{
- uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t* r_dst = &DX();
uint32_t src = M68KMAKE_GET_OPER_AY_32;
uint32_t dst = *r_dst;
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_n_flag = NFLAG_32(res);
+ m_v_flag = VFLAG_ADD_32(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
- *r_dst = (mc68kcpu)->not_z_flag;
+ *r_dst = m_not_z_flag;
}
M68KMAKE_OP(add, 8, re, .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t src = MASK_OUT_ABOVE_8(DX(mc68kcpu));
- uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t src = MASK_OUT_ABOVE_8(DX());
+ uint32_t dst = m68ki_read_8(ea);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_v_flag = VFLAG_ADD_8(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
- m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag);
+ m68ki_write_8(ea, m_not_z_flag);
}
M68KMAKE_OP(add, 16, re, .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- uint32_t src = MASK_OUT_ABOVE_16(DX(mc68kcpu));
- uint32_t dst = m68ki_read_16((mc68kcpu), ea);
+ uint32_t src = MASK_OUT_ABOVE_16(DX());
+ uint32_t dst = m68ki_read_16(ea);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_v_flag = VFLAG_ADD_16(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
- m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag);
+ m68ki_write_16(ea, m_not_z_flag);
}
M68KMAKE_OP(add, 32, re, .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_32;
- uint32_t src = DX(mc68kcpu);
- uint32_t dst = m68ki_read_32((mc68kcpu), ea);
+ uint32_t src = DX();
+ uint32_t dst = m68ki_read_32(ea);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_n_flag = NFLAG_32(res);
+ m_v_flag = VFLAG_ADD_32(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
- m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag);
+ m68ki_write_32(ea, m_not_z_flag);
}
M68KMAKE_OP(adda, 16, ., d)
{
- uint32_t* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX();
- *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY(mc68kcpu)));
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY()));
}
M68KMAKE_OP(adda, 16, ., a)
{
- uint32_t* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX();
- *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY(mc68kcpu)));
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY()));
}
M68KMAKE_OP(adda, 16, ., .)
{
- uint32_t* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX();
uint32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
*r_dst = MASK_OUT_ABOVE_32(*r_dst + src);
@@ -1261,23 +1256,23 @@ M68KMAKE_OP(adda, 16, ., .)
M68KMAKE_OP(adda, 32, ., d)
{
- uint32_t* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX();
- *r_dst = MASK_OUT_ABOVE_32(*r_dst + DY(mc68kcpu));
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + DY());
}
M68KMAKE_OP(adda, 32, ., a)
{
- uint32_t* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX();
- *r_dst = MASK_OUT_ABOVE_32(*r_dst + AY(mc68kcpu));
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + AY());
}
M68KMAKE_OP(adda, 32, ., .)
{
- uint32_t* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX();
uint32_t src = M68KMAKE_GET_OPER_AY_32;
*r_dst = MASK_OUT_ABOVE_32(*r_dst + src);
@@ -1286,226 +1281,226 @@ M68KMAKE_OP(adda, 32, ., .)
M68KMAKE_OP(addi, 8, ., d)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t* r_dst = &DY();
+ uint32_t src = OPER_I_8();
uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_v_flag = VFLAG_ADD_8(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
- *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag;
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag;
}
M68KMAKE_OP(addi, 8, ., .)
{
- uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t src = OPER_I_8();
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t dst = m68ki_read_8(ea);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_v_flag = VFLAG_ADD_8(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
- m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag);
+ m68ki_write_8(ea, m_not_z_flag);
}
M68KMAKE_OP(addi, 16, ., d)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t* r_dst = &DY();
+ uint32_t src = OPER_I_16();
uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_v_flag = VFLAG_ADD_16(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
- *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag;
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag;
}
M68KMAKE_OP(addi, 16, ., .)
{
- uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t src = OPER_I_16();
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- uint32_t dst = m68ki_read_16((mc68kcpu), ea);
+ uint32_t dst = m68ki_read_16(ea);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_v_flag = VFLAG_ADD_16(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
- m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag);
+ m68ki_write_16(ea, m_not_z_flag);
}
M68KMAKE_OP(addi, 32, ., d)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t* r_dst = &DY();
+ uint32_t src = OPER_I_32();
uint32_t dst = *r_dst;
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_n_flag = NFLAG_32(res);
+ m_v_flag = VFLAG_ADD_32(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
- *r_dst = (mc68kcpu)->not_z_flag;
+ *r_dst = m_not_z_flag;
}
M68KMAKE_OP(addi, 32, ., .)
{
- uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t src = OPER_I_32();
uint32_t ea = M68KMAKE_GET_EA_AY_32;
- uint32_t dst = m68ki_read_32((mc68kcpu), ea);
+ uint32_t dst = m68ki_read_32(ea);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_n_flag = NFLAG_32(res);
+ m_v_flag = VFLAG_ADD_32(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
- m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag);
+ m68ki_write_32(ea, m_not_z_flag);
}
M68KMAKE_OP(addq, 8, ., d)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t src = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_v_flag = VFLAG_ADD_8(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
- *r_dst = MASK_OUT_BELOW_8(*r_dst) | (mc68kcpu)->not_z_flag;
+ *r_dst = MASK_OUT_BELOW_8(*r_dst) | m_not_z_flag;
}
M68KMAKE_OP(addq, 8, ., .)
{
- uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t dst = m68ki_read_8(ea);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_v_flag = VFLAG_ADD_8(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
- m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag);
+ m68ki_write_8(ea, m_not_z_flag);
}
M68KMAKE_OP(addq, 16, ., d)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t src = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_v_flag = VFLAG_ADD_16(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
- *r_dst = MASK_OUT_BELOW_16(*r_dst) | (mc68kcpu)->not_z_flag;
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | m_not_z_flag;
}
M68KMAKE_OP(addq, 16, ., a)
{
- uint32_t* r_dst = &AY(mc68kcpu);
+ uint32_t* r_dst = &AY();
- *r_dst = MASK_OUT_ABOVE_32(*r_dst + ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1);
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((m_ir >> 9) - 1) & 7) + 1);
}
M68KMAKE_OP(addq, 16, ., .)
{
- uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- uint32_t dst = m68ki_read_16((mc68kcpu), ea);
+ uint32_t dst = m68ki_read_16(ea);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_v_flag = VFLAG_ADD_16(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
- m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag);
+ m68ki_write_16(ea, m_not_z_flag);
}
M68KMAKE_OP(addq, 32, ., d)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t src = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t dst = *r_dst;
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_n_flag = NFLAG_32(res);
+ m_v_flag = VFLAG_ADD_32(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
- *r_dst = (mc68kcpu)->not_z_flag;
+ *r_dst = m_not_z_flag;
}
M68KMAKE_OP(addq, 32, ., a)
{
- uint32_t* r_dst = &AY(mc68kcpu);
+ uint32_t* r_dst = &AY();
- *r_dst = MASK_OUT_ABOVE_32(*r_dst + ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1);
+ *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((m_ir >> 9) - 1) & 7) + 1);
}
M68KMAKE_OP(addq, 32, ., .)
{
- uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t ea = M68KMAKE_GET_EA_AY_32;
- uint32_t dst = m68ki_read_32((mc68kcpu), ea);
+ uint32_t dst = m68ki_read_32(ea);
uint32_t res = src + dst;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_n_flag = NFLAG_32(res);
+ m_v_flag = VFLAG_ADD_32(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
- m68ki_write_32((mc68kcpu), ea, (mc68kcpu)->not_z_flag);
+ m68ki_write_32(ea, m_not_z_flag);
}
M68KMAKE_OP(addx, 8, rr, .)
{
- uint32_t* r_dst = &DX(mc68kcpu);
- uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t* r_dst = &DX();
+ uint32_t src = MASK_OUT_ABOVE_8(DY());
uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
- uint32_t res = src + dst + XFLAG_1(mc68kcpu);
+ uint32_t res = src + dst + XFLAG_1();
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_v_flag = VFLAG_ADD_8(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_8(res);
res = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
}
@@ -1513,17 +1508,17 @@ M68KMAKE_OP(addx, 8, rr, .)
M68KMAKE_OP(addx, 16, rr, .)
{
- uint32_t* r_dst = &DX(mc68kcpu);
- uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t* r_dst = &DX();
+ uint32_t src = MASK_OUT_ABOVE_16(DY());
uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
- uint32_t res = src + dst + XFLAG_1(mc68kcpu);
+ uint32_t res = src + dst + XFLAG_1();
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_v_flag = VFLAG_ADD_16(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_16(res);
res = MASK_OUT_ABOVE_16(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
}
@@ -1531,17 +1526,17 @@ M68KMAKE_OP(addx, 16, rr, .)
M68KMAKE_OP(addx, 32, rr, .)
{
- uint32_t* r_dst = &DX(mc68kcpu);
- uint32_t src = DY(mc68kcpu);
+ uint32_t* r_dst = &DX();
+ uint32_t src = DY();
uint32_t dst = *r_dst;
- uint32_t res = src + dst + XFLAG_1(mc68kcpu);
+ uint32_t res = src + dst + XFLAG_1();
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_v_flag = VFLAG_ADD_32(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res);
res = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
*r_dst = res;
}
@@ -1549,384 +1544,384 @@ M68KMAKE_OP(addx, 32, rr, .)
M68KMAKE_OP(addx, 8, mm, ax7)
{
- uint32_t src = OPER_AY_PD_8(mc68kcpu);
- uint32_t ea = EA_A7_PD_8(mc68kcpu);
- uint32_t dst = m68ki_read_8((mc68kcpu), ea);
- uint32_t res = src + dst + XFLAG_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_8();
+ uint32_t ea = EA_A7_PD_8();
+ uint32_t dst = m68ki_read_8(ea);
+ uint32_t res = src + dst + XFLAG_1();
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_v_flag = VFLAG_ADD_8(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_8(res);
res = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
}
M68KMAKE_OP(addx, 8, mm, ay7)
{
- uint32_t src = OPER_A7_PD_8(mc68kcpu);
- uint32_t ea = EA_AX_PD_8(mc68kcpu);
- uint32_t dst = m68ki_read_8((mc68kcpu), ea);
- uint32_t res = src + dst + XFLAG_1(mc68kcpu);
+ uint32_t src = OPER_A7_PD_8();
+ uint32_t ea = EA_AX_PD_8();
+ uint32_t dst = m68ki_read_8(ea);
+ uint32_t res = src + dst + XFLAG_1();
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_v_flag = VFLAG_ADD_8(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_8(res);
res = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
}
M68KMAKE_OP(addx, 8, mm, axy7)
{
- uint32_t src = OPER_A7_PD_8(mc68kcpu);
- uint32_t ea = EA_A7_PD_8(mc68kcpu);
- uint32_t dst = m68ki_read_8((mc68kcpu), ea);
- uint32_t res = src + dst + XFLAG_1(mc68kcpu);
+ uint32_t src = OPER_A7_PD_8();
+ uint32_t ea = EA_A7_PD_8();
+ uint32_t dst = m68ki_read_8(ea);
+ uint32_t res = src + dst + XFLAG_1();
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_v_flag = VFLAG_ADD_8(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_8(res);
res = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
}
M68KMAKE_OP(addx, 8, mm, .)
{
- uint32_t src = OPER_AY_PD_8(mc68kcpu);
- uint32_t ea = EA_AX_PD_8(mc68kcpu);
- uint32_t dst = m68ki_read_8((mc68kcpu), ea);
- uint32_t res = src + dst + XFLAG_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_8();
+ uint32_t ea = EA_AX_PD_8();
+ uint32_t dst = m68ki_read_8(ea);
+ uint32_t res = src + dst + XFLAG_1();
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_v_flag = VFLAG_ADD_8(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_8(res);
res = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
}
M68KMAKE_OP(addx, 16, mm, .)
{
- uint32_t src = OPER_AY_PD_16(mc68kcpu);
- uint32_t ea = EA_AX_PD_16(mc68kcpu);
- uint32_t dst = m68ki_read_16((mc68kcpu), ea);
- uint32_t res = src + dst + XFLAG_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_16();
+ uint32_t ea = EA_AX_PD_16();
+ uint32_t dst = m68ki_read_16(ea);
+ uint32_t res = src + dst + XFLAG_1();
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_v_flag = VFLAG_ADD_16(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_16(res);
res = MASK_OUT_ABOVE_16(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
}
M68KMAKE_OP(addx, 32, mm, .)
{
- uint32_t src = OPER_AY_PD_32(mc68kcpu);
- uint32_t ea = EA_AX_PD_32(mc68kcpu);
- uint32_t dst = m68ki_read_32((mc68kcpu), ea);
- uint32_t res = src + dst + XFLAG_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_32();
+ uint32_t ea = EA_AX_PD_32();
+ uint32_t dst = m68ki_read_32(ea);
+ uint32_t res = src + dst + XFLAG_1();
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_ADD_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_v_flag = VFLAG_ADD_32(src, dst, res);
+ m_x_flag = m_c_flag = CFLAG_ADD_32(src, dst, res);
res = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->not_z_flag |= res;
+ m_not_z_flag |= res;
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
}
M68KMAKE_OP(and, 8, er, d)
{
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(DX(mc68kcpu) &= (DY(mc68kcpu) | 0xffffff00));
+ m_not_z_flag = MASK_OUT_ABOVE_8(DX() &= (DY() | 0xffffff00));
- (mc68kcpu)->n_flag = NFLAG_8((mc68kcpu)->not_z_flag);
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_8(m_not_z_flag);
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(and, 8, er, .)
{
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(DX(mc68kcpu) &= (M68KMAKE_GET_OPER_AY_8 | 0xffffff00));
+ m_not_z_flag = MASK_OUT_ABOVE_8(DX() &= (M68KMAKE_GET_OPER_AY_8 | 0xffffff00));
- (mc68kcpu)->n_flag = NFLAG_8((mc68kcpu)->not_z_flag);
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_8(m_not_z_flag);
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(and, 16, er, d)
{
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(DX(mc68kcpu) &= (DY(mc68kcpu) | 0xffff0000));
+ m_not_z_flag = MASK_OUT_ABOVE_16(DX() &= (DY() | 0xffff0000));
- (mc68kcpu)->n_flag = NFLAG_16((mc68kcpu)->not_z_flag);
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_16(m_not_z_flag);
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(and, 16, er, .)
{
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(DX(mc68kcpu) &= (M68KMAKE_GET_OPER_AY_16 | 0xffff0000));
+ m_not_z_flag = MASK_OUT_ABOVE_16(DX() &= (M68KMAKE_GET_OPER_AY_16 | 0xffff0000));
- (mc68kcpu)->n_flag = NFLAG_16((mc68kcpu)->not_z_flag);
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_16(m_not_z_flag);
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(and, 32, er, d)
{
- (mc68kcpu)->not_z_flag = DX(mc68kcpu) &= DY(mc68kcpu);
+ m_not_z_flag = DX() &= DY();
- (mc68kcpu)->n_flag = NFLAG_32((mc68kcpu)->not_z_flag);
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_32(m_not_z_flag);
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(and, 32, er, .)
{
- (mc68kcpu)->not_z_flag = DX(mc68kcpu) &= M68KMAKE_GET_OPER_AY_32;
+ m_not_z_flag = DX() &= M68KMAKE_GET_OPER_AY_32;
- (mc68kcpu)->n_flag = NFLAG_32((mc68kcpu)->not_z_flag);
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_32(m_not_z_flag);
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(and, 8, re, .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t res = DX(mc68kcpu) & m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = DX() & m68ki_read_8(ea);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
- m68ki_write_8((mc68kcpu), ea, (mc68kcpu)->not_z_flag);
+ m68ki_write_8(ea, m_not_z_flag);
}
M68KMAKE_OP(and, 16, re, .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- uint32_t res = DX(mc68kcpu) & m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = DX() & m68ki_read_16(ea);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
- m68ki_write_16((mc68kcpu), ea, (mc68kcpu)->not_z_flag);
+ m68ki_write_16(ea, m_not_z_flag);
}
M68KMAKE_OP(and, 32, re, .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_32;
- uint32_t res = DX(mc68kcpu) & m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = DX() & m68ki_read_32(ea);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
}
M68KMAKE_OP(andi, 8, ., d)
{
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(DY(mc68kcpu) &= (OPER_I_8(mc68kcpu) | 0xffffff00));
+ m_not_z_flag = MASK_OUT_ABOVE_8(DY() &= (OPER_I_8() | 0xffffff00));
- (mc68kcpu)->n_flag = NFLAG_8((mc68kcpu)->not_z_flag);
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_8(m_not_z_flag);
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(andi, 8, ., .)
{
- uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t src = OPER_I_8();
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t res = src & m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = src & m68ki_read_8(ea);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
}
M68KMAKE_OP(andi, 16, ., d)
{
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(DY(mc68kcpu) &= (OPER_I_16(mc68kcpu) | 0xffff0000));
+ m_not_z_flag = MASK_OUT_ABOVE_16(DY() &= (OPER_I_16() | 0xffff0000));
- (mc68kcpu)->n_flag = NFLAG_16((mc68kcpu)->not_z_flag);
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_16(m_not_z_flag);
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(andi, 16, ., .)
{
- uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t src = OPER_I_16();
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- uint32_t res = src & m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = src & m68ki_read_16(ea);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
}
M68KMAKE_OP(andi, 32, ., d)
{
- (mc68kcpu)->not_z_flag = DY(mc68kcpu) &= (OPER_I_32(mc68kcpu));
+ m_not_z_flag = DY() &= (OPER_I_32());
- (mc68kcpu)->n_flag = NFLAG_32((mc68kcpu)->not_z_flag);
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_32(m_not_z_flag);
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(andi, 32, ., .)
{
- uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t src = OPER_I_32();
uint32_t ea = M68KMAKE_GET_EA_AY_32;
- uint32_t res = src & m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = src & m68ki_read_32(ea);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
}
M68KMAKE_OP(andi, 16, toc, .)
{
- m68ki_set_ccr((mc68kcpu), m68ki_get_ccr(mc68kcpu) & OPER_I_16(mc68kcpu));
+ m68ki_set_ccr(m68ki_get_ccr() & OPER_I_16());
}
M68KMAKE_OP(andi, 16, tos, .)
{
- if((mc68kcpu)->s_flag)
+ if(m_s_flag)
{
- uint32_t src = OPER_I_16(mc68kcpu);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) & src);
+ uint32_t src = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(m68ki_get_sr() & src);
return;
}
- m68ki_exception_privilege_violation(mc68kcpu);
+ m68ki_exception_privilege_violation();
}
M68KMAKE_OP(asr, 8, s, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
uint32_t res = src >> shift;
if(shift != 0)
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(GET_MSB_8(src))
res |= m68ki_shift_8_table[shift];
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift);
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_x_flag = m_c_flag = src << (9-shift);
}
M68KMAKE_OP(asr, 16, s, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
uint32_t res = src >> shift;
if(shift != 0)
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(GET_MSB_16(src))
res |= m68ki_shift_16_table[shift];
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift);
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_x_flag = m_c_flag = src << (9-shift);
}
M68KMAKE_OP(asr, 32, s, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t src = *r_dst;
uint32_t res = src >> shift;
if(shift != 0)
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(GET_MSB_32(src))
res |= m68ki_shift_32_table[shift];
*r_dst = res;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_x_flag = m_c_flag = src << (9-shift);
}
M68KMAKE_OP(asr, 8, r, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = DX() & 0x3f;
uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
uint32_t res = src >> shift;
if(shift != 0)
{
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(shift < 8)
{
@@ -1935,50 +1930,50 @@ M68KMAKE_OP(asr, 8, r, .)
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_x_flag = m_c_flag = src << (9-shift);
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
return;
}
if(GET_MSB_8(src))
{
*r_dst |= 0xff;
- (mc68kcpu)->c_flag = CFLAG_SET;
- (mc68kcpu)->x_flag = XFLAG_SET;
- (mc68kcpu)->n_flag = NFLAG_SET;
- (mc68kcpu)->not_z_flag = ZFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_SET;
+ m_x_flag = XFLAG_SET;
+ m_n_flag = NFLAG_SET;
+ m_not_z_flag = ZFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
return;
}
*r_dst &= 0xffffff00;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->x_flag = XFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_x_flag = XFLAG_CLEAR;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
+ m_v_flag = VFLAG_CLEAR;
return;
}
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_8(src);
- (mc68kcpu)->not_z_flag = src;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(src);
+ m_not_z_flag = src;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(asr, 16, r, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = DX() & 0x3f;
uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
uint32_t res = src >> shift;
if(shift != 0)
{
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(shift < 16)
{
@@ -1987,50 +1982,50 @@ M68KMAKE_OP(asr, 16, r, .)
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
- (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = (src >> (shift - 1))<<8;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = m_x_flag = (src >> (shift - 1))<<8;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
return;
}
if(GET_MSB_16(src))
{
*r_dst |= 0xffff;
- (mc68kcpu)->c_flag = CFLAG_SET;
- (mc68kcpu)->x_flag = XFLAG_SET;
- (mc68kcpu)->n_flag = NFLAG_SET;
- (mc68kcpu)->not_z_flag = ZFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_SET;
+ m_x_flag = XFLAG_SET;
+ m_n_flag = NFLAG_SET;
+ m_not_z_flag = ZFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
return;
}
*r_dst &= 0xffff0000;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->x_flag = XFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_x_flag = XFLAG_CLEAR;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
+ m_v_flag = VFLAG_CLEAR;
return;
}
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_16(src);
- (mc68kcpu)->not_z_flag = src;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(src);
+ m_not_z_flag = src;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(asr, 32, r, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = DX() & 0x3f;
uint32_t src = *r_dst;
uint32_t res = src >> shift;
if(shift != 0)
{
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(shift < 32)
{
@@ -2039,242 +2034,242 @@ M68KMAKE_OP(asr, 32, r, .)
*r_dst = res;
- (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = (src >> (shift - 1))<<8;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = m_x_flag = (src >> (shift - 1))<<8;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
return;
}
if(GET_MSB_32(src))
{
*r_dst = 0xffffffff;
- (mc68kcpu)->c_flag = CFLAG_SET;
- (mc68kcpu)->x_flag = XFLAG_SET;
- (mc68kcpu)->n_flag = NFLAG_SET;
- (mc68kcpu)->not_z_flag = ZFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_SET;
+ m_x_flag = XFLAG_SET;
+ m_n_flag = NFLAG_SET;
+ m_not_z_flag = ZFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
return;
}
*r_dst = 0;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->x_flag = XFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_x_flag = XFLAG_CLEAR;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
+ m_v_flag = VFLAG_CLEAR;
return;
}
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_32(src);
- (mc68kcpu)->not_z_flag = src;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(src);
+ m_not_z_flag = src;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(asr, 16, ., .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t src = m68ki_read_16(ea);
uint32_t res = src >> 1;
if(GET_MSB_16(src))
res |= 0x8000;
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = src << 8;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = m_x_flag = src << 8;
}
M68KMAKE_OP(asl, 8, s, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
uint32_t res = MASK_OUT_ABOVE_8(src << shift);
if(shift != 0)
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << shift;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
+ m_x_flag = m_c_flag = src << shift;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
src &= m68ki_shift_8_table[shift + 1];
- (mc68kcpu)->v_flag = (!(src == 0 || (src == m68ki_shift_8_table[shift + 1] && shift < 8)))<<7;
+ m_v_flag = (!(src == 0 || (src == m68ki_shift_8_table[shift + 1] && shift < 8)))<<7;
}
M68KMAKE_OP(asl, 16, s, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
uint32_t res = MASK_OUT_ABOVE_16(src << shift);
if(shift != 0)
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> (8-shift);
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_x_flag = m_c_flag = src >> (8-shift);
src &= m68ki_shift_16_table[shift + 1];
- (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
+ m_v_flag = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
}
M68KMAKE_OP(asl, 32, s, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t src = *r_dst;
uint32_t res = MASK_OUT_ABOVE_32(src << shift);
if(shift != 0)
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
*r_dst = res;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> (24-shift);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_x_flag = m_c_flag = src >> (24-shift);
src &= m68ki_shift_32_table[shift + 1];
- (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
+ m_v_flag = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
}
M68KMAKE_OP(asl, 8, r, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = DX() & 0x3f;
uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
uint32_t res = MASK_OUT_ABOVE_8(src << shift);
if(shift != 0)
{
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(shift < 8)
{
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << shift;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
+ m_x_flag = m_c_flag = src << shift;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
src &= m68ki_shift_8_table[shift + 1];
- (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_8_table[shift + 1]))<<7;
+ m_v_flag = (!(src == 0 || src == m68ki_shift_8_table[shift + 1]))<<7;
return;
}
*r_dst &= 0xffffff00;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = ((shift == 8 ? src & 1 : 0))<<8;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
- (mc68kcpu)->v_flag = (!(src == 0))<<7;
+ m_x_flag = m_c_flag = ((shift == 8 ? src & 1 : 0))<<8;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
+ m_v_flag = (!(src == 0))<<7;
return;
}
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_8(src);
- (mc68kcpu)->not_z_flag = src;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(src);
+ m_not_z_flag = src;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(asl, 16, r, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = DX() & 0x3f;
uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
uint32_t res = MASK_OUT_ABOVE_16(src << shift);
if(shift != 0)
{
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(shift < 16)
{
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (src << shift) >> 8;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
+ m_x_flag = m_c_flag = (src << shift) >> 8;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
src &= m68ki_shift_16_table[shift + 1];
- (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
+ m_v_flag = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
return;
}
*r_dst &= 0xffff0000;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = ((shift == 16 ? src & 1 : 0))<<8;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
- (mc68kcpu)->v_flag = (!(src == 0))<<7;
+ m_x_flag = m_c_flag = ((shift == 16 ? src & 1 : 0))<<8;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
+ m_v_flag = (!(src == 0))<<7;
return;
}
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_16(src);
- (mc68kcpu)->not_z_flag = src;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(src);
+ m_not_z_flag = src;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(asl, 32, r, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = DX() & 0x3f;
uint32_t src = *r_dst;
uint32_t res = MASK_OUT_ABOVE_32(src << shift);
if(shift != 0)
{
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(shift < 32)
{
*r_dst = res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (src >> (32 - shift)) << 8;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
+ m_x_flag = m_c_flag = (src >> (32 - shift)) << 8;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
src &= m68ki_shift_32_table[shift + 1];
- (mc68kcpu)->v_flag = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
+ m_v_flag = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
return;
}
*r_dst = 0;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = ((shift == 32 ? src & 1 : 0))<<8;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
- (mc68kcpu)->v_flag = (!(src == 0))<<7;
+ m_x_flag = m_c_flag = ((shift == 32 ? src & 1 : 0))<<8;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
+ m_v_flag = (!(src == 0))<<7;
return;
}
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_32(src);
- (mc68kcpu)->not_z_flag = src;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(src);
+ m_not_z_flag = src;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(asl, 16, ., .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t src = m68ki_read_16(ea);
uint32_t res = MASK_OUT_ABOVE_16(src << 1);
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> 7;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_x_flag = m_c_flag = src >> 7;
src &= 0xc000;
- (mc68kcpu)->v_flag = (!(src == 0 || src == 0xc000))<<7;
+ m_v_flag = (!(src == 0 || src == 0xc000))<<7;
}
@@ -2282,11 +2277,11 @@ M68KMAKE_OP(bcc, 8, ., .)
{
if(M68KMAKE_CC)
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir));
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir));
return;
}
- (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_bcc_notake_b;
+ m_remaining_cycles -= m_cyc_bcc_notake_b;
}
@@ -2294,51 +2289,51 @@ M68KMAKE_OP(bcc, 16, ., .)
{
if(M68KMAKE_CC)
{
- uint32_t offset = OPER_I_16(mc68kcpu);
- REG_PC(mc68kcpu) -= 2;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_branch_16((mc68kcpu), offset);
+ uint32_t offset = OPER_I_16();
+ m_pc -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
return;
}
- REG_PC(mc68kcpu) += 2;
- (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_bcc_notake_w;
+ m_pc += 2;
+ m_remaining_cycles -= m_cyc_bcc_notake_w;
}
M68KMAKE_OP(bcc, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
if(M68KMAKE_CC)
{
- uint32_t offset = OPER_I_32(mc68kcpu);
- REG_PC(mc68kcpu) -= 4;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_branch_32((mc68kcpu), offset);
+ uint32_t offset = OPER_I_32();
+ m_pc -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
return;
}
- REG_PC(mc68kcpu) += 4;
+ m_pc += 4;
return;
}
else
{
if(M68KMAKE_CC)
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir));
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir));
return;
}
- (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_bcc_notake_b;
+ m_remaining_cycles -= m_cyc_bcc_notake_b;
}
}
M68KMAKE_OP(bchg, 32, r, d)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t mask = 1 << (DX(mc68kcpu) & 0x1f);
+ uint32_t* r_dst = &DY();
+ uint32_t mask = 1 << (DX() & 0x1f);
- (mc68kcpu)->not_z_flag = *r_dst & mask;
+ m_not_z_flag = *r_dst & mask;
*r_dst ^= mask;
}
@@ -2346,41 +2341,41 @@ M68KMAKE_OP(bchg, 32, r, d)
M68KMAKE_OP(bchg, 8, r, .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t src = m68ki_read_8((mc68kcpu), ea);
- uint32_t mask = 1 << (DX(mc68kcpu) & 7);
+ uint32_t src = m68ki_read_8(ea);
+ uint32_t mask = 1 << (DX() & 7);
- (mc68kcpu)->not_z_flag = src & mask;
- m68ki_write_8((mc68kcpu), ea, src ^ mask);
+ m_not_z_flag = src & mask;
+ m68ki_write_8(ea, src ^ mask);
}
M68KMAKE_OP(bchg, 32, s, d)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f);
+ uint32_t* r_dst = &DY();
+ uint32_t mask = 1 << (OPER_I_8() & 0x1f);
- (mc68kcpu)->not_z_flag = *r_dst & mask;
+ m_not_z_flag = *r_dst & mask;
*r_dst ^= mask;
}
M68KMAKE_OP(bchg, 8, s, .)
{
- uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 7);
+ uint32_t mask = 1 << (OPER_I_8() & 7);
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t src = m68ki_read_8((mc68kcpu), ea);
+ uint32_t src = m68ki_read_8(ea);
- (mc68kcpu)->not_z_flag = src & mask;
- m68ki_write_8((mc68kcpu), ea, src ^ mask);
+ m_not_z_flag = src & mask;
+ m68ki_write_8(ea, src ^ mask);
}
M68KMAKE_OP(bclr, 32, r, d)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t mask = 1 << (DX(mc68kcpu) & 0x1f);
+ uint32_t* r_dst = &DY();
+ uint32_t mask = 1 << (DX() & 0x1f);
- (mc68kcpu)->not_z_flag = *r_dst & mask;
+ m_not_z_flag = *r_dst & mask;
*r_dst &= ~mask;
}
@@ -2388,50 +2383,50 @@ M68KMAKE_OP(bclr, 32, r, d)
M68KMAKE_OP(bclr, 8, r, .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t src = m68ki_read_8((mc68kcpu), ea);
- uint32_t mask = 1 << (DX(mc68kcpu) & 7);
+ uint32_t src = m68ki_read_8(ea);
+ uint32_t mask = 1 << (DX() & 7);
- (mc68kcpu)->not_z_flag = src & mask;
- m68ki_write_8((mc68kcpu), ea, src & ~mask);
+ m_not_z_flag = src & mask;
+ m68ki_write_8(ea, src & ~mask);
}
M68KMAKE_OP(bclr, 32, s, d)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f);
+ uint32_t* r_dst = &DY();
+ uint32_t mask = 1 << (OPER_I_8() & 0x1f);
- (mc68kcpu)->not_z_flag = *r_dst & mask;
+ m_not_z_flag = *r_dst & mask;
*r_dst &= ~mask;
}
M68KMAKE_OP(bclr, 8, s, .)
{
- uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 7);
+ uint32_t mask = 1 << (OPER_I_8() & 7);
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t src = m68ki_read_8((mc68kcpu), ea);
+ uint32_t src = m68ki_read_8(ea);
- (mc68kcpu)->not_z_flag = src & mask;
- m68ki_write_8((mc68kcpu), ea, src & ~mask);
+ m_not_z_flag = src & mask;
+ m68ki_write_8(ea, src & ~mask);
}
M68KMAKE_OP(bfchg, 32, ., d)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
uint32_t offset = (word2>>6)&31;
uint32_t width = word2;
- uint32_t* data = &DY(mc68kcpu);
+ uint32_t* data = &DY();
uint64_t mask;
if(BIT_B(word2))
- offset = REG_D(mc68kcpu)[offset&7];
+ offset = REG_D()[offset&7];
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
offset &= 31;
width = ((width-1) & 31) + 1;
@@ -2439,24 +2434,24 @@ M68KMAKE_OP(bfchg, 32, ., d)
mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
mask = ROR_32(mask, offset);
- (mc68kcpu)->n_flag = NFLAG_32(*data<<offset);
- (mc68kcpu)->not_z_flag = *data & mask;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(*data<<offset);
+ m_not_z_flag = *data & mask;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
*data ^= mask;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bfchg, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
int32_t offset = (word2>>6)&31;
uint32_t width = word2;
uint32_t mask_base;
@@ -2468,9 +2463,9 @@ M68KMAKE_OP(bfchg, 32, ., .)
if(BIT_B(word2))
- offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]);
+ offset = MAKE_INT_32(REG_D()[offset&7]);
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
/* Offset is signed so we have to use ugly math =( */
ea += offset / 8;
@@ -2485,42 +2480,42 @@ M68KMAKE_OP(bfchg, 32, ., .)
mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
mask_long = mask_base >> offset;
- data_long = m68ki_read_32((mc68kcpu), ea);
- (mc68kcpu)->n_flag = NFLAG_32(data_long << offset);
- (mc68kcpu)->not_z_flag = data_long & mask_long;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ data_long = m68ki_read_32(ea);
+ m_n_flag = NFLAG_32(data_long << offset);
+ m_not_z_flag = data_long & mask_long;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
- m68ki_write_32((mc68kcpu), ea, data_long ^ mask_long);
+ m68ki_write_32(ea, data_long ^ mask_long);
if((width + offset) > 32)
{
mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset);
- data_byte = m68ki_read_8((mc68kcpu), ea+4);
- (mc68kcpu)->not_z_flag |= (data_byte & mask_byte);
- m68ki_write_8((mc68kcpu), ea+4, data_byte ^ mask_byte);
+ data_byte = m68ki_read_8(ea+4);
+ m_not_z_flag |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte ^ mask_byte);
}
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bfclr, 32, ., d)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
uint32_t offset = (word2>>6)&31;
uint32_t width = word2;
- uint32_t* data = &DY(mc68kcpu);
+ uint32_t* data = &DY();
uint64_t mask;
if(BIT_B(word2))
- offset = REG_D(mc68kcpu)[offset&7];
+ offset = REG_D()[offset&7];
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
offset &= 31;
@@ -2530,24 +2525,24 @@ M68KMAKE_OP(bfclr, 32, ., d)
mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
mask = ROR_32(mask, offset);
- (mc68kcpu)->n_flag = NFLAG_32(*data<<offset);
- (mc68kcpu)->not_z_flag = *data & mask;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(*data<<offset);
+ m_not_z_flag = *data & mask;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
*data &= ~mask;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bfclr, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
int32_t offset = (word2>>6)&31;
uint32_t width = word2;
uint32_t mask_base;
@@ -2559,9 +2554,9 @@ M68KMAKE_OP(bfclr, 32, ., .)
if(BIT_B(word2))
- offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]);
+ offset = MAKE_INT_32(REG_D()[offset&7]);
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
/* Offset is signed so we have to use ugly math =( */
ea += offset / 8;
@@ -2576,66 +2571,66 @@ M68KMAKE_OP(bfclr, 32, ., .)
mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
mask_long = mask_base >> offset;
- data_long = m68ki_read_32((mc68kcpu), ea);
- (mc68kcpu)->n_flag = NFLAG_32(data_long << offset);
- (mc68kcpu)->not_z_flag = data_long & mask_long;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ data_long = m68ki_read_32(ea);
+ m_n_flag = NFLAG_32(data_long << offset);
+ m_not_z_flag = data_long & mask_long;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
- m68ki_write_32((mc68kcpu), ea, data_long & ~mask_long);
+ m68ki_write_32(ea, data_long & ~mask_long);
if((width + offset) > 32)
{
mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset);
- data_byte = m68ki_read_8((mc68kcpu), ea+4);
- (mc68kcpu)->not_z_flag |= (data_byte & mask_byte);
- m68ki_write_8((mc68kcpu), ea+4, data_byte & ~mask_byte);
+ data_byte = m68ki_read_8(ea+4);
+ m_not_z_flag |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte & ~mask_byte);
}
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bfexts, 32, ., d)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
uint32_t offset = (word2>>6)&31;
uint32_t width = word2;
- uint64_t data = DY(mc68kcpu);
+ uint64_t data = DY();
if(BIT_B(word2))
- offset = REG_D(mc68kcpu)[offset&7];
+ offset = REG_D()[offset&7];
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
offset &= 31;
width = ((width-1) & 31) + 1;
data = ROL_32(data, offset);
- (mc68kcpu)->n_flag = NFLAG_32(data);
+ m_n_flag = NFLAG_32(data);
data = MAKE_INT_32(data) >> (32 - width);
- (mc68kcpu)->not_z_flag = data;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_not_z_flag = data;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
- REG_D(mc68kcpu)[(word2>>12)&7] = data;
+ REG_D()[(word2>>12)&7] = data;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bfexts, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
int32_t offset = (word2>>6)&31;
uint32_t width = word2;
uint32_t data;
@@ -2643,9 +2638,9 @@ M68KMAKE_OP(bfexts, 32, ., .)
if(BIT_B(word2))
- offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]);
+ offset = MAKE_INT_32(REG_D()[offset&7]);
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
if(BIT_B(word2))
{
@@ -2660,68 +2655,68 @@ M68KMAKE_OP(bfexts, 32, ., .)
}
width = ((width-1) & 31) + 1;
- data = (offset+width) < 8 ? (m68ki_read_8((mc68kcpu), ea) << 24) :
- (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea);
+ data = (offset+width) < 8 ? (m68ki_read_8(ea) << 24) :
+ (offset+width) < 16 ? (m68ki_read_16(ea) << 16) : m68ki_read_32(ea);
data = MASK_OUT_ABOVE_32(data<<offset);
if((offset+width) > 32)
- data |= (m68ki_read_8((mc68kcpu), ea+4) << offset) >> 8;
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
- (mc68kcpu)->n_flag = NFLAG_32(data);
+ m_n_flag = NFLAG_32(data);
data = MAKE_INT_32(data) >> (32 - width);
- (mc68kcpu)->not_z_flag = data;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_not_z_flag = data;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
- REG_D(mc68kcpu)[(word2 >> 12) & 7] = data;
+ REG_D()[(word2 >> 12) & 7] = data;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bfextu, 32, ., d)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
uint32_t offset = (word2>>6)&31;
uint32_t width = word2;
- uint64_t data = DY(mc68kcpu);
+ uint64_t data = DY();
if(BIT_B(word2))
- offset = REG_D(mc68kcpu)[offset&7];
+ offset = REG_D()[offset&7];
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
offset &= 31;
width = ((width-1) & 31) + 1;
data = ROL_32(data, offset);
- (mc68kcpu)->n_flag = NFLAG_32(data);
+ m_n_flag = NFLAG_32(data);
data >>= 32 - width;
- (mc68kcpu)->not_z_flag = data;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_not_z_flag = data;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
- REG_D(mc68kcpu)[(word2>>12)&7] = data;
+ REG_D()[(word2>>12)&7] = data;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bfextu, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
int32_t offset = (word2>>6)&31;
uint32_t width = word2;
uint32_t data;
@@ -2729,9 +2724,9 @@ M68KMAKE_OP(bfextu, 32, ., .)
if(BIT_B(word2))
- offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]);
+ offset = MAKE_INT_32(REG_D()[offset&7]);
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
if(BIT_B(word2))
{
@@ -2746,71 +2741,71 @@ M68KMAKE_OP(bfextu, 32, ., .)
}
width = ((width-1) & 31) + 1;
- data = (offset+width) < 8 ? (m68ki_read_8((mc68kcpu), ea) << 24) :
- (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea);
+ data = (offset+width) < 8 ? (m68ki_read_8(ea) << 24) :
+ (offset+width) < 16 ? (m68ki_read_16(ea) << 16) : m68ki_read_32(ea);
data = MASK_OUT_ABOVE_32(data<<offset);
if((offset+width) > 32)
- data |= (m68ki_read_8((mc68kcpu), ea+4) << offset) >> 8;
+ data |= (m68ki_read_8(ea+4) << offset) >> 8;
- (mc68kcpu)->n_flag = NFLAG_32(data);
+ m_n_flag = NFLAG_32(data);
data >>= (32 - width);
- (mc68kcpu)->not_z_flag = data;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_not_z_flag = data;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
- REG_D(mc68kcpu)[(word2 >> 12) & 7] = data;
+ REG_D()[(word2 >> 12) & 7] = data;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bfffo, 32, ., d)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
uint32_t offset = (word2>>6)&31;
uint32_t width = word2;
- uint64_t data = DY(mc68kcpu);
+ uint64_t data = DY();
uint32_t bit;
if(BIT_B(word2))
- offset = REG_D(mc68kcpu)[offset&7];
+ offset = REG_D()[offset&7];
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
offset &= 31;
width = ((width-1) & 31) + 1;
data = ROL_32(data, offset);
- (mc68kcpu)->n_flag = NFLAG_32(data);
+ m_n_flag = NFLAG_32(data);
data >>= 32 - width;
- (mc68kcpu)->not_z_flag = data;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_not_z_flag = data;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
offset++;
- REG_D(mc68kcpu)[(word2>>12)&7] = offset;
+ REG_D()[(word2>>12)&7] = offset;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bfffo, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
int32_t offset = (word2>>6)&31;
int32_t local_offset;
uint32_t width = word2;
@@ -2820,9 +2815,9 @@ M68KMAKE_OP(bfffo, 32, ., .)
if(BIT_B(word2))
- offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]);
+ offset = MAKE_INT_32(REG_D()[offset&7]);
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
/* Offset is signed so we have to use ugly math =( */
ea += offset / 8;
@@ -2834,46 +2829,46 @@ M68KMAKE_OP(bfffo, 32, ., .)
}
width = ((width-1) & 31) + 1;
- data = (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea);
+ data = (offset+width) < 16 ? (m68ki_read_16(ea) << 16) : m68ki_read_32(ea);
data = MASK_OUT_ABOVE_32(data<<local_offset);
if((local_offset+width) > 32)
- data |= (m68ki_read_8((mc68kcpu), ea+4) << local_offset) >> 8;
+ data |= (m68ki_read_8(ea+4) << local_offset) >> 8;
- (mc68kcpu)->n_flag = NFLAG_32(data);
+ m_n_flag = NFLAG_32(data);
data >>= (32 - width);
- (mc68kcpu)->not_z_flag = data;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_not_z_flag = data;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
offset++;
- REG_D(mc68kcpu)[(word2>>12)&7] = offset;
+ REG_D()[(word2>>12)&7] = offset;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bfins, 32, ., d)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
uint32_t offset = (word2>>6)&31;
uint32_t width = word2;
- uint32_t* data = &DY(mc68kcpu);
+ uint32_t* data = &DY();
uint64_t mask;
- uint64_t insert = REG_D(mc68kcpu)[(word2>>12)&7];
+ uint64_t insert = REG_D()[(word2>>12)&7];
if(BIT_B(word2))
- offset = REG_D(mc68kcpu)[offset&7];
+ offset = REG_D()[offset&7];
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
offset &= 31;
@@ -2884,30 +2879,30 @@ M68KMAKE_OP(bfins, 32, ., d)
mask = ROR_32(mask, offset);
insert = MASK_OUT_ABOVE_32(insert << (32 - width));
- (mc68kcpu)->n_flag = NFLAG_32(insert);
- (mc68kcpu)->not_z_flag = insert;
+ m_n_flag = NFLAG_32(insert);
+ m_not_z_flag = insert;
insert = ROR_32(insert, offset);
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
*data &= ~mask;
*data |= insert;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bfins, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
int32_t offset = (word2>>6)&31;
uint32_t width = word2;
- uint32_t insert_base = REG_D(mc68kcpu)[(word2>>12)&7];
+ uint32_t insert_base = REG_D()[(word2>>12)&7];
uint32_t insert_long;
uint32_t insert_byte;
uint32_t mask_base;
@@ -2919,9 +2914,9 @@ M68KMAKE_OP(bfins, 32, ., .)
if(BIT_B(word2))
- offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]);
+ offset = MAKE_INT_32(REG_D()[offset&7]);
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
if(BIT_B(word2))
{
@@ -2940,57 +2935,57 @@ M68KMAKE_OP(bfins, 32, ., .)
mask_long = mask_base >> offset;
insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));
- (mc68kcpu)->n_flag = NFLAG_32(insert_base);
- (mc68kcpu)->not_z_flag = insert_base;
+ m_n_flag = NFLAG_32(insert_base);
+ m_not_z_flag = insert_base;
insert_long = insert_base >> offset;
- data_long = (offset+width) < 8 ? (m68ki_read_8((mc68kcpu), ea) << 24) :
- (offset+width) < 16 ? (m68ki_read_16((mc68kcpu), ea) << 16) : m68ki_read_32((mc68kcpu), ea);
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ data_long = (offset+width) < 8 ? (m68ki_read_8(ea) << 24) :
+ (offset+width) < 16 ? (m68ki_read_16(ea) << 16) : m68ki_read_32(ea);
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
if((width + offset) < 8)
{
- m68ki_write_8((mc68kcpu), ea, ((data_long & ~mask_long) | insert_long) >> 24);
+ m68ki_write_8(ea, ((data_long & ~mask_long) | insert_long) >> 24);
}
else if((width + offset) < 16)
{
- m68ki_write_16((mc68kcpu), ea, ((data_long & ~mask_long) | insert_long) >> 16);
+ m68ki_write_16(ea, ((data_long & ~mask_long) | insert_long) >> 16);
}
else
{
- m68ki_write_32((mc68kcpu), ea, (data_long & ~mask_long) | insert_long);
+ m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);
}
if((width + offset) > 32)
{
mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset);
insert_byte = MASK_OUT_ABOVE_8(insert_base) << (8-offset);
- data_byte = m68ki_read_8((mc68kcpu), ea+4);
- (mc68kcpu)->not_z_flag |= (insert_byte & mask_byte);
- m68ki_write_8((mc68kcpu), ea+4, (data_byte & ~mask_byte) | insert_byte);
+ data_byte = m68ki_read_8(ea+4);
+ m_not_z_flag |= (insert_byte & mask_byte);
+ m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);
}
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bfset, 32, ., d)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
uint32_t offset = (word2>>6)&31;
uint32_t width = word2;
- uint32_t* data = &DY(mc68kcpu);
+ uint32_t* data = &DY();
uint64_t mask;
if(BIT_B(word2))
- offset = REG_D(mc68kcpu)[offset&7];
+ offset = REG_D()[offset&7];
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
offset &= 31;
@@ -3000,24 +2995,24 @@ M68KMAKE_OP(bfset, 32, ., d)
mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
mask = ROR_32(mask, offset);
- (mc68kcpu)->n_flag = NFLAG_32(*data<<offset);
- (mc68kcpu)->not_z_flag = *data & mask;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(*data<<offset);
+ m_not_z_flag = *data & mask;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
*data |= mask;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bfset, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
int32_t offset = (word2>>6)&31;
uint32_t width = word2;
uint32_t mask_base;
@@ -3028,9 +3023,9 @@ M68KMAKE_OP(bfset, 32, ., .)
uint32_t ea = M68KMAKE_GET_EA_AY_8;
if(BIT_B(word2))
- offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]);
+ offset = MAKE_INT_32(REG_D()[offset&7]);
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
/* Offset is signed so we have to use ugly math =( */
ea += offset / 8;
@@ -3045,42 +3040,42 @@ M68KMAKE_OP(bfset, 32, ., .)
mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
mask_long = mask_base >> offset;
- data_long = m68ki_read_32((mc68kcpu), ea);
- (mc68kcpu)->n_flag = NFLAG_32(data_long << offset);
- (mc68kcpu)->not_z_flag = data_long & mask_long;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ data_long = m68ki_read_32(ea);
+ m_n_flag = NFLAG_32(data_long << offset);
+ m_not_z_flag = data_long & mask_long;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
- m68ki_write_32((mc68kcpu), ea, data_long | mask_long);
+ m68ki_write_32(ea, data_long | mask_long);
if((width + offset) > 32)
{
mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset);
- data_byte = m68ki_read_8((mc68kcpu), ea+4);
- (mc68kcpu)->not_z_flag |= (data_byte & mask_byte);
- m68ki_write_8((mc68kcpu), ea+4, data_byte | mask_byte);
+ data_byte = m68ki_read_8(ea+4);
+ m_not_z_flag |= (data_byte & mask_byte);
+ m68ki_write_8(ea+4, data_byte | mask_byte);
}
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bftst, 32, ., d)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
uint32_t offset = (word2>>6)&31;
uint32_t width = word2;
- uint32_t* data = &DY(mc68kcpu);
+ uint32_t* data = &DY();
uint64_t mask;
if(BIT_B(word2))
- offset = REG_D(mc68kcpu)[offset&7];
+ offset = REG_D()[offset&7];
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
offset &= 31;
@@ -3090,22 +3085,22 @@ M68KMAKE_OP(bftst, 32, ., d)
mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
mask = ROR_32(mask, offset);
- (mc68kcpu)->n_flag = NFLAG_32(*data<<offset);
- (mc68kcpu)->not_z_flag = *data & mask;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(*data<<offset);
+ m_not_z_flag = *data & mask;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bftst, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
int32_t offset = (word2>>6)&31;
uint32_t width = word2;
uint32_t mask_base;
@@ -3116,9 +3111,9 @@ M68KMAKE_OP(bftst, 32, ., .)
uint32_t ea = M68KMAKE_GET_EA_AY_8;
if(BIT_B(word2))
- offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]);
+ offset = MAKE_INT_32(REG_D()[offset&7]);
if(BIT_5(word2))
- width = REG_D(mc68kcpu)[width&7];
+ width = REG_D()[width&7];
/* Offset is signed so we have to use ugly math =( */
ea += offset / 8;
@@ -3134,83 +3129,83 @@ M68KMAKE_OP(bftst, 32, ., .)
mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
mask_long = mask_base >> offset;
- data_long = m68ki_read_32((mc68kcpu), ea);
- (mc68kcpu)->n_flag = ((data_long & (0x80000000 >> offset))<<offset)>>24;
- (mc68kcpu)->not_z_flag = data_long & mask_long;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ data_long = m68ki_read_32(ea);
+ m_n_flag = ((data_long & (0x80000000 >> offset))<<offset)>>24;
+ m_not_z_flag = data_long & mask_long;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
if((width + offset) > 32)
{
mask_byte = MASK_OUT_ABOVE_8(mask_base) << (8-offset);
- data_byte = m68ki_read_8((mc68kcpu), ea+4);
- (mc68kcpu)->not_z_flag |= (data_byte & mask_byte);
+ data_byte = m68ki_read_8(ea+4);
+ m_not_z_flag |= (data_byte & mask_byte);
}
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bkpt, 0, ., .)
{
- if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_010_PLUS())
{
- if (!(mc68kcpu)->bkpt_ack_callback.isnull())
- ((mc68kcpu)->bkpt_ack_callback)((*mc68kcpu->program), 0, CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type) ? (mc68kcpu)->ir & 7 : 0, 0xffffffff);
+ if (!m_bkpt_ack_callback.isnull())
+ (m_bkpt_ack_callback)(*m_program, 0, CPU_TYPE_IS_EC020_PLUS() ? m_ir & 7 : 0, 0xffffffff);
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(bra, 8, ., .)
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir));
- if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0)
- (mc68kcpu)->remaining_cycles = 0;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir));
+ if(m_pc == m_ppc && m_remaining_cycles > 0)
+ m_remaining_cycles = 0;
}
M68KMAKE_OP(bra, 16, ., .)
{
- uint32_t offset = OPER_I_16(mc68kcpu);
- REG_PC(mc68kcpu) -= 2;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_branch_16((mc68kcpu), offset);
- if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0)
- (mc68kcpu)->remaining_cycles = 0;
+ uint32_t offset = OPER_I_16();
+ m_pc -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ if(m_pc == m_ppc && m_remaining_cycles > 0)
+ m_remaining_cycles = 0;
}
M68KMAKE_OP(bra, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t offset = OPER_I_32(mc68kcpu);
- REG_PC(mc68kcpu) -= 4;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_branch_32((mc68kcpu), offset);
- if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0)
- (mc68kcpu)->remaining_cycles = 0;
+ uint32_t offset = OPER_I_32();
+ m_pc -= 4;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset);
+ if(m_pc == m_ppc && m_remaining_cycles > 0)
+ m_remaining_cycles = 0;
return;
}
else
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir));
- if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0)
- (mc68kcpu)->remaining_cycles = 0;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir));
+ if(m_pc == m_ppc && m_remaining_cycles > 0)
+ m_remaining_cycles = 0;
}
}
M68KMAKE_OP(bset, 32, r, d)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t mask = 1 << (DX(mc68kcpu) & 0x1f);
+ uint32_t* r_dst = &DY();
+ uint32_t mask = 1 << (DX() & 0x1f);
- (mc68kcpu)->not_z_flag = *r_dst & mask;
+ m_not_z_flag = *r_dst & mask;
*r_dst |= mask;
}
@@ -3218,238 +3213,238 @@ M68KMAKE_OP(bset, 32, r, d)
M68KMAKE_OP(bset, 8, r, .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t src = m68ki_read_8((mc68kcpu), ea);
- uint32_t mask = 1 << (DX(mc68kcpu) & 7);
+ uint32_t src = m68ki_read_8(ea);
+ uint32_t mask = 1 << (DX() & 7);
- (mc68kcpu)->not_z_flag = src & mask;
- m68ki_write_8((mc68kcpu), ea, src | mask);
+ m_not_z_flag = src & mask;
+ m68ki_write_8(ea, src | mask);
}
M68KMAKE_OP(bset, 32, s, d)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f);
+ uint32_t* r_dst = &DY();
+ uint32_t mask = 1 << (OPER_I_8() & 0x1f);
- (mc68kcpu)->not_z_flag = *r_dst & mask;
+ m_not_z_flag = *r_dst & mask;
*r_dst |= mask;
}
M68KMAKE_OP(bset, 8, s, .)
{
- uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 7);
+ uint32_t mask = 1 << (OPER_I_8() & 7);
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t src = m68ki_read_8((mc68kcpu), ea);
+ uint32_t src = m68ki_read_8(ea);
- (mc68kcpu)->not_z_flag = src & mask;
- m68ki_write_8((mc68kcpu), ea, src | mask);
+ m_not_z_flag = src & mask;
+ m68ki_write_8(ea, src | mask);
}
M68KMAKE_OP(bsr, 8, ., .)
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu));
- m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir));
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(m_pc);
+ m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir));
}
M68KMAKE_OP(bsr, 16, ., .)
{
- uint32_t offset = OPER_I_16(mc68kcpu);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu));
- REG_PC(mc68kcpu) -= 2;
- m68ki_branch_16((mc68kcpu), offset);
+ uint32_t offset = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(m_pc);
+ m_pc -= 2;
+ m68ki_branch_16(offset);
}
M68KMAKE_OP(bsr, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t offset = OPER_I_32(mc68kcpu);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu));
- REG_PC(mc68kcpu) -= 4;
- m68ki_branch_32((mc68kcpu), offset);
+ uint32_t offset = OPER_I_32();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(m_pc);
+ m_pc -= 4;
+ m68ki_branch_32(offset);
return;
}
else
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu));
- m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir));
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(m_pc);
+ m68ki_branch_8(MASK_OUT_ABOVE_8(m_ir));
}
}
M68KMAKE_OP(btst, 32, r, d)
{
- (mc68kcpu)->not_z_flag = DY(mc68kcpu) & (1 << (DX(mc68kcpu) & 0x1f));
+ m_not_z_flag = DY() & (1 << (DX() & 0x1f));
}
M68KMAKE_OP(btst, 8, r, .)
{
- (mc68kcpu)->not_z_flag = M68KMAKE_GET_OPER_AY_8 & (1 << (DX(mc68kcpu) & 7));
+ m_not_z_flag = M68KMAKE_GET_OPER_AY_8 & (1 << (DX() & 7));
}
M68KMAKE_OP(btst, 32, s, d)
{
- (mc68kcpu)->not_z_flag = DY(mc68kcpu) & (1 << (OPER_I_8(mc68kcpu) & 0x1f));
+ m_not_z_flag = DY() & (1 << (OPER_I_8() & 0x1f));
}
M68KMAKE_OP(btst, 8, s, .)
{
- uint32_t bit = OPER_I_8(mc68kcpu) & 7;
+ uint32_t bit = OPER_I_8() & 7;
- (mc68kcpu)->not_z_flag = M68KMAKE_GET_OPER_AY_8 & (1 << bit);
+ m_not_z_flag = M68KMAKE_GET_OPER_AY_8 & (1 << bit);
}
M68KMAKE_OP(callm, 32, ., .)
{
/* note: watch out for pcrelative modes */
- if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_020_VARIANT())
{
uint32_t ea = M68KMAKE_GET_EA_AY_32;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- REG_PC(mc68kcpu) += 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m_pc += 2;
(void)ea; /* just to avoid an 'unused variable' warning */
- mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
- (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
+ tag(), m_ppc, m_ir);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(cas, 8, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t dest = m68ki_read_8((mc68kcpu), ea);
- uint32_t* compare = &REG_D(mc68kcpu)[word2 & 7];
+ uint32_t dest = m68ki_read_8(ea);
+ uint32_t* compare = &REG_D()[word2 & 7];
uint32_t res = dest - MASK_OUT_ABOVE_8(*compare);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_8(*compare, dest, res);
- (mc68kcpu)->c_flag = CFLAG_8(res);
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_v_flag = VFLAG_SUB_8(*compare, dest, res);
+ m_c_flag = CFLAG_8(res);
- if(COND_NE(mc68kcpu))
+ if(COND_NE())
*compare = MASK_OUT_BELOW_8(*compare) | dest;
else
{
- (mc68kcpu)->remaining_cycles -= 3;
- m68ki_write_8((mc68kcpu), ea, MASK_OUT_ABOVE_8(REG_D(mc68kcpu)[(word2 >> 6) & 7]));
+ m_remaining_cycles -= 3;
+ m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D()[(word2 >> 6) & 7]));
}
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(cas, 16, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- uint32_t dest = m68ki_read_16((mc68kcpu), ea);
- uint32_t* compare = &REG_D(mc68kcpu)[word2 & 7];
+ uint32_t dest = m68ki_read_16(ea);
+ uint32_t* compare = &REG_D()[word2 & 7];
uint32_t res = dest - MASK_OUT_ABOVE_16(*compare);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_16(*compare, dest, res);
- (mc68kcpu)->c_flag = CFLAG_16(res);
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_v_flag = VFLAG_SUB_16(*compare, dest, res);
+ m_c_flag = CFLAG_16(res);
- if(COND_NE(mc68kcpu))
+ if(COND_NE())
*compare = MASK_OUT_BELOW_16(*compare) | dest;
else
{
- (mc68kcpu)->remaining_cycles -= 3;
- m68ki_write_16((mc68kcpu), ea, MASK_OUT_ABOVE_16(REG_D(mc68kcpu)[(word2 >> 6) & 7]));
+ m_remaining_cycles -= 3;
+ m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D()[(word2 >> 6) & 7]));
}
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(cas, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
uint32_t ea = M68KMAKE_GET_EA_AY_32;
- uint32_t dest = m68ki_read_32((mc68kcpu), ea);
- uint32_t* compare = &REG_D(mc68kcpu)[word2 & 7];
+ uint32_t dest = m68ki_read_32(ea);
+ uint32_t* compare = &REG_D()[word2 & 7];
uint32_t res = dest - *compare;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(*compare, dest, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(*compare, dest, res);
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(*compare, dest, res);
+ m_c_flag = CFLAG_SUB_32(*compare, dest, res);
- if(COND_NE(mc68kcpu))
+ if(COND_NE())
*compare = dest;
else
{
- (mc68kcpu)->remaining_cycles -= 3;
- m68ki_write_32((mc68kcpu), ea, REG_D(mc68kcpu)[(word2 >> 6) & 7]);
+ m_remaining_cycles -= 3;
+ m68ki_write_32(ea, REG_D()[(word2 >> 6) & 7]);
}
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(cas2, 16, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_32(mc68kcpu);
- uint32_t* compare1 = &REG_D(mc68kcpu)[(word2 >> 16) & 7];
- uint32_t ea1 = REG_DA(mc68kcpu)[(word2 >> 28) & 15];
- uint32_t dest1 = m68ki_read_16((mc68kcpu), ea1);
+ uint32_t word2 = OPER_I_32();
+ uint32_t* compare1 = &REG_D()[(word2 >> 16) & 7];
+ uint32_t ea1 = REG_DA()[(word2 >> 28) & 15];
+ uint32_t dest1 = m68ki_read_16(ea1);
uint32_t res1 = dest1 - MASK_OUT_ABOVE_16(*compare1);
- uint32_t* compare2 = &REG_D(mc68kcpu)[word2 & 7];
- uint32_t ea2 = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
- uint32_t dest2 = m68ki_read_16((mc68kcpu), ea2);
+ uint32_t* compare2 = &REG_D()[word2 & 7];
+ uint32_t ea2 = REG_DA()[(word2 >> 12) & 15];
+ uint32_t dest2 = m68ki_read_16(ea2);
uint32_t res2;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- (mc68kcpu)->n_flag = NFLAG_16(res1);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res1);
- (mc68kcpu)->v_flag = VFLAG_SUB_16(*compare1, dest1, res1);
- (mc68kcpu)->c_flag = CFLAG_16(res1);
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m_n_flag = NFLAG_16(res1);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res1);
+ m_v_flag = VFLAG_SUB_16(*compare1, dest1, res1);
+ m_c_flag = CFLAG_16(res1);
- if(COND_EQ(mc68kcpu))
+ if(COND_EQ())
{
res2 = dest2 - MASK_OUT_ABOVE_16(*compare2);
- (mc68kcpu)->n_flag = NFLAG_16(res2);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res2);
- (mc68kcpu)->v_flag = VFLAG_SUB_16(*compare2, dest2, res2);
- (mc68kcpu)->c_flag = CFLAG_16(res2);
+ m_n_flag = NFLAG_16(res2);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res2);
+ m_v_flag = VFLAG_SUB_16(*compare2, dest2, res2);
+ m_c_flag = CFLAG_16(res2);
- if(COND_EQ(mc68kcpu))
+ if(COND_EQ())
{
- (mc68kcpu)->remaining_cycles -= 3;
- m68ki_write_16((mc68kcpu), ea1, REG_D(mc68kcpu)[(word2 >> 22) & 7]);
- m68ki_write_16((mc68kcpu), ea2, REG_D(mc68kcpu)[(word2 >> 6) & 7]);
+ m_remaining_cycles -= 3;
+ m68ki_write_16(ea1, REG_D()[(word2 >> 22) & 7]);
+ m68ki_write_16(ea2, REG_D()[(word2 >> 6) & 7]);
return;
}
}
@@ -3457,44 +3452,44 @@ M68KMAKE_OP(cas2, 16, ., .)
*compare2 = BIT_F(word2) ? MAKE_INT_16(dest2) : MASK_OUT_BELOW_16(*compare2) | dest2;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(cas2, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_32(mc68kcpu);
- uint32_t* compare1 = &REG_D(mc68kcpu)[(word2 >> 16) & 7];
- uint32_t ea1 = REG_DA(mc68kcpu)[(word2 >> 28) & 15];
- uint32_t dest1 = m68ki_read_32((mc68kcpu), ea1);
+ uint32_t word2 = OPER_I_32();
+ uint32_t* compare1 = &REG_D()[(word2 >> 16) & 7];
+ uint32_t ea1 = REG_DA()[(word2 >> 28) & 15];
+ uint32_t dest1 = m68ki_read_32(ea1);
uint32_t res1 = dest1 - *compare1;
- uint32_t* compare2 = &REG_D(mc68kcpu)[word2 & 7];
- uint32_t ea2 = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
- uint32_t dest2 = m68ki_read_32((mc68kcpu), ea2);
+ uint32_t* compare2 = &REG_D()[word2 & 7];
+ uint32_t ea2 = REG_DA()[(word2 >> 12) & 15];
+ uint32_t dest2 = m68ki_read_32(ea2);
uint32_t res2;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- (mc68kcpu)->n_flag = NFLAG_32(res1);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res1);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(*compare1, dest1, res1);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(*compare1, dest1, res1);
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m_n_flag = NFLAG_32(res1);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res1);
+ m_v_flag = VFLAG_SUB_32(*compare1, dest1, res1);
+ m_c_flag = CFLAG_SUB_32(*compare1, dest1, res1);
- if(COND_EQ(mc68kcpu))
+ if(COND_EQ())
{
res2 = dest2 - *compare2;
- (mc68kcpu)->n_flag = NFLAG_32(res2);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res2);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(*compare2, dest2, res2);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(*compare2, dest2, res2);
+ m_n_flag = NFLAG_32(res2);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res2);
+ m_v_flag = VFLAG_SUB_32(*compare2, dest2, res2);
+ m_c_flag = CFLAG_SUB_32(*compare2, dest2, res2);
- if(COND_EQ(mc68kcpu))
+ if(COND_EQ())
{
- (mc68kcpu)->remaining_cycles -= 3;
- m68ki_write_32((mc68kcpu), ea1, REG_D(mc68kcpu)[(word2 >> 22) & 7]);
- m68ki_write_32((mc68kcpu), ea2, REG_D(mc68kcpu)[(word2 >> 6) & 7]);
+ m_remaining_cycles -= 3;
+ m68ki_write_32(ea1, REG_D()[(word2 >> 22) & 7]);
+ m68ki_write_32(ea2, REG_D()[(word2 >> 6) & 7]);
return;
}
}
@@ -3502,392 +3497,392 @@ M68KMAKE_OP(cas2, 32, ., .)
*compare2 = dest2;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(chk, 16, ., d)
{
- int32_t src = MAKE_INT_16(DX(mc68kcpu));
- int32_t bound = MAKE_INT_16(DY(mc68kcpu));
+ int32_t src = MAKE_INT_16(DX());
+ int32_t bound = MAKE_INT_16(DY());
- (mc68kcpu)->not_z_flag = ZFLAG_16(src); /* Undocumented */
- (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */
- (mc68kcpu)->c_flag = CFLAG_CLEAR; /* Undocumented */
+ m_not_z_flag = ZFLAG_16(src); /* Undocumented */
+ m_v_flag = VFLAG_CLEAR; /* Undocumented */
+ m_c_flag = CFLAG_CLEAR; /* Undocumented */
if(src >= 0 && src <= bound)
{
return;
}
- (mc68kcpu)->n_flag = (src < 0)<<7;
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m_n_flag = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
}
M68KMAKE_OP(chk, 16, ., .)
{
- int32_t src = MAKE_INT_16(DX(mc68kcpu));
+ int32_t src = MAKE_INT_16(DX());
int32_t bound = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
- (mc68kcpu)->not_z_flag = ZFLAG_16(src); /* Undocumented */
- (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */
- (mc68kcpu)->c_flag = CFLAG_CLEAR; /* Undocumented */
+ m_not_z_flag = ZFLAG_16(src); /* Undocumented */
+ m_v_flag = VFLAG_CLEAR; /* Undocumented */
+ m_c_flag = CFLAG_CLEAR; /* Undocumented */
if(src >= 0 && src <= bound)
{
return;
}
- (mc68kcpu)->n_flag = (src < 0)<<7;
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m_n_flag = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
}
M68KMAKE_OP(chk, 32, ., d)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- int32_t src = MAKE_INT_32(DX(mc68kcpu));
- int32_t bound = MAKE_INT_32(DY(mc68kcpu));
+ int32_t src = MAKE_INT_32(DX());
+ int32_t bound = MAKE_INT_32(DY());
- (mc68kcpu)->not_z_flag = ZFLAG_32(src); /* Undocumented */
- (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */
- (mc68kcpu)->c_flag = CFLAG_CLEAR; /* Undocumented */
+ m_not_z_flag = ZFLAG_32(src); /* Undocumented */
+ m_v_flag = VFLAG_CLEAR; /* Undocumented */
+ m_c_flag = CFLAG_CLEAR; /* Undocumented */
if(src >= 0 && src <= bound)
{
return;
}
- (mc68kcpu)->n_flag = (src < 0)<<7;
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m_n_flag = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(chk, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- int32_t src = MAKE_INT_32(DX(mc68kcpu));
+ int32_t src = MAKE_INT_32(DX());
int32_t bound = MAKE_INT_32(M68KMAKE_GET_OPER_AY_32);
- (mc68kcpu)->not_z_flag = ZFLAG_32(src); /* Undocumented */
- (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */
- (mc68kcpu)->c_flag = CFLAG_CLEAR; /* Undocumented */
+ m_not_z_flag = ZFLAG_32(src); /* Undocumented */
+ m_v_flag = VFLAG_CLEAR; /* Undocumented */
+ m_c_flag = CFLAG_CLEAR; /* Undocumented */
if(src >= 0 && src <= bound)
{
return;
}
- (mc68kcpu)->n_flag = (src < 0)<<7;
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m_n_flag = (src < 0)<<7;
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(chk2cmp2, 8, ., pcdi)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
- uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff;
- uint32_t ea = EA_PCDI_8(mc68kcpu);
- uint32_t lower_bound = m68ki_read_pcrel_8((mc68kcpu), ea);
- uint32_t upper_bound = m68ki_read_pcrel_8((mc68kcpu), ea + 1);
+ uint32_t word2 = OPER_I_16();
+ uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xff;
+ uint32_t ea = EA_PCDI_8();
+ uint32_t lower_bound = m68ki_read_pcrel_8(ea);
+ uint32_t upper_bound = m68ki_read_pcrel_8(ea + 1);
if(!BIT_F(word2))
- (mc68kcpu)->c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
+ m_c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
else
- (mc68kcpu)->c_flag = compare - lower_bound;
- (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
- if(COND_CS(mc68kcpu))
+ m_c_flag = compare - lower_bound;
+ m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
+ if(COND_CS())
{
if(BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- (mc68kcpu)->c_flag = upper_bound - compare;
- if(COND_CS(mc68kcpu) && BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m_c_flag = upper_bound - compare;
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(chk2cmp2, 8, ., pcix)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
- uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff;
- uint32_t ea = EA_PCIX_8(mc68kcpu);
- uint32_t lower_bound = m68ki_read_pcrel_8((mc68kcpu), ea);
- uint32_t upper_bound = m68ki_read_pcrel_8((mc68kcpu), ea + 1);
+ uint32_t word2 = OPER_I_16();
+ uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xff;
+ uint32_t ea = EA_PCIX_8();
+ uint32_t lower_bound = m68ki_read_pcrel_8(ea);
+ uint32_t upper_bound = m68ki_read_pcrel_8(ea + 1);
if(!BIT_F(word2))
- (mc68kcpu)->c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
+ m_c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
else
- (mc68kcpu)->c_flag = compare - lower_bound;
- (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
- if(COND_CS(mc68kcpu))
+ m_c_flag = compare - lower_bound;
+ m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
+ if(COND_CS())
{
if(BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- (mc68kcpu)->c_flag = upper_bound - compare;
- if(COND_CS(mc68kcpu) && BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m_c_flag = upper_bound - compare;
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(chk2cmp2, 8, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
- uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff;
+ uint32_t word2 = OPER_I_16();
+ uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xff;
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t lower_bound = m68ki_read_8((mc68kcpu), ea);
- uint32_t upper_bound = m68ki_read_8((mc68kcpu), ea + 1);
+ uint32_t lower_bound = m68ki_read_8(ea);
+ uint32_t upper_bound = m68ki_read_8(ea + 1);
if(!BIT_F(word2))
- (mc68kcpu)->c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
+ m_c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
else
- (mc68kcpu)->c_flag = compare - lower_bound;
- (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
- if(COND_CS(mc68kcpu))
+ m_c_flag = compare - lower_bound;
+ m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
+ if(COND_CS())
{
if(BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- (mc68kcpu)->c_flag = upper_bound - compare;
- if(COND_CS(mc68kcpu) && BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m_c_flag = upper_bound - compare;
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(chk2cmp2, 16, ., pcdi)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
- uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff;
- uint32_t ea = EA_PCDI_16(mc68kcpu);
- uint32_t lower_bound = m68ki_read_pcrel_16((mc68kcpu), ea);
- uint32_t upper_bound = m68ki_read_pcrel_16((mc68kcpu), ea + 2);
+ uint32_t word2 = OPER_I_16();
+ uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xffff;
+ uint32_t ea = EA_PCDI_16();
+ uint32_t lower_bound = m68ki_read_pcrel_16(ea);
+ uint32_t upper_bound = m68ki_read_pcrel_16(ea + 2);
if(!BIT_F(word2))
- (mc68kcpu)->c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
+ m_c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
else
- (mc68kcpu)->c_flag = compare - lower_bound;
- (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
- (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag);
- if(COND_CS(mc68kcpu))
+ m_c_flag = compare - lower_bound;
+ m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
+ m_c_flag = CFLAG_16(m_c_flag);
+ if(COND_CS())
{
if(BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
if(!BIT_F(word2))
- (mc68kcpu)->c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
+ m_c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
else
- (mc68kcpu)->c_flag = upper_bound - compare;
- (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag);
- if(COND_CS(mc68kcpu) && BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m_c_flag = upper_bound - compare;
+ m_c_flag = CFLAG_16(m_c_flag);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(chk2cmp2, 16, ., pcix)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
- uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff;
- uint32_t ea = EA_PCIX_16(mc68kcpu);
- uint32_t lower_bound = m68ki_read_pcrel_16((mc68kcpu), ea);
- uint32_t upper_bound = m68ki_read_pcrel_16((mc68kcpu), ea + 2);
+ uint32_t word2 = OPER_I_16();
+ uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xffff;
+ uint32_t ea = EA_PCIX_16();
+ uint32_t lower_bound = m68ki_read_pcrel_16(ea);
+ uint32_t upper_bound = m68ki_read_pcrel_16(ea + 2);
if(!BIT_F(word2))
- (mc68kcpu)->c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
+ m_c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
else
- (mc68kcpu)->c_flag = compare - lower_bound;
- (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
- (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag);
- if(COND_CS(mc68kcpu))
+ m_c_flag = compare - lower_bound;
+ m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
+ m_c_flag = CFLAG_16(m_c_flag);
+ if(COND_CS())
{
if(BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
if(!BIT_F(word2))
- (mc68kcpu)->c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
+ m_c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
else
- (mc68kcpu)->c_flag = upper_bound - compare;
- (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag);
- if(COND_CS(mc68kcpu) && BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m_c_flag = upper_bound - compare;
+ m_c_flag = CFLAG_16(m_c_flag);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(chk2cmp2, 16, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
- uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff;
+ uint32_t word2 = OPER_I_16();
+ uint32_t compare = REG_DA()[(word2 >> 12) & 15]&0xffff;
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- uint32_t lower_bound = m68ki_read_16((mc68kcpu), ea);
- uint32_t upper_bound = m68ki_read_16((mc68kcpu), ea + 2);
+ uint32_t lower_bound = m68ki_read_16(ea);
+ uint32_t upper_bound = m68ki_read_16(ea + 2);
if(!BIT_F(word2))
- (mc68kcpu)->c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
+ m_c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
else
- (mc68kcpu)->c_flag = compare - lower_bound;
+ m_c_flag = compare - lower_bound;
- (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
- (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag);
- if(COND_CS(mc68kcpu))
+ m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
+ m_c_flag = CFLAG_16(m_c_flag);
+ if(COND_CS())
{
if(BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
if(!BIT_F(word2))
- (mc68kcpu)->c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
+ m_c_flag = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
else
- (mc68kcpu)->c_flag = upper_bound - compare;
+ m_c_flag = upper_bound - compare;
- (mc68kcpu)->c_flag = CFLAG_16((mc68kcpu)->c_flag);
- if(COND_CS(mc68kcpu) && BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m_c_flag = CFLAG_16(m_c_flag);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(chk2cmp2, 32, ., pcdi)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
- uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
- uint32_t ea = EA_PCDI_32(mc68kcpu);
- uint32_t lower_bound = m68ki_read_pcrel_32((mc68kcpu), ea);
- uint32_t upper_bound = m68ki_read_pcrel_32((mc68kcpu), ea + 4);
+ uint32_t word2 = OPER_I_16();
+ uint32_t compare = REG_DA()[(word2 >> 12) & 15];
+ uint32_t ea = EA_PCDI_32();
+ uint32_t lower_bound = m68ki_read_pcrel_32(ea);
+ uint32_t upper_bound = m68ki_read_pcrel_32(ea + 4);
- (mc68kcpu)->c_flag = compare - lower_bound;
- (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
- (mc68kcpu)->c_flag = CFLAG_SUB_32(lower_bound, compare, (mc68kcpu)->c_flag);
- if(COND_CS(mc68kcpu))
+ m_c_flag = compare - lower_bound;
+ m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
+ m_c_flag = CFLAG_SUB_32(lower_bound, compare, m_c_flag);
+ if(COND_CS())
{
if(BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- (mc68kcpu)->c_flag = upper_bound - compare;
- (mc68kcpu)->c_flag = CFLAG_SUB_32(compare, upper_bound, (mc68kcpu)->c_flag);
- if(COND_CS(mc68kcpu) && BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m_c_flag = upper_bound - compare;
+ m_c_flag = CFLAG_SUB_32(compare, upper_bound, m_c_flag);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(chk2cmp2, 32, ., pcix)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
- uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
- uint32_t ea = EA_PCIX_32(mc68kcpu);
- uint32_t lower_bound = m68ki_read_pcrel_32((mc68kcpu), ea);
- uint32_t upper_bound = m68ki_read_pcrel_32((mc68kcpu), ea + 4);
+ uint32_t word2 = OPER_I_16();
+ uint32_t compare = REG_DA()[(word2 >> 12) & 15];
+ uint32_t ea = EA_PCIX_32();
+ uint32_t lower_bound = m68ki_read_pcrel_32(ea);
+ uint32_t upper_bound = m68ki_read_pcrel_32(ea + 4);
- (mc68kcpu)->c_flag = compare - lower_bound;
- (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
- (mc68kcpu)->c_flag = CFLAG_SUB_32(lower_bound, compare, (mc68kcpu)->c_flag);
- if(COND_CS(mc68kcpu))
+ m_c_flag = compare - lower_bound;
+ m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
+ m_c_flag = CFLAG_SUB_32(lower_bound, compare, m_c_flag);
+ if(COND_CS())
{
if(BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- (mc68kcpu)->c_flag = upper_bound - compare;
- (mc68kcpu)->c_flag = CFLAG_SUB_32(compare, upper_bound, (mc68kcpu)->c_flag);
- if(COND_CS(mc68kcpu) && BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m_c_flag = upper_bound - compare;
+ m_c_flag = CFLAG_SUB_32(compare, upper_bound, m_c_flag);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(chk2cmp2, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
- uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
+ uint32_t word2 = OPER_I_16();
+ uint32_t compare = REG_DA()[(word2 >> 12) & 15];
uint32_t ea = M68KMAKE_GET_EA_AY_32;
- uint32_t lower_bound = m68ki_read_32((mc68kcpu), ea);
- uint32_t upper_bound = m68ki_read_32((mc68kcpu), ea + 4);
+ uint32_t lower_bound = m68ki_read_32(ea);
+ uint32_t upper_bound = m68ki_read_32(ea + 4);
- (mc68kcpu)->c_flag = compare - lower_bound;
- (mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
- (mc68kcpu)->c_flag = CFLAG_SUB_32(lower_bound, compare, (mc68kcpu)->c_flag);
- if(COND_CS(mc68kcpu))
+ m_c_flag = compare - lower_bound;
+ m_not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
+ m_c_flag = CFLAG_SUB_32(lower_bound, compare, m_c_flag);
+ if(COND_CS())
{
if(BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- (mc68kcpu)->c_flag = upper_bound - compare;
- (mc68kcpu)->c_flag = CFLAG_SUB_32(compare, upper_bound, (mc68kcpu)->c_flag);
- if(COND_CS(mc68kcpu) && BIT_B(word2))
- m68ki_exception_trap((mc68kcpu), EXCEPTION_CHK);
+ m_c_flag = upper_bound - compare;
+ m_c_flag = CFLAG_SUB_32(compare, upper_bound, m_c_flag);
+ if(COND_CS() && BIT_B(word2))
+ m68ki_exception_trap(EXCEPTION_CHK);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(clr, 8, ., d)
{
- DY(mc68kcpu) &= 0xffffff00;
+ DY() &= 0xffffff00;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
+ m_n_flag = NFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
}
@@ -3895,28 +3890,28 @@ M68KMAKE_OP(clr, 8, ., .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_000())
{
- m68ki_read_8((mc68kcpu), ea); /* the 68000 does a dummy read, the value is discarded */
+ m68ki_read_8(ea); /* the 68000 does a dummy read, the value is discarded */
}
- m68ki_write_8((mc68kcpu), ea, 0);
+ m68ki_write_8(ea, 0);
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
+ m_n_flag = NFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
}
M68KMAKE_OP(clr, 16, ., d)
{
- DY(mc68kcpu) &= 0xffff0000;
+ DY() &= 0xffff0000;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
+ m_n_flag = NFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
}
@@ -3924,28 +3919,28 @@ M68KMAKE_OP(clr, 16, ., .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_000())
{
- m68ki_read_16((mc68kcpu), ea); /* the 68000 does a dummy read, the value is discarded */
+ m68ki_read_16(ea); /* the 68000 does a dummy read, the value is discarded */
}
- m68ki_write_16((mc68kcpu), ea, 0);
+ m68ki_write_16(ea, 0);
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
+ m_n_flag = NFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
}
M68KMAKE_OP(clr, 32, ., d)
{
- DY(mc68kcpu) = 0;
+ DY() = 0;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
+ m_n_flag = NFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
}
@@ -3953,561 +3948,561 @@ M68KMAKE_OP(clr, 32, ., .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_32;
- if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_000())
{
- m68ki_read_32((mc68kcpu), ea); /* the 68000 does a dummy read, the value is discarded */
+ m68ki_read_32(ea); /* the 68000 does a dummy read, the value is discarded */
}
- m68ki_write_32((mc68kcpu), ea, 0);
+ m68ki_write_32(ea, 0);
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
+ m_n_flag = NFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
}
M68KMAKE_OP(cmp, 8, ., d)
{
- uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- uint32_t dst = MASK_OUT_ABOVE_8(DX(mc68kcpu));
+ uint32_t src = MASK_OUT_ABOVE_8(DY());
+ uint32_t dst = MASK_OUT_ABOVE_8(DX());
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_v_flag = VFLAG_SUB_8(src, dst, res);
+ m_c_flag = CFLAG_8(res);
}
M68KMAKE_OP(cmp, 8, ., .)
{
uint32_t src = M68KMAKE_GET_OPER_AY_8;
- uint32_t dst = MASK_OUT_ABOVE_8(DX(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_8(DX());
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_v_flag = VFLAG_SUB_8(src, dst, res);
+ m_c_flag = CFLAG_8(res);
}
M68KMAKE_OP(cmp, 16, ., d)
{
- uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- uint32_t dst = MASK_OUT_ABOVE_16(DX(mc68kcpu));
+ uint32_t src = MASK_OUT_ABOVE_16(DY());
+ uint32_t dst = MASK_OUT_ABOVE_16(DX());
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_v_flag = VFLAG_SUB_16(src, dst, res);
+ m_c_flag = CFLAG_16(res);
}
M68KMAKE_OP(cmp, 16, ., a)
{
- uint32_t src = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- uint32_t dst = MASK_OUT_ABOVE_16(DX(mc68kcpu));
+ uint32_t src = MASK_OUT_ABOVE_16(AY());
+ uint32_t dst = MASK_OUT_ABOVE_16(DX());
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_v_flag = VFLAG_SUB_16(src, dst, res);
+ m_c_flag = CFLAG_16(res);
}
M68KMAKE_OP(cmp, 16, ., .)
{
uint32_t src = M68KMAKE_GET_OPER_AY_16;
- uint32_t dst = MASK_OUT_ABOVE_16(DX(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_16(DX());
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_v_flag = VFLAG_SUB_16(src, dst, res);
+ m_c_flag = CFLAG_16(res);
}
M68KMAKE_OP(cmp, 32, ., d)
{
- uint32_t src = DY(mc68kcpu);
- uint32_t dst = DX(mc68kcpu);
+ uint32_t src = DY();
+ uint32_t dst = DX();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
}
M68KMAKE_OP(cmp, 32, ., a)
{
- uint32_t src = AY(mc68kcpu);
- uint32_t dst = DX(mc68kcpu);
+ uint32_t src = AY();
+ uint32_t dst = DX();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
}
M68KMAKE_OP(cmp, 32, ., .)
{
uint32_t src = M68KMAKE_GET_OPER_AY_32;
- uint32_t dst = DX(mc68kcpu);
+ uint32_t dst = DX();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
}
M68KMAKE_OP(cmpa, 16, ., d)
{
- uint32_t src = MAKE_INT_16(DY(mc68kcpu));
- uint32_t dst = AX(mc68kcpu);
+ uint32_t src = MAKE_INT_16(DY());
+ uint32_t dst = AX();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
}
M68KMAKE_OP(cmpa, 16, ., a)
{
- uint32_t src = MAKE_INT_16(AY(mc68kcpu));
- uint32_t dst = AX(mc68kcpu);
+ uint32_t src = MAKE_INT_16(AY());
+ uint32_t dst = AX();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
}
M68KMAKE_OP(cmpa, 16, ., .)
{
uint32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
- uint32_t dst = AX(mc68kcpu);
+ uint32_t dst = AX();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
}
M68KMAKE_OP(cmpa, 32, ., d)
{
- uint32_t src = DY(mc68kcpu);
- uint32_t dst = AX(mc68kcpu);
+ uint32_t src = DY();
+ uint32_t dst = AX();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
}
M68KMAKE_OP(cmpa, 32, ., a)
{
- uint32_t src = AY(mc68kcpu);
- uint32_t dst = AX(mc68kcpu);
+ uint32_t src = AY();
+ uint32_t dst = AX();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
}
M68KMAKE_OP(cmpa, 32, ., .)
{
uint32_t src = M68KMAKE_GET_OPER_AY_32;
- uint32_t dst = AX(mc68kcpu);
+ uint32_t dst = AX();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
}
M68KMAKE_OP(cmpi, 8, ., d)
{
- uint32_t src = OPER_I_8(mc68kcpu);
- uint32_t dst = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t src = OPER_I_8();
+ uint32_t dst = MASK_OUT_ABOVE_8(DY());
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_v_flag = VFLAG_SUB_8(src, dst, res);
+ m_c_flag = CFLAG_8(res);
}
M68KMAKE_OP(cmpi, 8, ., .)
{
- uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t src = OPER_I_8();
uint32_t dst = M68KMAKE_GET_OPER_AY_8;
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_v_flag = VFLAG_SUB_8(src, dst, res);
+ m_c_flag = CFLAG_8(res);
}
M68KMAKE_OP(cmpi, 8, ., pcdi)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t src = OPER_I_8(mc68kcpu);
- uint32_t dst = OPER_PCDI_8(mc68kcpu);
+ uint32_t src = OPER_I_8();
+ uint32_t dst = OPER_PCDI_8();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_v_flag = VFLAG_SUB_8(src, dst, res);
+ m_c_flag = CFLAG_8(res);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(cmpi, 8, ., pcix)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t src = OPER_I_8(mc68kcpu);
- uint32_t dst = OPER_PCIX_8(mc68kcpu);
+ uint32_t src = OPER_I_8();
+ uint32_t dst = OPER_PCIX_8();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_v_flag = VFLAG_SUB_8(src, dst, res);
+ m_c_flag = CFLAG_8(res);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(cmpi, 16, ., d)
{
- uint32_t src = OPER_I_16(mc68kcpu);
- uint32_t dst = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t src = OPER_I_16();
+ uint32_t dst = MASK_OUT_ABOVE_16(DY());
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_v_flag = VFLAG_SUB_16(src, dst, res);
+ m_c_flag = CFLAG_16(res);
}
M68KMAKE_OP(cmpi, 16, ., .)
{
- uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t src = OPER_I_16();
uint32_t dst = M68KMAKE_GET_OPER_AY_16;
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_v_flag = VFLAG_SUB_16(src, dst, res);
+ m_c_flag = CFLAG_16(res);
}
M68KMAKE_OP(cmpi, 16, ., pcdi)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t src = OPER_I_16(mc68kcpu);
- uint32_t dst = OPER_PCDI_16(mc68kcpu);
+ uint32_t src = OPER_I_16();
+ uint32_t dst = OPER_PCDI_16();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_v_flag = VFLAG_SUB_16(src, dst, res);
+ m_c_flag = CFLAG_16(res);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(cmpi, 16, ., pcix)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t src = OPER_I_16(mc68kcpu);
- uint32_t dst = OPER_PCIX_16(mc68kcpu);
+ uint32_t src = OPER_I_16();
+ uint32_t dst = OPER_PCIX_16();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_v_flag = VFLAG_SUB_16(src, dst, res);
+ m_c_flag = CFLAG_16(res);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(cmpi, 32, ., d)
{
- uint32_t src = OPER_I_32(mc68kcpu);
- uint32_t dst = DY(mc68kcpu);
+ uint32_t src = OPER_I_32();
+ uint32_t dst = DY();
uint32_t res = dst - src;
- if (!(mc68kcpu)->cmpild_instr_callback.isnull())
- ((mc68kcpu)->cmpild_instr_callback)(*(mc68kcpu)->program, (mc68kcpu)->ir & 7, src, 0xffffffff);
+ if (!m_cmpild_instr_callback.isnull())
+ (m_cmpild_instr_callback)(*m_program, m_ir & 7, src, 0xffffffff);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
}
M68KMAKE_OP(cmpi, 32, ., .)
{
- uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t src = OPER_I_32();
uint32_t dst = M68KMAKE_GET_OPER_AY_32;
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
}
M68KMAKE_OP(cmpi, 32, ., pcdi)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t src = OPER_I_32(mc68kcpu);
- uint32_t dst = OPER_PCDI_32(mc68kcpu);
+ uint32_t src = OPER_I_32();
+ uint32_t dst = OPER_PCDI_32();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(cmpi, 32, ., pcix)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t src = OPER_I_32(mc68kcpu);
- uint32_t dst = OPER_PCIX_32(mc68kcpu);
+ uint32_t src = OPER_I_32();
+ uint32_t dst = OPER_PCIX_32();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(cmpm, 8, ., ax7)
{
- uint32_t src = OPER_AY_PI_8(mc68kcpu);
- uint32_t dst = OPER_A7_PI_8(mc68kcpu);
+ uint32_t src = OPER_AY_PI_8();
+ uint32_t dst = OPER_A7_PI_8();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_v_flag = VFLAG_SUB_8(src, dst, res);
+ m_c_flag = CFLAG_8(res);
}
M68KMAKE_OP(cmpm, 8, ., ay7)
{
- uint32_t src = OPER_A7_PI_8(mc68kcpu);
- uint32_t dst = OPER_AX_PI_8(mc68kcpu);
+ uint32_t src = OPER_A7_PI_8();
+ uint32_t dst = OPER_AX_PI_8();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_v_flag = VFLAG_SUB_8(src, dst, res);
+ m_c_flag = CFLAG_8(res);
}
M68KMAKE_OP(cmpm, 8, ., axy7)
{
- uint32_t src = OPER_A7_PI_8(mc68kcpu);
- uint32_t dst = OPER_A7_PI_8(mc68kcpu);
+ uint32_t src = OPER_A7_PI_8();
+ uint32_t dst = OPER_A7_PI_8();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_v_flag = VFLAG_SUB_8(src, dst, res);
+ m_c_flag = CFLAG_8(res);
}
M68KMAKE_OP(cmpm, 8, ., .)
{
- uint32_t src = OPER_AY_PI_8(mc68kcpu);
- uint32_t dst = OPER_AX_PI_8(mc68kcpu);
+ uint32_t src = OPER_AY_PI_8();
+ uint32_t dst = OPER_AX_PI_8();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_8(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_8(res);
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = MASK_OUT_ABOVE_8(res);
+ m_v_flag = VFLAG_SUB_8(src, dst, res);
+ m_c_flag = CFLAG_8(res);
}
M68KMAKE_OP(cmpm, 16, ., .)
{
- uint32_t src = OPER_AY_PI_16(mc68kcpu);
- uint32_t dst = OPER_AX_PI_16(mc68kcpu);
+ uint32_t src = OPER_AY_PI_16();
+ uint32_t dst = OPER_AX_PI_16();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_16(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_16(res);
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = MASK_OUT_ABOVE_16(res);
+ m_v_flag = VFLAG_SUB_16(src, dst, res);
+ m_c_flag = CFLAG_16(res);
}
M68KMAKE_OP(cmpm, 32, ., .)
{
- uint32_t src = OPER_AY_PI_32(mc68kcpu);
- uint32_t dst = OPER_AX_PI_32(mc68kcpu);
+ uint32_t src = OPER_AY_PI_32();
+ uint32_t dst = OPER_AX_PI_32();
uint32_t res = dst - src;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
- (mc68kcpu)->v_flag = VFLAG_SUB_32(src, dst, res);
- (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = MASK_OUT_ABOVE_32(res);
+ m_v_flag = VFLAG_SUB_32(src, dst, res);
+ m_c_flag = CFLAG_SUB_32(src, dst, res);
}
M68KMAKE_OP(cpbcc, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpbcc)\n",
- (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ logerror("%s at %08x: called unimplemented instruction %04x (cpbcc)\n",
+ tag(), m_ppc, m_ir);
return;
}
- m68ki_exception_1111(mc68kcpu);
+ m68ki_exception_1111();
}
M68KMAKE_OP(cpdbcc, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpdbcc)\n",
- (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ logerror("%s at %08x: called unimplemented instruction %04x (cpdbcc)\n",
+ tag(), m_ppc, m_ir);
return;
}
- m68ki_exception_1111(mc68kcpu);
+ m68ki_exception_1111();
}
M68KMAKE_OP(cpgen, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type) && (mc68kcpu->get_fpu_enable() || mc68kcpu->has_pmmu))
+ if(CPU_TYPE_IS_EC020_PLUS() && (m_has_fpu || m_has_pmmu))
{
- mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpgen)\n",
- (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ logerror("%s at %08x: called unimplemented instruction %04x (cpgen)\n",
+ tag(), m_ppc, m_ir);
return;
}
- m68ki_exception_1111(mc68kcpu);
+ m68ki_exception_1111();
}
M68KMAKE_OP(cpscc, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpscc)\n",
- (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ logerror("%s at %08x: called unimplemented instruction %04x (cpscc)\n",
+ tag(), m_ppc, m_ir);
return;
}
- m68ki_exception_1111(mc68kcpu);
+ m68ki_exception_1111();
}
M68KMAKE_OP(cptrapcc, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cptrapcc)\n",
- (mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ logerror("%s at %08x: called unimplemented instruction %04x (cptrapcc)\n",
+ tag(), m_ppc, m_ir);
return;
}
- m68ki_exception_1111(mc68kcpu);
+ m68ki_exception_1111();
}
M68KMAKE_OP(ftrapcc, 32, ., .)
{
- if((mc68kcpu)->get_fpu_enable())
+ if(m_has_fpu)
{
- m68881_ftrap(mc68kcpu);
+ m68881_ftrap();
return;
}
- m68ki_exception_1111(mc68kcpu);
+ m68ki_exception_1111();
}
M68KMAKE_OP(dbt, 16, ., .)
{
- REG_PC(mc68kcpu) += 2;
+ m_pc += 2;
}
M68KMAKE_OP(dbf, 16, ., .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t* r_dst = &DY();
uint32_t res = MASK_OUT_ABOVE_16(*r_dst - 1);
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
if(res != 0xffff)
{
- uint32_t offset = OPER_I_16(mc68kcpu);
- REG_PC(mc68kcpu) -= 2;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_branch_16((mc68kcpu), offset);
- (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_noexp;
+ uint32_t offset = OPER_I_16();
+ m_pc -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ m_remaining_cycles -= m_cyc_dbcc_f_noexp;
return;
}
- REG_PC(mc68kcpu) += 2;
- (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_exp;
+ m_pc += 2;
+ m_remaining_cycles -= m_cyc_dbcc_f_exp;
}
@@ -4515,31 +4510,31 @@ M68KMAKE_OP(dbcc, 16, ., .)
{
if(M68KMAKE_NOT_CC)
{
- uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t* r_dst = &DY();
uint32_t res = MASK_OUT_ABOVE_16(*r_dst - 1);
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
if(res != 0xffff)
{
- uint32_t offset = OPER_I_16(mc68kcpu);
- REG_PC(mc68kcpu) -= 2;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_branch_16((mc68kcpu), offset);
- (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_noexp;
+ uint32_t offset = OPER_I_16();
+ m_pc -= 2;
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset);
+ m_remaining_cycles -= m_cyc_dbcc_f_noexp;
return;
}
- REG_PC(mc68kcpu) += 2;
- (mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_exp;
+ m_pc += 2;
+ m_remaining_cycles -= m_cyc_dbcc_f_exp;
return;
}
- REG_PC(mc68kcpu) += 2;
+ m_pc += 2;
}
M68KMAKE_OP(divs, 16, ., d)
{
- uint32_t* r_dst = &DX(mc68kcpu);
- int32_t src = MAKE_INT_16(DY(mc68kcpu));
+ uint32_t* r_dst = &DX();
+ int32_t src = MAKE_INT_16(DY());
int32_t quotient;
int32_t remainder;
@@ -4547,10 +4542,10 @@ M68KMAKE_OP(divs, 16, ., d)
{
if((uint32_t)*r_dst == 0x80000000 && src == -1)
{
- (mc68kcpu)->not_z_flag = 0;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_not_z_flag = 0;
+ m_n_flag = NFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
*r_dst = 0;
return;
}
@@ -4560,23 +4555,23 @@ M68KMAKE_OP(divs, 16, ., d)
if(quotient == MAKE_INT_16(quotient))
{
- (mc68kcpu)->not_z_flag = quotient;
- (mc68kcpu)->n_flag = NFLAG_16(quotient);
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_not_z_flag = quotient;
+ m_n_flag = NFLAG_16(quotient);
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
return;
}
- (mc68kcpu)->v_flag = VFLAG_SET;
+ m_v_flag = VFLAG_SET;
return;
}
- m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE);
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
}
M68KMAKE_OP(divs, 16, ., .)
{
- uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t* r_dst = &DX();
int32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
int32_t quotient;
int32_t remainder;
@@ -4585,10 +4580,10 @@ M68KMAKE_OP(divs, 16, ., .)
{
if((uint32_t)*r_dst == 0x80000000 && src == -1)
{
- (mc68kcpu)->not_z_flag = 0;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_not_z_flag = 0;
+ m_n_flag = NFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
*r_dst = 0;
return;
}
@@ -4598,24 +4593,24 @@ M68KMAKE_OP(divs, 16, ., .)
if(quotient == MAKE_INT_16(quotient))
{
- (mc68kcpu)->not_z_flag = quotient;
- (mc68kcpu)->n_flag = NFLAG_16(quotient);
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_not_z_flag = quotient;
+ m_n_flag = NFLAG_16(quotient);
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
return;
}
- (mc68kcpu)->v_flag = VFLAG_SET;
+ m_v_flag = VFLAG_SET;
return;
}
- m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE);
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
}
M68KMAKE_OP(divu, 16, ., d)
{
- uint32_t* r_dst = &DX(mc68kcpu);
- uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t* r_dst = &DX();
+ uint32_t src = MASK_OUT_ABOVE_16(DY());
if(src != 0)
{
@@ -4624,23 +4619,23 @@ M68KMAKE_OP(divu, 16, ., d)
if(quotient < 0x10000)
{
- (mc68kcpu)->not_z_flag = quotient;
- (mc68kcpu)->n_flag = NFLAG_16(quotient);
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_not_z_flag = quotient;
+ m_n_flag = NFLAG_16(quotient);
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
return;
}
- (mc68kcpu)->v_flag = VFLAG_SET;
+ m_v_flag = VFLAG_SET;
return;
}
- m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE);
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
}
M68KMAKE_OP(divu, 16, ., .)
{
- uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t* r_dst = &DX();
uint32_t src = M68KMAKE_GET_OPER_AY_16;
if(src != 0)
@@ -4650,26 +4645,26 @@ M68KMAKE_OP(divu, 16, ., .)
if(quotient < 0x10000)
{
- (mc68kcpu)->not_z_flag = quotient;
- (mc68kcpu)->n_flag = NFLAG_16(quotient);
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_not_z_flag = quotient;
+ m_n_flag = NFLAG_16(quotient);
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
return;
}
- (mc68kcpu)->v_flag = VFLAG_SET;
+ m_v_flag = VFLAG_SET;
return;
}
- m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE);
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
}
M68KMAKE_OP(divl, 32, ., d)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
- uint64_t divisor = DY(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
+ uint64_t divisor = DY();
uint64_t dividend = 0;
uint64_t quotient = 0;
uint64_t remainder = 0;
@@ -4678,9 +4673,9 @@ M68KMAKE_OP(divl, 32, ., d)
{
if(BIT_A(word2)) /* 64 bit */
{
- dividend = REG_D(mc68kcpu)[word2 & 7];
+ dividend = REG_D()[word2 & 7];
dividend <<= 32;
- dividend |= REG_D(mc68kcpu)[(word2 >> 12) & 7];
+ dividend |= REG_D()[(word2 >> 12) & 7];
if(BIT_B(word2)) /* signed */
{
@@ -4688,7 +4683,7 @@ M68KMAKE_OP(divl, 32, ., d)
remainder = (uint64_t)((int64_t)dividend % (int64_t)((int32_t)divisor));
if((int64_t)quotient != (int64_t)((int32_t)quotient))
{
- (mc68kcpu)->v_flag = VFLAG_SET;
+ m_v_flag = VFLAG_SET;
return;
}
}
@@ -4697,7 +4692,7 @@ M68KMAKE_OP(divl, 32, ., d)
quotient = dividend / divisor;
if(quotient > 0xffffffff)
{
- (mc68kcpu)->v_flag = VFLAG_SET;
+ m_v_flag = VFLAG_SET;
return;
}
remainder = dividend % divisor;
@@ -4705,7 +4700,7 @@ M68KMAKE_OP(divl, 32, ., d)
}
else /* 32 bit */
{
- dividend = REG_D(mc68kcpu)[(word2 >> 12) & 7];
+ dividend = REG_D()[(word2 >> 12) & 7];
if(BIT_B(word2)) /* signed */
{
quotient = (uint64_t)((int64_t)((int32_t)dividend) / (int64_t)((int32_t)divisor));
@@ -4718,27 +4713,27 @@ M68KMAKE_OP(divl, 32, ., d)
}
}
- REG_D(mc68kcpu)[word2 & 7] = remainder;
- REG_D(mc68kcpu)[(word2 >> 12) & 7] = quotient;
+ REG_D()[word2 & 7] = remainder;
+ REG_D()[(word2 >> 12) & 7] = quotient;
- (mc68kcpu)->n_flag = NFLAG_32(quotient);
- (mc68kcpu)->not_z_flag = quotient;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(quotient);
+ m_not_z_flag = quotient;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
return;
}
- m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE);
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(divl, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16();
uint64_t divisor = M68KMAKE_GET_OPER_AY_32;
uint64_t dividend = 0;
uint64_t quotient = 0;
@@ -4748,9 +4743,9 @@ M68KMAKE_OP(divl, 32, ., .)
{
if(BIT_A(word2)) /* 64 bit */
{
- dividend = REG_D(mc68kcpu)[word2 & 7];
+ dividend = REG_D()[word2 & 7];
dividend <<= 32;
- dividend |= REG_D(mc68kcpu)[(word2 >> 12) & 7];
+ dividend |= REG_D()[(word2 >> 12) & 7];
if(BIT_B(word2)) /* signed */
{
@@ -4758,7 +4753,7 @@ M68KMAKE_OP(divl, 32, ., .)
remainder = (uint64_t)((int64_t)dividend % (int64_t)((int32_t)divisor));
if((int64_t)quotient != (int64_t)((int32_t)quotient))
{
- (mc68kcpu)->v_flag = VFLAG_SET;
+ m_v_flag = VFLAG_SET;
return;
}
}
@@ -4767,7 +4762,7 @@ M68KMAKE_OP(divl, 32, ., .)
quotient = dividend / divisor;
if(quotient > 0xffffffff)
{
- (mc68kcpu)->v_flag = VFLAG_SET;
+ m_v_flag = VFLAG_SET;
return;
}
remainder = dividend % divisor;
@@ -4775,7 +4770,7 @@ M68KMAKE_OP(divl, 32, ., .)
}
else /* 32 bit */
{
- dividend = REG_D(mc68kcpu)[(word2 >> 12) & 7];
+ dividend = REG_D()[(word2 >> 12) & 7];
if(BIT_B(word2)) /* signed */
{
quotient = (uint64_t)((int64_t)((int32_t)dividend) / (int64_t)((int32_t)divisor));
@@ -4788,198 +4783,198 @@ M68KMAKE_OP(divl, 32, ., .)
}
}
- REG_D(mc68kcpu)[word2 & 7] = remainder;
- REG_D(mc68kcpu)[(word2 >> 12) & 7] = quotient;
+ REG_D()[word2 & 7] = remainder;
+ REG_D()[(word2 >> 12) & 7] = quotient;
- (mc68kcpu)->n_flag = NFLAG_32(quotient);
- (mc68kcpu)->not_z_flag = quotient;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(quotient);
+ m_not_z_flag = quotient;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
return;
}
- m68ki_exception_trap((mc68kcpu), EXCEPTION_ZERO_DIVIDE);
+ m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(eor, 8, ., d)
{
- uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu) ^= MASK_OUT_ABOVE_8(DX(mc68kcpu)));
+ uint32_t res = MASK_OUT_ABOVE_8(DY() ^= MASK_OUT_ABOVE_8(DX()));
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(eor, 8, ., .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t res = MASK_OUT_ABOVE_8(DX(mc68kcpu) ^ m68ki_read_8((mc68kcpu), ea));
+ uint32_t res = MASK_OUT_ABOVE_8(DX() ^ m68ki_read_8(ea));
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(eor, 16, ., d)
{
- uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu) ^= MASK_OUT_ABOVE_16(DX(mc68kcpu)));
+ uint32_t res = MASK_OUT_ABOVE_16(DY() ^= MASK_OUT_ABOVE_16(DX()));
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(eor, 16, ., .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- uint32_t res = MASK_OUT_ABOVE_16(DX(mc68kcpu) ^ m68ki_read_16((mc68kcpu), ea));
+ uint32_t res = MASK_OUT_ABOVE_16(DX() ^ m68ki_read_16(ea));
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(eor, 32, ., d)
{
- uint32_t res = DY(mc68kcpu) ^= DX(mc68kcpu);
+ uint32_t res = DY() ^= DX();
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(eor, 32, ., .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_32;
- uint32_t res = DX(mc68kcpu) ^ m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = DX() ^ m68ki_read_32(ea);
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(eori, 8, ., d)
{
- uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu) ^= OPER_I_8(mc68kcpu));
+ uint32_t res = MASK_OUT_ABOVE_8(DY() ^= OPER_I_8());
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(eori, 8, ., .)
{
- uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t src = OPER_I_8();
uint32_t ea = M68KMAKE_GET_EA_AY_8;
- uint32_t res = src ^ m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = src ^ m68ki_read_8(ea);
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(eori, 16, ., d)
{
- uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu) ^= OPER_I_16(mc68kcpu));
+ uint32_t res = MASK_OUT_ABOVE_16(DY() ^= OPER_I_16());
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(eori, 16, ., .)
{
- uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t src = OPER_I_16();
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- uint32_t res = src ^ m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = src ^ m68ki_read_16(ea);
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(eori, 32, ., d)
{
- uint32_t res = DY(mc68kcpu) ^= OPER_I_32(mc68kcpu);
+ uint32_t res = DY() ^= OPER_I_32();
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(eori, 32, ., .)
{
- uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t src = OPER_I_32();
uint32_t ea = M68KMAKE_GET_EA_AY_32;
- uint32_t res = src ^ m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = src ^ m68ki_read_32(ea);
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_c_flag = CFLAG_CLEAR;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(eori, 16, toc, .)
{
- m68ki_set_ccr((mc68kcpu), m68ki_get_ccr(mc68kcpu) ^ OPER_I_16(mc68kcpu));
+ m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16());
}
M68KMAKE_OP(eori, 16, tos, .)
{
- if((mc68kcpu)->s_flag)
+ if(m_s_flag)
{
- uint32_t src = OPER_I_16(mc68kcpu);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) ^ src);
+ uint32_t src = OPER_I_16();
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_set_sr(m68ki_get_sr() ^ src);
return;
}
- m68ki_exception_privilege_violation(mc68kcpu);
+ m68ki_exception_privilege_violation();
}
M68KMAKE_OP(exg, 32, dd, .)
{
- uint32_t* reg_a = &DX(mc68kcpu);
- uint32_t* reg_b = &DY(mc68kcpu);
+ uint32_t* reg_a = &DX();
+ uint32_t* reg_b = &DY();
uint32_t tmp = *reg_a;
*reg_a = *reg_b;
*reg_b = tmp;
@@ -4988,8 +4983,8 @@ M68KMAKE_OP(exg, 32, dd, .)
M68KMAKE_OP(exg, 32, aa, .)
{
- uint32_t* reg_a = &AX(mc68kcpu);
- uint32_t* reg_b = &AY(mc68kcpu);
+ uint32_t* reg_a = &AX();
+ uint32_t* reg_b = &AY();
uint32_t tmp = *reg_a;
*reg_a = *reg_b;
*reg_b = tmp;
@@ -4998,8 +4993,8 @@ M68KMAKE_OP(exg, 32, aa, .)
M68KMAKE_OP(exg, 32, da, .)
{
- uint32_t* reg_a = &DX(mc68kcpu);
- uint32_t* reg_b = &AY(mc68kcpu);
+ uint32_t* reg_a = &DX();
+ uint32_t* reg_b = &AY();
uint32_t tmp = *reg_a;
*reg_a = *reg_b;
*reg_b = tmp;
@@ -5008,2769 +5003,2769 @@ M68KMAKE_OP(exg, 32, da, .)
M68KMAKE_OP(ext, 16, ., .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t* r_dst = &DY();
*r_dst = MASK_OUT_BELOW_16(*r_dst) | MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xff00 : 0);
- (mc68kcpu)->n_flag = NFLAG_16(*r_dst);
- (mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(*r_dst);
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(*r_dst);
+ m_not_z_flag = MASK_OUT_ABOVE_16(*r_dst);
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(ext, 32, ., .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t* r_dst = &DY();
*r_dst = MASK_OUT_ABOVE_16(*r_dst) | (GET_MSB_16(*r_dst) ? 0xffff0000 : 0);
- (mc68kcpu)->n_flag = NFLAG_32(*r_dst);
- (mc68kcpu)->not_z_flag = *r_dst;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(*r_dst);
+ m_not_z_flag = *r_dst;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(extb, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t* r_dst = &DY();
*r_dst = MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xffffff00 : 0);
- (mc68kcpu)->n_flag = NFLAG_32(*r_dst);
- (mc68kcpu)->not_z_flag = *r_dst;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(*r_dst);
+ m_not_z_flag = *r_dst;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(illegal, 0, ., .)
{
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(jmp, 32, ., .)
{
- m68ki_jump((mc68kcpu), M68KMAKE_GET_EA_AY_32);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0)
- (mc68kcpu)->remaining_cycles = 0;
+ m68ki_jump(M68KMAKE_GET_EA_AY_32);
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ if(m_pc == m_ppc && m_remaining_cycles > 0)
+ m_remaining_cycles = 0;
}
M68KMAKE_OP(jsr, 32, ., .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_32;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu));
- m68ki_jump((mc68kcpu), ea);
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_push_32(m_pc);
+ m68ki_jump(ea);
}
M68KMAKE_OP(lea, 32, ., .)
{
- AX(mc68kcpu) = M68KMAKE_GET_EA_AY_32;
+ AX() = M68KMAKE_GET_EA_AY_32;
}
M68KMAKE_OP(link, 16, ., a7)
{
- REG_A(mc68kcpu)[7] -= 4;
- m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[7], REG_A(mc68kcpu)[7]);
- REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + MAKE_INT_16(OPER_I_16(mc68kcpu)));
+ REG_A()[7] -= 4;
+ m68ki_write_32(REG_A()[7], REG_A()[7]);
+ REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + MAKE_INT_16(OPER_I_16()));
}
M68KMAKE_OP(link, 16, ., .)
{
- uint32_t* r_dst = &AY(mc68kcpu);
+ uint32_t* r_dst = &AY();
- m68ki_push_32((mc68kcpu), *r_dst);
- *r_dst = REG_A(mc68kcpu)[7];
- REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + MAKE_INT_16(OPER_I_16(mc68kcpu)));
+ m68ki_push_32(*r_dst);
+ *r_dst = REG_A()[7];
+ REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + MAKE_INT_16(OPER_I_16()));
}
M68KMAKE_OP(link, 32, ., a7)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- REG_A(mc68kcpu)[7] -= 4;
- m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[7], REG_A(mc68kcpu)[7]);
- REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + OPER_I_32(mc68kcpu));
+ REG_A()[7] -= 4;
+ m68ki_write_32(REG_A()[7], REG_A()[7]);
+ REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + OPER_I_32());
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(link, 32, ., .)
{
- if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
- uint32_t* r_dst = &AY(mc68kcpu);
+ uint32_t* r_dst = &AY();
- m68ki_push_32((mc68kcpu), *r_dst);
- *r_dst = REG_A(mc68kcpu)[7];
- REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + OPER_I_32(mc68kcpu));
+ m68ki_push_32(*r_dst);
+ *r_dst = REG_A()[7];
+ REG_A()[7] = MASK_OUT_ABOVE_32(REG_A()[7] + OPER_I_32());
return;
}
- m68ki_exception_illegal(mc68kcpu);
+ m68ki_exception_illegal();
}
M68KMAKE_OP(lsr, 8, s, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
uint32_t res = src >> shift;
if(shift != 0)
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift);
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = res;
+ m_x_flag = m_c_flag = src << (9-shift);
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(lsr, 16, s, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
uint32_t res = src >> shift;
if(shift != 0)
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift);
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = res;
+ m_x_flag = m_c_flag = src << (9-shift);
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(lsr, 32, s, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t src = *r_dst;
uint32_t res = src >> shift;
if(shift != 0)
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
*r_dst = res;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift);
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = res;
+ m_x_flag = m_c_flag = src << (9-shift);
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(lsr, 8, r, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = DX() & 0x3f;
uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
uint32_t res = src >> shift;
if(shift != 0)
{
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(shift <= 8)
{
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << (9-shift);
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_x_flag = m_c_flag = src << (9-shift);
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
return;
}
*r_dst &= 0xffffff00;
- (mc68kcpu)->x_flag = XFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_x_flag = XFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
+ m_v_flag = VFLAG_CLEAR;
return;
}
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_8(src);
- (mc68kcpu)->not_z_flag = src;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(src);
+ m_not_z_flag = src;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(lsr, 16, r, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = DX() & 0x3f;
uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
uint32_t res = src >> shift;
if(shift != 0)
{
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(shift <= 16)
{
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
- (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = (src >> (shift - 1))<<8;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = m_x_flag = (src >> (shift - 1))<<8;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
return;
}
*r_dst &= 0xffff0000;
- (mc68kcpu)->x_flag = XFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_x_flag = XFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
+ m_v_flag = VFLAG_CLEAR;
return;
}
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_16(src);
- (mc68kcpu)->not_z_flag = src;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(src);
+ m_not_z_flag = src;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(lsr, 32, r, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = DX() & 0x3f;
uint32_t src = *r_dst;
uint32_t res = src >> shift;
if(shift != 0)
{
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(shift < 32)
{
*r_dst = res;
- (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = (src >> (shift - 1))<<8;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = m_x_flag = (src >> (shift - 1))<<8;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
return;
}
*r_dst = 0;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (shift == 32 ? GET_MSB_32(src)>>23 : 0);
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_x_flag = m_c_flag = (shift == 32 ? GET_MSB_32(src)>>23 : 0);
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
+ m_v_flag = VFLAG_CLEAR;
return;
}
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_32(src);
- (mc68kcpu)->not_z_flag = src;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(src);
+ m_not_z_flag = src;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(lsr, 16, ., .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t src = m68ki_read_16(ea);
uint32_t res = src >> 1;
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->c_flag = (mc68kcpu)->x_flag = src << 8;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = res;
+ m_c_flag = m_x_flag = src << 8;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(lsl, 8, s, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
uint32_t res = MASK_OUT_ABOVE_8(src << shift);
if(shift != 0)
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << shift;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_x_flag = m_c_flag = src << shift;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(lsl, 16, s, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
uint32_t res = MASK_OUT_ABOVE_16(src << shift);
if(shift != 0)
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> (8-shift);
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_x_flag = m_c_flag = src >> (8-shift);
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(lsl, 32, s, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = (((m_ir >> 9) - 1) & 7) + 1;
uint32_t src = *r_dst;
uint32_t res = MASK_OUT_ABOVE_32(src << shift);
if(shift != 0)
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
*r_dst = res;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> (24-shift);
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_x_flag = m_c_flag = src >> (24-shift);
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(lsl, 8, r, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = DX() & 0x3f;
uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
uint32_t res = MASK_OUT_ABOVE_8(src << shift);
if(shift != 0)
{
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(shift <= 8)
{
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src << shift;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_x_flag = m_c_flag = src << shift;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
return;
}
*r_dst &= 0xffffff00;
- (mc68kcpu)->x_flag = XFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_x_flag = XFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
+ m_v_flag = VFLAG_CLEAR;
return;
}
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_8(src);
- (mc68kcpu)->not_z_flag = src;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(src);
+ m_not_z_flag = src;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(lsl, 16, r, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = DX() & 0x3f;
uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
uint32_t res = MASK_OUT_ABOVE_16(src << shift);
if(shift != 0)
{
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(shift <= 16)
{
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (src << shift) >> 8;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_x_flag = m_c_flag = (src << shift) >> 8;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
return;
}
*r_dst &= 0xffff0000;
- (mc68kcpu)->x_flag = XFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_x_flag = XFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
+ m_v_flag = VFLAG_CLEAR;
return;
}
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_16(src);
- (mc68kcpu)->not_z_flag = src;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(src);
+ m_not_z_flag = src;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(lsl, 32, r, .)
{
- uint32_t* r_dst = &DY(mc68kcpu);
- uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY();
+ uint32_t shift = DX() & 0x3f;
uint32_t src = *r_dst;
uint32_t res = MASK_OUT_ABOVE_32(src << shift);
if(shift != 0)
{
- (mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
+ m_remaining_cycles -= shift<<m_cyc_shift;
if(shift < 32)
{
*r_dst = res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = (src >> (32 - shift)) << 8;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_x_flag = m_c_flag = (src >> (32 - shift)) << 8;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
return;
}
*r_dst = 0;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = ((shift == 32 ? src & 1 : 0))<<8;
- (mc68kcpu)->n_flag = NFLAG_CLEAR;
- (mc68kcpu)->not_z_flag = ZFLAG_SET;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_x_flag = m_c_flag = ((shift == 32 ? src & 1 : 0))<<8;
+ m_n_flag = NFLAG_CLEAR;
+ m_not_z_flag = ZFLAG_SET;
+ m_v_flag = VFLAG_CLEAR;
return;
}
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
- (mc68kcpu)->n_flag = NFLAG_32(src);
- (mc68kcpu)->not_z_flag = src;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(src);
+ m_not_z_flag = src;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(lsl, 16, ., .)
{
uint32_t ea = M68KMAKE_GET_EA_AY_16;
- uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t src = m68ki_read_16(ea);
uint32_t res = MASK_OUT_ABOVE_16(src << 1);
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = src >> 7;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_x_flag = m_c_flag = src >> 7;
+ m_v_flag = VFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, d, d)
{
- uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY());
+ uint32_t* r_dst = &DX();
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, d, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_8;
- uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t* r_dst = &DX();
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, ai, d)
{
- uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- uint32_t ea = EA_AX_AI_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY());
+ uint32_t ea = EA_AX_AI_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, ai, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_8;
- uint32_t ea = EA_AX_AI_8(mc68kcpu);
+ uint32_t ea = EA_AX_AI_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, pi7, d)
{
- uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- uint32_t ea = EA_A7_PI_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY());
+ uint32_t ea = EA_A7_PI_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, pi, d)
{
- uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- uint32_t ea = EA_AX_PI_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY());
+ uint32_t ea = EA_AX_PI_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, pi7, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_8;
- uint32_t ea = EA_A7_PI_8(mc68kcpu);
+ uint32_t ea = EA_A7_PI_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, pi, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_8;
- uint32_t ea = EA_AX_PI_8(mc68kcpu);
+ uint32_t ea = EA_AX_PI_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, pd7, d)
{
- uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- uint32_t ea = EA_A7_PD_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY());
+ uint32_t ea = EA_A7_PD_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, pd, d)
{
- uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- uint32_t ea = EA_AX_PD_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY());
+ uint32_t ea = EA_AX_PD_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, pd7, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_8;
- uint32_t ea = EA_A7_PD_8(mc68kcpu);
+ uint32_t ea = EA_A7_PD_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, pd, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_8;
- uint32_t ea = EA_AX_PD_8(mc68kcpu);
+ uint32_t ea = EA_AX_PD_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, di, d)
{
- uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- uint32_t ea = EA_AX_DI_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY());
+ uint32_t ea = EA_AX_DI_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, di, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_8;
- uint32_t ea = EA_AX_DI_8(mc68kcpu);
+ uint32_t ea = EA_AX_DI_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, ix, d)
{
- uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- uint32_t ea = EA_AX_IX_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY());
+ uint32_t ea = EA_AX_IX_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, ix, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_8;
- uint32_t ea = EA_AX_IX_8(mc68kcpu);
+ uint32_t ea = EA_AX_IX_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, aw, d)
{
- uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- uint32_t ea = EA_AW_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY());
+ uint32_t ea = EA_AW_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, aw, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_8;
- uint32_t ea = EA_AW_8(mc68kcpu);
+ uint32_t ea = EA_AW_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, al, d)
{
- uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- uint32_t ea = EA_AL_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY());
+ uint32_t ea = EA_AL_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 8, al, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_8;
- uint32_t ea = EA_AL_8(mc68kcpu);
+ uint32_t ea = EA_AL_8();
- m68ki_write_8((mc68kcpu), ea, res);
+ m68ki_write_8(ea, res);
- (mc68kcpu)->n_flag = NFLAG_8(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_8(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, d, d)
{
- uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY());
+ uint32_t* r_dst = &DX();
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, d, a)
{
- uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY());
+ uint32_t* r_dst = &DX();
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, d, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_16;
- uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t* r_dst = &DX();
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, ai, d)
{
- uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- uint32_t ea = EA_AX_AI_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY());
+ uint32_t ea = EA_AX_AI_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, ai, a)
{
- uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- uint32_t ea = EA_AX_AI_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY());
+ uint32_t ea = EA_AX_AI_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, ai, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_16;
- uint32_t ea = EA_AX_AI_16(mc68kcpu);
+ uint32_t ea = EA_AX_AI_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, pi, d)
{
- uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- uint32_t ea = EA_AX_PI_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY());
+ uint32_t ea = EA_AX_PI_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, pi, a)
{
- uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- uint32_t ea = EA_AX_PI_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY());
+ uint32_t ea = EA_AX_PI_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, pi, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_16;
- uint32_t ea = EA_AX_PI_16(mc68kcpu);
+ uint32_t ea = EA_AX_PI_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, pd, d)
{
- uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- uint32_t ea = EA_AX_PD_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY());
+ uint32_t ea = EA_AX_PD_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, pd, a)
{
- uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- uint32_t ea = EA_AX_PD_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY());
+ uint32_t ea = EA_AX_PD_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, pd, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_16;
- uint32_t ea = EA_AX_PD_16(mc68kcpu);
+ uint32_t ea = EA_AX_PD_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, di, d)
{
- uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- uint32_t ea = EA_AX_DI_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY());
+ uint32_t ea = EA_AX_DI_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, di, a)
{
- uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- uint32_t ea = EA_AX_DI_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY());
+ uint32_t ea = EA_AX_DI_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, di, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_16;
- uint32_t ea = EA_AX_DI_16(mc68kcpu);
+ uint32_t ea = EA_AX_DI_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, ix, d)
{
- uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- uint32_t ea = EA_AX_IX_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY());
+ uint32_t ea = EA_AX_IX_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, ix, a)
{
- uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- uint32_t ea = EA_AX_IX_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY());
+ uint32_t ea = EA_AX_IX_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, ix, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_16;
- uint32_t ea = EA_AX_IX_16(mc68kcpu);
+ uint32_t ea = EA_AX_IX_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, aw, d)
{
- uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- uint32_t ea = EA_AW_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY());
+ uint32_t ea = EA_AW_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, aw, a)
{
- uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- uint32_t ea = EA_AW_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY());
+ uint32_t ea = EA_AW_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, aw, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_16;
- uint32_t ea = EA_AW_16(mc68kcpu);
+ uint32_t ea = EA_AW_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, al, d)
{
- uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- uint32_t ea = EA_AL_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY());
+ uint32_t ea = EA_AL_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, al, a)
{
- uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- uint32_t ea = EA_AL_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY());
+ uint32_t ea = EA_AL_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 16, al, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_16;
- uint32_t ea = EA_AL_16(mc68kcpu);
+ uint32_t ea = EA_AL_16();
- m68ki_write_16((mc68kcpu), ea, res);
+ m68ki_write_16(ea, res);
- (mc68kcpu)->n_flag = NFLAG_16(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_16(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, d, d)
{
- uint32_t res = DY(mc68kcpu);
- uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t res = DY();
+ uint32_t* r_dst = &DX();
*r_dst = res;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, d, a)
{
- uint32_t res = AY(mc68kcpu);
- uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t res = AY();
+ uint32_t* r_dst = &DX();
*r_dst = res;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, d, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_32;
- uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t* r_dst = &DX();
*r_dst = res;
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, ai, d)
{
- uint32_t res = DY(mc68kcpu);
- uint32_t ea = EA_AX_AI_32(mc68kcpu);
+ uint32_t res = DY();
+ uint32_t ea = EA_AX_AI_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, ai, a)
{
- uint32_t res = AY(mc68kcpu);
- uint32_t ea = EA_AX_AI_32(mc68kcpu);
+ uint32_t res = AY();
+ uint32_t ea = EA_AX_AI_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, ai, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_32;
- uint32_t ea = EA_AX_AI_32(mc68kcpu);
+ uint32_t ea = EA_AX_AI_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, pi, d)
{
- uint32_t res = DY(mc68kcpu);
- uint32_t ea = EA_AX_PI_32(mc68kcpu);
+ uint32_t res = DY();
+ uint32_t ea = EA_AX_PI_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, pi, a)
{
- uint32_t res = AY(mc68kcpu);
- uint32_t ea = EA_AX_PI_32(mc68kcpu);
+ uint32_t res = AY();
+ uint32_t ea = EA_AX_PI_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, pi, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_32;
- uint32_t ea = EA_AX_PI_32(mc68kcpu);
+ uint32_t ea = EA_AX_PI_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, pd, d)
{
- uint32_t res = DY(mc68kcpu);
- uint32_t ea = EA_AX_PD_32(mc68kcpu);
+ uint32_t res = DY();
+ uint32_t ea = EA_AX_PD_32();
- m68ki_write_16((mc68kcpu), ea+2, res & 0xFFFF );
- m68ki_write_16((mc68kcpu), ea, (res >> 16) & 0xFFFF );
+ m68ki_write_16(ea+2, res & 0xFFFF );
+ m68ki_write_16(ea, (res >> 16) & 0xFFFF );
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, pd, a)
{
- uint32_t res = AY(mc68kcpu);
- uint32_t ea = EA_AX_PD_32(mc68kcpu);
+ uint32_t res = AY();
+ uint32_t ea = EA_AX_PD_32();
- m68ki_write_16((mc68kcpu), ea+2, res & 0xFFFF );
- m68ki_write_16((mc68kcpu), ea, (res >> 16) & 0xFFFF );
+ m68ki_write_16(ea+2, res & 0xFFFF );
+ m68ki_write_16(ea, (res >> 16) & 0xFFFF );
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, pd, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_32;
- uint32_t ea = EA_AX_PD_32(mc68kcpu);
+ uint32_t ea = EA_AX_PD_32();
- m68ki_write_16((mc68kcpu), ea+2, res & 0xFFFF );
- m68ki_write_16((mc68kcpu), ea, (res >> 16) & 0xFFFF );
+ m68ki_write_16(ea+2, res & 0xFFFF );
+ m68ki_write_16(ea, (res >> 16) & 0xFFFF );
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, di, d)
{
- uint32_t res = DY(mc68kcpu);
- uint32_t ea = EA_AX_DI_32(mc68kcpu);
+ uint32_t res = DY();
+ uint32_t ea = EA_AX_DI_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, di, a)
{
- uint32_t res = AY(mc68kcpu);
- uint32_t ea = EA_AX_DI_32(mc68kcpu);
+ uint32_t res = AY();
+ uint32_t ea = EA_AX_DI_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, di, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_32;
- uint32_t ea = EA_AX_DI_32(mc68kcpu);
+ uint32_t ea = EA_AX_DI_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, ix, d)
{
- uint32_t res = DY(mc68kcpu);
- uint32_t ea = EA_AX_IX_32(mc68kcpu);
+ uint32_t res = DY();
+ uint32_t ea = EA_AX_IX_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, ix, a)
{
- uint32_t res = AY(mc68kcpu);
- uint32_t ea = EA_AX_IX_32(mc68kcpu);
+ uint32_t res = AY();
+ uint32_t ea = EA_AX_IX_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, ix, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_32;
- uint32_t ea = EA_AX_IX_32(mc68kcpu);
+ uint32_t ea = EA_AX_IX_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, aw, d)
{
- uint32_t res = DY(mc68kcpu);
- uint32_t ea = EA_AW_32(mc68kcpu);
+ uint32_t res = DY();
+ uint32_t ea = EA_AW_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, aw, a)
{
- uint32_t res = AY(mc68kcpu);
- uint32_t ea = EA_AW_32(mc68kcpu);
+ uint32_t res = AY();
+ uint32_t ea = EA_AW_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, aw, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_32;
- uint32_t ea = EA_AW_32(mc68kcpu);
+ uint32_t ea = EA_AW_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, al, d)
{
- uint32_t res = DY(mc68kcpu);
- uint32_t ea = EA_AL_32(mc68kcpu);
+ uint32_t res = DY();
+ uint32_t ea = EA_AL_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, al, a)
{
- uint32_t res = AY(mc68kcpu);
- uint32_t ea = EA_AL_32(mc68kcpu);
+ uint32_t res = AY();
+ uint32_t ea = EA_AL_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(move, 32, al, .)
{
uint32_t res = M68KMAKE_GET_OPER_AY_32;
- uint32_t ea = EA_AL_32(mc68kcpu);
+ uint32_t ea = EA_AL_32();
- m68ki_write_32((mc68kcpu), ea, res);
+ m68ki_write_32(ea, res);
- (mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->not_z_flag = res;
- (mc68kcpu)->v_flag = VFLAG_CLEAR;
- (mc68kcpu)->c_flag = CFLAG_CLEAR;
+ m_n_flag = NFLAG_32(res);
+ m_not_z_flag = res;
+ m_v_flag = VFLAG_CLEAR;
+ m_c_flag = CFLAG_CLEAR;
}
M68KMAKE_OP(movea, 16, ., d)
{
- AX(mc68kcpu) = MAKE_INT_16(DY(mc68kcpu));
+ AX() = MAKE_INT_16(DY());
}
M68KMAKE_OP(movea, 16, ., a)
{
- AX(mc68kcpu) = MAKE_INT_16(AY(mc68kcpu));
+ AX() = MAKE_INT_16(AY());
}
M68KMAKE_OP(movea, 16, ., .)
{
- AX(mc68kcpu) = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
+ AX() = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
}