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Diffstat (limited to 'src/devices/cpu/m68000/m68kcpu.cpp')
-rw-r--r--src/devices/cpu/m68000/m68kcpu.cpp1408
1 files changed, 676 insertions, 732 deletions
diff --git a/src/devices/cpu/m68000/m68kcpu.cpp b/src/devices/cpu/m68000/m68kcpu.cpp
index e387f946784..8a0008bdfb5 100644
--- a/src/devices/cpu/m68000/m68kcpu.cpp
+++ b/src/devices/cpu/m68000/m68kcpu.cpp
@@ -26,23 +26,15 @@ static const char copyright_notice[] =
#include "emu.h"
#include "debugger.h"
-#include "m68kcpu.h"
-#include "m68kops.h"
-
-#include "m68kfpu.hxx"
-#include "m68kmmu.h"
+#include "m68000.h"
#include "m68kdasm.h"
-extern void m68040_fpu_op0(m68000_base_device *m68k);
-extern void m68040_fpu_op1(m68000_base_device *m68k);
-extern void m68881_mmu_ops(m68000_base_device *m68k);
-
/* ======================================================================== */
/* ================================= DATA ================================= */
/* ======================================================================== */
/* Used by shift & rotate instructions */
-const uint8_t m68ki_shift_8_table[65] =
+const uint8_t m68000_base_device::m68ki_shift_8_table[65] =
{
0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
@@ -51,7 +43,7 @@ const uint8_t m68ki_shift_8_table[65] =
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff
};
-const uint16_t m68ki_shift_16_table[65] =
+const uint16_t m68000_base_device::m68ki_shift_16_table[65] =
{
0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 0xf800, 0xfc00, 0xfe00, 0xff00,
0xff80, 0xffc0, 0xffe0, 0xfff0, 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff,
@@ -62,7 +54,7 @@ const uint16_t m68ki_shift_16_table[65] =
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff
};
-const uint32_t m68ki_shift_32_table[65] =
+const uint32_t m68000_base_device::m68ki_shift_32_table[65] =
{
0x00000000, 0x80000000, 0xc0000000, 0xe0000000, 0xf0000000, 0xf8000000,
0xfc000000, 0xfe000000, 0xff000000, 0xff800000, 0xffc00000, 0xffe00000,
@@ -81,7 +73,7 @@ const uint32_t m68ki_shift_32_table[65] =
/* Number of clock cycles to use for exception processing.
* I used 4 for any vectors that are undocumented for processing times.
*/
-const uint8_t m68ki_exception_cycle_table[7][256] =
+const uint8_t m68000_base_device::m68ki_exception_cycle_table[7][256] =
{
{ /* 000 */
40, /* 0: Reset - Initial Stack Pointer */
@@ -596,7 +588,7 @@ const uint8_t m68ki_exception_cycle_table[7][256] =
},
};
-const uint8_t m68ki_ea_idx_cycle_table[64] =
+const uint8_t m68000_base_device::m68ki_ea_idx_cycle_table[64] =
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, /* ..01.000 no memory indirect, base nullptr */
@@ -636,73 +628,73 @@ const uint8_t m68ki_ea_idx_cycle_table[64] =
/* ================================= API ================================== */
/* ======================================================================== */
-static void set_irq_line(m68000_base_device *m68k, int irqline, int state)
+void m68000_base_device::set_irq_line(int irqline, int state)
{
- uint32_t old_level = m68k->int_level;
- uint32_t vstate = m68k->virq_state;
+ uint32_t old_level = m_int_level;
+ uint32_t vstate = m_virq_state;
uint32_t blevel;
if(state == ASSERT_LINE)
vstate |= 1 << irqline;
else
vstate &= ~(1 << irqline);
- m68k->virq_state = vstate;
+ m_virq_state = vstate;
for(blevel = 7; blevel > 0; blevel--)
if(vstate & (1 << blevel))
break;
- m68k->int_level = blevel << 8;
+ m_int_level = blevel << 8;
/* A transition from < 7 to 7 always interrupts (NMI) */
/* Note: Level 7 can also level trigger like a normal IRQ */
- if(old_level != 0x0700 && m68k->int_level == 0x0700)
- m68k->nmi_pending = true;
+ if(old_level != 0x0700 && m_int_level == 0x0700)
+ m_nmi_pending = true;
}
void m68000_base_device::presave()
{
- save_sr = m68ki_get_sr(this);
- save_stopped = (stopped & STOP_LEVEL_STOP) != 0;
- save_halted = (stopped & STOP_LEVEL_HALT) != 0;
+ m_save_sr = m68ki_get_sr();
+ m_save_stopped = (m_stopped & STOP_LEVEL_STOP) != 0;
+ m_save_halted = (m_stopped & STOP_LEVEL_HALT) != 0;
}
void m68000_base_device::postload()
{
- m68ki_set_sr_noint_nosp(this, save_sr);
+ m68ki_set_sr_noint_nosp(m_save_sr);
//fprintf(stderr, "Reloaded, pc=%x\n", REG_PC(m68k));
- stopped = (save_stopped ? STOP_LEVEL_STOP : 0) | (save_halted ? STOP_LEVEL_HALT : 0);
- m68ki_jump(this, REG_PC(this));
+ m_stopped = (m_save_stopped ? STOP_LEVEL_STOP : 0) | (m_save_halted ? STOP_LEVEL_HALT : 0);
+ m68ki_jump(m_pc);
}
-static void m68k_cause_bus_error(m68000_base_device *m68k)
+void m68000_base_device::m68k_cause_bus_error()
{
uint32_t sr;
- sr = m68ki_init_exception(m68k);
+ sr = m68ki_init_exception();
- m68k->run_mode = RUN_MODE_BERR_AERR_RESET;
+ m_run_mode = RUN_MODE_BERR_AERR_RESET;
- if (!CPU_TYPE_IS_010_PLUS(m68k->cpu_type))
+ if (!CPU_TYPE_IS_010_PLUS())
{
/* Note: This is implemented for 68000 only! */
- m68ki_stack_frame_buserr(m68k, sr);
+ m68ki_stack_frame_buserr(sr);
}
- else if (CPU_TYPE_IS_010(m68k->cpu_type))
+ else if (CPU_TYPE_IS_010())
{
/* only the 68010 throws this unique type-1000 frame */
- m68ki_stack_frame_1000(m68k, REG_PPC(m68k), sr, EXCEPTION_BUS_ERROR);
+ m68ki_stack_frame_1000(m_ppc, sr, EXCEPTION_BUS_ERROR);
}
- else if (m68k->mmu_tmp_buserror_address == REG_PPC(m68k))
+ else if (m_mmu_tmp_buserror_address == m_ppc)
{
- m68ki_stack_frame_1010(m68k, sr, EXCEPTION_BUS_ERROR, REG_PPC(m68k), m68k->mmu_tmp_buserror_address);
+ m68ki_stack_frame_1010(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address);
}
else
{
- m68ki_stack_frame_1011(m68k, sr, EXCEPTION_BUS_ERROR, REG_PPC(m68k), m68k->mmu_tmp_buserror_address);
+ m68ki_stack_frame_1011(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address);
}
- m68ki_jump_vector(m68k, EXCEPTION_BUS_ERROR);
+ m68ki_jump_vector(EXCEPTION_BUS_ERROR);
}
bool m68000_base_device::memory_translate(int space, int intention, offs_t &address)
@@ -710,28 +702,28 @@ bool m68000_base_device::memory_translate(int space, int intention, offs_t &addr
/* only applies to the program address space and only does something if the MMU's enabled */
{
/* 68040 needs to call the MMU even when disabled so transparent translation works */
- if ((space == AS_PROGRAM) && ((pmmu_enabled) || (CPU_TYPE_IS_040_PLUS(cpu_type))))
+ if ((space == AS_PROGRAM) && ((m_pmmu_enabled) || (CPU_TYPE_IS_040_PLUS())))
{
- // FIXME: mmu_tmp_sr will be overwritten in pmmu_translate_addr_with_fc
- uint16_t temp_mmu_tmp_sr = mmu_tmp_sr;
- int mode = s_flag ? FUNCTION_CODE_SUPERVISOR_PROGRAM : FUNCTION_CODE_USER_PROGRAM;
+ // FIXME: m_mmu_tmp_sr will be overwritten in pmmu_translate_addr_with_fc
+ uint16_t temp_mmu_tmp_sr = m_mmu_tmp_sr;
+ int mode = m_s_flag ? FUNCTION_CODE_SUPERVISOR_PROGRAM : FUNCTION_CODE_USER_PROGRAM;
// uint32_t va=address;
- if (CPU_TYPE_IS_040_PLUS(cpu_type))
+ if (CPU_TYPE_IS_040_PLUS())
{
- address = pmmu_translate_addr_with_fc_040(this, address, mode, 1);
+ address = pmmu_translate_addr_with_fc_040(address, mode, 1);
}
else
{
- address = pmmu_translate_addr_with_fc(this, address, mode, 1);
+ address = pmmu_translate_addr_with_fc(address, mode, 1);
}
- if ((mmu_tmp_sr & M68K_MMU_SR_INVALID) != 0) {
-// logerror("cpu_translate_m68k failed with mmu_sr=%04x va=%08x pa=%08x\n",mmu_tmp_sr,va ,address);
+ if ((m_mmu_tmp_sr & M68K_MMU_SR_INVALID) != 0) {
+// logerror("cpu_translate_m68k failed with mmu_sr=%04x va=%08x pa=%08x\n",m_mmu_tmp_sr,va ,address);
address = 0;
}
- mmu_tmp_sr = temp_mmu_tmp_sr;
+ m_mmu_tmp_sr = temp_mmu_tmp_sr;
}
}
return true;
@@ -745,24 +737,24 @@ bool m68000_base_device::memory_translate(int space, int intention, offs_t &addr
-inline void m68000_base_device::cpu_execute(void)
+void m68000_base_device::execute_run()
{
- initial_cycles = remaining_cycles;
+ m_initial_cycles = m_remaining_cycles;
/* eat up any reset cycles */
- if (reset_cycles) {
- int rc = reset_cycles;
- reset_cycles = 0;
- remaining_cycles -= rc;
+ if (m_reset_cycles) {
+ int rc = m_reset_cycles;
+ m_reset_cycles = 0;
+ m_remaining_cycles -= rc;
- if (remaining_cycles <= 0) return;
+ if (m_remaining_cycles <= 0) return;
}
/* See if interrupts came in */
- m68ki_check_interrupts(this);
+ m68ki_check_interrupts();
/* Make sure we're not stopped */
- if(!stopped)
+ if(!m_stopped)
{
/* Return point if we had an address error */
check_address_error:
@@ -770,123 +762,119 @@ inline void m68000_base_device::cpu_execute(void)
{
m_address_error = 0;
try {
- m68ki_exception_address_error(this);
+ m68ki_exception_address_error();
}
catch(int error)
{
if (error==10)
{
m_address_error = 1;
- REG_PPC(this) = REG_PC(this);
+ m_ppc = m_pc;
goto check_address_error;
}
else
throw;
}
- if(stopped)
+ if(m_stopped)
{
- if (remaining_cycles > 0)
- remaining_cycles = 0;
+ if (m_remaining_cycles > 0)
+ m_remaining_cycles = 0;
return;
}
}
/* Main loop. Keep going until we run out of clock cycles */
- while (remaining_cycles > 0)
+ while (m_remaining_cycles > 0)
{
/* Set tracing accodring to T1. (T0 is done inside instruction) */
- m68ki_trace_t1(this); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t1(); /* auto-disable (see m68kcpu.h) */
/* Record previous program counter */
- REG_PPC(this) = REG_PC(this);
+ m_ppc = m_pc;
/* Call external hook to peek at CPU */
- debugger_instruction_hook(this, REG_PC(this));
-
- /* call external instruction hook (independent of debug mode) */
- if (!instruction_hook.isnull())
- instruction_hook(*program, REG_PC(this), 0xffffffff);
+ debugger_instruction_hook(this, m_pc);
try
{
- if (!pmmu_enabled)
+ if (!m_pmmu_enabled)
{
- run_mode = RUN_MODE_NORMAL;
+ m_run_mode = RUN_MODE_NORMAL;
/* Read an instruction and call its handler */
- ir = m68ki_read_imm_16(this);
- jump_table[ir](this);
- remaining_cycles -= cyc_instruction[ir];
+ m_ir = m68ki_read_imm_16();
+ (this->*m_jump_table[m_ir])();
+ m_remaining_cycles -= m_cyc_instruction[m_ir];
}
else
{
- run_mode = RUN_MODE_NORMAL;
+ m_run_mode = RUN_MODE_NORMAL;
// save CPU address registers values at start of instruction
int i;
uint32_t tmp_dar[16];
for (i = 15; i >= 0; i--)
{
- tmp_dar[i] = REG_DA(this)[i];
+ tmp_dar[i] = REG_DA()[i];
}
- mmu_tmp_buserror_occurred = 0;
+ m_mmu_tmp_buserror_occurred = 0;
/* Read an instruction and call its handler */
- ir = m68ki_read_imm_16(this);
+ m_ir = m68ki_read_imm_16();
- if (!mmu_tmp_buserror_occurred)
+ if (!m_mmu_tmp_buserror_occurred)
{
- jump_table[ir](this);
- remaining_cycles -= cyc_instruction[ir];
+ (this->*m_jump_table[m_ir])();
+ m_remaining_cycles -= m_cyc_instruction[m_ir];
}
- if (mmu_tmp_buserror_occurred)
+ if (m_mmu_tmp_buserror_occurred)
{
uint32_t sr;
- mmu_tmp_buserror_occurred = 0;
+ m_mmu_tmp_buserror_occurred = 0;
// restore cpu address registers to value at start of instruction
for (i = 15; i >= 0; i--)
{
- if (REG_DA(this)[i] != tmp_dar[i])
+ if (REG_DA()[i] != tmp_dar[i])
{
// logerror("PMMU: pc=%08x sp=%08x bus error: fixed %s[%d]: %08x -> %08x\n",
-// REG_PPC(this), REG_A(this)[7], i < 8 ? "D" : "A", i & 7, REG_DA(this)[i], tmp_dar[i]);
- REG_DA(this)[i] = tmp_dar[i];
+// m_ppc, REG_A()[7], i < 8 ? "D" : "A", i & 7, REG_DA()[i], tmp_dar[i]);
+ REG_DA()[i] = tmp_dar[i];
}
}
- sr = m68ki_init_exception(this);
+ sr = m68ki_init_exception();
- run_mode = RUN_MODE_BERR_AERR_RESET;
+ m_run_mode = RUN_MODE_BERR_AERR_RESET;
- if (!CPU_TYPE_IS_020_PLUS(cpu_type))
+ if (!CPU_TYPE_IS_020_PLUS())
{
/* Note: This is implemented for 68000 only! */
- m68ki_stack_frame_buserr(this, sr);
+ m68ki_stack_frame_buserr(sr);
}
- else if(!CPU_TYPE_IS_040_PLUS(cpu_type)) {
- if (mmu_tmp_buserror_address == REG_PPC(this))
+ else if(!CPU_TYPE_IS_040_PLUS()) {
+ if (m_mmu_tmp_buserror_address == m_ppc)
{
- m68ki_stack_frame_1010(this, sr, EXCEPTION_BUS_ERROR, REG_PPC(this), mmu_tmp_buserror_address);
+ m68ki_stack_frame_1010(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address);
}
else
{
- m68ki_stack_frame_1011(this, sr, EXCEPTION_BUS_ERROR, REG_PPC(this), mmu_tmp_buserror_address);
+ m68ki_stack_frame_1011(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address);
}
}
else
{
- m68ki_stack_frame_0111(this, sr, EXCEPTION_BUS_ERROR, REG_PPC(this), mmu_tmp_buserror_address, true);
+ m68ki_stack_frame_0111(sr, EXCEPTION_BUS_ERROR, m_ppc, m_mmu_tmp_buserror_address, true);
}
- m68ki_jump_vector(this, EXCEPTION_BUS_ERROR);
+ m68ki_jump_vector(EXCEPTION_BUS_ERROR);
// TODO:
/* Use up some clock cycles and undo the instruction's cycles */
- // remaining_cycles -= cyc_exception[EXCEPTION_BUS_ERROR] - cyc_instruction[ir];
+ // m_remaining_cycles -= m_cyc_exception[EXCEPTION_BUS_ERROR] - m_cyc_instruction[m_ir];
}
}
}
@@ -903,14 +891,14 @@ inline void m68000_base_device::cpu_execute(void)
/* Trace m68k_exception, if necessary */
- m68ki_exception_if_trace(this); /* auto-disable (see m68kcpu.h) */
+ m68ki_exception_if_trace(); /* auto-disable (see m68kcpu.h) */
}
/* set previous PC to current PC for the next entry into the loop */
- REG_PPC(this) = REG_PC(this);
+ m_ppc = m_pc;
}
- else if (remaining_cycles > 0)
- remaining_cycles = 0;
+ else if (m_remaining_cycles > 0)
+ m_remaining_cycles = 0;
}
@@ -920,15 +908,15 @@ void m68000_base_device::init_cpu_common(void)
static uint32_t emulation_initialized = 0;
//this = device;//deviceparam;
- program = &space(AS_PROGRAM);
- oprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : program;
- int_ack_callback = device_irq_acknowledge_delegate(FUNC(m68000_base_device::standard_irq_callback_member), this);
+ m_program = &space(AS_PROGRAM);
+ m_oprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : m_program;
+ m_int_ack_callback = device_irq_acknowledge_delegate(FUNC(m68000_base_device::standard_irq_callback_member), this);
/* disable all MMUs */
- has_pmmu = 0;
- has_hmmu = 0;
- pmmu_enabled = 0;
- hmmu_enabled = 0;
+ m_has_pmmu = 0;
+ m_has_hmmu = 0;
+ m_pmmu_enabled = 0;
+ m_hmmu_enabled = 0;
/* The first call to this function initializes the opcode handler jump table */
if(!emulation_initialized)
@@ -938,116 +926,116 @@ void m68000_base_device::init_cpu_common(void)
}
/* Note, D covers A because the dar array is common, REG_A(m68k)=REG_D(m68k)+8 */
- save_item(NAME(REG_D(this)));
- save_item(NAME(REG_PPC(this)));
- save_item(NAME(REG_PC(this)));
- save_item(NAME(REG_USP(this)));
- save_item(NAME(REG_ISP(this)));
- save_item(NAME(REG_MSP(this)));
- save_item(NAME(vbr));
- save_item(NAME(sfc));
- save_item(NAME(dfc));
- save_item(NAME(cacr));
- save_item(NAME(caar));
- save_item(NAME(save_sr));
- save_item(NAME(int_level));
- save_item(NAME(save_stopped));
- save_item(NAME(save_halted));
- save_item(NAME(pref_addr));
- save_item(NAME(pref_data));
- save_item(NAME(reset_cycles));
- save_item(NAME(virq_state));
- save_item(NAME(nmi_pending));
- save_item(NAME(has_pmmu));
- save_item(NAME(has_hmmu));
- save_item(NAME(pmmu_enabled));
- save_item(NAME(hmmu_enabled));
-
- save_item(NAME(mmu_crp_aptr));
- save_item(NAME(mmu_crp_limit));
- save_item(NAME(mmu_srp_aptr));
- save_item(NAME(mmu_srp_limit));
- save_item(NAME(mmu_urp_aptr));
- save_item(NAME(mmu_tc));
- save_item(NAME(mmu_sr));
- save_item(NAME(mmu_sr_040));
- save_item(NAME(mmu_atc_rr));
- save_item(NAME(mmu_tt0));
- save_item(NAME(mmu_tt1));
- save_item(NAME(mmu_itt0));
- save_item(NAME(mmu_itt1));
- save_item(NAME(mmu_dtt0));
- save_item(NAME(mmu_dtt1));
- save_item(NAME(mmu_acr0));
- save_item(NAME(mmu_acr1));
- save_item(NAME(mmu_acr2));
- save_item(NAME(mmu_acr3));
- save_item(NAME(mmu_last_page_entry));
- save_item(NAME(mmu_last_page_entry_addr));
+ save_item(NAME(REG_D()));
+ save_item(NAME(m_ppc));
+ save_item(NAME(m_pc));
+ save_item(NAME(REG_USP()));
+ save_item(NAME(REG_ISP()));
+ save_item(NAME(REG_MSP()));
+ save_item(NAME(m_vbr));
+ save_item(NAME(m_sfc));
+ save_item(NAME(m_dfc));
+ save_item(NAME(m_cacr));
+ save_item(NAME(m_caar));
+ save_item(NAME(m_save_sr));
+ save_item(NAME(m_int_level));
+ save_item(NAME(m_save_stopped));
+ save_item(NAME(m_save_halted));
+ save_item(NAME(m_pref_addr));
+ save_item(NAME(m_pref_data));
+ save_item(NAME(m_reset_cycles));
+ save_item(NAME(m_virq_state));
+ save_item(NAME(m_nmi_pending));
+ save_item(NAME(m_has_pmmu));
+ save_item(NAME(m_has_hmmu));
+ save_item(NAME(m_pmmu_enabled));
+ save_item(NAME(m_hmmu_enabled));
+
+ save_item(NAME(m_mmu_crp_aptr));
+ save_item(NAME(m_mmu_crp_limit));
+ save_item(NAME(m_mmu_srp_aptr));
+ save_item(NAME(m_mmu_srp_limit));
+ save_item(NAME(m_mmu_urp_aptr));
+ save_item(NAME(m_mmu_tc));
+ save_item(NAME(m_mmu_sr));
+ save_item(NAME(m_mmu_sr_040));
+ save_item(NAME(m_mmu_atc_rr));
+ save_item(NAME(m_mmu_tt0));
+ save_item(NAME(m_mmu_tt1));
+ save_item(NAME(m_mmu_itt0));
+ save_item(NAME(m_mmu_itt1));
+ save_item(NAME(m_mmu_dtt0));
+ save_item(NAME(m_mmu_dtt1));
+ save_item(NAME(m_mmu_acr0));
+ save_item(NAME(m_mmu_acr1));
+ save_item(NAME(m_mmu_acr2));
+ save_item(NAME(m_mmu_acr3));
+ save_item(NAME(m_mmu_last_page_entry));
+ save_item(NAME(m_mmu_last_page_entry_addr));
for (int i=0; i<MMU_ATC_ENTRIES;i++) {
- save_item(NAME(mmu_atc_tag[i]), i);
- save_item(NAME(mmu_atc_data[i]), i);
+ save_item(NAME(m_mmu_atc_tag[i]), i);
+ save_item(NAME(m_mmu_atc_data[i]), i);
}
machine().save().register_presave(save_prepost_delegate(FUNC(m68000_base_device::presave), this));
machine().save().register_postload(save_prepost_delegate(FUNC(m68000_base_device::postload), this));
- m_icountptr = &remaining_cycles;
- remaining_cycles = 0;
+ m_icountptr = &m_remaining_cycles;
+ m_remaining_cycles = 0;
}
-void m68000_base_device::reset_cpu(void)
+void m68000_base_device::device_reset()
{
/* Disable the PMMU/HMMU on reset, if any */
- pmmu_enabled = 0;
- hmmu_enabled = 0;
+ m_pmmu_enabled = 0;
+ m_hmmu_enabled = 0;
- mmu_tc = 0;
- mmu_tt0 = 0;
- mmu_tt1 = 0;
+ m_mmu_tc = 0;
+ m_mmu_tt0 = 0;
+ m_mmu_tt1 = 0;
/* Clear all stop levels and eat up all remaining cycles */
- stopped = 0;
- if (remaining_cycles > 0)
- remaining_cycles = 0;
+ m_stopped = 0;
+ if (m_remaining_cycles > 0)
+ m_remaining_cycles = 0;
- run_mode = RUN_MODE_BERR_AERR_RESET;
+ m_run_mode = RUN_MODE_BERR_AERR_RESET;
/* Turn off tracing */
- t1_flag = t0_flag = 0;
- m68ki_clear_trace(this);
+ m_t1_flag = m_t0_flag = 0;
+ m68ki_clear_trace();
/* Interrupt mask to level 7 */
- int_mask = 0x0700;
- int_level = 0;
- virq_state = 0;
+ m_int_mask = 0x0700;
+ m_int_level = 0;
+ m_virq_state = 0;
/* Reset VBR */
- vbr = 0;
+ m_vbr = 0;
/* Go to supervisor mode */
- m68ki_set_sm_flag(this, SFLAG_SET | MFLAG_CLEAR);
+ m68ki_set_sm_flag(SFLAG_SET | MFLAG_CLEAR);
/* Invalidate the prefetch queue */
/* Set to arbitrary number since our first fetch is from 0 */
- pref_addr = 0x1000;
+ m_pref_addr = 0x1000;
/* Read the initial stack pointer and program counter */
- m68ki_jump(this, 0);
- REG_SP(this) = m68ki_read_imm_32(this);
- REG_PC(this) = m68ki_read_imm_32(this);
- m68ki_jump(this, REG_PC(this));
+ m68ki_jump(0);
+ REG_SP() = m68ki_read_imm_32();
+ m_pc = m68ki_read_imm_32();
+ m68ki_jump(m_pc);
- run_mode = RUN_MODE_NORMAL;
+ m_run_mode = RUN_MODE_NORMAL;
- reset_cycles = cyc_exception[EXCEPTION_RESET];
+ m_reset_cycles = m_cyc_exception[EXCEPTION_RESET];
/* flush the MMU's cache */
- pmmu_atc_flush(this);
+ pmmu_atc_flush();
- if(CPU_TYPE_IS_EC020_PLUS(cpu_type))
+ if(CPU_TYPE_IS_EC020_PLUS())
{
// clear instruction cache
- m68ki_ic_clear(this);
+ m68ki_ic_clear();
}
}
@@ -1062,37 +1050,37 @@ void m68000_base_device::state_import(const device_state_entry &entry)
switch (entry.index())
{
case STATE_GENPC:
- ppc = pc;
+ m_ppc = m_pc;
break;
case STATE_GENPCBASE:
- pc = ppc;
+ m_pc = m_ppc;
break;
case M68K_SR:
case STATE_GENFLAGS:
- m68ki_set_sr(this, iotemp);
+ m68ki_set_sr(m_iotemp);
break;
case M68K_ISP:
- if (s_flag && !m_flag)
- REG_SP(this) = iotemp;
+ if (m_s_flag && !m_m_flag)
+ REG_SP() = m_iotemp;
else
- REG_ISP(this) = iotemp;
+ REG_ISP() = m_iotemp;
break;
case M68K_USP:
- if (!s_flag)
- REG_SP(this) = iotemp;
+ if (!m_s_flag)
+ REG_SP() = m_iotemp;
else
- REG_USP(this) = iotemp;
+ REG_USP() = m_iotemp;
break;
case M68K_MSP:
- if (s_flag && m_flag)
- REG_SP(this) = iotemp;
+ if (m_s_flag && m_m_flag)
+ REG_SP() = m_iotemp;
else
- REG_MSP(this) = iotemp;
+ REG_MSP() = m_iotemp;
break;
default:
@@ -1109,19 +1097,19 @@ void m68000_base_device::state_export(const device_state_entry &entry)
{
case M68K_SR:
case STATE_GENFLAGS:
- iotemp = m68ki_get_sr(this);
+ m_iotemp = m68ki_get_sr();
break;
case M68K_ISP:
- iotemp = (s_flag && !m_flag) ? REG_SP(this) : REG_ISP(this);
+ m_iotemp = (m_s_flag && !m_m_flag) ? REG_SP() : REG_ISP();
break;
case M68K_USP:
- iotemp = (!s_flag) ? REG_SP(this) : REG_USP(this);
+ m_iotemp = (!m_s_flag) ? REG_SP() : REG_USP();
break;
case M68K_MSP:
- iotemp = (s_flag && m_flag) ? REG_SP(this) : REG_MSP(this);
+ m_iotemp = (m_s_flag && m_m_flag) ? REG_SP() : REG_MSP();
break;
case M68K_FP0:
@@ -1146,39 +1134,39 @@ void m68000_base_device::state_string_export(const device_state_entry &entry, st
switch (entry.index())
{
case M68K_FP0:
- str = string_format("%f", fx80_to_double(REG_FP(this)[0]));
+ str = string_format("%f", fx80_to_double(m_fpr[0]));
break;
case M68K_FP1:
- str = string_format("%f", fx80_to_double(REG_FP(this)[1]));
+ str = string_format("%f", fx80_to_double(m_fpr[1]));
break;
case M68K_FP2:
- str = string_format("%f", fx80_to_double(REG_FP(this)[2]));
+ str = string_format("%f", fx80_to_double(m_fpr[2]));
break;
case M68K_FP3:
- str = string_format("%f", fx80_to_double(REG_FP(this)[3]));
+ str = string_format("%f", fx80_to_double(m_fpr[3]));
break;
case M68K_FP4:
- str = string_format("%f", fx80_to_double(REG_FP(this)[4]));
+ str = string_format("%f", fx80_to_double(m_fpr[4]));
break;
case M68K_FP5:
- str = string_format("%f", fx80_to_double(REG_FP(this)[5]));
+ str = string_format("%f", fx80_to_double(m_fpr[5]));
break;
case M68K_FP6:
- str = string_format("%f", fx80_to_double(REG_FP(this)[6]));
+ str = string_format("%f", fx80_to_double(m_fpr[6]));
break;
case M68K_FP7:
- str = string_format("%f", fx80_to_double(REG_FP(this)[7]));
+ str = string_format("%f", fx80_to_double(m_fpr[7]));
break;
case STATE_GENFLAGS:
- sr = m68ki_get_sr(this);
+ sr = m68ki_get_sr();
str = string_format("%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
sr & 0x8000 ? 'T':'.',
sr & 0x4000 ? 't':'.',
@@ -1206,22 +1194,12 @@ void m68000_base_device::state_string_export(const device_state_entry &entry, st
void m68000_base_device::set_hmmu_enable(int enable)
{
- hmmu_enabled = enable;
+ m_hmmu_enabled = enable;
}
void m68000_base_device::set_fpu_enable(int enable)
{
- has_fpu = enable;
-}
-
-int m68000_base_device::get_fpu_enable()
-{
- return has_fpu;
-}
-
-void m68000_base_device::set_instruction_hook(read32_delegate ihook)
-{
- instruction_hook = ihook;
+ m_has_fpu = enable;
}
/****************************************************************************
@@ -1239,16 +1217,15 @@ void m68000_base_device::init8(address_space &space, address_space &ospace)
m_direct = space.direct<0>();
m_ospace = &ospace;
m_odirect = ospace.direct<0>();
-// m_cpustate = this;
- opcode_xor = 0;
+ m_opcode_xor = 0;
- readimm16 = m68k_readimm16_delegate(&m68000_base_device::m68008_read_immediate_16, this);
- read8 = m68k_read8_delegate(&address_space::read_byte, &space);
- read16 = m68k_read16_delegate(&address_space::read_word, &space);
- read32 = m68k_read32_delegate(&address_space::read_dword, &space);
- write8 = m68k_write8_delegate(&address_space::write_byte, &space);
- write16 = m68k_write16_delegate(&address_space::write_word, &space);
- write32 = m68k_write32_delegate(&address_space::write_dword, &space);
+ m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::m68008_read_immediate_16, this);
+ m_read8 = m68k_read8_delegate(&address_space::read_byte, &space);
+ m_read16 = m68k_read16_delegate(&address_space::read_word, &space);
+ m_read32 = m68k_read32_delegate(&address_space::read_dword, &space);
+ m_write8 = m68k_write8_delegate(&address_space::write_byte, &space);
+ m_write16 = m68k_write16_delegate(&address_space::write_word, &space);
+ m_write32 = m68k_write32_delegate(&address_space::write_dword, &space);
}
/****************************************************************************
@@ -1257,7 +1234,7 @@ void m68000_base_device::init8(address_space &space, address_space &ospace)
uint16_t m68000_base_device::read_immediate_16(offs_t address)
{
- return m_odirect->read_word((address), opcode_xor);
+ return m_odirect->read_word((address), m_opcode_xor);
}
uint16_t m68000_base_device::simple_read_immediate_16(offs_t address)
@@ -1279,15 +1256,15 @@ void m68000_base_device::init16(address_space &space, address_space &ospace)
m_ospace = &ospace;
m_odirect = ospace.direct<0>();
- opcode_xor = 0;
+ m_opcode_xor = 0;
- readimm16 = m68k_readimm16_delegate(&m68000_base_device::simple_read_immediate_16, this);
- read8 = m68k_read8_delegate(&address_space::read_byte, &space);
- read16 = m68k_read16_delegate(&address_space::read_word, &space);
- read32 = m68k_read32_delegate(&address_space::read_dword, &space);
- write8 = m68k_write8_delegate(&m68000_base_device::m68000_write_byte, this);
- write16 = m68k_write16_delegate(&address_space::write_word, &space);
- write32 = m68k_write32_delegate(&address_space::write_dword, &space);
+ m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::simple_read_immediate_16, this);
+ m_read8 = m68k_read8_delegate(&address_space::read_byte, &space);
+ m_read16 = m68k_read16_delegate(&address_space::read_word, &space);
+ m_read32 = m68k_read32_delegate(&address_space::read_dword, &space);
+ m_write8 = m68k_write8_delegate(&m68000_base_device::m68000_write_byte, this);
+ m_write16 = m68k_write16_delegate(&address_space::write_word, &space);
+ m_write32 = m68k_write32_delegate(&address_space::write_dword, &space);
}
@@ -1305,24 +1282,24 @@ void m68000_base_device::init32(address_space &space, address_space &ospace)
m_direct = space.direct<0>();
m_ospace = &ospace;
m_odirect = ospace.direct<0>();
- opcode_xor = WORD_XOR_BE(0);
+ m_opcode_xor = WORD_XOR_BE(0);
- readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16, this);
- read8 = m68k_read8_delegate(&address_space::read_byte, &space);
- read16 = m68k_read16_delegate(&address_space::read_word_unaligned, &space);
- read32 = m68k_read32_delegate(&address_space::read_dword_unaligned, &space);
- write8 = m68k_write8_delegate(&address_space::write_byte, &space);
- write16 = m68k_write16_delegate(&address_space::write_word_unaligned, &space);
- write32 = m68k_write32_delegate(&address_space::write_dword_unaligned, &space);
+ m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16, this);
+ m_read8 = m68k_read8_delegate(&address_space::read_byte, &space);
+ m_read16 = m68k_read16_delegate(&address_space::read_word_unaligned, &space);
+ m_read32 = m68k_read32_delegate(&address_space::read_dword_unaligned, &space);
+ m_write8 = m68k_write8_delegate(&address_space::write_byte, &space);
+ m_write16 = m68k_write16_delegate(&address_space::write_word_unaligned, &space);
+ m_write32 = m68k_write32_delegate(&address_space::write_dword_unaligned, &space);
}
/* interface for 32-bit data bus with PMMU (68EC020, 68020) */
uint8_t m68000_base_device::read_byte_32_mmu(offs_t address)
{
- if (pmmu_enabled)
+ if (m_pmmu_enabled)
{
- address = pmmu_translate_addr(this, address);
- if (mmu_tmp_buserror_occurred) {
+ address = pmmu_translate_addr(address);
+ if (m_mmu_tmp_buserror_occurred) {
return ~0;
}
}
@@ -1332,10 +1309,10 @@ uint8_t m68000_base_device::read_byte_32_mmu(offs_t address)
void m68000_base_device::write_byte_32_mmu(offs_t address, uint8_t data)
{
- if (pmmu_enabled)
+ if (m_pmmu_enabled)
{
- address = pmmu_translate_addr(this, address);
- if (mmu_tmp_buserror_occurred) {
+ address = pmmu_translate_addr(address);
+ if (m_mmu_tmp_buserror_occurred) {
return;
}
}
@@ -1345,15 +1322,15 @@ void m68000_base_device::write_byte_32_mmu(offs_t address, uint8_t data)
uint16_t m68000_base_device::read_immediate_16_mmu(offs_t address)
{
- if (pmmu_enabled)
+ if (m_pmmu_enabled)
{
- address = pmmu_translate_addr(this, address);
- if (mmu_tmp_buserror_occurred) {
+ address = pmmu_translate_addr(address);
+ if (m_mmu_tmp_buserror_occurred) {
return ~0;
}
}
- return m_odirect->read_word((address), opcode_xor);
+ return m_odirect->read_word((address), m_opcode_xor);
}
/* potentially misaligned 16-bit reads with a 32-bit data bus (and 24-bit address bus) */
@@ -1361,16 +1338,16 @@ uint16_t m68000_base_device::readword_d32_mmu(offs_t address)
{
uint16_t result;
- if (pmmu_enabled)
+ if (m_pmmu_enabled)
{
- uint32_t address0 = pmmu_translate_addr(this, address);
- if (mmu_tmp_buserror_occurred) {
+ uint32_t address0 = pmmu_translate_addr(address);
+ if (m_mmu_tmp_buserror_occurred) {
return ~0;
} else if (WORD_ALIGNED(address)) {
return m_space->read_word(address0);
} else {
- uint32_t address1 = pmmu_translate_addr(this, address + 1);
- if (mmu_tmp_buserror_occurred) {
+ uint32_t address1 = pmmu_translate_addr(address + 1);
+ if (m_mmu_tmp_buserror_occurred) {
return ~0;
} else {
result = m_space->read_byte(address0) << 8;
@@ -1388,17 +1365,17 @@ uint16_t m68000_base_device::readword_d32_mmu(offs_t address)
/* potentially misaligned 16-bit writes with a 32-bit data bus (and 24-bit address bus) */
void m68000_base_device::writeword_d32_mmu(offs_t address, uint16_t data)
{
- if (pmmu_enabled)
+ if (m_pmmu_enabled)
{
- uint32_t address0 = pmmu_translate_addr(this, address);
- if (mmu_tmp_buserror_occurred) {
+ uint32_t address0 = pmmu_translate_addr(address);
+ if (m_mmu_tmp_buserror_occurred) {
return;
} else if (WORD_ALIGNED(address)) {
m_space->write_word(address0, data);
return;
} else {
- uint32_t address1 = pmmu_translate_addr(this, address + 1);
- if (mmu_tmp_buserror_occurred) {
+ uint32_t address1 = pmmu_translate_addr(address + 1);
+ if (m_mmu_tmp_buserror_occurred) {
return;
} else {
m_space->write_byte(address0, data >> 8);
@@ -1422,10 +1399,10 @@ uint32_t m68000_base_device::readlong_d32_mmu(offs_t address)
{
uint32_t result;
- if (pmmu_enabled)
+ if (m_pmmu_enabled)
{
- uint32_t address0 = pmmu_translate_addr(this, address);
- if (mmu_tmp_buserror_occurred) {
+ uint32_t address0 = pmmu_translate_addr(address);
+ if (m_mmu_tmp_buserror_occurred) {
return ~0;
} else if ((address +3) & 0xfc) {
// not at page boundary; use default code
@@ -1433,16 +1410,16 @@ uint32_t m68000_base_device::readlong_d32_mmu(offs_t address)
} else if (DWORD_ALIGNED(address)) { // 0
return m_space->read_dword(address0);
} else {
- uint32_t address2 = pmmu_translate_addr(this, address+2);
- if (mmu_tmp_buserror_occurred) {
+ uint32_t address2 = pmmu_translate_addr(address+2);
+ if (m_mmu_tmp_buserror_occurred) {
return ~0;
} else if (WORD_ALIGNED(address)) { // 2
result = m_space->read_word(address0) << 16;
return result | m_space->read_word(address2);
} else {
- uint32_t address1 = pmmu_translate_addr(this, address+1);
- uint32_t address3 = pmmu_translate_addr(this, address+3);
- if (mmu_tmp_buserror_occurred) {
+ uint32_t address1 = pmmu_translate_addr(address+1);
+ uint32_t address3 = pmmu_translate_addr(address+3);
+ if (m_mmu_tmp_buserror_occurred) {
return ~0;
} else {
result = m_space->read_byte(address0) << 24;
@@ -1468,10 +1445,10 @@ uint32_t m68000_base_device::readlong_d32_mmu(offs_t address)
/* potentially misaligned 32-bit writes with a 32-bit data bus (and 24-bit address bus) */
void m68000_base_device::writelong_d32_mmu(offs_t address, uint32_t data)
{
- if (pmmu_enabled)
+ if (m_pmmu_enabled)
{
- uint32_t address0 = pmmu_translate_addr(this, address);
- if (mmu_tmp_buserror_occurred) {
+ uint32_t address0 = pmmu_translate_addr(address);
+ if (m_mmu_tmp_buserror_occurred) {
return;
} else if ((address +3) & 0xfc) {
// not at page boundary; use default code
@@ -1480,17 +1457,17 @@ void m68000_base_device::writelong_d32_mmu(offs_t address, uint32_t data)
m_space->write_dword(address0, data);
return;
} else {
- uint32_t address2 = pmmu_translate_addr(this, address+2);
- if (mmu_tmp_buserror_occurred) {
+ uint32_t address2 = pmmu_translate_addr(address+2);
+ if (m_mmu_tmp_buserror_occurred) {
return;
} else if (WORD_ALIGNED(address)) { // 2
m_space->write_word(address0, data >> 16);
m_space->write_word(address2, data);
return;
} else {
- uint32_t address1 = pmmu_translate_addr(this, address+1);
- uint32_t address3 = pmmu_translate_addr(this, address+3);
- if (mmu_tmp_buserror_occurred) {
+ uint32_t address1 = pmmu_translate_addr(address+1);
+ uint32_t address3 = pmmu_translate_addr(address+3);
+ if (m_mmu_tmp_buserror_occurred) {
return;
} else {
m_space->write_byte(address0, data >> 24);
@@ -1524,24 +1501,24 @@ void m68000_base_device::init32mmu(address_space &space, address_space &ospace)
m_direct = space.direct<0>();
m_ospace = &ospace;
m_odirect = ospace.direct<0>();
- opcode_xor = WORD_XOR_BE(0);
+ m_opcode_xor = WORD_XOR_BE(0);
- readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_mmu, this);
- read8 = m68k_read8_delegate(&m68000_base_device::read_byte_32_mmu, this);
- read16 = m68k_read16_delegate(&m68000_base_device::readword_d32_mmu, this);
- read32 = m68k_read32_delegate(&m68000_base_device::readlong_d32_mmu, this);
- write8 = m68k_write8_delegate(&m68000_base_device::write_byte_32_mmu, this);
- write16 = m68k_write16_delegate(&m68000_base_device::writeword_d32_mmu, this);
- write32 = m68k_write32_delegate(&m68000_base_device::writelong_d32_mmu, this);
+ m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_mmu, this);
+ m_read8 = m68k_read8_delegate(&m68000_base_device::read_byte_32_mmu, this);
+ m_read16 = m68k_read16_delegate(&m68000_base_device::readword_d32_mmu, this);
+ m_read32 = m68k_read32_delegate(&m68000_base_device::readlong_d32_mmu, this);
+ m_write8 = m68k_write8_delegate(&m68000_base_device::write_byte_32_mmu, this);
+ m_write16 = m68k_write16_delegate(&m68000_base_device::writeword_d32_mmu, this);
+ m_write32 = m68k_write32_delegate(&m68000_base_device::writelong_d32_mmu, this);
}
/* interface for 32-bit data bus with PMMU (68EC020, 68020) */
uint8_t m68000_base_device::read_byte_32_hmmu(offs_t address)
{
- if (hmmu_enabled)
+ if (m_hmmu_enabled)
{
- address = hmmu_translate_addr(this, address);
+ address = hmmu_translate_addr(address);
}
return m_space->read_byte(address);
@@ -1549,9 +1526,9 @@ uint8_t m68000_base_device::read_byte_32_hmmu(offs_t address)
void m68000_base_device::write_byte_32_hmmu(offs_t address, uint8_t data)
{
- if (hmmu_enabled)
+ if (m_hmmu_enabled)
{
- address = hmmu_translate_addr(this, address);
+ address = hmmu_translate_addr(address);
}
m_space->write_byte(address, data);
@@ -1559,12 +1536,12 @@ void m68000_base_device::write_byte_32_hmmu(offs_t address, uint8_t data)
uint16_t m68000_base_device::read_immediate_16_hmmu(offs_t address)
{
- if (hmmu_enabled)
+ if (m_hmmu_enabled)
{
- address = hmmu_translate_addr(this, address);
+ address = hmmu_translate_addr(address);
}
- return m_odirect->read_word((address), opcode_xor);
+ return m_odirect->read_word((address), m_opcode_xor);
}
/* potentially misaligned 16-bit reads with a 32-bit data bus (and 24-bit address bus) */
@@ -1572,9 +1549,9 @@ uint16_t m68000_base_device::readword_d32_hmmu(offs_t address)
{
uint16_t result;
- if (hmmu_enabled)
+ if (m_hmmu_enabled)
{
- address = hmmu_translate_addr(this, address);
+ address = hmmu_translate_addr(address);
}
if (WORD_ALIGNED(address))
@@ -1586,9 +1563,9 @@ uint16_t m68000_base_device::readword_d32_hmmu(offs_t address)
/* potentially misaligned 16-bit writes with a 32-bit data bus (and 24-bit address bus) */
void m68000_base_device::writeword_d32_hmmu(offs_t address, uint16_t data)
{
- if (hmmu_enabled)
+ if (m_hmmu_enabled)
{
- address = hmmu_translate_addr(this, address);
+ address = hmmu_translate_addr(address);
}
if (WORD_ALIGNED(address))
@@ -1605,9 +1582,9 @@ uint32_t m68000_base_device::readlong_d32_hmmu(offs_t address)
{
uint32_t result;
- if (hmmu_enabled)
+ if (m_hmmu_enabled)
{
- address = hmmu_translate_addr(this, address);
+ address = hmmu_translate_addr(address);
}
if (DWORD_ALIGNED(address))
@@ -1625,9 +1602,9 @@ uint32_t m68000_base_device::readlong_d32_hmmu(offs_t address)
/* potentially misaligned 32-bit writes with a 32-bit data bus (and 24-bit address bus) */
void m68000_base_device::writelong_d32_hmmu(offs_t address, uint32_t data)
{
- if (hmmu_enabled)
+ if (m_hmmu_enabled)
{
- address = hmmu_translate_addr(this, address);
+ address = hmmu_translate_addr(address);
}
if (DWORD_ALIGNED(address))
@@ -1652,20 +1629,20 @@ void m68000_base_device::init32hmmu(address_space &space, address_space &ospace)
m_direct = space.direct<0>();
m_ospace = &ospace;
m_odirect = ospace.direct<0>();
- opcode_xor = WORD_XOR_BE(0);
+ m_opcode_xor = WORD_XOR_BE(0);
- readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_hmmu, this);
- read8 = m68k_read8_delegate(&m68000_base_device::read_byte_32_hmmu, this);
- read16 = m68k_read16_delegate(&m68000_base_device::readword_d32_hmmu, this);
- read32 = m68k_read32_delegate(&m68000_base_device::readlong_d32_hmmu, this);
- write8 = m68k_write8_delegate(&m68000_base_device::write_byte_32_hmmu, this);
- write16 = m68k_write16_delegate(&m68000_base_device::writeword_d32_hmmu, this);
- write32 = m68k_write32_delegate(&m68000_base_device::writelong_d32_hmmu, this);
+ m_readimm16 = m68k_readimm16_delegate(&m68000_base_device::read_immediate_16_hmmu, this);
+ m_read8 = m68k_read8_delegate(&m68000_base_device::read_byte_32_hmmu, this);
+ m_read16 = m68k_read16_delegate(&m68000_base_device::readword_d32_hmmu, this);
+ m_read32 = m68k_read32_delegate(&m68000_base_device::readlong_d32_hmmu, this);
+ m_write8 = m68k_write8_delegate(&m68000_base_device::write_byte_32_hmmu, this);
+ m_write16 = m68k_write16_delegate(&m68000_base_device::writeword_d32_hmmu, this);
+ m_write32 = m68k_write32_delegate(&m68000_base_device::writelong_d32_hmmu, this);
}
void m68000_base_device::set_reset_callback(write_line_delegate callback)
{
- reset_instr_callback = callback;
+ m_reset_instr_callback = callback;
}
// fault_addr = address to indicate fault at
@@ -1673,29 +1650,30 @@ void m68000_base_device::set_reset_callback(write_line_delegate callback)
// fc = 3-bit function code of access (usually you'd just put what m68k_get_fc() returns here)
void m68000_base_device::set_buserror_details(uint32_t fault_addr, uint8_t rw, uint8_t fc)
{
- aerr_address = fault_addr;
- aerr_write_mode = rw;
- aerr_fc = fc;
+ m_aerr_address = fault_addr;
+ m_aerr_write_mode = rw;
+ m_aerr_fc = fc;
+ m_mmu_tmp_buserror_address = fault_addr; // Hack for x68030
}
void m68000_base_device::set_cmpild_callback(write32_delegate callback)
{
- cmpild_instr_callback = callback;
+ m_cmpild_instr_callback = callback;
}
void m68000_base_device::set_rte_callback(write_line_delegate callback)
{
- rte_instr_callback = callback;
+ m_rte_instr_callback = callback;
}
void m68000_base_device::set_tas_write_callback(write8_delegate callback)
{
- tas_write_callback = callback;
+ m_tas_write_callback = callback;
}
uint16_t m68000_base_device::get_fc()
{
- return mmu_tmp_fc;
+ return m_mmu_tmp_fc;
}
/****************************************************************************
@@ -1704,49 +1682,50 @@ uint16_t m68000_base_device::get_fc()
void m68000_base_device::define_state(void)
{
- uint32_t addrmask = (cpu_type & MASK_24BIT_SPACE) ? 0xffffff : 0xffffffff;
+ uint32_t addrmask = (m_cpu_type & MASK_24BIT_SPACE) ? 0xffffff : 0xffffffff;
- state_add(STATE_GENPC, "PC", pc).mask(addrmask).callimport();
- state_add(STATE_GENPCBASE, "CURPC", ppc).mask(addrmask).callimport().noshow();
- state_add(M68K_SP, "SP", dar[15]);
- state_add(STATE_GENSP, "GENSP", dar[15]).noshow();
- state_add(STATE_GENFLAGS, "GENFLAGS", iotemp).noshow().callimport().callexport().formatstr("%16s");
- state_add(M68K_ISP, "ISP", iotemp).callimport().callexport();
- state_add(M68K_USP, "USP", iotemp).callimport().callexport();
- if (cpu_type & MASK_020_OR_LATER)
- state_add(M68K_MSP, "MSP", iotemp).callimport().callexport();
- state_add(M68K_SR, "SR", iotemp).noshow().callimport().callexport();
+ state_add(STATE_GENPC, "PC", m_pc).mask(addrmask).callimport();
+ state_add(STATE_GENPCBASE, "CURPC", m_ppc).mask(addrmask).callimport().noshow();
+ state_add(M68K_SP, "SP", m_dar[15]);
+ state_add(STATE_GENSP, "GENSP", m_dar[15]).noshow();
+ state_add(STATE_GENFLAGS, "GENFLAGS", m_iotemp).noshow().callimport().callexport().formatstr("%16s");
+ state_add(M68K_ISP, "ISP", m_iotemp).callimport().callexport();
+ state_add(M68K_USP, "USP", m_iotemp).callimport().callexport();
+ if (m_cpu_type & MASK_020_OR_LATER)
+ state_add(M68K_MSP, "MSP", m_iotemp).callimport().callexport();
+ state_add(M68K_SR, "SR", m_iotemp).noshow().callimport().callexport();
for (int regnum = 0; regnum < 8; regnum++) {
- state_add(M68K_D0 + regnum, string_format("D%d", regnum).c_str(), dar[regnum]);
+ state_add(M68K_D0 + regnum, string_format("D%d", regnum).c_str(), m_dar[regnum]);
}
for (int regnum = 0; regnum < 8; regnum++) {
- state_add(M68K_A0 + regnum, string_format("A%d", regnum).c_str(), dar[8 + regnum]);
+ state_add(M68K_A0 + regnum, string_format("A%d", regnum).c_str(), m_dar[8 + regnum]);
}
- state_add(M68K_PREF_ADDR, "PREF_ADDR", pref_addr).mask(addrmask);
- state_add(M68K_PREF_DATA, "PREF_DATA", pref_data);
+ state_add(M68K_IR, "IR", m_ir);
+ state_add(M68K_PREF_ADDR, "PREF_ADDR", m_pref_addr).mask(addrmask);
+ state_add(M68K_PREF_DATA, "PREF_DATA", m_pref_data);
- if (cpu_type & MASK_010_OR_LATER)
+ if (m_cpu_type & MASK_010_OR_LATER)
{
- state_add(M68K_SFC, "SFC", sfc).mask(0x7);
- state_add(M68K_DFC, "DFC", dfc).mask(0x7);
- state_add(M68K_VBR, "VBR", vbr);
+ state_add(M68K_SFC, "SFC", m_sfc).mask(0x7);
+ state_add(M68K_DFC, "DFC", m_dfc).mask(0x7);
+ state_add(M68K_VBR, "VBR", m_vbr);
}
- if (cpu_type & MASK_020_OR_LATER)
+ if (m_cpu_type & MASK_020_OR_LATER)
{
- state_add(M68K_CACR, "CACR", cacr);
- state_add(M68K_CAAR, "CAAR", caar);
+ state_add(M68K_CACR, "CACR", m_cacr);
+ state_add(M68K_CAAR, "CAAR", m_caar);
}
- if (cpu_type & MASK_030_OR_LATER)
+ if (m_cpu_type & MASK_030_OR_LATER)
{
for (int regnum = 0; regnum < 8; regnum++) {
- state_add(M68K_FP0 + regnum, string_format("FP%d", regnum).c_str(), iotemp).callimport().callexport().formatstr("%10s");
+ state_add(M68K_FP0 + regnum, string_format("FP%d", regnum).c_str(), m_iotemp).callimport().callexport().formatstr("%10s");
}
- state_add(M68K_FPSR, "FPSR", fpsr);
- state_add(M68K_FPCR, "FPCR", fpcr);
+ state_add(M68K_FPSR, "FPSR", m_fpsr);
+ state_add(M68K_FPCR, "FPCR", m_fpcr);
}
}
@@ -1761,26 +1740,25 @@ void m68000_base_device::init_cpu_m68000(void)
{
init_cpu_common();
- cpu_type = CPU_TYPE_000;
-// dasm_type = M68K_CPU_TYPE_68000;
-
- init16(*program, *oprogram);
- sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
- jump_table = m68ki_instruction_jump_table[0];
- cyc_instruction = m68ki_cycles[0];
- cyc_exception = m68ki_exception_cycle_table[0];
- cyc_bcc_notake_b = -2;
- cyc_bcc_notake_w = 2;
- cyc_dbcc_f_noexp = -2;
- cyc_dbcc_f_exp = 2;
- cyc_scc_r_true = 2;
- cyc_movem_w = 2;
- cyc_movem_l = 3;
- cyc_shift = 1;
- cyc_reset = 132;
- has_pmmu = 0;
- has_hmmu = 0;
- has_fpu = 0;
+ m_cpu_type = CPU_TYPE_000;
+
+ init16(*m_program, *m_oprogram);
+ m_sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
+ m_jump_table = m68ki_instruction_jump_table[0];
+ m_cyc_instruction = m68ki_cycles[0];
+ m_cyc_exception = m68ki_exception_cycle_table[0];
+ m_cyc_bcc_notake_b = -2;
+ m_cyc_bcc_notake_w = 2;
+ m_cyc_dbcc_f_noexp = -2;
+ m_cyc_dbcc_f_exp = 2;
+ m_cyc_scc_r_true = 2;
+ m_cyc_movem_w = 2;
+ m_cyc_movem_l = 3;
+ m_cyc_shift = 1;
+ m_cyc_reset = 132;
+ m_has_pmmu = 0;
+ m_has_hmmu = 0;
+ m_has_fpu = 0;
define_state();
@@ -1791,25 +1769,24 @@ void m68000_base_device::init_cpu_m68008(void)
{
init_cpu_common();
- cpu_type = CPU_TYPE_008;
-// dasm_type = M68K_CPU_TYPE_68008;
-
- init8(*program, *oprogram);
- sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
- jump_table = m68ki_instruction_jump_table[0];
- cyc_instruction = m68ki_cycles[0];
- cyc_exception = m68ki_exception_cycle_table[0];
- cyc_bcc_notake_b = -2;
- cyc_bcc_notake_w = 2;
- cyc_dbcc_f_noexp = -2;
- cyc_dbcc_f_exp = 2;
- cyc_scc_r_true = 2;
- cyc_movem_w = 2;
- cyc_movem_l = 3;
- cyc_shift = 1;
- cyc_reset = 132;
- has_pmmu = 0;
- has_fpu = 0;
+ m_cpu_type = CPU_TYPE_008;
+
+ init8(*m_program, *m_oprogram);
+ m_sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
+ m_jump_table = m68ki_instruction_jump_table[0];
+ m_cyc_instruction = m68ki_cycles[0];
+ m_cyc_exception = m68ki_exception_cycle_table[0];
+ m_cyc_bcc_notake_b = -2;
+ m_cyc_bcc_notake_w = 2;
+ m_cyc_dbcc_f_noexp = -2;
+ m_cyc_dbcc_f_exp = 2;
+ m_cyc_scc_r_true = 2;
+ m_cyc_movem_w = 2;
+ m_cyc_movem_l = 3;
+ m_cyc_shift = 1;
+ m_cyc_reset = 132;
+ m_has_pmmu = 0;
+ m_has_fpu = 0;
define_state();
@@ -1819,25 +1796,24 @@ void m68000_base_device::init_cpu_m68008(void)
void m68000_base_device::init_cpu_m68010(void)
{
init_cpu_common();
- cpu_type = CPU_TYPE_010;
-// dasm_type = M68K_CPU_TYPE_68010;
-
- init16(*program, *oprogram);
- sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
- jump_table = m68ki_instruction_jump_table[1];
- cyc_instruction = m68ki_cycles[1];
- cyc_exception = m68ki_exception_cycle_table[1];
- cyc_bcc_notake_b = -4;
- cyc_bcc_notake_w = 0;
- cyc_dbcc_f_noexp = 0;
- cyc_dbcc_f_exp = 6;
- cyc_scc_r_true = 0;
- cyc_movem_w = 2;
- cyc_movem_l = 3;
- cyc_shift = 1;
- cyc_reset = 130;
- has_pmmu = 0;
- has_fpu = 0;
+ m_cpu_type = CPU_TYPE_010;
+
+ init16(*m_program, *m_oprogram);
+ m_sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
+ m_jump_table = m68ki_instruction_jump_table[1];
+ m_cyc_instruction = m68ki_cycles[1];
+ m_cyc_exception = m68ki_exception_cycle_table[1];
+ m_cyc_bcc_notake_b = -4;
+ m_cyc_bcc_notake_w = 0;
+ m_cyc_dbcc_f_noexp = 0;
+ m_cyc_dbcc_f_exp = 6;
+ m_cyc_scc_r_true = 0;
+ m_cyc_movem_w = 2;
+ m_cyc_movem_l = 3;
+ m_cyc_shift = 1;
+ m_cyc_reset = 130;
+ m_has_pmmu = 0;
+ m_has_fpu = 0;
define_state();
}
@@ -1846,23 +1822,22 @@ void m68000_base_device::init_cpu_m68010(void)
void m68000_base_device::init_cpu_m68020(void)
{
init_cpu_common();
- cpu_type = CPU_TYPE_020;
-// dasm_type = M68K_CPU_TYPE_68020;
-
- init32(*program, *oprogram);
- sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
- jump_table = m68ki_instruction_jump_table[2];
- cyc_instruction = m68ki_cycles[2];
- cyc_exception = m68ki_exception_cycle_table[2];
- cyc_bcc_notake_b = -2;
- cyc_bcc_notake_w = 0;
- cyc_dbcc_f_noexp = 0;
- cyc_dbcc_f_exp = 4;
- cyc_scc_r_true = 0;
- cyc_movem_w = 2;
- cyc_movem_l = 2;
- cyc_shift = 0;
- cyc_reset = 518;
+ m_cpu_type = CPU_TYPE_020;
+
+ init32(*m_program, *m_oprogram);
+ m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
+ m_jump_table = m68ki_instruction_jump_table[2];
+ m_cyc_instruction = m68ki_cycles[2];
+ m_cyc_exception = m68ki_exception_cycle_table[2];
+ m_cyc_bcc_notake_b = -2;
+ m_cyc_bcc_notake_w = 0;
+ m_cyc_dbcc_f_noexp = 0;
+ m_cyc_dbcc_f_exp = 4;
+ m_cyc_scc_r_true = 0;
+ m_cyc_movem_w = 2;
+ m_cyc_movem_l = 2;
+ m_cyc_shift = 0;
+ m_cyc_reset = 518;
define_state();
}
@@ -1871,18 +1846,18 @@ void m68000_base_device::init_cpu_m68020fpu(void)
{
init_cpu_m68020();
- has_fpu = 1;
+ m_has_fpu = 1;
}
void m68000_base_device::init_cpu_m68020pmmu(void)
{
init_cpu_m68020();
- has_pmmu = 1;
- has_fpu = 1;
+ m_has_pmmu = 1;
+ m_has_fpu = 1;
- init32mmu(*program, *oprogram);
+ init32mmu(*m_program, *m_oprogram);
}
@@ -1891,37 +1866,36 @@ void m68000_base_device::init_cpu_m68020hmmu(void)
{
init_cpu_m68020();
- has_hmmu = 1;
- has_fpu = 1;
+ m_has_hmmu = 1;
+ m_has_fpu = 1;
- init32hmmu(*program, *oprogram);
+ init32hmmu(*m_program, *m_oprogram);
}
void m68000_base_device::init_cpu_m68ec020(void)
{
init_cpu_common();
- cpu_type = CPU_TYPE_EC020;
-// dasm_type = M68K_CPU_TYPE_68EC020;
-
-
- init32(*program, *oprogram);
- sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
- jump_table = m68ki_instruction_jump_table[2];
- cyc_instruction = m68ki_cycles[2];
- cyc_exception = m68ki_exception_cycle_table[2];
- cyc_bcc_notake_b = -2;
- cyc_bcc_notake_w = 0;
- cyc_dbcc_f_noexp = 0;
- cyc_dbcc_f_exp = 4;
- cyc_scc_r_true = 0;
- cyc_movem_w = 2;
- cyc_movem_l = 2;
- cyc_shift = 0;
- cyc_reset = 518;
- has_pmmu = 0;
- has_fpu = 0;
+ m_cpu_type = CPU_TYPE_EC020;
+
+
+ init32(*m_program, *m_oprogram);
+ m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
+ m_jump_table = m68ki_instruction_jump_table[2];
+ m_cyc_instruction = m68ki_cycles[2];
+ m_cyc_exception = m68ki_exception_cycle_table[2];
+ m_cyc_bcc_notake_b = -2;
+ m_cyc_bcc_notake_w = 0;
+ m_cyc_dbcc_f_noexp = 0;
+ m_cyc_dbcc_f_exp = 4;
+ m_cyc_scc_r_true = 0;
+ m_cyc_movem_w = 2;
+ m_cyc_movem_l = 2;
+ m_cyc_shift = 0;
+ m_cyc_reset = 518;
+ m_has_pmmu = 0;
+ m_has_fpu = 0;
define_state();
}
@@ -1931,26 +1905,25 @@ void m68000_base_device::init_cpu_m68030(void)
{
init_cpu_common();
- cpu_type = CPU_TYPE_030;
-// dasm_type = M68K_CPU_TYPE_68030;
-
-
- init32mmu(*program, *oprogram);
- sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
- jump_table = m68ki_instruction_jump_table[3];
- cyc_instruction = m68ki_cycles[3];
- cyc_exception = m68ki_exception_cycle_table[3];
- cyc_bcc_notake_b = -2;
- cyc_bcc_notake_w = 0;
- cyc_dbcc_f_noexp = 0;
- cyc_dbcc_f_exp = 4;
- cyc_scc_r_true = 0;
- cyc_movem_w = 2;
- cyc_movem_l = 2;
- cyc_shift = 0;
- cyc_reset = 518;
- has_pmmu = 1;
- has_fpu = 1;
+ m_cpu_type = CPU_TYPE_030;
+
+
+ init32mmu(*m_program, *m_oprogram);
+ m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
+ m_jump_table = m68ki_instruction_jump_table[3];
+ m_cyc_instruction = m68ki_cycles[3];
+ m_cyc_exception = m68ki_exception_cycle_table[3];
+ m_cyc_bcc_notake_b = -2;
+ m_cyc_bcc_notake_w = 0;
+ m_cyc_dbcc_f_noexp = 0;
+ m_cyc_dbcc_f_exp = 4;
+ m_cyc_scc_r_true = 0;
+ m_cyc_movem_w = 2;
+ m_cyc_movem_l = 2;
+ m_cyc_shift = 0;
+ m_cyc_reset = 518;
+ m_has_pmmu = 1;
+ m_has_fpu = 1;
define_state();
}
@@ -1961,26 +1934,25 @@ void m68000_base_device::init_cpu_m68ec030(void)
{
init_cpu_common();
- cpu_type = CPU_TYPE_EC030;
-// dasm_type = M68K_CPU_TYPE_68EC030;
-
-
- init32(*program, *oprogram);
- sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
- jump_table = m68ki_instruction_jump_table[3];
- cyc_instruction = m68ki_cycles[3];
- cyc_exception = m68ki_exception_cycle_table[3];
- cyc_bcc_notake_b = -2;
- cyc_bcc_notake_w = 0;
- cyc_dbcc_f_noexp = 0;
- cyc_dbcc_f_exp = 4;
- cyc_scc_r_true = 0;
- cyc_movem_w = 2;
- cyc_movem_l = 2;
- cyc_shift = 0;
- cyc_reset = 518;
- has_pmmu = 0; /* EC030 lacks the PMMU and is effectively a die-shrink 68020 */
- has_fpu = 1;
+ m_cpu_type = CPU_TYPE_EC030;
+
+
+ init32(*m_program, *m_oprogram);
+ m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
+ m_jump_table = m68ki_instruction_jump_table[3];
+ m_cyc_instruction = m68ki_cycles[3];
+ m_cyc_exception = m68ki_exception_cycle_table[3];
+ m_cyc_bcc_notake_b = -2;
+ m_cyc_bcc_notake_w = 0;
+ m_cyc_dbcc_f_noexp = 0;
+ m_cyc_dbcc_f_exp = 4;
+ m_cyc_scc_r_true = 0;
+ m_cyc_movem_w = 2;
+ m_cyc_movem_l = 2;
+ m_cyc_shift = 0;
+ m_cyc_reset = 518;
+ m_has_pmmu = 0; /* EC030 lacks the PMMU and is effectively a die-shrink 68020 */
+ m_has_fpu = 1;
define_state();
}
@@ -1991,26 +1963,25 @@ void m68000_base_device::init_cpu_m68040(void)
{
init_cpu_common();
- cpu_type = CPU_TYPE_040;
-// dasm_type = M68K_CPU_TYPE_68040;
-
-
- init32mmu(*program, *oprogram);
- sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
- jump_table = m68ki_instruction_jump_table[4];
- cyc_instruction = m68ki_cycles[4];
- cyc_exception = m68ki_exception_cycle_table[4];
- cyc_bcc_notake_b = -2;
- cyc_bcc_notake_w = 0;
- cyc_dbcc_f_noexp = 0;
- cyc_dbcc_f_exp = 4;
- cyc_scc_r_true = 0;
- cyc_movem_w = 2;
- cyc_movem_l = 2;
- cyc_shift = 0;
- cyc_reset = 518;
- has_pmmu = 1;
- has_fpu = 1;
+ m_cpu_type = CPU_TYPE_040;
+
+
+ init32mmu(*m_program, *m_oprogram);
+ m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
+ m_jump_table = m68ki_instruction_jump_table[4];
+ m_cyc_instruction = m68ki_cycles[4];
+ m_cyc_exception = m68ki_exception_cycle_table[4];
+ m_cyc_bcc_notake_b = -2;
+ m_cyc_bcc_notake_w = 0;
+ m_cyc_dbcc_f_noexp = 0;
+ m_cyc_dbcc_f_exp = 4;
+ m_cyc_scc_r_true = 0;
+ m_cyc_movem_w = 2;
+ m_cyc_movem_l = 2;
+ m_cyc_shift = 0;
+ m_cyc_reset = 518;
+ m_has_pmmu = 1;
+ m_has_fpu = 1;
define_state();
}
@@ -2020,26 +1991,25 @@ void m68000_base_device::init_cpu_m68ec040(void)
{
init_cpu_common();
- cpu_type = CPU_TYPE_EC040;
-// dasm_type = M68K_CPU_TYPE_68EC040;
-
-
- init32(*program, *oprogram);
- sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
- jump_table = m68ki_instruction_jump_table[4];
- cyc_instruction = m68ki_cycles[4];
- cyc_exception = m68ki_exception_cycle_table[4];
- cyc_bcc_notake_b = -2;
- cyc_bcc_notake_w = 0;
- cyc_dbcc_f_noexp = 0;
- cyc_dbcc_f_exp = 4;
- cyc_scc_r_true = 0;
- cyc_movem_w = 2;
- cyc_movem_l = 2;
- cyc_shift = 0;
- cyc_reset = 518;
- has_pmmu = 0;
- has_fpu = 0;
+ m_cpu_type = CPU_TYPE_EC040;
+
+
+ init32(*m_program, *m_oprogram);
+ m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
+ m_jump_table = m68ki_instruction_jump_table[4];
+ m_cyc_instruction = m68ki_cycles[4];
+ m_cyc_exception = m68ki_exception_cycle_table[4];
+ m_cyc_bcc_notake_b = -2;
+ m_cyc_bcc_notake_w = 0;
+ m_cyc_dbcc_f_noexp = 0;
+ m_cyc_dbcc_f_exp = 4;
+ m_cyc_scc_r_true = 0;
+ m_cyc_movem_w = 2;
+ m_cyc_movem_l = 2;
+ m_cyc_shift = 0;
+ m_cyc_reset = 518;
+ m_has_pmmu = 0;
+ m_has_fpu = 0;
define_state();
}
@@ -2049,26 +2019,25 @@ void m68000_base_device::init_cpu_m68lc040(void)
{
init_cpu_common();
- cpu_type = CPU_TYPE_LC040;
-// dasm_type = M68K_CPU_TYPE_68LC040;
-
-
- init32mmu(*program, *oprogram);
- sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
- jump_table = m68ki_instruction_jump_table[4];
- cyc_instruction = m68ki_cycles[4];
- cyc_exception = m68ki_exception_cycle_table[4];
- cyc_bcc_notake_b = -2;
- cyc_bcc_notake_w = 0;
- cyc_dbcc_f_noexp = 0;
- cyc_dbcc_f_exp = 4;
- cyc_scc_r_true = 0;
- cyc_movem_w = 2;
- cyc_movem_l = 2;
- cyc_shift = 0;
- cyc_reset = 518;
- has_pmmu = 1;
- has_fpu = 0;
+ m_cpu_type = CPU_TYPE_LC040;
+
+
+ init32mmu(*m_program, *m_oprogram);
+ m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
+ m_jump_table = m68ki_instruction_jump_table[4];
+ m_cyc_instruction = m68ki_cycles[4];
+ m_cyc_exception = m68ki_exception_cycle_table[4];
+ m_cyc_bcc_notake_b = -2;
+ m_cyc_bcc_notake_w = 0;
+ m_cyc_dbcc_f_noexp = 0;
+ m_cyc_dbcc_f_exp = 4;
+ m_cyc_scc_r_true = 0;
+ m_cyc_movem_w = 2;
+ m_cyc_movem_l = 2;
+ m_cyc_shift = 0;
+ m_cyc_reset = 518;
+ m_has_pmmu = 1;
+ m_has_fpu = 0;
define_state();
}
@@ -2077,7 +2046,7 @@ void m68000_base_device::init_cpu_m68lc040(void)
void m68000_base_device::init_cpu_scc68070(void)
{
init_cpu_m68010();
- cpu_type = CPU_TYPE_SCC070;
+ m_cpu_type = CPU_TYPE_SCC070;
}
@@ -2085,24 +2054,23 @@ void m68000_base_device::init_cpu_fscpu32(void)
{
init_cpu_common();
- cpu_type = CPU_TYPE_FSCPU32;
-// dasm_type = M68K_CPU_TYPE_FSCPU32;
-
-
- init32(*program, *oprogram);
- sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
- jump_table = m68ki_instruction_jump_table[5];
- cyc_instruction = m68ki_cycles[5];
- cyc_exception = m68ki_exception_cycle_table[5];
- cyc_bcc_notake_b = -2;
- cyc_bcc_notake_w = 0;
- cyc_dbcc_f_noexp = 0;
- cyc_dbcc_f_exp = 4;
- cyc_scc_r_true = 0;
- cyc_movem_w = 2;
- cyc_movem_l = 2;
- cyc_shift = 0;
- cyc_reset = 518;
+ m_cpu_type = CPU_TYPE_FSCPU32;
+
+
+ init32(*m_program, *m_oprogram);
+ m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
+ m_jump_table = m68ki_instruction_jump_table[5];
+ m_cyc_instruction = m68ki_cycles[5];
+ m_cyc_exception = m68ki_exception_cycle_table[5];
+ m_cyc_bcc_notake_b = -2;
+ m_cyc_bcc_notake_w = 0;
+ m_cyc_dbcc_f_noexp = 0;
+ m_cyc_dbcc_f_exp = 4;
+ m_cyc_scc_r_true = 0;
+ m_cyc_movem_w = 2;
+ m_cyc_movem_l = 2;
+ m_cyc_shift = 0;
+ m_cyc_reset = 518;
define_state();
}
@@ -2113,24 +2081,23 @@ void m68000_base_device::init_cpu_coldfire(void)
{
init_cpu_common();
- cpu_type = CPU_TYPE_COLDFIRE;
-// dasm_type = M68K_CPU_TYPE_COLDFIRE;
-
-
- init32(*program, *oprogram);
- sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
- jump_table = m68ki_instruction_jump_table[6];
- cyc_instruction = m68ki_cycles[6];
- cyc_exception = m68ki_exception_cycle_table[6];
- cyc_bcc_notake_b = -2;
- cyc_bcc_notake_w = 0;
- cyc_dbcc_f_noexp = 0;
- cyc_dbcc_f_exp = 4;
- cyc_scc_r_true = 0;
- cyc_movem_w = 2;
- cyc_movem_l = 2;
- cyc_shift = 0;
- cyc_reset = 518;
+ m_cpu_type = CPU_TYPE_COLDFIRE;
+
+
+ init32(*m_program, *m_oprogram);
+ m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
+ m_jump_table = m68ki_instruction_jump_table[6];
+ m_cyc_instruction = m68ki_cycles[6];
+ m_cyc_exception = m68ki_exception_cycle_table[6];
+ m_cyc_bcc_notake_b = -2;
+ m_cyc_bcc_notake_w = 0;
+ m_cyc_dbcc_f_noexp = 0;
+ m_cyc_dbcc_f_exp = 4;
+ m_cyc_scc_r_true = 0;
+ m_cyc_movem_w = 2;
+ m_cyc_movem_l = 2;
+ m_cyc_shift = 0;
+ m_cyc_reset = 518;
define_state();
}
@@ -2232,26 +2199,26 @@ util::disasm_interface *mcf5206e_device::create_disassembler()
/* Service an interrupt request and start exception processing */
-void m68000_base_device::m68ki_exception_interrupt(m68000_base_device *m68k, uint32_t int_level)
+void m68000_base_device::m68ki_exception_interrupt(uint32_t int_level)
{
uint32_t vector;
uint32_t sr;
uint32_t new_pc;
- if(CPU_TYPE_IS_000(cpu_type))
+ if(CPU_TYPE_IS_000())
{
- instr_mode = INSTRUCTION_NO;
+ m_instr_mode = INSTRUCTION_NO;
}
- /* Turn off the stopped state */
- stopped &= ~STOP_LEVEL_STOP;
+ /* Turn off the m_stopped state */
+ m_stopped &= ~STOP_LEVEL_STOP;
/* If we are halted, don't do anything */
- if(stopped)
+ if(m_stopped)
return;
/* Acknowledge the interrupt */
- vector = int_ack_callback(*this, int_level);
+ vector = m_int_ack_callback(*this, int_level);
/* Get the interrupt vector */
if(vector == M68K_INT_ACK_AUTOVECTOR)
@@ -2264,52 +2231,39 @@ void m68000_base_device::m68ki_exception_interrupt(m68000_base_device *m68k, uin
return;
/* Start exception processing */
- sr = m68ki_init_exception(m68k);
+ sr = m68ki_init_exception();
/* Set the interrupt mask to the level of the one being serviced */
- int_mask = int_level<<8;
+ m_int_mask = int_level<<8;
/* Get the new PC */
- new_pc = m68ki_read_data_32(this, (vector<<2) + vbr);
+ new_pc = m68ki_read_data_32((vector<<2) + m_vbr);
/* If vector is uninitialized, call the uninitialized interrupt vector */
if(new_pc == 0)
- new_pc = m68ki_read_data_32(this, (EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + vbr);
+ new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + m_vbr);
/* Generate a stack frame */
- m68ki_stack_frame_0000(this, REG_PC(m68k), sr, vector);
- if(m_flag && CPU_TYPE_IS_EC020_PLUS(cpu_type))
+ m68ki_stack_frame_0000(m_pc, sr, vector);
+ if(m_m_flag && CPU_TYPE_IS_EC020_PLUS())
{
/* Create throwaway frame */
- m68ki_set_sm_flag(this, s_flag); /* clear M */
+ m68ki_set_sm_flag(m_s_flag); /* clear M */
sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */
- m68ki_stack_frame_0001(this, REG_PC(m68k), sr, vector);
+ m68ki_stack_frame_0001(m_pc, sr, vector);
}
- m68ki_jump(this, new_pc);
+ m68ki_jump(new_pc);
/* Defer cycle counting until later */
- remaining_cycles -= cyc_exception[vector];
+ m_remaining_cycles -= m_cyc_exception[vector];
}
-DEFINE_DEVICE_TYPE(M68K, m68000_base_device, "m68k", "M68K")
-
//-------------------------------------------------
-// h6280_device - constructor
+// m68000_base_device - constructor
//-------------------------------------------------
-m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : cpu_device(mconfig, M68K, tag, owner, clock),
- m_program_config("program", ENDIANNESS_BIG, 16, 24),
- m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, 16, 24)
-{
- clear_all();
-}
-
-
-
-
m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map)
: cpu_device(mconfig, type, tag, owner, clock),
@@ -2331,146 +2285,136 @@ m68000_base_device::m68000_base_device(const machine_config &mconfig, const char
void m68000_base_device::clear_all()
{
- cpu_type= 0;
-// dasm_type= 0;
- for (auto & elem : dar)
+ m_cpu_type= 0;
+//
+ for (auto & elem : m_dar)
elem= 0;
- ppc= 0;
- pc= 0;
- for (auto & elem : sp)
+ m_ppc= 0;
+ m_pc= 0;
+ for (auto & elem : m_sp)
elem= 0;
- vbr= 0;
- sfc= 0;
- dfc= 0;
- cacr= 0;
- caar= 0;
- ir= 0;
+ m_vbr= 0;
+ m_sfc= 0;
+ m_dfc= 0;
+ m_cacr= 0;
+ m_caar= 0;
+ m_ir= 0;
// for (int i=0;i<8;i++)
-// fpr[i]= 0;
- fpiar= 0;
- fpsr= 0;
- fpcr= 0;
- t1_flag= 0;
- t0_flag= 0;
- s_flag= 0;
- m_flag= 0;
- x_flag= 0;
- n_flag= 0;
- not_z_flag= 0;
- v_flag= 0;
- c_flag= 0;
- int_mask= 0;
- int_level= 0;
- stopped= 0;
- pref_addr= 0;
- pref_data= 0;
- sr_mask= 0;
- instr_mode= 0;
- run_mode= 0;
- has_pmmu= 0;
- has_hmmu= 0;
- pmmu_enabled= 0;
- hmmu_enabled= 0;
- has_fpu= 0;
- fpu_just_reset= 0;
-
- cyc_bcc_notake_b = 0;
- cyc_bcc_notake_w = 0;
- cyc_dbcc_f_noexp = 0;
- cyc_dbcc_f_exp = 0;
- cyc_scc_r_true = 0;
- cyc_movem_w = 0;
- cyc_movem_l = 0;
- cyc_shift = 0;
- cyc_reset = 0;
-
- initial_cycles = 0;
- remaining_cycles = 0;
- reset_cycles = 0;
- tracing = 0;
+// m_fpr[i]= 0;
+ m_fpiar= 0;
+ m_fpsr= 0;
+ m_fpcr= 0;
+ m_t1_flag= 0;
+ m_t0_flag= 0;
+ m_s_flag= 0;
+ m_m_flag= 0;
+ m_x_flag= 0;
+ m_n_flag= 0;
+ m_not_z_flag= 0;
+ m_v_flag= 0;
+ m_c_flag= 0;
+ m_int_mask= 0;
+ m_int_level= 0;
+ m_stopped= 0;
+ m_pref_addr= 0;
+ m_pref_data= 0;
+ m_sr_mask= 0;
+ m_instr_mode= 0;
+ m_run_mode= 0;
+ m_has_pmmu= 0;
+ m_has_hmmu= 0;
+ m_pmmu_enabled= 0;
+ m_hmmu_enabled= 0;
+ m_has_fpu= 0;
+ m_fpu_just_reset= 0;
+
+ m_cyc_bcc_notake_b = 0;
+ m_cyc_bcc_notake_w = 0;
+ m_cyc_dbcc_f_noexp = 0;
+ m_cyc_dbcc_f_exp = 0;
+ m_cyc_scc_r_true = 0;
+ m_cyc_movem_w = 0;
+ m_cyc_movem_l = 0;
+ m_cyc_shift = 0;
+ m_cyc_reset = 0;
+
+ m_initial_cycles = 0;
+ m_remaining_cycles = 0;
+ m_reset_cycles = 0;
+ m_tracing = 0;
m_address_error = 0;
- aerr_address = 0;
- aerr_write_mode = 0;
- aerr_fc = 0;
+ m_aerr_address = 0;
+ m_aerr_write_mode = 0;
+ m_aerr_fc = 0;
- virq_state = 0;
- nmi_pending = 0;
+ m_virq_state = 0;
+ m_nmi_pending = 0;
- cyc_instruction = nullptr;
- cyc_exception = nullptr;
+ m_cyc_instruction = nullptr;
+ m_cyc_exception = nullptr;
- int_ack_callback = device_irq_acknowledge_delegate();
- program = nullptr;
+ m_int_ack_callback = device_irq_acknowledge_delegate();
+ m_program = nullptr;
- opcode_xor = 0;
-// readimm16 = 0;
-// read8 = 0;
-// read16 = 0;
-// read32 = 0;
-// write8 = 0;
-// write16 = 0;
-// write32 = 0;
+ m_opcode_xor = 0;
+// m_readimm16 = 0;
+// m_read8 = 0;
+// m_read16 = 0;
+// m_read32 = 0;
+// m_write8 = 0;
+// m_write16 = 0;
+// m_write32 = 0;
m_space = nullptr;
m_direct = nullptr;
- iotemp = 0;
+ m_iotemp = 0;
- save_sr = 0;
- save_stopped = 0;
- save_halted = 0;
+ m_save_sr = 0;
+ m_save_stopped = 0;
+ m_save_halted = 0;
- mmu_crp_aptr = mmu_crp_limit = 0;
- mmu_srp_aptr = mmu_srp_limit = 0;
- mmu_urp_aptr = 0;
- mmu_tc = 0;
- mmu_sr = 0;
- mmu_sr_040 = 0;
+ m_mmu_crp_aptr = m_mmu_crp_limit = 0;
+ m_mmu_srp_aptr = m_mmu_srp_limit = 0;
+ m_mmu_urp_aptr = 0;
+ m_mmu_tc = 0;
+ m_mmu_sr = 0;
+ m_mmu_sr_040 = 0;
for (int i=0; i<MMU_ATC_ENTRIES;i++)
- mmu_atc_tag[i] = mmu_atc_data[i] = 0;
-
- mmu_atc_rr = 0;
- mmu_tt0 = mmu_tt1 = 0;
- mmu_itt0 = mmu_itt1 = mmu_dtt0 = mmu_dtt1 = 0;
- mmu_acr0= mmu_acr1 = mmu_acr2 = mmu_acr3 = 0;
- mmu_tmp_sr = 0;
- mmu_tmp_fc = 0;
- mmu_tmp_rw = 0;
- mmu_tmp_buserror_address = 0;
- mmu_tmp_buserror_occurred = 0;
- mmu_tmp_buserror_fc = 0;
- mmu_tmp_buserror_rw = 0;
+ m_mmu_atc_tag[i] = m_mmu_atc_data[i] = 0;
+
+ m_mmu_atc_rr = 0;
+ m_mmu_tt0 = m_mmu_tt1 = 0;
+ m_mmu_itt0 = m_mmu_itt1 = m_mmu_dtt0 = m_mmu_dtt1 = 0;
+ m_mmu_acr0 = m_mmu_acr1 = m_mmu_acr2 = m_mmu_acr3 = 0;
+ m_mmu_tmp_sr = 0;
+ m_mmu_tmp_fc = 0;
+ m_mmu_tmp_rw = 0;
+ m_mmu_tmp_buserror_address = 0;
+ m_mmu_tmp_buserror_occurred = 0;
+ m_mmu_tmp_buserror_fc = 0;
+ m_mmu_tmp_buserror_rw = 0;
for (int i=0;i<M68K_IC_SIZE;i++)
{
- ic_address[i] = 0;
- ic_data[i] = 0;
- ic_valid[i] = false;
+ m_ic_address[i] = 0;
+ m_ic_data[i] = 0;
+ m_ic_valid[i] = false;
}
- internal = nullptr;
+ m_internal = nullptr;
}
-void m68000_base_device::execute_run()
-{
- cpu_execute();
-}
-
void m68000_base_device::device_start()
{
}
-void m68000_base_device::device_reset()
-{
- reset_cpu();
-}
-
void m68000_base_device::device_stop()
{
}
@@ -2492,13 +2436,13 @@ void m68000_base_device::execute_set_input(int inputnum, int state)
case M68K_IRQ_6:
case M68K_IRQ_7:
case INPUT_LINE_NMI:
- set_irq_line(this, inputnum, state);
+ set_irq_line(inputnum, state);
break;
case M68K_LINE_BUSERROR:
if (state == ASSERT_LINE)
{
- m68k_cause_bus_error(this);
+ m68k_cause_bus_error();
}
break;
}
@@ -2653,9 +2597,9 @@ bool m68020hmmu_device::memory_translate(int space, int intention, offs_t &addre
{
/* only applies to the program address space and only does something if the MMU's enabled */
{
- if ((space == AS_PROGRAM) && (hmmu_enabled))
+ if ((space == AS_PROGRAM) && (m_hmmu_enabled))
{
- address = hmmu_translate_addr(this, address);
+ address = hmmu_translate_addr(address);
}
}
return true;