diff options
Diffstat (limited to 'src/devices/bus/a2bus/agat7ram.cpp')
-rw-r--r-- | src/devices/bus/a2bus/agat7ram.cpp | 27 |
1 files changed, 13 insertions, 14 deletions
diff --git a/src/devices/bus/a2bus/agat7ram.cpp b/src/devices/bus/a2bus/agat7ram.cpp index dde0260db3f..51bbabb792c 100644 --- a/src/devices/bus/a2bus/agat7ram.cpp +++ b/src/devices/bus/a2bus/agat7ram.cpp @@ -10,6 +10,9 @@ #include "agat7ram.h" +//#define VERBOSE 1 +#include "logmacro.h" + /*************************************************************************** PARAMETERS ***************************************************************************/ @@ -30,7 +33,7 @@ DEFINE_DEVICE_TYPE(A2BUS_AGAT7RAM, a2bus_agat7ram_device, "a7ram", "Agat-7 32K R a2bus_agat7ram_device::a2bus_agat7ram_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock), - device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_main_bank(0) + device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_main_bank(0), m_csr(0) { } @@ -48,32 +51,32 @@ void a2bus_agat7ram_device::device_start() // set_a2bus_device makes m_slot valid set_a2bus_device(); - memset(m_ram, 0, 32*1024); + memset(m_ram, 0, 32 * 1024); save_item(NAME(m_inh_state)); save_item(NAME(m_ram)); save_item(NAME(m_main_bank)); - save_item(NAME(m_last_offset)); + save_item(NAME(m_csr)); } void a2bus_agat7ram_device::device_reset() { m_inh_state = INH_NONE; m_main_bank = 0; - m_last_offset = -1; + m_csr = 0; } void a2bus_agat7ram_device::do_io(int offset) { int old_inh_state = m_inh_state; - m_last_offset = offset; + m_csr = offset & 0x7f; m_inh_state = INH_NONE; m_main_bank = 0; if (offset & 0x8) { - m_inh_state = INH_READ|INH_WRITE; + m_inh_state = INH_READ | INH_WRITE; } if (offset & 0x1) @@ -86,13 +89,11 @@ void a2bus_agat7ram_device::do_io(int offset) recalc_slot_inh(); } -#if 1 - logerror("RAM: (ofs %02x) new state %c%c main=%05x\n", + LOG("RAM: (ofs %02x) new state %c%c main=%05x\n", offset, (m_inh_state & INH_READ) ? 'R' : 'x', (m_inh_state & INH_WRITE) ? 'W' : 'x', m_main_bank); -#endif } @@ -102,7 +103,7 @@ void a2bus_agat7ram_device::do_io(int offset) uint8_t a2bus_agat7ram_device::read_cnxx(address_space &space, uint8_t offset) { - return m_last_offset < 0 ? 0 : (m_last_offset & 0x7f); + return m_csr; } @@ -125,12 +126,10 @@ uint8_t a2bus_agat7ram_device::read_inh_rom(address_space &space, uint16_t offse void a2bus_agat7ram_device::write_inh_rom(address_space &space, uint16_t offset, uint8_t data) { // are writes enabled? - if (!(m_inh_state & INH_WRITE)) + if ((m_inh_state & INH_WRITE) && !BIT(m_csr, 4)) { - return; + m_ram[(offset & 0x3fff) + m_main_bank] = data; } - - m_ram[(offset & 0x3fff) + m_main_bank] = data; } int a2bus_agat7ram_device::inh_type() |