| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | sh/sh7709s.cpp: Fix LRU cache replacement updates (#15098) | 2026-03-14 | 1 | -2/+2 | |
| * | sh/sh7709s.cpp: Update bank conflict precharge penalty timing (#15087) | 2026-03-12 | 1 | -12/+27 | |
| * | sh/sh7709s.cpp: Convert the cpu cycles to bus cycles properly (#15078) | 2026-03-10 | 1 | -76/+45 | |
| * | sh/sh7709s.cpp: Fix bug in DRC memory accessor using clobbered IO reg (#15074) | 2026-03-08 | 1 | -11/+22 | |
| * | Missing emu.h | 2026-03-08 | 1 | -0/+1 | |
| * | cpu/sh: Add cv1k SH7709S cache handling behavior for slowdown emulation (#15054) | 2026-03-07 | 1 | -0/+562 |
