path: root/src/devices/cpu
Commit message (Expand)AuthorAgeFilesLines
* Remove x86emit.hGravatarGravatar AJR3 hours3-3199/+4
* drcbex86: implemented asmjit emitterGravatarGravatar Patrick Mackinlay4 hours2-2805/+2174
* drcbe: fixed logging problemGravatarGravatar Patrick Mackinlay11 hours3-17/+16
* taitogn: sianniv doesn't have zsg2 soundGravatarGravatar hap5 days1-1/+1
* -m6809: Still perform an IRQ acknowledge cycle on software interrupts. Fixes ...GravatarGravatar Ryan Holtz5 days2-0/+4
* devices/cpu/h8/h8dma, devices/machine/generalplus_gpl16250soc, devices/machin...GravatarGravatar Ivan Vangelista6 days1-0/+1
* sothello: simplify maincpu-subcpu comms, game works againGravatarGravatar hap7 days1-2/+2
* drcbex64: implemented asmjit emitterGravatarGravatar Patrick Mackinlay8 days2-3758/+1644
* Slotified Mac 128k/512k/512ke/Plus keyboard port.GravatarGravatar Vas Crabb10 days1-0/+4
* various devices and drivers: removed superfluous semicolons (nw)GravatarGravatar Ivan Vangelista11 days10-16/+16
* New machines marked as NOT_WORKINGGravatarGravatar AJR12 days4-0/+1484
* mips3: Removed depricated DRC flag and add a flag to disable intrablock branc...GravatarGravatar Ted Green12 days2-3/+7
* Ensure SDBD operations set correct condition flags.GravatarGravatar Andrew Green2020-06-251-18/+10
* i86: forgot carry flag for neg opcode (nw)GravatarGravatar hap2020-06-251-2/+2
* i86: Fixed old regression with NEG opcode flags. [dink/fbneo]GravatarGravatar hap2020-06-251-8/+8
* Merge branch 'release0222' into mainline-masterGravatarGravatar Vas Crabb2020-06-251-3/+8
| * -bus/coco/coco_ram.cpp: fix a rather obvious bug in shift/maskGravatarGravatar Vas Crabb2020-06-251-1/+1
| * cpu/i960: Log unimplemented IACsGravatarGravatar Vas Crabb2020-06-251-2/+7
* | Merge branch 'release0222' into mainline-masterGravatarGravatar Vas Crabb2020-06-232-1713/+2682
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| * Revert "drcbex64: use asmjit"GravatarGravatar Vas Crabb2020-06-232-1713/+2682
| * Revert "drcbex64: fix pushf/popf bug (nw)"GravatarGravatar Vas Crabb2020-06-231-15/+15
| * drcbex64: fix pushf/popf bug (nw)GravatarGravatar Patrick Mackinlay2020-06-221-15/+15
* | n64: modify burn_cycles method (nw)GravatarGravatar hap2020-06-222-7/+0
* | -arm7: Added placeholder devices for PXA250 and PXA270, and corrected PXA255 ...GravatarGravatar MooglyGuy2020-06-222-3/+39
* | drcbex64: fix pushf/popf bug (nw)GravatarGravatar Patrick Mackinlay2020-06-221-15/+15
* | tlcs900: Fix MAX instruction (nw)GravatarGravatar AJR2020-06-211-1/+1
* | New machines marked as NOT_WORKINGGravatarGravatar AJR2020-06-212-0/+295
* | Merge pull request #6844 from Sterophonick/masterGravatarGravatar ajrhacker2020-06-212-14/+24
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| * gigatron: fix ROM mask being 15-bit instead of 16-bitGravatarGravatar Sterophonick2020-06-202-3/+5
| * gigatron: safe resolve (but proper)GravatarGravatar Sterophonick2020-06-201-1/+1
| * gigatron: change resolve to resolve_safeGravatarGravatar Sterophonick2020-06-201-1/+1
| * gigatron: some more workGravatarGravatar Sterophonick2020-06-192-13/+18
| * gigatron: whoopsGravatarGravatar Sterophonick2020-06-191-1/+1
| * gigatron: make the CPU use the outx callbackGravatarGravatar Sterophonick2020-06-191-0/+3
* | srcclean and cleanup (nw)GravatarGravatar Vas Crabb2020-06-214-22/+22
* | Correct cycle counts for TLCS-900/H CPU core; prepare to add support for orig...GravatarGravatar AJR2020-06-194-1546/+2953
* tlcs900: Misc. fixups (nw)GravatarGravatar AJR2020-06-183-0/+6
* tmp95c061, tmp95c063: Break up the register blocks (nw)GravatarGravatar AJR2020-06-186-952/+2232
* tlcs900: Split derived types into separate files; no need for separate 8-bit ...GravatarGravatar AJR2020-06-186-2327/+2359
* finally retired the READ8/16/32/64 and WRITE8/16/32/64 macros (nw)GravatarGravatar Ivan Vangelista2020-06-18113-1070/+1070
* drcbex64: use asmjitGravatarGravatar Patrick Mackinlay2020-06-182-2682/+1713
* vt50: Fix disassembly of L40M (stands in for B2M, not M2X)GravatarGravatar AJR2020-06-171-1/+1
* finished removing read* and write* macros from the mame part of the tree. the...GravatarGravatar Ivan Vangelista2020-06-168-30/+30
* e132xs.cpp, sharc.cpp: fixed DRC crashes in devnoclear debug builds (nw)GravatarGravatar Ivan Vangelista2020-06-142-0/+24
* h8s2000: Allow ANDC, ORC and XORC operations on EXR; correct disassembly for ...GravatarGravatar AJR2020-06-143-4/+22
* m68hc05: Simplify handler signatures; add MC68HC705C4A type (nw)GravatarGravatar AJR2020-06-132-41/+169
* t11: Change default interrupt vector (nw)GravatarGravatar AJR2020-06-121-1/+1
* pic1670: Add a disassembler [O. Galibert]GravatarGravatar Olivier Galibert2020-06-112-0/+137
* Hyperscan updates: [Sandro Ronco]GravatarGravatar Sandro Ronco2020-06-111-13/+30
* Add DS80C320, SAB80(C)515 and RUPI-44 disassemblersGravatarGravatar AJR2020-06-114-0/+404