| Commit message (Expand) | Author | Age | Files | Lines |
| * | -sega/model2.cpp, sega/model2_v.cpp: Various improvements: (#14592) |  Matthew Daniels | 2025-12-02 | 1 | -0/+2 |
| * | cpu/i960.cpp: fix typo in ROUNDRL instruction (#14299) |  Matthew Daniels | 2025-10-08 | 1 | -1/+1 |
| * | cpu/i960: Split check_irqs() into two separate functions; fixes MT08347 (#14266) |  Matthew Daniels | 2025-10-05 | 2 | -54/+56 |
| * | cpu/i960: logr and logrl use base 2; always use correct rounding mode (#14215) |  Matthew Daniels | 2025-09-26 | 2 | -25/+32 |
| * | cpu/i960: Only trigger interrupts if the input changes to the asserted state.... |  Matthew Daniels | 2025-09-22 | 2 | -46/+56 |
| * | srcclean |  Vas Crabb | 2025-06-25 | 1 | -1/+1 |
| * | i960: Make shli produce identical value to shlo because later models where th... |  AJR | 2025-06-14 | 2 | -8/+33 |
| * | cpu/i960: Reduce padding area size when servicing interrupt (#13667) |  Matthew Daniels | 2025-05-04 | 1 | -1/+1 |
| * | i960: Further disassembly fixes |  AJR | 2025-03-25 | 1 | -3/+3 |
| * | i960: Fix disassembly of ADD<cc>, SUB<cc> & SEL<cc> for cc = l, ne, le, o |  AJR | 2025-03-24 | 1 | -1/+1 |
| * | Revert "i960: don't preserve sign bit when shifting integer left (#13507)" |  AJR | 2025-03-21 | 1 | -1/+1 |
| * | i960: don't preserve sign bit when shifting integer left (#13507) |  Matthew Daniels | 2025-03-21 | 1 | -1/+1 |
| * | i960: fix regression with emul opcode |  hap | 2024-12-19 | 1 | -1/+1 |
| * | cpu/i960, cpu/sharc, cpu/sparc, cpu/v60: Use 32x32=64-bit multiply inlines |  AJR | 2024-11-10 | 1 | -1/+1 |
| * | Added ATTR_COLD to common lifecycle methods for many files in src/devices. (#... |  holub | 2024-09-27 | 1 | -2/+2 |
| * | diexec: remove vestigal execute_input_lines() |  hap | 2024-09-18 | 1 | -1/+0 |
| * | cpu/i960: Corrected disassembly of dcinva instruction. (#11378) |  Joshua Scoggins | 2023-06-29 | 1 | -2/+2 |
| * | i960: Shift opcode fixes |  AJR | 2023-04-22 | 1 | -5/+10 |
| * | Interrupt callback rationalization |  AJR | 2023-03-11 | 1 | -1/+1 |
| * | dsp56156, i960, scudsp: Simplify some bits of code using util::sext |  AJR | 2022-11-20 | 1 | -10/+2 |
| * | coretmpl.h: Add utility function for sign-extending values of arbitrary width |  AJR | 2022-11-01 | 1 | -2/+2 |
| * | cpu/i960, cpu/sh: Use rotl_32 and rotr_32 for executing rotate instructions |  AJR | 2022-10-29 | 1 | -1/+1 |
| * | src/devices/cpu: Remove #include "debugger.h" where no longer necessary |  AJR | 2022-04-06 | 1 | -1/+0 |
| * | Debugger feature improvements |  AJR | 2022-03-27 | 1 | -0/+2 |
| * | srcclean and manual tidying up in preparation for 0.242 release |  Vas Crabb | 2022-03-27 | 1 | -6/+6 |
| * | cpu/i960: Added cycle count adjustment for dmovt instruction. (#9378) |  Damian Rogers | 2022-03-10 | 1 | -0/+1 |
| * | Added dmovt opcode to i960 cpu (#9341) |  Damian Rogers | 2022-03-04 | 1 | -0/+16 |
| * | Fun with flags: Allows handlers to have user-defined flags set on |  Olivier Galibert | 2021-11-28 | 2 | -31/+45 |
| * | -bus/coco/coco_ram.cpp: fix a rather obvious bug in shift/mask |  Vas Crabb | 2020-06-25 | 1 | -1/+1 |
| * | cpu/i960: Log unimplemented IACs |  Vas Crabb | 2020-06-25 | 1 | -2/+7 |
| * | srcclean and cleanup (nw) |  Vas Crabb | 2020-06-21 | 1 | -3/+3 |
| * | emumem: A little more speedup. cache and specific change syntax, and are not... |  Olivier Galibert | 2020-05-25 | 2 | -67/+67 |
| * | Add partial support for all IAC messages |  Damian Rogers | 2020-05-06 | 1 | -0/+21 |
| * | i960dasm: rewrote disassembler [SailorSat] |  Ariane Fugmann | 2020-05-04 | 2 | -266/+494 |
| * | i960dasm: add missing opcodes [SailorSat] |  Ariane Fugmann | 2020-04-29 | 2 | -20/+78 |
| * | fix #6207 (nw) |  MetalliC | 2020-01-23 | 1 | -3/+3 |
| * | use C++ library includes (nw) |  firewave | 2020-01-22 | 1 | -1/+1 |
| * | i960.h: fixed my oversight (nw) |  Ivan Vangelista | 2019-11-29 | 1 | -2/+2 |
| * | updated my recent commits to initialize bools with false instead of 0, as sug... |  Ivan Vangelista | 2019-11-28 | 2 | -3/+3 |
| * | i960.cpp: initialized some stuff (nw) |  Ivan Vangelista | 2019-11-26 | 2 | -5/+11 |
| * | Make many device_execute_interface functions noexcept, including the "informa... |  AJR | 2019-11-09 | 1 | -3/+3 |
| * | i960: implement logr and expr opcodes (for Model2 Power Sled) |  MetalliC | 2019-04-29 | 1 | -0/+12 |
| * | diexec: Interrupt API changes (nw) |  AJR | 2018-05-18 | 1 | -1/+0 |
| * | emumem: Rename direct_read_handler to memory_access_cache. Parametrize the t... |  Olivier Galibert | 2018-05-11 | 2 | -9/+9 |
| * | i960: Don't lose register values on read stalling [O. Galibert] |  Olivier Galibert | 2018-04-05 | 1 | -13/+31 |
| * | Reshuffle some stuff: |  Vas Crabb | 2018-03-28 | 1 | -2/+2 |
| * | don't pass so many naked pointers around (nw) |  Vas Crabb | 2018-03-25 | 2 | -3/+3 |
| * | Wrote a preliminary TGPx4 interpreter core [Angelo Salese] |  angelosa | 2018-03-20 | 2 | -7/+27 |
| * | Blind faith fixed long names for almost all CPUs (nw) |  angelosa | 2018-03-15 | 1 | -1/+1 |
| * | srcclean (nw) |  Vas Crabb | 2018-02-25 | 2 | -9/+9 |