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author Vas Crabb <vas@vastheman.com>2024-03-24 03:01:24 +1100
committer Vas Crabb <vas@vastheman.com>2024-03-24 03:01:24 +1100
commitc225071d50a2b2bbdc9b70f78af34f186181d6db (patch)
treeab3ed5cdf816f9d2a9af1da961cbb7768e76a734 /src
parent26ba3b1af9e37ac7766bdbb806efe4743bfd9cbe (diff)
srcclean and fix indentation in preparation for MAME 0.264 branch.
Diffstat (limited to 'src')
-rw-r--r--src/devices/bus/ata/xm3301.cpp4
-rw-r--r--src/devices/bus/pci/clgd5446.cpp4
-rw-r--r--src/devices/bus/pci/pci_slot.cpp2
-rw-r--r--src/devices/bus/pci/pdc20262.cpp2
-rw-r--r--src/devices/bus/pci/sis6326.cpp4
-rw-r--r--src/devices/bus/pci/vision.cpp26
-rw-r--r--src/devices/bus/vcs_ctrl/cx85.cpp2
-rw-r--r--src/devices/cpu/h8/h83217.cpp2
-rw-r--r--src/devices/cpu/sh/sh7042.cpp2
-rw-r--r--src/devices/cpu/sh/sh7042.h2
-rw-r--r--src/devices/cpu/sh/sh_cmt.h2
-rw-r--r--src/devices/cpu/sh/sh_intc.cpp4
-rw-r--r--src/devices/cpu/sh/sh_port.cpp2
-rw-r--r--src/devices/machine/i82371sb.cpp12
-rw-r--r--src/devices/machine/mediagx_cs5530_video.cpp2
-rw-r--r--src/devices/machine/mediagx_host.cpp68
-rw-r--r--src/devices/machine/spi_sdcard.cpp2
-rw-r--r--src/devices/machine/w83787f.cpp38
-rw-r--r--src/devices/machine/w83787f.h4
-rw-r--r--src/devices/sound/swx00.cpp8
-rw-r--r--src/devices/sound/swx00.h2
-rw-r--r--src/devices/video/pc_vga_cirrus.cpp2
-rw-r--r--src/devices/video/pc_vga_matrox.cpp2
-rw-r--r--src/devices/video/pc_vga_mediagx.h2
-rw-r--r--src/devices/video/pc_vga_sis.h4
-rw-r--r--src/mame/capcom/vulgus.cpp2
-rw-r--r--src/mame/cave/fstgfish.cpp2
-rw-r--r--src/mame/funworld/photoply.cpp24
-rw-r--r--src/mame/igt/gkigt.cpp4
-rw-r--r--src/mame/misc/odyssey.cpp2
-rw-r--r--src/mame/pacman/pacman.cpp6
-rw-r--r--src/mame/pc/calchase.cpp2
-rw-r--r--src/mame/pc/pcipc_sis.cpp4
-rw-r--r--src/mame/rm/rm380z_m.cpp4
-rw-r--r--src/mame/rm/rm380z_v.cpp4
-rw-r--r--src/mame/skeleton/sterz80.cpp2
-rw-r--r--src/mame/taito/taito_h.cpp14
-rw-r--r--src/mame/tvgames/xavix.cpp2
-rw-r--r--src/mame/yamaha/mks3.cpp340
-rw-r--r--src/mame/yamaha/ympsr2000.cpp2
40 files changed, 309 insertions, 309 deletions
diff --git a/src/devices/bus/ata/xm3301.cpp b/src/devices/bus/ata/xm3301.cpp
index a03579a6407..dabcac41d9e 100644
--- a/src/devices/bus/ata/xm3301.cpp
+++ b/src/devices/bus/ata/xm3301.cpp
@@ -30,8 +30,8 @@ void toshiba_xm3301_device::device_start()
// [3605] as Rev number
// Both TAISATAP.SYS and CD_BALLY.SYS tests against one of these strings:
// "TOSHIBA CD-ROM"
- // "TOSHIBA CD-ROM XM-3301"
- // "TOSHIBA CD-ROM DRIVE:XM"
+ // "TOSHIBA CD-ROM XM-3301"
+ // "TOSHIBA CD-ROM DRIVE:XM"
// "TOSHIBA DVD" (CD_BALLY.SYS only)
t10mmc::set_model("TOSHIBA CD-ROM XM-5401TA3605");
diff --git a/src/devices/bus/pci/clgd5446.cpp b/src/devices/bus/pci/clgd5446.cpp
index feba8765dc8..39d26fd94c1 100644
--- a/src/devices/bus/pci/clgd5446.cpp
+++ b/src/devices/bus/pci/clgd5446.cpp
@@ -40,11 +40,11 @@ ROM_START( gd5446 )
ROM_REGION32_LE( 0x8000, "vga_rom", ROMREGION_ERASEFF )
ROM_SYSTEM_BIOS( 0, "quadtel", "Quadtel CL-GD5446 1.31" )
ROMX_LOAD( "cl-gd5446_pci_vga_bios_version_1.31.u2", 0x0000, 0x8000, CRC(61f8cac7) SHA1(6e54aadfe10dfa5c7e417a054e9a64499a99083c), ROM_BIOS(0) )
- // Chip:CL-GD5446-HC-A - ROM: CL-GD5436/46 PCI VGA BIOS Version 1.25 - RAM: 1MB, 2MB, 4MB -
+ // Chip:CL-GD5446-HC-A - ROM: CL-GD5436/46 PCI VGA BIOS Version 1.25 - RAM: 1MB, 2MB, 4MB -
// OSC: 14.31818MHz - Connector: DB15 - VESA feature connector
ROM_SYSTEM_BIOS( 1, "quadtelo", "Quadtel CL-GD5446 1.25" )
ROMX_LOAD("cl-gd5446_pci_vga_bios_version_1.25.u2", 0x0000, 0x8000, CRC(7a859659) SHA1(ff667218261969c48082ec12aa91088a01b0cb2a), ROM_BIOS(1) )
-// ROMX_LOAD("5446bv.vbi", 0x00000, 0x10000, CRC(7a859659) SHA1(ff667218261969c48082ec12aa91088a01b0cb2a) )
+// ROMX_LOAD("5446bv.vbi", 0x00000, 0x10000, CRC(7a859659) SHA1(ff667218261969c48082ec12aa91088a01b0cb2a) )
ROM_END
const tiny_rom_entry *cirrus_gd5446_pci_device::device_rom_region() const
diff --git a/src/devices/bus/pci/pci_slot.cpp b/src/devices/bus/pci/pci_slot.cpp
index 1d26111ce71..1a7ef5b760f 100644
--- a/src/devices/bus/pci/pci_slot.cpp
+++ b/src/devices/bus/pci/pci_slot.cpp
@@ -109,7 +109,7 @@ void pci_card_device::irq_pin_w(offs_t line, int state)
void pci_cards(device_slot_interface &device)
{
// 0x00 - backward compatible pre-class code
-// device.option_add("voodoo1", VOODOO_1_PCI);
+// device.option_add("voodoo1", VOODOO_1_PCI);
device.option_add("vision864", VISION864_PCI);
device.option_add("vision964", VISION964_PCI);
diff --git a/src/devices/bus/pci/pdc20262.cpp b/src/devices/bus/pci/pdc20262.cpp
index 022f1f2fc9c..f2655815a74 100644
--- a/src/devices/bus/pci/pdc20262.cpp
+++ b/src/devices/bus/pci/pdc20262.cpp
@@ -160,7 +160,7 @@ void pdc20262_device::bus_master_ide_control_map(address_map &map)
void pdc20262_device::extra_map(address_map &map)
{
// TODO: should be memory mapped versions of above, *nix driver seems to use this
-// map(0x00, 0x07).m(*this, FUNC(pdc20262_device::ide1_command_map)));
+// map(0x00, 0x07).m(*this, FUNC(pdc20262_device::ide1_command_map)));
// ...
}
diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp
index 825a789b8cc..d08001ac4a7 100644
--- a/src/devices/bus/pci/sis6326.cpp
+++ b/src/devices/bus/pci/sis6326.cpp
@@ -52,8 +52,8 @@ ROM_START( sis6326agp )
ROMX_LOAD( "sis6326agp.bin", 0x000000, 0x010000, CRC(a671255c) SHA1(332ab9499142e8f7a235afe046e8e8d21a28580d), ROM_BIOS(3) )
// basically identical to siso
-// ROM_SYSTEM_BIOS( 3, "sisvbi", "SiS6326 4MB PCI 1.21d" )
-// ROMX_LOAD( "4mb_pci.vbi", 0x000000, 0x00c000, CRC(8fca47be) SHA1(7ce995ec0d8b9ac4f0f40ccd0a61d7fc209d313f), ROM_BIOS(3) )
+// ROM_SYSTEM_BIOS( 3, "sisvbi", "SiS6326 4MB PCI 1.21d" )
+// ROMX_LOAD( "4mb_pci.vbi", 0x000000, 0x00c000, CRC(8fca47be) SHA1(7ce995ec0d8b9ac4f0f40ccd0a61d7fc209d313f), ROM_BIOS(3) )
ROM_END
const tiny_rom_entry *sis6326_agp_device::device_rom_region() const
diff --git a/src/devices/bus/pci/vision.cpp b/src/devices/bus/pci/vision.cpp
index ed6ab003613..ab21fecfa68 100644
--- a/src/devices/bus/pci/vision.cpp
+++ b/src/devices/bus/pci/vision.cpp
@@ -232,7 +232,7 @@ void vision968_pci_device::device_start()
{
pci_card_device::device_start();
-// add_map(64 * 1024 * 1024, M_MEM | M_DISABLED, FUNC(vision968_pci_device::lfb_map));
+// add_map(64 * 1024 * 1024, M_MEM | M_DISABLED, FUNC(vision968_pci_device::lfb_map));
add_map(64 * 1024 * 1024, M_MEM, FUNC(vision968_pci_device::lfb_map));
set_map_address(0, 0x70000000);
@@ -259,20 +259,20 @@ void vision968_pci_device::device_reset()
void vision968_pci_device::lfb_map(address_map &map)
{
map(0x0000'0000, 0x00ff'ffff).rw(m_vga, FUNC(s3vision864_vga_device::mem_linear_r), FUNC(s3vision864_vga_device::mem_linear_w));
-// map(0x0100'0000, 0x0100'7fff) image transfer data
+// map(0x0100'0000, 0x0100'7fff) image transfer data
map(0x0100'8000, 0x0100'803f).m(FUNC(vision968_pci_device::config_map));
-// map(0x0100'8100, 0x0100'816f) packed copro regs
-// map(0x0100'82e8, 0x0100'82e8) current ypos
-// map(0x0100'82ea, 0x0100'82ea) current ypos-2
+// map(0x0100'8100, 0x0100'816f) packed copro regs
+// map(0x0100'82e8, 0x0100'82e8) current ypos
+// map(0x0100'82ea, 0x0100'82ea) current ypos-2
map(0x0100'83b0, 0x0100'83df).m(m_vga, FUNC(s3vision968_vga_device::io_map));
-// map(0x0100'8502, 0x0100'8502) (VGA $0102 alias)
-// map(0x0100'8504, 0x0100'8504) (VGA $42e8 alias)
-// map(0x0100'8508, 0x0100'8508) (VGA $46e8 alias)
-// map(0x0100'850c, 0x0100'850c) (VGA $4ae8 alias)
-// map(0x0100'86e8, 0x0100'8eea) PnP copro region
-// map(0x0101'0000, 0x0101'3fff) Pixel formatter data transfer
-// map(0x0101'4000, 0x0101'7fff) Pixel formatter Mask data
-// map(0x0101'8080, 0x0101'809f) Pixel formatter regs
+// map(0x0100'8502, 0x0100'8502) (VGA $0102 alias)
+// map(0x0100'8504, 0x0100'8504) (VGA $42e8 alias)
+// map(0x0100'8508, 0x0100'8508) (VGA $46e8 alias)
+// map(0x0100'850c, 0x0100'850c) (VGA $4ae8 alias)
+// map(0x0100'86e8, 0x0100'8eea) PnP copro region
+// map(0x0101'0000, 0x0101'3fff) Pixel formatter data transfer
+// map(0x0101'4000, 0x0101'7fff) Pixel formatter Mask data
+// map(0x0101'8080, 0x0101'809f) Pixel formatter regs
}
void vision968_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
diff --git a/src/devices/bus/vcs_ctrl/cx85.cpp b/src/devices/bus/vcs_ctrl/cx85.cpp
index d2a77d8af67..f4543e6cd34 100644
--- a/src/devices/bus/vcs_ctrl/cx85.cpp
+++ b/src/devices/bus/vcs_ctrl/cx85.cpp
@@ -22,7 +22,7 @@ DEFINE_DEVICE_TYPE(ATARI_CX85, atari_cx85_device, "atari_cx85", "Atari CX85 Nume
//**************************************************************************
-// INPUT PORTS
+// INPUT PORTS
//**************************************************************************
static INPUT_PORTS_START(atari_cx85)
diff --git a/src/devices/cpu/h8/h83217.cpp b/src/devices/cpu/h8/h83217.cpp
index a26a0282ef4..76eb07fff8f 100644
--- a/src/devices/cpu/h8/h83217.cpp
+++ b/src/devices/cpu/h8/h83217.cpp
@@ -14,7 +14,7 @@
- keyboard matrix interrupt
- TCONR @ 0xff9f (timer connection)
- SEDGR @ 0xffa8 (edge sense)
- - WSCR @ 0xffc2 (waitstate control)
+ - WSCR @ 0xffc2 (waitstate control)
- finish STCR emulation
- finish SYSCR emulation
diff --git a/src/devices/cpu/sh/sh7042.cpp b/src/devices/cpu/sh/sh7042.cpp
index dc2659b7a7e..66eb8dc10b8 100644
--- a/src/devices/cpu/sh/sh7042.cpp
+++ b/src/devices/cpu/sh/sh7042.cpp
@@ -174,7 +174,7 @@ void sh7042_device::do_sci_w(int sci, int state)
void sh7042_device::internal_update()
{
- internal_update(current_cycles());
+ internal_update(current_cycles());
}
void sh7042_device::add_event(u64 &event_time, u64 new_event)
diff --git a/src/devices/cpu/sh/sh7042.h b/src/devices/cpu/sh/sh7042.h
index ac1ee769180..9daa7ac03ab 100644
--- a/src/devices/cpu/sh/sh7042.h
+++ b/src/devices/cpu/sh/sh7042.h
@@ -113,7 +113,7 @@ private:
void recompute_timer(u64 event_time);
TIMER_CALLBACK_MEMBER(event_timer_tick);
void internal_update(u64 current_time);
-
+
void do_sci_w(int sci, int state);
u16 pcf_ah_r();
diff --git a/src/devices/cpu/sh/sh_cmt.h b/src/devices/cpu/sh/sh_cmt.h
index e365be37fb1..0407f71c06e 100644
--- a/src/devices/cpu/sh/sh_cmt.h
+++ b/src/devices/cpu/sh/sh_cmt.h
@@ -63,7 +63,7 @@ protected:
void csr_w(int reg, u16 data, u16 mem_mask);
void cnt_w(int reg, u16 data, u16 mem_mask);
- void cor_w(int reg, u16 data, u16 mem_mask);
+ void cor_w(int reg, u16 data, u16 mem_mask);
void clock_start(int clk);
void compute_next_event(int clk);
diff --git a/src/devices/cpu/sh/sh_intc.cpp b/src/devices/cpu/sh/sh_intc.cpp
index 34bb91dfe86..21f7804efd8 100644
--- a/src/devices/cpu/sh/sh_intc.cpp
+++ b/src/devices/cpu/sh/sh_intc.cpp
@@ -31,7 +31,7 @@ const u8 sh_intc_device::pribit[0x100] = {
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
- 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
+ 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
};
sh_intc_device::sh_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
@@ -65,7 +65,7 @@ void sh_intc_device::internal_interrupt(int vector)
u32 slot = pribit[vector];
u32 shift = 12-4*(slot & 3);
u32 level = (m_ipr[slot >> 2] >> shift) & 15;
- logerror("Internal interrupt %d / %d (ipr%c %d-%d)\n", vector, level, 'a' + (slot >> 2), shift + 3, shift);
+ logerror("Internal interrupt %d / %d (ipr%c %d-%d)\n", vector, level, 'a' + (slot >> 2), shift + 3, shift);
m_cpu->set_internal_interrupt(level, vector);
}
diff --git a/src/devices/cpu/sh/sh_port.cpp b/src/devices/cpu/sh/sh_port.cpp
index ddd93a1a4e2..2cf5735826b 100644
--- a/src/devices/cpu/sh/sh_port.cpp
+++ b/src/devices/cpu/sh/sh_port.cpp
@@ -104,6 +104,6 @@ void sh_port32_device::io_w(offs_t, u32 data, u32 mem_mask)
COMBINE_DATA(&m_io);
m_io &= ~m_mask;
if(m_io)
- m_cpu->do_write_port32(m_index, m_dr & m_io, m_io);
+ m_cpu->do_write_port32(m_index, m_dr & m_io, m_io);
}
diff --git a/src/devices/machine/i82371sb.cpp b/src/devices/machine/i82371sb.cpp
index ee53bc493ff..d93c3361cba 100644
--- a/src/devices/machine/i82371sb.cpp
+++ b/src/devices/machine/i82371sb.cpp
@@ -36,20 +36,20 @@ void i82371sb_isa_device::internal_io_map(address_map &map)
{
map(0x0000, 0x001f).rw("dma8237_1", FUNC(am9517a_device::read), FUNC(am9517a_device::write));
map(0x0020, 0x0021).rw("pic8259_master", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
-// map(0x002e, 0x002f) Super I/O config
+// map(0x002e, 0x002f) Super I/O config
map(0x0040, 0x005f).rw("pit8254", FUNC(pit8254_device::read), FUNC(pit8254_device::write));
map(0x0061, 0x0061).rw(FUNC(i82371sb_isa_device::at_portb_r), FUNC(i82371sb_isa_device::at_portb_w));
-// map(0x0070, 0x0070) RTC address, bit 7 NMI enable
-// map(0x0071, 0x0071) RTC data
-// map(0x0078, 0x0079) Board Configuration
+// map(0x0070, 0x0070) RTC address, bit 7 NMI enable
+// map(0x0071, 0x0071) RTC data
+// map(0x0078, 0x0079) Board Configuration
map(0x0080, 0x009f).rw(FUNC(i82371sb_isa_device::at_page8_r), FUNC(i82371sb_isa_device::at_page8_w));
map(0x00a0, 0x00a1).rw("pic8259_slave", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
map(0x00b2, 0x00b3).rw(FUNC(i82371sb_isa_device::read_apmcapms), FUNC(i82371sb_isa_device::write_apmcapms));
// Up to $de according to TC430HX spec?
map(0x00c0, 0x00df).rw(FUNC(i82371sb_isa_device::at_dma8237_2_r), FUNC(i82371sb_isa_device::at_dma8237_2_w));
map(0x00e0, 0x00ef).noprw();
-// map(0x00f0, 0x00f0) Reset Numeric Error
-// map(0x0270, 0x0273) I/O read port for PnP
+// map(0x00f0, 0x00f0) Reset Numeric Error
+// map(0x0270, 0x0273) I/O read port for PnP
map(0x04d0, 0x04d1).rw(FUNC(i82371sb_isa_device::eisa_irq_read), FUNC(i82371sb_isa_device::eisa_irq_write));
map(0x0cf9, 0x0cf9).rw(FUNC(i82371sb_isa_device::reset_control_r), FUNC(i82371sb_isa_device::reset_control_w));
}
diff --git a/src/devices/machine/mediagx_cs5530_video.cpp b/src/devices/machine/mediagx_cs5530_video.cpp
index 5e57d18f9ab..1bd46285ed2 100644
--- a/src/devices/machine/mediagx_cs5530_video.cpp
+++ b/src/devices/machine/mediagx_cs5530_video.cpp
@@ -28,7 +28,7 @@ mediagx_cs5530_video_device::mediagx_cs5530_video_device(const machine_config &m
void mediagx_cs5530_video_device::config_map(address_map &map)
{
pci_device::config_map(map);
-// map(0x14, 0xff).unmaprw(); // <reserved>
+// map(0x14, 0xff).unmaprw(); // <reserved>
}
void mediagx_cs5530_video_device::io_map(address_map &map)
diff --git a/src/devices/machine/mediagx_host.cpp b/src/devices/machine/mediagx_host.cpp
index be781ecec06..a3da478af96 100644
--- a/src/devices/machine/mediagx_host.cpp
+++ b/src/devices/machine/mediagx_host.cpp
@@ -307,12 +307,12 @@ void mediagx_host_device::gxbase_map(address_map &map)
// GX_BASE+$8100
void mediagx_host_device::gfx_pipeline_map(address_map &map)
{
-// map(0x0000, 0x012f) <GP BitBLT section>
-// map(0x0140, 0x0143) GP_VGA_WRITE
-// map(0x0144, 0x0147) GP_VGA_READ
-// map(0x0200, 0x020f) <more GP BitBLT>
-// map(0x0210, 0x0213) GGP_VGA_BASE (sic?)
-// map(0x0214, 0x0217) GP_VGA_LATCH
+// map(0x0000, 0x012f) <GP BitBLT section>
+// map(0x0140, 0x0143) GP_VGA_WRITE
+// map(0x0144, 0x0147) GP_VGA_READ
+// map(0x0200, 0x020f) <more GP BitBLT>
+// map(0x0210, 0x0213) GGP_VGA_BASE (sic?)
+// map(0x0214, 0x0217) GP_VGA_LATCH
}
/****************************
@@ -324,34 +324,34 @@ void mediagx_host_device::gfx_pipeline_map(address_map &map)
// GX_BASE+$8300
void mediagx_host_device::display_ctrl_map(address_map &map)
{
-// map(0x0000, 0x0003) DC_UNLOCK
-// map(0x0004, 0x0007) DC_GENERAL_CFG
-// map(0x0008, 0x000b) DC_TIMING_CFG
-// map(0x000c, 0x000f) DC_OUTPUT_CFG
-// map(0x0010, 0x0013) DC_FB_ST_OFFSET
-// map(0x0014, 0x0017) DC_CB_ST_OFFSET
-// map(0x0018, 0x001b) DC_CURS_ST_OFFSET
-// map(0x0020, 0x0023) DC_VID_ST_OFFSET
-// map(0x0024, 0x0027) DC_LINE_DELTA
-// map(0x0028, 0x002b) DC_BUF_SIZE
-// map(0x0030, 0x0033) DC_H_TIMING_1
-// map(0x0033, 0x0037) DC_H_TIMING_2
-// map(0x0038, 0x003b) DC_H_TIMING_3
-// map(0x003c, 0x003f) DC_FP_H_TIMING
-// map(0x0040, 0x0043) DC_V_TIMING_1
-// map(0x0044, 0x0047) DC_V_TIMING_2
-// map(0x0048, 0x004b) DC_V_TIMING_3
-// map(0x004c, 0x004f) DC_FP_V_TIMING
-// map(0x0050, 0x0053) DC_CURSOR_X
-// map(0x0054, 0x0057) DC_V_LINE_CNT
-// map(0x0058, 0x005b) DC_CURSOR_Y
-// map(0x005c, 0x005f) DC_SS_LINE_CMP
-// map(0x0060, 0x0063) DC_CURSOR_COLOR
-// map(0x0068, 0x006b) DC_BORDER_COLOR
-// map(0x0070, 0x0073) DC_PAL_ADDRESS
-// map(0x0074, 0x0077) DC_PAL_DATA
-// map(0x0078, 0x007b) DC_DFIFO_DIAG
-// map(0x007c, 0x007f) DC_CFIFO_DIAG
+// map(0x0000, 0x0003) DC_UNLOCK
+// map(0x0004, 0x0007) DC_GENERAL_CFG
+// map(0x0008, 0x000b) DC_TIMING_CFG
+// map(0x000c, 0x000f) DC_OUTPUT_CFG
+// map(0x0010, 0x0013) DC_FB_ST_OFFSET
+// map(0x0014, 0x0017) DC_CB_ST_OFFSET
+// map(0x0018, 0x001b) DC_CURS_ST_OFFSET
+// map(0x0020, 0x0023) DC_VID_ST_OFFSET
+// map(0x0024, 0x0027) DC_LINE_DELTA
+// map(0x0028, 0x002b) DC_BUF_SIZE
+// map(0x0030, 0x0033) DC_H_TIMING_1
+// map(0x0033, 0x0037) DC_H_TIMING_2
+// map(0x0038, 0x003b) DC_H_TIMING_3
+// map(0x003c, 0x003f) DC_FP_H_TIMING
+// map(0x0040, 0x0043) DC_V_TIMING_1
+// map(0x0044, 0x0047) DC_V_TIMING_2
+// map(0x0048, 0x004b) DC_V_TIMING_3
+// map(0x004c, 0x004f) DC_FP_V_TIMING
+// map(0x0050, 0x0053) DC_CURSOR_X
+// map(0x0054, 0x0057) DC_V_LINE_CNT
+// map(0x0058, 0x005b) DC_CURSOR_Y
+// map(0x005c, 0x005f) DC_SS_LINE_CMP
+// map(0x0060, 0x0063) DC_CURSOR_COLOR
+// map(0x0068, 0x006b) DC_BORDER_COLOR
+// map(0x0070, 0x0073) DC_PAL_ADDRESS
+// map(0x0074, 0x0077) DC_PAL_DATA
+// map(0x0078, 0x007b) DC_DFIFO_DIAG
+// map(0x007c, 0x007f) DC_CFIFO_DIAG
}
void mediagx_host_device::legacy_memory_map(address_map &map)
diff --git a/src/devices/machine/spi_sdcard.cpp b/src/devices/machine/spi_sdcard.cpp
index 5ceb121108c..4db4fc2c8f9 100644
--- a/src/devices/machine/spi_sdcard.cpp
+++ b/src/devices/machine/spi_sdcard.cpp
@@ -291,7 +291,7 @@ void spi_sdcard_device::do_command()
/*
else // SD_TYPE_HC: CSD Version 2.0
{
- m_data[3] = 0x40;
+ m_data[3] = 0x40;
}
*/
diff --git a/src/devices/machine/w83787f.cpp b/src/devices/machine/w83787f.cpp
index 03ea4d93544..994ef2af8e4 100644
--- a/src/devices/machine/w83787f.cpp
+++ b/src/devices/machine/w83787f.cpp
@@ -148,7 +148,7 @@ void w83787f_device::write(offs_t offset, u8 data)
// none of these regs have a real naming, they are all CR*
void w83787f_device::config_map(address_map &map)
{
-// map(0x00, 0x00) IDE & FDC
+// map(0x00, 0x00) IDE & FDC
map(0x01, 0x01).lrw8(
NAME([this] (offs_t offset) {
return m_cr1;
@@ -158,24 +158,24 @@ void w83787f_device::config_map(address_map &map)
remap(AS_IO, 0, 0x400);
})
);
-// map(0x02, 0x02) extension adapter mode
-// map(0x03, 0x03) game port, UART clocks
-// map(0x04, 0x04) game port, UARTA/B power-down tristate
-// map(0x05, 0x05) ECP FIFO threshold
-// map(0x06, 0x06) 2x / x4 FDD select, FDC power-down tristate, IDE power-down tristate
-// map(0x07, 0x07) FDDs type
-// map(0x08, 0x08) automatic power-down, FDD write protect
-// map(0x09, 0x09) CHIP ID, lock alias, operating mode
-// map(0x0a, 0x0a) LPT pins
-// map(0x0c, 0x0c) UARTA/B clock source, lock select
-// map(0x0d, 0x0d) IrDA select
-// map(0x0e, 0x0f) <reserved for test>
-// map(0x10, 0x10) GIO0 address select 7-0
-// map(0x11, 0x11) GIO0 address select 10-8, GI0 address MODE0-1
-// map(0x12, 0x12) GIO1 address select 7-0
-// map(0x13, 0x13) GIO1 address select 10-8, GI0 address MODE0-1
-// map(0x14, 0x14) GIO0 ddr/mode
-// map(0x15, 0x15) GIO1 ddr/mode
+// map(0x02, 0x02) extension adapter mode
+// map(0x03, 0x03) game port, UART clocks
+// map(0x04, 0x04) game port, UARTA/B power-down tristate
+// map(0x05, 0x05) ECP FIFO threshold
+// map(0x06, 0x06) 2x / x4 FDD select, FDC power-down tristate, IDE power-down tristate
+// map(0x07, 0x07) FDDs type
+// map(0x08, 0x08) automatic power-down, FDD write protect
+// map(0x09, 0x09) CHIP ID, lock alias, operating mode
+// map(0x0a, 0x0a) LPT pins
+// map(0x0c, 0x0c) UARTA/B clock source, lock select
+// map(0x0d, 0x0d) IrDA select
+// map(0x0e, 0x0f) <reserved for test>
+// map(0x10, 0x10) GIO0 address select 7-0
+// map(0x11, 0x11) GIO0 address select 10-8, GI0 address MODE0-1
+// map(0x12, 0x12) GIO1 address select 7-0
+// map(0x13, 0x13) GIO1 address select 10-8, GI0 address MODE0-1
+// map(0x14, 0x14) GIO0 ddr/mode
+// map(0x15, 0x15) GIO1 ddr/mode
}
/*
diff --git a/src/devices/machine/w83787f.h b/src/devices/machine/w83787f.h
index 3fa9e6e4b8c..ed0123153a2 100644
--- a/src/devices/machine/w83787f.h
+++ b/src/devices/machine/w83787f.h
@@ -20,8 +20,8 @@ public:
void remap(int space_id, offs_t start, offs_t end) override;
-// auto gp20_reset() { return m_gp20_reset_callback.bind(); }
-// auto gp25_gatea20() { return m_gp25_gatea20_callback.bind(); }
+// auto gp20_reset() { return m_gp20_reset_callback.bind(); }
+// auto gp25_gatea20() { return m_gp25_gatea20_callback.bind(); }
auto irq1() { return m_irq1_callback.bind(); }
auto irq8() { return m_irq8_callback.bind(); }
auto irq9() { return m_irq9_callback.bind(); }
diff --git a/src/devices/sound/swx00.cpp b/src/devices/sound/swx00.cpp
index fffd27caf6f..52fb67402d2 100644
--- a/src/devices/sound/swx00.cpp
+++ b/src/devices/sound/swx00.cpp
@@ -85,7 +85,7 @@ void swx00_sound_device::map(address_map &map)
map(0x180, 0x1ff).w(FUNC(swx00_sound_device::dsp_offl_w));
map(0x200, 0x31f).w(FUNC(swx00_sound_device::dsp_vall_w)); // 06-0b
-
+
rchan(map, 0x13).rw(FUNC(swx00_sound_device::glo_pan_r), FUNC(swx00_sound_device::glo_pan_w));
rchan(map, 0x14).rw(FUNC(swx00_sound_device::attack_r), FUNC(swx00_sound_device::attack_w));
rchan(map, 0x15).rw(FUNC(swx00_sound_device::release_r), FUNC(swx00_sound_device::release_w));
@@ -121,7 +121,7 @@ void swx00_sound_device::snd_w(offs_t offset, u16 data, u16 mem_mask)
void swx00_sound_device::rom_read_adrh_w(offs_t, u16 data, u16 mem_mask)
{
- m_rom_address = (m_rom_address & ~(mem_mask << 16)) | ((data & mem_mask) << 16);
+ m_rom_address = (m_rom_address & ~(mem_mask << 16)) | ((data & mem_mask) << 16);
}
void swx00_sound_device::rom_read_adrl_w(offs_t, u16 data, u16 mem_mask)
@@ -292,7 +292,7 @@ void swx00_sound_device::dsp_valh_w(u8 data)
void swx00_sound_device::dsp_vall_w(offs_t reg, u8 data)
{
m_dsp_values[reg] = ((m_dsp_valh << 8) | data) & 0x3ff;
- // logerror("dsp value[%03x] = %03x\n", reg, m_dsp_values[reg]);
+ // logerror("dsp value[%03x] = %03x\n", reg, m_dsp_values[reg]);
}
void swx00_sound_device::dsp_offh_w(u8 data)
@@ -304,7 +304,7 @@ void swx00_sound_device::dsp_offl_w(offs_t reg, u8 data)
{
if(reg & 1) {
m_dsp_offsets[reg >> 1] = (m_dsp_offh << 16) | (m_dsp_offsets[reg >> 1] & 0xff00) | data;
- // logerror("dsp offset[%02x] = %06x\n", reg >> 1, m_dsp_offsets[reg >> 1]);
+ // logerror("dsp offset[%02x] = %06x\n", reg >> 1, m_dsp_offsets[reg >> 1]);
} else
m_dsp_offsets[reg >> 1] = (m_dsp_offh << 16) | (data << 8) | (m_dsp_offsets[reg >> 1] & 0xff);
}
diff --git a/src/devices/sound/swx00.h b/src/devices/sound/swx00.h
index f981dbde26b..f530380c1bb 100644
--- a/src/devices/sound/swx00.h
+++ b/src/devices/sound/swx00.h
@@ -61,7 +61,7 @@ private:
u16 sample_address_h_r(offs_t chan);
u16 sample_address_l_r(offs_t chan);
void sample_address_h_w(offs_t chan, u16 data, u16 mem_mask);
- void sample_address_l_w(offs_t chan, u16 data, u16 mem_mask);
+ void sample_address_l_w(offs_t chan, u16 data, u16 mem_mask);
u16 sample_pitch_r(offs_t chan);
void sample_pitch_w(offs_t chan, u16 data, u16 mem_mask);
diff --git a/src/devices/video/pc_vga_cirrus.cpp b/src/devices/video/pc_vga_cirrus.cpp
index 345403f0b22..1d669e5d62a 100644
--- a/src/devices/video/pc_vga_cirrus.cpp
+++ b/src/devices/video/pc_vga_cirrus.cpp
@@ -220,7 +220,7 @@ void cirrus_gd5428_vga_device::crtc_map(address_map &map)
cirrus_define_video_mode();
})
);
-// map(0x25, 0x25) PSR Part Status (r/o, "factory testing and internal tracking only")
+// map(0x25, 0x25) PSR Part Status (r/o, "factory testing and internal tracking only")
map(0x27, 0x27).lr8(
NAME([this] (offs_t offset) {
LOGMASKED(LOG_REG, "CR27: Read ID\n");
diff --git a/src/devices/video/pc_vga_matrox.cpp b/src/devices/video/pc_vga_matrox.cpp
index 21340f76ec2..f9551f21935 100644
--- a/src/devices/video/pc_vga_matrox.cpp
+++ b/src/devices/video/pc_vga_matrox.cpp
@@ -679,7 +679,7 @@ uint32_t matrox_vga_device::latch_start_addr()
// Looks like it can latch per byte in SVGA modes, which contradicts what's in pc_vga
// drawing functions.
//if (m_mgamode)
- // return (vga.crtc.start_addr << 4);
+ // return (vga.crtc.start_addr << 4);
return vga.crtc.start_addr_latch;
}
diff --git a/src/devices/video/pc_vga_mediagx.h b/src/devices/video/pc_vga_mediagx.h
index 98542bd8fee..f4943f0375c 100644
--- a/src/devices/video/pc_vga_mediagx.h
+++ b/src/devices/video/pc_vga_mediagx.h
@@ -27,7 +27,7 @@ protected:
virtual void crtc_map(address_map &map) override;
-// virtual ioport_constructor device_input_ports() const override;
+// virtual ioport_constructor device_input_ports() const override;
private:
};
diff --git a/src/devices/video/pc_vga_sis.h b/src/devices/video/pc_vga_sis.h
index ea08d01a729..a7d8a590f56 100644
--- a/src/devices/video/pc_vga_sis.h
+++ b/src/devices/video/pc_vga_sis.h
@@ -52,8 +52,8 @@ public:
sis630_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
-// virtual void device_start() override;
-// virtual void device_reset() override;
+// virtual void device_start() override;
+// virtual void device_reset() override;
virtual void crtc_map(address_map &map) override;
virtual void sequencer_map(address_map &map) override;
diff --git a/src/mame/capcom/vulgus.cpp b/src/mame/capcom/vulgus.cpp
index e079fa3071a..62172a324a7 100644
--- a/src/mame/capcom/vulgus.cpp
+++ b/src/mame/capcom/vulgus.cpp
@@ -716,7 +716,7 @@ ROM_START( 1942iti )
ROM_REGION( 0x20000, "maincpu", ROMREGION_ERASEFF )
ROM_LOAD( "2764.n4", 0x00000, 0x2000, CRC(0720ef77) SHA1(59466c22f8c37b80762c95049521fc5d31cf0932) )
ROM_LOAD( "2764.n5", 0x02000, 0x2000, CRC(9353a860) SHA1(4ed19fc1f4f87e95bcad988b2f9851ed7604e586) )
- ROM_LOAD( "2764.n6", 0x04000, 0x2000, CRC(2b2faee6) SHA1(bcd2e5675b863df8be8bc813e25f4aa65a969359) )
+ ROM_LOAD( "2764.n6", 0x04000, 0x2000, CRC(2b2faee6) SHA1(bcd2e5675b863df8be8bc813e25f4aa65a969359) )
ROM_LOAD( "2764.n7", 0x06000, 0x2000, CRC(bd3cbb4c) SHA1(9da177d68d39b56375975b8700cc0cc8b48211fe) )
ROM_LOAD( "daugther_27128.3", 0x10000, 0x4000, CRC(835f7b24) SHA1(24b66827f08c43fbf5b9517d638acdfc38e1b1e7) )
ROM_LOAD( "daugther_2764.2", 0x14000, 0x2000, CRC(9eca91e1) SHA1(48ccb608519debb681fa4f78985a074e05040edc) )
diff --git a/src/mame/cave/fstgfish.cpp b/src/mame/cave/fstgfish.cpp
index a08ee607454..defa12ff79d 100644
--- a/src/mame/cave/fstgfish.cpp
+++ b/src/mame/cave/fstgfish.cpp
@@ -2,7 +2,7 @@
// copyright-holders:
/**************************************************************************************************
-Festival: Goldfish Scoop (c) 2008 CAVE/PLABI/SEVENGEARS/cavia
+Festival: Goldfish Scoop (c) 2008 CAVE/PLABI/SEVENGEARS/cavia
PCIe era with Gigabyte GA-G31M-S2L (rev. 1.1/2.0), connected cards doesn't matter as long as the
CV1000XP/CV2000XP is connected thru USB.
diff --git a/src/mame/funworld/photoply.cpp b/src/mame/funworld/photoply.cpp
index 7c480a83ce6..2b38e13aceb 100644
--- a/src/mame/funworld/photoply.cpp
+++ b/src/mame/funworld/photoply.cpp
@@ -77,7 +77,7 @@ public:
photoply_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
-// , m_eeprom(*this, "eeprom")
+// , m_eeprom(*this, "eeprom")
{
}
@@ -86,11 +86,11 @@ public:
private:
required_device<i486dx4_device> m_maincpu;
-// required_device<eeprom_serial_93cxx_device> m_eeprom;
+// required_device<eeprom_serial_93cxx_device> m_eeprom;
-// uint8_t bios_r(offs_t offset);
-// void bios_w(offs_t offset, uint8_t data);
-// void eeprom_w(uint8_t data);
+// uint8_t bios_r(offs_t offset);
+// void bios_w(offs_t offset, uint8_t data);
+// void eeprom_w(uint8_t data);
static void winbond_superio_config(device_t *device);
@@ -149,13 +149,13 @@ void photoply_state::eeprom_w(uint8_t data)
void photoply_state::main_map(address_map &map)
{
map.unmap_value_high();
-// map(0x000c0000, 0x000fffff).rw(FUNC(photoply_state::bios_r), FUNC(photoply_state::bios_w));
+// map(0x000c0000, 0x000fffff).rw(FUNC(photoply_state::bios_r), FUNC(photoply_state::bios_w));
}
void photoply_state::main_io(address_map &map)
{
map.unmap_value_high();
-// map(0x0202, 0x0202).w(FUNC(photoply_state::eeprom_w));
+// map(0x0202, 0x0202).w(FUNC(photoply_state::eeprom_w));
}
static INPUT_PORTS_START( photoply )
@@ -182,8 +182,8 @@ void photoply_state::winbond_superio_config(device_t *device)
{
w83787f_device &fdc = *downcast<w83787f_device *>(device);
// fdc.set_sysopt_pin(1);
-// fdc.gp20_reset().set_inputline(":maincpu", INPUT_LINE_RESET);
-// fdc.gp25_gatea20().set_inputline(":maincpu", INPUT_LINE_A20);
+// fdc.gp20_reset().set_inputline(":maincpu", INPUT_LINE_RESET);
+// fdc.gp25_gatea20().set_inputline(":maincpu", INPUT_LINE_A20);
fdc.irq1().set(":pci:05.0", FUNC(sis85c496_host_device::pc_irq1_w));
fdc.irq8().set(":pci:05.0", FUNC(sis85c496_host_device::pc_irq8n_w));
fdc.txd1().set(":serport0", FUNC(rs232_port_device::write_txd));
@@ -228,9 +228,9 @@ void photoply_state::photoply(machine_config &config)
PCI_SLOT(config, "pci:2", pci_cards, 11, 1, 2, 3, 0, nullptr);
PCI_SLOT(config, "pci:3", pci_cards, 12, 2, 3, 0, 1, nullptr);
-// EEPROM_93C46_16BIT(config, "eeprom")
-// .write_time(attotime::from_usec(1))
-// .erase_all_time(attotime::from_usec(10));
+// EEPROM_93C46_16BIT(config, "eeprom")
+// .write_time(attotime::from_usec(1))
+// .erase_all_time(attotime::from_usec(10));
}
// We asume that every Photo Play from 1999 onwards use a DX4 100MHz instead of a 75MHz one (both were compatible, the latter were recommended)
diff --git a/src/mame/igt/gkigt.cpp b/src/mame/igt/gkigt.cpp
index 24bc75247bf..66f490995dd 100644
--- a/src/mame/igt/gkigt.cpp
+++ b/src/mame/igt/gkigt.cpp
@@ -915,8 +915,8 @@ ROM_START( gkkey )
ROM_LOAD( "cvs00080,1-4002.bin", 0x00000, 0x80000, CRC(f58a3040) SHA1(906ed54aeafdf2cf58ee8425405498a8c64b52e1) )
ROM_LOAD( "ivc00097,1-4002.bin", 0x00000, 0x80000, CRC(f0a59fd1) SHA1(8e980e9eb80e6899fe3bbcd21ccbd39f9fdccaca) ) /* Vision Ram/E-Square Clear (Replaces IVC00070) */
-// ROM_REGION( 0x80000, "miscbad", 0 )
-// these are also bad dumps, again they never contains the byte value 0x0d (uploaded in ASCII mode with carriage return stripped out?)
+// ROM_REGION( 0x80000, "miscbad", 0 )
+// these are also bad dumps, again they never contains the byte value 0x0d (uploaded in ASCII mode with carriage return stripped out?)
ROM_REGION32_LE( 0x200000, "game", ROMREGION_ERASEFF )
ROM_REGION( 0x100000, "cg", ROMREGION_ERASEFF )
diff --git a/src/mame/misc/odyssey.cpp b/src/mame/misc/odyssey.cpp
index addb5dbf024..9a924c2d70f 100644
--- a/src/mame/misc/odyssey.cpp
+++ b/src/mame/misc/odyssey.cpp
@@ -196,7 +196,7 @@ void odyssey_state::odyssey(machine_config &config)
// pci:0f.0 (J4D1) PCI expansion slot 3
//PCI_SLOT(config, "pci:3", pci_cards, 15, 0, 1, 2, 3, nullptr);
- // pci:10.0 (J4C1) PCI expansion slot 4
+ // pci:10.0 (J4C1) PCI expansion slot 4
PCI_SLOT(config, "pci:4", pci_cards, 16, 0, 1, 2, 3, nullptr);
ISA16_SLOT(config, "board4", 0, "pci:07.0:isabus", isa_internal_devices, "pc87306", true).set_option_machine_config("pc87306", national_superio_config);
diff --git a/src/mame/pacman/pacman.cpp b/src/mame/pacman/pacman.cpp
index 90aeb64185e..e74c907308c 100644
--- a/src/mame/pacman/pacman.cpp
+++ b/src/mame/pacman/pacman.cpp
@@ -3759,7 +3759,7 @@ void pacman_state::woodpek_rbg(machine_config &config)
// Basic machine hardware
m_maincpu->set_addrmap(AS_PROGRAM, &pacman_state::woodpek_map);
-
+
// Video hardware
m_palette->set_init(FUNC(pacman_state::pacman_rbg_palette));
}
@@ -4971,10 +4971,10 @@ ROM_END
that are not present in the parent set.
-
+
Docs by Roberto Fresca.
-
+
*****************************************************************************/
ROM_START( mspactwin )
diff --git a/src/mame/pc/calchase.cpp b/src/mame/pc/calchase.cpp
index 5ce8582b7ac..1899866546b 100644
--- a/src/mame/pc/calchase.cpp
+++ b/src/mame/pc/calchase.cpp
@@ -155,7 +155,7 @@ protected:
virtual void device_add_mconfig(machine_config &config) override;
// TODO: implement me once conversion to PCI kicks in
-// virtual void remap(int space_id, offs_t start, offs_t end) override;
+// virtual void remap(int space_id, offs_t start, offs_t end) override;
private:
required_ioport_array<5> m_iocard;
std::unique_ptr<uint8_t[]> m_nvram_data;
diff --git a/src/mame/pc/pcipc_sis.cpp b/src/mame/pc/pcipc_sis.cpp
index 1a7deaec051..8d177a5bcfa 100644
--- a/src/mame/pc/pcipc_sis.cpp
+++ b/src/mame/pc/pcipc_sis.cpp
@@ -98,8 +98,8 @@ void sis496_state::winbond_superio_config(device_t *device)
{
w83787f_device &fdc = *downcast<w83787f_device *>(device);
// fdc.set_sysopt_pin(1);
-// fdc.gp20_reset().set_inputline(":maincpu", INPUT_LINE_RESET);
-// fdc.gp25_gatea20().set_inputline(":maincpu", INPUT_LINE_A20);
+// fdc.gp20_reset().set_inputline(":maincpu", INPUT_LINE_RESET);
+// fdc.gp25_gatea20().set_inputline(":maincpu", INPUT_LINE_A20);
fdc.irq1().set(":pci:05.0", FUNC(sis85c496_host_device::pc_irq1_w));
fdc.irq8().set(":pci:05.0", FUNC(sis85c496_host_device::pc_irq8n_w));
fdc.txd1().set(":serport0", FUNC(rs232_port_device::write_txd));
diff --git a/src/mame/rm/rm380z_m.cpp b/src/mame/rm/rm380z_m.cpp
index b32befc83cc..aea491862e3 100644
--- a/src/mame/rm/rm380z_m.cpp
+++ b/src/mame/rm/rm380z_m.cpp
@@ -121,7 +121,7 @@ void rm380z_state_cos40_hrg::port_write(offs_t offset, uint8_t data)
if ((m_hrg_port0 & 0x01) && !(data & 0x01))
{
// set low nibble of scratchpad (palette data) when bit 0 toggled
- change_hrg_scratchpad(m_hrg_port1 >> 4, m_hrg_port1 & 0x0f, 0xf0);
+ change_hrg_scratchpad(m_hrg_port1 >> 4, m_hrg_port1 & 0x0f, 0xf0);
}
else if ((m_hrg_port0 & 0x02) && !(data & 0x02))
{
@@ -368,7 +368,7 @@ void rm380z_state_cos40_hrg::machine_reset()
m_hrg_display_mode = hrg_display_mode::none;
memset(m_hrg_ram, 0, sizeof(m_hrg_ram));
- memset(m_hrg_scratchpad, 0, sizeof(m_hrg_scratchpad));
+ memset(m_hrg_scratchpad, 0, sizeof(m_hrg_scratchpad));
}
void rm480z_state::machine_reset()
diff --git a/src/mame/rm/rm380z_v.cpp b/src/mame/rm/rm380z_v.cpp
index ed9bf1296cb..2dfa15c0682 100644
--- a/src/mame/rm/rm380z_v.cpp
+++ b/src/mame/rm/rm380z_v.cpp
@@ -201,7 +201,7 @@ uint8_t rm380z_state_cos34::videoram_read(offs_t offset)
data = m_vram.get_char(row, col);
}
- return data;
+ return data;
}
uint8_t rm380z_state_cos40::videoram_read(offs_t offset)
@@ -221,7 +221,7 @@ uint8_t rm380z_state_cos40::videoram_read(offs_t offset)
}
}
- return data;
+ return data;
}
uint8_t rm380z_state_cos40_hrg::videoram_read(offs_t offset)
diff --git a/src/mame/skeleton/sterz80.cpp b/src/mame/skeleton/sterz80.cpp
index 4ce2c8d031c..2f3ab07f61c 100644
--- a/src/mame/skeleton/sterz80.cpp
+++ b/src/mame/skeleton/sterz80.cpp
@@ -192,7 +192,7 @@ void sterz80_state::init_tongzi()
// decrypt main CPU ROM
// TODO
// the encryption seems to be based on address-determined XORs and data bitswaps. At a first glance the XORs seem to be chosen
- // by bits 0, 1, 4, 5, 6 and 7 of the address, the data bitswaps by bits 0 and 1 of the address.
+ // by bits 0, 1, 4, 5, 6 and 7 of the address, the data bitswaps by bits 0 and 1 of the address.
// decrypt M6295 ROM
// TODO
diff --git a/src/mame/taito/taito_h.cpp b/src/mame/taito/taito_h.cpp
index ec251e80ece..015985c5721 100644
--- a/src/mame/taito/taito_h.cpp
+++ b/src/mame/taito/taito_h.cpp
@@ -54,9 +54,9 @@ Known issues :
Yasuhiro Ogawa.
- Flip screen doesn't work on background layers:
* 'syvalion': title screen doesn't show up. Also BG tiles are not shown in their proper locations during gameplay
- * 'dleague' : title screen doesn't show up. Playfield is not completely shown during gameplay
- * 'recordbr': Taito logo doesn't show up during attract mode. Backgrounds don't show up during gameplay
- * 'tetristh': title screen doesn't show up. Backgrounds don't show up during gameplay
+ * 'dleague' : title screen doesn't show up. Playfield is not completely shown during gameplay
+ * 'recordbr': Taito logo doesn't show up during attract mode. Backgrounds don't show up during gameplay
+ * 'tetristh': title screen doesn't show up. Backgrounds don't show up during gameplay
Stephh's notes (based on the game M68000 code and some tests) :
@@ -75,10 +75,10 @@ Stephh's notes (based on the game M68000 code and some tests) :
- DSW bit 6 is used to configure TC0160ROM addressing mode to use 1MB JEDEC ROM pinout or 1MB Non-JEDEC 28-pin Mask ROM pinout.
Main difference between pinouts is the A16 address line and /OE input line are "swapped".
Enabling or disabling this switch causes different writes to 0x430000.w address, so looks like it's mapped
- to a control register on TC0160ROM, which is involved in GFX ROM addressing.
- It writes a 0x2eea value on that address at initializing HW time, only when it's ON (see code at 0x002af8).
- Another write to this address is done at 0x002a96 with a 0x27ea value (default value?), always at boot up.
- It's set to "always ON" at the operator manual, because all known PCBs use the 28-pin Mask ROM for GFX data.
+ to a control register on TC0160ROM, which is involved in GFX ROM addressing.
+ It writes a 0x2eea value on that address at initializing HW time, only when it's ON (see code at 0x002af8).
+ Another write to this address is done at 0x002a96 with a 0x27ea value (default value?), always at boot up.
+ It's set to "always ON" at the operator manual, because all known PCBs use the 28-pin Mask ROM for GFX data.
2) 'recordbr' and 'gogold'
diff --git a/src/mame/tvgames/xavix.cpp b/src/mame/tvgames/xavix.cpp
index b5943016969..b7c4b52a848 100644
--- a/src/mame/tvgames/xavix.cpp
+++ b/src/mame/tvgames/xavix.cpp
@@ -580,7 +580,7 @@ static INPUT_PORTS_START( tomplc )
PORT_BIT( 0x03, 0x00, IPT_POSITIONAL ) PORT_POSITIONS(3) PORT_SENSITIVITY(10) PORT_KEYDELTA(1) PORT_CENTERDELTA(0) PORT_FULL_TURN_COUNT(3) PORT_NAME("Brake")
// are you expected to say something when this is held? game makes a crackle and doesn't act like you said anything
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Speak")
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Speak")
INPUT_PORTS_END
diff --git a/src/mame/yamaha/mks3.cpp b/src/mame/yamaha/mks3.cpp
index 9afd3f08c6f..29a5da33729 100644
--- a/src/mame/yamaha/mks3.cpp
+++ b/src/mame/yamaha/mks3.cpp
@@ -16,223 +16,223 @@
DEFINE_DEVICE_TYPE(MKS3, mks3_device, "mks3", "Yamaha MKS3 piano keyboard scanner")
static INPUT_PORTS_START(piano)
- PORT_START("P0")
- PORT_BIT(0xffffffff, IP_ACTIVE_HIGH, IPT_UNUSED)
-
- PORT_START("P1")
- PORT_BIT(0x0000000f, IP_ACTIVE_HIGH, IPT_UNUSED)
- PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C1")
- PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C1#")
- PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D1")
- PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D1#")
- PORT_BIT(0x00000100, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("E1")
- PORT_BIT(0x00000200, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F1")
- PORT_BIT(0x00000400, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F1#")
- PORT_BIT(0x00000800, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G1")
- PORT_BIT(0x00001000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G1#")
- PORT_BIT(0x00002000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A1")
- PORT_BIT(0x00004000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A1#")
- PORT_BIT(0x00008000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("B1")
- PORT_BIT(0x00010000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C2")
- PORT_BIT(0x00020000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C2#")
- PORT_BIT(0x00040000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D2")
- PORT_BIT(0x00080000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D2#")
- PORT_BIT(0x00100000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("E2")
- PORT_BIT(0x00200000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F2")
- PORT_BIT(0x00400000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F2#")
- PORT_BIT(0x00800000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G2")
- PORT_BIT(0x01000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G2#")
- PORT_BIT(0x02000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A2")
- PORT_BIT(0x04000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A2#")
- PORT_BIT(0x08000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("B2")
- PORT_BIT(0x10000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C3")
- PORT_BIT(0x20000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C3#")
- PORT_BIT(0x40000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D3")
- PORT_BIT(0x80000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D3#")
-
- PORT_START("P2")
- PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("E3")
- PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F3")
- PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F3#")
- PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G3")
- PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G3#")
- PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A3")
- PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A3#")
- PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("B3")
- PORT_BIT(0x00000100, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C4")
- PORT_BIT(0x00000200, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C4#")
- PORT_BIT(0x00000400, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D4")
- PORT_BIT(0x00000800, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D4#")
- PORT_BIT(0x00001000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("E4")
- PORT_BIT(0x00002000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F4")
- PORT_BIT(0x00004000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F4#")
- PORT_BIT(0x00008000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G4")
- PORT_BIT(0x00010000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G4#")
- PORT_BIT(0x00020000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A4")
- PORT_BIT(0x00040000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A4#")
- PORT_BIT(0x00080000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("B4")
- PORT_BIT(0x00100000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C5")
- PORT_BIT(0x00200000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C5#")
- PORT_BIT(0x00400000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D5")
- PORT_BIT(0x00800000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D5#")
- PORT_BIT(0x01000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("E5")
- PORT_BIT(0x02000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F5")
- PORT_BIT(0x04000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F5#")
- PORT_BIT(0x08000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G5")
- PORT_BIT(0x10000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G5#")
- PORT_BIT(0x20000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A5")
- PORT_BIT(0x40000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A5#")
- PORT_BIT(0x80000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("B5")
-
- PORT_START("P3")
- PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C6")
- PORT_BIT(0xfffffffe, IP_ACTIVE_HIGH, IPT_UNUSED)
+ PORT_START("P0")
+ PORT_BIT(0xffffffff, IP_ACTIVE_HIGH, IPT_UNUSED)
+
+ PORT_START("P1")
+ PORT_BIT(0x0000000f, IP_ACTIVE_HIGH, IPT_UNUSED)
+ PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C1")
+ PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C1#")
+ PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D1")
+ PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D1#")
+ PORT_BIT(0x00000100, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("E1")
+ PORT_BIT(0x00000200, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F1")
+ PORT_BIT(0x00000400, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F1#")
+ PORT_BIT(0x00000800, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G1")
+ PORT_BIT(0x00001000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G1#")
+ PORT_BIT(0x00002000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A1")
+ PORT_BIT(0x00004000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A1#")
+ PORT_BIT(0x00008000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("B1")
+ PORT_BIT(0x00010000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C2")
+ PORT_BIT(0x00020000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C2#")
+ PORT_BIT(0x00040000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D2")
+ PORT_BIT(0x00080000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D2#")
+ PORT_BIT(0x00100000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("E2")
+ PORT_BIT(0x00200000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F2")
+ PORT_BIT(0x00400000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F2#")
+ PORT_BIT(0x00800000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G2")
+ PORT_BIT(0x01000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G2#")
+ PORT_BIT(0x02000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A2")
+ PORT_BIT(0x04000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A2#")
+ PORT_BIT(0x08000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("B2")
+ PORT_BIT(0x10000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C3")
+ PORT_BIT(0x20000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C3#")
+ PORT_BIT(0x40000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D3")
+ PORT_BIT(0x80000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D3#")
+
+ PORT_START("P2")
+ PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("E3")
+ PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F3")
+ PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F3#")
+ PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G3")
+ PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G3#")
+ PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A3")
+ PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A3#")
+ PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("B3")
+ PORT_BIT(0x00000100, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C4")
+ PORT_BIT(0x00000200, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C4#")
+ PORT_BIT(0x00000400, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D4")
+ PORT_BIT(0x00000800, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D4#")
+ PORT_BIT(0x00001000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("E4")
+ PORT_BIT(0x00002000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F4")
+ PORT_BIT(0x00004000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F4#")
+ PORT_BIT(0x00008000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G4")
+ PORT_BIT(0x00010000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G4#")
+ PORT_BIT(0x00020000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A4")
+ PORT_BIT(0x00040000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A4#")
+ PORT_BIT(0x00080000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("B4")
+ PORT_BIT(0x00100000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C5")
+ PORT_BIT(0x00200000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C5#")
+ PORT_BIT(0x00400000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D5")
+ PORT_BIT(0x00800000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("D5#")
+ PORT_BIT(0x01000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("E5")
+ PORT_BIT(0x02000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F5")
+ PORT_BIT(0x04000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("F5#")
+ PORT_BIT(0x08000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G5")
+ PORT_BIT(0x10000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("G5#")
+ PORT_BIT(0x20000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A5")
+ PORT_BIT(0x40000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("A5#")
+ PORT_BIT(0x80000000, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("B5")
+
+ PORT_START("P3")
+ PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("C6")
+ PORT_BIT(0xfffffffe, IP_ACTIVE_HIGH, IPT_UNUSED)
INPUT_PORTS_END
mks3_device::mks3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- device_t(mconfig, MKS3, tag, owner, clock),
- m_port(*this, "P%d", 0),
- m_write_da(*this),
- m_write_clk(*this)
+ device_t(mconfig, MKS3, tag, owner, clock),
+ m_port(*this, "P%d", 0),
+ m_write_da(*this),
+ m_write_clk(*this)
{
}
ioport_constructor mks3_device::device_input_ports() const
{
- return INPUT_PORTS_NAME(piano);
+ return INPUT_PORTS_NAME(piano);
}
void mks3_device::device_start()
{
- save_item(NAME(m_ic));
- save_item(NAME(m_req));
- save_item(NAME(m_step));
- save_item(NAME(m_byte));
- save_item(NAME(m_bytes));
- save_item(NAME(m_byte_count));
- save_item(NAME(m_sent_state));
- save_item(NAME(m_current_state));
-
- m_ic = 1;
- m_req = 1;
-
- m_scan_timer = timer_alloc(FUNC(mks3_device::scan_tick), this);
- m_transmit_timer = timer_alloc(FUNC(mks3_device::transmit_tick), this);
+ save_item(NAME(m_ic));
+ save_item(NAME(m_req));
+ save_item(NAME(m_step));
+ save_item(NAME(m_byte));
+ save_item(NAME(m_bytes));
+ save_item(NAME(m_byte_count));
+ save_item(NAME(m_sent_state));
+ save_item(NAME(m_current_state));
+
+ m_ic = 1;
+ m_req = 1;
+
+ m_scan_timer = timer_alloc(FUNC(mks3_device::scan_tick), this);
+ m_transmit_timer = timer_alloc(FUNC(mks3_device::transmit_tick), this);
}
void mks3_device::device_reset()
{
- m_write_da(1);
- m_write_clk(1);
- m_step = 0xff;
- m_byte = 0;
- m_byte_count = 0;
- std::fill(m_bytes.begin(), m_bytes.end(), 0);
- std::fill(m_sent_state.begin(), m_sent_state.end(), 0);
-
- for(int i=0; i != 4; i++)
- m_current_state[i] = m_port[i]->read();
-
-
- m_scan_timer->adjust(attotime::from_hz(100), 0, attotime::from_hz(100));
+ m_write_da(1);
+ m_write_clk(1);
+ m_step = 0xff;
+ m_byte = 0;
+ m_byte_count = 0;
+ std::fill(m_bytes.begin(), m_bytes.end(), 0);
+ std::fill(m_sent_state.begin(), m_sent_state.end(), 0);
+
+ for(int i=0; i != 4; i++)
+ m_current_state[i] = m_port[i]->read();
+
+
+ m_scan_timer->adjust(attotime::from_hz(100), 0, attotime::from_hz(100));
}
void mks3_device::ic_w(int state)
{
- if(state == m_ic)
- return;
+ if(state == m_ic)
+ return;
- m_ic = state;
- if(!m_ic)
- reset();
+ m_ic = state;
+ if(!m_ic)
+ reset();
}
void mks3_device::req_w(int state)
{
- if(state == m_req)
- return;
+ if(state == m_req)
+ return;
- m_req = state;
- if(m_req == 0 && m_step == 0xff)
- transmit_next();
+ m_req = state;
+ if(m_req == 0 && m_step == 0xff)
+ transmit_next();
}
TIMER_CALLBACK_MEMBER(mks3_device::transmit_tick)
{
- logerror("tr %d\n", m_step);
- if(m_step == 15) {
- transmit_next();
- return;
- }
-
- if(m_step & 1) {
- m_write_clk(0);
- m_write_da(BIT(m_byte, 6 - (m_step >> 1)));
- } else
- m_write_clk(1);
- m_step++;
-
- m_transmit_timer->adjust(attotime::from_hz(500000));
+ logerror("tr %d\n", m_step);
+ if(m_step == 15) {
+ transmit_next();
+ return;
+ }
+
+ if(m_step & 1) {
+ m_write_clk(0);
+ m_write_da(BIT(m_byte, 6 - (m_step >> 1)));
+ } else
+ m_write_clk(1);
+ m_step++;
+
+ m_transmit_timer->adjust(attotime::from_hz(500000));
}
void mks3_device::transmit_next()
{
- if(m_byte_count == 0) {
- m_step = 0xff;
- send_next();
- return;
- }
-
- m_byte = m_bytes[0];
- m_byte_count --;
- if(m_byte_count)
- memmove(m_bytes.data(), m_bytes.data() + 1, m_byte_count);
-
- logerror("start %02x\n", m_byte);
- m_write_clk(0);
- m_write_da(BIT(m_byte, 7));
- m_step = 0;
- m_transmit_timer->adjust(attotime::from_hz(500000));
+ if(m_byte_count == 0) {
+ m_step = 0xff;
+ send_next();
+ return;
+ }
+
+ m_byte = m_bytes[0];
+ m_byte_count --;
+ if(m_byte_count)
+ memmove(m_bytes.data(), m_bytes.data() + 1, m_byte_count);
+
+ logerror("start %02x\n", m_byte);
+ m_write_clk(0);
+ m_write_da(BIT(m_byte, 7));
+ m_step = 0;
+ m_transmit_timer->adjust(attotime::from_hz(500000));
}
u32 mks3_device::find_next()
{
- for(int i=0; i != 4; i++)
- if(m_current_state[i] != m_sent_state[i])
- for(int j=0; j != 32; j++)
- if(BIT(m_current_state[i]^m_sent_state[i], j)) {
- m_sent_state[i] ^= 1 << j;
- return (i << 5) | j | (BIT(m_current_state[i], j) ? 0x100 : 0);
- }
- return 0xffffffff;
+ for(int i=0; i != 4; i++)
+ if(m_current_state[i] != m_sent_state[i])
+ for(int j=0; j != 32; j++)
+ if(BIT(m_current_state[i]^m_sent_state[i], j)) {
+ m_sent_state[i] ^= 1 << j;
+ return (i << 5) | j | (BIT(m_current_state[i], j) ? 0x100 : 0);
+ }
+ return 0xffffffff;
}
void mks3_device::send_next()
{
- u32 key = find_next();
- if(key == 0xffffffff)
- return;
-
- // velocity is 10 bits, 0 = max, 3ff = min
- //
- // 80 | key number
- // 20 for maximal time(?), velocity >> 5 otherwise
- // 60 | (velocity & 1f) on) || 00 (keyoff)
-
- m_bytes[0] = 0x80 | (key & 0x7f);
- m_bytes[1] = 0; //key & 0x100 ? 0 : 0x20;
- m_bytes[2] = (key & 0x100) ? 0x60 : 0x00;
- m_byte_count = 3;
- transmit_next();
+ u32 key = find_next();
+ if(key == 0xffffffff)
+ return;
+
+ // velocity is 10 bits, 0 = max, 3ff = min
+ //
+ // 80 | key number
+ // 20 for maximal time(?), velocity >> 5 otherwise
+ // 60 | (velocity & 1f) on) || 00 (keyoff)
+
+ m_bytes[0] = 0x80 | (key & 0x7f);
+ m_bytes[1] = 0; //key & 0x100 ? 0 : 0x20;
+ m_bytes[2] = (key & 0x100) ? 0x60 : 0x00;
+ m_byte_count = 3;
+ transmit_next();
}
TIMER_CALLBACK_MEMBER(mks3_device::scan_tick)
{
- for(int i=0; i != 4; i++)
- m_current_state[i] = m_port[i]->read();
+ for(int i=0; i != 4; i++)
+ m_current_state[i] = m_port[i]->read();
- if(m_step == 0xff)
- send_next();
+ if(m_step == 0xff)
+ send_next();
}
diff --git a/src/mame/yamaha/ympsr2000.cpp b/src/mame/yamaha/ympsr2000.cpp
index 89bc48c01de..4d7b90977f8 100644
--- a/src/mame/yamaha/ympsr2000.cpp
+++ b/src/mame/yamaha/ympsr2000.cpp
@@ -44,7 +44,7 @@ void psr2000_state::psr2000(machine_config &config)
{
SH3BE(config, m_maincpu, 10_MHz_XTAL*4);
m_maincpu->set_addrmap(AS_PROGRAM, &psr2000_state::map);
-
+
auto &palette = PALETTE(config, "palette", palette_device::MONOCHROME_INVERTED);
auto &screen = SCREEN(config, "screen", SCREEN_TYPE_LCD);