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author Vas Crabb <vas@vastheman.com>2024-03-24 03:01:24 +1100
committer Vas Crabb <vas@vastheman.com>2024-03-24 03:01:24 +1100
commitc225071d50a2b2bbdc9b70f78af34f186181d6db (patch)
treeab3ed5cdf816f9d2a9af1da961cbb7768e76a734 /src/devices/cpu
parent26ba3b1af9e37ac7766bdbb806efe4743bfd9cbe (diff)
srcclean and fix indentation in preparation for MAME 0.264 branch.
Diffstat (limited to 'src/devices/cpu')
-rw-r--r--src/devices/cpu/h8/h83217.cpp2
-rw-r--r--src/devices/cpu/sh/sh7042.cpp2
-rw-r--r--src/devices/cpu/sh/sh7042.h2
-rw-r--r--src/devices/cpu/sh/sh_cmt.h2
-rw-r--r--src/devices/cpu/sh/sh_intc.cpp4
-rw-r--r--src/devices/cpu/sh/sh_port.cpp2
6 files changed, 7 insertions, 7 deletions
diff --git a/src/devices/cpu/h8/h83217.cpp b/src/devices/cpu/h8/h83217.cpp
index a26a0282ef4..76eb07fff8f 100644
--- a/src/devices/cpu/h8/h83217.cpp
+++ b/src/devices/cpu/h8/h83217.cpp
@@ -14,7 +14,7 @@
- keyboard matrix interrupt
- TCONR @ 0xff9f (timer connection)
- SEDGR @ 0xffa8 (edge sense)
- - WSCR @ 0xffc2 (waitstate control)
+ - WSCR @ 0xffc2 (waitstate control)
- finish STCR emulation
- finish SYSCR emulation
diff --git a/src/devices/cpu/sh/sh7042.cpp b/src/devices/cpu/sh/sh7042.cpp
index dc2659b7a7e..66eb8dc10b8 100644
--- a/src/devices/cpu/sh/sh7042.cpp
+++ b/src/devices/cpu/sh/sh7042.cpp
@@ -174,7 +174,7 @@ void sh7042_device::do_sci_w(int sci, int state)
void sh7042_device::internal_update()
{
- internal_update(current_cycles());
+ internal_update(current_cycles());
}
void sh7042_device::add_event(u64 &event_time, u64 new_event)
diff --git a/src/devices/cpu/sh/sh7042.h b/src/devices/cpu/sh/sh7042.h
index ac1ee769180..9daa7ac03ab 100644
--- a/src/devices/cpu/sh/sh7042.h
+++ b/src/devices/cpu/sh/sh7042.h
@@ -113,7 +113,7 @@ private:
void recompute_timer(u64 event_time);
TIMER_CALLBACK_MEMBER(event_timer_tick);
void internal_update(u64 current_time);
-
+
void do_sci_w(int sci, int state);
u16 pcf_ah_r();
diff --git a/src/devices/cpu/sh/sh_cmt.h b/src/devices/cpu/sh/sh_cmt.h
index e365be37fb1..0407f71c06e 100644
--- a/src/devices/cpu/sh/sh_cmt.h
+++ b/src/devices/cpu/sh/sh_cmt.h
@@ -63,7 +63,7 @@ protected:
void csr_w(int reg, u16 data, u16 mem_mask);
void cnt_w(int reg, u16 data, u16 mem_mask);
- void cor_w(int reg, u16 data, u16 mem_mask);
+ void cor_w(int reg, u16 data, u16 mem_mask);
void clock_start(int clk);
void compute_next_event(int clk);
diff --git a/src/devices/cpu/sh/sh_intc.cpp b/src/devices/cpu/sh/sh_intc.cpp
index 34bb91dfe86..21f7804efd8 100644
--- a/src/devices/cpu/sh/sh_intc.cpp
+++ b/src/devices/cpu/sh/sh_intc.cpp
@@ -31,7 +31,7 @@ const u8 sh_intc_device::pribit[0x100] = {
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
- 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
+ 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
};
sh_intc_device::sh_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
@@ -65,7 +65,7 @@ void sh_intc_device::internal_interrupt(int vector)
u32 slot = pribit[vector];
u32 shift = 12-4*(slot & 3);
u32 level = (m_ipr[slot >> 2] >> shift) & 15;
- logerror("Internal interrupt %d / %d (ipr%c %d-%d)\n", vector, level, 'a' + (slot >> 2), shift + 3, shift);
+ logerror("Internal interrupt %d / %d (ipr%c %d-%d)\n", vector, level, 'a' + (slot >> 2), shift + 3, shift);
m_cpu->set_internal_interrupt(level, vector);
}
diff --git a/src/devices/cpu/sh/sh_port.cpp b/src/devices/cpu/sh/sh_port.cpp
index ddd93a1a4e2..2cf5735826b 100644
--- a/src/devices/cpu/sh/sh_port.cpp
+++ b/src/devices/cpu/sh/sh_port.cpp
@@ -104,6 +104,6 @@ void sh_port32_device::io_w(offs_t, u32 data, u32 mem_mask)
COMBINE_DATA(&m_io);
m_io &= ~m_mask;
if(m_io)
- m_cpu->do_write_port32(m_index, m_dr & m_io, m_io);
+ m_cpu->do_write_port32(m_index, m_dr & m_io, m_io);
}