diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/mame/drivers/nmk16.c | 8 | ||||
-rw-r--r-- | src/mame/drivers/seibuspi.c | 37 | ||||
-rw-r--r-- | src/mame/mame.lst | 5 | ||||
-rw-r--r-- | src/mess/drivers/hh_hmcs40.c | 158 | ||||
-rw-r--r-- | src/mess/drivers/hh_tms1k.c | 39 | ||||
-rw-r--r-- | src/mess/drivers/hh_ucom4.c | 19 | ||||
-rw-r--r-- | src/mess/includes/hh_tms1k.h | 3 |
7 files changed, 238 insertions, 31 deletions
diff --git a/src/mame/drivers/nmk16.c b/src/mame/drivers/nmk16.c index 8c5453b90a9..32615fc1086 100644 --- a/src/mame/drivers/nmk16.c +++ b/src/mame/drivers/nmk16.c @@ -7404,7 +7404,7 @@ Notes: ***************************************************************************/ -ROM_START( hotbubl ) +ROM_START( hotbubl ) /* Korean release - Nude images of women for backgrounds */ ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "c1.uc1", 0x00001, 0x40000, CRC(7bb240e9) SHA1(99048fa275182c3da3bfb0dedd790f4b5858bd92) ) ROM_LOAD16_BYTE( "c2.uc9", 0x00000, 0x40000, CRC(7917b95d) SHA1(0344bae9c373c5943e7693720e5e531bc2e0d7ee) ) @@ -7432,7 +7432,7 @@ ROM_START( hotbubl ) ROM_LOAD( "s2.uc18", 0x00000, 0x40000, CRC(401c980f) SHA1(e47710c47cfeecce3ccf87f845b219a9c9f21ee3) ) ROM_END -ROM_START( hotbublk ) /* Korean release - Nude images replaced with pictures of satellite dishes */ +ROM_START( hotbubla ) /* Korean release - Nude images replaced with pictures of satellite dishes */ ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "6_c1.uc1", 0x00001, 0x40000, CRC(7c65bf47) SHA1(fe578d3336c5f437bfd1bc81bfe3763b12f3e63f) ) ROM_LOAD16_BYTE( "7_c2.uc9", 0x00000, 0x40000, CRC(74eb11c3) SHA1(88aeb02c4088706a56b4c930ffe6fdfbc99031c6) ) @@ -7838,8 +7838,8 @@ GAME( 1998, grdnstrmg,grdnstrm, grdnstrmk,grdnstrk, nmk16_state, grdnstrmg,ROT // is there a 'bubble 2000' / 'hot bubble' version with Afega copyright, or is the only Afega release dolmen above, this seems like a sequel, not a clone? GAME( 1998, bubl2000, 0, popspops, bubl2000, nmk16_state, bubl2000, ROT0, "Afega (Tuning license)", "Bubble 2000", 0 ) // on a tuning board (bootleg?) -GAME( 1998, hotbubl, bubl2000, popspops, bubl2000, nmk16_state, bubl2000, ROT0, "Afega (Pandora license)", "Hot Bubble" , 0 ) // on an afega board .. -GAME( 1998, hotbublk, bubl2000, popspops, bubl2000, nmk16_state, bubl2000, ROT0, "Afega (Pandora license)", "Hot Bubble (Korea)" , 0 ) // on an afega board .. +GAME( 1998, hotbubl, bubl2000, popspops, bubl2000, nmk16_state, bubl2000, ROT0, "Afega (Pandora license)", "Hot Bubble (Korea, with adult pictures)" , 0 ) // on an afega board .. +GAME( 1998, hotbubla, bubl2000, popspops, bubl2000, nmk16_state, bubl2000, ROT0, "Afega (Pandora license)", "Hot Bubble (Korea)" , 0 ) // on an afega board .. GAME( 1999, popspops, 0, popspops, popspops, nmk16_state, grdnstrm, ROT0, "Afega", "Pop's Pop's", 0 ) diff --git a/src/mame/drivers/seibuspi.c b/src/mame/drivers/seibuspi.c index 3f8f54a15ec..a0f14e724b9 100644 --- a/src/mame/drivers/seibuspi.c +++ b/src/mame/drivers/seibuspi.c @@ -2857,6 +2857,38 @@ ROM_START( rdftj ) ROM_LOAD("flash0_blank_region01.u1053", 0x000000, 0x100000, CRC(7ae7ab76) SHA1(a2b196f470bf64af94002fc4e2640fadad00418f) ) ROM_END +ROM_START( rdftja ) /* SXX2C ROM SUB4 cart */ + ROM_REGION32_LE( 0x200000, "maincpu", 0 ) /* i386 program */ + ROM_LOAD32_BYTE("seibu1.u0211", 0x000000, 0x080000, CRC(b70afcc2) SHA1(70ac545a9fc30df310254997674878fbc2c2d718) ) // socket is silkscreened on pcb PRG0 + ROM_LOAD32_BYTE("raiden-f_prg2.u0212", 0x000001, 0x080000, CRC(58ccb10c) SHA1(0cce4057bfada78121d9586574b98d46cdd7dd46) ) // socket is silkscreened on pcb PRG1 + ROM_LOAD32_WORD("raiden-f_prg34.u0219", 0x000002, 0x100000, CRC(63f01d17) SHA1(74dbd0417b974583da87fc6c7a081b03fd4e16b8) ) // socket is silkscreened on pcb PRG23 + + ROM_REGION( 0x40000, "audiocpu", ROMREGION_ERASE00 ) /* 256K RAM, ROM from Z80 point-of-view */ + + ROM_REGION( 0x30000, "gfx1", ROMREGION_ERASEFF ) /* text layer roms */ + ROM_LOAD24_WORD("raiden-f_fix.u0425", 0x000000, 0x20000, CRC(2be2936b) SHA1(9e719f7328a52af220b6f084c1e0990ca6e2d533) ) // socket is silkscreened on pcb FIX01 + ROM_LOAD24_BYTE("seibu_7.u048", 0x000002, 0x10000, CRC(4d87e1ea) SHA1(3230e9b643fad773e61ab8ce09c0cd7d4d0558e3) ) // socket is silkscreened on pcb FIXP + + ROM_REGION( 0x600000, "gfx2", ROMREGION_ERASEFF ) /* background layer roms */ + ROM_LOAD24_WORD("gun_dogs_bg1-d.u0415", 0x000000, 0x200000, CRC(6a68054c) SHA1(5cbfc4ac90045f1401c2dda7a51936558c9de07e) ) // pads are silkscreened on pcb BG12 + ROM_LOAD24_BYTE("gun_dogs_bg1-p.u0410", 0x000002, 0x100000, CRC(3400794a) SHA1(719808f7442bac612cefd7b7fffcd665e6337ad0) ) // pads are silkscreened on pcb BG12P + ROM_LOAD24_WORD("gun_dogs_bg2-d.u0424", 0x300000, 0x200000, CRC(61cd2991) SHA1(bb608e3948bf9ea35b5e1615d2ba6858d029dcbe) ) // pads are silkscreened on pcb BG3 + ROM_LOAD24_BYTE("gun_dogs_bg2-p.u049", 0x300002, 0x100000, CRC(502d5799) SHA1(c3a0e1a4f5a7b35572ae1ff31315da4ed08aa2fe) ) // pads are silkscreened on pcb BG3P + + ROM_REGION( 0xc00000, "gfx3", 0 ) /* sprites */ + ROM_LOAD("gun_dogs_obj-1.u0322", 0x000000, 0x400000, CRC(59d86c99) SHA1(d3c9241e7b51fe21f8351051b063f91dc69bf905) ) // pads are silkscreened on pcb OBJ1 + ROM_LOAD("gun_dogs_obj-2.u0324", 0x400000, 0x400000, CRC(1ceb0b6f) SHA1(97225a9b3e7be18080aa52f6570af2cce8f25c06) ) // pads are silkscreened on pcb OBJ2 + ROM_LOAD("gun_dogs_obj-3.u0323", 0x800000, 0x400000, CRC(36e93234) SHA1(51917a80b7da5c32a9434a1076fc2916d62e6a3e) ) // pads are silkscreened on pcb OBJ3 + + ROM_REGION32_LE( 0xa00000, "sound01", ROMREGION_ERASE00 ) /* sound roms */ + ROM_LOAD32_WORD("raiden-f_pcm2.u0217", 0x000000, 0x100000, CRC(3f8d4a48) SHA1(30664a2908daaeaee58f7e157516b522c952e48d) ) // pads are silkscreened SOUND0 + ROM_CONTINUE( 0x400000, 0x100000 ) + /* SOUND1 socket is unpopulated */ + + ROM_REGION( 0x100000, "soundflash1", 0 ) /* on SPI motherboard */ + ROM_LOAD("flash0_blank_region01.u1053", 0x000000, 0x100000, CRC(7ae7ab76) SHA1(a2b196f470bf64af94002fc4e2640fadad00418f) ) +ROM_END + ROM_START( rdftau ) ROM_REGION32_LE( 0x200000, "maincpu", 0 ) /* i386 program */ ROM_LOAD32_BYTE("1.u0211", 0x000000, 0x80000, CRC(6339c60d) SHA1(871d5bc9fc695651ceb6fcfdab32084320fe239d) ) @@ -2993,7 +3025,7 @@ ROM_START( rdfta ) ROM_LOAD("flash0_blank_region82.u1053", 0x000000, 0x100000, CRC(4f463a87) SHA1(0e27904745da61a3ba7c48c5b4c7d45989bbd05b) ) ROM_END -ROM_START( rdftadi ) // Dream Island license +ROM_START( rdftadi ) // Dream Island license - SXX2C ROM SUB4 cart ROM_REGION32_LE( 0x200000, "maincpu", 0 ) /* i386 program */ ROM_LOAD32_BYTE("seibu__1.u0211", 0x000000, 0x080000, CRC(fc0e2885) SHA1(79621155d992d504e993bd3ee0d6ff3903bd5415) ) // socket is silkscreened on pcb PRG0 ROM_LOAD32_BYTE("raiden-f_prg2.u0212", 0x000001, 0x080000, CRC(58ccb10c) SHA1(0cce4057bfada78121d9586574b98d46cdd7dd46) ) // socket is silkscreened on pcb PRG1 @@ -3025,7 +3057,7 @@ ROM_START( rdftadi ) // Dream Island license ROM_LOAD("flash0_blank_region24.u1053", 0x000000, 0x100000, CRC(72a33dc4) SHA1(65a52f576ca4d240418fedd9a4922edcd6c0c8d1) ) ROM_END -ROM_START( rdftam ) // Metrotainment license +ROM_START( rdftam ) // Metrotainment license - SXX2C ROM SUB4 cart ROM_REGION32_LE( 0x200000, "maincpu", 0 ) /* i386 program */ ROM_LOAD32_BYTE("seibu_1.u0211", 0x000000, 0x080000, CRC(156d8db0) SHA1(93662b3ee494e37a56428a7aa3dad7a957835950) ) // socket is silkscreened on pcb PRG0 ROM_LOAD32_BYTE("raiden-f_prg2.u0212", 0x000001, 0x080000, CRC(58ccb10c) SHA1(0cce4057bfada78121d9586574b98d46cdd7dd46) ) // socket is silkscreened on pcb PRG1 @@ -3767,6 +3799,7 @@ GAME( 1996, ejanhs, 0, ejanhs, spi_ejanhs, seibuspi_state, ejanhs, GAME( 1996, rdft, 0, spi, spi_3button, seibuspi_state, rdft, ROT270, "Seibu Kaihatsu", "Raiden Fighters (Japan set 1)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) GAME( 1996, rdftj, rdft, spi, spi_3button, seibuspi_state, rdft, ROT270, "Seibu Kaihatsu", "Raiden Fighters (Japan set 2)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) +GAME( 1996, rdftja, rdft, spi, spi_3button, seibuspi_state, rdft, ROT270, "Seibu Kaihatsu", "Raiden Fighters (Japan set 3)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) GAME( 1996, rdftu, rdft, spi, spi_3button, seibuspi_state, rdft, ROT270, "Seibu Kaihatsu (Fabtek license)", "Raiden Fighters (US)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) GAME( 1996, rdftam, rdft, spi, spi_3button, seibuspi_state, rdft, ROT270, "Seibu Kaihatsu (Metrotainment license)", "Raiden Fighters (Hong Kong)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) GAME( 1996, rdftadi, rdft, spi, spi_3button, seibuspi_state, rdft, ROT270, "Seibu Kaihatsu (Dream Island license)", "Raiden Fighters (Korea)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index eb9cbc2d146..e7ee4700e5e 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -8513,6 +8513,7 @@ rdftu // (c) 1996 Seibu Kaihatsu (Fabtek license) rdftau // (c) 1996 Seibu Kaihatsu rdftauge // (c) 1996 Seibu Kaihatsu (Tuning license and text display, but Australia region code) rdftj // (c) 1996 Seibu Kaihatsu +rdftja // (c) 1996 Seibu Kaihatsu rdftadi // (c) 1996 Seibu Kaihatsu (Dream Island license) rdftam // (c) 1996 Seibu Kaihatsu (Metrotainment license) rdftit // (c) 1996 Seibu Kaihatsu @@ -9536,8 +9537,8 @@ grdnstrmj // (c) 1998 (Japan) redfoxwp2 // (c) 1998 (China) redfoxwp2a // (c) 1998 (China) bubl2000 // (c) 1998 Tuning -hotbubl // (c) 1998 Pandora -hotbublk // (c) 1998 Pandora (Korea) +hotbubl // (c) 1998 Pandora (Korea, Nudes) +hotbubla // (c) 1998 Pandora (Korea) popspops // (c) 1999 firehawk // (c) 2001 ESD firehawkv // (c) 2001 ESD diff --git a/src/mess/drivers/hh_hmcs40.c b/src/mess/drivers/hh_hmcs40.c index 1ea775a681b..6ad6a6e1209 100644 --- a/src/mess/drivers/hh_hmcs40.c +++ b/src/mess/drivers/hh_hmcs40.c @@ -101,6 +101,14 @@ public: DECLARE_WRITE16_MEMBER(alnattck_grid_w); DECLARE_READ16_MEMBER(alnattck_input_r); + DECLARE_WRITE8_MEMBER(cpacman_plate_w); + DECLARE_WRITE16_MEMBER(cpacman_grid_w); + DECLARE_READ8_MEMBER(cpacman_input_r); + + DECLARE_WRITE8_MEMBER(cmspacmn_plate_w); + DECLARE_WRITE16_MEMBER(cmspacmn_grid_w); + DECLARE_READ8_MEMBER(cmspacmn_input_r); + void egalaxn2_display(); DECLARE_WRITE8_MEMBER(egalaxn2_plate_w); DECLARE_WRITE16_MEMBER(egalaxn2_grid_w); @@ -257,7 +265,7 @@ WRITE8_MEMBER(hh_hmcs40_state::bambball_plate_w) m_plate = (m_plate & ~(0xf << shift)) | (data << shift); // update display - UINT32 plate = BITSWAP16(m_plate,13,8,4,12,9,10,14,1,7,0,15,11,6,3,5,2); + UINT16 plate = BITSWAP16(m_plate,13,8,4,12,9,10,14,1,7,0,15,11,6,3,5,2); display_matrix(16, 9, plate, m_grid); } @@ -452,7 +460,7 @@ READ16_MEMBER(hh_hmcs40_state::alnattck_input_r) static INPUT_PORTS_START( alnattck ) PORT_START("IN.0") // D5 D7 - PORT_CONFNAME( 0x01, 0x00, "Skill" ) + PORT_CONFNAME( 0x01, 0x00, "Skill Level" ) PORT_CONFSETTING( 0x00, "1" ) PORT_CONFSETTING( 0x01, "2" ) @@ -583,7 +591,65 @@ MACHINE_CONFIG_END ***************************************************************************/ +WRITE8_MEMBER(hh_hmcs40_state::cpacman_plate_w) +{ + // R1x-R6x, D1,D2: vfd matrix plate + int shift = (offset - HMCS40_PORT_R1X) * 4; + m_plate = (m_plate & ~(0xf << shift)) | (data << shift); + + // update display + + // 31,30,29,28,27,13,14, 8,12,11,10, 9,15,16,17,18, 7, 6, 5, 4,19,20,21,22, 0, 1, 2, 3,23,24,25,26 + // 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 + // 31,30,29,28,27, 0, 1, 2, 3, 8, 9,10,11,16,17,18,19,25,26,23,22,21,20,24,15,14,13,12, 4, 5, 6, 7 + + UINT16 grid = BITSWAP16(m_grid,15,14,13,12,11,0,1,2,3,4,5,6,7,8,9,10); + UINT32 plate = BITSWAP32(m_plate,31,30,29,28,27,0,1,2,3,8,9,10,11,16,17,18,19,25,26,23,22,21,20,24,15,14,13,12,4,5,6,7); + plate |= 0x2000; // plate 13(maze) is always on + + display_matrix(27, 11, plate, grid); +} + +WRITE16_MEMBER(hh_hmcs40_state::cpacman_grid_w) +{ + // D0: speaker out + m_speaker->level_w(data & 1); + + // D13-D15: input mux + m_inp_mux = data >> 13 & 7; + + // D5-D15: vfd matrix grid + m_grid = data >> 5 & 0x7ff; + + // D1,D2: plate 8,14 (update display there) + cpacman_plate_w(space, 6 + HMCS40_PORT_R1X, data >> 1 & 3); +} + +READ8_MEMBER(hh_hmcs40_state::cpacman_input_r) +{ + // R0x: multiplexed inputs + return read_inputs(3); +} + + static INPUT_PORTS_START( cpacman ) + PORT_START("IN.0") // D13 port R0x + PORT_CONFNAME( 0x01, 0x01, "Skill Level" ) + PORT_CONFSETTING( 0x01, "1" ) + PORT_CONFSETTING( 0x00, "2" ) + PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // D14 port R0x + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) + + PORT_START("IN.2") // D15 port R0x + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) INPUT_PORTS_END @@ -591,8 +657,16 @@ static MACHINE_CONFIG_START( cpacman, hh_hmcs40_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", HD38820, 400000) // approximation - RC osc. + MCFG_HMCS40_READ_R_CB(0, READ8(hh_hmcs40_state, cpacman_input_r)) + MCFG_HMCS40_WRITE_R_CB(1, WRITE8(hh_hmcs40_state, cpacman_plate_w)) + MCFG_HMCS40_WRITE_R_CB(2, WRITE8(hh_hmcs40_state, cpacman_plate_w)) + MCFG_HMCS40_WRITE_R_CB(3, WRITE8(hh_hmcs40_state, cpacman_plate_w)) + MCFG_HMCS40_WRITE_R_CB(4, WRITE8(hh_hmcs40_state, cpacman_plate_w)) + MCFG_HMCS40_WRITE_R_CB(5, WRITE8(hh_hmcs40_state, cpacman_plate_w)) + MCFG_HMCS40_WRITE_R_CB(6, WRITE8(hh_hmcs40_state, cpacman_plate_w)) + MCFG_HMCS40_WRITE_D_CB(WRITE16(hh_hmcs40_state, cpacman_grid_w)) -// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1)) + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1)) MCFG_DEFAULT_LAYOUT(layout_hh_hmcs40_test) /* no video! */ @@ -618,7 +692,65 @@ MACHINE_CONFIG_END ***************************************************************************/ +WRITE8_MEMBER(hh_hmcs40_state::cmspacmn_plate_w) +{ + // R1x-R6x, D0,D1: vfd matrix plate + int shift = (offset - HMCS40_PORT_R1X) * 4; + m_plate = (m_plate & ~(0xf << shift)) | (data << shift); + + // update display + // 22,17 18,13 + // 31,30,29,28,27,26, 6,11,23,21,20,19,15, 2, 1, 0,32,31,30,29,12, 9, 4, 8,25,26,27,28,16,10, 3, 5 + // 31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 + // 14,13,12, 4, 5, 6, 7,24,23,25,22,21,20,13,24, 3,19,14,12,11,24, 2,10, 8, 7,25, 0, 9, 1,18,17,16 + + UINT16 grid = BITSWAP16(m_grid,15,14,13,11,10,9,8,7,6,5,4,3,2,1,1,0); + UINT64 plate = BIT(m_plate,15)<<32 | BITSWAP32(m_plate,14,13,12,4,5,6,7,24,23,25,22,21,20,13,24,3,19,14,12,11,24,2,10,8,7,25,0,9,1,18,17,16); + plate |= 0x1004080; // plates 7,14,24 are always on + + display_matrix(33, 12, plate, grid); +} + +WRITE16_MEMBER(hh_hmcs40_state::cmspacmn_grid_w) +{ + // D2: speaker out + m_speaker->level_w(data >> 2 & 1); + + // D13-D15: input mux + m_inp_mux = data >> 13 & 7; + + // D5-D15: vfd matrix grid + m_grid = data >> 5 & 0x7ff; + + // D0,D1: plate 11+17,6+22 (update display there) + cmspacmn_plate_w(space, 6 + HMCS40_PORT_R1X, data & 3); +} + +READ8_MEMBER(hh_hmcs40_state::cmspacmn_input_r) +{ + // R0x: multiplexed inputs + return read_inputs(3); +} + + static INPUT_PORTS_START( cmspacmn ) + PORT_START("IN.0") // D13 port R0x + PORT_CONFNAME( 0x01, 0x01, "Skill Level" ) + PORT_CONFSETTING( 0x01, "1" ) + PORT_CONFSETTING( 0x00, "2" ) + PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("IN.1") // D14 port R0x + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) + + PORT_START("IN.2") // D15 port R0x + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) INPUT_PORTS_END @@ -626,8 +758,16 @@ static MACHINE_CONFIG_START( cmspacmn, hh_hmcs40_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", HD38820, 400000) // approximation - RC osc. + MCFG_HMCS40_READ_R_CB(0, READ8(hh_hmcs40_state, cmspacmn_input_r)) + MCFG_HMCS40_WRITE_R_CB(1, WRITE8(hh_hmcs40_state, cmspacmn_plate_w)) + MCFG_HMCS40_WRITE_R_CB(2, WRITE8(hh_hmcs40_state, cmspacmn_plate_w)) + MCFG_HMCS40_WRITE_R_CB(3, WRITE8(hh_hmcs40_state, cmspacmn_plate_w)) + MCFG_HMCS40_WRITE_R_CB(4, WRITE8(hh_hmcs40_state, cmspacmn_plate_w)) + MCFG_HMCS40_WRITE_R_CB(5, WRITE8(hh_hmcs40_state, cmspacmn_plate_w)) + MCFG_HMCS40_WRITE_R_CB(6, WRITE8(hh_hmcs40_state, cmspacmn_plate_w)) + MCFG_HMCS40_WRITE_D_CB(WRITE16(hh_hmcs40_state, cmspacmn_grid_w)) -// MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1)) + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1)) MCFG_DEFAULT_LAYOUT(layout_hh_hmcs40_test) /* no video! */ @@ -654,7 +794,7 @@ MACHINE_CONFIG_END void hh_hmcs40_state::egalaxn2_display() { - UINT32 grid = BITSWAP16(m_grid,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14); + UINT16 grid = BITSWAP16(m_grid,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14); UINT32 plate = BITSWAP24(m_plate,23,22,21,20,15,14,13,12,7,6,5,4,3,2,1,0,19,18,17,16,11,10,9,8); display_matrix(24, 15, plate, grid); @@ -675,7 +815,7 @@ WRITE16_MEMBER(hh_hmcs40_state::egalaxn2_grid_w) WRITE8_MEMBER(hh_hmcs40_state::egalaxn2_plate_w) { - // R10-R63: vfd matrix plate + // R1x-R6x: vfd matrix plate int shift = (offset - HMCS40_PORT_R1X) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -710,7 +850,7 @@ static INPUT_PORTS_START( egalaxn2 ) PORT_START("IN.3") // D4 port R0x PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_CONFNAME( 0x02, 0x02, "Skill" ) + PORT_CONFNAME( 0x02, 0x02, "Skill Level" ) PORT_CONFSETTING( 0x02, "1" ) PORT_CONFSETTING( 0x00, "2" ) PORT_CONFNAME( 0x0c, 0x00, "Players" ) @@ -758,7 +898,7 @@ MACHINE_CONFIG_END ***************************************************************************/ -// hardware is identical to Galaxian 2, so we can use those handlers +// i/o hookup is identical to Galaxian 2, so we can use those handlers // note: plate numbers are 0-23, not 1-24(with 0 always-on) static INPUT_PORTS_START( epacman2 ) @@ -782,7 +922,7 @@ static INPUT_PORTS_START( epacman2 ) PORT_START("IN.3") // D4 port R0x PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_CONFNAME( 0x02, 0x02, "Skill" ) + PORT_CONFNAME( 0x02, 0x02, "Skill Level" ) PORT_CONFSETTING( 0x00, "1" ) PORT_CONFSETTING( 0x02, "2" ) PORT_CONFNAME( 0x0c, 0x04, "Players" ) diff --git a/src/mess/drivers/hh_tms1k.c b/src/mess/drivers/hh_tms1k.c index b17b40e2035..3d67cf4a99c 100644 --- a/src/mess/drivers/hh_tms1k.c +++ b/src/mess/drivers/hh_tms1k.c @@ -7,7 +7,7 @@ part of a series is (or will be) in its own driver. Let's use this driver for a list of known devices and their serials, - excluding TI's own products (see for example ticalc1x.c, tispeak.c) + excluding TI's own products (see ticalc1x.c, tispeak.c) serial device etc. -------------------------------------------------------------------- @@ -21,8 +21,8 @@ @MP1204 TMS1100 1980, Entex Baseball 3 *MP1221 TMS1100 1980, Entex Raise The Devil *MP1312 TMS1100 198?, Tandy/RadioShack Science Fair Microcomputer Trainer - *MP2139 ? 1982, Gakken Galaxy Invader 1000 - *MP2788 ? 1980, Bandai Flight Time + *MP2139 ? 1982, Gakken Galaxy Invader 1000 (? note: VFD-capable) + *MP2788 ? 1980, Bandai Flight Time (? note: VFD-capable) @MP3226 TMS1000 1978, Milton Bradley Simon *MP3301 TMS1000 1979, Milton Bradley Bigtrak *MP3320A TMS1000 1979, Coleco Head to Head Basketball @@ -45,12 +45,14 @@ M34047 TMS1100 1982, MicroVision cartridge: Super Blockbuster @MP6100A TMS0980 1979, Ideal Electronic Detective @MP6101B TMS0980 1979, Parker Brothers Stop Thief - *MP6361 ? 1983, Defender Strikes + *MP6361 ? 1983, Defender Strikes (? note: VFD-capable) *MP7303 TMS1400? 19??, Tiger 7-in-1 Sports Stadium @MP7313 TMS1400 1980, Parker Brothers Bank Shot @MP7314 TMS1400 1980, Parker Brothers Split Second MP7332 TMS1400 1981, Milton Bradley Dark Tower -> mbdtower.c @MP7334 TMS1400 1981, Coleco Total Control 4 + *MP7573 ? 1981, Entex Select-a-Game cartridge: Football (? note: 40-pin, VFD-capable) + *M95041 ? 1983, Tsukuda Game Pachinko (? note: 40-pin, VFD-capable) inconsistent: @@ -1049,7 +1051,7 @@ void hh_tms1k_state::ebball3_set_clock() // MCU clock is from an RC circuit(R=47K, C=33pf) oscillating by default at ~340kHz, // but on PRO, the difficulty switch adds an extra 150K resistor to Vdd to speed // it up to around ~440kHz. - m_maincpu->set_unscaled_clock(m_inp_matrix[3]->read() & 1 ? 440000 : 340000); + m_maincpu->set_unscaled_clock((m_inp_matrix[3]->read() & 1) ? 440000 : 340000); } INPUT_CHANGED_MEMBER(hh_tms1k_state::ebball3_difficulty_switch) @@ -1568,17 +1570,38 @@ static INPUT_PORTS_START( ssimon ) PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN.6") // fake - PORT_CONFNAME( 0x03, 0x00, "Speed" ) //PORT_CHANGED_MEMBER(DEVICE_SELF, hh_tms1k_state, ssimon_speed_switch, NULL) + PORT_CONFNAME( 0x03, 0x01, "Speed" ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_tms1k_state, ssimon_speed_switch, NULL) PORT_CONFSETTING( 0x00, "Simple" ) PORT_CONFSETTING( 0x01, "Normal" ) PORT_CONFSETTING( 0x02, "Super" ) INPUT_PORTS_END +void hh_tms1k_state::ssimon_set_clock() +{ + // MCU clock is from an RC circuit with C=100pf, R=x depending on speed switch: + // 0 Simple: R=51K -> ~200kHz + // 1 Normal: R=37K -> ~275kHz + // 2 Super: R=22K -> ~400kHz + UINT8 inp = m_inp_matrix[6]->read(); + m_maincpu->set_unscaled_clock((inp & 2) ? 400000 : ((inp & 1) ? 275000 : 200000)); +} + +INPUT_CHANGED_MEMBER(hh_tms1k_state::ssimon_speed_switch) +{ + ssimon_set_clock(); +} + +MACHINE_RESET_MEMBER(hh_tms1k_state, ssimon) +{ + machine_reset(); + ssimon_set_clock(); +} + static MACHINE_CONFIG_START( ssimon, hh_tms1k_state ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", TMS1100, 350000) // x + MCFG_CPU_ADD("maincpu", TMS1100, 275000) // see ssimon_set_clock MCFG_TMS1XXX_READ_K_CB(READ8(hh_tms1k_state, ssimon_read_k)) MCFG_TMS1XXX_WRITE_R_CB(WRITE16(hh_tms1k_state, ssimon_write_r)) MCFG_TMS1XXX_WRITE_O_CB(WRITE16(hh_tms1k_state, ssimon_write_o)) @@ -1586,6 +1609,8 @@ static MACHINE_CONFIG_START( ssimon, hh_tms1k_state ) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_tms1k_state, display_decay_tick, attotime::from_msec(1)) MCFG_DEFAULT_LAYOUT(layout_ssimon) + MCFG_MACHINE_RESET_OVERRIDE(hh_tms1k_state, ssimon) + /* no video! */ /* sound hardware */ diff --git a/src/mess/drivers/hh_ucom4.c b/src/mess/drivers/hh_ucom4.c index a91ffa52340..f0265b9cb1a 100644 --- a/src/mess/drivers/hh_ucom4.c +++ b/src/mess/drivers/hh_ucom4.c @@ -265,6 +265,7 @@ UINT8 hh_ucom4_state::read_inputs(int columns) void hh_ucom4_state::ssfball_display() { UINT32 plate = BITSWAP24(m_plate,23,22,21,20,19,11,7,3,12,17,13,18,16,14,15,10,9,8,0,1,2,4,5,6); + display_matrix(16, 9, plate, m_grid); } @@ -374,6 +375,7 @@ MACHINE_CONFIG_END void hh_ucom4_state::splasfgt_display() { UINT32 plate = BITSWAP24(m_plate,23,22,21,20,19,18,17,13,1,0,8,6,0,10,11,14,15,16,9,5,7,4,2,3); + display_matrix(16, 9, plate, m_grid); } @@ -511,7 +513,7 @@ MACHINE_CONFIG_END void hh_ucom4_state::astrocmd_display() { - UINT32 grid = BITSWAP16(m_grid,15,14,13,12,11,10,9,8,4,5,6,7,0,1,2,3); + UINT16 grid = BITSWAP16(m_grid,15,14,13,12,11,10,9,8,4,5,6,7,0,1,2,3); UINT32 plate = BITSWAP24(m_plate,23,22,21,20,19,3,2,12,13,14,15,16,17,18,0,1,4,8,5,9,7,11,6,10); display_matrix(17, 9, plate, grid); @@ -611,7 +613,7 @@ WRITE8_MEMBER(hh_ucom4_state::edracula_grid_w) int shift = (offset - NEC_UCOM4_PORTC) * 4; m_grid = (m_grid & ~(0xf << shift)) | (data << shift); - display_matrix(18, 8, m_plate, m_grid); + display_matrix(18+1, 8, m_plate, m_grid); } WRITE8_MEMBER(hh_ucom4_state::edracula_plate_w) @@ -623,8 +625,9 @@ WRITE8_MEMBER(hh_ucom4_state::edracula_plate_w) // E,F,G,H,I01: vfd matrix plate int shift = (offset - NEC_UCOM4_PORTE) * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); + m_plate |= 1 << 18; // for always-on plates - display_matrix(18, 8, m_plate, m_grid); + display_matrix(18+1, 8, m_plate, m_grid); } @@ -767,7 +770,7 @@ void hh_ucom4_state::tmtennis_set_clock() // MCU clock is from an LC circuit oscillating by default at ~360kHz, // but on PRO1, the difficulty switch puts a capacitor across the LC circuit // to slow it down to ~260kHz. - m_maincpu->set_unscaled_clock(m_inp_matrix[1]->read() & 0x100 ? 260000 : 360000); + m_maincpu->set_unscaled_clock((m_inp_matrix[1]->read() & 0x100) ? 260000 : 360000); } INPUT_CHANGED_MEMBER(hh_ucom4_state::tmtennis_difficulty_switch) @@ -834,10 +837,11 @@ MACHINE_CONFIG_END void hh_ucom4_state::tmpacman_display() { - UINT32 grid = BITSWAP8(m_grid,0,1,2,3,4,5,6,7); + UINT16 grid = BITSWAP8(m_grid,0,1,2,3,4,5,6,7); UINT32 plate = BITSWAP24(m_plate,23,22,21,20,19,16,17,18,11,10,9,8,0,2,3,1,4,5,6,7,12,13,14,15); + plate |= 0x100; // plate 8(maze) is always on - display_matrix(19, 8, plate | 0x100, grid); // plate 8 (maze) is always on + display_matrix(19, 8, plate, grid); } WRITE8_MEMBER(hh_ucom4_state::tmpacman_grid_w) @@ -947,9 +951,10 @@ WRITE8_MEMBER(hh_ucom4_state::alnchase_output_w) // E23,F,G,H,I: vfd matrix plate int shift = (offset - NEC_UCOM4_PORTE) * 4; m_plate = ((m_plate << 2 & ~(0xf << shift)) | (data << shift)) >> 2; + m_plate |= 1 << 17; // for always-on plates } - display_matrix(17, 9, m_plate, m_grid); + display_matrix(17+1, 9, m_plate, m_grid); } READ8_MEMBER(hh_ucom4_state::alnchase_input_r) diff --git a/src/mess/includes/hh_tms1k.h b/src/mess/includes/hh_tms1k.h index f45f040609c..c8695899f2c 100644 --- a/src/mess/includes/hh_tms1k.h +++ b/src/mess/includes/hh_tms1k.h @@ -112,6 +112,9 @@ public: DECLARE_WRITE16_MEMBER(ssimon_write_r); DECLARE_WRITE16_MEMBER(ssimon_write_o); DECLARE_READ8_MEMBER(ssimon_read_k); + void ssimon_set_clock(); + DECLARE_INPUT_CHANGED_MEMBER(ssimon_speed_switch); + DECLARE_MACHINE_RESET(ssimon); DECLARE_WRITE16_MEMBER(cnsector_write_r); DECLARE_WRITE16_MEMBER(cnsector_write_o); |