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-rw-r--r--src/emu/cpu/adsp2100/adsp2100.c8
-rw-r--r--src/emu/cpu/ccpu/ccpu.c2
-rw-r--r--src/emu/cpu/cdp1802/cdp1802.h18
-rw-r--r--src/emu/cpu/cop400/440ops.c4
-rw-r--r--src/emu/cpu/cop400/cop410.c4
-rw-r--r--src/emu/cpu/cop400/cop420.c2
-rw-r--r--src/emu/cpu/cop400/cop440.c10
-rw-r--r--src/emu/cpu/cubeqcpu/cubeqcpu.c8
-rw-r--r--src/emu/cpu/drcbec.c2
-rw-r--r--src/emu/cpu/h83002/h8_16.c2
-rw-r--r--src/emu/cpu/h83002/h8_8.c8
-rw-r--r--src/emu/cpu/h83002/h8periph.c2
-rw-r--r--src/emu/cpu/h83002/h8priv.h2
-rw-r--r--src/emu/cpu/hd6309/6309ops.c2
-rw-r--r--src/emu/cpu/hd6309/hd6309.c20
-rw-r--r--src/emu/cpu/i8x41/i8x41.c16
-rw-r--r--src/emu/cpu/i960/i960.c388
-rw-r--r--src/emu/cpu/jaguar/jaguar.c8
-rw-r--r--src/emu/cpu/m37710/m37710op.h4
-rw-r--r--src/emu/cpu/m6502/m65ce02.c2
-rw-r--r--src/emu/cpu/m6800/6800ops.c200
-rw-r--r--src/emu/cpu/m6800/m6800.c42
-rw-r--r--src/emu/cpu/m6800/m6800.h2
-rw-r--r--src/emu/cpu/m68000/m68kcpu.h2
-rw-r--r--src/emu/cpu/m6805/6805ops.c8
-rw-r--r--src/emu/cpu/m6809/6809tbl.c2
-rw-r--r--src/emu/cpu/m6809/m6809.c4
-rw-r--r--src/emu/cpu/mb86233/mb86233.c2
-rw-r--r--src/emu/cpu/mcs48/mcs48.c2
-rw-r--r--src/emu/cpu/mcs51/mcs51.c6
-rw-r--r--src/emu/cpu/mips/psx.c2
-rw-r--r--src/emu/cpu/mips/r3000.c2
-rw-r--r--src/emu/cpu/nec/nec.c14
-rw-r--r--src/emu/cpu/pdp1/pdp1.c2
-rw-r--r--src/emu/cpu/pdp1/pdp1dasm.c14
-rw-r--r--src/emu/cpu/pdp1/tx0.c4
-rw-r--r--src/emu/cpu/s2650/s2650.c10
-rw-r--r--src/emu/cpu/sc61860/sc61860.c2
-rw-r--r--src/emu/cpu/ssp1601/ssp1601.c4
-rw-r--r--src/emu/cpu/tms32010/tms32010.c4
-rw-r--r--src/emu/cpu/tms34010/tms34010.c16
-rw-r--r--src/emu/cpuexec.c62
-rw-r--r--src/emu/cpuexec.h8
-rw-r--r--src/emu/debug/debugcmd.c12
-rw-r--r--src/emu/debug/debugcmt.c2
-rw-r--r--src/emu/debug/debugcpu.c42
-rw-r--r--src/emu/mame.c4
-rw-r--r--src/emu/memory.c84
-rw-r--r--src/emu/memory.h8
-rw-r--r--src/emu/sound/okim6258.c6
-rw-r--r--src/emu/video/mc6845.c8
-rw-r--r--src/emu/video/mc6845.h6
52 files changed, 549 insertions, 549 deletions
diff --git a/src/emu/cpu/adsp2100/adsp2100.c b/src/emu/cpu/adsp2100/adsp2100.c
index 6a829f20af9..ce9a7d8efd9 100644
--- a/src/emu/cpu/adsp2100/adsp2100.c
+++ b/src/emu/cpu/adsp2100/adsp2100.c
@@ -260,12 +260,12 @@ typedef struct
RX_CALLBACK sport_rx_callback;
TX_CALLBACK sport_tx_callback;
ADSP2100_TIMER_CALLBACK timer_fired_func;
-
+
/* Memory spaces */
const address_space *program;
const address_space *data;
const address_space *io;
-
+
} adsp2100_state;
@@ -574,11 +574,11 @@ static adsp2100_state *adsp21xx_init(const device_config *device, int index, int
/* set the IRQ callback */
adsp->irq_callback = irqcallback;
adsp->device = device;
-
+
adsp->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
adsp->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA);
adsp->io = cpu_get_address_space(device, ADDRESS_SPACE_IO);
-
+
/* set up ALU register pointers */
diff --git a/src/emu/cpu/ccpu/ccpu.c b/src/emu/cpu/ccpu/ccpu.c
index e4256bcfa38..fdf2e33d50c 100644
--- a/src/emu/cpu/ccpu/ccpu.c
+++ b/src/emu/cpu/ccpu/ccpu.c
@@ -38,7 +38,7 @@ typedef struct
UINT8 waiting;
UINT8 watchdog;
-
+
const device_config *device;
const address_space *program;
const address_space *data;
diff --git a/src/emu/cpu/cdp1802/cdp1802.h b/src/emu/cpu/cdp1802/cdp1802.h
index c8649287d15..836720e861b 100644
--- a/src/emu/cpu/cdp1802/cdp1802.h
+++ b/src/emu/cpu/cdp1802/cdp1802.h
@@ -5,15 +5,15 @@
/*
- RCA COSMAC Series Microprocessors
-
- Type Internal ROM Internal RAM Timer
- -----------------------------------------------------
- CDP1802 none none no
- CDP1803 ? ? ?
- CDP1804 2 KB 64 bytes yes
- CDP1805 none 64 bytes yes
- CDP1806 none none yes
+ RCA COSMAC Series Microprocessors
+
+ Type Internal ROM Internal RAM Timer
+ -----------------------------------------------------
+ CDP1802 none none no
+ CDP1803 ? ? ?
+ CDP1804 2 KB 64 bytes yes
+ CDP1805 none 64 bytes yes
+ CDP1806 none none yes
*/
diff --git a/src/emu/cpu/cop400/440ops.c b/src/emu/cpu/cop400/440ops.c
index 9642394daa7..7934de01090 100644
--- a/src/emu/cpu/cop400/440ops.c
+++ b/src/emu/cpu/cop400/440ops.c
@@ -19,7 +19,7 @@
Binary:
Data Flow: A -> T7:4
- RAM(B) -> T3:0
+ RAM(B) -> T3:0
Description: Copy A, RAM to T
@@ -38,7 +38,7 @@ INSTRUCTION( camt )
Binary:
Data Flow: T7:4 -> RAM(B)
- T3:0 -> A
+ T3:0 -> A
Description: Copy T to RAM, A
diff --git a/src/emu/cpu/cop400/cop410.c b/src/emu/cpu/cop400/cop410.c
index 527858e8771..2337cf8a190 100644
--- a/src/emu/cpu/cop400/cop410.c
+++ b/src/emu/cpu/cop400/cop410.c
@@ -13,8 +13,8 @@
TODO:
- - COP413/COP414/COP415/COP405
- - get rid of LBIOps/InstLen
+ - COP413/COP414/COP415/COP405
+ - get rid of LBIOps/InstLen
- run interrupt test suite
- run production test suite
- run microbus test suite
diff --git a/src/emu/cpu/cop400/cop420.c b/src/emu/cpu/cop400/cop420.c
index 95227a5ec36..1f79ee4b2b7 100644
--- a/src/emu/cpu/cop400/cop420.c
+++ b/src/emu/cpu/cop400/cop420.c
@@ -13,7 +13,7 @@
TODO:
- - get rid of LBIOps/InstLen
+ - get rid of LBIOps/InstLen
- when is the microbus int cleared?
- CKO sync input
- save internal RAM when CKO is RAM power supply pin
diff --git a/src/emu/cpu/cop400/cop440.c b/src/emu/cpu/cop400/cop440.c
index 7bd4fb8d4d2..a611a487626 100644
--- a/src/emu/cpu/cop400/cop440.c
+++ b/src/emu/cpu/cop400/cop440.c
@@ -13,11 +13,11 @@
TODO:
- - rename this file to cop444.c
- - COP440/COP441/COP442 (new registers: 4-bit H, 8-bit R; some new opcodes, 2Kx8 ROM, 160x4 RAM)
- - COP404 emulation configuration inputs
- - RAM bus width
- - get rid of LBIOps/InstLen
+ - rename this file to cop444.c
+ - COP440/COP441/COP442 (new registers: 4-bit H, 8-bit R; some new opcodes, 2Kx8 ROM, 160x4 RAM)
+ - COP404 emulation configuration inputs
+ - RAM bus width
+ - get rid of LBIOps/InstLen
- when is the microbus int cleared?
- CKO sync input
- save internal RAM when CKO is RAM power supply pin
diff --git a/src/emu/cpu/cubeqcpu/cubeqcpu.c b/src/emu/cpu/cubeqcpu/cubeqcpu.c
index 5b68822f378..6f749d701b7 100644
--- a/src/emu/cpu/cubeqcpu/cubeqcpu.c
+++ b/src/emu/cpu/cubeqcpu/cubeqcpu.c
@@ -127,7 +127,7 @@ typedef struct
void (*dac_w)(UINT16 data);
UINT16 *sound_data;
-
+
const device_config *device;
const address_space *program;
} cquestsnd_state;
@@ -166,7 +166,7 @@ typedef struct
UINT8 wc;
UINT8 rc;
UINT8 clkcnt;
-
+
const device_config *device;
const address_space *program;
} cquestrot_state;
@@ -210,7 +210,7 @@ typedef struct
UINT8 *ptr_ram;
UINT32 *e_stack;
UINT32 *o_stack;
-
+
const device_config *device;
const address_space *program;
@@ -352,7 +352,7 @@ static CPU_INIT( cquestsnd )
cquestsnd.dac_w = _config->dac_w;
cquestsnd.sound_data = (UINT16*)memory_region(device->machine, _config->sound_data_region);
-
+
cquestsnd.device = device;
cquestsnd.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
diff --git a/src/emu/cpu/drcbec.c b/src/emu/cpu/drcbec.c
index 66c80ba4a49..8b3712389fa 100644
--- a/src/emu/cpu/drcbec.c
+++ b/src/emu/cpu/drcbec.c
@@ -309,7 +309,7 @@ const drcbe_interface drcbe_c_be_interface =
static drcbe_state *drcbec_alloc(drcuml_state *drcuml, drccache *cache, const device_config *device, UINT32 flags, int modes, int addrbits, int ignorebits)
{
int spacenum;
-
+
/* allocate space in the cache for our state */
drcbe_state *drcbe = drccache_memory_alloc(cache, sizeof(*drcbe));
if (drcbe == NULL)
diff --git a/src/emu/cpu/h83002/h8_16.c b/src/emu/cpu/h83002/h8_16.c
index fe715c55750..1cf02227094 100644
--- a/src/emu/cpu/h83002/h8_16.c
+++ b/src/emu/cpu/h83002/h8_16.c
@@ -545,7 +545,7 @@ ADDRESS_MAP_END
CPU_GET_INFO( h8_3002 )
{
- h83xx_state *h8 = (device != NULL) ? device->token : NULL;
+ h83xx_state *h8 = (device != NULL) ? device->token : NULL;
switch(state) {
// Interface functions and variables
diff --git a/src/emu/cpu/h83002/h8_8.c b/src/emu/cpu/h83002/h8_8.c
index 76afb3e644d..f4bc54d1566 100644
--- a/src/emu/cpu/h83002/h8_8.c
+++ b/src/emu/cpu/h83002/h8_8.c
@@ -47,11 +47,11 @@ INLINE void h8_mem_write16(h83xx_state *h8, offs_t address, UINT16 data)
INLINE UINT32 h8_mem_read32(h83xx_state *h8, offs_t address)
{
UINT32 result = memory_read_byte(h8->program, address) << 24;
- result |= memory_read_byte(h8->program, address+1) << 16;
- result |= memory_read_byte(h8->program, address+2) << 8;
+ result |= memory_read_byte(h8->program, address+1) << 16;
+ result |= memory_read_byte(h8->program, address+2) << 8;
result |= memory_read_byte(h8->program, address+3);
- return result;
+ return result;
}
INLINE void h8_mem_write32(h83xx_state *h8, offs_t address, UINT32 data)
@@ -521,7 +521,7 @@ ADDRESS_MAP_END
CPU_GET_INFO( h8_3334 )
{
- h83xx_state *h8 = (device != NULL) ? device->token : NULL;
+ h83xx_state *h8 = (device != NULL) ? device->token : NULL;
switch(state) {
// Interface functions and variables
diff --git a/src/emu/cpu/h83002/h8periph.c b/src/emu/cpu/h83002/h8periph.c
index 0d81936ac62..7a36fd629d1 100644
--- a/src/emu/cpu/h83002/h8periph.c
+++ b/src/emu/cpu/h83002/h8periph.c
@@ -468,7 +468,7 @@ static void h8itu_3007_timer_expire(h83xx_state *h8, int tnum)
{
int base = 0x68 + (tnum*8);
UINT16 count;
-
+
count = (h8->per_regs[base + 0x2]<<8) | h8->per_regs[base + 0x3];
count++;
diff --git a/src/emu/cpu/h83002/h8priv.h b/src/emu/cpu/h83002/h8priv.h
index 5607a7d1882..ff112885cb6 100644
--- a/src/emu/cpu/h83002/h8priv.h
+++ b/src/emu/cpu/h83002/h8priv.h
@@ -16,7 +16,7 @@ struct _h83xx_state
UINT32 h8err;
UINT32 regs[8];
UINT32 pc, ppc;
-
+
UINT32 h8_IRQrequestH, h8_IRQrequestL;
INT32 cyccnt;
diff --git a/src/emu/cpu/hd6309/6309ops.c b/src/emu/cpu/hd6309/6309ops.c
index 246b54c7149..5cd2c921099 100644
--- a/src/emu/cpu/hd6309/6309ops.c
+++ b/src/emu/cpu/hd6309/6309ops.c
@@ -12,7 +12,7 @@ HNZVC
*/
-#define OP_HANDLER(_name) INLINE void _name (m68_state_t *m68_state)
+#define OP_HANDLER(_name) INLINE void _name (m68_state_t *m68_state)
OP_HANDLER( illegal )
{
diff --git a/src/emu/cpu/hd6309/hd6309.c b/src/emu/cpu/hd6309/hd6309.c
index 1176962112b..42d3213bbc5 100644
--- a/src/emu/cpu/hd6309/hd6309.c
+++ b/src/emu/cpu/hd6309/hd6309.c
@@ -134,16 +134,16 @@ struct _m68_state_t
const device_config *device;
int icount;
PAIR ea; /* effective address */
-
+
/* Memory spaces */
const address_space *program;
-
+
UINT8 int_state; /* SYNC and CWAI flags */
UINT8 nmi_state;
UINT8 dummy_byte;
UINT8 *regTable[4];
-
+
UINT8 const *cycle_counts_page0;
UINT8 const *cycle_counts_page01;
UINT8 const *cycle_counts_page11;
@@ -184,7 +184,7 @@ INLINE void fetch_effective_address( m68_state_t *m68_state );
#define pW m68_state->w
/* #define pQ m68_state->q */
-/* #define pZ m68_state->z */
+/* #define pZ m68_state->z */
#define PPC m68_state->ppc.w.l
#define PC m68_state->pc.w.l
@@ -512,7 +512,7 @@ static STATE_POSTLOAD( hd6309_postload )
{
const device_config *device = param;
m68_state_t *m68_state = device->token;
-
+
UpdateState(m68_state);
}
@@ -523,14 +523,14 @@ static STATE_POSTLOAD( hd6309_postload )
static CPU_INIT( hd6309 )
{
m68_state_t *m68_state = device->token;
-
+
m68_state->irq_callback = irqcallback;
m68_state->device = device;
m68_state->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
/* setup regtable */
-
+
m68_state->regTable[0] = &(CC);
m68_state->regTable[1] = &(A);
m68_state->regTable[2] = &(B);
@@ -558,7 +558,7 @@ static CPU_INIT( hd6309 )
static CPU_RESET( hd6309 )
{
m68_state_t *m68_state = device->token;
-
+
m68_state->int_state = 0;
m68_state->nmi_state = CLEAR_LINE;
m68_state->irq_state[0] = CLEAR_LINE;
@@ -642,7 +642,7 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state)
static CPU_EXECUTE( hd6309 ) /* NS 970908 */
{
m68_state_t *m68_state = device->token;
-
+
m68_state->icount = cycles - m68_state->extra_cycles;
m68_state->extra_cycles = 0;
@@ -1229,7 +1229,7 @@ INLINE void fetch_effective_address( m68_state_t *m68_state )
static CPU_SET_INFO( hd6309 )
{
m68_state_t *m68_state = device->token;
-
+
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
diff --git a/src/emu/cpu/i8x41/i8x41.c b/src/emu/cpu/i8x41/i8x41.c
index 3fa04de5332..1ad3b1aa211 100644
--- a/src/emu/cpu/i8x41/i8x41.c
+++ b/src/emu/cpu/i8x41/i8x41.c
@@ -103,14 +103,14 @@
*****************************************************************************/
/*
- Chip RAM ROM
- ---- --- ---
+ Chip RAM ROM
+ ---- --- ---
8041 128 1k (ROM)
8741 128 1k (EPROM)
8042 256 2k (ROM)
8742 256 2k (EPROM)
- http://cpucharts.wallsoferyx.net/icmatrix0.html
+ http://cpucharts.wallsoferyx.net/icmatrix0.html
*/
@@ -839,7 +839,7 @@ static const UINT8 i8x41_cycles[] = {
static CPU_INIT( i8x41 )
{
upi41_state_t *upi41_state = device->token;
-
+
upi41_state->irq_callback = irqcallback;
upi41_state->device = device;
upi41_state->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@@ -882,7 +882,7 @@ static CPU_INIT( i8042 )
static CPU_RESET( i8x41 )
{
upi41_state_t *upi41_state = device->token;
-
+
upi41_state->ppc = 0;
upi41_state->pc = 0;
upi41_state->timer = 0;
@@ -891,7 +891,7 @@ static CPU_RESET( i8x41 )
upi41_state->psw = 0;
upi41_state->state = 0;
upi41_state->enable = 0;
-
+
ENABLE = IBFI | TCNTI;
DBBI = 0xff;
DBBO = 0xff;
@@ -1103,7 +1103,7 @@ ADDRESS_MAP_END
static CPU_SET_INFO( i8x41 )
{
upi41_state_t *upi41_state = device->token;
-
+
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@@ -1195,7 +1195,7 @@ static CPU_SET_INFO( i8x41 )
CPU_GET_INFO( i8041 )
{
upi41_state_t *upi41_state = (device != NULL) ? device->token : NULL;
-
+
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
diff --git a/src/emu/cpu/i960/i960.c b/src/emu/cpu/i960/i960.c
index 6ea3de928b0..75f2514c79d 100644
--- a/src/emu/cpu/i960/i960.c
+++ b/src/emu/cpu/i960/i960.c
@@ -35,7 +35,7 @@ struct _i960_state_t {
cpu_irq_callback irq_cb;
const device_config *device;
const address_space *program;
-
+
int icount;
};
@@ -613,63 +613,63 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
i960->icount--;
i960->IP += get_disp(i960, opcode);
break;
-
+
case 0x09: // call
do_call(i960, i960->IP+get_disp(i960, opcode), 0, i960->r[I960_SP]);
break;
-
+
case 0x0a: // ret
do_ret(i960);
break;
-
+
case 0x0b: // bal
i960->icount -= 5;
i960->r[0x1e] = i960->IP;
i960->IP += get_disp(i960, opcode);
break;
-
+
case 0x10: // bno
i960->icount--;
if(!(i960->AC & 7)) {
i960->IP += get_disp(i960, opcode);
}
break;
-
+
case 0x11: // bg
i960->icount--;
bxx(i960, opcode, 1);
break;
-
+
case 0x12: // be
i960->icount--;
bxx(i960, opcode, 2);
break;
-
+
case 0x13: // bge
i960->icount--;
bxx(i960, opcode, 3);
break;
-
+
case 0x14: // bl
i960->icount--;
bxx(i960, opcode, 4);
break;
-
+
case 0x15: // bne
i960->icount--;
bxx(i960, opcode, 5);
break;
-
+
case 0x16: // ble
i960->icount--;
bxx(i960, opcode, 6);
break;
-
+
case 0x17: // bo
i960->icount--;
bxx(i960, opcode, 7);
break;
-
+
case 0x20: // testno
i960->icount--;
if(!(i960->AC & 7))
@@ -677,42 +677,42 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
else
i960->r[(opcode>>19) & 0x1f] = 0;
break;
-
+
case 0x21: // testg
i960->icount--;
test(i960, opcode, 1);
break;
-
+
case 0x22: // teste
i960->icount--;
test(i960, opcode, 2);
break;
-
+
case 0x23: // testge
i960->icount--;
test(i960, opcode, 3);
break;
-
+
case 0x24: // testl
i960->icount--;
test(i960, opcode, 4);
break;
-
+
case 0x25: // testne
i960->icount--;
test(i960, opcode, 5);
break;
-
+
case 0x26: // testle
i960->icount--;
test(i960, opcode, 6);
break;
-
+
case 0x27: // testo
i960->icount--;
test(i960, opcode, 7);
break;
-
+
case 0x30: // bbc
i960->icount -= 4;
t1 = get_1_ci(i960, opcode) & 0x1f;
@@ -723,7 +723,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
} else
i960->AC &= ~7;
break;
-
+
case 0x31: // cmp0bg
i960->icount -= 4;
t1 = get_1_ci(i960, opcode);
@@ -731,7 +731,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_u(i960, t1, t2);
bxx_s(i960, opcode, 1);
break;
-
+
case 0x32: // cmpobe
i960->icount -= 4;
t1 = get_1_ci(i960, opcode);
@@ -739,7 +739,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_u(i960, t1, t2);
bxx_s(i960, opcode, 2);
break;
-
+
case 0x33: // cmpobge
i960->icount -= 4;
t1 = get_1_ci(i960, opcode);
@@ -747,7 +747,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_u(i960, t1, t2);
bxx_s(i960, opcode, 3);
break;
-
+
case 0x34: // cmpobl
i960->icount -= 4;
t1 = get_1_ci(i960, opcode);
@@ -755,7 +755,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_u(i960, t1, t2);
bxx_s(i960, opcode, 4);
break;
-
+
case 0x35: // cmpobne
i960->icount -= 4;
t1 = get_1_ci(i960, opcode);
@@ -763,7 +763,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_u(i960, t1, t2);
bxx_s(i960, opcode, 5);
break;
-
+
case 0x36: // cmpoble
i960->icount -= 4;
t1 = get_1_ci(i960, opcode);
@@ -771,7 +771,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_u(i960, t1, t2);
bxx_s(i960, opcode, 6);
break;
-
+
case 0x37: // bbs
i960->icount -= 4;
t1 = get_1_ci(i960, opcode) & 0x1f;
@@ -782,7 +782,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
} else
i960->AC &= ~7;
break;
-
+
case 0x39: // cmpibg
i960->icount -= 4;
t1 = get_1_ci(i960, opcode);
@@ -790,7 +790,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_s(i960, t1, t2);
bxx_s(i960, opcode, 1);
break;
-
+
case 0x3a: // cmpibe
i960->icount -= 4;
t1 = get_1_ci(i960, opcode);
@@ -798,7 +798,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_s(i960, t1, t2);
bxx_s(i960, opcode, 2);
break;
-
+
case 0x3b: // cmpibge
i960->icount -= 4;
t1 = get_1_ci(i960, opcode);
@@ -806,7 +806,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_s(i960, t1, t2);
bxx_s(i960, opcode, 3);
break;
-
+
case 0x3c: // cmpibl
i960->icount -= 4;
t1 = get_1_ci(i960, opcode);
@@ -814,7 +814,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_s(i960, t1, t2);
bxx_s(i960, opcode, 4);
break;
-
+
case 0x3d: // cmpibne
i960->icount -= 4;
t1 = get_1_ci(i960, opcode);
@@ -822,7 +822,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_s(i960, t1, t2);
bxx_s(i960, opcode, 5);
break;
-
+
case 0x3e: // cmpible
i960->icount -= 4;
t1 = get_1_ci(i960, opcode);
@@ -830,7 +830,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_s(i960, t1, t2);
bxx_s(i960, opcode, 6);
break;
-
+
case 0x58:
switch((opcode >> 7) & 0xf) {
case 0x0: // notbit
@@ -839,90 +839,90 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2 ^ (1<<(t1 & 31)));
break;
-
+
case 0x1: // and
i960->icount--;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2 & t1);
break;
-
+
case 0x2: // andnot
i960->icount--;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2 & ~t1);
break;
-
+
case 0x3: // setbit
i960->icount -= 2;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2 | (1<<(t1 & 31)));
break;
-
+
case 0x4: // notand
i960->icount--;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, (~t2) & t1);
break;
-
+
case 0x6: // xor
i960->icount--;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2 ^ t1);
break;
-
+
case 0x7: // or
i960->icount--;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2 | t1);
break;
-
+
case 0x8: // nor
i960->icount--;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, ((~t2) ^ (~t1)));
break;
-
+
case 0x9: // xnor
i960->icount--;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, ~(t2 ^ t1));
break;
-
+
case 0xa: // not
i960->icount--;
t1 = get_1_ri(i960, opcode);
set_ri(i960, opcode, ~t1);
break;
-
+
case 0xb: // ornot
i960->icount--;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2 | ~t1);
break;
-
+
case 0xc: // clrbit
i960->icount -= 2;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2 & ~(1<<(t1 & 31)));
break;
-
+
case 0xe: // nand
i960->icount -= 2;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, ~t2 | ~t1);
break;
-
+
case 0xf: // alterbit
i960->icount -= 2;
t1 = get_1_ri(i960, opcode);
@@ -932,12 +932,12 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
else
set_ri(i960, opcode, t2 & ~(1<<(t1 & 31)));
break;
-
+
default:
fatalerror("I960: %x: Unhandled 58.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x59:
switch((opcode >> 7) & 0xf) {
case 0x0: // addo
@@ -946,7 +946,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2+t1);
break;
-
+
case 0x1: // addi
// #### overflow
i960->icount--;
@@ -954,14 +954,14 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2+t1);
break;
-
+
case 0x2: // subo
i960->icount--;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2-t1);
break;
-
+
case 0x3: // subi
// #### overflow
i960->icount--;
@@ -969,14 +969,14 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2-t1);
break;
-
+
case 0x8: // shro
i960->icount--;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2>>t1);
break;
-
+
case 0xa: // shrdi
i960->icount--;
t1 = get_1_ri(i960, opcode);
@@ -989,28 +989,28 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
} else
set_ri(i960, opcode, t2>>t1);
break;
-
+
case 0xb: // shri
i960->icount--;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, ((INT32)t2)>>t1);
break;
-
+
case 0xc: // shlo
i960->icount--;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2<<t1);
break;
-
+
case 0xd: // rotate
i960->icount--;
t1 = get_1_ri(i960, opcode) & 0x1f;
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, (t2<<t1)|(t2>>(32-t1)));
break;
-
+
case 0xe: // shli
// missing overflow
i960->icount--;
@@ -1018,12 +1018,12 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2<<t1);
break;
-
+
default:
fatalerror("I960: %x: Unhandled 59.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x5a:
switch((opcode >> 7) & 0xf) {
case 0x0: // cmpo
@@ -1032,14 +1032,14 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t2 = get_2_ri(i960, opcode);
cmp_u(i960, t1, t2);
break;
-
+
case 0x1: // cmpi
i960->icount--;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
cmp_s(i960, t1, t2);
break;
-
+
case 0x2: // concmpo
i960->icount--;
if(!(i960->AC & 0x4)) {
@@ -1048,7 +1048,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
concmp_u(i960, t1, t2);
}
break;
-
+
case 0x3: // concmpi
i960->icount--;
if(!(i960->AC & 0x4)) {
@@ -1057,7 +1057,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
concmp_s(i960, t1, t2);
}
break;
-
+
case 0x4: // cmpinco
i960->icount -= 2;
t1 = get_1_ri(i960, opcode);
@@ -1065,7 +1065,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_u(i960, t1, t2);
set_ri(i960, opcode, t2+1);
break;
-
+
case 0x5: // cmpinci
i960->icount -= 2;
t1 = get_1_ri(i960, opcode);
@@ -1073,7 +1073,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_s(i960, t1, t2);
set_ri(i960, opcode, t2+1);
break;
-
+
case 0x6: // cmpdeco
i960->icount -= 2;
t1 = get_1_ri(i960, opcode);
@@ -1081,7 +1081,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_u(i960, t1, t2);
set_ri(i960, opcode, t2-1);
break;
-
+
case 0x7: // cmpdeci
i960->icount -= 2;
t1 = get_1_ri(i960, opcode);
@@ -1089,7 +1089,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
cmp_s(i960, t1, t2);
set_ri(i960, opcode, t2-1);
break;
-
+
case 0xe: // chkbit
i960->icount -= 2;
t1 = get_1_ri(i960, opcode) & 0x1f;
@@ -1099,24 +1099,24 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
else
i960->AC &= ~7;
break;
-
+
default:
fatalerror("I960: %x: Unhandled 5a.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x5b:
switch((opcode >> 7) & 0xf) {
case 0x0: // addc
{
UINT64 res;
-
+
i960->icount -= 2;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
res = t2+(t1+((i960->AC>>1)&1));
set_ri(i960, opcode, res&0xffffffff);
-
+
i960->AC &= ~0x3; // clear C and V
// set carry
i960->AC |= ((res) & (((UINT64)1) << 32)) ? 0x2 : 0;
@@ -1124,17 +1124,17 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
i960->AC |= (((res) ^ (t1)) & ((res) ^ (t2)) & 0x80000000) ? 1: 0;
}
break;
-
+
case 0x2: // subc
{
UINT64 res;
-
+
i960->icount -= 2;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
res = t2-(t1+((i960->AC>>1)&1));
set_ri(i960, opcode, res&0xffffffff);
-
+
i960->AC &= ~0x3; // clear C and V
// set carry
i960->AC |= ((res) & (((UINT64)1) << 32)) ? 0x2 : 0;
@@ -1142,12 +1142,12 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
i960->AC |= (((t2) ^ (t1)) & ((t2) ^ (res)) & 0x80000000) ? 1 : 0;
}
break;
-
+
default:
fatalerror("I960: %x: Unhandled 5b.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x5c:
switch((opcode >> 7) & 0xf) {
case 0xc: // mov
@@ -1155,12 +1155,12 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t1 = get_1_ri(i960, opcode);
set_ri(i960, opcode, t1);
break;
-
+
default:
fatalerror("I960: %x: Unhandled 5c.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x5d:
switch((opcode >> 7) & 0xf) {
case 0xc: // movl
@@ -1172,12 +1172,12 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
} else
memcpy(i960->r+t2, i960->r+(opcode & 0x1f), 2*sizeof(UINT32));
break;
-
+
default:
fatalerror("I960: %x: Unhandled 5d.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x5e:
switch((opcode >> 7) & 0xf) {
case 0xc: // movt
@@ -1189,12 +1189,12 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
} else
memcpy(i960->r+t2, i960->r+(opcode & 0x1f), 3*sizeof(UINT32));
break;
-
+
default:
fatalerror("I960: %x: Unhandled 5e.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x5f:
switch((opcode >> 7) & 0xf) {
case 0xc: // movq
@@ -1206,12 +1206,12 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
} else
memcpy(i960->r+t2, i960->r+(opcode & 0x1f), 4*sizeof(UINT32));
break;
-
+
default:
fatalerror("I960: %x: Unhandled 5f.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x60:
switch((opcode >> 7) & 0xf) {
case 0x0: // synmov
@@ -1225,7 +1225,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
memory_write_dword_32le(i960->program, t1, memory_read_dword_32le(i960->program, t2));
i960->AC = (i960->AC & ~7) | 2;
break;
-
+
case 0x2: // synmovq
i960->icount -= 12;
t1 = get_1_ri(i960, opcode);
@@ -1240,24 +1240,24 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
}
i960->AC = (i960->AC & ~7) | 2;
break;
-
+
default:
fatalerror("I960: %x: Unhandled 60.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x64:
switch((opcode >> 7) & 0xf) {
case 0x0: // spanbit
{
UINT32 res = 0xffffffff;
int i;
-
+
i960->icount -= 10;
-
+
t1 = get_1_ri(i960, opcode);
i960->AC &= ~7;
-
+
for (i = 31; i >= 0; i--)
{
if (!(t1 & (1<<i)))
@@ -1267,21 +1267,21 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
break;
}
}
-
+
set_ri(i960, opcode, res);
}
break;
-
+
case 0x1: // scanbit
{
UINT32 res = 0xffffffff;
int i;
-
+
i960->icount -= 10;
-
+
t1 = get_1_ri(i960, opcode);
i960->AC &= ~7;
-
+
for (i = 31; i >= 0; i--)
{
if (t1 & (1<<i))
@@ -1291,11 +1291,11 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
break;
}
}
-
+
set_ri(i960, opcode, res);
}
break;
-
+
case 0x5: // modac
i960->icount -= 10;
t1 = get_1_ri(i960, opcode);
@@ -1303,12 +1303,12 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
set_ri(i960, opcode, i960->AC);
i960->AC = (i960->AC & ~t1) | (t2 & t1);
break;
-
+
default:
fatalerror("I960: %x: Unhandled 64.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x65:
switch((opcode >> 7) & 0xf) {
case 0x5: // modpc
@@ -1318,12 +1318,12 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
i960->PC = (i960->PC & ~t2) | (i960->r[(opcode>>19) & 0x1f] & t2);
set_ri(i960, opcode, t1);
break;
-
+
default:
fatalerror("I960: %x: Unhandled 65.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x66:
switch((opcode >> 7) & 0xf) {
case 0xd: // flushreg
@@ -1334,7 +1334,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
for(t1=0; t1 < i960->rcache_pos; t1++)
{
int i;
-
+
for (i = 0; i < 0x10; i++)
{
memory_write_dword_32le(i960->program, i960->rcache_frame_addr[t1] + (i * sizeof(UINT32)), i960->rcache[t1][i]);
@@ -1342,59 +1342,59 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
}
i960->rcache_pos = 0;
break;
-
+
default:
fatalerror("I960: %x: Unhandled 66.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x67:
switch((opcode >> 7) & 0xf) {
case 0x0: // emul
i960->icount -= 37;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
-
+
set_ri64(i960, opcode, (INT64)t1 * (INT64)t2);
break;
-
+
case 0x1: // ediv
i960->icount -= 37;
{
UINT64 src1, src2;
-
+
src1 = get_1_ri(i960, opcode);
src2 = get_2_ri64(i960, opcode);
-
+
set_ri2(i960, opcode, src2 % src1, src2 / src1);
}
break;
-
+
case 0x4: // cvtir
i960->icount -= 30;
t1 = get_1_ri(i960, opcode);
set_rif(i960, opcode, (double)(INT32)t1);
break;
-
+
case 0x6: // scalerl
i960->icount -= 30;
t1 = get_1_ri(i960, opcode);
t2f = get_2_rifl(i960, opcode);
set_rifl(i960, opcode, t2f * pow(2.0, (double)(INT32)t1));
break;
-
+
case 0x7: // scaler
i960->icount -= 30;
t1 = get_1_ri(i960, opcode);
t2f = get_2_rif(i960, opcode);
set_rif(i960, opcode, t2f * pow(2.0, (double)(INT32)t1));
break;
-
+
default:
fatalerror("I960: %x: Unhandled 67.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x68:
switch((opcode >> 7) & 0xf) {
case 0x0: // atanr
@@ -1403,40 +1403,40 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t2f = get_2_rif(i960, opcode);
set_rif(i960, opcode, atan2(t2f, t1f));
break;
-
+
case 0x1: // logepr
i960->icount -= 400;
t1f = get_1_rif(i960, opcode);
t2f = get_2_rif(i960, opcode);
set_rif(i960, opcode, t2f*log(t1f+1.0)/log(2.0));
break;
-
+
case 0x3: // remr
i960->icount -= 67; // (67 to 75878 depending on opcodes!!!)
t1f = get_1_rif(i960, opcode);
t2f = get_2_rif(i960, opcode);
set_rif(i960, opcode, fmod(t2f, t1f));
break;
-
+
case 0x5: // cmpr
i960->icount -= 10;
t1f = get_1_rif(i960, opcode);
t2f = get_2_rif(i960, opcode);
cmp_d(i960, t1f, t2f);
break;
-
+
case 0x8: // sqrtr
i960->icount -= 104;
t1f = get_1_rif(i960, opcode);
set_rif(i960, opcode, sqrt(t1f));
break;
-
+
case 0xa: // logbnr
i960->icount -= 37;
t1f = get_1_rif(i960, opcode);
set_rif(i960, opcode, logb(t1f));
break;
-
+
case 0xb: // roundr
{
INT32 st1 = get_1_rif(i960, opcode);
@@ -1444,30 +1444,30 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
set_rif(i960, opcode, (double)st1);
}
break;
-
+
case 0xc: // sinr
i960->icount -= 406;
t1f = get_1_rif(i960, opcode);
set_rif(i960, opcode, sin(t1f));
break;
-
+
case 0xd: // cosr
i960->icount -= 406;
t1f = get_1_rif(i960, opcode);
set_rif(i960, opcode, sin(t1f));
break;
-
+
case 0xe: // tanr
i960->icount -= 293;
t1f = get_1_rif(i960, opcode);
set_rif(i960, opcode, tan(t1f));
break;
-
+
default:
fatalerror("I960: %x: Unhandled 68.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x69:
switch((opcode >> 7) & 0xf) {
case 0x0: // atanrl
@@ -1476,38 +1476,38 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t2f = get_2_rifl(i960, opcode);
set_rifl(i960, opcode, atan2(t2f, t1f));
break;
-
+
case 0x2: // logrl
i960->icount -= 438;
t1f = get_1_rifl(i960, opcode);
set_rifl(i960, opcode, log(t1f));
break;
-
+
case 0x5: // cmprl
i960->icount -= 12;
t1f = get_1_rifl(i960, opcode);
t2f = get_2_rifl(i960, opcode);
cmp_d(i960, t1f, t2f);
break;
-
+
case 0x8: // sqrtrl
i960->icount -= 104;
t1f = get_1_rifl(i960, opcode);
set_rifl(i960, opcode, sqrt(t1f));
break;
-
+
case 0x9: // exprl
i960->icount -= 334;
t1f = get_1_rifl(i960, opcode);
set_rifl(i960, opcode, pow(2.0, t1f)-1.0);
break;
-
+
case 0xa: // logbnrl
i960->icount -= 37;
t1f = get_1_rifl(i960, opcode);
set_rifl(i960, opcode, logb(t1f));
break;
-
+
case 0xb: // roundrl
{
INT32 st1 = get_1_rifl(i960, opcode);
@@ -1515,30 +1515,30 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
set_rifl(i960, opcode, (double)st1);
}
break;
-
+
case 0xc: // sinrl
i960->icount -= 441;
t1f = get_1_rifl(i960, opcode);
set_rifl(i960, opcode, sin(t1f));
break;
-
+
case 0xd: // cosrl
i960->icount -= 441;
t1f = get_1_rifl(i960, opcode);
set_rifl(i960, opcode, cos(t1f));
break;
-
+
case 0xe: // tanrl
i960->icount -= 323;
t1f = get_1_rifl(i960, opcode);
set_rifl(i960, opcode, tan(t1f));
break;
-
+
default:
fatalerror("I960: %x: Unhandled 69.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x6c:
switch((opcode >> 7) & 0xf) {
case 0x0: // cvtri
@@ -1556,30 +1556,30 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
}
set_ri(i960, opcode, (INT32)t2f);
break;
-
+
case 0x2: // cvtzri
i960->icount -= 43;
t1f = get_1_rif(i960, opcode);
set_ri(i960, opcode, (INT32)t1f);
break;
-
+
case 0x3: // cvtzril
i960->icount -= 44;
t1f = get_1_rif(i960, opcode);
set_ri64(i960, opcode, (INT64)t1f);
break;
-
+
case 0x9: // movr
i960->icount -= 5;
t1f = get_1_rif(i960, opcode);
set_rif(i960, opcode, t1f);
break;
-
+
default:
fatalerror("I960: %x: Unhandled 6c.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x6d:
switch((opcode >> 7) & 0xf) {
case 0x9: // movrl
@@ -1587,20 +1587,20 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t1f = get_1_rifl(i960, opcode);
set_rifl(i960, opcode, t1f);
break;
-
+
default:
fatalerror("I960: %x: Unhandled 6d.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x6e:
switch((opcode >> 7) & 0xf) {
case 0x1: // movre
{
UINT32 *src=0, *dst=0;
-
+
i960->icount -= 8;
-
+
if(!(opcode & 0x00000800)) {
src = (UINT32 *)&i960->r[opcode & 0x1e];
} else {
@@ -1608,12 +1608,12 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
if(idx < 4)
src = (UINT32 *)&i960->fp[idx];
}
-
+
if(!(opcode & 0x00002000)) {
dst = (UINT32 *)&i960->r[(opcode>>19) & 0x1e];
} else if(!(opcode & 0x00e00000))
dst = (UINT32 *)&i960->fp[(opcode>>19) & 3];
-
+
dst[0] = src[0];
dst[1] = src[1];
dst[2] = src[2]&0xffff;
@@ -1623,7 +1623,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
i960->icount -= 8;
t1f = get_1_rifl(i960, opcode);
t2f = get_2_rifl(i960, opcode);
-
+
if (t2f >= 0.0)
set_rifl(i960, opcode, fabs(t1f));
else
@@ -1633,7 +1633,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
fatalerror("I960: %x: Unhandled 6e.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x70:
switch((opcode >> 7) & 0xf) {
case 0x1: // mulo
@@ -1642,14 +1642,14 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2*t1);
break;
-
+
case 0x8: // remo
i960->icount -= 37;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, t2%t1);
break;
-
+
case 0xb: // divo
i960->icount -= 37;
t1 = get_1_ri(i960, opcode);
@@ -1659,12 +1659,12 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
else
set_ri(i960, opcode, t2/t1);
break;
-
+
default:
fatalerror("I960: %x: Unhandled 70.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x74:
switch((opcode >> 7) & 0xf) {
case 0x1: // muli
@@ -1673,14 +1673,14 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, ((INT32)t2)*((INT32)t1));
break;
-
+
case 0x8: // remi
i960->icount -= 37;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, ((INT32)t2)%((INT32)t1));
break;
-
+
case 0x9:{// modi
INT32 src1, src2, dst;
i960->icount -= 37;
@@ -1692,19 +1692,19 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
set_ri(i960, opcode, dst);
break;
}
-
+
case 0xb: // divi
i960->icount -= 37;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
set_ri(i960, opcode, ((INT32)t2)/((INT32)t1));
break;
-
+
default:
fatalerror("I960: %x: Unhandled 74.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x78:
switch((opcode >> 7) & 0xf) {
case 0xb: // divr
@@ -1713,33 +1713,33 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t2f = get_2_rif(i960, opcode);
set_rif(i960, opcode, t2f/t1f);
break;
-
+
case 0xc: // mulr
i960->icount -= 18;
t1f = get_1_rif(i960, opcode);
t2f = get_2_rif(i960, opcode);
set_rif(i960, opcode, t2f*t1f);
break;
-
+
case 0xd: // subr
i960->icount -= 10;
t1f = get_1_rif(i960, opcode);
t2f = get_2_rif(i960, opcode);
set_rif(i960, opcode, t2f-t1f);
break;
-
+
case 0xf: // addr
i960->icount -= 10;
t1f = get_1_rif(i960, opcode);
t2f = get_2_rif(i960, opcode);
set_rif(i960, opcode, t2f+t1f);
break;
-
+
default:
fatalerror("I960: %x: Unhandled 78.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x79:
switch((opcode >> 7) & 0xf) {
case 0xb: // divrl
@@ -1748,85 +1748,85 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t2f = get_2_rifl(i960, opcode);
set_rifl(i960, opcode, t2f/t1f);
break;
-
+
case 0xc: // mulrl
i960->icount -= 36;
t1f = get_1_rifl(i960, opcode);
t2f = get_2_rifl(i960, opcode);
set_rifl(i960, opcode, t2f*t1f);
break;
-
+
case 0xd: // subrl
i960->icount -= 13;
t1f = get_1_rifl(i960, opcode);
t2f = get_2_rifl(i960, opcode);
set_rifl(i960, opcode, t2f-t1f);
break;
-
+
case 0xf: // addrl
i960->icount -= 13;
t1f = get_1_rifl(i960, opcode);
t2f = get_2_rifl(i960, opcode);
set_rifl(i960, opcode, t2f+t1f);
break;
-
+
default:
fatalerror("I960: %x: Unhandled 79.%x", i960->PIP, (opcode >> 7) & 0xf);
}
break;
-
+
case 0x80: // ldob
i960->icount -= 4;
i960->r[(opcode>>19)&0x1f] = memory_read_byte_32le(i960->program, get_ea(i960, opcode));
break;
-
+
case 0x82: // stob
i960->icount -= 2;
memory_write_byte_32le(i960->program, get_ea(i960, opcode), i960->r[(opcode>>19)&0x1f]);
break;
-
+
case 0x84: // bx
i960->icount -= 3;
i960->IP = get_ea(i960, opcode);
break;
-
+
case 0x85: // balx
i960->icount -= 5;
t1 = get_ea(i960, opcode);
i960->r[(opcode>>19)&0x1f] = i960->IP;
i960->IP = t1;
break;
-
+
case 0x86: // callx
t1 = get_ea(i960, opcode);
do_call(i960, t1, 0, i960->r[I960_SP]);
break;
-
+
case 0x88: // ldos
i960->icount -= 4;
i960->r[(opcode>>19)&0x1f] = i960_read_word_unaligned(i960, get_ea(i960, opcode));
break;
-
+
case 0x8a: // stos
i960->icount -= 2;
i960_write_word_unaligned(i960, get_ea(i960, opcode), i960->r[(opcode>>19)&0x1f]);
break;
-
+
case 0x8c: // lda
i960->icount--;
i960->r[(opcode>>19)&0x1f] = get_ea(i960, opcode);
break;
-
+
case 0x90: // ld
i960->icount -= 4;
i960->r[(opcode>>19)&0x1f] = i960_read_dword_unaligned(i960, get_ea(i960, opcode));
break;
-
+
case 0x92: // st
i960->icount -= 2;
i960_write_dword_unaligned(i960, get_ea(i960, opcode), i960->r[(opcode>>19)&0x1f]);
break;
-
+
case 0x98:{// ldl
int i;
i960->icount -= 5;
@@ -1840,7 +1840,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
}
break;
}
-
+
case 0x9a:{// stl
int i;
i960->icount -= 3;
@@ -1854,7 +1854,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
}
break;
}
-
+
case 0xa0:{// ldt
int i;
i960->icount -= 6;
@@ -1868,7 +1868,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
}
break;
}
-
+
case 0xa2:{// stt
int i;
i960->icount -= 4;
@@ -1882,7 +1882,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
}
break;
}
-
+
case 0xb0:{// ldq
int i;
i960->icount -= 7;
@@ -1896,7 +1896,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
}
break;
}
-
+
case 0xb2:{// stq
int i;
i960->icount -= 5;
@@ -1910,31 +1910,31 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
}
break;
}
-
+
case 0xc0: // ldib
i960->icount -= 4;
i960->r[(opcode>>19)&0x1f] = (INT8)memory_read_byte_32le(i960->program, get_ea(i960, opcode));
break;
-
+
case 0xc2: // stib
i960->icount -= 2;
memory_write_byte_32le(i960->program, get_ea(i960, opcode), i960->r[(opcode>>19)&0x1f]);
break;
-
+
case 0xc8: // ldis
i960->icount -= 4;
i960->r[(opcode>>19)&0x1f] = (INT16)i960_read_word_unaligned(i960, get_ea(i960, opcode));
break;
-
+
case 0xca: // stis
i960->icount -= 2;
i960_write_word_unaligned(i960, get_ea(i960, opcode), i960->r[(opcode>>19)&0x1f]);
break;
-
+
default:
fatalerror("I960: %x: Unhandled %02x", i960->PIP, opcode >> 24);
}
-
+
}
static CPU_EXECUTE( i960 )
@@ -2037,7 +2037,7 @@ static void set_irq_line(i960_state_t *i960, int irqline, int state)
static CPU_SET_INFO( i960 )
{
i960_state_t *i960 = device->token;
-
+
if(state >= CPUINFO_INT_REGISTER+I960_R0 && state <= CPUINFO_INT_REGISTER + I960_G15) {
i960->r[state - (CPUINFO_INT_REGISTER + I960_R0)] = info->i;
return;
@@ -2059,7 +2059,7 @@ static CPU_SET_INFO( i960 )
static CPU_INIT( i960 )
{
i960_state_t *i960 = device->token;
-
+
i960->irq_cb = irqcallback;
i960->device = device;
i960->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@@ -2092,7 +2092,7 @@ static CPU_DISASSEMBLE( i960 )
static CPU_RESET( i960 )
{
i960_state_t *i960 = device->token;
-
+
i960->SAT = memory_read_dword_32le(i960->program, 0);
i960->PRCB = memory_read_dword_32le(i960->program, 4);
i960->IP = memory_read_dword_32le(i960->program, 12);
@@ -2113,7 +2113,7 @@ static CPU_RESET( i960 )
CPU_GET_INFO( i960 )
{
i960_state_t *i960 = (device != NULL) ? device->token : NULL;
-
+
if(state >= CPUINFO_INT_REGISTER+I960_R0 && state <= CPUINFO_INT_REGISTER + I960_G15) {
info->i = i960->r[state - (CPUINFO_INT_REGISTER + I960_R0)];
return;
diff --git a/src/emu/cpu/jaguar/jaguar.c b/src/emu/cpu/jaguar/jaguar.c
index 10207b177b3..a6c89ffcf9e 100644
--- a/src/emu/cpu/jaguar/jaguar.c
+++ b/src/emu/cpu/jaguar/jaguar.c
@@ -361,7 +361,7 @@ static CPU_SET_CONTEXT( jaguar )
static void init_tables(void)
{
int i, j;
-
+
/* if we're not the first, skip */
if (table_refcount++ != 0)
{
@@ -405,7 +405,7 @@ static STATE_POSTLOAD( jaguar_postload )
{
const device_config *device = param;
jaguar_state *jaguar = device->token;
-
+
update_register_banks(jaguar);
check_irqs(jaguar);
}
@@ -498,7 +498,7 @@ static CPU_EXECUTE( jaguargpu )
do
{
UINT32 op;
-
+
/* debugging */
//if (jaguar->PC < 0xf03000 || jaguar->PC > 0xf04000) { fatalerror("GPU: jaguar->PC = %06X (ppc = %06X)", jaguar->PC, jaguar->ppc); }
jaguar->ppc = jaguar->PC;
@@ -539,7 +539,7 @@ static CPU_EXECUTE( jaguardsp )
do
{
UINT32 op;
-
+
/* debugging */
//if (jaguar->PC < 0xf1b000 || jaguar->PC > 0xf1d000) { fatalerror(stderr, "DSP: jaguar->PC = %06X", jaguar->PC); }
jaguar->ppc = jaguar->PC;
diff --git a/src/emu/cpu/m37710/m37710op.h b/src/emu/cpu/m37710/m37710op.h
index 2701d2cf7b3..a9585b71717 100644
--- a/src/emu/cpu/m37710/m37710op.h
+++ b/src/emu/cpu/m37710/m37710op.h
@@ -312,7 +312,7 @@ INLINE void m37710i_interrupt_software(m37710i_cpu_struct *m37710i_cpu, uint vec
m37710i_set_flag_i(m37710i_cpu, IFLAG_SET);
REG_PB = 0;
m37710i_jump_16(m37710i_cpu, m37710i_read_16_normal(m37710i_cpu, vector));
-}
+}
/* ======================================================================== */
/* ========================== EFFECTIVE ADDRESSES ========================= */
@@ -504,7 +504,7 @@ INLINE uint EA_DLIY(m37710i_cpu_struct *m37710i_cpu) {return OPER_24_D(m37710i_
INLINE uint EA_AXI(m37710i_cpu_struct *m37710i_cpu) {return read_16_AXI(MAKE_UINT_16(OPER_16_IMM(m37710i_cpu) + REG_X));}
INLINE uint EA_S(m37710i_cpu_struct *m37710i_cpu) {return MAKE_UINT_16(REG_S + OPER_8_IMM(m37710i_cpu));}
INLINE uint EA_SIY(m37710i_cpu_struct *m37710i_cpu) {return MAKE_UINT_16(read_16_SIY(REG_S + OPER_8_IMM(m37710i_cpu)) + REG_Y) | REG_DB;}
-
+
/* ======================================================================== */
/* =========================== OPERATION MACROS =========================== */
diff --git a/src/emu/cpu/m6502/m65ce02.c b/src/emu/cpu/m6502/m65ce02.c
index a1b5eb7651f..17e2edea7cc 100644
--- a/src/emu/cpu/m6502/m65ce02.c
+++ b/src/emu/cpu/m6502/m65ce02.c
@@ -94,7 +94,7 @@ static void default_wdmem_id(const address_space *space, offs_t address, UINT8 d
static CPU_INIT( m65ce02 )
{
m65ce02_Regs *m65ce02 = device->token;
-
+
m65ce02->rdmem_id = default_rdmem_id;
m65ce02->wrmem_id = default_wdmem_id;
m65ce02->irq_callback = irqcallback;
diff --git a/src/emu/cpu/m6800/6800ops.c b/src/emu/cpu/m6800/6800ops.c
index 70f2d8d490e..0ecb0607679 100644
--- a/src/emu/cpu/m6800/6800ops.c
+++ b/src/emu/cpu/m6800/6800ops.c
@@ -13,7 +13,7 @@ HNZVC
*/
-#define OP_HANDLER(_name) INLINE void _name (m68_state_t *m68_state)
+#define OP_HANDLER(_name) INLINE void _name (m68_state_t *m68_state)
//OP_HANDLER( illegal )
OP_HANDLER( illegal )
@@ -431,7 +431,7 @@ OP_HANDLER( mul )
{
UINT16 t;
t=A*B;
- CLR_C;
+ CLR_C;
if(t&0x80) SEC;
D=t;
}
@@ -1172,7 +1172,7 @@ OP_HANDLER( lda_di )
/* $97 STA direct -**0- */
OP_HANDLER( sta_di )
{
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(A);
DIRECT;
WM(EAD,A);
@@ -1346,7 +1346,7 @@ OP_HANDLER( lda_ix )
/* $a7 STA indexed -**0- */
OP_HANDLER( sta_ix )
{
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(A);
INDEXED;
WM(EAD,A);
@@ -1544,8 +1544,8 @@ OP_HANDLER( adca_ex )
UINT16 t,r;
EXTBYTE(t);
r = A+t+(CC&0x01);
- CLR_HNZVC;
- SET_FLAGS8(A,t,r);
+ CLR_HNZVC;
+ SET_FLAGS8(A,t,r);
SET_H(A,t,r);
A = r;
}
@@ -1554,9 +1554,9 @@ OP_HANDLER( adca_ex )
OP_HANDLER( ora_ex )
{
UINT8 t;
- EXTBYTE(t);
+ EXTBYTE(t);
A |= t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(A);
}
@@ -1564,10 +1564,10 @@ OP_HANDLER( ora_ex )
OP_HANDLER( adda_ex )
{
UINT16 t,r;
- EXTBYTE(t);
+ EXTBYTE(t);
r = A+t;
- CLR_HNZVC;
- SET_FLAGS8(A,t,r);
+ CLR_HNZVC;
+ SET_FLAGS8(A,t,r);
SET_H(A,t,r);
A = r;
}
@@ -1581,7 +1581,7 @@ OP_HANDLER( cmpx_ex )
d = X;
r = d - b.d;
CLR_NZV;
- SET_NZ16(r);
+ SET_NZ16(r);
SET_V16(d,b.d,r);
}
@@ -1593,7 +1593,7 @@ OP_HANDLER( cpx_ex )
EXTWORD(b);
d = X;
r = d - b.d;
- CLR_NZVC;
+ CLR_NZVC;
SET_FLAGS16(d,b.d,r);
}
@@ -1626,9 +1626,9 @@ OP_HANDLER( sts_ex )
OP_HANDLER( subb_im )
{
UINT16 t,r;
- IMMBYTE(t);
+ IMMBYTE(t);
r = B-t;
- CLR_NZVC;
+ CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@@ -1637,9 +1637,9 @@ OP_HANDLER( subb_im )
OP_HANDLER( cmpb_im )
{
UINT16 t,r;
- IMMBYTE(t);
+ IMMBYTE(t);
r = B-t;
- CLR_NZVC;
+ CLR_NZVC;
SET_FLAGS8(B,t,r);
}
@@ -1647,9 +1647,9 @@ OP_HANDLER( cmpb_im )
OP_HANDLER( sbcb_im )
{
UINT16 t,r;
- IMMBYTE(t);
+ IMMBYTE(t);
r = B-t-(CC&0x01);
- CLR_NZVC;
+ CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@@ -1671,9 +1671,9 @@ OP_HANDLER( addd_im )
OP_HANDLER( andb_im )
{
UINT8 t;
- IMMBYTE(t);
+ IMMBYTE(t);
B &= t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
}
@@ -1681,7 +1681,7 @@ OP_HANDLER( andb_im )
OP_HANDLER( bitb_im )
{
UINT8 t,r;
- IMMBYTE(t);
+ IMMBYTE(t);
r = B&t;
CLR_NZV;
SET_NZ8(r);
@@ -1699,9 +1699,9 @@ OP_HANDLER( ldb_im )
/* $c7 STB immediate -**0- */
OP_HANDLER( stb_im )
{
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
- IMM8;
+ IMM8;
WM(EAD,B);
}
@@ -1709,9 +1709,9 @@ OP_HANDLER( stb_im )
OP_HANDLER( eorb_im )
{
UINT8 t;
- IMMBYTE(t);
+ IMMBYTE(t);
B ^= t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
}
@@ -1719,10 +1719,10 @@ OP_HANDLER( eorb_im )
OP_HANDLER( adcb_im )
{
UINT16 t,r;
- IMMBYTE(t);
+ IMMBYTE(t);
r = B+t+(CC&0x01);
- CLR_HNZVC;
- SET_FLAGS8(B,t,r);
+ CLR_HNZVC;
+ SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@@ -1731,9 +1731,9 @@ OP_HANDLER( adcb_im )
OP_HANDLER( orb_im )
{
UINT8 t;
- IMMBYTE(t);
+ IMMBYTE(t);
B |= t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
}
@@ -1741,10 +1741,10 @@ OP_HANDLER( orb_im )
OP_HANDLER( addb_im )
{
UINT16 t,r;
- IMMBYTE(t);
+ IMMBYTE(t);
r = B+t;
- CLR_HNZVC;
- SET_FLAGS8(B,t,r);
+ CLR_HNZVC;
+ SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@@ -1788,9 +1788,9 @@ OP_HANDLER( stx_im )
OP_HANDLER( subb_di )
{
UINT16 t,r;
- DIRBYTE(t);
+ DIRBYTE(t);
r = B-t;
- CLR_NZVC;
+ CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@@ -1799,9 +1799,9 @@ OP_HANDLER( subb_di )
OP_HANDLER( cmpb_di )
{
UINT16 t,r;
- DIRBYTE(t);
+ DIRBYTE(t);
r = B-t;
- CLR_NZVC;
+ CLR_NZVC;
SET_FLAGS8(B,t,r);
}
@@ -1809,9 +1809,9 @@ OP_HANDLER( cmpb_di )
OP_HANDLER( sbcb_di )
{
UINT16 t,r;
- DIRBYTE(t);
+ DIRBYTE(t);
r = B-t-(CC&0x01);
- CLR_NZVC;
+ CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@@ -1833,9 +1833,9 @@ OP_HANDLER( addd_di )
OP_HANDLER( andb_di )
{
UINT8 t;
- DIRBYTE(t);
+ DIRBYTE(t);
B &= t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
}
@@ -1843,9 +1843,9 @@ OP_HANDLER( andb_di )
OP_HANDLER( bitb_di )
{
UINT8 t,r;
- DIRBYTE(t);
+ DIRBYTE(t);
r = B&t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(r);
}
@@ -1853,16 +1853,16 @@ OP_HANDLER( bitb_di )
OP_HANDLER( ldb_di )
{
DIRBYTE(B);
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
}
/* $d7 STB direct -**0- */
OP_HANDLER( stb_di )
{
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
- DIRECT;
+ DIRECT;
WM(EAD,B);
}
@@ -1870,9 +1870,9 @@ OP_HANDLER( stb_di )
OP_HANDLER( eorb_di )
{
UINT8 t;
- DIRBYTE(t);
+ DIRBYTE(t);
B ^= t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
}
@@ -1880,10 +1880,10 @@ OP_HANDLER( eorb_di )
OP_HANDLER( adcb_di )
{
UINT16 t,r;
- DIRBYTE(t);
+ DIRBYTE(t);
r = B+t+(CC&0x01);
- CLR_HNZVC;
- SET_FLAGS8(B,t,r);
+ CLR_HNZVC;
+ SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@@ -1892,9 +1892,9 @@ OP_HANDLER( adcb_di )
OP_HANDLER( orb_di )
{
UINT8 t;
- DIRBYTE(t);
+ DIRBYTE(t);
B |= t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
}
@@ -1902,10 +1902,10 @@ OP_HANDLER( orb_di )
OP_HANDLER( addb_di )
{
UINT16 t,r;
- DIRBYTE(t);
+ DIRBYTE(t);
r = B+t;
- CLR_HNZVC;
- SET_FLAGS8(B,t,r);
+ CLR_HNZVC;
+ SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@@ -1948,9 +1948,9 @@ OP_HANDLER( stx_di )
OP_HANDLER( subb_ix )
{
UINT16 t,r;
- IDXBYTE(t);
+ IDXBYTE(t);
r = B-t;
- CLR_NZVC;
+ CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@@ -1959,9 +1959,9 @@ OP_HANDLER( subb_ix )
OP_HANDLER( cmpb_ix )
{
UINT16 t,r;
- IDXBYTE(t);
+ IDXBYTE(t);
r = B-t;
- CLR_NZVC;
+ CLR_NZVC;
SET_FLAGS8(B,t,r);
}
@@ -1969,9 +1969,9 @@ OP_HANDLER( cmpb_ix )
OP_HANDLER( sbcb_ix )
{
UINT16 t,r;
- IDXBYTE(t);
+ IDXBYTE(t);
r = B-t-(CC&0x01);
- CLR_NZVC;
+ CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@@ -1993,9 +1993,9 @@ OP_HANDLER( addd_ix )
OP_HANDLER( andb_ix )
{
UINT8 t;
- IDXBYTE(t);
+ IDXBYTE(t);
B &= t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
}
@@ -2003,9 +2003,9 @@ OP_HANDLER( andb_ix )
OP_HANDLER( bitb_ix )
{
UINT8 t,r;
- IDXBYTE(t);
+ IDXBYTE(t);
r = B&t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(r);
}
@@ -2013,16 +2013,16 @@ OP_HANDLER( bitb_ix )
OP_HANDLER( ldb_ix )
{
IDXBYTE(B);
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
}
/* $e7 STB indexed -**0- */
OP_HANDLER( stb_ix )
{
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
- INDEXED;
+ INDEXED;
WM(EAD,B);
}
@@ -2030,9 +2030,9 @@ OP_HANDLER( stb_ix )
OP_HANDLER( eorb_ix )
{
UINT8 t;
- IDXBYTE(t);
+ IDXBYTE(t);
B ^= t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
}
@@ -2040,10 +2040,10 @@ OP_HANDLER( eorb_ix )
OP_HANDLER( adcb_ix )
{
UINT16 t,r;
- IDXBYTE(t);
+ IDXBYTE(t);
r = B+t+(CC&0x01);
- CLR_HNZVC;
- SET_FLAGS8(B,t,r);
+ CLR_HNZVC;
+ SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@@ -2052,9 +2052,9 @@ OP_HANDLER( adcb_ix )
OP_HANDLER( orb_ix )
{
UINT8 t;
- IDXBYTE(t);
+ IDXBYTE(t);
B |= t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
}
@@ -2062,10 +2062,10 @@ OP_HANDLER( orb_ix )
OP_HANDLER( addb_ix )
{
UINT16 t,r;
- IDXBYTE(t);
+ IDXBYTE(t);
r = B+t;
- CLR_HNZVC;
- SET_FLAGS8(B,t,r);
+ CLR_HNZVC;
+ SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@@ -2082,10 +2082,10 @@ OP_HANDLER( ldd_ix )
OP_HANDLER( adcx_im )
{
UINT16 t,r;
- IMMBYTE(t);
+ IMMBYTE(t);
r = X+t+(CC&0x01);
- CLR_HNZVC;
- SET_FLAGS8(X,t,r);
+ CLR_HNZVC;
+ SET_FLAGS8(X,t,r);
SET_H(X,t,r);
X = r;
}
@@ -2120,9 +2120,9 @@ OP_HANDLER( stx_ix )
OP_HANDLER( subb_ex )
{
UINT16 t,r;
- EXTBYTE(t);
+ EXTBYTE(t);
r = B-t;
- CLR_NZVC;
+ CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@@ -2131,9 +2131,9 @@ OP_HANDLER( subb_ex )
OP_HANDLER( cmpb_ex )
{
UINT16 t,r;
- EXTBYTE(t);
+ EXTBYTE(t);
r = B-t;
- CLR_NZVC;
+ CLR_NZVC;
SET_FLAGS8(B,t,r);
}
@@ -2141,9 +2141,9 @@ OP_HANDLER( cmpb_ex )
OP_HANDLER( sbcb_ex )
{
UINT16 t,r;
- EXTBYTE(t);
+ EXTBYTE(t);
r = B-t-(CC&0x01);
- CLR_NZVC;
+ CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@@ -2192,9 +2192,9 @@ OP_HANDLER( ldb_ex )
/* $f7 STB extended -**0- */
OP_HANDLER( stb_ex )
{
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
- EXTENDED;
+ EXTENDED;
WM(EAD,B);
}
@@ -2202,9 +2202,9 @@ OP_HANDLER( stb_ex )
OP_HANDLER( eorb_ex )
{
UINT8 t;
- EXTBYTE(t);
+ EXTBYTE(t);
B ^= t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
}
@@ -2214,8 +2214,8 @@ OP_HANDLER( adcb_ex )
UINT16 t,r;
EXTBYTE(t);
r = B+t+(CC&0x01);
- CLR_HNZVC;
- SET_FLAGS8(B,t,r);
+ CLR_HNZVC;
+ SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@@ -2224,9 +2224,9 @@ OP_HANDLER( adcb_ex )
OP_HANDLER( orb_ex )
{
UINT8 t;
- EXTBYTE(t);
+ EXTBYTE(t);
B |= t;
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
}
@@ -2234,10 +2234,10 @@ OP_HANDLER( orb_ex )
OP_HANDLER( addb_ex )
{
UINT16 t,r;
- EXTBYTE(t);
+ EXTBYTE(t);
r = B+t;
- CLR_HNZVC;
- SET_FLAGS8(B,t,r);
+ CLR_HNZVC;
+ SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
diff --git a/src/emu/cpu/m6800/m6800.c b/src/emu/cpu/m6800/m6800.c
index fe693714d11..2bb7bc79666 100644
--- a/src/emu/cpu/m6800/m6800.c
+++ b/src/emu/cpu/m6800/m6800.c
@@ -113,12 +113,12 @@ struct _m68_state_t
cpu_irq_callback irq_callback;
const device_config *device;
-
+
/* Memory spaces */
const address_space *program;
const address_space *data;
const address_space *io;
-
+
int extra_cycles; /* cycles used for interrupts */
void (* const * insn)(m68_state_t *); /* instruction table */
const UINT8 *cycles; /* clock cycle of instruction table */
@@ -581,19 +581,19 @@ static void m6800_check_irq2(m68_state_t *m68_state)
/* check the IRQ lines for pending interrupts */
-INLINE void CHECK_IRQ_LINES(m68_state_t *m68_state)
-{
- if( !(CC & 0x10) )
- {
- if( m68_state->irq_state[M6800_IRQ_LINE] != CLEAR_LINE )
- { /* standard IRQ */
- enter_interrupt(m68_state, "M6800#%d take IRQ1n",0xfff8);
- if( m68_state->irq_callback )
- (void)(*m68_state->irq_callback)(m68_state->device, M6800_IRQ_LINE);
- }
- else
- m6800_check_irq2(m68_state);
- }
+INLINE void CHECK_IRQ_LINES(m68_state_t *m68_state)
+{
+ if( !(CC & 0x10) )
+ {
+ if( m68_state->irq_state[M6800_IRQ_LINE] != CLEAR_LINE )
+ { /* standard IRQ */
+ enter_interrupt(m68_state, "M6800#%d take IRQ1n",0xfff8);
+ if( m68_state->irq_callback )
+ (void)(*m68_state->irq_callback)(m68_state->device, M6800_IRQ_LINE);
+ }
+ else
+ m6800_check_irq2(m68_state);
+ }
}
/* check OCI or TOI */
@@ -627,8 +627,8 @@ static void check_timer_event(m68_state_t *m68_state)
}
INLINE void increment_counter(m68_state_t *m68_state, int amount)
-{
- m68_state->icount -= amount;
+{
+ m68_state->icount -= amount;
CTD += amount;
if( CTD >= timer_next)
check_timer_event(m68_state);
@@ -736,7 +736,7 @@ static TIMER_CALLBACK(m6800_tx_tick)
static TIMER_CALLBACK(m6800_rx_tick)
{
m68_state_t *m68_state =ptr;
-
+
cpu_push_context(m68_state->device);
if (m68_state->trcsr & M6800_TRCSR_RE)
{
@@ -901,7 +901,7 @@ static CPU_INIT( m6800 )
static CPU_RESET( m6800 )
{
m68_state_t *m68_state = device->token;
-
+
SEI; /* IRQ disabled */
PCD = RM16(m68_state, 0xfffe );
@@ -953,7 +953,7 @@ static CPU_GET_CONTEXT( m6800 )
static CPU_SET_CONTEXT( m6800 )
{
m68_state_t *m68_state = src;
-
+
CHECK_IRQ_LINES(m68_state); /* HJB 990417 */
}
@@ -1706,7 +1706,7 @@ static CPU_INIT( m6808 )
m68_state->cycles = cycles_6800;
m68_state->irq_callback = irqcallback;
m68_state->device = device;
-
+
m68_state->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
m68_state->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA);
m68_state->io = cpu_get_address_space(device, ADDRESS_SPACE_IO);
diff --git a/src/emu/cpu/m6800/m6800.h b/src/emu/cpu/m6800/m6800.h
index 608e68a1ac1..2dee80e6882 100644
--- a/src/emu/cpu/m6800/m6800.h
+++ b/src/emu/cpu/m6800/m6800.h
@@ -28,7 +28,7 @@ enum
/* are set to the value returned by a read from the same port. If you need to */
/* know the DDR for e.g. port 1, do m6803_internal_registers_r(M6801_DDR1) */
-enum
+enum
{
M6803_DDR1 = 0x00,
M6803_DDR2 = 0x01,
diff --git a/src/emu/cpu/m68000/m68kcpu.h b/src/emu/cpu/m68000/m68kcpu.h
index b58894a3175..6c0118e9c15 100644
--- a/src/emu/cpu/m68000/m68kcpu.h
+++ b/src/emu/cpu/m68000/m68kcpu.h
@@ -600,7 +600,7 @@ struct _m68ki_cpu_core
m68k_memory_interface memory;
offs_t encrypted_start;
offs_t encrypted_end;
-
+
/* save state data */
UINT16 save_sr;
UINT8 save_stopped;
diff --git a/src/emu/cpu/m6805/6805ops.c b/src/emu/cpu/m6805/6805ops.c
index 9743edc8aed..f88fee3bd19 100644
--- a/src/emu/cpu/m6805/6805ops.c
+++ b/src/emu/cpu/m6805/6805ops.c
@@ -13,9 +13,9 @@ HNZC
*/
-#define OP_HANDLER(_name) INLINE void _name (void /*m68_state_t *m68_state*/)
+#define OP_HANDLER(_name) INLINE void _name (void /*m68_state_t *m68_state*/)
-#define OP_HANDLER_BIT(_name) INLINE void _name (/*m68_state_t *m68_state,*/ UINT8 bit)
+#define OP_HANDLER_BIT(_name) INLINE void _name (/*m68_state_t *m68_state,*/ UINT8 bit)
OP_HANDLER( illegal )
{
@@ -221,9 +221,9 @@ OP_HANDLER( neg_di )
OP_HANDLER( com_di )
{
UINT8 t;
- DIRBYTE(t);
+ DIRBYTE(t);
t = ~t;
- CLR_NZ;
+ CLR_NZ;
SET_NZ8(t);
SEC;
WM(EAD,t);
diff --git a/src/emu/cpu/m6809/6809tbl.c b/src/emu/cpu/m6809/6809tbl.c
index acf1efd97e2..bd2854c1475 100644
--- a/src/emu/cpu/m6809/6809tbl.c
+++ b/src/emu/cpu/m6809/6809tbl.c
@@ -395,7 +395,7 @@ static void (*const m6809_main[0x100])(m68_state_t *) = {
/* 0x9X */ suba_di,cmpa_di,sbca_di,subd_di,anda_di,bita_di,lda_di, sta_di,
eora_di,adca_di,ora_di, adda_di,cmpx_di,jsr_di, ldx_di, stx_di,
-/* 0xAX */ suba_ix,cmpa_ix,sbca_ix,subd_ix,anda_ix,bita_ix,lda_ix, sta_ix,
+/* 0xAX */ suba_ix,cmpa_ix,sbca_ix,subd_ix,anda_ix,bita_ix,lda_ix, sta_ix,
eora_ix,adca_ix,ora_ix, adda_ix,cmpx_ix,jsr_ix, ldx_ix, stx_ix,
/* 0xBX */ suba_ex,cmpa_ex,sbca_ex,subd_ex,anda_ex,bita_ex,lda_ex, sta_ex,
diff --git a/src/emu/cpu/m6809/m6809.c b/src/emu/cpu/m6809/m6809.c
index a6c01e59b5c..b3b488a199e 100644
--- a/src/emu/cpu/m6809/m6809.c
+++ b/src/emu/cpu/m6809/m6809.c
@@ -95,13 +95,13 @@ struct _m68_state_t
UINT8 cc;
UINT8 ireg; /* First opcode */
UINT8 irq_state[2];
-
+
int extra_cycles; /* cycles used up by interrupts */
cpu_irq_callback irq_callback;
const device_config *device;
const m6809_config *config;
int icount;
- PAIR ea; /* effective address */
+ PAIR ea; /* effective address */
/* Memory spaces */
const address_space *program;
diff --git a/src/emu/cpu/mb86233/mb86233.c b/src/emu/cpu/mb86233/mb86233.c
index d22cb51bc94..aaa8919b6ef 100644
--- a/src/emu/cpu/mb86233/mb86233.c
+++ b/src/emu/cpu/mb86233/mb86233.c
@@ -45,7 +45,7 @@ typedef struct
UINT32 gpr[16];
UINT32 extport[0x30];
-
+
const device_config *device;
const address_space *program;
diff --git a/src/emu/cpu/mcs48/mcs48.c b/src/emu/cpu/mcs48/mcs48.c
index 35f80b38aaf..25217db96f8 100644
--- a/src/emu/cpu/mcs48/mcs48.c
+++ b/src/emu/cpu/mcs48/mcs48.c
@@ -94,7 +94,7 @@ struct _mcs48_state
cpu_irq_callback irq_callback;
const device_config *device;
int icount;
-
+
/* Memory spaces */
const address_space *program;
const address_space *data;
diff --git a/src/emu/cpu/mcs51/mcs51.c b/src/emu/cpu/mcs51/mcs51.c
index 69b7f48d05b..24e0602fb9f 100644
--- a/src/emu/cpu/mcs51/mcs51.c
+++ b/src/emu/cpu/mcs51/mcs51.c
@@ -287,7 +287,7 @@ struct _mcs51_state_t
const address_space *program;
const address_space *data;
const address_space *io;
-
+
/* Serial Port TX/RX Callbacks */
// TODO: Move to special port r/w
void (*serial_tx_callback)(int data); //Call back funciton when sending data out of serial port
@@ -2060,7 +2060,7 @@ static CPU_INIT( mcs51 )
mcs51_state->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
mcs51_state->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA);
mcs51_state->io = cpu_get_address_space(device, ADDRESS_SPACE_IO);
-
+
mcs51_state->features = FEATURE_NONE;
mcs51_state->ram_mask = 0x7F; /* 128 bytes of ram */
mcs51_state->num_interrupts = 5; /* 5 interrupts */
@@ -2068,7 +2068,7 @@ static CPU_INIT( mcs51 )
mcs51_state->sfr_write = mcs51_sfr_write;
/* Save states */
-
+
state_save_register_item("mcs51", device->tag, 0, mcs51_state->ppc);
state_save_register_item("mcs51", device->tag, 0, mcs51_state->pc);
state_save_register_item("mcs51", device->tag, 0, mcs51_state->rwm );
diff --git a/src/emu/cpu/mips/psx.c b/src/emu/cpu/mips/psx.c
index 11c3c767eda..3633cb3cd35 100644
--- a/src/emu/cpu/mips/psx.c
+++ b/src/emu/cpu/mips/psx.c
@@ -1622,7 +1622,7 @@ static void mips_state_register( const char *type, const device_config *device )
static CPU_INIT( psxcpu )
{
psxcpu_state *psxcpu = device->token;
-// psxcpu->intf = (psxcpu_interface *) device->static_config;
+// psxcpu->intf = (psxcpu_interface *) device->static_config;
psxcpu->irq_callback = irqcallback;
psxcpu->device = device;
diff --git a/src/emu/cpu/mips/r3000.c b/src/emu/cpu/mips/r3000.c
index c8f1d9670a8..7b5ea0fab50 100644
--- a/src/emu/cpu/mips/r3000.c
+++ b/src/emu/cpu/mips/r3000.c
@@ -693,7 +693,7 @@ INLINE void handle_cop3(r3000_state *r3000, UINT32 op)
static CPU_EXECUTE( r3000 )
{
r3000_state *r3000 = device->token;
-
+
/* count cycles and interrupt cycles */
r3000->icount = cycles;
r3000->icount -= r3000->interrupt_cycles;
diff --git a/src/emu/cpu/nec/nec.c b/src/emu/cpu/nec/nec.c
index 659980c5c5b..fe0918214e5 100644
--- a/src/emu/cpu/nec/nec.c
+++ b/src/emu/cpu/nec/nec.c
@@ -140,8 +140,8 @@ typedef struct
} memory_interface;
-typedef struct _nec_state_t nec_state_t;
-struct _nec_state_t
+typedef struct _nec_state_t nec_state_t;
+struct _nec_state_t
{
necbasicregs regs;
UINT16 sregs[4];
@@ -1090,7 +1090,7 @@ static void set_poll_line(nec_state_t *nec_state, int state)
static CPU_DISASSEMBLE( nec )
{
nec_state_t *nec_state = device->token;
-
+
return necv_dasm_one(buffer, pc, oprom, nec_state->config);
}
@@ -1220,7 +1220,7 @@ static CPU_EXECUTE( necv )
static CPU_INIT( v20 )
{
nec_state_t *nec_state = device->token;
-
+
nec_init(device, index, clock, irqcallback, 0);
configure_memory_8bit(nec_state);
nec_state->chip_type=V20;
@@ -1233,7 +1233,7 @@ static CPU_INIT( v20 )
static CPU_INIT( v30 )
{
nec_state_t *nec_state = device->token;
-
+
nec_init(device, index, clock, irqcallback, 1);
configure_memory_16bit(nec_state);
nec_state->chip_type=V30;
@@ -1247,7 +1247,7 @@ static CPU_INIT( v30 )
static CPU_INIT( v33 )
{
nec_state_t *nec_state = device->token;
-
+
nec_init(device, index, clock, irqcallback, 2);
nec_state->chip_type=V33;
nec_state->prefetch_size = 6; /* ???? */
@@ -1266,7 +1266,7 @@ static CPU_INIT( v33 )
static CPU_SET_INFO( nec )
{
nec_state_t *nec_state = device->token;
-
+
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
diff --git a/src/emu/cpu/pdp1/pdp1.c b/src/emu/cpu/pdp1/pdp1.c
index fc3f52e60a0..d20cdd8dd85 100644
--- a/src/emu/cpu/pdp1/pdp1.c
+++ b/src/emu/cpu/pdp1/pdp1.c
@@ -420,7 +420,7 @@ typedef struct
/* 1 for 16-line sequence break system, 0 for default break system */
int type_20_sbs;
-
+
const device_config *device;
const address_space *program;
}
diff --git a/src/emu/cpu/pdp1/pdp1dasm.c b/src/emu/cpu/pdp1/pdp1dasm.c
index 9b7a9322d51..c9844cfa7ae 100644
--- a/src/emu/cpu/pdp1/pdp1dasm.c
+++ b/src/emu/cpu/pdp1/pdp1dasm.c
@@ -8,13 +8,13 @@ static int y;
INLINE void ea (void)
{
-/* while (1)
- {
- if (ib == 0)
- return;
- ib = (READ_PDP_18BIT (y) >> 12) & 1;
- y = READ_PDP_18BIT (y) & 07777;
- }*/
+/* while (1)
+ {
+ if (ib == 0)
+ return;
+ ib = (READ_PDP_18BIT (y) >> 12) & 1;
+ y = READ_PDP_18BIT (y) & 07777;
+ }*/
}
#define IN if (ib) sprintf(buffer+strlen(buffer)," i")
diff --git a/src/emu/cpu/pdp1/tx0.c b/src/emu/cpu/pdp1/tx0.c
index d9b09e7cf46..1f7b6fddf6a 100644
--- a/src/emu/cpu/pdp1/tx0.c
+++ b/src/emu/cpu/pdp1/tx0.c
@@ -73,7 +73,7 @@ typedef struct
void (*sel_handler)(void);
/* called when reset line is pulsed: IO devices should reset */
void (*io_reset_callback)(void);
-
+
const device_config *device;
const address_space *program;
}
@@ -145,7 +145,7 @@ static void tx0_init_common(int is_64kw, const device_config *device, int index,
tx0.address_mask = is_64kw ? ADDRESS_MASK_64KW : ADDRESS_MASK_8KW;
tx0.ir_mask = is_64kw ? 03 : 037;
-
+
tx0.device = device;
tx0.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
}
diff --git a/src/emu/cpu/s2650/s2650.c b/src/emu/cpu/s2650/s2650.c
index 1df30f9ea82..1d8c25b04d8 100644
--- a/src/emu/cpu/s2650/s2650.c
+++ b/src/emu/cpu/s2650/s2650.c
@@ -38,7 +38,7 @@ struct _s2650_regs {
UINT8 ir; /* instruction register */
UINT16 ras[8]; /* 8 return address stack entries */
UINT8 irq_state;
-
+
int icount;
cpu_irq_callback irq_callback;
const device_config *device;
@@ -760,7 +760,7 @@ static void BRA_EA(void) _BRA_EA()
static CPU_INIT( s2650 )
{
s2650_regs *s2650c = device->token;
-
+
s2650c->irq_callback = irqcallback;
s2650c->device = device;
s2650c->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@@ -783,7 +783,7 @@ static CPU_INIT( s2650 )
static CPU_RESET( s2650 )
{
s2650_regs *s2650c = device->token;
-
+
s2650c->ppc = 0;
s2650c->page = 0,
s2650c->iar = 0;
@@ -860,7 +860,7 @@ static int s2650_get_sense(s2650_regs *s2650c)
static CPU_EXECUTE( s2650 )
{
s2650_regs *s2650c = device->token;
-
+
s2650c->icount = cycles;
do
{
@@ -1479,7 +1479,7 @@ static CPU_EXECUTE( s2650 )
static CPU_SET_INFO( s2650 )
{
s2650_regs *s2650c = device->token;
-
+
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
diff --git a/src/emu/cpu/sc61860/sc61860.c b/src/emu/cpu/sc61860/sc61860.c
index 248eb1812c3..5b6b4a90d94 100644
--- a/src/emu/cpu/sc61860/sc61860.c
+++ b/src/emu/cpu/sc61860/sc61860.c
@@ -52,7 +52,7 @@ typedef struct
int carry, zero;
struct { int t2ms, t512ms; int count;} timer;
-
+
const device_config *device;
const address_space *program;
} SC61860_Regs;
diff --git a/src/emu/cpu/ssp1601/ssp1601.c b/src/emu/cpu/ssp1601/ssp1601.c
index 7eebf71fd5c..2abf5a30db6 100644
--- a/src/emu/cpu/ssp1601/ssp1601.c
+++ b/src/emu/cpu/ssp1601/ssp1601.c
@@ -49,7 +49,7 @@ struct _ssp1601_state_t
PAIR ppc;
int g_cycles;
-
+
const device_config *device;
const address_space *program;
const address_space *io;
@@ -503,7 +503,7 @@ static UINT32 ptr2_read(ssp1601_state_t *ssp1601_state, int op)
static CPU_INIT( ssp1601 )
{
ssp1601_state_t *ssp1601_state = device->token;
-
+
state_save_register_item(CHIP_NAME, device->tag, 0, rX);
state_save_register_item(CHIP_NAME, device->tag, 0, rY);
state_save_register_item(CHIP_NAME, device->tag, 0, rA32);
diff --git a/src/emu/cpu/tms32010/tms32010.c b/src/emu/cpu/tms32010/tms32010.c
index 852df4f153e..430408d6518 100644
--- a/src/emu/cpu/tms32010/tms32010.c
+++ b/src/emu/cpu/tms32010/tms32010.c
@@ -92,7 +92,7 @@ typedef struct /* Page 3-6 shows all registers */
/********************** Status data ****************************/
PAIR opcode;
int INTF; /* Pending Interrupt flag */
-
+
const device_config *device;
const address_space *program;
const address_space *data;
@@ -730,7 +730,7 @@ static CPU_INIT( tms32010 )
state_save_register_item("tms32010", device->tag, 0, R.STACK[3]);
state_save_register_item("tms32010", device->tag, 0, R.INTF);
state_save_register_item("tms32010", device->tag, 0, R.opcode.d);
-
+
R.device = device;
R.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
R.data = memory_find_address_space(device, ADDRESS_SPACE_DATA);
diff --git a/src/emu/cpu/tms34010/tms34010.c b/src/emu/cpu/tms34010/tms34010.c
index e9a8a26fc72..ee69e07436e 100644
--- a/src/emu/cpu/tms34010/tms34010.c
+++ b/src/emu/cpu/tms34010/tms34010.c
@@ -1290,8 +1290,8 @@ WRITE16_HANDLER( tms34010_io_register_w )
break;
}
-// if (LOG_CONTROL_REGS)
-// logerror("CPU#%d@%08X: %s = %04X (%d)\n", cpunum, cpu_get_pc(space->cpu), ioreg_name[offset], IOREG(tms, offset), video_screen_get_vpos(tms->screen));
+// if (LOG_CONTROL_REGS)
+// logerror("CPU#%d@%08X: %s = %04X (%d)\n", cpunum, cpu_get_pc(space->cpu), ioreg_name[offset], IOREG(tms, offset), video_screen_get_vpos(tms->screen));
}
@@ -1327,8 +1327,8 @@ WRITE16_HANDLER( tms34020_io_register_w )
oldreg = IOREG(tms, offset);
IOREG(tms, offset) = data;
-// if (LOG_CONTROL_REGS)
-// logerror("CPU#%d@%08X: %s = %04X (%d)\n", cpunum, cpu_get_pc(space->cpu), ioreg020_name[offset], IOREG(tms, offset), video_screen_get_vpos(tms->screen));
+// if (LOG_CONTROL_REGS)
+// logerror("CPU#%d@%08X: %s = %04X (%d)\n", cpunum, cpu_get_pc(space->cpu), ioreg020_name[offset], IOREG(tms, offset), video_screen_get_vpos(tms->screen));
switch (offset)
{
@@ -1486,8 +1486,8 @@ READ16_HANDLER( tms34010_io_register_r )
tms34010_state *tms = space->cpu->token;
int result, total;
-// if (LOG_CONTROL_REGS)
-// logerror("CPU#%d@%08X: read %s\n", cpunum, cpu_get_pc(space->cpu), ioreg_name[offset]);
+// if (LOG_CONTROL_REGS)
+// logerror("CPU#%d@%08X: read %s\n", cpunum, cpu_get_pc(space->cpu), ioreg_name[offset]);
switch (offset)
{
@@ -1529,8 +1529,8 @@ READ16_HANDLER( tms34020_io_register_r )
tms34010_state *tms = space->cpu->token;
int result, total;
-// if (LOG_CONTROL_REGS)
-// logerror("CPU#%d@%08X: read %s\n", cpunum, cpu_get_pc(space->cpu), ioreg_name[offset]);
+// if (LOG_CONTROL_REGS)
+// logerror("CPU#%d@%08X: read %s\n", cpunum, cpu_get_pc(space->cpu), ioreg_name[offset]);
switch (offset)
{
diff --git a/src/emu/cpuexec.c b/src/emu/cpuexec.c
index 0440c2156aa..2f2541c3dcb 100644
--- a/src/emu/cpuexec.c
+++ b/src/emu/cpuexec.c
@@ -63,7 +63,7 @@ struct _cpu_class_data
{
/* this item must remain first */
cpu_class_header header; /* header containing public data */
-
+
/* core interface */
int * icount; /* pointer to the icount */
@@ -78,7 +78,7 @@ struct _cpu_class_data
UINT8 nexteatcycles; /* pending value */
INT32 trigger; /* pending trigger to release a trigger suspension */
INT32 inttrigger; /* interrupt trigger index */
-
+
/* clock and timing information */
UINT64 totalcycles; /* total CPU cycles executed */
attotime localtime; /* local time, relative to the timer system's global time */
@@ -131,7 +131,7 @@ static void register_save_states(const device_config *device);
***************************************************************************/
/*-------------------------------------------------
- get_safe_classtoken - makes sure that the
+ get_safe_classtoken - makes sure that the
passed in device is, in fact, a CPU, and
return the class token
-------------------------------------------------*/
@@ -186,7 +186,7 @@ const device_config *cpuexec_create_cpu_device(const cpu_config *config)
device->class = DEVICE_CLASS_CPU_CHIP;
device->inline_config = (void *)config;
device->static_config = config->reset_param;
-
+
return device;
}
@@ -214,10 +214,10 @@ void cpuexec_init(running_machine *machine)
/* allocate memory for our class state */
classdata = auto_malloc(sizeof(*classdata));
memset(classdata, 0, sizeof(*classdata));
-
+
/* fill in the header */
classdata->header = *cputype_get_header_template(cputype);
-
+
/* make the device run */
device->started = FALSE;
device->machine = machine;
@@ -226,7 +226,7 @@ void cpuexec_init(running_machine *machine)
device->token = auto_malloc(cputype_get_context_size(cputype));
memset(device->token, 0, cputype_get_context_size(cputype));
device->classtoken = classdata;
-
+
/* fill in the input states and IRQ callback information */
for (line = 0; line < ARRAY_LENGTH(classdata->input); line++)
{
@@ -235,15 +235,15 @@ void cpuexec_init(running_machine *machine)
inputline->curstate = CLEAR_LINE;
inputline->qindex = 0;
}
-
+
/* fill in the suspend states */
classdata->suspend = SUSPEND_REASON_RESET;
classdata->inttrigger = cpunum + TRIGGER_INT;
-
+
/* fill in the clock and timing information */
classdata->clock = (UINT64)config->clock * classdata->header.clock_multiplier / classdata->header.clock_divider;
classdata->clockscale = 1.0;
-
+
/* allocate timers if we need them */
if (config->vblank_interrupts_per_frame > 1)
classdata->partial_frame_timer = timer_alloc(trigger_partial_frame_interrupt, device);
@@ -266,7 +266,7 @@ void cpuexec_init(running_machine *machine)
inputline->curvector = inputline->vector;
}
update_clock_information(device);
-
+
/* if no state registered for saving, we can't save */
if (num_regs == 0)
{
@@ -447,7 +447,7 @@ void cpuexec_timeslice(running_machine *machine)
/*-------------------------------------------------
- cpuexec_boost_interleave - temporarily boosts
+ cpuexec_boost_interleave - temporarily boosts
the interleave factor
-------------------------------------------------*/
@@ -461,18 +461,18 @@ void cpuexec_boost_interleave(running_machine *machine, attotime timeslice_time,
/*-------------------------------------------------
- cputag_get_cpu - return a pointer to the given
+ cputag_get_cpu - return a pointer to the given
CPU by tag
-------------------------------------------------*/
const device_config *cputag_get_cpu(running_machine *machine, const char *tag)
{
int cpunum;
-
+
for (cpunum = 0; cpunum < ARRAY_LENGTH(machine->cpu); cpunum++)
if (machine->cpu[cpunum] != NULL && strcmp(tag, machine->cpu[cpunum]->tag) == 0)
return machine->cpu[cpunum];
-
+
return NULL;
}
@@ -490,11 +490,11 @@ const device_config *cputag_get_cpu(running_machine *machine, const char *tag)
void cpu_suspend(const device_config *device, int reason, int eatcycles)
{
cpu_class_data *classdata = get_safe_classtoken(device);
-
+
/* set the suspend reason and eat cycles flag */
classdata->nextsuspend |= reason;
classdata->nexteatcycles = eatcycles;
-
+
/* if we're active, synchronize */
if (device == device->machine->activecpu)
cpu_abort_timeslice(device);
@@ -528,7 +528,7 @@ void cpu_resume(const device_config *device, int reason)
int cpu_is_suspended(const device_config *device, int reason)
{
cpu_class_data *classdata = get_safe_classtoken(device);
-
+
/* return true if the given reason is indicated */
return ((classdata->nextsuspend & reason) != 0);
}
@@ -658,7 +658,7 @@ void cpu_eat_cycles(const device_config *device, int cycles)
/*-------------------------------------------------
- cpu_adjust_icount - apply a +/- to the current
+ cpu_adjust_icount - apply a +/- to the current
icount
-------------------------------------------------*/
@@ -702,7 +702,7 @@ void cpu_abort_timeslice(const device_config *device)
***************************************************************************/
/*-------------------------------------------------
- cpu_yield - yield the given CPU until the end
+ cpu_yield - yield the given CPU until the end
of the current timeslice
-------------------------------------------------*/
@@ -762,7 +762,7 @@ void cpu_spinuntil_time(const device_config *device, attotime duration)
/* suspend until the given trigger fires */
suspend_until_trigger(device, TRIGGER_SUSPENDTIME + timetrig, TRUE);
-
+
/* then set a timer for it */
cpuexec_triggertime(device->machine, TRIGGER_SUSPENDTIME + timetrig, duration);
timetrig = (timetrig + 1) % 256;
@@ -790,7 +790,7 @@ void cpuexec_trigger(running_machine *machine, int trigger)
for (cpunum = 0; cpunum < ARRAY_LENGTH(machine->cpu) && machine->cpu[cpunum] != NULL; cpunum++)
{
cpu_class_data *classdata = machine->cpu[cpunum]->classtoken;
-
+
/* see if this is a matching trigger */
if (classdata->suspend != 0 && classdata->trigger == trigger)
{
@@ -820,7 +820,7 @@ void cpuexec_triggertime(running_machine *machine, int trigger, attotime duratio
void cpu_triggerint(const device_config *device)
{
cpu_class_data *classdata = get_safe_classtoken(device);
-
+
/* signal this CPU's interrupt trigger */
cpuexec_trigger(device->machine, classdata->inttrigger);
}
@@ -832,8 +832,8 @@ void cpu_triggerint(const device_config *device)
***************************************************************************/
/*-------------------------------------------------
- cpu_set_input_line - set the logical state
- (ASSERT_LINE/CLEAR_LINE) of an input line
+ cpu_set_input_line - set the logical state
+ (ASSERT_LINE/CLEAR_LINE) of an input line
on a CPU
-------------------------------------------------*/
@@ -846,8 +846,8 @@ void cpu_set_input_line(const device_config *device, int line, int state)
/*-------------------------------------------------
- cpu_set_input_line_vector - set the vector to
- be returned during a CPU's interrupt
+ cpu_set_input_line_vector - set the vector to
+ be returned during a CPU's interrupt
acknowledge cycle
-------------------------------------------------*/
@@ -864,8 +864,8 @@ void cpu_set_input_line_vector(const device_config *device, int line, int vector
/*-------------------------------------------------
- cpu_set_input_line_and_vector - set the logical
- state (ASSERT_LINE/CLEAR_LINE) of an input
+ cpu_set_input_line_and_vector - set the logical
+ state (ASSERT_LINE/CLEAR_LINE) of an input
line on a CPU and its associated vector
-------------------------------------------------*/
@@ -1236,7 +1236,7 @@ static TIMER_CALLBACK( triggertime_callback )
/*-------------------------------------------------
- empty_event_queue - empty a CPU's event queue
+ empty_event_queue - empty a CPU's event queue
for a specific input line
-------------------------------------------------*/
@@ -1375,7 +1375,7 @@ static void register_save_states(const device_config *device)
{
cpu_class_data *classdata = device->classtoken;
int line;
-
+
state_save_register_item("cpu", device->tag, 0, classdata->suspend);
state_save_register_item("cpu", device->tag, 0, classdata->nextsuspend);
state_save_register_item("cpu", device->tag, 0, classdata->eatcycles);
diff --git a/src/emu/cpuexec.h b/src/emu/cpuexec.h
index 984013b65a2..16d34e77981 100644
--- a/src/emu/cpuexec.h
+++ b/src/emu/cpuexec.h
@@ -201,8 +201,8 @@ void cpu_set_irq_callback(const device_config *cpu, cpu_irq_callback callback);
***************************************************************************/
/*-------------------------------------------------
- cputag_set_input_line - set the logical state
- (ASSERT_LINE/CLEAR_LINE) of an input line
+ cputag_set_input_line - set the logical state
+ (ASSERT_LINE/CLEAR_LINE) of an input line
on a CPU specified by machine/tag
-------------------------------------------------*/
@@ -213,8 +213,8 @@ INLINE void cputag_set_input_line(running_machine *machine, const char *tag, int
/*-------------------------------------------------
- cputag_set_input_line_and_vector - set the
- logical state (ASSERT_LINE/CLEAR_LINE) of an
+ cputag_set_input_line_and_vector - set the
+ logical state (ASSERT_LINE/CLEAR_LINE) of an
input line on a CPU and its associated vector
-------------------------------------------------*/
diff --git a/src/emu/debug/debugcmd.c b/src/emu/debug/debugcmd.c
index 202c05f1856..4e7de58921a 100644
--- a/src/emu/debug/debugcmd.c
+++ b/src/emu/debug/debugcmd.c
@@ -392,12 +392,12 @@ int debug_command_parameter_cpu(running_machine *machine, const char *param, con
{
UINT64 cpunum;
EXPRERR err;
-
+
/* first look for a tag match */
*result = cputag_get_cpu(machine, param);
if (*result != NULL)
return TRUE;
-
+
/* then evaluate as an expression; on an error assume it was a tag */
err = expression_evaluate(param, debug_cpu_get_visible_symtable(machine), &debug_expression_callbacks, machine, &cpunum);
if (err != EXPRERR_NONE)
@@ -405,14 +405,14 @@ int debug_command_parameter_cpu(running_machine *machine, const char *param, con
debug_console_printf("Unable to find CPU '%s'\n", param);
return FALSE;
}
-
+
/* if out of range, complain */
if (cpunum >= ARRAY_LENGTH(machine->cpu) || machine->cpu[cpunum] == NULL)
{
debug_console_printf("Invalid CPU index %d\n", (UINT32) ((FPTR)*result));
return FALSE;
}
-
+
*result = machine->cpu[cpunum];
return TRUE;
}
@@ -907,7 +907,7 @@ static void execute_observe(running_machine *machine, int ref, int params, const
{
if (buflen == 0)
buflen += sprintf(&buffer[buflen], "Currently observing CPU %d", cpunum);
- else
+ else
buflen += sprintf(&buffer[buflen], ",%d", cpunum);
}
}
@@ -2140,7 +2140,7 @@ static void execute_symlist(running_machine *machine, int ref, int params, const
/* validate parameters */
if (params > 0 && !debug_command_parameter_cpu(machine, param[0], &cpu))
return;
-
+
if (cpu != NULL)
{
symtable = debug_cpu_get_symtable(cpu);
diff --git a/src/emu/debug/debugcmt.c b/src/emu/debug/debugcmt.c
index 4e267c079e5..32c3269a2d3 100644
--- a/src/emu/debug/debugcmt.c
+++ b/src/emu/debug/debugcmt.c
@@ -104,7 +104,7 @@ static void debug_comment_free(void);
int debug_comment_init(running_machine *machine)
{
int numcpu;
-
+
for (numcpu = 0; numcpu < ARRAY_LENGTH(machine->cpu); numcpu++)
if (machine->cpu[numcpu] == NULL)
break;
diff --git a/src/emu/debug/debugcpu.c b/src/emu/debug/debugcpu.c
index cc250eb23d8..7d0411c533d 100644
--- a/src/emu/debug/debugcpu.c
+++ b/src/emu/debug/debugcpu.c
@@ -195,7 +195,7 @@ void debug_cpu_init(running_machine *machine)
const device_config *cpu = machine->cpu[cpunum];
cpu_class_header *classheader = cpu->classtoken;
cpu_debug_data *info;
-
+
/* allocate some information */
info = auto_malloc(sizeof(*info));
memset(info, 0, sizeof(*info));
@@ -287,7 +287,7 @@ void debug_cpu_init(running_machine *machine)
spaceinfo->logbytemask = ((spaceinfo->logaddrmask << spaceinfo->addr2byte_lshift) | ((1 << spaceinfo->addr2byte_lshift) - 1)) >> spaceinfo->addr2byte_rshift;
}
}
-
+
/* first CPU is visible by default */
global->visiblecpu = machine->cpu[0];
@@ -300,8 +300,8 @@ void debug_cpu_init(running_machine *machine)
/*-------------------------------------------------
- debug_cpu_flush_traces - flushes all traces;
- this is useful if a trace is going on when we
+ debug_cpu_flush_traces - flushes all traces;
+ this is useful if a trace is going on when we
fatalerror
-------------------------------------------------*/
@@ -325,7 +325,7 @@ void debug_cpu_flush_traces(running_machine *machine)
***************************************************************************/
/*-------------------------------------------------
- cpu_get_visible_cpu - return the visible CPU
+ cpu_get_visible_cpu - return the visible CPU
device (the one that commands should apply to)
-------------------------------------------------*/
@@ -364,7 +364,7 @@ int debug_cpu_is_stopped(running_machine *machine)
***************************************************************************/
/*-------------------------------------------------
- debug_cpu_get_global_symtable - return the
+ debug_cpu_get_global_symtable - return the
global symbol table
-------------------------------------------------*/
@@ -375,7 +375,7 @@ symbol_table *debug_cpu_get_global_symtable(running_machine *machine)
/*-------------------------------------------------
- debug_cpu_get_visible_symtable - return the
+ debug_cpu_get_visible_symtable - return the
locally-visible symbol table
-------------------------------------------------*/
@@ -386,7 +386,7 @@ symbol_table *debug_cpu_get_visible_symtable(running_machine *machine)
/*-------------------------------------------------
- debug_cpu_get_symtable - return a specific
+ debug_cpu_get_symtable - return a specific
CPU's symbol table
-------------------------------------------------*/
@@ -759,8 +759,8 @@ void debug_cpu_single_step(running_machine *machine, int numsteps)
/*-------------------------------------------------
- debug_cpu_single_step_over - single step the
- visible over the requested number of
+ debug_cpu_single_step_over - single step the
+ visible over the requested number of
instructions
-------------------------------------------------*/
@@ -926,7 +926,7 @@ void debug_cpu_next_cpu(running_machine *machine)
***************************************************************************/
/*-------------------------------------------------
- debug_cpu_breakpoint_set - set a new
+ debug_cpu_breakpoint_set - set a new
breakpoint, returning its index
-------------------------------------------------*/
@@ -962,7 +962,7 @@ int debug_cpu_breakpoint_set(const device_config *device, offs_t address, parsed
/*-------------------------------------------------
- debug_cpu_breakpoint_clear - clear a
+ debug_cpu_breakpoint_clear - clear a
breakpoint by index
-------------------------------------------------*/
@@ -1004,7 +1004,7 @@ int debug_cpu_breakpoint_clear(running_machine *machine, int bpnum)
/*-------------------------------------------------
- debug_cpu_breakpoint_enable - enable/disable
+ debug_cpu_breakpoint_enable - enable/disable
a breakpoint by index
-------------------------------------------------*/
@@ -1037,7 +1037,7 @@ int debug_cpu_breakpoint_enable(running_machine *machine, int bpnum, int enable)
***************************************************************************/
/*-------------------------------------------------
- debug_cpu_watchpoint_set - set a new
+ debug_cpu_watchpoint_set - set a new
watchpoint, returning its index
-------------------------------------------------*/
@@ -1072,7 +1072,7 @@ int debug_cpu_watchpoint_set(const address_space *space, int type, offs_t addres
/*-------------------------------------------------
- debug_cpu_watchpoint_clear - clear a
+ debug_cpu_watchpoint_clear - clear a
watchpoint by index
-------------------------------------------------*/
@@ -1115,7 +1115,7 @@ int debug_cpu_watchpoint_clear(running_machine *machine, int wpnum)
/*-------------------------------------------------
- debug_cpu_watchpoint_enable - enable/disable a
+ debug_cpu_watchpoint_enable - enable/disable a
watchpoint by index
-------------------------------------------------*/
@@ -1149,14 +1149,14 @@ int debug_cpu_watchpoint_enable(running_machine *machine, int wpnum, int enable)
***************************************************************************/
/*-------------------------------------------------
- debug_cpu_source_script - specifies a debug
+ debug_cpu_source_script - specifies a debug
command script to execute
-------------------------------------------------*/
void debug_cpu_source_script(running_machine *machine, const char *file)
{
debugcpu_private *global = machine->debugcpu_data;
-
+
/* close any existing source file */
if (global->source_file != NULL)
{
@@ -1216,7 +1216,7 @@ void debug_cpu_trace(const device_config *device, FILE *file, int trace_over, co
/*-------------------------------------------------
- debug_cpu_trace_printf - output data into the
+ debug_cpu_trace_printf - output data into the
given CPU's tracefile, if tracing
-------------------------------------------------*/
@@ -1254,7 +1254,7 @@ void debug_cpu_set_instruction_hook(const device_config *device, debug_instructi
/*-------------------------------------------------
- debug_cpu_hotspot_track - enable/disable
+ debug_cpu_hotspot_track - enable/disable
tracking of hotspots
-------------------------------------------------*/
@@ -1884,7 +1884,7 @@ static void compute_debug_flags(const device_config *device)
cpu_debug_data *info = cpu_get_debug_data(device);
running_machine *machine = device->machine;
debugcpu_private *global = machine->debugcpu_data;
-
+
/* clear out all global flags by default */
machine->debug_flags = DEBUG_FLAG_ENABLED;
diff --git a/src/emu/mame.c b/src/emu/mame.c
index 0a943378b05..3d1aa4218f7 100644
--- a/src/emu/mame.c
+++ b/src/emu/mame.c
@@ -1476,14 +1476,14 @@ static void prepare_machine(running_machine *machine)
static void destroy_machine(running_machine *machine)
{
int cpunum;
-
+
assert(machine == Machine);
/* temporary: free the fake CPU devices */
for (cpunum = 0; cpunum < ARRAY_LENGTH(machine->cpu); cpunum++)
if (machine->cpu[cpunum] != NULL)
free((void *)machine->cpu[cpunum]);
-
+
if (machine->driver_data != NULL)
free(machine->driver_data);
if (machine->config != NULL)
diff --git a/src/emu/memory.c b/src/emu/memory.c
index 25362db3909..a7fde05120a 100644
--- a/src/emu/memory.c
+++ b/src/emu/memory.c
@@ -253,7 +253,7 @@ struct _subtable_data
struct _memory_private
{
const address_space * spacelist; /* list of address spaces */
-
+
UINT8 * bank_ptr[STATIC_COUNT]; /* array of bank pointers */
UINT8 * bankd_ptr[STATIC_COUNT]; /* array of decrypted bank pointers */
void * shared_ptr[MAX_SHARED_POINTERS];/* array of shared pointers */
@@ -405,7 +405,7 @@ INLINE void adjust_addresses(address_space *space, offs_t *start, offs_t *end, o
INLINE int bank_references_space(const bank_info *bank, const address_space *space)
{
bank_reference *ref;
-
+
for (ref = bank->reflist; ref != NULL; ref = ref->next)
if (ref->space == space)
return TRUE;
@@ -421,7 +421,7 @@ INLINE int bank_references_space(const bank_info *bank, const address_space *spa
INLINE void add_bank_reference(bank_info *bank, const address_space *space)
{
bank_reference **refptr;
-
+
/* make sure we don't already have a reference to the bank */
for (refptr = &bank->reflist; *refptr != NULL; refptr = &(*refptr)->next)
if ((*refptr)->space == space)
@@ -697,7 +697,7 @@ void memory_init(running_machine *machine)
memory_private *memdata;
add_exit_callback(machine, memory_exit);
-
+
/* allocate our private data */
memdata = machine->memory_data = auto_malloc(sizeof(*machine->memory_data));
memset(memdata, 0, sizeof(*memdata));
@@ -723,8 +723,8 @@ void memory_init(running_machine *machine)
/*-------------------------------------------------
- memory_find_address_space - find an address
- space in our internal list; for faster access
+ memory_find_address_space - find an address
+ space in our internal list; for faster access
use cpu_get_address_space()
-------------------------------------------------*/
@@ -732,7 +732,7 @@ const address_space *memory_find_address_space(const device_config *cpu, int spa
{
memory_private *memdata = cpu->machine->memory_data;
const address_space *space;
-
+
for (space = memdata->spacelist; space != NULL; space = space->next)
if (space->cpu == cpu && space->spacenum == spacenum)
return space;
@@ -890,7 +890,7 @@ int memory_set_direct_region(const address_space *space, offs_t byteaddress)
entry = spacerw->readlookup[LEVEL1_INDEX(byteaddress)];
if (entry >= SUBTABLE_BASE)
entry = spacerw->readlookup[LEVEL2_INDEX(entry,byteaddress)];
-
+
/* keep track of current entry */
spacerw->direct.entry = entry;
@@ -931,8 +931,8 @@ int memory_set_direct_region(const address_space *space, offs_t byteaddress)
/*-------------------------------------------------
- memory_get_read_ptr - return a pointer the
- memory byte provided in the given address
+ memory_get_read_ptr - return a pointer the
+ memory byte provided in the given address
space, or NULL if it is not mapped to a bank
-------------------------------------------------*/
@@ -958,9 +958,9 @@ void *memory_get_read_ptr(const address_space *space, offs_t byteaddress)
/*-------------------------------------------------
- memory_get_write_ptr - return a pointer the
- memory byte provided in the given address
- space, or NULL if it is not mapped to a
+ memory_get_write_ptr - return a pointer the
+ memory byte provided in the given address
+ space, or NULL if it is not mapped to a
writeable bank
-------------------------------------------------*/
@@ -1014,7 +1014,7 @@ void memory_configure_bank(running_machine *machine, int banknum, int startentry
/* fill in the requested bank entries */
for (entrynum = startentry; entrynum < startentry + numentries; entrynum++)
bank->entry[entrynum] = (UINT8 *)base + (entrynum - startentry) * stride;
-
+
/* if we have no bankptr yet, set it to the first entry */
if (memdata->bank_ptr[banknum] == NULL)
memdata->bank_ptr[banknum] = bank->entry[0];
@@ -1045,7 +1045,7 @@ void memory_configure_bank_decrypted(running_machine *machine, int banknum, int
/* fill in the requested bank entries */
for (entrynum = startentry; entrynum < startentry + numentries; entrynum++)
bank->entryd[entrynum] = (UINT8 *)base + (entrynum - startentry) * stride;
-
+
/* if we have no bankptr yet, set it to the first entry */
if (memdata->bankd_ptr[banknum] == NULL)
memdata->bankd_ptr[banknum] = bank->entryd[0];
@@ -1053,7 +1053,7 @@ void memory_configure_bank_decrypted(running_machine *machine, int banknum, int
/*-------------------------------------------------
- memory_set_bank - select one pre-configured
+ memory_set_bank - select one pre-configured
entry to be the new bank base
-------------------------------------------------*/
@@ -1138,9 +1138,9 @@ void memory_set_bankptr(running_machine *machine, int banknum, void *base)
***************************************************************************/
/*-------------------------------------------------
- _memory_install_handler - install a new memory
- handler into the given address space,
- returning a pointer to the memory backing it,
+ _memory_install_handler - install a new memory
+ handler into the given address space,
+ returning a pointer to the memory backing it,
if present
-------------------------------------------------*/
@@ -1227,9 +1227,9 @@ UINT64 *_memory_install_handler64(const address_space *space, offs_t addrstart,
/*-------------------------------------------------
- _memory_install_device_handler - install a new
- device memory handler into the given address
- space, returning a pointer to the memory
+ _memory_install_device_handler - install a new
+ device memory handler into the given address
+ space, returning a pointer to the memory
backing it, if present
-------------------------------------------------*/
@@ -1248,7 +1248,7 @@ void *_memory_install_device_handler(const address_space *space, const device_co
/*-------------------------------------------------
- _memory_install_device_handler8 - same as above
+ _memory_install_device_handler8 - same as above
but explicitly for 8-bit handlers
-------------------------------------------------*/
@@ -1265,7 +1265,7 @@ UINT8 *_memory_install_device_handler8(const address_space *space, const device_
/*-------------------------------------------------
- _memory_install_device_handler16 - same as
+ _memory_install_device_handler16 - same as
above but explicitly for 16-bit handlers
-------------------------------------------------*/
@@ -1282,7 +1282,7 @@ UINT16 *_memory_install_device_handler16(const address_space *space, const devic
/*-------------------------------------------------
- _memory_install_device_handler32 - same as
+ _memory_install_device_handler32 - same as
above but explicitly for 32-bit handlers
-------------------------------------------------*/
@@ -1299,7 +1299,7 @@ UINT32 *_memory_install_device_handler32(const address_space *space, const devic
/*-------------------------------------------------
- _memory_install_device_handler64 - same as
+ _memory_install_device_handler64 - same as
above but explicitly for 64-bit handlers
-------------------------------------------------*/
@@ -1342,8 +1342,8 @@ const char *memory_get_handler_string(const address_space *space, int read0_or_w
/*-------------------------------------------------
- memory_enable_read_watchpoints - enable/disable
- read watchpoint tracking for a given address
+ memory_enable_read_watchpoints - enable/disable
+ read watchpoint tracking for a given address
space
-------------------------------------------------*/
@@ -1358,8 +1358,8 @@ void memory_enable_read_watchpoints(const address_space *space, int enable)
/*-------------------------------------------------
- memory_enable_write_watchpoints - enable/disable
- write watchpoint tracking for a given address
+ memory_enable_write_watchpoints - enable/disable
+ write watchpoint tracking for a given address
space
-------------------------------------------------*/
@@ -1410,7 +1410,7 @@ int memory_get_log_unmap(const address_space *space)
/*-------------------------------------------------
- memory_dump - dump the internal memory tables
+ memory_dump - dump the internal memory tables
to the given file
-------------------------------------------------*/
@@ -1475,7 +1475,7 @@ static void memory_init_spaces(running_machine *machine)
address_space *space = malloc_or_die(sizeof(*space));
int accessorindex;
int entrynum;
-
+
/* determine the address and data bits */
memset(space, 0, sizeof(*space));
space->machine = machine;
@@ -1492,13 +1492,13 @@ static void memory_init_spaces(running_machine *machine)
space->accessors = memory_accessors[accessorindex][(space->endianness == CPU_IS_LE) ? 0 : 1];
space->map = NULL;
space->log_unmap = TRUE;
-
+
/* allocate subtable information; we malloc this manually because it will be realloc'ed */
space->read.subtable = auto_malloc(sizeof(*space->read.subtable) * SUBTABLE_COUNT);
memset(space->read.subtable, 0, sizeof(*space->read.subtable) * SUBTABLE_COUNT);
space->write.subtable = auto_malloc(sizeof(*space->write.subtable) * SUBTABLE_COUNT);
memset(space->write.subtable, 0, sizeof(*space->write.subtable) * SUBTABLE_COUNT);
-
+
/* allocate the handler table */
space->read.handlers[0] = auto_malloc(sizeof(*space->read.handlers[0]) * ARRAY_LENGTH(space->read.handlers));
memset(space->read.handlers[0], 0, sizeof(*space->read.handlers[0]) * ARRAY_LENGTH(space->read.handlers));
@@ -1544,7 +1544,7 @@ static void memory_init_spaces(running_machine *machine)
space->direct.max = 0;
space->direct.entry = STATIC_UNMAP;
space->directupdate = NULL;
-
+
/* link us in */
*nextptr = space;
nextptr = (address_space **)&space->next;
@@ -1797,7 +1797,7 @@ static void memory_init_allocate(running_machine *machine)
/*-------------------------------------------------
- memory_init_locate - find all the requested
+ memory_init_locate - find all the requested
pointers into the final allocated memory
-------------------------------------------------*/
@@ -1876,7 +1876,7 @@ static void memory_exit(running_machine *machine)
memdata->memory_block_list = block->next;
free(block);
}
-
+
/* free all the bank references */
for (banknum = 0; banknum < STATIC_COUNT; banknum++)
{
@@ -2194,7 +2194,7 @@ static void space_map_range(address_space *space, read_or_write readorwrite, int
space->writelookup = space->write.table;
if (reset_read)
space->readlookup = space->read.table;
-
+
/* recompute any direct access on this space if it is a read modification */
if (readorwrite == ROW_READ && entry == space->direct.entry)
{
@@ -2206,7 +2206,7 @@ static void space_map_range(address_space *space, read_or_write readorwrite, int
/*-------------------------------------------------
- space_find_backing_memory - return a pointer to
+ space_find_backing_memory - return a pointer to
the base of RAM associated with the given CPU
and offset
-------------------------------------------------*/
@@ -2244,8 +2244,8 @@ static void *space_find_backing_memory(const address_space *space, offs_t bytead
/*-------------------------------------------------
- space_needs_backing_store - return whether a
- given memory map entry implies the need of
+ space_needs_backing_store - return whether a
+ given memory map entry implies the need of
allocating and registering memory
-------------------------------------------------*/
@@ -2850,7 +2850,7 @@ static void *block_allocate(const address_space *space, offs_t bytestart, offs_t
break;
}
}
-
+
/* if we didn't find a match, register */
if (region == NULL)
{
diff --git a/src/emu/memory.h b/src/emu/memory.h
index d4ec8a82a70..cf35f7c5f18 100644
--- a/src/emu/memory.h
+++ b/src/emu/memory.h
@@ -1047,8 +1047,8 @@ INLINE void memory_write_qword_masked(const address_space *space, offs_t byteadd
/*-------------------------------------------------
- memory_decrypted_read_byte/word/dword/qword -
- read a value from the specified address space
+ memory_decrypted_read_byte/word/dword/qword -
+ read a value from the specified address space
using the direct addressing mechanism and
the decrypted base pointer
-------------------------------------------------*/
@@ -1090,8 +1090,8 @@ INLINE UINT64 memory_decrypted_read_qword(const address_space *space, offs_t byt
/*-------------------------------------------------
- memory_raw_read_byte/word/dword/qword -
- read a value from the specified address space
+ memory_raw_read_byte/word/dword/qword -
+ read a value from the specified address space
using the direct addressing mechanism and
the raw base pointer
-------------------------------------------------*/
diff --git a/src/emu/sound/okim6258.c b/src/emu/sound/okim6258.c
index d00cea5a1de..ced86e6d77e 100644
--- a/src/emu/sound/okim6258.c
+++ b/src/emu/sound/okim6258.c
@@ -137,7 +137,7 @@ static void okim6258_update(void *param, stream_sample_t **inputs, stream_sample
/* Compute the new amplitude and update the current step */
int nibble = (chip->data_in >> nibble_shift) & 0xf;
- /* Output to the buffer */
+ /* Output to the buffer */
INT16 sample = clock_adpcm(chip, nibble);
nibble_shift ^= 4;
@@ -186,7 +186,7 @@ static void okim6258_state_save_register(struct okim6258 *info, const char *tag)
static SND_START( okim6258 )
{
const okim6258_interface *intf = config;
- struct okim6258 *info;
+ struct okim6258 *info;
info = auto_malloc(sizeof(*info));
memset(info, 0, sizeof(*info));
@@ -239,7 +239,7 @@ void okim6258_set_divider(int which, int val)
{
struct okim6258 *info = sndti_token(SOUND_OKIM6258, which);
int divider = dividers[val];
-
+
info->divider = dividers[val];
stream_set_sample_rate(info->stream, info->master_clock / divider);
}
diff --git a/src/emu/video/mc6845.c b/src/emu/video/mc6845.c
index 6af43798e8b..2fa087a4090 100644
--- a/src/emu/video/mc6845.c
+++ b/src/emu/video/mc6845.c
@@ -209,7 +209,7 @@ READ8_DEVICE_HANDLER( mc6845_register_r )
case 0x0f: ret = (mc6845->cursor_addr >> 0) & 0xff; break;
case 0x10: ret = (mc6845->light_pen_addr >> 8) & 0xff; mc6845->light_pen_latched = FALSE; break;
case 0x11: ret = (mc6845->light_pen_addr >> 0) & 0xff; mc6845->light_pen_latched = FALSE; break;
- case 0x1f:
+ case 0x1f:
if (supports_transparent[mc6845->device_type] && MODE_TRANSPARENT(mc6845))
{
mc6845->update_addr++;
@@ -252,12 +252,12 @@ WRITE8_DEVICE_HANDLER( mc6845_register_w )
case 0x0f: mc6845->cursor_addr = ((data & 0xff) << 0) | (mc6845->cursor_addr & 0xff00); break;
case 0x10: /* read-only */ break;
case 0x11: /* read-only */ break;
- case 0x12:
+ case 0x12:
if (supports_transparent[mc6845->device_type])
{
mc6845->update_addr = ((data & 0x3f) << 8) | (mc6845->update_addr & 0x00ff);
call_on_update_address(device, 0);
- }
+ }
break;
case 0x13:
if (supports_transparent[mc6845->device_type])
@@ -266,7 +266,7 @@ WRITE8_DEVICE_HANDLER( mc6845_register_w )
call_on_update_address(device, 0);
}
break;
- case 0x1f:
+ case 0x1f:
if (supports_transparent[mc6845->device_type] && MODE_TRANSPARENT(mc6845))
{
mc6845->update_addr++;
diff --git a/src/emu/video/mc6845.h b/src/emu/video/mc6845.h
index c39b6ef5863..f275dde76ac 100644
--- a/src/emu/video/mc6845.h
+++ b/src/emu/video/mc6845.h
@@ -77,9 +77,9 @@ struct _mc6845_interface
/* if specified, this gets called for every change of the VSYNC pin (pin 40) */
mc6845_on_vsync_changed_func on_vsync_changed;
- /* Called whenenever the update address changes
- * For vblank/hblank timing strobe indicates the physical update.
- * vblank/hblank timing not supported yet! */
+ /* Called whenenever the update address changes
+ * For vblank/hblank timing strobe indicates the physical update.
+ * vblank/hblank timing not supported yet! */
mc6845_on_update_addr_changed_func on_update_addr_changed;
};