diff options
| author | 2009-09-04 11:40:49 +0000 | |
|---|---|---|
| committer | 2009-09-04 11:40:49 +0000 | |
| commit | f09c9059f9279c6eb1395183720a4cf652ae9947 (patch) | |
| tree | 9db72fcddf1d06e375dde15e35cae45cece72944 /src | |
| parent | faf695bfc985b2bedc2e3792261d44a731dec126 (diff) | |
Added a compile-time flag to select between ABI and Manual register names in the MIPS core. [Harmony]
Fixed a MESS-side compile warning in the SNES S-DD1 code. [Harmony]
Diffstat (limited to 'src')
| -rw-r--r-- | src/emu/cpu/mips/mips3com.c | 37 | ||||
| -rw-r--r-- | src/emu/cpu/mips/mips3dsm.c | 12 | ||||
| -rw-r--r-- | src/mame/machine/snessdd1.c | 4 |
3 files changed, 50 insertions, 3 deletions
diff --git a/src/emu/cpu/mips/mips3com.c b/src/emu/cpu/mips/mips3com.c index 197dc9e8576..a84d4521689 100644 --- a/src/emu/cpu/mips/mips3com.c +++ b/src/emu/cpu/mips/mips3com.c @@ -16,7 +16,7 @@ ***************************************************************************/ #define PRINTF_TLB (0) - +#define USE_ABI_REG_NAMES (1) /*************************************************************************** @@ -558,6 +558,7 @@ void mips3com_get_info(mips3_state *mips, UINT32 state, cpuinfo *info) case CPUINFO_STR_REGISTER + MIPS3_WIRED: sprintf(info->s, "Wired:%08X", (UINT32)mips->cpr[0][COP0_Wired]); break; case CPUINFO_STR_REGISTER + MIPS3_BADVADDR: sprintf(info->s, "BadVAddr:%08X", (UINT32)mips->cpr[0][COP0_BadVAddr]); break; +#if USE_ABI_REG_NAMES case CPUINFO_STR_REGISTER + MIPS3_R0: sprintf(info->s, "$zero: %08X%08X", (UINT32)(mips->r[0] >> 32), (UINT32)mips->r[0]); break; case CPUINFO_STR_REGISTER + MIPS3_R1: sprintf(info->s, " $at: %08X%08X", (UINT32)(mips->r[1] >> 32), (UINT32)mips->r[1]); break; case CPUINFO_STR_REGISTER + MIPS3_R2: sprintf(info->s, " $v0: %08X%08X", (UINT32)(mips->r[2] >> 32), (UINT32)mips->r[2]); break; @@ -590,6 +591,40 @@ void mips3com_get_info(mips3_state *mips, UINT32 state, cpuinfo *info) case CPUINFO_STR_REGISTER + MIPS3_R29: sprintf(info->s, " $sp:%08X%08X", (UINT32)(mips->r[29] >> 32), (UINT32)mips->r[29]); break; case CPUINFO_STR_REGISTER + MIPS3_R30: sprintf(info->s, " $fp:%08X%08X", (UINT32)(mips->r[30] >> 32), (UINT32)mips->r[30]); break; case CPUINFO_STR_REGISTER + MIPS3_R31: sprintf(info->s, " $ra:%08X%08X", (UINT32)(mips->r[31] >> 32), (UINT32)mips->r[31]); break; +#else + case CPUINFO_STR_REGISTER + MIPS3_R0: sprintf(info->s, " R0: %08X%08X", (UINT32)(mips->r[0] >> 32), (UINT32)mips->r[0]); break; + case CPUINFO_STR_REGISTER + MIPS3_R1: sprintf(info->s, " R1: %08X%08X", (UINT32)(mips->r[1] >> 32), (UINT32)mips->r[1]); break; + case CPUINFO_STR_REGISTER + MIPS3_R2: sprintf(info->s, " R2: %08X%08X", (UINT32)(mips->r[2] >> 32), (UINT32)mips->r[2]); break; + case CPUINFO_STR_REGISTER + MIPS3_R3: sprintf(info->s, " R3: %08X%08X", (UINT32)(mips->r[3] >> 32), (UINT32)mips->r[3]); break; + case CPUINFO_STR_REGISTER + MIPS3_R4: sprintf(info->s, " R4: %08X%08X", (UINT32)(mips->r[4] >> 32), (UINT32)mips->r[4]); break; + case CPUINFO_STR_REGISTER + MIPS3_R5: sprintf(info->s, " R5: %08X%08X", (UINT32)(mips->r[5] >> 32), (UINT32)mips->r[5]); break; + case CPUINFO_STR_REGISTER + MIPS3_R6: sprintf(info->s, " R6: %08X%08X", (UINT32)(mips->r[6] >> 32), (UINT32)mips->r[6]); break; + case CPUINFO_STR_REGISTER + MIPS3_R7: sprintf(info->s, " R7: %08X%08X", (UINT32)(mips->r[7] >> 32), (UINT32)mips->r[7]); break; + case CPUINFO_STR_REGISTER + MIPS3_R8: sprintf(info->s, " R8: %08X%08X", (UINT32)(mips->r[8] >> 32), (UINT32)mips->r[8]); break; + case CPUINFO_STR_REGISTER + MIPS3_R9: sprintf(info->s, " R9: %08X%08X", (UINT32)(mips->r[9] >> 32), (UINT32)mips->r[9]); break; + case CPUINFO_STR_REGISTER + MIPS3_R10: sprintf(info->s, "R10: %08X%08X", (UINT32)(mips->r[10] >> 32), (UINT32)mips->r[10]); break; + case CPUINFO_STR_REGISTER + MIPS3_R11: sprintf(info->s, "R11: %08X%08X", (UINT32)(mips->r[11] >> 32), (UINT32)mips->r[11]); break; + case CPUINFO_STR_REGISTER + MIPS3_R12: sprintf(info->s, "R12: %08X%08X", (UINT32)(mips->r[12] >> 32), (UINT32)mips->r[12]); break; + case CPUINFO_STR_REGISTER + MIPS3_R13: sprintf(info->s, "R13: %08X%08X", (UINT32)(mips->r[13] >> 32), (UINT32)mips->r[13]); break; + case CPUINFO_STR_REGISTER + MIPS3_R14: sprintf(info->s, "R14: %08X%08X", (UINT32)(mips->r[14] >> 32), (UINT32)mips->r[14]); break; + case CPUINFO_STR_REGISTER + MIPS3_R15: sprintf(info->s, "R15: %08X%08X", (UINT32)(mips->r[15] >> 32), (UINT32)mips->r[15]); break; + case CPUINFO_STR_REGISTER + MIPS3_R16: sprintf(info->s, "R16: %08X%08X", (UINT32)(mips->r[16] >> 32), (UINT32)mips->r[16]); break; + case CPUINFO_STR_REGISTER + MIPS3_R17: sprintf(info->s, "R17: %08X%08X", (UINT32)(mips->r[17] >> 32), (UINT32)mips->r[17]); break; + case CPUINFO_STR_REGISTER + MIPS3_R18: sprintf(info->s, "R18: %08X%08X", (UINT32)(mips->r[18] >> 32), (UINT32)mips->r[18]); break; + case CPUINFO_STR_REGISTER + MIPS3_R19: sprintf(info->s, "R19: %08X%08X", (UINT32)(mips->r[19] >> 32), (UINT32)mips->r[19]); break; + case CPUINFO_STR_REGISTER + MIPS3_R20: sprintf(info->s, "R20: %08X%08X", (UINT32)(mips->r[20] >> 32), (UINT32)mips->r[20]); break; + case CPUINFO_STR_REGISTER + MIPS3_R21: sprintf(info->s, "R21: %08X%08X", (UINT32)(mips->r[21] >> 32), (UINT32)mips->r[21]); break; + case CPUINFO_STR_REGISTER + MIPS3_R22: sprintf(info->s, "R22: %08X%08X", (UINT32)(mips->r[22] >> 32), (UINT32)mips->r[22]); break; + case CPUINFO_STR_REGISTER + MIPS3_R23: sprintf(info->s, "R23: %08X%08X", (UINT32)(mips->r[23] >> 32), (UINT32)mips->r[23]); break; + case CPUINFO_STR_REGISTER + MIPS3_R24: sprintf(info->s, "R24: %08X%08X", (UINT32)(mips->r[24] >> 32), (UINT32)mips->r[24]); break; + case CPUINFO_STR_REGISTER + MIPS3_R25: sprintf(info->s, "R25: %08X%08X", (UINT32)(mips->r[25] >> 32), (UINT32)mips->r[25]); break; + case CPUINFO_STR_REGISTER + MIPS3_R26: sprintf(info->s, "R26: %08X%08X", (UINT32)(mips->r[26] >> 32), (UINT32)mips->r[26]); break; + case CPUINFO_STR_REGISTER + MIPS3_R27: sprintf(info->s, "R27: %08X%08X", (UINT32)(mips->r[27] >> 32), (UINT32)mips->r[27]); break; + case CPUINFO_STR_REGISTER + MIPS3_R28: sprintf(info->s, "R28: %08X%08X", (UINT32)(mips->r[28] >> 32), (UINT32)mips->r[28]); break; + case CPUINFO_STR_REGISTER + MIPS3_R29: sprintf(info->s, "R29: %08X%08X", (UINT32)(mips->r[29] >> 32), (UINT32)mips->r[29]); break; + case CPUINFO_STR_REGISTER + MIPS3_R30: sprintf(info->s, "R30: %08X%08X", (UINT32)(mips->r[30] >> 32), (UINT32)mips->r[30]); break; + case CPUINFO_STR_REGISTER + MIPS3_R31: sprintf(info->s, "R31: %08X%08X", (UINT32)(mips->r[31] >> 32), (UINT32)mips->r[31]); break; +#endif case CPUINFO_STR_REGISTER + MIPS3_HI: sprintf(info->s, "HI: %08X%08X", (UINT32)(mips->r[REG_HI] >> 32), (UINT32)mips->r[REG_HI]); break; case CPUINFO_STR_REGISTER + MIPS3_LO: sprintf(info->s, "LO: %08X%08X", (UINT32)(mips->r[REG_LO] >> 32), (UINT32)mips->r[REG_LO]); break; diff --git a/src/emu/cpu/mips/mips3dsm.c b/src/emu/cpu/mips/mips3dsm.c index 6d477867ec7..24d2a5193ef 100644 --- a/src/emu/cpu/mips/mips3dsm.c +++ b/src/emu/cpu/mips/mips3dsm.c @@ -8,7 +8,9 @@ #include "cpuintrf.h" +#define USE_ABI_REG_NAMES (1) +#if USE_ABI_REG_NAMES static const char *const reg[32] = { "$0", "$at", "$v0", "$v1", "$a0", "$a1", "$a2", "$a3", @@ -16,6 +18,16 @@ static const char *const reg[32] = "$s0", "$s1", "$s2", "$s3", "$s4", "$s5", "$s6", "$s7", "$t8", "$t9", "$k0", "$k1", "$gp", "$sp", "$fp", "$ra" }; +#else +static const char *const reg[32] = +{ + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", + "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" +}; +#endif + static const char *const cpreg[4][32] = diff --git a/src/mame/machine/snessdd1.c b/src/mame/machine/snessdd1.c index 0931f51f873..8e468a1518a 100644 --- a/src/mame/machine/snessdd1.c +++ b/src/mame/machine/snessdd1.c @@ -1,4 +1,4 @@ -static UINT8 sdd1_read(running_machine* machine, UINT16 addr); +static UINT8 sdd1_read(running_machine* machine, UINT32 addr); typedef struct //Input Manager { @@ -613,7 +613,7 @@ static void sdd1_mmio_write(running_machine* machine, UINT16 addr, UINT8 data) } } -static UINT8 sdd1_read(running_machine* machine, UINT16 addr) +static UINT8 sdd1_read(running_machine* machine, UINT32 addr) { if(snes_sdd1.sdd1_enable & snes_sdd1.xfer_enable) { |
