diff options
| author | 2010-07-26 16:02:45 +0000 | |
|---|---|---|
| committer | 2010-07-26 16:02:45 +0000 | |
| commit | de1117b63af166d95ff7f398ed13db437d920456 (patch) | |
| tree | bd44bb3cd09f81762797967d07e8e99c94db4658 /src | |
| parent | 7ef270db28a7c9ea1154fcb7dbb6db65714af33b (diff) | |
arm7.c: Added big endian version of the arm7 cpu. The 3do uses an arm6 in 32bit mode which is actually implemented by the arm7 core.
Diffstat (limited to 'src')
| -rw-r--r-- | src/emu/cpu/arm7/arm7.c | 37 | ||||
| -rw-r--r-- | src/emu/cpu/arm7/arm7.h | 1 | ||||
| -rw-r--r-- | src/emu/cpu/arm7/arm7core.c | 36 | ||||
| -rw-r--r-- | src/emu/cpu/arm7/arm7core.h | 1 | ||||
| -rw-r--r-- | src/emu/cpu/arm7/arm7dasm.c | 11 |
5 files changed, 78 insertions, 8 deletions
diff --git a/src/emu/cpu/arm7/arm7.c b/src/emu/cpu/arm7/arm7.c index b06dd4dbaee..7881ec3b25f 100644 --- a/src/emu/cpu/arm7/arm7.c +++ b/src/emu/cpu/arm7/arm7.c @@ -71,7 +71,7 @@ void arm7_dt_w_callback(arm_state *cpustate, UINT32 insn, UINT32 *prn, void (*wr INLINE arm_state *get_safe_token(running_device *device) { assert(device != NULL); - assert(device->type() == ARM7 || device->type() == ARM9 || device->type() == PXA255); + assert(device->type() == ARM7 || device->type() == ARM7_BE || device->type() == ARM9 || device->type() == PXA255); return (arm_state *)downcast<legacy_cpu_device *>(device)->token(); } @@ -236,6 +236,14 @@ static CPU_RESET( arm7 ) cpustate->archFlags = eARM_ARCHFLAGS_T; // has Thumb } +static CPU_RESET( arm7_be ) +{ + arm_state *cpustate = get_safe_token(device); + + CPU_RESET_CALL( arm7 ); + cpustate->endian = ENDIANNESS_BIG; +} + static CPU_RESET( arm9 ) { arm_state *cpustate = get_safe_token(device); @@ -300,6 +308,19 @@ static CPU_DISASSEMBLE( arm7 ) return CPU_DISASSEMBLE_CALL(arm7arm); } +static CPU_DISASSEMBLE( arm7_be ) +{ + CPU_DISASSEMBLE( arm7arm_be ); + CPU_DISASSEMBLE( arm7thumb_be ); + + arm_state *cpustate = get_safe_token(device); + + if (T_IS_SET(GET_CPSR)) + return CPU_DISASSEMBLE_CALL(arm7thumb_be); + else + return CPU_DISASSEMBLE_CALL(arm7arm_be); +} + /************************************************************************** * Generic set_info @@ -553,6 +574,19 @@ CPU_GET_INFO( arm7 ) } } + +CPU_GET_INFO( arm7_be ) +{ + switch (state) + { + case DEVINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break; + case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(arm7_be); break; + case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(arm7_be); break; + case DEVINFO_STR_NAME: strcpy(info->s, "ARM7 (big endian)"); break; + default: CPU_GET_INFO_CALL(arm7); + } +} + CPU_GET_INFO( arm9 ) { switch (state) @@ -837,6 +871,7 @@ void arm7_dt_w_callback(arm_state *cpustate, UINT32 insn, UINT32 *prn, void (*wr } DEFINE_LEGACY_CPU_DEVICE(ARM7, arm7); +DEFINE_LEGACY_CPU_DEVICE(ARM7_BE, arm7_be); DEFINE_LEGACY_CPU_DEVICE(ARM9, arm9); DEFINE_LEGACY_CPU_DEVICE(PXA255, pxa255); DEFINE_LEGACY_CPU_DEVICE(SA1110, sa1110); diff --git a/src/emu/cpu/arm7/arm7.h b/src/emu/cpu/arm7/arm7.h index 637d43431f7..5ab6b51d0fc 100644 --- a/src/emu/cpu/arm7/arm7.h +++ b/src/emu/cpu/arm7/arm7.h @@ -39,6 +39,7 @@ ***************************************************************************************************/ DECLARE_LEGACY_CPU_DEVICE(ARM7, arm7); +DECLARE_LEGACY_CPU_DEVICE(ARM7_BE, arm7_be); DECLARE_LEGACY_CPU_DEVICE(ARM9, arm9); DECLARE_LEGACY_CPU_DEVICE(PXA255, pxa255); DECLARE_LEGACY_CPU_DEVICE(SA1110, sa1110); diff --git a/src/emu/cpu/arm7/arm7core.c b/src/emu/cpu/arm7/arm7core.c index ccc9c181b40..f367a2b7307 100644 --- a/src/emu/cpu/arm7/arm7core.c +++ b/src/emu/cpu/arm7/arm7core.c @@ -135,7 +135,10 @@ INLINE void arm7_cpu_write32(arm_state *cpustate, UINT32 addr, UINT32 data) } addr &= ~3; - memory_write_dword_32le(cpustate->program, addr, data); + if ( cpustate->endian == ENDIANNESS_BIG ) + memory_write_dword_32be(cpustate->program, addr, data); + else + memory_write_dword_32le(cpustate->program, addr, data); } @@ -147,7 +150,10 @@ INLINE void arm7_cpu_write16(arm_state *cpustate, UINT32 addr, UINT16 data) } addr &= ~1; - memory_write_word_32le(cpustate->program, addr, data); + if ( cpustate->endian == ENDIANNESS_BIG ) + memory_write_word_32be(cpustate->program, addr, data); + else + memory_write_word_32le(cpustate->program, addr, data); } INLINE void arm7_cpu_write8(arm_state *cpustate, UINT32 addr, UINT8 data) @@ -157,7 +163,10 @@ INLINE void arm7_cpu_write8(arm_state *cpustate, UINT32 addr, UINT8 data) addr = arm7_tlb_translate( cpustate, addr ); } - memory_write_byte_32le(cpustate->program, addr, data); + if ( cpustate->endian == ENDIANNESS_BIG ) + memory_write_byte_32be(cpustate->program, addr, data); + else + memory_write_byte_32le(cpustate->program, addr, data); } INLINE UINT32 arm7_cpu_read32(arm_state *cpustate, offs_t addr) @@ -171,12 +180,18 @@ INLINE UINT32 arm7_cpu_read32(arm_state *cpustate, offs_t addr) if (addr & 3) { - result = memory_read_dword_32le(cpustate->program, addr & ~3); + if ( cpustate->endian == ENDIANNESS_BIG ) + result = memory_read_dword_32be(cpustate->program, addr & ~3); + else + result = memory_read_dword_32le(cpustate->program, addr & ~3); result = (result >> (8 * (addr & 3))) | (result << (32 - (8 * (addr & 3)))); } else { - result = memory_read_dword_32le(cpustate->program, addr); + if ( cpustate->endian == ENDIANNESS_BIG ) + result = memory_read_dword_32be(cpustate->program, addr); + else + result = memory_read_dword_32le(cpustate->program, addr); } return result; @@ -191,7 +206,10 @@ INLINE UINT16 arm7_cpu_read16(arm_state *cpustate, offs_t addr) addr = arm7_tlb_translate( cpustate, addr ); } - result = memory_read_word_32le(cpustate->program, addr & ~1); + if ( cpustate->endian == ENDIANNESS_BIG ) + result = memory_read_word_32be(cpustate->program, addr & ~1); + else + result = memory_read_word_32le(cpustate->program, addr & ~1); if (addr & 1) { @@ -209,7 +227,10 @@ INLINE UINT8 arm7_cpu_read8(arm_state *cpustate, offs_t addr) } // Handle through normal 8 bit handler (for 32 bit cpu) - return memory_read_byte_32le(cpustate->program, addr); + if ( cpustate->endian == ENDIANNESS_BIG ) + return memory_read_byte_32be(cpustate->program, addr); + else + return memory_read_byte_32le(cpustate->program, addr); } /*************** @@ -553,6 +574,7 @@ static void arm7_core_reset(legacy_cpu_device *device) cpustate->irq_callback = save_irqcallback; cpustate->device = device; cpustate->program = device->space(AS_PROGRAM); + cpustate->endian = ENDIANNESS_LITTLE; /* start up in SVC mode with interrupts disabled. */ SwitchMode(cpustate, eARM7_MODE_SVC); diff --git a/src/emu/cpu/arm7/arm7core.h b/src/emu/cpu/arm7/arm7core.h index 2a42572ae6a..e3192dca64b 100644 --- a/src/emu/cpu/arm7/arm7core.h +++ b/src/emu/cpu/arm7/arm7core.h @@ -160,6 +160,7 @@ enum UINT8 pendingUnd; \ UINT8 pendingSwi; \ INT32 iCount; \ + endianness_t endian; \ device_irq_callback irq_callback; \ legacy_cpu_device *device; \ const address_space *program; diff --git a/src/emu/cpu/arm7/arm7dasm.c b/src/emu/cpu/arm7/arm7dasm.c index 168aa271c53..bc676c8bc5f 100644 --- a/src/emu/cpu/arm7/arm7dasm.c +++ b/src/emu/cpu/arm7/arm7dasm.c @@ -1317,7 +1317,18 @@ CPU_DISASSEMBLE( arm7arm ) return arm7_disasm(buffer, pc, oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24)) | 4; } +CPU_DISASSEMBLE( arm7arm_be ) +{ + return arm7_disasm(buffer, pc, oprom[3] | (oprom[2] << 8) | (oprom[1] << 16) | (oprom[0] << 24)) | 4; +} + CPU_DISASSEMBLE( arm7thumb ) { return thumb_disasm(buffer, pc, oprom[0] | (oprom[1] << 8)) | 2; } + +CPU_DISASSEMBLE( arm7thumb_be ) +{ + return thumb_disasm(buffer, pc, oprom[1] | (oprom[0] << 8)) | 2; +} + |
