diff options
| author | 2009-06-22 19:12:34 +0000 | |
|---|---|---|
| committer | 2009-06-22 19:12:34 +0000 | |
| commit | b0d558544ff8a51b8c01299e55664a61c45a21c6 (patch) | |
| tree | 986de310410d266403198d802dd8a372ad9928a9 /src | |
| parent | 8c5e1a15a816557bd502ca49e22d5697d8aa0b05 (diff) | |
mc68hc11: Added SWI, WAI, STOP, RORA, RORB
Diffstat (limited to 'src')
| -rw-r--r-- | src/emu/cpu/mc68hc11/hc11ops.c | 107 | ||||
| -rw-r--r-- | src/emu/cpu/mc68hc11/hc11ops.h | 10 | ||||
| -rw-r--r-- | src/emu/cpu/mc68hc11/mc68hc11.c | 48 | ||||
| -rw-r--r-- | src/mame/drivers/hitpoker.c | 28 |
4 files changed, 174 insertions, 19 deletions
diff --git a/src/emu/cpu/mc68hc11/hc11ops.c b/src/emu/cpu/mc68hc11/hc11ops.c index ff572397425..c152044cd6c 100644 --- a/src/emu/cpu/mc68hc11/hc11ops.c +++ b/src/emu/cpu/mc68hc11/hc11ops.c @@ -2468,6 +2468,46 @@ static void HC11OP(rolb)(hc11_state *cpustate) CYCLES(cpustate, 2); } +/* RORA 0x46 */ +static void HC11OP(rora)(hc11_state *cpustate) +{ + UINT8 c = (REG_A & 1); + UINT16 r = ((REG_A & 0x7f) >> 1) | (cpustate->ccr & CC_C ? 0x80 : 0); + CLEAR_NZVC(cpustate); + cpustate->ccr |= (c & 1) ? CC_C : 0; + REG_A = (UINT16)(r); + SET_N8(REG_A); + SET_Z8(REG_A); + + if (((cpustate->ccr & CC_N) == CC_N && (cpustate->ccr & CC_C) == 0) || + ((cpustate->ccr & CC_N) == 0 && (cpustate->ccr & CC_C) == CC_C)) + { + cpustate->ccr |= CC_V; + } + + CYCLES(cpustate, 2); +} + +/* RORB 0x56 */ +static void HC11OP(rorb)(hc11_state *cpustate) +{ + UINT8 c = (REG_B & 1); + UINT16 r = ((REG_B & 0x7f) >> 1) | (cpustate->ccr & CC_C ? 0x80 : 0); + CLEAR_NZVC(cpustate); + cpustate->ccr |= (c & 1) ? CC_C : 0; + REG_B = (UINT16)(r); + SET_N8(REG_B); + SET_Z8(REG_B); + + if (((cpustate->ccr & CC_N) == CC_N && (cpustate->ccr & CC_C) == 0) || + ((cpustate->ccr & CC_N) == 0 && (cpustate->ccr & CC_C) == CC_C)) + { + cpustate->ccr |= CC_V; + } + + CYCLES(cpustate, 2); +} + /* RTI 0x3B */ static void HC11OP(rti)(hc11_state *cpustate) { @@ -2715,6 +2755,8 @@ static void HC11OP(std_indy)(hc11_state *cpustate) CYCLES(cpustate, 6); } + + /* STX EXT 0xFF */ static void HC11OP(stx_ext)(hc11_state *cpustate) { @@ -2754,6 +2796,27 @@ static void HC11OP(sty_indx)(hc11_state *cpustate) CYCLES(cpustate, 6); } +/* STOP 0xCF */ +static void HC11OP(stop)(hc11_state *cpustate) +{ + if(cpustate->stop_state == 0 && ((cpustate->ccr & CC_S) == 0)) + { + cpustate->stop_state = 1; + } + + if(cpustate->stop_state == 1) + { + SET_PC(cpustate, cpustate->ppc); // wait for an exception + } + + if(cpustate->stop_state == 2) + { + cpustate->stop_state = 0; + } + + CYCLES(cpustate, 2); +} + /* SUBA DIR 0xd0 */ static void HC11OP(suba_dir)(hc11_state *cpustate) { @@ -2892,6 +2955,23 @@ static void HC11OP(subd_indy)(hc11_state *cpustate) CYCLES(cpustate, 7); } +/* SWI 0x3F */ +static void HC11OP(swi)(hc11_state *cpustate) +{ + UINT16 pc_vector; + //cpustate->pc++; + PUSH16(cpustate, cpustate->pc); + PUSH16(cpustate, cpustate->iy); + PUSH16(cpustate, cpustate->ix); + PUSH8(cpustate, REG_A); + PUSH8(cpustate, REG_B); + PUSH8(cpustate, cpustate->ccr); + pc_vector = READ16(cpustate, 0xfff6); + SET_PC(cpustate, pc_vector); + cpustate->ccr |= CC_I; //irq taken, mask the flag + CYCLES(cpustate, 14); +} + /* TAB 0x16 */ static void HC11OP(tab)(hc11_state *cpustate) { @@ -3020,6 +3100,33 @@ static void HC11OP(tys)(hc11_state *cpustate) CYCLES(cpustate, 4); } +/* WAI 0x3E */ +static void HC11OP(wai)(hc11_state *cpustate) +{ + if(cpustate->wait_state == 0) + { + /* TODO: the following is bogus, pushes regs HERE in an instruction that wants an irq to go out? */ + PUSH16(cpustate, cpustate->pc); + PUSH16(cpustate, cpustate->iy); + PUSH16(cpustate, cpustate->ix); + PUSH8(cpustate, REG_A); + PUSH8(cpustate, REG_B); + PUSH8(cpustate, cpustate->ccr); + CYCLES(cpustate, 14); + cpustate->wait_state = 1; + } + if(cpustate->wait_state == 1) + { + SET_PC(cpustate, cpustate->ppc); // wait for an exception + CYCLES(cpustate, 1); + } + if(cpustate->wait_state == 2) + { + cpustate->wait_state = 0; + CYCLES(cpustate, 1); + } +} + /* XGDX 0x8F */ static void HC11OP(xgdx)(hc11_state *cpustate) { diff --git a/src/emu/cpu/mc68hc11/hc11ops.h b/src/emu/cpu/mc68hc11/hc11ops.h index feedf0fb100..d66090678fe 100644 --- a/src/emu/cpu/mc68hc11/hc11ops.h +++ b/src/emu/cpu/mc68hc11/hc11ops.h @@ -238,8 +238,8 @@ static const hc11_opcode_list_struct hc11_opcode_list[] = // { 0, 0x79, HC11OP(rol_ext) }, // { 0, 0x69, HC11OP(rol_indx) }, // { 0x18, 0x69, HC11OP(rol_indy) }, -// { 0, 0x46, HC11OP(rora) }, -// { 0, 0x56, HC11OP(rorb) }, + { 0, 0x46, HC11OP(rora) }, + { 0, 0x56, HC11OP(rorb) }, // { 0, 0x76, HC11OP(ror_ext) }, // { 0, 0x66, HC11OP(ror_indx) }, // { 0x18, 0x66, HC11OP(ror_indy) }, @@ -274,7 +274,7 @@ static const hc11_opcode_list_struct hc11_opcode_list[] = { 0, 0xff, HC11OP(stx_ext) }, { 0x18, 0xff, HC11OP(sty_ext) }, { 0x1a, 0xef, HC11OP(sty_indx) }, -// { 0, 0xcf, HC11OP(stop) }, + { 0, 0xcf, HC11OP(stop) }, // { 0, 0x9f, HC11OP(sts_dir) }, // { 0, 0xbf, HC11OP(sts_ext) }, // { 0, 0xaf, HC11OP(sts_indx) }, @@ -302,7 +302,7 @@ static const hc11_opcode_list_struct hc11_opcode_list[] = // { 0, 0xb3, HC11OP(subd_ext) }, { 0, 0xa3, HC11OP(subd_indx) }, { 0x18, 0xa3, HC11OP(subd_indy) }, -// { 0, 0x3f, HC11OP(swi) }, + { 0, 0x3f, HC11OP(swi) }, { 0, 0x16, HC11OP(tab) }, { 0, 0x06, HC11OP(tap) }, { 0, 0x17, HC11OP(tba) }, @@ -317,7 +317,7 @@ static const hc11_opcode_list_struct hc11_opcode_list[] = { 0x18, 0x30, HC11OP(tsy) }, { 0, 0x35, HC11OP(txs) }, { 0x18, 0x35, HC11OP(tys) }, -// { 0, 0x3e, HC11OP(wai) }, + { 0, 0x3e, HC11OP(wai) }, { 0, 0x8f, HC11OP(xgdx) }, { 0x18, 0x8f, HC11OP(xgdy) }, diff --git a/src/emu/cpu/mc68hc11/mc68hc11.c b/src/emu/cpu/mc68hc11/mc68hc11.c index 544a4b42e1e..7de84c434b6 100644 --- a/src/emu/cpu/mc68hc11/mc68hc11.c +++ b/src/emu/cpu/mc68hc11/mc68hc11.c @@ -6,6 +6,9 @@ TODO: - Interrupts handling is really bare-bones, just to make Hit Poker happy; - Complete opcodes hook-up; +- Add config-selectable I/O / internal RAM and the ability to enable/disable it; +- Emulate the MC68HC12 (same as HC11 with a bunch of new opcodes); + */ #include "debugger.h" @@ -66,6 +69,7 @@ struct _hc11_state int reg_position; UINT8 *internal_ram; int internal_ram_size; + UINT8 wait_state,stop_state; }; INLINE hc11_state *get_safe_token(const device_config *device) @@ -378,6 +382,8 @@ static CPU_RESET( hc11 ) { hc11_state *cpustate = get_safe_token(device); cpustate->pc = READ16(cpustate, 0xfffe); + cpustate->wait_state = 0; + cpustate->stop_state = 0; } static CPU_EXIT( hc11 ) @@ -385,21 +391,51 @@ static CPU_EXIT( hc11 ) } +/* +IRQ table vectors: +0xffd6: SCI +0xffd8: SPI +0xffda: Pulse Accumulator Input Edge +0xffdc: Pulse Accumulator Overflow +0xffde: Timer Overflow +0xffe0: Timer Output Capture 5 +0xffe2: Timer Output Capture 4 +0xffe4: Timer Output Capture 3 +0xffe6: Timer Output Capture 2 +0xffe8: Timer Output Capture 1 +0xffea: Timer Input Capture 3 +0xffec: Timer Input Capture 2 +0xffee: Timer Input Capture 1 +0xfff0: Real Time Int +0xfff2: IRQ +0xfff4: XIRQ +0xfff6: SWI (Trap IRQ) +0xfff8: Illegal Opcode (NMI) +0xfffa: CO-Processor Fail +0xfffc: Clock Monitor +0xfffe: RESET +*/ + static void check_irq_lines(hc11_state *cpustate) { if( cpustate->irq_state[MC68HC11_IRQ_LINE]!=CLEAR_LINE && (!(cpustate->ccr & CC_I)) ) { UINT16 pc_vector; - PUSH16(cpustate, cpustate->pc); - PUSH16(cpustate, cpustate->iy); - PUSH16(cpustate, cpustate->ix); - PUSH8(cpustate, REG_A); - PUSH8(cpustate, REG_B); - PUSH8(cpustate, cpustate->ccr); + if(cpustate->wait_state == 0) + { + PUSH16(cpustate, cpustate->pc); + PUSH16(cpustate, cpustate->iy); + PUSH16(cpustate, cpustate->ix); + PUSH8(cpustate, REG_A); + PUSH8(cpustate, REG_B); + PUSH8(cpustate, cpustate->ccr); + } pc_vector = READ16(cpustate, 0xfff2); SET_PC(cpustate, pc_vector); cpustate->ccr |= CC_I; //irq taken, mask the flag + if(cpustate->wait_state == 1) { cpustate->wait_state = 2; } + if(cpustate->stop_state == 1) { cpustate->stop_state = 2; } (void)(*cpustate->irq_callback)(cpustate->device, MC68HC11_IRQ_LINE); } } diff --git a/src/mame/drivers/hitpoker.c b/src/mame/drivers/hitpoker.c index e3dc560c06f..2ab0b1fd91f 100644 --- a/src/mame/drivers/hitpoker.c +++ b/src/mame/drivers/hitpoker.c @@ -91,8 +91,8 @@ VIDEO_UPDATE(hitpoker) { int tile; - tile = (((videoram[count]<<8)|(videoram[count+1])) & 0x1fff); - drawgfx(bitmap,gfx,tile,1,0,0,(x-1)*8,(y+0)*8,cliprect,TRANSPARENCY_NONE,0); + tile = (((videoram[count]<<8)|(videoram[count+1])) & 0x3fff); + drawgfx(bitmap,gfx,tile,0,0,0,(x-1)*8,(y+0)*8,cliprect,TRANSPARENCY_NONE,0); count+=2; } @@ -126,7 +126,7 @@ static READ8_HANDLER( hitpoker_cram_r ) if(hitpoker_pic_data & 0x10) return paletteram[offset]; else - return ROM[offset+0xbf00]; + return ROM[offset+0xc000]; } static WRITE8_HANDLER( hitpoker_cram_w ) @@ -137,11 +137,15 @@ static WRITE8_HANDLER( hitpoker_cram_w ) datax=256*paletteram[offset*2]+paletteram[offset*2+1]; /* TODO: format is wrong */ - b = ((datax)&0x001f)>>0; - g = ((datax)&0x03e0)>>5; - r = ((datax)&0xfc00)>>10; + b = ((datax)&0xe000)>>13; + g = ((datax)&0x1c00)>>10; + r = ((datax)&0x0380)>>7; - palette_set_color_rgb(space->machine, offset, pal6bit(r), pal5bit(g), pal5bit(b)); + b|= ((datax)&0x0004)<<1; + g|= ((datax)&0x0002)<<2; + r|= ((datax)&0x0001)<<3; + + palette_set_color_rgb(space->machine, offset, pal4bit(r), pal4bit(g), pal4bit(b)); } static WRITE8_HANDLER( hitpoker_crtc_w ) @@ -165,6 +169,11 @@ static READ8_HANDLER( rtc_r ) return 0x80; //kludge it for now } +static READ8_HANDLER( test_r ) +{ + return mame_rand(space->machine); //kludge it for now +} + static READ8_HANDLER( hitpoker_pic_r ) { // logerror("R\n"); @@ -193,10 +202,10 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0xb600, 0xbdff) AM_RAM AM_RANGE(0xbe0c, 0xbe0c) AM_READNOP //irq ack? AM_RANGE(0xbe0d, 0xbe0d) AM_READ(rtc_r) -// AM_RANGE(0xbe0a, 0xbe5f) AM_READ(test_r) AM_RANGE(0xbe80, 0xbe81) AM_WRITE(hitpoker_crtc_w) AM_RANGE(0xbe90, 0xbe91) AM_DEVREADWRITE("ay", ay8910_r,ay8910_address_data_w) AM_RANGE(0xbea0, 0xbea0) AM_READ_PORT("VBLANK") //probably other bits as well + AM_RANGE(0xbe00, 0xbeff) AM_READ(test_r) AM_RANGE(0xc000, 0xefff) AM_READWRITE(hitpoker_cram_r,hitpoker_cram_w) AM_RANGE(0x0000, 0xbdff) AM_ROM AM_RANGE(0xbf00, 0xffff) AM_ROM @@ -297,6 +306,9 @@ ROM_START( hitpoker ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "u4.bin", 0x00000, 0x10000, CRC(0016497a) SHA1(017320bfe05fea8a48e26a66c0412415846cee7c) ) + ROM_REGION( 0x10000, "pic", 0 ) + ROM_LOAD( "pic", 0x00000, 0x1000, NO_DUMP ) // unknown type + ROM_REGION( 0x100000, "gfx1", 0 ) // tile 0x4c8 seems to contain something non-gfx related, could be tilemap / colour data, check! ROM_LOAD16_BYTE( "u42.bin", 0x00001, 0x40000, CRC(cbe56fec) SHA1(129bfd10243eaa7fb6a087f96de90228e6030353) ) ROM_LOAD16_BYTE( "u43.bin", 0x00000, 0x40000, CRC(6c0d4283) SHA1(04a4fd82f5cc0ed9f548e490ac67d287227073c3) ) |
