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author Olivier Galibert <galibert@pobox.com>2012-12-17 23:36:42 +0000
committer Olivier Galibert <galibert@pobox.com>2012-12-17 23:36:42 +0000
commit8b185b0edc1240d9a2becd7ab518eff103319c02 (patch)
tree5c7dec442ce894f9aa5b4c0f5cace225d583d3e3 /src
parentb9afe99e631493c74d414c49b3f3ac253f2d22db (diff)
mcs96: divb reg,#nn fix [O. Galibert]
Diffstat (limited to 'src')
-rw-r--r--src/emu/cpu/mcs96/mcs96ops.lst1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/emu/cpu/mcs96/mcs96ops.lst b/src/emu/cpu/mcs96/mcs96ops.lst
index 0f41d2c777d..e5ffdf2a663 100644
--- a/src/emu/cpu/mcs96/mcs96ops.lst
+++ b/src/emu/cpu/mcs96/mcs96ops.lst
@@ -1167,7 +1167,6 @@ fe9c divb direct_2
fe9d divb immed_2b
PSW &= ~F_V;
- OP1 = reg_r8(OP1);
if(OP1) {
TMP = reg_r16(OP2);
UINT32 TMP2 = INT16(TMP) / INT8(OP1);