diff options
| author | 2021-09-21 17:38:58 +0200 | |
|---|---|---|
| committer | 2021-09-21 17:38:58 +0200 | |
| commit | 6c7cd1f5c6ff513e53861923f3680521870f347d (patch) | |
| tree | 65062a55d4a4c1f4a4212be7bb78fd5a54ab451f /src | |
| parent | 3408a5c4e2cace2ece3c1e23c605456f46c606c2 (diff) | |
plsonic4.cpp: added inputs, dips as per test mode
Diffstat (limited to 'src')
| -rw-r--r-- | src/mame/drivers/plsonic4.cpp | 141 |
1 files changed, 89 insertions, 52 deletions
diff --git a/src/mame/drivers/plsonic4.cpp b/src/mame/drivers/plsonic4.cpp index ab76154919a..9abcc87e3c0 100644 --- a/src/mame/drivers/plsonic4.cpp +++ b/src/mame/drivers/plsonic4.cpp @@ -23,6 +23,7 @@ There's a very small riser PCB marked 1B-2001-241 with a couple of TTL and a sl #include "emu.h" #include "cpu/z80/z80.h" +#include "machine/nvram.h" #include "emupal.h" #include "screen.h" #include "tilemap.h" @@ -86,7 +87,8 @@ uint32_t plsonic4_state::screen_update(screen_device &screen, bitmap_rgb32 &bitm void plsonic4_state::prg_map(address_map &map) { map(0x0000, 0x7fff).rom().region("maincpu", 0); - map(0x8000, 0x8fff).ram(); + map(0x8000, 0x87ff).ram(); + map(0x8800, 0x8fff).ram().share("nvram"); // TODO: verify size map(0x9000, 0x97ff).ram().share(m_videoram); // TODO: really all this range? map(0x9800, 0x99ff).ram(); // ?? } @@ -95,62 +97,95 @@ void plsonic4_state::io_map(address_map &map) { map.global_mask(0xff); - // map(0x00, 0x1f).w(); // digital counters? - // map(0x00, 0x03).r(); // dips? coins? inputs? coin counters? + // map(0x00, 0x1f).nopw(); // digital counters? lamps? + map(0x00, 0x00).portr("IN0"); + map(0x01, 0x01).portr("IN1"); + map(0x02, 0x02).portr("DSW0"); + map(0x03, 0x03).portr("DSW1"); } static INPUT_PORTS_START( plsonic4 ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("DSW0") - PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - - PORT_START("DSW1") // 4 dip bank - PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START1 ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_START2 ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(1) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) + + PORT_START("IN1") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(2) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(2) + + PORT_START("DSW0") // coins + 4 dip bank + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SERVICE ) + PORT_DIPNAME( 0x08, 0x00, DEF_STR( Test ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x08, DEF_STR( On ) ) + PORT_DIPNAME( 0xf0, 0x00, DEF_STR( Game_Time ) ) + PORT_DIPSETTING( 0x00, "2:00" ) + PORT_DIPSETTING( 0x20, "2:10" ) + PORT_DIPSETTING( 0x10, "2:20" ) + PORT_DIPSETTING( 0x30, "2:30" ) + PORT_DIPSETTING( 0x80, "2:40" ) + PORT_DIPSETTING( 0xa0, "2:50" ) + PORT_DIPSETTING( 0x90, "3:00" ) + PORT_DIPSETTING( 0xb0, "3:10" ) + PORT_DIPSETTING( 0x40, "3:30" ) + PORT_DIPSETTING( 0x60, "3:40" ) + PORT_DIPSETTING( 0x50, "4:00" ) + PORT_DIPSETTING( 0x70, "4:10" ) + PORT_DIPSETTING( 0xc0, "4:30" ) + PORT_DIPSETTING( 0xe0, "5:00" ) + PORT_DIPSETTING( 0xd0, "5:30" ) + PORT_DIPSETTING( 0xf0, "6:00" ) + + PORT_START("DSW1") + PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) ) + PORT_DIPSETTING( 0x03, DEF_STR( 1C_4C ) ) + PORT_DIPSETTING( 0x04, DEF_STR( 1C_5C ) ) + PORT_DIPSETTING( 0x05, DEF_STR( 1C_6C ) ) + PORT_DIPSETTING( 0x06, DEF_STR( 1C_7C ) ) + PORT_DIPSETTING( 0x07, DEF_STR( 1C_8C ) ) + PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x09, DEF_STR( 2C_3C ) ) + PORT_DIPSETTING( 0x0a, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x0b, DEF_STR( 3C_2C ) ) + PORT_DIPSETTING( 0x0c, DEF_STR( 4C_1C ) ) + PORT_DIPSETTING( 0x0d, DEF_STR( 4C_3C ) ) + PORT_DIPSETTING( 0x0e, DEF_STR( 5C_1C ) ) + PORT_DIPSETTING( 0x0f, "Disabled" ) // 'inhibido' + PORT_DIPNAME( 0xf0, 0x00, DEF_STR( Coin_B ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x20, DEF_STR( 1C_3C ) ) + PORT_DIPSETTING( 0x30, DEF_STR( 1C_4C ) ) + PORT_DIPSETTING( 0x40, DEF_STR( 1C_5C ) ) + PORT_DIPSETTING( 0x50, DEF_STR( 1C_6C ) ) + PORT_DIPSETTING( 0x60, DEF_STR( 1C_7C ) ) + PORT_DIPSETTING( 0x70, DEF_STR( 1C_8C ) ) + PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x90, DEF_STR( 2C_3C ) ) + PORT_DIPSETTING( 0xa0, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0xb0, DEF_STR( 3C_2C ) ) + PORT_DIPSETTING( 0xc0, DEF_STR( 4C_1C ) ) + PORT_DIPSETTING( 0xd0, DEF_STR( 4C_3C ) ) + PORT_DIPSETTING( 0xe0, DEF_STR( 5C_1C ) ) + PORT_DIPSETTING( 0xf0, "Disabled" ) // 'inhibido' INPUT_PORTS_END @@ -166,6 +201,8 @@ void plsonic4_state::plsonic4(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &plsonic4_state::prg_map); m_maincpu->set_addrmap(AS_IO, &plsonic4_state::io_map); + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); + // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); // TODO: this is just copy-pasted, needs to be fixed screen.set_refresh_hz(60); |
