diff options
| author | 2026-05-18 15:13:29 +0300 | |
|---|---|---|
| committer | 2026-05-18 15:13:29 +0300 | |
| commit | 40fa6ee6e64c07456d872ed20f109a76ee1a0841 (patch) | |
| tree | 4fc5d9f55021edeea9cfada32be43d326c7cca5a /src | |
| parent | 06d054cfb4ddb3b54fa1a00c067664814d43a5c2 (diff) | |
luxor/x37: Fixed bus error handling. [Curt Coder]
Diffstat (limited to 'src')
| -rw-r--r-- | src/mame/luxor/x37.cpp | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/src/mame/luxor/x37.cpp b/src/mame/luxor/x37.cpp index ca53e3b7880..ebee207650c 100644 --- a/src/mame/luxor/x37.cpp +++ b/src/mame/luxor/x37.cpp @@ -85,7 +85,7 @@ protected: virtual void machine_reset() override ATTR_COLD; private: - required_device<m68000_base_device> m_cpu; + required_device<m68000_musashi_device> m_cpu; required_device<ns32081_device> m_fpu; required_device<hd63450_device> m_dmac; required_device<z8536_device> m_cio; @@ -207,8 +207,7 @@ uint16_t x37_state::ram_r(offs_t offset, uint16_t mem_mask) if (!machine().side_effects_disabled() && at1 && !at0) { // AT1=1, AT0=0: no access - m_cpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); - m_cpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); + m_cpu->set_buserror_details(offset << 1, 1, m_cpu->get_fc(), true); logerror("%s: Invalid RAM read at offset %06x (MA %06x, AT1=1, AT0=0)\n", machine().describe_context(), offset<<1, ma); } else if (ma < 0x400000) { if (ACCESSING_BITS_0_7) @@ -230,8 +229,7 @@ void x37_state::ram_w(offs_t offset, uint16_t data, uint16_t mem_mask) if (!machine().side_effects_disabled() && !at0) { // AT0=0: read-only (AT1=0) or no access (AT1=1) - m_cpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); - m_cpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); + m_cpu->set_buserror_details(offset << 1, 0, m_cpu->get_fc(), true); logerror("%s: Invalid RAM write at offset %06x (MA %06x, AT1=%d, AT0=0)\n", machine().describe_context(), offset<<1, ma, at1); return; } @@ -365,6 +363,8 @@ void x37_state::cio_pb_w(uint8_t data) */ m_cb = data; + + LOG("%s CB %02x\n", machine().describe_context(), data); } uint8_t x37_state::cio_pc_r() @@ -485,6 +485,8 @@ void x37_state::machine_start() void x37_state::machine_reset() { + m_cpu->set_emmu_enable(true); + m_cb = 0xff; xdck_w(0, 0, 0xffff); |
