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author Scott Stone <tafoid@users.noreply.github.com>2013-11-19 22:38:39 +0000
committer Scott Stone <tafoid@users.noreply.github.com>2013-11-19 22:38:39 +0000
commit3b4730b4ceaa0e2b2fbf54f5e5395c1fce3bbcc5 (patch)
treeb935a3c030ec54881f78ee8023a87c234a476d74 /src
parentc4058ec7e29e0055578302ee85a57fa6f0ead6ba (diff)
jedutil.c: [Kevin Eshbach]
- Corrected the output of the PAL20X4, PAL20X8, PAL20X10 to show the XOR on the relevant sum of products. - When viewing a device the size of the JED file is verified to match the size of the device. - Replaced hard-coded symbol strings with constants. - Started experimental work for supporting RICOH PAL’s. (Currently ifdef'ed out.) - Added support for viewing the following devices and the corresponding regression test data. (PALCE16V8, PAL10P8, PAL12P6, PAL14P4, PAL16P2, PAL16P8, PAL16RP4, PAL16RP6, PAL16RP8, PAL6L16, PAL8L14, PAL12H10, PAL12L10, PAL14H8, PAL14L8, PAL16H6, PAL16L6, PAL18H4, PAL18L4, PAL20C1 and PAL20L2)
Diffstat (limited to 'src')
-rw-r--r--src/regtests/jedutil/baseline/pal10p8/pal10p8.txt49
-rw-r--r--src/regtests/jedutil/baseline/pal12h10/pal12h10.txt59
-rw-r--r--src/regtests/jedutil/baseline/pal12l10/pal12l10.txt59
-rw-r--r--src/regtests/jedutil/baseline/pal12p6/pal12p6.txt43
-rw-r--r--src/regtests/jedutil/baseline/pal14h8/pal14h8.txt53
-rw-r--r--src/regtests/jedutil/baseline/pal14l8/pal14l8.txt53
-rw-r--r--src/regtests/jedutil/baseline/pal14p4/pal14p4.txt37
-rw-r--r--src/regtests/jedutil/baseline/pal16h6/pal16h6.txt47
-rw-r--r--src/regtests/jedutil/baseline/pal16l6/pal16l6.txt47
-rw-r--r--src/regtests/jedutil/baseline/pal16p2/pal16p2.txt31
-rw-r--r--src/regtests/jedutil/baseline/pal16p8/pal16p8.txt89
-rw-r--r--src/regtests/jedutil/baseline/pal16rp4/pal16rp4.txt93
-rw-r--r--src/regtests/jedutil/baseline/pal16rp6/pal16rp6.txt95
-rw-r--r--src/regtests/jedutil/baseline/pal16rp8/pal16rp8.txt97
-rw-r--r--src/regtests/jedutil/baseline/pal18h4/pal18h4.txt41
-rw-r--r--src/regtests/jedutil/baseline/pal18l4/pal18l4.txt41
-rw-r--r--src/regtests/jedutil/baseline/pal20l2/pal20l2.txt31
-rw-r--r--src/regtests/jedutil/baseline/pal20x10/pal20x10.txt20
-rw-r--r--src/regtests/jedutil/baseline/pal20x4/pal20x4.txt8
-rw-r--r--src/regtests/jedutil/baseline/pal20x8/pal20x8.txt16
-rw-r--r--src/regtests/jedutil/baseline/pal6l16/pal6l16.txt73
-rw-r--r--src/regtests/jedutil/baseline/pal8l14/pal8l14.txt65
-rw-r--r--src/regtests/jedutil/baseline/palce16v8/pal10h8-as-palce16v8.txt97
-rw-r--r--src/regtests/jedutil/baseline/palce16v8/pal12h6-as-palce16v8.txt75
-rw-r--r--src/regtests/jedutil/baseline/palce16v8/pal14h4-as-palce16v8.txt53
-rw-r--r--src/regtests/jedutil/baseline/palce16v8/pal16r4-as-palce16v8.txt93
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal10p8/pal10p8.eqn30
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal12h10/pal12h10.eqn46
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal12l10/pal12l10.eqn46
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal12p6/pal12p6.eqn28
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal14h8/pal14h8.eqn42
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal14p4/pal14p4.eqn26
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal16h6/pal16h6.eqn38
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal16l6/pal16l6.eqn38
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal16p8/pal16p8.eqn78
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal16rp4/pal16rp4.eqn82
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal16rp6/pal16rp6.eqn84
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal16rp8/pal16rp8.eqn86
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal18h4/pal18h4.eqn34
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal18l4/pal18l4.eqn34
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal20c1/pal20c1.eqn26
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal20l2/pal20l2.eqn26
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal20x10/pal20x10.eqn20
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal20x4/pal20x4.eqn8
-rw-r--r--src/regtests/jedutil/eqns/Opal_Jr/pal20x8/pal20x8.eqn16
-rw-r--r--src/regtests/jedutil/eqns/PALASM/pal6l16/pal6l16.pds53
-rw-r--r--src/regtests/jedutil/eqns/PALASM/pal8l14/pal8l14.pds51
-rw-r--r--src/regtests/jedutil/jeds/pal10p8/pal10p8.jed38
-rw-r--r--src/regtests/jedutil/jeds/pal12h10/pal12h10.jed42
-rw-r--r--src/regtests/jedutil/jeds/pal12l10/pal12l10.jed42
-rw-r--r--src/regtests/jedutil/jeds/pal12p6/pal12p6.jed36
-rw-r--r--src/regtests/jedutil/jeds/pal14h8/pal14h8.jed40
-rw-r--r--src/regtests/jedutil/jeds/pal14l8/pal14l8.jed40
-rw-r--r--src/regtests/jedutil/jeds/pal14p4/pal14p4.jed34
-rw-r--r--src/regtests/jedutil/jeds/pal16h6/pal16h6.jed38
-rw-r--r--src/regtests/jedutil/jeds/pal16l6/pal16l6.jed38
-rw-r--r--src/regtests/jedutil/jeds/pal16p8/pal16p8.jed86
-rw-r--r--src/regtests/jedutil/jeds/pal16rp4/pal16rp4.jed86
-rw-r--r--src/regtests/jedutil/jeds/pal16rp6/pal16rp6.jed86
-rw-r--r--src/regtests/jedutil/jeds/pal18h4/pal18h4.jed36
-rw-r--r--src/regtests/jedutil/jeds/pal18l4/pal18l4.jed36
-rw-r--r--src/regtests/jedutil/jeds/pal20c1/pal20c1.jed29
-rw-r--r--src/regtests/jedutil/jeds/pal20l2/pal20l2.jed30
-rw-r--r--src/regtests/jedutil/jeds/pal6l16/pal6l16.jed33
-rw-r--r--src/regtests/jedutil/jeds/pal8l14/pal8l14.jed31
-rw-r--r--src/regtests/jedutil/jeds/palce16v8/pal10l8-as-palce16v8.jed86
-rw-r--r--src/regtests/jedutil/jeds/palce16v8/pal16r6-as-palce16v8.jed86
-rw-r--r--src/tools/jedutil.c3319
68 files changed, 6447 insertions, 202 deletions
diff --git a/src/regtests/jedutil/baseline/pal10p8/pal10p8.txt b/src/regtests/jedutil/baseline/pal10p8/pal10p8.txt
new file mode 100644
index 00000000000..f84b1ed2b7f
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal10p8/pal10p8.txt
@@ -0,0 +1,49 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 11
+
+Outputs:
+
+12 (Combinatorial, No output feedback, Active high)
+13 (Combinatorial, No output feedback, Active high)
+14 (Combinatorial, No output feedback, Active low)
+15 (Combinatorial, No output feedback, Active low)
+16 (Combinatorial, No output feedback, Active high)
+17 (Combinatorial, No output feedback, Active low)
+18 (Combinatorial, No output feedback, Active low)
+19 (Combinatorial, No output feedback, Active low)
+
+Equations:
+
+o12 = i9 & i11 +
+ /i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8
+o12.oe = vcc
+
+o13 = i9 & /i11 +
+ i1 & /i2 & i3 & i4 & i5 & /i6 & i7 & i8
+o13.oe = vcc
+
+/o14 = /i9 & /i11 +
+ i1 & i2 & /i3 & i4 & /i5 & i6 & i7 & i8
+o14.oe = vcc
+
+/o15 = /i9 & i11 +
+ i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8
+o15.oe = vcc
+
+o16 = i9 & /i11 +
+ i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8
+o16.oe = vcc
+
+/o17 = i9 & i11 +
+ /i1 & /i2 & i3 & i4 & i5 & i6 & /i7 & /i8
+o17.oe = vcc
+
+/o18 = /i9 & /i11 +
+ i1 & i2 & i3 & /i4 & /i5 & i6 & i7 & i8
+o18.oe = vcc
+
+/o19 = /i9 & i11 +
+ i1 & /i2 & i3 & /i4 & i5 & /i6 & i7 & /i8
+o19.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal12h10/pal12h10.txt b/src/regtests/jedutil/baseline/pal12h10/pal12h10.txt
new file mode 100644
index 00000000000..95051f727fe
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal12h10/pal12h10.txt
@@ -0,0 +1,59 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13
+
+Outputs:
+
+14 (Combinatorial, No output feedback, Active high)
+15 (Combinatorial, No output feedback, Active high)
+16 (Combinatorial, No output feedback, Active high)
+17 (Combinatorial, No output feedback, Active high)
+18 (Combinatorial, No output feedback, Active high)
+19 (Combinatorial, No output feedback, Active high)
+20 (Combinatorial, No output feedback, Active high)
+21 (Combinatorial, No output feedback, Active high)
+22 (Combinatorial, No output feedback, Active high)
+23 (Combinatorial, No output feedback, Active high)
+
+Equations:
+
+o14 = /i1 & /i2 & /i3 +
+ /i4 & /i5 & /i6
+o14.oe = vcc
+
+o15 = /i7 +
+ /i8
+o15.oe = vcc
+
+o16 = /i9 & /i10 +
+ /i13
+o16.oe = vcc
+
+o17 = i1 & i2 & i3 +
+ i4 & i5 & i6
+o17.oe = vcc
+
+o18 = i7 +
+ i8
+o18.oe = vcc
+
+o19 = i9 & i10 +
+ i13
+o19.oe = vcc
+
+o20 = /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 & i13
+o20.oe = vcc
+
+o21 = i5 & i6 & /i7 & i11 +
+ /i1 & i3 & i6 & i7 & i10
+o21.oe = vcc
+
+o22 = i4 & i13 +
+ i9 & /i10 & /i11
+o22.oe = vcc
+
+o23 = /i4 & i10 & i11 +
+ i1 & /i13
+o23.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal12l10/pal12l10.txt b/src/regtests/jedutil/baseline/pal12l10/pal12l10.txt
new file mode 100644
index 00000000000..258009c6467
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal12l10/pal12l10.txt
@@ -0,0 +1,59 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13
+
+Outputs:
+
+14 (Combinatorial, No output feedback, Active low)
+15 (Combinatorial, No output feedback, Active low)
+16 (Combinatorial, No output feedback, Active low)
+17 (Combinatorial, No output feedback, Active low)
+18 (Combinatorial, No output feedback, Active low)
+19 (Combinatorial, No output feedback, Active low)
+20 (Combinatorial, No output feedback, Active low)
+21 (Combinatorial, No output feedback, Active low)
+22 (Combinatorial, No output feedback, Active low)
+23 (Combinatorial, No output feedback, Active low)
+
+Equations:
+
+/o14 = /i1 & /i2 & /i3 +
+ /i4 & /i5 & /i6
+o14.oe = vcc
+
+/o15 = /i7 +
+ /i8
+o15.oe = vcc
+
+/o16 = /i9 & /i10 +
+ /i13
+o16.oe = vcc
+
+/o17 = i1 & i2 & i3 +
+ i4 & i5 & i6
+o17.oe = vcc
+
+/o18 = i7 +
+ i8
+o18.oe = vcc
+
+/o19 = i9 & i10 +
+ i13
+o19.oe = vcc
+
+/o20 = /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 & i13
+o20.oe = vcc
+
+/o21 = i5 & i6 & /i7 & i11 +
+ /i1 & i3 & i6 & i7 & i10
+o21.oe = vcc
+
+/o22 = i4 & i13 +
+ i9 & /i10 & /i11
+o22.oe = vcc
+
+/o23 = /i4 & i10 & i11 +
+ i1 & /i13
+o23.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal12p6/pal12p6.txt b/src/regtests/jedutil/baseline/pal12p6/pal12p6.txt
new file mode 100644
index 00000000000..7398fcd24c4
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal12p6/pal12p6.txt
@@ -0,0 +1,43 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 19
+
+Outputs:
+
+13 (Combinatorial, No output feedback, Active high)
+14 (Combinatorial, No output feedback, Active low)
+15 (Combinatorial, No output feedback, Active low)
+16 (Combinatorial, No output feedback, Active high)
+17 (Combinatorial, No output feedback, Active low)
+18 (Combinatorial, No output feedback, Active low)
+
+Equations:
+
+o13 = i9 & /i11 +
+ i1 & /i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
+ i12 +
+ /i19
+o13.oe = vcc
+
+/o14 = /i9 & /i11 +
+ i1 & i2 & /i3 & i4 & /i5 & i6 & i7 & i8
+o14.oe = vcc
+
+/o15 = /i9 & i11 +
+ i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8
+o15.oe = vcc
+
+o16 = i9 & /i11 +
+ i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8
+o16.oe = vcc
+
+/o17 = i9 & i11 +
+ /i1 & /i2 & i3 & i4 & i5 & i6 & /i7 & /i8
+o17.oe = vcc
+
+/o18 = /i9 & /i11 +
+ i1 & i2 & i3 & /i4 & /i5 & i6 & i7 & i8 +
+ /i12 +
+ i19
+o18.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal14h8/pal14h8.txt b/src/regtests/jedutil/baseline/pal14h8/pal14h8.txt
new file mode 100644
index 00000000000..43f47a7b672
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal14h8/pal14h8.txt
@@ -0,0 +1,53 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 23
+
+Outputs:
+
+15 (Combinatorial, No output feedback, Active high)
+16 (Combinatorial, No output feedback, Active high)
+17 (Combinatorial, No output feedback, Active high)
+18 (Combinatorial, No output feedback, Active high)
+19 (Combinatorial, No output feedback, Active high)
+20 (Combinatorial, No output feedback, Active high)
+21 (Combinatorial, No output feedback, Active high)
+22 (Combinatorial, No output feedback, Active high)
+
+Equations:
+
+o15 = /i1 & /i2 +
+ /i3 +
+ /i4 +
+ /i5 & /i6
+o15.oe = vcc
+
+o16 = /i7 +
+ /i8
+o16.oe = vcc
+
+o17 = /i9 & /i10 +
+ /i13
+o17.oe = vcc
+
+o18 = i1 & i2 & i3 +
+ i4 & i5 & i6 & /i14
+o18.oe = vcc
+
+o19 = i7 +
+ i8
+o19.oe = vcc
+
+o20 = i9 & i10 & i14 +
+ i13
+o20.oe = vcc
+
+o21 = /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 & i13 & i23
+o21.oe = vcc
+
+o22 = i5 & i6 +
+ /i7 & i11 +
+ /i23 +
+ /i1 & i3 & i6 & i7 & i10
+o22.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal14l8/pal14l8.txt b/src/regtests/jedutil/baseline/pal14l8/pal14l8.txt
new file mode 100644
index 00000000000..cda9a70fb96
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal14l8/pal14l8.txt
@@ -0,0 +1,53 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 23
+
+Outputs:
+
+15 (Combinatorial, No output feedback, Active low)
+16 (Combinatorial, No output feedback, Active low)
+17 (Combinatorial, No output feedback, Active low)
+18 (Combinatorial, No output feedback, Active low)
+19 (Combinatorial, No output feedback, Active low)
+20 (Combinatorial, No output feedback, Active low)
+21 (Combinatorial, No output feedback, Active low)
+22 (Combinatorial, No output feedback, Active low)
+
+Equations:
+
+/o15 = /i1 & /i2 +
+ /i3 +
+ /i4 +
+ /i5 & /i6
+o15.oe = vcc
+
+/o16 = /i7 +
+ /i8
+o16.oe = vcc
+
+/o17 = /i9 & /i10 +
+ /i13
+o17.oe = vcc
+
+/o18 = i1 & i2 & i3 +
+ i4 & i5 & i6 & /i14
+o18.oe = vcc
+
+/o19 = i7 +
+ i8
+o19.oe = vcc
+
+/o20 = i9 & i10 & i14 +
+ i13
+o20.oe = vcc
+
+/o21 = /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 & i13 & i23
+o21.oe = vcc
+
+/o22 = i5 & i6 +
+ /i7 & i11 +
+ /i23 +
+ /i1 & i3 & i6 & i7 & i10
+o22.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal14p4/pal14p4.txt b/src/regtests/jedutil/baseline/pal14p4/pal14p4.txt
new file mode 100644
index 00000000000..333f0c9aaf6
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal14p4/pal14p4.txt
@@ -0,0 +1,37 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 18, 19
+
+Outputs:
+
+14 (Combinatorial, No output feedback, Active low)
+15 (Combinatorial, No output feedback, Active high)
+16 (Combinatorial, No output feedback, Active high)
+17 (Combinatorial, No output feedback, Active low)
+
+Equations:
+
+/o14 = i9 & i11 +
+ i1 & /i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
+ i12 & i18 +
+ /i13 & /i19
+o14.oe = vcc
+
+o15 = /i9 & i11 +
+ i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8 +
+ i12 & /i18 +
+ i13 & /i19
+o15.oe = vcc
+
+o16 = i9 & /i11 +
+ i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8 +
+ /i12 & /i18 +
+ /i13 & i19
+o16.oe = vcc
+
+/o17 = /i9 & /i11 +
+ i1 & i2 & i3 & /i4 & /i5 & i6 & i7 & i8 +
+ /i12 & i13 +
+ /i18 & i19
+o17.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal16h6/pal16h6.txt b/src/regtests/jedutil/baseline/pal16h6/pal16h6.txt
new file mode 100644
index 00000000000..3f2d9382690
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal16h6/pal16h6.txt
@@ -0,0 +1,47 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 22, 23
+
+Outputs:
+
+16 (Combinatorial, No output feedback, Active high)
+17 (Combinatorial, No output feedback, Active high)
+18 (Combinatorial, No output feedback, Active high)
+19 (Combinatorial, No output feedback, Active high)
+20 (Combinatorial, No output feedback, Active high)
+21 (Combinatorial, No output feedback, Active high)
+
+Equations:
+
+o16 = /i1 & /i2 +
+ /i3 & /i7 +
+ /i4 & /i8 +
+ /i5 & /i6
+o16.oe = vcc
+
+o17 = /i9 & /i10 +
+ /i13 & /i15 +
+ i1 & i2 & i3 +
+ i4 & i5 & i6 & /i14
+o17.oe = vcc
+
+o18 = i7 +
+ i8 & i15
+o18.oe = vcc
+
+o19 = i9 & i10 & i14 +
+ i13 & /i22
+o19.oe = vcc
+
+o20 = /i2 & i5 +
+ i6 & /i7 +
+ i3 & i6 +
+ i7 & i13 & i23
+o20.oe = vcc
+
+o21 = i5 & i6 & i22 +
+ /i7 & i11 +
+ /i23 +
+ /i1 & i3 & i6 & i7 & i10
+o21.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal16l6/pal16l6.txt b/src/regtests/jedutil/baseline/pal16l6/pal16l6.txt
new file mode 100644
index 00000000000..ffe78302caa
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal16l6/pal16l6.txt
@@ -0,0 +1,47 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 22, 23
+
+Outputs:
+
+16 (Combinatorial, No output feedback, Active low)
+17 (Combinatorial, No output feedback, Active low)
+18 (Combinatorial, No output feedback, Active low)
+19 (Combinatorial, No output feedback, Active low)
+20 (Combinatorial, No output feedback, Active low)
+21 (Combinatorial, No output feedback, Active low)
+
+Equations:
+
+/o16 = /i1 & /i2 +
+ /i3 & /i7 +
+ /i4 & /i8 +
+ /i5 & /i6
+o16.oe = vcc
+
+/o17 = /i9 & /i10 +
+ /i13 & /i15 +
+ i1 & i2 & i3 +
+ i4 & i5 & i6 & /i14
+o17.oe = vcc
+
+/o18 = i7 +
+ i8 & i15
+o18.oe = vcc
+
+/o19 = i9 & i10 & i14 +
+ i13 & /i22
+o19.oe = vcc
+
+/o20 = /i2 & i5 +
+ i6 & /i7 +
+ i3 & i6 +
+ i7 & i13 & i23
+o20.oe = vcc
+
+/o21 = i5 & i6 & i22 +
+ /i7 & i11 +
+ /i23 +
+ /i1 & i3 & i6 & i7 & i10
+o21.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal16p2/pal16p2.txt b/src/regtests/jedutil/baseline/pal16p2/pal16p2.txt
new file mode 100644
index 00000000000..77b856dbf82
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal16p2/pal16p2.txt
@@ -0,0 +1,31 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 17, 18, 19
+
+Outputs:
+
+15 (Combinatorial, No output feedback, Active high)
+16 (Combinatorial, No output feedback, Active low)
+
+Equations:
+
+o15 = /i9 & i11 +
+ i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8 +
+ i12 & /i18 +
+ i13 & /i19 +
+ i14 +
+ /i18 +
+ /i1 & /i6 +
+ /i2 & /i3
+o15.oe = vcc
+
+/o16 = i9 & /i11 +
+ i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8 +
+ /i12 & /i18 +
+ /i13 & i19 +
+ /i14 +
+ i18 +
+ /i4 +
+ i6 & i8
+o16.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal16p8/pal16p8.txt b/src/regtests/jedutil/baseline/pal16p8/pal16p8.txt
new file mode 100644
index 00000000000..ddd67aa63d3
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal16p8/pal16p8.txt
@@ -0,0 +1,89 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 13, 14, 15, 16, 17, 18
+
+Outputs:
+
+12 (Combinatorial, Output feedback output, Active low)
+13 (Combinatorial, Output feedback output, Active high)
+14 (Combinatorial, Output feedback output, Active high)
+15 (Combinatorial, Output feedback output, Active low)
+16 (Combinatorial, Output feedback output, Active low)
+17 (Combinatorial, Output feedback output, Active low)
+18 (Combinatorial, Output feedback output, Active low)
+19 (Combinatorial, Output feedback output, Active high)
+
+Equations:
+
+/o12 = i3 & i7 & /i9 +
+ i1 & o13 +
+ i3 +
+ /i6 +
+ i8 +
+ /i9 +
+ i7 & /o13
+o12.oe = vcc
+
+o13 = i11 & /o14 +
+ /i9 +
+ i8 +
+ /i7 +
+ /i6 & o14 +
+ i5 +
+ i4
+o13.oe = i2 & o14
+
+o14 = i1 & /o15 +
+ /i8 +
+ i1 & /i8 +
+ i1 & /i2 & /o15 +
+ /i2 +
+ i2 & /i8 & o15 +
+ i3
+o14.oe = vcc
+
+/o15 = i3 & i6 & i7 & /i11 +
+ i6 & o16 +
+ i3 & /o16 +
+ i7 +
+ /i11 +
+ i6 & i7 +
+ i7 & /i11
+o15.oe = vcc
+
+/o16 = /i3 & /o17 +
+ /i4 & /i11 +
+ /i3 & /i4 +
+ /i3 & i4 +
+ /i7 & o17 +
+ /i7 & /i11 +
+ i4
+o16.oe = vcc
+
+/o17 = i2 & i5 & i6 & /i7 +
+ i2 & /o18 +
+ i5 +
+ i6 +
+ /i7 & o18 +
+ i2 & /i7 +
+ i5 & i6
+o17.oe = /o16
+
+/o18 = /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 & i11 +
+ i3 +
+ /i2 & /i7 +
+ i3 & i11 +
+ i5 & i6 & /i7 +
+ i7 & i11
+o18.oe = vcc
+
+o19 = i5 & i6 & /i7 & i11 +
+ i3 & i6 & i7 +
+ i5 +
+ i6 +
+ i7 +
+ i11 +
+ /i7
+o19.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal16rp4/pal16rp4.txt b/src/regtests/jedutil/baseline/pal16rp4/pal16rp4.txt
new file mode 100644
index 00000000000..aeb327a02b3
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal16rp4/pal16rp4.txt
@@ -0,0 +1,93 @@
+Inputs:
+
+2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19
+
+Outputs:
+
+12 (Combinatorial, Output feedback output, Active high)
+13 (Combinatorial, Output feedback output, Active low)
+14 (Registered, Output feedback registered, Active low)
+15 (Registered, Output feedback registered, Active low)
+16 (Registered, Output feedback registered, Active high)
+17 (Registered, Output feedback registered, Active low)
+18 (Combinatorial, Output feedback output, Active high)
+19 (Combinatorial, Output feedback output, Active low)
+
+Equations:
+
+o12 = /i2 & /i3 +
+ i4 & o13 +
+ i3 +
+ /i6 +
+ i8 +
+ /i9 +
+ i7 & /o13
+o12.oe = rf14
+
+/o13 = /rf14 +
+ /i9 +
+ i8 +
+ /i7 +
+ /i6 & /rf14 +
+ i5 +
+ i4
+o13.oe = i2 & rf14
+
+/rf14 := /rf15 +
+ /i8 +
+ i8 +
+ /i2 & /rf15 +
+ /i2 +
+ i2 & /i8 & rf15 +
+ /i4 +
+ i3
+rf14.oe = OE
+
+/rf15 := i3 & i6 & i7 +
+ i6 & rf16 +
+ i3 & /rf16 +
+ i7 +
+ /i4 +
+ i6 & i7 +
+ i4 & i7 +
+ /i2 & /i7
+rf15.oe = OE
+
+rf16 := /i3 & /rf17 +
+ /i4 +
+ /i3 +
+ /i3 & i4 +
+ /i7 & rf17 +
+ /i7 +
+ i4 +
+ i2 & i3
+rf16.oe = OE
+
+/rf17 := i2 & i5 & i6 & /i7 +
+ i2 & /o18 +
+ i5 +
+ i6 +
+ /i7 & o18 +
+ i2 & /i7 +
+ i5 & i6 +
+ /i3
+rf17.oe = OE
+
+o18 = /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 +
+ i3 +
+ /i2 & /i7 +
+ /i3 +
+ i5 & i6 & /i7 +
+ i7
+o18.oe = vcc
+
+/o19 = i5 & i6 & /i7 +
+ i3 & i6 & i7 +
+ i5 +
+ i6 +
+ i7 +
+ /i4 +
+ /i7
+o19.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal16rp6/pal16rp6.txt b/src/regtests/jedutil/baseline/pal16rp6/pal16rp6.txt
new file mode 100644
index 00000000000..a0ebaf7b165
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal16rp6/pal16rp6.txt
@@ -0,0 +1,95 @@
+Inputs:
+
+2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19
+
+Outputs:
+
+12 (Combinatorial, Output feedback output, Active high)
+13 (Registered, Output feedback registered, Active low)
+14 (Registered, Output feedback registered, Active low)
+15 (Registered, Output feedback registered, Active high)
+16 (Registered, Output feedback registered, Active high)
+17 (Registered, Output feedback registered, Active low)
+18 (Registered, Output feedback registered, Active low)
+19 (Combinatorial, Output feedback output, Active high)
+
+Equations:
+
+o12 = /i2 & /i3 +
+ i4 & rf13 +
+ i3 +
+ /i6 +
+ i8 +
+ /i9 +
+ i7 & /rf13
+o12.oe = rf14
+
+/rf13 := /rf14 +
+ /i9 +
+ i8 +
+ /i7 +
+ /i6 & /rf14 +
+ i5 & rf14 +
+ i4 +
+ /i2
+rf13.oe = OE
+
+/rf14 := /rf15 +
+ /i8 +
+ i8 +
+ /i2 & /rf15 +
+ /i2 +
+ i2 & /i8 & rf15 +
+ /i4 +
+ i3
+rf14.oe = OE
+
+rf15 := i3 & i6 & i7 +
+ i6 & rf16 +
+ i3 & /rf16 +
+ i7 +
+ /i4 +
+ i6 & i7 +
+ i4 & i7 +
+ /i2 & /i7
+rf15.oe = OE
+
+rf16 := /i3 & /rf17 +
+ /i4 +
+ /i3 +
+ /i3 & i4 +
+ /i7 & rf17 +
+ /i7 +
+ i4 +
+ i2 & i3
+rf16.oe = OE
+
+/rf17 := i2 & i5 & i6 & /i7 +
+ i2 & /rf18 +
+ i5 +
+ i6 +
+ /i7 & rf18 +
+ i2 & /i7 +
+ i5 & i6 +
+ /i3
+rf17.oe = OE
+
+/rf18 := /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 +
+ i3 +
+ /i2 & /i7 +
+ /i3 +
+ i5 & i6 & /i7 +
+ i7 +
+ i4
+rf18.oe = OE
+
+o19 = i5 & i6 & /i7 +
+ i3 & i6 & i7 +
+ i5 +
+ i6 +
+ i7 +
+ /i4 +
+ /i7
+o19.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal16rp8/pal16rp8.txt b/src/regtests/jedutil/baseline/pal16rp8/pal16rp8.txt
new file mode 100644
index 00000000000..5b896966cfc
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal16rp8/pal16rp8.txt
@@ -0,0 +1,97 @@
+Inputs:
+
+2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19
+
+Outputs:
+
+12 (Registered, Output feedback registered, Active low)
+13 (Registered, Output feedback registered, Active low)
+14 (Registered, Output feedback registered, Active high)
+15 (Registered, Output feedback registered, Active low)
+16 (Registered, Output feedback registered, Active low)
+17 (Registered, Output feedback registered, Active low)
+18 (Registered, Output feedback registered, Active high)
+19 (Registered, Output feedback registered, Active low)
+
+Equations:
+
+/rf12 := /i2 & /i3 +
+ i4 & rf13 +
+ i3 +
+ /i6 +
+ i8 +
+ /i9 +
+ i7 & /rf13 +
+ i5
+rf12.oe = OE
+
+/rf13 := /rf14 +
+ /i9 +
+ i8 +
+ /i7 +
+ /i6 & rf14 +
+ i5 +
+ i4 +
+ /i3
+rf13.oe = OE
+
+rf14 := /rf15 +
+ /i8 +
+ i8 +
+ /i2 & /rf15 +
+ /i2 +
+ i2 & /i8 & rf15 +
+ /i4 +
+ i3
+rf14.oe = OE
+
+/rf15 := i3 & i6 & i7 +
+ i6 & rf16 +
+ i3 & /rf16 +
+ i7 +
+ /i4 +
+ i6 & i7 +
+ i4 & i7 +
+ /i2 & /i7
+rf15.oe = OE
+
+/rf16 := /i3 & /rf17 +
+ /i4 +
+ /i3 +
+ /i3 & i4 +
+ /i7 & rf17 +
+ /i7 +
+ i4 +
+ i2 & i3
+rf16.oe = OE
+
+/rf17 := i2 & i5 & i6 & /i7 +
+ i2 & /rf18 +
+ i5 +
+ i6 +
+ /i7 & rf18 +
+ i2 & /i7 +
+ i5 & i6 +
+ /i3
+rf17.oe = OE
+
+rf18 := /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 +
+ i3 & rf19 +
+ /i2 & /i7 +
+ /i3 & /rf19 +
+ i5 & i6 & /i7 +
+ i7 +
+ /i4
+rf18.oe = OE
+
+/rf19 := i5 & i6 & /i7 +
+ i3 & i6 & i7 +
+ i5 & rf12 +
+ i6 +
+ i7 +
+ /i4 & /rf12 +
+ /i7 +
+ i2
+rf19.oe = OE
+
diff --git a/src/regtests/jedutil/baseline/pal18h4/pal18h4.txt b/src/regtests/jedutil/baseline/pal18h4/pal18h4.txt
new file mode 100644
index 00000000000..df550b42733
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal18h4/pal18h4.txt
@@ -0,0 +1,41 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 21, 22, 23
+
+Outputs:
+
+17 (Combinatorial, No output feedback, Active high)
+18 (Combinatorial, No output feedback, Active high)
+19 (Combinatorial, No output feedback, Active high)
+20 (Combinatorial, No output feedback, Active high)
+
+Equations:
+
+o17 = /i1 & /i2 +
+ /i3 & /i7 +
+ /i4 & /i8 & i16 +
+ /i5 & /i6 +
+ /i9 & /i10 +
+ /i13 & /i15
+o17.oe = vcc
+
+o18 = i1 & i2 & i3 +
+ i4 & i5 & i6 & /i14 +
+ i7 & /i16 +
+ i8 & i15
+o18.oe = vcc
+
+o19 = i9 & i10 & i14 +
+ i13 & /i22 +
+ /i2 & i5 & /i21 +
+ i6 & /i7
+o19.oe = vcc
+
+o20 = i3 & i6 +
+ i7 & i13 & i23 +
+ i5 & i6 & i22 +
+ /i7 & i11 +
+ i21 & /i23 +
+ /i1 & i3 & i6 & i7 & i10
+o20.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal18l4/pal18l4.txt b/src/regtests/jedutil/baseline/pal18l4/pal18l4.txt
new file mode 100644
index 00000000000..d3cd7022911
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal18l4/pal18l4.txt
@@ -0,0 +1,41 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 21, 22, 23
+
+Outputs:
+
+17 (Combinatorial, No output feedback, Active low)
+18 (Combinatorial, No output feedback, Active low)
+19 (Combinatorial, No output feedback, Active low)
+20 (Combinatorial, No output feedback, Active low)
+
+Equations:
+
+/o17 = /i1 & /i2 +
+ /i3 & /i7 +
+ /i4 & /i8 & i16 +
+ /i5 & /i6 +
+ /i9 & /i10 +
+ /i13 & /i15
+o17.oe = vcc
+
+/o18 = i1 & i2 & i3 +
+ i4 & i5 & i6 & /i14 +
+ i7 & /i16 +
+ i8 & i15
+o18.oe = vcc
+
+/o19 = i9 & i10 & i14 +
+ i13 & /i22 +
+ /i2 & i5 & /i21 +
+ i6 & /i7
+o19.oe = vcc
+
+/o20 = i3 & i6 +
+ i7 & i13 & i23 +
+ i5 & i6 & i22 +
+ /i7 & i11 +
+ i21 & /i23 +
+ /i1 & i3 & i6 & i7 & i10
+o20.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal20l2/pal20l2.txt b/src/regtests/jedutil/baseline/pal20l2/pal20l2.txt
new file mode 100644
index 00000000000..2d6a02a788b
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal20l2/pal20l2.txt
@@ -0,0 +1,31 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 20, 21, 22, 23
+
+Outputs:
+
+18 (Combinatorial, No output feedback, Active low)
+19 (Combinatorial, No output feedback, Active low)
+
+Equations:
+
+/o18 = /i1 & i2 +
+ /i3 & i4 +
+ /i5 & i6 & /i7 +
+ i8 & /i9 & i10 +
+ /i11 & i13 +
+ /i14 & i15 & /i16 +
+ i17 & /i21 & i22 +
+ /i23
+o18.oe = vcc
+
+/o19 = i1 & /i2 +
+ i3 & /i4 +
+ i5 & /i6 & i7 +
+ /i8 & i9 & /i10 +
+ i11 & /i13 +
+ i14 & /i15 & i16 +
+ /i17 & i21 & /i22 +
+ i23
+o19.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal20x10/pal20x10.txt b/src/regtests/jedutil/baseline/pal20x10/pal20x10.txt
index dc25356f61f..48044e7b97c 100644
--- a/src/regtests/jedutil/baseline/pal20x10/pal20x10.txt
+++ b/src/regtests/jedutil/baseline/pal20x10/pal20x10.txt
@@ -18,61 +18,61 @@ Outputs:
Equations:
/rf14 := /i2 & rf15 +
- i11 & /rf15 +
+ i11 & /rf15 :+:
i3 & i4 +
/i5 & i10
rf14.oe = OE
/rf15 := i2 & i6 & i7 +
- i6 & rf16 +
+ i6 & rf16 :+:
i3 & /rf16 +
i7
rf15.oe = OE
/rf16 := /i3 & /rf17 +
- /i4 +
+ /i4 :+:
/i3 & i4 +
/i7 & rf17
rf16.oe = OE
/rf17 := /i2 +
- /rf18 +
+ /rf18 :+:
i5 & i6 +
rf18
rf17.oe = OE
/rf18 := /i2 & i5 & i6 & /i7 & /i11 +
- i3 & rf19 +
+ i3 & rf19 :+:
/i2 & /i7 +
/i3 & /rf19
rf18.oe = OE
/rf19 := i5 & i6 & /i7 & i10 +
- i3 & i6 & i7 +
+ i3 & i6 & i7 :+:
i5 & rf20 +
/i4 & /rf20 & rf23
rf19.oe = OE
/rf20 := /i10 & rf17 +
- /i11 +
+ /i11 :+:
i4 & /rf17 +
i2 & /rf23
rf20.oe = OE
/rf21 := /i2 & rf17 +
- /i10 & i11 +
+ /i10 & i11 :+:
/rf14 & rf15 +
i8 & i9 & /rf22
rf21.oe = OE
/rf22 := rf14 & /rf15 +
- i3 & /rf21 +
+ i3 & /rf21 :+:
/i8 & rf21 +
rf16 & /rf20
rf22.oe = OE
/rf23 := /rf14 +
- i6 & rf14 +
+ i6 & rf14 :+:
i7 & rf22 +
i2 & i4 & i6 & i8 & /rf15
rf23.oe = OE
diff --git a/src/regtests/jedutil/baseline/pal20x4/pal20x4.txt b/src/regtests/jedutil/baseline/pal20x4/pal20x4.txt
index 868d3f73393..900f84675c9 100644
--- a/src/regtests/jedutil/baseline/pal20x4/pal20x4.txt
+++ b/src/regtests/jedutil/baseline/pal20x4/pal20x4.txt
@@ -33,25 +33,25 @@ o15.oe = i6 & o16
o16.oe = /i3 & i4
/rf17 := /i2 +
- /rf18 +
+ /rf18 :+:
i5 & i6 +
rf18
rf17.oe = OE
/rf18 := /i2 & i5 & i6 & /i7 & /i11 +
- i3 & rf19 +
+ i3 & rf19 :+:
/i2 & /i7 +
/i3 & /rf19
rf18.oe = OE
/rf19 := i5 & i6 & /i7 & i10 +
- i3 & i6 & i7 +
+ i3 & i6 & i7 :+:
i5 & rf20 +
/i4 & /rf20 & o23
rf19.oe = OE
/rf20 := /i10 & rf17 +
- /i11 +
+ /i11 :+:
i4 & /rf17 +
i2 & /o23
rf20.oe = OE
diff --git a/src/regtests/jedutil/baseline/pal20x8/pal20x8.txt b/src/regtests/jedutil/baseline/pal20x8/pal20x8.txt
index 04e25dcc799..19b3ab325c2 100644
--- a/src/regtests/jedutil/baseline/pal20x8/pal20x8.txt
+++ b/src/regtests/jedutil/baseline/pal20x8/pal20x8.txt
@@ -23,49 +23,49 @@ Equations:
o14.oe = i6
/rf15 := i2 & i6 & i7 +
- i6 & rf16 +
+ i6 & rf16 :+:
i3 & /rf16 +
i7
rf15.oe = OE
/rf16 := /i3 & /rf17 +
- /i4 +
+ /i4 :+:
/i3 & i4 +
/i7 & rf17
rf16.oe = OE
/rf17 := /i2 +
- /rf18 +
+ /rf18 :+:
i5 & i6 +
rf18
rf17.oe = OE
/rf18 := /i2 & i5 & i6 & /i7 & /i11 +
- i3 & rf19 +
+ i3 & rf19 :+:
/i2 & /i7 +
/i3 & /rf19
rf18.oe = OE
/rf19 := i5 & i6 & /i7 & i10 +
- i3 & i6 & i7 +
+ i3 & i6 & i7 :+:
i5 & rf20 +
/i4 & /rf20 & o23
rf19.oe = OE
/rf20 := /i10 & rf17 +
- /i11 +
+ /i11 :+:
i4 & /rf17 +
i2 & /o23
rf20.oe = OE
/rf21 := /i2 & rf17 +
- /i10 & i11 +
+ /i10 & i11 :+:
/o14 & rf15 +
i8 & i9 & /rf22
rf21.oe = OE
/rf22 := o14 & /rf15 +
- i3 & /rf21 +
+ i3 & /rf21 :+:
/i8 & rf21 +
rf16 & /rf20
rf22.oe = OE
diff --git a/src/regtests/jedutil/baseline/pal6l16/pal6l16.txt b/src/regtests/jedutil/baseline/pal6l16/pal6l16.txt
new file mode 100644
index 00000000000..024ce6a83cb
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal6l16/pal6l16.txt
@@ -0,0 +1,73 @@
+Inputs:
+
+4, 5, 6, 7, 8, 9
+
+Outputs:
+
+1 (Combinatorial, No output feedback, Active low)
+2 (Combinatorial, No output feedback, Active low)
+3 (Combinatorial, No output feedback, Active low)
+10 (Combinatorial, No output feedback, Active low)
+11 (Combinatorial, No output feedback, Active low)
+13 (Combinatorial, No output feedback, Active low)
+14 (Combinatorial, No output feedback, Active low)
+15 (Combinatorial, No output feedback, Active low)
+16 (Combinatorial, No output feedback, Active low)
+17 (Combinatorial, No output feedback, Active low)
+18 (Combinatorial, No output feedback, Active low)
+19 (Combinatorial, No output feedback, Active low)
+20 (Combinatorial, No output feedback, Active low)
+21 (Combinatorial, No output feedback, Active low)
+22 (Combinatorial, No output feedback, Active low)
+23 (Combinatorial, No output feedback, Active low)
+
+Equations:
+
+/o1 = i4
+o1.oe = vcc
+
+/o2 = i5
+o2.oe = vcc
+
+/o3 = i6
+o3.oe = vcc
+
+/o10 = i7
+o10.oe = vcc
+
+/o11 = i8
+o11.oe = vcc
+
+/o13 = i9
+o13.oe = vcc
+
+/o14 = i4 & i5
+o14.oe = vcc
+
+/o15 = /i9
+o15.oe = vcc
+
+/o16 = /i8
+o16.oe = vcc
+
+/o17 = /i7
+o17.oe = vcc
+
+/o18 = /i6
+o18.oe = vcc
+
+/o19 = /i5
+o19.oe = vcc
+
+/o20 = /i4
+o20.oe = vcc
+
+/o21 = /i4 & i5 & /i6 & i7 & /i8 & i9
+o21.oe = vcc
+
+/o22 = i4 & /i5 & i6 & /i7 & i8 & /i9
+o22.oe = vcc
+
+/o23 = i6 & i9
+o23.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/pal8l14/pal8l14.txt b/src/regtests/jedutil/baseline/pal8l14/pal8l14.txt
new file mode 100644
index 00000000000..ea59af227c4
--- /dev/null
+++ b/src/regtests/jedutil/baseline/pal8l14/pal8l14.txt
@@ -0,0 +1,65 @@
+Inputs:
+
+3, 4, 5, 6, 7, 8, 9, 10
+
+Outputs:
+
+1 (Combinatorial, No output feedback, Active low)
+2 (Combinatorial, No output feedback, Active low)
+11 (Combinatorial, No output feedback, Active low)
+13 (Combinatorial, No output feedback, Active low)
+14 (Combinatorial, No output feedback, Active low)
+15 (Combinatorial, No output feedback, Active low)
+16 (Combinatorial, No output feedback, Active low)
+17 (Combinatorial, No output feedback, Active low)
+18 (Combinatorial, No output feedback, Active low)
+19 (Combinatorial, No output feedback, Active low)
+20 (Combinatorial, No output feedback, Active low)
+21 (Combinatorial, No output feedback, Active low)
+22 (Combinatorial, No output feedback, Active low)
+23 (Combinatorial, No output feedback, Active low)
+
+Equations:
+
+/o1 = i3
+o1.oe = vcc
+
+/o2 = i4
+o2.oe = vcc
+
+/o11 = i5
+o11.oe = vcc
+
+/o13 = i6
+o13.oe = vcc
+
+/o14 = i7
+o14.oe = vcc
+
+/o15 = i8
+o15.oe = vcc
+
+/o16 = i9
+o16.oe = vcc
+
+/o17 = i10
+o17.oe = vcc
+
+/o18 = /i3
+o18.oe = vcc
+
+/o19 = /i4 & /i9
+o19.oe = vcc
+
+/o20 = /i5
+o20.oe = vcc
+
+/o21 = /i6 & /i10
+o21.oe = vcc
+
+/o22 = /i7
+o22.oe = vcc
+
+/o23 = /i8
+o23.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/palce16v8/pal10h8-as-palce16v8.txt b/src/regtests/jedutil/baseline/palce16v8/pal10h8-as-palce16v8.txt
new file mode 100644
index 00000000000..8f2217bb42f
--- /dev/null
+++ b/src/regtests/jedutil/baseline/palce16v8/pal10h8-as-palce16v8.txt
@@ -0,0 +1,97 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 11
+
+Outputs:
+
+12 (Combinatorial, No output feedback, Active high)
+13 (Combinatorial, No output feedback, Active high)
+14 (Combinatorial, No output feedback, Active high)
+15 (Combinatorial, No output feedback, Active high)
+16 (Combinatorial, No output feedback, Active high)
+17 (Combinatorial, No output feedback, Active high)
+18 (Combinatorial, No output feedback, Active high)
+19 (Combinatorial, No output feedback, Active high)
+
+Equations:
+
+o12 = i2 +
+ i1 & i3 +
+ i4 & /i11 +
+ i5 +
+ i6 +
+ /i1 & i7 +
+ i8 +
+ i9 & i11
+o12.oe = vcc
+
+o13 = /i2 +
+ /i4 +
+ /i3 & /i6 +
+ /i8 +
+ /i11 +
+ /i9 +
+ /i1 & /i7 +
+ /i5
+o13.oe = vcc
+
+o14 = i4 +
+ /i8 & i11 +
+ /i6 +
+ /i2 +
+ i5 & /i11 +
+ i7 +
+ /i3 & /i9 +
+ /i1
+o14.oe = vcc
+
+o15 = i5 +
+ /i1 +
+ i1 & i7 +
+ /i3 +
+ i1 & /i3 +
+ i2 & i9 +
+ /i8 +
+ i4
+o15.oe = vcc
+
+o16 = i6 +
+ i3 & i11 +
+ i6 & i8 +
+ /i1 +
+ /i8 +
+ /i7 & /i8 +
+ /i2 & /i9 +
+ /i5 & i7 & i8
+o16.oe = vcc
+
+o17 = i7 +
+ i2 & i9 +
+ i3 & i4 +
+ /i5 +
+ /i9 +
+ /i8 +
+ /i1 & /i11 +
+ i6 & i9
+o17.oe = vcc
+
+o18 = /i1 +
+ /i3 +
+ /i5 +
+ /i7 +
+ /i9 +
+ /i11 +
+ i1 & i7 & i11 +
+ i3 & i5 & i9
+o18.oe = vcc
+
+o19 = i3 & i11 +
+ i1 +
+ /i1 & /i9 +
+ /i3 & /i5 & /i7 +
+ i2 +
+ i4 +
+ i6 +
+ i8
+o19.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/palce16v8/pal12h6-as-palce16v8.txt b/src/regtests/jedutil/baseline/palce16v8/pal12h6-as-palce16v8.txt
new file mode 100644
index 00000000000..99812016fc1
--- /dev/null
+++ b/src/regtests/jedutil/baseline/palce16v8/pal12h6-as-palce16v8.txt
@@ -0,0 +1,75 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 19
+
+Outputs:
+
+13 (Combinatorial, No output feedback, Active high)
+14 (Combinatorial, No output feedback, Active high)
+15 (Combinatorial, No output feedback, Active high)
+16 (Combinatorial, No output feedback, Active high)
+17 (Combinatorial, No output feedback, Active high)
+18 (Combinatorial, No output feedback, Active high)
+
+Equations:
+
+o13 = /i2 +
+ /i4 +
+ /i3 & /i6 +
+ /i8 +
+ /i11 +
+ /i9 +
+ /i1 & /i7 +
+ /i5
+o13.oe = vcc
+
+o14 = i4 +
+ /i8 & i11 +
+ /i6 +
+ /i2 +
+ i5 & /i11 +
+ i7 +
+ /i3 & /i9 +
+ /i1 & /i12
+o14.oe = vcc
+
+o15 = i5 & i19 +
+ /i1 +
+ i1 & i7 +
+ /i3 +
+ i1 & /i3 +
+ i2 & i9 +
+ /i8 +
+ i4
+o15.oe = vcc
+
+o16 = i6 +
+ i3 & i11 +
+ i6 & i8 +
+ /i1 +
+ /i8 +
+ /i7 & /i8 +
+ /i2 & /i9 +
+ /i5 & i7 & i8
+o16.oe = vcc
+
+o17 = i7 & i12 +
+ i2 & i9 +
+ i3 & i4 +
+ /i5 +
+ /i9 +
+ /i8 +
+ /i1 & /i11 +
+ i6 & i9
+o17.oe = vcc
+
+o18 = /i1 +
+ /i3 +
+ /i5 +
+ /i7 +
+ /i9 & /i19 +
+ /i11 +
+ i1 & i7 & i11 +
+ i3 & i5 & i9
+o18.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/palce16v8/pal14h4-as-palce16v8.txt b/src/regtests/jedutil/baseline/palce16v8/pal14h4-as-palce16v8.txt
new file mode 100644
index 00000000000..5bc89e2aace
--- /dev/null
+++ b/src/regtests/jedutil/baseline/palce16v8/pal14h4-as-palce16v8.txt
@@ -0,0 +1,53 @@
+Inputs:
+
+1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 18, 19
+
+Outputs:
+
+14 (Combinatorial, No output feedback, Active high)
+15 (Combinatorial, No output feedback, Active high)
+16 (Combinatorial, No output feedback, Active high)
+17 (Combinatorial, No output feedback, Active high)
+
+Equations:
+
+o14 = /i1 +
+ /i3 & /i9 +
+ i7 & i12 +
+ i5 & /i11 +
+ /i2 +
+ /i12 +
+ /i8 & i11 +
+ i4
+o14.oe = vcc
+
+o15 = i4 +
+ /i8 +
+ i2 & i9 +
+ /i3 & i13 +
+ /i3 +
+ i1 & i7 +
+ /i13 +
+ i5
+o15.oe = vcc
+
+o16 = /i5 & i7 & i8 +
+ /i2 & /i9 +
+ /i7 & /i8 +
+ /i18 +
+ /i1 +
+ i6 & i18 +
+ i3 & i11 +
+ i6
+o16.oe = vcc
+
+o17 = i6 & i9 +
+ /i1 & /i11 +
+ /i19 +
+ /i9 +
+ /i5 +
+ i3 & i4 +
+ i2 & i19 +
+ i7
+o17.oe = vcc
+
diff --git a/src/regtests/jedutil/baseline/palce16v8/pal16r4-as-palce16v8.txt b/src/regtests/jedutil/baseline/palce16v8/pal16r4-as-palce16v8.txt
new file mode 100644
index 00000000000..c021b4a70b7
--- /dev/null
+++ b/src/regtests/jedutil/baseline/palce16v8/pal16r4-as-palce16v8.txt
@@ -0,0 +1,93 @@
+Inputs:
+
+2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19
+
+Outputs:
+
+12 (Combinatorial, Output feedback output, Active low)
+13 (Combinatorial, Output feedback output, Active low)
+14 (Registered, Output feedback registered, Active low)
+15 (Registered, Output feedback registered, Active low)
+16 (Registered, Output feedback registered, Active low)
+17 (Registered, Output feedback registered, Active low)
+18 (Combinatorial, Output feedback output, Active low)
+19 (Combinatorial, Output feedback output, Active low)
+
+Equations:
+
+/o12 = i3 & /i4 +
+ /o19 +
+ /i2 +
+ /i5 +
+ /i6 +
+ /i7 +
+ i2 & /i8 & o19
+o12.oe = i4 & /i9
+
+/o13 = /rf14 +
+ i3 & i7 +
+ i4 & i5 +
+ i6 +
+ /i6 & /i9 & rf14 +
+ /i2 & /i8 +
+ i8 & /i9
+o13.oe = rf14
+
+/rf14 := i2 & i9 +
+ /i2 & rf15 +
+ i4 & /rf15 +
+ i3 & /i8 +
+ i3 & /i4 +
+ /i5 & /i7 +
+ /i7 & /i9 +
+ /i4 & i5
+rf14.oe = OE
+
+/rf15 := i5 & i9 +
+ i3 & i4 & /i9 +
+ /rf16 +
+ /i2 & /i6 +
+ /i4 & /i9 +
+ /i3 & rf16 +
+ /i8 +
+ /i5 & i8
+rf15.oe = OE
+
+/rf16 := /i8 +
+ /i7 +
+ /i6 +
+ /i5 +
+ /i4 +
+ /i3 & /rf17 +
+ /i2 +
+ i2 & i3 & i4 & i5 & i6 & i7 & i8 & i9 & rf17
+rf16.oe = OE
+
+/rf17 := i9 +
+ i8 & o18 +
+ i7 +
+ i6 +
+ i5 +
+ i4 & /o18 +
+ i3 +
+ /i2
+rf17.oe = OE
+
+/o18 = /i3 & o19 +
+ /i5 +
+ /i7 +
+ /i9 +
+ /i2 +
+ /i4 & /o19 +
+ /i6
+o18.oe = i8
+
+/o19 = i2 +
+ /i5 +
+ i3 & /o12 +
+ i9 +
+ /i2 & /i3 +
+ /i7 & i9 & o12 +
+ i5 & i8
+o19.oe = i4
+
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal10p8/pal10p8.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal10p8/pal10p8.eqn
new file mode 100644
index 00000000000..f3d9246c0c5
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal10p8/pal10p8.eqn
@@ -0,0 +1,30 @@
+CHIP pal10p8 PAL10P8
+
+i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
+o12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 VCC=20
+
+EQUATIONS
+
+o12 = i9 & i11 +
+ /i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8
+
+o13 = i9 & /i11 +
+ i1 & /i2 & i3 & i4 & i5 & /i6 & i7 & i8
+
+/o14 = /i9 & /i11 +
+ i1 & i2 & /i3 & i4 & /i5 & i6 & i7 & i8
+
+/o15 = /i9 & i11 +
+ i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8
+
+o16 = i9 & /i11 +
+ i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8
+
+/o17 = i9 & i11 +
+ /i1 & /i2 & i3 & i4 & i5 & i6 & /i7 & /i8
+
+/o18 = /i9 & /i11 +
+ i1 & i2 & i3 & /i4 & /i5 & i6 & i7 & i8
+
+/o19 = /i9 & i11 +
+ i1 & /i2 & i3 & /i4 & i5 & /i6 & i7 & /i8
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal12h10/pal12h10.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal12h10/pal12h10.eqn
new file mode 100644
index 00000000000..9001a39398c
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal12h10/pal12h10.eqn
@@ -0,0 +1,46 @@
+chip pal12h10 PAL12H10
+
+i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
+i13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 o22=22 o23=23 VCC=24
+
+equations
+
+o14 = /i1 & /i2 & /i3 +
+ /i4 & /i5 & /i6
+o14.oe = vcc
+
+o15 = /i7 +
+ /i8
+o15.oe = vcc
+
+o16 = /i9 & /i10 +
+ /i13
+o16.oe = vcc
+
+o17 = i1 & i2 & i3 +
+ i4 & i5 & i6
+o17.oe = vcc
+
+o18 = i7 +
+ i8
+o18.oe = vcc
+
+o19 = i9 & i10 +
+ i13
+o19.oe = vcc
+
+o20 = /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 & i13
+o20.oe = vcc
+
+o21 = i5 & i6 & /i7 & i11 +
+ /i1 & i3 & i6 & i7 & i10
+o21.oe = vcc
+
+o22 = i4 & i13 +
+ i9 & /i10 & /i11
+o22.oe = vcc
+
+o23 = /i4 & i10 & i11 +
+ i1 & /i13
+o23.oe = vcc
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal12l10/pal12l10.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal12l10/pal12l10.eqn
new file mode 100644
index 00000000000..8eb50d8bcfe
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal12l10/pal12l10.eqn
@@ -0,0 +1,46 @@
+chip pal12l10 PAL12L10
+
+i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
+i13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 o22=22 o23=23 VCC=24
+
+equations
+
+/o14 = /i1 & /i2 & /i3 +
+ /i4 & /i5 & /i6
+o14.oe = vcc
+
+/o15 = /i7 +
+ /i8
+o15.oe = vcc
+
+/o16 = /i9 & /i10 +
+ /i13
+o16.oe = vcc
+
+/o17 = i1 & i2 & i3 +
+ i4 & i5 & i6
+o17.oe = vcc
+
+/o18 = i7 +
+ i8
+o18.oe = vcc
+
+/o19 = i9 & i10 +
+ i13
+o19.oe = vcc
+
+/o20 = /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 & i13
+o20.oe = vcc
+
+/o21 = i5 & i6 & /i7 & i11 +
+ /i1 & i3 & i6 & i7 & i10
+o21.oe = vcc
+
+/o22 = i4 & i13 +
+ i9 & /i10 & /i11
+o22.oe = vcc
+
+/o23 = /i4 & i10 & i11 +
+ i1 & /i13
+o23.oe = vcc
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal12p6/pal12p6.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal12p6/pal12p6.eqn
new file mode 100644
index 00000000000..e57f751943f
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal12p6/pal12p6.eqn
@@ -0,0 +1,28 @@
+CHIP pal12p6 PAL12P6
+
+i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
+i12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 i19=19 VCC=20
+
+EQUATIONS
+
+o13 = i9 & /i11 +
+ i1 & /i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
+ i12 +
+ /i19
+
+/o14 = /i9 & /i11 +
+ i1 & i2 & /i3 & i4 & /i5 & i6 & i7 & i8
+
+/o15 = /i9 & i11 +
+ i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8
+
+o16 = i9 & /i11 +
+ i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8
+
+/o17 = i9 & i11 +
+ /i1 & /i2 & i3 & i4 & i5 & i6 & /i7 & /i8
+
+/o18 = /i9 & /i11 +
+ i1 & i2 & i3 & /i4 & /i5 & i6 & i7 & i8 +
+ /i12 +
+ i19
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal14h8/pal14h8.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal14h8/pal14h8.eqn
new file mode 100644
index 00000000000..dca7cc0eeac
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal14h8/pal14h8.eqn
@@ -0,0 +1,42 @@
+chip pal14h8 PAL14H8
+
+i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
+i13=13 i14=14 o15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 o22=22 i23=23 VCC=24
+
+equations
+
+o15 = /i1 & /i2 +
+ /i3 +
+ /i4 +
+ /i5 & /i6
+o15.oe = vcc
+
+o16 = /i7 +
+ /i8
+o16.oe = vcc
+
+o17 = /i9 & /i10 +
+ /i13
+o17.oe = vcc
+
+o18 = i1 & i2 & i3 +
+ i4 & i5 & i6 & /i14
+o18.oe = vcc
+
+o19 = i7 +
+ i8
+o19.oe = vcc
+
+o20 = i9 & i10 & i14 +
+ i13
+o20.oe = vcc
+
+o21 = /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 & i13 & i23
+o21.oe = vcc
+
+o22 = i5 & i6 +
+ /i7 & i11 +
+ /i23 +
+ /i1 & i3 & i6 & i7 & i10
+o22.oe = vcc
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal14p4/pal14p4.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal14p4/pal14p4.eqn
new file mode 100644
index 00000000000..7a2d65113a4
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal14p4/pal14p4.eqn
@@ -0,0 +1,26 @@
+CHIP pal14p4 PAL14P4
+
+i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
+i12=12 i13=13 o14=14 o15=15 o16=16 o17=17 i18=18 i19=19 VCC=20
+
+EQUATIONS
+
+/o14 = i9 & i11 +
+ i1 & /i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
+ i12 & i18 +
+ /i13 & /i19
+
+o15 = /i9 & i11 +
+ i1 & i2 & i3 & /i4 & i5 & i6 & /i7 & i8 +
+ i12 & /i18 +
+ i13 & /i19
+
+o16 = i9 & /i11 +
+ i1 & i2 & i3 & i4 & i5 & /i6 & i7 & /i8 +
+ /i12 & /i18 +
+ /i13 & i19
+
+/o17 = /i9 & /i11 +
+ i1 & i2 & i3 & /i4 & /i5 & i6 & i7 & i8 +
+ /i12 & i13 +
+ /i18 & i19
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal16h6/pal16h6.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal16h6/pal16h6.eqn
new file mode 100644
index 00000000000..0da230f42ad
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal16h6/pal16h6.eqn
@@ -0,0 +1,38 @@
+chip pal16h6 PAL16H6
+
+i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
+i13=13 i14=14 i15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 i22=22 i23=23 VCC=24
+
+equations
+
+o16 = /i1 & /i2 +
+ /i3 & /i7 +
+ /i4 & /i8 +
+ /i5 & /i6
+o16.oe = vcc
+
+o17 = /i9 & /i10 +
+ /i13 & /i15 +
+ i1 & i2 & i3 +
+ i4 & i5 & i6 & /i14
+o17.oe = vcc
+
+o18 = i7 +
+ i8 & i15
+o18.oe = vcc
+
+o19 = i9 & i10 & i14 +
+ i13 & /i22
+o19.oe = vcc
+
+o20 = /i2 & i5 +
+ i6 & /i7 +
+ i3 & i6 +
+ i7 & i13 & i23
+o20.oe = vcc
+
+o21 = i5 & i6 & i22 +
+ /i7 & i11 +
+ /i23 +
+ /i1 & i3 & i6 & i7 & i10
+o21.oe = vcc
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal16l6/pal16l6.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal16l6/pal16l6.eqn
new file mode 100644
index 00000000000..fd5fae6875a
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal16l6/pal16l6.eqn
@@ -0,0 +1,38 @@
+chip pal16l6 PAL16L6
+
+i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
+i13=13 i14=14 i15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 i22=22 i23=23 VCC=24
+
+equations
+
+/o16 = /i1 & /i2 +
+ /i3 & /i7 +
+ /i4 & /i8 +
+ /i5 & /i6
+o16.oe = vcc
+
+/o17 = /i9 & /i10 +
+ /i13 & /i15 +
+ i1 & i2 & i3 +
+ i4 & i5 & i6 & /i14
+o17.oe = vcc
+
+/o18 = i7 +
+ i8 & i15
+o18.oe = vcc
+
+/o19 = i9 & i10 & i14 +
+ i13 & /i22
+o19.oe = vcc
+
+/o20 = /i2 & i5 +
+ i6 & /i7 +
+ i3 & i6 +
+ i7 & i13 & i23
+o20.oe = vcc
+
+/o21 = i5 & i6 & i22 +
+ /i7 & i11 +
+ /i23 +
+ /i1 & i3 & i6 & i7 & i10
+o21.oe = vcc
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal16p8/pal16p8.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal16p8/pal16p8.eqn
new file mode 100644
index 00000000000..f69ef09a7cd
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal16p8/pal16p8.eqn
@@ -0,0 +1,78 @@
+chip pal16p8 PAL16P8
+
+i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10
+i11=11 o12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 VCC=20
+
+equations
+
+/o12 = i3 & i7 & /i9 +
+ i1 & o13 +
+ i3 +
+ /i6 +
+ i8 +
+ /i9 +
+ i7 & /o13
+o12.oe = vcc
+
+o13 = i11 & /o14 +
+ /i9 +
+ i8 +
+ /i7 +
+ /i6 & o14 +
+ i5 +
+ i4
+o13.oe = i2 & o14
+
+o14 = i1 & /o15 +
+ /i8 +
+ i1 & /i8 +
+ i1 & /i2 & /o15 +
+ /i2 +
+ i2 & /i8 & o15 +
+ i3
+o14.oe = vcc
+
+/o15 = i3 & i6 & i7 & /i11 +
+ i6 & o16 +
+ i3 & /o16 +
+ i7 +
+ /i11 +
+ i6 & i7 +
+ i7 & /i11
+o15.oe = vcc
+
+/o16 = /i3 & /o17 +
+ /i4 & /i11 +
+ /i3 & /i4 +
+ /i3 & i4 +
+ /i7 & o17 +
+ /i7 & /i11 +
+ i4
+o16.oe = vcc
+
+/o17 = i2 & i5 & i6 & /i7 +
+ i2 & /o18 +
+ i5 +
+ i6 +
+ /i7 & o18 +
+ i2 & /i7 +
+ i5 & i6
+o17.oe = /o16
+
+/o18 = /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 & i11 +
+ i3 +
+ /i2 & /i7 +
+ i3 & i11 +
+ i5 & i6 & /i7 +
+ i7 & i11
+o18.oe = vcc
+
+o19 = i5 & i6 & /i7 & i11 +
+ i3 & i6 & i7 +
+ i5 +
+ i6 +
+ i7 +
+ i11 +
+ /i7
+o19.oe = vcc
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal16rp4/pal16rp4.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal16rp4/pal16rp4.eqn
new file mode 100644
index 00000000000..a6e6131618f
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal16rp4/pal16rp4.eqn
@@ -0,0 +1,82 @@
+chip pal16rp4 PAL16RP4
+
+CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10
+/OE=11 o12=12 o13=13 rf14=14 rf15=15 rf16=16 rf17=17 o18=18 o19=19 VCC=20
+
+equations
+
+o12 = /i2 & /i3 +
+ i4 & o13 +
+ i3 +
+ /i6 +
+ i8 +
+ /i9 +
+ i7 & /o13
+o12.oe = rf14
+
+/o13 = /rf14 +
+ /i9 +
+ i8 +
+ /i7 +
+ /i6 & /rf14 +
+ i5 +
+ i4
+o13.oe = i2 & rf14
+
+/rf14 := /rf15 +
+ /i8 +
+ i8 +
+ /i2 & /rf15 +
+ /i2 +
+ i2 & /i8 & rf15 +
+ /i4 +
+ i3
+rf14.oe = OE
+
+/rf15 := i3 & i6 & i7 +
+ i6 & rf16 +
+ i3 & /rf16 +
+ i7 +
+ /i4 +
+ i6 & i7 +
+ i4 & i7 +
+ /i2 & /i7
+rf15.oe = OE
+
+rf16 := /i3 & /rf17 +
+ /i4 +
+ /i3 +
+ /i3 & i4 +
+ /i7 & rf17 +
+ /i7 +
+ i4 +
+ i2 & i3
+rf16.oe = OE
+
+/rf17 := i2 & i5 & i6 & /i7 +
+ i2 & /o18 +
+ i5 +
+ i6 +
+ /i7 & o18 +
+ i2 & /i7 +
+ i5 & i6 +
+ /i3
+rf17.oe = OE
+
+o18 = /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 +
+ i3 +
+ /i2 & /i7 +
+ /i3 +
+ i5 & i6 & /i7 +
+ i7
+o18.oe = vcc
+
+/o19 = i5 & i6 & /i7 +
+ i3 & i6 & i7 +
+ i5 +
+ i6 +
+ i7 +
+ /i4 +
+ /i7
+o19.oe = vcc
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal16rp6/pal16rp6.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal16rp6/pal16rp6.eqn
new file mode 100644
index 00000000000..239365c9a88
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal16rp6/pal16rp6.eqn
@@ -0,0 +1,84 @@
+chip pal16rp6 PAL16RP6
+
+CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10
+/OE=11 o12=12 rf13=13 rf14=14 rf15=15 rf16=16 rf17=17 rf18=18 o19=19 VCC=20
+
+equations
+
+o12 = /i2 & /i3 +
+ i4 & rf13 +
+ i3 +
+ /i6 +
+ i8 +
+ /i9 +
+ i7 & /rf13
+o12.oe = rf14
+
+/rf13 := /rf14 +
+ /i9 +
+ i8 +
+ /i7 +
+ /i6 & /rf14 +
+ i5 & rf14 +
+ i4 +
+ /i2
+rf13.oe = OE
+
+/rf14 := /rf15 +
+ /i8 +
+ i8 +
+ /i2 & /rf15 +
+ /i2 +
+ i2 & /i8 & rf15 +
+ /i4 +
+ i3
+rf14.oe = OE
+
+rf15 := i3 & i6 & i7 +
+ i6 & rf16 +
+ i3 & /rf16 +
+ i7 +
+ /i4 +
+ i6 & i7 +
+ i4 & i7 +
+ /i2 & /i7
+rf15.oe = OE
+
+rf16 := /i3 & /rf17 +
+ /i4 +
+ /i3 +
+ /i3 & i4 +
+ /i7 & rf17 +
+ /i7 +
+ i4 +
+ i2 & i3
+rf16.oe = OE
+
+/rf17 := i2 & i5 & i6 & /i7 +
+ i2 & /rf18 +
+ i5 +
+ i6 +
+ /i7 & rf18 +
+ i2 & /i7 +
+ i5 & i6 +
+ /i3
+rf17.oe = OE
+
+/rf18 := /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 +
+ i3 +
+ /i2 & /i7 +
+ /i3 +
+ i5 & i6 & /i7 +
+ i7 +
+ i4
+rf18.oe = OE
+
+o19 = i5 & i6 & /i7 +
+ i3 & i6 & i7 +
+ i5 +
+ i6 +
+ i7 +
+ /i4 +
+ /i7
+o19.oe = vcc
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal16rp8/pal16rp8.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal16rp8/pal16rp8.eqn
new file mode 100644
index 00000000000..02ca2ac9462
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal16rp8/pal16rp8.eqn
@@ -0,0 +1,86 @@
+chip pal16rp8 PAL16RP8
+
+CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10
+/OE=11 rf12=12 rf13=13 rf14=14 rf15=15 rf16=16 rf17=17 rf18=18 rf19=19 VCC=20
+
+equations
+
+/rf12 := /i2 & /i3 +
+ i4 & rf13 +
+ i3 +
+ /i6 +
+ i8 +
+ /i9 +
+ i7 & /rf13 +
+ i5
+rf12.oe = OE
+
+/rf13 := /rf14 +
+ /i9 +
+ i8 +
+ /i7 +
+ /i6 & rf14 +
+ i5 +
+ i4 +
+ /i3
+rf13.oe = OE
+
+rf14 := /rf15 +
+ /i8 +
+ i8 +
+ /i2 & /rf15 +
+ /i2 +
+ i2 & /i8 & rf15 +
+ /i4 +
+ i3
+rf14.oe = OE
+
+/rf15 := i3 & i6 & i7 +
+ i6 & rf16 +
+ i3 & /rf16 +
+ i7 +
+ /i4 +
+ i6 & i7 +
+ i4 & i7 +
+ /i2 & /i7
+rf15.oe = OE
+
+/rf16 := /i3 & /rf17 +
+ /i4 +
+ /i3 +
+ /i3 & i4 +
+ /i7 & rf17 +
+ /i7 +
+ i4 +
+ i2 & i3
+rf16.oe = OE
+
+/rf17 := i2 & i5 & i6 & /i7 +
+ i2 & /rf18 +
+ i5 +
+ i6 +
+ /i7 & rf18 +
+ i2 & /i7 +
+ i5 & i6 +
+ /i3
+rf17.oe = OE
+
+rf18 := /i2 & i5 & i6 & /i7 +
+ i3 & i6 & i7 +
+ i3 & rf19 +
+ /i2 & /i7 +
+ /i3 & /rf19 +
+ i5 & i6 & /i7 +
+ i7 +
+ /i4
+rf18.oe = OE
+
+/rf19 := i5 & i6 & /i7 +
+ i3 & i6 & i7 +
+ i5 & rf12 +
+ i6 +
+ i7 +
+ /i4 & /rf12 +
+ /i7 +
+ i2
+rf19.oe = OE
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal18h4/pal18h4.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal18h4/pal18h4.eqn
new file mode 100644
index 00000000000..e2d25e34e2c
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal18h4/pal18h4.eqn
@@ -0,0 +1,34 @@
+chip pal18h4 PAL18H4
+
+i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
+i13=13 i14=14 i15=15 i16=16 o17=17 o18=18 o19=19 o20=20 i21=21 i22=22 i23=23 VCC=24
+
+equations
+
+o17 = /i1 & /i2 +
+ /i3 & /i7 +
+ /i4 & /i8 & i16 +
+ /i5 & /i6 +
+ /i9 & /i10 +
+ /i13 & /i15
+o17.oe = vcc
+
+o18 = i1 & i2 & i3 +
+ i4 & i5 & i6 & /i14 +
+ i7 & /i16 +
+ i8 & i15
+o18.oe = vcc
+
+o19 = i9 & i10 & i14 +
+ i13 & /i22 +
+ /i2 & i5 & /i21 +
+ i6 & /i7
+o19.oe = vcc
+
+o20 = i3 & i6 +
+ i7 & i13 & i23 +
+ i5 & i6 & i22 +
+ /i7 & i11 +
+ i21 & /i23 +
+ /i1 & i3 & i6 & i7 & i10
+o20.oe = vcc
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal18l4/pal18l4.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal18l4/pal18l4.eqn
new file mode 100644
index 00000000000..8cee3254656
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal18l4/pal18l4.eqn
@@ -0,0 +1,34 @@
+chip pal18l4 PAL18L4
+
+i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
+i13=13 i14=14 i15=15 i16=16 o17=17 o18=18 o19=19 o20=20 i21=21 i22=22 i23=23 VCC=24
+
+equations
+
+/o17 = /i1 & /i2 +
+ /i3 & /i7 +
+ /i4 & /i8 & i16 +
+ /i5 & /i6 +
+ /i9 & /i10 +
+ /i13 & /i15
+o17.oe = vcc
+
+/o18 = i1 & i2 & i3 +
+ i4 & i5 & i6 & /i14 +
+ i7 & /i16 +
+ i8 & i15
+o18.oe = vcc
+
+/o19 = i9 & i10 & i14 +
+ i13 & /i22 +
+ /i2 & i5 & /i21 +
+ i6 & /i7
+o19.oe = vcc
+
+/o20 = i3 & i6 +
+ i7 & i13 & i23 +
+ i5 & i6 & i22 +
+ /i7 & i11 +
+ i21 & /i23 +
+ /i1 & i3 & i6 & i7 & i10
+o20.oe = vcc
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal20c1/pal20c1.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal20c1/pal20c1.eqn
new file mode 100644
index 00000000000..a49161c39c7
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal20c1/pal20c1.eqn
@@ -0,0 +1,26 @@
+chip pal20c1 PAL20C1
+
+i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
+i13=13 i14=14 i15=15 i16=16 i17=17 o18=18 o19=19 i20=20 i21=21 i22=22 i23=23 VCC=24
+
+equations
+
+/o18 = /i1 & /i2 +
+ /i3 & /i7 & /i17 +
+ /i4 & /i8 & i16 +
+ /i5 & /i6 & i17 +
+ /i9 & /i10 +
+ /i13 & /i15 +
+ i1 & i2 & i3 & i7 & /i16 +
+ i4 & i5 & i6 & i8 & /i14 & i15
+o18.oe = vcc
+
+o19 = i9 & i10 & i14 & /i20 +
+ i13 & /i22 +
+ /i2 & i5 & /i21 +
+ i3 & i6 & /i7 +
+ i7 & i13 & i20 & i23 +
+ i5 & i6 & i22 +
+ /i7 & i11 +
+ /i1 & i3 & i6 & i7 & i10 & i21 & /i23
+o19.oe = vcc
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal20l2/pal20l2.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal20l2/pal20l2.eqn
new file mode 100644
index 00000000000..c435658647b
--- /dev/null
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal20l2/pal20l2.eqn
@@ -0,0 +1,26 @@
+chip pal20l2 PAL20L2
+
+i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
+i13=13 i14=14 i15=15 i16=16 i17=17 o18=18 o19=19 i20=20 i21=21 i22=22 i23=23 VCC=24
+
+equations
+
+/o18 = /i1 & i2 +
+ /i3 & i4 +
+ /i5 & i6 & /i7 +
+ i8 & /i9 & i10 +
+ /i11 & i13 +
+ /i14 & i15 & /i16 +
+ i17 & /i21 & i22 +
+ /i23
+o18.oe = vcc
+
+/o19 = i1 & /i2 +
+ i3 & /i4 +
+ i5 & /i6 & i7 +
+ /i8 & i9 & /i10 +
+ i11 & /i13 +
+ i14 & /i15 & i16 +
+ /i17 & i21 & /i22 +
+ i23
+o19.oe = vcc
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal20x10/pal20x10.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal20x10/pal20x10.eqn
index 3b7046af50c..66c24c39f1e 100644
--- a/src/regtests/jedutil/eqns/Opal_Jr/pal20x10/pal20x10.eqn
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal20x10/pal20x10.eqn
@@ -6,61 +6,61 @@ CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
equations
/rf14 := /i2 & rf15 +
- /rf15 & i11 +
+ /rf15 & i11 :+:
i3 & i4 +
/i5 & i10
rf14.oe = OE
/rf15 := i2 & i6 & i7 +
- i6 & rf16 +
+ i6 & rf16 :+:
i3 & /rf16 +
i7
rf15.oe = OE
/rf16 := /i3 & /rf17 +
- /i4 +
+ /i4 :+:
/i3 & i4 +
/i7 & rf17
rf16.oe = OE
/rf17 := /i2 +
- /rf18 +
+ /rf18 :+:
i5 & i6 +
rf18
rf17.oe = OE
/rf18 := /i2 & i5 & i6 & /i7 & /i11 +
- i3 & rf19 +
+ i3 & rf19 :+:
/i2 & /i7 +
/i3 & /rf19
rf18.oe = OE
/rf19 := i5 & i6 & /i7 & i10 +
- i3 & i6 & i7 +
+ i3 & i6 & i7 :+:
i5 & rf20 +
/i4 & /rf20 & rf23
rf19.oe = OE
/rf20 := /i10 & rf17 +
- /i11 +
+ /i11 :+:
i4 & /rf17 +
i2 & /rf23
rf20.oe = OE
/rf21 := /i2 & rf17 +
- i11 & /i10 +
+ i11 & /i10 :+:
/rf14 & rf15 +
i8 & i9 & /rf22
rf21.oe = OE
/rf22 := rf14 & /rf15 +
- i3 & /rf21 +
+ i3 & /rf21 :+:
/i8 & rf21 +
rf16 & /rf20
rf22.oe = OE
/rf23 := /rf14 +
- i6 & rf14 +
+ i6 & rf14 :+:
i7 & rf22 +
i2 & i4 & i6 & i8 & /rf15
rf23.oe = OE
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal20x4/pal20x4.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal20x4/pal20x4.eqn
index 5f077daa049..ad8a2af07ee 100644
--- a/src/regtests/jedutil/eqns/Opal_Jr/pal20x4/pal20x4.eqn
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal20x4/pal20x4.eqn
@@ -21,25 +21,25 @@ o15.oe = i6 & o16
o16.oe = /i3 & i4
/rf17 := /i2 +
- /rf18 +
+ /rf18 :+:
i5 & i6 +
rf18
rf17.oe = OE
/rf18 := /i2 & i5 & i6 & /i7 & /i11 +
- i3 & rf19 +
+ i3 & rf19 :+:
/i2 & /i7 +
/i3 & /rf19
rf18.oe = OE
/rf19 := i5 & i6 & /i7 & i10 +
- i3 & i6 & i7 +
+ i3 & i6 & i7 :+:
i5 & rf20 +
/i4 & /rf20 & o23
rf19.oe = OE
/rf20 := /i10 & rf17 +
- /i11 +
+ /i11 :+:
i4 & /rf17 +
i2 & /o23
rf20.oe = OE
diff --git a/src/regtests/jedutil/eqns/Opal_Jr/pal20x8/pal20x8.eqn b/src/regtests/jedutil/eqns/Opal_Jr/pal20x8/pal20x8.eqn
index 579e742b674..2da276a0fc2 100644
--- a/src/regtests/jedutil/eqns/Opal_Jr/pal20x8/pal20x8.eqn
+++ b/src/regtests/jedutil/eqns/Opal_Jr/pal20x8/pal20x8.eqn
@@ -11,49 +11,49 @@ equations
o14.oe = i6
/rf15 := i2 & i6 & i7 +
- i6 & rf16 +
+ i6 & rf16 :+:
i3 & /rf16 +
i7
rf15.oe = OE
/rf16 := /i3 & /rf17 +
- /i4 +
+ /i4 :+:
/i3 & i4 +
/i7 & rf17
rf16.oe = OE
/rf17 := /i2 +
- /rf18 +
+ /rf18 :+:
i5 & i6 +
rf18
rf17.oe = OE
/rf18 := /i2 & i5 & i6 & /i7 & /i11 +
- i3 & rf19 +
+ i3 & rf19 :+:
/i2 & /i7 +
/i3 & /rf19
rf18.oe = OE
/rf19 := i5 & i6 & /i7 & i10 +
- i3 & i6 & i7 +
+ i3 & i6 & i7 :+:
i5 & rf20 +
/i4 & /rf20 & o23
rf19.oe = OE
/rf20 := /i10 & rf17 +
- /i11 +
+ /i11 :+:
i4 & /rf17 +
i2 & /o23
rf20.oe = OE
/rf21 := /i2 & rf17 +
- i11 & /i10 +
+ i11 & /i10 :+:
/o14 & rf15 +
i8 & i9 & /rf22
rf21.oe = OE
/rf22 := o14 & /rf15 +
- i3 & /rf21 +
+ i3 & /rf21 :+:
/i8 & rf21 +
rf16 & /rf20
rf22.oe = OE
diff --git a/src/regtests/jedutil/eqns/PALASM/pal6l16/pal6l16.pds b/src/regtests/jedutil/eqns/PALASM/pal6l16/pal6l16.pds
new file mode 100644
index 00000000000..a688643f4e1
--- /dev/null
+++ b/src/regtests/jedutil/eqns/PALASM/pal6l16/pal6l16.pds
@@ -0,0 +1,53 @@
+TITLE PAL6L16 Test 1
+PATTERN A
+REVISION 1.0
+AUTHOR MAMEDev
+COMPANY MAMEDev
+DATE 11/11/2013
+
+CHIP PAL6L16Test1 PAL6L16
+
+;---------------------------------- PIN Declarations ---------------
+PIN 1 O1 COMBINATORIAL ;
+PIN 2 O2 COMBINATORIAL ;
+PIN 3 O3 COMBINATORIAL ;
+PIN 4 I4 COMBINATORIAL ;
+PIN 5 I5 COMBINATORIAL ;
+PIN 6 I6 COMBINATORIAL ;
+PIN 7 I7 COMBINATORIAL ;
+PIN 8 I8 COMBINATORIAL ;
+PIN 9 I9 COMBINATORIAL ;
+PIN 10 O10 COMBINATORIAL ;
+PIN 11 O11 COMBINATORIAL ;
+PIN 12 GND ;
+PIN 13 O13 COMBINATORIAL ;
+PIN 14 O14 COMBINATORIAL ;
+PIN 15 O15 COMBINATORIAL ;
+PIN 16 O16 COMBINATORIAL ;
+PIN 17 O17 COMBINATORIAL ;
+PIN 18 O18 COMBINATORIAL ;
+PIN 19 O19 COMBINATORIAL ;
+PIN 20 O20 COMBINATORIAL ;
+PIN 21 O21 COMBINATORIAL ;
+PIN 22 O22 COMBINATORIAL ;
+PIN 23 O23 COMBINATORIAL ;
+PIN 24 VCC ;
+
+EQUATIONS
+
+/O1 = I4
+/O2 = I5
+/O3 = I6
+/O10 = I7
+/O11 = I8
+/O13 = I9
+/O14 = I4 * I5
+/O15 = /I9
+/O16 = /I8
+/O17 = /I7
+/O18 = /I6
+/O19 = /I5
+/O20 = /I4
+/O21 = /I4 * I5 * /I6 * I7 * /I8 * I9
+/O22 = I4 * /I5 * I6 * /I7 * I8 * /I9
+/O23 = I6 * I9
diff --git a/src/regtests/jedutil/eqns/PALASM/pal8l14/pal8l14.pds b/src/regtests/jedutil/eqns/PALASM/pal8l14/pal8l14.pds
new file mode 100644
index 00000000000..c1c822f6352
--- /dev/null
+++ b/src/regtests/jedutil/eqns/PALASM/pal8l14/pal8l14.pds
@@ -0,0 +1,51 @@
+TITLE PAL8L14 Test 1
+PATTERN A
+REVISION 1.0
+AUTHOR MAMEDev
+COMPANY MAMEDev
+DATE 11/11/2013
+
+CHIP PAL8L14Test1 PAL8L14
+
+;---------------------------------- PIN Declarations ---------------
+PIN 1 O1 COMBINATORIAL ;
+PIN 2 O2 COMBINATORIAL ;
+PIN 3 I3 COMBINATORIAL ;
+PIN 4 I4 COMBINATORIAL ;
+PIN 5 I5 COMBINATORIAL ;
+PIN 6 I6 COMBINATORIAL ;
+PIN 7 I7 COMBINATORIAL ;
+PIN 8 I8 COMBINATORIAL ;
+PIN 9 I9 COMBINATORIAL ;
+PIN 10 I10 COMBINATORIAL ;
+PIN 11 O11 COMBINATORIAL ;
+PIN 12 GND ;
+PIN 13 O13 COMBINATORIAL ;
+PIN 14 O14 COMBINATORIAL ;
+PIN 15 O15 COMBINATORIAL ;
+PIN 16 O16 COMBINATORIAL ;
+PIN 17 O17 COMBINATORIAL ;
+PIN 18 O18 COMBINATORIAL ;
+PIN 19 O19 COMBINATORIAL ;
+PIN 20 O20 COMBINATORIAL ;
+PIN 21 O21 COMBINATORIAL ;
+PIN 22 O22 COMBINATORIAL ;
+PIN 23 O23 COMBINATORIAL ;
+PIN 24 VCC ;
+
+EQUATIONS
+
+/O1 = I3
+/O2 = I4
+/O11 = I5
+/O13 = I6
+/O14 = I7
+/O15 = I8
+/O16 = I9
+/O17 = I10
+/O18 = /I3
+/O19 = /I4 * /I9
+/O20 = /I5
+/O21 = /I6 * /I10
+/O22 = /I7
+/O23 = /I8
diff --git a/src/regtests/jedutil/jeds/pal10p8/pal10p8.jed b/src/regtests/jedutil/jeds/pal10p8/pal10p8.jed
new file mode 100644
index 00000000000..7f5affaf426
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal10p8/pal10p8.jed
@@ -0,0 +1,38 @@
+
+PAL10P8
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal10p8.EQN". Date: 11-3-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
+NOTE PINS i11:11 o12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
+NOTE PINS o19:19 VCC:20*
+QF0328*QP20*F0*
+L0000
+11111111111111111001
+10010110011001101111*
+L0040
+11111111111111111010
+01010110100101011111*
+L0080
+11111111111111110101
+10100101010110101111*
+L0120
+11111111111111110110
+01010101011001101111*
+L0160
+11111111111111111001
+01010110010110011111*
+L0200
+11111111111111111010
+01011001100101011111*
+L0240
+11111111111111110110
+10010101011001011111*
+L0280
+11111111111111110101
+01100101010110011111*
+L0320
+00010011*
+C2168*
+0000
diff --git a/src/regtests/jedutil/jeds/pal12h10/pal12h10.jed b/src/regtests/jedutil/jeds/pal12h10/pal12h10.jed
new file mode 100644
index 00000000000..df17bad6fd7
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal12h10/pal12h10.jed
@@ -0,0 +1,42 @@
+
+PAL12H10
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal12h10.eqn". Date: 11-7-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
+NOTE PINS i11:11 GND:12 i13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
+NOTE PINS o19:19 o20:20 o21:21 o22:22 o23:23 VCC:24*
+QF0480*QP24*F0*
+L0000
+111111101111111111010111
+110111111111111111111110*
+L0048
+111111011111111111111101
+111111111111111101101011*
+L0096
+111111110101101111110111
+111001111101011111011111*
+L0144
+101111110101101111111111
+111101111101011111111101*
+L0192
+111111111111111101011111
+111111111111111111111101*
+L0240
+111111111111011111111111
+111111111111110111111111*
+L0288
+010101111111111111111111
+111111010101111111111111*
+L0336
+111111111111111110101111
+111111111111111111111110*
+L0384
+111111111111101111111111
+111111111111111011111111*
+L0432
+101010111111111111111111
+111111101010111111111111*
+C3646*
+0000
diff --git a/src/regtests/jedutil/jeds/pal12l10/pal12l10.jed b/src/regtests/jedutil/jeds/pal12l10/pal12l10.jed
new file mode 100644
index 00000000000..e64d47cc559
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal12l10/pal12l10.jed
@@ -0,0 +1,42 @@
+
+PAL12L10
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal12l10.eqn". Date: 11-7-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
+NOTE PINS i11:11 GND:12 i13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
+NOTE PINS o19:19 o20:20 o21:21 o22:22 o23:23 VCC:24*
+QF0480*QP24*F0*
+L0000
+111111101111111111010111
+110111111111111111111110*
+L0048
+111111011111111111111101
+111111111111111101101011*
+L0096
+111111110101101111110111
+111001111101011111011111*
+L0144
+101111110101101111111111
+111101111101011111111101*
+L0192
+111111111111111101011111
+111111111111111111111101*
+L0240
+111111111111011111111111
+111111111111110111111111*
+L0288
+010101111111111111111111
+111111010101111111111111*
+L0336
+111111111111111110101111
+111111111111111111111110*
+L0384
+111111111111101111111111
+111111111111111011111111*
+L0432
+101010111111111111111111
+111111101010111111111111*
+C3646*
+0000
diff --git a/src/regtests/jedutil/jeds/pal12p6/pal12p6.jed b/src/regtests/jedutil/jeds/pal12p6/pal12p6.jed
new file mode 100644
index 00000000000..ff57a2d8104
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal12p6/pal12p6.jed
@@ -0,0 +1,36 @@
+
+PAL12P6
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal12p6.eqn". Date: 11-3-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
+NOTE PINS i11:11 i12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
+NOTE PINS i19:19 VCC:20*
+QF0390*QP20*F0*
+L0000
+111111111111111111111010
+010101111010010101111111
+111111111111111111101111
+111111011111111111111111*
+L0096
+111111111111111111110101
+101001110101011010111111*
+L0144
+111111111111111111110110
+010101110101100110111111*
+L0192
+111111111111111111111001
+010101111001011001111111*
+L0240
+111111111111111111111010
+010110110110010101111111*
+L0288
+111111111111111111110110
+100101110101100101111111
+111111111111111111011111
+111111101111111111111111*
+L0384
+001001*
+C28D4*
+0000
diff --git a/src/regtests/jedutil/jeds/pal14h8/pal14h8.jed b/src/regtests/jedutil/jeds/pal14h8/pal14h8.jed
new file mode 100644
index 00000000000..a92d33a1da0
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal14h8/pal14h8.jed
@@ -0,0 +1,40 @@
+
+PAL14H8
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal14h8.eqn". Date: 11-7-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
+NOTE PINS i11:11 GND:12 i13:13 i14:14 o15:15 o16:16 o17:17 o18:18*
+NOTE PINS o19:19 o20:20 o21:21 o22:22 i23:23 VCC:24*
+QF0560*QP24*F0*
+L0000
+1111111111010111111111111111
+1111111111111110111111110111
+1111111011111111111111111111
+1110011111110101111101111111*
+L0112
+1011111111010110111111111111
+1111010111110101111111111101*
+L0168
+1111111111111111110101011111
+1111111111111111111111111101*
+L0224
+1111111111111101111111111111
+1111111111111111011111111111*
+L0280
+0101011111111111111111111111
+1111111101010111111111101111*
+L0336
+1111111111111111111010111111
+1111111111111111111111111110*
+L0392
+1111111111111110111111111111
+1111111111111111101111111111*
+L0448
+1010111111111111111111111111
+1111101111111111111111111111
+1111111110111111111111111111
+1111111111101011111111111111*
+C407D*
+0000
diff --git a/src/regtests/jedutil/jeds/pal14l8/pal14l8.jed b/src/regtests/jedutil/jeds/pal14l8/pal14l8.jed
new file mode 100644
index 00000000000..9ec24191be7
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal14l8/pal14l8.jed
@@ -0,0 +1,40 @@
+
+PAL14L8
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal14l8.eqn". Date: 11-7-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
+NOTE PINS i11:11 GND:12 i13:13 i14:14 o15:15 o16:16 o17:17 o18:18*
+NOTE PINS o19:19 o20:20 o21:21 o22:22 i23:23 VCC:24*
+QF0560*QP24*F0*
+L0000
+1111111111010111111111111111
+1111111111111110111111110111
+1111111011111111111111111111
+1110011111110101111101111111*
+L0112
+1011111111010110111111111111
+1111010111110101111111111101*
+L0168
+1111111111111111110101011111
+1111111111111111111111111101*
+L0224
+1111111111111101111111111111
+1111111111111111011111111111*
+L0280
+0101011111111111111111111111
+1111111101010111111111101111*
+L0336
+1111111111111111111010111111
+1111111111111111111111111110*
+L0392
+1111111111111110111111111111
+1111111111111111101111111111*
+L0448
+1010111111111111111111111111
+1111101111111111111111111111
+1111111110111111111111111111
+1111111111101011111111111111*
+C407D*
+0000
diff --git a/src/regtests/jedutil/jeds/pal14p4/pal14p4.jed b/src/regtests/jedutil/jeds/pal14p4/pal14p4.jed
new file mode 100644
index 00000000000..9e15b1382b6
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal14p4/pal14p4.jed
@@ -0,0 +1,34 @@
+
+PAL14P4
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal14p4.eqn". Date: 11-3-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
+NOTE PINS i11:11 i12:12 i13:13 o14:14 o15:15 o16:16 o17:17 i18:18*
+NOTE PINS i19:19 VCC:20*
+QF0452*QP20*F0*
+L0000
+1111111111111111111111111010
+0101011110111001011101111111
+1111111111111111110111101111
+1111110111101111111111111111*
+L0112
+1111111111111111111111110110
+0101011101110110011110111111
+1111111111101111111111101111
+1111110111111111111011111111*
+L0224
+1111111111111111111111111001
+0101011110110101101101111111
+1111111111101111111111011111
+1111111011111111110111111111*
+L0336
+1111111111111111111111110101
+1001011101110110011101111111
+1111111111011111111111011111
+1111111011111111111011111111*
+L0448
+0110*
+C321A*
+0000
diff --git a/src/regtests/jedutil/jeds/pal16h6/pal16h6.jed b/src/regtests/jedutil/jeds/pal16h6/pal16h6.jed
new file mode 100644
index 00000000000..1d2b43d37c9
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal16h6/pal16h6.jed
@@ -0,0 +1,38 @@
+
+PAL16H6
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal16h6.eqn". Date: 11-8-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
+NOTE PINS i11:11 GND:12 i13:13 i14:14 i15:15 o16:16 o17:17 o18:18*
+NOTE PINS o19:19 o20:20 o21:21 i22:22 i23:23 VCC:24*
+QF0640*QP24*F0*
+L0000
+11111111110101011111111111111111
+11111111111111111011111111110111
+11111110111111111111111111111111
+11100111111111010111111101111111*
+L0128
+10111111111101111111111111111111
+11111111111111011011111111111111
+11110111111111011111111111111111
+11111101111111110111111111111101*
+L0256
+11111111111111111111011101011111
+11111111111011111111111111111101*
+L0320
+11111111111111110111111111111111
+11111111111111111101110111111111*
+L0384
+11111111111111111111101110111111
+11111111111111111111111011111110
+01010111111111111111111111111111
+11111111011101011111111111101111*
+L0512
+10101111111111111111111111111111
+11111011111111111011111111111111
+11111111101111111110111111111111
+11111111111110101111111111111111*
+C4A43*
+0000
diff --git a/src/regtests/jedutil/jeds/pal16l6/pal16l6.jed b/src/regtests/jedutil/jeds/pal16l6/pal16l6.jed
new file mode 100644
index 00000000000..de405c38b8a
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal16l6/pal16l6.jed
@@ -0,0 +1,38 @@
+
+PAL16L6
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal16l6.eqn". Date: 11-8-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
+NOTE PINS i11:11 GND:12 i13:13 i14:14 i15:15 o16:16 o17:17 o18:18*
+NOTE PINS o19:19 o20:20 o21:21 i22:22 i23:23 VCC:24*
+QF0640*QP24*F0*
+L0000
+11111111110101011111111111111111
+11111111111111111011111111110111
+11111110111111111111111111111111
+11100111111111010111111101111111*
+L0128
+10111111111101111111111111111111
+11111111111111011011111111111111
+11110111111111011111111111111111
+11111101111111110111111111111101*
+L0256
+11111111111111111111011101011111
+11111111111011111111111111111101*
+L0320
+11111111111111110111111111111111
+11111111111111111101110111111111*
+L0384
+11111111111111111111101110111111
+11111111111111111111111011111110
+01010111111111111111111111111111
+11111111011101011111111111101111*
+L0512
+10101111111111111111111111111111
+11111011111111111011111111111111
+11111111101111111110111111111111
+11111111111110101111111111111111*
+C4A43*
+0000
diff --git a/src/regtests/jedutil/jeds/pal16p8/pal16p8.jed b/src/regtests/jedutil/jeds/pal16p8/pal16p8.jed
new file mode 100644
index 00000000000..fc1a3b6ee93
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal16p8/pal16p8.jed
@@ -0,0 +1,86 @@
+
+PAL16P8
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal16p8.eqn". Date: 11-5-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
+NOTE PINS i11:11 o12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
+NOTE PINS o19:19 VCC:20*
+QF2056*QP20*F0*
+L0000
+11111111111111111111111111111111
+11111111111101110111101111111101
+11110111111111110111011111111111
+11111111111101111111111111111111
+11111111111111110111111111111111
+11111111111111111111011111111111
+11111111111111111111111111111101
+11111111111111111111101111111111*
+L0256
+11111111111111111111111111111111
+10111111111101110111101111111111
+11110111111111110111011111111101
+11110111111111111111111111111111
+10111111111111111111101111111111
+11110111111111111111111111111101
+11111111111101110111101111111111
+11111111111111111111011111111101*
+L0512
+11111111111111101111111111111111
+01111111111101110111101111111111
+01111110111111111111111111111111
+11111111111101111111111111111111
+11111111111111110111111111111111
+11111101111111111111101111111111
+01111111111111111111101111111111
+11111111111101110111111111111111*
+L0768
+11111111111111111111111111111111
+11111011111011111111111111111111
+11111111101111111111111111111110
+11111011101111111111111111111111
+11111011011111111111111111111111
+11111111110111111111101111111111
+11111111111111111111101111111110
+11111111011111111111111111111111*
+L1024
+11111111111111111111111111111111
+11110111111111110111011111111110
+11111111111111010111111111111111
+11110111111111101111111111111111
+11111111111111111111011111111111
+11111111111111111111111111111110
+11111111111111110111011111111111
+11111111111111111111011111111110*
+L1280
+11111111111111111111111111111111
+11011111111111111110111111111111
+11111111111111111111111110111111
+11011111111111111111111110111111
+10011111111111111110111111111111
+10111111111111111111111111111111
+01111111111111111101111110111111
+11110111111111111111111111111111*
+L1536
+01111111111111111111110111111111
+11111111111111111111111011111101
+11111111111111111111111111111011
+11111111111111111111111101111111
+11111111111111111111101111111111
+11111111111111111011110111111111
+11111111111101111111111111111111
+11111111011111111111111111111111*
+L1792
+11111111111111111111111111111111
+11110111111111111111011111111011
+11011111111111111111111111011111
+11110111111111111111111111111111
+11111111111111111011111111111111
+11111111111111111111111101111111
+11111111111111111111111111111011
+11111111111111111111011111101111*
+L2048
+10000110*
+CF429*
+0000
diff --git a/src/regtests/jedutil/jeds/pal16rp4/pal16rp4.jed b/src/regtests/jedutil/jeds/pal16rp4/pal16rp4.jed
new file mode 100644
index 00000000000..fb7896097b2
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal16rp4/pal16rp4.jed
@@ -0,0 +1,86 @@
+
+PAL16RP4
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal16rp4.eqn". Date: 11-5-113
+*
+NOTE PINS CLK:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
+NOTE PINS /OE:11 o12:12 o13:13 rf14:14 rf15:15 rf16:16 rf17:17*
+NOTE PINS o18:18 o19:19 VCC:20*
+QF2056*QP20*F0*
+L0000
+11111111111111111111111111111111
+11111111111101110111101111111111
+11110111111111110111011111111111
+11111111111101111111111111111111
+11111111111111110111111111111111
+11111111111111111111011111111111
+11111111101111111111111111111111
+11111111111111111111101111111111*
+L0256
+11111111111111111111111111111111
+10111111111101110111101111111111
+11110111111111110111011111111111
+11110111111111111111111111111111
+10111111111111111111101111111111
+11111011111111111111111111111111
+11111111111101110111101111111111
+11111111111111111111011111111111*
+L0512
+01111111111101110111101111111111
+01111110111111111111111111111111
+11111111111101111111111111111111
+11111111111111110111111111111111
+11111101111111111111101111111111
+01111111111111111111101111111111
+11111111111101110111111111111111
+11111011111111111111111111111111*
+L0768
+11111011111011111111111111111111
+11111111101111111111111111111111
+11111011111111111111111111111111
+11111011011111111111111111111111
+11111111110111111111101111111111
+11111111111111111111101111111111
+11111111011111111111111111111111
+01110111111111111111111111111111*
+L1024
+11110111111111110111011111111111
+11111111111111010111111111111111
+11110111111111101111111111111111
+11111111111111111111011111111111
+11111111101111111111111111111111
+11111111111111110111011111111111
+11111111011111111111011111111111
+10111111111111111111101111111111*
+L1280
+11111111111111111110111111111111
+11111111111111111111111110111111
+11111111111111111111111101111111
+10111111111111111110111111111111
+10111111111111111111111111111111
+01111111111111111101111110111111
+11111111101111111111111111111111
+11110111111111111111111111111111*
+L1536
+01111111111111111111110111111111
+11111111111111111111111011111111
+11111111111111111111111111111011
+11111111111111111111111101111111
+11111111111111111111101111111111
+11111111111111111011111011111111
+11111111111101111111111111111111
+11111111011111111111111111111111*
+L1792
+11111111111111111111110111111111
+10111011111111111111111111111111
+11111111011111111111111111011111
+11110111111111111111111111111111
+11111111111111111011111111111111
+11111111111111111111111101111111
+11111111111111111111111111111011
+11111111111111111111011111101111*
+L2048
+01010001*
+CF818*
+0000
diff --git a/src/regtests/jedutil/jeds/pal16rp6/pal16rp6.jed b/src/regtests/jedutil/jeds/pal16rp6/pal16rp6.jed
new file mode 100644
index 00000000000..d5fd0830e9c
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal16rp6/pal16rp6.jed
@@ -0,0 +1,86 @@
+
+PAL16RP6
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal16rp6.eqn". Date: 11-5-113
+*
+NOTE PINS CLK:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
+NOTE PINS /OE:11 o12:12 rf13:13 rf14:14 rf15:15 rf16:16 rf17:17*
+NOTE PINS rf18:18 o19:19 VCC:20*
+QF2056*QP20*F0*
+L0000
+11111111111111111111111111111111
+11111111111101110111101111111111
+11110111111111110111011111111111
+11111111111101111111111111111111
+11111111111111110111111111111111
+11111111111111111111011111111111
+11111111101111111111111111111111
+11111111111111111111101111111111*
+L0256
+10111111111101110111101111111111
+11110111111111110111011111111111
+11110111111111111111111111111111
+10111111111111111111101111111111
+11111011111111111111111111111111
+11111111111101110111101111111111
+11111111111111111111011111111111
+11111111011111111111111111111111*
+L0512
+01111111111101110111101111111111
+01111110111111111111111111111111
+11111111111101111111111111111111
+11111111111111110111111111111111
+11111101111111111111101111111111
+01111111111111111111101111111111
+11111111111101110111111111111111
+11111011111111111111111111111111*
+L0768
+11111011111011111111111111111111
+11111111101111111111111111111111
+11111011111111111111111111111111
+11111011011111111111111111111111
+11111111110111111111101111111111
+11111111111111111111101111111111
+11111111011111111111111111111111
+01110111111111111111111111111111*
+L1024
+11110111111111110111011111111111
+11111111111111010111111111111111
+11110111111111101111111111111111
+11111111111111111111011111111111
+11111111101111111111111111111111
+11111111111111110111011111111111
+11111111011111111111011111111111
+10111111111111111111101111111111*
+L1280
+11111111111111111110111111111111
+11111111111111111111111110111111
+11111111111111111111111101111111
+10111111111111111110111111111111
+10111111111111111111111111111111
+01111111111111111101111110111111
+11111111101111111111111111111111
+11110111111111111111111111111111*
+L1536
+11111111111111111111111011111111
+11111111111111111111111111111011
+11111111111111111111111101111111
+11111111111111111111101111111111
+11111111111111111011111011111111
+11111111111101111111110111111111
+11111111011111111111111111111111
+10111111111111111111111111111111*
+L1792
+11111111111111111111110111111111
+10111011111111111111111111111111
+11111111011111111111111111011111
+11110111111111111111111111111111
+11111111111111111011111111111111
+11111111111111111111111101111111
+11111111111111111111111111111011
+11111111111111111111011111101111*
+L2048
+10011001*
+CF825*
+0000
diff --git a/src/regtests/jedutil/jeds/pal18h4/pal18h4.jed b/src/regtests/jedutil/jeds/pal18h4/pal18h4.jed
new file mode 100644
index 00000000000..e23f45a2836
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal18h4/pal18h4.jed
@@ -0,0 +1,36 @@
+
+PAL18H4
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal18h4.eqn". Date: 11-8-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
+NOTE PINS i11:11 GND:12 i13:13 i14:14 i15:15 i16:16 o17:17 o18:18*
+NOTE PINS o19:19 o20:20 i21:21 i22:22 i23:23 VCC:24*
+QF0720*QP24*F0*
+L0000
+111101111111111101111111111111111111
+111111011111111111011111111111111101
+111111111101011101111111111111111111
+111111111111111111101111111111110111
+111111101111110111111111111111111111
+111001111111111101011111111101111111*
+L0216
+111111111111111111111111011101011111
+111111111110111111111111111111111101
+101111111111011011111111111111111111
+111111111111111101101111111111111111*
+L0360
+010101111111111111111111111111111111
+111111110111011101111111111111101111
+111111111111111111011110111111111111
+111111111111111111110111110111111111*
+L0504
+101011111111111111111111111111111111
+111110111111111111101111111111111111
+111111111011111111111001111111111111
+111111111111101110111111111111111111
+111111111111111111111111101110111111
+111111111111111111111111111011111110*
+C5172*
+0000
diff --git a/src/regtests/jedutil/jeds/pal18l4/pal18l4.jed b/src/regtests/jedutil/jeds/pal18l4/pal18l4.jed
new file mode 100644
index 00000000000..15dfa5f0a37
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal18l4/pal18l4.jed
@@ -0,0 +1,36 @@
+
+PAL18L4
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal18l4.eqn". Date: 11-8-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
+NOTE PINS i11:11 GND:12 i13:13 i14:14 i15:15 i16:16 o17:17 o18:18*
+NOTE PINS o19:19 o20:20 i21:21 i22:22 i23:23 VCC:24*
+QF0720*QP24*F0*
+L0000
+111101111111111101111111111111111111
+111111011111111111011111111111111101
+111111111101011101111111111111111111
+111111111111111111101111111111110111
+111111101111110111111111111111111111
+111001111111111101011111111101111111*
+L0216
+111111111111111111111111011101011111
+111111111110111111111111111111111101
+101111111111011011111111111111111111
+111111111111111101101111111111111111*
+L0360
+010101111111111111111111111111111111
+111111110111011101111111111111101111
+111111111111111111011110111111111111
+111111111111111111110111110111111111*
+L0504
+101011111111111111111111111111111111
+111110111111111111101111111111111111
+111111111011111111111001111111111111
+111111111111101110111111111111111111
+111111111111111111111111101110111111
+111111111111111111111111111011111110*
+C5172*
+0000
diff --git a/src/regtests/jedutil/jeds/pal20c1/pal20c1.jed b/src/regtests/jedutil/jeds/pal20c1/pal20c1.jed
new file mode 100644
index 00000000000..e41f37fc6e9
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal20c1/pal20c1.jed
@@ -0,0 +1,29 @@
+
+PAL20C1
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal20c1.eqn". Date: 11-8-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
+NOTE PINS i11:11 GND:12 i13:13 i14:14 i15:15 i16:16 i17:17 o18:18*
+NOTE PINS o19:19 i20:20 i21:21 i22:22 i23:23 VCC:24*
+QF0640*QP24*F0*
+L0000
+1010111111111111111111111111111111111111
+1111101111111111111110101111111111111111
+1111111110111111111111111001111111111111
+1111111111111011101111011111111111111111
+1111111111111111111111111111101110111111
+1111111111111111111111111111111011111110
+0101011111111111111101111110111111111111
+1111111101110111011111110111110111101111
+1111111111111111111011111111011101011111
+1111111111101111111111111111111111111101
+1011111111110110111111111111111111111111
+1111011111111111011110111111111111111111
+1111110111111111110101111111111111111101
+1111111111010111011111111111111111111111
+1111111111111111111110111111111111110111
+1110011011111101011101111111111101111111*
+C49E7*
+0000
diff --git a/src/regtests/jedutil/jeds/pal20l2/pal20l2.jed b/src/regtests/jedutil/jeds/pal20l2/pal20l2.jed
new file mode 100644
index 00000000000..85a55160502
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal20l2/pal20l2.jed
@@ -0,0 +1,30 @@
+
+PAL20L2
+EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
+Copyright (c) National Semiconductor Corporation 1990-1993
+Assembled from "pal20l2.eqn". Date: 11-10-113
+*
+NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
+NOTE PINS i11:11 GND:12 i13:13 i14:14 i15:15 i16:16 i17:17 o18:18*
+NOTE PINS o19:19 i20:20 i21:21 i22:22 i23:23 VCC:24*
+QF0640*QP24*F0*
+L0000
+1001111111111111111111111111111111111111
+1111011110111111111111111111111111111111
+1111111111110111101101111111111111111111
+1111111111111111111111111011011110111111
+1111111111111111111111111111111111110110
+1111111111111111111111111101111011011111
+1111111111101101111111101111111111111111
+1111110111111111111111111111111111111111*
+L0320
+0110111111111111111111111111111111111111
+1111101101111111111111111111111111111111
+1111111111111011011110111111111111111111
+1111111111111111111111110111101101111111
+1111111111111111111111111111111111111001
+1111111111111111111111111110110111101111
+1111111111011110111111011111111111111111
+1111111011111111111111111111111111111111*
+C4AC1*
+0000
diff --git a/src/regtests/jedutil/jeds/pal6l16/pal6l16.jed b/src/regtests/jedutil/jeds/pal6l16/pal6l16.jed
new file mode 100644
index 00000000000..bbd764b8ee7
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal6l16/pal6l16.jed
@@ -0,0 +1,33 @@
+
+PALASM4 PAL ASSEMBLER - MARKET RELEASE 1.5a (8-20-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+
+TITLE :PAL6L16 Test 1 AUTHOR :MAMEDev
+PATTERN :A COMPANY:MAMEDev
+REVISION:1.0 DATE :11/11/2013
+
+
+PAL6L16
+PAL6L16TEST1*
+QP24*
+QF192*
+G0*F0*
+L0000 011111111111*
+L0012 111101111101*
+L0024 110111111111*
+L0036 111101111111*
+L0048 011001100110*
+L0060 100110011001*
+L0072 101111111111*
+L0084 111011111111*
+L0096 111110111111*
+L0108 111111101111*
+L0120 111111111011*
+L0132 111111011111*
+L0144 111111111110*
+L0156 010111111111*
+L0168 111111110111*
+L0180 111111111101*
+C14F0*
+46DF
diff --git a/src/regtests/jedutil/jeds/pal8l14/pal8l14.jed b/src/regtests/jedutil/jeds/pal8l14/pal8l14.jed
new file mode 100644
index 00000000000..056692ebce4
--- /dev/null
+++ b/src/regtests/jedutil/jeds/pal8l14/pal8l14.jed
@@ -0,0 +1,31 @@
+
+PALASM4 PAL ASSEMBLER - MARKET RELEASE 1.5a (8-20-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+
+TITLE :PAL8L14 Test 1 AUTHOR :MAMEDev
+PATTERN :A COMPANY:MAMEDev
+REVISION:1.0 DATE :11/11/2013
+
+
+PAL8L14
+PAL8L14TEST1*
+QP24*
+QF224*
+G0*F0*
+L0000 0111111111111111*
+L0016 1111111111101111*
+L0032 1101111111111111*
+L0048 1111111110111111*
+L0064 1111111011111110*
+L0080 1111101111111111*
+L0096 1110111111111011*
+L0112 1011111111111111*
+L0128 1111111111111101*
+L0144 1111111111110111*
+L0160 1111111111011111*
+L0176 1111111101111111*
+L0192 1111011111111111*
+L0208 1111110111111111*
+C19E6*
+4A2C
diff --git a/src/regtests/jedutil/jeds/palce16v8/pal10l8-as-palce16v8.jed b/src/regtests/jedutil/jeds/palce16v8/pal10l8-as-palce16v8.jed
new file mode 100644
index 00000000000..4787359a6c3
--- /dev/null
+++ b/src/regtests/jedutil/jeds/palce16v8/pal10l8-as-palce16v8.jed
@@ -0,0 +1,86 @@
+
+PALASM4 PAL ASSEMBLER - MARKET RELEASE 1.5a (8-20-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+
+TITLE :PAL10L8 Test AUTHOR :MAMEDev
+PATTERN :A COMPANY:MAMEDev
+REVISION:1.0 DATE :08/25/13
+
+
+PAL16V8
+PAL10L8TEST*
+QP20*
+QF2194*
+G0*F0*
+L0000 11111011111110111111101111111111*
+L0032 01111111111111111111111111111111*
+L0064 11111111111111111111111101111111*
+L0096 11110111111111111111111111111101*
+L0128 11011111111111111111111111111111*
+L0160 11111111011111111111111111111111*
+L0192 11111111111111110111111111111111*
+L0224 11101111111111111111111111111011*
+L0256 11111111111111111111111111111011*
+L0288 11110111111101111111111111110111*
+L0320 11111111111111111111101111111111*
+L0352 11111111111111111111111111111110*
+L0384 11101111111111111111111111111111*
+L0416 11111011111111111111111111111111*
+L0448 11111111111110111111111111111111*
+L0480 11011111111111111111011111111101*
+L0512 11110111011111111111111111111111*
+L0544 11111111111110111111111111111111*
+L0576 11111111111111111111111111111011*
+L0608 11101111111111111111111111111110*
+L0640 11111111111111111111011111111111*
+L0672 01111111111111111111111111110111*
+L0704 11111111111111110111111111110111*
+L0736 11111111111111111111111110111111*
+L0768 11111111111111110111111111111111*
+L0800 10111111111111111111111111111011*
+L0832 11110111111111111111111111111101*
+L0864 11111111111111111111111110111111*
+L0896 11111111111111110111111101111111*
+L0928 11101111111111111111111111111111*
+L0960 11111111111110111111011101111111*
+L0992 11111111111111111111101110111111*
+L1024 11111111011111111111111111111111*
+L1056 11011011111111111111111111111111*
+L1088 01111111111111111111111111110111*
+L1120 11111111111101111111111111111111*
+L1152 11011111111111111111011111111111*
+L1184 11111011111111111111111111111111*
+L1216 11111111111111111111111110111111*
+L1248 11101111111111111111111111111111*
+L1280 11111011111111111111111111111011*
+L1312 11111111111111111011111111111111*
+L1344 10111111111111111111111111111111*
+L1376 11111111011111111111111111111111*
+L1408 11111111111111111111111110111101*
+L1440 11111111111111111111011111111111*
+L1472 11111111111101111111111111111110*
+L1504 11101111111111111111111111111111*
+L1536 11111111111111111111111110111111*
+L1568 11111111111111111111111111111110*
+L1600 11111111111111111111111111111011*
+L1632 11111011111111111011111111111111*
+L1664 11101111111111111111101111111111*
+L1696 10111111111111111111111111111111*
+L1728 11111111101111111111111111111111*
+L1760 11111111111110111111111111111111*
+L1792 11101111111111111111011111111111*
+L1824 11111111111111111111111101111111*
+L1856 11111111111111111111111111110101*
+L1888 01111111111111111111111111111111*
+L1920 11010111111111111111111111111111*
+L1952 11111111111101111111111111111111*
+L1984 11111111011111111111111111111110*
+L2016 11111111111111110111111111111111*
+L2048 00000000001001100110011001100110*
+L2080 01100110011001100110011001100110*
+L2112 01100100000000001111111111111111*
+L2144 11111111111111111111111111111111*
+L2176 111111111111111110*
+C01C9*
+143F
diff --git a/src/regtests/jedutil/jeds/palce16v8/pal16r6-as-palce16v8.jed b/src/regtests/jedutil/jeds/palce16v8/pal16r6-as-palce16v8.jed
new file mode 100644
index 00000000000..e35446712f4
--- /dev/null
+++ b/src/regtests/jedutil/jeds/palce16v8/pal16r6-as-palce16v8.jed
@@ -0,0 +1,86 @@
+
+PALASM4 PAL ASSEMBLER - MARKET RELEASE 1.5a (8-20-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+
+TITLE :PAL16R6 Test 1 AUTHOR :MAMEDev
+PATTERN :A COMPANY:MAMEDev
+REVISION:1.0 DATE :08/25/13
+
+
+PAL16V8
+PAL16R6TEST1*
+QP20*
+QF2194*
+G0*F0*
+L0000 11111110111111111111111111111101*
+L0032 11111111011111111111111111111110*
+L0064 11111111111101111011111111111111*
+L0096 11111111111110110111111111111111*
+L0128 11111110111111111111111101110111*
+L0160 01111101111111111111111111111011*
+L0192 11110111111111111111111111110111*
+L0224 11111111101111111111101110111111*
+L0256 11111101111111111111111111111111*
+L0288 11111111111111111111111101110111*
+L0320 11111111111110111111111101111111*
+L0352 11110110011111111111111111111111*
+L0384 01111011111111111111111111111111*
+L0416 11101111111110111111101111111111*
+L0448 10110111111111111111101111111111*
+L0480 10011111111111111111111111111111*
+L0512 01111111111111111111111111110111*
+L0544 10110111111111111111111110111111*
+L0576 11111111101111111111111110111111*
+L0608 11111111111110100111111110111111*
+L0640 11111110111111011111111111111111*
+L0672 11110111111111111111111110111111*
+L0704 11111111101111011111111110111111*
+L0736 11111101111111111111111111111111*
+L0768 11111111110111111111111101111111*
+L0800 11110111111111111111111111110111*
+L0832 11111111101111111110111111111011*
+L0864 11111111111111111111011101111111*
+L0896 01110111111011111111111111110111*
+L0928 01111111111101111111111111111111*
+L0960 11110111101110111101111111111111*
+L0992 11111111111111111011101111110111*
+L1024 11111011111111111111111111111111*
+L1056 11111111011111111111111111111111*
+L1088 11111111111101011111110111111111*
+L1120 11111111111111111111101111110111*
+L1152 11110111111111111111111011111111*
+L1184 11111111101110111111111111111111*
+L1216 11111111111111110111111111111011*
+L1248 11111111111111101111111110111111*
+L1280 01111111111111111111111111111111*
+L1312 11111111111111111111111011111111*
+L1344 11110111111111111111111111111111*
+L1376 11111111111111111111011110101111*
+L1408 11111111111111111111110111111011*
+L1440 11111111111111110111111111010111*
+L1472 01111111011111111111111111111011*
+L1504 11111111111110111111111110111111*
+L1536 11111111111111111011111111011111*
+L1568 11011111111111111111111111111101*
+L1600 11111111111111111111111111101011*
+L1632 10111111111110111111111111111111*
+L1664 01111111111111111111111111111110*
+L1696 11111111111111111111101111111011*
+L1728 10111111111111111111111110111111*
+L1760 11111011111111111111111101110111*
+L1792 11111111111110111111111111111111*
+L1824 11111101110111011101110111011111*
+L1856 01111111111111111111111111111111*
+L1888 11110111111111111111111111111111*
+L1920 11111111011111111111111111111111*
+L1952 11101111111111111111111111111111*
+L1984 11011111111111110111111111111111*
+L2016 11111111111111111111011110110111*
+L2048 00000000000000000000000000000000*
+L2080 00000000000000000000000000000000*
+L2112 00000000100000011111111111111111*
+L2144 11111111111111111111111111111111*
+L2176 111111111111111101*
+CF9B8*
+144A
diff --git a/src/tools/jedutil.c b/src/tools/jedutil.c
index b713baa4ac6..fe3b52e7fe2 100644
--- a/src/tools/jedutil.c
+++ b/src/tools/jedutil.c
@@ -21,13 +21,22 @@
20-pin devices:
PAL10H8 = QP20 QF0320
PAL12H6 = QP20 QF0320
- PAL14H4 = QP20
- PAL16H2 = QP20
- PAL16C1 = QP20
+ PAL14H4 = QP20 QF0448
+ PAL16H2 = QP20 QF0512
+ PAL16C1 = QP20 QF0512
PAL10L8 = QP20 QF0320
- PAL12L6 = QP20
- PAL14L4 = QP20
- PAL16L2 = QP20
+ PAL12L6 = QP20 QF0320
+ PAL14L4 = QP20 QF0448
+ PAL16L2 = QP20 QF0512
+
+ PAL10P8 = QP20 QF0328
+ PAL12P6 = QP20 QF0390
+ PAL14P4 = QP20 QF0452
+ PAL16P2 = QP20 QF0514
+ PAL16P8 = QP20 QF2056
+ PAL16RP4 = QP20 QF2056
+ PAL16RP6 = QP20 QF2056
+ PAL16RP8 = QP20 QF2056
15S8 = QP20 QF0448
@@ -37,10 +46,10 @@
PAL16L8 = QP20 QF2048
- PAL16R4 = QP20
- PAL16R6 = QP20
- PAL16R8 = QP20
- PAL16RA8 = QP20 QF2056
+ PAL16R4 = QP20 QF2048
+ PAL16R6 = QP20 QF2048
+ PAL16R8 = QP20 QF2048
+ PAL16RA8 = QP20 QF2056?
PAL16V8R = QP20 QF2194
PALCE16V8 = QP20 QF2194
@@ -48,18 +57,40 @@
18CV8 = QP20 QF2696
- 24-pin devices:
- PAL20L8 = QP24
- PAL20L10 = QP24
- PAL20R4 = QP24
- PAL20R6 = QP24
- PAL20R8 = QP24
-
- PAL20X4 = QP24
- PAL20X8 = QP24
- PAL20X10 = QP24
+ EPL10P8 = QP20
+ EPL12P6 = QP20
+ EPL14P4 = QP20
+ EPL16P2 = QP20
+ EPL16P8 = QP20
+ EPL16RP8 = QP20
+ EPL16RP6 = QP20
+ EPL16RP4 = QP20
- PAL22V10 = QP24
+ 24-pin devices:
+ PAL6L16 = QP24 QF0192
+ PAL8L14 = QP24 QF0224
+ PAL12H10 = QP24 QF0480
+ PAL12L10 = QP24 QF0480
+ PAL14H8 = QP24 QF0560
+ PAL14L8 = QP24 QF0560
+ PAL16H6 = QP24 QF0640
+ PAL16L6 = QP24 QF0640
+ PAL18H4 = QP24 QF0720
+ PAL18L4 = QP24 QF0720
+ PAL20C1 = QP24 QF0640
+ PAL20L2 = QP24 QF0640
+
+ PAL20L8 = QP24 QF2560
+ PAL20L10 = QP24 QF1600
+ PAL20R4 = QP24 QF2560
+ PAL20R6 = QP24 QF2560
+ PAL20R8 = QP24 QF2560
+
+ PAL20X4 = QP24 QF1600
+ PAL20X8 = QP24 QF1600
+ PAL20X10 = QP24 QF1600
+
+ PAL22V10 = QP24 QF5828?
GAL20V8A = QP24 QF2706
GAL22V10 = QP24 QF5892
@@ -69,8 +100,8 @@
****************************************************************************
- Thanks to Charles MacDonald for providing information on how to decode
- the PLS153/82S153 and CK2605 fuse map.
+ Thanks to Charles MacDonald (http://cgfm2.emuviews.com/) for providing
+ information on how to decode the PLS153/82S153 and CK2605 fuse map.
***************************************************************************/
@@ -134,6 +165,26 @@
#define LOWHIGH_FUSE_BLOWN 0x00000004
#define NO_FUSE_BLOWN 0x00000008
+
+
+/* Symbols */
+#define AND_SYMBOL "&"
+#define OR_SYMBOL "+"
+#define XOR_SYMBOL ":+:"
+
+#define LOW_SYMBOL "/"
+
+#define INPUT_SYMBOL "i"
+#define OUTPUT_SYMBOL "o"
+#define REGISTERED_FEEDBACK_OUTPUT_SYMBOL "rfo"
+#define OUTPUT_FEEDBACK_SYMBOL "of"
+#define REGISTERED_FEEDBACK_SYMBOL "rf"
+
+#define COMBINATORIAL_ASSIGNMENT "="
+#define REGISTERED_ASSIGNMENT ":="
+
+
+
/***************************************************************************
TYPE DEFINITIONS
***************************************************************************/
@@ -181,6 +232,7 @@ typedef UINT16 (*get_pin_fuse_state_func)(const pal_data* pal, const jed_data* j
struct _pal_data
{
const char *name;
+ UINT32 numfuses;
const pin_fuse_rows *pinfuserows;
UINT16 pinfuserowscount;
const pin_fuse_columns *pinfusecolumns;
@@ -233,6 +285,36 @@ static void print_pal20x8_product_terms(const pal_data* pal, const jed_data* jed
static void print_pal20x10_product_terms(const pal_data* pal, const jed_data* jed);
static void print_82s153_pls153_product_terms(const pal_data* pal, const jed_data* jed);
static void print_ck2605_product_terms(const pal_data* pal, const jed_data* jed);
+#if defined(ricoh_pals)
+static void print_epl10p8_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_epl12p6_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_epl14p4_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_epl16p2_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_epl16p8_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_epl16rp8_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_epl16rp6_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_epl16rp4_product_terms(const pal_data* pal, const jed_data* jed);
+#endif
+static void print_pal10p8_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal12p6_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal14p4_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal16p2_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal16p8_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal16rp4_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal16rp6_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal16rp8_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal6l16_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal8l14_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal12h10_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal12l10_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal14h8_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal14l8_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal16h6_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal16l6_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal18h4_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal18l4_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal20c1_product_terms(const pal_data* pal, const jed_data* jed);
+static void print_pal20l2_product_terms(const pal_data* pal, const jed_data* jed);
@@ -263,6 +345,36 @@ static void config_pal20x8_pins(const pal_data* pal, const jed_data* jed);
static void config_pal20x10_pins(const pal_data* pal, const jed_data* jed);
static void config_82s153_pls153_pins(const pal_data* pal, const jed_data* jed);
static void config_ck2605_pins(const pal_data* pal, const jed_data* jed);
+#if defined(ricoh_pals)
+static void config_epl10p8_pins(const pal_data* pal, const jed_data* jed);
+static void config_epl12p6_pins(const pal_data* pal, const jed_data* jed);
+static void config_epl14p4_pins(const pal_data* pal, const jed_data* jed);
+static void config_epl16p2_pins(const pal_data* pal, const jed_data* jed);
+static void config_epl16p8_pins(const pal_data* pal, const jed_data* jed);
+static void config_epl16rp8_pins(const pal_data* pal, const jed_data* jed);
+static void config_epl16rp6_pins(const pal_data* pal, const jed_data* jed);
+static void config_epl16rp4_pins(const pal_data* pal, const jed_data* jed);
+#endif
+static void config_pal10p8_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal12p6_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal14p4_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal16p2_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal16p8_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal16rp4_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal16rp6_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal16rp8_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal6l16_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal8l14_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal12h10_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal12l10_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal14h8_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal14l8_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal16h6_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal16l6_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal18h4_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal18l4_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal20c1_pins(const pal_data* pal, const jed_data* jed);
+static void config_pal20l2_pins(const pal_data* pal, const jed_data* jed);
@@ -391,14 +503,14 @@ static pin_fuse_rows pal16r8pinfuserows[] = {
{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}}; /* Registered Output */
static pin_fuse_rows palce16v8pinfuserows[] = {
- {12, 1792, 1824, 2016},
- {13, 1536, 1568, 1760},
- {14, 1280, 1312, 1504},
- {15, 1024, 1056, 1248},
- {16, 768, 800, 992},
- {17, 512, 544, 736},
- {18, 256, 288, 480},
- {19, 0, 32, 224}};
+ {12, 0, 0, 0},
+ {13, 0, 0, 0},
+ {14, 0, 0, 0},
+ {15, 0, 0, 0},
+ {16, 0, 0, 0},
+ {17, 0, 0, 0},
+ {18, 0, 0, 0},
+ {19, 0, 0, 0}};
static pin_fuse_rows gal16v8pinfuserows[] = {
{12, 0, 0, 0},
@@ -544,6 +656,258 @@ static pin_fuse_rows ck2605pinfuserows[] = {
{18, 1024, 0, 0},
{19, 1060, 0, 0}};
+#if defined(ricoh_pals)
+static pin_fuse_rows epl10p8pinfuserows[] = {
+ {12, NO_OUTPUT_ENABLE_FUSE_ROW, 560, 620},
+ {13, NO_OUTPUT_ENABLE_FUSE_ROW, 480, 540},
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 400, 460},
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 380},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 300},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 160, 220},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 80, 140},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 60}};
+
+static pin_fuse_rows epl12p6pinfuserows[] = {
+ {13, NO_OUTPUT_ENABLE_FUSE_ROW, 576, 744},
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 480, 552},
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 456},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 360},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 264},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 168}};
+
+static pin_fuse_rows epl14p4pinfuserows[] = {
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 672, 868},
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 448, 644},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 420},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 196}};
+
+static pin_fuse_rows epl16p2pinfuserows[] = {
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 992},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 480}};
+
+static pin_fuse_rows epl16p8pinfuserows[] = {
+ {12, 1792, 1824, 2016},
+ {13, 1536, 1568, 1760},
+ {14, 1280, 1312, 1504},
+ {15, 1024, 1056, 1248},
+ {16, 768, 800, 992},
+ {17, 512, 544, 736},
+ {18, 256, 288, 480},
+ {19, 0, 32, 224}};
+
+static pin_fuse_rows epl16rp8pinfuserows[] = {
+ {12, NO_OUTPUT_ENABLE_FUSE_ROW, 1792, 2016}, /* Registered Output */
+ {13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760}, /* Registered Output */
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992}, /* Registered Output */
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736}, /* Registered Output */
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480}, /* Registered Output */
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}}; /* Registered Output */
+
+static pin_fuse_rows epl16rp6pinfuserows[] = {
+ {12, 1792, 1824, 2016},
+ {13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760}, /* Registered Output */
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992}, /* Registered Output */
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736}, /* Registered Output */
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480}, /* Registered Output */
+ {19, 0, 32, 224}};
+
+static pin_fuse_rows epl16rp4pinfuserows[] = {
+ {12, 1792, 1824, 2016},
+ {13, 1536, 1568, 1760},
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992}, /* Registered Output */
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736}, /* Registered Output */
+ {18, 256, 288, 480},
+ {19, 0, 32, 224}};
+#endif
+
+static pin_fuse_rows pal10p8pinfuserows[] = {
+ {12, NO_OUTPUT_ENABLE_FUSE_ROW, 280, 300},
+ {13, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 260},
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 200, 220},
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 160, 180},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 120, 140},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 80, 100},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 40, 60},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 20}};
+
+static pin_fuse_rows pal12p6pinfuserows[] = {
+ {13, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 360},
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 264},
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 216},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 168},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 120},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 72}};
+
+static pin_fuse_rows pal14p4pinfuserows[] = {
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 420},
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 308},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 196},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 84}};
+
+static pin_fuse_rows pal16p2pinfuserows[] = {
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};
+
+static pin_fuse_rows pal16p8pinfuserows[] = {
+ {12, 1792, 1824, 2016},
+ {13, 1536, 1568, 1760},
+ {14, 1280, 1312, 1504},
+ {15, 1024, 1056, 1248},
+ {16, 768, 800, 992},
+ {17, 512, 544, 736},
+ {18, 256, 288, 480},
+ {19, 0, 32, 224}};
+
+static pin_fuse_rows pal16rp4pinfuserows[] = {
+ {12, 1792, 1824, 2016},
+ {13, 1536, 1568, 1760},
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992}, /* Registered Output */
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736}, /* Registered Output */
+ {18, 256, 288, 480},
+ {19, 0, 32, 224}};
+
+static pin_fuse_rows pal16rp6pinfuserows[] = {
+ {12, 1792, 1824, 2016},
+ {13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760}, /* Registered Output */
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992}, /* Registered Output */
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736}, /* Registered Output */
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480}, /* Registered Output */
+ {19, 0, 32, 224}};
+
+static pin_fuse_rows pal16rp8pinfuserows[] = {
+ {12, NO_OUTPUT_ENABLE_FUSE_ROW, 1792, 2016}, /* Registered Output */
+ {13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760}, /* Registered Output */
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992}, /* Registered Output */
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736}, /* Registered Output */
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480}, /* Registered Output */
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}}; /* Registered Output */
+
+static pin_fuse_rows pal6l16pinfuserows[] = {
+ {1, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
+ {2, NO_OUTPUT_ENABLE_FUSE_ROW, 24, 24},
+ {3, NO_OUTPUT_ENABLE_FUSE_ROW, 36, 36},
+ {10, NO_OUTPUT_ENABLE_FUSE_ROW, 132, 132},
+ {11, NO_OUTPUT_ENABLE_FUSE_ROW, 168, 168},
+ {13, NO_OUTPUT_ENABLE_FUSE_ROW, 180, 180},
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 156, 156},
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 144},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 120, 120},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 108, 108},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 96},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 84, 84},
+ {20, NO_OUTPUT_ENABLE_FUSE_ROW, 72, 72},
+ {21, NO_OUTPUT_ENABLE_FUSE_ROW, 60, 60},
+ {22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 48},
+ {23, NO_OUTPUT_ENABLE_FUSE_ROW, 12, 12}};
+
+static pin_fuse_rows pal8l14pinfuserows[] = {
+ {1, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
+ {2, NO_OUTPUT_ENABLE_FUSE_ROW, 32, 32},
+ {11, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 192},
+ {13, NO_OUTPUT_ENABLE_FUSE_ROW, 208, 208},
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 176, 176},
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 160, 160},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 144},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 128, 128},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 112},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 96},
+ {20, NO_OUTPUT_ENABLE_FUSE_ROW, 80, 80},
+ {21, NO_OUTPUT_ENABLE_FUSE_ROW, 64, 64},
+ {22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 48},
+ {23, NO_OUTPUT_ENABLE_FUSE_ROW, 16, 16}};
+
+static pin_fuse_rows pal12h10pinfuserows[] = {
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 432, 456},
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 408},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 360},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 312},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 264},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 216},
+ {20, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 168},
+ {21, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 120},
+ {22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 72},
+ {23, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 24}};
+
+static pin_fuse_rows pal12l10pinfuserows[] = {
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 432, 456},
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 408},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 360},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 312},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 264},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 216},
+ {20, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 168},
+ {21, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 120},
+ {22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 72},
+ {23, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 24}};
+
+static pin_fuse_rows pal14h8pinfuserows[] = {
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 448, 532},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 392, 420},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 364},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 280, 308},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 252},
+ {20, NO_OUTPUT_ENABLE_FUSE_ROW, 168, 196},
+ {21, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 140},
+ {22, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 84}};
+
+static pin_fuse_rows pal14l8pinfuserows[] = {
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 448, 532},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 392, 420},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 364},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 280, 308},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 252},
+ {20, NO_OUTPUT_ENABLE_FUSE_ROW, 168, 196},
+ {21, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 140},
+ {22, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 84}};
+
+static pin_fuse_rows pal16h6pinfuserows[] = {
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 608},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 480},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 352},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 288},
+ {20, NO_OUTPUT_ENABLE_FUSE_ROW, 128, 224},
+ {21, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 96}};
+
+static pin_fuse_rows pal16l6pinfuserows[] = {
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 608},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 480},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 352},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 288},
+ {20, NO_OUTPUT_ENABLE_FUSE_ROW, 128, 224},
+ {21, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 96}};
+
+static pin_fuse_rows pal18h4pinfuserows[] = {
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 504, 684},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 360, 468},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 216, 324},
+ {20, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 180}};
+
+static pin_fuse_rows pal18l4pinfuserows[] = {
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 504, 684},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 360, 468},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 216, 324},
+ {20, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 180}};
+
+static pin_fuse_rows pal20c1pinfuserows[] = {
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 280},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 600}};
+
+static pin_fuse_rows pal20l2pinfuserows[] = {
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 600},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 280}};
+
static pin_fuse_columns pal10l8pinfusecolumns[] = {
{1, 3, 2},
{2, 1, 0},
@@ -1047,212 +1411,868 @@ static pin_fuse_columns ck2605pinfusecolumns[] = {
{18, 33, 32},
{19, 35, 34}};
+#if defined(ricoh_pals)
+static pin_fuse_columns epl10p8pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 7, 6},
+ {5, 9, 8},
+ {6, 11, 10},
+ {7, 13, 12},
+ {8, 15, 14},
+ {9, 17, 16},
+ {11, 19, 18}};
+
+static pin_fuse_columns epl12p6pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 11, 10},
+ {6, 13, 12},
+ {7, 15, 14},
+ {8, 17, 16},
+ {9, 19, 18},
+ {11, 21, 20},
+ {12, 19, 18},
+ {19, 7, 6}};
+
+static pin_fuse_columns epl14p4pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 15, 14},
+ {7, 17, 16},
+ {8, 21, 20},
+ {9, 25, 24},
+ {11, 27, 26},
+ {12, 23, 22},
+ {13, 19, 18},
+ {18, 11, 10},
+ {19, 7, 6}};
+
+static pin_fuse_columns epl16p2pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {11, 31, 30},
+ {12, 27, 26},
+ {13, 23, 22},
+ {14, 19, 18},
+ {17, 15, 14},
+ {18, 11, 10},
+ {19, 7, 6}};
+
+static pin_fuse_columns epl16p8pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {11, 31, 30},
+ {13, 27, 26},
+ {14, 23, 22},
+ {15, 19, 18},
+ {16, 15, 14},
+ {17, 11, 10},
+ {18, 7, 6}};
+
+static pin_fuse_columns epl16rp8pinfusecolumns[] = {
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {12, 31, 30},
+ {13, 27, 26},
+ {14, 23, 22},
+ {15, 19, 18},
+ {16, 15, 14},
+ {17, 11, 10},
+ {18, 7, 6},
+ {19, 3, 2}};
+
+static pin_fuse_columns epl16rp6pinfusecolumns[] = {
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {12, 31, 30},
+ {13, 27, 26},
+ {14, 23, 22},
+ {15, 19, 18},
+ {16, 15, 14},
+ {17, 11, 10},
+ {18, 7, 6},
+ {19, 3, 2}};
+
+static pin_fuse_columns epl16rp4pinfusecolumns[] = {
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {12, 31, 30},
+ {13, 27, 26},
+ {18, 7, 6},
+ {19, 3, 2}};
+#endif
+
+static pin_fuse_columns pal10p8pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 7, 6},
+ {5, 9, 8},
+ {6, 11, 10},
+ {7, 13, 12},
+ {8, 15, 14},
+ {9, 17, 16},
+ {11, 19, 18}};
+
+static pin_fuse_columns pal12p6pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 11, 10},
+ {6, 13, 12},
+ {7, 15, 14},
+ {8, 17, 16},
+ {9, 21, 20},
+ {11, 23, 22},
+ {12, 19, 18},
+ {19, 7, 6}};
+
+static pin_fuse_columns pal14p4pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 15, 14},
+ {7, 17, 16},
+ {8, 21, 20},
+ {9, 25, 24},
+ {11, 27, 26},
+ {12, 23, 22},
+ {13, 19, 18},
+ {18, 11, 10},
+ {19, 7, 6}};
+
+static pin_fuse_columns pal16p2pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {11, 31, 30},
+ {12, 27, 26},
+ {13, 23, 22},
+ {14, 19, 18},
+ {17, 15, 14},
+ {18, 11, 10},
+ {19, 7, 6}};
+
+static pin_fuse_columns pal16p8pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {11, 31, 30},
+ {13, 27, 26},
+ {14, 23, 22},
+ {15, 19, 18},
+ {16, 15, 14},
+ {17, 11, 10},
+ {18, 7, 6}};
+
+static pin_fuse_columns pal16rp4pinfusecolumns[] = {
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {12, 31, 30},
+ {13, 27, 26},
+ {14, 23, 22}, /* Registered Output */
+ {15, 19, 18}, /* Registered Output */
+ {16, 15, 14}, /* Registered Output */
+ {17, 11, 10}, /* Registered Output */
+ {18, 7, 6},
+ {19, 3, 2}};
+
+static pin_fuse_columns pal16rp6pinfusecolumns[] = {
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {12, 31, 30},
+ {13, 27, 26}, /* Registered Output */
+ {14, 23, 22}, /* Registered Output */
+ {15, 19, 18}, /* Registered Output */
+ {16, 15, 14}, /* Registered Output */
+ {17, 11, 10}, /* Registered Output */
+ {18, 7, 6}, /* Registered Output */
+ {19, 3, 2}};
+
+static pin_fuse_columns pal16rp8pinfusecolumns[] = {
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {12, 31, 30}, /* Registered Output */
+ {13, 27, 26}, /* Registered Output */
+ {14, 23, 22}, /* Registered Output */
+ {15, 19, 18}, /* Registered Output */
+ {16, 15, 14}, /* Registered Output */
+ {17, 11, 10}, /* Registered Output */
+ {18, 7, 6}, /* Registered Output */
+ {19, 3, 2}}; /* Registered Output */
+
+static pin_fuse_columns pal6l16pinfusecolumns[] = {
+ {4, 1, 0},
+ {5, 3, 2},
+ {6, 5, 4},
+ {7, 7, 6},
+ {8, 9, 8},
+ {9, 11, 10}};
+
+static pin_fuse_columns pal8l14pinfusecolumns[] = {
+ {3, 1, 0},
+ {4, 3, 2},
+ {5, 5, 4},
+ {6, 7, 6},
+ {7, 9, 8},
+ {8, 11, 10},
+ {9, 13, 12},
+ {10, 15, 14}};
+
+static pin_fuse_columns pal12h10pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 7, 6},
+ {5, 9, 8},
+ {6, 11, 10},
+ {7, 13, 12},
+ {8, 15, 14},
+ {9, 17, 16},
+ {10, 19, 18},
+ {11, 21, 20},
+ {13, 23, 22}};
+
+static pin_fuse_columns pal12l10pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 7, 6},
+ {5, 9, 8},
+ {6, 11, 10},
+ {7, 13, 12},
+ {8, 15, 14},
+ {9, 17, 16},
+ {10, 19, 18},
+ {11, 21, 20},
+ {13, 23, 22}};
+
+static pin_fuse_columns pal14h8pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 11, 10},
+ {6, 13, 12},
+ {7, 15, 14},
+ {8, 17, 16},
+ {9, 19, 18},
+ {10, 21, 20},
+ {11, 25, 24},
+ {13, 27, 26},
+ {14, 23, 22},
+ {23, 7, 6}};
+
+static pin_fuse_columns pal14l8pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 11, 10},
+ {6, 13, 12},
+ {7, 15, 14},
+ {8, 17, 16},
+ {9, 19, 18},
+ {10, 21, 20},
+ {11, 25, 24},
+ {13, 27, 26},
+ {14, 23, 22},
+ {23, 7, 6}};
+
+static pin_fuse_columns pal16h6pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 15, 14},
+ {7, 17, 16},
+ {8, 19, 18},
+ {9, 21, 20},
+ {10, 25, 24},
+ {11, 29, 28},
+ {13, 31, 30},
+ {14, 27, 26},
+ {15, 23, 22},
+ {22, 11, 10},
+ {23, 7, 6}};
+
+static pin_fuse_columns pal16l6pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 15, 14},
+ {7, 17, 16},
+ {8, 19, 18},
+ {9, 21, 20},
+ {10, 25, 24},
+ {11, 29, 28},
+ {13, 31, 30},
+ {14, 27, 26},
+ {15, 23, 22},
+ {22, 11, 10},
+ {23, 7, 6}};
+
+static pin_fuse_columns pal18h4pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 19, 18},
+ {8, 21, 20},
+ {9, 25, 24},
+ {10, 29, 28},
+ {11, 33, 32},
+ {13, 35, 34},
+ {14, 31, 30},
+ {15, 27, 26},
+ {16, 23, 22},
+ {21, 15, 14},
+ {22, 11, 10},
+ {23, 7, 6}};
+
+static pin_fuse_columns pal18l4pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 19, 18},
+ {8, 21, 20},
+ {9, 25, 24},
+ {10, 29, 28},
+ {11, 33, 32},
+ {13, 35, 34},
+ {14, 31, 30},
+ {15, 27, 26},
+ {16, 23, 22},
+ {21, 15, 14},
+ {22, 11, 10},
+ {23, 7, 6}};
+
+static pin_fuse_columns pal20c1pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {10, 33, 32},
+ {11, 37, 36},
+ {13, 39, 38},
+ {14, 35, 34},
+ {15, 31, 30},
+ {16, 27, 26},
+ {17, 23, 22},
+ {20, 19, 18},
+ {21, 15, 14},
+ {22, 11, 10},
+ {23, 7, 6}};
+
+static pin_fuse_columns pal20l2pinfusecolumns[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {10, 33, 32},
+ {11, 37, 36},
+ {13, 39, 38},
+ {14, 35, 34},
+ {15, 31, 30},
+ {16, 27, 26},
+ {17, 23, 22},
+ {20, 19, 18},
+ {21, 15, 14},
+ {22, 11, 10},
+ {23, 7, 6}};
+
static pal_data paldata[] = {
- {"PAL10L8",
+ {"PAL10L8", 320,
pal10l8pinfuserows, ARRAY_LEN(pal10l8pinfuserows),
pal10l8pinfusecolumns, ARRAY_LEN(pal10l8pinfusecolumns),
print_pal10l8_product_terms,
config_pal10l8_pins,
NULL,
NULL},
- {"PAL10H8",
+ {"PAL10H8", 320,
pal10h8pinfuserows, ARRAY_LEN(pal10h8pinfuserows),
pal10h8pinfusecolumns, ARRAY_LEN(pal10h8pinfusecolumns),
print_pal10h8_product_terms,
config_pal10h8_pins,
NULL,
NULL},
- {"PAL12H6",
+ {"PAL12H6", 384,
pal12h6pinfuserows, ARRAY_LEN(pal12h6pinfuserows),
pal12h6pinfusecolumns, ARRAY_LEN(pal12h6pinfusecolumns),
print_pal12h6_product_terms,
config_pal12h6_pins,
NULL,
NULL},
- {"PAL14H4",
+ {"PAL14H4", 448,
pal14h4pinfuserows, ARRAY_LEN(pal14h4pinfuserows),
pal14h4pinfusecolumns, ARRAY_LEN(pal14h4pinfusecolumns),
print_pal14h4_product_terms,
config_pal14h4_pins,
NULL,
NULL},
- {"PAL16H2",
+ {"PAL16H2", 512,
pal16h2pinfuserows, ARRAY_LEN(pal16h2pinfuserows),
pal16h2pinfusecolumns, ARRAY_LEN(pal16h2pinfusecolumns),
print_pal16h2_product_terms,
config_pal16h2_pins,
NULL,
NULL},
- {"PAL16C1",
+ {"PAL16C1", 512,
pal16c1pinfuserows, ARRAY_LEN(pal16c1pinfuserows),
pal16c1pinfusecolumns, ARRAY_LEN(pal16c1pinfusecolumns),
print_pal16c1_product_terms,
config_pal16c1_pins,
NULL,
NULL},
- {"PAL12L6",
+ {"PAL12L6", 384,
pal12l6pinfuserows, ARRAY_LEN(pal12l6pinfuserows),
pal12l6pinfusecolumns, ARRAY_LEN(pal12l6pinfusecolumns),
print_pal12l6_product_terms,
config_pal12l6_pins,
NULL,
NULL},
- {"PAL14L4",
+ {"PAL14L4", 448,
pal14l4pinfuserows, ARRAY_LEN(pal14l4pinfuserows),
pal14l4pinfusecolumns, ARRAY_LEN(pal14l4pinfusecolumns),
print_pal14l4_product_terms,
config_pal14l4_pins,
NULL,
NULL},
- {"PAL16L2",
+ {"PAL16L2", 512,
pal16l2pinfuserows, ARRAY_LEN(pal16l2pinfuserows),
pal16l2pinfusecolumns, ARRAY_LEN(pal16l2pinfusecolumns),
print_pal16l2_product_terms,
config_pal16l2_pins,
NULL,
NULL},
- /*{"15S8", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
- {"PAL16L8",
+ /*{"15S8", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
+ {"PAL16L8", 2048,
pal16l8pinfuserows, ARRAY_LEN(pal16l8pinfuserows),
pal16l8pinfusecolumns, ARRAY_LEN(pal16l8pinfusecolumns),
print_pal16l8_product_terms,
config_pal16l8_pins,
NULL,
NULL},
- {"PAL16R4",
+ {"PAL16R4", 2048,
pal16r4pinfuserows, ARRAY_LEN(pal16r4pinfuserows),
pal16r4pinfusecolumns, ARRAY_LEN(pal16r4pinfusecolumns),
print_pal16r4_product_terms,
config_pal16r4_pins,
NULL,
NULL},
- {"PAL16R6",
+ {"PAL16R6", 2048,
pal16r6pinfuserows, ARRAY_LEN(pal16r6pinfuserows),
pal16r6pinfusecolumns, ARRAY_LEN(pal16r6pinfusecolumns),
print_pal16r6_product_terms,
config_pal16r6_pins,
NULL,
NULL},
- {"PAL16R8",
+ {"PAL16R8", 2048,
pal16r8pinfuserows, ARRAY_LEN(pal16r8pinfuserows),
pal16r8pinfusecolumns, ARRAY_LEN(pal16r8pinfusecolumns),
print_pal16r8_product_terms,
config_pal16r8_pins,
NULL,
NULL},
- /*{"PAL16RA8", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
- {"PAL16V8R", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
- {"PALCE16V8",
+ /*{"PAL16RA8", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
+ {"PAL16V8R", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
+ {"PALCE16V8", 2194,
palce16v8pinfuserows, ARRAY_LEN(palce16v8pinfuserows),
palce16v8pinfusecolumns, ARRAY_LEN(palce16v8pinfusecolumns),
print_palce16v8_product_terms,
config_palce16v8_pins,
NULL,
NULL},
- {"GAL16V8",
+ {"GAL16V8", 2194,
gal16v8pinfuserows, ARRAY_LEN(gal16v8pinfuserows),
gal16v8pinfusecolumns, ARRAY_LEN(gal16v8pinfusecolumns),
print_gal16v8_product_terms,
config_gal16v8_pins,
is_gal16v8_product_term_enabled,
NULL},
- {"18CV8",
+ {"18CV8", 2696,
peel18cv8pinfuserows, ARRAY_LEN(peel18cv8pinfuserows),
peel18cv8pinfusecolumns, ARRAY_LEN(peel18cv8pinfusecolumns),
print_peel18cv8_product_terms,
config_peel18cv8_pins,
NULL,
get_peel18cv8_pin_fuse_state},
- {"GAL18V10",
+ {"GAL18V10", 3540,
gal18v10pinfuserows, ARRAY_LEN(gal18v10pinfuserows),
gal18v10pinfusecolumns, ARRAY_LEN(gal18v10pinfusecolumns),
print_gal18v10_product_terms,
config_gal18v10_pins,
NULL,
NULL},
- {"PAL20L8",
+ {"PAL20L8", 2560,
pal20l8pinfuserows, ARRAY_LEN(pal20l8pinfuserows),
pal20l8pinfusecolumns, ARRAY_LEN(pal20l8pinfusecolumns),
print_pal20l8_product_terms,
config_pal20l8_pins,
NULL,
NULL},
- {"PAL20L10",
+ {"PAL20L10", 1600,
pal20l10pinfuserows, ARRAY_LEN(pal20l10pinfuserows),
pal20l10pinfusecolumns, ARRAY_LEN(pal20l10pinfusecolumns),
print_pal20l10_product_terms,
config_pal20l10_pins,
NULL,
NULL},
- {"PAL20R4",
+ {"PAL20R4", 2560,
pal20r4pinfuserows, ARRAY_LEN(pal20r4pinfuserows),
pal20r4pinfusecolumns, ARRAY_LEN(pal20r4pinfusecolumns),
print_pal20r4_product_terms,
config_pal20r4_pins,
NULL,
NULL},
- {"PAL20R6",
+ {"PAL20R6", 2560,
pal20r6pinfuserows, ARRAY_LEN(pal20r6pinfuserows),
pal20r6pinfusecolumns, ARRAY_LEN(pal20r6pinfusecolumns),
print_pal20r6_product_terms,
config_pal20r6_pins,
NULL,
NULL},
- {"PAL20R8",
+ {"PAL20R8", 2560,
pal20r8pinfuserows, ARRAY_LEN(pal20r8pinfuserows),
pal20r8pinfusecolumns, ARRAY_LEN(pal20r8pinfusecolumns),
print_pal20r8_product_terms,
config_pal20r8_pins,
NULL,
NULL},
- {"PAL20X4",
+ {"PAL20X4", 1600,
pal20x4pinfuserows, ARRAY_LEN(pal20x4pinfuserows),
pal20x4pinfusecolumns, ARRAY_LEN(pal20x4pinfusecolumns),
print_pal20x4_product_terms,
config_pal20x4_pins,
NULL,
NULL},
- {"PAL20X8",
+ {"PAL20X8", 1600,
pal20x8pinfuserows, ARRAY_LEN(pal20x8pinfuserows),
pal20x8pinfusecolumns, ARRAY_LEN(pal20x8pinfusecolumns),
print_pal20x8_product_terms,
config_pal20x8_pins,
NULL,
NULL},
- {"PAL20X10",
+ {"PAL20X10", 1600,
pal20x10pinfuserows, ARRAY_LEN(pal20x10pinfuserows),
pal20x10pinfusecolumns, ARRAY_LEN(pal20x10pinfusecolumns),
print_pal20x10_product_terms,
config_pal20x10_pins,
NULL,
NULL},
- /*{"PAL22V10", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
- {"GAL20V8A", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
- {"GAL22V10", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
- {"PLS100", NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
- {"82S153",
+ /*{"PAL22V10", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
+ {"GAL20V8A", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
+ {"GAL22V10", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
+ {"PLS100", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
+ {"82S153", 1842,
_82s153_pls153pinfuserows, ARRAY_LEN(_82s153_pls153pinfuserows),
_82s153_pls153pinfusecolumns, ARRAY_LEN(_82s153_pls153pinfusecolumns),
print_82s153_pls153_product_terms,
config_82s153_pls153_pins,
NULL,
NULL},
- {"PLS153",
+ {"PLS153", 1842,
_82s153_pls153pinfuserows, ARRAY_LEN(_82s153_pls153pinfuserows),
_82s153_pls153pinfusecolumns, ARRAY_LEN(_82s153_pls153pinfusecolumns),
print_82s153_pls153_product_terms,
config_82s153_pls153_pins,
NULL,
NULL},
- {"CK2605",
+ {"CK2605", 1106,
ck2605pinfuserows, ARRAY_LEN(ck2605pinfuserows),
ck2605pinfusecolumns, ARRAY_LEN(ck2605pinfusecolumns),
print_ck2605_product_terms,
config_ck2605_pins,
NULL,
- NULL}};
-
-
+ NULL},
+#if defined(ricoh_pals)
+ {"EPL10P8", 664,
+ epl10p8pinfuserows, ARRAY_LEN(epl10p8pinfuserows),
+ epl10p8pinfusecolumns, ARRAY_LEN(epl10p8pinfusecolumns),
+ print_epl10p8_product_terms,
+ config_epl10p8_pins,
+ NULL,
+ NULL},
+ {"EPL12P6", 786,
+ epl12p6pinfuserows, ARRAY_LEN(epl12p6pinfuserows),
+ epl12p6pinfusecolumns, ARRAY_LEN(epl12p6pinfusecolumns),
+ print_epl12p6_product_terms,
+ config_epl12p6_pins,
+ NULL,
+ NULL},
+ {"EPL14P4", 908,
+ epl14p4pinfuserows, ARRAY_LEN(epl14p4pinfuserows),
+ epl14p4pinfusecolumns, ARRAY_LEN(epl14p4pinfusecolumns),
+ print_epl14p4_product_terms,
+ config_epl14p4_pins,
+ NULL,
+ NULL},
+ {"EPL16P2", 1030,
+ epl16p2pinfuserows, ARRAY_LEN(epl16p2pinfuserows),
+ epl16p2pinfusecolumns, ARRAY_LEN(epl16p2pinfusecolumns),
+ print_epl16p2_product_terms,
+ config_epl16p2_pins,
+ NULL,
+ NULL},
+ {"EPL16P8", 2072,
+ epl16p8pinfuserows, ARRAY_LEN(epl16p8pinfuserows),
+ epl16p8pinfusecolumns, ARRAY_LEN(epl16p8pinfusecolumns),
+ print_epl16p8_product_terms,
+ config_epl16p8_pins,
+ NULL,
+ NULL},
+ {"EPL16RP8", 2072,
+ epl16rp8pinfuserows, ARRAY_LEN(epl16rp8pinfuserows),
+ epl16rp8pinfusecolumns, ARRAY_LEN(epl16rp8pinfusecolumns),
+ print_epl16rp8_product_terms,
+ config_epl16rp8_pins,
+ NULL,
+ NULL},
+ {"EPL16RP6", 2072,
+ epl16rp6pinfuserows, ARRAY_LEN(epl16rp6pinfuserows),
+ epl16rp6pinfusecolumns, ARRAY_LEN(epl16rp6pinfusecolumns),
+ print_epl16rp6_product_terms,
+ config_epl16rp6_pins,
+ NULL,
+ NULL},
+ {"EPL16RP4", 2072,
+ epl16rp4pinfuserows, ARRAY_LEN(epl16rp4pinfuserows),
+ epl16rp4pinfusecolumns, ARRAY_LEN(epl16rp4pinfusecolumns),
+ print_epl16rp4_product_terms,
+ config_epl16rp4_pins,
+ NULL,
+ NULL},
+#endif
+ {"PAL10P8", 328,
+ pal10p8pinfuserows, ARRAY_LEN(pal10p8pinfuserows),
+ pal10p8pinfusecolumns, ARRAY_LEN(pal10p8pinfusecolumns),
+ print_pal10p8_product_terms,
+ config_pal10p8_pins,
+ NULL,
+ NULL},
+ {"PAL12P6", 390,
+ pal12p6pinfuserows, ARRAY_LEN(pal12p6pinfuserows),
+ pal12p6pinfusecolumns, ARRAY_LEN(pal12p6pinfusecolumns),
+ print_pal12p6_product_terms,
+ config_pal12p6_pins,
+ NULL,
+ NULL},
+ {"PAL14P4", 452,
+ pal14p4pinfuserows, ARRAY_LEN(pal14p4pinfuserows),
+ pal14p4pinfusecolumns, ARRAY_LEN(pal14p4pinfusecolumns),
+ print_pal14p4_product_terms,
+ config_pal14p4_pins,
+ NULL,
+ NULL},
+ {"PAL16P2", 514,
+ pal16p2pinfuserows, ARRAY_LEN(pal16p2pinfuserows),
+ pal16p2pinfusecolumns, ARRAY_LEN(pal16p2pinfusecolumns),
+ print_pal16p2_product_terms,
+ config_pal16p2_pins,
+ NULL,
+ NULL},
+ {"PAL16P8", 2056,
+ pal16p8pinfuserows, ARRAY_LEN(pal16p8pinfuserows),
+ pal16p8pinfusecolumns, ARRAY_LEN(pal16p8pinfusecolumns),
+ print_pal16p8_product_terms,
+ config_pal16p8_pins,
+ NULL,
+ NULL},
+ {"PAL16RP4", 2056,
+ pal16rp4pinfuserows, ARRAY_LEN(pal16rp4pinfuserows),
+ pal16rp4pinfusecolumns, ARRAY_LEN(pal16rp4pinfusecolumns),
+ print_pal16rp4_product_terms,
+ config_pal16rp4_pins,
+ NULL,
+ NULL},
+ {"PAL16RP6", 2056,
+ pal16rp6pinfuserows, ARRAY_LEN(pal16rp6pinfuserows),
+ pal16rp6pinfusecolumns, ARRAY_LEN(pal16rp6pinfusecolumns),
+ print_pal16rp6_product_terms,
+ config_pal16rp6_pins,
+ NULL,
+ NULL},
+ {"PAL16RP8", 2056,
+ pal16rp8pinfuserows, ARRAY_LEN(pal16rp8pinfuserows),
+ pal16rp8pinfusecolumns, ARRAY_LEN(pal16rp8pinfusecolumns),
+ print_pal16rp8_product_terms,
+ config_pal16rp8_pins,
+ NULL,
+ NULL},
+ {"PAL6L16", 192,
+ pal6l16pinfuserows, ARRAY_LEN(pal6l16pinfuserows),
+ pal6l16pinfusecolumns, ARRAY_LEN(pal6l16pinfusecolumns),
+ print_pal6l16_product_terms,
+ config_pal6l16_pins,
+ NULL,
+ NULL},
+ {"PAL8L14", 224,
+ pal8l14pinfuserows, ARRAY_LEN(pal8l14pinfuserows),
+ pal8l14pinfusecolumns, ARRAY_LEN(pal8l14pinfusecolumns),
+ print_pal8l14_product_terms,
+ config_pal8l14_pins,
+ NULL,
+ NULL},
+ {"PAL12H10", 480,
+ pal12h10pinfuserows, ARRAY_LEN(pal12h10pinfuserows),
+ pal12h10pinfusecolumns, ARRAY_LEN(pal12h10pinfusecolumns),
+ print_pal12h10_product_terms,
+ config_pal12h10_pins,
+ NULL,
+ NULL},
+ {"PAL12L10", 480,
+ pal12l10pinfuserows, ARRAY_LEN(pal12l10pinfuserows),
+ pal12l10pinfusecolumns, ARRAY_LEN(pal12l10pinfusecolumns),
+ print_pal12l10_product_terms,
+ config_pal12l10_pins,
+ NULL,
+ NULL},
+ {"PAL14H8", 560,
+ pal14h8pinfuserows, ARRAY_LEN(pal14h8pinfuserows),
+ pal14h8pinfusecolumns, ARRAY_LEN(pal14h8pinfusecolumns),
+ print_pal14h8_product_terms,
+ config_pal14h8_pins,
+ NULL,
+ NULL},
+ {"PAL14L8", 560,
+ pal14l8pinfuserows, ARRAY_LEN(pal14l8pinfuserows),
+ pal14l8pinfusecolumns, ARRAY_LEN(pal14l8pinfusecolumns),
+ print_pal14l8_product_terms,
+ config_pal14l8_pins,
+ NULL,
+ NULL},
+ {"PAL16H6", 640,
+ pal16h6pinfuserows, ARRAY_LEN(pal16h6pinfuserows),
+ pal16h6pinfusecolumns, ARRAY_LEN(pal16h6pinfusecolumns),
+ print_pal16h6_product_terms,
+ config_pal16h6_pins,
+ NULL,
+ NULL},
+ {"PAL16L6", 640,
+ pal16l6pinfuserows, ARRAY_LEN(pal16l6pinfuserows),
+ pal16l6pinfusecolumns, ARRAY_LEN(pal16l6pinfusecolumns),
+ print_pal16l6_product_terms,
+ config_pal16l6_pins,
+ NULL,
+ NULL},
+ {"PAL18H4", 720,
+ pal18h4pinfuserows, ARRAY_LEN(pal18h4pinfuserows),
+ pal18h4pinfusecolumns, ARRAY_LEN(pal18h4pinfusecolumns),
+ print_pal18h4_product_terms,
+ config_pal18h4_pins,
+ NULL,
+ NULL},
+ {"PAL18L4", 720,
+ pal18l4pinfuserows, ARRAY_LEN(pal18l4pinfuserows),
+ pal18l4pinfusecolumns, ARRAY_LEN(pal18l4pinfusecolumns),
+ print_pal18l4_product_terms,
+ config_pal18l4_pins,
+ NULL,
+ NULL},
+ {"PAL20C1", 640,
+ pal20c1pinfuserows, ARRAY_LEN(pal20c1pinfuserows),
+ pal20c1pinfusecolumns, ARRAY_LEN(pal20c1pinfusecolumns),
+ print_pal20c1_product_terms,
+ config_pal20c1_pins,
+ NULL,
+ NULL},
+ {"PAL20L2", 640,
+ pal20l2pinfuserows, ARRAY_LEN(pal20l2pinfuserows),
+ pal20l2pinfusecolumns, ARRAY_LEN(pal20l2pinfusecolumns),
+ print_pal20l2_product_terms,
+ config_pal20l2_pins,
+ NULL,
+ NULL}};
/***************************************************************************
CORE IMPLEMENTATION
@@ -1612,12 +2632,12 @@ static void generate_product_terms(const pal_data* pal, const jed_data* jed, UIN
{
if (haveterm)
{
- strcat(buffer, " & ");
+ strcat(buffer, " " AND_SYMBOL " ");
}
if (!is_output_pin(pin))
{
- sprintf(tmpbuffer, "/i%d", pin);
+ sprintf(tmpbuffer, LOW_SYMBOL INPUT_SYMBOL "%d", pin);
strcat(buffer, tmpbuffer);
}
else
@@ -1628,11 +2648,11 @@ static void generate_product_terms(const pal_data* pal, const jed_data* jed, UIN
{
if (flags & OUTPUT_COMBINATORIAL)
{
- sprintf(tmpbuffer, "/o%d", pin);
+ sprintf(tmpbuffer, LOW_SYMBOL OUTPUT_SYMBOL "%d", pin);
}
else if (flags & OUTPUT_REGISTERED)
{
- sprintf(tmpbuffer, "/rfo%d", pin);
+ sprintf(tmpbuffer, LOW_SYMBOL REGISTERED_FEEDBACK_OUTPUT_SYMBOL "%d", pin);
}
else
{
@@ -1643,11 +2663,11 @@ static void generate_product_terms(const pal_data* pal, const jed_data* jed, UIN
}
else if (flags & OUTPUT_FEEDBACK_COMBINATORIAL)
{
- sprintf(tmpbuffer, "/of%d", pin);
+ sprintf(tmpbuffer, LOW_SYMBOL OUTPUT_FEEDBACK_SYMBOL "%d", pin);
}
else if (flags & OUTPUT_FEEDBACK_REGISTERED)
{
- sprintf(tmpbuffer, "/rf%d", pin);
+ sprintf(tmpbuffer, LOW_SYMBOL REGISTERED_FEEDBACK_SYMBOL "%d", pin);
}
else
{
@@ -1666,12 +2686,12 @@ static void generate_product_terms(const pal_data* pal, const jed_data* jed, UIN
{
if (haveterm)
{
- strcat(buffer, " & ");
+ strcat(buffer, " " AND_SYMBOL " ");
}
if (!is_output_pin(pin))
{
- sprintf(tmpbuffer, "i%d", pin);
+ sprintf(tmpbuffer, INPUT_SYMBOL "%d", pin);
strcat(buffer, tmpbuffer);
}
else
@@ -1682,11 +2702,11 @@ static void generate_product_terms(const pal_data* pal, const jed_data* jed, UIN
{
if (flags & OUTPUT_COMBINATORIAL)
{
- sprintf(tmpbuffer, "o%d", pin);
+ sprintf(tmpbuffer, OUTPUT_SYMBOL "%d", pin);
}
else if (flags & OUTPUT_REGISTERED)
{
- sprintf(tmpbuffer, "rfo%d", pin);
+ sprintf(tmpbuffer, REGISTERED_FEEDBACK_OUTPUT_SYMBOL "%d", pin);
}
else
{
@@ -1697,11 +2717,11 @@ static void generate_product_terms(const pal_data* pal, const jed_data* jed, UIN
}
else if (flags & OUTPUT_FEEDBACK_COMBINATORIAL)
{
- sprintf(tmpbuffer, "of%d", pin);
+ sprintf(tmpbuffer, OUTPUT_FEEDBACK_SYMBOL "%d", pin);
}
else if (flags & OUTPUT_FEEDBACK_REGISTERED)
{
- sprintf(tmpbuffer, "rf%d", pin);
+ sprintf(tmpbuffer, REGISTERED_FEEDBACK_SYMBOL "%d", pin);
}
else
{
@@ -1843,18 +2863,18 @@ static void print_product_terms(const pal_data* pal, const jed_data* jed)
if (flags & OUTPUT_ACTIVELOW)
{
- printf("/");
+ printf(LOW_SYMBOL);
- ++indent;
+ indent += strlen(LOW_SYMBOL);
}
if (flags & OUTPUT_COMBINATORIAL)
{
- sprintf(buffer, "o%d = ", outputpins[index].pin);
+ sprintf(buffer, OUTPUT_SYMBOL "%d " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
}
else if (flags & OUTPUT_REGISTERED)
{
- sprintf(buffer, "rf%d := ", outputpins[index].pin);
+ sprintf(buffer, REGISTERED_FEEDBACK_SYMBOL "%d " REGISTERED_ASSIGNMENT " ", outputpins[index].pin);
}
else
{
@@ -1886,7 +2906,7 @@ static void print_product_terms(const pal_data* pal, const jed_data* jed)
{
if (haveterms)
{
- printf(" +\n");
+ printf(" " OR_SYMBOL "\n");
for (indentindex = 0; indentindex < indent; ++indentindex)
{
@@ -1908,7 +2928,7 @@ static void print_product_terms(const pal_data* pal, const jed_data* jed)
if (flags & OUTPUT_COMBINATORIAL)
{
- printf("o%d.oe = ", outputpins[index].pin);
+ printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
if (fuse_rows->fuserowoutputenable == NO_OUTPUT_ENABLE_FUSE_ROW ||
all_fuses_in_row_blown(pal, jed, fuse_rows->fuserowoutputenable))
@@ -1924,7 +2944,7 @@ static void print_product_terms(const pal_data* pal, const jed_data* jed)
}
else if (flags & OUTPUT_REGISTERED)
{
- printf("rf%d.oe = ", outputpins[index].pin);
+ printf(REGISTERED_FEEDBACK_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
if (fuse_rows->fuserowoutputenable == NO_OUTPUT_ENABLE_FUSE_ROW)
{
@@ -1949,6 +2969,232 @@ static void print_product_terms(const pal_data* pal, const jed_data* jed)
/*-------------------------------------------------
+ config_palce16v8_pin_as_7_product_terms_and_oe_term - configures
+ the fuse rows of a PALCE16V8 pin with seven
+ product terms and one output enable product term.
+-------------------------------------------------*/
+
+static void config_palce16v8_pin_as_7_product_terms_and_oe_term(UINT16 pin)
+{
+ static pin_fuse_rows pinfuserows[] = {
+ {12, 1792, 1824, 2016},
+ {13, 1536, 1568, 1760},
+ {14, 1280, 1312, 1504},
+ {15, 1024, 1056, 1248},
+ {16, 768, 800, 992},
+ {17, 512, 544, 736},
+ {18, 256, 288, 480},
+ {19, 0, 32, 224}};
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(pinfuserows); ++index)
+ {
+ if (pinfuserows[index].pin == pin)
+ {
+ palce16v8pinfuserows[index].fuserowoutputenable = pinfuserows[index].fuserowoutputenable;
+ palce16v8pinfuserows[index].fuserowtermstart = pinfuserows[index].fuserowtermstart;
+ palce16v8pinfuserows[index].fuserowtermend = pinfuserows[index].fuserowtermend;
+
+ break;
+ }
+ }
+}
+
+
+
+/*-------------------------------------------------
+ config_palce16v8_pin_as_8_product_terms - configures
+ the fuse rows of a PALCE16V8 pin with eight
+ product terms and no output enable product term.
+-------------------------------------------------*/
+
+static void config_palce16v8_pin_as_8_product_terms(UINT16 pin)
+{
+ static pin_fuse_rows pinfuserows[] = {
+ {12, NO_OUTPUT_ENABLE_FUSE_ROW, 1792, 2016},
+ {13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760},
+ {14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504},
+ {15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248},
+ {16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},
+ {17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},
+ {18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},
+ {19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(pinfuserows); ++index)
+ {
+ if (pinfuserows[index].pin == pin)
+ {
+ palce16v8pinfuserows[index].fuserowoutputenable = pinfuserows[index].fuserowoutputenable;
+ palce16v8pinfuserows[index].fuserowtermstart = pinfuserows[index].fuserowtermstart;
+ palce16v8pinfuserows[index].fuserowtermend = pinfuserows[index].fuserowtermend;
+
+ break;
+ }
+ }
+}
+
+
+
+/*-------------------------------------------------
+ print_pal20xxx_product_terms - prints the product
+ terms for a PAL20X4, PAL20X8 and PAL20X10
+-------------------------------------------------*/
+
+static void print_pal20xxx_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ UINT16 index, columncount, flags, row, haveterms, tmpindex;
+ char buffer[200];
+ int indent, indentindex, rowhasterms[4];
+ const pin_fuse_rows* fuse_rows;
+
+ columncount = calc_fuse_column_count(pal);
+
+ print_input_pins();
+ print_output_pins();
+
+ printf("Equations:\n\n");
+
+ for (index = 0; index < outputpinscount; ++index)
+ {
+ flags = outputpins[index].flags;
+
+ indent = 0;
+
+ if (flags & OUTPUT_COMBINATORIAL)
+ {
+ sprintf(buffer, LOW_SYMBOL OUTPUT_SYMBOL "%d " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
+
+ printf("%s", buffer);
+
+ haveterms = 0;
+ indent += strlen(buffer);
+
+ fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
+
+ for (row = fuse_rows->fuserowtermstart; row <= fuse_rows->fuserowtermend;
+ row += columncount)
+ {
+ generate_product_terms(pal, jed, row, buffer);
+
+ if (strlen(buffer) > 0)
+ {
+ if (haveterms)
+ {
+ printf(" ");
+ printf(OR_SYMBOL);
+ printf("\n");
+
+ for (indentindex = 0; indentindex < indent; ++indentindex)
+ {
+ printf(" ");
+ }
+ }
+ else
+ {
+ haveterms = 1;
+ }
+
+ printf("%s", buffer);
+ }
+ }
+
+ printf("\n");
+
+ /* output enable equation */
+
+ printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
+
+ if (all_fuses_in_row_blown(pal, jed, fuse_rows->fuserowoutputenable))
+ {
+ printf("vcc\n");
+ }
+ else
+ {
+ generate_product_terms(pal, jed, fuse_rows->fuserowoutputenable, buffer);
+
+ printf("%s\n", buffer);
+ }
+ }
+ else if (flags & OUTPUT_REGISTERED)
+ {
+ sprintf(buffer, LOW_SYMBOL REGISTERED_FEEDBACK_SYMBOL "%d " REGISTERED_ASSIGNMENT " ", outputpins[index].pin);
+
+ printf("%s", buffer);
+
+ haveterms = 0;
+ indent += strlen(buffer);
+
+ fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
+ tmpindex = 0;
+
+ memset(rowhasterms, 0, sizeof(rowhasterms));
+
+ for (row = fuse_rows->fuserowtermstart; row <= fuse_rows->fuserowtermend;
+ row += columncount)
+ {
+ generate_product_terms(pal, jed, row, buffer);
+
+ if (strlen(buffer) > 0)
+ {
+ rowhasterms[tmpindex] = 1;
+
+ if (haveterms)
+ {
+ if (tmpindex == 1)
+ {
+ printf(" " OR_SYMBOL "\n");
+ }
+ else if (tmpindex == 2)
+ {
+ printf(" " XOR_SYMBOL "\n");
+ }
+ else if (tmpindex == 3)
+ {
+ if (rowhasterms[2])
+ {
+ printf(" " OR_SYMBOL "\n");
+ }
+ else
+ {
+ printf(" " XOR_SYMBOL "\n");
+ }
+ }
+
+ for (indentindex = 0; indentindex < indent; ++indentindex)
+ {
+ printf(" ");
+ }
+ }
+ else
+ {
+ haveterms = 1;
+ }
+
+ printf("%s", buffer);
+ }
+
+ ++tmpindex;
+ }
+
+ printf("\n");
+
+ /* output enable equation */
+
+ printf(REGISTERED_FEEDBACK_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " OE\n", outputpins[index].pin);
+ }
+ else
+ {
+ fprintf(stderr, "Unknown output type for pin %d!\n", outputpins[index].pin);
+ }
+
+ printf("\n");
+ }
+}
+
+
+
+/*-------------------------------------------------
print_pal10l8_product_terms - prints the product
terms for a PAL10L8
-------------------------------------------------*/
@@ -2111,9 +3357,7 @@ static void print_pal16r8_product_terms(const pal_data* pal, const jed_data* jed
static void print_palce16v8_product_terms(const pal_data* pal, const jed_data* jed)
{
- fprintf(stderr, "Printing product terms for PALCE16V8 not supported!\n");
-
- /*print_product_terms(pal, jed);*/
+ print_product_terms(pal, jed);
}
@@ -2269,7 +3513,7 @@ static void print_pal20r8_product_terms(const pal_data* pal, const jed_data* jed
static void print_pal20x4_product_terms(const pal_data* pal, const jed_data* jed)
{
- print_product_terms(pal, jed);
+ print_pal20xxx_product_terms(pal, jed);
}
@@ -2281,7 +3525,7 @@ static void print_pal20x4_product_terms(const pal_data* pal, const jed_data* jed
static void print_pal20x8_product_terms(const pal_data* pal, const jed_data* jed)
{
- print_product_terms(pal, jed);
+ print_pal20xxx_product_terms(pal, jed);
}
@@ -2293,7 +3537,7 @@ static void print_pal20x8_product_terms(const pal_data* pal, const jed_data* jed
static void print_pal20x10_product_terms(const pal_data* pal, const jed_data* jed)
{
- print_product_terms(pal, jed);
+ print_pal20xxx_product_terms(pal, jed);
}
@@ -2325,12 +3569,12 @@ static void print_82s153_pls153_product_terms(const pal_data* pal, const jed_dat
if (flags & OUTPUT_ACTIVELOW)
{
- printf("/");
+ printf(LOW_SYMBOL);
- ++indent;
+ indent += strlen(LOW_SYMBOL);
}
- sprintf(buffer, "o%d = ", outputpins[index].pin);
+ sprintf(buffer, OUTPUT_SYMBOL "%d " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
printf("%s", buffer);
@@ -2359,7 +3603,7 @@ static void print_82s153_pls153_product_terms(const pal_data* pal, const jed_dat
{
if (haveterms)
{
- printf(" +\n");
+ printf(" " OR_SYMBOL "\n");
for (indentindex = 0; indentindex < indent; ++indentindex)
{
@@ -2382,7 +3626,7 @@ static void print_82s153_pls153_product_terms(const pal_data* pal, const jed_dat
/* output enable equations */
- printf("o%d.oe = ", outputpins[index].pin);
+ printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
if (all_fuses_in_row_blown(pal, jed, fuse_rows->fuserowoutputenable))
{
@@ -2428,12 +3672,12 @@ static void print_ck2605_product_terms(const pal_data* pal, const jed_data* jed)
if (flags & OUTPUT_ACTIVELOW)
{
- printf("/");
+ printf(LOW_SYMBOL);
- ++indent;
+ indent += strlen(LOW_SYMBOL);
}
- sprintf(buffer, "o%d = ", outputpins[index].pin);
+ sprintf(buffer, OUTPUT_SYMBOL "%d " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
printf("%s", buffer);
@@ -2462,7 +3706,7 @@ static void print_ck2605_product_terms(const pal_data* pal, const jed_data* jed)
{
if (haveterms)
{
- printf(" +\n");
+ printf(" " OR_SYMBOL "\n");
for (indentindex = 0; indentindex < indent; ++indentindex)
{
@@ -2485,7 +3729,7 @@ static void print_ck2605_product_terms(const pal_data* pal, const jed_data* jed)
/* output enable equations */
- printf("o%d.oe = ", outputpins[index].pin);
+ printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
if (all_fuses_in_row_blown(pal, jed, fuse_rows->fuserowoutputenable))
{
@@ -2504,6 +3748,486 @@ static void print_ck2605_product_terms(const pal_data* pal, const jed_data* jed)
+#if defined(ricoh_pals)
+/*-------------------------------------------------
+ print_epl10p8_product_terms - prints the product
+ terms for a EPL10P8
+-------------------------------------------------*/
+
+static void print_epl10p8_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ typedef struct _memory_cell memory_cell;
+ struct _memory_cell
+ {
+ UINT16 pin;
+ UINT16 or_fuse; /* 0 - intact? */
+ UINT16 xor_fuse; /* 0 - intact? */
+ };
+
+ static memory_cell memory_cells[] = {
+ {12, 661, 662},
+ {13, 658, 659},
+ {14, 655, 656},
+ {15, 652, 653},
+ {16, 649, 650},
+ {17, 646, 647},
+ {18, 643, 644},
+ {19, 640, 641}};
+ UINT16 index, columncount, flags, haveterms, fuserow;
+ char buffer[200];
+ int indent, row, indentindex;
+ const pin_fuse_rows* fuse_rows;
+
+ printf("Warning: This is experimental support!\n");
+
+ columncount = calc_fuse_column_count(pal);
+
+ print_input_pins();
+ print_output_pins();
+
+ printf("Equations:\n\n");
+
+ for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
+ {
+ flags = outputpins[index].flags;
+
+ indent = 0;
+
+ if (flags & OUTPUT_ACTIVELOW)
+ {
+ printf(LOW_SYMBOL);
+
+ indent += strlen(LOW_SYMBOL);
+ }
+
+ sprintf(buffer, OUTPUT_SYMBOL "%d " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
+
+ printf("%s", buffer);
+
+ haveterms = 0;
+ indent += strlen(buffer);
+
+ fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
+
+ if (!jed_get_fuse(jed, memory_cells[index].or_fuse) ||
+ !jed_get_fuse(jed, memory_cells[index].xor_fuse))
+ {
+ /* MMI PAL pin compatible configuration */
+
+ fuserow = fuse_rows->fuserowtermstart;
+
+ for (row = 0; row < 2; ++row)
+ {
+ generate_product_terms(pal, jed, fuserow, buffer);
+
+ if (strlen(buffer) > 0)
+ {
+ if (haveterms)
+ {
+ printf(" " OR_SYMBOL "\n");
+
+ for (indentindex = 0; indentindex < indent; ++indentindex)
+ {
+ printf(" ");
+ }
+ }
+ else
+ {
+ haveterms = 1;
+ }
+
+ printf("%s", buffer);
+ }
+
+ fuserow += columncount;
+ }
+
+ printf("\n");
+
+ printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " vcc\n", outputpins[index].pin);
+
+ printf("\n");
+ }
+ else if (!jed_get_fuse(jed, memory_cells[index].or_fuse) ||
+ jed_get_fuse(jed, memory_cells[index].xor_fuse))
+ {
+ /* or configuration */
+
+ fuserow = fuse_rows->fuserowtermstart;
+
+ for (row = 0; row < 4; ++row)
+ {
+ generate_product_terms(pal, jed, fuserow, buffer);
+
+ if (strlen(buffer) > 0)
+ {
+ if (haveterms)
+ {
+ printf(" " OR_SYMBOL "\n");
+
+ for (indentindex = 0; indentindex < indent; ++indentindex)
+ {
+ printf(" ");
+ }
+ }
+ else
+ {
+ haveterms = 1;
+ }
+
+ printf("%s", buffer);
+ }
+
+ fuse_rows += columncount;
+ }
+
+ printf("\n");
+
+ printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " vcc\n", outputpins[index].pin);
+
+ printf("\n");
+ }
+ else if (jed_get_fuse(jed, memory_cells[index].or_fuse) ||
+ !jed_get_fuse(jed, memory_cells[index].xor_fuse))
+ {
+ /* xor configuration */
+ }
+ else
+ {
+ fprintf(stderr, "Unknown fuse configuration for pin %d!", memory_cells[index].pin);
+ }
+ }
+
+ printf("Warning: This is experimental support!\n");
+}
+
+
+
+/*-------------------------------------------------
+ print_epl12p6_product_terms - prints the product
+ terms for a EPL12P6
+-------------------------------------------------*/
+
+static void print_epl12p6_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ fprintf(stderr, "Printing product terms not supported for this device!\n");
+}
+
+
+
+/*-------------------------------------------------
+ print_epl14p4_product_terms - prints the product
+ terms for a EPL14P4
+-------------------------------------------------*/
+
+static void print_epl14p4_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ fprintf(stderr, "Printing product terms not supported for this device!\n");
+}
+
+
+
+/*-------------------------------------------------
+ print_epl16p2_product_terms - prints the product
+ terms for a EPL16P2
+-------------------------------------------------*/
+
+static void print_epl16p2_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ fprintf(stderr, "Printing product terms not supported for this device!\n");
+}
+
+
+
+/*-------------------------------------------------
+ print_epl16p8_product_terms - prints the product
+ terms for a EPL16P8
+-------------------------------------------------*/
+
+static void print_epl16p8_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ fprintf(stderr, "Printing product terms not supported for this device!\n");
+}
+
+
+
+/*-------------------------------------------------
+ print_epl16rp8_product_terms - prints the product
+ terms for a EPL16RP8
+-------------------------------------------------*/
+
+static void print_epl16rp8_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ fprintf(stderr, "Printing product terms not supported for this device!\n");
+}
+
+
+
+/*-------------------------------------------------
+ print_epl16rp6_product_terms - prints the product
+ terms for a EPL16RP6
+-------------------------------------------------*/
+
+static void print_epl16rp6_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ fprintf(stderr, "Printing product terms not supported for this device!\n");
+}
+
+
+
+/*-------------------------------------------------
+ print_epl16rp4_product_terms - prints the product
+ terms for a EPL16RP4
+-------------------------------------------------*/
+
+static void print_epl16rp4_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ fprintf(stderr, "Printing product terms not supported for this device!\n");
+}
+#endif
+
+
+
+/*-------------------------------------------------
+ print_pal10p8_product_terms - prints the product
+ terms for a PAL10P8
+-------------------------------------------------*/
+
+static void print_pal10p8_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_epl12p6_product_terms - prints the product
+ terms for a PAL12P6
+-------------------------------------------------*/
+
+static void print_pal12p6_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_epl14p4_product_terms - prints the product
+ terms for a PAL14P4
+-------------------------------------------------*/
+
+static void print_pal14p4_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_epl16p2_product_terms - prints the product
+ terms for a PAL16P2
+-------------------------------------------------*/
+
+static void print_pal16p2_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal16p8_product_terms - prints the product
+ terms for a PAL16P8
+-------------------------------------------------*/
+
+static void print_pal16p8_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal16rp4_product_terms - prints the product
+ terms for a PAL16RP4
+-------------------------------------------------*/
+
+static void print_pal16rp4_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal16rp6_product_terms - prints the product
+ terms for a PAL16RP6
+-------------------------------------------------*/
+
+static void print_pal16rp6_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal16rp8_product_terms - prints the product
+ terms for a PAL16RP8
+-------------------------------------------------*/
+
+static void print_pal16rp8_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal6l16_product_terms - prints the product
+ terms for a PAL6L16
+-------------------------------------------------*/
+
+static void print_pal6l16_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal8l14_product_terms - prints the product
+ terms for a PAL8L14
+-------------------------------------------------*/
+
+static void print_pal8l14_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal12h10_product_terms - prints the product
+ terms for a PAL12H10
+-------------------------------------------------*/
+
+static void print_pal12h10_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal12l10_product_terms - prints the product
+ terms for a PAL12L10
+-------------------------------------------------*/
+
+static void print_pal12l10_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal14h8_product_terms - prints the product
+ terms for a PAL14H8
+-------------------------------------------------*/
+
+static void print_pal14h8_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal14l8_product_terms - prints the product
+ terms for a PAL14L8
+-------------------------------------------------*/
+
+static void print_pal14l8_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal16h6_product_terms - prints the product
+ terms for a PAL16H6
+-------------------------------------------------*/
+
+static void print_pal16h6_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal16l6_product_terms - prints the product
+ terms for a PAL16L6
+-------------------------------------------------*/
+
+static void print_pal16l6_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal18h4_product_terms - prints the product
+ terms for a PAL18H4
+-------------------------------------------------*/
+
+static void print_pal18h4_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal18l4_product_terms - prints the product
+ terms for a PAL18L4
+-------------------------------------------------*/
+
+static void print_pal18l4_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal20lc1_product_terms - prints the product
+ terms for a PAL20LC1
+-------------------------------------------------*/
+
+static void print_pal20c1_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
+/*-------------------------------------------------
+ print_pal20l2_product_terms - prints the product
+ terms for a PAL20L2
+-------------------------------------------------*/
+
+static void print_pal20l2_product_terms(const pal_data* pal, const jed_data* jed)
+{
+ print_product_terms(pal, jed);
+}
+
+
+
/*-------------------------------------------------
config_pal10l8_pins - configures the pins for
a PAL10L8
@@ -2859,55 +4583,257 @@ static void config_palce16v8_pins(const pal_data* pal, const jed_data* jed)
struct _output_logic_macrocell
{
UINT16 pin;
- UINT16 sl0_fuse; /* registers allowed */
- UINT16 sl1_fuse; /* output polarity 0 - low, 1 - high */
+ UINT16 sl0_fuse; /* registers allowed (0 - registered, 1 - not registered) */
+ UINT16 sl1_fuse; /* output polarity (0 - low, 1 - high) */
+ UINT16 fuserowoutputenable;
};
static output_logic_macrocell macrocells[] = {
- {12, 2127, 2055},
- {13, 2126, 2054},
- {14, 2125, 2053},
- {15, 2124, 2052},
- {16, 2123, 2051},
- {17, 2122, 2050},
- {18, 2121, 2049},
- {19, 2120, 2048}};
- UINT16 sg0 = 2192; /* guessing on fuse here */
- UINT16 sg1 = 2193; /* guessing on fuse here */
- UINT16 index;
+ {12, 2127, 2055, 1792},
+ {13, 2126, 2054, 1536},
+ {14, 2125, 2053, 1280},
+ {15, 2124, 2052, 1024},
+ {16, 2123, 2051, 768},
+ {17, 2122, 2050, 512},
+ {18, 2121, 2049, 256},
+ {19, 2120, 2048, 0}};
+ static pin_fuse_columns pinfusecolumns_i_or_o[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {11, 31, 30},
+ {12, 27, 26},
+ {13, 23, 22},
+ {14, 19, 18},
+ {17, 15, 14},
+ {18, 11, 10},
+ {19, 7, 6}};
+ static pin_fuse_columns pinfusecolumns_io[] = {
+ {1, 3, 2},
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {11, 31, 30},
+ {13, 27, 26},
+ {14, 23, 22},
+ {15, 19, 18},
+ {16, 15, 14},
+ {17, 11, 10},
+ {18, 7, 6}};
+ static pin_fuse_columns pinfusecolumns_regs[] = {
+ {2, 1, 0},
+ {3, 5, 4},
+ {4, 9, 8},
+ {5, 13, 12},
+ {6, 17, 16},
+ {7, 21, 20},
+ {8, 25, 24},
+ {9, 29, 28},
+ {12, 31, 30},
+ {13, 27, 26},
+ {14, 23, 22},
+ {15, 19, 18},
+ {16, 15, 14},
+ {17, 11, 10},
+ {18, 7, 6},
+ {19, 3, 2}};
+ static UINT16 input_pins_i_or_o[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
+ static UINT16 input_pins_io[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
+ static UINT16 input_pins_regs[] = {2, 3, 4, 5, 6, 7, 8, 9};
+ static UINT16 sg0 = 2192;
+ static UINT16 sg1 = 2193;
+ UINT16 input_pins[18];
+ pin_output_config output_pins[ARRAY_LEN(macrocells)];
+ UINT16 index, input_pin_count, output_pin_count;
+
+ input_pin_count = 0;
+ output_pin_count = 0;
- for (index = 0; index < ARRAY_LEN(macrocells); ++index)
- {
- if (jed_get_fuse(jed, sg0))
- {
- /* Device uses no registers */
+ if (!jed_get_fuse(jed, sg0))
+ {
+ /* Device uses registers */
+
+ if (jed_get_fuse(jed, sg1))
+ {
+ memcpy(palce16v8pinfusecolumns, pinfusecolumns_regs, sizeof(pinfusecolumns_regs));
+
+ memcpy(input_pins, input_pins_regs, sizeof(input_pins_regs));
- if (jed_get_fuse(jed, sg1))
- {
- /* Combinatorial I/O */
- }
- else
- {
- /* Combinatorial Output or Input */
- }
- }
- else
- {
- /* Device uses registers */
+ input_pin_count = ARRAY_LEN(input_pins_regs);
+
+ for (index = 0; index < ARRAY_LEN(macrocells); ++index)
+ {
+ if (!jed_get_fuse(jed, macrocells[index].sl0_fuse))
+ {
+ /* Registered output */
+
+ config_palce16v8_pin_as_8_product_terms(macrocells[index].pin);
+
+ output_pins[output_pin_count].pin = macrocells[index].pin;
+ output_pins[output_pin_count].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
+
+ if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
+ }
+
+ ++output_pin_count;
- if (jed_get_fuse(jed, sg1))
- {
- }
- else
- {
- fprintf(stderr, "Unknown configuration type!\n");
- }
- }
- }
+ input_pins[input_pin_count] = macrocells[index].pin;
+
+ ++input_pin_count;
+ }
+ else
+ {
+ /* Combinatorial I/O */
- /* 2056 - 2119 are the 64 bit signature fuses */
+ if (does_output_enable_fuse_row_allow_output(pal, jed, macrocells[index].fuserowoutputenable))
+ {
+ config_palce16v8_pin_as_7_product_terms_and_oe_term(macrocells[index].pin);
+
+ output_pins[output_pin_count].pin = macrocells[index].pin;
+ output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
+
+ if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
+ }
+
+ ++output_pin_count;
+ }
+
+ input_pins[input_pin_count] = macrocells[index].pin;
+
+ ++input_pin_count;
+ }
+ }
+ }
+ else
+ {
+ fprintf(stderr, "Unknown configuration type!\n");
+ }
+ }
+ else
+ {
+ /* Device uses no registers */
+
+ if (jed_get_fuse(jed, sg1))
+ {
+ /* Combinatorial I/O (7 product terms and 1 output enable product term) */
+
+ memcpy(palce16v8pinfusecolumns, pinfusecolumns_io, sizeof(pinfusecolumns_io));
+
+ memcpy(input_pins, input_pins_io, sizeof(input_pins_io));
+
+ input_pin_count = ARRAY_LEN(input_pins_io);
+
+ for (index = 0; index < ARRAY_LEN(macrocells); ++index)
+ {
+ if (does_output_enable_fuse_row_allow_output(pal, jed, macrocells[index].fuserowoutputenable))
+ {
+ config_palce16v8_pin_as_7_product_terms_and_oe_term(macrocells[index].pin);
+
+ output_pins[output_pin_count].pin = macrocells[index].pin;
+ output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
+
+ if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
+ }
+
+ ++output_pin_count;
+ }
+
+ /* Pins 12 and 19 cannot be used as an input only an output. */
+
+ if (macrocells[index].pin != 12 && macrocells[index].pin != 19)
+ {
+ input_pins[input_pin_count] = macrocells[index].pin;
+
+ ++input_pin_count;
+ }
+ }
+ }
+ else
+ {
+ /* Combinatorial Output or Input */
+
+ memcpy(palce16v8pinfusecolumns, pinfusecolumns_i_or_o, sizeof(pinfusecolumns_i_or_o));
+
+ memcpy(input_pins, input_pins_i_or_o, sizeof(input_pins_i_or_o));
+
+ input_pin_count = ARRAY_LEN(input_pins_i_or_o);
+
+ for (index = 0; index < ARRAY_LEN(macrocells); ++index)
+ {
+ if (!jed_get_fuse(jed, macrocells[index].sl0_fuse))
+ {
+ /* pin configured as an output only */
+
+ config_palce16v8_pin_as_8_product_terms(macrocells[index].pin);
+
+ output_pins[output_pin_count].pin = macrocells[index].pin;
+ output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
+
+ if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
+ }
+
+ ++output_pin_count;
+ }
+ else
+ {
+ /* pin configured as an input only */
+
+ input_pins[input_pin_count] = macrocells[index].pin;
+
+ ++input_pin_count;
+ }
+ }
+ }
+ }
+
+ set_input_pins(input_pins, input_pin_count);
+ set_output_pins(output_pins, output_pin_count);
+
+ /* 2056 - 2119 are the 64 bit signature fuses */
- fprintf(stderr, "Configuring product terms for PALCE16V8 not supported!\n");
+ /* 2128 - 2135 product term 8? */
+ /* 2136 - 2143 product term 7? */
+ /* 2144 - 2151 product term 6? */
+ /* 2152 - 2159 product term 5? */
+ /* 2160 - 2167 product term 4? */
+ /* 2168 - 2175 product term 3? */
+ /* 2176 - 2183 product term 2? */
+ /* 2184 - 2191 product term 1? */
}
@@ -3757,6 +5683,1075 @@ static void config_ck2605_pins(const pal_data* pal, const jed_data* jed)
+#if defined(ricoh_pals)
+/*-------------------------------------------------
+ config_epl10p8_pins - configures the pins for
+ a EPL10P8
+-------------------------------------------------*/
+
+static void config_epl10p8_pins(const pal_data* pal, const jed_data* jed)
+{
+ typedef struct _memory_cell memory_cell;
+ struct _memory_cell
+ {
+ UINT16 pin;
+ UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
+ };
+
+ static memory_cell memory_cells[] = {
+ {12, 663},
+ {13, 660},
+ {14, 657},
+ {15, 654},
+ {16, 651},
+ {17, 648},
+ {18, 645},
+ {19, 642}};
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
+ pin_output_config output_pins[8];
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
+ {
+ output_pins[index].pin = memory_cells[index].pin;
+ output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
+
+ if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_epl12p6_pins - configures the pins for
+ a EPL12P6
+-------------------------------------------------*/
+
+static void config_epl12p6_pins(const pal_data* pal, const jed_data* jed)
+{
+ typedef struct _memory_cell memory_cell;
+ struct _memory_cell
+ {
+ UINT16 pin;
+ UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
+ UINT16 or_fuse; /* 0 - intact? */
+ UINT16 xor_fuse; /* 0 - intact? */
+ };
+
+ static memory_cell memory_cells[] = {
+ {13, 785, 783, 784},
+ {14, 782, 780, 781},
+ {15, 779, 777, 778},
+ {16, 776, 774, 775},
+ {17, 773, 771, 772},
+ {18, 770, 768, 769}};
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 19};
+ pin_output_config output_pins[8];
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
+ {
+ output_pins[index].pin = memory_cells[index].pin;
+ output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
+
+ if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_epl14p4_pins - configures the pins for
+ a EPL14P4
+-------------------------------------------------*/
+
+static void config_epl14p4_pins(const pal_data* pal, const jed_data* jed)
+{
+ typedef struct _memory_cell memory_cell;
+ struct _memory_cell
+ {
+ UINT16 pin;
+ UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
+ UINT16 or_fuse; /* 0 - intact? */
+ UINT16 xor_fuse; /* 0 - intact? */
+ };
+
+ static memory_cell memory_cells[] = {
+ {14, 907, 905, 906},
+ {15, 904, 902, 903},
+ {16, 901, 899, 900},
+ {17, 898, 896, 897}};
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 18, 19};
+ pin_output_config output_pins[8];
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
+ {
+ output_pins[index].pin = memory_cells[index].pin;
+ output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
+
+ if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_epl16p2_pins - configures the pins for
+ a EPL16P2
+-------------------------------------------------*/
+
+static void config_epl16p2_pins(const pal_data* pal, const jed_data* jed)
+{
+ typedef struct _memory_cell memory_cell;
+ struct _memory_cell
+ {
+ UINT16 pin;
+ UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
+ UINT16 or_fuse; /* 0 - intact? */
+ UINT16 xor_fuse; /* 0 - intact? */
+ };
+
+ static memory_cell memory_cells[] = {
+ {15, 1029, 1027, 1028},
+ {16, 1026, 1024, 1025}};
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 17, 18, 19};
+ pin_output_config output_pins[8];
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
+ {
+ output_pins[index].pin = memory_cells[index].pin;
+ output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
+
+ if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_epl16p8_pins - configures the pins for
+ a EPL16P8
+-------------------------------------------------*/
+
+static void config_epl16p8_pins(const pal_data* pal, const jed_data* jed)
+{
+ typedef struct _memory_cell memory_cell;
+ struct _memory_cell
+ {
+ UINT16 pin;
+ UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
+ UINT16 or_fuse; /* 0 - intact? */
+ UINT16 xor_fuse; /* 0 - intact? */
+ };
+
+ static memory_cell memory_cells[] = {
+ {12, 2071, 2069, 2070},
+ {13, 2068, 2066, 2067},
+ {14, 2065, 2063, 2064},
+ {15, 2062, 2060, 2061},
+ {16, 2059, 2057, 2058},
+ {17, 2056, 2054, 2055},
+ {18, 2053, 2051, 2052},
+ {19, 2050, 2048, 2049}};
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
+ pin_output_config output_pins[8];
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
+ {
+ output_pins[index].pin = memory_cells[index].pin;
+ output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
+
+ if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_epl16rp8_pins - configures the pins for
+ a EPL16RP8
+-------------------------------------------------*/
+
+static void config_epl16rp8_pins(const pal_data* pal, const jed_data* jed)
+{
+ typedef struct _memory_cell memory_cell;
+ struct _memory_cell
+ {
+ UINT16 pin;
+ UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
+ UINT16 or_fuse; /* 0 - intact? */
+ UINT16 xor_fuse; /* 0 - intact? */
+ };
+
+ static memory_cell memory_cells[] = {
+ {12, 2071, 2069, 2070},
+ {13, 2068, 2066, 2067},
+ {14, 2065, 2063, 2064},
+ {15, 2062, 2060, 2061},
+ {16, 2059, 2057, 2058},
+ {17, 2056, 2054, 2055},
+ {18, 2053, 2051, 2052},
+ {19, 2050, 2048, 2049}};
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
+ pin_output_config output_pins[8];
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
+ {
+ output_pins[index].pin = memory_cells[index].pin;
+ output_pins[index].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
+
+ if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_epl16rp6_pins - configures the pins for
+ a EPL16RP6
+-------------------------------------------------*/
+
+static void config_epl16rp6_pins(const pal_data* pal, const jed_data* jed)
+{
+ typedef struct _memory_cell memory_cell;
+ struct _memory_cell
+ {
+ UINT16 pin;
+ UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
+ UINT16 or_fuse; /* 0 - intact? */
+ UINT16 xor_fuse; /* 0 - intact? */
+ };
+
+ static memory_cell memory_cells[] = {
+ {12, 2071, 2069, 2070},
+ {13, 2068, 2066, 2067},
+ {14, 2065, 2063, 2064},
+ {15, 2062, 2060, 2061},
+ {16, 2059, 2057, 2058},
+ {17, 2056, 2054, 2055},
+ {18, 2053, 2051, 2052},
+ {19, 2050, 2048, 2049}};
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
+ pin_output_config output_pins[8];
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
+ {
+ output_pins[index].pin = memory_cells[index].pin;
+
+ if (memory_cells[index].pin == 13 || memory_cells[index].pin == 14 ||
+ memory_cells[index].pin == 15 || memory_cells[index].pin == 16 ||
+ memory_cells[index].pin == 17 || memory_cells[index].pin == 18)
+ {
+ output_pins[index].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
+ }
+ else
+ {
+ output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
+ }
+
+ if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_epl16rp4_pins - configures the pins for
+ a EPL16RP4
+-------------------------------------------------*/
+
+static void config_epl16rp4_pins(const pal_data* pal, const jed_data* jed)
+{
+ typedef struct _memory_cell memory_cell;
+ struct _memory_cell
+ {
+ UINT16 pin;
+ UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
+ UINT16 or_fuse; /* 0 - intact? */
+ UINT16 xor_fuse; /* 0 - intact? */
+ };
+
+ static memory_cell memory_cells[] = {
+ {12, 2071, 2069, 2070},
+ {13, 2068, 2066, 2067},
+ {14, 2065, 2063, 2064},
+ {15, 2062, 2060, 2061},
+ {16, 2059, 2057, 2058},
+ {17, 2056, 2054, 2055},
+ {18, 2053, 2051, 2052},
+ {19, 2050, 2048, 2049}};
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
+ pin_output_config output_pins[8];
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
+ {
+ output_pins[index].pin = memory_cells[index].pin;
+
+ if (memory_cells[index].pin == 14 || memory_cells[index].pin == 15 ||
+ memory_cells[index].pin == 16 || memory_cells[index].pin == 17)
+ {
+ output_pins[index].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
+ }
+ else
+ {
+ output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
+ }
+
+ if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+#endif
+
+
+
+/*-------------------------------------------------
+ config_pal10p8_pins - configures the pins for
+ a PAL10P8
+-------------------------------------------------*/
+
+static void config_pal10p8_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
+ pin_output_config output_pins[8];
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(output_pins); ++index)
+ {
+ output_pins[index].pin = index + 12;
+ output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
+
+ if (!jed_get_fuse(jed, 327 - index))
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal12p6_pins - configures the pins for
+ a PAL12P6A
+-------------------------------------------------*/
+
+static void config_pal12p6_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 19};
+ pin_output_config output_pins[6];
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(output_pins); ++index)
+ {
+ output_pins[index].pin = index + 13;
+ output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
+
+ if (!jed_get_fuse(jed, 389 - index))
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal14p4_pins - configures the pins for
+ a PAL14P4
+-------------------------------------------------*/
+
+static void config_pal14p4_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 18, 19};
+ pin_output_config output_pins[4];
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(output_pins); ++index)
+ {
+ output_pins[index].pin = index + 14;
+ output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
+
+ if (!jed_get_fuse(jed, 451 - index))
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal16p2_pins - configures the pins for
+ a PAL16P2
+-------------------------------------------------*/
+
+static void config_pal16p2_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 17, 18, 19};
+ pin_output_config output_pins[2];
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(output_pins); ++index)
+ {
+ output_pins[index].pin = index + 15;
+ output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
+
+ if (!jed_get_fuse(jed, 513 - index))
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal16p8_pins - configures the pins for
+ a PAL16P8
+-------------------------------------------------*/
+
+static void config_pal16p8_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 13, 14, 15, 16, 17, 18};
+ pin_output_config output_pins[8];
+ UINT16 output_pin_count, index;
+
+ output_pin_count = 0;
+
+ for (index = 0; index < pal->pinfuserowscount; ++index)
+ {
+ if (does_output_enable_fuse_row_allow_output(pal, jed, pal->pinfuserows[index].fuserowoutputenable))
+ {
+ output_pins[output_pin_count].pin = pal->pinfuserows[index].pin;
+ output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
+
+ if (!jed_get_fuse(jed, 2055 - index))
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
+ }
+
+ ++output_pin_count;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, output_pin_count);
+}
+
+
+
+/*-------------------------------------------------
+ config_pal16rp4_pins - configures the pins for
+ a PAL16RP4
+-------------------------------------------------*/
+
+static void config_pal16rp4_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19};
+ static UINT16 registered_pins[] = {14, 15, 16, 17};
+ pin_output_config output_pins[8];
+ UINT16 output_pin_count, index;
+
+ output_pin_count = 0;
+
+ if (does_output_enable_fuse_row_allow_output(pal, jed, 1792))
+ {
+ output_pins[output_pin_count].pin = 12;
+ output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
+
+ if (!jed_get_fuse(jed, 2055))
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
+ }
+
+ ++output_pin_count;
+ }
+
+ if (does_output_enable_fuse_row_allow_output(pal, jed, 1536))
+ {
+ output_pins[output_pin_count].pin = 13;
+ output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
+
+ if (!jed_get_fuse(jed, 2054))
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
+ }
+
+ ++output_pin_count;
+ }
+
+ for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
+ {
+ output_pins[output_pin_count].pin = registered_pins[index];
+ output_pins[output_pin_count].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
+
+ if (!jed_get_fuse(jed, 2053 - index))
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
+ }
+
+ ++output_pin_count;
+ }
+
+ if (does_output_enable_fuse_row_allow_output(pal, jed, 256))
+ {
+ output_pins[output_pin_count].pin = 18;
+ output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
+
+ if (!jed_get_fuse(jed, 2049))
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
+ }
+
+ ++output_pin_count;
+ }
+
+ if (does_output_enable_fuse_row_allow_output(pal, jed, 0))
+ {
+ output_pins[output_pin_count].pin = 19;
+ output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
+
+ if (!jed_get_fuse(jed, 2048))
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
+ }
+
+ ++output_pin_count;
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, output_pin_count);
+}
+
+
+
+/*-------------------------------------------------
+ config_pal16rp6_pins - configures the pins for
+ a PAL16RP6
+-------------------------------------------------*/
+
+static void config_pal16rp6_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19};
+ static UINT16 registered_pins[] = {13, 14, 15, 16, 17, 18};
+ pin_output_config output_pins[8];
+ UINT16 output_pin_count, index;
+
+ output_pin_count = 0;
+
+ if (does_output_enable_fuse_row_allow_output(pal, jed, 1792))
+ {
+ output_pins[output_pin_count].pin = 12;
+ output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
+
+ if (!jed_get_fuse(jed, 2055))
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
+ }
+
+ ++output_pin_count;
+ }
+
+ for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
+ {
+ output_pins[output_pin_count].pin = registered_pins[index];
+ output_pins[output_pin_count].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
+
+ if (!jed_get_fuse(jed, 2054 - index))
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
+ }
+
+ ++output_pin_count;
+ }
+
+ if (does_output_enable_fuse_row_allow_output(pal, jed, 0))
+ {
+ output_pins[output_pin_count].pin = 19;
+ output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT;
+
+ if (!jed_get_fuse(jed, 2048))
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
+ }
+
+ ++output_pin_count;
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, output_pin_count);
+}
+
+
+
+/*-------------------------------------------------
+ config_pal16rp8_pins - configures the pins for
+ a PAL16RP8
+-------------------------------------------------*/
+
+static void config_pal16rp8_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19};
+ pin_output_config output_pins[] = {
+ {12, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
+ {13, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
+ {14, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
+ {15, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
+ {16, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
+ {17, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
+ {18, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
+ {19, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED}};
+ UINT16 index;
+
+ for (index = 0; index < ARRAY_LEN(output_pins); ++index)
+ {
+ if (!jed_get_fuse(jed, 2055 - index))
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVELOW;
+ }
+ else
+ {
+ output_pins[index].flags |= OUTPUT_ACTIVEHIGH;
+ }
+ }
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal6l16_pins - configures the pins for
+ a PAL6L16
+-------------------------------------------------*/
+
+static void config_pal6l16_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {4, 5, 6, 7, 8, 9};
+ static pin_output_config output_pins[] = {
+ {1, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {2, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {3, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {10, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {11, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {13, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {14, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {21, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {22, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {23, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal8l14_pins - configures the pins for
+ a PAL8L14
+-------------------------------------------------*/
+
+static void config_pal8l14_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {3, 4, 5, 6, 7, 8, 9, 10};
+ static pin_output_config output_pins[] = {
+ {1, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {2, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {11, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {13, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {14, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {21, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {22, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {23, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal12h10_pins - configures the pins for
+ a PAL12H10
+-------------------------------------------------*/
+
+static void config_pal12h10_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13};
+ static pin_output_config output_pins[] = {
+ {14, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {15, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {17, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {18, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {20, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {21, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {22, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {23, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal12l10_pins - configures the pins for
+ a PAL12L10
+-------------------------------------------------*/
+
+static void config_pal12l10_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13};
+ static pin_output_config output_pins[] = {
+ {14, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {21, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {22, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {23, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal14h8_pins - configures the pins for
+ a PAL14H8
+-------------------------------------------------*/
+
+static void config_pal14h8_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 23};
+ static pin_output_config output_pins[] = {
+ {15, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {17, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {18, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {20, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {21, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {22, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal14l8_pins - configures the pins for
+ a PAL14L8
+-------------------------------------------------*/
+
+static void config_pal14l8_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 23};
+ static pin_output_config output_pins[] = {
+ {15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {21, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {22, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal16h6_pins - configures the pins for
+ a PAL16H6
+-------------------------------------------------*/
+
+static void config_pal16h6_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 22, 23};
+ static pin_output_config output_pins[] = {
+ {16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {17, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {18, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {20, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {21, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal16l6_pins - configures the pins for
+ a PAL16L6
+-------------------------------------------------*/
+
+static void config_pal16l6_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 22, 23};
+ static pin_output_config output_pins[] = {
+ {16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {21, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal18h4_pins - configures the pins for
+ a PAL18H4
+-------------------------------------------------*/
+
+static void config_pal18h4_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 21, 22, 23};
+ static pin_output_config output_pins[] = {
+ {17, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {18, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {20, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal18l4_pins - configures the pins for
+ a PAL18L4
+-------------------------------------------------*/
+
+static void config_pal18l4_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 21, 22, 23};
+ static pin_output_config output_pins[] = {
+ {17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal20c1_pins - configures the pins for
+ a PAL20C1
+-------------------------------------------------*/
+
+static void config_pal20c1_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 20, 21, 22, 23};
+ static pin_output_config output_pins[] = {
+ {18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
+/*-------------------------------------------------
+ config_pal20l2_pins - configures the pins for
+ a PAL20L2
+-------------------------------------------------*/
+
+static void config_pal20l2_pins(const pal_data* pal, const jed_data* jed)
+{
+ static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 20, 21, 22, 23};
+ static pin_output_config output_pins[] = {
+ {18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
+ {19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
+
+ set_input_pins(input_pins, ARRAY_LEN(input_pins));
+ set_output_pins(output_pins, ARRAY_LEN(output_pins));
+}
+
+
+
/*-------------------------------------------------
is_gal16v8_product_term_enabled - determines if
a fuse row in a GAL16V8 is enabled
@@ -4047,9 +7042,9 @@ static int command_convert(int argc, char *argv[])
switch (err)
{
- case JEDERR_INVALID_DATA: fprintf(stderr, "Fatal error: Invalid source file\n"); return 1;
- case JEDERR_BAD_XMIT_SUM: fprintf(stderr, "Fatal error: Bad transmission checksum\n"); return 1;
- case JEDERR_BAD_FUSE_SUM: fprintf(stderr, "Fatal error: Bad fusemap checksum\n"); return 1;
+ case JEDERR_INVALID_DATA: fprintf(stderr, "Fatal error: Invalid source file\n"); free(srcbuf); return 1;
+ case JEDERR_BAD_XMIT_SUM: fprintf(stderr, "Fatal error: Bad transmission checksum\n"); free(srcbuf); return 1;
+ case JEDERR_BAD_FUSE_SUM: fprintf(stderr, "Fatal error: Bad fusemap checksum\n"); free(srcbuf); return 1;
}
/* override the number of fuses */
@@ -4081,7 +7076,7 @@ static int command_convert(int argc, char *argv[])
err = jedbin_parse(srcbuf, srcbuflen, &jed);
switch (err)
{
- case JEDERR_INVALID_DATA: fprintf(stderr, "Fatal error: Invalid binary JEDEC file\n"); return 1;
+ case JEDERR_INVALID_DATA: fprintf(stderr, "Fatal error: Invalid binary JEDEC file\n"); free(srcbuf); return 1;
}
/* print out data */
@@ -4119,6 +7114,7 @@ static int command_convert(int argc, char *argv[])
static int command_view(int argc, char *argv[])
{
+ int result = 0;
const char *srcfile, *palname;
int is_jed;
const pal_data* pal;
@@ -4149,8 +7145,8 @@ static int command_view(int argc, char *argv[])
err = read_source_file(srcfile);
if (err != 0)
{
- free(srcbuf);
- return 1;
+ result = 1;
+ goto end;
}
/* if the source is JED, convert to binary */
@@ -4160,9 +7156,9 @@ static int command_view(int argc, char *argv[])
err = jed_parse(srcbuf, srcbuflen, &jed);
switch (err)
{
- case JEDERR_INVALID_DATA: fprintf(stderr, "Fatal error: Invalid .JED file\n"); return 1;
- case JEDERR_BAD_XMIT_SUM: fprintf(stderr, "Fatal error: Bad transmission checksum\n"); return 1;
- case JEDERR_BAD_FUSE_SUM: fprintf(stderr, "Fatal error: Bad fusemap checksum\n"); return 1;
+ case JEDERR_INVALID_DATA: fprintf(stderr, "Fatal error: Invalid .JED file\n"); result = 1; goto end;
+ case JEDERR_BAD_XMIT_SUM: fprintf(stderr, "Fatal error: Bad transmission checksum\n"); result = 1; goto end;
+ case JEDERR_BAD_FUSE_SUM: fprintf(stderr, "Fatal error: Bad fusemap checksum\n"); result = 1; goto end;
}
}
else
@@ -4171,10 +7167,17 @@ static int command_view(int argc, char *argv[])
err = jedbin_parse(srcbuf, srcbuflen, &jed);
switch (err)
{
- case JEDERR_INVALID_DATA: fprintf(stderr, "Fatal error: Invalid binary JEDEC file\n"); return 1;
+ case JEDERR_INVALID_DATA: fprintf(stderr, "Fatal error: Invalid binary JEDEC file\n"); result = 1; goto end;
}
}
+ if (jed.numfuses != pal->numfuses)
+ {
+ fprintf(stderr, "Fuse count does not match this pal type.");
+ result = 1;
+ goto end;
+ }
+
/* generate equations from fuse map */
pal->config_pins(pal, &jed);
@@ -4186,12 +7189,12 @@ static int command_view(int argc, char *argv[])
else
{
fprintf(stderr, "Viewing product terms not supported for this pal type.");
- free(srcbuf);
- return 1;
+ result = 1;
}
+end:
free(srcbuf);
- return 0;
+ return result;
}