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author Aaron Giles <aaron@aarongiles.com>2010-03-25 13:18:38 +0000
committer Aaron Giles <aaron@aarongiles.com>2010-03-25 13:18:38 +0000
commita91446eacaded421e4ab1c376fca88d3e551606d (patch)
tree762e0b64b7967eae3f7776f5521d22a2f06f124e /src/emu
parent868d57267a19fb8ad942f88c99acd8013602dd2d (diff)
Cleanups and version bump.mame0137u1
Diffstat (limited to 'src/emu')
-rw-r--r--src/emu/cpu/avr8/avr8.c4
-rw-r--r--src/emu/cpu/g65816/g65816op.h16
-rw-r--r--src/emu/cpu/i386/i386priv.h14
-rw-r--r--src/emu/cpu/m68000/m68kfpu.c14
-rw-r--r--src/emu/cpu/mn10200/mn10200.c84
-rw-r--r--src/emu/inptport.c4
-rw-r--r--src/emu/sound/tms5110r.c4
7 files changed, 70 insertions, 70 deletions
diff --git a/src/emu/cpu/avr8/avr8.c b/src/emu/cpu/avr8/avr8.c
index a57130b036b..ec06d6695aa 100644
--- a/src/emu/cpu/avr8/avr8.c
+++ b/src/emu/cpu/avr8/avr8.c
@@ -853,8 +853,8 @@ static CPU_EXECUTE( avr8 )
opcycles = 2;
break;
case 0x0900: // SBIC A,b
- if(!(READ_IO_8(cpustate, ACONST5(op)) & (1 << RR3(op))))
- {
+ if(!(READ_IO_8(cpustate, ACONST5(op)) & (1 << RR3(op))))
+ {
opcycles += avr8_is_long_opcode(op) ? 2 : 1;
cpustate->pc += avr8_is_long_opcode(op) ? 2 : 1;
}
diff --git a/src/emu/cpu/g65816/g65816op.h b/src/emu/cpu/g65816/g65816op.h
index 2ba7fa53fb2..2a91ea51e9e 100644
--- a/src/emu/cpu/g65816/g65816op.h
+++ b/src/emu/cpu/g65816/g65816op.h
@@ -688,11 +688,11 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
r0 = REGISTER_A; \
r1 = SRC; \
carry = CFLAG_AS_1(); \
- if (!FLAG_D) \
+ if (!FLAG_D) \
{ \
result = r0 + r1 + carry; \
- } \
- else \
+ } \
+ else \
{ \
result = (r0 & 0x000f) + (r1 & 0x000f) + (carry << 0); \
if(result > 0x0009) result += 0x0006; \
@@ -710,7 +710,7 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
if (FLAG_D && result > 0x9fff) result += 0x6000; \
FLAG_C = (result > 0xffff) ? 0x100 : 0; \
FLAG_Z = REGISTER_A = MAKE_UINT_16(result); \
- FLAG_N = NFLAG_16(REGISTER_A);
+ FLAG_N = NFLAG_16(REGISTER_A);
#endif
/* M6502 Logical AND with accumulator */
@@ -1548,11 +1548,11 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
r1 = SRC; \
r1 ^= 0xffff; \
carry = CFLAG_AS_1(); \
- if (!FLAG_D) \
+ if (!FLAG_D) \
{ \
result = r0 + r1 + carry; \
- } \
- else \
+ } \
+ else \
{ \
result = (r0 & 0x000f) + (r1 & 0x000f) + (carry << 0); \
if(result <= 0x000f) result -= 0x0006; \
@@ -1570,7 +1570,7 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
if (FLAG_D && result <= 0xffff) result -= 0x6000; \
FLAG_C = (result > 0xffff) ? 0x100 : 0; \
FLAG_Z = REGISTER_A = MAKE_UINT_16(result); \
- FLAG_N = NFLAG_16(REGISTER_A);
+ FLAG_N = NFLAG_16(REGISTER_A);
#endif
diff --git a/src/emu/cpu/i386/i386priv.h b/src/emu/cpu/i386/i386priv.h
index 52aef5719c3..9e90ba1b672 100644
--- a/src/emu/cpu/i386/i386priv.h
+++ b/src/emu/cpu/i386/i386priv.h
@@ -432,7 +432,7 @@ INLINE UINT32 FETCH32(i386_state *cpustate)
{
translate_address(cpustate,&address);
}
-
+
address &= cpustate->a20_mask;
value = memory_decrypted_read_dword(cpustate->program, address);
cpustate->eip += 4;
@@ -466,7 +466,7 @@ INLINE UINT16 READ16(i386_state *cpustate,UINT32 ea)
{
translate_address(cpustate,&address);
}
-
+
address &= cpustate->a20_mask;
value = memory_read_word_32le( cpustate->program, address );
}
@@ -487,7 +487,7 @@ INLINE UINT32 READ32(i386_state *cpustate,UINT32 ea)
{
translate_address(cpustate,&address);
}
-
+
address &= cpustate->a20_mask;
value = memory_read_dword_32le( cpustate->program, address );
}
@@ -513,7 +513,7 @@ INLINE UINT64 READ64(i386_state *cpustate,UINT32 ea)
{
translate_address(cpustate,&address);
}
-
+
address &= cpustate->a20_mask;
value = (((UINT64) memory_read_dword_32le( cpustate->program, address+0 )) << 0) |
(((UINT64) memory_read_dword_32le( cpustate->program, address+4 )) << 32);
@@ -545,7 +545,7 @@ INLINE void WRITE16(i386_state *cpustate,UINT32 ea, UINT16 value)
{
translate_address(cpustate,&address);
}
-
+
address &= cpustate->a20_mask;
memory_write_word_32le(cpustate->program, address, value);
}
@@ -564,7 +564,7 @@ INLINE void WRITE32(i386_state *cpustate,UINT32 ea, UINT32 value)
{
translate_address(cpustate,&address);
}
-
+
ea &= cpustate->a20_mask;
memory_write_dword_32le(cpustate->program, address, value);
}
@@ -588,7 +588,7 @@ INLINE void WRITE64(i386_state *cpustate,UINT32 ea, UINT64 value)
{
translate_address(cpustate,&address);
}
-
+
ea &= cpustate->a20_mask;
memory_write_dword_32le(cpustate->program, address+0, value & 0xffffffff);
memory_write_dword_32le(cpustate->program, address+4, (value >> 32) & 0xffffffff);
diff --git a/src/emu/cpu/m68000/m68kfpu.c b/src/emu/cpu/m68000/m68kfpu.c
index d464bd0f242..06682c63ab3 100644
--- a/src/emu/cpu/m68000/m68kfpu.c
+++ b/src/emu/cpu/m68000/m68kfpu.c
@@ -642,7 +642,7 @@ static floatx80 READ_EA_FPE(m68ki_cpu_core *m68k, int ea)
}
break;
- default:
+ default:
fatalerror("M68kFPU: READ_EA_FPE0: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC);
break;
}
@@ -717,8 +717,8 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
int opmode = w2 & 0x7f;
floatx80 source;
- // fmovecr #$f, fp0 f200 5c0f
-
+ // fmovecr #$f, fp0 f200 5c0f
+
if (rm)
{
switch (src)
@@ -837,7 +837,7 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
source = REG_FP[src];
}
-
+
switch (opmode)
{
@@ -877,7 +877,7 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
break;
}
case 0x1a: // FNEG
- {
+ {
REG_FP[dst] = source;
REG_FP[dst].high ^= 0x8000;
SET_CONDITION_CODES(m68k, REG_FP[dst]);
@@ -949,13 +949,13 @@ static void fmove_reg_mem(m68ki_cpu_core *m68k, UINT16 w2)
}
case 1: // Single-precision Real
{
- UINT32 d = floatx80_to_float32(REG_FP[src]);
+ UINT32 d = floatx80_to_float32(REG_FP[src]);
WRITE_EA_32(m68k, ea, d);
break;
}
case 2: // Extended-precision Real
{
- WRITE_EA_FPE(m68k, ea, REG_FP[src]);
+ WRITE_EA_FPE(m68k, ea, REG_FP[src]);
break;
}
case 3: // Packed-decimal Real with Static K-factor
diff --git a/src/emu/cpu/mn10200/mn10200.c b/src/emu/cpu/mn10200/mn10200.c
index 7799442f222..d01e9dafd93 100644
--- a/src/emu/cpu/mn10200/mn10200.c
+++ b/src/emu/cpu/mn10200/mn10200.c
@@ -133,9 +133,9 @@ INLINE INT32 r24u(mn102_info *mn102, offs_t adr)
INLINE void w24(mn102_info *mn102, offs_t adr, UINT32 val)
{
-/* if(adr == 0x4075aa || adr == 0x40689a || adr == 0x4075a2) {
- log_write("TRACE", adr, val, MEM_LONG);
- }*/
+/* if(adr == 0x4075aa || adr == 0x40689a || adr == 0x4075a2) {
+ log_write("TRACE", adr, val, MEM_LONG);
+ }*/
mn102_write_byte(mn102, adr, val);
mn102_write_byte(mn102, adr+1, val>>8);
mn102_write_byte(mn102, adr+2, val>>16);
@@ -160,11 +160,11 @@ static void mn102_take_irq(mn102_info *mn102, int level, int group)
{
if(!(mn102->psw & 0x800))
{
-// if (group != 8) printf("MN10200: Dropping irq L %d G %d pc=%x, a3=%x\n", level, group, mn102->pc, mn102->a[3]);
+// if (group != 8) printf("MN10200: Dropping irq L %d G %d pc=%x, a3=%x\n", level, group, mn102->pc, mn102->a[3]);
return;
}
-// if (group != 8) printf("MN10200: Taking irq L %d G %d pc=%x, a3=%x\n", level, group, mn102->pc, mn102->a[3]);
+// if (group != 8) printf("MN10200: Taking irq L %d G %d pc=%x, a3=%x\n", level, group, mn102->pc, mn102->a[3]);
mn102->a[3] -= 6;
w24(mn102, mn102->a[3]+2, mn102->pc);
@@ -184,7 +184,7 @@ static void refresh_timer(mn102_info *cpustate, int tmr)
// source is a prescaler?
if (source >= 2)
{
- INT32 rate;
+ INT32 rate;
// is prescaler enabled?
if (cpustate->prescaler[source-2].mode & 0x80)
@@ -249,7 +249,7 @@ INLINE void timer_tick_simple(mn102_info *cpustate, int tmr)
// is the result enabled?
if (cpustate->icrl[group] & (1 << irq_in_grp))
{
-// printf("Timer %d IRQ! (Group %d in_grp %d ICRH %x ICRL %x\n", tmr, group, irq_in_grp, cpustate->icrh[group], cpustate->icrl[group]);
+// printf("Timer %d IRQ! (Group %d in_grp %d ICRH %x ICRL %x\n", tmr, group, irq_in_grp, cpustate->icrh[group], cpustate->icrl[group]);
// try to take it now
mn102_take_irq(cpustate, level, group + 1);
}
@@ -289,10 +289,10 @@ static CPU_INIT(mn10200)
state_save_register_device_item_array(device, 0, cpustate->icrh);
state_save_register_device_item(device, 0, cpustate->psw);
state_save_register_device_item(device, 0, cpustate->mdr);
-// state_save_register_device_item_array(device, 0, cpustate->simple_timer);
-// state_save_register_device_item_array(device, 0, cpustate->prescaler);
-// state_save_register_device_item_array(device, 0, cpustate->dma);
-// state_save_register_device_item_array(device, 0, cpustate->serial);
+// state_save_register_device_item_array(device, 0, cpustate->simple_timer);
+// state_save_register_device_item_array(device, 0, cpustate->prescaler);
+// state_save_register_device_item_array(device, 0, cpustate->dma);
+// state_save_register_device_item_array(device, 0, cpustate->serial);
state_save_register_device_item_array(device, 0, cpustate->ddr);
for (tmr = 0; tmr < NUM_TIMERS_8BIT; tmr++)
@@ -490,7 +490,7 @@ static void mn102_extirq(mn102_info *mn102, int irqnum, int status)
{
int level = (mn102->icrh[7]>>4)&0x7;
-// printf("mn102_extirq: irq %d status %d G8 ICRL %x\n", irqnum, status, mn102->icrl[7]);
+// printf("mn102_extirq: irq %d status %d G8 ICRL %x\n", irqnum, status, mn102->icrl[7]);
// if interrupt is enabled, handle it
if (status)
@@ -1957,30 +1957,30 @@ static void mn10200_w(mn102_info *mn102, UINT32 adr, UINT32 data, int type)
case 0x210: case 0x211: case 0x212: case 0x213: case 0x214:
case 0x215: case 0x216: case 0x217: case 0x218: case 0x219:
mn102->simple_timer[adr-0x210].base = data + 1;
-// printf("MN10200: Timer %d value set %02x\n", adr-0x210, data);
+// printf("MN10200: Timer %d value set %02x\n", adr-0x210, data);
refresh_timer(mn102, adr-0x210);
break;
case 0x21a:
mn102->prescaler[0].cycles = data+1;
-// printf("MN10200: Prescale 0 cycle count %d\n", data+1);
+// printf("MN10200: Prescale 0 cycle count %d\n", data+1);
break;
case 0x21b:
mn102->prescaler[1].cycles = data+1;
-// printf("MN10200: Prescale 1 cycle count %d\n", data+1);
+// printf("MN10200: Prescale 1 cycle count %d\n", data+1);
break;
case 0x220: case 0x221: case 0x222: case 0x223: case 0x224:
- case 0x225: case 0x226: case 0x227: case 0x228: case 0x229:
+ case 0x225: case 0x226: case 0x227: case 0x228: case 0x229:
{
-// const char *source[4] = { "TMxIO", "cascade", "prescale 0", "prescale 1" };
+// const char *source[4] = { "TMxIO", "cascade", "prescale 0", "prescale 1" };
mn102->simple_timer[adr-0x220].mode = data;
-// printf("MN10200: Timer %d %s b6=%d, source=%s\n", adr-0x220, data & 0x80 ? "on" : "off", (data & 0x40) != 0, source[data & 3]);
+// printf("MN10200: Timer %d %s b6=%d, source=%s\n", adr-0x220, data & 0x80 ? "on" : "off", (data & 0x40) != 0, source[data & 3]);
if (data & 0x40)
{
-// printf("MN10200: loading timer %d\n", adr-0x220);
+// printf("MN10200: loading timer %d\n", adr-0x220);
mn102->simple_timer[adr-0x220].cur = mn102->simple_timer[adr-0x220].base;
}
refresh_timer(mn102, adr-0x220);
@@ -1988,35 +1988,35 @@ static void mn10200_w(mn102_info *mn102, UINT32 adr, UINT32 data, int type)
}
case 0x22a:
-// printf("MN10200: Prescale 0 %s, ps0bc %s\n",
-// data & 0x80 ? "on" : "off", data & 0x40 ? "-> ps0br" : "off");
+// printf("MN10200: Prescale 0 %s, ps0bc %s\n",
+// data & 0x80 ? "on" : "off", data & 0x40 ? "-> ps0br" : "off");
mn102->prescaler[0].mode = data;
break;
case 0x22b:
-// printf("MN10200: Prescale 1 %s, ps1bc %s\n",
-// data & 0x80 ? "on" : "off", data & 0x40 ? "-> ps1br" : "off");
+// printf("MN10200: Prescale 1 %s, ps1bc %s\n",
+// data & 0x80 ? "on" : "off", data & 0x40 ? "-> ps1br" : "off");
mn102->prescaler[1].mode = data;
break;
- case 0x230: case 0x240: case 0x250:
+ case 0x230: case 0x240: case 0x250:
{
-// const char *modes[4] = { "single", "double", "ioa", "iob" };
-// const char *sources[8] = { "pres.0", "pres.1", "iob", "sysclk", "*4", "*1", "6", "7" };
-// printf("MN10200: Timer %d comp=%s on_1=%s on_match=%s phase=%s source=%s\n",
-// 10 + ((adr-0x230) >> 4),
-// modes[data >> 6], data & 0x20 ? "cleared" : "not cleared", data & 0x10 ? "cleared" : "not cleared",
-// data & 8 ? "tff" : "rsff", sources[data & 7]);
+// const char *modes[4] = { "single", "double", "ioa", "iob" };
+// const char *sources[8] = { "pres.0", "pres.1", "iob", "sysclk", "*4", "*1", "6", "7" };
+// printf("MN10200: Timer %d comp=%s on_1=%s on_match=%s phase=%s source=%s\n",
+// 10 + ((adr-0x230) >> 4),
+// modes[data >> 6], data & 0x20 ? "cleared" : "not cleared", data & 0x10 ? "cleared" : "not cleared",
+// data & 8 ? "tff" : "rsff", sources[data & 7]);
break;
}
- case 0x231: case 0x241: case 0x251:
+ case 0x231: case 0x241: case 0x251:
{
-// const char *modes[4] = { "up", "down", "up on ioa", "up on iob" };
-// printf("MN10200: Timer %d %s ff=%s op=%s ext_trig=%s %s\n",
-// 10 + ((adr-0x230) >> 4),
-// data & 0x80 ? "enable" : "disable", data & 0x40 ? "operate" : "clear",
-// modes[(data >> 4) & 3], data & 2 ? "on" : "off", data & 1 ? "one-shot" : "repeat");
+// const char *modes[4] = { "up", "down", "up on ioa", "up on iob" };
+// printf("MN10200: Timer %d %s ff=%s op=%s ext_trig=%s %s\n",
+// 10 + ((adr-0x230) >> 4),
+// data & 0x80 ? "enable" : "disable", data & 0x40 ? "operate" : "clear",
+// modes[(data >> 4) & 3], data & 2 ? "on" : "off", data & 1 ? "one-shot" : "repeat");
break;
}
@@ -2302,17 +2302,17 @@ static UINT32 mn10200_r(mn102_info *mn102, UINT32 adr, int type)
case 0x183:
return 0x10;
-
+
case 0x200: case 0x201: case 0x202: case 0x203: case 0x204:
case 0x205: case 0x206: case 0x207: case 0x208: case 0x209:
-// printf("MN10200: timer %d value read = %d\n", adr-0x200, mn102->simple_timer[adr-0x200].cur);
+// printf("MN10200: timer %d value read = %d\n", adr-0x200, mn102->simple_timer[adr-0x200].cur);
return mn102->simple_timer[adr-0x200].cur;
break;
case 0x264: // port 1 data
return memory_read_byte_8le(mn102->io, MN10200_PORT1);
- case 0x28c: case 0x29c: case 0x2ac: case 0x2bc: case 0x2cc: case 0x2dc: case 0x2ec: case 0x2fc:
+ case 0x28c: case 0x29c: case 0x2ac: case 0x2bc: case 0x2cc: case 0x2dc: case 0x2ec: case 0x2fc:
{
int dma = (adr-0x280) >> 4;
return mn102->dma[dma].irq;
@@ -2357,9 +2357,9 @@ static CPU_SET_INFO(mn10200)
case CPUINFO_INT_REGISTER + MN10200_IAGR: cpustate->iagr = info->i; break;
case CPUINFO_INT_INPUT_STATE + MN10200_IRQ0: mn102_extirq(cpustate, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MN10200_IRQ1: mn102_extirq(cpustate, 1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MN10200_IRQ2: mn102_extirq(cpustate, 2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MN10200_IRQ3: mn102_extirq(cpustate, 3, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MN10200_IRQ1: mn102_extirq(cpustate, 1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MN10200_IRQ2: mn102_extirq(cpustate, 2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MN10200_IRQ3: mn102_extirq(cpustate, 3, info->i); break;
}
}
diff --git a/src/emu/inptport.c b/src/emu/inptport.c
index a5600a8e589..54710267e8e 100644
--- a/src/emu/inptport.c
+++ b/src/emu/inptport.c
@@ -4705,7 +4705,7 @@ static void record_port(const input_port_config *port)
int input_machine_has_keyboard(running_machine *machine)
{
int have_keyboard = FALSE;
-#ifdef MESS
+#ifdef MESS
const input_field_config *field;
const input_port_config *port;
for (port = machine->portlist.first(); port != NULL; port = port->next)
@@ -4717,7 +4717,7 @@ int input_machine_has_keyboard(running_machine *machine)
break;
}
}
-#endif
+#endif
return have_keyboard;
}
diff --git a/src/emu/sound/tms5110r.c b/src/emu/sound/tms5110r.c
index 4bd475f3bf7..2ab5f517654 100644
--- a/src/emu/sound/tms5110r.c
+++ b/src/emu/sound/tms5110r.c
@@ -35,10 +35,10 @@
/* quick note on derivative analysis:
Judging by all the TI chips I (Lord Nightmare) have done this test on, the first derivative between successive values of the LPC tables should follow a roughly triangular or sine shaped curve, the second derivative should start at a value, increase slightly, then decrease smoothly and become negative right around where the LPC curve passes 0, finally increase slightly right near the end. If it doesn't do this, there is probably a wrong value in there somewhere. The pitch and energy tables follow similar patterns but aren't the same since they never cross 0. The chirp table doesn't follow this pattern at all.
*/
-
+
/* The following TMS5100/TMC0280/CD2801 coefficients come from US Patent 4,209,836 and several others, and have been verified using derivative analysis to show which values were bad (due to poor quality images or badly typed copies of the tables in the patents, depending on which patent you look at) which were then corrected by figuring out what the tiny remaining marks on the photocopied version of the coefficient sheet COULD have been which would make the derivatives play nice.
***These values have not yet been verified against a real TMS5100 or TMC0280 or CD2801 (from speak & spell, etc)***
-*/
+*/
static const struct tms5100_coeffs pat4209836_coeff =
{
/* subtype */