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* Move all devices into separate part of src tree (nw) Miodrag Milanovic2015-09-137-8721/+0
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* Cleanups and version bumpmame0164 Miodrag Milanovic2015-07-293-21/+20
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* please bear with me.. these are needed to compile in GCC 5.2 and I want ↵ Cowering2015-07-231-8/+20
| | | | mingw guys to see them. with luck they can be reverted in a couple of days (nw)
* Added transfer size clear for DMAs, used by Chaos Seed in SS (still randomly ↵ angelosa2015-07-082-2/+3
| | | | crashes tho), nw
* Added bread-and-butter DMA CH 0 for SH7032, used by Casio Loopy for RAM fill. angelosa2015-07-083-3/+79
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* Added SH-2A flavour, which is SH-2 + SH7021 used by Casio Loopy. angelosa2015-07-083-4/+106
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* Bulk replace, nw angelosa2015-07-073-12/+5
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* Fixed accessing to internal map, might need another parameter for address ↵ angelosa2015-07-071-10/+36
| | | | cache "masking" (i.e. SH-1 uses address bit 27 for cache), nw
* Fixed number of address lines for SH-1 angelosa2015-07-072-5/+5
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* Fixed SH-1 internal mem map, nw angelosa2015-07-072-9/+6
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* First step in converting SH-2 to have separate internal devices. Fixed SH-1 ↵ angelosa2015-07-073-77/+25
| | | | | | num of address bits, removed extra read / write memory checks, added cache data array to main SH-2. (out-of-whatsnew) If anything regresses please let me know.
* -core: Add MCFG_FORCE_NO_DRC. [MooglyGuy] therealmogminer@gmail.com2015-06-271-1/+1
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* nw, add MCFG_FORCE_NO_DRC option, does not work for no apparent reason ↵ therealmogminer@gmail.com2015-06-272-4/+5
| | | | because our core architecture is crap
* memory: Remove support for decrypted bases, use an address space instead [O. ↵ Olivier Galibert2015-06-244-9/+21
| | | | Galibert]
* Sorted out cpu cores (nw) Miodrag Milanovic2015-05-132-4/+4
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* changes for Juergen Buchmueller in core and credits for some files in mess(nw) Miodrag Milanovic2015-05-072-34/+4
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* Added dummy license headers for EMU section (nw) Miodrag Milanovic2015-05-074-0/+8
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* moved all to std::string (nw) Miodrag Milanovic2015-04-222-3/+3
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* string -> str rename due to future conflicts (nw) Miodrag Milanovic2015-04-122-3/+3
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* fix compile? (nw) mamehaze2015-01-251-3/+3
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* Cleanups and version bumpmame0157 Miodrag Milanovic2014-12-311-1/+1
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* SH-2: added default SSR value, makes EGWord to boot [Angelo Salese] Scott Stone2014-12-151-2/+2
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* SMPC: added crude repeat key support in keyboard handling, makes typing more ↵ Angelo Salese2014-12-141-1/+2
| | | | comfortable [Angelo Salese]
* added command-line option -[no]drc_log_native to control DRC native ↵ Oliver Stöneberg2014-11-072-8/+4
| | | | | | | | | diassembly logging [Oliver Stöneberg] allows logging of DRC native disassembly without re-compiling / removes DRCUML_OPTION_LOG_NATIVE and all the core-specific LOG_NATIVE defines / added logging() to drcbe_interface / added logging_native() to drcuml_state
* added command-line option -[no]drc_log_uml to control DRC UML disassembly ↵ Oliver Stöneberg2014-11-072-21/+20
| | | | | | | logging [Oliver Stöneberg] allows logging of DRC UML disassembly without re-compiling / removes DRCUML_OPTION_LOG_UML and all the core-specific LOG_UML defines
* More cleanups, there is issue with srcclean that needs to be taken care as ↵ Miodrag Milanovic2014-07-221-9/+9
| | | | well, just doing now what we can
* Cleanups and version bump Miodrag Milanovic2014-07-223-13/+10
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* sh2: fix and enable memory system bypass for SH-1 & SH-2 DRC. [R. Belmont] R. Belmont2014-07-041-6/+4
| | | | | nw: The speedup is only really gaudy on CPS-3 where the SH-2 is a major percentage of the frame time (800% -> 1250% unthrottled). SKNS games that access spriteram a lot (cyvern) get a decent speedup as well. Saturn/ST-V and Cool Riders are dominated by the rendering in profiles and get around 10% improvement depending on the game.
* fixed usage of uninitialized member in sh2_device (nw) Oliver Stöneberg2014-04-231-0/+1
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* fixed sega saturn, broken since 29286. nw. Fabio Priuli2014-04-161-1/+1
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* sh2: converted to use delegates, so to finally remove the remaining static ↵ Fabio Priuli2014-04-153-55/+53
| | | | variables used by 32x. nw.
* sh2.c: Modernised cpu core. [Wilbert Pol] Wilbert Pol2014-04-126-2942/+2770
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* Cleanups and version bumpmame0153 Miodrag Milanovic2014-04-071-1/+1
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* Some early work towards GMEN SH-2 part of Namco System 23, nw Angelo Salese2014-04-041-0/+12
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* Removed some auto_mallocs in favor of dynamic_arrays. Aaron Giles2014-02-194-26/+1
| | | | | Added option to clear dynamic_arrays; on gcc this should assert if not done on POD (which is unsafe to memset).
* Cleanups and version bumpmame0151 Miodrag Milanovic2013-11-051-1/+1
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* sh2: license tags for DRC (nw) R. Belmont2013-10-163-8/+7
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* sh2: Show effective address in disassembly of PC-relative instructions [R. ↵ R. Belmont2013-09-211-3/+3
| | | | Belmont, based on a patch by Darksoft]
* Cleanups and version bumpmame0150 Miodrag Milanovic2013-09-173-6/+5
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* Added command line option to force DRC C backend [Miodrag Milanovic] Miodrag Milanovic2013-08-271-3/+0
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* Made both DRC and Non-DRC compile for MIPS, RSP and SH2 core and added ↵ Miodrag Milanovic2013-08-276-64/+56
| | | | option to enable/disable DRC from command line (-drc -nodrc by default it's on) [Miodrag Milanovic]
* setname and description changes to DRC devices to indicate such is being ↵ Scott Stone2013-08-231-4/+4
| | | | used (nw)
* added missing short names to legacy devices and added validation that short ↵ Miodrag Milanovic2013-08-232-0/+4
| | | | name is always mandatory (nw)
* SH-2 CPU core timing changes [notaz] Scott Stone2013-07-161-1/+2
| | | | | - JMP should be 2 cycles, according to the manual. - OR #imm,R0 should be 1 cycle and OR #imm,@(R0,GBR) should be 3 to match the manual and other ops.
* fix labelnum usage in SLEEP Michaël Banaan Ananas2013-04-021-23/+14
| | | also removed a useless branch equivalent to: if(sleep!=1) { sleep=1; }
* Cleanups and version bumpmame0148u2 Miodrag Milanovic2013-03-191-14/+14
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* Fixed endianness Angelo Salese2013-03-051-3/+3
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* (nw) R. Belmont2013-02-284-59/+130
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* Fixed SLEEP opcode in non-DRC SH-2 [Angelo Salese] Angelo Salese2013-02-273-1/+11
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* SH-2: watchdog i/f is quite exotic, implement it so it can be debugged properly Angelo Salese2013-02-202-0/+39
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