diff options
Diffstat (limited to 'src')
1005 files changed, 47011 insertions, 22955 deletions
diff --git a/src/devices/bus/a2bus/a2thunderclock.cpp b/src/devices/bus/a2bus/a2thunderclock.cpp index dfa54932f5a..69cc87a07ff 100644 --- a/src/devices/bus/a2bus/a2thunderclock.cpp +++ b/src/devices/bus/a2bus/a2thunderclock.cpp @@ -54,9 +54,11 @@ ROM_END // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(a2bus_thunderclock_device::device_add_mconfig) - MCFG_UPD1990A_ADD(THUNDERCLOCK_UPD1990_TAG, 1021800, WRITELINE(DEVICE_SELF, a2bus_thunderclock_device, upd_dataout_w), NOOP) -MACHINE_CONFIG_END +void a2bus_thunderclock_device::device_add_mconfig(machine_config &config) +{ + UPD1990A(config, m_upd1990ac, 1021800); + m_upd1990ac->data_callback().set(FUNC(a2bus_thunderclock_device::upd_dataout_w)); +} //------------------------------------------------- // rom_region - device-specific ROM region diff --git a/src/devices/bus/a2bus/agat7ports.cpp b/src/devices/bus/a2bus/agat7ports.cpp index aee242fb6fb..d7c12ad81d9 100644 --- a/src/devices/bus/a2bus/agat7ports.cpp +++ b/src/devices/bus/a2bus/agat7ports.cpp @@ -61,7 +61,7 @@ MACHINE_CONFIG_START(a2bus_agat7_ports_device::device_add_mconfig) MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(*this, a2bus_agat7_ports_device, write_centronics_busy)) MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") - I8251(config, "d10", 0); + I8251(config, m_d10, 0); MACHINE_CONFIG_END //------------------------------------------------- @@ -118,18 +118,11 @@ uint8_t a2bus_agat7_ports_device::read_c0nx(uint8_t offset) switch (offset & 8) { case 0: - data = m_d9->read(machine().dummy_space(), offset & 3); + data = m_d9->read(offset & 3); break; case 8: - if (offset & 1) - { - data = m_d10->status_r(machine().dummy_space(), 0); - } - else - { - data = m_d10->data_r(machine().dummy_space(), 0); - } + data = m_d10->read(offset & 1); break; } @@ -146,18 +139,11 @@ void a2bus_agat7_ports_device::write_c0nx(uint8_t offset, uint8_t data) switch (offset & 8) { case 0: - m_d9->write(machine().dummy_space(), offset & 3, data); + m_d9->write(offset & 3, data); break; case 8: - if (offset & 1) - { - m_d10->control_w(machine().dummy_space(), 0, data); - } - else - { - m_d10->data_w(machine().dummy_space(), 0, data); - } + m_d10->write(offset & 1, data); break; } } diff --git a/src/devices/bus/a2bus/agat840k_hle.cpp b/src/devices/bus/a2bus/agat840k_hle.cpp index 7dac678feb2..3571513b7d5 100644 --- a/src/devices/bus/a2bus/agat840k_hle.cpp +++ b/src/devices/bus/a2bus/agat840k_hle.cpp @@ -264,11 +264,11 @@ uint8_t a2bus_agat840k_hle_device::read_c0nx(uint8_t offset) switch (offset) { case 0: case 1: case 2: case 3: - data = m_d14->read(machine().dummy_space(), offset); + data = m_d14->read(offset); break; case 4: case 5: case 6: case 7: - data = m_d15->read(machine().dummy_space(), offset - 4); + data = m_d15->read(offset - 4); break; default: @@ -289,11 +289,11 @@ void a2bus_agat840k_hle_device::write_c0nx(uint8_t offset, uint8_t data) switch (offset) { case 0: case 1: case 2: case 3: - m_d14->write(machine().dummy_space(), offset, data); + m_d14->write(offset, data); break; case 4: case 5: case 6: case 7: - m_d15->write(machine().dummy_space(), offset - 4, data); + m_d15->write(offset - 4, data); break; case 8: // write desync diff --git a/src/devices/bus/a2bus/corvfdc02.cpp b/src/devices/bus/a2bus/corvfdc02.cpp index 04282f080a1..4b67b6e364f 100644 --- a/src/devices/bus/a2bus/corvfdc02.cpp +++ b/src/devices/bus/a2bus/corvfdc02.cpp @@ -52,15 +52,16 @@ ROM_END // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(a2bus_corvfdc02_device::device_add_mconfig) - MCFG_UPD765A_ADD(FDC02_FDC_TAG, true, false) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, a2bus_corvfdc02_device, intrq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, a2bus_corvfdc02_device, drq_w)) - MCFG_FLOPPY_DRIVE_ADD(FDC02_FDC_TAG":0", corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats) - MCFG_FLOPPY_DRIVE_ADD(FDC02_FDC_TAG":1", corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats) - MCFG_FLOPPY_DRIVE_ADD(FDC02_FDC_TAG":2", corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats) - MCFG_FLOPPY_DRIVE_ADD(FDC02_FDC_TAG":3", corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats) -MACHINE_CONFIG_END +void a2bus_corvfdc02_device::device_add_mconfig(machine_config &config) +{ + UPD765A(config, m_fdc, true, false); + m_fdc->intrq_wr_callback().set(FUNC(a2bus_corvfdc02_device::intrq_w)); + m_fdc->drq_wr_callback().set(FUNC(a2bus_corvfdc02_device::drq_w)); + FLOPPY_CONNECTOR(config, m_con1, corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats); + FLOPPY_CONNECTOR(config, m_con2, corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats); + FLOPPY_CONNECTOR(config, m_con3, corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats); + FLOPPY_CONNECTOR(config, m_con4, corv_floppies, "525dsqd", a2bus_corvfdc02_device::corv_floppy_formats); +} //------------------------------------------------- // rom_region - device-specific ROM region diff --git a/src/devices/bus/abcbus/fd2.cpp b/src/devices/bus/abcbus/fd2.cpp index 7de408ad65f..12607f51699 100644 --- a/src/devices/bus/abcbus/fd2.cpp +++ b/src/devices/bus/abcbus/fd2.cpp @@ -239,7 +239,7 @@ FLOPPY_FORMATS_END void abc_fd2_device::device_add_mconfig(machine_config &config) { - Z80(config, m_maincpu, 4_MHz_XTAL / 2); + Z80(config, m_maincpu, 4_MHz_XTAL / 2); m_maincpu->set_addrmap(AS_PROGRAM, &abc_fd2_device::abc_fd2_mem); m_maincpu->set_addrmap(AS_IO, &abc_fd2_device::abc_fd2_io); m_maincpu->set_daisy_config(daisy_chain); diff --git a/src/devices/bus/abcbus/lux10828.cpp b/src/devices/bus/abcbus/lux10828.cpp index 557f301141e..bc6f14082ed 100644 --- a/src/devices/bus/abcbus/lux10828.cpp +++ b/src/devices/bus/abcbus/lux10828.cpp @@ -322,7 +322,7 @@ WRITE_LINE_MEMBER( luxor_55_10828_device::fdc_drq_w ) void luxor_55_10828_device::device_add_mconfig(machine_config &config) { - Z80(config, m_maincpu, 4_MHz_XTAL / 2); + Z80(config, m_maincpu, 4_MHz_XTAL / 2); m_maincpu->set_addrmap(AS_PROGRAM, &luxor_55_10828_device::luxor_55_10828_mem); m_maincpu->set_addrmap(AS_IO, &luxor_55_10828_device::luxor_55_10828_io); m_maincpu->set_daisy_config(daisy_chain); diff --git a/src/devices/bus/abcbus/lux21046.cpp b/src/devices/bus/abcbus/lux21046.cpp index 03f8ab22d5b..61e03cfa4eb 100644 --- a/src/devices/bus/abcbus/lux21046.cpp +++ b/src/devices/bus/abcbus/lux21046.cpp @@ -292,7 +292,7 @@ static const z80_daisy_config z80_daisy_chain[] = void luxor_55_21046_device::device_add_mconfig(machine_config & config) { - Z80(config, m_maincpu, 16_MHz_XTAL / 4); + Z80(config, m_maincpu, 16_MHz_XTAL / 4); m_maincpu->set_daisy_config(z80_daisy_chain); m_maincpu->set_addrmap(AS_PROGRAM, &luxor_55_21046_device::luxor_55_21046_mem); m_maincpu->set_addrmap(AS_IO, &luxor_55_21046_device::luxor_55_21046_io); diff --git a/src/devices/bus/acorn/atom/discpack.cpp b/src/devices/bus/acorn/atom/discpack.cpp index 8d795e5ac4b..63a29d403f1 100644 --- a/src/devices/bus/acorn/atom/discpack.cpp +++ b/src/devices/bus/acorn/atom/discpack.cpp @@ -34,7 +34,7 @@ static void atom_floppies(device_slot_interface &device) ROM_START( discpack ) ROM_REGION(0x1000, "dos_rom", 0) - ROM_LOAD("dosrom.ic18", 0x0000, 0x1000, CRC(c431a9b7) SHA1(71ea0a4b8d9c3caf9718fc7cc279f4306a23b39c)) + ROM_LOAD("dosrom.ic15", 0x0000, 0x1000, CRC(c431a9b7) SHA1(71ea0a4b8d9c3caf9718fc7cc279f4306a23b39c)) ROM_END //------------------------------------------------- @@ -43,14 +43,12 @@ ROM_END void atom_discpack_device::device_add_mconfig(machine_config &config) { - I8271(config, m_fdc, 0); + I8271(config, m_fdc, 4_MHz_XTAL / 2); m_fdc->intrq_wr_callback().set(FUNC(atom_discpack_device::fdc_intrq_w)); m_fdc->hdl_wr_callback().set(FUNC(atom_discpack_device::motor_w)); m_fdc->opt_wr_callback().set(FUNC(atom_discpack_device::side_w)); - FLOPPY_CONNECTOR(config, m_floppy[0], atom_floppies, "525sssd", atom_discpack_device::floppy_formats); - m_floppy[0]->enable_sound(true); - FLOPPY_CONNECTOR(config, m_floppy[1], atom_floppies, nullptr, atom_discpack_device::floppy_formats); - m_floppy[1]->enable_sound(true); + FLOPPY_CONNECTOR(config, m_floppy[0], atom_floppies, "525sssd", atom_discpack_device::floppy_formats).enable_sound(true); + FLOPPY_CONNECTOR(config, m_floppy[1], atom_floppies, nullptr, atom_discpack_device::floppy_formats).enable_sound(true); } @@ -102,6 +100,7 @@ WRITE_LINE_MEMBER(atom_discpack_device::motor_w) { if (m_floppy[0]->get_device()) m_floppy[0]->get_device()->mon_w(!state); if (m_floppy[1]->get_device()) m_floppy[1]->get_device()->mon_w(!state); + m_fdc->ready_w(!state); } WRITE_LINE_MEMBER(atom_discpack_device::side_w) diff --git a/src/devices/bus/acorn/system/fdc.cpp b/src/devices/bus/acorn/system/fdc.cpp index 61fd022f335..398736eab9e 100644 --- a/src/devices/bus/acorn/system/fdc.cpp +++ b/src/devices/bus/acorn/system/fdc.cpp @@ -42,14 +42,12 @@ static void acorn_floppies(device_slot_interface &device) void acorn_fdc_device::device_add_mconfig(machine_config &config) { - I8271(config, m_fdc, 0); + I8271(config, m_fdc, 4_MHz_XTAL / 2); m_fdc->intrq_wr_callback().set(FUNC(acorn_fdc_device::bus_nmi_w)); m_fdc->hdl_wr_callback().set(FUNC(acorn_fdc_device::motor_w)); m_fdc->opt_wr_callback().set(FUNC(acorn_fdc_device::side_w)); - FLOPPY_CONNECTOR(config, m_floppy[0], acorn_floppies, "525qd", acorn_fdc_device::floppy_formats); - m_floppy[0]->enable_sound(true); - FLOPPY_CONNECTOR(config, m_floppy[1], acorn_floppies, "525qd", acorn_fdc_device::floppy_formats); - m_floppy[1]->enable_sound(true); + FLOPPY_CONNECTOR(config, m_floppy[0], acorn_floppies, "525qd", acorn_fdc_device::floppy_formats).enable_sound(true); + FLOPPY_CONNECTOR(config, m_floppy[1], acorn_floppies, "525qd", acorn_fdc_device::floppy_formats).enable_sound(true); } @@ -99,6 +97,7 @@ WRITE_LINE_MEMBER(acorn_fdc_device::motor_w) { if (m_floppy[0]->get_device()) m_floppy[0]->get_device()->mon_w(!state); if (m_floppy[1]->get_device()) m_floppy[1]->get_device()->mon_w(!state); + m_fdc->ready_w(!state); } WRITE_LINE_MEMBER(acorn_fdc_device::side_w) diff --git a/src/devices/bus/acorn/system/vib.cpp b/src/devices/bus/acorn/system/vib.cpp index f65cad7bb9b..69a5d2189a4 100644 --- a/src/devices/bus/acorn/system/vib.cpp +++ b/src/devices/bus/acorn/system/vib.cpp @@ -95,7 +95,7 @@ void acorn_vib_device::device_reset() space.install_readwrite_handler(0x0c00, 0x0c0f, 0, 0x10, 0, read8sm_delegate(FUNC(via6522_device::read), m_via6522.target()), write8sm_delegate(FUNC(via6522_device::write), m_via6522.target())); space.install_readwrite_handler(0x0c20, 0x0c21, 0, 0x1e, 0, read8_delegate(FUNC(acia6850_device::read), m_acia.target()), write8_delegate(FUNC(acia6850_device::write), m_acia.target())); - space.install_readwrite_handler(0x0c40, 0x0c43, 0, 0x1c, 0, read8_delegate(FUNC(i8255_device::read), m_ppi8255.target()), write8_delegate(FUNC(i8255_device::write), m_ppi8255.target())); + space.install_readwrite_handler(0x0c40, 0x0c43, 0, 0x1c, 0, read8sm_delegate(FUNC(i8255_device::read), m_ppi8255.target()), write8sm_delegate(FUNC(i8255_device::write), m_ppi8255.target())); } diff --git a/src/devices/bus/bbc/1mhzbus/1mhzbus.cpp b/src/devices/bus/bbc/1mhzbus/1mhzbus.cpp index 6fa2407aae7..06458b4d748 100644 --- a/src/devices/bus/bbc/1mhzbus/1mhzbus.cpp +++ b/src/devices/bus/bbc/1mhzbus/1mhzbus.cpp @@ -33,16 +33,6 @@ device_bbc_1mhzbus_interface::device_bbc_1mhzbus_interface(const machine_config } -//------------------------------------------------- -// ~device_bbc_1mhzbus_interface - destructor -//------------------------------------------------- - -device_bbc_1mhzbus_interface::~device_bbc_1mhzbus_interface() -{ -} - - - //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -62,15 +52,6 @@ bbc_1mhzbus_slot_device::bbc_1mhzbus_slot_device(const machine_config &mconfig, //------------------------------------------------- -// bbc_1mhzbus_slot_device - destructor -//------------------------------------------------- - -bbc_1mhzbus_slot_device::~bbc_1mhzbus_slot_device() -{ -} - - -//------------------------------------------------- // device_validity_check - //------------------------------------------------- @@ -107,10 +88,40 @@ void bbc_1mhzbus_slot_device::device_reset() { } -WRITE_LINE_MEMBER(bbc_1mhzbus_slot_device::rst_w) +//------------------------------------------------- +// read +//------------------------------------------------- + +READ8_MEMBER(bbc_1mhzbus_slot_device::fred_r) +{ + if (m_card) + return m_card->fred_r(space, offset); + else + return 0xff; +} + +READ8_MEMBER(bbc_1mhzbus_slot_device::jim_r) +{ + if (m_card) + return m_card->jim_r(space, offset); + else + return 0xff; +} + +//------------------------------------------------- +// write +//------------------------------------------------- + +WRITE8_MEMBER(bbc_1mhzbus_slot_device::fred_w) +{ + if (m_card) + m_card->fred_w(space, offset, data); +} + +WRITE8_MEMBER(bbc_1mhzbus_slot_device::jim_w) { if (m_card) - m_card->rst_w(state); + m_card->jim_w(space, offset, data); } //------------------------------------------------- @@ -122,6 +133,7 @@ WRITE_LINE_MEMBER(bbc_1mhzbus_slot_device::rst_w) //#include "teletext.h" //#include "ieee488.h" //#include "m5000.h" +//#include "scsi.h" //#include "multiform.h" #include "opus3.h" //#include "ramdisc.h" @@ -135,15 +147,17 @@ void bbc_1mhzbus_devices(device_slot_interface &device) { // device.option_add("teletext", BBC_TELETEXT); /* Acorn ANE01 Teletext Adapter */ // device.option_add("ieee488", BBC_IEEE488); /* Acorn ANK01 IEEE488 Interface */ -// device.option_add("m500", BBC_M500); /* Acorn ANV02 Music 500 */ + //device.option_add("m500", BBC_M500); /* Acorn ANV02 Music 500 */ + //device.option_add("awdd", BBC_AWDD); /* Acorn Winchester 110/130 */ +//..device.option_add("twdd", BBC_TWDD); /* Technomatic Winchester (Akhter Host Adaptor + ABD4070 */ // device.option_add("m2000", BBC_M2000); /* Hybrid Music 2000 MIDI Interface */ -// device.option_add("m3000", BBC_M3000); /* Hybrid Music 3000 Expander */ -// device.option_add("m5000", BBC_M5000); /* Hybrid Music 5000 Synthesiser */ -// device.option_add("multiform", BBC_MULTIFORM); /* Technomatic Multiform Z80 */ + //device.option_add("m3000", BBC_M3000); /* Hybrid Music 3000 Expander */ + //device.option_add("m5000", BBC_M5000); /* Hybrid Music 5000 Synthesiser */ + //device.option_add("multiform", BBC_MULTIFORM); /* Technomatic Multiform Z80 */ device.option_add("opus3", BBC_OPUS3); /* Opus Challenger 3 */ -// device.option_add("ramdisc", BBC_RAMDISC); /* Morley Electronics RAM Disc */ -// device.option_add("graduate", BBC_GRADUATE); /* The Torch Graduate G400/G800 */ + //device.option_add("ramdisc", BBC_RAMDISC); /* Morley Electronics RAM Disc */ + //device.option_add("graduate", BBC_GRADUATE); /* The Torch Graduate G400/G800 */ device.option_add("beebsid", BBC_BEEBSID); /* BeebSID */ -// device.option_add("prisma3", BBC_PRISMA3); /* PRISMA-3 - Millipede 1989 */ + //device.option_add("prisma3", BBC_PRISMA3); /* PRISMA-3 - Millipede 1989 */ device.option_add("cfa3000opt", CFA3000_OPT); /* Henson CFA 3000 Option Board */ } diff --git a/src/devices/bus/bbc/1mhzbus/1mhzbus.h b/src/devices/bus/bbc/1mhzbus/1mhzbus.h index 15e4721e556..c1229718494 100644 --- a/src/devices/bus/bbc/1mhzbus/1mhzbus.h +++ b/src/devices/bus/bbc/1mhzbus/1mhzbus.h @@ -80,33 +80,6 @@ //************************************************************************** -// CONSTANTS -//************************************************************************** - -#define BBC_1MHZBUS_SLOT_TAG "1mhzbus" - - -//************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_BBC_1MHZBUS_SLOT_ADD(_tag, _slot_intf, _def_slot) \ - MCFG_DEVICE_ADD(_tag, BBC_1MHZBUS_SLOT, 0) \ - MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) - -#define MCFG_BBC_PASSTHRU_1MHZBUS_SLOT_ADD() \ - MCFG_BBC_1MHZBUS_SLOT_ADD(BBC_1MHZBUS_SLOT_TAG, bbc_1mhzbus_devices, nullptr) \ - MCFG_BBC_1MHZBUS_SLOT_IRQ_HANDLER(WRITELINE(DEVICE_SELF_OWNER, bbc_1mhzbus_slot_device, irq_w)) \ - MCFG_BBC_1MHZBUS_SLOT_NMI_HANDLER(WRITELINE(DEVICE_SELF_OWNER, bbc_1mhzbus_slot_device, nmi_w)) - -#define MCFG_BBC_1MHZBUS_SLOT_IRQ_HANDLER(_devcb) \ - downcast<bbc_1mhzbus_slot_device &>(*device).set_irq_handler(DEVCB_##_devcb); - -#define MCFG_BBC_1MHZBUS_SLOT_NMI_HANDLER(_devcb) \ - downcast<bbc_1mhzbus_slot_device &>(*device).set_nmi_handler(DEVCB_##_devcb); - - -//************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -118,14 +91,27 @@ class bbc_1mhzbus_slot_device : public device_t, public device_slot_interface { public: // construction/destruction - bbc_1mhzbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual ~bbc_1mhzbus_slot_device(); + template <typename T> + bbc_1mhzbus_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) + : bbc_1mhzbus_slot_device(mconfig, tag, owner) + { + option_reset(); + slot_options(*this); + set_default_option(default_option); + set_fixed(false); + } + + bbc_1mhzbus_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); // callbacks - template <class Object> devcb_base &set_irq_handler(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_nmi_handler(Object &&cb) { return m_nmi_handler.set_callback(std::forward<Object>(cb)); } + auto irq_handler() { return m_irq_handler.bind(); } + auto nmi_handler() { return m_nmi_handler.bind(); } + + virtual DECLARE_READ8_MEMBER(fred_r); + virtual DECLARE_WRITE8_MEMBER(fred_w); + virtual DECLARE_READ8_MEMBER(jim_r); + virtual DECLARE_WRITE8_MEMBER(jim_w); - DECLARE_WRITE_LINE_MEMBER( rst_w ); DECLARE_WRITE_LINE_MEMBER( irq_w ) { m_irq_handler(state); } DECLARE_WRITE_LINE_MEMBER( nmi_w ) { m_nmi_handler(state); } @@ -148,10 +134,10 @@ private: class device_bbc_1mhzbus_interface : public device_slot_card_interface { public: - // construction/destruction - virtual ~device_bbc_1mhzbus_interface(); - - virtual DECLARE_WRITE_LINE_MEMBER(rst_w) { } + virtual DECLARE_READ8_MEMBER(fred_r) { return 0xff; } + virtual DECLARE_WRITE8_MEMBER(fred_w) { } + virtual DECLARE_READ8_MEMBER(jim_r) { return 0xff; } + virtual DECLARE_WRITE8_MEMBER(jim_w) { } protected: device_bbc_1mhzbus_interface(const machine_config &mconfig, device_t &device); diff --git a/src/devices/bus/bbc/1mhzbus/beebsid.cpp b/src/devices/bus/bbc/1mhzbus/beebsid.cpp index c2e9509b658..1906914840b 100644 --- a/src/devices/bus/bbc/1mhzbus/beebsid.cpp +++ b/src/devices/bus/bbc/1mhzbus/beebsid.cpp @@ -13,13 +13,6 @@ //************************************************************************** -// MACROS / CONSTANTS -//************************************************************************** - -#define MOS8580_TAG "mos8580" - - -//************************************************************************** // DEVICE DEFINITIONS //************************************************************************** @@ -30,13 +23,16 @@ DEFINE_DEVICE_TYPE(BBC_BEEBSID, bbc_beebsid_device, "beebsid", "BeebSID") // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(bbc_beebsid_device::device_add_mconfig) +void bbc_beebsid_device::device_add_mconfig(machine_config &config) +{ SPEAKER(config, "speaker").front_center(); - MCFG_DEVICE_ADD(MOS8580_TAG, MOS8580, XTAL(16'000'000) / 16) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.0) + MOS8580(config, m_sid, 16_MHz_XTAL / 16); + m_sid->add_route(ALL_OUTPUTS, "speaker", 1.0); - MCFG_BBC_PASSTHRU_1MHZBUS_SLOT_ADD() -MACHINE_CONFIG_END + BBC_1MHZBUS_SLOT(config, m_1mhzbus, bbc_1mhzbus_devices, nullptr); + m_1mhzbus->irq_handler().set(DEVICE_SELF_OWNER, FUNC(bbc_1mhzbus_slot_device::irq_w)); + m_1mhzbus->nmi_handler().set(DEVICE_SELF_OWNER, FUNC(bbc_1mhzbus_slot_device::nmi_w)); +} //************************************************************************** @@ -50,7 +46,8 @@ MACHINE_CONFIG_END bbc_beebsid_device::bbc_beebsid_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, BBC_BEEBSID, tag, owner, clock), device_bbc_1mhzbus_interface(mconfig, *this), - m_sid(*this, MOS8580_TAG) + m_1mhzbus(*this, "1mhzbus"), + m_sid(*this, "mos8580") { } @@ -61,7 +58,47 @@ bbc_beebsid_device::bbc_beebsid_device(const machine_config &mconfig, const char void bbc_beebsid_device::device_start() { - address_space& space = machine().device("maincpu")->memory().space(AS_PROGRAM); +} + + +//************************************************************************** +// IMPLEMENTATION +//************************************************************************** + +READ8_MEMBER(bbc_beebsid_device::fred_r) +{ + uint8_t data = 0xff; - space.install_readwrite_handler(0xfc20, 0xfc3f, read8_delegate(FUNC(mos8580_device::read), (mos8580_device*)m_sid), write8_delegate(FUNC(mos8580_device::write), (mos8580_device*)m_sid)); + if (offset >= 0x20 && offset < 0x40) + { + data = m_sid->read(space, offset); + } + + data &= m_1mhzbus->fred_r(space, offset); + + return data; +} + +WRITE8_MEMBER(bbc_beebsid_device::fred_w) +{ + if (offset >= 0x20 && offset < 0x40) + { + m_sid->write(space, offset, data); + } + + m_1mhzbus->fred_w(space, offset, data); +} + +READ8_MEMBER(bbc_beebsid_device::jim_r) +{ + uint8_t data = 0xff; + + data &= m_1mhzbus->jim_r(space, offset); + + return data; +} + +WRITE8_MEMBER(bbc_beebsid_device::jim_w) +{ + m_1mhzbus->jim_w(space, offset, data); } diff --git a/src/devices/bus/bbc/1mhzbus/beebsid.h b/src/devices/bus/bbc/1mhzbus/beebsid.h index 30e20bf07d7..d78d5486c10 100644 --- a/src/devices/bus/bbc/1mhzbus/beebsid.h +++ b/src/devices/bus/bbc/1mhzbus/beebsid.h @@ -34,7 +34,13 @@ protected: // optional information overrides virtual void device_add_mconfig(machine_config &config) override; + virtual DECLARE_READ8_MEMBER(fred_r) override; + virtual DECLARE_WRITE8_MEMBER(fred_w) override; + virtual DECLARE_READ8_MEMBER(jim_r) override; + virtual DECLARE_WRITE8_MEMBER(jim_w) override; + private: + required_device<bbc_1mhzbus_slot_device> m_1mhzbus; required_device<mos8580_device> m_sid; }; diff --git a/src/devices/bus/bbc/1mhzbus/cfa3000opt.cpp b/src/devices/bus/bbc/1mhzbus/cfa3000opt.cpp index 63f2229b27a..0946d9cdf82 100644 --- a/src/devices/bus/bbc/1mhzbus/cfa3000opt.cpp +++ b/src/devices/bus/bbc/1mhzbus/cfa3000opt.cpp @@ -91,26 +91,20 @@ cfa3000_opt_device::cfa3000_opt_device(const machine_config &mconfig, const char void cfa3000_opt_device::device_start() { - address_space& space = machine().device("maincpu")->memory().space(AS_PROGRAM); - m_slot = dynamic_cast<bbc_1mhzbus_slot_device *>(owner()); - - space.install_read_handler(0xfcc2, 0xfcc2, read8_delegate(FUNC(cfa3000_opt_device::option_r), this)); } -//------------------------------------------------- -// device_reset - device-specific reset -//------------------------------------------------- - -void cfa3000_opt_device::device_reset() -{ -} - //************************************************************************** // IMPLEMENTATION //************************************************************************** -READ8_MEMBER(cfa3000_opt_device::option_r) +READ8_MEMBER(cfa3000_opt_device::fred_r) { - return m_opt->read(); + uint8_t data = 0xff; + + if (offset == 0xc2) + { + data = m_opt->read(); + } + return data; } diff --git a/src/devices/bus/bbc/1mhzbus/cfa3000opt.h b/src/devices/bus/bbc/1mhzbus/cfa3000opt.h index e372a14b51b..5a4e413754b 100644 --- a/src/devices/bus/bbc/1mhzbus/cfa3000opt.h +++ b/src/devices/bus/bbc/1mhzbus/cfa3000opt.h @@ -28,16 +28,15 @@ public: // construction/destruction cfa3000_opt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ8_MEMBER(option_r); - protected: // device-level overrides virtual void device_start() override; - virtual void device_reset() override; // optional information overrides virtual ioport_constructor device_input_ports() const override; + virtual DECLARE_READ8_MEMBER(fred_r) override; + private: required_ioport m_opt; }; diff --git a/src/devices/bus/bbc/1mhzbus/opus3.cpp b/src/devices/bus/bbc/1mhzbus/opus3.cpp index ed204430bbe..0b39d5993ff 100644 --- a/src/devices/bus/bbc/1mhzbus/opus3.cpp +++ b/src/devices/bus/bbc/1mhzbus/opus3.cpp @@ -70,11 +70,11 @@ ROM_START( opus3 ) ROM_REGION(0x4000, "dfs_rom", 0) ROM_DEFAULT_BIOS("ch103") ROM_SYSTEM_BIOS(0, "ch100", "Challenger 1.00") - ROMX_LOAD("ch100.rom", 0x0000, 0x4000, CRC(740a8335) SHA1(f3c75c21bcd7d4a4dfff922fd287230dcdb91d0e), ROM_BIOS(0)) + ROMX_LOAD("chal100.rom", 0x0000, 0x4000, CRC(740a8335) SHA1(f3c75c21bcd7d4a4dfff922fd287230dcdb91d0e), ROM_BIOS(0)) ROM_SYSTEM_BIOS(1, "ch101", "Challenger 1.01") - ROMX_LOAD("ch101.rom", 0x0000, 0x4000, CRC(2f64503d) SHA1(37ee3f20bed50555720703b279f62aab0ed28922), ROM_BIOS(1)) + ROMX_LOAD("chal101.rom", 0x0000, 0x4000, CRC(2f64503d) SHA1(37ee3f20bed50555720703b279f62aab0ed28922), ROM_BIOS(1)) ROM_SYSTEM_BIOS(2, "ch103", "Challenger 1.03") - ROMX_LOAD("ch103.rom", 0x0000, 0x4000, CRC(98367cf4) SHA1(eca3631aa420691f96b72bfdf2e9c2b613e1bf33), ROM_BIOS(2)) + ROMX_LOAD("chal103.rom", 0x0000, 0x4000, CRC(98367cf4) SHA1(eca3631aa420691f96b72bfdf2e9c2b613e1bf33), ROM_BIOS(2)) ROM_END //------------------------------------------------- @@ -86,8 +86,9 @@ void bbc_opus3_device::device_add_mconfig(machine_config &config) /* fdc */ WD1770(config, m_fdc, 16_MHz_XTAL / 2); m_fdc->drq_wr_callback().set(FUNC(bbc_opus3_device::fdc_drq_w)); + FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies, "525qd", floppy_formats).enable_sound(true); - FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies, "525qd", floppy_formats).enable_sound(true); + FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies, nullptr, floppy_formats).enable_sound(true); /* ram disk */ RAM(config, m_ramdisk).set_default_size("512K").set_extra_options("256K").set_default_value(0); @@ -113,7 +114,8 @@ bbc_opus3_device::bbc_opus3_device(const machine_config &mconfig, const char *ta m_ramdisk(*this, "ramdisk"), m_fdc(*this, "wd1770"), m_floppy0(*this, "wd1770:0"), - m_floppy1(*this, "wd1770:1") + m_floppy1(*this, "wd1770:1"), + m_ramdisk_page(0) { } @@ -123,13 +125,6 @@ bbc_opus3_device::bbc_opus3_device(const machine_config &mconfig, const char *ta void bbc_opus3_device::device_start() { - address_space& space = machine().device("maincpu")->memory().space(AS_PROGRAM); - m_slot = dynamic_cast<bbc_1mhzbus_slot_device *>(owner()); - - space.install_readwrite_handler(0xfcf8, 0xfcfb, read8sm_delegate(FUNC(wd1770_device::read), m_fdc.target()), write8sm_delegate(FUNC(wd1770_device::write), m_fdc.target())); - space.install_write_handler(0xfcfc, 0xfcfc, WRITE8_DELEGATE(bbc_opus3_device, wd1770l_write)); - space.install_write_handler(0xfcfe, 0xfcff, WRITE8_DELEGATE(bbc_opus3_device, page_w)); - space.install_readwrite_handler(0xfd00, 0xfdff, READ8_DELEGATE(bbc_opus3_device, ramdisk_r), WRITE8_DELEGATE(bbc_opus3_device, ramdisk_w)); } //------------------------------------------------- @@ -146,24 +141,57 @@ void bbc_opus3_device::device_reset() // IMPLEMENTATION //************************************************************************** -WRITE8_MEMBER(bbc_opus3_device::wd1770l_write) +READ8_MEMBER(bbc_opus3_device::fred_r) { - floppy_image_device *floppy = nullptr; + uint8_t data = 0xff; - // bit 1, 2: drive select - if (BIT(data, 1)) floppy = m_floppy0->get_device(); - if (BIT(data, 2)) floppy = m_floppy1->get_device(); - m_fdc->set_floppy(floppy); - - // bit 0: side select - if (floppy) - floppy->ss_w(BIT(data, 0)); + switch (offset) + { + case 0xf8: + case 0xf9: + case 0xfa: + case 0xfb: + data = m_fdc->read(offset & 0x03); + break; + } + return data; +} - // bit 4: interrupt enabled - m_fdc_ie = BIT(data, 4); +WRITE8_MEMBER(bbc_opus3_device::fred_w) +{ + floppy_image_device *floppy = nullptr; - // bit 5: density - m_fdc->dden_w(BIT(data, 5)); + switch (offset) + { + case 0xf8: + case 0xf9: + case 0xfa: + case 0xfb: + m_fdc->write(offset & 0x03, data); + break; + case 0xfc: + // bit 1, 2: drive select + if (BIT(data, 1)) floppy = m_floppy0->get_device(); + if (BIT(data, 2)) floppy = m_floppy1->get_device(); + m_fdc->set_floppy(floppy); + + // bit 0: side select + if (floppy) + floppy->ss_w(BIT(data, 0)); + + // bit 4: interrupt enabled + m_fdc_ie = BIT(data, 4); + + // bit 5: density + m_fdc->dden_w(BIT(data, 5)); + break; + case 0xfe: + m_ramdisk_page = (m_ramdisk_page & 0x00ff) | (data << 8); + break; + case 0xff: + m_ramdisk_page = (m_ramdisk_page & 0xff00) | (data << 0); + break; + } } WRITE_LINE_MEMBER(bbc_opus3_device::fdc_drq_w) @@ -173,16 +201,7 @@ WRITE_LINE_MEMBER(bbc_opus3_device::fdc_drq_w) m_slot->nmi_w((m_fdc_drq && m_fdc_ie) ? ASSERT_LINE : CLEAR_LINE); } -WRITE8_MEMBER(bbc_opus3_device::page_w) -{ - switch (offset) - { - case 0x00: m_ramdisk_page = (m_ramdisk_page & 0x00ff) | (data << 8); break; - case 0x01: m_ramdisk_page = (m_ramdisk_page & 0xff00) | (data << 0); break; - } -} - -READ8_MEMBER(bbc_opus3_device::ramdisk_r) +READ8_MEMBER(bbc_opus3_device::jim_r) { if ((m_ramdisk_page << 8) < m_ramdisk->size()) return m_ramdisk->read((m_ramdisk_page << 8) + offset); @@ -190,7 +209,7 @@ READ8_MEMBER(bbc_opus3_device::ramdisk_r) return 0xff; } -WRITE8_MEMBER(bbc_opus3_device::ramdisk_w) +WRITE8_MEMBER(bbc_opus3_device::jim_w) { if ((m_ramdisk_page << 8) < m_ramdisk->size()) m_ramdisk->write((m_ramdisk_page << 8) + offset, data); diff --git a/src/devices/bus/bbc/1mhzbus/opus3.h b/src/devices/bus/bbc/1mhzbus/opus3.h index 826906a584f..1e3e1a4065d 100644 --- a/src/devices/bus/bbc/1mhzbus/opus3.h +++ b/src/devices/bus/bbc/1mhzbus/opus3.h @@ -28,11 +28,6 @@ public: // construction/destruction bbc_opus3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_WRITE8_MEMBER(wd1770l_write); - DECLARE_WRITE8_MEMBER(page_w); - DECLARE_READ8_MEMBER(ramdisk_r); - DECLARE_WRITE8_MEMBER(ramdisk_w); - protected: // device-level overrides virtual void device_start() override; @@ -42,6 +37,11 @@ protected: virtual void device_add_mconfig(machine_config &config) override; virtual const tiny_rom_entry *device_rom_region() const override; + virtual DECLARE_READ8_MEMBER(fred_r) override; + virtual DECLARE_WRITE8_MEMBER(fred_w) override; + virtual DECLARE_READ8_MEMBER(jim_r) override; + virtual DECLARE_WRITE8_MEMBER(jim_w) override; + private: DECLARE_FLOPPY_FORMATS(floppy_formats); diff --git a/src/devices/bus/bbc/analogue/analogue.cpp b/src/devices/bus/bbc/analogue/analogue.cpp index 226bc69bf0f..facc1a827bc 100644 --- a/src/devices/bus/bbc/analogue/analogue.cpp +++ b/src/devices/bus/bbc/analogue/analogue.cpp @@ -33,15 +33,6 @@ device_bbc_analogue_interface::device_bbc_analogue_interface(const machine_confi } -//------------------------------------------------- -// ~device_bbc_analogue_interface - destructor -//------------------------------------------------- - -device_bbc_analogue_interface::~device_bbc_analogue_interface() -{ -} - - //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -52,7 +43,9 @@ device_bbc_analogue_interface::~device_bbc_analogue_interface() bbc_analogue_slot_device::bbc_analogue_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, BBC_ANALOGUE_SLOT, tag, owner, clock), - device_slot_interface(mconfig, *this) + device_slot_interface(mconfig, *this), + m_card(nullptr), + m_lpstb_handler(*this) { } @@ -71,8 +64,12 @@ void bbc_analogue_slot_device::device_validity_check(validity_checker &valid) co void bbc_analogue_slot_device::device_start() { device_t *const carddev = get_card_device(); - if (carddev && !dynamic_cast<device_bbc_analogue_interface *>(carddev)) + m_card = dynamic_cast<device_bbc_analogue_interface *>(get_card_device()); + if (carddev && !m_card) osd_printf_error("Card device %s (%s) does not implement device_bbc_analogue_interface\n", carddev->tag(), carddev->name()); + + // resolve callbacks + m_lpstb_handler.resolve_safe(); } uint8_t bbc_analogue_slot_device::ch_r(int channel) @@ -107,6 +104,9 @@ void bbc_analogue_slot_device::device_reset() // slot devices #include "joystick.h" +#include "bitstik.h" +//#include "lightpen.h" +//#include "micromike.h" //#include "quinkey.h" #include "cfa3000a.h" @@ -114,7 +114,11 @@ void bbc_analogue_slot_device::device_reset() void bbc_analogue_devices(device_slot_interface &device) { device.option_add("acornjoy", BBC_ACORNJOY); /* Acorn ANH01 Joysticks */ + device.option_add("bitstik1", BBC_BITSTIK1); /* Acorn ANF04 Bitstik */ + device.option_add("bitstik2", BBC_BITSTIK2); /* Robocom Bitstik 2 */ + //device.option_add("lightpen", BBC_LIGHTPEN); /* RH Electronics Lightpen */ + //device.option_add("micromike", BBC_MICROMIKE); /* Micro Mike */ device.option_add("voltmace3b", BBC_VOLTMACE3B); /* Voltmace Delta 3b "Twin" Joysticks */ -// device.option_add("quinkey", BBC_QUINKEY); /* Microwriter Quinkey */ + //device.option_add("quinkey", BBC_QUINKEY); /* Microwriter Quinkey */ device.option_add("cfa3000a", CFA3000_ANLG); /* Hanson CFA 3000 Analogue */ } diff --git a/src/devices/bus/bbc/analogue/analogue.h b/src/devices/bus/bbc/analogue/analogue.h index 6e9cc8a9eae..d8aec89e012 100644 --- a/src/devices/bus/bbc/analogue/analogue.h +++ b/src/devices/bus/bbc/analogue/analogue.h @@ -34,21 +34,6 @@ //************************************************************************** -// CONSTANTS -//************************************************************************** - -#define BBC_ANALOGUE_SLOT_TAG "analogue" - - -//************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_BBC_ANALOGUE_SLOT_ADD(_tag, _slot_intf, _def_slot) \ - MCFG_DEVICE_ADD(_tag, BBC_ANALOGUE_SLOT, 0) \ - MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) - -//************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -60,7 +45,22 @@ class bbc_analogue_slot_device : public device_t, public device_slot_interface { public: // construction/destruction - bbc_analogue_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + template <typename T> + bbc_analogue_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) + : bbc_analogue_slot_device(mconfig, tag, owner) + { + option_reset(); + slot_options(*this); + set_default_option(default_option); + set_fixed(false); + } + + bbc_analogue_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); + + // callbacks + auto lpstb_handler() { return m_lpstb_handler.bind(); } + + DECLARE_WRITE_LINE_MEMBER(lpstb_w) { m_lpstb_handler(state); } uint8_t ch_r(int channel); uint8_t pb_r(); @@ -72,6 +72,9 @@ protected: virtual void device_reset() override; device_bbc_analogue_interface *m_card; + +private: + devcb_write_line m_lpstb_handler; }; @@ -80,9 +83,6 @@ protected: class device_bbc_analogue_interface : public device_slot_card_interface { public: - // construction/destruction - virtual ~device_bbc_analogue_interface(); - virtual uint8_t ch_r(int channel) { return 0x00; }; virtual uint8_t pb_r() { return 0x30; }; diff --git a/src/devices/bus/bbc/analogue/bitstik.cpp b/src/devices/bus/bbc/analogue/bitstik.cpp new file mode 100644 index 00000000000..42d8fff9504 --- /dev/null +++ b/src/devices/bus/bbc/analogue/bitstik.cpp @@ -0,0 +1,143 @@ +// license:BSD-3-Clause +// copyright-holders:Nigel Barnes +/********************************************************************** + + Acorn ANF04 Bitstik + + http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_BitStik.html + + Robocom Bitstik 2 + +**********************************************************************/ + +#include "emu.h" +#include "bitstik.h" + +//************************************************************************** +// DEVICE DEFINITIONS +//************************************************************************** + +DEFINE_DEVICE_TYPE(BBC_BITSTIK1, bbc_bitstik1_device, "bbc_bitstik1", "Acorn Bitstik") +DEFINE_DEVICE_TYPE(BBC_BITSTIK2, bbc_bitstik2_device, "bbc_bitstik2", "Robo Bitstik 2") + +//------------------------------------------------- +// ROM( bitstik ) +//------------------------------------------------- + +ROM_START(bitstik1) + ROM_REGION(0x4000, "rom", 0) + ROM_LOAD("bitstik1.rom", 0x0000, 0x2000, CRC(a3c539f8) SHA1(c6f2cf2f6d1e48819a8381c6a1c97ca8fa5ab117)) + ROM_RELOAD(0x2000, 0x2000) +ROM_END + +ROM_START(bitstik2) + ROM_REGION(0x4000, "rom", 0) + ROM_LOAD("bitstik2.rom", 0x0000, 0x2000, CRC(a2b5a743) SHA1(4d0040af6bdc6a587e42d4aa36d528b768cf9549)) + ROM_RELOAD(0x2000, 0x2000) +ROM_END + +//------------------------------------------------- +// INPUT_PORTS( bitstik ) +//------------------------------------------------- + +static INPUT_PORTS_START(bitstik) + PORT_START("CHANNEL0") + PORT_BIT(0xff, 0x00, IPT_AD_STICK_X) PORT_MINMAX(0x00, 0xff) PORT_SENSITIVITY(25) PORT_KEYDELTA(200) PORT_NAME("AD Stick X") PORT_REVERSE + + PORT_START("CHANNEL1") + PORT_BIT(0xff, 0x00, IPT_AD_STICK_Y) PORT_MINMAX(0x00, 0xff) PORT_SENSITIVITY(25) PORT_KEYDELTA(200) PORT_NAME("AD Stick Y") PORT_REVERSE + + PORT_START("CHANNEL2") + PORT_BIT(0xff, 0x00, IPT_AD_STICK_Z) PORT_MINMAX(0x00, 0xff) PORT_SENSITIVITY(25) PORT_KEYDELTA(200) PORT_NAME("AD Stick Z") PORT_REVERSE + + PORT_START("CHANNEL3") + PORT_BIT(0xff, IP_ACTIVE_HIGH, IPT_BUTTON3) PORT_NAME("Right Button - Release") + + PORT_START("BUTTONS") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_BUTTON1) PORT_NAME("Top Button - Execute") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_BUTTON2) PORT_NAME("Left Button - Confirm") +INPUT_PORTS_END + +//------------------------------------------------- +// input_ports - device-specific input ports +//------------------------------------------------- + +ioport_constructor bbc_bitstik_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(bitstik); +} + +//------------------------------------------------- +// rom_region - device-specific ROM region +//------------------------------------------------- + +const tiny_rom_entry *bbc_bitstik1_device::device_rom_region() const +{ + return ROM_NAME(bitstik1); +} + +const tiny_rom_entry *bbc_bitstik2_device::device_rom_region() const +{ + return ROM_NAME(bitstik2); +} + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +//------------------------------------------------- +// bbc_bitstik_device - constructor +//------------------------------------------------- + +bbc_bitstik_device::bbc_bitstik_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, type, tag, owner, clock), + device_bbc_analogue_interface(mconfig, *this), + m_channel(*this, "CHANNEL%u", 0), + m_buttons(*this, "BUTTONS"), + m_rom(*this, "rom") +{ +} + +bbc_bitstik1_device::bbc_bitstik1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + bbc_bitstik_device(mconfig, BBC_BITSTIK1, tag, owner, clock) +{ +} + +bbc_bitstik2_device::bbc_bitstik2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + bbc_bitstik_device(mconfig, BBC_BITSTIK2, tag, owner, clock) +{ +} + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void bbc_bitstik_device::device_start() +{ +} + + +//------------------------------------------------- +// device_reset - device-specific reset +//------------------------------------------------- + +void bbc_bitstik_device::device_reset() +{ + machine().root_device().membank("bank4")->configure_entry(13, memregion("rom")->base()); +} + + +//************************************************************************** +// IMPLEMENTATION +//************************************************************************** + +uint8_t bbc_bitstik_device::ch_r(int channel) +{ + return m_channel[channel]->read(); +} + +uint8_t bbc_bitstik_device::pb_r() +{ + return m_buttons->read() & 0x30; +} diff --git a/src/devices/bus/bbc/analogue/bitstik.h b/src/devices/bus/bbc/analogue/bitstik.h new file mode 100644 index 00000000000..3319bfe0c2e --- /dev/null +++ b/src/devices/bus/bbc/analogue/bitstik.h @@ -0,0 +1,75 @@ +// license:BSD-3-Clause +// copyright-holders:Nigel Barnes +/********************************************************************** + + Acorn ANF04 Bitstik + + http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_BitStik.html + + Robocom Bitstik 2 + +**********************************************************************/ + + +#ifndef MAME_BUS_BBC_ANALOGUE_BITSTIK_H +#define MAME_BUS_BBC_ANALOGUE_BITSTIK_H + +#pragma once + + +#include "analogue.h" + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> bbc_bitstik_device + +class bbc_bitstik_device : + public device_t, + public device_bbc_analogue_interface +{ +protected: + // construction/destruction + bbc_bitstik_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + // optional information overrides + virtual ioport_constructor device_input_ports() const override; + + virtual uint8_t ch_r(int channel) override; + virtual uint8_t pb_r() override; + +private: + required_ioport_array<4> m_channel; + required_ioport m_buttons; + required_memory_region m_rom; +}; + +class bbc_bitstik1_device : public bbc_bitstik_device +{ +public: + bbc_bitstik1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual const tiny_rom_entry *device_rom_region() const override; +}; + +class bbc_bitstik2_device : public bbc_bitstik_device +{ +public: + bbc_bitstik2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual const tiny_rom_entry *device_rom_region() const override; +}; + +// device type definition +DECLARE_DEVICE_TYPE(BBC_BITSTIK1, bbc_bitstik1_device) +DECLARE_DEVICE_TYPE(BBC_BITSTIK2, bbc_bitstik2_device) + + +#endif // MAME_BUS_BBC_ANALOGUE_BITSTIK_H diff --git a/src/devices/bus/bbc/analogue/cfa3000a.cpp b/src/devices/bus/bbc/analogue/cfa3000a.cpp index da163200c2c..0dfd692df12 100644 --- a/src/devices/bus/bbc/analogue/cfa3000a.cpp +++ b/src/devices/bus/bbc/analogue/cfa3000a.cpp @@ -96,5 +96,5 @@ uint8_t cfa3000_anlg_device::ch_r(int channel) uint8_t cfa3000_anlg_device::pb_r() { - return m_buttons->read(); + return m_buttons->read() & 0x30; } diff --git a/src/devices/bus/bbc/analogue/joystick.cpp b/src/devices/bus/bbc/analogue/joystick.cpp index e67abff9e22..a6e37ebb3ba 100644 --- a/src/devices/bus/bbc/analogue/joystick.cpp +++ b/src/devices/bus/bbc/analogue/joystick.cpp @@ -130,5 +130,5 @@ uint8_t bbc_joystick_device::ch_r(int channel) uint8_t bbc_joystick_device::pb_r() { - return m_buttons->read(); + return m_buttons->read() & 0x30; } diff --git a/src/devices/bus/bbc/fdc/acorn.cpp b/src/devices/bus/bbc/fdc/acorn.cpp index 21d4f710637..e2ae28fdf0c 100644 --- a/src/devices/bus/bbc/fdc/acorn.cpp +++ b/src/devices/bus/bbc/fdc/acorn.cpp @@ -100,15 +100,15 @@ ROM_START( acorn1770 ) ROM_DEFAULT_BIOS("dfs223") // Acorn ROM_SYSTEM_BIOS(0, "dfs210", "Acorn DFS 2.10") - ROMX_LOAD("dfs v2.10,1985,acorn.bin", 0x0000, 0x4000, CRC(4f828787) SHA1(112a315e1598cb4db2abcfe9d89fcd97444b276d), ROM_BIOS(0)) + ROMX_LOAD("dfs v2.10,acorn.rom", 0x0000, 0x4000, CRC(4f828787) SHA1(112a315e1598cb4db2abcfe9d89fcd97444b276d), ROM_BIOS(0)) ROM_SYSTEM_BIOS(1, "dfs220", "Acorn DFS 2.20") - ROMX_LOAD("dfs v2.20,1986,acorn.bin", 0x0000, 0x4000, CRC(2844001e) SHA1(d72f11af35756ac648095ba1992211cf6741dd80), ROM_BIOS(1)) + ROMX_LOAD("dfs v2.20,acorn.rom", 0x0000, 0x4000, CRC(2844001e) SHA1(d72f11af35756ac648095ba1992211cf6741dd80), ROM_BIOS(1)) ROM_SYSTEM_BIOS(2, "dfs223", "Acorn DFS 2.23") - ROMX_LOAD("dfs v2.23,1986,acorn.bin", 0x0000, 0x4000, CRC(7891f9b7) SHA1(0d7ed0b0b3852cb61970ada1993244f2896896aa), ROM_BIOS(2)) + ROMX_LOAD("dfs v2.23,acorn.rom", 0x0000, 0x4000, CRC(7891f9b7) SHA1(0d7ed0b0b3852cb61970ada1993244f2896896aa), ROM_BIOS(2)) ROM_SYSTEM_BIOS(3, "dfs225", "Acorn DFS 2.25") - ROMX_LOAD("dfs v2.25,1986,acorn.bin", 0x0000, 0x4000, CRC(f855a75b) SHA1(f11271748e6303c60182955e5fa478624b616fcf), ROM_BIOS(3)) + ROMX_LOAD("dfs v2.25,acorn.rom", 0x0000, 0x4000, CRC(f855a75b) SHA1(f11271748e6303c60182955e5fa478624b616fcf), ROM_BIOS(3)) ROM_SYSTEM_BIOS(4, "dfs226", "Acorn DFS 2.26") - ROMX_LOAD("dfs v2.26,1986,acorn.bin", 0x0000, 0x4000, CRC(5ae33e94) SHA1(cf2ebc422a8d24ec6f1a0320520c38a0e704109a), ROM_BIOS(4)) + ROMX_LOAD("dfs v2.26,acorn.rom", 0x0000, 0x4000, CRC(5ae33e94) SHA1(cf2ebc422a8d24ec6f1a0320520c38a0e704109a), ROM_BIOS(4)) // Advanced Computer Products ROM_SYSTEM_BIOS(5, "acp108", "Advanced 1770 DFS 1.08") ROMX_LOAD("advanced 1770 dfs 1.08,acp.rom", 0x0000, 0x4000, CRC(eb0eaa34) SHA1(d16ba3c8ed5e5ab6af62aad13a8e567b1c3639c2), ROM_BIOS(5)) @@ -121,21 +121,23 @@ ROM_END // device_add_mconfig - add device configuration //------------------------------------------------- -void bbc_acorn8271_device::device_add_mconfig(machine_config & config) +void bbc_acorn8271_device::device_add_mconfig(machine_config &config) { - I8271(config, m_fdc, 0); + I8271(config, m_fdc, 16_MHz_XTAL / 8); m_fdc->intrq_wr_callback().set(FUNC(bbc_acorn8271_device::fdc_intrq_w)); m_fdc->hdl_wr_callback().set(FUNC(bbc_acorn8271_device::motor_w)); m_fdc->opt_wr_callback().set(FUNC(bbc_acorn8271_device::side_w)); + FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies_525, "525qd", bbc_acorn8271_device::floppy_formats).enable_sound(true); FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies_525, "525qd", bbc_acorn8271_device::floppy_formats).enable_sound(true); } -void bbc_acorn1770_device::device_add_mconfig(machine_config & config) +void bbc_acorn1770_device::device_add_mconfig(machine_config &config) { - WD1770(config, m_fdc, XTAL(16'000'000) / 2); + WD1770(config, m_fdc, 16_MHz_XTAL / 2); m_fdc->intrq_wr_callback().set(FUNC(bbc_acorn1770_device::fdc_intrq_w)); m_fdc->drq_wr_callback().set(FUNC(bbc_acorn1770_device::fdc_drq_w)); + FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies_525, "525qd", bbc_acorn8271_device::floppy_formats).enable_sound(true); FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies_525, "525qd", bbc_acorn8271_device::floppy_formats).enable_sound(true); } @@ -160,22 +162,23 @@ const tiny_rom_entry *bbc_acorn1770_device::device_rom_region() const //------------------------------------------------- bbc_acorn8271_device::bbc_acorn8271_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, BBC_ACORN8271, tag, owner, clock), - device_bbc_fdc_interface(mconfig, *this), - m_dfs_rom(*this, "dfs_rom"), - m_fdc(*this, "i8271"), - m_floppy0(*this, "i8271:0"), - m_floppy1(*this, "i8271:1") + : device_t(mconfig, BBC_ACORN8271, tag, owner, clock) + , device_bbc_fdc_interface(mconfig, *this) + , m_dfs_rom(*this, "dfs_rom") + , m_fdc(*this, "i8271") + , m_floppy0(*this, "i8271:0") + , m_floppy1(*this, "i8271:1") { } bbc_acorn1770_device::bbc_acorn1770_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, BBC_ACORN1770, tag, owner, clock), - device_bbc_fdc_interface(mconfig, *this), - m_dfs_rom(*this, "dfs_rom"), - m_fdc(*this, "wd1770"), - m_floppy0(*this, "wd1770:0"), - m_floppy1(*this, "wd1770:1") + : device_t(mconfig, BBC_ACORN1770, tag, owner, clock) + , device_bbc_fdc_interface(mconfig, *this) + , m_dfs_rom(*this, "dfs_rom") + , m_fdc(*this, "wd1770") + , m_floppy0(*this, "wd1770:0") + , m_floppy1(*this, "wd1770:1") + , m_drive_control(0) { } @@ -186,24 +189,11 @@ bbc_acorn1770_device::bbc_acorn1770_device(const machine_config &mconfig, const void bbc_acorn8271_device::device_start() { - device_t* cpu = machine().device("maincpu"); - address_space& space = cpu->memory().space(AS_PROGRAM); - m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner()); - - space.install_device(0xfe80, 0xfe83, *m_fdc, &i8271_device::map); - space.install_readwrite_handler(0xfe84, 0xfe9f, READ8_DEVICE_DELEGATE(m_fdc, i8271_device, data_r), WRITE8_DEVICE_DELEGATE(m_fdc, i8271_device, data_w)); } void bbc_acorn1770_device::device_start() { - device_t* cpu = machine().device("maincpu"); - address_space& space = cpu->memory().space(AS_PROGRAM); - m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner()); - - space.install_readwrite_handler(0xfe80, 0xfe83, READ8_DELEGATE(bbc_acorn1770_device, wd1770l_read), WRITE8_DELEGATE(bbc_acorn1770_device, wd1770l_write)); - space.install_readwrite_handler(0xfe84, 0xfe9f, read8sm_delegate(FUNC(wd1770_device::read), m_fdc.target()), write8sm_delegate(FUNC(wd1770_device::write), m_fdc.target())); - - m_drive_control = 0xfe; + save_item(NAME(m_drive_control)); } //------------------------------------------------- @@ -213,13 +203,13 @@ void bbc_acorn1770_device::device_start() void bbc_acorn8271_device::device_reset() { machine().root_device().membank("bank4")->configure_entry(12, memregion("dfs_rom")->base()); - - m_fdc->soft_reset(); } void bbc_acorn1770_device::device_reset() { machine().root_device().membank("bank4")->configure_entry(12, memregion("dfs_rom")->base()); + + m_drive_control = 0xfe; } @@ -227,10 +217,38 @@ void bbc_acorn1770_device::device_reset() // IMPLEMENTATION //************************************************************************** +READ8_MEMBER(bbc_acorn8271_device::read) +{ + uint8_t data; + + if (offset & 0x04) + { + data = m_fdc->data_r(space , 0); + } + else + { + data = m_fdc->read(space, offset & 0x03); + } + return data; +} + +WRITE8_MEMBER(bbc_acorn8271_device::write) +{ + if (offset & 0x04) + { + m_fdc->data_w(space, 0, data); + } + else + { + m_fdc->write(space, offset & 0x03, data); + } +} + WRITE_LINE_MEMBER(bbc_acorn8271_device::motor_w) { if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(!state); if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(!state); + m_fdc->ready_w(!state); } WRITE_LINE_MEMBER(bbc_acorn8271_device::side_w) @@ -245,39 +263,59 @@ WRITE_LINE_MEMBER(bbc_acorn8271_device::fdc_intrq_w) } -READ8_MEMBER(bbc_acorn1770_device::wd1770l_read) +READ8_MEMBER(bbc_acorn1770_device::read) { - return m_drive_control; + uint8_t data = 0xff; + + if (offset & 0x04) + { + data = m_fdc->read(offset & 0x03); + } + else + { + data = m_drive_control; + } + return data; } -WRITE8_MEMBER(bbc_acorn1770_device::wd1770l_write) +WRITE8_MEMBER(bbc_acorn1770_device::write) { - floppy_image_device *floppy = nullptr; - - m_drive_control = data; - - // bit 0, 1: drive select - if (BIT(data, 0)) floppy = m_floppy0->get_device(); - if (BIT(data, 1)) floppy = m_floppy1->get_device(); - m_fdc->set_floppy(floppy); - - // bit 2: side select - if (floppy) - floppy->ss_w(BIT(data, 2)); - - // bit 3: density - m_fdc->dden_w(BIT(data, 3)); - - // bit 5: reset - if (!BIT(data, 5)) m_fdc->soft_reset(); + if (offset & 0x04) + { + m_fdc->write(offset & 0x03, data); + } + else + { + floppy_image_device *floppy = nullptr; + + m_drive_control = data; + + // bit 0, 1: drive select + if (BIT(data, 0)) floppy = m_floppy0->get_device(); + if (BIT(data, 1)) floppy = m_floppy1->get_device(); + m_fdc->set_floppy(floppy); + + // bit 2: side select + if (floppy) + floppy->ss_w(BIT(data, 2)); + + // bit 3: density + m_fdc->dden_w(BIT(data, 3)); + + // bit 4: interrupt enabled + m_fdc_ie = !BIT(data, 4); + + // bit 5: reset + if (!BIT(data, 5)) m_fdc->soft_reset(); + } } WRITE_LINE_MEMBER(bbc_acorn1770_device::fdc_intrq_w) { - m_slot->intrq_w(state); + m_slot->intrq_w((state && m_fdc_ie) ? ASSERT_LINE : CLEAR_LINE); } WRITE_LINE_MEMBER(bbc_acorn1770_device::fdc_drq_w) { - m_slot->drq_w(state); + m_slot->drq_w((state && m_fdc_ie) ? ASSERT_LINE : CLEAR_LINE); } diff --git a/src/devices/bus/bbc/fdc/acorn.h b/src/devices/bus/bbc/fdc/acorn.h index 85323e1fb6a..4e2993f1016 100644 --- a/src/devices/bus/bbc/fdc/acorn.h +++ b/src/devices/bus/bbc/fdc/acorn.h @@ -25,7 +25,6 @@ class bbc_acorn8271_device : public device_t, public device_bbc_fdc_interface - { public: // construction/destruction @@ -42,6 +41,9 @@ protected: virtual void device_add_mconfig(machine_config &config) override; virtual const tiny_rom_entry *device_rom_region() const override; + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; + private: DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w); DECLARE_WRITE_LINE_MEMBER(motor_w); @@ -56,7 +58,6 @@ private: class bbc_acorn1770_device : public device_t, public device_bbc_fdc_interface - { public: // construction/destruction @@ -71,9 +72,10 @@ protected: virtual void device_add_mconfig(machine_config &config) override; virtual const tiny_rom_entry *device_rom_region() const override; + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; + private: - DECLARE_READ8_MEMBER(wd1770l_read); - DECLARE_WRITE8_MEMBER(wd1770l_write); DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w); DECLARE_WRITE_LINE_MEMBER(fdc_drq_w); @@ -83,6 +85,7 @@ private: optional_device<floppy_connector> m_floppy1; int m_drive_control; + int m_fdc_ie; }; diff --git a/src/devices/bus/bbc/fdc/ams.cpp b/src/devices/bus/bbc/fdc/ams.cpp new file mode 100644 index 00000000000..15d1c4a6171 --- /dev/null +++ b/src/devices/bus/bbc/fdc/ams.cpp @@ -0,0 +1,146 @@ +// license:BSD-3-Clause +// copyright-holders:Nigel Barnes +/********************************************************************** + + AMS 3" Microdrive Disc System + +**********************************************************************/ + + +#include "emu.h" +#include "ams.h" + + +//************************************************************************** +// DEVICE DEFINITIONS +//************************************************************************** + +DEFINE_DEVICE_TYPE(BBC_AMS3, bbc_ams3_device, "bbc_ams3", "AMS 3\" Microdrive Disc System") + + +//------------------------------------------------- +// MACHINE_DRIVER( ams3 ) +//------------------------------------------------- + +FLOPPY_FORMATS_MEMBER( bbc_ams3_device::floppy_formats ) + FLOPPY_ACORN_SSD_FORMAT +FLOPPY_FORMATS_END + +ROM_START( ams3 ) + ROM_REGION(0x8000, "dfs_rom", 0) + ROM_LOAD("dfs098.rom", 0x0000, 0x2000, CRC(90852e7d) SHA1(6df3552d5426f3a4625b9a0c7829bdba03f05e84)) + ROM_RELOAD( 0x2000, 0x2000) + ROM_LOAD("amsdisc.rom", 0x4000, 0x1000, CRC(93876595) SHA1(a9d9123667e65334b28b8588b09642478653e356)) + ROM_RELOAD( 0x5000, 0x1000) + ROM_RELOAD( 0x6000, 0x1000) + ROM_RELOAD( 0x7000, 0x1000) +ROM_END + + +//------------------------------------------------- +// device_add_mconfig - add device configuration +//------------------------------------------------- + +void bbc_ams3_device::device_add_mconfig(machine_config &config) +{ + I8271(config, m_fdc, 16_MHz_XTAL / 8); + m_fdc->intrq_wr_callback().set(FUNC(bbc_ams3_device::fdc_intrq_w)); + m_fdc->hdl_wr_callback().set(FUNC(bbc_ams3_device::motor_w)); + m_fdc->opt_wr_callback().set(FUNC(bbc_ams3_device::side_w)); + // Hitachi HFD 305S + FLOPPY_CONNECTOR(config, m_floppy0, "3dsdd", FLOPPY_3_DSDD, true, bbc_ams3_device::floppy_formats).enable_sound(true); + FLOPPY_CONNECTOR(config, m_floppy1, "3dsdd", FLOPPY_3_DSDD, false, bbc_ams3_device::floppy_formats).enable_sound(true); +} + + +const tiny_rom_entry *bbc_ams3_device::device_rom_region() const +{ + return ROM_NAME( ams3 ); +} + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +//------------------------------------------------- +// bbc_ams3_device - constructor +//------------------------------------------------- + +bbc_ams3_device::bbc_ams3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, BBC_AMS3, tag, owner, clock) + , device_bbc_fdc_interface(mconfig, *this) + , m_dfs_rom(*this, "dfs_rom") + , m_fdc(*this, "i8271") + , m_floppy0(*this, "i8271:0") + , m_floppy1(*this, "i8271:1") +{ +} + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void bbc_ams3_device::device_start() +{ +} + +//------------------------------------------------- +// device_reset - device-specific reset +//------------------------------------------------- + +void bbc_ams3_device::device_reset() +{ + machine().root_device().membank("bank4")->configure_entry(12, memregion("dfs_rom")->base() + 0x0000); + machine().root_device().membank("bank4")->configure_entry(13, memregion("dfs_rom")->base() + 0x4000); +} + + +//************************************************************************** +// IMPLEMENTATION +//************************************************************************** + +READ8_MEMBER(bbc_ams3_device::read) +{ + uint8_t data; + + if (offset & 0x04) + { + data = m_fdc->data_r(space , 0); + } + else + { + data = m_fdc->read(space, offset & 0x03); + } + return data; +} + +WRITE8_MEMBER(bbc_ams3_device::write) +{ + if (offset & 0x04) + { + m_fdc->data_w(space, 0, data); + } + else + { + m_fdc->write(space, offset & 0x03, data); + } +} + +WRITE_LINE_MEMBER(bbc_ams3_device::motor_w) +{ + if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(!state); + if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(!state); + m_fdc->ready_w(!state); +} + +WRITE_LINE_MEMBER(bbc_ams3_device::side_w) +{ + if (m_floppy0->get_device()) m_floppy0->get_device()->ss_w(state); + if (m_floppy1->get_device()) m_floppy1->get_device()->ss_w(state); +} + +WRITE_LINE_MEMBER(bbc_ams3_device::fdc_intrq_w) +{ + m_slot->intrq_w(state); +} diff --git a/src/devices/bus/bbc/fdc/ams.h b/src/devices/bus/bbc/fdc/ams.h new file mode 100644 index 00000000000..acdb077b3f6 --- /dev/null +++ b/src/devices/bus/bbc/fdc/ams.h @@ -0,0 +1,61 @@ +// license:BSD-3-Clause +// copyright-holders:Nigel Barnes +/********************************************************************** + + AMS 3" Microdrive Disc System + +**********************************************************************/ + + +#ifndef MAME_BUS_BBC_FDC_AMS_H +#define MAME_BUS_BBC_FDC_AMS_H + +#pragma once + +#include "fdc.h" +#include "machine/i8271.h" +#include "formats/acorn_dsk.h" + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +class bbc_ams3_device : + public device_t, + public device_bbc_fdc_interface +{ +public: + // construction/destruction + bbc_ams3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + DECLARE_FLOPPY_FORMATS(floppy_formats); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + // optional information overrides + virtual void device_add_mconfig(machine_config &config) override; + virtual const tiny_rom_entry *device_rom_region() const override; + + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; + +private: + DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w); + DECLARE_WRITE_LINE_MEMBER(motor_w); + DECLARE_WRITE_LINE_MEMBER(side_w); + + required_memory_region m_dfs_rom; + required_device<i8271_device> m_fdc; + required_device<floppy_connector> m_floppy0; + optional_device<floppy_connector> m_floppy1; +}; + + +// device type definition +DECLARE_DEVICE_TYPE(BBC_AMS3, bbc_ams3_device) + + +#endif // MAME_BUS_BBC_FDC_AMS_H diff --git a/src/devices/bus/bbc/fdc/cumana.cpp b/src/devices/bus/bbc/fdc/cumana.cpp index 5639fef1976..4de4c9df704 100644 --- a/src/devices/bus/bbc/fdc/cumana.cpp +++ b/src/devices/bus/bbc/fdc/cumana.cpp @@ -65,6 +65,7 @@ void bbc_cumana1_device::device_add_mconfig(machine_config &config) m_fdc->intrq_wr_callback().set(FUNC(bbc_cumanafdc_device::fdc_intrq_w)); m_fdc->drq_wr_callback().set(FUNC(bbc_cumanafdc_device::fdc_drq_w)); m_fdc->hld_wr_callback().set(FUNC(bbc_cumanafdc_device::motor_w)); + FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies_525, "525qd", floppy_formats).enable_sound(true); FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies_525, "525qd", floppy_formats).enable_sound(true); } @@ -75,6 +76,7 @@ void bbc_cumana2_device::device_add_mconfig(machine_config &config) m_fdc->intrq_wr_callback().set(FUNC(bbc_cumanafdc_device::fdc_intrq_w)); m_fdc->drq_wr_callback().set(FUNC(bbc_cumanafdc_device::fdc_drq_w)); m_fdc->hld_wr_callback().set(FUNC(bbc_cumanafdc_device::motor_w)); + FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies_525, "525qd", floppy_formats).enable_sound(true); FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies_525, "525qd", floppy_formats).enable_sound(true); } @@ -104,7 +106,8 @@ bbc_cumanafdc_device::bbc_cumanafdc_device(const machine_config &mconfig, device m_fdc(*this, "mb8877a"), m_floppy0(*this, "mb8877a:0"), m_floppy1(*this, "mb8877a:1"), - m_dfs_rom(*this, "dfs_rom") + m_dfs_rom(*this, "dfs_rom"), + m_drive_control(0) { } @@ -127,12 +130,7 @@ bbc_cumana2_device::bbc_cumana2_device(const machine_config &mconfig, const char void bbc_cumanafdc_device::device_start() { - device_t* cpu = machine().device("maincpu"); - address_space& space = cpu->memory().space(AS_PROGRAM); - m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner()); - - space.install_readwrite_handler(0xfe80, 0xfe83, READ8_DELEGATE(bbc_cumanafdc_device, ctrl_r), WRITE8_DELEGATE(bbc_cumanafdc_device, ctrl_w)); - space.install_readwrite_handler(0xfe84, 0xfe9f, read8sm_delegate(FUNC(mb8877_device::read), m_fdc.target()), write8sm_delegate(FUNC(mb8877_device::write), m_fdc.target())); + save_item(NAME(m_drive_control)); } //------------------------------------------------- @@ -142,8 +140,6 @@ void bbc_cumanafdc_device::device_start() void bbc_cumanafdc_device::device_reset() { machine().root_device().membank("bank4")->configure_entry(12, memregion("dfs_rom")->base()); - - m_fdc->soft_reset(); } @@ -151,47 +147,66 @@ void bbc_cumanafdc_device::device_reset() // IMPLEMENTATION //************************************************************************** -READ8_MEMBER(bbc_cumanafdc_device::ctrl_r) +READ8_MEMBER(bbc_cumanafdc_device::read) { - return m_drive_control; + uint8_t data; + + if (offset & 0x04) + { + data = m_fdc->read(offset & 0x03); + } + else + { + data = m_drive_control; + } + return data; } -WRITE8_MEMBER(bbc_cumanafdc_device::ctrl_w) +WRITE8_MEMBER(bbc_cumanafdc_device::write) { - floppy_image_device *floppy = nullptr; - - m_drive_control = data; - - // bit 0: drive select - floppy_image_device *floppy0 = m_fdc->subdevice<floppy_connector>("0")->get_device(); - floppy_image_device *floppy1 = m_fdc->subdevice<floppy_connector>("1")->get_device(); - floppy = (BIT(data, 0) ? floppy1 : floppy0); - m_fdc->set_floppy(floppy); - - // Not sure why QFS 1.02 inverts these two bits, need to see an original board to verify - if (m_invert) + if (offset & 0x04) { - // bit 1: side select - if (floppy) - floppy->ss_w(!BIT(data, 1)); - - // bit 2: density - m_fdc->dden_w(!BIT(data, 2)); + m_fdc->write(offset & 0x03, data); } else { - // bit 1: side select - if (floppy) - floppy->ss_w(BIT(data, 1)); + floppy_image_device *floppy = nullptr; - // bit 2: density - m_fdc->dden_w(BIT(data, 2)); - } - // bit 3: reset - if (BIT(data, 3)) m_fdc->soft_reset(); + m_drive_control = data; + + // bit 0: drive select + switch (BIT(data, 0)) + { + case 0: floppy = m_floppy0->get_device(); break; + case 1: floppy = m_floppy1->get_device(); break; + } + m_fdc->set_floppy(floppy); + + // Not sure why QFS 1.02 inverts these two bits, need to see an original board to verify + if (m_invert) + { + // bit 1: side select + if (floppy) + floppy->ss_w(!BIT(data, 1)); - // bit 4: interrupt enable - m_fdc_ie = BIT(data, 4); + // bit 2: density + m_fdc->dden_w(!BIT(data, 2)); + } + else + { + // bit 1: side select + if (floppy) + floppy->ss_w(BIT(data, 1)); + + // bit 2: density + m_fdc->dden_w(BIT(data, 2)); + } + // bit 3: reset + if (BIT(data, 3)) m_fdc->soft_reset(); + + // bit 4: interrupt enable + m_fdc_ie = BIT(data, 4); + } } WRITE_LINE_MEMBER(bbc_cumanafdc_device::fdc_intrq_w) @@ -208,12 +223,6 @@ WRITE_LINE_MEMBER(bbc_cumanafdc_device::fdc_drq_w) WRITE_LINE_MEMBER(bbc_cumanafdc_device::motor_w) { - for (int i = 0; i != 2; i++) { - char devname[8]; - sprintf(devname, "%d", i); - floppy_connector *con = m_fdc->subdevice<floppy_connector>(devname); - if (con) { - con->get_device()->mon_w(!state); - } - } + if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(!state); + if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(!state); } diff --git a/src/devices/bus/bbc/fdc/cumana.h b/src/devices/bus/bbc/fdc/cumana.h index 9b0c90c0630..71048da3b1a 100644 --- a/src/devices/bus/bbc/fdc/cumana.h +++ b/src/devices/bus/bbc/fdc/cumana.h @@ -23,7 +23,6 @@ class bbc_cumanafdc_device : public device_t, public device_bbc_fdc_interface - { public: DECLARE_FLOPPY_FORMATS(floppy_formats); @@ -31,8 +30,6 @@ public: DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w); DECLARE_WRITE_LINE_MEMBER(fdc_drq_w); DECLARE_WRITE_LINE_MEMBER(motor_w); - DECLARE_READ8_MEMBER(ctrl_r); - DECLARE_WRITE8_MEMBER(ctrl_w); protected: // construction/destruction @@ -42,12 +39,15 @@ protected: virtual void device_start() override; virtual void device_reset() override; - bool m_invert; + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; required_device<mb8877_device> m_fdc; required_device<floppy_connector> m_floppy0; optional_device<floppy_connector> m_floppy1; + bool m_invert; + private: required_memory_region m_dfs_rom; diff --git a/src/devices/bus/bbc/fdc/cv1797.cpp b/src/devices/bus/bbc/fdc/cv1797.cpp index d1baf8204d9..689d9a23777 100644 --- a/src/devices/bus/bbc/fdc/cv1797.cpp +++ b/src/devices/bus/bbc/fdc/cv1797.cpp @@ -58,6 +58,7 @@ void bbc_cv1797_device::device_add_mconfig(machine_config &config) m_fdc->intrq_wr_callback().set(FUNC(bbc_cv1797_device::fdc_intrq_w)); m_fdc->drq_wr_callback().set(FUNC(bbc_cv1797_device::fdc_drq_w)); m_fdc->hld_wr_callback().set(FUNC(bbc_cv1797_device::motor_w)); + FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies_525, "525qd", floppy_formats).enable_sound(true); FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies_525, "525qd", floppy_formats).enable_sound(true); } @@ -76,12 +77,13 @@ const tiny_rom_entry *bbc_cv1797_device::device_rom_region() const //------------------------------------------------- bbc_cv1797_device::bbc_cv1797_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, BBC_CV1797, tag, owner, clock), - device_bbc_fdc_interface(mconfig, *this), - m_dfs_rom(*this, "dfs_rom"), - m_fdc(*this, "fd1797"), - m_floppy0(*this, "fd1797:0"), - m_floppy1(*this, "fd1797:1") + : device_t(mconfig, BBC_CV1797, tag, owner, clock) + , device_bbc_fdc_interface(mconfig, *this) + , m_dfs_rom(*this, "dfs_rom") + , m_fdc(*this, "fd1797") + , m_floppy0(*this, "fd1797:0") + , m_floppy1(*this, "fd1797:1") + , m_drive_control(0) { } @@ -91,12 +93,7 @@ bbc_cv1797_device::bbc_cv1797_device(const machine_config &mconfig, const char * void bbc_cv1797_device::device_start() { - device_t* cpu = machine().device("maincpu"); - address_space& space = cpu->memory().space(AS_PROGRAM); - m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner()); - - space.install_readwrite_handler(0xfe80, 0xfe80, read8sm_delegate(FUNC(fd1797_device::read), m_fdc.target()), write8sm_delegate(FUNC(fd1797_device::write), m_fdc.target())); - space.install_readwrite_handler(0xfe84, 0xfe9f, read8_delegate(FUNC(bbc_cv1797_device::fd1797l_read), this), write8_delegate(FUNC(bbc_cv1797_device::fd1797l_write), this)); + save_item(NAME(m_drive_control)); } //------------------------------------------------- @@ -106,8 +103,6 @@ void bbc_cv1797_device::device_start() void bbc_cv1797_device::device_reset() { machine().root_device().membank("bank4")->configure_entry(12, memregion("dfs_rom")->base()); - - m_fdc->soft_reset(); } @@ -115,32 +110,51 @@ void bbc_cv1797_device::device_reset() // IMPLEMENTATION //************************************************************************** -READ8_MEMBER(bbc_cv1797_device::fd1797l_read) +READ8_MEMBER(bbc_cv1797_device::read) { - return m_drive_control; + uint8_t data; + + if (offset & 0x04) + { + data = m_fdc->read(offset & 0x03); + } + else + { + data = m_drive_control; + } + return data; } -WRITE8_MEMBER(bbc_cv1797_device::fd1797l_write) +WRITE8_MEMBER(bbc_cv1797_device::write) { - floppy_image_device *floppy = nullptr; - - m_drive_control = data; - logerror("fdc: Drive control %02x\n", data); - // bit 0: drive select - floppy_image_device *floppy0 = m_floppy0->get_device(); - floppy_image_device *floppy1 = m_floppy1->get_device(); - floppy = (BIT(data, 0) ? floppy1 : floppy0); - m_fdc->set_floppy(floppy); - - // bit 1: side select - if (floppy) - floppy->ss_w(BIT(data, 1)); - - // bit 2: density - m_fdc->dden_w(BIT(data, 2)); - - // bit 6: reset - //if (BIT(data, 6)) m_fdc->soft_reset(); + if (offset & 0x04) + { + m_fdc->write(offset & 0x03, data); + } + else + { + floppy_image_device *floppy = nullptr; + + m_drive_control = data; + logerror("fdc: Drive control %02x\n", data); + // bit 0: drive select + switch (BIT(data, 0)) + { + case 0: floppy = m_floppy0->get_device(); break; + case 1: floppy = m_floppy1->get_device(); break; + } + m_fdc->set_floppy(floppy); + + // bit 1: side select + if (floppy) + floppy->ss_w(BIT(data, 1)); + + // bit 2: density + m_fdc->dden_w(!BIT(data, 2)); + + // bit 6: reset + //if (BIT(data, 6)) m_fdc->soft_reset(); + } } WRITE_LINE_MEMBER(bbc_cv1797_device::fdc_intrq_w) diff --git a/src/devices/bus/bbc/fdc/cv1797.h b/src/devices/bus/bbc/fdc/cv1797.h index b03385810f2..b6a2f3c9a44 100644 --- a/src/devices/bus/bbc/fdc/cv1797.h +++ b/src/devices/bus/bbc/fdc/cv1797.h @@ -24,7 +24,6 @@ class bbc_cv1797_device : public device_t, public device_bbc_fdc_interface - { public: static constexpr feature_type imperfect_features() { return feature::DISK; } @@ -41,11 +40,12 @@ protected: virtual void device_add_mconfig(machine_config &config) override; virtual const tiny_rom_entry *device_rom_region() const override; + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; + private: DECLARE_FLOPPY_FORMATS(floppy_formats); - DECLARE_READ8_MEMBER(fd1797l_read); - DECLARE_WRITE8_MEMBER(fd1797l_write); DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w); DECLARE_WRITE_LINE_MEMBER(fdc_drq_w); DECLARE_WRITE_LINE_MEMBER(motor_w); diff --git a/src/devices/bus/bbc/fdc/fdc.cpp b/src/devices/bus/bbc/fdc/fdc.cpp index 5db09a3903e..1db62be6357 100644 --- a/src/devices/bus/bbc/fdc/fdc.cpp +++ b/src/devices/bus/bbc/fdc/fdc.cpp @@ -32,15 +32,6 @@ device_bbc_fdc_interface::device_bbc_fdc_interface(const machine_config &mconfig } -//------------------------------------------------- -// ~device_bbc_fdc_interface - destructor -//------------------------------------------------- - -device_bbc_fdc_interface::~device_bbc_fdc_interface() -{ -} - - //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -53,17 +44,8 @@ bbc_fdc_slot_device::bbc_fdc_slot_device(const machine_config &mconfig, const ch device_t(mconfig, BBC_FDC_SLOT, tag, owner, clock), device_slot_interface(mconfig, *this), m_card(nullptr), - m_intrq_handler(*this), - m_drq_handler(*this) -{ -} - - -//------------------------------------------------- -// bbc_fdc_slot_device - destructor -//------------------------------------------------- - -bbc_fdc_slot_device::~bbc_fdc_slot_device() + m_intrq_cb(*this), + m_drq_cb(*this) { } @@ -86,12 +68,13 @@ void bbc_fdc_slot_device::device_validity_check(validity_checker &valid) const void bbc_fdc_slot_device::device_start() { device_t *const carddev = get_card_device(); - if (carddev && !dynamic_cast<device_bbc_fdc_interface *>(carddev)) + m_card = dynamic_cast<device_bbc_fdc_interface *>(get_card_device()); + if (carddev && !m_card) osd_printf_error("Card device %s (%s) does not implement device_bbc_fdc_interface\n", carddev->tag(), carddev->name()); // resolve callbacks - m_intrq_handler.resolve_safe(); - m_drq_handler.resolve_safe(); + m_intrq_cb.resolve_safe(); + m_drq_cb.resolve_safe(); } //------------------------------------------------- @@ -102,6 +85,27 @@ void bbc_fdc_slot_device::device_reset() { } +//------------------------------------------------- +// read +//------------------------------------------------- + +READ8_MEMBER(bbc_fdc_slot_device::read) +{ + if (m_card) + return m_card->read(space, offset); + else + return 0xff; +} + +//------------------------------------------------- +// write +//------------------------------------------------- + +WRITE8_MEMBER(bbc_fdc_slot_device::write) +{ + if (m_card) + m_card->write(space, offset, data); +} //------------------------------------------------- // SLOT_INTERFACE( bbc_fdc_devices ) @@ -110,9 +114,10 @@ void bbc_fdc_slot_device::device_reset() // slot devices #include "acorn.h" +#include "ams.h" #include "cumana.h" #include "cv1797.h" -//#include "microware.h" +#include "microware.h" #include "opus.h" //#include "solidisk.h" #include "watford.h" @@ -123,10 +128,11 @@ void bbc_fdc_devices(device_slot_interface &device) { device.option_add("acorn8271", BBC_ACORN8271); device.option_add("acorn1770", BBC_ACORN1770); + device.option_add("ams3", BBC_AMS3); device.option_add("cumana1", BBC_CUMANA1); device.option_add("cumana2", BBC_CUMANA2); device.option_add("cv1797", BBC_CV1797); - //device.option_add("microware", BBC_MICROWARE); + device.option_add("microware", BBC_MICROWARE); device.option_add("opus8272", BBC_OPUS8272); device.option_add("opus2791", BBC_OPUS2791); device.option_add("opus2793", BBC_OPUS2793); diff --git a/src/devices/bus/bbc/fdc/fdc.h b/src/devices/bus/bbc/fdc/fdc.h index 892db41fe1d..2b61b881e1a 100644 --- a/src/devices/bus/bbc/fdc/fdc.h +++ b/src/devices/bus/bbc/fdc/fdc.h @@ -14,21 +14,6 @@ //************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_BBC_FDC_SLOT_ADD(_tag, _slot_intf, _def_slot, _fixed) \ - MCFG_DEVICE_ADD(_tag, BBC_FDC_SLOT, 0) \ - MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, _fixed) - -#define MCFG_BBC_FDC_SLOT_INTRQ_HANDLER(_devcb) \ - downcast<bbc_fdc_slot_device &>(*device).set_intrq_handler(DEVCB_##_devcb); - -#define MCFG_BBC_FDC_SLOT_DRQ_HANDLER(_devcb) \ - downcast<bbc_fdc_slot_device &>(*device).set_drq_handler(DEVCB_##_devcb); - - -//************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -40,15 +25,27 @@ class bbc_fdc_slot_device : public device_t, public device_slot_interface { public: // construction/destruction - bbc_fdc_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual ~bbc_fdc_slot_device(); + template <typename T> + bbc_fdc_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) + : bbc_fdc_slot_device(mconfig, tag, owner) + { + option_reset(); + slot_options(*this); + set_default_option(default_option); + set_fixed(false); + } + + bbc_fdc_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); // callbacks - template <class Object> devcb_base &set_intrq_handler(Object &&cb) { return m_intrq_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_drq_handler(Object &&cb) { return m_drq_handler.set_callback(std::forward<Object>(cb)); } + auto intrq_wr_callback() { return m_intrq_cb.bind(); } + auto drq_wr_callback() { return m_drq_cb.bind(); } - DECLARE_WRITE_LINE_MEMBER( intrq_w ) { m_intrq_handler(state); } - DECLARE_WRITE_LINE_MEMBER( drq_w) { m_drq_handler(state); } + virtual DECLARE_READ8_MEMBER(read); + virtual DECLARE_WRITE8_MEMBER(write); + + DECLARE_WRITE_LINE_MEMBER( intrq_w ) { m_intrq_cb(state); } + DECLARE_WRITE_LINE_MEMBER( drq_w) { m_drq_cb(state); } protected: // device-level overrides @@ -59,8 +56,8 @@ protected: device_bbc_fdc_interface *m_card; private: - devcb_write_line m_intrq_handler; - devcb_write_line m_drq_handler; + devcb_write_line m_intrq_cb; + devcb_write_line m_drq_cb; }; @@ -69,8 +66,8 @@ private: class device_bbc_fdc_interface : public device_slot_card_interface { public: - // construction/destruction - virtual ~device_bbc_fdc_interface(); + virtual DECLARE_READ8_MEMBER(read) { return 0xff; } + virtual DECLARE_WRITE8_MEMBER(write) { } protected: device_bbc_fdc_interface(const machine_config &mconfig, device_t &device); diff --git a/src/devices/bus/bbc/fdc/microware.cpp b/src/devices/bus/bbc/fdc/microware.cpp new file mode 100644 index 00000000000..2dc527ea822 --- /dev/null +++ b/src/devices/bus/bbc/fdc/microware.cpp @@ -0,0 +1,176 @@ +// license:BSD-3-Clause +// copyright-holders:Nigel Barnes +/********************************************************************** + + United Disk Memories DDFS FDC + + Microware DDFS FDC + +**********************************************************************/ + + +#include "emu.h" +#include "microware.h" + + +//************************************************************************** +// DEVICE DEFINITIONS +//************************************************************************** + +DEFINE_DEVICE_TYPE(BBC_MICROWARE, bbc_microware_device, "bbc_microware", "Microware DDFS FDC") + + +//------------------------------------------------- +// MACHINE_DRIVER( microware ) +//------------------------------------------------- + +FLOPPY_FORMATS_MEMBER( bbc_microware_device::floppy_formats ) + FLOPPY_ACORN_SSD_FORMAT, + FLOPPY_ACORN_DSD_FORMAT, + FLOPPY_FSD_FORMAT +FLOPPY_FORMATS_END + +static void bbc_floppies_525(device_slot_interface &device) +{ + device.option_add("525sssd", FLOPPY_525_SSSD); + device.option_add("525sd", FLOPPY_525_SD); + device.option_add("525ssdd", FLOPPY_525_SSDD); + device.option_add("525dd", FLOPPY_525_DD); + device.option_add("525qd", FLOPPY_525_QD); +} + +ROM_START( microware ) + ROM_REGION(0x4000, "dfs_rom", 0) + ROM_DEFAULT_BIOS("udm200") + ROM_SYSTEM_BIOS(0, "ddfs090", "Microware DDFS 0.90") + ROMX_LOAD("microware_ddfs090.rom", 0x0000, 0x4000, CRC(700d50e5) SHA1(6834e46cb15354003d553e6c2bdb4ed76b47a465), ROM_BIOS(0)) + ROM_SYSTEM_BIOS(1, "udm200", "UDM DDFS 2.00") + ROMX_LOAD("udm_ddfs200.rom", 0x0000, 0x4000, CRC(1b4708a2) SHA1(0f37bcc73a758657cfe58c19f0cc92be9107e767), ROM_BIOS(1)) +ROM_END + + +//------------------------------------------------- +// device_add_mconfig - add device configuration +//------------------------------------------------- + +void bbc_microware_device::device_add_mconfig(machine_config &config) +{ + WD2793(config, m_fdc, 16_MHz_XTAL / 16); // Replay advert suggests Type R8272 UDM DFS + m_fdc->intrq_wr_callback().set(FUNC(bbc_microware_device::fdc_intrq_w)); + m_fdc->drq_wr_callback().set(FUNC(bbc_microware_device::fdc_drq_w)); + m_fdc->hld_wr_callback().set(FUNC(bbc_microware_device::motor_w)); + + FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies_525, "525qd", floppy_formats).enable_sound(true); + FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies_525, "525qd", floppy_formats).enable_sound(true); +} + +const tiny_rom_entry *bbc_microware_device::device_rom_region() const +{ + return ROM_NAME( microware ); +} + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +//------------------------------------------------- +// bbc_microware_device - constructor +//------------------------------------------------- + +bbc_microware_device::bbc_microware_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, BBC_MICROWARE, tag, owner, clock) + , device_bbc_fdc_interface(mconfig, *this) + , m_dfs_rom(*this, "dfs_rom") + , m_fdc(*this, "wd2793") + , m_floppy0(*this, "wd2793:0") + , m_floppy1(*this, "wd2793:1") + , m_drive_control(0) +{ +} + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void bbc_microware_device::device_start() +{ + save_item(NAME(m_drive_control)); +} + +//------------------------------------------------- +// device_reset - device-specific reset +//------------------------------------------------- + +void bbc_microware_device::device_reset() +{ + machine().root_device().membank("bank4")->configure_entry(12, memregion("dfs_rom")->base()); +} + + +//************************************************************************** +// IMPLEMENTATION +//************************************************************************** + +READ8_MEMBER(bbc_microware_device::read) +{ + uint8_t data; + + if (offset & 0x04) + { + data = m_fdc->read(offset & 0x03); + } + else + { + data = m_drive_control; + } + return data; +} + +WRITE8_MEMBER(bbc_microware_device::write) +{ + if (offset & 0x04) + { + m_fdc->write(offset & 0x03, data); + } + else + { + floppy_image_device *floppy = nullptr; + + m_drive_control = data; + logerror("fdc: Drive control %02x \n", data); + // bit 0: drive select + switch (BIT(data, 0)) + { + case 0: floppy = m_floppy0->get_device(); break; + case 1: floppy = m_floppy1->get_device(); break; + } + m_fdc->set_floppy(floppy); + + // bit 1: side select + if (floppy) + floppy->ss_w(BIT(data, 1)); + + // bit 2: density + m_fdc->dden_w(BIT(data, 2)); + + // bit 3: always set ??? + + // bit 4: ??? interrupt + } +} + +WRITE_LINE_MEMBER(bbc_microware_device::fdc_intrq_w) +{ + m_slot->intrq_w(state); +} + +WRITE_LINE_MEMBER(bbc_microware_device::fdc_drq_w) +{ + m_slot->drq_w(state); +} + +WRITE_LINE_MEMBER(bbc_microware_device::motor_w) +{ + if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(!state); + if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(!state); +} diff --git a/src/devices/bus/bbc/fdc/microware.h b/src/devices/bus/bbc/fdc/microware.h new file mode 100644 index 00000000000..9d42eb2b668 --- /dev/null +++ b/src/devices/bus/bbc/fdc/microware.h @@ -0,0 +1,68 @@ +// license:BSD-3-Clause +// copyright-holders:Nigel Barnes +/********************************************************************** + + United Disk Memories DDFS FDC + + Microware DDFS FDC + +**********************************************************************/ + + +#ifndef MAME_BUS_BBC_FDC_MICROWARE_H +#define MAME_BUS_BBC_FDC_MICROWARE_H + +#pragma once + +#include "fdc.h" +#include "machine/wd_fdc.h" +#include "formats/acorn_dsk.h" +#include "formats/fsd_dsk.h" + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +class bbc_microware_device : + public device_t, + public device_bbc_fdc_interface +{ +public: + static constexpr feature_type imperfect_features() { return feature::DISK; } + + // construction/destruction + bbc_microware_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + // optional information overrides + virtual void device_add_mconfig(machine_config &config) override; + virtual const tiny_rom_entry *device_rom_region() const override; + + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; + +private: + DECLARE_FLOPPY_FORMATS(floppy_formats); + + DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w); + DECLARE_WRITE_LINE_MEMBER(fdc_drq_w); + DECLARE_WRITE_LINE_MEMBER(motor_w); + + required_memory_region m_dfs_rom; + required_device<wd2793_device> m_fdc; + required_device<floppy_connector> m_floppy0; + optional_device<floppy_connector> m_floppy1; + + int m_drive_control; +}; + + +// device type definition +DECLARE_DEVICE_TYPE(BBC_MICROWARE, bbc_microware_device); + + +#endif /* MAME_BUS_BBC_FDC_MICROWARE_H */ diff --git a/src/devices/bus/bbc/fdc/opus.cpp b/src/devices/bus/bbc/fdc/opus.cpp index c336cd71a24..0a0bb79ffd0 100644 --- a/src/devices/bus/bbc/fdc/opus.cpp +++ b/src/devices/bus/bbc/fdc/opus.cpp @@ -91,9 +91,9 @@ ROM_END void bbc_opus8272_device::device_add_mconfig(machine_config &config) { - I8272A(config, m_fdc, 0); - m_fdc->set_ready_line_connected(true); + I8272A(config, m_fdc, true); m_fdc->intrq_wr_callback().set(FUNC(bbc_opus8272_device::fdc_intrq_w)); + FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies_525, "525qd", bbc_opusfdc_device::floppy_formats).enable_sound(true); FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies_525, "525qd", bbc_opusfdc_device::floppy_formats).enable_sound(true); } @@ -103,6 +103,7 @@ void bbc_opus2791_device::device_add_mconfig(machine_config &config) WD2791(config, m_fdc, 16_MHz_XTAL / 16); m_fdc->drq_wr_callback().set(FUNC(bbc_opusfdc_device::fdc_drq_w)); m_fdc->hld_wr_callback().set(FUNC(bbc_opusfdc_device::motor_w)); + FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies_525, "525qd", bbc_opusfdc_device::floppy_formats).enable_sound(true); FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies_525, "525qd", bbc_opusfdc_device::floppy_formats).enable_sound(true); } @@ -112,6 +113,7 @@ void bbc_opus2793_device::device_add_mconfig(machine_config &config) WD2793(config, m_fdc, 16_MHz_XTAL / 16); m_fdc->drq_wr_callback().set(FUNC(bbc_opusfdc_device::fdc_drq_w)); m_fdc->hld_wr_callback().set(FUNC(bbc_opusfdc_device::motor_w)); + FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies_525, "525qd", bbc_opusfdc_device::floppy_formats).enable_sound(true); FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies_525, "525qd", bbc_opusfdc_device::floppy_formats).enable_sound(true); } @@ -120,6 +122,7 @@ void bbc_opus1770_device::device_add_mconfig(machine_config &config) { WD1770(config, m_fdc, 16_MHz_XTAL / 2); m_fdc->drq_wr_callback().set(FUNC(bbc_opusfdc_device::fdc_drq_w)); + FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies_525, "525qd", bbc_opusfdc_device::floppy_formats).enable_sound(true); FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies_525, "525qd", bbc_opusfdc_device::floppy_formats).enable_sound(true); } @@ -169,7 +172,8 @@ bbc_opusfdc_device::bbc_opusfdc_device(const machine_config &mconfig, device_typ m_fdc(*this, "fdc"), m_floppy0(*this, "fdc:0"), m_floppy1(*this, "fdc:1"), - m_dfs_rom(*this, "dfs_rom") + m_dfs_rom(*this, "dfs_rom"), + m_drive_control(0) { } @@ -194,21 +198,11 @@ bbc_opus1770_device::bbc_opus1770_device(const machine_config &mconfig, const ch void bbc_opus8272_device::device_start() { - device_t* cpu = machine().device("maincpu"); - address_space& space = cpu->memory().space(AS_PROGRAM); - m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner()); - - space.install_readwrite_handler(0xfe80, 0xfe86, READ8_DELEGATE(bbc_opus8272_device, fdc_r), WRITE8_DELEGATE(bbc_opus8272_device, fdc_w)); } void bbc_opusfdc_device::device_start() { - device_t* cpu = machine().device("maincpu"); - address_space& space = cpu->memory().space(AS_PROGRAM); - m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner()); - - space.install_readwrite_handler(0xfe80, 0xfe83, read8sm_delegate(FUNC(wd_fdc_device_base::read), m_fdc.target()), write8sm_delegate(FUNC(wd_fdc_device_base::write), m_fdc.target())); - space.install_readwrite_handler(0xfe84, 0xfe84, READ8_DELEGATE(bbc_opusfdc_device, ctrl_r), WRITE8_DELEGATE(bbc_opusfdc_device, ctrl_w)); + save_item(NAME(m_drive_control)); } //------------------------------------------------- @@ -218,15 +212,11 @@ void bbc_opusfdc_device::device_start() void bbc_opus8272_device::device_reset() { machine().root_device().membank("bank4")->configure_entry(12, memregion("dfs_rom")->base()); - - m_fdc->soft_reset(); } void bbc_opusfdc_device::device_reset() { machine().root_device().membank("bank4")->configure_entry(12, memregion("dfs_rom")->base()); - - m_fdc->soft_reset(); } @@ -234,11 +224,11 @@ void bbc_opusfdc_device::device_reset() // IMPLEMENTATION //************************************************************************** -READ8_MEMBER(bbc_opus8272_device::fdc_r) +READ8_MEMBER(bbc_opus8272_device::read) { uint8_t data = 0xff; - switch (offset) + switch (offset & 0x07) { case 0x02: m_fdc->tc_w(true); @@ -262,11 +252,11 @@ READ8_MEMBER(bbc_opus8272_device::fdc_r) return data; } -WRITE8_MEMBER(bbc_opus8272_device::fdc_w) +WRITE8_MEMBER(bbc_opus8272_device::write) { floppy_image_device *floppy = nullptr; - switch (offset) + switch (offset & 0x07) { case 0x01: switch (data & 0x01) @@ -292,31 +282,48 @@ WRITE_LINE_MEMBER(bbc_opus8272_device::fdc_intrq_w) } -READ8_MEMBER(bbc_opusfdc_device::ctrl_r) +READ8_MEMBER(bbc_opusfdc_device::read) { - return m_drive_control; + uint8_t data; + + if (offset & 0x04) + { + data = m_drive_control; + } + else + { + data = m_fdc->read(offset & 0x03); + } + return data; } -WRITE8_MEMBER(bbc_opusfdc_device::ctrl_w) +WRITE8_MEMBER(bbc_opusfdc_device::write) { - floppy_image_device *floppy = nullptr; + if (offset & 0x04) + { + floppy_image_device *floppy = nullptr; - m_drive_control = data; + m_drive_control = data; - // bit 0: drive select - switch (BIT(data, 0)) - { - case 0: floppy = m_floppy0->get_device(); break; - case 1: floppy = m_floppy1->get_device(); break; - } - m_fdc->set_floppy(floppy); + // bit 0: drive select + switch (BIT(data, 0)) + { + case 0: floppy = m_floppy0->get_device(); break; + case 1: floppy = m_floppy1->get_device(); break; + } + m_fdc->set_floppy(floppy); - // bit 1: side select - if (floppy) - floppy->ss_w(BIT(data, 1)); + // bit 1: side select + if (floppy) + floppy->ss_w(BIT(data, 1)); - // bit 6: density - m_fdc->dden_w(!BIT(data, 6)); + // bit 6: density + m_fdc->dden_w(!BIT(data, 6)); + } + else + { + m_fdc->write(offset & 0x03, data); + } } WRITE_LINE_MEMBER(bbc_opusfdc_device::fdc_drq_w) diff --git a/src/devices/bus/bbc/fdc/opus.h b/src/devices/bus/bbc/fdc/opus.h index 64ed0c61fe6..86af3dfe370 100644 --- a/src/devices/bus/bbc/fdc/opus.h +++ b/src/devices/bus/bbc/fdc/opus.h @@ -22,7 +22,6 @@ class bbc_opus8272_device : public device_t, public device_bbc_fdc_interface - { public: // construction/destruction @@ -37,9 +36,10 @@ protected: virtual void device_add_mconfig(machine_config &config) override; virtual const tiny_rom_entry *device_rom_region() const override; + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; + private: - DECLARE_READ8_MEMBER(fdc_r); - DECLARE_WRITE8_MEMBER(fdc_w); DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w); required_memory_region m_dfs_rom; @@ -49,19 +49,15 @@ private: }; -class bbc_opusfdc_device: +class bbc_opusfdc_device : public device_t, public device_bbc_fdc_interface - { public: DECLARE_FLOPPY_FORMATS(floppy_formats); - DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w); DECLARE_WRITE_LINE_MEMBER(fdc_drq_w); DECLARE_WRITE_LINE_MEMBER(motor_w); - DECLARE_READ8_MEMBER(ctrl_r); - DECLARE_WRITE8_MEMBER(ctrl_w); protected: // construction/destruction @@ -71,6 +67,9 @@ protected: virtual void device_start() override; virtual void device_reset() override; + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; + required_device<wd_fdc_device_base> m_fdc; required_device<floppy_connector> m_floppy0; optional_device<floppy_connector> m_floppy1; diff --git a/src/devices/bus/bbc/fdc/watford.cpp b/src/devices/bus/bbc/fdc/watford.cpp index 10c56e9cfce..be7f17dea80 100644 --- a/src/devices/bus/bbc/fdc/watford.cpp +++ b/src/devices/bus/bbc/fdc/watford.cpp @@ -70,6 +70,7 @@ void bbc_weddb2_device::device_add_mconfig(machine_config &config) WD1772(config, m_fdc, 16_MHz_XTAL / 2); m_fdc->intrq_wr_callback().set(FUNC(bbc_weddb2_device::fdc_intrq_w)); m_fdc->drq_wr_callback().set(FUNC(bbc_weddb2_device::fdc_drq_w)); + FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies_525, "525qd", floppy_formats).enable_sound(true); FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies_525, "525qd", floppy_formats).enable_sound(true); } @@ -79,6 +80,7 @@ void bbc_weddb3_device::device_add_mconfig(machine_config &config) WD1770(config, m_fdc, 16_MHz_XTAL / 2); m_fdc->intrq_wr_callback().set(FUNC(bbc_weddb3_device::fdc_intrq_w)); m_fdc->drq_wr_callback().set(FUNC(bbc_weddb3_device::fdc_drq_w)); + FLOPPY_CONNECTOR(config, m_floppy0, bbc_floppies_525, "525qd", floppy_formats).enable_sound(true); FLOPPY_CONNECTOR(config, m_floppy1, bbc_floppies_525, "525qd", floppy_formats).enable_sound(true); } @@ -102,27 +104,29 @@ const tiny_rom_entry *bbc_weddb3_device::device_rom_region() const // bbc_watfordfdc_device - constructor //------------------------------------------------- -bbc_watfordfdc_device::bbc_watfordfdc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, type, tag, owner, clock), - device_bbc_fdc_interface(mconfig, *this) +bbc_watfordfdc_device::bbc_watfordfdc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_bbc_fdc_interface(mconfig, *this) { } bbc_weddb2_device::bbc_weddb2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : bbc_watfordfdc_device(mconfig, BBC_WEDDB2, tag, owner, clock), - m_dfs_rom(*this, "dfs_rom"), - m_fdc(*this, "wd1772"), - m_floppy0(*this, "wd1772:0"), - m_floppy1(*this, "wd1772:1") + : bbc_watfordfdc_device(mconfig, BBC_WEDDB2, tag, owner, clock) + , m_dfs_rom(*this, "dfs_rom") + , m_fdc(*this, "wd1772") + , m_floppy0(*this, "wd1772:0") + , m_floppy1(*this, "wd1772:1") + , m_drive_control(0) { } bbc_weddb3_device::bbc_weddb3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : bbc_watfordfdc_device(mconfig, BBC_WEDDB3, tag, owner, clock), - m_dfs_rom(*this, "dfs_rom"), - m_fdc(*this, "wd1770"), - m_floppy0(*this, "wd1770:0"), - m_floppy1(*this, "wd1770:1") + : bbc_watfordfdc_device(mconfig, BBC_WEDDB3, tag, owner, clock) + , m_dfs_rom(*this, "dfs_rom") + , m_fdc(*this, "wd1770") + , m_floppy0(*this, "wd1770:0") + , m_floppy1(*this, "wd1770:1") + , m_drive_control(0) { } @@ -132,22 +136,12 @@ bbc_weddb3_device::bbc_weddb3_device(const machine_config &mconfig, const char * void bbc_weddb2_device::device_start() { - device_t* cpu = machine().device("maincpu"); - address_space& space = cpu->memory().space(AS_PROGRAM); - m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner()); - - space.install_readwrite_handler(0xfe80, 0xfe83, read8_delegate(FUNC(bbc_weddb2_device::wd177xl_read), this), write8_delegate(FUNC(bbc_weddb2_device::wd177xl_write), this)); - space.install_readwrite_handler(0xfe84, 0xfe8f, read8sm_delegate(FUNC(wd_fdc_device_base::read), m_fdc.target()), write8sm_delegate(FUNC(wd_fdc_device_base::write), m_fdc.target())); + save_item(NAME(m_drive_control)); } void bbc_weddb3_device::device_start() { - device_t* cpu = machine().device("maincpu"); - address_space& space = cpu->memory().space(AS_PROGRAM); - m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner()); - - space.install_readwrite_handler(0xfe80, 0xfe83, read8_delegate(FUNC(bbc_weddb3_device::wd177xl_read), this), write8_delegate(FUNC(bbc_weddb3_device::wd177xl_write), this)); - space.install_readwrite_handler(0xfe84, 0xfe8f, read8sm_delegate(FUNC(wd_fdc_device_base::read), m_fdc.target()), write8sm_delegate(FUNC(wd_fdc_device_base::write), m_fdc.target())); + save_item(NAME(m_drive_control)); } //------------------------------------------------- @@ -169,59 +163,93 @@ void bbc_weddb3_device::device_reset() // IMPLEMENTATION //************************************************************************** -READ8_MEMBER(bbc_weddb2_device::wd177xl_read) +READ8_MEMBER(bbc_weddb2_device::read) { - return m_drive_control; + uint8_t data; + + if (offset & 0x04) + { + data = m_fdc->read(offset & 0x03); + } + else + { + data = m_drive_control; + } + return data; } -WRITE8_MEMBER(bbc_weddb2_device::wd177xl_write) +WRITE8_MEMBER(bbc_weddb2_device::write) { - floppy_image_device *floppy = nullptr; - - m_drive_control = data; - - // bit 2: drive select - floppy_image_device *floppy0 = m_fdc->subdevice<floppy_connector>("0")->get_device(); - floppy_image_device *floppy1 = m_fdc->subdevice<floppy_connector>("1")->get_device(); - floppy = (BIT(data, 2) ? floppy1 : floppy0); - m_fdc->set_floppy(floppy); - - // bit 0: density - m_fdc->dden_w(BIT(data, 0)); - - // bit 1: side select - if (floppy) - floppy->ss_w(BIT(data, 1)); - - // bit 3: reset - if (!BIT(data, 3)) m_fdc->soft_reset(); + if (offset & 0x04) + { + m_fdc->write(offset & 0x03, data); + } + else + { + floppy_image_device *floppy = nullptr; + + m_drive_control = data; + + // bit 2: drive select + floppy_image_device *floppy0 = m_floppy0->get_device(); + floppy_image_device *floppy1 = m_floppy1->get_device(); + floppy = (BIT(data, 2) ? floppy1 : floppy0); + m_fdc->set_floppy(floppy); + + // bit 0: density + m_fdc->dden_w(BIT(data, 0)); + + // bit 1: side select + if (floppy) + floppy->ss_w(BIT(data, 1)); + + // bit 3: reset + if (!BIT(data, 3)) m_fdc->soft_reset(); + } } -READ8_MEMBER(bbc_weddb3_device::wd177xl_read) +READ8_MEMBER(bbc_weddb3_device::read) { - return m_drive_control; + uint8_t data; + + if (offset & 0x04) + { + data = m_fdc->read(offset & 0x03); + } + else + { + data = m_drive_control; + } + return data; } -WRITE8_MEMBER(bbc_weddb3_device::wd177xl_write) +WRITE8_MEMBER(bbc_weddb3_device::write) { - floppy_image_device *floppy = nullptr; - - m_drive_control = data; - - // bit 0, 1: drive select - if (BIT(data, 0)) floppy = m_fdc->subdevice<floppy_connector>("0")->get_device(); - if (BIT(data, 1)) floppy = m_fdc->subdevice<floppy_connector>("1")->get_device(); - m_fdc->set_floppy(floppy); - - // bit 2: side select - if (floppy) - floppy->ss_w(BIT(data, 2)); - - // bit 3: density - m_fdc->dden_w(BIT(data, 3)); - - // bit 5: reset - if (!BIT(data, 5)) m_fdc->soft_reset(); + if (offset & 0x04) + { + m_fdc->write(offset & 0x03, data); + } + else + { + floppy_image_device *floppy = nullptr; + + m_drive_control = data; + + // bit 0, 1: drive select + if (BIT(data, 0)) floppy = m_floppy0->get_device(); + if (BIT(data, 1)) floppy = m_floppy1->get_device(); + m_fdc->set_floppy(floppy); + + // bit 2: side select + if (floppy) + floppy->ss_w(BIT(data, 2)); + + // bit 3: density + m_fdc->dden_w(BIT(data, 3)); + + // bit 5: reset + if (!BIT(data, 5)) m_fdc->soft_reset(); + } } WRITE_LINE_MEMBER(bbc_watfordfdc_device::fdc_intrq_w) diff --git a/src/devices/bus/bbc/fdc/watford.h b/src/devices/bus/bbc/fdc/watford.h index ddc266d83ed..2f03f24eb0f 100644 --- a/src/devices/bus/bbc/fdc/watford.h +++ b/src/devices/bus/bbc/fdc/watford.h @@ -23,18 +23,16 @@ class bbc_watfordfdc_device : public device_t, public device_bbc_fdc_interface - { public: + DECLARE_FLOPPY_FORMATS(floppy_formats); + DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w); + DECLARE_WRITE_LINE_MEMBER(fdc_drq_w); protected: // construction/destruction bbc_watfordfdc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - DECLARE_FLOPPY_FORMATS(floppy_formats); - - DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w); - DECLARE_WRITE_LINE_MEMBER(fdc_drq_w); }; class bbc_weddb2_device : public bbc_watfordfdc_device @@ -42,9 +40,6 @@ class bbc_weddb2_device : public bbc_watfordfdc_device public: bbc_weddb2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ8_MEMBER(wd177xl_read); - DECLARE_WRITE8_MEMBER(wd177xl_write); - protected: // device-level overrides virtual void device_start() override; @@ -53,6 +48,9 @@ protected: virtual void device_add_mconfig(machine_config &config) override; virtual const tiny_rom_entry *device_rom_region() const override; + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; + private: required_memory_region m_dfs_rom; required_device<wd_fdc_device_base> m_fdc; @@ -67,9 +65,6 @@ class bbc_weddb3_device : public bbc_watfordfdc_device public: bbc_weddb3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_READ8_MEMBER(wd177xl_read); - DECLARE_WRITE8_MEMBER(wd177xl_write); - protected: // device-level overrides virtual void device_start() override; @@ -78,6 +73,9 @@ protected: virtual void device_add_mconfig(machine_config &config) override; virtual const tiny_rom_entry *device_rom_region() const override; + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; + private: required_memory_region m_dfs_rom; required_device<wd_fdc_device_base> m_fdc; diff --git a/src/devices/bus/bbc/joyport/joyport.cpp b/src/devices/bus/bbc/joyport/joyport.cpp index b45b804a76c..5ed3f8d2fff 100644 --- a/src/devices/bus/bbc/joyport/joyport.cpp +++ b/src/devices/bus/bbc/joyport/joyport.cpp @@ -32,15 +32,6 @@ device_bbc_joyport_interface::device_bbc_joyport_interface(const machine_config } -//------------------------------------------------- -// ~device_bbc_joyport_interface - destructor -//------------------------------------------------- - -device_bbc_joyport_interface::~device_bbc_joyport_interface() -{ -} - - //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -102,8 +93,9 @@ void bbc_joyport_slot_device::device_reset() READ8_MEMBER(bbc_joyport_slot_device::pb_r) { + // TODO: Joyport connected to PB0-PB4 only. PB5-PB7 are expansion port. if (m_device) - return m_device->pb_r(space, 0); + return 0xe0 | m_device->pb_r(space, 0); else return 0xff; } diff --git a/src/devices/bus/bbc/joyport/joyport.h b/src/devices/bus/bbc/joyport/joyport.h index a11e39a38ec..572e41f7612 100644 --- a/src/devices/bus/bbc/joyport/joyport.h +++ b/src/devices/bus/bbc/joyport/joyport.h @@ -34,20 +34,6 @@ //************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_BBC_JOYPORT_ADD( _tag, _slot_intf, _def_slot) \ - MCFG_DEVICE_ADD(_tag, BBC_JOYPORT_SLOT, 0) \ - MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) - -#define MCFG_BBC_JOYPORT_CB1_HANDLER(_devcb) \ - downcast<bbc_joyport_slot_device &>(*device).set_cb1_handler(DEVCB_##_devcb); - -#define MCFG_BBC_JOYPORT_CB2_HANDLER(_devcb) \ - downcast<bbc_joyport_slot_device &>(*device).set_cb2_handler(DEVCB_##_devcb); - -//************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -59,11 +45,21 @@ class bbc_joyport_slot_device : public device_t, public device_slot_interface { public: // construction/destruction - bbc_joyport_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + template <typename T> + bbc_joyport_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) + : bbc_joyport_slot_device(mconfig, tag, owner) + { + option_reset(); + slot_options(*this); + set_default_option(default_option); + set_fixed(false); + } + + bbc_joyport_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); // callbacks - template <class Object> devcb_base &set_cb1_handler(Object &&cb) { return m_cb1_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_cb2_handler(Object &&cb) { return m_cb2_handler.set_callback(std::forward<Object>(cb)); } + auto cb1_handler() { return m_cb1_handler.bind(); } + auto cb2_handler() { return m_cb2_handler.bind(); } DECLARE_WRITE_LINE_MEMBER(cb1_w) { m_cb1_handler(state); } DECLARE_WRITE_LINE_MEMBER(cb2_w) { m_cb2_handler(state); } @@ -90,9 +86,6 @@ private: class device_bbc_joyport_interface : public device_slot_card_interface { public: - // construction/destruction - virtual ~device_bbc_joyport_interface(); - virtual DECLARE_READ8_MEMBER(pb_r) { return 0xff; } virtual DECLARE_WRITE8_MEMBER(pb_w) { } diff --git a/src/devices/bus/bbc/tube/tube.cpp b/src/devices/bus/bbc/tube/tube.cpp index f3824e872cf..521497361ee 100644 --- a/src/devices/bus/bbc/tube/tube.cpp +++ b/src/devices/bus/bbc/tube/tube.cpp @@ -34,16 +34,6 @@ device_bbc_tube_interface::device_bbc_tube_interface(const machine_config &mconf } -//------------------------------------------------- -// ~device_bbc_tube_interface - destructor -//------------------------------------------------- - -device_bbc_tube_interface::~device_bbc_tube_interface() -{ -} - - - //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -62,15 +52,6 @@ bbc_tube_slot_device::bbc_tube_slot_device(const machine_config &mconfig, const //------------------------------------------------- -// bbc_tube_slot_device - destructor -//------------------------------------------------- - -bbc_tube_slot_device::~bbc_tube_slot_device() -{ -} - - -//------------------------------------------------- // device_validity_check - //------------------------------------------------- @@ -132,11 +113,12 @@ WRITE8_MEMBER(bbc_tube_slot_device::host_w) // slot devices #include "tube_6502.h" -#include "tube_65c102.h" #include "tube_80186.h" #include "tube_80286.h" +//#include "tube_a500.h" #include "tube_arm.h" #include "tube_casper.h" +//#include "tube_pmsb2p.h" //#include "tube_x25.h" #include "tube_z80.h" #include "tube_zep100.h" @@ -151,12 +133,16 @@ void bbc_extube_devices(device_slot_interface &device) device.option_add("6502", BBC_TUBE_6502); /* Acorn ANC01 6502 2nd processor */ device.option_add("z80", BBC_TUBE_Z80); /* Acorn ANC04 Z80 2nd processor */ // device.option_add("32016", BBC_TUBE_32016); /* Acorn ANC05 32016 2nd processor */ -// device.option_add("camb", BBC_TUBE_CAMB); /* Acorn ANC06 Cambridge Co-Processor */ device.option_add("arm", BBC_TUBE_ARM); /* Acorn ANC13 ARM Evaluation System */ device.option_add("80286", BBC_TUBE_80286); /* Acorn 80286 2nd Processor */ -// device.option_add("a500", BBC_TUBE_A500); /* Acorn A500 2nd Processor */ + //device.option_add("a500", BBC_TUBE_A500); /* Acorn A500 2nd Processor */ device.option_add("casper", BBC_TUBE_CASPER); /* Casper 68000 2nd Processor */ - device.option_add("zep100", BBC_TUBE_ZEP100); /* Torch Z80 Communicator (ZEP100) */ + //device.option_add("pmsb2p", BBC_TUBE_PMSB2P); /* PMS B2P-6502 */ + //device.option_add("hdp68k", BBC_TUBE_HDP68K); /* Torch Unicorn (HDP68K) */ + device.option_add("zep100", BBC_TUBE_ZEP100); /* Torch Z80 Communicator (ZEP100) (Torch) */ + //device.option_add("zep100l", BBC_TUBE_ZEP100L); /* Torch Z80 Communicator (ZEP100) (Acorn 8271) */ + //device.option_add("zep100w", BBC_TUBE_ZEP100W); /* Torch Z80 Communicator (ZEP100) (Acorn 1770) */ + //device.option_add("zep100m", BBC_TUBE_ZEP100M); /* Torch Z80 Communicator (ZEP100) (Master) */ /* Acorn ANC21 Universal 2nd Processor Unit */ device.option_add("65c102", BBC_TUBE_65C102); /* Acorn ADC06 65C102 co-processor */ device.option_add("80186", BBC_TUBE_80186); /* Acorn ADC08 80186 co-processor */ @@ -176,6 +162,19 @@ void bbc_intube_devices(device_slot_interface &device) //------------------------------------------------- +// SLOT_INTERFACE( electron_tube_devices ) +//------------------------------------------------- + +void electron_tube_devices(device_slot_interface &device) +{ + device.option_add("6502", BBC_TUBE_6502); /* Acorn ANC01 6502 2nd processor */ + device.option_add("z80", BBC_TUBE_Z80); /* Acorn ANC04 Z80 2nd processor */ + device.option_add("arm", BBC_TUBE_ARM); /* Acorn ANC13 ARM Evaluation System */ + device.option_add("65c102", BBC_TUBE_65C102); /* Acorn ADC06 65C102 co-processor */ + device.option_add("80186", BBC_TUBE_80186); /* Acorn ADC08 80186 co-processor */ +} + +//------------------------------------------------- // SLOT_INTERFACE( bbc_x25tube_devices ) //------------------------------------------------- diff --git a/src/devices/bus/bbc/tube/tube.h b/src/devices/bus/bbc/tube/tube.h index 722207d8d93..1bcc413c8ac 100644 --- a/src/devices/bus/bbc/tube/tube.h +++ b/src/devices/bus/bbc/tube/tube.h @@ -39,25 +39,6 @@ //************************************************************************** -// CONSTANTS -//************************************************************************** - -#define BBC_TUBE_SLOT_TAG "tube" - - -//************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_BBC_TUBE_SLOT_ADD(_tag, _slot_intf, _def_slot) \ - MCFG_DEVICE_ADD(_tag, BBC_TUBE_SLOT, 0) \ - MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) - -#define MCFG_BBC_TUBE_SLOT_IRQ_HANDLER(_devcb) \ - downcast<bbc_tube_slot_device &>(*device).set_irq_handler(DEVCB_##_devcb); - - -//************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -70,11 +51,20 @@ class bbc_tube_slot_device : public device_t, public device_slot_interface { public: // construction/destruction - bbc_tube_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual ~bbc_tube_slot_device(); + template <typename T> + bbc_tube_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) + : bbc_tube_slot_device(mconfig, tag, owner) + { + option_reset(); + slot_options(*this); + set_default_option(default_option); + set_fixed(false); + } + + bbc_tube_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); // callbacks - template <class Object> devcb_base &set_irq_handler(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); } + auto irq_handler() { return m_irq_handler.bind(); } DECLARE_READ8_MEMBER( host_r ); DECLARE_WRITE8_MEMBER( host_w ); @@ -99,9 +89,6 @@ private: class device_bbc_tube_interface : public device_slot_card_interface { public: - // construction/destruction - virtual ~device_bbc_tube_interface(); - // reading and writing virtual DECLARE_READ8_MEMBER(host_r) { return 0xfe; } virtual DECLARE_WRITE8_MEMBER(host_w) { } @@ -118,6 +105,7 @@ DECLARE_DEVICE_TYPE(BBC_TUBE_SLOT, bbc_tube_slot_device) void bbc_extube_devices(device_slot_interface &device); void bbc_intube_devices(device_slot_interface &device); +void electron_tube_devices(device_slot_interface &device); //void bbc_x25tube_devices(device_slot_interface &device); diff --git a/src/devices/bus/bbc/tube/tube_6502.cpp b/src/devices/bus/bbc/tube/tube_6502.cpp index beecb3a3019..8120ab16812 100644 --- a/src/devices/bus/bbc/tube/tube_6502.cpp +++ b/src/devices/bus/bbc/tube/tube_6502.cpp @@ -6,6 +6,10 @@ http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_ANC01_65022ndproc.html + Acorn ADC06 65C102 Co-processor + + http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_ADC06_65C102CoPro.html + **********************************************************************/ @@ -18,7 +22,8 @@ // DEVICE DEFINITIONS //************************************************************************** -DEFINE_DEVICE_TYPE(BBC_TUBE_6502, bbc_tube_6502_device, "bbc_tube_6502", "Acorn 6502 2nd Processor") +DEFINE_DEVICE_TYPE(BBC_TUBE_6502, bbc_tube_6502_device, "bbc_tube_6502", "Acorn 6502 2nd Processor") +DEFINE_DEVICE_TYPE(BBC_TUBE_65C102, bbc_tube_65c102_device, "bbc_tube_65c102", "Acorn 65C102 Co-Processor") //------------------------------------------------- @@ -27,7 +32,17 @@ DEFINE_DEVICE_TYPE(BBC_TUBE_6502, bbc_tube_6502_device, "bbc_tube_6502", "Acorn void bbc_tube_6502_device::tube_6502_mem(address_map &map) { - map(0x0000, 0xffff).rw(FUNC(bbc_tube_6502_device::read), FUNC(bbc_tube_6502_device::write)); + map(0x0000, 0xffff).m(m_bankdev, FUNC(address_map_bank_device::amap8)); + map(0xfef0, 0xfeff).rw(FUNC(bbc_tube_6502_device::tube_r), FUNC(bbc_tube_6502_device::tube_w)); +} + +void bbc_tube_6502_device::tube_6502_bank(address_map &map) +{ + // ROM enabled + map(0x00000, 0x0ffff).ram().share("ram"); + map(0x0f000, 0x0ffff).rom().region("rom", 0); + // ROM disabled + map(0x10000, 0x1ffff).ram().share("ram"); } //------------------------------------------------- @@ -36,28 +51,57 @@ void bbc_tube_6502_device::tube_6502_mem(address_map &map) ROM_START( tube_6502 ) ROM_REGION(0x1000, "rom", 0) - ROM_LOAD("6502tube.rom", 0x0000, 0x1000, CRC(98b5fe42) SHA1(338269d03cf6bfa28e09d1651c273ea53394323b)) + ROM_DEFAULT_BIOS("110") + ROM_SYSTEM_BIOS(0, "110", "Tube 1.10") + ROMX_LOAD("6502tube.rom", 0x0000, 0x1000, CRC(98b5fe42) SHA1(338269d03cf6bfa28e09d1651c273ea53394323b), ROM_BIOS(0)) + ROM_SYSTEM_BIOS(1, "121", "Tube 1.21 (ReCo6502)") + ROMX_LOAD("reco6502tube.rom", 0x0000, 0x1000, CRC(75b2a466) SHA1(9ecef24de58a48c3fbe01b12888c3f6a5d24f57f), ROM_BIOS(1)) +ROM_END + +ROM_START( tube_65c102 ) + ROM_REGION(0x1000, "rom", 0) + ROM_DEFAULT_BIOS("110") + ROM_SYSTEM_BIOS(0, "110", "Tube 1.10") + ROMX_LOAD("65c102_boot_110.rom", 0x0000, 0x1000, CRC(ad5b70cc) SHA1(0ac9a1c70e55a79e2c81e102afae1d016af229fa), ROM_BIOS(0)) // 2201,243-02 + ROM_SYSTEM_BIOS(1, "121", "Tube 1.21 (ReCo6502)") + ROMX_LOAD("reco6502tube.rom", 0x0000, 0x1000, CRC(75b2a466) SHA1(9ecef24de58a48c3fbe01b12888c3f6a5d24f57f), ROM_BIOS(1)) ROM_END //------------------------------------------------- // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(bbc_tube_6502_device::device_add_mconfig) - MCFG_DEVICE_ADD("m6502", M65C02, XTAL(12'000'000) / 4) - MCFG_DEVICE_PROGRAM_MAP(tube_6502_mem) +void bbc_tube_6502_device::add_common_devices(machine_config &config) +{ + ADDRESS_MAP_BANK(config, m_bankdev).set_map(&bbc_tube_6502_device::tube_6502_bank).set_options(ENDIANNESS_LITTLE, 8, 17, 0x10000); - MCFG_TUBE_ADD("ula") - MCFG_TUBE_PNMI_HANDLER(INPUTLINE("m6502", M65C02_NMI_LINE)) - MCFG_TUBE_PIRQ_HANDLER(INPUTLINE("m6502", M65C02_IRQ_LINE)) + TUBE(config, m_ula); + m_ula->pnmi_handler().set_inputline(m_maincpu, M65C02_NMI_LINE); + m_ula->pirq_handler().set_inputline(m_maincpu, M65C02_IRQ_LINE); /* internal ram */ - RAM(config, RAM_TAG).set_default_size("64K").set_default_value(0); + RAM(config, m_ram).set_default_size("64K").set_default_value(0); /* software lists */ - MCFG_SOFTWARE_LIST_ADD("flop_ls_6502", "bbc_flop_6502") - MCFG_SOFTWARE_LIST_ADD("flop_ls_65c102", "bbc_flop_65c102") -MACHINE_CONFIG_END + SOFTWARE_LIST(config, "flop_ls_6502").set_original("bbc_flop_6502"); + SOFTWARE_LIST(config, "flop_ls_65c102").set_original("bbc_flop_65c102"); +} + +void bbc_tube_6502_device::device_add_mconfig(machine_config &config) +{ + M65C02(config, m_maincpu, 12_MHz_XTAL / 4); + m_maincpu->set_addrmap(AS_PROGRAM, &bbc_tube_6502_device::tube_6502_mem); + + add_common_devices(config); +} + +void bbc_tube_65c102_device::device_add_mconfig(machine_config &config) +{ + M65C02(config, m_maincpu, 16_MHz_XTAL / 4); + m_maincpu->set_addrmap(AS_PROGRAM, &bbc_tube_65c102_device::tube_6502_mem); + + add_common_devices(config); +} //------------------------------------------------- // rom_region - device-specific ROM region @@ -68,6 +112,11 @@ const tiny_rom_entry *bbc_tube_6502_device::device_rom_region() const return ROM_NAME( tube_6502 ); } +const tiny_rom_entry *bbc_tube_65c102_device::device_rom_region() const +{ + return ROM_NAME( tube_65c102 ); +} + //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -76,14 +125,24 @@ const tiny_rom_entry *bbc_tube_6502_device::device_rom_region() const // bbc_tube_6502_device - constructor //------------------------------------------------- +bbc_tube_6502_device::bbc_tube_6502_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_bbc_tube_interface(mconfig, *this) + , m_maincpu(*this, "maincpu") + , m_bankdev(*this, "bankdev") + , m_ula(*this, "ula") + , m_ram(*this, "ram") + , m_rom(*this, "rom") +{ +} + bbc_tube_6502_device::bbc_tube_6502_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, BBC_TUBE_6502, tag, owner, clock), - device_bbc_tube_interface(mconfig, *this), - m_m6502(*this, "m6502"), - m_ula(*this, "ula"), - m_ram(*this, "ram"), - m_rom(*this, "rom"), - m_rom_enabled(true) + : bbc_tube_6502_device(mconfig, BBC_TUBE_6502, tag, owner, clock) +{ +} + +bbc_tube_65c102_device::bbc_tube_65c102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : bbc_tube_6502_device(mconfig, BBC_TUBE_65C102, tag, owner, clock) { } @@ -93,7 +152,6 @@ bbc_tube_6502_device::bbc_tube_6502_device(const machine_config &mconfig, const void bbc_tube_6502_device::device_start() { - m_slot = dynamic_cast<bbc_tube_slot_device *>(owner()); } //------------------------------------------------- @@ -102,9 +160,7 @@ void bbc_tube_6502_device::device_start() void bbc_tube_6502_device::device_reset() { - m_ula->reset(); - - m_rom_enabled = true; + m_bankdev->set_bank(0); } @@ -123,34 +179,16 @@ WRITE8_MEMBER(bbc_tube_6502_device::host_w) } -READ8_MEMBER(bbc_tube_6502_device::read) +READ8_MEMBER(bbc_tube_6502_device::tube_r) { - uint8_t data; + // Disable ROM on first access + if (!machine().side_effects_disabled()) + m_bankdev->set_bank(1); - if (offset >= 0xfef0 && offset <= 0xfeff) - { - if (!machine().side_effects_disabled()) m_rom_enabled = false; - data = m_ula->parasite_r(space, offset); - } - else if (m_rom_enabled && (offset >= 0xf000)) - { - data = m_rom->base()[offset & 0xfff]; - } - else - { - data = m_ram->pointer()[offset]; - } - return data; + return m_ula->parasite_r(space, offset); } -WRITE8_MEMBER(bbc_tube_6502_device::write) +WRITE8_MEMBER(bbc_tube_6502_device::tube_w) { - if (offset >= 0xfef0 && offset <= 0xfeff) - { - m_ula->parasite_w(space, offset, data); - } - else - { - m_ram->pointer()[offset] = data; - } + m_ula->parasite_w(space, offset, data); } diff --git a/src/devices/bus/bbc/tube/tube_6502.h b/src/devices/bus/bbc/tube/tube_6502.h index 67d14bd539f..244eb9f2105 100644 --- a/src/devices/bus/bbc/tube/tube_6502.h +++ b/src/devices/bus/bbc/tube/tube_6502.h @@ -6,6 +6,10 @@ http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_ANC01_65022ndproc.html + Acorn ADC06 65C102 Co-processor + + http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_ADC06_65C102CoPro.html + **********************************************************************/ @@ -14,6 +18,7 @@ #include "tube.h" #include "cpu/m6502/m65c02.h" +#include "machine/bankdev.h" #include "machine/ram.h" #include "machine/tube.h" @@ -32,6 +37,8 @@ public: bbc_tube_6502_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: + bbc_tube_6502_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + // device-level overrides virtual void device_start() override; virtual void device_reset() override; @@ -40,26 +47,40 @@ protected: virtual void device_add_mconfig(machine_config &config) override; virtual const tiny_rom_entry *device_rom_region() const override; + void tube_6502_bank(address_map &map); + void tube_6502_mem(address_map &map); + + void add_common_devices(machine_config &config); + virtual DECLARE_READ8_MEMBER( host_r ) override; virtual DECLARE_WRITE8_MEMBER( host_w ) override; -private: - required_device<cpu_device> m_m6502; + virtual DECLARE_READ8_MEMBER( tube_r ); + virtual DECLARE_WRITE8_MEMBER( tube_w ); + + required_device<cpu_device> m_maincpu; + required_device<address_map_bank_device> m_bankdev; required_device<tube_device> m_ula; required_device<ram_device> m_ram; required_memory_region m_rom; +}; - bool m_rom_enabled; - DECLARE_READ8_MEMBER( read ); - DECLARE_WRITE8_MEMBER( write ); +class bbc_tube_65c102_device : public bbc_tube_6502_device +{ +public: + bbc_tube_65c102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - void tube_6502_mem(address_map &map); +protected: + // optional information overrides + virtual void device_add_mconfig(machine_config &config) override; + virtual const tiny_rom_entry *device_rom_region() const override; }; // device type definition DECLARE_DEVICE_TYPE(BBC_TUBE_6502, bbc_tube_6502_device) +DECLARE_DEVICE_TYPE(BBC_TUBE_65C102, bbc_tube_65c102_device) #endif /* MAME_BUS_BBC_TUBE_6502_H */ diff --git a/src/devices/bus/bbc/tube/tube_65c102.cpp b/src/devices/bus/bbc/tube/tube_65c102.cpp deleted file mode 100644 index 56668f8c830..00000000000 --- a/src/devices/bus/bbc/tube/tube_65c102.cpp +++ /dev/null @@ -1,156 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Nigel Barnes -/********************************************************************** - - Acorn ADC06 65C102 Co-processor - - http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_ADC06_65C102CoPro.html - -**********************************************************************/ - - -#include "emu.h" -#include "tube_65c102.h" -#include "softlist_dev.h" - - -//************************************************************************** -// DEVICE DEFINITIONS -//************************************************************************** - -DEFINE_DEVICE_TYPE(BBC_TUBE_65C102, bbc_tube_65c102_device, "bbc_tube_65c102", "Acorn 65C102 Co-Processor") - - -//------------------------------------------------- -// ADDRESS_MAP( tube_6502_mem ) -//------------------------------------------------- - -void bbc_tube_65c102_device::tube_6502_mem(address_map &map) -{ - map(0x0000, 0xffff).rw(FUNC(bbc_tube_65c102_device::read), FUNC(bbc_tube_65c102_device::write)); -} - -//------------------------------------------------- -// ROM( tube_65c102 ) -//------------------------------------------------- - -ROM_START( tube_65c102 ) - ROM_REGION(0x1000, "rom", 0) - ROM_LOAD("65c102_boot_110.rom", 0x0000, 0x1000, CRC(ad5b70cc) SHA1(0ac9a1c70e55a79e2c81e102afae1d016af229fa)) // 2201,243-02 -ROM_END - -//------------------------------------------------- -// device_add_mconfig - add device configuration -//------------------------------------------------- - -MACHINE_CONFIG_START(bbc_tube_65c102_device::device_add_mconfig) - MCFG_DEVICE_ADD("maincpu", M65C02, XTAL(16'000'000) / 4) - MCFG_DEVICE_PROGRAM_MAP(tube_6502_mem) - - MCFG_TUBE_ADD("ula") - MCFG_TUBE_PNMI_HANDLER(INPUTLINE("maincpu", M65C02_NMI_LINE)) - MCFG_TUBE_PIRQ_HANDLER(INPUTLINE("maincpu", M65C02_IRQ_LINE)) - - /* internal ram */ - RAM(config, RAM_TAG).set_default_size("64K").set_default_value(0); - - /* software lists */ - MCFG_SOFTWARE_LIST_ADD("flop_ls_6502", "bbc_flop_6502") - MCFG_SOFTWARE_LIST_ADD("flop_ls_65c102", "bbc_flop_65c102") -MACHINE_CONFIG_END - -//------------------------------------------------- -// rom_region - device-specific ROM region -//------------------------------------------------- - -const tiny_rom_entry *bbc_tube_65c102_device::device_rom_region() const -{ - return ROM_NAME( tube_65c102 ); -} - -//************************************************************************** -// LIVE DEVICE -//************************************************************************** - -//------------------------------------------------- -// bbc_tube_65c102_device - constructor -//------------------------------------------------- - -bbc_tube_65c102_device::bbc_tube_65c102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, BBC_TUBE_65C102, tag, owner, clock), - device_bbc_tube_interface(mconfig, *this), - m_maincpu(*this, "maincpu"), - m_ula(*this, "ula"), - m_ram(*this, "ram"), - m_rom(*this, "rom"), - m_rom_enabled(true) -{ -} - -//------------------------------------------------- -// device_start - device-specific startup -//------------------------------------------------- - -void bbc_tube_65c102_device::device_start() -{ - m_slot = dynamic_cast<bbc_tube_slot_device *>(owner()); -} - -//------------------------------------------------- -// device_reset - device-specific reset -//------------------------------------------------- - -void bbc_tube_65c102_device::device_reset() -{ - m_ula->reset(); - - m_rom_enabled = true; -} - - -//************************************************************************** -// IMPLEMENTATION -//************************************************************************** - -READ8_MEMBER(bbc_tube_65c102_device::host_r) -{ - return m_ula->host_r(space, offset); -} - -WRITE8_MEMBER(bbc_tube_65c102_device::host_w) -{ - m_ula->host_w(space, offset, data); -} - - -READ8_MEMBER(bbc_tube_65c102_device::read) -{ - uint8_t data; - - if ((offset >= 0xfef0) && (offset <= 0xfeff)) - { - if (!machine().side_effects_disabled()) m_rom_enabled = false; - data = m_ula->parasite_r(space, offset); - } - else if (m_rom_enabled && (offset >= 0xf000)) - { - data = m_rom->base()[offset & 0xfff]; - } - else - { - data = m_ram->pointer()[offset]; - } - return data; -} - -WRITE8_MEMBER(bbc_tube_65c102_device::write) -{ - if ((offset >= 0xfef0) && (offset <= 0xfeff)) - { - m_ula->parasite_w(space, offset, data); - } - else - { - m_ram->pointer()[offset] = data; - } -} diff --git a/src/devices/bus/bbc/tube/tube_65c102.h b/src/devices/bus/bbc/tube/tube_65c102.h deleted file mode 100644 index 1ba891739d1..00000000000 --- a/src/devices/bus/bbc/tube/tube_65c102.h +++ /dev/null @@ -1,66 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Nigel Barnes -/********************************************************************** - - Acorn ADC06 65C102 Co-processor - - http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_ADC06_65C102CoPro.html - -**********************************************************************/ - - -#ifndef MAME_BUS_BBC_TUBE_65C102_H -#define MAME_BUS_BBC_TUBE_65C102_H - -#include "tube.h" -#include "cpu/m6502/m65c02.h" -#include "machine/ram.h" -#include "machine/tube.h" - -//************************************************************************** -// TYPE DEFINITIONS -//************************************************************************** - -// ======================> bbc_tube_65c102_device - -class bbc_tube_65c102_device : - public device_t, - public device_bbc_tube_interface -{ -public: - // construction/destruction - bbc_tube_65c102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - -protected: - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - - // optional information overrides - virtual void device_add_mconfig(machine_config &config) override; - virtual const tiny_rom_entry *device_rom_region() const override; - - virtual DECLARE_READ8_MEMBER( host_r ) override; - virtual DECLARE_WRITE8_MEMBER( host_w ) override; - -private: - required_device<cpu_device> m_maincpu; - required_device<tube_device> m_ula; - required_device<ram_device> m_ram; - required_memory_region m_rom; - - bool m_rom_enabled; - - DECLARE_READ8_MEMBER( read ); - DECLARE_WRITE8_MEMBER( write ); - - void tube_6502_mem(address_map &map); -}; - - - -// device type definition -DECLARE_DEVICE_TYPE(BBC_TUBE_65C102, bbc_tube_65c102_device) - - -#endif /* MAME_BUS_BBC_TUBE_65C102_H */ diff --git a/src/devices/bus/bbc/tube/tube_80286.cpp b/src/devices/bus/bbc/tube/tube_80286.cpp index bf0bc1404ca..f38761341f5 100644 --- a/src/devices/bus/bbc/tube/tube_80286.cpp +++ b/src/devices/bus/bbc/tube/tube_80286.cpp @@ -47,7 +47,7 @@ void bbc_tube_80286_device::tube_80286_io(address_map &map) // ROM( tube_80286 ) //------------------------------------------------- -ROM_START( tube_80286 ) +ROM_START(tube_80286) ROM_REGION(0x4000, "bootstrap", 0) ROM_LOAD16_BYTE("m512_lo.ic31", 0x0000, 0x2000, CRC(c0df8707) SHA1(7f6d843d5aea6bdb36cbd4623ae942b16b96069d)) // 2201,287-02 ROM_LOAD16_BYTE("m512_hi.ic32", 0x0001, 0x2000, CRC(e47f10b2) SHA1(45dc8d7e7936afbec6de423569d9005a1c350316)) // 2201,288-02 @@ -57,22 +57,23 @@ ROM_END // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(bbc_tube_80286_device::device_add_mconfig) - MCFG_DEVICE_ADD("i80286", I80286, XTAL(12'000'000) / 2) - MCFG_DEVICE_PROGRAM_MAP(tube_80286_mem) - MCFG_DEVICE_IO_MAP(tube_80286_io) - MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE(DEVICE_SELF, bbc_tube_80286_device, irq_callback) +void bbc_tube_80286_device::device_add_mconfig(machine_config &config) +{ + I80286(config, m_i80286, 12_MHz_XTAL / 2); + m_i80286->set_addrmap(AS_PROGRAM, &bbc_tube_80286_device::tube_80286_mem); + m_i80286->set_addrmap(AS_IO, &bbc_tube_80286_device::tube_80286_io); + m_i80286->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(bbc_tube_80286_device::irq_callback), this)); - MCFG_TUBE_ADD("ula") - MCFG_TUBE_PNMI_HANDLER(INPUTLINE("i80286", INPUT_LINE_NMI)) - MCFG_TUBE_PIRQ_HANDLER(INPUTLINE("i80286", INPUT_LINE_INT0)) + TUBE(config, m_ula); + m_ula->pnmi_handler().set_inputline(m_i80286, INPUT_LINE_NMI); + m_ula->pirq_handler().set_inputline(m_i80286, INPUT_LINE_INT0); /* internal ram */ - RAM(config, RAM_TAG).set_default_size("1M"); + RAM(config, m_ram).set_default_size("1M"); /* software lists */ - MCFG_SOFTWARE_LIST_ADD("flop_ls_80186", "bbc_flop_80186") -MACHINE_CONFIG_END + SOFTWARE_LIST(config, "flop_ls_80186").set_original("bbc_flop_80186"); +} //------------------------------------------------- // rom_region - device-specific ROM region @@ -117,6 +118,10 @@ void bbc_tube_80286_device::device_start() void bbc_tube_80286_device::device_reset() { m_ula->reset(); + + address_space &program = m_i80286->space(AS_PROGRAM); + + program.install_rom(0xc0000, 0xc3fff, 0x3c000, m_bootstrap->base()); } diff --git a/src/devices/bus/bbc/tube/tube_arm.cpp b/src/devices/bus/bbc/tube/tube_arm.cpp index 27879f79119..444e188a657 100644 --- a/src/devices/bus/bbc/tube/tube_arm.cpp +++ b/src/devices/bus/bbc/tube/tube_arm.cpp @@ -27,6 +27,7 @@ void bbc_tube_arm_device::tube_arm_mem(address_map &map) { map.unmap_value_high(); map(0x0000000, 0x03fffff).rw(FUNC(bbc_tube_arm_device::ram_r), FUNC(bbc_tube_arm_device::ram_w)); + map(0x0400000, 0x0ffffff).noprw(); map(0x1000000, 0x100001f).rw("ula", FUNC(tube_device::parasite_r), FUNC(tube_device::parasite_w)).umask32(0x000000ff); map(0x3000000, 0x3003fff).rom().region("bootstrap", 0).mirror(0xc000); } @@ -50,21 +51,22 @@ ROM_END // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(bbc_tube_arm_device::device_add_mconfig) - MCFG_DEVICE_ADD("arm", ARM, XTAL(20'000'000) / 3) - MCFG_DEVICE_PROGRAM_MAP(tube_arm_mem) +void bbc_tube_arm_device::device_add_mconfig(machine_config &config) +{ + ARM(config, m_arm, 20_MHz_XTAL / 3); + m_arm->set_addrmap(AS_PROGRAM, &bbc_tube_arm_device::tube_arm_mem); - MCFG_TUBE_ADD("ula") - MCFG_TUBE_HIRQ_HANDLER(WRITELINE(DEVICE_SELF_OWNER, bbc_tube_slot_device, irq_w)) - MCFG_TUBE_PNMI_HANDLER(INPUTLINE("arm", ARM_FIRQ_LINE)) - MCFG_TUBE_PIRQ_HANDLER(INPUTLINE("arm", ARM_IRQ_LINE)) + TUBE(config, m_ula); + m_ula->hirq_handler().set(DEVICE_SELF_OWNER, FUNC(bbc_tube_slot_device::irq_w)); + m_ula->pnmi_handler().set_inputline(m_arm, ARM_FIRQ_LINE); + m_ula->pirq_handler().set_inputline(m_arm, ARM_IRQ_LINE); /* internal ram */ - RAM(config, RAM_TAG).set_default_size("4M").set_default_value(0); + RAM(config, m_ram).set_default_size("4M").set_default_value(0); /* software lists */ - MCFG_SOFTWARE_LIST_ADD("flop_ls_arm", "bbc_flop_arm") -MACHINE_CONFIG_END + SOFTWARE_LIST(config, "flop_ls_arm").set_original("bbc_flop_arm"); +} //------------------------------------------------- // rom_region - device-specific ROM region diff --git a/src/devices/bus/bbc/tube/tube_z80.cpp b/src/devices/bus/bbc/tube/tube_z80.cpp index b759fe05898..cc6f87527bf 100644 --- a/src/devices/bus/bbc/tube/tube_z80.cpp +++ b/src/devices/bus/bbc/tube/tube_z80.cpp @@ -61,24 +61,25 @@ ROM_END // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(bbc_tube_z80_device::device_add_mconfig) - MCFG_DEVICE_ADD("z80", Z80, XTAL(12'000'000) / 2) - MCFG_DEVICE_PROGRAM_MAP(tube_z80_mem) - MCFG_DEVICE_OPCODES_MAP(tube_z80_fetch) - MCFG_DEVICE_IO_MAP(tube_z80_io) - MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE(DEVICE_SELF, bbc_tube_z80_device, irq_callback) - - MCFG_TUBE_ADD("ula") - MCFG_TUBE_HIRQ_HANDLER(WRITELINE(DEVICE_SELF_OWNER, bbc_tube_slot_device, irq_w)) - MCFG_TUBE_PNMI_HANDLER(WRITELINE(*this, bbc_tube_z80_device, nmi_w)) - MCFG_TUBE_PIRQ_HANDLER(INPUTLINE("z80", INPUT_LINE_IRQ0)) +void bbc_tube_z80_device::device_add_mconfig(machine_config &config) +{ + Z80(config, m_z80, 12_MHz_XTAL / 2); + m_z80->set_addrmap(AS_PROGRAM, &bbc_tube_z80_device::tube_z80_mem); + m_z80->set_addrmap(AS_OPCODES, &bbc_tube_z80_device::tube_z80_fetch); + m_z80->set_addrmap(AS_IO, &bbc_tube_z80_device::tube_z80_io); + m_z80->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(bbc_tube_z80_device::irq_callback), this)); + + TUBE(config, m_ula); + m_ula->hirq_handler().set(DEVICE_SELF_OWNER, FUNC(bbc_tube_slot_device::irq_w)); + m_ula->pnmi_handler().set(FUNC(bbc_tube_z80_device::nmi_w)); + m_ula->pirq_handler().set_inputline(m_z80, INPUT_LINE_IRQ0); /* internal ram */ - RAM(config, RAM_TAG).set_default_size("64K").set_default_value(0); + RAM(config, m_ram).set_default_size("64K").set_default_value(0); /* software lists */ - MCFG_SOFTWARE_LIST_ADD("flop_ls_z80", "bbc_flop_z80") -MACHINE_CONFIG_END + SOFTWARE_LIST(config, "flop_ls_z80").set_original("bbc_flop_z80"); +} //------------------------------------------------- // rom_region - device-specific ROM region diff --git a/src/devices/bus/bbc/tube/tube_zep100.cpp b/src/devices/bus/bbc/tube/tube_zep100.cpp index 2096019c671..e7f223a992f 100644 --- a/src/devices/bus/bbc/tube/tube_zep100.cpp +++ b/src/devices/bus/bbc/tube/tube_zep100.cpp @@ -177,14 +177,14 @@ READ8_MEMBER(bbc_tube_zep100_device::io_r) if (!machine().side_effects_disabled()) m_rom_enabled = !BIT(offset, 2); - data = m_ppi->read(space, offset & 0x03); + data = m_ppi->read(offset & 0x03); return data; } WRITE8_MEMBER(bbc_tube_zep100_device::io_w) { - m_ppi->write(space, offset & 0x03, data); + m_ppi->write(offset & 0x03, data); } diff --git a/src/devices/bus/bbc/userport/userport.h b/src/devices/bus/bbc/userport/userport.h index 22003968ee9..e2807146efe 100644 --- a/src/devices/bus/bbc/userport/userport.h +++ b/src/devices/bus/bbc/userport/userport.h @@ -33,20 +33,6 @@ //************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_BBC_USERPORT_SLOT_ADD(_tag, _slot_intf, _def_slot) \ - MCFG_DEVICE_ADD(_tag, BBC_USERPORT_SLOT, 0) \ - MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) - -#define MCFG_BBC_USERPORT_CB1_HANDLER(_devcb) \ - downcast<bbc_userport_slot_device &>(*device).set_cb1_handler(DEVCB_##_devcb); - -#define MCFG_BBC_USERPORT_CB2_HANDLER(_devcb) \ - downcast<bbc_userport_slot_device &>(*device).set_cb2_handler(DEVCB_##_devcb); - -//************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -59,11 +45,21 @@ class bbc_userport_slot_device : public device_t, public device_slot_interface { public: // construction/destruction - bbc_userport_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + template <typename T> + bbc_userport_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) + : bbc_userport_slot_device(mconfig, tag, owner) + { + option_reset(); + slot_options(*this); + set_default_option(default_option); + set_fixed(false); + } + + bbc_userport_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); // callbacks - template <class Object> devcb_base &set_cb1_handler(Object &&cb) { return m_cb1_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_cb2_handler(Object &&cb) { return m_cb2_handler.set_callback(std::forward<Object>(cb)); } + auto cb1_handler() { return m_cb1_handler.bind(); } + auto cb2_handler() { return m_cb2_handler.bind(); } DECLARE_WRITE_LINE_MEMBER(cb1_w) { m_cb1_handler(state); } DECLARE_WRITE_LINE_MEMBER(cb2_w) { m_cb2_handler(state); } diff --git a/src/devices/bus/coco/coco_multi.cpp b/src/devices/bus/coco/coco_multi.cpp index e8ae24c7b60..60a2b99286c 100644 --- a/src/devices/bus/coco/coco_multi.cpp +++ b/src/devices/bus/coco/coco_multi.cpp @@ -100,6 +100,7 @@ namespace virtual void device_add_mconfig(machine_config &config) override; virtual uint8_t* get_cart_base() override; + virtual uint32_t get_cart_size() override; // these are only public so they can be in a MACHINE_CONFIG_START // declaration; don't think about them as publically accessable @@ -444,6 +445,16 @@ uint8_t* coco_multipak_device::get_cart_base() //------------------------------------------------- +// get_cart_size +//------------------------------------------------- + +uint32_t coco_multipak_device::get_cart_size() +{ + return active_cts_slot().get_cart_size(); +} + + +//------------------------------------------------- // scs_read //------------------------------------------------- diff --git a/src/devices/bus/coco/coco_pak.cpp b/src/devices/bus/coco/coco_pak.cpp index 6605a992f14..16f17441ed4 100644 --- a/src/devices/bus/coco/coco_pak.cpp +++ b/src/devices/bus/coco/coco_pak.cpp @@ -95,6 +95,15 @@ const tiny_rom_entry *coco_pak_device::device_rom_region() const return ROM_NAME( coco_pak ); } +//------------------------------------------------- +// get_cart_size +//------------------------------------------------- + +uint32_t coco_pak_device::get_cart_size() +{ + return 0x8000; +} + /*------------------------------------------------- device_reset - device-specific startup -------------------------------------------------*/ @@ -121,6 +130,17 @@ uint8_t* coco_pak_device::get_cart_base() return memregion(CARTSLOT_TAG)->base(); } +/*------------------------------------------------- + get_cart_memregion +-------------------------------------------------*/ + +memory_region* coco_pak_device::get_cart_memregion() +{ + return memregion(CARTSLOT_TAG); +} + + + /*************************************************************************** BANKED CARTRIDGES ***************************************************************************/ diff --git a/src/devices/bus/coco/coco_pak.h b/src/devices/bus/coco/coco_pak.h index 088d7e278ac..43168e5e32c 100644 --- a/src/devices/bus/coco/coco_pak.h +++ b/src/devices/bus/coco/coco_pak.h @@ -26,6 +26,8 @@ public: virtual ioport_constructor device_input_ports() const override; virtual uint8_t* get_cart_base() override; + virtual uint32_t get_cart_size() override; + virtual memory_region* get_cart_memregion() override; protected: coco_pak_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/coco/cococart.cpp b/src/devices/bus/coco/cococart.cpp index 93d1c42453f..2c009aa8724 100644 --- a/src/devices/bus/coco/cococart.cpp +++ b/src/devices/bus/coco/cococart.cpp @@ -387,9 +387,9 @@ uint32_t cococart_slot_device::get_cart_size() { if (m_cart != nullptr) return m_cart->get_cart_size(); - return 0; -} + return 0x8000; +} //------------------------------------------------- // set_cart_base_update @@ -410,20 +410,24 @@ image_init_result cococart_slot_device::call_load() { if (m_cart) { - offs_t read_length; + memory_region *cart_mem = m_cart->get_cart_memregion(); + uint8_t *base = cart_mem->base(); + offs_t read_length, cart_legnth = cart_mem->bytes();; + if (!loaded_through_softlist()) { - read_length = fread(m_cart->get_cart_base(), m_cart->get_cart_size()); + read_length = fread(base, cart_legnth); } else { read_length = get_software_region_length("rom"); - memcpy(m_cart->get_cart_base(), get_software_region("rom"), read_length); + memcpy(base, get_software_region("rom"), read_length); } - while(read_length < m_cart->get_cart_size()) + + while (read_length < cart_legnth) { offs_t len = std::min(read_length, m_cart->get_cart_size() - read_length); - memcpy(m_cart->get_cart_base() + read_length, m_cart->get_cart_base(), len); + memcpy(base + read_length, base, len); read_length += len; } } @@ -565,8 +569,22 @@ void device_cococart_interface::cart_base_changed(void) { if (!m_update.isnull()) m_update(get_cart_base()); + else + { + // propagate up to host interface + device_cococart_interface *host = dynamic_cast<device_cococart_interface*>(m_host); + host->cart_base_changed(); + } } +/*------------------------------------------------- + get_cart_memregion +-------------------------------------------------*/ + +memory_region* device_cococart_interface::get_cart_memregion() +{ + return 0; +} //------------------------------------------------- // cartridge_space diff --git a/src/devices/bus/coco/cococart.h b/src/devices/bus/coco/cococart.h index 325d5f2e1d6..2d5d37fd443 100644 --- a/src/devices/bus/coco/cococart.h +++ b/src/devices/bus/coco/cococart.h @@ -114,7 +114,7 @@ public: // cart base uint8_t *get_cart_base(); - uint32_t get_cart_size(); + virtual uint32_t get_cart_size(); void set_cart_base_update(cococart_base_update_delegate update); private: @@ -180,6 +180,8 @@ public: virtual uint8_t* get_cart_base(); virtual uint32_t get_cart_size(); void set_cart_base_update(cococart_base_update_delegate update); + virtual memory_region* get_cart_memregion(); + virtual void interface_config_complete() override; virtual void interface_pre_start() override; diff --git a/src/devices/bus/cpc/cpc_rs232.cpp b/src/devices/bus/cpc/cpc_rs232.cpp index a0f09dd5ac5..10f63d71f84 100644 --- a/src/devices/bus/cpc/cpc_rs232.cpp +++ b/src/devices/bus/cpc/cpc_rs232.cpp @@ -149,10 +149,10 @@ WRITE8_MEMBER(cpc_rs232_device::dart_w) READ8_MEMBER(cpc_rs232_device::pit_r) { - return m_pit->read(space,offset); + return m_pit->read(offset); } WRITE8_MEMBER(cpc_rs232_device::pit_w) { - m_pit->write(space,offset,data); + m_pit->write(offset,data); } diff --git a/src/devices/bus/cpc/ddi1.cpp b/src/devices/bus/cpc/ddi1.cpp index bac64263871..6e75738d76a 100644 --- a/src/devices/bus/cpc/ddi1.cpp +++ b/src/devices/bus/cpc/ddi1.cpp @@ -41,7 +41,7 @@ const tiny_rom_entry *cpc_ddi1_device::device_rom_region() const // device machine config MACHINE_CONFIG_START(cpc_ddi1_device::device_add_mconfig) - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765:0", ddi1_floppies, "3ssdd", floppy_image_device::default_floppy_formats) MCFG_SOFTWARE_LIST_ADD("flop_list","cpc_flop") diff --git a/src/devices/bus/cpc/magicsound.cpp b/src/devices/bus/cpc/magicsound.cpp index 5884ba3267c..1ea0293ffe3 100644 --- a/src/devices/bus/cpc/magicsound.cpp +++ b/src/devices/bus/cpc/magicsound.cpp @@ -127,9 +127,9 @@ WRITE8_MEMBER(al_magicsound_device::timer_w) { // can both PITs be selected at the same time? if(offset & 0x08) - m_timer1->write(space,offset & 0x03,data); + m_timer1->write(offset & 0x03,data); if(offset & 0x04) - m_timer2->write(space,offset & 0x03,data); + m_timer2->write(offset & 0x03,data); } WRITE8_MEMBER(al_magicsound_device::volume_w) diff --git a/src/devices/bus/dmv/k210.cpp b/src/devices/bus/dmv/k210.cpp index 6001f5d8df4..df16006f19b 100644 --- a/src/devices/bus/dmv/k210.cpp +++ b/src/devices/bus/dmv/k210.cpp @@ -99,13 +99,13 @@ MACHINE_CONFIG_END void dmv_k210_device::io_read(address_space &space, int ifsel, offs_t offset, uint8_t &data) { if (ifsel == 0) - data = m_ppi->read(space, offset & 0x03); + data = m_ppi->read(offset & 0x03); } void dmv_k210_device::io_write(address_space &space, int ifsel, offs_t offset, uint8_t data) { if (ifsel == 0) - m_ppi->write(space, offset & 0x03, data); + m_ppi->write(offset & 0x03, data); } READ8_MEMBER( dmv_k210_device::porta_r ) diff --git a/src/devices/bus/dmv/k220.cpp b/src/devices/bus/dmv/k220.cpp index 52e33d0db09..8776ae629d5 100644 --- a/src/devices/bus/dmv/k220.cpp +++ b/src/devices/bus/dmv/k220.cpp @@ -138,8 +138,8 @@ dmv_k220_device::dmv_k220_device(const machine_config &mconfig, const char *tag, void dmv_k220_device::device_start() { address_space &space = machine().device<cpu_device>("maincpu")->space(AS_IO); - space.install_readwrite_handler(0x08, 0x0b, read8_delegate(FUNC(pit8253_device::read), &(*m_pit)), write8_delegate(FUNC(pit8253_device::write), &(*m_pit)), 0); - space.install_readwrite_handler(0x0c, 0x0f, read8_delegate(FUNC(i8255_device::read), &(*m_ppi)), write8_delegate(FUNC(i8255_device::write), &(*m_ppi)), 0); + space.install_readwrite_handler(0x08, 0x0b, read8sm_delegate(FUNC(pit8253_device::read), &(*m_pit)), write8sm_delegate(FUNC(pit8253_device::write), &(*m_pit)), 0); + space.install_readwrite_handler(0x0c, 0x0f, read8sm_delegate(FUNC(i8255_device::read), &(*m_ppi)), write8sm_delegate(FUNC(i8255_device::write), &(*m_ppi)), 0); m_digits.resolve(); } diff --git a/src/devices/bus/ecbbus/grip.cpp b/src/devices/bus/ecbbus/grip.cpp index dcde8594016..fd813260297 100644 --- a/src/devices/bus/ecbbus/grip.cpp +++ b/src/devices/bus/ecbbus/grip.cpp @@ -312,7 +312,7 @@ WRITE8_MEMBER( ecb_grip21_device::ppi_pc_w ) m_sti->i7_w(m_ia); // PROF-80 handshaking - m_ppi_pc = (!BIT(data, 7) << 7) | (!BIT(data, 5) << 6) | (m_ppi->read_pa() & 0x3f); + m_ppi_pc = (!BIT(data, 7) << 7) | (!BIT(data, 5) << 6) | (m_ppi->pa_r() & 0x3f); } //------------------------------------------------- diff --git a/src/devices/bus/epson_sio/pf10.cpp b/src/devices/bus/epson_sio/pf10.cpp index b1c2859599d..a295975d964 100644 --- a/src/devices/bus/epson_sio/pf10.cpp +++ b/src/devices/bus/epson_sio/pf10.cpp @@ -72,7 +72,7 @@ MACHINE_CONFIG_START(epson_pf10_device::device_add_mconfig) MCFG_DEVICE_IO_MAP(cpu_io) MCFG_M6801_SER_TX(WRITELINE(DEVICE_SELF, epson_pf10_device, hd6303_tx_w)) - MCFG_UPD765A_ADD("upd765a", false, true) + UPD765A(config, m_fdc, false, true); MCFG_FLOPPY_DRIVE_ADD("upd765a:0", pf10_floppies, "smd165", floppy_image_device::default_floppy_formats) MCFG_EPSON_SIO_ADD("sio", nullptr) diff --git a/src/devices/bus/epson_sio/tf20.cpp b/src/devices/bus/epson_sio/tf20.cpp index 1ba26849112..bc9bb669b1e 100644 --- a/src/devices/bus/epson_sio/tf20.cpp +++ b/src/devices/bus/epson_sio/tf20.cpp @@ -101,8 +101,8 @@ MACHINE_CONFIG_START(epson_tf20_device::device_add_mconfig) m_mpsc->out_dtra_callback().set(FUNC(epson_tf20_device::dtra_w)); // floppy disk controller - MCFG_UPD765A_ADD("5a", true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE("19b", INPUT_LINE_IRQ0)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_cpu, INPUT_LINE_IRQ0); // floppy drives MCFG_FLOPPY_DRIVE_ADD("5a:0", tf20_floppies, "sd320", floppy_image_device::default_floppy_formats) diff --git a/src/devices/bus/generic/slot.h b/src/devices/bus/generic/slot.h index 6c60a58be0a..d0c0d84a053 100644 --- a/src/devices/bus/generic/slot.h +++ b/src/devices/bus/generic/slot.h @@ -189,7 +189,17 @@ protected: class generic_socket_device : public generic_slot_device { public: - generic_socket_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + template <typename T> + generic_socket_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *intf, const char *exts) + : generic_socket_device(mconfig, tag, owner, (uint32_t)0) + { + opts(*this); + set_fixed(false); + set_interface(intf); + set_extensions(exts); + } + + generic_socket_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual iodevice_t image_type() const override { return IO_ROM; } }; @@ -198,13 +208,14 @@ class generic_cartslot_device : public generic_slot_device { public: template <typename T> - generic_cartslot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *intf, const char *exts) + generic_cartslot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *intf, const char *exts = nullptr) : generic_cartslot_device(mconfig, tag, owner, (uint32_t)0) { opts(*this); set_fixed(false); set_interface(intf); - set_extensions(exts); + if (exts) + set_extensions(exts); } generic_cartslot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/hexbus/hx5102.cpp b/src/devices/bus/hexbus/hx5102.cpp index 580fad0e55e..1fbced1bc80 100644 --- a/src/devices/bus/hexbus/hx5102.cpp +++ b/src/devices/bus/hexbus/hx5102.cpp @@ -151,7 +151,7 @@ hx5102_device::hx5102_device(const machine_config &mconfig, const char *tag, dev WRITE8_MEMBER( hx5102_device::external_operation ) { - static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; + static char const *const extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; if (offset != IDLE_OP) LOGMASKED(LOG_WARN, "External operation %s not implemented on HX5102 board\n", extop[offset]); } @@ -688,8 +688,7 @@ void hx5102_device::device_add_mconfig(machine_config& config) // Not connected: Select lines (DS0, DS1), Head load (HDL), VCO // Tied to 1: READY // Tied to 0: TC - I8272A(config, m_floppy_ctrl, 0); - m_floppy_ctrl->set_ready_line_connected(false); + I8272A(config, m_floppy_ctrl, false); m_floppy_ctrl->intrq_wr_callback().set(FUNC(hx5102_device::fdc_irq_w)); m_floppy_ctrl->drq_wr_callback().set(FUNC(hx5102_device::fdc_drq_w)); diff --git a/src/devices/bus/hp80_io/82937.cpp b/src/devices/bus/hp80_io/82937.cpp index 6f36b5991fc..c0412610cb0 100644 --- a/src/devices/bus/hp80_io/82937.cpp +++ b/src/devices/bus/hp80_io/82937.cpp @@ -253,7 +253,7 @@ void hp82937_io_card_device::device_reset() void hp82937_io_card_device::update_data_out() { - m_ieee488->write_dio(m_dio_out ? m_cpu->p2_r(machine().dummy_space() , 0) : 0xff); + m_ieee488->write_dio(m_dio_out ? m_cpu->p2_r() : 0xff); } void hp82937_io_card_device::update_signals() @@ -264,7 +264,7 @@ void hp82937_io_card_device::update_signals() } m_updating = true; bool ctrl_active = BIT(m_latch , LATCH_CA_BIT); - uint8_t p1 = m_cpu->p1_r(machine().dummy_space() , 0); + uint8_t p1 = m_cpu->p1_r(); m_iatn = BIT(p1 , P1_ATN_BIT); if (ctrl_active) { m_ieee488->host_atn_w(m_iatn); diff --git a/src/devices/bus/hp_dio/hp98265a.cpp b/src/devices/bus/hp_dio/hp98265a.cpp new file mode 100644 index 00000000000..8146b2c16da --- /dev/null +++ b/src/devices/bus/hp_dio/hp98265a.cpp @@ -0,0 +1,303 @@ +// license:BSD-3-Clause +// copyright-holders:Sven Schnelle +/*************************************************************************** + + HP98265A SCSI interface + +***************************************************************************/ + +#include "emu.h" + +#define VERBOSE 0 +#include "logmacro.h" +#include "hp98265a.h" +#include "machine/nscsi_bus.h" +#include "machine/nscsi_cd.h" +#include "machine/nscsi_hd.h" +#include "machine/mb87030.h" + +DEFINE_DEVICE_TYPE_NS(HPDIO_98265A, bus::hp_dio, dio16_98265a_device, "hp98265a", "HP98265A SCSI S16 Interface") + +namespace bus { + namespace hp_dio { + +static void scsi_devices(device_slot_interface &device) +{ + device.option_add("cdrom", NSCSI_CDROM); + device.option_add("harddisk", NSCSI_HARDDISK); +} + +void dio16_98265a_device::mb87030_scsi_adapter(device_t *device) +{ + mb87030_device &spc = downcast<mb87030_device &>(*device); + spc.set_clock(8_MHz_XTAL); + + spc.out_irq_callback().set("^^", FUNC(dio16_98265a_device::irq_w)); + spc.out_dreq_callback().set("^^", FUNC(dio16_98265a_device::dmar0_w)); +} + +void dio16_98265a_device::device_add_mconfig(machine_config &config) +{ + NSCSI_BUS(config, m_scsibus, 0); + nscsi_connector &scsicon0(NSCSI_CONNECTOR(config, "scsibus:0", 0)); + scsi_devices(scsicon0); + scsicon0.set_default_option("harddisk"); + + scsi_devices(NSCSI_CONNECTOR(config, "scsibus:1", 0)); + scsi_devices(NSCSI_CONNECTOR(config, "scsibus:2", 0)); + scsi_devices(NSCSI_CONNECTOR(config, "scsibus:3", 0)); + scsi_devices(NSCSI_CONNECTOR(config, "scsibus:4", 0)); + + nscsi_connector &scsicon6(NSCSI_CONNECTOR(config, "scsibus:5", 0)); + scsi_devices(scsicon6); + scsicon6.set_default_option("cdrom"); + + scsi_devices(NSCSI_CONNECTOR(config, "scsibus:6", 0)); + nscsi_connector &scsicon7(NSCSI_CONNECTOR(config, "scsibus:7", 0)); + scsicon7.option_add_internal("mb87030", MB87030); + scsicon7.set_default_option("mb87030"); + scsicon7.set_fixed(true); + scsicon7.set_option_machine_config("mb87030", mb87030_scsi_adapter); +} + +dio16_98265a_device::dio16_98265a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + dio16_98265a_device(mconfig, HPDIO_98265A, tag, owner, clock) +{ +} + +dio16_98265a_device::dio16_98265a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, type, tag, owner, clock), + device_dio32_card_interface(mconfig, *this), + m_scsibus(*this, "scsibus"), + m_spc(*this, "scsibus:7:mb87030"), + m_sw1(*this, "SW1"), + m_sw2(*this, "SW2"), + m_irq_state(false) +{ +} + +constexpr int REG_SW1_INT_LEVEL_SHIFT = 0; +constexpr int REG_SW1_INT_LEVEL_MASK = 0x3; + +constexpr int REG_SW1_SELECT_CODE_SHIFT = 2; +constexpr int REG_SW1_SELECT_CODE_MASK = 0x1f; + +constexpr int REG_SW2_SCSI_ADDR_SHIFT = 0; +constexpr int REG_SW2_SCSI_ADDR_MASK = 0x07; + +constexpr int REG_SW2_SCSI_PARITY = 0x08; + +static INPUT_PORTS_START(hp98265a_port) + PORT_START("SW1") + PORT_DIPNAME(REG_SW1_INT_LEVEL_MASK << REG_SW1_INT_LEVEL_SHIFT, 0x01, "INT Level") + PORT_DIPSETTING(0 << REG_SW1_INT_LEVEL_SHIFT, "3") + PORT_DIPSETTING(1 << REG_SW1_INT_LEVEL_SHIFT, "4") + PORT_DIPSETTING(2 << REG_SW1_INT_LEVEL_SHIFT, "5") + PORT_DIPSETTING(3 << REG_SW1_INT_LEVEL_SHIFT, "6") + + PORT_DIPNAME(REG_SW1_SELECT_CODE_MASK << REG_SW1_SELECT_CODE_SHIFT, 0x0e << REG_SW1_SELECT_CODE_SHIFT, "Select code") + PORT_DIPSETTING(0 << REG_SW1_SELECT_CODE_SHIFT, "0") + PORT_DIPSETTING(1 << REG_SW1_SELECT_CODE_SHIFT, "1") + PORT_DIPSETTING(2 << REG_SW1_SELECT_CODE_SHIFT, "2") + PORT_DIPSETTING(3 << REG_SW1_SELECT_CODE_SHIFT, "3") + PORT_DIPSETTING(4 << REG_SW1_SELECT_CODE_SHIFT, "4") + PORT_DIPSETTING(5 << REG_SW1_SELECT_CODE_SHIFT, "5") + PORT_DIPSETTING(6 << REG_SW1_SELECT_CODE_SHIFT, "6") + PORT_DIPSETTING(7 << REG_SW1_SELECT_CODE_SHIFT, "7") + PORT_DIPSETTING(8 << REG_SW1_SELECT_CODE_SHIFT, "8") + PORT_DIPSETTING(9 << REG_SW1_SELECT_CODE_SHIFT, "9") + PORT_DIPSETTING(10 << REG_SW1_SELECT_CODE_SHIFT, "10") + PORT_DIPSETTING(11 << REG_SW1_SELECT_CODE_SHIFT, "11") + PORT_DIPSETTING(12 << REG_SW1_SELECT_CODE_SHIFT, "12") + PORT_DIPSETTING(13 << REG_SW1_SELECT_CODE_SHIFT, "13") + PORT_DIPSETTING(14 << REG_SW1_SELECT_CODE_SHIFT, "14") + PORT_DIPSETTING(15 << REG_SW1_SELECT_CODE_SHIFT, "15") + PORT_DIPSETTING(16 << REG_SW1_SELECT_CODE_SHIFT, "16") + PORT_DIPSETTING(17 << REG_SW1_SELECT_CODE_SHIFT, "17") + PORT_DIPSETTING(18 << REG_SW1_SELECT_CODE_SHIFT, "18") + PORT_DIPSETTING(19 << REG_SW1_SELECT_CODE_SHIFT, "19") + PORT_DIPSETTING(20 << REG_SW1_SELECT_CODE_SHIFT, "20") + PORT_DIPSETTING(21 << REG_SW1_SELECT_CODE_SHIFT, "21") + PORT_DIPSETTING(22 << REG_SW1_SELECT_CODE_SHIFT, "22") + PORT_DIPSETTING(23 << REG_SW1_SELECT_CODE_SHIFT, "23") + PORT_DIPSETTING(24 << REG_SW1_SELECT_CODE_SHIFT, "24") + PORT_DIPSETTING(25 << REG_SW1_SELECT_CODE_SHIFT, "25") + PORT_DIPSETTING(26 << REG_SW1_SELECT_CODE_SHIFT, "26") + PORT_DIPSETTING(27 << REG_SW1_SELECT_CODE_SHIFT, "27") + PORT_DIPSETTING(28 << REG_SW1_SELECT_CODE_SHIFT, "28") + PORT_DIPSETTING(29 << REG_SW1_SELECT_CODE_SHIFT, "29") + PORT_DIPSETTING(30 << REG_SW1_SELECT_CODE_SHIFT, "30") + PORT_DIPSETTING(31 << REG_SW1_SELECT_CODE_SHIFT, "31") + + PORT_START("SW2") + PORT_DIPNAME(REG_SW2_SCSI_ADDR_MASK << REG_SW2_SCSI_ADDR_SHIFT, 0x00, "SCSI Address") + PORT_DIPSETTING(0 << REG_SW2_SCSI_ADDR_SHIFT, "0") + PORT_DIPSETTING(1 << REG_SW2_SCSI_ADDR_SHIFT, "1") + PORT_DIPSETTING(2 << REG_SW2_SCSI_ADDR_SHIFT, "2") + PORT_DIPSETTING(3 << REG_SW2_SCSI_ADDR_SHIFT, "3") + PORT_DIPSETTING(4 << REG_SW2_SCSI_ADDR_SHIFT, "4") + PORT_DIPSETTING(5 << REG_SW2_SCSI_ADDR_SHIFT, "5") + PORT_DIPSETTING(6 << REG_SW2_SCSI_ADDR_SHIFT, "6") + PORT_DIPSETTING(7 << REG_SW2_SCSI_ADDR_SHIFT, "7") + + PORT_DIPNAME(REG_SW2_SCSI_PARITY, 0x00, "SCSI Parity") + PORT_DIPSETTING(0, "Off") + PORT_DIPSETTING(REG_SW2_SCSI_PARITY, "On") + +INPUT_PORTS_END + +ioport_constructor dio16_98265a_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(hp98265a_port); +} + +void dio16_98265a_device::device_start() +{ + save_item(NAME(m_irq_state)); + save_item(NAME(m_installed_io)); + save_item(NAME(m_control)); + save_item(NAME(m_dmar0)); + + m_installed_io = false; +} + +void dio16_98265a_device::device_reset() +{ + uint8_t code = m_sw1->read() >> REG_SW1_SELECT_CODE_SHIFT; + code &= REG_SW1_SELECT_CODE_MASK; + + if (!m_installed_io) + { + program_space()->install_readwrite_handler( + 0x600000 + (code * 0x10000), + 0x6007ff + (code * 0x10000), + read16_delegate(FUNC(dio16_98265a_device::io_r), this), + write16_delegate(FUNC(dio16_98265a_device::io_w), this)); + program_space()->install_device(0x6e0020, 0x6e003f, *m_spc, &mb87030_device::map, 0x00ff00ff); + m_installed_io = true; + } + m_control = 0; + m_irq_state = false; + m_spc->reset_w(true); + m_spc->reset_w(false); +} + +int dio16_98265a_device::get_int_level() +{ + return (m_sw1->read() >> REG_SW1_INT_LEVEL_SHIFT) & + REG_SW1_INT_LEVEL_MASK; + +} +READ16_MEMBER(dio16_98265a_device::io_r) +{ + + uint16_t ret = 0xffff; + + switch(offset) { + case 0: /* ID */ + ret = 0x07; + break; + case 1: + ret = m_control | (m_irq_state ? 0x40 : 0) | (get_int_level() << 4); + break; + case 2: + ret = m_spc->data_read(); + break; + case 3: + ret = 0xe8; /* Flush/Configuration register */ + break; + } + LOG("io_r: offset=%02X ret=%02X\n",offset, ret); + return ret; +} + +WRITE16_MEMBER(dio16_98265a_device::io_w) +{ + LOG("io_w: offset=%02X, data=%02X\n", offset, data); + + switch(offset) { + case 0: + device_reset(); + break; + case 1: + if (data & 0x80) + update_irq(m_irq_state); + else + update_irq(false); + m_control = data & 0x8f; + update_dma(); + break; + case 2: + uint8_t val = 0; + if (data & 0x80) + val |= nscsi_device::S_REQ; + if (data & 0x40) + val |= nscsi_device::S_ACK; + if (data & 0x08) + val |= nscsi_device::S_BSY; + if (data & 0x04) + val |= nscsi_device::S_MSG; + if (data & 0x02) + val |= nscsi_device::S_CTL; + if (data & 0x01) + val |= nscsi_device::S_INP; + m_spc->ctrl_write(val, nscsi_device::S_ALL); + break; + } +} + +void dio16_98265a_device::update_irq(bool state) +{ + int irq_level = get_int_level(); + LOG("irq_w: %sassert %d\n", state ? "" : "de", irq_level+3); + + irq3_out(state && irq_level == 0); + irq4_out(state && irq_level == 1); + irq5_out(state && irq_level == 2); + irq6_out(state && irq_level == 3); +} + +WRITE_LINE_MEMBER(dio16_98265a_device::irq_w) +{ + LOG("%s: %s\n", __FUNCTION__, state ? "true" : "false"); + + if ((m_control & 0x80) && m_irq_state != state) + update_irq(state); + + m_irq_state = state; +} + +void dio16_98265a_device::dmack_w_in(int channel, uint8_t data) +{ + if(channel == 0 && !(m_control & REG_CONTROL_DE0)) + return; + if(channel == 1 && !(m_control & REG_CONTROL_DE1)) + return; + + m_spc->dma_w(data); +} + +uint8_t dio16_98265a_device::dmack_r_in(int channel) +{ + if(channel == 0 && !(m_control & REG_CONTROL_DE0)) + return 0xff; + if(channel == 1 && !(m_control & REG_CONTROL_DE1)) + return 0xff; + + return m_spc->dma_r(); +} + +void dio16_98265a_device::update_dma() +{ + dmar0_out((m_control & REG_CONTROL_DE0) && m_dmar0); + dmar1_out((m_control & REG_CONTROL_DE1) && m_dmar0); +} +WRITE_LINE_MEMBER(dio16_98265a_device::dmar0_w) +{ + m_dmar0 = state; + update_dma(); + +} + +} +} diff --git a/src/devices/bus/hp_dio/hp98265a.h b/src/devices/bus/hp_dio/hp98265a.h new file mode 100644 index 00000000000..46941790f65 --- /dev/null +++ b/src/devices/bus/hp_dio/hp98265a.h @@ -0,0 +1,72 @@ +// license:BSD-3-Clause +// copyright-holders:Sven Schnelle + +#ifndef MAME_BUS_HPDIO_98265A_H +#define MAME_BUS_HPDIO_98265A_H + +#pragma once + +#include "hp_dio.h" +#include "machine/mb87030.h" +#include "bus/scsi/scsi.h" +#include "bus/scsi/scsicd.h" + +namespace bus { + namespace hp_dio { + +class dio16_98265a_device : + public device_t, + public device_dio32_card_interface +{ +public: + // construction/destruction + dio16_98265a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + void mb87030(device_t *device); + +protected: + dio16_98265a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + virtual ioport_constructor device_input_ports() const override; + virtual void device_add_mconfig(machine_config &config) override; + + DECLARE_READ16_MEMBER(io_r); + DECLARE_WRITE16_MEMBER(io_w); + + void dmack_w_in(int channel, uint8_t data) override; + uint8_t dmack_r_in(int channel) override; + + DECLARE_WRITE_LINE_MEMBER(dmar0_w); + + DECLARE_WRITE_LINE_MEMBER(irq_w); + + required_device<nscsi_bus_device> m_scsibus; + required_device<mb87030_device> m_spc; +private: + + static constexpr int REG_CONTROL_DE0 = (1 << 0); + static constexpr int REG_CONTROL_DE1 = (1 << 1); + + static void mb87030_scsi_adapter(device_t *device); + required_ioport m_sw1; + required_ioport m_sw2; + int get_int_level(); + void update_irq(bool state); + void update_dma(); + bool m_installed_io; + uint8_t m_control; + + bool m_irq_state; + bool m_dmar0; +}; +} +} + +DECLARE_DEVICE_TYPE_NS(HPDIO_98265A, bus::hp_dio, dio16_98265a_device) + +#endif // MAME_BUS_HPDIO_98265A_H diff --git a/src/devices/bus/hp_dio/hp98543.cpp b/src/devices/bus/hp_dio/hp98543.cpp index b9d75b5a7eb..a3bf039f35a 100644 --- a/src/devices/bus/hp_dio/hp98543.cpp +++ b/src/devices/bus/hp_dio/hp98543.cpp @@ -21,38 +21,44 @@ ROM_START(hp98543) ROM_LOAD("1818-3907.bin", 0x000000, 0x002000, CRC(5e2bf02a) SHA1(9ba9391cf39624ef8027ce42c84e100344b2a2b8)) ROM_END -DEFINE_DEVICE_TYPE(HPDIO_98543, dio16_98543_device, "dio98543", "HP98543 medium-res color DIO video card") - -MACHINE_CONFIG_START(dio16_98543_device::device_add_mconfig) - MCFG_SCREEN_ADD(HP98543_SCREEN_NAME, RASTER) - MCFG_SCREEN_UPDATE_DEVICE(DEVICE_SELF, dio16_98543_device, screen_update) - MCFG_SCREEN_SIZE(1024,400) - MCFG_SCREEN_VISIBLE_AREA(0, 1024-1, 0, 400-1) - MCFG_SCREEN_REFRESH_RATE(70) - MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, dio16_98543_device, vblank_w)); - - MCFG_DEVICE_ADD("topcat0", TOPCAT, XTAL(35904000)) - MCFG_TOPCAT_FB_WIDTH(1024) - MCFG_TOPCAT_FB_HEIGHT(400) - MCFG_TOPCAT_PLANEMASK(1) - - MCFG_DEVICE_ADD("topcat1", TOPCAT, XTAL(35904000)) - MCFG_TOPCAT_FB_WIDTH(1024) - MCFG_TOPCAT_FB_HEIGHT(400) - MCFG_TOPCAT_PLANEMASK(2) - - MCFG_DEVICE_ADD("topcat2", TOPCAT, XTAL(35904000)) - MCFG_TOPCAT_FB_WIDTH(1024) - MCFG_TOPCAT_FB_HEIGHT(400) - MCFG_TOPCAT_PLANEMASK(4) - - MCFG_DEVICE_ADD("topcat3", TOPCAT, XTAL(35904000)) - MCFG_TOPCAT_FB_WIDTH(1024) - MCFG_TOPCAT_FB_HEIGHT(400) - MCFG_TOPCAT_PLANEMASK(8) - - MCFG_DEVICE_ADD("nereid", NEREID, 0) -MACHINE_CONFIG_END +DEFINE_DEVICE_TYPE_NS(HPDIO_98543, bus::hp_dio, dio16_98543_device, "dio98543", "HP98543 medium-res color DIO video card") + +namespace bus { + namespace hp_dio { + +void dio16_98543_device::device_add_mconfig(machine_config &config) +{ + screen_device &screen(SCREEN(config, HP98543_SCREEN_NAME, SCREEN_TYPE_RASTER)); + screen.set_screen_update(FUNC(dio16_98543_device::screen_update)); + screen.screen_vblank().set(FUNC(dio16_98543_device::vblank_w)); + screen.set_raw(XTAL(39'504'000), 1408, 0, 1024, 425, 0, 400); + + topcat_device &topcat0(TOPCAT(config, "topcat0", XTAL(35904000))); + topcat0.set_fb_width(1024); + topcat0.set_fb_height(400); + topcat0.set_planemask(1); + topcat0.irq_out_cb().set(FUNC(dio16_98543_device::int0_w)); + + topcat_device &topcat1(TOPCAT(config, "topcat1", XTAL(35904000))); + topcat1.set_fb_width(1024); + topcat1.set_fb_height(400); + topcat1.set_planemask(2); + topcat1.irq_out_cb().set(FUNC(dio16_98543_device::int1_w)); + + topcat_device &topcat2(TOPCAT(config, "topcat2", XTAL(35904000))); + topcat2.set_fb_width(1024); + topcat2.set_fb_height(400); + topcat2.set_planemask(4); + topcat2.irq_out_cb().set(FUNC(dio16_98543_device::int2_w)); + + topcat_device &topcat3(TOPCAT(config, "topcat3", XTAL(35904000))); + topcat3.set_fb_width(1024); + topcat3.set_fb_height(400); + topcat3.set_planemask(8); + topcat3.irq_out_cb().set(FUNC(dio16_98543_device::int3_w)); + + NEREID(config, m_nereid, 0); +} const tiny_rom_entry *dio16_98543_device::device_rom_region() const { @@ -91,6 +97,9 @@ dio16_98543_device::dio16_98543_device(const machine_config &mconfig, device_typ void dio16_98543_device::device_start() { + save_item(NAME(m_intreg)); + save_item(NAME(m_ints)); + dio().install_memory( 0x200000, 0x27ffff, read16_delegate(FUNC(dio16_98543_device::vram_r), this), @@ -116,11 +125,15 @@ void dio16_98543_device::device_reset() READ16_MEMBER(dio16_98543_device::rom_r) { + if (offset == 1) + return m_intreg; return 0xff00 | m_rom[offset]; } WRITE16_MEMBER(dio16_98543_device::rom_w) { + if (offset == 1) + m_intreg = data; } READ16_MEMBER(dio16_98543_device::ctrl_r) @@ -159,11 +172,54 @@ WRITE_LINE_MEMBER(dio16_98543_device::vblank_w) tc->vblank_w(state); } +WRITE_LINE_MEMBER(dio16_98543_device::int0_w) +{ + m_ints[0] = state; + update_int(); +} + +WRITE_LINE_MEMBER(dio16_98543_device::int1_w) +{ + m_ints[1] = state; + update_int(); +} + +WRITE_LINE_MEMBER(dio16_98543_device::int2_w) +{ + m_ints[2] = state; + update_int(); +} + +WRITE_LINE_MEMBER(dio16_98543_device::int3_w) +{ + + m_ints[3] = state; + update_int(); +} + + +void dio16_98543_device::update_int() +{ + bool state = m_ints[0] || m_ints[1] || m_ints[2] || m_ints[3]; + int line = (m_intreg >> 3) & 7; + + if (!(m_intreg & 0x80)) + state = false; + + irq1_out(line == 1 && state); + irq2_out(line == 2 && state); + irq3_out(line == 3 && state); + irq4_out(line == 4 && state); + irq5_out(line == 5 && state); + irq6_out(line == 6 && state); + irq7_out(line == 7 && state); +} + uint32_t dio16_98543_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { int startx[TOPCAT_COUNT], starty[TOPCAT_COUNT]; int endx[TOPCAT_COUNT], endy[TOPCAT_COUNT]; - + bool plane_enabled[TOPCAT_COUNT]; bool changed = false; for (auto& tc: m_topcat) @@ -172,8 +228,10 @@ uint32_t dio16_98543_device::screen_update(screen_device &screen, bitmap_rgb32 & if (!changed) return UPDATE_HAS_NOT_CHANGED; - for (int i = 0; i < TOPCAT_COUNT; i++) + for (int i = 0; i < TOPCAT_COUNT; i++) { m_topcat[i]->get_cursor_pos(startx[i], starty[i], endx[i], endy[i]); + plane_enabled[i] = m_topcat[i]->plane_enabled(); + } for (int y = 0; y < m_v_pix; y++) { uint32_t *scanline = &bitmap.pix32(y); @@ -184,9 +242,14 @@ uint32_t dio16_98543_device::screen_update(screen_device &screen, bitmap_rgb32 & if (y >= starty[i] && y <= endy[i] && x >= startx[i] && x <= endx[i]) { tmp |= 1 << i; } + if (!plane_enabled[i]) + tmp &= ~(1 << i); } *scanline++ = m_nereid->map_color(tmp); } } return 0; } + +} // namespace bus::hp_dio +} // namespace bus diff --git a/src/devices/bus/hp_dio/hp98543.h b/src/devices/bus/hp_dio/hp98543.h index c1b9a5762bf..d2cdd27ca89 100644 --- a/src/devices/bus/hp_dio/hp98543.h +++ b/src/devices/bus/hp_dio/hp98543.h @@ -11,6 +11,8 @@ #include "video/nereid.h" #include "machine/ram.h" +namespace bus { + namespace hp_dio { class dio16_98543_device : public device_t, public device_dio16_card_interface, @@ -46,18 +48,28 @@ protected: private: WRITE_LINE_MEMBER(vblank_w); + WRITE_LINE_MEMBER(int0_w); + WRITE_LINE_MEMBER(int1_w); + WRITE_LINE_MEMBER(int2_w); + WRITE_LINE_MEMBER(int3_w); + const address_space_config m_space_config; void map(address_map &map); - + void update_int(); static constexpr int m_h_pix = 1024; static constexpr int m_v_pix = 400; required_region_ptr<uint8_t> m_rom; required_shared_ptr<uint8_t> m_vram; + uint8_t m_intreg; + bool m_ints[4]; }; +} // namespace bus::hp_dio +} // namespace bus + // device type definition -DECLARE_DEVICE_TYPE(HPDIO_98543, dio16_98543_device) +DECLARE_DEVICE_TYPE_NS(HPDIO_98543, bus::hp_dio, dio16_98543_device) #endif // MAME_BUS_HPDIO_98543_H diff --git a/src/devices/bus/hp_dio/hp98544.cpp b/src/devices/bus/hp_dio/hp98544.cpp index 824a393ddd2..9565d4632d2 100644 --- a/src/devices/bus/hp_dio/hp98544.cpp +++ b/src/devices/bus/hp_dio/hp98544.cpp @@ -15,41 +15,44 @@ #define HP98544_SCREEN_NAME "98544_screen" #define HP98544_ROM_REGION "98544_rom" -ROM_START( hp98544 ) - ROM_REGION( 0x2000, HP98544_ROM_REGION, 0 ) - ROM_LOAD( "98544_1818-1999.bin", 0x000000, 0x002000, CRC(8c7d6480) SHA1(d2bcfd39452c38bc652df39f84c7041cfdf6bd51) ) -ROM_END - -//************************************************************************** +//************************************************************************* // GLOBAL VARIABLES //************************************************************************** -DEFINE_DEVICE_TYPE(HPDIO_98544, dio16_98544_device, "dio98544", "HP98544 high-res monochrome DIO video card") +DEFINE_DEVICE_TYPE_NS(HPDIO_98544, bus::hp_dio, dio16_98544_device, "dio98544", "HP98544 high-res monochrome DIO video card") +namespace bus { + namespace hp_dio { + +ROM_START( hp98544 ) + ROM_REGION( 0x2000, HP98544_ROM_REGION, 0 ) + ROM_LOAD( "98544_1818-1999.bin", 0x000000, 0x002000, CRC(8c7d6480) SHA1(d2bcfd39452c38bc652df39f84c7041cfdf6bd51) ) +ROM_END //------------------------------------------------- // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(dio16_98544_device::device_add_mconfig) - MCFG_SCREEN_ADD(HP98544_SCREEN_NAME, RASTER) - MCFG_SCREEN_UPDATE_DEVICE(DEVICE_SELF, dio16_98544_device, screen_update) - MCFG_SCREEN_SIZE(1024,1024) - MCFG_SCREEN_VISIBLE_AREA(0, 1024-1, 0, 768-1) - MCFG_SCREEN_REFRESH_RATE(70) - MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, dio16_98544_device, vblank_w)) - - MCFG_DEVICE_ADD("topcat", TOPCAT, XTAL(35904000)) - MCFG_TOPCAT_FB_WIDTH(1024) - MCFG_TOPCAT_FB_HEIGHT(768) - MCFG_TOPCAT_PLANEMASK(1) - -MACHINE_CONFIG_END +void dio16_98544_device::device_add_mconfig(machine_config &config) +{ + screen_device &screen(SCREEN(config, HP98544_SCREEN_NAME, SCREEN_TYPE_RASTER)); + screen.set_screen_update(FUNC(dio16_98544_device::screen_update)); + screen.screen_vblank().set(FUNC(dio16_98544_device::vblank_w)); + screen.set_raw(XTAL(64'108'800), 1408, 0, 1024, 795, 0, 768); + + topcat_device &topcat0(TOPCAT(config, "topcat", XTAL(64108800))); + topcat0.set_fb_width(1024); + topcat0.set_fb_height(768); + topcat0.set_planemask(1); + topcat0.irq_out_cb().set(FUNC(dio16_98544_device::int_w)); +} //------------------------------------------------- // rom_region - device-specific ROM region //------------------------------------------------- + + const tiny_rom_entry *dio16_98544_device::device_rom_region() const { return ROM_NAME( hp98544 ); @@ -95,6 +98,7 @@ device_memory_interface::space_config_vector dio16_98544_device::memory_space_co void dio16_98544_device::device_start() { + save_item(NAME(m_intreg)); dio().install_memory( 0x200000, 0x2fffff, read16_delegate(FUNC(topcat_device::vram_r), static_cast<topcat_device*>(m_topcat)), @@ -119,18 +123,46 @@ void dio16_98544_device::device_reset() READ16_MEMBER(dio16_98544_device::rom_r) { + if (offset == 1) + return m_intreg; + return 0xff00 | m_rom[offset]; } // the video chip registers live here, so these writes are valid WRITE16_MEMBER(dio16_98544_device::rom_w) { + if (offset == 1) { + m_intreg = data; + } } WRITE_LINE_MEMBER(dio16_98544_device::vblank_w) { m_topcat->vblank_w(state); } + +WRITE_LINE_MEMBER(dio16_98544_device::int_w) +{ + int line = (m_intreg >> 3) & 7; + + if (state) + m_intreg |= 0x40; + else + m_intreg &= ~0x40; + if (!(m_intreg & 0x80)) + state = false; + + irq1_out(line == 1 && state); + irq2_out(line == 2 && state); + irq3_out(line == 3 && state); + irq4_out(line == 4 && state); + irq5_out(line == 5 && state); + irq6_out(line == 6 && state); + irq7_out(line == 7 && state); + +} + uint32_t dio16_98544_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { int startx, starty, endx, endy; @@ -157,3 +189,5 @@ uint32_t dio16_98544_device::screen_update(screen_device &screen, bitmap_rgb32 & return 0; } +} // namespace bus::hp_dio +} // namespace bus diff --git a/src/devices/bus/hp_dio/hp98544.h b/src/devices/bus/hp_dio/hp98544.h index 74e12905834..d009f8589fd 100644 --- a/src/devices/bus/hp_dio/hp98544.h +++ b/src/devices/bus/hp_dio/hp98544.h @@ -14,6 +14,9 @@ // ======================> dio16_98544_device +namespace bus { + namespace hp_dio { + class dio16_98544_device : public device_t, public device_dio16_card_interface, @@ -42,17 +45,23 @@ public: private: WRITE_LINE_MEMBER(vblank_w); + WRITE_LINE_MEMBER(int_w); + static constexpr int m_v_pix = 768; static constexpr int m_h_pix = 1024; const address_space_config m_space_config; void map(address_map &map); - required_region_ptr<uint8_t> m_rom; required_shared_ptr<uint8_t> m_vram; + + uint8_t m_intreg; }; +} // namespace bus::hp_dio +} // namespace bus + // device type definition -DECLARE_DEVICE_TYPE(HPDIO_98544, dio16_98544_device) +DECLARE_DEVICE_TYPE_NS(HPDIO_98544, bus::hp_dio, dio16_98544_device) #endif // MAME_BUS_HPDIO_98544_H diff --git a/src/devices/bus/hp_dio/hp98603a.cpp b/src/devices/bus/hp_dio/hp98603a.cpp index 330d051b735..bcd5fe3536c 100644 --- a/src/devices/bus/hp_dio/hp98603a.cpp +++ b/src/devices/bus/hp_dio/hp98603a.cpp @@ -9,10 +9,13 @@ #include "emu.h" #include "hp98603a.h" -DEFINE_DEVICE_TYPE(HPDIO_98603A, dio16_98603a_device, "dio98603a", "HP98603A BASIC 4.0 ROM card") +DEFINE_DEVICE_TYPE_NS(HPDIO_98603A, bus::hp_dio, dio16_98603a_device, "dio98603a", "HP98603A BASIC 4.0 ROM card") #define HP98603A_ROM_REGION "98603a_rom" +namespace bus { + namespace hp_dio { + ROM_START(hp98603a) ROM_REGION(0x80000, HP98603A_ROM_REGION, 0) ROM_LOAD16_BYTE("98603_80001.bin", 0x00001, 32768, CRC(5d8c9657) SHA1(f5d89e7f8a61072f362532d1b5e05f5b5e3f42b3)) @@ -75,3 +78,6 @@ READ16_MEMBER(dio16_98603a_device::rom_r) WRITE16_MEMBER(dio16_98603a_device::rom_w) { } + +} // namespace bus::hp_dio +} // namespace bus diff --git a/src/devices/bus/hp_dio/hp98603a.h b/src/devices/bus/hp_dio/hp98603a.h index 30a501b1b39..1d08cf83e0b 100644 --- a/src/devices/bus/hp_dio/hp98603a.h +++ b/src/devices/bus/hp_dio/hp98603a.h @@ -8,6 +8,9 @@ #include "hp_dio.h" +namespace bus { + namespace hp_dio { + class dio16_98603a_device : public device_t, public device_dio16_card_interface @@ -33,6 +36,9 @@ private: uint8_t *m_rom; }; -DECLARE_DEVICE_TYPE(HPDIO_98603A, dio16_98603a_device) +} // namespace bus::hp_dio +} // namespace bus + +DECLARE_DEVICE_TYPE_NS(HPDIO_98603A, bus::hp_dio, dio16_98603a_device) #endif // MAME_BUS_HPDIO_98603A_H diff --git a/src/devices/bus/hp_dio/hp98603b.cpp b/src/devices/bus/hp_dio/hp98603b.cpp index 4a91ddcdb51..4da45470d0e 100644 --- a/src/devices/bus/hp_dio/hp98603b.cpp +++ b/src/devices/bus/hp_dio/hp98603b.cpp @@ -9,10 +9,13 @@ #include "emu.h" #include "hp98603b.h" -DEFINE_DEVICE_TYPE(HPDIO_98603B, dio16_98603b_device, "dio98603b", "HP98603 BASIC ROM card") +DEFINE_DEVICE_TYPE_NS(HPDIO_98603B, bus::hp_dio, dio16_98603b_device, "dio98603b", "HP98603 BASIC ROM card") #define HP98603B_ROM_REGION "98603b_rom" +namespace bus { + namespace hp_dio { + ROM_START(hp98603b) ROM_REGION(0x100000, HP98603B_ROM_REGION, 0) @@ -69,3 +72,6 @@ READ16_MEMBER(dio16_98603b_device::rom_r) WRITE16_MEMBER(dio16_98603b_device::rom_w) { } + +} // namespace bus::hp_dio +} // namespace bus diff --git a/src/devices/bus/hp_dio/hp98603b.h b/src/devices/bus/hp_dio/hp98603b.h index 8d1780432a5..ea16286c98e 100644 --- a/src/devices/bus/hp_dio/hp98603b.h +++ b/src/devices/bus/hp_dio/hp98603b.h @@ -8,6 +8,9 @@ #include "hp_dio.h" +namespace bus { + namespace hp_dio { + class dio16_98603b_device : public device_t, public device_dio16_card_interface @@ -33,6 +36,9 @@ private: uint8_t *m_rom; }; -DECLARE_DEVICE_TYPE(HPDIO_98603B, dio16_98603b_device) +} // namespace bus::hp_dio +} // namespace bus + +DECLARE_DEVICE_TYPE_NS(HPDIO_98603B, bus::hp_dio, dio16_98603b_device) #endif // MAME_BUS_HPDIO_98603B_H diff --git a/src/devices/bus/hp_dio/hp98620.cpp b/src/devices/bus/hp_dio/hp98620.cpp new file mode 100644 index 00000000000..b27857a2fd3 --- /dev/null +++ b/src/devices/bus/hp_dio/hp98620.cpp @@ -0,0 +1,400 @@ +// license:BSD-3-Clause +// copyright-holders:Sven Schnelle +/*************************************************************************** + + HP98620 DMA controller + +***************************************************************************/ + +#include "emu.h" + +#define VERBOSE 0 +#include "logmacro.h" +#include "hp98620.h" + + +DEFINE_DEVICE_TYPE_NS(HPDIO_98620, bus::hp_dio, dio16_98620_device, "hp98620", "HP98620 DMA Controller") + +namespace bus { + namespace hp_dio { + +dio16_98620_device::dio16_98620_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + dio16_98620_device(mconfig, HPDIO_98620, tag, owner, clock) +{ +} + +dio16_98620_device::dio16_98620_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, type, tag, owner, clock), + device_dio32_card_interface(mconfig, *this), + m_irq_state(false) +{ +} + +static INPUT_PORTS_START(hp98620_port) +INPUT_PORTS_END + +ioport_constructor dio16_98620_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(hp98620_port); +} + +void dio16_98620_device::device_start() +{ + m_installed_io = false; + + save_item(NAME(m_regs[0].address)); + save_item(NAME(m_regs[0].tc)); + save_item(NAME(m_regs[0].control)); + save_item(NAME(m_regs[0].irq_level)); + save_item(NAME(m_regs[0].tsz)); + save_item(NAME(m_regs[0].subcount)); + save_item(NAME(m_regs[0].irq)); + save_item(NAME(m_regs[0].ie)); + save_item(NAME(m_regs[0].armed)); + save_item(NAME(m_regs[0].dma_out)); + save_item(NAME(m_regs[0].dma_pri)); + save_item(NAME(m_regs[0].lword)); + save_item(NAME(m_regs[0].word)); + + + save_item(NAME(m_regs[1].address)); + save_item(NAME(m_regs[1].tc)); + save_item(NAME(m_regs[1].control)); + save_item(NAME(m_regs[1].irq_level)); + save_item(NAME(m_regs[1].tsz)); + save_item(NAME(m_regs[1].subcount)); + save_item(NAME(m_regs[1].irq)); + save_item(NAME(m_regs[1].ie)); + save_item(NAME(m_regs[1].armed)); + save_item(NAME(m_regs[1].dma_out)); + save_item(NAME(m_regs[1].dma_pri)); + save_item(NAME(m_regs[1].lword)); + save_item(NAME(m_regs[1].word)); + + save_item(NAME(m_installed_io)); + save_item(NAME(m_control)); + save_item(NAME(m_data)); + save_item(NAME(m_irq_state)); + save_item(NAME(dmar)); +} + +void dio16_98620_device::device_reset() +{ + if (!m_installed_io) + { + program_space()->install_readwrite_handler(0x500000, 0x50020f, + read16_delegate(FUNC(dio16_98620_device::dma_r), this), + write16_delegate(FUNC(dio16_98620_device::dma_w), this)); + m_installed_io = true; + } + m_control = 0; + m_irq_state = false; +} + +uint16_t dio16_98620_device::get_ctrl(const int channel) +{ + uint16_t ret = 0; + + if (m_regs[channel].ie) + ret |= REG_CONTROL_IE; + if (m_regs[channel].tsz == 2) + ret |= REG_CONTROL_WORD; + if (m_regs[channel].tsz == 4) + ret |= REG_1TQ4_CONTROL_LWORD; + if (m_regs[channel].dma_out) + ret |= REG_CONTROL_OUT; + if (m_regs[channel].dma_pri) + ret |= REG_CONTROL_PRI; + + ret |= ((m_regs[channel].irq_level-3) & REG_CONTROL_INT_MASK) << REG_CONTROL_INT_SHIFT; + + return ret; +} + +READ16_MEMBER(dio16_98620_device::dma_r) +{ + + uint16_t ret = 0; + + switch(offset << 1) { + case REG0_RESET_ARM_INT: + m_regs[0].irq = false; + m_regs[0].armed = false; + update_irq(); + ret = 0x00; + break; + case REG1_RESET_ARM_INT: + m_regs[1].irq = false; + m_regs[1].armed = false; + update_irq(); + ret = 0x00; + break; + case REG0_TRANSFER_COUNT: + ret = m_regs[0].tc & 0xffff; + break; + case REG1_TRANSFER_COUNT: + ret = m_regs[1].tc & 0xffff; + break; + case REG0_STATUS: + ret = 0; + if (m_regs[0].armed) + ret |= REG_STATUS_ARMED; + if (m_regs[0].irq) + ret |= REG_STATUS_INT; + break; + case REG1_STATUS: + ret = 0; + if (m_regs[1].armed) + ret |= REG_STATUS_ARMED; + if (m_regs[1].irq) + ret |= REG_STATUS_INT; + break; + case REG_1TQ4_ID_LOW: + ret = 0x3230; + break; + case REG_1TQ4_ID_HIGH: + ret = 0x4330; + break; + case REG0_1TQ4_ADDRESS_LOW: + ret = m_regs[0].address & 0xffff; + break; + case REG0_1TQ4_ADDRESS_HIGH: + ret = m_regs[0].address >> 16; + break; + case REG1_1TQ4_ADDRESS_LOW: + ret = m_regs[1].address & 0xffff; + break; + case REG1_1TQ4_ADDRESS_HIGH: + ret = m_regs[1].address >> 16; + break; + + case REG0_1TQ4_TRANSFER_COUNT_LOW: + ret = m_regs[0].tc & 0xffff; + break; + case REG0_1TQ4_TRANSFER_COUNT_HIGH: + ret = m_regs[0].tc >> 16; + break; + case REG1_1TQ4_TRANSFER_COUNT_LOW: + ret = m_regs[1].tc & 0xffff; + break; + case REG1_1TQ4_TRANSFER_COUNT_HIGH: + ret = m_regs[1].tc >> 16; + break; + case REG0_1TQ4_CONTROL: + ret = m_regs[0].control; + break; + case REG1_1TQ4_CONTROL: + ret = m_regs[1].control; + break; + case REG0_1TQ4_STATUS: + ret = 0; + if (m_regs[0].armed) + ret |= REG_1TQ4_STATUS_ARMED; + if (m_regs[0].irq) + ret |= REG_1TQ4_STATUS_INT; + break; + case REG1_1TQ4_STATUS: + ret = 0; + if (m_regs[1].armed) + ret |= REG_1TQ4_STATUS_ARMED; + if (m_regs[1].irq) + ret |= REG_1TQ4_STATUS_INT; + + break; + default: + LOG("%s: unknown register read: %02X\n", __FUNCTION__, offset << 1); + break; + } + LOG("dma_r: offset=%02X ret=%02X\n", offset << 1, ret); + return ret; +} + +void dio16_98620_device::update_ctrl(const int channel, const uint16_t data, const bool is_1tq4) +{ + assert(channel < 2); + + m_regs[channel].control = data & ~REG_1TQ4_CONTROL_START; + m_regs[channel].ie = data & REG_CONTROL_IE; + m_regs[channel].irq_level = 3 + ((data >> REG_CONTROL_INT_SHIFT) & REG_CONTROL_INT_MASK); + m_regs[channel].lword = (data & REG_1TQ4_CONTROL_LWORD) && is_1tq4; + m_regs[channel].word = data & REG_CONTROL_WORD; + m_regs[channel].dma_out = data & REG_CONTROL_OUT; + if (data & REG_1TQ4_CONTROL_LWORD) + m_regs[channel].tsz = 4; + else if (data & REG_CONTROL_WORD) + m_regs[channel].tsz = 2; + else + m_regs[channel].tsz = 1; + + if ((data & REG_1TQ4_CONTROL_START) || !is_1tq4) { + LOG("DMA Channel %d: addr %08x, tc %d, size %d, int %sabled on IRQ %d\n", channel, + m_regs[channel].address, + (m_regs[channel].tc+1)*m_regs[channel].tsz, + m_regs[channel].tsz, + m_regs[channel].ie ? "en" : "dis", + m_regs[channel].irq_level); + m_regs[channel].subcount = m_regs[channel].tsz-1; + m_regs[channel].armed = true; + m_regs[channel].irq = false; + if (dmar[channel]) + dma_transfer(channel); + + } +} +WRITE16_MEMBER(dio16_98620_device::dma_w) +{ + LOG("dma_w: offset=%02X, data=%02X\n", offset << 1, data); + + switch(offset << 1) { + case REG0_1TQ4_ADDRESS_HIGH: + case REG0_ADDRESS_HIGH: + m_regs[0].address &= 0xffff; + m_regs[0].address |= (data << 16); + break; + case REG0_1TQ4_ADDRESS_LOW: + case REG0_ADDRESS_LOW: + m_regs[0].address &= 0xffff0000; + m_regs[0].address |= data; + break; + case REG1_1TQ4_ADDRESS_HIGH: + case REG1_ADDRESS_HIGH: + m_regs[1].address &= 0xffff; + m_regs[1].address |= (data << 16); + break; + case REG1_1TQ4_ADDRESS_LOW: + case REG1_ADDRESS_LOW: + m_regs[1].address &= 0xffff0000; + m_regs[1].address |= data; + break; + case REG0_TRANSFER_COUNT: + m_regs[0].tc = data; + break; + case REG0_1TQ4_TRANSFER_COUNT_HIGH: + m_regs[0].tc &= 0xffff; + m_regs[0].tc |= (data << 16); + break; + case REG0_1TQ4_TRANSFER_COUNT_LOW: + m_regs[0].tc &= 0xffff0000; + m_regs[0].tc |= data; + break; + case REG1_1TQ4_TRANSFER_COUNT_HIGH: + m_regs[1].tc &= 0xffff; + m_regs[1].tc |= (data << 16); + break; + case REG1_1TQ4_TRANSFER_COUNT_LOW: + m_regs[1].tc &= 0xffff0000; + m_regs[1].tc |= data; + break; + case REG1_TRANSFER_COUNT: + m_regs[1].tc = data; + break; + + case REG0_CONTROL_ARM: + update_ctrl(0, data, false); + break; + + case REG1_CONTROL_ARM: + update_ctrl(1, data, false); + break; + + case REG_GENERAL_CONTROL: + if (data & REG_GENERAL_CONTROL_RESET0) { + m_regs[0].armed = 0; + } + + if (data & REG_GENERAL_CONTROL_RESET1) { + m_regs[1].armed = 0; + } + break; + + case REG0_1TQ4_CONTROL: + update_ctrl(0, data, true); + break; + + case REG1_1TQ4_CONTROL: + update_ctrl(1, data, true); + break; + + default: + LOG("%s: unknown register write: %02X\n", __FUNCTION__, offset << 1); + break; + } +} + +void dio16_98620_device::update_irq() +{ + irq3_out((m_regs[0].irq_level == 3 && m_regs[0].irq && m_regs[0].ie) || + (m_regs[1].irq_level == 3 && m_regs[1].irq && m_regs[1].ie)); + + irq4_out((m_regs[0].irq_level == 4 && m_regs[0].irq && m_regs[0].ie) || + (m_regs[1].irq_level == 4 && m_regs[1].irq && m_regs[1].ie)); + + irq5_out((m_regs[0].irq_level == 5 && m_regs[0].irq && m_regs[0].ie) || + (m_regs[1].irq_level == 5 && m_regs[1].irq && m_regs[1].ie)); + + irq6_out((m_regs[0].irq_level == 6 && m_regs[0].irq && m_regs[0].ie) || + (m_regs[1].irq_level == 6 && m_regs[1].irq && m_regs[1].ie)); + + irq7_out((m_regs[0].irq_level == 7 && m_regs[0].irq && m_regs[0].ie) || + (m_regs[1].irq_level == 7 && m_regs[1].irq && m_regs[1].ie)); +} + +void dio16_98620_device::dma_transfer(int channel) +{ + assert(channel < 2); + + if (!(m_regs[channel].armed)) + return; + + LOG("dma_transfer %s: tc %d/%d\n", m_regs[channel].dma_out ? "out" : "in", + m_regs[channel].tc, m_regs[channel].subcount); + + + if (m_regs[channel].dma_out) { + dmack_w_out(channel, program_space()->read_byte(m_regs[channel].address++)); + } else { + program_space()->write_byte(m_regs[channel].address++, dmack_r_out(channel)); + + } + + if (m_regs[channel].subcount == 0) { + if (m_regs[channel].tc-- == 0) { + LOG("DMA%d done\n", channel); + m_regs[channel].armed = false; + if (m_regs[channel].ie) { + m_regs[channel].irq = true; + update_irq(); + } + return; + } + + m_regs[channel].subcount = m_regs[channel].tsz; + } + + m_regs[channel].subcount--; +} + +WRITE_LINE_MEMBER(dio16_98620_device::dmar0_in) +{ + LOG("%s: %d\n", __FUNCTION__, state); + dmar[0] = state; + if (!state) + return; + + dma_transfer(0); +} + +WRITE_LINE_MEMBER(dio16_98620_device::dmar1_in) +{ + LOG("%s: %d\n", __FUNCTION__, state); + dmar[1] = state; + + if (!state) + return; + + dma_transfer(1); +} + +} // namespace bus::hp_dio +} // namespace bus + diff --git a/src/devices/bus/hp_dio/hp98620.h b/src/devices/bus/hp_dio/hp98620.h new file mode 100644 index 00000000000..d4ae0192c27 --- /dev/null +++ b/src/devices/bus/hp_dio/hp98620.h @@ -0,0 +1,135 @@ +// license:BSD-3-Clause +// copyright-holders:Sven Schnelle + +#ifndef MAME_BUS_HPDIO_98620_H +#define MAME_BUS_HPDIO_98620_H + +#pragma once + +#include "hp_dio.h" + + +namespace bus { + namespace hp_dio { + +class dio16_98620_device : + public device_t, + public device_dio32_card_interface +{ +public: + // construction/destruction + dio16_98620_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + dio16_98620_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + virtual ioport_constructor device_input_ports() const override; + + DECLARE_READ16_MEMBER(dma_r); + DECLARE_WRITE16_MEMBER(dma_w); + + DECLARE_WRITE_LINE_MEMBER(irq_w); + +private: + + static constexpr int REG0_RESET_ARM_INT = 0x00; + static constexpr int REG0_ADDRESS_HIGH = 0x00; + static constexpr int REG0_ADDRESS_LOW = 0x02; + static constexpr int REG0_TRANSFER_COUNT = 0x04; + static constexpr int REG0_CONTROL_ARM = 0x06; + static constexpr int REG0_STATUS = 0x06; + + static constexpr int REG1_RESET_ARM_INT = 0x08; + static constexpr int REG1_ADDRESS_HIGH = 0x08; + static constexpr int REG1_ADDRESS_LOW = 0x0a; + static constexpr int REG1_TRANSFER_COUNT = 0x0c; + static constexpr int REG1_CONTROL_ARM = 0x0e; + static constexpr int REG1_STATUS = 0x0e; + + static constexpr uint8_t REG_CONTROL_IE = 1 << 0; + static constexpr uint8_t REG_CONTROL_WORD = 1 << 1; + static constexpr uint8_t REG_CONTROL_OUT = 1 << 2; + static constexpr uint8_t REG_CONTROL_PRI = 1 << 3; + static constexpr uint8_t REG_CONTROL_INT_MASK = 0x7; + static constexpr int REG_CONTROL_INT_SHIFT = 4; + + + static constexpr uint8_t REG_STATUS_ARMED = 1 << 0; + static constexpr uint8_t REG_STATUS_INT = 1 << 1; + + /* general control registers */ + static constexpr int REG_1TQ4_ID_LOW = 0x10; + static constexpr int REG_1TQ4_ID_HIGH = 0x12; + static constexpr int REG_GENERAL_CONTROL = 0x14; + static constexpr int REG_GENERAL_CONTROL_RESET0 = 1 << 4; + static constexpr int REG_GENERAL_CONTROL_RESET1 = 1 << 5; + + /* channel specific registers */ + static constexpr int REG0_1TQ4_ADDRESS_HIGH = 0x100; + static constexpr int REG0_1TQ4_ADDRESS_LOW = 0x102; + static constexpr int REG0_1TQ4_TRANSFER_COUNT_HIGH = 0x104; + static constexpr int REG0_1TQ4_TRANSFER_COUNT_LOW = 0x106; + + static constexpr int REG0_1TQ4_CONTROL = 0x108; + static constexpr int REG0_1TQ4_STATUS = 0x10a; + + static constexpr uint16_t REG_1TQ4_CONTROL_LWORD = 1 << 8; + static constexpr uint16_t REG_1TQ4_CONTROL_START = 1 << 15; + + static constexpr uint16_t REG_1TQ4_STATUS_ARMED = 1 << 0; + static constexpr uint16_t REG_1TQ4_STATUS_INT = 1 << 1; + + /* registers */ + static constexpr int REG1_1TQ4_ADDRESS_HIGH = 0x200; + static constexpr int REG1_1TQ4_ADDRESS_LOW = 0x202; + static constexpr int REG1_1TQ4_TRANSFER_COUNT_HIGH = 0x204; + static constexpr int REG1_1TQ4_TRANSFER_COUNT_LOW = 0x206; + + static constexpr int REG1_1TQ4_CONTROL = 0x208; + static constexpr int REG1_1TQ4_STATUS = 0x20a; + + WRITE_LINE_MEMBER(dmar0_in) override; + WRITE_LINE_MEMBER(dmar1_in) override; + + void dma_transfer(int channel); + void update_irq(); + void update_ctrl(const int channel, const uint16_t data, const bool is_1tq4); + uint16_t get_ctrl(const int channel); + + bool m_installed_io; + uint8_t m_control; + uint8_t m_data; + bool m_irq_state; + + struct dma_regs { + uint32_t address; + uint32_t tc; + uint32_t control; + /* control register */ + int irq_level; + int tsz; + int subcount; + + bool irq; + bool ie; + bool armed; + + bool dma_out; + bool dma_pri; // TODO + bool lword; + bool word; + } m_regs[2]; + + bool dmar[2]; +}; +} +} + +DECLARE_DEVICE_TYPE_NS(HPDIO_98620, bus::hp_dio, dio16_98620_device) + +#endif // MAME_BUS_HPDIO_98620_H diff --git a/src/devices/bus/hp_dio/hp98644.cpp b/src/devices/bus/hp_dio/hp98644.cpp index 5ac97e3826b..4147b583c11 100644 --- a/src/devices/bus/hp_dio/hp98644.cpp +++ b/src/devices/bus/hp_dio/hp98644.cpp @@ -15,8 +15,10 @@ // GLOBAL VARIABLES //************************************************************************** -DEFINE_DEVICE_TYPE(HPDIO_98644, dio16_98644_device, "dio98644", "HP98644A Asynchronous Serial Interface") +DEFINE_DEVICE_TYPE_NS(HPDIO_98644, bus::hp_dio, dio16_98644_device, "dio98644", "HP98644A Asynchronous Serial Interface") +namespace bus { + namespace hp_dio { //------------------------------------------------- // device_add_mconfig - add device configuration @@ -25,19 +27,20 @@ DEFINE_DEVICE_TYPE(HPDIO_98644, dio16_98644_device, "dio98644", "HP98644A Asynch #define RS232_TAG "rs232" #define INS8250_TAG "ins8250" -MACHINE_CONFIG_START( dio16_98644_device::device_add_mconfig ) +void dio16_98644_device::device_add_mconfig(machine_config &config) +{ INS8250(config, m_uart, XTAL(2'457'600)); m_uart->out_tx_callback().set(RS232_TAG, FUNC(rs232_port_device::write_txd)); m_uart->out_dtr_callback().set(RS232_TAG, FUNC(rs232_port_device::write_dtr)); m_uart->out_rts_callback().set(RS232_TAG, FUNC(rs232_port_device::write_rts)); - MCFG_DEVICE_ADD(RS232_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(m_uart, ins8250_uart_device, rx_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(m_uart, ins8250_uart_device, dcd_w)) - MCFG_RS232_DSR_HANDLER(WRITELINE(m_uart, ins8250_uart_device, dsr_w)) - MCFG_RS232_RI_HANDLER(WRITELINE(m_uart, ins8250_uart_device, ri_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(m_uart, ins8250_uart_device, cts_w)) -MACHINE_CONFIG_END + rs232_port_device &rs232(RS232_PORT(config, RS232_TAG, default_rs232_devices, nullptr)); + rs232.rxd_handler().set(m_uart, FUNC(ins8250_uart_device::rx_w)); + rs232.dcd_handler().set(m_uart, FUNC(ins8250_uart_device::dcd_w)); + rs232.dsr_handler().set(m_uart, FUNC(ins8250_uart_device::dsr_w)); + rs232.ri_handler().set(m_uart, FUNC(ins8250_uart_device::ri_w)); + rs232.cts_handler().set(m_uart, FUNC(ins8250_uart_device::cts_w)); +} //************************************************************************** // LIVE DEVICE @@ -85,7 +88,7 @@ static INPUT_PORTS_START(hp98644_port) PORT_DIPSETTING(0x00, DEF_STR(Off)) PORT_DIPSETTING(REG_SWITCHES_MODEM_EN, DEF_STR(On)) - PORT_DIPNAME(REG_SWITCHES_INT_LEVEL_MASK << REG_SWITCHES_INT_LEVEL_SHIFT, 0x00, "Interrupt level") + PORT_DIPNAME(REG_SWITCHES_INT_LEVEL_MASK << REG_SWITCHES_INT_LEVEL_SHIFT, 0x02, "Interrupt level") PORT_DIPSETTING(0 << REG_SWITCHES_INT_LEVEL_SHIFT, "3") PORT_DIPSETTING(1 << REG_SWITCHES_INT_LEVEL_SHIFT, "4") PORT_DIPSETTING(2 << REG_SWITCHES_INT_LEVEL_SHIFT, "5") @@ -137,6 +140,10 @@ ioport_constructor dio16_98644_device::device_input_ports() const void dio16_98644_device::device_start() { + save_item(NAME(m_installed_io)); + save_item(NAME(m_control)); + save_item(NAME(m_loopback)); + save_item(NAME(m_data)); m_installed_io = false; } @@ -174,7 +181,8 @@ READ16_MEMBER(dio16_98644_device::io_r) break; case 1: - ret = m_control | m_control << 8; + ret = m_control | m_control << 8 | \ + (((m_switches->read() >> REG_SWITCHES_INT_LEVEL_SHIFT) & REG_SWITCHES_INT_LEVEL_MASK) << 4); break; case 0x08: @@ -226,3 +234,6 @@ WRITE16_MEMBER(dio16_98644_device::io_w) break; } } + +} // namespace bus::hp_dio +} // namespace bus diff --git a/src/devices/bus/hp_dio/hp98644.h b/src/devices/bus/hp_dio/hp98644.h index 94bb4437fae..c4ad925fc30 100644 --- a/src/devices/bus/hp_dio/hp98644.h +++ b/src/devices/bus/hp_dio/hp98644.h @@ -15,6 +15,9 @@ // ======================> dio16_98644_device +namespace bus { + namespace hp_dio { + class dio16_98644_device : public device_t, public device_dio16_card_interface @@ -49,7 +52,10 @@ private: uint8_t m_data; }; +} // namespace bus::hp_dio +} // namespace bus + // device type definition -DECLARE_DEVICE_TYPE(HPDIO_98644, dio16_98644_device) +DECLARE_DEVICE_TYPE_NS(HPDIO_98644, bus::hp_dio, dio16_98644_device) #endif // MAME_BUS_HPDIO_98644_H diff --git a/src/devices/bus/hp_dio/hp_dio.cpp b/src/devices/bus/hp_dio/hp_dio.cpp index e6bccba3460..c90a1e2c83a 100644 --- a/src/devices/bus/hp_dio/hp_dio.cpp +++ b/src/devices/bus/hp_dio/hp_dio.cpp @@ -8,12 +8,26 @@ #include "emu.h" #include "hp_dio.h" +#include "hp98265a.h" +#include "hp98543.h" +#include "hp98544.h" +#include "hp98603a.h" +#include "hp98603b.h" +#include "hp98620.h" +#include "hp98644.h" +#include "human_interface.h" //************************************************************************** // GLOBAL VARIABLES //************************************************************************** -DEFINE_DEVICE_TYPE(DIO16_SLOT, dio16_slot_device, "dio16_slot", "16-bit DIO slot") +DEFINE_DEVICE_TYPE_NS(DIO16_SLOT, bus::hp_dio, dio16_slot_device, "dio16_slot", "16-bit DIO slot") +DEFINE_DEVICE_TYPE_NS(DIO32_SLOT, bus::hp_dio, dio32_slot_device, "dio32_slot", "32-bit DIO-II slot") +DEFINE_DEVICE_TYPE_NS(DIO16, bus::hp_dio, dio16_device, "dio16", "16-bit DIO bus") +DEFINE_DEVICE_TYPE_NS(DIO32, bus::hp_dio, dio32_device, "dio32", "32-bit DIO-II bus") + +namespace bus { + namespace hp_dio { //************************************************************************** // LIVE DEVICE @@ -52,14 +66,6 @@ void dio16_slot_device::device_start() throw emu_fatalerror("dio16_slot_device: card device %s (%s) does not implement device_dio16_card_interface\n", card->tag(), card->name()); } - - -//************************************************************************** -// GLOBAL VARIABLES -//************************************************************************** - -DEFINE_DEVICE_TYPE(DIO32_SLOT, dio32_slot_device, "dio32_slot", "32-bit DIO-II slot") - //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -81,13 +87,6 @@ void dio32_slot_device::device_start() dio16_slot_device::device_start(); } - -//************************************************************************** -// GLOBAL VARIABLES -//************************************************************************** - -DEFINE_DEVICE_TYPE(DIO16, dio16_device, "dio16", "16-bit DIO bus") - //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -105,11 +104,17 @@ dio16_device::dio16_device(const machine_config &mconfig, device_type type, cons device_t(mconfig, type, tag, owner, clock), m_maincpu(*this, finder_base::DUMMY_TAG), m_prgspace(nullptr), - m_out_irq3_cb(*this), - m_out_irq4_cb(*this), - m_out_irq5_cb(*this), - m_out_irq6_cb(*this) + m_irq1_out_cb(*this), + m_irq2_out_cb(*this), + m_irq3_out_cb(*this), + m_irq4_out_cb(*this), + m_irq5_out_cb(*this), + m_irq6_out_cb(*this), + m_irq7_out_cb(*this), + m_dmar0_out_cb(*this), + m_dmar1_out_cb(*this) { + std::fill(std::begin(m_cards), std::end(m_cards), nullptr); m_prgwidth = 0; } @@ -119,13 +124,21 @@ dio16_device::dio16_device(const machine_config &mconfig, device_type type, cons void dio16_device::device_start() { - m_out_irq3_cb.resolve_safe(); - m_out_irq4_cb.resolve_safe(); - m_out_irq5_cb.resolve_safe(); - m_out_irq6_cb.resolve_safe(); + m_irq1_out_cb.resolve_safe(); + m_irq2_out_cb.resolve_safe(); + m_irq3_out_cb.resolve_safe(); + m_irq4_out_cb.resolve_safe(); + m_irq5_out_cb.resolve_safe(); + m_irq6_out_cb.resolve_safe(); + m_irq7_out_cb.resolve_safe(); + m_dmar0_out_cb.resolve_safe(); + m_dmar1_out_cb.resolve_safe(); m_prgspace = &m_maincpu->space(AS_PROGRAM); m_prgwidth = m_maincpu->space_config(AS_PROGRAM)->data_width(); + + save_item(NAME(m_irq)); + save_item(NAME(m_dmar)); } //------------------------------------------------- @@ -136,25 +149,128 @@ void dio16_device::device_reset() { } +unsigned dio16_device::add_card(device_dio16_card_interface &card) +{ + m_cards.push_back(&card); + return m_bus_index++; +} -void dio16_device::install_memory(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler) +void dio16_device::set_irq(unsigned index, unsigned int level, int state) { - switch (m_prgwidth) - { - case 16: - m_prgspace->install_readwrite_handler(start, end, rhandler, whandler); + bool const changed(bool(state) != BIT(m_irq[level], index)); + if (!changed) + return; + + if (state) + m_irq[level] |= (1 << index); + else + m_irq[level] &= ~(1 << index); + + if (m_bus_index != index) { + switch (level) { + case 0: + m_irq1_out_cb(state); + break; + case 1: + m_irq2_out_cb(state); + break; + case 2: + m_irq3_out_cb(state); + break; + case 3: + m_irq4_out_cb(state); break; - case 32: - m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, 0xffffffff); + case 4: + m_irq5_out_cb(state); break; - default: - fatalerror("DIO: Bus width %d not supported\n", m_prgwidth); + case 5: + m_irq6_out_cb(state); + break; + case 6: + m_irq7_out_cb(state); + break; + } + } +} + +void dio16_device::set_dmar(unsigned int index, unsigned int num, int state) +{ + assert(num <= 1); + + bool const changed(bool(state) != BIT(m_dmar[num], index)); + if (!changed) + return; + if (state) + m_dmar[num] |= (1 << index); + else + m_dmar[num] &= ~(1 << index); + + + for (auto & card:m_cards) { + + if (card->get_index() == index) + continue; + + switch (num) { + case 0: + card->dmar0_in(state); + break; + case 1: + card->dmar1_in(state); + break; + } + } +} + +void dio16_device::dmack_w_out(int index, int channel, uint8_t val) +{ + for (auto & card:m_cards) { + if (card->get_index() == index) + continue; + card->dmack_w_in(channel, val); + } +} + +uint8_t dio16_device::dmack_r_out(int index, int channel) +{ + uint8_t ret = 0xff; + + for (auto & card:m_cards) { + if (card->get_index() == index) + continue; + ret &= card->dmack_r_in(channel); + } + return ret; +} + +WRITE_LINE_MEMBER(dio16_device::reset_in) +{ + for (auto & card:m_cards) { + if (card->get_index() != m_bus_index) + card->reset_in(state); + } +} + +void dio16_device::install_memory(offs_t start, offs_t end, + read16_delegate rhandler, + write16_delegate whandler) { + switch (m_prgwidth) { + case 16: + m_prgspace->install_readwrite_handler(start, end, rhandler, + whandler); + break; + case 32: + m_prgspace->install_readwrite_handler(start, end, rhandler, + whandler, 0xffffffff); + break; + default: + fatalerror("DIO: Bus width %d not supported\n", m_prgwidth); } } void dio16_device::install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data) { - m_prgspace->install_readwrite_bank(start, end, 0, tag ); + m_prgspace->install_readwrite_bank(start, end, 0, tag); machine().root_device().membank(m_prgspace->device().siblingtag(tag).c_str())->set_base(data); } @@ -174,6 +290,10 @@ void dio16_device::unmap_rom(offs_t start, offs_t end) m_prgspace->unmap_read(start, end); } +void device_dio16_card_interface::set_bus(dio16_device &bus) +{ + m_index = (m_dio_dev = &bus)->add_card(*this); +} //************************************************************************** // DEVICE DIO16 CARD INTERFACE @@ -195,13 +315,10 @@ void device_dio16_card_interface::interface_pre_start() throw emu_fatalerror("device_dio16_card_interface: DIO bus not configured\n"); } - //************************************************************************** // DIO32 DEVICE //************************************************************************** -DEFINE_DEVICE_TYPE(DIO32, dio32_device, "dio32", "32-bit DIO-II bus") - dio32_device::dio32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : dio16_device(mconfig, DIO32, tag, owner, clock) { @@ -212,7 +329,6 @@ void dio32_device::device_start() dio16_device::device_start(); } - //************************************************************************** // DEVICE DIO32 CARD INTERFACE //************************************************************************** @@ -233,3 +349,22 @@ void device_dio32_card_interface::interface_pre_start() if (m_dio_dev && !dynamic_cast<dio32_device *>(m_dio_dev)) throw emu_fatalerror("device_dio32_card_interface: DIO32 device %s (%s) in DIO16 slot %s\n", device().tag(), device().name(), m_dio_dev->name()); } + +} // namespace bus::hp_dio +} // namespace bus + +void dio16_cards(device_slot_interface & device) +{ + device.option_add("98543", HPDIO_98543); + device.option_add("98544", HPDIO_98544); + device.option_add("98603a", HPDIO_98603A); + device.option_add("98603b", HPDIO_98603B); + device.option_add("98644", HPDIO_98644); + device.option_add("human_interface", HPDIO_HUMAN_INTERFACE); +} + +void dio32_cards(device_slot_interface & device) +{ + device.option_add("98265a", HPDIO_98265A); + device.option_add("98620", HPDIO_98620); +} diff --git a/src/devices/bus/hp_dio/hp_dio.h b/src/devices/bus/hp_dio/hp_dio.h index b63b44c0482..e7f09969ca8 100644 --- a/src/devices/bus/hp_dio/hp_dio.h +++ b/src/devices/bus/hp_dio/hp_dio.h @@ -17,26 +17,8 @@ #pragma once -//************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_DIO16_CPU(_cputag) \ - downcast<dio16_device &>(*device).set_cputag(_cputag); -#define MCFG_DIO32_CPU(_cputag) \ - downcast<dio32_device &>(*device).set_cputag(_cputag); - -#define MCFG_ISA_OUT_IRQ3_CB(_devcb) \ - downcast<dio16_device &>(*device).set_out_irq3_callback(DEVCB_##_devcb); - -#define MCFG_ISA_OUT_IRQ4_CB(_devcb) \ - downcast<dio16_device &>(*device).set_out_irq4_callback(DEVCB_##_devcb); - -#define MCFG_ISA_OUT_IRQ5_CB(_devcb) \ - downcast<dio16_device &>(*device).set_out_irq5_callback(DEVCB_##_devcb); - -#define MCFG_ISA_OUT_IRQ6_CB(_devcb) \ - downcast<dio16_device &>(*device).set_out_irq6_callback(DEVCB_##_devcb); +namespace bus { + namespace hp_dio { //************************************************************************** // TYPE DEFINITIONS @@ -75,9 +57,6 @@ protected: required_device<dio16_device> m_dio; }; -// device type definition -DECLARE_DEVICE_TYPE(DIO16_SLOT, dio16_slot_device) - class device_dio16_card_interface; // ======================> dio16_device class dio16_device : public device_t @@ -86,11 +65,18 @@ public: // construction/destruction dio16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // inline configuration - template <typename T> void set_cputag(T &&tag) { m_maincpu.set_tag(std::forward<T>(tag)); } - template <class Object> devcb_base &set_out_irq3_callback(Object &&cb) { return m_out_irq3_cb.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_out_irq4_callback(Object &&cb) { return m_out_irq4_cb.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_out_irq5_callback(Object &&cb) { return m_out_irq5_cb.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_out_irq6_callback(Object &&cb) { return m_out_irq6_cb.set_callback(std::forward<Object>(cb)); } + template<typename T> void set_cputag(T &&tag) { m_maincpu.set_tag(std::forward<T>(tag)); } + + // callback configuration + auto dmar0_out_cb() { return m_dmar0_out_cb.bind(); } + auto dmar1_out_cb() { return m_dmar1_out_cb.bind(); } + auto irq1_out_cb() { return m_irq1_out_cb.bind(); } + auto irq2_out_cb() { return m_irq2_out_cb.bind(); } + auto irq3_out_cb() { return m_irq3_out_cb.bind(); } + auto irq4_out_cb() { return m_irq4_out_cb.bind(); } + auto irq5_out_cb() { return m_irq5_out_cb.bind(); } + auto irq6_out_cb() { return m_irq6_out_cb.bind(); } + auto irq7_out_cb() { return m_irq7_out_cb.bind(); } void install_memory(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler); @@ -103,18 +89,47 @@ public: void unmap_bank(offs_t start, offs_t end); void unmap_rom(offs_t start, offs_t end); + address_space *program_space() { return m_prgspace; } // IRQs 1, 2, and 7 are reserved for non-bus usage. - DECLARE_WRITE_LINE_MEMBER( irq3_w ) { m_out_irq3_cb(state); } - DECLARE_WRITE_LINE_MEMBER( irq4_w ) { m_out_irq4_cb(state); } - DECLARE_WRITE_LINE_MEMBER( irq5_w ) { m_out_irq5_cb(state); } - DECLARE_WRITE_LINE_MEMBER( irq6_w ) { m_out_irq6_cb(state); } + + // input lines + DECLARE_WRITE_LINE_MEMBER(dmar0_in) { set_dmar(m_bus_index, 0, state); } + DECLARE_WRITE_LINE_MEMBER(dmar1_in) { set_dmar(m_bus_index, 1, state); } + DECLARE_WRITE_LINE_MEMBER(irq1_in) { set_irq(m_bus_index, 0, state); } + DECLARE_WRITE_LINE_MEMBER(irq2_in) { set_irq(m_bus_index, 1, state); } + DECLARE_WRITE_LINE_MEMBER(irq3_in) { set_irq(m_bus_index, 2, state); } + DECLARE_WRITE_LINE_MEMBER(irq4_in) { set_irq(m_bus_index, 3, state); } + DECLARE_WRITE_LINE_MEMBER(irq5_in) { set_irq(m_bus_index, 4, state); } + DECLARE_WRITE_LINE_MEMBER(irq6_in) { set_irq(m_bus_index, 5, state); } + DECLARE_WRITE_LINE_MEMBER(irq7_in) { set_irq(m_bus_index, 6, state); } + DECLARE_WRITE_LINE_MEMBER(reset_in); + + // output lines + DECLARE_READ_LINE_MEMBER(irq1_out) const { return (m_irq[0] & ~m_bus_index) ? 1 : 0; } + DECLARE_READ_LINE_MEMBER(irq2_out) const { return (m_irq[1] & ~m_bus_index) ? 1 : 0; } + DECLARE_READ_LINE_MEMBER(irq3_out) const { return (m_irq[2] & ~m_bus_index) ? 1 : 0; } + DECLARE_READ_LINE_MEMBER(irq4_out) const { return (m_irq[3] & ~m_bus_index) ? 1 : 0; } + DECLARE_READ_LINE_MEMBER(irq5_out) const { return (m_irq[4] & ~m_bus_index) ? 1 : 0; } + DECLARE_READ_LINE_MEMBER(irq6_out) const { return (m_irq[5] & ~m_bus_index) ? 1 : 0; } + DECLARE_READ_LINE_MEMBER(irq7_out) const { return (m_irq[6] & ~m_bus_index) ? 1 : 0; } + DECLARE_READ_LINE_MEMBER(dmar0_out) const { return dmar0_r(); } + DECLARE_READ_LINE_MEMBER(dmar1_out) const { return dmar1_r(); } + + bool dmar0_r() const { return (m_dmar[0] & ~m_bus_index) ? 1 : 0; } + bool dmar1_r() const { return (m_dmar[1] & ~m_bus_index) ? 1 : 0; } + + uint8_t dmack_r_out(int index, int channel); + void dmack_w_out(int index, int channel, uint8_t data); int m_prgwidth; + unsigned add_card(device_dio16_card_interface & card); + void set_irq(unsigned int index, unsigned int num, int state); + void set_dmar(unsigned int index, unsigned int num, int state); + protected: dio16_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - void install_space(int spacenum, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler); // device-level overrides @@ -123,20 +138,28 @@ protected: // internal state required_device<cpu_device> m_maincpu; + std::list <device_dio16_card_interface *> m_cards; // address spaces address_space *m_prgspace; - - devcb_write_line m_out_irq3_cb; - devcb_write_line m_out_irq4_cb; - devcb_write_line m_out_irq5_cb; - devcb_write_line m_out_irq6_cb; + int m_bus_index; + + // packed line states + u16 m_irq[7]; + u16 m_dmar[2]; + + devcb_write_line m_irq1_out_cb; + devcb_write_line m_irq2_out_cb; + devcb_write_line m_irq3_out_cb; + devcb_write_line m_irq4_out_cb; + devcb_write_line m_irq5_out_cb; + devcb_write_line m_irq6_out_cb; + devcb_write_line m_irq7_out_cb; + + devcb_write_line m_dmar0_out_cb; + devcb_write_line m_dmar1_out_cb; }; - -// device type definition -DECLARE_DEVICE_TYPE(DIO16, dio16_device) - // ======================> device_dio16_card_interface // class representing interface-specific live dio16 card @@ -149,20 +172,59 @@ public: virtual ~device_dio16_card_interface(); device_dio16_card_interface *next() const { return m_next; } - // inline configuration - void set_diobus(dio16_device &dio_device) { m_dio_dev = &dio_device; } - + void set_diobus(dio16_device &dio_device) { + m_dio_dev = &dio_device; + m_index = m_dio_dev->add_card(*this); + } protected: device_dio16_card_interface(const machine_config &mconfig, device_t &device); - dio16_device &dio() { assert(m_dio_dev); return *m_dio_dev; } + dio16_device &dio() { + assert(m_dio_dev); + return *m_dio_dev; + } virtual void interface_pre_start() override; + int get_index() { return m_index; }; + address_space *program_space() { return m_dio_dev->program_space(); } + + DECLARE_WRITE_LINE_MEMBER(irq1_out) { m_dio_dev->set_irq(m_index, 0, state); } + DECLARE_WRITE_LINE_MEMBER(irq2_out) { m_dio_dev->set_irq(m_index, 1, state); } + DECLARE_WRITE_LINE_MEMBER(irq3_out) { m_dio_dev->set_irq(m_index, 2, state); } + DECLARE_WRITE_LINE_MEMBER(irq4_out) { m_dio_dev->set_irq(m_index, 3, state); } + DECLARE_WRITE_LINE_MEMBER(irq5_out) { m_dio_dev->set_irq(m_index, 4, state); } + DECLARE_WRITE_LINE_MEMBER(irq6_out) { m_dio_dev->set_irq(m_index, 5, state); } + DECLARE_WRITE_LINE_MEMBER(irq7_out) { m_dio_dev->set_irq(m_index, 6, state); } + DECLARE_WRITE_LINE_MEMBER(dmar0_out) { m_dio_dev->set_dmar(m_index, 0, state); } + DECLARE_WRITE_LINE_MEMBER(dmar1_out) { m_dio_dev->set_dmar(m_index, 1, state); } + + virtual DECLARE_WRITE_LINE_MEMBER(irq1_in) {} + virtual DECLARE_WRITE_LINE_MEMBER(irq2_in) {} + virtual DECLARE_WRITE_LINE_MEMBER(irq3_in) {} + virtual DECLARE_WRITE_LINE_MEMBER(irq4_in) {} + virtual DECLARE_WRITE_LINE_MEMBER(irq5_in) {} + virtual DECLARE_WRITE_LINE_MEMBER(irq6_in) {} + virtual DECLARE_WRITE_LINE_MEMBER(irq7_in) {} + virtual DECLARE_WRITE_LINE_MEMBER(dmar0_in) {} + virtual DECLARE_WRITE_LINE_MEMBER(dmar1_in) {} + + virtual uint8_t dmack_r_out(int channel) { return m_dio_dev->dmack_r_out(m_index, channel); } + virtual void dmack_w_out(int channel, uint8_t data) { m_dio_dev->dmack_w_out(m_index, channel, data); } + virtual uint8_t dmack_r_in(int channel) { return 0xff; } + virtual void dmack_w_in(int channel, uint8_t data) {} + + virtual DECLARE_WRITE_LINE_MEMBER(reset_in) {} + + bool dmar0_r() const { return m_dio_dev->dmar0_r(); } + bool dmar1_r() const { return m_dio_dev->dmar1_r(); } + dio16_device *m_dio_dev; private: + void set_bus(dio16_device & bus); device_dio16_card_interface *m_next; + unsigned int m_index; }; class dio32_device; @@ -188,10 +250,6 @@ protected: virtual void device_start() override; }; - -// device type definition -DECLARE_DEVICE_TYPE(DIO32_SLOT, dio32_slot_device) - // ======================> dio32_device class dio32_device : public dio16_device { @@ -206,10 +264,6 @@ protected: virtual void device_start() override; }; - -// device type definition -DECLARE_DEVICE_TYPE(DIO32, dio32_device) - // ======================> device_dio32_card_interface // class representing interface-specific live dio32 card @@ -227,5 +281,16 @@ protected: dio32_device &dio() { assert(m_dio_dev); return downcast<dio32_device &>(*m_dio_dev); } }; +} // namespace bus::hp_dio +} // namespace bus + +// device type definition +DECLARE_DEVICE_TYPE_NS(DIO16_SLOT, bus::hp_dio, dio16_slot_device) +DECLARE_DEVICE_TYPE_NS(DIO32, bus::hp_dio, dio32_device) +DECLARE_DEVICE_TYPE_NS(DIO32_SLOT, bus::hp_dio, dio32_slot_device) +DECLARE_DEVICE_TYPE_NS(DIO16, bus::hp_dio, dio16_device) + +void dio16_cards(device_slot_interface &device); +void dio32_cards(device_slot_interface &device); #endif // MAME_BUS_HPDIO_HPDIO_H diff --git a/src/devices/bus/hp_dio/human_interface.cpp b/src/devices/bus/hp_dio/human_interface.cpp new file mode 100644 index 00000000000..cb2319450b5 --- /dev/null +++ b/src/devices/bus/hp_dio/human_interface.cpp @@ -0,0 +1,308 @@ +// license:BSD-3-Clause +// copyright-holders:Sven Schnelle +/*************************************************************************** + + HP Human interface board + +***************************************************************************/ + +#include "emu.h" +#include "human_interface.h" +#include "cpu/mcs48/mcs48.h" +#include "machine/tms9914.h" +#include "machine/msm58321.h" +#include "sound/sn76496.h" +#include "bus/hp_hil/hp_hil.h" +#include "bus/hp_hil/hil_devices.h" +#include "bus/ieee488/ieee488.h" +#include "speaker.h" +//#define VERBOSE 1 +#include "logmacro.h" + +DEFINE_DEVICE_TYPE_NS(HPDIO_HUMAN_INTERFACE, bus::hp_dio, human_interface_device, "human_interface", "HP human interface card") + +namespace bus { + namespace hp_dio { + +void human_interface_device::device_add_mconfig(machine_config &config) +{ + i8042_device &iocpu(I8042(config, "iocpu", XTAL(5'000'000))); + iocpu.set_addrmap(AS_PROGRAM, &human_interface_device::iocpu_map); + iocpu.p1_out_cb().set(FUNC(human_interface_device::iocpu_port1_w)); + iocpu.p2_out_cb().set(FUNC(human_interface_device::iocpu_port2_w)); + iocpu.p1_in_cb().set(FUNC(human_interface_device::iocpu_port1_r)); + iocpu.t0_in_cb().set(FUNC(human_interface_device::iocpu_test0_r)); + iocpu.p2_in_cb().set_constant(0xdf); + iocpu.t1_in_cb().set_constant(1); + + HP_HIL_MLC(config, m_mlc, XTAL(8'000'000)); + hp_hil_slot_device &keyboard(HP_HIL_SLOT(config, "hil1", 0)); + hp_hil_devices(keyboard); + keyboard.set_default_option("hp_46021a"); + keyboard.set_hp_hil_slot(this, "mlc"); + + hp_hil_slot_device &mouse(HP_HIL_SLOT(config, "hil2", 0)); + hp_hil_devices(mouse); + mouse.set_default_option("hp_46060b"); + mouse.set_hp_hil_slot(this, "mlc"); + + SPEAKER(config, "mono").front_center(); + sn76494_device &sound(SN76494(config, "sn76494", 333333)); + sound.add_route(ALL_OUTPUTS, "mono", 0.75); + + msm58321_device &rtc(MSM58321(config, "rtc", 32.768_kHz_XTAL)); + rtc.set_default_24h(false); + rtc.d0_handler().set(FUNC(human_interface_device::rtc_d0_w)); + rtc.d1_handler().set(FUNC(human_interface_device::rtc_d1_w)); + rtc.d2_handler().set(FUNC(human_interface_device::rtc_d2_w)); + rtc.d3_handler().set(FUNC(human_interface_device::rtc_d3_w)); + + tms9914_device &gpib(TMS9914(config, "tms9914", XTAL(5'000'000))); + gpib.eoi_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_eoi_w)); + gpib.dav_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_dav_w)); + gpib.nrfd_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_nrfd_w)); + gpib.ndac_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_ndac_w)); + gpib.ifc_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_ifc_w)); + gpib.srq_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_srq_w)); + gpib.atn_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_atn_w)); + gpib.ren_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_ren_w)); + gpib.dio_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_dio_w)); + gpib.dio_read_cb().set(IEEE488_TAG, FUNC(ieee488_device::dio_r)); + gpib.int_write_cb().set(FUNC(human_interface_device::gpib_irq)); + gpib.accrq_write_cb().set(FUNC(human_interface_device::gpib_dreq)); + + ieee488_device &ieee488(IEEE488(config, IEEE488_TAG, 0)); + ieee488.eoi_callback().set(m_tms9914, FUNC(tms9914_device::eoi_w)); + ieee488.dav_callback().set(m_tms9914, FUNC(tms9914_device::dav_w)); + ieee488.nrfd_callback().set(m_tms9914, FUNC(tms9914_device::nrfd_w)); + ieee488.ndac_callback().set(m_tms9914, FUNC(tms9914_device::ndac_w)); + ieee488.ifc_callback().set(m_tms9914, FUNC(tms9914_device::ifc_w)); + ieee488.srq_callback().set(m_tms9914, FUNC(tms9914_device::srq_w)); + ieee488.atn_callback().set(m_tms9914, FUNC(tms9914_device::atn_w)); + ieee488.ren_callback().set(m_tms9914, FUNC(tms9914_device::ren_w)); + + ieee488_slot_device &slot0(IEEE488_SLOT(config, "ieee0", 0)); + hp_ieee488_devices(slot0); + slot0.set_default_option("hp9122c"); +} + +ROM_START(human_interface) + ROM_REGION(0x800 , "iocpu" , 0) + ROM_LOAD( "1820-4784.bin", 0x000000, 0x000800, CRC(e929044a) SHA1(90849a10bdb8c6e38e73ce027c9c0ad8b3956b1b)) +ROM_END + +const tiny_rom_entry *human_interface_device::device_rom_region() const +{ + return ROM_NAME(human_interface); +} + +void human_interface_device::iocpu_map(address_map& map) +{ + map(0x0000, 0x07ff).rom().region("iocpu", 0); +} + +human_interface_device::human_interface_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + human_interface_device(mconfig, HPDIO_HUMAN_INTERFACE, tag, owner, clock) +{ +} + +human_interface_device::human_interface_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, type, tag, owner, clock), + device_dio16_card_interface(mconfig, *this), + m_iocpu(*this, "iocpu"), + m_mlc(*this, "mlc"), + m_sound(*this, "sn76494"), + m_tms9914(*this, "tms9914"), + m_rtc(*this, "rtc") +{ +} + +void human_interface_device::device_start() +{ + program_space()->install_readwrite_handler(0x420000, 0x420003, 0x0003, 0xfffc, 0, + read8_delegate(FUNC(upi41_cpu_device::upi41_master_r), &(*m_iocpu)), + write8_delegate(FUNC(upi41_cpu_device::upi41_master_w), &(*m_iocpu)), 0x00ff00ff); + + program_space()->install_readwrite_handler(0x470000, 0x47001f, 0x1f, 0xffe0, 0, + read8_delegate(FUNC(human_interface_device::gpib_r), this), + write8_delegate(FUNC(human_interface_device::gpib_w), this), 0x00ff00ff); + + save_item(NAME(m_hil_read)); + save_item(NAME(m_kbd_nmi)); + save_item(NAME(gpib_irq_line)); + save_item(NAME(m_old_latch_enable)); + save_item(NAME(m_hil_data)); + save_item(NAME(m_latch_data)); + save_item(NAME(m_rtc_data)); +} + +void human_interface_device::device_reset() +{ + m_rtc->cs1_w(ASSERT_LINE); + m_rtc->cs2_w(CLEAR_LINE); + m_rtc->write_w(CLEAR_LINE); + m_rtc->read_w(CLEAR_LINE); + m_rtc->cs2_w(CLEAR_LINE); + m_iocpu->reset(); +} + +WRITE_LINE_MEMBER(human_interface_device::reset_in) +{ + if (state) + device_reset(); +} +WRITE_LINE_MEMBER(human_interface_device::gpib_irq) +{ + gpib_irq_line = state; + irq3_out(state ? ASSERT_LINE : CLEAR_LINE); +} + +WRITE_LINE_MEMBER(human_interface_device::gpib_dreq) +{ + dmar0_out(state); +} + +WRITE8_MEMBER(human_interface_device::gpib_w) +{ + if (offset & 0x08) { + m_tms9914->reg8_w(space, offset & 0x07, data); + return; + } + LOG("gpib_w: %s %02X = %02X\n", machine().describe_context().c_str(), offset, data); +} + +READ8_MEMBER(human_interface_device::gpib_r) +{ + uint8_t data = 0xff; + + if (offset & 0x8) { + data = m_tms9914->reg8_r(space, offset & 0x07); + return data; + } + + switch(offset) { + case 0: /* ID */ + data = 0x80; + break; + case 1: + /* Int control */ + data = 0x80 | (gpib_irq_line ? 0x40 : 0); + break; + case 2: + /* Address */ + data = (m_tms9914->cont_r() ? 0x0 : 0x40) | 0x81; + if (m_kbd_nmi) + data |= 0x04; + break; + } + LOG("gpib_r: %s %02X = %02X\n", machine().describe_context().c_str(), offset, data); + return data; +} + + +WRITE8_MEMBER(human_interface_device::iocpu_port1_w) +{ + m_hil_data = data; + m_rtc->d0_w(data & 0x01 ? ASSERT_LINE : CLEAR_LINE); + m_rtc->d1_w(data & 0x02 ? ASSERT_LINE : CLEAR_LINE); + m_rtc->d2_w(data & 0x04 ? ASSERT_LINE : CLEAR_LINE); + m_rtc->d3_w(data & 0x08 ? ASSERT_LINE : CLEAR_LINE); +} + +WRITE8_MEMBER(human_interface_device::iocpu_port2_w) +{ + bool latch_enable = data & LATCH_EN; + + if ((data & (HIL_CS|HIL_WE)) == 0) + m_mlc->write(space, (m_latch_data & 0xc0) >> 6, m_hil_data, 0xff); + + if ((data & SN76494_EN) == 0) + m_sound->write(m_hil_data); + + m_hil_read = ((data & (HIL_CS|HIL_OE)) == 0); + + m_rtc->address_write_w(data & 0x02 ? ASSERT_LINE : CLEAR_LINE); + m_rtc->write_w(data & 0x04 ? ASSERT_LINE : CLEAR_LINE); + + if (!m_old_latch_enable && latch_enable) { + m_latch_data = m_hil_data; + m_rtc->read_w(m_latch_data & 0x20 ? ASSERT_LINE : CLEAR_LINE); + m_rtc->cs2_w(m_latch_data & 0x10 ? ASSERT_LINE : CLEAR_LINE); + } + irq1_out((data & 0x10) ? ASSERT_LINE : CLEAR_LINE); + + if (!(data & KBD_RESET)) { + irq7_out(ASSERT_LINE); + m_kbd_nmi = true; + } else { + irq7_out(CLEAR_LINE); + m_kbd_nmi = false; + } + m_old_latch_enable = latch_enable; +} + +READ8_MEMBER(human_interface_device::iocpu_port1_r) +{ + if (m_hil_read) + return m_mlc->read(space, (m_latch_data & 0xc0) >> 6, 0xff); + if (m_latch_data & 0x20) + return m_rtc_data; + return 0xff; +} + +READ8_MEMBER(human_interface_device::iocpu_test0_r) +{ + return !m_mlc->get_int(); +} + +WRITE_LINE_MEMBER(human_interface_device::rtc_d0_w) +{ + if (state) + m_rtc_data |= 1; + else + m_rtc_data &= ~1; + +} + +WRITE_LINE_MEMBER(human_interface_device::rtc_d1_w) +{ + if (state) + m_rtc_data |= 2; + else + m_rtc_data &= ~2; +} + +WRITE_LINE_MEMBER(human_interface_device::rtc_d2_w) +{ + if (state) + m_rtc_data |= 4; + else + m_rtc_data &= ~4; + +} + +WRITE_LINE_MEMBER(human_interface_device::rtc_d3_w) +{ + if (state) + m_rtc_data |= 8; + else + m_rtc_data &= ~8; + +} + +void human_interface_device::dmack_w_in(int channel, uint8_t data) +{ + if (channel) + return; + m_tms9914->reg8_w(*program_space(), 7, data); +} + +uint8_t human_interface_device::dmack_r_in(int channel) +{ + if (channel) + return 0xff; + return m_tms9914->reg8_r(machine().dummy_space(), 7); +} + +} // namespace bus::hp_dio +} // namespace bus diff --git a/src/devices/bus/hp_dio/human_interface.h b/src/devices/bus/hp_dio/human_interface.h new file mode 100644 index 00000000000..c118a56842d --- /dev/null +++ b/src/devices/bus/hp_dio/human_interface.h @@ -0,0 +1,93 @@ +// license:BSD-3-Clause +// copyright-holders:Sven Schnelle + +#ifndef MAME_BUS_HPDIO_HUMAN_INTERFACE_H +#define MAME_BUS_HPDIO_HUMAN_INTERFACE_H + +#pragma once + +#include "hp_dio.h" +#include "cpu/mcs48/mcs48.h" +#include "machine/tms9914.h" +#include "machine/msm58321.h" +#include "sound/sn76496.h" +#include "bus/hp_hil/hp_hil.h" +#include "bus/hp_hil/hil_devices.h" + +namespace bus { + namespace hp_dio { +class human_interface_device : + public device_t, + public device_dio16_card_interface +{ +public: + human_interface_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + human_interface_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override; + virtual void device_reset() override; + + virtual void device_add_mconfig(machine_config &config) override; + virtual const tiny_rom_entry *device_rom_region() const override; + +private: + + /* 8042 interface */ + DECLARE_WRITE8_MEMBER(iocpu_port1_w); + DECLARE_WRITE8_MEMBER(iocpu_port2_w); + DECLARE_READ8_MEMBER(iocpu_port1_r); + DECLARE_READ8_MEMBER(iocpu_test0_r); + + /* GPIB */ + DECLARE_READ8_MEMBER(gpib_r); + DECLARE_WRITE8_MEMBER(gpib_w); + + DECLARE_WRITE_LINE_MEMBER(gpib_irq); + DECLARE_WRITE_LINE_MEMBER(gpib_dreq); + + /* RTC */ + DECLARE_WRITE_LINE_MEMBER(rtc_d0_w); + DECLARE_WRITE_LINE_MEMBER(rtc_d1_w); + DECLARE_WRITE_LINE_MEMBER(rtc_d2_w); + DECLARE_WRITE_LINE_MEMBER(rtc_d3_w); + + DECLARE_WRITE_LINE_MEMBER(reset_in) override; + + void dmack_w_in(int channel, uint8_t data) override; + uint8_t dmack_r_in(int channel) override; + + required_device<i8042_device> m_iocpu; + required_device<hp_hil_mlc_device> m_mlc; + required_device<sn76494_device> m_sound; + required_device<tms9914_device> m_tms9914; + required_device<msm58321_device> m_rtc; + + void iocpu_map(address_map &map); + + static constexpr uint8_t HIL_CS = 0x01; + static constexpr uint8_t HIL_WE = 0x02; + static constexpr uint8_t HIL_OE = 0x04; + static constexpr uint8_t LATCH_EN = 0x08; + static constexpr uint8_t KBD_RESET = 0x40; + static constexpr uint8_t SN76494_EN = 0x80; + + bool m_hil_read; + bool m_kbd_nmi; + + bool gpib_irq_line; + bool m_old_latch_enable; + + uint8_t m_hil_data; + uint8_t m_latch_data; + uint8_t m_rtc_data; + + +}; +} +} +// device type definition +DECLARE_DEVICE_TYPE_NS(HPDIO_HUMAN_INTERFACE, bus::hp_dio, human_interface_device) + +#endif // MAME_BUS_HPDIO_HUMAN_INTERFACE_H diff --git a/src/devices/bus/hp_hil/hil_devices.cpp b/src/devices/bus/hp_hil/hil_devices.cpp index 422ff680c4c..b7b6ae85513 100644 --- a/src/devices/bus/hp_hil/hil_devices.cpp +++ b/src/devices/bus/hp_hil/hil_devices.cpp @@ -10,4 +10,5 @@ void hp_hil_devices(device_slot_interface &device) { device.option_add(STR_KBD_HP_INTEGRAL, HP_IPC_HLE_KEYBOARD); device.option_add(STR_KBD_HP_46021A, HP_ITF_HLE_KEYBOARD); + device.option_add(STR_MOUSE_HP_46060B, HP_46060B_MOUSE); } diff --git a/src/devices/bus/hp_hil/hlebase.cpp b/src/devices/bus/hp_hil/hlebase.cpp new file mode 100644 index 00000000000..836ef11cae8 --- /dev/null +++ b/src/devices/bus/hp_hil/hlebase.cpp @@ -0,0 +1,156 @@ +// license:BSD-3-Cl ause +// copyright-holders:Sergey Svishchev +#include "emu.h" +#include "hlebase.h" +#include "hlekbd.h" + +//#define VERBOSE 1 +#include "logmacro.h" + +namespace bus { + namespace hp_hil { + +/*************************************************************************** + BASE HLE KEYBOARD DEVICE +***************************************************************************/ + +/*-------------------------------------------------- + hle_device_base::hle_device_base + designated device constructor +--------------------------------------------------*/ + +hle_device_base::hle_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_hp_hil_interface(mconfig, *this) +{ } + + +/*-------------------------------------------------- + hle_device_base::~hle_device_base + destructor +--------------------------------------------------*/ + +hle_device_base::~hle_device_base() +{ } + + +/*-------------------------------------------------- + hle_device_base::device_start + perform expensive initialisations, allocate + resources, register for save state +--------------------------------------------------*/ + +void hle_device_base::device_start() +{ + + save_item(NAME(m_powerup)); + save_item(NAME(m_passthru)); + + set_hp_hil_mlc_device(); + + m_powerup = true; + m_passthru = false; +} + + +/*-------------------------------------------------- + hle_device_base::device_reset + perform startup tasks, also used for host + requested reset +--------------------------------------------------*/ + +void hle_device_base::device_reset() +{ +} + +bool hle_device_base::hil_write(uint16_t *pdata) +{ + int frames = 0; + uint8_t addr = (*pdata >> 8) & 7; + uint8_t data = *pdata & 0xff; + bool command = BIT(*pdata, 11); + + LOG("%d: rx from mlc %04X (%s addr %d, data %02X)\n", m_device_id, *pdata, + command ? "command" : "data", addr, data); + + if (!command) + goto out; + + if (addr != 0 && addr != m_device_id) + goto out; + + switch (data) + { + case HPHIL_IFC: + m_powerup = false; + break; + + case HPHIL_EPT: + m_passthru = true; + break; + + case HPHIL_ELB: + m_passthru = false; + break; + + case 0x09: + case 0x0a: + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + m_device_id = data - 8; + m_device_id16 = (data - 8) << 8; + *pdata &= ~7; + *pdata += (data - 7); + break; + + case HPHIL_POL: + case HPHIL_POL+1: + case HPHIL_POL+2: + case HPHIL_POL+3: + case HPHIL_POL+4: + case HPHIL_POL+5: + case HPHIL_POL+6: + case HPHIL_POL+7: + case HPHIL_POL+8: + case HPHIL_POL+9: + case HPHIL_POL+10: + case HPHIL_POL+11: + case HPHIL_POL+12: + case HPHIL_POL+13: + case HPHIL_POL+14: + case HPHIL_POL+15: + frames = hil_poll(); + *pdata += frames; + break; + + case HPHIL_DSR: + m_device_id = m_device_id16 = 0; + m_powerup = true; + break; + + case HPHIL_IDD: + hil_idd(); + break; + + case HPHIL_DHR: + m_powerup = true; + m_passthru = false; + device_reset(); + return true; + break; + + default: + LOG("command %02X unknown\n", data); + break; + } +out: + if (!m_passthru) + m_hp_hil_mlc->hil_write(*pdata); + return m_passthru; +} + +} // namespace bus::hp_hil +} // namespace bus diff --git a/src/devices/bus/hp_hil/hlebase.h b/src/devices/bus/hp_hil/hlebase.h new file mode 100644 index 00000000000..b5cbfa84bef --- /dev/null +++ b/src/devices/bus/hp_hil/hlebase.h @@ -0,0 +1,45 @@ +// license:BSD-3-Clause +// copyright-holders:Sergey Svishchev +#ifndef MAME_DEVICES_HP_HIL_HLEBASE_H +#define MAME_DEVICES_HP_HIL_HLEBASE_H + +#pragma once + +#include "hp_hil.h" +#include "machine/keyboard.h" + + +namespace bus { + namespace hp_hil { + +class hle_device_base + : public device_t + , public device_hp_hil_interface +{ +public: + virtual ~hle_device_base() override; + void transmit_byte(uint8_t byte); +protected: + // constructor/destructor + hle_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, uint32_t clock); + + // device overrides + virtual void device_start() override; + virtual void device_reset() override; + + // device_hp_hil_interface overrides + virtual bool hil_write(uint16_t *data) override; + virtual void hil_idd() = 0; + virtual int hil_poll() = 0; +private: + + util::fifo<uint8_t, 8> m_fifo; + + bool m_powerup; + bool m_passthru; +}; + +} // namespace bus::hp_hil +} // namespace bus + +#endif // MAME_DEVICES_HP_HIL_HLEBASE_H diff --git a/src/devices/bus/hp_hil/hlekbd.cpp b/src/devices/bus/hp_hil/hlekbd.cpp index 5cca998409d..4771243bef9 100644 --- a/src/devices/bus/hp_hil/hlekbd.cpp +++ b/src/devices/bus/hp_hil/hlekbd.cpp @@ -14,8 +14,8 @@ DEFINE_DEVICE_TYPE_NS(HP_IPC_HLE_KEYBOARD, bus::hp_hil, hle_hp_ipc_device, "hp_ipc_hle_kbd", "HP Integral Keyboard (HLE)") DEFINE_DEVICE_TYPE_NS(HP_ITF_HLE_KEYBOARD, bus::hp_hil, hle_hp_itf_device, "hp_itf_hle_kbd", "HP ITF Keyboard") - -namespace bus { namespace hp_hil { +namespace bus { + namespace hp_hil { namespace { @@ -408,205 +408,94 @@ INPUT_PORTS_START( itf_basic ) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~') INPUT_PORTS_END - - INPUT_PORTS_START( hle_hp_itf_device ) PORT_INCLUDE( itf_basic ) PORT_INCLUDE( itf_id ) INPUT_PORTS_END - } // anonymous namespace +void hle_hp_ipc_device::transmit_byte(uint8_t byte) +{ + if (!m_fifo.full()) { + m_fifo.enqueue(byte); + } +} + +void hle_hp_itf_device::transmit_byte(uint8_t byte) +{ + if (!m_fifo.full()) { + m_fifo.enqueue(byte); + } +} /*************************************************************************** - BASE HLE KEYBOARD DEVICE + HP INTEGRAL HLE KEYBOARD DEVICE ***************************************************************************/ /*-------------------------------------------------- - hle_device_base::hle_device_base - designated device constructor + hle_hp_ipc_device::hle_hp_ipc_device + abbreviated constructor --------------------------------------------------*/ -hle_device_base::hle_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, type, tag, owner, clock) - , device_hp_hil_interface(mconfig, *this) +hle_hp_ipc_device::hle_hp_ipc_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock) + : hle_device_base(mconfig, HP_IPC_HLE_KEYBOARD, tag, owner, clock) , device_matrix_keyboard_interface(mconfig, *this, "COL1", "COL2", "COL3", "COL4", "COL5", "COL6", "COL7", "COL8", "COL9", "COL10", "COL11", "COL12", "COL13", "COL14", "COL15") { } - -/*-------------------------------------------------- - hle_device_base::~hle_device_base - destructor ---------------------------------------------------*/ - -hle_device_base::~hle_device_base() -{ } - - -/*-------------------------------------------------- - hle_device_base::device_start - perform expensive initialisations, allocate - resources, register for save state ---------------------------------------------------*/ - -void hle_device_base::device_start() -{ - set_hp_hil_mlc_device(); - - m_powerup = true; - m_passthru = false; -} - - -/*-------------------------------------------------- - hle_device_base::device_reset - perform startup tasks, also used for host - requested reset ---------------------------------------------------*/ - -void hle_device_base::device_reset() +void hle_hp_ipc_device::device_reset() { m_fifo.clear(); - - // kick the base reset_key_state(); start_processing(attotime::from_hz(1'200)); } -// ' -bool hle_device_base::hil_write(uint16_t *pdata) +void hle_hp_ipc_device::hil_idd() { - int frames = 0; - uint8_t addr = (*pdata >> 8) & 7; - uint8_t data = *pdata & 0xff; - bool command = BIT(*pdata, 11); - - LOG("rx from mlc %04X (%s addr %d, data %02X)\n", *pdata, - command ? "command" : "data", addr, data); - if (!command) - goto out; - - if (addr != 0 && addr != m_device_id) - goto out; - - switch (data) - { - case HPHIL_IFC: - m_powerup = false; - break; - - case HPHIL_EPT: - m_passthru = true; - break; - - case HPHIL_ELB: - m_passthru = false; - break; - - case 0x09: - case 0x0a: - case 0x0b: - case 0x0c: - case 0x0d: - case 0x0e: - case 0x0f: - m_device_id = data - 8; - m_device_id16 = (data - 8) << 8; - *pdata &= ~7; - *pdata += (data - 7); - break; - - case HPHIL_POL: - if (!m_fifo.empty()) - { - - frames = 1; - m_hp_hil_mlc->hil_write(m_device_id16 | 0x40); // Keycode Set 1, no coordinate data - while (!m_fifo.empty()) - { - m_hp_hil_mlc->hil_write(m_device_id16 | m_fifo.dequeue()); - frames++; - } - } - m_hp_hil_mlc->hil_write(HPMLC_W1_C | (addr << 8) | HPHIL_POL | (frames)); - *pdata &= ~7; - *pdata += frames; - return true; - - case HPHIL_DSR: - m_device_id = m_device_id16 = 0; - m_powerup = true; - break; - - case HPHIL_IDD: - m_hp_hil_mlc->hil_write(0x0100 | ioport("COL0")->read()); - m_hp_hil_mlc->hil_write(m_device_id16 | 0); - break; - - case HPHIL_DHR: - m_powerup = true; - m_passthru = false; - device_reset(); - return true; - break; - - default: - LOG("command %02X unknown\n", data); - break; - } -out: - if (!m_passthru) { - m_hp_hil_mlc->hil_write(*pdata); - return false; - } - return true; -} - -void hle_device_base::transmit_byte(uint8_t byte) -{ - if (!m_fifo.full()) { - m_fifo.enqueue(byte); - } -// else -// printf("queuing fail (fifo full)\n"); + m_hp_hil_mlc->hil_write(0x0100 | ioport("COL0")->read()); + m_hp_hil_mlc->hil_write(m_device_id16 | 0); + return; } -/*-------------------------------------------------- - hle_device_base::key_make - handle a key being pressed ---------------------------------------------------*/ - -void hle_device_base::key_make(uint8_t row, uint8_t column) +void hle_hp_ipc_device::key_make(uint8_t row, uint8_t column) { transmit_byte((((row + 1) ^ 8) << 4) + (column << 1)); } -/*-------------------------------------------------- - hle_device_base::key_break - handle a key being released ---------------------------------------------------*/ - -void hle_device_base::key_break(uint8_t row, uint8_t column) +void hle_hp_ipc_device::key_break(uint8_t row, uint8_t column) { transmit_byte((((row + 1) ^ 8) << 4) + (column << 1) + 1); } +int hle_hp_ipc_device::hil_poll() +{ + int frames = 1; + if (m_fifo.empty()) + return frames; + + m_hp_hil_mlc->hil_write(m_device_id16 | 0x40); // Keycode Set 1, no coordinate data + while (!m_fifo.empty()) { + m_hp_hil_mlc->hil_write(m_device_id16 | m_fifo.dequeue()); + frames++; + } + return frames; +} -/*************************************************************************** - HP INTEGRAL HLE KEYBOARD DEVICE -***************************************************************************/ - -/*-------------------------------------------------- - hle_hp_ipc_device::hle_hp_ipc_device - abbreviated constructor ---------------------------------------------------*/ - -hle_hp_ipc_device::hle_hp_ipc_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock) - : hle_device_base(mconfig, HP_IPC_HLE_KEYBOARD, tag, owner, clock) -{ } - +int hle_hp_itf_device::hil_poll() +{ + int frames = 0; + if (m_fifo.empty()) + return frames; + LOG("KBD HAVE DATA\n"); + frames++; + m_hp_hil_mlc->hil_write(m_device_id16 | 0x40); // Keycode Set 1, no coordinate data + while (!m_fifo.empty()) { + m_hp_hil_mlc->hil_write(m_device_id16 | m_fifo.dequeue()); + frames++; + } + return frames; +} /*-------------------------------------------------- hle_hp_ipc_device::device_input_ports @@ -629,8 +518,28 @@ ioport_constructor hle_hp_ipc_device::device_input_ports() const hle_hp_itf_device::hle_hp_itf_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock) : hle_device_base(mconfig, HP_ITF_HLE_KEYBOARD, tag, owner, clock) + , device_matrix_keyboard_interface(mconfig, *this, "COL1", "COL2", "COL3", "COL4", "COL5", "COL6", "COL7", "COL8", "COL9", "COL10", "COL11", "COL12", "COL13", "COL14", "COL15") { } +void hle_hp_itf_device::device_reset() +{ + m_fifo.clear(); + reset_key_state(); + start_processing(attotime::from_hz(1'200)); +} + +void hle_hp_itf_device::key_make(uint8_t row, uint8_t column) +{ + LOG("make\n"); + transmit_byte((((row + 1) ^ 8) << 4) + (column << 1)); +} + + +void hle_hp_itf_device::key_break(uint8_t row, uint8_t column) +{ + LOG("break\n"); + transmit_byte((((row + 1) ^ 8) << 4) + (column << 1) + 1); +} /*-------------------------------------------------- hle_hp_itf_device::device_input_ports @@ -643,4 +552,12 @@ ioport_constructor hle_hp_itf_device::device_input_ports() const } -} } // namespace bus::hp_hil +void hle_hp_itf_device::hil_idd() +{ + m_hp_hil_mlc->hil_write(m_device_id16 | ioport("COL0")->read()); + m_hp_hil_mlc->hil_write(m_device_id16 | 0x04); + return; +} + +} // namespace bus::hp_hil +} // namespace bus diff --git a/src/devices/bus/hp_hil/hlekbd.h b/src/devices/bus/hp_hil/hlekbd.h index 837e8501933..714b0ba6d2b 100644 --- a/src/devices/bus/hp_hil/hlekbd.h +++ b/src/devices/bus/hp_hil/hlekbd.h @@ -6,64 +6,92 @@ #pragma once #include "hp_hil.h" +#include "hlebase.h" #include "machine/keyboard.h" -namespace bus { namespace hp_hil { +namespace bus { + namespace hp_hil { -class hle_device_base - : public device_t - , public device_hp_hil_interface - , protected device_matrix_keyboard_interface<15U> +class hle_hp_ipc_device + : public hle_device_base + , protected device_matrix_keyboard_interface<15U> { public: - virtual ~hle_device_base() override; - - static constexpr feature_type imperfect_features() { return feature::KEYBOARD; } - -protected: - // constructor/destructor - hle_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, uint32_t clock); + hle_hp_ipc_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); - // device overrides - virtual void device_start() override; + virtual ioport_constructor device_input_ports() const override; virtual void device_reset() override; // device_matrix_keyboard_interface overrides virtual void key_make(uint8_t row, uint8_t column) override; virtual void key_break(uint8_t row, uint8_t column) override; - - // device_hp_hil_interface overrides - virtual bool hil_write(uint16_t *data) override; - + virtual int hil_poll() override; + virtual void hil_idd() override; private: - void transmit_byte(uint8_t byte); - util::fifo<uint8_t, 8> m_fifo; + void transmit_byte(uint8_t byte); }; - -class hle_hp_ipc_device : public hle_device_base +class hle_hp_itf_device + : public hle_device_base + , protected device_matrix_keyboard_interface<15U> { public: - hle_hp_ipc_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); - + hle_hp_itf_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); + virtual void device_reset() override; virtual ioport_constructor device_input_ports() const override; + + // device_matrix_keyboard_interface overrides + virtual void key_make(uint8_t row, uint8_t column) override; + virtual void key_break(uint8_t row, uint8_t column) override; + virtual int hil_poll() override; + virtual void hil_idd() override; +private: + util::fifo<uint8_t, 8> m_fifo; + void transmit_byte(uint8_t byte); }; -class hle_hp_itf_device : public hle_device_base + +class hle_hp_46060b_device + : public hle_device_base { public: - hle_hp_itf_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); - + hle_hp_46060b_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); + virtual void device_reset() override; virtual ioport_constructor device_input_ports() const override; + virtual int hil_poll() override; + virtual void hil_idd() override; + enum state_mask + { + MOUSE_YPOS = 0x000000ff, + MOUSE_XPOS = 0x0000ff00, + MOUSE_LBUTTON = 0x00010000, + MOUSE_MBUTTON = 0x00020000, + MOUSE_RBUTTON = 0x00040000, + + MOUSE_BUTTONS = 0x00070000 + }; + + DECLARE_INPUT_CHANGED_MEMBER(mouse_button); + DECLARE_INPUT_CHANGED_MEMBER(mouse_x); + DECLARE_INPUT_CHANGED_MEMBER(mouse_y); + + int8_t mouse_x_delta; + int8_t mouse_y_delta; + uint32_t mouse_buttons; + util::fifo<uint8_t, 16> m_fifo; + }; -} } // namespace bus::hp_hil + +} // namespace bus::hp_hil +} // namespace bus DECLARE_DEVICE_TYPE_NS(HP_IPC_HLE_KEYBOARD, bus::hp_hil, hle_hp_ipc_device); DECLARE_DEVICE_TYPE_NS(HP_ITF_HLE_KEYBOARD, bus::hp_hil, hle_hp_itf_device); +DECLARE_DEVICE_TYPE_NS(HP_46060B_MOUSE, bus::hp_hil, hle_hp_46060b_device); #endif // MAME_DEVICES_HP_HIL_HLEKBD_H diff --git a/src/devices/bus/hp_hil/hlemouse.cpp b/src/devices/bus/hp_hil/hlemouse.cpp new file mode 100644 index 00000000000..9fc6c9db985 --- /dev/null +++ b/src/devices/bus/hp_hil/hlemouse.cpp @@ -0,0 +1,127 @@ +// license:BSD-3-Clause +// copyright-holders:Sven Schnelle +#include "emu.h" +#include "hlekbd.h" + +#include "machine/keyboard.ipp" +//#define VERBOSE 1 +#include "logmacro.h" + +/*************************************************************************** + DEVICE TYPE GLOBALS +***************************************************************************/ + +DEFINE_DEVICE_TYPE_NS(HP_46060B_MOUSE, bus::hp_hil, hle_hp_46060b_device, "hp_46060b", "HP 46060B Mouse") + +namespace bus { + namespace hp_hil { + +namespace { + +/*************************************************************************** + INPUT PORT DEFINITIONS +***************************************************************************/ + +INPUT_PORTS_START( hle_hp_46060b_device ) + PORT_START("mouse_buttons") + PORT_BIT(hle_hp_46060b_device::MOUSE_LBUTTON, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_NAME("Mouse Left Button") PORT_CODE(MOUSECODE_BUTTON1) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_hp_46060b_device, mouse_button, nullptr) + PORT_BIT(hle_hp_46060b_device::MOUSE_MBUTTON, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_NAME("Mouse Middle Button") PORT_CODE(MOUSECODE_BUTTON3) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_hp_46060b_device, mouse_button, nullptr) + PORT_BIT(hle_hp_46060b_device::MOUSE_RBUTTON, IP_ACTIVE_HIGH, IPT_BUTTON3) PORT_NAME("Mouse Right Button") PORT_CODE(MOUSECODE_BUTTON2) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_hp_46060b_device, mouse_button, nullptr) + + PORT_START("mouse_x") + PORT_BIT(0xff, 0x00, IPT_MOUSE_X) PORT_SENSITIVITY(50) PORT_KEYDELTA(0) PORT_PLAYER(1) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_hp_46060b_device, mouse_x, nullptr) + PORT_START("mouse_y") + PORT_BIT(0xff, 0x00, IPT_MOUSE_Y) PORT_SENSITIVITY(50) PORT_KEYDELTA(0) PORT_PLAYER(1) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_hp_46060b_device, mouse_y, nullptr) +INPUT_PORTS_END +} // anonymous namespace + +hle_hp_46060b_device::hle_hp_46060b_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock) + : hle_device_base(mconfig, HP_46060B_MOUSE, tag, owner, clock) +{ } + +void hle_hp_46060b_device::device_reset() +{ + m_fifo.clear(); +} + +int hle_hp_46060b_device::hil_poll() +{ + int frames = 0; + uint16_t reports = 0; + + if (mouse_x_delta || mouse_y_delta) + reports |= 2; + + if (!m_fifo.empty()) + reports |= 0x40; + + if (!reports) + return 0; + + m_hp_hil_mlc->hil_write(m_device_id16 | reports); // report X & Y data + frames++; + if (mouse_x_delta || mouse_y_delta) { + m_hp_hil_mlc->hil_write(m_device_id16 | (uint8_t)mouse_x_delta); + m_hp_hil_mlc->hil_write(m_device_id16 | (uint8_t)mouse_y_delta); + mouse_x_delta = 0; + mouse_y_delta = 0; + frames+=2; + } + + while (!m_fifo.empty()) { + m_hp_hil_mlc->hil_write(m_device_id16 | m_fifo.dequeue()); + frames++; + } + + return frames; +} + + +void hle_hp_46060b_device::hil_idd() +{ + m_hp_hil_mlc->hil_write(m_device_id16 | 0x68); + m_hp_hil_mlc->hil_write(m_device_id16 | 0x12); // report X & Y Axes + m_hp_hil_mlc->hil_write(m_device_id16 | 0xc2); // resolution Low + m_hp_hil_mlc->hil_write(m_device_id16 | 0x1e); // resolution High + return; +} + +ioport_constructor hle_hp_46060b_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(hle_hp_46060b_device); +} + +INPUT_CHANGED_MEMBER(hle_hp_46060b_device::mouse_y) +{ + int8_t delta = newval - oldval; + mouse_y_delta += -delta; +} + +INPUT_CHANGED_MEMBER(hle_hp_46060b_device::mouse_x) +{ + int8_t delta = newval - oldval; + mouse_x_delta += delta; +} + +INPUT_CHANGED_MEMBER(hle_hp_46060b_device::mouse_button) +{ + const ioport_value data = field.port().read(); + uint32_t _data = data & MOUSE_BUTTONS; + + switch(_data ^ mouse_buttons) { + case MOUSE_LBUTTON: + if (!m_fifo.full()) { + m_fifo.enqueue(_data ? 0x80 : 0x81); + } + break; + case MOUSE_RBUTTON: + if (!m_fifo.full()) { + m_fifo.enqueue(_data ? 0x82 : 0x83); + } + break; + } + mouse_buttons = data; +} + +} // namesapce bus::hp_hil +} // namespace bus diff --git a/src/devices/bus/hp_hil/hlemouse.h b/src/devices/bus/hp_hil/hlemouse.h new file mode 100644 index 00000000000..7abfc1d5192 --- /dev/null +++ b/src/devices/bus/hp_hil/hlemouse.h @@ -0,0 +1,52 @@ +// license:BSD-3-Clause +// copyright-holders:Sven Schnelle +#ifndef MAME_DEVICES_HP_HIL_HLEMOUSE_H +#define MAME_DEVICES_HP_HIL_HLEMOUSE_H + +#pragma once + +#include "hp_hil.h" +#include "hlebase.h" +#include "machine/keyboard.h" + + +namespace bus { + namespace hp_hil { + +class hle_hp_46060b_device + : public hle_device_base +{ +public: + hle_hp_46060b_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); + virtual void device_reset() override; + virtual ioport_constructor device_input_ports() const override; + virtual int hil_poll() override; + virtual void hil_idd() override; + enum state_mask + { + MOUSE_YPOS = 0x000000ff, + MOUSE_XPOS = 0x0000ff00, + MOUSE_LBUTTON = 0x00010000, + MOUSE_MBUTTON = 0x00020000, + MOUSE_RBUTTON = 0x00040000, + + MOUSE_BUTTONS = 0x00070000 + }; + + DECLARE_INPUT_CHANGED_MEMBER(mouse_button); + DECLARE_INPUT_CHANGED_MEMBER(mouse_x); + DECLARE_INPUT_CHANGED_MEMBER(mouse_y); + + int8_t mouse_x_delta; + int8_t mouse_y_delta; + uint32_t mouse_buttons; + util::fifo<uint8_t, 16> m_fifo; + +}; + +} // namespace bus::hp_hil +} // namespace bus + +DECLARE_DEVICE_TYPE_NS(HP_46060B_MOUSE, bus::hp_hil, hle_hp_46060b_device); + +#endif // MAME_DEVICES_HP_HIL_HLEMOUSE_H diff --git a/src/devices/bus/hp_hil/hp_hil.cpp b/src/devices/bus/hp_hil/hp_hil.cpp index d1e20ec163e..02dbf69b61c 100644 --- a/src/devices/bus/hp_hil/hp_hil.cpp +++ b/src/devices/bus/hp_hil/hp_hil.cpp @@ -9,20 +9,8 @@ #include "emu.h" #include "hp_hil.h" - - -#define VERBOSE_DBG 0 - -#define DBG_LOG(N,M,A) \ - do { \ - if(VERBOSE_DBG>=N) \ - { \ - if( M ) \ - logerror("%11.6f at %s: %-10s",machine().time().as_double(),machine().describe_context(),(char*)M ); \ - logerror A; \ - } \ - } while (0) - +//#define VERBOSE 1 +#include "logmacro.h" //************************************************************************** // GLOBAL VARIABLES @@ -88,6 +76,13 @@ void hp_hil_mlc_device::device_start() // resolve callbacks int_cb.resolve_safe(); nmi_cb.resolve_safe(); + + save_item(NAME(m_r2)); + save_item(NAME(m_r3)); + save_item(NAME(m_w1)); + save_item(NAME(m_w2)); + save_item(NAME(m_w3)); + save_item(NAME(m_loop)); } @@ -107,17 +102,17 @@ WRITE8_MEMBER(hp_hil_mlc_device::write) { device_hp_hil_interface *entry = m_device_list.first(); uint16_t tmp = data | (m_w1 << 8); - DBG_LOG(2,"Write", ("%d <- %02x\n", offset, data)); switch (offset) { case 0: - DBG_LOG(1,"Transmit", ("%scommand 0x%02x to device %d\n", !m_loop?"loopback ":"", data, m_w1 & 7)); + LOG("write: %scommand 0x%02x to device %d\n", !m_loop?"loopback ":"", data, m_w1 & 7); m_fifo.clear(); if (m_loop & 2) // no devices on 2nd link loop return; + if (m_loop == 0) { if (!m_fifo.full()) { @@ -138,14 +133,17 @@ WRITE8_MEMBER(hp_hil_mlc_device::write) break; case 1: + LOG("write: W1=%02x\n", 0xf); m_w1 = data & 0xf; break; case 2: + LOG("write: W2=%02x\n", data); m_w2 = data; break; case 3: + LOG("write: W3=%02x\n", data); m_w3 = data; break; @@ -183,15 +181,17 @@ READ8_MEMBER(hp_hil_mlc_device::read) break; } - DBG_LOG(2,"Read", ("%d == %02x\n", offset, data)); + LOG("Read %d == %02x\n", offset, data); return data; } void hp_hil_mlc_device::hil_write(uint16_t data) { - DBG_LOG(1,"Receive", ("%s %04X fifo %s\n", - BIT(data, 11)?"command":"data", data, m_fifo.full()?"full":(m_fifo.empty()?"empty":"ok"))); + LOG("hil_write: %s %04X fifo %s\n", + BIT(data, 11) ? "command" : "data", + data, + m_fifo.full() ? "full" : (m_fifo.empty()?"empty":"ok")); if (!m_fifo.full()) { @@ -248,7 +248,6 @@ device_hp_hil_interface::device_hp_hil_interface(const machine_config &mconfig, { } - //------------------------------------------------- // ~device_hp_hil_interface - destructor //------------------------------------------------- diff --git a/src/devices/bus/hp_hil/hp_hil.h b/src/devices/bus/hp_hil/hp_hil.h index 6ed9d791ff7..4ee8984cdc9 100644 --- a/src/devices/bus/hp_hil/hp_hil.h +++ b/src/devices/bus/hp_hil/hp_hil.h @@ -79,17 +79,6 @@ // INTERFACE CONFIGURATION MACROS //************************************************************************** -#define MCFG_HP_HIL_INT_CALLBACK(_devcb) \ - downcast<hp_hil_mlc_device &>(*device).set_int_callback(DEVCB_##_devcb); - -#define MCFG_HP_HIL_NMI_CALLBACK(_devcb) \ - downcast<hp_hil_mlc_device &>(*device).set_nmi_callback(DEVCB_##_devcb); - -#define MCFG_HP_HIL_SLOT_ADD(_mlc_tag, _tag, _slot_intf, _def_slot) \ - MCFG_DEVICE_ADD(_tag, HP_HIL_SLOT, 0) \ - MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \ - downcast<hp_hil_slot_device &>(*device).set_hp_hil_slot(this, _mlc_tag); - //************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -193,8 +182,6 @@ protected: int m_device_id; uint16_t m_device_id16; - bool m_powerup; - bool m_passthru; private: device_hp_hil_interface *m_next; diff --git a/src/devices/bus/ieee488/hp9122c.cpp b/src/devices/bus/ieee488/hp9122c.cpp index ca4da9a3814..26f36da6ab2 100644 --- a/src/devices/bus/ieee488/hp9122c.cpp +++ b/src/devices/bus/ieee488/hp9122c.cpp @@ -86,10 +86,10 @@ void hp9122c_device::device_start() save_item(NAME(m_ds0)); save_item(NAME(m_ds1)); - m_motor_timer = timer_alloc(0); + m_motor_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(hp9122c_device::motor_timeout), this)); } -void hp9122c_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +TIMER_CALLBACK_MEMBER(hp9122c_device::motor_timeout) { floppy_image_device *floppy0 = m_floppy[0]->get_device(); floppy_image_device *floppy1 = m_floppy[1]->get_device(); diff --git a/src/devices/bus/ieee488/hp9122c.h b/src/devices/bus/ieee488/hp9122c.h index 4bd51888e26..66ef36a3fae 100644 --- a/src/devices/bus/ieee488/hp9122c.h +++ b/src/devices/bus/ieee488/hp9122c.h @@ -118,7 +118,6 @@ private: DECLARE_WRITE8_MEMBER(fdc_write); void cpu_map(address_map &map); - virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; required_device<cpu_device> m_cpu; required_device<i8291a_device> m_i8291a; @@ -145,6 +144,7 @@ private: bool m_ds0; bool m_ds1; + TIMER_CALLBACK_MEMBER(motor_timeout); emu_timer *m_motor_timer; }; diff --git a/src/devices/bus/interpro/sr/edge.cpp b/src/devices/bus/interpro/sr/edge.cpp index 3e6252fc556..e58ce7e3145 100644 --- a/src/devices/bus/interpro/sr/edge.cpp +++ b/src/devices/bus/interpro/sr/edge.cpp @@ -471,8 +471,9 @@ MACHINE_CONFIG_START(mpcb828_device::device_add_mconfig) RAM(config, "sram").set_default_size("128KiB").set_default_value(0); RAM(config, "vram").set_default_size("2560KiB").set_default_value(0); - MCFG_DEVICE_ADD("dsp", TMS32030, 1) // 30_MHz_XTAL + MCFG_DEVICE_ADD("dsp", TMS32030, 30_MHz_XTAL) MCFG_TMS3203X_HOLDA_CB(WRITELINE(DEVICE_SELF, mpcb828_device, holda)) + MCFG_DEVICE_DISABLE() //MCFG_DEVICE_ADDRESS_MAP(0, map_dynamic<2>) MCFG_DEVICE_ADD("ramdac", BT458, 83'020'800) @@ -501,8 +502,9 @@ MACHINE_CONFIG_START(mpcb849_device::device_add_mconfig) RAM(config, "sram").set_default_size("128KiB").set_default_value(0); RAM(config, "vram").set_default_size("5120KiB").set_default_value(0); // size is a guess - MCFG_DEVICE_ADD("dsp", TMS32030, 1) // 30_MHz_XTAL + MCFG_DEVICE_ADD("dsp", TMS32030, 30_MHz_XTAL) MCFG_TMS3203X_HOLDA_CB(WRITELINE(DEVICE_SELF, mpcb828_device, holda)) + MCFG_DEVICE_DISABLE() MCFG_DEVICE_ADD("ramdac", BT458, 0) // unconfirmed clock @@ -544,10 +546,10 @@ MACHINE_CONFIG_END * Inputs htotal=2112 (1664+448) and vtotal=1299 (1248+51) give hsync=77.940kHz. */ MACHINE_CONFIG_START(msmt094_device::device_add_mconfig) - // FIXME: actually 33.333_MHz_XTAL - MCFG_DEVICE_ADD("dsp1", TMS32030, 1) + MCFG_DEVICE_ADD("dsp1", TMS32030, 33.333_MHz_XTAL) MCFG_TMS3203X_HOLDA_CB(WRITELINE(DEVICE_SELF, msmt094_device, holda)) MCFG_DEVICE_ADDRESS_MAP(0, dsp1_map) + MCFG_DEVICE_DISABLE() RAM(config, "ram").set_default_size("6MiB").set_default_value(0); diff --git a/src/devices/bus/interpro/sr/edge.h b/src/devices/bus/interpro/sr/edge.h index e8a66459271..ad6c6dfbb1b 100644 --- a/src/devices/bus/interpro/sr/edge.h +++ b/src/devices/bus/interpro/sr/edge.h @@ -107,7 +107,7 @@ protected: void dsp1_map(address_map &map); - virtual void device_start() override {}; + virtual void device_start() override {} DECLARE_WRITE_LINE_MEMBER(holda); DECLARE_WRITE_LINE_MEMBER(scc_irq); diff --git a/src/devices/bus/iq151/disc2.cpp b/src/devices/bus/iq151/disc2.cpp index d48ea10e9c2..e3445d61897 100644 --- a/src/devices/bus/iq151/disc2.cpp +++ b/src/devices/bus/iq151/disc2.cpp @@ -72,11 +72,12 @@ void iq151_disc2_device::device_reset() // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(iq151_disc2_device::device_add_mconfig) - MCFG_UPD765A_ADD("fdc", false, true) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", iq151_disc2_floppies, "8sssd", iq151_disc2_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:2", iq151_disc2_floppies, "8sssd", iq151_disc2_device::floppy_formats) -MACHINE_CONFIG_END +void iq151_disc2_device::device_add_mconfig(machine_config &config) +{ + UPD765A(config, m_fdc, false, true); + FLOPPY_CONNECTOR(config, "fdc:1", iq151_disc2_floppies, "8sssd", iq151_disc2_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:2", iq151_disc2_floppies, "8sssd", iq151_disc2_device::floppy_formats); +} //------------------------------------------------- diff --git a/src/devices/bus/iq151/grafik.cpp b/src/devices/bus/iq151/grafik.cpp index 3ff61a188de..ce107cf81da 100644 --- a/src/devices/bus/iq151/grafik.cpp +++ b/src/devices/bus/iq151/grafik.cpp @@ -121,8 +121,7 @@ void iq151_grafik_device::io_read(offs_t offset, uint8_t &data) { if (offset >= 0xd0 && offset < 0xd4) { - address_space& space = machine().device("maincpu")->memory().space(AS_IO); - data = m_ppi8255->read(space, offset & 3); + data = m_ppi8255->read(offset & 3); } else if (offset == 0xd4) { @@ -141,8 +140,7 @@ void iq151_grafik_device::io_write(offs_t offset, uint8_t data) { if (offset >= 0xd0 && offset < 0xd4) { - address_space& space = machine().device("maincpu")->memory().space(AS_IO); - m_ppi8255->write(space, offset & 3, data); + m_ppi8255->write(offset & 3, data); } else if (offset == 0xd4) { diff --git a/src/devices/bus/iq151/staper.cpp b/src/devices/bus/iq151/staper.cpp index 2c7acb98bfa..37379f590f8 100644 --- a/src/devices/bus/iq151/staper.cpp +++ b/src/devices/bus/iq151/staper.cpp @@ -87,10 +87,8 @@ void iq151_staper_device::device_timer(emu_timer &timer, device_timer_id id, int void iq151_staper_device::io_read(offs_t offset, uint8_t &data) { - address_space& space = machine().device("maincpu")->memory().space(AS_IO); - if (offset >= 0xf8 && offset < 0xfc) - data = m_ppi->read(space, offset & 0x03); + data = m_ppi->read(offset & 0x03); } //------------------------------------------------- @@ -99,10 +97,8 @@ void iq151_staper_device::io_read(offs_t offset, uint8_t &data) void iq151_staper_device::io_write(offs_t offset, uint8_t data) { - address_space& space = machine().device("maincpu")->memory().space(AS_IO); - if (offset >= 0xf8 && offset < 0xfc) - m_ppi->write(space, offset & 0x03, data); + m_ppi->write(offset & 0x03, data); } diff --git a/src/devices/bus/isa/com.cpp b/src/devices/bus/isa/com.cpp index 57393a52500..bd2b500d611 100644 --- a/src/devices/bus/isa/com.cpp +++ b/src/devices/bus/isa/com.cpp @@ -8,18 +8,24 @@ #include "emu.h" #include "com.h" + +#include "bus/rs232/hlemouse.h" +#include "bus/rs232/null_modem.h" #include "bus/rs232/rs232.h" -#include "bus/rs232/ser_mouse.h" +#include "bus/rs232/sun_kbd.h" #include "bus/rs232/terminal.h" -#include "bus/rs232/null_modem.h" #include "machine/ins8250.h" static void isa_com(device_slot_interface &device) { - device.option_add("microsoft_mouse", MSFT_SERIAL_MOUSE); - device.option_add("msystems_mouse", MSYSTEM_SERIAL_MOUSE); + device.option_add("microsoft_mouse", MSFT_HLE_SERIAL_MOUSE); + device.option_add("logitech_mouse", LOGITECH_HLE_SERIAL_MOUSE); + device.option_add("wheel_mouse", WHEEL_HLE_SERIAL_MOUSE); + device.option_add("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE); + device.option_add("rotatable_mouse", ROTATABLE_HLE_SERIAL_MOUSE); device.option_add("terminal", SERIAL_TERMINAL); device.option_add("null_modem", NULL_MODEM); + device.option_add("sun_kbd", SUN_KBD_ADAPTOR); } @@ -55,7 +61,7 @@ MACHINE_CONFIG_START(isa8_com_device::device_add_mconfig) uart3.out_rts_callback().set("serport3", FUNC(rs232_port_device::write_rts)); uart3.out_int_callback().set(FUNC(isa8_com_device::pc_com_interrupt_2));*/ - MCFG_DEVICE_ADD( "serport0", RS232_PORT, isa_com, "microsoft_mouse" ) + MCFG_DEVICE_ADD( "serport0", RS232_PORT, isa_com, "logitech_mouse" ) MCFG_RS232_RXD_HANDLER(WRITELINE(uart0, ins8250_uart_device, rx_w)) MCFG_RS232_DCD_HANDLER(WRITELINE(uart0, ins8250_uart_device, dcd_w)) MCFG_RS232_DSR_HANDLER(WRITELINE(uart0, ins8250_uart_device, dsr_w)) @@ -156,7 +162,7 @@ MACHINE_CONFIG_START(isa8_com_at_device::device_add_mconfig) uart3.out_dtr_callback().set("serport3", FUNC(rs232_port_device::write_dtr)); uart3.out_rts_callback().set("serport3", FUNC(rs232_port_device::write_rts)); uart3.out_int_callback().set(FUNC(isa8_com_device::pc_com_interrupt_2));*/ - MCFG_DEVICE_ADD( "serport0", RS232_PORT, isa_com, "microsoft_mouse" ) + MCFG_DEVICE_ADD( "serport0", RS232_PORT, isa_com, "logitech_mouse" ) MCFG_RS232_RXD_HANDLER(WRITELINE(uart0, ins8250_uart_device, rx_w)) MCFG_RS232_DCD_HANDLER(WRITELINE(uart0, ins8250_uart_device, dcd_w)) MCFG_RS232_DSR_HANDLER(WRITELINE(uart0, ins8250_uart_device, dsr_w)) diff --git a/src/devices/bus/isa/fdc.cpp b/src/devices/bus/isa/fdc.cpp index f341480cb17..7b24fcd00e9 100644 --- a/src/devices/bus/isa/fdc.cpp +++ b/src/devices/bus/isa/fdc.cpp @@ -108,37 +108,40 @@ isa8_fdc_smc_device::isa8_fdc_smc_device(const machine_config &mconfig, const ch { } -MACHINE_CONFIG_START(isa8_fdc_smc_device::device_add_mconfig) - MCFG_SMC37C78_ADD("fdc") - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, isa8_fdc_device, irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, isa8_fdc_device, drq_w)) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats) -MACHINE_CONFIG_END +void isa8_fdc_smc_device::device_add_mconfig(machine_config &config) +{ + smc37c78_device &smc(SMC37C78(config, fdc)); + smc.intrq_wr_callback().set(FUNC(isa8_fdc_device::irq_w)); + smc.drq_wr_callback().set(FUNC(isa8_fdc_device::drq_w)); + FLOPPY_CONNECTOR(config, "fdc:0", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:1", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats); +} isa8_fdc_ps2_device::isa8_fdc_ps2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : isa8_fdc_device(mconfig, ISA8_FDC_PS2, tag, owner, clock) { } -MACHINE_CONFIG_START(isa8_fdc_ps2_device::device_add_mconfig) - MCFG_N82077AA_ADD("fdc", n82077aa_device::MODE_PS2) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, isa8_fdc_device, irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, isa8_fdc_device, drq_w)) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats) -MACHINE_CONFIG_END +void isa8_fdc_ps2_device::device_add_mconfig(machine_config &config) +{ + n82077aa_device &n82077aa(N82077AA(config, fdc, n82077aa_device::MODE_PS2)); + n82077aa.intrq_wr_callback().set(FUNC(isa8_fdc_device::irq_w)); + n82077aa.drq_wr_callback().set(FUNC(isa8_fdc_device::drq_w)); + FLOPPY_CONNECTOR(config, "fdc:0", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:1", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats); +} isa8_fdc_superio_device::isa8_fdc_superio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : isa8_fdc_device(mconfig, ISA8_FDC_SUPERIO, tag, owner, clock) { } -MACHINE_CONFIG_START(isa8_fdc_superio_device::device_add_mconfig) - MCFG_PC_FDC_SUPERIO_ADD("fdc") - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, isa8_fdc_device, irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, isa8_fdc_device, drq_w)) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats) -MACHINE_CONFIG_END +void isa8_fdc_superio_device::device_add_mconfig(machine_config &config) +{ + pc_fdc_superio_device &superio(PC_FDC_SUPERIO(config, fdc)); + superio.intrq_wr_callback().set(FUNC(isa8_fdc_device::irq_w)); + superio.drq_wr_callback().set(FUNC(isa8_fdc_device::drq_w)); + FLOPPY_CONNECTOR(config, "fdc:0", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:1", pc_hd_floppies, "35hd", isa8_fdc_device::floppy_formats); +} isa8_ec1841_0003_device::isa8_ec1841_0003_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : isa8_fdc_device(mconfig, ISA8_EC1841_0003, tag, owner, clock) diff --git a/src/devices/bus/isa/ibm_mfc.cpp b/src/devices/bus/isa/ibm_mfc.cpp index cabcb0c8db6..6ffed8dd904 100644 --- a/src/devices/bus/isa/ibm_mfc.cpp +++ b/src/devices/bus/isa/ibm_mfc.cpp @@ -162,7 +162,7 @@ INPUT_PORTS_END READ8_MEMBER( isa8_ibm_mfc_device::ppi0_i_a ) { // Read data from the Z80 PIU - return m_d71055c_1->read_pa(); + return m_d71055c_1->pa_r(); } WRITE8_MEMBER( isa8_ibm_mfc_device::ppi0_o_b ) @@ -210,7 +210,7 @@ WRITE8_MEMBER( isa8_ibm_mfc_device::ppi1_o_a ) READ8_MEMBER( isa8_ibm_mfc_device::ppi1_i_b ) { // Read data from the PC PIU - return m_d71055c_0->read_pb(); + return m_d71055c_0->pb_r(); } WRITE8_MEMBER( isa8_ibm_mfc_device::ppi1_o_c ) @@ -285,7 +285,7 @@ READ8_MEMBER( isa8_ibm_mfc_device::ibm_mfc_r ) case 0x2: case 0x3: { - val = m_d71055c_0->read(space, offset); + val = m_d71055c_0->read(offset); break; } @@ -317,7 +317,7 @@ WRITE8_MEMBER( isa8_ibm_mfc_device::ibm_mfc_w ) case 0x3: { machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(1000)); - m_d71055c_0->write(space, offset, data); + m_d71055c_0->write(offset, data); break; } @@ -326,7 +326,7 @@ WRITE8_MEMBER( isa8_ibm_mfc_device::ibm_mfc_w ) case 0x6: case 0x7: { - m_d8253->write(space, offset & 3, data); + m_d8253->write(offset & 3, data); break; } diff --git a/src/devices/bus/isa/lpt.cpp b/src/devices/bus/isa/lpt.cpp index 3860896bf7b..e47404a498d 100644 --- a/src/devices/bus/isa/lpt.cpp +++ b/src/devices/bus/isa/lpt.cpp @@ -19,10 +19,11 @@ isa8_lpt_device::isa8_lpt_device(const machine_config &mconfig, const char *tag, { } -MACHINE_CONFIG_START(isa8_lpt_device::device_add_mconfig) - MCFG_DEVICE_ADD("lpt", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE(*this, isa8_lpt_device, pc_cpu_line)) -MACHINE_CONFIG_END +void isa8_lpt_device::device_add_mconfig(machine_config &config) +{ + pc_lpt_device &lpt(PC_LPT(config, "lpt")); + lpt.irq_handler().set(FUNC(isa8_lpt_device::pc_cpu_line)); +} static INPUT_PORTS_START( lpt_dsw ) PORT_START("DSW") diff --git a/src/devices/bus/isa/mda.cpp b/src/devices/bus/isa/mda.cpp index bd1f2d19300..7d5ffb6efd9 100644 --- a/src/devices/bus/isa/mda.cpp +++ b/src/devices/bus/isa/mda.cpp @@ -126,8 +126,8 @@ MACHINE_CONFIG_START(isa8_mda_device::device_add_mconfig) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_pcmda) - MCFG_DEVICE_ADD("lpt", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE(*this, isa8_mda_device, pc_cpu_line)) + pc_lpt_device &lpt(PC_LPT(config, "lpt")); + lpt.irq_handler().set(FUNC(isa8_mda_device::pc_cpu_line)); MACHINE_CONFIG_END //------------------------------------------------- @@ -554,8 +554,8 @@ MACHINE_CONFIG_START(isa8_hercules_device::device_add_mconfig) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_pcherc) - MCFG_DEVICE_ADD("lpt", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE(*this, isa8_mda_device, pc_cpu_line)) + pc_lpt_device &lpt(PC_LPT(config, "lpt")); + lpt.irq_handler().set(FUNC(isa8_mda_device::pc_cpu_line)); MACHINE_CONFIG_END //------------------------------------------------- diff --git a/src/devices/bus/isa/mufdc.cpp b/src/devices/bus/isa/mufdc.cpp index e1c16b1b6ea..d402403e4a6 100644 --- a/src/devices/bus/isa/mufdc.cpp +++ b/src/devices/bus/isa/mufdc.cpp @@ -45,16 +45,17 @@ static void drives(device_slot_interface &device) // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(mufdc_device::device_add_mconfig) - MCFG_MCS3201_ADD("fdc") - MCFG_MCS3201_INPUT_HANDLER(READ8(*this, mufdc_device, fdc_input_r)) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, mufdc_device, fdc_irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, mufdc_device, fdc_drq_w)) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", drives, "35hd", mufdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", drives, "35hd", mufdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:2", drives, nullptr, mufdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:3", drives, nullptr, mufdc_device::floppy_formats) -MACHINE_CONFIG_END +void mufdc_device::device_add_mconfig(machine_config &config) +{ + mcs3201_device &mcs3201(MCS3201(config, m_fdc)); + mcs3201.input_handler().set(FUNC(mufdc_device::fdc_input_r)); + mcs3201.intrq_wr_callback().set(FUNC(mufdc_device::fdc_irq_w)); + mcs3201.drq_wr_callback().set(FUNC(mufdc_device::fdc_drq_w)); + FLOPPY_CONNECTOR(config, "fdc:0", drives, "35hd", mufdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:1", drives, "35hd", mufdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:2", drives, nullptr, mufdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:3", drives, nullptr, mufdc_device::floppy_formats); +} //------------------------------------------------- // input_ports - device-specific input ports diff --git a/src/devices/bus/isa/myb3k_com.cpp b/src/devices/bus/isa/myb3k_com.cpp index fdc0a527c6f..b99e54216e5 100644 --- a/src/devices/bus/isa/myb3k_com.cpp +++ b/src/devices/bus/isa/myb3k_com.cpp @@ -101,20 +101,17 @@ void isa8_myb3k_com_device::device_reset() { // IO base factory setting is 0x540 uint32_t base = m_iobase->read(); - m_isa->install_device(base, base, - read8_delegate(FUNC(i8251_device::data_r), subdevice<i8251_device>("usart")), - write8_delegate(FUNC(i8251_device::data_w), subdevice<i8251_device>("usart")) ); - m_isa->install_device(base + 1, base + 1, - read8_delegate(FUNC(i8251_device::status_r), subdevice<i8251_device>("usart")), - write8_delegate(FUNC(i8251_device::control_w), subdevice<i8251_device>("usart")) ); + m_isa->install_device(base, base + 1, + read8sm_delegate(FUNC(i8251_device::read), m_usart.target()), + write8sm_delegate(FUNC(i8251_device::write), m_usart.target()) ); m_isa->install_device(base + 2, base + 2, read8_delegate(FUNC(isa8_myb3k_com_device::dce_status), this), write8_delegate(FUNC(isa8_myb3k_com_device::dce_control), this) ); m_isa->install_device(base + 4, base + 7, - read8_delegate(FUNC(pit8253_device::read), subdevice<pit8253_device>("pit")), - write8_delegate(FUNC(pit8253_device::write), subdevice<pit8253_device>("pit")) ); + read8sm_delegate(FUNC(pit8253_device::read), subdevice<pit8253_device>("pit")), + write8sm_delegate(FUNC(pit8253_device::write), subdevice<pit8253_device>("pit")) ); m_irq = m_isairq->read(); m_installed = true; diff --git a/src/devices/bus/isa/p1_sound.cpp b/src/devices/bus/isa/p1_sound.cpp index 62b0bbca1d6..4d24328395f 100644 --- a/src/devices/bus/isa/p1_sound.cpp +++ b/src/devices/bus/isa/p1_sound.cpp @@ -95,32 +95,32 @@ p1_sound_device::p1_sound_device(const machine_config &mconfig, const char *tag, READ8_MEMBER(p1_sound_device::d14_r) { - return m_d14->read(space, offset >> 1); + return m_d14->read(offset >> 1); } WRITE8_MEMBER(p1_sound_device::d14_w) { - m_d14->write(space, offset >> 1, data); + m_d14->write(offset >> 1, data); } READ8_MEMBER(p1_sound_device::d16_r) { - return m_d16->read(space, offset >> 1); + return m_d16->read(offset >> 1); } WRITE8_MEMBER(p1_sound_device::d16_w) { - m_d16->write(space, offset >> 1, data); + m_d16->write(offset >> 1, data); } READ8_MEMBER(p1_sound_device::d17_r) { - return m_d17->read(space, offset >> 1); + return m_d17->read(offset >> 1); } WRITE8_MEMBER(p1_sound_device::d17_w) { - m_d17->write(space, offset >> 1, data); + m_d17->write(offset >> 1, data); } READ8_MEMBER(p1_sound_device::adc_r) @@ -165,11 +165,11 @@ void p1_sound_device::device_start() write8_delegate(FUNC(p1_sound_device::dac_w), this)); m_isa->install_memory(0xee000, 0xee000, - read8_delegate(FUNC(i8251_device::data_r), (i8251_device*)m_midi), - write8_delegate(FUNC(i8251_device::data_w), (i8251_device*)m_midi)); + read8smo_delegate(FUNC(i8251_device::data_r), m_midi.target()), + write8smo_delegate(FUNC(i8251_device::data_w), m_midi.target())); m_isa->install_memory(0xee002, 0xee002, - read8_delegate(FUNC(i8251_device::status_r), (i8251_device*)m_midi), - write8_delegate(FUNC(i8251_device::control_w), (i8251_device*)m_midi)); + read8smo_delegate(FUNC(i8251_device::status_r), m_midi.target()), + write8smo_delegate(FUNC(i8251_device::control_w), m_midi.target())); // sync generator m_isa->install_memory(0xef000, 0xef007, diff --git a/src/devices/bus/isa/pds.cpp b/src/devices/bus/isa/pds.cpp index bdcecad8ca1..45dffd9904e 100644 --- a/src/devices/bus/isa/pds.cpp +++ b/src/devices/bus/isa/pds.cpp @@ -32,14 +32,14 @@ isa8_pds_device::isa8_pds_device(const machine_config &mconfig, const char *tag, READ8_MEMBER(isa8_pds_device::ppi_r) { if(!(offset & 0x01)) - return m_ppi->read(space,offset/2); + return m_ppi->read(offset/2); return 0xff; } WRITE8_MEMBER(isa8_pds_device::ppi_w) { if(!(offset & 0x01)) - m_ppi->write(space,offset/2,data); + m_ppi->write(offset/2,data); } void isa8_pds_device::device_start() diff --git a/src/devices/bus/isbx/compis_fdc.cpp b/src/devices/bus/isbx/compis_fdc.cpp index a2300020119..4a14beacb09 100644 --- a/src/devices/bus/isbx/compis_fdc.cpp +++ b/src/devices/bus/isbx/compis_fdc.cpp @@ -54,13 +54,14 @@ static void compis_floppies(device_slot_interface &device) // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(compis_fdc_device::device_add_mconfig) - MCFG_I8272A_ADD(I8272_TAG, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, compis_fdc_device, fdc_irq)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, compis_fdc_device, fdc_drq)) - MCFG_FLOPPY_DRIVE_ADD(I8272_TAG":0", compis_floppies, "525qd", compis_fdc_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD(I8272_TAG":1", compis_floppies, "525qd", compis_fdc_device::floppy_formats) -MACHINE_CONFIG_END +void compis_fdc_device::device_add_mconfig(machine_config &config) +{ + I8272A(config, m_fdc, true); + m_fdc->intrq_wr_callback().set(FUNC(compis_fdc_device::fdc_irq)); + m_fdc->drq_wr_callback().set(FUNC(compis_fdc_device::fdc_drq)); + FLOPPY_CONNECTOR(config, m_floppy0, compis_floppies, "525qd", compis_fdc_device::floppy_formats); + FLOPPY_CONNECTOR(config, m_floppy1, compis_floppies, "525qd", compis_fdc_device::floppy_formats); +} diff --git a/src/devices/bus/isbx/isbc_218a.cpp b/src/devices/bus/isbx/isbc_218a.cpp index c98df25dd9d..b52054ae5db 100644 --- a/src/devices/bus/isbx/isbc_218a.cpp +++ b/src/devices/bus/isbx/isbc_218a.cpp @@ -54,12 +54,13 @@ static void isbc_218a_floppies(device_slot_interface &device) // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(isbc_218a_device::device_add_mconfig) - MCFG_I8272A_ADD(I8272_TAG, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, isbc_218a_device, fdc_irq)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, isbc_218a_device, fdc_drq)) - MCFG_FLOPPY_DRIVE_ADD(I8272_TAG":0", isbc_218a_floppies, "525dd", isbc_218a_device::floppy_formats) -MACHINE_CONFIG_END +void isbc_218a_device::device_add_mconfig(machine_config &config) +{ + I8272A(config, m_fdc, true); + m_fdc->intrq_wr_callback().set(FUNC(isbc_218a_device::fdc_irq)); + m_fdc->drq_wr_callback().set(FUNC(isbc_218a_device::fdc_drq)); + FLOPPY_CONNECTOR(config, m_floppy0, isbc_218a_floppies, "525dd", isbc_218a_device::floppy_formats); +} //************************************************************************** diff --git a/src/devices/bus/lpci/southbridge.cpp b/src/devices/bus/lpci/southbridge.cpp index 9e281e83437..e9fec4c7514 100644 --- a/src/devices/bus/lpci/southbridge.cpp +++ b/src/devices/bus/lpci/southbridge.cpp @@ -217,11 +217,11 @@ void southbridge_device::device_start() spaceio = &machine().device(":maincpu")->memory().space(AS_IO); spaceio->install_readwrite_handler(0x0000, 0x001f, read8_delegate(FUNC(am9517a_device::read), &(*m_dma8237_1)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma8237_1)), 0xffffffff); - spaceio->install_readwrite_handler(0x0020, 0x003f, read8_delegate(FUNC(pic8259_device::read), &(*m_pic8259_master)), write8_delegate(FUNC(pic8259_device::write), &(*m_pic8259_master)), 0xffffffff); - spaceio->install_readwrite_handler(0x0040, 0x005f, read8_delegate(FUNC(pit8254_device::read), &(*m_pit8254)), write8_delegate(FUNC(pit8254_device::write), &(*m_pit8254)), 0xffffffff); + spaceio->install_readwrite_handler(0x0020, 0x003f, read8sm_delegate(FUNC(pic8259_device::read), &(*m_pic8259_master)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_pic8259_master)), 0xffffffff); + spaceio->install_readwrite_handler(0x0040, 0x005f, read8sm_delegate(FUNC(pit8254_device::read), &(*m_pit8254)), write8sm_delegate(FUNC(pit8254_device::write), &(*m_pit8254)), 0xffffffff); spaceio->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(southbridge_device::at_portb_r), this), write8_delegate(FUNC(southbridge_device::at_portb_w), this), 0x0000ff00); spaceio->install_readwrite_handler(0x0080, 0x009f, read8_delegate(FUNC(southbridge_device::at_page8_r), this), write8_delegate(FUNC(southbridge_device::at_page8_w), this), 0xffffffff); - spaceio->install_readwrite_handler(0x00a0, 0x00bf, read8_delegate(FUNC(pic8259_device::read), &(*m_pic8259_slave)), write8_delegate(FUNC(pic8259_device::write), &(*m_pic8259_slave)), 0xffffffff); + spaceio->install_readwrite_handler(0x00a0, 0x00bf, read8sm_delegate(FUNC(pic8259_device::read), &(*m_pic8259_slave)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_pic8259_slave)), 0xffffffff); spaceio->install_readwrite_handler(0x00c0, 0x00df, read8_delegate(FUNC(southbridge_device::at_dma8237_2_r), this), write8_delegate(FUNC(southbridge_device::at_dma8237_2_w), this), 0xffffffff); spaceio->install_readwrite_handler(0x0170, 0x0177, read32_delegate(FUNC(southbridge_device::ide2_read32_cs0_r), this), write32_delegate(FUNC(southbridge_device::ide2_write32_cs0_w), this), 0xffffffff); spaceio->install_readwrite_handler(0x01f0, 0x01f7, read32_delegate(FUNC(southbridge_device::ide1_read32_cs0_r), this), write32_delegate(FUNC(southbridge_device::ide1_write32_cs0_w), this), 0xffffffff); @@ -510,15 +510,15 @@ MACHINE_CONFIG_START(southbridge_extended_device::device_add_mconfig) southbridge_device::device_add_mconfig(config); at_keyboard_controller_device &keybc(AT_KEYBOARD_CONTROLLER(config, "keybc", XTAL(12'000'000))); - keybc.system_reset_cb().set_inputline(":maincpu", INPUT_LINE_RESET); - keybc.gate_a20_cb().set_inputline(":maincpu", INPUT_LINE_A20); - keybc.input_buffer_full_cb().set("pic8259_master", FUNC(pic8259_device::ir1_w)); - keybc.keyboard_clock_cb().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); - keybc.keyboard_data_cb().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + keybc.hot_res().set_inputline(":maincpu", INPUT_LINE_RESET); + keybc.gate_a20().set_inputline(":maincpu", INPUT_LINE_A20); + keybc.kbd_irq().set("pic8259_master", FUNC(pic8259_device::ir1_w)); + keybc.kbd_clk().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); + keybc.kbd_data().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); MCFG_DEVICE_ADD("pc_kbdc", PC_KBDC, 0) - MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_clock_w)) - MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_data_w)) + MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_clk_w)) + MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_data_w)) MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL) ds12885_device &rtc(DS12885(config, "rtc")); diff --git a/src/devices/bus/msx_cart/disk.cpp b/src/devices/bus/msx_cart/disk.cpp index f66495e1cd8..cbaba85f01c 100644 --- a/src/devices/bus/msx_cart/disk.cpp +++ b/src/devices/bus/msx_cart/disk.cpp @@ -232,7 +232,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(msx_cart_fsfd1a_device::device_add_mconfig) - MCFG_TC8566AF_ADD("fdc") + TC8566AF(config, m_fdc); // Double sided 3.5" floppy drive MCFG_FLOPPY_DRIVE_ADD("fdc:0", msx_floppies, "35dd", msx_cart_disk_device::floppy_formats) diff --git a/src/devices/bus/newbrain/fdc.cpp b/src/devices/bus/newbrain/fdc.cpp index 733a277d49f..c3378dd5108 100644 --- a/src/devices/bus/newbrain/fdc.cpp +++ b/src/devices/bus/newbrain/fdc.cpp @@ -84,7 +84,7 @@ void newbrain_fdc_device::newbrain_fdc_io(address_map &map) { map.unmap_value_high(); map.global_mask(0x71); - map(0x00, 0x01).mirror(0x10).m(UPD765_TAG, FUNC(upd765a_device::map)); + map(0x00, 0x01).mirror(0x10).m(m_fdc, FUNC(upd765a_device::map)); map(0x20, 0x20).mirror(0x11).w(FUNC(newbrain_fdc_device::fdc_auxiliary_w)); map(0x40, 0x40).mirror(0x11).r(FUNC(newbrain_fdc_device::fdc_control_r)); } @@ -109,8 +109,8 @@ MACHINE_CONFIG_START(newbrain_fdc_device::device_add_mconfig) MCFG_DEVICE_PROGRAM_MAP(newbrain_fdc_mem) MCFG_DEVICE_IO_MAP(newbrain_fdc_io) - MCFG_UPD765A_ADD(UPD765_TAG, false, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, newbrain_fdc_device, fdc_int_w)) + UPD765A(config, m_fdc, false, true); + m_fdc->intrq_wr_callback().set(FUNC(newbrain_fdc_device::fdc_int_w)); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", newbrain_floppies, "525dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", newbrain_floppies, "525dd", floppy_image_device::default_floppy_formats) diff --git a/src/devices/bus/nubus/quadralink.cpp b/src/devices/bus/nubus/quadralink.cpp index f38a0f3b57b..a2d138874e6 100644 --- a/src/devices/bus/nubus/quadralink.cpp +++ b/src/devices/bus/nubus/quadralink.cpp @@ -126,35 +126,35 @@ WRITE32_MEMBER( nubus_quadralink_device::dev_w ) switch (offset) { case 0x0000: // SCC 2 A control - m_scc2->ca_w(space, 0, data & 0xff); + m_scc2->ca_w(0, data & 0xff); break; case 0x0002: // SCC 2 A data - m_scc2->da_w(space, 0, data & 0xff); + m_scc2->da_w(0, data & 0xff); break; case 0x0004: // SCC 2 B control - m_scc2->cb_w(space, 0, data & 0xff); + m_scc2->cb_w(0, data & 0xff); break; case 0x0006: // SCC 2 B data - m_scc2->db_w(space, 0, data & 0xff); + m_scc2->db_w(0, data & 0xff); break; case 0x10000: // SCC 1 A control - m_scc1->ca_w(space, 0, data & 0xff); + m_scc1->ca_w(0, data & 0xff); break; case 0x10002: // SCC 1 A data - m_scc1->da_w(space, 0, data & 0xff); + m_scc1->da_w(0, data & 0xff); break; case 0x10004: // SCC 1 B control - m_scc1->cb_w(space, 0, data & 0xff); + m_scc1->cb_w(0, data & 0xff); break; case 0x10006: // SCC 1 B data - m_scc1->db_w(space, 0, data & 0xff); + m_scc1->db_w(0, data & 0xff); break; } } @@ -165,28 +165,28 @@ READ32_MEMBER( nubus_quadralink_device::dev_r ) switch (offset) { case 0x0000: - return m_scc2->ca_r(space, 0); + return m_scc2->ca_r(0); case 0x0002: - return m_scc2->da_r(space, 0); + return m_scc2->da_r(0); case 0x0004: - return m_scc2->cb_r(space, 0); + return m_scc2->cb_r(0); case 0x0006: - return m_scc2->db_r(space, 0); + return m_scc2->db_r(0); case 0x10000: - return m_scc1->ca_r(space, 0); + return m_scc1->ca_r(0); case 0x10002: - return m_scc1->da_r(space, 0); + return m_scc1->da_r(0); case 0x10004: - return m_scc1->cb_r(space, 0); + return m_scc1->cb_r(0); case 0x10006: - return m_scc1->db_r(space, 0); + return m_scc1->db_r(0); } return 0xffffffff; } diff --git a/src/devices/bus/pc_kbd/keyboards.cpp b/src/devices/bus/pc_kbd/keyboards.cpp index 7c9d32501fc..98be3e2e304 100644 --- a/src/devices/bus/pc_kbd/keyboards.cpp +++ b/src/devices/bus/pc_kbd/keyboards.cpp @@ -10,6 +10,7 @@ #include "pc83.h" #include "pcxt83.h" #include "pcat84.h" +#include "pcat101.h" void pc_xt_keyboards(device_slot_interface &device) { @@ -27,4 +28,5 @@ void pc_at_keyboards(device_slot_interface &device) device.option_add(STR_KBD_MICROSOFT_NATURAL, PC_KBD_MICROSOFT_NATURAL); device.option_add(STR_KBD_IBM_PC_AT_84, PC_KBD_IBM_PC_AT_84); device.option_add(STR_KBD_IBM_3270PC_122, PC_KBD_IBM_3270PC_122); + device.option_add(STR_KBD_IBM_PC_AT_101, PC_KBD_IBM_PC_AT_101); } diff --git a/src/devices/bus/pc_kbd/keyboards.h b/src/devices/bus/pc_kbd/keyboards.h index a4dc98432c7..ca106926499 100644 --- a/src/devices/bus/pc_kbd/keyboards.h +++ b/src/devices/bus/pc_kbd/keyboards.h @@ -27,6 +27,7 @@ void pc_xt_keyboards(device_slot_interface &device); #define STR_KBD_MICROSOFT_NATURAL "ms_naturl" #define STR_KBD_IBM_PC_AT_84 "pcat" #define STR_KBD_IBM_3270PC_122 "3270pc" +#define STR_KBD_IBM_PC_AT_101 "pcat101" void pc_at_keyboards(device_slot_interface &device); diff --git a/src/devices/bus/pc_kbd/pc_kbdc.cpp b/src/devices/bus/pc_kbd/pc_kbdc.cpp index 9bd50c1ea5f..6d28227bca2 100644 --- a/src/devices/bus/pc_kbd/pc_kbdc.cpp +++ b/src/devices/bus/pc_kbd/pc_kbdc.cpp @@ -47,9 +47,7 @@ void pc_kbdc_slot_device::device_start() device_pc_kbd_interface *pc_kbd = dynamic_cast<device_pc_kbd_interface *>(get_card_device()); if (pc_kbd) - { pc_kbd->set_pc_kbdc(m_kbdc_device); - } } @@ -71,11 +69,11 @@ pc_kbdc_device::pc_kbdc_device(const machine_config &mconfig, const char *tag, d m_data_state(-1), m_mb_clock_state(0), m_mb_data_state(0), m_kb_clock_state(1), m_kb_data_state(1), - m_keyboard( nullptr ) + m_keyboard(nullptr) { } -void pc_kbdc_device::set_keyboard( device_pc_kbd_interface *keyboard ) +void pc_kbdc_device::set_keyboard(device_pc_kbd_interface *keyboard) { m_keyboard = keyboard; } @@ -84,19 +82,22 @@ void pc_kbdc_device::set_keyboard( device_pc_kbd_interface *keyboard ) //------------------------------------------------- // device_start - device-specific startup //------------------------------------------------- -void pc_kbdc_device::device_start() +void pc_kbdc_device::device_resolve_objects() { - // resolve callbacks m_out_clock_cb.resolve_safe(); m_out_data_cb.resolve_safe(); } - -//------------------------------------------------- -// device_reset - device-specific reset -//------------------------------------------------- -void pc_kbdc_device::device_reset() +void pc_kbdc_device::device_start() { + save_item(NAME(m_clock_state)); + save_item(NAME(m_data_state)); + + save_item(NAME(m_mb_clock_state)); + save_item(NAME(m_mb_data_state)); + save_item(NAME(m_kb_clock_state)); + save_item(NAME(m_kb_data_state)); + m_clock_state = -1; /* initial state of calculated clock line */ m_data_state = -1; /* initial state of calculated data line */ @@ -112,19 +113,14 @@ void pc_kbdc_device::update_clock_state() { int new_clock_state = m_mb_clock_state & m_kb_clock_state; - if ( new_clock_state != m_clock_state ) + if (new_clock_state != m_clock_state) { // We first set our state to prevent possible endless loops m_clock_state = new_clock_state; - // Send state to keyboard interface logic on mainboard - m_out_clock_cb( m_clock_state ); - // Send state to keyboard - if ( m_keyboard ) - { + if (m_keyboard) m_keyboard->clock_write( m_clock_state ); - } } } @@ -133,48 +129,51 @@ void pc_kbdc_device::update_data_state() { int new_data_state = m_mb_data_state & m_kb_data_state; - if ( new_data_state != m_data_state ) + if (new_data_state != m_data_state) { // We first set our state to prevent possible endless loops m_data_state = new_data_state; - // Send state to keyboard interface logic on mainboard - m_out_data_cb( m_data_state ); - // Send state to keyboard - if ( m_keyboard ) - { - m_keyboard->data_write( m_data_state ); - } + if (m_keyboard) + m_keyboard->data_write(m_data_state); } } -WRITE_LINE_MEMBER( pc_kbdc_device::clock_write_from_mb ) +WRITE_LINE_MEMBER(pc_kbdc_device::clock_write_from_mb) { m_mb_clock_state = state; update_clock_state(); } -WRITE_LINE_MEMBER( pc_kbdc_device::data_write_from_mb ) +WRITE_LINE_MEMBER(pc_kbdc_device::data_write_from_mb) { m_mb_data_state = state; update_data_state(); } -WRITE_LINE_MEMBER( pc_kbdc_device::clock_write_from_kb ) +WRITE_LINE_MEMBER(pc_kbdc_device::clock_write_from_kb) { - m_kb_clock_state = state; - update_clock_state(); + state = state ? 1 : 0; + if (state != m_kb_clock_state) + { + m_out_clock_cb(m_kb_clock_state = state); + update_clock_state(); + } } -WRITE_LINE_MEMBER( pc_kbdc_device::data_write_from_kb ) +WRITE_LINE_MEMBER(pc_kbdc_device::data_write_from_kb) { - m_kb_data_state = state; - update_data_state(); + state = state ? 1 : 0; + if (state != m_kb_data_state) + { + m_out_data_cb(m_kb_data_state = state); + update_data_state(); + } } @@ -203,20 +202,18 @@ device_pc_kbd_interface::~device_pc_kbd_interface() } -WRITE_LINE_MEMBER( device_pc_kbd_interface::clock_write ) +WRITE_LINE_MEMBER(device_pc_kbd_interface::clock_write) { } -WRITE_LINE_MEMBER( device_pc_kbd_interface::data_write ) +WRITE_LINE_MEMBER(device_pc_kbd_interface::data_write) { } void device_pc_kbd_interface::set_pc_kbdc_device() { - if ( m_pc_kbdc ) - { - m_pc_kbdc->set_keyboard( this ); - } + if (m_pc_kbdc) + m_pc_kbdc->set_keyboard(this); } diff --git a/src/devices/bus/pc_kbd/pc_kbdc.h b/src/devices/bus/pc_kbd/pc_kbdc.h index 4e20fc68a1c..2f0b51e5d69 100644 --- a/src/devices/bus/pc_kbd/pc_kbdc.h +++ b/src/devices/bus/pc_kbd/pc_kbdc.h @@ -43,13 +43,13 @@ public: // construction/destruction pc_kbdc_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - // device-level overrides - virtual void device_start() override; - // inline configuration void set_pc_kbdc_slot(device_t *kbdc_device) { m_kbdc_device = kbdc_device; } protected: + // device-level overrides + virtual void device_start() override; + // configuration device_t *m_kbdc_device; }; @@ -69,6 +69,8 @@ public: template <class Object> devcb_base &set_out_clock_callback(Object &&cb) { return m_out_clock_cb.set_callback(std::forward<Object>(cb)); } template <class Object> devcb_base &set_out_data_callback(Object &&cb) { return m_out_data_cb.set_callback(std::forward<Object>(cb)); } + auto out_clock_cb() { return m_out_clock_cb.bind(); } + auto out_data_cb() { return m_out_data_cb.bind(); } void set_keyboard(device_pc_kbd_interface *keyboard); @@ -82,8 +84,8 @@ public: protected: // device-level overrides + virtual void device_resolve_objects() override; virtual void device_start() override; - virtual void device_reset() override; void update_clock_state(); void update_data_state(); @@ -91,13 +93,13 @@ protected: devcb_write_line m_out_clock_cb; devcb_write_line m_out_data_cb; - int m_clock_state; - int m_data_state; + int8_t m_clock_state; + int8_t m_data_state; - int m_mb_clock_state; - int m_mb_data_state; - int m_kb_clock_state; - int m_kb_data_state; + uint8_t m_mb_clock_state; + uint8_t m_mb_data_state; + uint8_t m_kb_clock_state; + uint8_t m_kb_data_state; device_pc_kbd_interface *m_keyboard; }; @@ -113,15 +115,10 @@ class device_pc_kbd_interface : public device_slot_card_interface { friend class pc_kbdc_device; public: - // construction/destruction - device_pc_kbd_interface(const machine_config &mconfig, device_t &device); virtual ~device_pc_kbd_interface(); void set_pc_kbdc_device(); - int clock_signal() { return m_pc_kbdc ? m_pc_kbdc->clock_signal() : 1; } - int data_signal() { return m_pc_kbdc ? m_pc_kbdc->data_signal() : 1; } - // // Override the clock_write and data_write methods in a keyboard implementation // @@ -132,6 +129,11 @@ public: void set_pc_kbdc(device_t *kbdc_device) { m_pc_kbdc = dynamic_cast<pc_kbdc_device *>(kbdc_device); } protected: + device_pc_kbd_interface(const machine_config &mconfig, device_t &device); + + int clock_signal() const { return m_pc_kbdc ? m_pc_kbdc->clock_signal() : 1; } + int data_signal() const { return m_pc_kbdc ? m_pc_kbdc->data_signal() : 1; } + pc_kbdc_device *m_pc_kbdc; const char *m_pc_kbdc_tag; }; diff --git a/src/devices/bus/pc_kbd/pcat101.cpp b/src/devices/bus/pc_kbd/pcat101.cpp new file mode 100644 index 00000000000..e36a3062492 --- /dev/null +++ b/src/devices/bus/pc_kbd/pcat101.cpp @@ -0,0 +1,241 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +/* + * IBM Model M PC/AT and PS/2 101-key keyboard emulation. + * + * Sources: + * + * https://clickykeyboards.com/ + * http://www.kbdbabel.org/schematic/kbdbabel_doc_ibm1394796.pdf + * http://ps-2.kev009.com/ohlandl/keyboard/Keyboard.html + * + * Part No Layout + * 1391401 US English 101-key + * + * TODO + * - matrix and mcu ports (skeleton only) + */ + +#include "emu.h" +#include "pcat101.h" + +DEFINE_DEVICE_TYPE(PC_KBD_IBM_PC_AT_101, ibm_pc_at_101_keyboard_device, "kb_pcat101", "IBM Model M Keyboard") + +ROM_START(ibm_pc_at_101_keyboard) + ROM_REGION(0x1000, "mcu", 0) + /* + * PCB + * 1394792 K27-1 + * EC 528739 4989 + * + * MCU + * ST (C)IBM 1984 + * C430 28940 + * EF6805U3P-B + * 1394080 + */ + ROM_LOAD("ef6805u3p-b__1394080.u2", 0x000, 0x1000, CRC(7d2a52f3) SHA1(ac739dc0408ea0b3be60f85b7a2eb822753a054c)) +ROM_END + +const tiny_rom_entry *ibm_pc_at_101_keyboard_device::device_rom_region() const +{ + return ROM_NAME(ibm_pc_at_101_keyboard); +} + +void ibm_pc_at_101_keyboard_device::device_add_mconfig(machine_config &config) +{ + M68705U3(config, m_maincpu, 0); + + //m_maincpu->portb_r_cb().set(FUNC(ibm_pc_at_101_keyboard_device::portb_r)); + //m_maincpu->portb_w_cb().set(FUNC(ibm_pc_at_101_keyboard_device::portb_w)); +} + +// FIXME: copied from ibm_pc_at_84_keyboard - probably completely wrong +INPUT_PORTS_START(ibm_pc_at_101_keyboard) + PORT_START("column00") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9)) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7)) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5)) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3)) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("column01") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F10) PORT_CHAR(UCHAR_MAMEKEY(F10)) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8)) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6)) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4)) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR(UCHAR_MAMEKEY(TAB)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("column02") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(LALT)) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("column03") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("column04") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("column05") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("column06") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("column07") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("column08") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("column09") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("column10") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_CUSTOM) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('"') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1) + + PORT_START("column11") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("column12") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("column13") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 1 End") PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 4 " UTF8_LEFT) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 7 Home") PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("column14") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 0 Ins") PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad . Del") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD)) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 2 " UTF8_DOWN) PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5_PAD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 6 " UTF8_RIGHT) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 8 " UTF8_UP) PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_NUMLOCK) PORT_CHAR(UCHAR_MAMEKEY(NUMLOCK)) + + PORT_START("column15") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD)) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 3 PgDn") PORT_CODE(KEYCODE_3_PAD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad * PrtSc") PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 9 PgUp") PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Scroll Lock Break") PORT_CODE(KEYCODE_SCRLOCK) PORT_CHAR(UCHAR_MAMEKEY(SCRLOCK)) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Sys Req") +INPUT_PORTS_END + +ioport_constructor ibm_pc_at_101_keyboard_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(ibm_pc_at_101_keyboard); +} + +ibm_pc_at_101_keyboard_device::ibm_pc_at_101_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC_KBD_IBM_PC_AT_101, tag, owner, clock) + , device_pc_kbd_interface(mconfig, *this) + , m_maincpu(*this, "mcu") + , m_column(*this, "column%02u", 0U) + , m_leds(*this, "led%u", 0U) +{ +} + +void ibm_pc_at_101_keyboard_device::device_start() +{ + set_pc_kbdc_device(); + + m_leds.resolve(); +} + +void ibm_pc_at_101_keyboard_device::device_reset() +{ + m_maincpu->reset(); +} diff --git a/src/devices/bus/pc_kbd/pcat101.h b/src/devices/bus/pc_kbd/pcat101.h new file mode 100644 index 00000000000..e727335aa77 --- /dev/null +++ b/src/devices/bus/pc_kbd/pcat101.h @@ -0,0 +1,59 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +/* + * IBM Model M PC/AT and PS/2 101-key keyboard emulation. + */ + +#ifndef MAME_BUS_PC_KBD_PCAT101_H +#define MAME_BUS_PC_KBD_PCAT101_H + +#pragma once + +#include "cpu/m6805/m68705.h" +#include "pc_kbdc.h" +#include "machine/rescap.h" + +class ibm_pc_at_101_keyboard_device + : public device_t + , public device_pc_kbd_interface +{ +public: + // construction/destruction + ibm_pc_at_101_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + // optional information overrides + virtual const tiny_rom_entry *device_rom_region() const override; + virtual void device_add_mconfig(machine_config &config) override; + virtual ioport_constructor device_input_ports() const override; + + // device_pc_kbd_interface overrides + virtual DECLARE_WRITE_LINE_MEMBER(clock_write) override { m_maincpu->set_input_line(M68705_IRQ_LINE, state); }; + virtual DECLARE_WRITE_LINE_MEMBER(data_write) override { }; + +private: + // ports A, C: matrix column + // port D: matrix row + // port B: clock/data and leds + + enum + { + LED_SCROLL = 0, + LED_NUM, + LED_CAPS + }; + + required_device<m68705_device> m_maincpu; + required_ioport_array<16> m_column; + output_finder<3> m_leds; +}; + +// device type definition +DECLARE_DEVICE_TYPE(PC_KBD_IBM_PC_AT_101, ibm_pc_at_101_keyboard_device) + +#endif // MAME_BUS_PC_KBD_PCAT101_H diff --git a/src/devices/bus/pofo/hpc101.cpp b/src/devices/bus/pofo/hpc101.cpp index de0e7db1f6d..93268e95bb6 100644 --- a/src/devices/bus/pofo/hpc101.cpp +++ b/src/devices/bus/pofo/hpc101.cpp @@ -107,7 +107,7 @@ uint8_t pofo_hpc101_device::nrdi_r(address_space &space, offs_t offset, uint8_t if ((offset & 0x0c) == 0x08) { - data = m_ppi->read(space, offset & 0x03); + data = m_ppi->read(offset & 0x03); } } @@ -125,7 +125,7 @@ void pofo_hpc101_device::nwri_w(address_space &space, offs_t offset, uint8_t dat { if ((offset & 0x0c) == 0x08) { - m_ppi->write(space, offset & 0x03, data); + m_ppi->write(offset & 0x03, data); } } } diff --git a/src/devices/bus/rs232/hlemouse.cpp b/src/devices/bus/rs232/hlemouse.cpp new file mode 100644 index 00000000000..713f6adefa5 --- /dev/null +++ b/src/devices/bus/rs232/hlemouse.cpp @@ -0,0 +1,691 @@ +// license:BSD-3-Clause +// copyright-holders:Vas Crabb +/************************************************************************** + + PC Serial Mouse Simulation + + Microsoft mouse is the classic two-button PC mouse. Data is 7N1 at + 1,200 Baud. Mouse can be reset by de-asserting RTS. On start, the + mouse identifies itself with the string "M". Bit 6 is only set for + the first byte of a report - it's clear for all subsequent bytes of + a report, and also for all identification bytes. + + Reports consist of three bytes: the first byte contains the button + state and the two high bits of the Y and X delta; the second byte + contains the low six bits of the X delta; the third byte contains + the low six bits of the Y delta. Button bits are set when pressed, + and positive delta is rightwards/downwards. + + 1lryyxx 0xxxxxx 0yyyyyy + + Logitech extended the Microsoft protocol to support a third button. + The mouse identifies itself with the string "M3". If the third + button changes state, and additional byte is sent indicating the + new state of the third button. + + 1lryyxx 0xxxxxx 0yyyyyy 0m00000 + + The serial wheel mouse protocol extends the Microsoft mouse protocol + in a different way. The mouse identifies itself with the string + "MZ@\0\0\0". If the third button or wheel state changes, a fourth + an additional byte is sent containing the third button state and a + four-bit wheel delta value. The wheel value is positive for + downward movement. Note that the third button is value is in a + different position to the logitech protocol. + + 1lryyxx 0xxxxxx 0yyyyyy 00mwwww + + The Mouse Systems non-rotatable protocol provides two-axis movement + and three buttons. Data is 8N1 at 1,200 Baud (the M-1 mouse could + also be configured for 300 Baud by turning DIP switch 1 off). The + mouse does not send an identification string. The first byte of a + report can be identified by a fixed pattern in the five most + significant bits. + + Reports are five bytes long. The first byte contains the the button + state; the second and fourth bytes contain X delta; the third and + fifth bytes contain Y delta. The two delta values for each axis + should be summed. Delta values range from -120 to 127 to prevent + being mistaken for the lead byte of a report. Button bits are clear + when set, and positive delta is rightwards/upwards. Delta values + are generated immediately before transmission - reports are not + atomic. + + 10000lmr xxxxxxxx yyyyyyyy xxxxxxxx yyyyyyyy + + The Mouse systems rotatable protcol allows the host to infer + rotation around the third axis at the cost of halving the maximum + sustained movement speed. The M-1 mouse has two sensors spaced 100 + counts apart horizontally. If DIP switch 2 is on, the X and Y delta + for each sensor is reported separately. The right sensor delta is + reported before the left sensor delta. If the mouse is rotated, the + delta values for the two sensors will differ. + +**************************************************************************/ + +#include "emu.h" +#include "hlemouse.h" + +#include <cassert> +#include <cmath> + + +//************************************************** +// Device type globals +//************************************************** + +DEFINE_DEVICE_TYPE_NS(MSFT_HLE_SERIAL_MOUSE, bus::rs232, hle_msft_mouse_device, "rs232_mouse_hle_msft", "Microsoft 2-Button Serial Mouse (HLE)") +DEFINE_DEVICE_TYPE_NS(LOGITECH_HLE_SERIAL_MOUSE, bus::rs232, hle_logitech_mouse_device, "rs232_mouse_hle_logitech", "Logitech 3-Button Serial Mouse (HLE)") +DEFINE_DEVICE_TYPE_NS(WHEEL_HLE_SERIAL_MOUSE, bus::rs232, hle_wheel_mouse_device, "rs232_mouse_hle_wheel", "Microsoft Serial Mouse with Wheel (HLE)") +DEFINE_DEVICE_TYPE_NS(MSYSTEMS_HLE_SERIAL_MOUSE, bus::rs232, hle_msystems_mouse_device, "rs232_mouse_hle_msystems", "Mouse Systems Non-rotatable Mouse (HLE)") +DEFINE_DEVICE_TYPE_NS(ROTATABLE_HLE_SERIAL_MOUSE, bus::rs232, hle_rotatable_mouse_device, "rs232_mouse_hle_rotatable", "Mouse Systems Rotatable Mouse (HLE)") + +namespace bus { namespace rs232 { + +namespace { + +INPUT_PORTS_START(msft) + PORT_START("BTN") + PORT_BIT( 0xfffc, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CODE(MOUSECODE_BUTTON1) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_msmouse_device_base, input_changed, nullptr) + PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CODE(MOUSECODE_BUTTON2) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_msmouse_device_base, input_changed, nullptr) + + PORT_START("X") + PORT_BIT( 0xf000, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0fff, 0x00, IPT_MOUSE_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_msmouse_device_base, input_changed, nullptr) + + PORT_START("Y") + PORT_BIT( 0xf000, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0fff, 0x00, IPT_MOUSE_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_msmouse_device_base, input_changed, nullptr) +INPUT_PORTS_END + + +INPUT_PORTS_START(logitech) + PORT_INCLUDE(msft) + + PORT_MODIFY("BTN") + PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CODE(MOUSECODE_BUTTON3) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_msmouse_device_base, input_changed, nullptr) + PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CODE(MOUSECODE_BUTTON2) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_msmouse_device_base, input_changed, nullptr) +INPUT_PORTS_END + + +INPUT_PORTS_START(wheel) + PORT_INCLUDE(logitech) + + PORT_START("WHEEL") + PORT_BIT( 0xf000, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0fff, 0x00, IPT_DIAL_V ) PORT_SENSITIVITY(10) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_msmouse_device_base, input_changed, nullptr) +INPUT_PORTS_END + + +INPUT_PORTS_START(msystems) + PORT_START("BTN") + PORT_BIT( 0xfff8, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(MOUSECODE_BUTTON1) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_msystems_device_base, input_changed, nullptr) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CODE(MOUSECODE_BUTTON3) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_msystems_device_base, input_changed, nullptr) + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(MOUSECODE_BUTTON2) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_msystems_device_base, input_changed, nullptr) + + PORT_START("X") + PORT_BIT( 0xf000, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0fff, 0x00, IPT_MOUSE_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_msystems_device_base, input_changed, nullptr) + + PORT_START("Y") + PORT_BIT( 0xf000, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0fff, 0x00, IPT_MOUSE_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_msystems_device_base, input_changed, nullptr) +INPUT_PORTS_END + + +INPUT_PORTS_START(rotatable) + PORT_INCLUDE(msystems) + + PORT_START("ROT") + PORT_BIT( 0xf000, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0fff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(10) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_msystems_device_base, input_changed, nullptr) +INPUT_PORTS_END + + +template <unsigned Bits, typename T> +std::make_signed_t<T> read_axis(ioport_port &port, T &val) +{ + static_assert((1U < Bits) && ((sizeof(T) * 8) > Bits), "invalid field bits"); + + T const updated(T(std::make_unsigned_t<T>(port.read())) & make_bitmask<T>(Bits)); + std::make_signed_t<T> delta(std::make_signed_t<T>(updated) - std::make_signed_t<T>(val)); + if (std::make_signed_t<T>(std::make_unsigned_t<T>(1) << (Bits - 1)) <= delta) + delta -= std::make_signed_t<T>(std::make_unsigned_t<T>(1) << Bits); + else if (-std::make_signed_t<T>(std::make_unsigned_t<T>(1) << (Bits - 1)) >= delta) + delta += std::make_signed_t<T>(std::make_unsigned_t<T>(1) << Bits); + val = updated; + return delta; +} + + +template <typename T> +uint8_t report_axis(T &delta, T low, T high) +{ + T const result(std::min<T>(std::max<T>(delta, low), high)); + delta -= result; + return uint8_t(int8_t(result)); +} + +} // anonymous namespace + + +//************************************************** +// Microsoft mouse base +//************************************************** + +INPUT_CHANGED_MEMBER(hle_msmouse_device_base::input_changed) +{ + if (fifo_empty() && is_transmit_register_empty()) + check_inputs(); +} + +hle_msmouse_device_base::hle_msmouse_device_base( + machine_config const &mconfig, + device_type type, + char const *tag, + device_t *owner, + uint32_t clock) + : buffered_rs232_device<8>(mconfig, type, tag, owner, clock) + , m_buttons(*this, "BTN") + , m_x_axis(*this, "X") + , m_y_axis(*this, "Y") + , m_x_delta(0) + , m_y_delta(0) + , m_x_val(0U) + , m_y_val(0U) + , m_btn_val(0x00U) + , m_btn_sent(0x00U) + , m_dtr(0U) + , m_rts(0U) + , m_enable(0U) +{ +} + +void hle_msmouse_device_base::device_resolve_objects() +{ + buffered_rs232_device<8>::device_resolve_objects(); + + m_dtr = 0U; + m_rts = 0U; +} + +void hle_msmouse_device_base::device_start() +{ + buffered_rs232_device<8>::device_start(); + + save_item(NAME(m_x_delta)); + save_item(NAME(m_y_delta)); + save_item(NAME(m_x_val)); + save_item(NAME(m_y_val)); + save_item(NAME(m_btn_val)); + save_item(NAME(m_btn_sent)); + save_item(NAME(m_dtr)); + save_item(NAME(m_rts)); + save_item(NAME(m_enable)); + + set_data_frame(1, 7, PARITY_NONE, STOP_BITS_2); + set_rate(1'200); + receive_register_reset(); + transmit_register_reset(); + + m_x_delta = m_y_delta = 0; + m_x_val = m_y_val = 0U; + m_btn_val = m_btn_sent = 0x00U; + m_enable = 0U; + + machine().scheduler().synchronize(timer_expired_delegate(FUNC(hle_msmouse_device_base::start_mouse), this)); +} + +WRITE_LINE_MEMBER(hle_msmouse_device_base::input_dtr) +{ + m_dtr = state ? 1U : 0U; + check_enable(); +} + +WRITE_LINE_MEMBER(hle_msmouse_device_base::input_rts) +{ + m_dtr = state ? 1U : 0U; + check_enable(); +} + +void hle_msmouse_device_base::tra_complete() +{ + buffered_rs232_device<8>::tra_complete(); + if (fifo_empty() && is_transmit_register_empty()) + check_inputs(); +} + +void hle_msmouse_device_base::received_byte(u8 byte) +{ +} + + +TIMER_CALLBACK_MEMBER(hle_msmouse_device_base::start_mouse) +{ + check_enable(); +} + +void hle_msmouse_device_base::check_enable() +{ + bool const enable(!m_dtr && !m_rts); + if (bool(m_enable) != enable) + { + m_enable = enable ? 1U : 0U; + clear_fifo(); + receive_register_reset(); + transmit_register_reset(); + if (enable) + { + read_inputs(); + m_x_delta = m_y_delta = 0; + m_btn_sent = m_btn_val; + reset_and_identify(); + } + } +} + +void hle_msmouse_device_base::check_inputs() +{ + if (m_enable && read_inputs()) + { + uint8_t const x(report_axis<int16_t>(m_x_delta, -128, 127)); + uint8_t const y(report_axis<int16_t>(m_y_delta, -128, 127)); + transmit_byte(0x40U | ((m_btn_val << 4) & 0x30U) | ((y >> 4) & 0x0cU) | ((x >> 6) & 0x03U)); + transmit_byte(x & 0x3fU); + transmit_byte(y & 0x3fU); + transmit_extensions(m_btn_val, m_btn_sent); + m_btn_sent = m_btn_val; + } +} + +bool hle_msmouse_device_base::read_inputs() +{ + m_x_delta += read_axis<12>(*m_x_axis, m_x_val); + m_y_delta += read_axis<12>(*m_y_axis, m_y_val); + m_btn_val = m_buttons->read(); + return m_x_delta || m_y_delta || (m_btn_val != m_btn_sent); +} + + +//************************************************** +// Microsoft 2-button mouse +//************************************************** + +hle_msft_mouse_device::hle_msft_mouse_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + uint32_t clock) + : hle_msmouse_device_base(mconfig, MSFT_HLE_SERIAL_MOUSE, tag, owner, clock) +{ +} + +ioport_constructor hle_msft_mouse_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(msft); +} + +void hle_msft_mouse_device::reset_and_identify() +{ + // assume ASCII host system + transmit_byte('M'); +} + +void hle_msft_mouse_device::transmit_extensions(uint8_t btn_val, uint8_t btn_sent) +{ +} + + +//************************************************** +// Logitech 3-button mouse +//************************************************** + +hle_logitech_mouse_device::hle_logitech_mouse_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock) + : hle_msmouse_device_base(mconfig, LOGITECH_HLE_SERIAL_MOUSE, tag, owner, clock) +{ +} + +ioport_constructor hle_logitech_mouse_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(logitech); +} + +void hle_logitech_mouse_device::reset_and_identify() +{ + // assume ASCII host system + transmit_byte('M'); + transmit_byte('3'); +} + +void hle_logitech_mouse_device::transmit_extensions(uint8_t btn_val, uint8_t btn_sent) +{ + if (BIT(btn_val | btn_sent, 2)) + transmit_byte(BIT(btn_val, 2) << 5); +} + + + +//************************************************** +// Microsoft wheel mouse +//************************************************** + +hle_wheel_mouse_device::hle_wheel_mouse_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + uint32_t clock) + : hle_msmouse_device_base(mconfig, WHEEL_HLE_SERIAL_MOUSE, tag, owner, clock) + , m_wheel(*this, "WHEEL") + , m_wheel_delta(0) + , m_wheel_val(0U) +{ +} + +ioport_constructor hle_wheel_mouse_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(wheel); +} + +void hle_wheel_mouse_device::device_start() +{ + hle_msmouse_device_base::device_start(); + + save_item(NAME(m_wheel_delta)); + save_item(NAME(m_wheel_val)); + + m_wheel_delta = 0; + m_wheel_val = 0U; +} + +bool hle_wheel_mouse_device::read_inputs() +{ + m_wheel_delta += read_axis<12>(*m_wheel, m_wheel_val); + return hle_msmouse_device_base::read_inputs() || m_wheel_delta; +} + +void hle_wheel_mouse_device::reset_and_identify() +{ + m_wheel_delta = 0; + + // assume ASCII host system + transmit_byte('M'); + transmit_byte('Z'); + transmit_byte('@'); + transmit_byte('\0'); + transmit_byte('\0'); + transmit_byte('\0'); +} + +void hle_wheel_mouse_device::transmit_extensions(uint8_t btn_val, uint8_t btn_sent) +{ + if (BIT(btn_val | btn_sent, 2) || m_wheel_delta) + transmit_byte((BIT(btn_val, 2) << 4) | (report_axis<int16_t>(m_wheel_delta, -8, 7) & 0x0fU)); +} + + +//************************************************** +// Mouse Systems mouse base +//************************************************** + +INPUT_CHANGED_MEMBER(hle_msystems_device_base::input_changed) +{ + if (is_transmit_register_empty()) + { + assert(0U == m_phase); + tra_complete(); + } +} + +hle_msystems_device_base::hle_msystems_device_base( + machine_config const &mconfig, + device_type type, + char const *tag, + device_t *owner, + uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_rs232_port_interface(mconfig, *this) + , device_serial_interface(mconfig, *this) + , m_phase(0U) +{ +} + +void hle_msystems_device_base::device_start() +{ + save_item(NAME(m_phase)); + + set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1); + set_rate(1'200); + receive_register_reset(); + transmit_register_reset(); + + m_phase = 0U; + + machine().scheduler().synchronize(timer_expired_delegate(FUNC(hle_msystems_device_base::start_mouse), this)); +} + +void hle_msystems_device_base::tra_callback() +{ + output_rxd(transmit_register_get_data_bit()); +} + +void hle_msystems_device_base::tra_complete() +{ + if (4U <= m_phase) + m_phase = 0U; + else + ++m_phase; + + bool const dirty(read_inputs()); + switch (m_phase) + { + case 0U: + if (dirty) + transmit_register_setup((report_buttons() & 0x07U) | 0x80U); + break; + case 1U: + transmit_register_setup(report_x1_delta()); + break; + case 2U: + transmit_register_setup(report_y1_delta()); + break; + case 3U: + transmit_register_setup(report_x2_delta()); + break; + case 4U: + transmit_register_setup(report_y2_delta()); + break; + }; +} + +TIMER_CALLBACK_MEMBER(hle_msystems_device_base::start_mouse) +{ + if (is_transmit_register_empty()) + { + assert(0U == m_phase); + tra_complete(); + } +} + + +//************************************************** +// Mouse Systems non-rotatable mouse +//************************************************** + +hle_msystems_mouse_device::hle_msystems_mouse_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + uint32_t clock) + : hle_msystems_device_base(mconfig, MSYSTEMS_HLE_SERIAL_MOUSE, tag, owner, clock) + , m_buttons(*this, "BTN") + , m_x_axis(*this, "X") + , m_y_axis(*this, "Y") + , m_x_delta(0) + , m_y_delta(0) + , m_x_val(0U) + , m_y_val(0U) + , m_btn_val(0x00U) + , m_btn_sent(0x00U) +{ +} + +ioport_constructor hle_msystems_mouse_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(msystems); +} + +void hle_msystems_mouse_device::device_start() +{ + hle_msystems_device_base::device_start(); + + save_item(NAME(m_x_delta)); + save_item(NAME(m_y_delta)); + save_item(NAME(m_x_val)); + save_item(NAME(m_y_val)); + save_item(NAME(m_btn_val)); + save_item(NAME(m_btn_sent)); + + m_x_delta = m_y_delta = 0; + m_x_val = m_y_val = 0U; + m_btn_val = m_btn_sent = 0x00U; +} + +bool hle_msystems_mouse_device::read_inputs() +{ + m_x_delta += read_axis<12>(*m_x_axis, m_x_val); + m_y_delta -= read_axis<12>(*m_y_axis, m_y_val); + m_btn_val = m_buttons->read(); + return m_x_delta || m_y_delta || (m_btn_val != m_btn_sent); +} + +uint8_t hle_msystems_mouse_device::report_buttons() +{ + m_btn_sent = m_btn_val; + return m_btn_sent; +} + +uint8_t hle_msystems_mouse_device::report_x1_delta() +{ + return report_axis<int16_t>(m_x_delta, -120, 127); +} + +uint8_t hle_msystems_mouse_device::report_y1_delta() +{ + return report_axis<int16_t>(m_y_delta, -120, 127); +} + +uint8_t hle_msystems_mouse_device::report_x2_delta() +{ + return report_axis<int16_t>(m_x_delta, -120, 127); +} + +uint8_t hle_msystems_mouse_device::report_y2_delta() +{ + return report_axis<int16_t>(m_y_delta, -120, 127); +} + + +//************************************************** +// Mouse Systems rotatable mouse +//************************************************** + +hle_rotatable_mouse_device::hle_rotatable_mouse_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + uint32_t clock) + : hle_msystems_device_base(mconfig, ROTATABLE_HLE_SERIAL_MOUSE, tag, owner, clock) + , m_buttons(*this, "BTN") + , m_x_axis(*this, "X") + , m_y_axis(*this, "Y") + , m_rotation(*this, "ROT") + , m_x_delta{ 0, 0 } + , m_y_delta{ 0, 0 } + , m_x_val(0U) + , m_y_val(0U) + , m_rot_val(0U) + , m_btn_val(0x00U) + , m_btn_sent(0x00U) +{ +} + +ioport_constructor hle_rotatable_mouse_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(rotatable); +} + +void hle_rotatable_mouse_device::device_start() +{ + hle_msystems_device_base::device_start(); + + save_item(NAME(m_x_delta)); + save_item(NAME(m_y_delta)); + save_item(NAME(m_x_val)); + save_item(NAME(m_y_val)); + save_item(NAME(m_rot_val)); + save_item(NAME(m_btn_val)); + save_item(NAME(m_btn_sent)); + + m_x_delta[0] = m_x_delta[1] = m_y_delta[0] = m_y_delta[1] = 0; + m_x_val = m_y_val = m_rot_val = 0U; + m_btn_val = m_btn_sent = 0x00U; +} + +bool hle_rotatable_mouse_device::read_inputs() +{ + // translation is straighforward + int16_t const x_delta(read_axis<12>(*m_x_axis, m_x_val)); + int16_t const y_delta(read_axis<12>(*m_y_axis, m_y_val)); + m_x_delta[0] += x_delta; + m_x_delta[1] += x_delta; + m_y_delta[0] -= y_delta; + m_y_delta[1] -= y_delta; + + // there are two sensors 100 counts apart, one inch below the centre of the mouse + // for simplicity, assume the mouse is rotated around the point midway the sensors + int16_t const rot_delta(read_axis<12>(*m_rotation, m_rot_val)); + if (rot_delta) + { + double const rot_angle(-0.15 * rot_delta); + long const x_diff(std::lround((1 - std::cos(rot_angle)) * 100)); + long const y_diff(std::lround(std::sin(rot_angle) * 100)); + m_x_delta[0] -= x_diff / 2; + m_x_delta[1] += x_diff - (x_diff / 2); + m_y_delta[0] += y_diff / 2; + m_y_delta[1] -= y_diff - (y_diff / 2); + } + + // this is straightforward, too + m_btn_val = m_buttons->read(); + return m_x_delta[0] || m_x_delta[1] || m_y_delta[0] || m_y_delta[1] || (m_btn_val != m_btn_sent); +} + +uint8_t hle_rotatable_mouse_device::report_buttons() +{ + m_btn_sent = m_btn_val; + return m_btn_sent; +} + +uint8_t hle_rotatable_mouse_device::report_x1_delta() +{ + return report_axis<int16_t>(m_x_delta[0], -120, 127); +} + +uint8_t hle_rotatable_mouse_device::report_y1_delta() +{ + return report_axis<int16_t>(m_y_delta[0], -120, 127); +} + +uint8_t hle_rotatable_mouse_device::report_x2_delta() +{ + return report_axis<int16_t>(m_x_delta[1], -120, 127); +} + +uint8_t hle_rotatable_mouse_device::report_y2_delta() +{ + return report_axis<int16_t>(m_y_delta[1], -120, 127); +} + +} } // namespace bus::rs232 diff --git a/src/devices/bus/rs232/hlemouse.h b/src/devices/bus/rs232/hlemouse.h new file mode 100644 index 00000000000..be3142ad118 --- /dev/null +++ b/src/devices/bus/rs232/hlemouse.h @@ -0,0 +1,221 @@ +// license:BSD-3-Clause +// copyright-holders:Vas Crabb +/************************************************************************** + + PC Serial Mouse Simulation + +**************************************************************************/ +#ifndef MAME_BUS_RS232_HLEMOUSE_H +#define MAME_BUS_RS232_HLEMOUSE_H + +#pragma once + +#include "rs232.h" +#include "diserial.h" + +#include <type_traits> + + +namespace bus { namespace rs232 { + +//************************************************** +// Microsoft mouse base +//************************************************** + +class hle_msmouse_device_base : public buffered_rs232_device<8> +{ +public: + DECLARE_INPUT_CHANGED_MEMBER(input_changed); + +protected: + hle_msmouse_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, uint32_t clock); + + virtual void device_resolve_objects() override; + virtual void device_start() override; + + virtual DECLARE_WRITE_LINE_MEMBER(input_dtr) override; + virtual DECLARE_WRITE_LINE_MEMBER(input_rts) override; + + virtual void tra_complete() override; + + virtual void received_byte(u8 byte) override; + + virtual bool read_inputs(); + +private: + TIMER_CALLBACK_MEMBER(start_mouse); + void check_enable(); + void check_inputs(); + + virtual void reset_and_identify() = 0; + virtual void transmit_extensions(uint8_t btn_val, uint8_t btn_sent) = 0; + + required_ioport m_buttons, m_x_axis, m_y_axis; + int16_t m_x_delta, m_y_delta; + uint16_t m_x_val, m_y_val; + uint8_t m_btn_val, m_btn_sent; + uint8_t m_dtr, m_rts, m_enable; +}; + + +//************************************************** +// Microsoft 2-button mouse +//************************************************** + +class hle_msft_mouse_device : public hle_msmouse_device_base +{ +public: + hle_msft_mouse_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); + +protected: + virtual ioport_constructor device_input_ports() const override; + +private: + virtual void reset_and_identify() override; + virtual void transmit_extensions(uint8_t btn_val, uint8_t btn_sent) override; +}; + + +//************************************************** +// Logitech 3-button mouse +//************************************************** + +class hle_logitech_mouse_device : public hle_msmouse_device_base +{ +public: + hle_logitech_mouse_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); + +protected: + virtual ioport_constructor device_input_ports() const override; + +private: + virtual void reset_and_identify() override; + virtual void transmit_extensions(uint8_t btn_val, uint8_t btn_sent) override; +}; + + +//************************************************** +// Microsoft wheel mouse +//************************************************** + +class hle_wheel_mouse_device : public hle_msmouse_device_base +{ +public: + hle_wheel_mouse_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); + +protected: + virtual ioport_constructor device_input_ports() const override; + virtual void device_start() override; + + virtual bool read_inputs() override; + +private: + virtual void reset_and_identify() override; + virtual void transmit_extensions(uint8_t btn_val, uint8_t btn_sent) override; + + required_ioport m_wheel; + int16_t m_wheel_delta; + uint16_t m_wheel_val; +}; + + +//************************************************** +// Mouse Systems mouse base +//************************************************** + +class hle_msystems_device_base : public device_t, public device_rs232_port_interface, public device_serial_interface +{ +public: + DECLARE_INPUT_CHANGED_MEMBER(input_changed); + +protected: + hle_msystems_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override; + + virtual void tra_callback() override; + virtual void tra_complete() override; + +private: + TIMER_CALLBACK_MEMBER(start_mouse); + + virtual bool read_inputs() = 0; + virtual uint8_t report_buttons() = 0; + virtual uint8_t report_x1_delta() = 0; + virtual uint8_t report_y1_delta() = 0; + virtual uint8_t report_x2_delta() = 0; + virtual uint8_t report_y2_delta() = 0; + + uint8_t m_phase; +}; + + +//************************************************** +// Mouse Systems non-rotatable mouse +//************************************************** + +class hle_msystems_mouse_device : public hle_msystems_device_base +{ +public: + hle_msystems_mouse_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); + +protected: + virtual ioport_constructor device_input_ports() const override; + virtual void device_start() override; + +private: + virtual bool read_inputs() override; + virtual uint8_t report_buttons() override; + virtual uint8_t report_x1_delta() override; + virtual uint8_t report_y1_delta() override; + virtual uint8_t report_x2_delta() override; + virtual uint8_t report_y2_delta() override; + + required_ioport m_buttons, m_x_axis, m_y_axis; + int16_t m_x_delta, m_y_delta; + uint16_t m_x_val, m_y_val; + uint8_t m_btn_val, m_btn_sent; +}; + + +//************************************************** +// Mouse Systems rotatable mouse +//************************************************** + +class hle_rotatable_mouse_device : public hle_msystems_device_base +{ +public: + hle_rotatable_mouse_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); + +protected: + virtual ioport_constructor device_input_ports() const override; + virtual void device_start() override; + +private: + virtual bool read_inputs() override; + virtual uint8_t report_buttons() override; + virtual uint8_t report_x1_delta() override; + virtual uint8_t report_y1_delta() override; + virtual uint8_t report_x2_delta() override; + virtual uint8_t report_y2_delta() override; + + required_ioport m_buttons, m_x_axis, m_y_axis, m_rotation; + int16_t m_x_delta[2], m_y_delta[2]; + uint16_t m_x_val, m_y_val, m_rot_val; + uint8_t m_btn_val, m_btn_sent; +}; + +} } // namespace bus::rs232 + + +//************************************************** +// Device type globals +//************************************************** + +DECLARE_DEVICE_TYPE_NS(MSFT_HLE_SERIAL_MOUSE, bus::rs232, hle_msft_mouse_device) +DECLARE_DEVICE_TYPE_NS(LOGITECH_HLE_SERIAL_MOUSE, bus::rs232, hle_logitech_mouse_device) +DECLARE_DEVICE_TYPE_NS(WHEEL_HLE_SERIAL_MOUSE, bus::rs232, hle_wheel_mouse_device) +DECLARE_DEVICE_TYPE_NS(MSYSTEMS_HLE_SERIAL_MOUSE, bus::rs232, hle_msystems_mouse_device) +DECLARE_DEVICE_TYPE_NS(ROTATABLE_HLE_SERIAL_MOUSE, bus::rs232, hle_rotatable_mouse_device) + +#endif // MAME_BUS_RS232_SER_MOUSE_H diff --git a/src/devices/bus/rs232/ser_mouse.cpp b/src/devices/bus/rs232/ser_mouse.cpp deleted file mode 100644 index 2c80fc43ef5..00000000000 --- a/src/devices/bus/rs232/ser_mouse.cpp +++ /dev/null @@ -1,267 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:smf -/*************************************************************************** - - machine/ser_mouse.c - - Code for emulating PC-style serial mouses - -***************************************************************************/ - -#include "emu.h" -#include "ser_mouse.h" - - -serial_mouse_device::serial_mouse_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, type, tag, owner, clock), - device_rs232_port_interface(mconfig, *this), - device_serial_interface(mconfig, *this), - m_dtr(1), - m_rts(1), - m_head(0), - m_tail(0), - m_mb(0), - m_timer(nullptr), - m_enabled(false), - m_x(*this, "ser_mouse_x"), - m_y(*this, "ser_mouse_y"), - m_btn(*this, "ser_mouse_btn") -{ -} - -DEFINE_DEVICE_TYPE(MSFT_SERIAL_MOUSE, microsoft_mouse_device, "microsoft_mouse", "Microsoft Serial Mouse") - -microsoft_mouse_device::microsoft_mouse_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : serial_mouse_device(mconfig, MSFT_SERIAL_MOUSE, tag, owner, clock) -{ -} - -DEFINE_DEVICE_TYPE(MSYSTEM_SERIAL_MOUSE, mouse_systems_mouse_device, "mouse_systems_mouse", "Mouse Systems Serial Mouse") - -mouse_systems_mouse_device::mouse_systems_mouse_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : serial_mouse_device(mconfig, MSYSTEM_SERIAL_MOUSE, tag, owner, clock) -{ -} - -void serial_mouse_device::device_start() -{ - m_timer = timer_alloc(); - m_enabled = false; - set_frame(); - set_tra_rate(1200); - reset_mouse(); - - save_item(NAME(m_dtr)); - save_item(NAME(m_rts)); - save_item(NAME(m_queue)); - save_item(NAME(m_head)); - save_item(NAME(m_tail)); - save_item(NAME(m_mb)); - save_item(NAME(m_enabled)); -} - -void serial_mouse_device::reset_mouse() -{ - m_head = m_tail = 0; - output_rxd(1); - output_dcd(0); - output_dsr(0); - output_ri(0); - output_cts(0); -} - -void serial_mouse_device::tra_complete() -{ - if(m_tail != m_head) - transmit_register_setup(unqueue_data()); -} - -void serial_mouse_device::tra_callback() -{ - output_rxd(transmit_register_get_data_bit()); -} - -/************************************************************************** - * Check for mouse moves and buttons. Build delta x/y packets - **************************************************************************/ -void serial_mouse_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) -{ - if (!id) - { - static int ox = 0, oy = 0; - int nx,ny; - int dx, dy, nb; - int mbc; - - /* Do not get deltas or send packets if queue is not empty (Prevents drifting) */ - if (m_head==m_tail) - { - nx = m_x->read(); - - dx = nx - ox; - if (dx<=-0x800) dx = nx + 0x1000 - ox; /* Prevent jumping */ - if (dx>=0x800) dx = nx - 0x1000 - ox; - ox = nx; - - ny = m_y->read(); - - dy = ny - oy; - if (dy<=-0x800) dy = ny + 0x1000 - oy; - if (dy>=0x800) dy = ny - 0x1000 - oy; - oy = ny; - - nb = m_btn->read(); - mbc = nb^m_mb; - m_mb = nb; - - /* check if there is any delta or mouse buttons changed */ - if ( (dx!=0) || (dy!=0) || (mbc!=0) ) - mouse_trans(dx, dy, nb, mbc); - } - - if(m_tail != m_head && is_transmit_register_empty()) - transmit_register_setup(unqueue_data()); - } -} - -void microsoft_mouse_device::mouse_trans(int dx, int dy, int nb, int mbc) -{ - /* split deltas into packets of -128..+127 max */ - do - { - uint8_t m0, m1, m2; - int ddx = (dx < -128) ? -128 : (dx > 127) ? 127 : dx; - int ddy = (dy < -128) ? -128 : (dy > 127) ? 127 : dy; - m0 = 0x40 | ((nb << 4) & 0x30) | ((ddx >> 6) & 0x03) | ((ddy >> 4) & 0x0c); - m1 = ddx & 0x3f; - m2 = ddy & 0x3f; - - /* KT - changed to use a function */ - queue_data(m0 | 0x40); - queue_data(m1 & 0x03f); - queue_data(m2 & 0x03f); - if ((mbc & 0x04) != 0) /* If button 3 changed send extra byte */ - queue_data( (nb & 0x04) << 3); - - dx -= ddx; - dy -= ddy; - } while( dx || dy ); -} - -/* mouse systems mouse - from "PC Mouse information" by Tomi Engdahl */ - -/* - The data is sent in 5 byte packets in following format: - D7 D6 D5 D4 D3 D2 D1 D0 - - 1. 1 0 0 0 0 LB CB RB - 2. X7 X6 X5 X4 X3 X2 X1 X0 - 3. Y7 Y6 Y5 Y4 Y3 Y4 Y1 Y0 - 4. X7' X6' X5' X4' X3' X2' X1' X0' - 5. Y7' Y6' Y5' Y4' Y3' Y4' Y1' Y0' - - LB is left button state (0=pressed, 1=released) - CB is center button state (0=pressed, 1=released) - RB is right button state (0=pressed, 1=released) - X7-X0 movement in X direction since last packet in signed byte - format (-128..+127), positive direction right - Y7-Y0 movement in Y direction since last packet in signed byte - format (-128..+127), positive direction up - X7'-X0' movement in X direction since sending of X7-X0 packet in signed byte - format (-128..+127), positive direction right - Y7'-Y0' movement in Y direction since sending of Y7-Y0 in signed byte - format (-128..+127), positive direction up - - The last two bytes in the packet (bytes 4 and 5) contains information - about movement data changes which have occurred after data bytes 2 and 3 have been sent. */ - -void mouse_systems_mouse_device::mouse_trans(int dx, int dy, int nb, int mbc) -{ - dy =-dy; - - do - { - int ddx = (dx < -128) ? -128 : (dx > 127) ? 127 : dx; - int ddy = (dy < -128) ? -128 : (dy > 127) ? 127 : dy; - - /* KT - changed to use a function */ - queue_data(0x080 | ((((nb & 0x04) >> 1) + ((nb & 0x02) << 1) + (nb & 0x01)) ^ 0x07)); - queue_data(ddx); - queue_data(ddy); - /* for now... */ - queue_data(0); - queue_data(0); - dx -= ddx; - dy -= ddy; - } while( dx || dy ); -} - -/************************************************************************** - * Check for mouse control line changes and (de-)install timer - **************************************************************************/ - -void serial_mouse_device::set_mouse_enable(bool state) -{ - if(state && !m_enabled) - { - m_timer->adjust(attotime::zero, 0, attotime::from_hz(240)); - } - else if(!state && m_enabled) - { - m_timer->adjust(attotime::never); - m_head = m_tail = 0; - } - m_enabled = state; - -} - - -WRITE_LINE_MEMBER(serial_mouse_device::input_dtr) -{ - m_dtr = state; - check_state(); -} - -WRITE_LINE_MEMBER(serial_mouse_device::input_rts) -{ - m_rts = state; - check_state(); -} - -WRITE_LINE_MEMBER(microsoft_mouse_device::input_rts) -{ - if (!m_dtr && m_rts && !state) - { - reset_mouse(); - /* Identify as Microsoft 3 Button Mouse */ - queue_data('M'); - queue_data('3'); - } - - serial_mouse_device::input_rts(state); -} - - - -/************************************************************************** - * Mouse INPUT_PORT declarations - **************************************************************************/ - -static INPUT_PORTS_START( ser_mouse ) - PORT_START( "ser_mouse_btn" ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_NAME("Mouse Left Button") PORT_CODE(MOUSECODE_BUTTON1) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_NAME("Mouse Middle Button") PORT_CODE(MOUSECODE_BUTTON3) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON3) PORT_NAME("Mouse Right Button") PORT_CODE(MOUSECODE_BUTTON2) - - PORT_START( "ser_mouse_x" ) /* Mouse - X AXIS */ - PORT_BIT( 0xfff, 0x00, IPT_MOUSE_X) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_PLAYER(1) - - PORT_START( "ser_mouse_y" ) /* Mouse - Y AXIS */ - PORT_BIT( 0xfff, 0x00, IPT_MOUSE_Y) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_PLAYER(1) -INPUT_PORTS_END - -ioport_constructor serial_mouse_device::device_input_ports() const -{ - return INPUT_PORTS_NAME(ser_mouse); -} diff --git a/src/devices/bus/rs232/ser_mouse.h b/src/devices/bus/rs232/ser_mouse.h deleted file mode 100644 index ff4e7a81995..00000000000 --- a/src/devices/bus/rs232/ser_mouse.h +++ /dev/null @@ -1,84 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:smf -/***************************************************************************** - * - * machine/ser_mouse.h - * - ****************************************************************************/ - -#ifndef MAME_BUS_RS232_SER_MOUSE_H -#define MAME_BUS_RS232_SER_MOUSE_H - -#include "rs232.h" -#include "diserial.h" - -class serial_mouse_device : - public device_t, - public device_rs232_port_interface, - public device_serial_interface -{ -public: - virtual ioport_constructor device_input_ports() const override; - -protected: - serial_mouse_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - - virtual void device_start() override; - virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; - - virtual void mouse_trans(int dx, int dy, int nb, int mbc) = 0; - virtual void set_frame() = 0; - void set_mouse_enable(bool state); - void queue_data(uint8_t data) {m_queue[m_head] = data; ++m_head %= 256;} - uint8_t unqueue_data() {uint8_t ret = m_queue[m_tail]; ++m_tail %= 256; return ret;} - virtual void tra_complete() override; - virtual void tra_callback() override; - void reset_mouse(); - - virtual WRITE_LINE_MEMBER(input_dtr) override; - virtual WRITE_LINE_MEMBER(input_rts) override; - - int m_dtr; - int m_rts; - -private: - void check_state() { set_mouse_enable(!m_dtr && !m_rts); } - - uint8_t m_queue[256]; - uint8_t m_head, m_tail, m_mb; - - emu_timer *m_timer; - bool m_enabled; - - required_ioport m_x; - required_ioport m_y; - required_ioport m_btn; -}; - -class microsoft_mouse_device : public serial_mouse_device -{ -public: - microsoft_mouse_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - -protected: - virtual WRITE_LINE_MEMBER(input_rts) override; - - virtual void set_frame() override { set_data_frame(1, 7, PARITY_NONE, STOP_BITS_2); } - virtual void mouse_trans(int dx, int dy, int nb, int mbc) override; -}; - -DECLARE_DEVICE_TYPE(MSFT_SERIAL_MOUSE, microsoft_mouse_device) - -class mouse_systems_mouse_device : public serial_mouse_device -{ -public: - mouse_systems_mouse_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - -protected: - virtual void set_frame() override { set_data_frame(1, 8, PARITY_NONE, STOP_BITS_2); } - virtual void mouse_trans(int dx, int dy, int nb, int mbc) override; -}; - -DECLARE_DEVICE_TYPE(MSYSTEM_SERIAL_MOUSE, mouse_systems_mouse_device) - -#endif // MAME_BUS_RS232_SER_MOUSE_H diff --git a/src/devices/bus/s100/wunderbus.cpp b/src/devices/bus/s100/wunderbus.cpp index c05d56197c3..cb483a7a381 100644 --- a/src/devices/bus/s100/wunderbus.cpp +++ b/src/devices/bus/s100/wunderbus.cpp @@ -132,7 +132,8 @@ MACHINE_CONFIG_START(s100_wunderbus_device::device_add_mconfig) MCFG_RS232_RI_HANDLER(WRITELINE(m_ace3, ins8250_uart_device, ri_w)) MCFG_RS232_CTS_HANDLER(WRITELINE(m_ace3, ins8250_uart_device, cts_w)) - MCFG_UPD1990A_ADD(UPD1990C_TAG, XTAL(32'768), NOOP, WRITELINE(DEVICE_SELF, s100_wunderbus_device, rtc_tp_w)) + UPD1990A(config, m_rtc); + m_rtc->tp_callback().set(FUNC(s100_wunderbus_device::rtc_tp_w)); MACHINE_CONFIG_END @@ -377,7 +378,7 @@ uint8_t s100_wunderbus_device::s100_sinp_r(address_space &space, offs_t offset) case 4: // 8259 0 register case 5: // 8259 1 register - data = m_pic->read(space, offset & 0x01); + data = m_pic->read(offset & 0x01); break; case 6: // not used @@ -486,7 +487,7 @@ void s100_wunderbus_device::s100_sout_w(address_space &space, offs_t offset, uin case 4: // 8259 0 register case 5: // 8259 1 register - m_pic->write(space, offset & 0x01, data); + m_pic->write(offset & 0x01, data); break; case 6: // Par. port cntrl. diff --git a/src/devices/bus/sbus/artecon.cpp b/src/devices/bus/sbus/artecon.cpp index 9bf24924c34..f306494035b 100644 --- a/src/devices/bus/sbus/artecon.cpp +++ b/src/devices/bus/sbus/artecon.cpp @@ -4,12 +4,12 @@ Artecon SB-300P 3-serial 1-parallel SBus card skeleton - The Artecon SB series of SBus cards uses up to 4 Cirrus Logic - CL-CD1400 Four-Channel Serial/Parallel Communications Engines. + The Artecon SB series of SBus cards uses up to 4 Cirrus Logic + CL-CD1400 Four-Channel Serial/Parallel Communications Engines. - Each chip supports up to four full-duplex serial channels, or three - full-duplex serial channels and one high-speed bidirectional parallel - channel. + Each chip supports up to four full-duplex serial channels, or three + full-duplex serial channels and one high-speed bidirectional parallel + channel. ***************************************************************************/ diff --git a/src/devices/bus/sbus/bwtwo.cpp b/src/devices/bus/sbus/bwtwo.cpp index a5e78323aab..65f40df715c 100644 --- a/src/devices/bus/sbus/bwtwo.cpp +++ b/src/devices/bus/sbus/bwtwo.cpp @@ -47,14 +47,22 @@ sbus_bwtwo_device::sbus_bwtwo_device(const machine_config &mconfig, const char * : device_t(mconfig, SBUS_BWTWO, tag, owner, clock) , device_sbus_card_interface(mconfig, *this) , m_rom(*this, "prom") - //, m_vram(*this, "vram") , m_screen(*this, "screen") { } void sbus_bwtwo_device::device_start() { - m_vram = std::make_unique<uint32_t[]>(0x100000/4); + m_vram = std::make_unique<uint8_t[]>(0x100000); + save_pointer(NAME(m_vram), 0x100000); + + for (int i = 0; i < 0x100; i++) + { + for (int bit = 7; bit >= 0; bit--) + { + m_mono_lut[i][7 - bit] = BIT(i, bit) ? 0 : ~0; + } + } } void sbus_bwtwo_device::install_device() @@ -64,20 +72,16 @@ void sbus_bwtwo_device::install_device() uint32_t sbus_bwtwo_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - static const uint32_t palette[2] = { 0xffffff, 0 }; - uint8_t *vram = (uint8_t *)&m_vram[0]; + uint8_t *line = &m_vram[0]; for (int y = 0; y < 900; y++) { uint32_t *scanline = &bitmap.pix32(y); for (int x = 0; x < 1152/8; x++) { - const uint8_t pixels = vram[(y * (1152/8)) + (BYTE4_XOR_BE(x))]; - - for (int bit = 7; bit >= 0; bit--) - { - *scanline++ = palette[BIT(pixels, bit)]; - } + memcpy(scanline, m_mono_lut[*line], sizeof(uint32_t) * 8); + line++; + scanline += 8; } } @@ -95,17 +99,17 @@ WRITE8_MEMBER(sbus_bwtwo_device::regs_w) logerror("%s: regs_w (unimplemented): %08x = %02x\n", machine().describe_context(), 0x400000 + offset, data); } -READ32_MEMBER(sbus_bwtwo_device::vram_r) +READ32_MEMBER(sbus_bwtwo_device::rom_r) { - return m_vram[offset]; + return ((uint32_t*)m_rom->base())[offset]; } -READ32_MEMBER(sbus_bwtwo_device::rom_r) +READ8_MEMBER(sbus_bwtwo_device::vram_r) { - return ((uint32_t*)m_rom->base())[offset]; + return m_vram[offset]; } -WRITE32_MEMBER(sbus_bwtwo_device::vram_w) +WRITE8_MEMBER(sbus_bwtwo_device::vram_w) { - COMBINE_DATA(&m_vram[offset]); + m_vram[offset] = data; } diff --git a/src/devices/bus/sbus/bwtwo.h b/src/devices/bus/sbus/bwtwo.h index 0d4a96f2f39..fb3408db7d4 100644 --- a/src/devices/bus/sbus/bwtwo.h +++ b/src/devices/bus/sbus/bwtwo.h @@ -32,8 +32,8 @@ protected: DECLARE_READ8_MEMBER(regs_r); DECLARE_WRITE8_MEMBER(regs_w); DECLARE_READ32_MEMBER(rom_r); - DECLARE_READ32_MEMBER(vram_r); - DECLARE_WRITE32_MEMBER(vram_w); + DECLARE_READ8_MEMBER(vram_r); + DECLARE_WRITE8_MEMBER(vram_w); private: uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); @@ -41,8 +41,9 @@ private: void mem_map(address_map &map) override; required_memory_region m_rom; - std::unique_ptr<uint32_t[]> m_vram; + std::unique_ptr<uint8_t[]> m_vram; required_device<screen_device> m_screen; + uint32_t m_mono_lut[256][8]; }; diff --git a/src/devices/bus/sbus/cgsix.cpp b/src/devices/bus/sbus/cgsix.cpp index 714d68b85f4..beebe3dadd9 100644 --- a/src/devices/bus/sbus/cgsix.cpp +++ b/src/devices/bus/sbus/cgsix.cpp @@ -36,6 +36,128 @@ sbus_cgsix_device::sbus_cgsix_device(const machine_config &mconfig, device_type void sbus_cgsix_device::device_start() { m_vram = std::make_unique<uint32_t[]>(m_vram_size / 4); + + save_pointer(NAME(m_vram), m_vram_size / 4); + save_item(NAME(m_vram_size)); + + save_item(NAME(m_fbc.m_clip_check)); + save_item(NAME(m_fbc.m_status)); + save_item(NAME(m_fbc.m_draw_status)); + save_item(NAME(m_fbc.m_blit_status)); + save_item(NAME(m_fbc.m_font)); + + save_item(NAME(m_fbc.m_x0)); + save_item(NAME(m_fbc.m_y0)); + save_item(NAME(m_fbc.m_z0)); + save_item(NAME(m_fbc.m_color0)); + save_item(NAME(m_fbc.m_x1)); + save_item(NAME(m_fbc.m_y1)); + save_item(NAME(m_fbc.m_z1)); + save_item(NAME(m_fbc.m_color1)); + save_item(NAME(m_fbc.m_x2)); + save_item(NAME(m_fbc.m_y2)); + save_item(NAME(m_fbc.m_z2)); + save_item(NAME(m_fbc.m_color2)); + save_item(NAME(m_fbc.m_x3)); + save_item(NAME(m_fbc.m_y3)); + save_item(NAME(m_fbc.m_z3)); + save_item(NAME(m_fbc.m_color3)); + + save_item(NAME(m_fbc.m_raster_offx)); + save_item(NAME(m_fbc.m_raster_offy)); + + save_item(NAME(m_fbc.m_autoincx)); + save_item(NAME(m_fbc.m_autoincy)); + + save_item(NAME(m_fbc.m_clip_minx)); + save_item(NAME(m_fbc.m_clip_miny)); + + save_item(NAME(m_fbc.m_clip_maxx)); + save_item(NAME(m_fbc.m_clip_maxy)); + + save_item(NAME(m_fbc.m_fcolor)); + save_item(NAME(m_fbc.m_bcolor)); + + save_item(NAME(m_fbc.m_rasterop)); + + save_item(NAME(m_fbc.m_plane_mask)); + save_item(NAME(m_fbc.m_pixel_mask)); + + save_item(NAME(m_fbc.m_patt_align)); + save_item(NAME(m_fbc.m_pattern)); + + save_item(NAME(m_fbc.m_ipoint_absx)); + save_item(NAME(m_fbc.m_ipoint_absy)); + save_item(NAME(m_fbc.m_ipoint_absz)); + save_item(NAME(m_fbc.m_ipoint_relx)); + save_item(NAME(m_fbc.m_ipoint_rely)); + save_item(NAME(m_fbc.m_ipoint_relz)); + save_item(NAME(m_fbc.m_ipoint_r)); + save_item(NAME(m_fbc.m_ipoint_g)); + save_item(NAME(m_fbc.m_ipoint_b)); + save_item(NAME(m_fbc.m_ipoint_a)); + + save_item(NAME(m_fbc.m_iline_absx)); + save_item(NAME(m_fbc.m_iline_absy)); + save_item(NAME(m_fbc.m_iline_absz)); + save_item(NAME(m_fbc.m_iline_relx)); + save_item(NAME(m_fbc.m_iline_rely)); + save_item(NAME(m_fbc.m_iline_relz)); + save_item(NAME(m_fbc.m_iline_r)); + save_item(NAME(m_fbc.m_iline_g)); + save_item(NAME(m_fbc.m_iline_b)); + save_item(NAME(m_fbc.m_iline_a)); + + save_item(NAME(m_fbc.m_itri_absx)); + save_item(NAME(m_fbc.m_itri_absy)); + save_item(NAME(m_fbc.m_itri_absz)); + save_item(NAME(m_fbc.m_itri_relx)); + save_item(NAME(m_fbc.m_itri_rely)); + save_item(NAME(m_fbc.m_itri_relz)); + save_item(NAME(m_fbc.m_itri_r)); + save_item(NAME(m_fbc.m_itri_g)); + save_item(NAME(m_fbc.m_itri_b)); + save_item(NAME(m_fbc.m_itri_a)); + + save_item(NAME(m_fbc.m_iquad_absx)); + save_item(NAME(m_fbc.m_iquad_absy)); + save_item(NAME(m_fbc.m_iquad_absz)); + save_item(NAME(m_fbc.m_iquad_relx)); + save_item(NAME(m_fbc.m_iquad_rely)); + save_item(NAME(m_fbc.m_iquad_relz)); + save_item(NAME(m_fbc.m_iquad_r)); + save_item(NAME(m_fbc.m_iquad_g)); + save_item(NAME(m_fbc.m_iquad_b)); + save_item(NAME(m_fbc.m_iquad_a)); + + save_item(NAME(m_fbc.m_irect_absx)); + save_item(NAME(m_fbc.m_irect_absy)); + save_item(NAME(m_fbc.m_irect_absz)); + save_item(NAME(m_fbc.m_irect_relx)); + save_item(NAME(m_fbc.m_irect_rely)); + save_item(NAME(m_fbc.m_irect_relz)); + save_item(NAME(m_fbc.m_irect_r)); + save_item(NAME(m_fbc.m_irect_g)); + save_item(NAME(m_fbc.m_irect_b)); + save_item(NAME(m_fbc.m_irect_a)); + + save_item(NAME(m_fbc.m_vertex_count)); + + for (int i = 0; i < 0x1000; i++) + { + save_item(NAME(m_fbc.m_prim_buf[i].m_absx), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_absy), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_absz), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_relx), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_rely), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_relz), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_r), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_g), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_b), i); + save_item(NAME(m_fbc.m_prim_buf[i].m_a), i); + } + + save_item(NAME(m_fbc.m_curr_prim_type)); } void sbus_cgsix_device::device_reset() @@ -106,29 +228,58 @@ uint8_t sbus_cgsix_device::perform_rasterop(uint8_t src, uint8_t dst) uint8_t value = 0; switch (rop) { - case ROP_CLR: break; - case ROP_SRC_NOR_DST: value = ~(s | d); break; - case ROP_NSRC_AND_DST: value = ~s & d; break; - case ROP_NOT_SRC: value = ~s; break; - case ROP_SRC_AND_NDST: value = s & ~d; break; - case ROP_NOT_DST: value = ~d; break; - case ROP_SRC_XOR_DST: value = s ^ d; break; - case ROP_SRC_NAND_DST: value = ~(s & d); break; - case ROP_SRC_AND_DST: value = s & d; break; - case ROP_SRC_XNOR_DST: value = ~(s ^ d); break; - case ROP_DST: value = d; break; - case ROP_NSRC_OR_DST: value = ~s | d; break; - case ROP_SRC: value = s; break; - case ROP_SRC_OR_NDST: value = s | ~d; break; - case ROP_SRC_OR_DST: value = s | d; break; - case ROP_SET: value = 0xff; break; - default: value = 0; break; + case ROP_CLR: break; + case ROP_SRC_NOR_DST: value = ~(s | d); break; + case ROP_NSRC_AND_DST: value = ~s & d; break; + case ROP_NOT_SRC: value = ~s; break; + case ROP_SRC_AND_NDST: value = s & ~d; break; + case ROP_NOT_DST: value = ~d; break; + case ROP_SRC_XOR_DST: value = s ^ d; break; + case ROP_SRC_NAND_DST: value = ~(s & d); break; + case ROP_SRC_AND_DST: value = s & d; break; + case ROP_SRC_XNOR_DST: value = ~(s ^ d); break; + case ROP_DST: value = d; break; + case ROP_NSRC_OR_DST: value = ~s | d; break; + case ROP_SRC: value = s; break; + case ROP_SRC_OR_NDST: value = s | ~d; break; + case ROP_SRC_OR_DST: value = s | d; break; + case ROP_SET: value = 0xff; break; + default: value = 0; break; } result |= value & mask; } return result; } +void sbus_cgsix_device::handle_font_poke() +{ + if (fbc_misc_draw() != FBC_MISC_DRAW_RENDER) + { + logerror("handle_font_poke: Unsupported font draw mode %d, abandoning draw\n", fbc_misc_draw()); + return; + } + + const uint32_t daddr = m_fbc.m_y0 * 1152; + uint8_t *vram = (uint8_t*)&m_vram[0]; + vram += daddr; + const int width = (int)m_fbc.m_x1 - (int)m_fbc.m_x0; + const uint32_t font = m_fbc.m_font; + uint32_t x = m_fbc.m_x0; + logerror("Width: %d, bits %d to %d\n", width, 31, 31 - width); + for (int bit = 31; bit >= (31 - width); bit--) + { + const uint8_t src = BIT(font, bit) ? 0xff : 0x00; + const uint8_t dst = vram[BYTE4_XOR_BE(x)]; + vram[BYTE4_XOR_BE(x)]= perform_rasterop(src, dst); + x++; + if (x >= 1152) break; + } + m_fbc.m_x0 += m_fbc.m_autoincx; + m_fbc.m_x1 += m_fbc.m_autoincx; + m_fbc.m_y0 += m_fbc.m_autoincy; + m_fbc.m_y1 += m_fbc.m_autoincy; +} + // NOTE: This is basically untested, and probably full of bugs! void sbus_cgsix_device::handle_draw_command() { @@ -158,15 +309,15 @@ void sbus_cgsix_device::handle_draw_command() vertex_t &v0 = m_fbc.m_prim_buf[vindex++]; vertex_t &v1 = m_fbc.m_prim_buf[vindex++]; - for (uint32_t y = v0.m_absy; y < v1.m_absy; y++) + for (uint32_t y = v0.m_absy; y <= v1.m_absy; y++) { - const uint32_t line = y * (m_fbc.m_clip_maxx + 1); - for (uint32_t x = v0.m_absx; x < v1.m_absx; x++) + uint8_t *line = &vram[y * 1152]; + for (uint32_t x = v0.m_absx; x <= v1.m_absx; x++) { - const uint8_t src = vram[line + x]; + const uint32_t native_x = BYTE4_XOR_BE(x); + const uint8_t src = line[native_x]; const uint8_t dst = src; - const uint8_t result = perform_rasterop(src, dst); - vram[line + x] = result; + line[native_x] = perform_rasterop(src, dst); } } } @@ -177,7 +328,7 @@ void sbus_cgsix_device::handle_draw_command() void sbus_cgsix_device::handle_blit_command() { uint8_t *vram = (uint8_t*)&m_vram[0]; - const uint32_t fbw = (m_fbc.m_clip_maxx + 1); + const uint32_t fbw = 1152;//(m_fbc.m_clip_maxx + 1); logerror("Copying from %d,%d-%d,%d to %d,%d-%d,%d, width %d, height %d\n" , m_fbc.m_x0, m_fbc.m_y0 , m_fbc.m_x1, m_fbc.m_y1 @@ -188,17 +339,18 @@ void sbus_cgsix_device::handle_blit_command() uint32_t dsty = m_fbc.m_y2; for (; srcy < m_fbc.m_y1; srcy++, dsty++) { - uint32_t srcy_index = srcy * fbw; - uint32_t dsty_index = dsty * fbw; + uint8_t *srcline = &vram[srcy * fbw]; + uint8_t *dstline = &vram[dsty * fbw]; uint32_t srcx = m_fbc.m_x0; uint32_t dstx = m_fbc.m_x2; for (; srcx < m_fbc.m_x1; srcx++, dstx++) { - const uint8_t src = vram[srcy_index + srcx]; - const uint8_t dst = vram[dsty_index + dstx]; + const uint32_t native_dstx = BYTE4_XOR_BE(dstx); + const uint8_t src = srcline[BYTE4_XOR_BE(srcx)]; + const uint8_t dst = dstline[native_dstx]; const uint8_t result = perform_rasterop(src, dst); //logerror("vram[%d] = %02x\n", result); - vram[dsty_index + dstx] = result; + dstline[native_dstx] = result; } } } @@ -512,25 +664,25 @@ READ32_MEMBER(sbus_cgsix_device::fbc_r) WRITE32_MEMBER(sbus_cgsix_device::fbc_w) { - static const char* misc_bdisp_name[4] = { "IGNORE", "0", "1", "ILLEGAL" }; - static const char* misc_bread_name[4] = { "IGNORE", "0", "1", "ILLEGAL" }; - static const char* misc_bwrite1_name[4] = { "IGNORE", "ENABLE", "DISABLE", "ILLEGAL" }; - static const char* misc_bwrite0_name[4] = { "IGNORE", "ENABLE", "DISABLE", "ILLEGAL" }; - static const char* misc_draw_name[4] = { "IGNORE", "RENDER", "PICK", "ILLEGAL" }; - static const char* misc_data_name[4] = { "IGNORE", "COLOR8", "COLOR1", "HRMONO" }; - static const char* misc_blit_name[4] = { "IGNORE", "NOSRC", "SRC", "ILLEGAL" }; - static const char* rasterop_rop_name[16] = + static char const *const misc_bdisp_name[4] = { "IGNORE", "0", "1", "ILLEGAL" }; + static char const *const misc_bread_name[4] = { "IGNORE", "0", "1", "ILLEGAL" }; + static char const *const misc_bwrite1_name[4] = { "IGNORE", "ENABLE", "DISABLE", "ILLEGAL" }; + static char const *const misc_bwrite0_name[4] = { "IGNORE", "ENABLE", "DISABLE", "ILLEGAL" }; + static char const *const misc_draw_name[4] = { "IGNORE", "RENDER", "PICK", "ILLEGAL" }; + static char const *const misc_data_name[4] = { "IGNORE", "COLOR8", "COLOR1", "HRMONO" }; + static char const *const misc_blit_name[4] = { "IGNORE", "NOSRC", "SRC", "ILLEGAL" }; + static char const *const rasterop_rop_name[16] = { "CLR", "SRC_NOR_DST", "NSRC_AND_DST", "NOT_SRC", "SRC_AND_NDST", "NOT_DST", "SRC_XOR_DST", "SRC_NAND_DST", "SRC_AND_DST", "SRC_XNOR_DST", "DST", "NSRC_OR_DST", "SRC", "SRC_OR_NDST", "SRC_OR_DST", "SET" }; - static const char* rasterop_plot_name[2] = { "PLOT", "UNPLOT" }; - static const char* rasterop_rast_name[2] = { "BOOL", "LINEAR" }; - static const char* rasterop_attr_name[4] = { "IGNORE", "UNSUPP", "SUPP", "ILLEGAL" }; - static const char* rasterop_polyg_name[4] = { "IGNORE", "OVERLAP", "NONOVERLAP", "ILLEGAL" }; - static const char* rasterop_pattern_name[4] = { "IGNORE", "ZEROES", "ONES", "MASK" }; - static const char* rasterop_pixel_name[4] = { "IGNORE", "ZEROES", "ONES", "MASK" }; - static const char* rasterop_plane_name[4] = { "IGNORE", "ZEROES", "ONES", "MASK" }; + static char const *const rasterop_plot_name[2] = { "PLOT", "UNPLOT" }; + static char const *const rasterop_rast_name[2] = { "BOOL", "LINEAR" }; + static char const *const rasterop_attr_name[4] = { "IGNORE", "UNSUPP", "SUPP", "ILLEGAL" }; + static char const *const rasterop_polyg_name[4] = { "IGNORE", "OVERLAP", "NONOVERLAP", "ILLEGAL" }; + static char const *const rasterop_pattern_name[4] = { "IGNORE", "ZEROES", "ONES", "MASK" }; + static char const *const rasterop_pixel_name[4] = { "IGNORE", "ZEROES", "ONES", "MASK" }; + static char const *const rasterop_plane_name[4] = { "IGNORE", "ZEROES", "ONES", "MASK" }; switch (offset) { @@ -565,9 +717,12 @@ WRITE32_MEMBER(sbus_cgsix_device::fbc_w) //COMBINE_DATA(&m_fbc.m_blit_status); break; case FBC_FONT: + { logerror("fbc_w: FONT = %08x & %08x\n", data, mem_mask); COMBINE_DATA(&m_fbc.m_font); + handle_font_poke(); break; + } case FBC_X0: logerror("fbc_w: X0 = %08x & %08x\n", data, mem_mask); diff --git a/src/devices/bus/sbus/cgsix.h b/src/devices/bus/sbus/cgsix.h index 681896c2744..4e3302799c1 100644 --- a/src/devices/bus/sbus/cgsix.h +++ b/src/devices/bus/sbus/cgsix.h @@ -45,120 +45,121 @@ protected: protected: uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); uint8_t perform_rasterop(uint8_t src, uint8_t dst); - void handle_blit_command(); + void handle_font_poke(); void handle_draw_command(); + void handle_blit_command(); void base_map(address_map &map); enum { - ROP_CLR = 0x00, - ROP_SRC_NOR_DST = 0x01, - ROP_NSRC_AND_DST = 0x02, - ROP_NOT_SRC = 0x03, - ROP_SRC_AND_NDST = 0x04, - ROP_NOT_DST = 0x05, - ROP_SRC_XOR_DST = 0x06, - ROP_SRC_NAND_DST = 0x07, - ROP_SRC_AND_DST = 0x08, - ROP_SRC_XNOR_DST = 0x09, - ROP_DST = 0x0a, - ROP_NSRC_OR_DST = 0x0b, - ROP_SRC = 0x0c, - ROP_SRC_OR_NDST = 0x0d, - ROP_SRC_OR_DST = 0x0e, - ROP_SET = 0x0f + ROP_CLR = 0x00, + ROP_SRC_NOR_DST = 0x01, + ROP_NSRC_AND_DST = 0x02, + ROP_NOT_SRC = 0x03, + ROP_SRC_AND_NDST = 0x04, + ROP_NOT_DST = 0x05, + ROP_SRC_XOR_DST = 0x06, + ROP_SRC_NAND_DST = 0x07, + ROP_SRC_AND_DST = 0x08, + ROP_SRC_XNOR_DST = 0x09, + ROP_DST = 0x0a, + ROP_NSRC_OR_DST = 0x0b, + ROP_SRC = 0x0c, + ROP_SRC_OR_NDST = 0x0d, + ROP_SRC_OR_DST = 0x0e, + ROP_SET = 0x0f }; enum { - FBC_MISC_INDEX_SHIFT = 4, - FBC_MISC_INDEX_MOD_SHIFT = 6, - FBC_MISC_BDISP_SHIFT = 7, - FBC_MISC_BREAD_SHIFT = 9, - FBC_MISC_BWRITE1_SHIFT = 11, - FBC_MISC_BWRITE0_SHIFT = 13, - FBC_MISC_DRAW_SHIFT = 15, - FBC_MISC_DATA_SHIFT = 17, - FBC_MISC_VBLANK_SHIFT = 19, - FBC_MISC_BLIT_SHIFT = 20 + FBC_MISC_INDEX_SHIFT = 4, + FBC_MISC_INDEX_MOD_SHIFT = 6, + FBC_MISC_BDISP_SHIFT = 7, + FBC_MISC_BREAD_SHIFT = 9, + FBC_MISC_BWRITE1_SHIFT = 11, + FBC_MISC_BWRITE0_SHIFT = 13, + FBC_MISC_DRAW_SHIFT = 15, + FBC_MISC_DATA_SHIFT = 17, + FBC_MISC_VBLANK_SHIFT = 19, + FBC_MISC_BLIT_SHIFT = 20 }; enum { - FBC_MISC_INDEX_MASK = 0x3, - FBC_MISC_INDEX_MOD_MASK = 0x1, - FBC_MISC_BDISP_MASK = 0x3, - FBC_MISC_BREAD_MASK = 0x3, - FBC_MISC_BWRITE1_MASK = 0x3, - FBC_MISC_BWRITE0_MASK = 0x3, - FBC_MISC_DRAW_MASK = 0x3, - FBC_MISC_DATA_MASK = 0x3, - FBC_MISC_VBLANK_MASK = 0x1, - FBC_MISC_BLIT_MASK = 0x3 + FBC_MISC_INDEX_MASK = 0x3, + FBC_MISC_INDEX_MOD_MASK = 0x1, + FBC_MISC_BDISP_MASK = 0x3, + FBC_MISC_BREAD_MASK = 0x3, + FBC_MISC_BWRITE1_MASK = 0x3, + FBC_MISC_BWRITE0_MASK = 0x3, + FBC_MISC_DRAW_MASK = 0x3, + FBC_MISC_DATA_MASK = 0x3, + FBC_MISC_VBLANK_MASK = 0x1, + FBC_MISC_BLIT_MASK = 0x3 }; enum { - FBC_MISC_BDISP_IGNORE = 0, - FBC_MISC_BDISP_0 = 1, - FBC_MISC_BDISP_1 = 2, - FBC_MISC_BDISP_ILLEGAL = 3, - - FBC_MISC_BREAD_IGNORE = 0, - FBC_MISC_BREAD_0 = 1, - FBC_MISC_BREAD_1 = 2, - FBC_MISC_BREAD_ILLEGAL = 3, - - FBC_MISC_BWRITE1_IGNORE = 0, - FBC_MISC_BWRITE1_ENABLE = 1, - FBC_MISC_BWRITE1_DISABLE = 2, - FBC_MISC_BWRITE1_ILLEGAL = 3, - - FBC_MISC_BWRITE0_IGNORE = 0, - FBC_MISC_BWRITE0_ENABLE = 1, - FBC_MISC_BWRITE0_DISABLE = 2, - FBC_MISC_BWRITE0_ILLEGAL = 3, - - FBC_MISC_DRAW_IGNORE = 0, - FBC_MISC_DRAW_RENDER = 1, - FBC_MISC_DRAW_PICK = 2, - FBC_MISC_DRAW_ILLEGAL = 3, - - FBC_MISC_DATA_IGNORE = 0, - FBC_MISC_DATA_COLOR8 = 1, - FBC_MISC_DATA_COLOR1 = 2, - FBC_MISC_DATA_HRMONO = 3, - - FBC_MISC_BLIT_IGNORE = 0, - FBC_MISC_BLIT_NOSRC = 1, - FBC_MISC_BLIT_SRC = 2, - FBC_MISC_BLIT_ILLEGAL = 3 + FBC_MISC_BDISP_IGNORE = 0, + FBC_MISC_BDISP_0 = 1, + FBC_MISC_BDISP_1 = 2, + FBC_MISC_BDISP_ILLEGAL = 3, + + FBC_MISC_BREAD_IGNORE = 0, + FBC_MISC_BREAD_0 = 1, + FBC_MISC_BREAD_1 = 2, + FBC_MISC_BREAD_ILLEGAL = 3, + + FBC_MISC_BWRITE1_IGNORE = 0, + FBC_MISC_BWRITE1_ENABLE = 1, + FBC_MISC_BWRITE1_DISABLE = 2, + FBC_MISC_BWRITE1_ILLEGAL = 3, + + FBC_MISC_BWRITE0_IGNORE = 0, + FBC_MISC_BWRITE0_ENABLE = 1, + FBC_MISC_BWRITE0_DISABLE = 2, + FBC_MISC_BWRITE0_ILLEGAL = 3, + + FBC_MISC_DRAW_IGNORE = 0, + FBC_MISC_DRAW_RENDER = 1, + FBC_MISC_DRAW_PICK = 2, + FBC_MISC_DRAW_ILLEGAL = 3, + + FBC_MISC_DATA_IGNORE = 0, + FBC_MISC_DATA_COLOR8 = 1, + FBC_MISC_DATA_COLOR1 = 2, + FBC_MISC_DATA_HRMONO = 3, + + FBC_MISC_BLIT_IGNORE = 0, + FBC_MISC_BLIT_NOSRC = 1, + FBC_MISC_BLIT_SRC = 2, + FBC_MISC_BLIT_ILLEGAL = 3 }; - inline uint32_t fbc_misc_index() { return (m_fbc.m_misc >> FBC_MISC_INDEX_SHIFT) & FBC_MISC_INDEX_MASK; } - inline uint32_t fbc_misc_index_mod() { return (m_fbc.m_misc >> FBC_MISC_INDEX_MOD_SHIFT) & FBC_MISC_INDEX_MOD_MASK; } - inline uint32_t fbc_misc_bdisp() { return (m_fbc.m_misc >> FBC_MISC_BDISP_SHIFT) & FBC_MISC_BDISP_MASK; } - inline uint32_t fbc_misc_bread() { return (m_fbc.m_misc >> FBC_MISC_BREAD_SHIFT) & FBC_MISC_BREAD_MASK; } - inline uint32_t fbc_misc_bwrite1() { return (m_fbc.m_misc >> FBC_MISC_BWRITE1_SHIFT) & FBC_MISC_BWRITE1_MASK; } - inline uint32_t fbc_misc_bwrite0() { return (m_fbc.m_misc >> FBC_MISC_BWRITE0_SHIFT) & FBC_MISC_BWRITE0_MASK; } - inline uint32_t fbc_misc_draw() { return (m_fbc.m_misc >> FBC_MISC_DRAW_SHIFT) & FBC_MISC_DRAW_MASK; } - inline uint32_t fbc_misc_data() { return (m_fbc.m_misc >> FBC_MISC_DATA_SHIFT) & FBC_MISC_DATA_MASK; } - inline uint32_t fbc_misc_blit() { return (m_fbc.m_misc >> FBC_MISC_BLIT_SHIFT) & FBC_MISC_BLIT_MASK; } + inline uint32_t fbc_misc_index() { return (m_fbc.m_misc >> FBC_MISC_INDEX_SHIFT) & FBC_MISC_INDEX_MASK; } + inline uint32_t fbc_misc_index_mod() { return (m_fbc.m_misc >> FBC_MISC_INDEX_MOD_SHIFT) & FBC_MISC_INDEX_MOD_MASK; } + inline uint32_t fbc_misc_bdisp() { return (m_fbc.m_misc >> FBC_MISC_BDISP_SHIFT) & FBC_MISC_BDISP_MASK; } + inline uint32_t fbc_misc_bread() { return (m_fbc.m_misc >> FBC_MISC_BREAD_SHIFT) & FBC_MISC_BREAD_MASK; } + inline uint32_t fbc_misc_bwrite1() { return (m_fbc.m_misc >> FBC_MISC_BWRITE1_SHIFT) & FBC_MISC_BWRITE1_MASK; } + inline uint32_t fbc_misc_bwrite0() { return (m_fbc.m_misc >> FBC_MISC_BWRITE0_SHIFT) & FBC_MISC_BWRITE0_MASK; } + inline uint32_t fbc_misc_draw() { return (m_fbc.m_misc >> FBC_MISC_DRAW_SHIFT) & FBC_MISC_DRAW_MASK; } + inline uint32_t fbc_misc_data() { return (m_fbc.m_misc >> FBC_MISC_DATA_SHIFT) & FBC_MISC_DATA_MASK; } + inline uint32_t fbc_misc_blit() { return (m_fbc.m_misc >> FBC_MISC_BLIT_SHIFT) & FBC_MISC_BLIT_MASK; } enum { - FBC_RASTEROP_ROP00_SHIFT = 0, - FBC_RASTEROP_ROP01_SHIFT = 4, - FBC_RASTEROP_ROP10_SHIFT = 8, - FBC_RASTEROP_ROP11_SHIFT = 12, - FBC_RASTEROP_PLOT_SHIFT = 16, - FBC_RASTEROP_RAST_SHIFT = 17, - FBC_RASTEROP_ATTR_SHIFT = 22, - FBC_RASTEROP_POLYG_SHIFT = 24, - FBC_RASTEROP_PATT_SHIFT = 26, - FBC_RASTEROP_PIXEL_SHIFT = 28, - FBC_RASTEROP_PLANE_SHIFT = 30 + FBC_RASTEROP_ROP00_SHIFT = 0, + FBC_RASTEROP_ROP01_SHIFT = 4, + FBC_RASTEROP_ROP10_SHIFT = 8, + FBC_RASTEROP_ROP11_SHIFT = 12, + FBC_RASTEROP_PLOT_SHIFT = 16, + FBC_RASTEROP_RAST_SHIFT = 17, + FBC_RASTEROP_ATTR_SHIFT = 22, + FBC_RASTEROP_POLYG_SHIFT = 24, + FBC_RASTEROP_PATT_SHIFT = 26, + FBC_RASTEROP_PIXEL_SHIFT = 28, + FBC_RASTEROP_PLANE_SHIFT = 30 }; enum @@ -167,13 +168,13 @@ protected: FBC_RASTEROP_ROP01_MASK = 0xf, FBC_RASTEROP_ROP10_MASK = 0xf, FBC_RASTEROP_ROP11_MASK = 0xf, - FBC_RASTEROP_PLOT_MASK = 0x1, - FBC_RASTEROP_RAST_MASK = 0x1, - FBC_RASTEROP_ATTR_MASK = 0x3, + FBC_RASTEROP_PLOT_MASK = 0x1, + FBC_RASTEROP_RAST_MASK = 0x1, + FBC_RASTEROP_ATTR_MASK = 0x3, FBC_RASTEROP_POLYG_MASK = 0x3, - FBC_RASTEROP_PATT_MASK = 0x3, + FBC_RASTEROP_PATT_MASK = 0x3, FBC_RASTEROP_PIXEL_MASK = 0x3, - FBC_RASTEROP_PLANE_MASK = 0x3 + FBC_RASTEROP_PLANE_MASK = 0x3 }; enum @@ -210,124 +211,124 @@ protected: FBC_RASTEROP_PLANE_MSK = 3 }; - inline uint32_t fbc_rasterop_rop00() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP00_SHIFT) & FBC_RASTEROP_ROP00_MASK; } - inline uint32_t fbc_rasterop_rop01() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP01_SHIFT) & FBC_RASTEROP_ROP01_MASK; } - inline uint32_t fbc_rasterop_rop10() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP10_SHIFT) & FBC_RASTEROP_ROP10_MASK; } - inline uint32_t fbc_rasterop_rop11() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP11_SHIFT) & FBC_RASTEROP_ROP11_MASK; } - inline uint32_t fbc_rasterop_plot() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PLOT_SHIFT) & FBC_RASTEROP_PLOT_MASK; } - inline uint32_t fbc_rasterop_rast() { return (m_fbc.m_rasterop >> FBC_RASTEROP_RAST_SHIFT) & FBC_RASTEROP_RAST_MASK; } - inline uint32_t fbc_rasterop_attr() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ATTR_SHIFT) & FBC_RASTEROP_ATTR_MASK; } - inline uint32_t fbc_rasterop_polyg() { return (m_fbc.m_rasterop >> FBC_RASTEROP_POLYG_SHIFT) & FBC_RASTEROP_POLYG_MASK; } - inline uint32_t fbc_rasterop_pattern() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PATT_SHIFT) & FBC_RASTEROP_PATT_MASK; } - inline uint32_t fbc_rasterop_pixel() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PIXEL_SHIFT) & FBC_RASTEROP_PIXEL_MASK; } - inline uint32_t fbc_rasterop_plane() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PLANE_SHIFT) & FBC_RASTEROP_PLANE_MASK; } + inline uint32_t fbc_rasterop_rop00() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP00_SHIFT) & FBC_RASTEROP_ROP00_MASK; } + inline uint32_t fbc_rasterop_rop01() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP01_SHIFT) & FBC_RASTEROP_ROP01_MASK; } + inline uint32_t fbc_rasterop_rop10() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP10_SHIFT) & FBC_RASTEROP_ROP10_MASK; } + inline uint32_t fbc_rasterop_rop11() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP11_SHIFT) & FBC_RASTEROP_ROP11_MASK; } + inline uint32_t fbc_rasterop_plot() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PLOT_SHIFT) & FBC_RASTEROP_PLOT_MASK; } + inline uint32_t fbc_rasterop_rast() { return (m_fbc.m_rasterop >> FBC_RASTEROP_RAST_SHIFT) & FBC_RASTEROP_RAST_MASK; } + inline uint32_t fbc_rasterop_attr() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ATTR_SHIFT) & FBC_RASTEROP_ATTR_MASK; } + inline uint32_t fbc_rasterop_polyg() { return (m_fbc.m_rasterop >> FBC_RASTEROP_POLYG_SHIFT) & FBC_RASTEROP_POLYG_MASK; } + inline uint32_t fbc_rasterop_pattern() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PATT_SHIFT) & FBC_RASTEROP_PATT_MASK; } + inline uint32_t fbc_rasterop_pixel() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PIXEL_SHIFT) & FBC_RASTEROP_PIXEL_MASK; } + inline uint32_t fbc_rasterop_plane() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PLANE_SHIFT) & FBC_RASTEROP_PLANE_MASK; } enum { - FBC_MISC = 0x004/4, - FBC_CLIP_CHECK = 0x008/4, + FBC_MISC = 0x004/4, + FBC_CLIP_CHECK = 0x008/4, - FBC_STATUS = 0x010/4, - FBC_DRAW_STATUS = 0x014/4, + FBC_STATUS = 0x010/4, + FBC_DRAW_STATUS = 0x014/4, FBC_BLIT_STATUS = 0x018/4, - FBC_FONT = 0x01c/4, - - FBC_X0 = 0x080/4, - FBC_Y0 = 0x084/4, - FBC_Z0 = 0x088/4, - FBC_COLOR0 = 0x08c/4, - FBC_X1 = 0x090/4, - FBC_Y1 = 0x094/4, - FBC_Z1 = 0x098/4, - FBC_COLOR1 = 0x09c/4, - FBC_X2 = 0x0a0/4, - FBC_Y2 = 0x0a4/4, - FBC_Z2 = 0x0a8/4, - FBC_COLOR2 = 0x0ac/4, - FBC_X3 = 0x0b0/4, - FBC_Y3 = 0x0b4/4, - FBC_Z3 = 0x0b8/4, - FBC_COLOR3 = 0x0bc/4, - - FBC_RASTER_OFFX = 0x0c0/4, + FBC_FONT = 0x01c/4, + + FBC_X0 = 0x080/4, + FBC_Y0 = 0x084/4, + FBC_Z0 = 0x088/4, + FBC_COLOR0 = 0x08c/4, + FBC_X1 = 0x090/4, + FBC_Y1 = 0x094/4, + FBC_Z1 = 0x098/4, + FBC_COLOR1 = 0x09c/4, + FBC_X2 = 0x0a0/4, + FBC_Y2 = 0x0a4/4, + FBC_Z2 = 0x0a8/4, + FBC_COLOR2 = 0x0ac/4, + FBC_X3 = 0x0b0/4, + FBC_Y3 = 0x0b4/4, + FBC_Z3 = 0x0b8/4, + FBC_COLOR3 = 0x0bc/4, + + FBC_RASTER_OFFX = 0x0c0/4, FBC_RASTER_OFFY = 0x0c4/4, - FBC_AUTOINCX = 0x0d0/4, - FBC_AUTOINCY = 0x0d4/4, - FBC_CLIP_MINX = 0x0e0/4, - FBC_CLIP_MINY = 0x0e4/4, - FBC_CLIP_MAXX = 0x0f0/4, - FBC_CLIP_MAXY = 0x0f4/4, - - FBC_FCOLOR = 0x100/4, - FBC_BCOLOR = 0x104/4, - FBC_RASTEROP = 0x108/4, - FBC_PLANE_MASK = 0x10c/4, - FBC_PIXEL_MASK = 0x110/4, - - FBC_PATT_ALIGN = 0x11c/4, - FBC_PATTERN0 = 0x120/4, - FBC_PATTERN1 = 0x124/4, - FBC_PATTERN2 = 0x128/4, - FBC_PATTERN3 = 0x12c/4, - FBC_PATTERN4 = 0x130/4, - FBC_PATTERN5 = 0x134/4, - FBC_PATTERN6 = 0x138/4, - FBC_PATTERN7 = 0x13c/4, - - FBC_IPOINT_ABSX = 0x800/4, + FBC_AUTOINCX = 0x0d0/4, + FBC_AUTOINCY = 0x0d4/4, + FBC_CLIP_MINX = 0x0e0/4, + FBC_CLIP_MINY = 0x0e4/4, + FBC_CLIP_MAXX = 0x0f0/4, + FBC_CLIP_MAXY = 0x0f4/4, + + FBC_FCOLOR = 0x100/4, + FBC_BCOLOR = 0x104/4, + FBC_RASTEROP = 0x108/4, + FBC_PLANE_MASK = 0x10c/4, + FBC_PIXEL_MASK = 0x110/4, + + FBC_PATT_ALIGN = 0x11c/4, + FBC_PATTERN0 = 0x120/4, + FBC_PATTERN1 = 0x124/4, + FBC_PATTERN2 = 0x128/4, + FBC_PATTERN3 = 0x12c/4, + FBC_PATTERN4 = 0x130/4, + FBC_PATTERN5 = 0x134/4, + FBC_PATTERN6 = 0x138/4, + FBC_PATTERN7 = 0x13c/4, + + FBC_IPOINT_ABSX = 0x800/4, FBC_IPOINT_ABSY = 0x804/4, FBC_IPOINT_ABSZ = 0x808/4, - FBC_IPOINT_RELX = 0x810/4, + FBC_IPOINT_RELX = 0x810/4, FBC_IPOINT_RELY = 0x814/4, FBC_IPOINT_RELZ = 0x818/4, - FBC_IPOINT_R = 0x830/4, - FBC_IPOINT_G = 0x834/4, - FBC_IPOINT_B = 0x838/4, - FBC_IPOINT_A = 0x83c/4, - - FBC_ILINE_ABSX = 0x840/4, - FBC_ILINE_ABSY = 0x844/4, - FBC_ILINE_ABSZ = 0x848/4, - FBC_ILINE_RELX = 0x850/4, - FBC_ILINE_RELY = 0x854/4, - FBC_ILINE_RELZ = 0x858/4, - FBC_ILINE_R = 0x870/4, - FBC_ILINE_G = 0x874/4, - FBC_ILINE_B = 0x878/4, - FBC_ILINE_A = 0x87c/4, - - FBC_ITRI_ABSX = 0x880/4, - FBC_ITRI_ABSY = 0x884/4, - FBC_ITRI_ABSZ = 0x888/4, - FBC_ITRI_RELX = 0x890/4, - FBC_ITRI_RELY = 0x894/4, - FBC_ITRI_RELZ = 0x898/4, - FBC_ITRI_R = 0x8b0/4, - FBC_ITRI_G = 0x8b4/4, - FBC_ITRI_B = 0x8b8/4, - FBC_ITRI_A = 0x8bc/4, - - FBC_IQUAD_ABSX = 0x8c0/4, - FBC_IQUAD_ABSY = 0x8c4/4, - FBC_IQUAD_ABSZ = 0x8c8/4, - FBC_IQUAD_RELX = 0x8d0/4, - FBC_IQUAD_RELY = 0x8d4/4, - FBC_IQUAD_RELZ = 0x8d8/4, - FBC_IQUAD_R = 0x8f0/4, - FBC_IQUAD_G = 0x8f4/4, - FBC_IQUAD_B = 0x8f8/4, - FBC_IQUAD_A = 0x8fc/4, - - FBC_IRECT_ABSX = 0x900/4, - FBC_IRECT_ABSY = 0x904/4, - FBC_IRECT_ABSZ = 0x908/4, - FBC_IRECT_RELX = 0x910/4, - FBC_IRECT_RELY = 0x914/4, - FBC_IRECT_RELZ = 0x918/4, - FBC_IRECT_R = 0x930/4, - FBC_IRECT_G = 0x934/4, - FBC_IRECT_B = 0x938/4, - FBC_IRECT_A = 0x93c/4, + FBC_IPOINT_R = 0x830/4, + FBC_IPOINT_G = 0x834/4, + FBC_IPOINT_B = 0x838/4, + FBC_IPOINT_A = 0x83c/4, + + FBC_ILINE_ABSX = 0x840/4, + FBC_ILINE_ABSY = 0x844/4, + FBC_ILINE_ABSZ = 0x848/4, + FBC_ILINE_RELX = 0x850/4, + FBC_ILINE_RELY = 0x854/4, + FBC_ILINE_RELZ = 0x858/4, + FBC_ILINE_R = 0x870/4, + FBC_ILINE_G = 0x874/4, + FBC_ILINE_B = 0x878/4, + FBC_ILINE_A = 0x87c/4, + + FBC_ITRI_ABSX = 0x880/4, + FBC_ITRI_ABSY = 0x884/4, + FBC_ITRI_ABSZ = 0x888/4, + FBC_ITRI_RELX = 0x890/4, + FBC_ITRI_RELY = 0x894/4, + FBC_ITRI_RELZ = 0x898/4, + FBC_ITRI_R = 0x8b0/4, + FBC_ITRI_G = 0x8b4/4, + FBC_ITRI_B = 0x8b8/4, + FBC_ITRI_A = 0x8bc/4, + + FBC_IQUAD_ABSX = 0x8c0/4, + FBC_IQUAD_ABSY = 0x8c4/4, + FBC_IQUAD_ABSZ = 0x8c8/4, + FBC_IQUAD_RELX = 0x8d0/4, + FBC_IQUAD_RELY = 0x8d4/4, + FBC_IQUAD_RELZ = 0x8d8/4, + FBC_IQUAD_R = 0x8f0/4, + FBC_IQUAD_G = 0x8f4/4, + FBC_IQUAD_B = 0x8f8/4, + FBC_IQUAD_A = 0x8fc/4, + + FBC_IRECT_ABSX = 0x900/4, + FBC_IRECT_ABSY = 0x904/4, + FBC_IRECT_ABSZ = 0x908/4, + FBC_IRECT_RELX = 0x910/4, + FBC_IRECT_RELY = 0x914/4, + FBC_IRECT_RELZ = 0x918/4, + FBC_IRECT_R = 0x930/4, + FBC_IRECT_G = 0x934/4, + FBC_IRECT_B = 0x938/4, + FBC_IRECT_A = 0x93c/4, }; struct vertex_t @@ -344,7 +345,7 @@ protected: uint32_t m_a; }; - enum prim_type + enum prim_type : uint32_t { PRIM_POINT = 0, PRIM_LINE, @@ -461,7 +462,7 @@ protected: vertex_t m_prim_buf[0x1000]; // unknown size uint32_t m_vertex_count; - prim_type m_curr_prim_type; + uint32_t m_curr_prim_type; }; required_memory_region m_rom; diff --git a/src/devices/bus/sbus/cgthree.cpp b/src/devices/bus/sbus/cgthree.cpp index f4582c2d862..02ddaba688f 100644 --- a/src/devices/bus/sbus/cgthree.cpp +++ b/src/devices/bus/sbus/cgthree.cpp @@ -55,6 +55,7 @@ sbus_cgthree_device::sbus_cgthree_device(const machine_config &mconfig, const ch void sbus_cgthree_device::device_start() { m_vram = std::make_unique<uint32_t[]>(0x100000/4); + save_pointer(NAME(m_vram), 0x100000/4); } void sbus_cgthree_device::device_reset() diff --git a/src/devices/bus/sbus/hme.cpp b/src/devices/bus/sbus/hme.cpp index 49d6f4e3988..eb6d5852138 100644 --- a/src/devices/bus/sbus/hme.cpp +++ b/src/devices/bus/sbus/hme.cpp @@ -4,11 +4,11 @@ Sun SunSwift 10/100 + Fast Wide SCSI "Colossus" skeleton - Notable parts on board: - - 1x 32-pin PLCC ROM, label 525 / 1409 / -08 on separate lines - - 1x Sun STP2002QFP, marked 100-4156-05 / 609-0392458 / DP03972 - - 1x National Semiconductor DP83840AVCE-1 Ethernet Physical Layer - - 1x National Semiconductor DP83223V Twisted Pair Transceiver + Notable parts on board: + - 1x 32-pin PLCC ROM, label 525 / 1409 / -08 on separate lines + - 1x Sun STP2002QFP, marked 100-4156-05 / 609-0392458 / DP03972 + - 1x National Semiconductor DP83840AVCE-1 Ethernet Physical Layer + - 1x National Semiconductor DP83223V Twisted Pair Transceiver ***************************************************************************/ diff --git a/src/devices/bus/sbus/sbus.cpp b/src/devices/bus/sbus/sbus.cpp index 4c876cffd50..f8363194c5a 100644 --- a/src/devices/bus/sbus/sbus.cpp +++ b/src/devices/bus/sbus/sbus.cpp @@ -30,7 +30,7 @@ void sbus_cards(device_slot_interface &device) device.option_add("turbogxp", SBUS_TURBOGXP); /* Sun TurboGX+ 8-bit color display board */ device.option_add("sunpc", SBUS_SUNPC); /* Sun SunPC 5x86 Accelerator board */ device.option_add("hme", SBUS_HME); /* Sun SunSwift 10/100 + Fast Wide SCSI "Colossus" board */ - device.option_add("sb300p", SBUS_SB300P); /* Artecon CB300P 3-serial/4-parallel board */ + device.option_add("sb300p", SBUS_SB300P); /* Artecon CB300P 3-serial/1-parallel board */ } DEFINE_DEVICE_TYPE(SBUS_SLOT, sbus_slot_device, "sbus_slot", "Sun SBus Slot") diff --git a/src/devices/bus/sbus/sbus.h b/src/devices/bus/sbus/sbus.h index 15ca1f40ea2..5349c2c8e42 100644 --- a/src/devices/bus/sbus/sbus.h +++ b/src/devices/bus/sbus/sbus.h @@ -21,13 +21,13 @@ class sbus_slot_device : public device_t, public device_slot_interface public: // construction/destruction template <typename T, typename U> - sbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&sbus_tag, U &&opts, const char *dflt) + sbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&sbus_tag, U &&opts, const char *dflt, bool fixed = false) : sbus_slot_device(mconfig, tag, owner, clock) { option_reset(); opts(*this); set_default_option(dflt); - set_fixed(false); + set_fixed(fixed); m_sbus.set_tag(std::forward<T>(sbus_tag)); } sbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -106,7 +106,7 @@ protected: address_space *m_space; devcb_write_line m_irq_cb[7]; - devcb_write32 m_buserr; + devcb_write32 m_buserr; device_sbus_card_interface *m_device_list[3]; diff --git a/src/devices/bus/sbus/sunpc.cpp b/src/devices/bus/sbus/sunpc.cpp index 761948581c9..7036e857393 100644 --- a/src/devices/bus/sbus/sunpc.cpp +++ b/src/devices/bus/sbus/sunpc.cpp @@ -4,11 +4,11 @@ Sun SunPC 5x86 Accelerator (501-4230) skeleton - Notable parts on board: - - 1x AMD AM27C256 PLCC ROM - - 1x Motorola SunPC Accelerator 100-3069-03, mfr/date AANL9732 - - 6x Cypress CY7B185-10VC 64kBit Static RAM - - 1x AMD 5x86 (under heatsink; markings unknown) + Notable parts on board: + - 1x AMD AM27C256 PLCC ROM + - 1x Motorola SunPC Accelerator 100-3069-03, mfr/date AANL9732 + - 6x Cypress CY7B185-10VC 64kBit Static RAM + - 1x AMD 5x86 (under heatsink; markings unknown) ***************************************************************************/ diff --git a/src/devices/bus/sg1000_exp/sk1100.cpp b/src/devices/bus/sg1000_exp/sk1100.cpp index 91f077bdbfa..e23fe34caed 100644 --- a/src/devices/bus/sg1000_exp/sk1100.cpp +++ b/src/devices/bus/sg1000_exp/sk1100.cpp @@ -210,7 +210,7 @@ void sega_sk1100_device::device_start() READ8_MEMBER(sega_sk1100_device::peripheral_r) { - return m_ppi->read(space, offset & 0x03); + return m_ppi->read(offset & 0x03); } @@ -220,7 +220,7 @@ READ8_MEMBER(sega_sk1100_device::peripheral_r) WRITE8_MEMBER(sega_sk1100_device::peripheral_w) { - m_ppi->write(space, offset & 0x03, data); + m_ppi->write(offset & 0x03, data); } diff --git a/src/devices/bus/spc1000/fdd.cpp b/src/devices/bus/spc1000/fdd.cpp index 6a216752d55..dd91cbe898c 100644 --- a/src/devices/bus/spc1000/fdd.cpp +++ b/src/devices/bus/spc1000/fdd.cpp @@ -80,12 +80,12 @@ static void sd725_floppies(device_slot_interface &device) // device_add_mconfig //------------------------------------------------- -MACHINE_CONFIG_START(spc1000_fdd_exp_device::device_add_mconfig) - +void spc1000_fdd_exp_device::device_add_mconfig(machine_config &config) +{ // sub CPU (5 inch floppy drive) - MCFG_DEVICE_ADD("fdccpu", Z80, XTAL(4'000'000)) - MCFG_DEVICE_PROGRAM_MAP(sd725_mem) - MCFG_DEVICE_IO_MAP(sd725_io) + Z80(config, m_cpu, XTAL(4'000'000)); + m_cpu->set_addrmap(AS_PROGRAM, &spc1000_fdd_exp_device::sd725_mem); + m_cpu->set_addrmap(AS_IO, &spc1000_fdd_exp_device::sd725_io); I8255(config, m_ppi); m_ppi->in_pa_callback().set(m_ppi, FUNC(i8255_device::pb_r)); @@ -95,13 +95,13 @@ MACHINE_CONFIG_START(spc1000_fdd_exp_device::device_add_mconfig) m_ppi->out_pc_callback().set(FUNC(spc1000_fdd_exp_device::i8255_c_w)); // floppy disk controller - MCFG_UPD765A_ADD("upd765", true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE("fdccpu", INPUT_LINE_IRQ0)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_cpu, INPUT_LINE_IRQ0); // floppy drives - MCFG_FLOPPY_DRIVE_ADD("upd765:0", sd725_floppies, "sd320", floppy_image_device::default_floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("upd765:1", sd725_floppies, "sd320", floppy_image_device::default_floppy_formats) -MACHINE_CONFIG_END + FLOPPY_CONNECTOR(config, "upd765:0", sd725_floppies, "sd320", floppy_image_device::default_floppy_formats); + FLOPPY_CONNECTOR(config, "upd765:1", sd725_floppies, "sd320", floppy_image_device::default_floppy_formats); +} ROM_START( spc1000_fdd ) ROM_REGION(0x10000, "fdccpu", 0) @@ -215,7 +215,7 @@ WRITE8_MEMBER(spc1000_fdd_exp_device::write) switch (offset) { case 0: - m_ppi->write(space, 1, data); + m_ppi->write(1, data); break; case 2: m_i8255_0_pc = data; diff --git a/src/devices/bus/spectrum/exp.cpp b/src/devices/bus/spectrum/exp.cpp index c885bfde089..73e1d4a3a9a 100644 --- a/src/devices/bus/spectrum/exp.cpp +++ b/src/devices/bus/spectrum/exp.cpp @@ -32,15 +32,6 @@ device_spectrum_expansion_interface::device_spectrum_expansion_interface(const m } -//------------------------------------------------- -// ~device_spectrum_expansion_interface - destructor -//------------------------------------------------- - -device_spectrum_expansion_interface::~device_spectrum_expansion_interface() -{ -} - - //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -52,6 +43,7 @@ device_spectrum_expansion_interface::~device_spectrum_expansion_interface() spectrum_expansion_slot_device::spectrum_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, SPECTRUM_EXPANSION_SLOT, tag, owner, clock), device_slot_interface(mconfig, *this), + m_io(nullptr), m_card(nullptr), m_irq_handler(*this), m_nmi_handler(*this) @@ -60,15 +52,6 @@ spectrum_expansion_slot_device::spectrum_expansion_slot_device(const machine_con //------------------------------------------------- -// expansion_slot_device - destructor -//------------------------------------------------- - -spectrum_expansion_slot_device::~spectrum_expansion_slot_device() -{ -} - - -//------------------------------------------------- // device_validity_check - device-specific checks //------------------------------------------------- @@ -104,6 +87,15 @@ void spectrum_expansion_slot_device::device_reset() } //------------------------------------------------- +// set_io_space - set address space we are attached to +//------------------------------------------------- + +void spectrum_expansion_slot_device::set_io_space(address_space *io) +{ + m_io = io; +} + +//------------------------------------------------- // port_fe_r //------------------------------------------------- diff --git a/src/devices/bus/spectrum/exp.h b/src/devices/bus/spectrum/exp.h index f795fc05ad8..1d8eb5f21f2 100644 --- a/src/devices/bus/spectrum/exp.h +++ b/src/devices/bus/spectrum/exp.h @@ -46,33 +46,6 @@ //************************************************************************** -// CONSTANTS -//************************************************************************** - -#define SPECTRUM_EXPANSION_SLOT_TAG "exp" - - -//************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_SPECTRUM_EXPANSION_SLOT_ADD(_tag, _slot_intf, _def_slot) \ - MCFG_DEVICE_ADD(_tag, SPECTRUM_EXPANSION_SLOT, 0) \ - MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) - -#define MCFG_SPECTRUM_PASSTHRU_EXPANSION_SLOT_ADD() \ - MCFG_SPECTRUM_EXPANSION_SLOT_ADD(SPECTRUM_EXPANSION_SLOT_TAG, spectrum_expansion_devices, nullptr) \ - MCFG_SPECTRUM_EXPANSION_SLOT_IRQ_HANDLER(WRITELINE(DEVICE_SELF_OWNER, spectrum_expansion_slot_device, irq_w)) \ - MCFG_SPECTRUM_EXPANSION_SLOT_NMI_HANDLER(WRITELINE(DEVICE_SELF_OWNER, spectrum_expansion_slot_device, nmi_w)) - -#define MCFG_SPECTRUM_EXPANSION_SLOT_IRQ_HANDLER(_devcb) \ - downcast<spectrum_expansion_slot_device &>(*device).set_irq_handler(DEVCB_##_devcb); - -#define MCFG_SPECTRUM_EXPANSION_SLOT_NMI_HANDLER(_devcb) \ - downcast<spectrum_expansion_slot_device &>(*device).set_nmi_handler(DEVCB_##_devcb); - - -//************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -84,12 +57,23 @@ class spectrum_expansion_slot_device : public device_t, public device_slot_inter { public: // construction/destruction - spectrum_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual ~spectrum_expansion_slot_device(); + template <typename T> + spectrum_expansion_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) + : spectrum_expansion_slot_device(mconfig, tag, owner) + { + option_reset(); + slot_options(*this); + set_default_option(default_option); + set_fixed(false); + } + + spectrum_expansion_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); + + void set_io_space(address_space *io); // callbacks - template <class Object> devcb_base &set_irq_handler(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_nmi_handler(Object &&cb) { return m_nmi_handler.set_callback(std::forward<Object>(cb)); } + auto irq_handler() { return m_irq_handler.bind(); } + auto nmi_handler() { return m_nmi_handler.bind(); } DECLARE_READ8_MEMBER( mreq_r ); DECLARE_WRITE8_MEMBER( mreq_w ); @@ -99,6 +83,8 @@ public: DECLARE_WRITE_LINE_MEMBER( irq_w ) { m_irq_handler(state); } DECLARE_WRITE_LINE_MEMBER( nmi_w ) { m_nmi_handler(state); } + address_space *m_io; + protected: // device-level overrides virtual void device_validity_check(validity_checker &valid) const override; @@ -119,7 +105,7 @@ class device_spectrum_expansion_interface : public device_slot_card_interface { public: // construction/destruction - virtual ~device_spectrum_expansion_interface(); + device_spectrum_expansion_interface(const machine_config &mconfig, device_t &device); // reading and writing virtual DECLARE_READ8_MEMBER(mreq_r) { return 0xff; } @@ -128,7 +114,7 @@ public: virtual DECLARE_READ_LINE_MEMBER(romcs) { return 0; } protected: - device_spectrum_expansion_interface(const machine_config &mconfig, device_t &device); + address_space &io_space() { return *m_slot->m_io; } spectrum_expansion_slot_device *m_slot; }; diff --git a/src/devices/bus/spectrum/fuller.cpp b/src/devices/bus/spectrum/fuller.cpp index 4dd24161105..36275ccc4cd 100644 --- a/src/devices/bus/spectrum/fuller.cpp +++ b/src/devices/bus/spectrum/fuller.cpp @@ -44,15 +44,18 @@ ioport_constructor spectrum_fuller_device::device_input_ports() const // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(spectrum_fuller_device::device_add_mconfig) +void spectrum_fuller_device::device_add_mconfig(machine_config &config) +{ /* sound hardware */ SPEAKER(config, "mono").front_center(); - MCFG_DEVICE_ADD("ay8912", AY8912, XTAL(3'579'545) / 2) // unverified clock - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) + AY8912(config, m_psg, 3.579545_MHz_XTAL / 2); // unverified clock + m_psg->add_route(ALL_OUTPUTS, "mono", 0.25); /* passthru */ - MCFG_SPECTRUM_PASSTHRU_EXPANSION_SLOT_ADD() -MACHINE_CONFIG_END + SPECTRUM_EXPANSION_SLOT(config, m_exp, spectrum_expansion_devices, nullptr); + m_exp->irq_handler().set(DEVICE_SELF_OWNER, FUNC(spectrum_expansion_slot_device::irq_w)); + m_exp->nmi_handler().set(DEVICE_SELF_OWNER, FUNC(spectrum_expansion_slot_device::nmi_w)); +} //************************************************************************** // LIVE DEVICE @@ -78,12 +81,6 @@ spectrum_fuller_device::spectrum_fuller_device(const machine_config &mconfig, co void spectrum_fuller_device::device_start() { - address_space& spaceio = machine().device("maincpu")->memory().space(AS_IO); - m_slot = dynamic_cast<spectrum_expansion_slot_device *>(owner()); - - spaceio.install_write_handler(0x3f, 0x3f, 0, 0xff00, 0, write8_delegate(FUNC(ay8910_device::address_w), (ay8910_device*)m_psg)); - spaceio.install_readwrite_handler(0x5f, 0x5f, 0, 0xff00, 0, read8_delegate(FUNC(ay8910_device::data_r), (ay8910_device*)m_psg), write8_delegate(FUNC(ay8910_device::data_w), (ay8910_device*)m_psg)); - spaceio.install_read_handler(0x7f, 0x7f, 0, 0xff00, 0, read8_delegate(FUNC(spectrum_fuller_device::joystick_r), this)); } @@ -93,6 +90,11 @@ void spectrum_fuller_device::device_start() void spectrum_fuller_device::device_reset() { + m_exp->set_io_space(&io_space()); + + io_space().install_write_handler(0x3f, 0x3f, 0, 0xff00, 0, write8_delegate(FUNC(ay8910_device::address_w), m_psg.target())); + io_space().install_readwrite_handler(0x5f, 0x5f, 0, 0xff00, 0, read8_delegate(FUNC(ay8910_device::data_r), m_psg.target()), write8_delegate(FUNC(ay8910_device::data_w), m_psg.target())); + io_space().install_read_handler(0x7f, 0x7f, 0, 0xff00, 0, read8_delegate(FUNC(spectrum_fuller_device::joystick_r), this)); } diff --git a/src/devices/bus/spectrum/intf1.cpp b/src/devices/bus/spectrum/intf1.cpp index 5579409f9e8..d8245554976 100644 --- a/src/devices/bus/spectrum/intf1.cpp +++ b/src/devices/bus/spectrum/intf1.cpp @@ -41,7 +41,7 @@ ROM_END MACHINE_CONFIG_START(spectrum_intf1_device::device_add_mconfig) /* rs232 */ - MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, nullptr) + RS232_PORT(config, m_rs232, default_rs232_devices, nullptr); /* microdrive */ MCFG_MICRODRIVE_ADD("mdv1") @@ -49,7 +49,9 @@ MACHINE_CONFIG_START(spectrum_intf1_device::device_add_mconfig) MCFG_MICRODRIVE_ADD("mdv2") /* passthru */ - MCFG_SPECTRUM_PASSTHRU_EXPANSION_SLOT_ADD() + SPECTRUM_EXPANSION_SLOT(config, m_exp, spectrum_expansion_devices, nullptr); + m_exp->irq_handler().set(DEVICE_SELF_OWNER, FUNC(spectrum_expansion_slot_device::irq_w)); + m_exp->nmi_handler().set(DEVICE_SELF_OWNER, FUNC(spectrum_expansion_slot_device::nmi_w)); MACHINE_CONFIG_END const tiny_rom_entry *spectrum_intf1_device::device_rom_region() const @@ -66,13 +68,13 @@ const tiny_rom_entry *spectrum_intf1_device::device_rom_region() const //------------------------------------------------- spectrum_intf1_device::spectrum_intf1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, SPECTRUM_INTF1, tag, owner, clock), - device_spectrum_expansion_interface(mconfig, *this), - m_exp(*this, "exp"), - m_rs232(*this, "rs232"), - m_mdv1(*this, "mdv1"), - m_mdv2(*this, "mdv2"), - m_rom(*this, "rom") + : device_t(mconfig, SPECTRUM_INTF1, tag, owner, clock) + , device_spectrum_expansion_interface(mconfig, *this) + , m_exp(*this, "exp") + , m_rs232(*this, "rs232") + , m_mdv1(*this, "mdv1") + , m_mdv2(*this, "mdv2") + , m_rom(*this, "rom") { } @@ -82,7 +84,6 @@ spectrum_intf1_device::spectrum_intf1_device(const machine_config &mconfig, cons void spectrum_intf1_device::device_start() { - m_slot = dynamic_cast<spectrum_expansion_slot_device *>(owner()); } //------------------------------------------------- @@ -91,6 +92,8 @@ void spectrum_intf1_device::device_start() void spectrum_intf1_device::device_reset() { + m_exp->set_io_space(&io_space()); + m_romcs = 0; } @@ -112,8 +115,6 @@ READ8_MEMBER(spectrum_intf1_device::mreq_r) { if (offset == 0x0008 || offset == 0x1708) m_romcs = 1; - if (offset == 0x0700) - m_romcs = 0; } temp = m_exp->mreq_r(space, offset); @@ -123,6 +124,12 @@ READ8_MEMBER(spectrum_intf1_device::mreq_r) if (m_romcs) data &= m_rom->base()[offset & 0x1fff]; + if (!machine().side_effects_disabled()) + { + if (offset == 0x0700) + m_romcs = 0; + } + return data; } diff --git a/src/devices/bus/spectrum/intf2.cpp b/src/devices/bus/spectrum/intf2.cpp index 0921d50b0bc..2700c2787d0 100644 --- a/src/devices/bus/spectrum/intf2.cpp +++ b/src/devices/bus/spectrum/intf2.cpp @@ -54,14 +54,14 @@ ioport_constructor spectrum_intf2_device::device_input_ports() const // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(spectrum_intf2_device::device_add_mconfig) +void spectrum_intf2_device::device_add_mconfig(machine_config &config) +{ /* cartridge */ - MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_plain_slot, "spectrum_cart") - MCFG_GENERIC_EXTENSIONS("bin,rom") - MCFG_GENERIC_LOAD(spectrum_intf2_device, spectrum_cart) + GENERIC_CARTSLOT(config, m_cart, generic_plain_slot, "spectrum_cart", "bin,rom"); + m_cart->set_device_load(device_image_load_delegate(&spectrum_intf2_device::device_image_load_spectrum_cart, this)); - MCFG_SOFTWARE_LIST_ADD("cart_list", "spectrum_cart") -MACHINE_CONFIG_END + SOFTWARE_LIST(config, "cart_list").set_original("spectrum_cart"); +} //************************************************************************** // LIVE DEVICE @@ -72,11 +72,11 @@ MACHINE_CONFIG_END //------------------------------------------------- spectrum_intf2_device::spectrum_intf2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, SPECTRUM_INTF2, tag, owner, clock), - device_spectrum_expansion_interface(mconfig, *this), - m_cart(*this, "cartslot"), - m_exp_line3(*this, "LINE3"), - m_exp_line4(*this, "LINE4") + : device_t(mconfig, SPECTRUM_INTF2, tag, owner, clock) + , device_spectrum_expansion_interface(mconfig, *this) + , m_cart(*this, "cartslot") + , m_exp_line3(*this, "LINE3") + , m_exp_line4(*this, "LINE4") { } @@ -86,15 +86,6 @@ spectrum_intf2_device::spectrum_intf2_device(const machine_config &mconfig, cons void spectrum_intf2_device::device_start() { - m_slot = dynamic_cast<spectrum_expansion_slot_device *>(owner()); -} - -//------------------------------------------------- -// device_reset - device-specific reset -//------------------------------------------------- - -void spectrum_intf2_device::device_reset() -{ } diff --git a/src/devices/bus/spectrum/intf2.h b/src/devices/bus/spectrum/intf2.h index 54316ef88c5..826e4b8fb3e 100644 --- a/src/devices/bus/spectrum/intf2.h +++ b/src/devices/bus/spectrum/intf2.h @@ -29,7 +29,6 @@ public: protected: virtual void device_start() override; - virtual void device_reset() override; // optional information overrides virtual void device_add_mconfig(machine_config &config) override; diff --git a/src/devices/bus/spectrum/kempjoy.cpp b/src/devices/bus/spectrum/kempjoy.cpp index 4f13fdc482f..ac7d5698bd7 100644 --- a/src/devices/bus/spectrum/kempjoy.cpp +++ b/src/devices/bus/spectrum/kempjoy.cpp @@ -62,10 +62,6 @@ spectrum_kempjoy_device::spectrum_kempjoy_device(const machine_config &mconfig, void spectrum_kempjoy_device::device_start() { - address_space& spaceio = machine().device("maincpu")->memory().space(AS_IO); - m_slot = dynamic_cast<spectrum_expansion_slot_device *>(owner()); - - spaceio.install_read_handler(0x1f, 0x1f, 0, 0xff00, 0, read8_delegate(FUNC(spectrum_kempjoy_device::joystick_r), this)); } @@ -75,6 +71,7 @@ void spectrum_kempjoy_device::device_start() void spectrum_kempjoy_device::device_reset() { + io_space().install_read_handler(0x1f, 0x1f, 0, 0xff00, 0, read8_delegate(FUNC(spectrum_kempjoy_device::joystick_r), this)); } diff --git a/src/devices/bus/spectrum/melodik.cpp b/src/devices/bus/spectrum/melodik.cpp index 5b7ee40c040..8303d4c436c 100644 --- a/src/devices/bus/spectrum/melodik.cpp +++ b/src/devices/bus/spectrum/melodik.cpp @@ -21,15 +21,18 @@ DEFINE_DEVICE_TYPE(SPECTRUM_MELODIK, spectrum_melodik_device, "spectrum_melodik" // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(spectrum_melodik_device::device_add_mconfig) +void spectrum_melodik_device::device_add_mconfig(machine_config &config) +{ /* sound hardware */ SPEAKER(config, "mono").front_center(); - MCFG_DEVICE_ADD("ay8912", AY8912, XTAL(3'579'545) / 2) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) + AY8912(config, m_psg, 3.579545_MHz_XTAL / 2); + m_psg->add_route(ALL_OUTPUTS, "mono", 0.25); /* passthru */ - MCFG_SPECTRUM_PASSTHRU_EXPANSION_SLOT_ADD() -MACHINE_CONFIG_END + SPECTRUM_EXPANSION_SLOT(config, m_exp, spectrum_expansion_devices, nullptr); + m_exp->irq_handler().set(DEVICE_SELF_OWNER, FUNC(spectrum_expansion_slot_device::irq_w)); + m_exp->nmi_handler().set(DEVICE_SELF_OWNER, FUNC(spectrum_expansion_slot_device::nmi_w)); +} //************************************************************************** // LIVE DEVICE @@ -54,11 +57,6 @@ spectrum_melodik_device::spectrum_melodik_device(const machine_config &mconfig, void spectrum_melodik_device::device_start() { - address_space& spaceio = machine().device("maincpu")->memory().space(AS_IO); - m_slot = dynamic_cast<spectrum_expansion_slot_device *>(owner()); - - spaceio.install_write_handler(0x8000, 0x8000, 0, 0x3ffd, 0, write8_delegate(FUNC(ay8910_device::address_w), (ay8910_device*)m_psg)); - spaceio.install_readwrite_handler(0xc000, 0xc000, 0, 0x3ffd, 0, read8_delegate(FUNC(ay8910_device::data_r), (ay8910_device*)m_psg), write8_delegate(FUNC(ay8910_device::data_w), (ay8910_device*)m_psg)); } @@ -68,6 +66,10 @@ void spectrum_melodik_device::device_start() void spectrum_melodik_device::device_reset() { + m_exp->set_io_space(&io_space()); + + io_space().install_write_handler(0x8000, 0x8000, 0, 0x3ffd, 0, write8_delegate(FUNC(ay8910_device::address_w), m_psg.target())); + io_space().install_readwrite_handler(0xc000, 0xc000, 0, 0x3ffd, 0, read8_delegate(FUNC(ay8910_device::data_r), m_psg.target()), write8_delegate(FUNC(ay8910_device::data_w), m_psg.target())); } //************************************************************************** diff --git a/src/devices/bus/spectrum/mikroplus.cpp b/src/devices/bus/spectrum/mikroplus.cpp index 97b6606d6df..b0f0676aaee 100644 --- a/src/devices/bus/spectrum/mikroplus.cpp +++ b/src/devices/bus/spectrum/mikroplus.cpp @@ -82,10 +82,6 @@ spectrum_mikroplus_device::spectrum_mikroplus_device(const machine_config &mconf void spectrum_mikroplus_device::device_start() { - address_space& spaceio = machine().device("maincpu")->memory().space(AS_IO); - m_slot = dynamic_cast<spectrum_expansion_slot_device *>(owner()); - - spaceio.install_read_handler(0xdf, 0xdf, 0, 0xff00, 0, read8_delegate(FUNC(spectrum_mikroplus_device::joystick_r), this)); } @@ -95,6 +91,7 @@ void spectrum_mikroplus_device::device_start() void spectrum_mikroplus_device::device_reset() { + io_space().install_read_handler(0xdf, 0xdf, 0, 0xff00, 0, read8_delegate(FUNC(spectrum_mikroplus_device::joystick_r), this)); } diff --git a/src/devices/bus/spectrum/plus2test.cpp b/src/devices/bus/spectrum/plus2test.cpp index 9e42d711098..a734a76f775 100644 --- a/src/devices/bus/spectrum/plus2test.cpp +++ b/src/devices/bus/spectrum/plus2test.cpp @@ -56,16 +56,6 @@ spectrum_plus2test_device::spectrum_plus2test_device(const machine_config &mconf void spectrum_plus2test_device::device_start() { - m_slot = dynamic_cast<spectrum_expansion_slot_device *>(owner()); -} - - -//------------------------------------------------- -// device_reset - device-specific reset -//------------------------------------------------- - -void spectrum_plus2test_device::device_reset() -{ } diff --git a/src/devices/bus/spectrum/plus2test.h b/src/devices/bus/spectrum/plus2test.h index 22158c7efc3..234e82a95f0 100644 --- a/src/devices/bus/spectrum/plus2test.h +++ b/src/devices/bus/spectrum/plus2test.h @@ -31,7 +31,6 @@ public: protected: // device-level overrides virtual void device_start() override; - virtual void device_reset() override; // optional information overrides virtual const tiny_rom_entry *device_rom_region() const override; diff --git a/src/devices/bus/spectrum/protek.cpp b/src/devices/bus/spectrum/protek.cpp index 9f00d61fcbc..a3f3a1838f8 100644 --- a/src/devices/bus/spectrum/protek.cpp +++ b/src/devices/bus/spectrum/protek.cpp @@ -65,16 +65,6 @@ spectrum_protek_device::spectrum_protek_device(const machine_config &mconfig, co void spectrum_protek_device::device_start() { - m_slot = dynamic_cast<spectrum_expansion_slot_device *>(owner()); -} - - -//------------------------------------------------- -// device_reset - device-specific reset -//------------------------------------------------- - -void spectrum_protek_device::device_reset() -{ } diff --git a/src/devices/bus/spectrum/protek.h b/src/devices/bus/spectrum/protek.h index f215250ecbd..503a041a0d3 100644 --- a/src/devices/bus/spectrum/protek.h +++ b/src/devices/bus/spectrum/protek.h @@ -31,7 +31,6 @@ public: protected: // device-level overrides virtual void device_start() override; - virtual void device_reset() override; // optional information overrides virtual ioport_constructor device_input_ports() const override; diff --git a/src/devices/bus/spectrum/uslot.cpp b/src/devices/bus/spectrum/uslot.cpp index 178f8ab0941..d2d75d6a72c 100644 --- a/src/devices/bus/spectrum/uslot.cpp +++ b/src/devices/bus/spectrum/uslot.cpp @@ -20,16 +20,17 @@ DEFINE_DEVICE_TYPE(SPECTRUM_USLOT, spectrum_uslot_device, "spectrum_uslot", "Spe // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(spectrum_uslot_device::device_add_mconfig) +void spectrum_uslot_device::device_add_mconfig(machine_config &config) +{ /* passthru */ - MCFG_SPECTRUM_EXPANSION_SLOT_ADD("exp1", spectrum_expansion_devices, nullptr) - MCFG_SPECTRUM_EXPANSION_SLOT_IRQ_HANDLER(WRITELINE(DEVICE_SELF_OWNER, spectrum_expansion_slot_device, irq_w)) - MCFG_SPECTRUM_EXPANSION_SLOT_NMI_HANDLER(WRITELINE(DEVICE_SELF_OWNER, spectrum_expansion_slot_device, nmi_w)) + SPECTRUM_EXPANSION_SLOT(config, m_exp1, spectrum_expansion_devices, nullptr); + m_exp1->irq_handler().set(DEVICE_SELF_OWNER, FUNC(spectrum_expansion_slot_device::irq_w)); + m_exp1->nmi_handler().set(DEVICE_SELF_OWNER, FUNC(spectrum_expansion_slot_device::nmi_w)); - MCFG_SPECTRUM_EXPANSION_SLOT_ADD("exp2", spectrum_expansion_devices, nullptr) - MCFG_SPECTRUM_EXPANSION_SLOT_IRQ_HANDLER(WRITELINE(DEVICE_SELF_OWNER, spectrum_expansion_slot_device, irq_w)) - MCFG_SPECTRUM_EXPANSION_SLOT_NMI_HANDLER(WRITELINE(DEVICE_SELF_OWNER, spectrum_expansion_slot_device, nmi_w)) -MACHINE_CONFIG_END + SPECTRUM_EXPANSION_SLOT(config, m_exp2, spectrum_expansion_devices, nullptr); + m_exp2->irq_handler().set(DEVICE_SELF_OWNER, FUNC(spectrum_expansion_slot_device::irq_w)); + m_exp2->nmi_handler().set(DEVICE_SELF_OWNER, FUNC(spectrum_expansion_slot_device::nmi_w)); +} //************************************************************************** // LIVE DEVICE @@ -54,7 +55,6 @@ spectrum_uslot_device::spectrum_uslot_device(const machine_config &mconfig, cons void spectrum_uslot_device::device_start() { - m_slot = dynamic_cast<spectrum_expansion_slot_device *>(owner()); } @@ -64,6 +64,8 @@ void spectrum_uslot_device::device_start() void spectrum_uslot_device::device_reset() { + m_exp1->set_io_space(&io_space()); + m_exp2->set_io_space(&io_space()); } diff --git a/src/devices/bus/spectrum/usource.cpp b/src/devices/bus/spectrum/usource.cpp index 6df423d9883..b4fb9c5797a 100644 --- a/src/devices/bus/spectrum/usource.cpp +++ b/src/devices/bus/spectrum/usource.cpp @@ -60,7 +60,6 @@ spectrum_usource_device::spectrum_usource_device(const machine_config &mconfig, void spectrum_usource_device::device_start() { - m_slot = dynamic_cast<spectrum_expansion_slot_device *>(owner()); } diff --git a/src/devices/bus/spectrum/uspeech.cpp b/src/devices/bus/spectrum/uspeech.cpp index 852ac24c11d..87f66ca0182 100644 --- a/src/devices/bus/spectrum/uspeech.cpp +++ b/src/devices/bus/spectrum/uspeech.cpp @@ -76,7 +76,6 @@ spectrum_uspeech_device::spectrum_uspeech_device(const machine_config &mconfig, void spectrum_uspeech_device::device_start() { - m_slot = dynamic_cast<spectrum_expansion_slot_device *>(owner()); } diff --git a/src/devices/bus/sunkbd/hlekbd.cpp b/src/devices/bus/sunkbd/hlekbd.cpp index 48b16f13348..4ec8dc74080 100644 --- a/src/devices/bus/sunkbd/hlekbd.cpp +++ b/src/devices/bus/sunkbd/hlekbd.cpp @@ -21,7 +21,7 @@ 0000 0011 bell off 0000 1010 enable keyclick (5ms duration 480us period on make) 0000 1011 disable keyclick - 0000 1110 ---k lscn LED (1 = on, k = kana, l = caps lock, s = scroll lock, c = compose, n = num lock) + 0000 1110 ---k lscn LED (1 = on: k = kana, l = caps lock, s = scroll lock, c = compose, n = num lock) 0000 1111 layout request (keyboard responds with layout response) message from keyboad to host: @@ -101,7 +101,7 @@ control on home row, caps lock at bottom left corner of main area - Type 5 International layout: + Type 5 International (ISO) layout: 76 1d 05 06 08 0a 0c 0e 10 11 12 07 09 0b 16 17 15 2d 02 04 30 @@ -114,7 +114,7 @@ double-height return key, 58 (US backslash) moved to home row, 7c added on left of bottom row - Type 5 Japanese layout: + Type 5 Japanese (JIS) layout: 76 1d 05 06 08 0a 0c 0e 10 11 12 07 09 0b 16 17 15 2d 02 04 30 @@ -127,8 +127,8 @@ double-height return key yen/pipe replaces backtick/tilde at top left corner of main area linefeed scancode repurposed for backslash/underscore - kana replaces alt graph (with LED window) - extra kakutei, henkan and nihongo on-off keys + kana (かな) replaces alt graph (with LED window) + extra kakutei (確定), henkan (変換) and nihongo on-off (日本語 On-Off) keys */ @@ -148,6 +148,7 @@ DEFINE_DEVICE_TYPE_NS(SUN_TYPE5_JP_HLE_KEYBOARD, bus::sunkbd, hle_type5_jp_devic namespace bus { namespace sunkbd { namespace { + /*************************************************************************** INPUT PORT DEFINITIONS ***************************************************************************/ @@ -941,13 +942,13 @@ void hle_device_base::key_break(uint8_t row, uint8_t column) assert(!fifo_full()); assert(m_make_count); - // send the break code, and the idle code if no other keysa are down + // send the break code, and the idle code if no other keys are down transmit_byte(0x80U | (row << 4) | column); if (!--m_make_count) transmit_byte(0x7fU); - // check our counting - assert(are_all_keys_up() == !bool(m_make_count)); + // this blows up if a key is pressed just as the last key is released + //assert(are_all_keys_up() == !bool(m_make_count)); } @@ -988,6 +989,7 @@ void hle_device_base::received_byte(uint8_t byte) switch (byte) { case COMMAND_RESET: + printf("Resetting keyboard\n"); device_reset(); break; diff --git a/src/devices/bus/sunkbd/hlekbd.h b/src/devices/bus/sunkbd/hlekbd.h index a4f6d886f5c..4f442daad4a 100644 --- a/src/devices/bus/sunkbd/hlekbd.h +++ b/src/devices/bus/sunkbd/hlekbd.h @@ -122,6 +122,7 @@ public: device_t *owner, uint32_t clock); +protected: virtual ioport_constructor device_input_ports() const override; private: @@ -138,6 +139,7 @@ public: device_t *owner, uint32_t clock); +protected: virtual ioport_constructor device_input_ports() const override; }; @@ -151,6 +153,7 @@ public: device_t *owner, uint32_t clock); +protected: virtual ioport_constructor device_input_ports() const override; }; @@ -164,6 +167,7 @@ public: device_t *owner, uint32_t clock); +protected: virtual ioport_constructor device_input_ports() const override; }; @@ -177,6 +181,7 @@ public: device_t *owner, uint32_t clock); +protected: virtual ioport_constructor device_input_ports() const override; }; @@ -190,6 +195,7 @@ public: device_t *owner, uint32_t clock); +protected: virtual ioport_constructor device_input_ports() const override; }; diff --git a/src/devices/bus/sunkbd/sunkbd.cpp b/src/devices/bus/sunkbd/sunkbd.cpp index 2ac0eb65b4c..82152b5f905 100644 --- a/src/devices/bus/sunkbd/sunkbd.cpp +++ b/src/devices/bus/sunkbd/sunkbd.cpp @@ -1,5 +1,92 @@ // license:BSD-3-Clause // copyright-holders:Vas Crabb +/* + Sun keyboard port + + Pre-USB Sun keyboards use an asynchronous serial protocol. Data is + transmitted at TTL levels using an asynchronous serial protocol at + 1,200 Baud. The protocol remained compatible from at least the + Type 2 keyboard to the Type 6 keyboard, although key layout and key + cap labels varied, some scancodes were repurposed, and a variety of + connectors were used. + + From the Sun 2/50 onwards, the keyboard and mouse share a single + connector, either using a splitter adapter, or by plugging the mouse + into a pass-through connector on the keyboard. + + Type 3 female DA-15 connector on host (introduced on Sun 2/50): + 1: keyboard RxD 9: GND + 2: GND 10: +5V + 3: keyboard TxD 11: +5V + 4: GND 12: +5V + 5: mouse RxD 13: +5V + 6: GND 14: +5V + 7: mouse TxD 15: +5V + 8: GND + + Type 4 female Mini-DIN-8 connector on host (introduced on Sun 3/80): + 1: GND 3: +5V 6: keyboard RxD + 2: GND 4: mouse RxD 7: mouse TxD + 5: keyboard TxD 8: +5V + + Type 5 female Mini-DIN-8 connector on host: + 1: GND 3: +5V 6: keyboard RxD + 2: GND 4: mouse RxD 7: power key + 5: keyboard TxD 8: +5V + + Scancodes (U.S. caps except as noted): + 00: 20: 3 40: [ { 60: Page Up + 01: L1/Stop 21: 5 41: ] } 61: L10/Cut + 02: Volume Down 22: 5 42: Delete 62: Num Lock + 03: L2/Again 23: 6 43: Compose 63: Left Shift + 04: Volume Up 24: 7 44: R7/KP 7 64: Z + 05: F1 25: 8 45: R8/KP 8 65: X + 06: F2 26: 9 46: R9/KP 9 66: C + 07: F10 27: 0 47: KP - 67: V + 08: F3 28: - _ 48: L7/Open 68: B + 09: F11 29: = + 49: L8/Paste 69: N + 0a: F4 2a: ` ~ 4a: End 6a: M + 0b: F12 2b: Backspace 4b: 6b: , < + 0c: F5 2c: Insert 4c: Control 6c: . > + 0d: Alt Graph 2d: R4/KP =/Mute 4d: A 6d: / ? + 0e: F6 2e: R5/KP / 4e: S 6e: Right Shift + 0f: Blank 2f: R6/KP * 4f: D 6f: Line Feed/\ _ + 10: F7 30: Power 50: F 70: R13/KP 1 + 11: F8 31: L5/Front 51: G 71: R14/KP 2 + 12: F9 32: KP . 52: H 72: R15/KP 3 + 13: Alt 33: L6/Copy 53: J 73: Kakutei + 14: Cursor Up 34: Home 54: K 74: Henkan + 15: R1/Pause 35: Tab 55: L 75: Nihongo On-Off + 16: R2/Print Screen 36: Q 56: ; : 76: Help + 17: R3/Scroll Lock 37: W 57: ' " 77: Caps Lock + 18: Cursor Left 38: E 58: \ | 78: Left Meta + 19: L3/Props 39: R 59: Return 79: Space + 1a: L4/Undo 3a: T 5a: Enter 7a: Right Meta + 1b: Cursor Down 3b: Y 5b: R10/KP 4 7b: Page Down + 1c: Cursor Right 3c: U 5c: R11/KP 5 7c: < > + 1d: Escape 3d: I 5d: R12/KP 6 7d: KP + + 1e: 1 3e: O 5e: KP 0 7e: + 1f: 2 3f: P 5f: L9/Find 7f: + + 7e and 7f are reserved for special messages. + L function group and R function group repurposed on Type 4 keyboard. + F10, F11, F12, Alt Graph, Compose, and Help added on Type 4 keyboard. + Num Lock, KP -, KP +, KP 0, KP ., and Enter added on Type 4 keyboard. + Line Feed removed from Type 5 keyboard. + Cursor Up, Cursor Down, Cursor Left, and Cursor Right added on Type 5 keyboard. + Insert, Home, End, Page Up, and Page Down added on Type 5 keyboard. + Volume Down, Volume Up, and Power added on Type 5 keyboard. + KP = repurposed for Mute on Type 5 keyboard. + Blank key only present on Type 5 UNIX keyboard. + < > only present on Type 5 International (ISO) keyboard. + Line Feed repurposed for backslash/underscore on Type 5 Japanese (JIS) keyboard. + Kakutei, Henkan, and Nihongo On-Off only present on Type 5 Japanese (JIS) keyboard. + + TODO: + * Add power key line for soft power sun4c and later systems. + * Confirm actual logic levels. + * Dump keyboard microcontrollers. +*/ #include "emu.h" #include "sunkbd.h" @@ -52,6 +139,19 @@ void sun_keyboard_port_device::device_config_complete() } +void sun_keyboard_port_device::device_validity_check(validity_checker &valid) const +{ + device_t *const card(get_card_device()); + if (card && !dynamic_cast<device_sun_keyboard_port_interface *>(card)) + { + osd_printf_error( + "Card device %s (%s) does not implement device_sun_keyboard_port_interface\n", + card->tag(), + card->name()); + } +} + + void sun_keyboard_port_device::device_resolve_objects() { m_rxd_handler.resolve_safe(); @@ -60,6 +160,14 @@ void sun_keyboard_port_device::device_resolve_objects() void sun_keyboard_port_device::device_start() { + if (get_card_device() && !m_dev) + { + throw emu_fatalerror( + "Card device %s (%s) does not implement device_sun_keyboard_port_interface\n", + get_card_device()->tag(), + get_card_device()->name()); + } + save_item(NAME(m_rxd)); m_rxd = 1; diff --git a/src/devices/bus/sunkbd/sunkbd.h b/src/devices/bus/sunkbd/sunkbd.h index 43f60067a46..532193cbf0d 100644 --- a/src/devices/bus/sunkbd/sunkbd.h +++ b/src/devices/bus/sunkbd/sunkbd.h @@ -28,7 +28,7 @@ public: sun_keyboard_port_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); virtual ~sun_keyboard_port_device(); - // static configuration helpers + // configuration helpers auto rxd_handler() { return m_rxd_handler.bind(); } DECLARE_WRITE_LINE_MEMBER( write_txd ); @@ -38,9 +38,10 @@ public: protected: sun_keyboard_port_device(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, uint32_t clock); + virtual void device_config_complete() override; + virtual void device_validity_check(validity_checker &valid) const override; virtual void device_resolve_objects() override; virtual void device_start() override; - virtual void device_config_complete() override; int m_rxd; @@ -58,13 +59,13 @@ class device_sun_keyboard_port_interface : public device_slot_card_interface public: virtual ~device_sun_keyboard_port_interface() override; +protected: + device_sun_keyboard_port_interface(machine_config const &mconfig, device_t &device); + virtual DECLARE_WRITE_LINE_MEMBER( input_txd ) { } DECLARE_WRITE_LINE_MEMBER( output_rxd ) { m_port->m_rxd = state; m_port->m_rxd_handler(state); } -protected: - device_sun_keyboard_port_interface(machine_config const &mconfig, device_t &device); - sun_keyboard_port_device *m_port; static constexpr int START_BIT_COUNT = 1; diff --git a/src/devices/bus/sunmouse/hlemouse.cpp b/src/devices/bus/sunmouse/hlemouse.cpp new file mode 100644 index 00000000000..fb08b95232e --- /dev/null +++ b/src/devices/bus/sunmouse/hlemouse.cpp @@ -0,0 +1,314 @@ +// license:BSD-3-Clause +// copyright-holders:Vas Crabb +#include "emu.h" +#include "hlemouse.h" + +#define LOG_GENERAL (1U << 0) +#define LOG_BIT (1U << 1) + +//#define VERBOSE (LOG_GENERAL | LOG_BIT) +//#define LOG_OUTPUT_STREAM std::cerr + +#include "logmacro.h" + +#define LOGBIT(...) LOGMASKED(LOG_BIT, __VA_ARGS__) + + +/* + Mostly compatible with the Mouse Systems "non-rotatable" protocol. + The only real difference is that the mouse may send a 3-byte frame + if the movement in each axis doesn't exceed the range -120 to 127 + counts (values in the range -128 to -121 are indistinguishable from + button states). +*/ + + +/*************************************************************************** + DEVICE TYPE GLOBALS +***************************************************************************/ + +DEFINE_DEVICE_TYPE_NS(SUN_1200BAUD_HLE_MOUSE, bus::sunmouse, hle_1200baud_device, "sunmouse_hle1200", "Sun Mouse (1200 Baud, HLE)") +DEFINE_DEVICE_TYPE_NS(SUN_4800BAUD_HLE_MOUSE, bus::sunmouse, hle_4800baud_device, "sunmouse_hle4800", "Sun Mouse (4800 Baud, HLE)") + +namespace bus { namespace sunmouse { + +namespace { + +INPUT_PORTS_START( mouse ) + PORT_START("BTN") + PORT_BIT( 0xfff8, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(MOUSECODE_BUTTON1) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_device_base, input_changed, nullptr) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CODE(MOUSECODE_BUTTON3) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_device_base, input_changed, nullptr) + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(MOUSECODE_BUTTON2) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_device_base, input_changed, nullptr) + + PORT_START("X") + PORT_BIT( 0xf000, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0fff, 0x00, IPT_MOUSE_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_device_base, input_changed, nullptr) + + PORT_START("Y") + PORT_BIT( 0xf000, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x0fff, 0x00, IPT_MOUSE_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_CHANGED_MEMBER(DEVICE_SELF, hle_device_base, input_changed, nullptr) +INPUT_PORTS_END + + +uint8_t extract_delta_byte(int32_t &delta) +{ + int32_t const result(std::min<int32_t>(std::max<int32_t>(delta, -120), 127)); + delta -= result; + return uint8_t(int8_t(result)); +} + +} // anonymous namespace + + + +/*************************************************************************** + BASE HLE MOUSE DEVICE +***************************************************************************/ + +hle_device_base::hle_device_base( + machine_config const &mconfig, + device_type type, + char const *tag, + device_t *owner, + uint32_t clock, + unsigned multiplier) + : device_t(mconfig, type, tag, owner, clock) + , device_serial_interface(mconfig, *this) + , device_sun_mouse_port_interface(mconfig, *this) + , m_buttons(*this, "BTN") + , m_x_axis(*this, "X") + , m_y_axis(*this, "Y") + , m_multiplier(multiplier) + , m_x_delta(0) + , m_y_delta(0) + , m_x_val(0U) + , m_y_val(0U) + , m_btn_sent(0x00U) + , m_btn_val(0x00U) + , m_phase(0U) +{ +} + + +hle_device_base::~hle_device_base() +{ +} + + +INPUT_CHANGED_MEMBER( hle_device_base::input_changed ) +{ + if (is_transmit_register_empty()) + { + assert((0U == m_phase) || (3U == m_phase)); + + check_inputs(); + if (0U == m_phase) + { + if (m_x_delta || m_y_delta || (m_btn_sent != m_btn_val)) + { + LOG("Inputs changed (B=%X->%x X=%d Y=%d) - sending button state\n", + m_btn_sent, + m_btn_val, + m_x_delta, + m_y_delta); + transmit_register_setup((m_btn_sent = m_btn_val) | 0x80U); + } + } + else if (m_x_delta || m_y_delta) + { + LOG("Inputs changed (B=%X->%x X=%d Y=%d) - sending X delta\n", + m_btn_sent, + m_btn_val, + m_x_delta, + m_y_delta); + transmit_register_setup(extract_delta_byte(m_x_delta)); + } + else if (m_btn_sent != m_btn_val) + { + LOG("Inputs changed (B=%X->%x X=%d Y=%d) - sending button state\n", + m_btn_sent, + m_btn_val, + m_x_delta, + m_y_delta); + m_phase = 0U; + transmit_register_setup((m_btn_sent = m_btn_val) | 0x80U); + } + } + else + { + LOG("Ignoring input changed while transmit register not empty\n"); + } +} + + +ioport_constructor hle_device_base::device_input_ports() const +{ + return INPUT_PORTS_NAME(mouse); +} + + +void hle_device_base::device_start() +{ + save_item(NAME(m_x_delta)); + save_item(NAME(m_y_delta)); + save_item(NAME(m_x_val)); + save_item(NAME(m_y_val)); + save_item(NAME(m_phase)); + + set_data_frame(START_BIT_COUNT, DATA_BIT_COUNT, PARITY, STOP_BITS); + set_rate(BAUD * m_multiplier); + receive_register_reset(); + transmit_register_reset(); + + output_rxd(0); + + m_x_delta = 0; + m_y_delta = 0; + m_btn_sent = 0x00U; + m_phase = 0U; +} + + +void hle_device_base::device_reset() +{ + m_x_val = m_x_axis->read(); + m_y_val = m_y_axis->read(); + m_btn_val = m_buttons->read(); +} + + +void hle_device_base::tra_callback() +{ + int const bit(transmit_register_get_data_bit() ? 0 : 1); + LOGBIT("Send bit !%d\n", bit); + output_rxd(bit); +} + + +void hle_device_base::tra_complete() +{ + check_inputs(); + + if (4U <= m_phase) + m_phase = 0U; + else + ++m_phase; + + switch (m_phase) + { + // sent second Y delta - send button state if anything changed + case 0U: + if (m_x_delta || m_y_delta || (m_btn_sent != m_btn_val)) + { + LOG("Sent Y delta (B=%X->%x X=%d Y=%d) - sending button state\n", + m_btn_sent, + m_btn_val, + m_x_delta, + m_y_delta); + transmit_register_setup((m_btn_sent = m_btn_val) | 0x80U); + } + else + { + LOG("Sent Y delta (B=%X->%x X=%d Y=%d) - nothing to send\n", + m_btn_sent, + m_btn_val, + m_x_delta, + m_y_delta); + } + break; + + // can wait after sending first Y delta + case 3U: + if (!m_x_delta && !m_y_delta && (m_btn_sent == m_btn_val)) + { + LOG("Sent Y delta (B=%X->%x X=%d Y=%d) - nothing to send\n", + m_btn_sent, + m_btn_val, + m_x_delta, + m_y_delta); + //break; uncommenting this causes problems with early versions of Solaris + } + case 1U: + LOG("Sent %s (B=%X->%x X=%d Y=%d) - sending X delta\n", + (1U == m_phase) ? "button state" : "Y delta", + m_btn_sent, + m_btn_val, + m_x_delta, + m_y_delta); + transmit_register_setup(extract_delta_byte(m_x_delta)); + break; + + // sent X delta - always follow with Y delta + case 2U: + case 4U: + LOG("Sent X delta (B=%X->%x X=%d Y=%d) - sending Y delta\n", + m_btn_sent, + m_btn_val, + m_x_delta, + m_y_delta); + transmit_register_setup(extract_delta_byte(m_y_delta)); + break; + } +} + + +void hle_device_base::check_inputs() +{ + // read new axis values and get difference + uint16_t const x_val(m_x_axis->read()); + uint16_t const y_val(m_y_axis->read()); + int16_t x_delta(x_val - m_x_val); + int16_t y_delta(y_val - m_y_val); + + // deal with wraparound + if (0x0800 <= x_delta) + x_delta -= 0x1000; + else if (-0x0800 >= x_delta) + x_delta += 0x1000; + if (0x0800 <= y_delta) + y_delta -= 0x1000; + else if (-0x0800 >= y_delta) + x_delta += 0x1000; + + // update state + m_x_delta += x_delta; + m_y_delta -= y_delta; + m_x_val = x_val; + m_y_val = y_val; + + // read new button values + m_btn_val = m_buttons->read(); +} + + + +/*************************************************************************** + 1200 BAUD HLE MOUSE DEVICE +***************************************************************************/ + +hle_1200baud_device::hle_1200baud_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + uint32_t clock) + : hle_device_base(mconfig, SUN_1200BAUD_HLE_MOUSE, tag, owner, clock, 8U) // FIXME: hack because z80scc isn't working properly +{ +} + + + +/*************************************************************************** + 4800 BAUD HLE MOUSE DEVICE +***************************************************************************/ + +hle_4800baud_device::hle_4800baud_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + uint32_t clock) + : hle_device_base(mconfig, SUN_4800BAUD_HLE_MOUSE, tag, owner, clock, 4U) +{ +} + +} } // namespace bus::sunmouse diff --git a/src/devices/bus/sunmouse/hlemouse.h b/src/devices/bus/sunmouse/hlemouse.h new file mode 100644 index 00000000000..6eb5cf44b63 --- /dev/null +++ b/src/devices/bus/sunmouse/hlemouse.h @@ -0,0 +1,82 @@ +// license:BSD-3-Clause +// copyright-holders:Vas Crabb +#ifndef MAME_DEVICES_SUNMOUSE_HLEMOUSE_H +#define MAME_DEVICES_SUNMOUSE_HLEMOUSE_H + +#pragma once + +#include "sunmouse.h" +#include "diserial.h" + + +namespace bus { namespace sunmouse { + +class hle_device_base + : public device_t + , public device_serial_interface + , public device_sun_mouse_port_interface +{ +public: + virtual ~hle_device_base() override; + + DECLARE_INPUT_CHANGED_MEMBER( input_changed ); + +protected: + // constructor/destructor + hle_device_base( + machine_config const &mconfig, + device_type type, + char const *tag, + device_t *owner, + uint32_t clock, + unsigned multiplier); + + // device overrides + virtual ioport_constructor device_input_ports() const override; + virtual void device_start() override; + virtual void device_reset() override; + + // device_serial_interface overrides + virtual void tra_callback() override; + virtual void tra_complete() override; + +private: + void check_inputs(); + + required_ioport m_buttons, m_x_axis, m_y_axis; + unsigned const m_multiplier; + int32_t m_x_delta, m_y_delta; + uint16_t m_x_val, m_y_val; + uint8_t m_btn_sent, m_btn_val; + uint8_t m_phase; +}; + + +class hle_1200baud_device : public hle_device_base +{ +public: + hle_1200baud_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + uint32_t clock); +}; + + +class hle_4800baud_device : public hle_device_base +{ +public: + hle_4800baud_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + uint32_t clock); +}; + +} } // namespace bus::sunmouse + + +DECLARE_DEVICE_TYPE_NS(SUN_1200BAUD_HLE_MOUSE, bus::sunmouse, hle_1200baud_device) +DECLARE_DEVICE_TYPE_NS(SUN_4800BAUD_HLE_MOUSE, bus::sunmouse, hle_4800baud_device) + +#endif // MAME_DEVICES_SUNMOUSE_HLEMOUSE_H diff --git a/src/devices/bus/sunmouse/sunmouse.cpp b/src/devices/bus/sunmouse/sunmouse.cpp new file mode 100644 index 00000000000..9b59529c54a --- /dev/null +++ b/src/devices/bus/sunmouse/sunmouse.cpp @@ -0,0 +1,184 @@ +// license:BSD-3-Clause +// copyright-holders:Vas Crabb +/* + Sun mouse port + + Before USB, Sun used an asynchronous serial mouse protocol. Data is + transmitted at TTL levels using an asynchronous serial protocol. + The mouse RxD line is pulled up by the host and driven low by an + open collector driver in the mouse for the mark (1) condition. This + means that if no mouse is connected, the host will see a break + condition. The protocol is mostly compatible with the Mouse Systems + "non-rotatable" protocol. + + Most Sun mouse port devices transmit data at 1,200 Baud. However, + some devices transmit at 4,800 Baud, and it's possible to modify any + Sun Type 5 mouse for 4,800 Baud operation. Solaris 2.3 or later is + required to support a 4,800 Baud mouse. + + From the Sun 2/50 onwards, the keyboard and mouse share a single + connector, either using a splitter adapter, or by plugging the mouse + into a pass-through connector on the keyboard. + + Type 3 female DA-15 connector on host (introduced on Sun 2/50): + 1: keyboard RxD 9: GND + 2: GND 10: +5V + 3: keyboard TxD 11: +5V + 4: GND 12: +5V + 5: mouse RxD 13: +5V + 6: GND 14: +5V + 7: mouse TxD 15: +5V + 8: GND + + Type 4 female Mini-DIN-8 connector on host (introduced on Sun 3/80): + 1: GND 3: +5V 6: keyboard RxD + 2: GND 4: mouse RxD 7: mouse TxD + 5: keyboard TxD 8: +5V + + Type 5 female Mini-DIN-8 connector on host: + 1: GND 3: +5V 6: keyboard RxD + 2: GND 4: mouse RxD 7: power key + 5: keyboard TxD 8: +5V + + Type 5 and later sacrifice the TxD line from the host to the mouse + in favour of a dedicated line for the soft power key. It was never + used for anything useful with standard Sun peripherals anyway. + + Sun 2 and Sun 3 used an optical mouse made by Mouse Systems. The + colour varied (usually black for Sun 2 and white for Sun 3). They + require a Mouse Systems optical mouse pad to work correctly. The + later Sun optical mouse for Sun 4 requires a different pad with + thinner stripes. + + The Logitech Trackman T-CB1 is a compatible replacement for a Sun + Type 4 or Type 5 mouse, made at Sun's request. + + Known Sun mouse part numbers: + * 370-1169: Type 4 optical mouse (manufactured by Mouse Systems) + * 370-1398: Type 5 optical mouse (bridge JP2 for 4,800 Baud) + * 370-1586-01: SPARCstation Voyager 4,800 Baud mouse + * 370-1586-02: Type 5 opto-mechanical mouse + * 370-1586-03: Type 5 opto-mechanical mouse + + TODO: + * Confirm polarity of TxD signal from host to mouse. + * Dump mouse microcontrollers. +*/ + +#include "emu.h" +#include "sunmouse.h" + + +DEFINE_DEVICE_TYPE(SUNMOUSE_PORT, sun_mouse_port_device, "sunmouse", "Sun Mouse Port") + + +int const device_sun_mouse_port_interface::START_BIT_COUNT; +int const device_sun_mouse_port_interface::DATA_BIT_COUNT; +device_serial_interface::parity_t const device_sun_mouse_port_interface::PARITY; +device_serial_interface::stop_bits_t const device_sun_mouse_port_interface::STOP_BITS; +int const device_sun_mouse_port_interface::BAUD; + + + +sun_mouse_port_device::sun_mouse_port_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + uint32_t clock) + : sun_mouse_port_device(mconfig, SUNMOUSE_PORT, tag, owner, clock) +{ +} + + +sun_mouse_port_device::sun_mouse_port_device( + machine_config const &mconfig, + device_type type, + char const *tag, + device_t *owner, + uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_slot_interface(mconfig, *this) + , m_rxd(0) + , m_rxd_handler(*this) + , m_dev(nullptr) +{ +} + + +sun_mouse_port_device::~sun_mouse_port_device() +{ +} + + +void sun_mouse_port_device::device_config_complete() +{ + m_dev = dynamic_cast<device_sun_mouse_port_interface *>(get_card_device()); +} + + +void sun_mouse_port_device::device_validity_check(validity_checker &valid) const +{ + device_t *const card(get_card_device()); + if (card && !dynamic_cast<device_sun_mouse_port_interface *>(card)) + { + osd_printf_error( + "Card device %s (%s) does not implement device_sun_mouse_port_interface\n", + card->tag(), + card->name()); + } +} + + +void sun_mouse_port_device::device_resolve_objects() +{ + m_rxd = 1; + + m_rxd_handler.resolve_safe(); +} + + +void sun_mouse_port_device::device_start() +{ + if (get_card_device() && !m_dev) + { + throw emu_fatalerror( + "Card device %s (%s) does not implement device_sun_mouse_port_interface\n", + get_card_device()->tag(), + get_card_device()->name()); + } + + save_item(NAME(m_rxd)); + + if (!m_dev) + m_rxd_handler(m_rxd = 0); +} + + +WRITE_LINE_MEMBER( sun_mouse_port_device::write_txd ) +{ + if (m_dev) + m_dev->input_txd(state ? 0 : 1); +} + + + +device_sun_mouse_port_interface::device_sun_mouse_port_interface(machine_config const &mconfig, device_t &device) + : device_slot_card_interface(mconfig, device) + , m_port(dynamic_cast<sun_mouse_port_device *>(device.owner())) +{ +} + + +device_sun_mouse_port_interface::~device_sun_mouse_port_interface() +{ +} + + + +#include "hlemouse.h" + +void default_sun_mouse_devices(device_slot_interface &device) +{ + device.option_add("hle1200", SUN_1200BAUD_HLE_MOUSE); + device.option_add("hle4800", SUN_4800BAUD_HLE_MOUSE); +} diff --git a/src/devices/bus/sunmouse/sunmouse.h b/src/devices/bus/sunmouse/sunmouse.h new file mode 100644 index 00000000000..ff7dd9ca86a --- /dev/null +++ b/src/devices/bus/sunmouse/sunmouse.h @@ -0,0 +1,84 @@ +// license:BSD-3-Clause +// copyright-holders:Vas Crabb +#ifndef MAME_BUS_SUNMOUSE_SUNMOUSE_H +#define MAME_BUS_SUNMOUSE_SUNMOUSE_H + +#pragma once + +#include "diserial.h" + + +class device_sun_mouse_port_interface; + + +class sun_mouse_port_device : public device_t, public device_slot_interface +{ + friend class device_sun_mouse_port_interface; + +public: + template <typename T> + sun_mouse_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) + : sun_mouse_port_device(mconfig, tag, owner, 0) + { + option_reset(); + opts(*this); + set_default_option(dflt); + set_fixed(false); + } + sun_mouse_port_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); + virtual ~sun_mouse_port_device(); + + // configuration helpers + auto rxd_handler() { return m_rxd_handler.bind(); } + + DECLARE_WRITE_LINE_MEMBER( write_txd ); + + DECLARE_READ_LINE_MEMBER( rxd_r ) { return m_rxd; } + +protected: + sun_mouse_port_device(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, uint32_t clock); + + virtual void device_config_complete() override; + virtual void device_validity_check(validity_checker &valid) const override; + virtual void device_resolve_objects() override; + virtual void device_start() override; + + int m_rxd; + + devcb_write_line m_rxd_handler; + +private: + device_sun_mouse_port_interface *m_dev; +}; + + +class device_sun_mouse_port_interface : public device_slot_card_interface +{ + friend class sun_mouse_port_device; + +public: + virtual ~device_sun_mouse_port_interface() override; + +protected: + device_sun_mouse_port_interface(machine_config const &mconfig, device_t &device); + + virtual DECLARE_WRITE_LINE_MEMBER( input_txd ) { } + + DECLARE_WRITE_LINE_MEMBER( output_rxd ) { m_port->m_rxd_handler(m_port->m_rxd = state ? 0 : 1); } + + sun_mouse_port_device *m_port; + + static constexpr int START_BIT_COUNT = 1; + static constexpr int DATA_BIT_COUNT = 8; + static constexpr device_serial_interface::parity_t PARITY = device_serial_interface::PARITY_NONE; + static constexpr device_serial_interface::stop_bits_t STOP_BITS = device_serial_interface::STOP_BITS_1; + static constexpr int BAUD = 1'200; +}; + + +DECLARE_DEVICE_TYPE(SUNMOUSE_PORT, sun_mouse_port_device) + + +void default_sun_mouse_devices(device_slot_interface &device); + +#endif // MAME_BUS_SUNMOUSE_SUNMOUSE_H diff --git a/src/devices/bus/ti99/peb/bwg.cpp b/src/devices/bus/ti99/peb/bwg.cpp index 877485174f2..c7aa2c903b7 100644 --- a/src/devices/bus/ti99/peb/bwg.cpp +++ b/src/devices/bus/ti99/peb/bwg.cpp @@ -482,29 +482,40 @@ void snug_bwg_device::set_drive() { LOGMASKED(LOG_CRU, "new DSEL = %d\n", m_DSEL); - if ((m_DSEL != 0) && (m_DSEL != 1) && (m_DSEL != 2) && (m_DSEL != 4) && (m_DSEL != 8)) + int bits = m_DSEL & 0x0f; + int num = -1; + + // If the selected floppy drive is not attached, remove that line + if (m_floppy[3] == nullptr) bits &= 0x07; // 0111 + if (m_floppy[2] == nullptr) bits &= 0x0b; // 1011 + if (m_floppy[1] == nullptr) bits &= 0x0d; // 1101 + if (m_floppy[0] == nullptr) bits &= 0x0e; // 1110 + + if ((bits != 0) && (bits != 1) && (bits != 2) && (bits != 4) && (bits != 8)) LOGMASKED(LOG_WARN, "Warning - multiple drives selected\n"); // The schematics do not reveal any countermeasures against multiple selection // so we assume that the highest value wins. - int bits = m_DSEL & 0x0f; - int i = -1; - - while (bits != 0) + if (bits==0) { - bits >>= 1; - i++; - } - if (i != -1) - { - m_current_floppy = m_floppy[i]; - LOGMASKED(LOG_CRU, "Selected floppy %d\n", i); + m_current_floppy = nullptr; + LOGMASKED(LOG_CRU, "All drives deselected\n"); } else { - m_current_floppy = nullptr; - LOGMASKED(LOG_CRU, "All drives deselected\n"); + if ((bits & 0x08)!=0) num = 3; + else + { + if ((bits & 0x04)!=0) num = 2; + else + { + if ((bits & 0x02)!=0) num = 1; + else num = 0; + } + } + LOGMASKED(LOG_CRU, "Selected floppy DSK%d\n", num+1); + m_current_floppy = m_floppy[num]; } m_wd1773->set_floppy(m_current_floppy); } diff --git a/src/devices/bus/ti99/peb/ti_fdc.cpp b/src/devices/bus/ti99/peb/ti_fdc.cpp index 7fd4192757c..530dc71d987 100644 --- a/src/devices/bus/ti99/peb/ti_fdc.cpp +++ b/src/devices/bus/ti99/peb/ti_fdc.cpp @@ -273,7 +273,14 @@ WRITE_LINE_MEMBER(ti_fdc_device::sidsel_w) void ti_fdc_device::set_drive() { - switch (m_DSEL) + int dsel = m_DSEL; + + // If the selected floppy drive is not attached, remove that line + if (m_floppy[2] == nullptr) dsel &= 0x03; // 011 + if (m_floppy[1] == nullptr) dsel &= 0x05; // 101 + if (m_floppy[0] == nullptr) dsel &= 0x06; // 110 + + switch (dsel) { case 0: m_current = NONE; @@ -398,6 +405,8 @@ void ti_fdc_device::device_reset() void ti_fdc_device::device_config_complete() { // Seems to be null when doing a "-listslots" + for (auto &elem : m_floppy) + elem = nullptr; if (subdevice("0")!=nullptr) m_floppy[0] = static_cast<floppy_image_device*>(subdevice("0")->subdevices().first()); if (subdevice("1")!=nullptr) m_floppy[1] = static_cast<floppy_image_device*>(subdevice("1")->subdevices().first()); if (subdevice("2")!=nullptr) m_floppy[2] = static_cast<floppy_image_device*>(subdevice("2")->subdevices().first()); diff --git a/src/devices/cpu/alto2/a2disk.cpp b/src/devices/cpu/alto2/a2disk.cpp index b9d44dacc9f..fa9392695dc 100644 --- a/src/devices/cpu/alto2/a2disk.cpp +++ b/src/devices/cpu/alto2/a2disk.cpp @@ -89,8 +89,8 @@ enum { #if ALTO2_DEBUG /** @brief human readable names for the KADR<- modes */ -static const char *rwc_name[4] = {"read", "check", "write", "write2"}; -static const char* raise_lower[2] = {"/","\\"}; +static char const *const rwc_name[4] = {"read", "check", "write", "write2"}; +static char const *const raise_lower[2] = {"/","\\"}; #endif /** diff --git a/src/devices/cpu/alto2/a2emu.cpp b/src/devices/cpu/alto2/a2emu.cpp index c5a4caccb76..a7ea40a6aca 100644 --- a/src/devices/cpu/alto2/a2emu.cpp +++ b/src/devices/cpu/alto2/a2emu.cpp @@ -489,8 +489,8 @@ void alto2_cpu_device::f2_early_acdest() #if ALTO2_DEBUG void alto2_cpu_device::bitblt_info() { - static const char *type_name[4] = {"bitmap","complement","and gray","gray"}; - static const char *oper_name[4] = {"replace","paint","invert","erase"}; + static char const *const type_name[4] = {"bitmap","complement","and gray","gray"}; + static char const *const oper_name[4] = {"replace","paint","invert","erase"}; int bbt = m_r[rsel_ac2]; int val = debug_read_mem(bbt); diff --git a/src/devices/cpu/arc/arcdasm.cpp b/src/devices/cpu/arc/arcdasm.cpp index fa7b6f2028e..218352cd56c 100644 --- a/src/devices/cpu/arc/arcdasm.cpp +++ b/src/devices/cpu/arc/arcdasm.cpp @@ -15,7 +15,7 @@ /*****************************************************************************/ -const char *const arc_disassembler::basic[0x20] = +char const *const arc_disassembler::basic[0x20] = { /* 00 */ "LD r+r", /* 01 */ "LD r+o", @@ -51,7 +51,7 @@ const char *const arc_disassembler::basic[0x20] = /* 1f */ "MIN" }; -const char *arc_disassembler::conditions[0x20] = +char const *const arc_disassembler::conditions[0x20] = { /* 00 */ "AL", // (aka RA - Always) /* 01 */ "EQ", // (aka Z - Zero @@ -87,7 +87,7 @@ const char *arc_disassembler::conditions[0x20] = /* 1f */ "0x1f Reserved" }; -const char *arc_disassembler::delaytype[0x4] = +char const *const arc_disassembler::delaytype[0x4] = { "ND", // NO DELAY - execute next instruction only when NOT jumping "D", // always execute next instruction @@ -95,7 +95,7 @@ const char *arc_disassembler::delaytype[0x4] = "Res!", // reserved / invalid }; -const char *arc_disassembler::regnames[0x40] = +char const *const arc_disassembler::regnames[0x40] = { /* 0x00 */ "r00", /* 0x01 */ "r01", diff --git a/src/devices/cpu/arc/arcdasm.h b/src/devices/cpu/arc/arcdasm.h index a6bfe559f25..19d774fab05 100644 --- a/src/devices/cpu/arc/arcdasm.h +++ b/src/devices/cpu/arc/arcdasm.h @@ -21,10 +21,10 @@ public: virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; private: - static const char *const basic[0x20]; - static const char *conditions[0x20]; - static const char *delaytype[0x4]; - static const char *regnames[0x40]; + static char const *const basic[0x20]; + static char const *const conditions[0x20]; + static char const *const delaytype[0x4]; + static char const *const regnames[0x40]; }; diff --git a/src/devices/cpu/arm/arm.cpp b/src/devices/cpu/arm/arm.cpp index c2036ab166d..1ad73f69684 100644 --- a/src/devices/cpu/arm/arm.cpp +++ b/src/devices/cpu/arm/arm.cpp @@ -563,7 +563,7 @@ void arm_cpu_device::device_start() void arm_cpu_device::state_string_export(const device_state_entry &entry, std::string &str) const { - static const char *s[4] = { "USER", "FIRQ", "IRQ ", "SVC " }; + static char const *const s[4] = { "USER", "FIRQ", "IRQ ", "SVC " }; switch (entry.index()) { diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp index 280686f5bfa..75706bb1e7b 100644 --- a/src/devices/cpu/hphybrid/hphybrid.cpp +++ b/src/devices/cpu/hphybrid/hphybrid.cpp @@ -69,44 +69,71 @@ enum { HPHYBRID_R37 }; -#define BIT_MASK(n) (1U << (n)) +// Bit manipulation +namespace { + template<typename T> constexpr T BIT_MASK(unsigned n) + { + return (T)1U << n; + } -// Macros to clear/set single bits -#define BIT_CLR(w , n) ((w) &= ~BIT_MASK(n)) -#define BIT_SET(w , n) ((w) |= BIT_MASK(n)) + template<typename T> void BIT_CLR(T& w , unsigned n) + { + w &= ~BIT_MASK<T>(n); + } + + template<typename T> void BIT_SET(T& w , unsigned n) + { + w |= BIT_MASK<T>(n); + } +} // Bits in m_flags -#define HPHYBRID_C_BIT 0 // Carry/extend -#define HPHYBRID_O_BIT 1 // Overflow -#define HPHYBRID_CB_BIT 2 // Cb -#define HPHYBRID_DB_BIT 3 // Db -#define HPHYBRID_INTEN_BIT 4 // Interrupt enable -#define HPHYBRID_DMAEN_BIT 5 // DMA enable -#define HPHYBRID_DMADIR_BIT 6 // DMA direction (1 = OUT) -#define HPHYBRID_HALT_BIT 7 // Halt flag -#define HPHYBRID_IRH_BIT 8 // IRH requested -#define HPHYBRID_IRL_BIT 9 // IRL requested -#define HPHYBRID_IRH_SVC_BIT 10 // IRH in service -#define HPHYBRID_IRL_SVC_BIT 11 // IRL in service -#define HPHYBRID_DMAR_BIT 12 // DMA request -#define HPHYBRID_STS_BIT 13 // Status flag -#define HPHYBRID_FLG_BIT 14 // "Flag" flag -#define HPHYBRID_DC_BIT 15 // Decimal carry -#define HPHYBRID_IM_BIT 16 // Interrupt mode - -#define HPHYBRID_IV_MASK 0xfff0 // IV mask - -#define HP_REG_SE_MASK 0x000f +enum : unsigned { + HPHYBRID_C_BIT = 0, // Carry/extend + HPHYBRID_O_BIT = 1, // Overflow + HPHYBRID_CB_BIT = 2, // Cb + HPHYBRID_DB_BIT = 3, // Db + HPHYBRID_INTEN_BIT = 4, // Interrupt enable + HPHYBRID_DMAEN_BIT = 5, // DMA enable + HPHYBRID_DMADIR_BIT = 6, // DMA direction (1 = OUT) + HPHYBRID_HALT_BIT = 7, // Halt flag + HPHYBRID_IRH_BIT = 8, // IRH requested + HPHYBRID_IRL_BIT = 9, // IRL requested + HPHYBRID_IRH_SVC_BIT = 10, // IRH in service + HPHYBRID_IRL_SVC_BIT = 11, // IRL in service + HPHYBRID_DMAR_BIT = 12, // DMA request + HPHYBRID_STS_BIT = 13, // Status flag + HPHYBRID_FLG_BIT = 14, // "Flag" flag + HPHYBRID_DC_BIT = 15, // Decimal carry + HPHYBRID_IM_BIT = 16 // Interrupt mode +}; + +constexpr uint16_t HP_REG_IV_MASK = 0xfff0; // IV mask +constexpr uint16_t HP_REG_PA_MASK = 0x000f; // PA mask +constexpr uint16_t HP_REG_SE_MASK = 0x000f; // SE mask #define CURRENT_PA (m_reg_PA[ 0 ]) -#define HP_RESET_ADDR 0x0020 +constexpr uint16_t HP_RESET_ADDR = 0x0020; // Part of r32-r37 that is actually output as address extension (6 bits of "BSC": block select code) -#define BSC_REG_MASK 0x3f +constexpr uint16_t BSC_REG_MASK = 0x3f; + +// Address mask of 15-bit processor +constexpr uint16_t ADDR_MASK_15BIT = 0x7fff; + +// Mask of MSB of registers +constexpr uint16_t REG_MSB_MASK = BIT_MASK<uint16_t>(15); + +// Memory, I/O & register access timings +constexpr unsigned DEF_MEM_R_CYCLES = 4; // Default memory read cycles +constexpr unsigned DEF_MEM_W_CYCLES = 4; // Default memory write cycles +constexpr unsigned REGISTER_RW_CYCLES = 5; // Internal register R/W cycles +constexpr unsigned IO_RW_CYCLES = 7; // I/O R/W cycles DEFINE_DEVICE_TYPE(HP_5061_3001, hp_5061_3001_cpu_device, "5061_3001", "Hewlett-Packard HP-5061-3001") DEFINE_DEVICE_TYPE(HP_5061_3011, hp_5061_3011_cpu_device, "5061_3011", "Hewlett-Packard HP-5061-3011") +DEFINE_DEVICE_TYPE(HP_09825_67907, hp_09825_67907_cpu_device, "09825_67907", "Hewlett-Packard HP-09825-67907") WRITE_LINE_MEMBER(hp_hybrid_cpu_device::dmar_w) { @@ -148,9 +175,15 @@ uint8_t hp_hybrid_cpu_device::pa_r(void) const hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t addrwidth) : cpu_device(mconfig, type, tag, owner, clock) , m_pa_changed_func(*this) + , m_addr_mask((1U << addrwidth) - 1) + , m_relative_mode(true) + , m_r_cycles(DEF_MEM_R_CYCLES) + , m_w_cycles(DEF_MEM_W_CYCLES) + , m_boot_mode(false) , m_program_config("program", ENDIANNESS_BIG, 16, addrwidth, -1) , m_io_config("io", ENDIANNESS_BIG, 16, 6, -1) { + m_addr_mask_low16 = uint16_t(m_addr_mask & 0xffff); } device_memory_interface::space_config_vector hp_hybrid_cpu_device::memory_space_config() const @@ -163,24 +196,6 @@ device_memory_interface::space_config_vector hp_hybrid_cpu_device::memory_space_ void hp_hybrid_cpu_device::device_start() { - m_reg_A = 0; - m_reg_B = 0; - m_reg_P = HP_RESET_ADDR; - m_reg_R = 0; - m_reg_C = 0; - m_reg_D = 0; - m_reg_IV = 0; - m_reg_PA[ 0 ] = 0; - m_reg_PA[ 1 ] = 0; - m_reg_PA[ 2 ] = 0; - m_reg_W = 0; - m_flags = 0; - m_dmapa = 0; - m_dmama = 0; - m_dmac = 0; - m_reg_I = 0; - m_forced_bsc_25 = false; - { state_add(HPHYBRID_A, "A", m_reg_A); state_add(HPHYBRID_B, "B", m_reg_B); @@ -193,8 +208,8 @@ void hp_hybrid_cpu_device::device_start() state_add(STATE_GENSP, "GENSP", m_reg_R).noshow(); state_add(HPHYBRID_IV, "IV", m_reg_IV); state_add(HPHYBRID_PA, "PA", m_reg_PA[ 0 ]); - state_add(HPHYBRID_W, "W", m_reg_W).noshow(); - state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%9s"); + state_add(HPHYBRID_W, "W", m_reg_W).noshow(); + state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%12s"); state_add(HPHYBRID_DMAPA , "DMAPA" , m_dmapa).noshow(); state_add(HPHYBRID_DMAMA , "DMAMA" , m_dmama).noshow(); state_add(HPHYBRID_DMAC , "DMAC" , m_dmac).noshow(); @@ -230,9 +245,27 @@ void hp_hybrid_cpu_device::device_start() void hp_hybrid_cpu_device::device_reset() { + m_reg_A = 0; + m_reg_B = 0; m_reg_P = HP_RESET_ADDR; - m_reg_I = fetch(); + m_reg_R = 0; + m_reg_C = 0; + m_reg_D = 0; + m_reg_IV = 0; + m_reg_PA[ 0 ] = 0; + m_reg_PA[ 1 ] = 0; + m_reg_PA[ 2 ] = 0; + m_reg_W = 0; m_flags = 0; + m_dmapa = 0; + m_dmama = 0; + m_dmac = 0; + m_forced_bsc_25 = m_boot_mode; + + m_last_pa = ~0; + update_pa(); + + m_reg_I = fetch(); } void hp_hybrid_cpu_device::execute_run() @@ -272,30 +305,36 @@ uint16_t hp_hybrid_cpu_device::execute_one(uint16_t opcode) { if ((opcode & 0x7fe0) == 0x7000) { // EXE - m_icount -= 8; - // Indirect addressing in EXE instruction seems to use AEC case A instead of case C - // (because it's an opcode fetch) - uint16_t reg = RM(opcode & 0x1f); + m_icount -= 2; + uint16_t fetch_addr = opcode & 0x1f; if (BIT(opcode , 15)) { - m_icount -= 6; - return RM(add_mae(AEC_CASE_A , reg)); - } else { - return reg; + fetch_addr = get_indirect_target(fetch_addr); } + // Indirect addressing in EXE instruction seems to use AEC case A instead of case C + // (because it's an opcode fetch) + return RM(add_mae(AEC_CASE_A , fetch_addr)); } else { - m_reg_P = execute_one_sub(opcode); + uint16_t next_P; + if (!execute_one_bpc(opcode , next_P) && + !execute_no_bpc(opcode , next_P)) { + // Unrecognized instruction, make it a NOP + logerror("hp_hybrid: unknown opcode %04x @ %06x\n" , opcode , m_genpc); + next_P = m_reg_P + 1; + } + m_reg_P = next_P & m_addr_mask_low16; return fetch(); } } /** - * Execute 1 instruction (except EXE) + * Execute 1 BPC instruction (except EXE) * * @param opcode Opcode to be executed (no EXE instructions) + * @param[out] next_pc new value of P register * - * @return new value of P register + * @return true iff instruction executed */ -uint16_t hp_hybrid_cpu_device::execute_one_sub(uint16_t opcode) +bool hp_hybrid_cpu_device::execute_one_bpc(uint16_t opcode , uint16_t& next_pc) { uint32_t ea; uint16_t tmp; @@ -303,193 +342,220 @@ uint16_t hp_hybrid_cpu_device::execute_one_sub(uint16_t opcode) switch (opcode & 0x7800) { case 0x0000: // LDA - m_icount -= 13; + m_icount -= 1; m_reg_A = RM(get_ea(opcode)); break; case 0x0800: // LDB - m_icount -= 13; + m_icount -= 1; m_reg_B = RM(get_ea(opcode)); break; case 0x1000: // CPA - m_icount -= 16; + m_icount -= 4; if (m_reg_A != RM(get_ea(opcode))) { // Skip next instruction - return m_reg_P + 2; + next_pc = m_reg_P + 2; + return true; } break; case 0x1800: // CPB - m_icount -= 16; + m_icount -= 4; if (m_reg_B != RM(get_ea(opcode))) { // Skip next instruction - return m_reg_P + 2; + next_pc = m_reg_P + 2; + return true; } break; case 0x2000: // ADA - m_icount -= 13; + m_icount -= 1; do_add(m_reg_A , RM(get_ea(opcode))); break; case 0x2800: // ADB - m_icount -= 13; + m_icount -= 1; do_add(m_reg_B , RM(get_ea(opcode))); break; case 0x3000: // STA - m_icount -= 13; + m_icount -= 1; WM(get_ea(opcode) , m_reg_A); break; case 0x3800: // STB - m_icount -= 13; + m_icount -= 1; WM(get_ea(opcode) , m_reg_B); break; case 0x4000: // JSM - m_icount -= 17; - WM(AEC_CASE_C , ++m_reg_R , m_reg_P); - return remove_mae(get_ea(opcode)); + m_icount -= 5; + m_reg_R = (m_reg_R + 1) & m_addr_mask_low16; + WM(AEC_CASE_C , m_reg_R , m_reg_P); + next_pc = remove_mae(get_ea(opcode)); + return true; case 0x4800: // ISZ - m_icount -= 19; + m_icount -= 1; ea = get_ea(opcode); tmp = RM(ea) + 1; WM(ea , tmp); if (tmp == 0) { // Skip next instruction - return m_reg_P + 2; + next_pc = m_reg_P + 2; + return true; } break; case 0x5000: // AND - m_icount -= 13; + m_icount -= 1; m_reg_A &= RM(get_ea(opcode)); break; case 0x5800: // DSZ - m_icount -= 19; + m_icount -= 1; ea = get_ea(opcode); tmp = RM(ea) - 1; WM(ea , tmp); if (tmp == 0) { // Skip next instruction - return m_reg_P + 2; + next_pc = m_reg_P + 2; + return true; } break; case 0x6000: // IOR - m_icount -= 13; + m_icount -= 1; m_reg_A |= RM(get_ea(opcode)); break; case 0x6800: // JMP - m_icount -= 8; - return remove_mae(get_ea(opcode)); + m_icount -= 2; + next_pc = remove_mae(get_ea(opcode)); + return true; default: switch (opcode & 0xfec0) { case 0x7400: // RZA // SZA - m_icount -= 14; - return get_skip_addr(opcode , m_reg_A == 0); + m_icount -= 8; + next_pc = get_skip_addr(opcode , m_reg_A == 0); + return true; case 0x7440: // RIA // SIA - m_icount -= 14; - return get_skip_addr(opcode , m_reg_A++ == 0); + m_icount -= 8; + next_pc = get_skip_addr(opcode , m_reg_A++ == 0); + return true; case 0x7480: // SFS // SFC - m_icount -= 14; - return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_FLG_BIT)); + m_icount -= 8; + next_pc = get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_FLG_BIT)); + return true; + + case 0x74c0: + // SDS + // SDC + m_icount -= 8; + next_pc = get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_DC_BIT)); + return true; case 0x7C00: // RZB // SZB - m_icount -= 14; - return get_skip_addr(opcode , m_reg_B == 0); + m_icount -= 8; + next_pc = get_skip_addr(opcode , m_reg_B == 0); + return true; case 0x7C40: // RIB // SIB - m_icount -= 14; - return get_skip_addr(opcode , m_reg_B++ == 0); + m_icount -= 8; + next_pc = get_skip_addr(opcode , m_reg_B++ == 0); + return true; case 0x7c80: // SSS // SSC - m_icount -= 14; - return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_STS_BIT)); + m_icount -= 8; + next_pc = get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_STS_BIT)); + return true; case 0x7cc0: // SHS // SHC - m_icount -= 14; - return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_HALT_BIT)); + m_icount -= 8; + next_pc = get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_HALT_BIT)); + return true; default: switch (opcode & 0xfe00) { case 0x7600: // SLA // RLA - m_icount -= 14; - return get_skip_addr_sc(opcode , m_reg_A , 0); + m_icount -= 8; + next_pc = get_skip_addr_sc(opcode , m_reg_A , 0); + return true; case 0x7e00: // SLB // RLB - m_icount -= 14; - return get_skip_addr_sc(opcode , m_reg_B , 0); + m_icount -= 8; + next_pc = get_skip_addr_sc(opcode , m_reg_B , 0); + return true; case 0xf400: // SAP // SAM - m_icount -= 14; - return get_skip_addr_sc(opcode , m_reg_A , 15); + m_icount -= 8; + next_pc = get_skip_addr_sc(opcode , m_reg_A , 15); + return true; case 0xf600: // SOC // SOS - m_icount -= 14; - return get_skip_addr_sc(opcode , m_flags , HPHYBRID_O_BIT); + m_icount -= 8; + next_pc = get_skip_addr_sc(opcode , m_flags , HPHYBRID_O_BIT); + return true; case 0xfc00: // SBP // SBM - m_icount -= 14; - return get_skip_addr_sc(opcode , m_reg_B , 15); + m_icount -= 8; + next_pc = get_skip_addr_sc(opcode , m_reg_B , 15); + return true; case 0xfe00: // SEC // SES - m_icount -= 14; - return get_skip_addr_sc(opcode , m_flags , HPHYBRID_C_BIT); + m_icount -= 8; + next_pc = get_skip_addr_sc(opcode , m_flags , HPHYBRID_C_BIT); + return true; default: switch (opcode & 0xfff0) { case 0xf100: // AAR tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); // A shift by 16 positions is equivalent to a shift by 15 tmp = tmp > 15 ? 15 : tmp; m_reg_A = ((m_reg_A ^ 0x8000) >> tmp) - (0x8000 >> tmp); @@ -498,7 +564,7 @@ uint16_t hp_hybrid_cpu_device::execute_one_sub(uint16_t opcode) case 0xf900: // ABR tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); tmp = tmp > 15 ? 15 : tmp; m_reg_B = ((m_reg_B ^ 0x8000) >> tmp) - (0x8000 >> tmp); break; @@ -506,161 +572,123 @@ uint16_t hp_hybrid_cpu_device::execute_one_sub(uint16_t opcode) case 0xf140: // SAR tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); m_reg_A >>= tmp; break; case 0xf940: // SBR tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); m_reg_B >>= tmp; break; case 0xf180: // SAL tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); m_reg_A <<= tmp; break; case 0xf980: // SBL tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); m_reg_B <<= tmp; break; case 0xf1c0: // RAR tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); m_reg_A = (m_reg_A >> tmp) | (m_reg_A << (16 - tmp)); break; case 0xf9c0: // RBR tmp = (opcode & 0xf) + 1; - m_icount -= (9 + tmp); + m_icount -= (3 + tmp); m_reg_B = (m_reg_B >> tmp) | (m_reg_B << (16 - tmp)); break; default: - if ((opcode & 0xf760) == 0x7160) { - // Place/withdraw instructions - m_icount -= 23; - do_pw(opcode); - } else if ((opcode & 0xff80) == 0xf080) { + if ((opcode & 0xff80) == 0xf080) { // RET - m_icount -= 16; + m_icount -= 4; if (BIT(opcode , 6)) { // Pop PA stack if (BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) { BIT_CLR(m_flags , HPHYBRID_IRH_SVC_BIT); memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS); - m_pa_changed_func((uint8_t)CURRENT_PA); + update_pa(); } else if (BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) { BIT_CLR(m_flags , HPHYBRID_IRL_SVC_BIT); memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS); - m_pa_changed_func((uint8_t)CURRENT_PA); + update_pa(); } - tmp = RM(AEC_CASE_C , m_reg_R--) + (opcode & 0x1f); + } + tmp = RM(AEC_CASE_C , m_reg_R) + (opcode & 0x1f); + m_reg_R = (m_reg_R - 1) & m_addr_mask_low16; + if (BIT(opcode , 6)) { BIT_CLR(m_flags, HPHYBRID_IM_BIT); - } else { - tmp = RM(AEC_CASE_C , m_reg_R--) + (opcode & 0x1f); } - return BIT(opcode , 5) ? tmp - 0x20 : tmp; + next_pc = BIT(opcode , 5) ? tmp - 0x20 : tmp; + return true; } else { switch (opcode) { - case 0x7100: - // SDO - m_icount -= 12; - BIT_SET(m_flags , HPHYBRID_DMADIR_BIT); - break; - - case 0x7108: - // SDI - m_icount -= 12; - BIT_CLR(m_flags , HPHYBRID_DMADIR_BIT); - break; - case 0x7110: // EIR - m_icount -= 12; + m_icount -= 6; BIT_SET(m_flags , HPHYBRID_INTEN_BIT); break; case 0x7118: // DIR - m_icount -= 12; + m_icount -= 6; BIT_CLR(m_flags , HPHYBRID_INTEN_BIT); break; case 0x7120: // DMA - m_icount -= 12; + m_icount -= 6; BIT_SET(m_flags , HPHYBRID_DMAEN_BIT); break; case 0x7138: // DDR - m_icount -= 12; + m_icount -= 6; BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT); break; - case 0x7140: - // DBL - m_icount -= 12; - BIT_CLR(m_flags , HPHYBRID_DB_BIT); - break; - - case 0x7148: - // CBL - m_icount -= 12; - BIT_CLR(m_flags , HPHYBRID_CB_BIT); - break; - - case 0x7150: - // DBU - m_icount -= 12; - BIT_SET(m_flags , HPHYBRID_DB_BIT); - break; - - case 0x7158: - // CBU - m_icount -= 12; - BIT_SET(m_flags , HPHYBRID_CB_BIT); - break; - case 0xf020: // TCA - m_icount -= 9; + m_icount -= 3; m_reg_A = ~m_reg_A; do_add(m_reg_A , 1); break; case 0xf060: // CMA - m_icount -= 9; + m_icount -= 3; m_reg_A = ~m_reg_A; break; case 0xf820: // TCB - m_icount -= 9; + m_icount -= 3; m_reg_B = ~m_reg_B; do_add(m_reg_B , 1); break; case 0xf860: // CMB - m_icount -= 9; + m_icount -= 3; m_reg_B = ~m_reg_B; break; default: - // Unrecognized instruction: pass it on for further processing (by EMC if present) - return execute_no_bpc_ioc(opcode); + // Unrecognized instruction: pass it on for further processing by other units + return false; } } } @@ -668,23 +696,241 @@ uint16_t hp_hybrid_cpu_device::execute_one_sub(uint16_t opcode) } } - return m_reg_P + 1; + next_pc = m_reg_P + 1; + return true; +} + +void hp_hybrid_cpu_device::emc_start() +{ + state_add(HPHYBRID_AR2, "Ar2" , m_reg_ar2[ 0 ]); + state_add(HPHYBRID_AR2_2, "Ar2_2" , m_reg_ar2[ 1 ]); + state_add(HPHYBRID_AR2_3, "Ar2_3" , m_reg_ar2[ 2 ]); + state_add(HPHYBRID_AR2_4, "Ar2_4" , m_reg_ar2[ 3 ]); + state_add(HPHYBRID_SE, "SE" , m_reg_se); + state_add(HPHYBRID_R25, "R25" , m_reg_r25).noshow(); + state_add(HPHYBRID_R26, "R26" , m_reg_r26).noshow(); + state_add(HPHYBRID_R27, "R27" , m_reg_r27).noshow(); + + save_item(NAME(m_reg_ar2[ 0 ])); + save_item(NAME(m_reg_ar2[ 1 ])); + save_item(NAME(m_reg_ar2[ 2 ])); + save_item(NAME(m_reg_ar2[ 3 ])); + save_item(NAME(m_reg_se)); + save_item(NAME(m_reg_r25)); + save_item(NAME(m_reg_r26)); + save_item(NAME(m_reg_r27)); +} + +bool hp_hybrid_cpu_device::execute_emc(uint16_t opcode , uint16_t& next_pc) +{ + // EMC instructions + uint8_t n; + uint16_t tmp1; + uint16_t tmp2; + uint64_t tmp_ar; + uint64_t tmp_ar2; + bool carry; + + switch (opcode & 0xfff0) { + case 0x7300: + // XFR + tmp1 = m_reg_A; + tmp2 = m_reg_B; + n = (opcode & 0xf) + 1; + m_icount -= 15; + while (n--) { + WM(AEC_CASE_C , tmp2 , RM(AEC_CASE_C , tmp1)); + tmp1++; + tmp2++; + } + break; + + case 0x7380: + // CLR + tmp1 = m_reg_A; + n = (opcode & 0xf) + 1; + m_icount -= 10; + while (n--) { + WM(AEC_CASE_C , tmp1 , 0); + tmp1++; + } + break; + + default: + switch (opcode) { + case 0x7200: + // MWA + m_icount -= 22; + tmp_ar2 = get_ar2(); + carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , m_reg_B); + set_ar2(tmp_ar2); + if (carry) + BIT_SET(m_flags, HPHYBRID_DC_BIT); + else + BIT_CLR(m_flags, HPHYBRID_DC_BIT); + break; + + case 0x7220: + // CMY + m_icount -= 17; + tmp_ar2 = get_ar2(); + tmp_ar2 = 0x999999999999ULL - tmp_ar2; + do_dec_add(true , tmp_ar2 , 0); + set_ar2(tmp_ar2); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7260: + // CMX + m_icount -= 17; + tmp_ar = get_ar1(); + tmp_ar = 0x999999999999ULL - tmp_ar; + do_dec_add(true , tmp_ar , 0); + set_ar1(tmp_ar); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7280: + // FXA + m_icount -= 16; + tmp_ar2 = get_ar2(); + carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , get_ar1()); + set_ar2(tmp_ar2); + if (carry) + BIT_SET(m_flags, HPHYBRID_DC_BIT); + else + BIT_CLR(m_flags, HPHYBRID_DC_BIT); + break; + + case 0x7340: + // NRM + tmp_ar2 = get_ar2(); + m_icount -= 17; + for (n = 0; n < 12 && (tmp_ar2 & 0xf00000000000ULL) == 0; n++) { + do_dec_shift_l(0 , tmp_ar2); + m_icount--; + } + m_reg_B = n; + if (n < 12) { + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + set_ar2(tmp_ar2); + } else { + BIT_SET(m_flags , HPHYBRID_DC_BIT); + // When ar2 is 0, total time is 69 cycles + // (salcazzo che cosa fa per altri 34 cicli) + m_icount -= 34; + } + break; + + case 0x73c0: + // CDC + m_icount -= 5; + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7a00: + // FMP + m_icount -= 15; + m_reg_A = 0; + n = m_reg_B & 0xf; + if (n == 0) { + tmp_ar = 0; + } else { + m_icount -= 3; + tmp_ar = get_ar1(); + n--; + } + tmp_ar2 = get_ar2(); + do { + m_icount -= 13; + if (do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) { + m_reg_A++; + } + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + } while (n--); + set_ar2(tmp_ar2); + break; + + case 0x7a21: + // FDV + // This instruction keeps adding AR1 to AR2 until an overflow occurs. + // Register B will hold the number of iterations after the execution. + // Note that if AR1 is 0 overflow never happens and the processor hangs. + // Here we stop at 15 iterations (after all there are only 4 bits in the loop counter). + m_icount -= 13; + m_reg_B = 0; + tmp_ar = get_ar1(); + tmp_ar2 = get_ar2(); + while (m_reg_B < 15 && !do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) { + m_icount -= 13; + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + m_reg_B++; + } + set_ar2(tmp_ar2); + break; + + case 0x7b00: + // MRX + // Cycle count is incorrect for the case where B=0, as AR1 doesn't get read or written in real hw + set_ar1(do_mrxy(get_ar1())); + m_icount -= 20; + break; + + case 0x7b21: + // DRS + tmp_ar = get_ar1(); + m_icount -= 14; + m_reg_A = m_reg_se = do_dec_shift_r(0 , tmp_ar); + set_ar1(tmp_ar); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7b40: + // MRY + set_ar2(do_mrxy(get_ar2())); + m_icount -= 27; + break; + + case 0x7b61: + // MLY + tmp_ar2 = get_ar2(); + m_icount -= 26; + m_reg_A = m_reg_se = do_dec_shift_l(m_reg_A & 0xf , tmp_ar2); + set_ar2(tmp_ar2); + BIT_CLR(m_flags , HPHYBRID_DC_BIT); + break; + + case 0x7b8f: + // MPY + do_mpy(); + break; + + default: + // Unrecognized instruction + return false; + } + } + + next_pc = m_reg_P + 1; + return true; } void hp_hybrid_cpu_device::state_string_export(const device_state_entry &entry, std::string &str) const { if (entry.index() == STATE_GENFLAGS) { - str = string_format("%s %s %c %c", + str = string_format("%s %s %s %c %c", BIT(m_flags , HPHYBRID_DB_BIT) ? "Db":"..", BIT(m_flags , HPHYBRID_CB_BIT) ? "Cb":"..", + BIT(m_flags , HPHYBRID_DC_BIT) ? "DC":"..", BIT(m_flags , HPHYBRID_O_BIT) ? 'O':'.', BIT(m_flags , HPHYBRID_C_BIT) ? 'E':'.'); } } -std::unique_ptr<util::disasm_interface> hp_hybrid_cpu_device::create_disassembler() +uint32_t hp_hybrid_cpu_device::add_mae(aec_cases_t aec_case , uint16_t addr) { - return std::make_unique<hp_hybrid_disassembler>(); + // No MAE on 5061-3011 or 09825-67907 + return addr; } uint16_t hp_hybrid_cpu_device::remove_mae(uint32_t addr) @@ -699,26 +945,31 @@ uint16_t hp_hybrid_cpu_device::RM(aec_cases_t aec_case , uint16_t addr) uint16_t hp_hybrid_cpu_device::RM(uint32_t addr) { - uint16_t tmp; + addr &= m_addr_mask; uint16_t addr_wo_bsc = remove_mae(addr); if (addr_wo_bsc <= HP_REG_LAST_ADDR) { // Any access to internal registers removes forcing of BSC 2x m_forced_bsc_25 = false; - // Memory mapped registers that are present in both 3001 & 3011 + // Memory mapped BPC registers + uint16_t tmp; switch (addr_wo_bsc) { case HP_REG_A_ADDR: - return m_reg_A; + tmp = m_reg_A; + break; case HP_REG_B_ADDR: - return m_reg_B; + tmp = m_reg_B; + break; case HP_REG_P_ADDR: - return m_reg_P; + tmp = m_reg_P; + break; case HP_REG_R_ADDR: - return m_reg_R; + tmp = m_reg_R; + break; case HP_REG_R4_ADDR: case HP_REG_R5_ADDR: @@ -727,44 +978,79 @@ uint16_t hp_hybrid_cpu_device::RM(uint32_t addr) return RIO(CURRENT_PA , addr_wo_bsc - HP_REG_R4_ADDR); case HP_REG_IV_ADDR: - return m_reg_IV; + tmp = m_reg_IV; + break; case HP_REG_PA_ADDR: - return CURRENT_PA; + tmp = CURRENT_PA; + break; case HP_REG_W_ADDR: - return m_reg_W; - - case HP_REG_DMAPA_ADDR: - tmp = m_dmapa & HP_REG_PA_MASK; - if (BIT(m_flags , HPHYBRID_CB_BIT)) { - BIT_SET(tmp , 15); - } - if (BIT(m_flags , HPHYBRID_DB_BIT)) { - BIT_SET(tmp , 14); - } - return tmp; + tmp = m_reg_W; + break; case HP_REG_DMAMA_ADDR: - return m_dmama; + tmp = m_dmama; + break; case HP_REG_DMAC_ADDR: - return m_dmac; + tmp = m_dmac; + break; case HP_REG_C_ADDR: - return m_reg_C; + tmp = m_reg_C; + break; case HP_REG_D_ADDR: - return m_reg_D; + tmp = m_reg_D; + break; default: - return read_non_common_reg(addr_wo_bsc); + if (!read_non_common_reg(addr_wo_bsc , tmp)) { + // Non-existing registers are returned as 0 + tmp = 0; + } + break; } + m_icount -= REGISTER_RW_CYCLES; + return tmp; } else { + m_icount -= m_r_cycles; return m_cache->read_word(addr); } } +bool hp_hybrid_cpu_device::read_emc_reg(uint16_t addr , uint16_t& v) +{ + switch (addr) { + case HP_REG_AR2_ADDR: + case HP_REG_AR2_ADDR + 1: + case HP_REG_AR2_ADDR + 2: + case HP_REG_AR2_ADDR + 3: + v = m_reg_ar2[ addr - HP_REG_AR2_ADDR ]; + return true; + + case HP_REG_SE_ADDR: + v = m_reg_se; + return true; + + case HP_REG_R25_ADDR: + v = m_reg_r25; + return true; + + case HP_REG_R26_ADDR: + v = m_reg_r26; + return true; + + case HP_REG_R27_ADDR: + v = m_reg_r27; + return true; + + default: + return false; + } +} + void hp_hybrid_cpu_device::WM(aec_cases_t aec_case , uint16_t addr , uint16_t v) { WM(add_mae(aec_case , addr) , v); @@ -772,13 +1058,14 @@ void hp_hybrid_cpu_device::WM(aec_cases_t aec_case , uint16_t addr , uint16_t v) void hp_hybrid_cpu_device::WM(uint32_t addr , uint16_t v) { + addr &= m_addr_mask; uint16_t addr_wo_bsc = remove_mae(addr); if (addr_wo_bsc <= HP_REG_LAST_ADDR) { // Any access to internal registers removes forcing of BSC 2x m_forced_bsc_25 = false; - // Memory mapped registers + // Memory mapped BPC registers switch (addr_wo_bsc) { case HP_REG_A_ADDR: m_reg_A = v; @@ -789,11 +1076,11 @@ void hp_hybrid_cpu_device::WM(uint32_t addr , uint16_t v) break; case HP_REG_P_ADDR: - m_reg_P = v; + m_reg_P = v & m_addr_mask_low16; break; case HP_REG_R_ADDR: - m_reg_R = v; + m_reg_R = v & m_addr_mask_low16; break; case HP_REG_R4_ADDR: @@ -801,7 +1088,7 @@ void hp_hybrid_cpu_device::WM(uint32_t addr , uint16_t v) case HP_REG_R6_ADDR: case HP_REG_R7_ADDR: WIO(CURRENT_PA , addr_wo_bsc - HP_REG_R4_ADDR , v); - break; + return; case HP_REG_IV_ADDR: m_reg_IV = v & HP_REG_IV_MASK; @@ -809,7 +1096,7 @@ void hp_hybrid_cpu_device::WM(uint32_t addr , uint16_t v) case HP_REG_PA_ADDR: CURRENT_PA = v & HP_REG_PA_MASK; - m_pa_changed_func((uint8_t)CURRENT_PA); + update_pa(); break; case HP_REG_W_ADDR: @@ -840,17 +1127,56 @@ void hp_hybrid_cpu_device::WM(uint32_t addr , uint16_t v) write_non_common_reg(addr_wo_bsc , v); break; } + m_icount -= REGISTER_RW_CYCLES; } else { + m_icount -= m_w_cycles; m_program->write_word(addr , v); } } +bool hp_hybrid_cpu_device::write_emc_reg(uint16_t addr , uint16_t v) +{ + switch (addr) { + case HP_REG_AR2_ADDR: + case HP_REG_AR2_ADDR + 1: + case HP_REG_AR2_ADDR + 2: + case HP_REG_AR2_ADDR + 3: + m_reg_ar2[ addr - HP_REG_AR2_ADDR ] = v; + return true; + + case HP_REG_SE_ADDR: + m_reg_se = v & HP_REG_SE_MASK; + return true; + + case HP_REG_R25_ADDR: + m_reg_r25 = v; + return true; + + case HP_REG_R26_ADDR: + m_reg_r26 = v; + return true; + + case HP_REG_R27_ADDR: + m_reg_r27 = v; + return true; + + default: + return false; + } +} + uint16_t hp_hybrid_cpu_device::fetch(void) { m_genpc = add_mae(AEC_CASE_A , m_reg_P); return RM(m_genpc); } +uint16_t hp_hybrid_cpu_device::get_indirect_target(uint32_t addr) +{ + // Single-level indirect addressing on 5061-3011 or 5061-3001 + return RM(addr); +} + uint32_t hp_hybrid_cpu_device::get_ea(uint16_t opcode) { uint16_t base; @@ -858,8 +1184,13 @@ uint32_t hp_hybrid_cpu_device::get_ea(uint16_t opcode) aec_cases_t aec; if (BIT(opcode , 10)) { - // Current page - base = m_reg_P; + if (m_relative_mode) { + // Current page relative addressing + base = m_reg_P; + } else { + // Current page absolute addressing + base = (m_reg_P & 0xfc00) | 0x0200; + } aec = AEC_CASE_A; } else { // Base page @@ -873,14 +1204,14 @@ uint32_t hp_hybrid_cpu_device::get_ea(uint16_t opcode) } base += off; + uint32_t ea = add_mae(aec , base); if (BIT(opcode , 15)) { // Indirect addressing - m_icount -= 6; - return add_mae(AEC_CASE_C , RM(aec , base)); + return add_mae(AEC_CASE_C , get_indirect_target(ea)); } else { // Direct addressing - return add_mae(aec , base); + return ea; } } @@ -917,7 +1248,7 @@ uint16_t hp_hybrid_cpu_device::get_skip_addr(uint16_t opcode , bool condition) c } } -uint16_t hp_hybrid_cpu_device::get_skip_addr_sc(uint16_t opcode , uint16_t& v , unsigned n) +template<typename T> uint16_t hp_hybrid_cpu_device::get_skip_addr_sc(uint16_t opcode , T& v , unsigned n) { bool val = BIT(v , n); @@ -932,109 +1263,11 @@ uint16_t hp_hybrid_cpu_device::get_skip_addr_sc(uint16_t opcode , uint16_t& v , return get_skip_addr(opcode , val); } -uint16_t hp_hybrid_cpu_device::get_skip_addr_sc(uint16_t opcode , uint32_t& v , unsigned n) +void hp_hybrid_cpu_device::update_pa() { - bool val = BIT(v , n); - - if (BIT(opcode , 7)) { - if (BIT(opcode , 6)) { - BIT_SET(v , n); - } else { - BIT_CLR(v , n); - } - } - - return get_skip_addr(opcode , val); -} - -void hp_hybrid_cpu_device::do_pw(uint16_t opcode) -{ - uint16_t tmp; - uint16_t reg_addr = opcode & 7; - uint16_t *ptr_reg; - uint16_t b_mask; - - if (BIT(opcode , 3)) { - ptr_reg = &m_reg_D; - b_mask = BIT_MASK(HPHYBRID_DB_BIT); - } else { - ptr_reg = &m_reg_C; - b_mask = BIT_MASK(HPHYBRID_CB_BIT); - } - - if (BIT(opcode , 4)) { - // Withdraw - if (BIT(opcode , 11)) { - // Byte - uint32_t tmp_addr = (uint32_t)(*ptr_reg); - if (m_flags & b_mask) { - tmp_addr |= 0x10000; - } - tmp = RM(AEC_CASE_C , (uint16_t)(tmp_addr >> 1)); - if (BIT(tmp_addr , 0)) { - tmp &= 0xff; - } else { - tmp >>= 8; - } - } else { - // Word - tmp = RM(AEC_CASE_C , *ptr_reg); - } - WM(reg_addr , tmp); - - if (BIT(opcode , 7)) { - // Post-decrement - if ((*ptr_reg)-- == 0) { - m_flags ^= b_mask; - } - } else { - // Post-increment - if (++(*ptr_reg) == 0) { - m_flags ^= b_mask; - } - } - } else { - // Place - if (BIT(opcode , 7)) { - // Pre-decrement - if ((*ptr_reg)-- == 0) { - m_flags ^= b_mask; - } - } else { - // Pre-increment - if (++(*ptr_reg) == 0) { - m_flags ^= b_mask; - } - } - tmp = RM(reg_addr); - if (BIT(opcode , 11)) { - // Byte - uint32_t tmp_addr = (uint32_t)(*ptr_reg); - if (m_flags & b_mask) { - tmp_addr |= 0x10000; - } - if (tmp_addr <= (HP_REG_LAST_ADDR * 2 + 1)) { - // Single bytes can be written to registers. - // The addressed register gets the written byte in the proper position - // and a 0 in the other byte because access to registers is always done in - // 16 bits units. - if (BIT(tmp_addr , 0)) { - tmp &= 0xff; - } else { - tmp <<= 8; - } - WM(tmp_addr >> 1 , tmp); - } else { - // Extend address, form byte address - uint16_t val = (tmp_addr & 1) ? uint8_t(tmp) : (tmp << 8); - uint16_t mask = (tmp_addr & 1) ? 0x00ff : 0xff00; - tmp_addr = add_mae(AEC_CASE_C , tmp_addr >> 1); - m_program->write_word(tmp_addr , val, mask); - } - } else { - // Word - WM(AEC_CASE_C , *ptr_reg , tmp); - } + if (CURRENT_PA != m_last_pa) { + m_last_pa = CURRENT_PA; + m_pa_changed_func(m_last_pa); } } @@ -1081,19 +1314,24 @@ void hp_hybrid_cpu_device::check_for_interrupts(void) memmove(&m_reg_PA[ 1 ] , &m_reg_PA[ 0 ] , HPHYBRID_INT_LVLS); CURRENT_PA = new_PA; + update_pa(); - m_pa_changed_func((uint8_t)CURRENT_PA); - - // Is this correct? Patent @ pg 210 suggests that the whole interrupt recognition sequence - // lasts for 32 cycles - m_icount -= 32; + // Total time for int. ack execution = 12 + WM + RM * (1 + IND) + RR + // WM = memory write cycles + // RM = memory read cycles + // IND = count of indirections (1 in 3001/3011) + // RR = register read cycles + m_icount -= (12 + REGISTER_RW_CYCLES); // Allow special processing in 5061-3001 enter_isr(); // Do a double-indirect JSM IV,I instruction - WM(AEC_CASE_C , ++m_reg_R , m_reg_P); - m_reg_P = RM(AEC_CASE_C , m_reg_IV + CURRENT_PA); + // On 09825 there can be more than 2 levels of indirection + m_reg_R = (m_reg_R + 1) & m_addr_mask_low16; + WM(AEC_CASE_C , m_reg_R , m_reg_P); + uint32_t addr = add_mae(AEC_CASE_C , m_reg_IV + CURRENT_PA); + m_reg_P = get_indirect_target(addr); m_reg_I = fetch(); } @@ -1102,100 +1340,19 @@ void hp_hybrid_cpu_device::enter_isr(void) // Do nothing special } -void hp_hybrid_cpu_device::handle_dma(void) -{ - // Patent hints at the fact that terminal count is detected by bit 15 of dmac being 1 after decrementing - bool tc = BIT(--m_dmac , 15) != 0; - uint16_t tmp; - - if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) { - // "Outward" DMA: memory -> peripheral - tmp = RM(AEC_CASE_D , m_dmama++); - WIO(m_dmapa , tc ? 2 : 0 , tmp); - m_icount -= 10; - } else { - // "Inward" DMA: peripheral -> memory - tmp = RIO(m_dmapa , tc ? 2 : 0); - WM(AEC_CASE_D , m_dmama++ , tmp); - m_icount -= 9; - } - - // Mystery solved: DMA is not automatically disabled at TC (test of 9845's graphic memory relies on this to work) -} - uint16_t hp_hybrid_cpu_device::RIO(uint8_t pa , uint8_t ic) { + m_icount -= IO_RW_CYCLES; return m_io->read_word(HP_MAKE_IOADDR(pa, ic)); } void hp_hybrid_cpu_device::WIO(uint8_t pa , uint8_t ic , uint16_t v) { + m_icount -= IO_RW_CYCLES; m_io->write_word(HP_MAKE_IOADDR(pa, ic) , v); } -hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hp_hybrid_cpu_device(mconfig, HP_5061_3001, tag, owner, clock, 22) - , m_boot_mode(false) -{ -} - -void hp_5061_3001_cpu_device::device_start() -{ - hp_hybrid_cpu_device::device_start(); - - state_add(HPHYBRID_AR2, "Ar2" , m_reg_ar2[ 0 ]); - state_add(HPHYBRID_AR2_2, "Ar2_2" , m_reg_ar2[ 1 ]); - state_add(HPHYBRID_AR2_3, "Ar2_3" , m_reg_ar2[ 2 ]); - state_add(HPHYBRID_AR2_4, "Ar2_4" , m_reg_ar2[ 3 ]); - state_add(HPHYBRID_SE, "SE" , m_reg_se); - state_add(HPHYBRID_R25, "R25" , m_reg_r25).noshow(); - state_add(HPHYBRID_R26, "R26" , m_reg_r26).noshow(); - state_add(HPHYBRID_R27, "R27" , m_reg_r27).noshow(); - state_add(HPHYBRID_R32, "R32" , m_reg_aec[ 0 ]); - state_add(HPHYBRID_R33, "R33" , m_reg_aec[ 1 ]); - state_add(HPHYBRID_R34, "R34" , m_reg_aec[ 2 ]); - state_add(HPHYBRID_R35, "R35" , m_reg_aec[ 3 ]); - state_add(HPHYBRID_R36, "R36" , m_reg_aec[ 4 ]); - state_add(HPHYBRID_R37, "R37" , m_reg_aec[ 5 ]); - - save_item(NAME(m_reg_ar2[ 0 ])); - save_item(NAME(m_reg_ar2[ 1 ])); - save_item(NAME(m_reg_ar2[ 2 ])); - save_item(NAME(m_reg_ar2[ 3 ])); - save_item(NAME(m_reg_se)); - save_item(NAME(m_reg_r25)); - save_item(NAME(m_reg_r26)); - save_item(NAME(m_reg_r27)); - save_item(NAME(m_reg_aec[ 0 ])); - save_item(NAME(m_reg_aec[ 1 ])); - save_item(NAME(m_reg_aec[ 2 ])); - save_item(NAME(m_reg_aec[ 3 ])); - save_item(NAME(m_reg_aec[ 4 ])); - save_item(NAME(m_reg_aec[ 5 ])); -} - -void hp_5061_3001_cpu_device::device_reset() -{ - // Initial state of AEC registers: - // R32 0 - // R33 5 - // R34 0 - // R35 0 - // R36 0 - // R37 0 - m_reg_aec[ 0 ] = 0; - m_reg_aec[ 1 ] = 5; - m_reg_aec[ 2 ] = 0; - m_reg_aec[ 3 ] = 0; - m_reg_aec[ 4 ] = 0; - m_reg_aec[ 5 ] = 0; - - m_forced_bsc_25 = m_boot_mode; - - hp_hybrid_cpu_device::device_reset(); -} - -uint8_t hp_5061_3001_cpu_device::do_dec_shift_r(uint8_t d1 , uint64_t& mantissa) +uint8_t hp_hybrid_cpu_device::do_dec_shift_r(uint8_t d1 , uint64_t& mantissa) { uint8_t d12 = (uint8_t)(mantissa & 0xf); @@ -1204,7 +1361,7 @@ uint8_t hp_5061_3001_cpu_device::do_dec_shift_r(uint8_t d1 , uint64_t& mantissa) return d12; } -uint8_t hp_5061_3001_cpu_device::do_dec_shift_l(uint8_t d12 , uint64_t& mantissa) +uint8_t hp_hybrid_cpu_device::do_dec_shift_l(uint8_t d12 , uint64_t& mantissa) { uint8_t d1 = (uint8_t)((mantissa >> 44) & 0xf); @@ -1214,7 +1371,7 @@ uint8_t hp_5061_3001_cpu_device::do_dec_shift_l(uint8_t d12 , uint64_t& mantissa return d1; } -uint64_t hp_5061_3001_cpu_device::get_ar1(void) +uint64_t hp_hybrid_cpu_device::get_ar1(void) { uint32_t addr; uint64_t tmp; @@ -1229,7 +1386,7 @@ uint64_t hp_5061_3001_cpu_device::get_ar1(void) return tmp; } -void hp_5061_3001_cpu_device::set_ar1(uint64_t v) +void hp_hybrid_cpu_device::set_ar1(uint64_t v) { uint32_t addr; @@ -1241,7 +1398,7 @@ void hp_5061_3001_cpu_device::set_ar1(uint64_t v) WM(addr , (uint16_t)(v & 0xffff)); } -uint64_t hp_5061_3001_cpu_device::get_ar2(void) const +uint64_t hp_hybrid_cpu_device::get_ar2(void) const { uint64_t tmp; @@ -1254,7 +1411,7 @@ uint64_t hp_5061_3001_cpu_device::get_ar2(void) const return tmp; } -void hp_5061_3001_cpu_device::set_ar2(uint64_t v) +void hp_hybrid_cpu_device::set_ar2(uint64_t v) { m_reg_ar2[ 3 ] = (uint16_t)(v & 0xffff); v >>= 16; @@ -1263,7 +1420,7 @@ void hp_5061_3001_cpu_device::set_ar2(uint64_t v) m_reg_ar2[ 1 ] = (uint16_t)(v & 0xffff); } -uint64_t hp_5061_3001_cpu_device::do_mrxy(uint64_t ar) +uint64_t hp_hybrid_cpu_device::do_mrxy(uint64_t ar) { uint8_t n; @@ -1281,7 +1438,7 @@ uint64_t hp_5061_3001_cpu_device::do_mrxy(uint64_t ar) return ar; } -bool hp_5061_3001_cpu_device::do_dec_add(bool carry_in , uint64_t& a , uint64_t b) +bool hp_hybrid_cpu_device::do_dec_add(bool carry_in , uint64_t& a , uint64_t b) { uint64_t tmp = 0; unsigned i; @@ -1314,8 +1471,21 @@ bool hp_5061_3001_cpu_device::do_dec_add(bool carry_in , uint64_t& a , uint64_t return carry_in; } -void hp_5061_3001_cpu_device::do_mpy(void) +void hp_hybrid_cpu_device::do_mpy(void) { + // Count 0->1 and 1->0 transitions in A register + // Correct timing needs this count as real hw uses Booth's algorithm for multiplication + uint16_t tmp = m_reg_A; + uint16_t mask = ~0; + for (unsigned i = 0; i < 16 && tmp; ++i) { + if (BIT(tmp , 0)) { + tmp ^= mask; + m_icount -= 2; + } + tmp >>= 1; + mask >>= 1; + } + int32_t a = (int16_t)m_reg_A; int32_t b = (int16_t)m_reg_B; int32_t p = a * b; @@ -1323,227 +1493,287 @@ void hp_5061_3001_cpu_device::do_mpy(void) m_reg_A = (uint16_t)(p & 0xffff); m_reg_B = (uint16_t)((p >> 16) & 0xffff); - // Not entirely correct, timing depends on initial content of A register - m_icount -= 65; + m_icount -= 59; } -uint16_t hp_5061_3001_cpu_device::execute_no_bpc_ioc(uint16_t opcode) +// ******************************************************************************** +// hp_5061_3011_cpu_device +// ******************************************************************************** +hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : hp_hybrid_cpu_device(mconfig, HP_5061_3011, tag, owner, clock, 16) { - // EMC instructions - uint8_t n; - uint16_t tmp1; - uint16_t tmp2; - uint64_t tmp_ar; - uint64_t tmp_ar2; - bool carry; +} - switch (opcode & 0xfff0) { - case 0x7300: - // XFR - tmp1 = m_reg_A; - tmp2 = m_reg_B; - n = (opcode & 0xf) + 1; - m_icount -= 21; - while (n--) { - m_icount -= 12; - WM(AEC_CASE_C , tmp2 , RM(AEC_CASE_C , tmp1)); - tmp1++; - tmp2++; - } - break; +hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t addrwidth) + : hp_hybrid_cpu_device(mconfig, type, tag, owner, clock, addrwidth) +{ +} - case 0x7380: - // CLR - tmp1 = m_reg_A; - n = (opcode & 0xf) + 1; - m_icount -= 16; - while (n--) { - m_icount -= 6; - WM(AEC_CASE_C , tmp1 , 0); - tmp1++; +bool hp_5061_3011_cpu_device::execute_no_bpc(uint16_t opcode , uint16_t& next_pc) +{ + // 16-bit IOC instructions + if ((opcode & 0xf760) == 0x7160) { + // Place/withdraw + uint16_t tmp; + uint16_t reg_addr = opcode & 7; + uint16_t *ptr_reg; + uint32_t b_mask; + + if (BIT(opcode , 3)) { + ptr_reg = &m_reg_D; + b_mask = BIT_MASK<uint32_t>(HPHYBRID_DB_BIT); + } else { + ptr_reg = &m_reg_C; + b_mask = BIT_MASK<uint32_t>(HPHYBRID_CB_BIT); } - break; - default: - switch (opcode) { - case 0x7200: - // MWA - m_icount -= 28; - tmp_ar2 = get_ar2(); - carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , m_reg_B); - set_ar2(tmp_ar2); - if (carry) - BIT_SET(m_flags, HPHYBRID_DC_BIT); - else - BIT_CLR(m_flags, HPHYBRID_DC_BIT); - break; - - case 0x7220: - // CMY - m_icount -= 23; - tmp_ar2 = get_ar2(); - tmp_ar2 = 0x999999999999ULL - tmp_ar2; - do_dec_add(true , tmp_ar2 , 0); - set_ar2(tmp_ar2); - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - break; - - case 0x7260: - // CMX - m_icount -= 59; - tmp_ar = get_ar1(); - tmp_ar = 0x999999999999ULL - tmp_ar; - do_dec_add(true , tmp_ar , 0); - set_ar1(tmp_ar); - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - break; - - case 0x7280: - // FXA - m_icount -= 40; - tmp_ar2 = get_ar2(); - carry = do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , get_ar1()); - set_ar2(tmp_ar2); - if (carry) - BIT_SET(m_flags, HPHYBRID_DC_BIT); - else - BIT_CLR(m_flags, HPHYBRID_DC_BIT); - break; + if (BIT(opcode , 4)) { + // Withdraw + if (BIT(opcode , 11)) { + // Byte + uint32_t tmp_addr = (uint32_t)(*ptr_reg); + if (m_flags & b_mask) { + tmp_addr |= BIT_MASK<uint32_t>(16); + } + tmp = RM(AEC_CASE_C , (uint16_t)(tmp_addr >> 1)); + if (BIT(tmp_addr , 0)) { + tmp &= 0xff; + } else { + tmp >>= 8; + } + } else { + // Word + tmp = RM(AEC_CASE_C , *ptr_reg); + } + WM(reg_addr , tmp); - case 0x7340: - // NRM - tmp_ar2 = get_ar2(); - m_icount -= 23; - for (n = 0; n < 12 && (tmp_ar2 & 0xf00000000000ULL) == 0; n++) { - do_dec_shift_l(0 , tmp_ar2); - m_icount--; + if (BIT(opcode , 7)) { + // Post-decrement + if ((*ptr_reg)-- == 0) { + m_flags ^= b_mask; + } + } else { + // Post-increment + if (++(*ptr_reg) == 0) { + m_flags ^= b_mask; + } } - m_reg_B = n; - if (n < 12) { - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - set_ar2(tmp_ar2); + } else { + // Place + if (BIT(opcode , 7)) { + // Pre-decrement + if ((*ptr_reg)-- == 0) { + m_flags ^= b_mask; + } } else { - BIT_SET(m_flags , HPHYBRID_DC_BIT); - // When ar2 is 0, total time is 69 cycles - // (salcazzo che cosa fa per altri 34 cicli) - m_icount -= 34; + // Pre-increment + if (++(*ptr_reg) == 0) { + m_flags ^= b_mask; + } } + tmp = RM(reg_addr); + if (BIT(opcode , 11)) { + // Byte + uint32_t tmp_addr = (uint32_t)(*ptr_reg); + if (m_flags & b_mask) { + tmp_addr |= BIT_MASK<uint32_t>(16); + } + tmp = BIT(tmp_addr , 0) ? (tmp & 0xff) : (tmp << 8); + if (tmp_addr <= (HP_REG_LAST_ADDR * 2 + 1)) { + // Single bytes can be written to registers. + // The addressed register gets the written byte in the proper position + // and a 0 in the other byte because access to registers is always done in + // 16 bits units. + WM(tmp_addr >> 1 , tmp); + } else { + // Extend address, form byte address + uint16_t mask = BIT(tmp_addr , 0) ? 0x00ff : 0xff00; + tmp_addr = add_mae(AEC_CASE_C , tmp_addr >> 1); + m_program->write_word(tmp_addr , tmp , mask); + m_icount -= m_w_cycles; + } + } else { + // Word + WM(AEC_CASE_C , *ptr_reg , tmp); + } + } + m_icount -= 6; + } else { + switch (opcode) { + case 0x7100: + // SDO + m_icount -= 6; + BIT_SET(m_flags , HPHYBRID_DMADIR_BIT); break; - case 0x73c0: - // CDC - m_icount -= 11; - BIT_CLR(m_flags , HPHYBRID_DC_BIT); + case 0x7108: + // SDI + m_icount -= 6; + BIT_CLR(m_flags , HPHYBRID_DMADIR_BIT); break; - case 0x7a00: - // FMP - m_icount -= 42; - m_reg_A = 0; - tmp_ar = get_ar1(); - tmp_ar2 = get_ar2(); - for (n = m_reg_B & 0xf; n > 0; n--) { - m_icount -= 13; - if (do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) - m_reg_A++; - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - } - set_ar2(tmp_ar2); + case 0x7140: + // DBL + m_icount -= 6; + BIT_CLR(m_flags , HPHYBRID_DB_BIT); break; - case 0x7a21: - // FDV - // No doc mentions any limit on the iterations done by this instruction. - // Here we stop at 15 (after all there are only 4 bits in the loop counter). But is it correct? - m_icount -= 37; - m_reg_B = 0; - tmp_ar = get_ar1(); - tmp_ar2 = get_ar2(); - while (m_reg_B < 15 && !do_dec_add(BIT(m_flags , HPHYBRID_DC_BIT) , tmp_ar2 , tmp_ar)) { - m_icount -= 13; - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - m_reg_B++; - } - set_ar2(tmp_ar2); + case 0x7148: + // CBL + m_icount -= 6; + BIT_CLR(m_flags , HPHYBRID_CB_BIT); break; - case 0x7b00: - // MRX - set_ar1(do_mrxy(get_ar1())); - m_icount -= 62; + case 0x7150: + // DBU + m_icount -= 6; + BIT_SET(m_flags , HPHYBRID_DB_BIT); break; - case 0x7b21: - // DRS - tmp_ar = get_ar1(); - m_icount -= 56; - m_reg_A = m_reg_se = do_dec_shift_r(0 , tmp_ar); - set_ar1(tmp_ar); - BIT_CLR(m_flags , HPHYBRID_DC_BIT); + case 0x7158: + // CBU + m_icount -= 6; + BIT_SET(m_flags , HPHYBRID_CB_BIT); break; - case 0x7b40: - // MRY - set_ar2(do_mrxy(get_ar2())); - m_icount -= 33; - break; + default: + // Unrecognized instruction + return false; + } + } + next_pc = m_reg_P + 1; + return true; +} - case 0x7b61: - // MLY - tmp_ar2 = get_ar2(); - m_icount -= 32; - m_reg_A = m_reg_se = do_dec_shift_l(m_reg_A & 0xf , tmp_ar2); - set_ar2(tmp_ar2); - BIT_CLR(m_flags , HPHYBRID_DC_BIT); - break; +bool hp_5061_3011_cpu_device::read_non_common_reg(uint16_t addr , uint16_t& v) +{ + switch (addr) { + case HP_REG_DMAPA_ADDR: + v = m_dmapa & HP_REG_PA_MASK; + if (BIT(m_flags , HPHYBRID_CB_BIT)) { + BIT_SET(v , 15); + } + if (BIT(m_flags , HPHYBRID_DB_BIT)) { + BIT_SET(v , 14); + } + return true; - case 0x7b8f: - // MPY - do_mpy(); - break; + default: + return false; + } +} - case 0x7026: - // CIM - // Undocumented instruction, see beginning of this file - // Probably "Clear Interrupt Mode" - // No idea at all about exec. time: make it 9 cycles - m_icount -= 9; - BIT_CLR(m_flags, HPHYBRID_IM_BIT); - //logerror("hp-5061-3001: CIM, P = %06x flags = %05x\n" , m_genpc , m_flags); - break; +bool hp_5061_3011_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) +{ + return false; +} - case 0x7027: - // SIM - // Undocumented instruction, see beginning of this file - // Probably "Set Interrupt Mode" - // No idea at all about exec. time: make it 9 cycles - m_icount -= 9; - BIT_SET(m_flags, HPHYBRID_IM_BIT); - //logerror("hp-5061-3001: SIM, P = %06x flags = %05x\n" , m_genpc , m_flags); - break; +void hp_5061_3011_cpu_device::handle_dma() +{ + // Patent hints at the fact that terminal count is detected by bit 15 of dmac being 1 after decrementing + bool tc = BIT(--m_dmac , 15) != 0; + uint16_t tmp; - default: - if ((opcode & 0xfec0) == 0x74c0) { - // SDS - // SDC - m_icount -= 14; - return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_DC_BIT)); - } else { - // Unrecognized instructions: NOP - // Execution time is fictional - logerror("hp-5061-3001: unknown opcode %04x @ %06x\n" , opcode , m_genpc); - m_icount -= 6; - } - break; - } + // Timing here assumes that DMA transfers are isolated and not done in bursts + if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) { + // "Outward" DMA: memory -> peripheral + tmp = RM(AEC_CASE_D , m_dmama++); + WIO(m_dmapa , tc ? 2 : 0 , tmp); + } else { + // "Inward" DMA: peripheral -> memory + tmp = RIO(m_dmapa , tc ? 2 : 0); + WM(AEC_CASE_D , m_dmama++ , tmp); + m_icount += 1; } - return m_reg_P + 1; + // Mystery solved: DMA is not automatically disabled at TC (test of 9845's graphic memory relies on this to work) } -std::unique_ptr<util::disasm_interface> hp_5061_3001_cpu_device::create_disassembler() +std::unique_ptr<util::disasm_interface> hp_5061_3011_cpu_device::create_disassembler() +{ + return std::make_unique<hp_5061_3011_disassembler>(m_relative_mode); +} + +// ******************************************************************************** +// hp_5061_3001_cpu_device +// ******************************************************************************** +hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : hp_5061_3011_cpu_device(mconfig, HP_5061_3001, tag, owner, clock, 22) +{ +} + +void hp_5061_3001_cpu_device::device_start() { - return std::make_unique<hp_5061_3001_disassembler>(); + hp_hybrid_cpu_device::device_start(); + emc_start(); + + state_add(HPHYBRID_R32, "R32" , m_reg_aec[ 0 ]); + state_add(HPHYBRID_R33, "R33" , m_reg_aec[ 1 ]); + state_add(HPHYBRID_R34, "R34" , m_reg_aec[ 2 ]); + state_add(HPHYBRID_R35, "R35" , m_reg_aec[ 3 ]); + state_add(HPHYBRID_R36, "R36" , m_reg_aec[ 4 ]); + state_add(HPHYBRID_R37, "R37" , m_reg_aec[ 5 ]); + save_item(NAME(m_reg_aec[ 0 ])); + save_item(NAME(m_reg_aec[ 1 ])); + save_item(NAME(m_reg_aec[ 2 ])); + save_item(NAME(m_reg_aec[ 3 ])); + save_item(NAME(m_reg_aec[ 4 ])); + save_item(NAME(m_reg_aec[ 5 ])); +} + +void hp_5061_3001_cpu_device::device_reset() +{ + // Initial state of AEC registers: + // R32 0 + // R33 5 + // R34 0 + // R35 0 + // R36 0 + // R37 0 + m_reg_aec[ 0 ] = 0; + m_reg_aec[ 1 ] = 5; + m_reg_aec[ 2 ] = 0; + m_reg_aec[ 3 ] = 0; + m_reg_aec[ 4 ] = 0; + m_reg_aec[ 5 ] = 0; + + hp_hybrid_cpu_device::device_reset(); +} + +bool hp_5061_3001_cpu_device::execute_no_bpc(uint16_t opcode , uint16_t& next_pc) +{ + // Try to execute opcode as an IOC-16 instruction first then as an EMC one + if (hp_5061_3011_cpu_device::execute_no_bpc(opcode , next_pc) || + execute_emc(opcode , next_pc)) { + return true; + } + + // AEC instructions + switch (opcode) { + case 0x7026: + // CIM + // Undocumented instruction, see beginning of this file + // Probably "Clear Interrupt Mode" + // No idea at all about exec. time: make it 9 cycles (6 are in opcode fetch) + m_icount -= 3; + BIT_CLR(m_flags, HPHYBRID_IM_BIT); + break; + + case 0x7027: + // SIM + // Undocumented instruction, see beginning of this file + // Probably "Set Interrupt Mode" + // No idea at all about exec. time: make it 9 cycles (6 are in opcode fetch) + m_icount -= 3; + BIT_SET(m_flags, HPHYBRID_IM_BIT); + break; + + default: + return false; + } + + next_pc = m_reg_P + 1; + return true; } uint32_t hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , uint16_t addr) @@ -1616,66 +1846,27 @@ uint32_t hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , uint16_t addr) return (uint32_t)addr | ((uint32_t)aec_reg << 16); } -uint16_t hp_5061_3001_cpu_device::read_non_common_reg(uint16_t addr) +bool hp_5061_3001_cpu_device::read_non_common_reg(uint16_t addr , uint16_t& v) { switch (addr) { - case HP_REG_AR2_ADDR: - case HP_REG_AR2_ADDR + 1: - case HP_REG_AR2_ADDR + 2: - case HP_REG_AR2_ADDR + 3: - return m_reg_ar2[ addr - HP_REG_AR2_ADDR ]; - - case HP_REG_SE_ADDR: - return m_reg_se; - - case HP_REG_R25_ADDR: - return m_reg_r25; - - case HP_REG_R26_ADDR: - return m_reg_r26; - - case HP_REG_R27_ADDR: - return m_reg_r27; - case HP_REG_R32_ADDR: case HP_REG_R33_ADDR: case HP_REG_R34_ADDR: case HP_REG_R35_ADDR: case HP_REG_R36_ADDR: case HP_REG_R37_ADDR: - return m_reg_aec[ addr - HP_REG_R32_ADDR ]; + v = m_reg_aec[ addr - HP_REG_R32_ADDR ]; + return true; default: - return 0; + return hp_5061_3011_cpu_device::read_non_common_reg(addr , v) || + read_emc_reg(addr , v); } } -void hp_5061_3001_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) +bool hp_5061_3001_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) { switch (addr) { - case HP_REG_AR2_ADDR: - case HP_REG_AR2_ADDR + 1: - case HP_REG_AR2_ADDR + 2: - case HP_REG_AR2_ADDR + 3: - m_reg_ar2[ addr - HP_REG_AR2_ADDR ] = v; - break; - - case HP_REG_SE_ADDR: - m_reg_se = v & HP_REG_SE_MASK; - break; - - case HP_REG_R25_ADDR: - m_reg_r25 = v; - break; - - case HP_REG_R26_ADDR: - m_reg_r26 = v; - break; - - case HP_REG_R27_ADDR: - m_reg_r27 = v; - break; - case HP_REG_R32_ADDR: case HP_REG_R33_ADDR: case HP_REG_R34_ADDR: @@ -1683,46 +1874,183 @@ void hp_5061_3001_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) case HP_REG_R36_ADDR: case HP_REG_R37_ADDR: m_reg_aec[ addr - HP_REG_R32_ADDR ] = v; - break; + return true; default: - break; + return hp_5061_3011_cpu_device::write_non_common_reg(addr , v) || + write_emc_reg(addr , v); } } +std::unique_ptr<util::disasm_interface> hp_5061_3001_cpu_device::create_disassembler() +{ + return std::make_unique<hp_5061_3001_disassembler>(m_relative_mode); +} + void hp_5061_3001_cpu_device::enter_isr(void) { // Set interrupt mode when entering an ISR BIT_SET(m_flags, HPHYBRID_IM_BIT); } -hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hp_hybrid_cpu_device(mconfig, HP_5061_3011, tag, owner, clock, 16) +// ******************************************************************************** +// hp_09825_67907_cpu_device +// ******************************************************************************** +hp_09825_67907_cpu_device::hp_09825_67907_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : hp_hybrid_cpu_device(mconfig , HP_09825_67907 , tag , owner , clock , 15) { } -uint16_t hp_5061_3011_cpu_device::execute_no_bpc_ioc(uint16_t opcode) +void hp_09825_67907_cpu_device::device_start() { - // Unrecognized instructions: NOP - // Execution time is fictional - m_icount -= 6; + hp_hybrid_cpu_device::device_start(); + emc_start(); +} - return m_reg_P + 1; +bool hp_09825_67907_cpu_device::execute_no_bpc(uint16_t opcode , uint16_t& next_pc) +{ + // 15-bit IOC instructions + if ((opcode & 0xf760) == 0x7160) { + // Place/withdraw + uint16_t tmp; + uint16_t reg_addr = opcode & 7; + uint16_t *ptr_reg; + + if (BIT(opcode , 3)) { + ptr_reg = &m_reg_D; + } else { + ptr_reg = &m_reg_C; + } + + if (BIT(opcode , 4)) { + // Withdraw + tmp = RM(AEC_CASE_C , *ptr_reg); + if (BIT(opcode , 11)) { + // Byte + if (BIT(*ptr_reg , 15)) { + tmp >>= 8; + } else { + tmp &= 0xff; + } + } + WM(reg_addr , tmp); + + // Post inc/dec + inc_dec_cd(*ptr_reg , !BIT(opcode , 7) , BIT(opcode , 11)); + } else { + // Place + + // Pre inc/dec + inc_dec_cd(*ptr_reg , !BIT(opcode , 7) , BIT(opcode , 11)); + + tmp = RM(reg_addr); + uint16_t tmp_addr = *ptr_reg & ADDR_MASK_15BIT; + if (BIT(opcode , 11)) { + // Byte + tmp = BIT(*ptr_reg , 15) ? (tmp << 8) : (tmp & 0xff); + if (tmp_addr <= HP_REG_LAST_ADDR) { + // Single bytes can be written to registers. + // The addressed register gets the written byte in the proper position + // and a 0 in the other byte because access to registers is always done in + // 16 bits units. + WM(tmp_addr , tmp); + } else { + uint16_t mask = BIT(*ptr_reg , 15) ? 0xff00 : 0x00ff; + m_program->write_word(tmp_addr , tmp , mask); + m_icount -= m_w_cycles; + } + } else { + // Word + WM(AEC_CASE_C , tmp_addr , tmp); + } + } + m_icount -= 6; + next_pc = m_reg_P + 1; + return true; + } else { + return execute_emc(opcode , next_pc); + } } -uint32_t hp_5061_3011_cpu_device::add_mae(aec_cases_t aec_case , uint16_t addr) +void hp_09825_67907_cpu_device::inc_dec_cd(uint16_t& cd_reg , bool increment , bool byte) { - // No MAE on 3011 - return addr; + bool propagate; + if (byte) { + // Byte + // Toggle bit 15 + cd_reg ^= REG_MSB_MASK; + // When incrementing, propagate to 15 LSBs when bit 15 goes 0->1 + propagate = (cd_reg & REG_MSB_MASK) != 0; + if (!increment) { + // When decrementing, propagate when bit 15 goes 1->0 + propagate = !propagate; + } + } else { + // Word + propagate = true; + } + if (propagate) { + if (increment) { + cd_reg = (cd_reg & ~ADDR_MASK_15BIT) | ((cd_reg + 1) & ADDR_MASK_15BIT); + } else { + cd_reg = (cd_reg & ~ADDR_MASK_15BIT) | ((cd_reg - 1) & ADDR_MASK_15BIT); + } + } +} + +bool hp_09825_67907_cpu_device::read_non_common_reg(uint16_t addr , uint16_t& v) +{ + switch (addr) { + case HP_REG_DMAPA_ADDR: + v = m_dmapa; + return true; + + default: + return read_emc_reg(addr , v); + } } -uint16_t hp_5061_3011_cpu_device::read_non_common_reg(uint16_t addr) +bool hp_09825_67907_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) { - // Non-existing registers are returned as 0 - return 0; + return write_emc_reg(addr , v); +} + +uint16_t hp_09825_67907_cpu_device::get_indirect_target(uint32_t addr) +{ + uint16_t tmp; + bool ind; + + // Multi-level indirect addressing + // TODO: It wouldn't hurt to have some limit on iterations + do { + tmp = RM(addr); + ind = BIT(tmp , 15); + addr = tmp & ADDR_MASK_15BIT; + } while (ind); + + return tmp; +} + +void hp_09825_67907_cpu_device::handle_dma() +{ + bool tc = BIT(--m_dmac , 15) != 0; + uint16_t tmp; + + // Timing here assumes that DMA transfers are isolated and not done in bursts + if (BIT(m_dmama , 15)) { + // "Outward" DMA: memory -> peripheral + tmp = RM(AEC_CASE_D , m_dmama); + WIO(m_dmapa , tc ? 2 : 0 , tmp); + } else { + // "Inward" DMA: peripheral -> memory + tmp = RIO(m_dmapa , tc ? 2 : 0); + WM(AEC_CASE_D , m_dmama , tmp); + m_icount += 1; + } + m_dmama = (m_dmama & ~ADDR_MASK_15BIT) | ((m_dmama + 1) & ADDR_MASK_15BIT); } -void hp_5061_3011_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v) +std::unique_ptr<util::disasm_interface> hp_09825_67907_cpu_device::create_disassembler() { - // Non-existing registers are silently discarded + return std::make_unique<hp_09825_67907_disassembler>(m_relative_mode); } diff --git a/src/devices/cpu/hphybrid/hphybrid.h b/src/devices/cpu/hphybrid/hphybrid.h index 4b03035950a..5d29f77b515 100644 --- a/src/devices/cpu/hphybrid/hphybrid.h +++ b/src/devices/cpu/hphybrid/hphybrid.h @@ -8,15 +8,25 @@ // The HP hybrid processor series is composed of a few different models with different // capabilities. The series was derived from HP's own 2116 processor by translating a // discrete implementation of the 1960s into a multi-chip module (hence the "hybrid" name). -// This emulator currently supports both the 5061-3001 & the 5061-3011 versions. +// This emulator currently supports the 5061-3001, 5061-3011 and 09825-67907 versions. +// +// | *CPU* | *Addr bits* | *Multi-indirect* | *BPC* | *IOC* | *EMC* | *AEC* | *Used in* | +// |-------------+-------------+------------------+-------+-------+-------+-------+-----------| +// | 09825-67907 | 15 | Y | Y | Y | Y | N | HP 9825 | +// | 5061-3001 | 16 (+ext) | N | Y | Y | Y | Y | HP 9845 | +// | 5061-3011 | 16 | N | Y | Y | N | N | HP 64000 | // // For this emulator I mainly relied on these sources: +// - "The how they do dat manual": this manual has way more than you will ever want to know +// about the hybrid processors. It often gets to the single transistor detail level.. +// - "Reference manual for the CPD N-MOS II Processor": this is an internal HP manual that +// was targeted at the hw/sw user of the processors. // - http://www.hp9845.net/ website -// - HP manual "Assembly development ROM manual for the HP9845": this is the most precious -// and "enabling" resource of all +// - HP manual "Assembly development ROM manual for the HP9845" +// - US Patent 4,075,679 describing the HP9825 system // - US Patent 4,180,854 describing the HP9845 system // - Study of disassembly of firmware of HP64000 & HP9845 systems -// - hp9800e emulator for inspiration on implementing EMC instructions +// - hp9800e emulator (now go9800) for inspiration on implementing EMC instructions // - A lot of "educated" guessing #ifndef MAME_CPU_HPHYBRID_HPHYBRID_H @@ -37,15 +47,7 @@ #define HP_IOADDR_IC_SHIFT 0 // Compose an I/O address from PA & IC -#define HP_MAKE_IOADDR(pa , ic) (((pa) << HP_IOADDR_PA_SHIFT) | ((ic) << HP_IOADDR_IC_SHIFT)) - -// Set boot mode of 5061-3001: either normal (false) or as in HP9845 system (true) -#define MCFG_HPHYBRID_SET_9845_BOOT(_mode) \ - downcast<hp_5061_3001_cpu_device &>(*device).set_boot_mode(_mode); - -// PA changed callback -#define MCFG_HPHYBRID_PA_CHANGED(_devcb) \ - downcast<hp_hybrid_cpu_device &>(*device).set_pa_changed_func(DEVCB_##_devcb); +inline constexpr unsigned HP_MAKE_IOADDR(unsigned pa , unsigned ic) { return ((pa << HP_IOADDR_PA_SHIFT) | (ic << HP_IOADDR_IC_SHIFT)); } class hp_hybrid_cpu_device : public cpu_device { @@ -57,7 +59,10 @@ public: uint8_t pa_r() const; - template <class Object> devcb_base &set_pa_changed_func(Object &&cb) { return m_pa_changed_func.set_callback(std::forward<Object>(cb)); } + auto pa_changed_cb() { return m_pa_changed_func.bind(); } + + void set_relative_mode(bool rela) { m_relative_mode = rela; } + void set_rw_cycles(unsigned read_cycles , unsigned write_cycles) { m_r_cycles = read_cycles; m_w_cycles = write_cycles; } protected: hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t addrwidth); @@ -67,16 +72,22 @@ protected: virtual void device_reset() override; // device_execute_interface overrides - virtual uint32_t execute_min_cycles() const override { return 6; } + virtual uint32_t execute_min_cycles() const override { return m_r_cycles; } virtual uint32_t execute_input_lines() const override { return 2; } virtual uint32_t execute_default_irq_vector(int inputnum) const override { return 0xff; } virtual void execute_run() override; virtual void execute_set_input(int inputnum, int state) override; uint16_t execute_one(uint16_t opcode); - uint16_t execute_one_sub(uint16_t opcode); - // Execute an instruction that doesn't belong to either BPC or IOC - virtual uint16_t execute_no_bpc_ioc(uint16_t opcode) = 0; + bool execute_one_bpc(uint16_t opcode , uint16_t& next_pc); + // Execute an instruction that doesn't belong to BPC + virtual bool execute_no_bpc(uint16_t opcode , uint16_t& next_pc) = 0; + + // Add EMC state + void emc_start(); + + // Execute EMC instructions + bool execute_emc(uint16_t opcode , uint16_t& next_pc); // device_memory_interface overrides virtual space_config_vector memory_space_config() const override; @@ -84,9 +95,6 @@ protected: // device_state_interface overrides virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; - // device_disasm_interface overrides - virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; - // Different cases of memory access // See patent @ pg 361 typedef enum { @@ -97,25 +105,42 @@ protected: } aec_cases_t; // do memory address extension - virtual uint32_t add_mae(aec_cases_t aec_case , uint16_t addr) = 0; + virtual uint32_t add_mae(aec_cases_t aec_case , uint16_t addr); - uint16_t remove_mae(uint32_t addr); + static uint16_t remove_mae(uint32_t addr); uint16_t RM(aec_cases_t aec_case , uint16_t addr); uint16_t RM(uint32_t addr); - virtual uint16_t read_non_common_reg(uint16_t addr) = 0; + virtual bool read_non_common_reg(uint16_t addr , uint16_t& v) = 0; + bool read_emc_reg(uint16_t addr , uint16_t& v); void WM(aec_cases_t aec_case , uint16_t addr , uint16_t v); void WM(uint32_t addr , uint16_t v); - virtual void write_non_common_reg(uint16_t addr , uint16_t v) = 0; + virtual bool write_non_common_reg(uint16_t addr , uint16_t v) = 0; + bool write_emc_reg(uint16_t addr , uint16_t v); + + uint16_t RIO(uint8_t pa , uint8_t ic); + void WIO(uint8_t pa , uint8_t ic , uint16_t v); uint16_t fetch(); + virtual uint16_t get_indirect_target(uint32_t addr); + virtual void enter_isr(); + virtual void handle_dma() = 0; uint16_t get_skip_addr(uint16_t opcode , bool condition) const; + void update_pa(); + devcb_write8 m_pa_changed_func; + uint8_t m_last_pa; int m_icount; + uint32_t m_addr_mask; + uint16_t m_addr_mask_low16; + bool m_relative_mode; + unsigned m_r_cycles; + unsigned m_w_cycles; + bool m_boot_mode; bool m_forced_bsc_25; // State of processor @@ -134,85 +159,112 @@ protected: uint16_t m_dmac; // DMA counter uint16_t m_reg_I; // Instruction register uint32_t m_genpc; // Full PC + // EMC registers + uint16_t m_reg_ar2[ 4 ]; // AR2 register + uint16_t m_reg_se; // SE register (4 bits) + uint16_t m_reg_r25; // R25 register + uint16_t m_reg_r26; // R26 register + uint16_t m_reg_r27; // R27 register + + address_space *m_program; private: address_space_config m_program_config; address_space_config m_io_config; - address_space *m_program; memory_access_cache<1, -1, ENDIANNESS_BIG> *m_cache; address_space *m_io; uint32_t get_ea(uint16_t opcode); void do_add(uint16_t& addend1 , uint16_t addend2); - uint16_t get_skip_addr_sc(uint16_t opcode , uint16_t& v , unsigned n); - uint16_t get_skip_addr_sc(uint16_t opcode , uint32_t& v , unsigned n); - void do_pw(uint16_t opcode); + template<typename T> uint16_t get_skip_addr_sc(uint16_t opcode , T& v , unsigned n); void check_for_interrupts(); - virtual void enter_isr(); - void handle_dma(); - uint16_t RIO(uint8_t pa , uint8_t ic); - void WIO(uint8_t pa , uint8_t ic , uint16_t v); + static uint8_t do_dec_shift_r(uint8_t d1 , uint64_t& mantissa); + static uint8_t do_dec_shift_l(uint8_t d12 , uint64_t& mantissa); + uint64_t get_ar1(); + void set_ar1(uint64_t v); + uint64_t get_ar2() const; + void set_ar2(uint64_t v); + uint64_t do_mrxy(uint64_t ar); + bool do_dec_add(bool carry_in , uint64_t& a , uint64_t b); + void do_mpy(); +}; + +class hp_5061_3011_cpu_device : public hp_hybrid_cpu_device +{ +public: + hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + hp_5061_3011_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t addrwidth); + // TODO: fix + virtual uint32_t execute_max_cycles() const override { return 25; } + virtual bool execute_no_bpc(uint16_t opcode , uint16_t& next_pc) override; + virtual bool read_non_common_reg(uint16_t addr , uint16_t& v) override; + virtual bool write_non_common_reg(uint16_t addr , uint16_t v) override; + virtual void handle_dma() override; + + // device_disasm_interface overrides + virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; }; -class hp_5061_3001_cpu_device : public hp_hybrid_cpu_device +class hp_5061_3001_cpu_device : public hp_5061_3011_cpu_device { public: hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - void set_boot_mode(bool mode) { m_boot_mode = mode; } + // Set boot mode of 5061-3001: either normal (false) or as in HP9845 system (true) + void set_9845_boot_mode(bool mode) { m_boot_mode = mode; } protected: virtual void device_start() override; virtual void device_reset() override; + // TODO: fix virtual uint32_t execute_max_cycles() const override { return 237; } // FMP 15 - static uint8_t do_dec_shift_r(uint8_t d1 , uint64_t& mantissa); - static uint8_t do_dec_shift_l(uint8_t d12 , uint64_t& mantissa); - uint64_t get_ar1(); - void set_ar1(uint64_t v); - uint64_t get_ar2() const; - void set_ar2(uint64_t v); - uint64_t do_mrxy(uint64_t ar); - bool do_dec_add(bool carry_in , uint64_t& a , uint64_t b); - void do_mpy(); - - virtual uint16_t execute_no_bpc_ioc(uint16_t opcode) override; - virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; + virtual bool execute_no_bpc(uint16_t opcode , uint16_t& next_pc) override; virtual uint32_t add_mae(aec_cases_t aec_case, uint16_t addr) override; - virtual uint16_t read_non_common_reg(uint16_t addr) override; - virtual void write_non_common_reg(uint16_t addr , uint16_t v) override; + virtual bool read_non_common_reg(uint16_t addr , uint16_t& v) override; + virtual bool write_non_common_reg(uint16_t addr , uint16_t v) override; + virtual void enter_isr() override; + // device_disasm_interface overrides + virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; private: - bool m_boot_mode; - // Additional state of processor - uint16_t m_reg_ar2[ 4 ]; // AR2 register - uint16_t m_reg_se; // SE register (4 bits) - uint16_t m_reg_r25; // R25 register - uint16_t m_reg_r26; // R26 register - uint16_t m_reg_r27; // R27 register uint16_t m_reg_aec[ 37 - 32 + 1 ]; // AEC registers R32-R37 - - virtual void enter_isr() override; }; -class hp_5061_3011_cpu_device : public hp_hybrid_cpu_device +class hp_09825_67907_cpu_device : public hp_hybrid_cpu_device { public: - hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + hp_09825_67907_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: - virtual uint32_t execute_max_cycles() const override { return 25; } - virtual uint16_t execute_no_bpc_ioc(uint16_t opcode) override; - virtual uint32_t add_mae(aec_cases_t aec_case , uint16_t addr) override; - virtual uint16_t read_non_common_reg(uint16_t addr) override; - virtual void write_non_common_reg(uint16_t addr , uint16_t v) override; + // device-level overrides + virtual void device_start() override; + // device_execute_interface overrides + // TODO: fix + virtual uint32_t execute_max_cycles() const override { return 237; } // FMP 15 + + virtual bool execute_no_bpc(uint16_t opcode , uint16_t& next_pc) override; + + // device_disasm_interface overrides + virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; + + virtual bool read_non_common_reg(uint16_t addr , uint16_t& v) override; + virtual bool write_non_common_reg(uint16_t addr , uint16_t v) override; + virtual uint16_t get_indirect_target(uint32_t addr) override; + virtual void handle_dma() override; + +private: + void inc_dec_cd(uint16_t& cd_reg , bool increment , bool byte); }; DECLARE_DEVICE_TYPE(HP_5061_3001, hp_5061_3001_cpu_device) DECLARE_DEVICE_TYPE(HP_5061_3011, hp_5061_3011_cpu_device) +DECLARE_DEVICE_TYPE(HP_09825_67907 , hp_09825_67907_cpu_device) #endif // MAME_CPU_HPHYBRID_HPHYBRID_H diff --git a/src/devices/cpu/hphybrid/hphybrid_dasm.cpp b/src/devices/cpu/hphybrid/hphybrid_dasm.cpp index 74d833803c0..fc7b63559e0 100644 --- a/src/devices/cpu/hphybrid/hphybrid_dasm.cpp +++ b/src/devices/cpu/hphybrid/hphybrid_dasm.cpp @@ -8,86 +8,15 @@ #include "hphybrid_dasm.h" #include "hphybrid_defs.h" -void hp_hybrid_disassembler::addr_2_str(std::ostream &stream, uint16_t addr , bool indirect , bool is_3001) +void hp_hybrid_disassembler::addr_2_str(std::ostream &stream, uint16_t addr , bool indirect) { - util::stream_format(stream, "$%04x" , addr); - - if (is_3001) { - switch (addr) { - case HP_REG_AR1_ADDR: - stream << "(Ar1)"; - break; - - case HP_REG_AR1_ADDR + 1: - stream << "(Ar1_2)"; - break; - - case HP_REG_AR1_ADDR + 2: - stream << "(Ar1_3)"; - break; - - case HP_REG_AR1_ADDR + 3: - stream << "(Ar1_4)"; - break; - - case HP_REG_AR2_ADDR: - stream << "(Ar2)"; - break; - - case HP_REG_AR2_ADDR + 1: - stream << "(Ar2_2)"; - break; - - case HP_REG_AR2_ADDR + 2: - stream << "(Ar2_3)"; - break; - - case HP_REG_AR2_ADDR + 3: - stream << "(Ar2_4)"; - break; - - case HP_REG_SE_ADDR: - stream << "(SE)"; - break; - - case HP_REG_R25_ADDR: - stream << "(R25)"; - break; - - case HP_REG_R26_ADDR: - stream << "(R26)"; - break; - - case HP_REG_R27_ADDR: - stream << "(R27)"; - break; - - case HP_REG_R32_ADDR: - stream << "(R32)"; - break; - - case HP_REG_R33_ADDR: - stream << "(R33)"; - break; - - case HP_REG_R34_ADDR: - stream << "(R34)"; - break; - - case HP_REG_R35_ADDR: - stream << "(R35)"; - break; - - case HP_REG_R36_ADDR: - stream << "(R36)"; - break; - - case HP_REG_R37_ADDR: - stream << "(R37)"; - break; - } + if (m_flags & HP_HYBRID_DASM_HAS_15BITS) { + addr &= 0x7fff; } + util::stream_format(stream, "$%04x" , addr); + + // Common registers switch (addr) { case HP_REG_A_ADDR: stream << "(A)"; @@ -148,6 +77,116 @@ void hp_hybrid_disassembler::addr_2_str(std::ostream &stream, uint16_t addr , bo case HP_REG_D_ADDR: stream << "(D)"; break; + + default: + // EMC registers + if (m_flags & HP_HYBRID_DASM_HAS_EMC) { + if (m_flags & HP_HYBRID_DASM_HAS_15BITS) { + switch (addr) { + case HP_REG_AR1_ADDR & 0x7fff: + stream << "(Ar1)"; + break; + + case (HP_REG_AR1_ADDR & 0x7fff) + 1: + stream << "(Ar1_2)"; + break; + + case (HP_REG_AR1_ADDR & 0x7fff) + 2: + stream << "(Ar1_3)"; + break; + + case (HP_REG_AR1_ADDR & 0x7fff) + 3: + stream << "(Ar1_4)"; + break; + } + } else { + switch (addr) { + case HP_REG_AR1_ADDR: + stream << "(Ar1)"; + break; + + case HP_REG_AR1_ADDR + 1: + stream << "(Ar1_2)"; + break; + + case HP_REG_AR1_ADDR + 2: + stream << "(Ar1_3)"; + break; + + case HP_REG_AR1_ADDR + 3: + stream << "(Ar1_4)"; + break; + } + } + switch (addr) { + case HP_REG_AR2_ADDR: + stream << "(Ar2)"; + break; + + case HP_REG_AR2_ADDR + 1: + stream << "(Ar2_2)"; + break; + + case HP_REG_AR2_ADDR + 2: + stream << "(Ar2_3)"; + break; + + case HP_REG_AR2_ADDR + 3: + stream << "(Ar2_4)"; + break; + + case HP_REG_SE_ADDR: + stream << "(SE)"; + break; + + case HP_REG_R25_ADDR: + stream << "(R25)"; + break; + + case HP_REG_R26_ADDR: + stream << "(R26)"; + break; + + case HP_REG_R27_ADDR: + stream << "(R27)"; + break; + + default: + break; + } + } + // AEC registers + if (m_flags & HP_HYBRID_DASM_HAS_AEC) { + switch (addr) { + case HP_REG_R32_ADDR: + stream << "(R32)"; + break; + + case HP_REG_R33_ADDR: + stream << "(R33)"; + break; + + case HP_REG_R34_ADDR: + stream << "(R34)"; + break; + + case HP_REG_R35_ADDR: + stream << "(R35)"; + break; + + case HP_REG_R36_ADDR: + stream << "(R36)"; + break; + + case HP_REG_R37_ADDR: + stream << "(R37)"; + break; + + default: + break; + } + } + break; } if (indirect) { @@ -155,18 +194,23 @@ void hp_hybrid_disassembler::addr_2_str(std::ostream &stream, uint16_t addr , bo } } -void hp_hybrid_disassembler::param_none(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_none(std::ostream &stream, offs_t pc , uint16_t opcode) { } -void hp_hybrid_disassembler::param_loc(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_loc(std::ostream &stream, offs_t pc , uint16_t opcode) { uint16_t base; uint16_t off; if (opcode & 0x0400) { - // Current page - base = pc; + if (m_flags & HP_HYBRID_DASM_ABS_MODE) { + // Current page, absolute mode + base = (pc & 0xfc00) | 0x200; + } else { + // Current page, relative mode + base = pc; + } } else { // Base page base = 0; @@ -177,26 +221,26 @@ void hp_hybrid_disassembler::param_loc(std::ostream &stream, offs_t pc , uint16_ off -= 0x400; } - addr_2_str(stream, base + off , (opcode & 0x8000) != 0 , is_3001); + addr_2_str(stream, base + off , (opcode & 0x8000) != 0); } -void hp_hybrid_disassembler::param_addr32(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_addr32(std::ostream &stream, offs_t pc , uint16_t opcode) { - addr_2_str(stream, opcode & 0x1f , (opcode & 0x8000) != 0 , is_3001); + addr_2_str(stream, opcode & 0x1f , (opcode & 0x8000) != 0); } -void hp_hybrid_disassembler::param_skip(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_skip(std::ostream &stream, offs_t pc , uint16_t opcode) { uint16_t off = opcode & 0x3f; if (off & 0x20) { off -= 0x40; } - addr_2_str(stream , pc + off , false , is_3001); + addr_2_str(stream , pc + off , false); } -void hp_hybrid_disassembler::param_skip_sc(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_skip_sc(std::ostream &stream, offs_t pc , uint16_t opcode) { - param_skip(stream, pc, opcode , is_3001); + param_skip(stream, pc, opcode); if (opcode & 0x80) { if (opcode & 0x40) { @@ -207,7 +251,7 @@ void hp_hybrid_disassembler::param_skip_sc(std::ostream &stream, offs_t pc , uin } } -void hp_hybrid_disassembler::param_ret(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_ret(std::ostream &stream, offs_t pc , uint16_t opcode) { int off = opcode & 0x3f; @@ -221,14 +265,14 @@ void hp_hybrid_disassembler::param_ret(std::ostream &stream, offs_t pc , uint16_ } } -void hp_hybrid_disassembler::param_n16(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_n16(std::ostream &stream, offs_t pc , uint16_t opcode) { util::stream_format(stream , "%u" , (opcode & 0xf) + 1); } -void hp_hybrid_disassembler::param_reg_id(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001) +void hp_hybrid_disassembler::param_reg_id(std::ostream &stream, offs_t pc , uint16_t opcode) { - addr_2_str(stream, opcode & 7, false , is_3001); + addr_2_str(stream, opcode & 7, false); if (opcode & 0x80) { stream << ",D"; @@ -237,123 +281,131 @@ void hp_hybrid_disassembler::param_reg_id(std::ostream &stream, offs_t pc , uint } } -const hp_hybrid_disassembler::dis_entry_t hp_hybrid_disassembler::dis_table[] = { - // *** BPC Instructions *** - {0xffff , 0x0000 , "NOP" , &hp_hybrid_disassembler::param_none , 0 }, - {0x7800 , 0x0000 , "LDA" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x0800 , "LDB" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x1000 , "CPA" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x1800 , "CPB" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x2000 , "ADA" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x2800 , "ADB" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x3000 , "STA" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x3800 , "STB" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x4000 , "JSM" , &hp_hybrid_disassembler::param_loc , STEP_OVER }, - {0x7800 , 0x4800 , "ISZ" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x5000 , "AND" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x5800 , "DSZ" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x6000 , "IOR" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7800 , 0x6800 , "JMP" , &hp_hybrid_disassembler::param_loc , 0 }, - {0x7fe0 , 0x7000 , "EXE" , &hp_hybrid_disassembler::param_addr32 , 0 }, - {0xffc0 , 0x7400 , "RZA" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7C00 , "RZB" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7440 , "RIA" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7C40 , "RIB" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7500 , "SZA" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7D00 , "SZB" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7540 , "SIA" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7D40 , "SIB" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7480 , "SFS" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7580 , "SFC" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7c80 , "SSS" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7d80 , "SSC" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7cc0 , "SHS" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xffc0 , 0x7dc0 , "SHC" , &hp_hybrid_disassembler::param_skip , 0 }, - {0xff00 , 0x7600 , "SLA" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0x7e00 , "SLB" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0x7700 , "RLA" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0x7f00 , "RLB" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xf400 , "SAP" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xfc00 , "SBP" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xf500 , "SAM" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xfd00 , "SBM" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xf600 , "SOC" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xf700 , "SOS" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xfe00 , "SEC" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xff00 , 0xff00 , "SES" , &hp_hybrid_disassembler::param_skip_sc , 0 }, - {0xffff , 0xf020 , "TCA" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0xf820 , "TCB" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0xf060 , "CMA" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0xf860 , "CMB" , &hp_hybrid_disassembler::param_none , 0 }, - {0xff80 , 0xf080 , "RET" , &hp_hybrid_disassembler::param_ret , STEP_OUT }, - {0xfff0 , 0xf100 , "AAR" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xfff0 , 0xf900 , "ABR" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xffff , 0xf14f , "CLA" , &hp_hybrid_disassembler::param_none , 0 }, - {0xfff0 , 0xf140 , "SAR" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xffff , 0xf94f , "CLB" , &hp_hybrid_disassembler::param_none , 0 }, - {0xfff0 , 0xf940 , "SBR" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xfff0 , 0xf180 , "SAL" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xfff0 , 0xf980 , "SBL" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xfff0 , 0xf1c0 , "RAR" , &hp_hybrid_disassembler::param_n16 , 0 }, - {0xfff0 , 0xf9c0 , "RBR" , &hp_hybrid_disassembler::param_n16 , 0 }, - // *** IOC Instructions *** - {0xffff , 0x7100 , "SDO" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7108 , "SDI" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7110 , "EIR" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7118 , "DIR" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7120 , "DMA" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7128 , "PCM" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7138 , "DDR" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7140 , "DBL" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7148 , "CBL" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7150 , "DBU" , &hp_hybrid_disassembler::param_none , 0 }, - {0xffff , 0x7158 , "CBU" , &hp_hybrid_disassembler::param_none , 0 }, - {0xff78 , 0x7160 , "PWC" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7168 , "PWD" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7960 , "PBC" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7968 , "PBD" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7170 , "WWC" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7178 , "WWD" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7970 , "WBC" , &hp_hybrid_disassembler::param_reg_id , 0 }, - {0xff78 , 0x7978 , "WBD" , &hp_hybrid_disassembler::param_reg_id , 0 }, - // *** END *** - {0 , 0 , nullptr , nullptr , 0 } +const hp_hybrid_disassembler::dis_entry_t hp_hybrid_disassembler::dis_table_common[] = { + // *** BPC Instructions *** + {0xffff , 0x0000 , "NOP" , &hp_hybrid_disassembler::param_none , 0 }, + {0x7800 , 0x0000 , "LDA" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x0800 , "LDB" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x1000 , "CPA" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x1800 , "CPB" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x2000 , "ADA" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x2800 , "ADB" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x3000 , "STA" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x3800 , "STB" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x4000 , "JSM" , &hp_hybrid_disassembler::param_loc , STEP_OVER }, + {0x7800 , 0x4800 , "ISZ" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x5000 , "AND" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x5800 , "DSZ" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x6000 , "IOR" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7800 , 0x6800 , "JMP" , &hp_hybrid_disassembler::param_loc , 0 }, + {0x7fe0 , 0x7000 , "EXE" , &hp_hybrid_disassembler::param_addr32 , 0 }, + {0xffc0 , 0x7400 , "RZA" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7C00 , "RZB" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7440 , "RIA" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7C40 , "RIB" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x74c0 , "SDS" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7500 , "SZA" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7D00 , "SZB" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7540 , "SIA" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7D40 , "SIB" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7480 , "SFS" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7580 , "SFC" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x75c0 , "SDC" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7c80 , "SSS" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7d80 , "SSC" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7cc0 , "SHS" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xffc0 , 0x7dc0 , "SHC" , &hp_hybrid_disassembler::param_skip , 0 }, + {0xff00 , 0x7600 , "SLA" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0x7e00 , "SLB" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0x7700 , "RLA" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0x7f00 , "RLB" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xf400 , "SAP" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xfc00 , "SBP" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xf500 , "SAM" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xfd00 , "SBM" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xf600 , "SOC" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xf700 , "SOS" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xfe00 , "SEC" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xff00 , 0xff00 , "SES" , &hp_hybrid_disassembler::param_skip_sc , 0 }, + {0xffff , 0xf020 , "TCA" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0xf820 , "TCB" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0xf060 , "CMA" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0xf860 , "CMB" , &hp_hybrid_disassembler::param_none , 0 }, + {0xff80 , 0xf080 , "RET" , &hp_hybrid_disassembler::param_ret , STEP_OUT }, + {0xfff0 , 0xf100 , "AAR" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xfff0 , 0xf900 , "ABR" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xffff , 0xf14f , "CLA" , &hp_hybrid_disassembler::param_none , 0 }, + {0xfff0 , 0xf140 , "SAR" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xffff , 0xf94f , "CLB" , &hp_hybrid_disassembler::param_none , 0 }, + {0xfff0 , 0xf940 , "SBR" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xfff0 , 0xf180 , "SAL" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xfff0 , 0xf980 , "SBL" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xfff0 , 0xf1c0 , "RAR" , &hp_hybrid_disassembler::param_n16 , 0 }, + {0xfff0 , 0xf9c0 , "RBR" , &hp_hybrid_disassembler::param_n16 , 0 }, + // *** IOC Instructions *** + {0xffff , 0x7110 , "EIR" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7118 , "DIR" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7120 , "DMA" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7128 , "PCM" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7138 , "DDR" , &hp_hybrid_disassembler::param_none , 0 }, + {0xff78 , 0x7160 , "PWC" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7168 , "PWD" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7960 , "PBC" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7968 , "PBD" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7170 , "WWC" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7178 , "WWD" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7970 , "WBC" , &hp_hybrid_disassembler::param_reg_id , 0 }, + {0xff78 , 0x7978 , "WBD" , &hp_hybrid_disassembler::param_reg_id , 0 }, + // *** END *** + {0 , 0 , nullptr , nullptr , 0 } }; - -const hp_hybrid_disassembler::dis_entry_t hp_5061_3001_disassembler::dis_table_emc[] = { - // *** EMC Instructions *** - {0xffff , 0x7200 , "MWA" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7220 , "CMY" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7260 , "CMX" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7280 , "FXA" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xfff0 , 0x7300 , "XFR" , &hp_5061_3001_disassembler::param_n16 , 0 }, - {0xffff , 0x7340 , "NRM" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xfff0 , 0x7380 , "CLR" , &hp_5061_3001_disassembler::param_n16 , 0 }, - {0xffff , 0x73c0 , "CDC" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffc0 , 0x74c0 , "SDS" , &hp_5061_3001_disassembler::param_skip , 0 }, - {0xffc0 , 0x75c0 , "SDC" , &hp_5061_3001_disassembler::param_skip , 0 }, - {0xffff , 0x7a00 , "FMP" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7a21 , "FDV" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7b00 , "MRX" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7b21 , "DRS" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7b40 , "MRY" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7b61 , "MLY" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7b8f , "MPY" , &hp_5061_3001_disassembler::param_none , 0 }, - // *** Undocumented instructions of 5061-3001 *** - {0xffff , 0x7026 , "CIM" , &hp_5061_3001_disassembler::param_none , 0 }, - {0xffff , 0x7027 , "SIM" , &hp_5061_3001_disassembler::param_none , 0 }, - // *** END *** - {0 , 0 , nullptr , nullptr , 0 } +const hp_hybrid_disassembler::dis_entry_t hp_hybrid_disassembler::dis_table_ioc16[] = { + // *** IOC-16 instructions *** + {0xffff , 0x7100 , "SDO" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7108 , "SDI" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7140 , "DBL" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7148 , "CBL" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7150 , "DBU" , &hp_hybrid_disassembler::param_none , 0 }, + {0xffff , 0x7158 , "CBU" , &hp_hybrid_disassembler::param_none , 0 }, + // *** END *** + {0 , 0 , nullptr , nullptr , 0 } +}; +const hp_hybrid_disassembler::dis_entry_t hp_hybrid_disassembler::dis_table_emc[] = { + // *** EMC Instructions *** + {0xffff , 0x7200 , "MWA" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7220 , "CMY" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7260 , "CMX" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7280 , "FXA" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xfff0 , 0x7300 , "XFR" , &hp_5061_3001_disassembler::param_n16 , 0 }, + {0xffff , 0x7340 , "NRM" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xfff0 , 0x7380 , "CLR" , &hp_5061_3001_disassembler::param_n16 , 0 }, + {0xffff , 0x73c0 , "CDC" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7a00 , "FMP" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7a21 , "FDV" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7b00 , "MRX" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7b21 , "DRS" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7b40 , "MRY" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7b61 , "MLY" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7b8f , "MPY" , &hp_5061_3001_disassembler::param_none , 0 }, + // *** END *** + {0 , 0 , nullptr , nullptr , 0 } +}; +const hp_hybrid_disassembler::dis_entry_t hp_hybrid_disassembler::dis_table_aec[] = { + // *** Undocumented AEC instructions of 5061-3001 *** + {0xffff , 0x7026 , "CIM" , &hp_5061_3001_disassembler::param_none , 0 }, + {0xffff , 0x7027 , "SIM" , &hp_5061_3001_disassembler::param_none , 0 }, + // *** END *** + {0 , 0 , nullptr , nullptr , 0 } }; -offs_t hp_hybrid_disassembler::disassemble_table(uint16_t opcode , offs_t pc , const dis_entry_t *table , bool is_3001 , std::ostream &stream) +offs_t hp_hybrid_disassembler::disassemble_table(uint16_t opcode , offs_t pc , const dis_entry_t *table , std::ostream &stream) { const dis_entry_t *p; for (p = table; p->m_op_mask; p++) { if ((opcode & p->m_op_mask) == p->m_opcode) { stream << p->m_mnemonic << " "; - (this->*(p->m_param_fn))(stream , pc , opcode , is_3001); + (this->*(p->m_param_fn))(stream , pc , opcode); return 1 | p->m_dasm_flags | SUPPORTED; } } @@ -366,10 +418,19 @@ offs_t hp_hybrid_disassembler::disassemble(std::ostream &stream, offs_t pc, cons uint16_t opcode = opcodes.r16(pc); offs_t res; - res = disassemble_table(opcode, pc, dis_table, false, stream); + res = disassemble_table(opcode, pc, dis_table_common, stream); - if (res == 0) - { + if (res == 0 && (m_flags & HP_HYBRID_DASM_HAS_15BITS) == 0) { + res = disassemble_table(opcode, pc, dis_table_ioc16, stream); + } + if (res == 0 && (m_flags & HP_HYBRID_DASM_HAS_EMC) != 0) { + res = disassemble_table(opcode, pc, dis_table_emc, stream); + } + if (res == 0 && (m_flags & HP_HYBRID_DASM_HAS_AEC) != 0) { + res = disassemble_table(opcode, pc, dis_table_aec, stream); + } + + if (res == 0) { // Unknown opcode stream << "???"; res = 1 | SUPPORTED; @@ -378,26 +439,28 @@ offs_t hp_hybrid_disassembler::disassemble(std::ostream &stream, offs_t pc, cons return res; } -offs_t hp_5061_3001_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) +hp_hybrid_disassembler::hp_hybrid_disassembler(unsigned flags) + : m_flags(flags) { - uint16_t opcode = opcodes.r16(pc); - offs_t res; - - res = disassemble_table(opcode, pc, dis_table_emc, true, stream); +} - if (res == 0) - { - res = disassemble_table(opcode, pc, dis_table, true, stream); - } +hp_5061_3011_disassembler::hp_5061_3011_disassembler(bool relative_mode) + : hp_hybrid_disassembler(relative_mode ? 0 : HP_HYBRID_DASM_ABS_MODE) +{ +} - if (res == 0) - { - // Unknown opcode - stream << "???"; - res = 1 | SUPPORTED; - } +hp_5061_3001_disassembler::hp_5061_3001_disassembler(bool relative_mode) + : hp_hybrid_disassembler(HP_HYBRID_DASM_HAS_EMC | + HP_HYBRID_DASM_HAS_AEC | + (relative_mode ? 0 : HP_HYBRID_DASM_ABS_MODE)) +{ +} - return res; +hp_09825_67907_disassembler::hp_09825_67907_disassembler(bool relative_mode) + : hp_hybrid_disassembler(HP_HYBRID_DASM_HAS_15BITS | + HP_HYBRID_DASM_HAS_EMC | + (relative_mode ? 0 : HP_HYBRID_DASM_ABS_MODE)) +{ } u32 hp_hybrid_disassembler::opcode_alignment() const diff --git a/src/devices/cpu/hphybrid/hphybrid_dasm.h b/src/devices/cpu/hphybrid/hphybrid_dasm.h index 96994ae0632..4059a4aa90a 100644 --- a/src/devices/cpu/hphybrid/hphybrid_dasm.h +++ b/src/devices/cpu/hphybrid/hphybrid_dasm.h @@ -9,17 +9,24 @@ #pragma once +enum : unsigned { + HP_HYBRID_DASM_HAS_15BITS = 1, + HP_HYBRID_DASM_HAS_EMC = 2, + HP_HYBRID_DASM_HAS_AEC = 4, + HP_HYBRID_DASM_ABS_MODE = 8 +}; + class hp_hybrid_disassembler : public util::disasm_interface { public: - hp_hybrid_disassembler() = default; + hp_hybrid_disassembler(unsigned flags); virtual ~hp_hybrid_disassembler() = default; virtual u32 opcode_alignment() const override; virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; protected: - typedef void (hp_hybrid_disassembler::*fn_dis_param)(std::ostream &stream , offs_t pc , uint16_t opcode , bool is_3001); + typedef void (hp_hybrid_disassembler::*fn_dis_param)(std::ostream &stream , offs_t pc , uint16_t opcode); typedef struct { uint16_t m_op_mask; @@ -29,31 +36,44 @@ protected: uint32_t m_dasm_flags; } dis_entry_t; - static const dis_entry_t dis_table[]; + unsigned m_flags; + static const dis_entry_t dis_table_common[]; + static const dis_entry_t dis_table_ioc16[]; + static const dis_entry_t dis_table_emc[]; + static const dis_entry_t dis_table_aec[]; - void addr_2_str(std::ostream &stream, uint16_t addr , bool indirect , bool is_3001); - void param_none(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_loc(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_addr32(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_skip(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_skip_sc(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_ret(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_n16(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); - void param_reg_id(std::ostream &stream, offs_t pc , uint16_t opcode , bool is_3001); + void addr_2_str(std::ostream &stream, uint16_t addr , bool indirect); + void param_none(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_loc(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_addr32(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_skip(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_skip_sc(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_ret(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_n16(std::ostream &stream, offs_t pc , uint16_t opcode); + void param_reg_id(std::ostream &stream, offs_t pc , uint16_t opcode); - offs_t disassemble_table(uint16_t opcode , offs_t pc , const dis_entry_t *table , bool is_3001 , std::ostream &stream); + offs_t disassemble_table(uint16_t opcode , offs_t pc , const dis_entry_t *table , std::ostream &stream); }; class hp_5061_3001_disassembler : public hp_hybrid_disassembler { public: - hp_5061_3001_disassembler() = default; + hp_5061_3001_disassembler(bool relative_mode = true); virtual ~hp_5061_3001_disassembler() = default; +}; - virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; +class hp_5061_3011_disassembler : public hp_hybrid_disassembler +{ +public: + hp_5061_3011_disassembler(bool relative_mode = true); + virtual ~hp_5061_3011_disassembler() = default; +}; -protected: - static const dis_entry_t dis_table_emc[]; +class hp_09825_67907_disassembler : public hp_hybrid_disassembler +{ +public: + hp_09825_67907_disassembler(bool relative_mode = false); + virtual ~hp_09825_67907_disassembler() = default; }; #endif diff --git a/src/devices/cpu/hphybrid/hphybrid_defs.h b/src/devices/cpu/hphybrid/hphybrid_defs.h index 634a74b94a4..7b2c22a8661 100644 --- a/src/devices/cpu/hphybrid/hphybrid_defs.h +++ b/src/devices/cpu/hphybrid/hphybrid_defs.h @@ -2,37 +2,36 @@ #define MAME_CPU_HPHYBRID_HPHYBRID_DEFS_H // Addresses of memory mapped registers -#define HP_REG_A_ADDR 0x0000 -#define HP_REG_B_ADDR 0x0001 -#define HP_REG_P_ADDR 0x0002 -#define HP_REG_R_ADDR 0x0003 -#define HP_REG_R4_ADDR 0x0004 -#define HP_REG_R5_ADDR 0x0005 -#define HP_REG_R6_ADDR 0x0006 -#define HP_REG_R7_ADDR 0x0007 -#define HP_REG_IV_ADDR 0x0008 -#define HP_REG_PA_ADDR 0x0009 -#define HP_REG_W_ADDR 0x000A -#define HP_REG_DMAPA_ADDR 0x000B -#define HP_REG_DMAMA_ADDR 0x000C -#define HP_REG_DMAC_ADDR 0x000D -#define HP_REG_C_ADDR 0x000e -#define HP_REG_D_ADDR 0x000f -#define HP_REG_AR2_ADDR 0x0010 -#define HP_REG_SE_ADDR 0x0014 -#define HP_REG_R25_ADDR 0x0015 -#define HP_REG_R26_ADDR 0x0016 -#define HP_REG_R27_ADDR 0x0017 -#define HP_REG_R32_ADDR 0x001a -#define HP_REG_R33_ADDR 0x001b -#define HP_REG_R34_ADDR 0x001c -#define HP_REG_R35_ADDR 0x001d -#define HP_REG_R36_ADDR 0x001e -#define HP_REG_R37_ADDR 0x001f -#define HP_REG_LAST_ADDR 0x001f -#define HP_REG_AR1_ADDR 0xfff8 - -#define HP_REG_IV_MASK 0xfff0 -#define HP_REG_PA_MASK 0x000f +enum : uint16_t { + HP_REG_A_ADDR = 0x0000, + HP_REG_B_ADDR = 0x0001, + HP_REG_P_ADDR = 0x0002, + HP_REG_R_ADDR = 0x0003, + HP_REG_R4_ADDR = 0x0004, + HP_REG_R5_ADDR = 0x0005, + HP_REG_R6_ADDR = 0x0006, + HP_REG_R7_ADDR = 0x0007, + HP_REG_IV_ADDR = 0x0008, + HP_REG_PA_ADDR = 0x0009, + HP_REG_W_ADDR = 0x000A, + HP_REG_DMAPA_ADDR = 0x000B, + HP_REG_DMAMA_ADDR = 0x000C, + HP_REG_DMAC_ADDR = 0x000D, + HP_REG_C_ADDR = 0x000e, + HP_REG_D_ADDR = 0x000f, + HP_REG_AR2_ADDR = 0x0010, + HP_REG_SE_ADDR = 0x0014, + HP_REG_R25_ADDR = 0x0015, + HP_REG_R26_ADDR = 0x0016, + HP_REG_R27_ADDR = 0x0017, + HP_REG_R32_ADDR = 0x001a, + HP_REG_R33_ADDR = 0x001b, + HP_REG_R34_ADDR = 0x001c, + HP_REG_R35_ADDR = 0x001d, + HP_REG_R36_ADDR = 0x001e, + HP_REG_R37_ADDR = 0x001f, + HP_REG_LAST_ADDR = 0x001f, + HP_REG_AR1_ADDR = 0xfff8 +}; #endif // MAME_CPU_HPHYBRID_HPHYBRID_DEFS_H diff --git a/src/devices/cpu/m37710/m37710.cpp b/src/devices/cpu/m37710/m37710.cpp index 93a14524452..86470acd453 100644 --- a/src/devices/cpu/m37710/m37710.cpp +++ b/src/devices/cpu/m37710/m37710.cpp @@ -171,7 +171,7 @@ const int m37710_cpu_device::m37710_irq_levels[M37710_LINE_MAX] = 0x77, // Timer A2 14 0x76, // Timer A1 15 0x75, // Timer A0 16 - 0x7f, // IRQ 2 13 + 0x7f, // IRQ 2 13 0x7e, // IRQ 1 18 0x7d, // IRQ 0 19 @@ -692,7 +692,7 @@ WRITE8_MEMBER(m37710_cpu_device::m37710_internal_w) } } -const m37710_cpu_device::opcode_func *m37710_cpu_device::m37710i_opcodes[4] = +const m37710_cpu_device::opcode_func *const m37710_cpu_device::m37710i_opcodes[4] = { m37710i_opcodes_M0X0, m37710i_opcodes_M0X1, @@ -700,7 +700,7 @@ const m37710_cpu_device::opcode_func *m37710_cpu_device::m37710i_opcodes[4] = m37710i_opcodes_M1X1, }; -const m37710_cpu_device::opcode_func *m37710_cpu_device::m37710i_opcodes2[4] = +const m37710_cpu_device::opcode_func *const m37710_cpu_device::m37710i_opcodes2[4] = { m37710i_opcodes42_M0X0, m37710i_opcodes42_M0X1, @@ -708,7 +708,7 @@ const m37710_cpu_device::opcode_func *m37710_cpu_device::m37710i_opcodes2[4] = m37710i_opcodes42_M1X1, }; -const m37710_cpu_device::opcode_func *m37710_cpu_device::m37710i_opcodes3[4] = +const m37710_cpu_device::opcode_func *const m37710_cpu_device::m37710i_opcodes3[4] = { m37710i_opcodes89_M0X0, m37710i_opcodes89_M0X1, diff --git a/src/devices/cpu/m37710/m37710.h b/src/devices/cpu/m37710/m37710.h index d1750b8e2f6..c96301013b6 100644 --- a/src/devices/cpu/m37710/m37710.h +++ b/src/devices/cpu/m37710/m37710.h @@ -202,9 +202,9 @@ private: static const int m37710_irq_vectors[M37710_LINE_MAX]; static const char *const m37710_rnames[128]; static const char *const m37710_tnames[8]; - static const opcode_func *m37710i_opcodes[4]; - static const opcode_func *m37710i_opcodes2[4]; - static const opcode_func *m37710i_opcodes3[4]; + static const opcode_func *const m37710i_opcodes[4]; + static const opcode_func *const m37710i_opcodes2[4]; + static const opcode_func *const m37710i_opcodes3[4]; static const get_reg_func m37710i_get_reg[4]; static const set_reg_func m37710i_set_reg[4]; static const set_line_func m37710i_set_line[4]; diff --git a/src/devices/cpu/m6502/dxavix2000.lst b/src/devices/cpu/m6502/dxavix2000.lst index cb45c31050f..4c4a923d2c0 100644 --- a/src/devices/cpu/m6502/dxavix2000.lst +++ b/src/devices/cpu/m6502/dxavix2000.lst @@ -1,20 +1,20 @@ # license:BSD-3-Clause # copyright-holders:David Haywood -# XaviX (SSD 2000) - m6502 with custom opcodes -brk_xav_imp ora_idx kil_non slo_idx nop_zpg ora_zpg asl_zpg unk07_imp php_imp ora_imm asl_acc anc_imm nop_aba ora_aba asl_aba slo_aba -bpl_rel ora_idy phx_imp slo_idy nop_zpx ora_zpx asl_zpx slo_zpx clc_imp ora_aby nop_imp unk1b_imp nop_abx ora_abx asl_abx slo_abx -jsr_adr and_idx callf_xa3 rla_idx bit_zpg and_zpg rol_zpg rla_zpg plp_imp and_imm rol_acc anc_imm bit_aba and_aba rol_aba rla_aba -bmi_rel and_idy plx_imp rla_idy nop_zpx and_zpx rol_zpx rla_zpx sec_imp and_aby nop_imp rla_aby nop_abx and_abx rol_abx rla_abx -rti_xav_imp eor_idx kil_non sre_idx nop_zpg eor_zpg lsr_zpg sre_zpg pha_imp eor_imm lsr_acc asr_imm jmp_adr eor_aba lsr_aba sre_aba -bvc_rel eor_idy phy_imp sre_idy nop_zpx eor_zpx lsr_zpx sre_zpx cli_imp eor_aby nop_imp unk5b_imp nop_abx eor_abx lsr_abx sre_abx -rts_imp adc_idx kil_non rra_idx nop_zpg adc_zpg ror_zpg rra_zpg pla_imp adc_imm ror_acc arr_imm jmp_ind adc_aba ror_aba rra_aba -bvs_rel adc_idy ply_imp unk73_imp nop_zpx adc_zpx ror_zpx rra_zpx sei_imp adc_aby nop_imp rra_aby nop_abx adc_abx ror_abx rra_abx -retf_imp sta_idx nop_imm unk83_imm sty_zpg sta_zpg stx_zpg unk87_imm dey_imp nop_imm txa_imp ane_imm sty_aba sta_aba stx_aba sax_aba -bcc_rel sta_idy kil_non sha_idy sty_zpx sta_zpx stx_zpy sax_zpy tya_imp sta_aby txs_imp unk9b_imp shy_abx sta_abx shx_aby sha_aby -ldy_imm lda_idx ldx_imm unka3_imp ldy_zpg lda_zpg ldx_zpg unka7_imp tay_imp lda_imm tax_imp lxa_imm ldy_aba lda_aba ldx_aba lax_aba -bcs_rel lda_idy unkb2_imp lax_idy ldy_zpx lda_zpx ldx_zpy lax_zpy clv_imp lda_aby tsx_imp las_aby ldy_abx lda_abx ldx_aby lax_aby -cpy_imm cmp_idx nop_imm dcp_idx cpy_zpg cmp_zpg dec_zpg dcp_zpg iny_imp cmp_imm dex_imp sbx_imm cpy_aba cmp_aba dec_aba dcp_aba -bne_rel cmp_idy kil_non dcp_idy nop_zpx cmp_zpx dec_zpx dcp_zpx cld_imp cmp_aby nop_imp dcp_aby nop_abx cmp_abx dec_abx dcp_abx -cpx_imm sbc_idx nop_imm isb_idx cpx_zpg sbc_zpg inc_zpg isb_zpg inx_imp sbc_imm nop_imp sbc_imm cpx_aba sbc_aba inc_aba isb_aba -beq_rel sbc_idy kil_non isb_idy nop_zpx sbc_zpx inc_zpx isb_zpx sed_imp sbc_aby nop_imp isb_aby nop_abx sbc_abx inc_abx isb_abx +# Super XaviX (SSD 2000) - m6502 with custom opcodes +brk_xav_imp ora_idx cmc_imp oral0_acc asr_zpg ora_zpg asl_zpg oral1_acc php_imp ora_imm asl_acc oral2_acc asr_aba ora_aba asl_aba oral3_acc +bpl_rel ora_idy phx_imp orapa_imp asr_zpx ora_zpx asl_zpx orapb_imp clc_imp ora_aby asr_acc spa0_acc asr_abx ora_abx asl_abx spb0_acc +jsr_adr and_idx callf_xa3 andl0_acc bit_zpg and_zpg rol_zpg andl1_acc plp_imp and_imm rol_acc andl2_acc bit_aba and_aba rol_aba andl3_acc +bmi_rel and_idy plx_imp andpa_imp bit_zpx and_zpx rol_zpx andpb_imp sec_imp and_aby bit_imm lpa0_acc bit_abx and_abx rol_abx lpb0_acc +rti_xav_imp eor_idx nop_imp eorl0_acc nop_imp eor_zpg lsr_zpg eorl1_acc pha_imp eor_imm lsr_acc eorl2_acc jmp_adr eor_aba lsr_aba eorl3_acc +bvc_rel eor_idy phy_imp eorpa_imp nop_imp eor_zpx lsr_zpx eorpb_imp cli_imp eor_aby nop_imp spa1_acc callf_aba eor_abx lsr_abx spb1_acc +rts_imp adc_idx nop_imp adcl0_acc nop_imp adc_zpg ror_zpg adcl1_acc pla_imp adc_imm ror_acc adcl2_acc jmp_ind adc_aba ror_aba adcl3_acc +bvs_rel adc_idy ply_imp adcpa_imp nop_imp adc_zpx ror_zpx adcpb_imp sei_imp adc_aby nop_imp lpa1_acc jmpf_ind adc_abx ror_abx lpb1_acc +retf_imp sta_idx stz_zpg stal0_acc sty_zpg sta_zpg stx_zpg stal1_acc dey_imp sev_imp txa_imp stal2_acc sty_aba sta_aba stx_aba stal3_acc +bcc_rel sta_idy stz_aba stapa_imp sty_zpx sta_zpx stx_zpy stapb_imp tya_imp sta_aby txs_imp spa2_acc sty_abx sta_abx stx_aby spb2_acc +ldy_imm lda_idx ldx_imm ldal0_acc ldy_zpg lda_zpg ldx_zpg ldal1_acc tay_imp lda_imm tax_imp ldal2_acc ldy_aba lda_aba ldx_aba ldal3_acc +bcs_rel lda_idy clr_acc ldapa_imp ldy_zpx lda_zpx ldx_zpy ldapb_imp clv_imp lda_aby tsx_imp lpa2_acc ldy_abx lda_abx ldx_aby lpb2_acc +cpy_imm cmp_idx dec_acc cmpl0_acc cpy_zpg cmp_zpg dec_zpg cmpl1_acc iny_imp cmp_imm dex_imp cmpl2_acc cpy_aba cmp_aba dec_aba cmpl3_acc +bne_rel cmp_idy not_acc cmppa_imp nop_imp cmp_zpx dec_zpx cmppb_imp cld_imp cmp_aby nop_imp decpa_imp nop_imp cmp_abx dec_abx decpb_imp +cpx_imm sbc_idx inc_acc sbcl0_acc cpx_zpg sbc_zpg inc_zpg sbcl1_acc inx_imp sbc_imm nop_imp sbcl2_acc cpx_aba sbc_aba inc_aba sbcl3_acc +beq_rel sbc_idy neg_acc sbcpa_imp nop_imp sbc_zpx inc_zpx sbcpb_imp sed_imp sbc_aby nop_imp incpa_imp nop_imp sbc_abx inc_abx incpb_imp reset diff --git a/src/devices/cpu/m6502/m6502make.py b/src/devices/cpu/m6502/m6502make.py index b874b7c5ba9..ea51fe43350 100755 --- a/src/devices/cpu/m6502/m6502make.py +++ b/src/devices/cpu/m6502/m6502make.py @@ -227,9 +227,9 @@ def save_dasm(f, device, states): opc = tokens[0] mode = tokens[-1] extra = "0" - if opc in ["jsr", "bsr"]: - extra = "STEP_OVER" - elif opc in ["rts", "rti", "rtn"]: + if opc in ["jsr", "bsr", "callf"]: + extra = "STEP_OVER" + elif opc in ["rts", "rti", "rtn", "retf"]: extra = "STEP_OUT" emit(f, '\t{ "%s", DASM_%s, %s },' % (opc, mode, extra)) emit(f, DISASM_EPILOG % d) diff --git a/src/devices/cpu/m6502/oxavix.lst b/src/devices/cpu/m6502/oxavix.lst index 8ea1c7f0acc..d73a4bae4d3 100644 --- a/src/devices/cpu/m6502/oxavix.lst +++ b/src/devices/cpu/m6502/oxavix.lst @@ -4,11 +4,8 @@ callf_xa3 read(SP); - if (PC & 0x8000) // if top bit of PC isn't set we're in the non-banked RAM area, don't store codebank? - { - write(SP, get_codebank()); - dec_SP(); - } + write(SP, get_codebank()); + dec_SP(); TMP2 = read_pc(); TMP = read_pc(); //read(SP); @@ -28,12 +25,9 @@ retf_imp PC = read(SP); inc_SP(); PC = set_h(PC, read(SP)); - if (PC & 0x8000) // if top bit of PC is set then we're jumping back to a banked ROM area, so get codebank? (see 0fdae in rad_ping) - { - inc_SP(); - TMP2 = read(SP); - set_codebank(TMP2); - } + inc_SP(); + TMP2 = read(SP); + set_codebank(TMP2); read_pc(); prefetch(); @@ -45,7 +39,8 @@ brk_xav_imp } else { read_pc(); } - write(SP, get_codebank()); // maybe + write(SP, get_codebank()); + set_codebank(0x00); // epo_efdx, rad_ping and rad_mtrk strongly suggest that interrupts must force bank 0 as code jumps to a ROM pointer stored earlier / a fixed pointer to a rom address in bank 0 dec_SP(); write(SP, PC >> 8); dec_SP(); @@ -61,8 +56,16 @@ brk_xav_imp } else { - PC = m_vector_callback(0,1); - PC = set_h(PC, m_vector_callback(0,0)); + if (m_vector_callback(0,1) != -1) + { + PC = m_vector_callback(0,1); + PC = set_h(PC, m_vector_callback(0,0)); + } + else + { + PC = read_arg(0xfffa); + PC = set_h(PC, read_arg(0xfffb)); + } } nmi_state = false; @@ -75,8 +78,16 @@ brk_xav_imp } else { - PC = m_vector_callback(1,1); - PC = set_h(PC, m_vector_callback(1,0)); + if (m_vector_callback(1,1) != -1) + { + PC = m_vector_callback(1,1); + PC = set_h(PC, m_vector_callback(1,0)); + } + else + { + PC = read_arg(0xfffe); + PC = set_h(PC, read_arg(0xffff)); + } } if(irq_taken) diff --git a/src/devices/cpu/m6502/oxavix2000.lst b/src/devices/cpu/m6502/oxavix2000.lst index 3409ae414f7..441721ab642 100644 --- a/src/devices/cpu/m6502/oxavix2000.lst +++ b/src/devices/cpu/m6502/oxavix2000.lst @@ -1,59 +1,476 @@ # license:BSD-3-Clause # copyright-holders:David Haywood -# xavix2000 opcodes +# xavix2000 opcodes (Super XaviX) -plx_imp +phy_imp read_pc_noinc(); + write(SP, Y); + dec_SP(); prefetch(); phx_imp read_pc_noinc(); + write(SP, X); + dec_SP(); + prefetch(); + +plx_imp + read_pc_noinc(); + read(SP); + inc_SP(); + X = read(SP); + set_nz(X); prefetch(); ply_imp read_pc_noinc(); + read(SP); + inc_SP(); + Y = read(SP); + set_nz(Y); prefetch(); -phy_imp +clr_acc + read_pc_noinc(); + A = 0; + set_nz(A); + prefetch(); + +dec_acc + read_pc_noinc(); + A--; + set_nz(A); + prefetch(); + +not_acc + read_pc_noinc(); + A = A ^ 0xff; + set_nz(A); + prefetch(); + +inc_acc + read_pc_noinc(); + A++; + set_nz(A); + prefetch(); + +neg_acc + read_pc_noinc(); + A = (0x00 - A) & 0xff; + set_nz(A); + prefetch(); + +oral0_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +oral1_acc + A |= (m_l & 0x0000ff00) >> 8; + set_nz(A); + prefetch(); + +oral2_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +oral3_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +andl0_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +andl1_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +andl2_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +andl3_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +eorl0_acc + A ^= (m_l & 0x000000ff) >> 0; + set_nz(A); + prefetch(); + +eorl1_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +eorl2_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +eorl3_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +adcl0_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +adcl1_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +adcl2_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +adcl3_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +stal0_acc + read_pc_noinc(); + m_l = (m_l & 0xffffff00) | (A & 0xff); // TODO: flags + prefetch(); + +stal1_acc + read_pc_noinc(); + m_l = (m_l & 0xffff00ff) | ((A & 0xff) << 8); // TODO: flags + prefetch(); + +stal2_acc + read_pc_noinc(); + m_l = (m_l & 0xff00ffff) | ((A & 0xff) << 16); // TODO: flags + prefetch(); + +stal3_acc read_pc_noinc(); + m_l = (m_l & 0x00ffffff) | ((A & 0xff) << 24); // TODO: flags prefetch(); -unk1b_imp +ldal0_acc read_pc_noinc(); + A = (m_l & 0x000000ff) >> 0; // TODO: flags prefetch(); -unk5b_imp +ldal1_acc read_pc_noinc(); + A = (m_l & 0x0000ff00) >> 8; // TODO: flags prefetch(); -unk9b_imp +ldal2_acc read_pc_noinc(); + A = (m_l & 0x00ff0000) >> 16; // TODO: flags prefetch(); -unka3_imp +ldal3_acc read_pc_noinc(); + A = (m_l & 0xff000000) >> 24; // TODO: flags prefetch(); -unka7_imp +cmpl0_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); read_pc_noinc(); prefetch(); -unk07_imp +cmpl1_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); read_pc_noinc(); prefetch(); -unkb2_imp +cmpl2_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); read_pc_noinc(); prefetch(); -unk73_imp +cmpl3_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); read_pc_noinc(); prefetch(); -unk87_imm - read_pc(); +sbcl0_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +sbcl1_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +sbcl2_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +sbcl3_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +spa0_acc + read_pc_noinc(); + m_pa = (m_pa & 0xffff00) | A; // TODO: Flags? + prefetch(); + +lpa0_acc + read_pc_noinc(); + A = (m_pa & 0x0000ff) >> 0; // TODO: Flags? + prefetch(); + +spa1_acc + read_pc_noinc(); + m_pa = (m_pa & 0xff00ff) | (A << 8); // TODO: Flags? + prefetch(); + +lpa1_acc + read_pc_noinc(); + A = (m_pa & 0x00ff00) >> 8; // TODO: Flags? + prefetch(); + +spa2_acc + read_pc_noinc(); + m_pa = (m_pa & 0x00ffff) | (A << 16); // TODO: Flags? + prefetch(); + +lpa2_acc + read_pc_noinc(); + A = (m_pa & 0xff0000) >> 16; // TODO: Flags? + prefetch(); + +spb0_acc + read_pc_noinc(); + m_pb = (m_pb & 0xffff00) | A; // TODO: Flags? + prefetch(); + +lpb0_acc + read_pc_noinc(); + A = (m_pb & 0x0000ff) >> 0; // TODO: Flags? + prefetch(); + +spb1_acc + read_pc_noinc(); + m_pb = (m_pb & 0xff00ff) | (A << 8); // TODO: Flags? + prefetch(); + +lpb1_acc + read_pc_noinc(); + A = (m_pb & 0x00ff00) >> 8; // TODO: Flags? + prefetch(); + +spb2_acc + read_pc_noinc(); + m_pb = (m_pb & 0x00ffff) | (A << 16); // TODO: Flags? + prefetch(); + +lpb2_acc + read_pc_noinc(); + A = (m_pb & 0xff0000) >> 16; // TODO: Flags? + prefetch(); + +incpa_imp + read_pc_noinc(); + m_pa++; + set_nz(m_pa&0xff); // startup code seems to require flag to set if low byte is 0x00? + prefetch(); + +incpb_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +decpa_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +decpb_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +orapa_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +andpa_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +eorpa_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +adcpa_imp + TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled? + m_databank = (m_pa & 0xff0000)>>16; + do_adc(read((m_pa&0xffff)+Y)); + m_databank = TMP; + prefetch(); + +stapa_imp + TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled? + m_databank = (m_pa & 0xff0000)>>16; + write((m_pa&0xffff)+Y, A); + m_databank = TMP; + prefetch(); + +ldapa_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +cmppa_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +sbcpa_imp + TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled? + m_databank = (m_pa & 0xff0000)>>16; + do_sbc(read((m_pa&0xffff)+Y)); + m_databank = TMP; + prefetch(); + +orapb_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +andpb_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +eorpb_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +adcpb_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +stapb_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +ldapb_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +cmppb_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +sbcpb_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +stx_aby + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +sty_abx + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +stz_zpg + TMP = read_pc(); + write(TMP, 0x00); + prefetch(); + +stz_aba + TMP = read_pc(); + TMP = set_h(TMP, read_pc()); + write(TMP, 0x00); + prefetch(); + +bit_zpx + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +bit_abx + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +bit_imm + TMP = read_pc(); + if(A & TMP) + P &= ~F_Z; + else + P |= F_Z; + prefetch(); + +asr_zpg + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +asr_aba + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +asr_zpx + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +asr_acc + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +asr_abx + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +cmc_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +sev_imp + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); + prefetch(); + +callf_aba + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + read_pc_noinc(); prefetch(); -unk83_imm - read_pc(); +jmpf_ind + TMP = read_pc(); + TMP = set_h(TMP, read_pc()); + PC = read(TMP); + PC = set_h(PC, read(set_l(TMP, TMP+1))); + TMP2 = read(TMP+2); + set_codebank(TMP2); prefetch(); diff --git a/src/devices/cpu/m6502/xavix.cpp b/src/devices/cpu/m6502/xavix.cpp index bc805165390..266976e4d40 100644 --- a/src/devices/cpu/m6502/xavix.cpp +++ b/src/devices/cpu/m6502/xavix.cpp @@ -159,7 +159,7 @@ uint8_t xavix_device::mi_xavix_nd::read_arg(uint16_t adr) return program->read_byte(base->adr_with_codebank(adr)); } -inline void xavix_device::set_codebank(uint8_t bank) +void xavix_device::set_codebank(uint8_t bank) { // space().write_byte(0xfe, bank); m_codebank = bank; diff --git a/src/devices/cpu/m6502/xavix.h b/src/devices/cpu/m6502/xavix.h index 107ede4b9a2..ca61901b5a6 100644 --- a/src/devices/cpu/m6502/xavix.h +++ b/src/devices/cpu/m6502/xavix.h @@ -32,7 +32,7 @@ public: O(brk_xav_imp); O(rti_xav_imp); - typedef device_delegate<uint8_t (int which, int half)> xavix_interrupt_vector_delegate; + typedef device_delegate<int16_t (int which, int half)> xavix_interrupt_vector_delegate; template <typename Object> void set_vector_callback(Object &&cb) { m_vector_callback = std::forward<Object>(cb); } diff --git a/src/devices/cpu/m6502/xavix2000.cpp b/src/devices/cpu/m6502/xavix2000.cpp index afbf87fd8c6..8580867d3ed 100644 --- a/src/devices/cpu/m6502/xavix2000.cpp +++ b/src/devices/cpu/m6502/xavix2000.cpp @@ -2,7 +2,7 @@ // copyright-holders:David Haywood /*************************************************************************** - xavix2000.cpp + xavix2000.cpp (Super XaviX) The dies for these are marked @@ -25,50 +25,65 @@ some of the documented but 'undocumented' opcodes on the 6502 to have additonal meaning for one specific function on startup - 01BC37: A0 3F ldy #$3f - 01BC39: B2 ?? - 01BC3A: 1B ?? - 9B ?? - -- outer loop - 01BC3C: 98 tya - 01BC3D: 5B (has to be 1 byte?) - -- inner loop - 01BC3E: A3 (has to be 1 byte) - 73 (could be 3 byte?) - 01BC40: 83 FB presumably fb is the address - 01BC42: A7 (presumably 1 byte) - 73 (could be 3 byte?) - 01BC44: 87 FB presumably fb is the address - 01BC46: D0 F6 bne $1bc3e - 01BC48: 88 dey - 01BC49: 10 F1 bpl $1bc3c - 01BC4B: 8D FB 00 sta $00fb - 01BC4E: A3 ?? - 01BC4F: 8D FA 00 sta $00fa - 01BC52: 07 ?? - -- - 01BC53: D0 03 bne $1bc58 - 01BC55: CE fa 00 dec $00fa - 01BC58: 80 retf + this just seems to be some very buggy checksum code where the games don't even care about the result... + (actually it looks like some games might be using it as a PRNG seed?) + + a is 80 when entering here? + + 01BC37: A0 3F ldy #$3f + 01BC39: B2 clr a // clear acculuator + 01BC3A: 1B spa0 a // store 'accumulator' into byte 0 of PA 'address' register + 01BC3B: 9B spa2 a // store 'accumulator' into byte 2 of PA 'address' register + + -- loop point 2 + 01BC3C: 98 tya // y -> a (3f on first run of loop) + 01BC3D: 5B spa1 a // store 'accumulator' into byte 1 of PA 'address' register (003f00 on first loop?) + + -- loop point 1 + 01BC3E: A3 ldal0 a // read byte 0 of 32-bit 'long' register into accumulator + 01BC3F: 73 adcpa // adc ($Address PA), y + 01BC40: 83 stal0 a // store accumulator back in byte 0 of 32-bit 'long' register (even byte checksum?) + 01BC41: FB incpa // increase 'address' register PA + 01BC42: A7 ldal1 a // read byte 1 of 32-bit 'long' register into accumulator + 01BC43: 73 adcpa // adc ($Address PA), y + 01BC44: 87 stal1 a // store accumulator back in byte 0 of 32-bit 'long' register (odd byte checksum?) + 01BC45: FB incpa // increase 'address' register PA + 01BC46: D0 F6 bne $1bc3e // (branch based on PA increase, so PA must set flags?, probably overflows after 0xffff if upper byte is 'bank'? or at 0xff if this really is a mirror of the function below + + 01BC48: 88 dey // decrease y, which contained 3f at the start + 01BC49: 10 F1 bpl $1bc3c // branch back to loop point 2 to reload counter + + // contains the odd byte checksum once we drop out the loop + 01BC4B: 8D FB 00 sta $00fb // store it in zero page memory + 01BC4E: A3 ldal0 a // get the even byte checksum from byte 0 of 32-bit 'long' register + 01BC4F: 8D FA 00 sta $00fa // store it in zero page memory + 01BC52: 07 oral1 a // why do we want to do this? (routine below does it too) + 01BC53: D0 03 bne $1bc58 + 01BC55: CE FA 00 dec $00fa + 01BC58: 80 retf this is presumably meant to be similar to the function found in Namco Nostalgia 2 + // A is 80 on entry 09FFD8: A9 3F lda #$3f - 09FFDA: 85 01 sta $01 - 09FFDC: A0 00 ldy #$00 - 09FFDE: AD FA 00 lda $00fa - 09FFE1: 71 00 adc ($00), y - 09FFE3: 8D FA 00 sta $00fa - 09FFE6: C8 iny - 09FFE7: AD FB 00 lda $00fb - 09FFEA: 71 00 adc ($00), y - 09FFEC: 8D FB 00 sta $00fb - 09FFEF: C8 iny - 09FFF0: D0 EC bne $c - 09FFF2: C6 01 dec $01 - 09FFF4: 10 E8 bpl $9ffde - 09FFF6: 0D FA 00 ora $00fa + 09FFDA: 85 01 sta $01 // set upper bit of pointer at 0x0000 to 3f (it completely fails to initialize the ram at 00, we currently init it to ff, but should probably be 0?) + 09FFDC: A0 00 ldy #$00 // clear inner loop counter + -- loop point 1 and 2 + 09FFDE: AD FA 00 lda $00fa // read current even byte checksum value from zero page ram fa (game also completely fails to initialize this) + 09FFE1: 71 00 adc ($00), y // so 3f00 + y first outer loop, 3e00 + y second outer loop with y increasing in inner loop (add byte read to even checksum byte?) + 09FFE3: 8D FA 00 sta $00fa // store even checksum at 0xfa in zero page ram + 09FFE6: C8 iny // increase counter y + 09FFE7: AD FB 00 lda $00fb // read current odd byte checksum value from zero page ram fb (likewise never initialized!) + 09FFEA: 71 00 adc ($00), y // 3f00 + y (add byte read to odd checksum byte) + 09FFEC: 8D FB 00 sta $00fb // store odd checksum byte at 0xfb in zero page ram + 09FFEF: C8 iny // increase y + 09FFF0: D0 EC bne $9ffde // branch back if y hasn't overflowed (so work on 0x100 bytes, looping back 0x7f times) + 09FFF2: C6 01 dec $01 // decrease accumulator (started at 3f) (inner loop counter already 0 because it overflowed) + 09FFF4: 10 E8 bpl $9ffde // branch back + + // checksums are already in place after loop so no need to copy them like in above + 09FFF6: 0D FA 00 ora $00fa // same weird 'or' call -- 09FFF9: D0 03 bne $9fffe 09FFFB: CE FA 00 dec $00fa @@ -92,6 +107,14 @@ xavix2000_device::xavix2000_device(const machine_config &mconfig, const char *ta sprogram_config.m_logaddr_width = 24; } +void xavix2000_device::device_start() +{ + xavix_device::device_start(); + + state_add(SXAVIX_L, "L", m_l).callimport().formatstr("%8s");; + state_add(SXAVIX_PA, "PA", m_pa).callimport().formatstr("%8s"); + state_add(SXAVIX_PB, "PB", m_pb).callimport().formatstr("%8s"); +} std::unique_ptr<util::disasm_interface> xavix2000_device::create_disassembler() { @@ -99,4 +122,38 @@ std::unique_ptr<util::disasm_interface> xavix2000_device::create_disassembler() } +void xavix2000_device::state_import(const device_state_entry &entry) +{ + xavix_device::state_import(entry); + + switch(entry.index()) + { + case SXAVIX_L: + break; + case SXAVIX_PA: + break; + case SXAVIX_PB: + break; + } +} + +void xavix2000_device::state_string_export(const device_state_entry &entry, std::string &str) const +{ + xavix_device::state_string_export(entry, str); + + switch(entry.index()) + { + case SXAVIX_L: + str = string_format("%08x", m_l); + break; + case SXAVIX_PA: + str = string_format("%08x", m_pa); + break; + case SXAVIX_PB: + str = string_format("%08x", m_pb); + break; + } +} + + #include "cpu/m6502/xavix2000.hxx" diff --git a/src/devices/cpu/m6502/xavix2000.h b/src/devices/cpu/m6502/xavix2000.h index 60e341e1230..de8c603f2fb 100644 --- a/src/devices/cpu/m6502/xavix2000.h +++ b/src/devices/cpu/m6502/xavix2000.h @@ -2,7 +2,7 @@ // copyright-holders:David Haywood /*************************************************************************** - xavix2000.h + xavix2000.h (Super XaviX) ***************************************************************************/ #ifndef MAME_CPU_M6502_XAVIX2000_H @@ -23,28 +23,137 @@ public: virtual void do_exec_full() override; virtual void do_exec_partial() override; + virtual void device_start() override; + virtual void state_import(const device_state_entry &entry) override; + virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; + #define O(o) void o ## _full(); void o ## _partial() - // xaviv opcodes - O(phx_imp); - O(phy_imp); - O(plx_imp); - O(ply_imp); - O(unk1b_imp); - O(unk5b_imp); - O(unk9b_imp); - O(unka3_imp); - O(unka7_imp); - O(unkb2_imp); - O(unk07_imp); - O(unk73_imp); + // Super XaviX opcodes + + O(phx_imp); // 12 + O(phy_imp); // 52 + O(plx_imp); // 32 + O(ply_imp); // 72 + + O(clr_acc); // b2 + O(dec_acc); // c2 + O(not_acc); // d2 + O(inc_acc); // e2 + O(neg_acc); // f2 + + O(oral0_acc); + O(oral1_acc); + O(oral2_acc); + O(oral3_acc); + + O(andl0_acc); + O(andl1_acc); + O(andl2_acc); + O(andl3_acc); + + O(eorl0_acc); + O(eorl1_acc); + O(eorl2_acc); + O(eorl3_acc); + + O(adcl0_acc); + O(adcl1_acc); + O(adcl2_acc); + O(adcl3_acc); + + O(stal0_acc); + O(stal1_acc); + O(stal2_acc); + O(stal3_acc); + + O(ldal0_acc); + O(ldal1_acc); + O(ldal2_acc); + O(ldal3_acc); + + O(cmpl0_acc); + O(cmpl1_acc); + O(cmpl2_acc); + O(cmpl3_acc); + + O(sbcl0_acc); + O(sbcl1_acc); + O(sbcl2_acc); + O(sbcl3_acc); + + O(spa2_acc); // Store accumulator in 24-bit address register PA MSB (Bank bit) + O(lpa2_acc); // Load accumulator from 24-bit address register PA MSB (Bank bit) + O(spa0_acc); // Store accumulator in 24-bit address register PA LSB (Low 8 bits of address) + O(lpa0_acc); // Load accumulator from 24-bit address register PA LSB (Low 8 bits of address) + O(spa1_acc); // Store accumulator in 24-bit address register PA MID (High 8 bits of address) + O(lpa1_acc); // Load accumulator from 24-bit address register PA MID (High 8 bits of address) + + O(spb2_acc); // Store accumulator in 24-bit address register PB MSB (Bank bit) + O(lpb2_acc); // Load accumulator from 24-bit address register PB MSB (Bank bit) + O(spb0_acc); // Store accumulator in 24-bit address register PB LSB (Low 8 bits of address) + O(lpb0_acc); // Load accumulator from 24-bit address register PB LSB (Low 8 bits of address) + O(spb1_acc); // Store accumulator in 24-bit address register PB MID (High 8 bits of address) + O(lpb1_acc); // Load accumulator from 24-bit address register PB MID (High 8 bits of address) - O(unk83_imm); - O(unk87_imm); + O(incpa_imp); + O(decpa_imp); + O(incpb_imp); + O(decpb_imp); + + O(orapa_imp); // (ora ($PA), y) ? + O(andpa_imp); // (and ($PA), y) ? + O(eorpa_imp); // (eor ($PA), y) ? + O(adcpa_imp); // (adc ($PA), y) ? + O(stapa_imp); // (sta ($PA), y) ? + O(ldapa_imp); // (lda ($PA), y) ? + O(cmppa_imp); // (cmp ($PA), y) ? + O(sbcpa_imp); // (sbc ($PA), y) ? + + O(orapb_imp); // (ora ($PB), y) ? + O(andpb_imp); // (and ($PB), y) ? + O(eorpb_imp); // (eor ($PB), y) ? + O(adcpb_imp); // (adc ($PB), y) ? + O(stapb_imp); // (sta ($PB), y) ? + O(ldapb_imp); // (lda ($PB), y) ? + O(cmppb_imp); // (cmp ($PB), y) ? + O(sbcpb_imp); // (sbc ($PB), y) ? + + O(stx_aby); + O(sty_abx); + + O(stz_aba); + O(stz_zpg); + + O(bit_zpx); + O(bit_abx); + O(bit_imm); + + O(asr_zpg); + O(asr_aba); + O(asr_zpx); + O(asr_acc); + O(asr_abx); + + O(cmc_imp); + O(sev_imp); + + O(callf_aba); + O(jmpf_ind); #undef O + uint32_t m_l; // 32-bit register? + uint32_t m_pa; // 24-bit address register? + uint32_t m_pb; // ^ + +}; + +enum { + SXAVIX_L = M6502_IR+1, + SXAVIX_PA, + SXAVIX_PB }; DECLARE_DEVICE_TYPE(XAVIX2000, xavix2000_device) diff --git a/src/devices/cpu/m6502/xavix2000d.cpp b/src/devices/cpu/m6502/xavix2000d.cpp index 9daea8a96c4..883410a05d8 100644 --- a/src/devices/cpu/m6502/xavix2000d.cpp +++ b/src/devices/cpu/m6502/xavix2000d.cpp @@ -2,7 +2,7 @@ // copyright-holders:David Haywood /*************************************************************************** - xavix2000d.cpp + xavix2000d.cpp (Super XaviX) ***************************************************************************/ diff --git a/src/devices/cpu/m68000/m68000.h b/src/devices/cpu/m68000/m68000.h index a147a78bf64..5d67e2a713f 100644 --- a/src/devices/cpu/m68000/m68000.h +++ b/src/devices/cpu/m68000/m68000.h @@ -32,6 +32,10 @@ constexpr int M68K_IRQ_5 = 5; constexpr int M68K_IRQ_6 = 6; constexpr int M68K_IRQ_7 = 7; +constexpr int M68K_SZ_LONG = 0; +constexpr int M68K_SZ_BYTE = 1; +constexpr int M68K_SZ_WORD = 2; + // special input lines constexpr int M68K_LINE_BUSERROR = 16; @@ -278,10 +282,13 @@ protected: uint16_t m_mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */ uint16_t m_mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */ uint16_t m_mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */ + uint8_t m_mmu_tmp_sz; /* temporary hack: size for mmu */ + uint32_t m_mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */ uint16_t m_mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */ uint16_t m_mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */ uint16_t m_mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */ + uint16_t m_mmu_tmp_buserror_sz; /* temporary hack: (first) bus error size` */ uint32_t m_ic_address[M68K_IC_SIZE]; /* instruction cache address data */ uint32_t m_ic_data[M68K_IC_SIZE]; /* instruction cache content data */ diff --git a/src/devices/cpu/m68000/m68k_in.cpp b/src/devices/cpu/m68000/m68k_in.cpp index 27b3fcd0b0e..ccfbfa01a5e 100644 --- a/src/devices/cpu/m68000/m68k_in.cpp +++ b/src/devices/cpu/m68000/m68k_in.cpp @@ -412,7 +412,7 @@ and 32 er . 1100...010...... A+-DXWLdxI U U U U U U U 6 6 and 8 re . 1100...100...... A+-DXWL... U U U U U U U 8 8 4 4 4 4 4 and 16 re . 1100...101...... A+-DXWL... U U U U U U U 8 8 4 4 4 4 4 and 32 re . 1100...110...... A+-DXWL... U U U U U U U 12 12 4 4 4 4 4 -andi 16 toc . 0000001000111100 .......... U U U U U U U 20 16 12 12 12 12 12 +andi 8 toc . 0000001000111100 .......... U U U U U U U 20 16 12 12 12 12 12 andi 16 tos . 0000001001111100 .......... S S S S S S S 20 16 12 12 12 12 12 andi 8 . d 0000001000000... .......... U U U U U U U 8 8 2 2 2 2 2 andi 8 . . 0000001000...... A+-DXWL... U U U U U U U 12 12 4 4 4 4 4 @@ -556,7 +556,7 @@ eor 16 . d 1011...101000... .......... U U U U U U U 4 4 eor 16 . . 1011...101...... A+-DXWL... U U U U U U U 8 8 4 4 4 4 4 eor 32 . d 1011...110000... .......... U U U U U U U 8 6 2 2 2 2 2 eor 32 . . 1011...110...... A+-DXWL... U U U U U U U 12 12 4 4 4 4 4 -eori 16 toc . 0000101000111100 .......... U U U U U U U 20 16 12 12 12 12 12 +eori 8 toc . 0000101000111100 .......... U U U U U U U 20 16 12 12 12 12 12 eori 16 tos . 0000101001111100 .......... S S S S S S S 20 16 12 12 12 12 12 eori 8 . d 0000101000000... .......... U U U U U U U 8 8 2 2 2 2 2 eori 8 . . 0000101000...... A+-DXWL... U U U U U U U 12 12 4 4 4 4 4 @@ -735,7 +735,7 @@ or 32 er . 1000...010...... A+-DXWLdxI U U U U U U U 6 6 or 8 re . 1000...100...... A+-DXWL... U U U U U U U 8 8 4 4 4 4 4 or 16 re . 1000...101...... A+-DXWL... U U U U U U U 8 8 4 4 4 4 4 or 32 re . 1000...110...... A+-DXWL... U U U U U U U 12 12 4 4 4 4 4 -ori 16 toc . 0000000000111100 .......... U U U U U U U 20 16 12 12 12 12 12 +ori 8 toc . 0000000000111100 .......... U U U U U U U 20 16 12 12 12 12 12 ori 16 tos . 0000000001111100 .......... S S S S S S S 20 16 12 12 12 12 12 ori 8 . d 0000000000000... .......... U U U U U U U 8 8 2 2 2 2 2 ori 8 . . 0000000000...... A+-DXWL... U U U U U U U 12 12 4 4 4 4 4 @@ -1827,9 +1827,9 @@ M68KMAKE_OP(andi, 32, ., .) } -M68KMAKE_OP(andi, 16, toc, .) +M68KMAKE_OP(andi, 8, toc, .) { - m68ki_set_ccr(m68ki_get_ccr() & OPER_I_16()); + m68ki_set_ccr(m68ki_get_ccr() & OPER_I_8()); } @@ -4950,9 +4950,9 @@ M68KMAKE_OP(eori, 32, ., .) } -M68KMAKE_OP(eori, 16, toc, .) +M68KMAKE_OP(eori, 8, toc, .) { - m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16()); + m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_8()); } @@ -8126,9 +8126,9 @@ M68KMAKE_OP(ori, 32, ., .) } -M68KMAKE_OP(ori, 16, toc, .) +M68KMAKE_OP(ori, 8, toc, .) { - m68ki_set_ccr(m68ki_get_ccr() | OPER_I_16()); + m68ki_set_ccr(m68ki_get_ccr() | OPER_I_8()); } diff --git a/src/devices/cpu/m68000/m68kcpu.cpp b/src/devices/cpu/m68000/m68kcpu.cpp index f7a162ccde0..b0c26d00181 100644 --- a/src/devices/cpu/m68000/m68kcpu.cpp +++ b/src/devices/cpu/m68000/m68kcpu.cpp @@ -669,6 +669,10 @@ void m68000_base_device::postload() void m68000_base_device::m68k_cause_bus_error() { + m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; + // Halt the cpu on berr when writing the stack frame. if (m_run_mode == RUN_MODE_BERR_AERR_RESET_WSF) { diff --git a/src/devices/cpu/m68000/m68kcpu.h b/src/devices/cpu/m68000/m68kcpu.h index adb45a04c78..28b56600a56 100644 --- a/src/devices/cpu/m68000/m68kcpu.h +++ b/src/devices/cpu/m68000/m68kcpu.h @@ -55,6 +55,7 @@ static constexpr int EXCEPTION_UNINITIALIZED_INTERRUPT = 15; static constexpr int EXCEPTION_SPURIOUS_INTERRUPT = 24; static constexpr int EXCEPTION_INTERRUPT_AUTOVECTOR = 24; static constexpr int EXCEPTION_TRAP_BASE = 32; +static constexpr int EXCEPTION_MMU_CONFIGURATION = 56; // only on 020/030 /* Function codes set by CPU during data/address bus activity */ static constexpr int FUNCTION_CODE_USER_DATA = 1; @@ -590,7 +591,7 @@ inline uint32_t m68ki_read_imm_16() m_mmu_tmp_fc = m_s_flag | FUNCTION_CODE_USER_PROGRAM; m_mmu_tmp_rw = 1; - + m_mmu_tmp_sz = M68K_SZ_WORD; m68ki_check_address_error(m_pc, MODE_READ, m_s_flag | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ if (m_pc != m_pref_addr) @@ -617,7 +618,7 @@ inline uint32_t m68ki_read_imm_32() m_mmu_tmp_fc = m_s_flag | FUNCTION_CODE_USER_PROGRAM; m_mmu_tmp_rw = 1; - + m_mmu_tmp_sz = M68K_SZ_LONG; m68ki_check_address_error(m_pc, MODE_READ, m_s_flag | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */ if(m_pc != m_pref_addr) @@ -652,6 +653,7 @@ inline uint32_t m68ki_read_8_fc(uint32_t address, uint32_t fc) { m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 1; + m_mmu_tmp_sz = M68K_SZ_BYTE; return m_read8(address); } inline uint32_t m68ki_read_16_fc(uint32_t address, uint32_t fc) @@ -662,6 +664,7 @@ inline uint32_t m68ki_read_16_fc(uint32_t address, uint32_t fc) } m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 1; + m_mmu_tmp_sz = M68K_SZ_WORD; return m_read16(address); } inline uint32_t m68ki_read_32_fc(uint32_t address, uint32_t fc) @@ -672,6 +675,7 @@ inline uint32_t m68ki_read_32_fc(uint32_t address, uint32_t fc) } m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 1; + m_mmu_tmp_sz = M68K_SZ_LONG; return m_read32(address); } @@ -679,6 +683,7 @@ inline void m68ki_write_8_fc(uint32_t address, uint32_t fc, uint32_t value) { m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 0; + m_mmu_tmp_sz = M68K_SZ_BYTE; m_write8(address, value); } inline void m68ki_write_16_fc(uint32_t address, uint32_t fc, uint32_t value) @@ -689,6 +694,7 @@ inline void m68ki_write_16_fc(uint32_t address, uint32_t fc, uint32_t value) } m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 0; + m_mmu_tmp_sz = M68K_SZ_WORD; m_write16(address, value); } inline void m68ki_write_32_fc(uint32_t address, uint32_t fc, uint32_t value) @@ -699,6 +705,7 @@ inline void m68ki_write_32_fc(uint32_t address, uint32_t fc, uint32_t value) } m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 0; + m_mmu_tmp_sz = M68K_SZ_LONG; m_write32(address, value); } @@ -715,6 +722,7 @@ inline void m68ki_write_32_pd_fc(uint32_t address, uint32_t fc, uint32_t value) } m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 0; + m_mmu_tmp_sz = M68K_SZ_LONG; m_write16(address+2, value>>16); m_write16(address, value&0xffff); } @@ -1219,6 +1227,7 @@ inline void m68ki_stack_frame_1010(uint32_t sr, uint32_t vector, uint32_t pc, ui { int orig_rw = m_mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now int orig_fc = m_mmu_tmp_buserror_fc; + int orig_sz = m_mmu_tmp_buserror_sz; /* INTERNAL REGISTER */ m68ki_push_16(0); @@ -1247,7 +1256,7 @@ inline void m68ki_stack_frame_1010(uint32_t sr, uint32_t vector, uint32_t pc, ui /* SPECIAL STATUS REGISTER */ // set bit for: Rerun Faulted bus Cycle, or run pending prefetch // set FC - m68ki_push_16(0x0100 | orig_fc | orig_rw<<6); + m68ki_push_16(0x0100 | orig_fc | orig_rw<<6 | orig_sz<<4); /* INTERNAL REGISTER */ m68ki_push_16(0); @@ -1271,7 +1280,7 @@ inline void m68ki_stack_frame_1011(uint32_t sr, uint32_t vector, uint32_t pc, ui { int orig_rw = m_mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now int orig_fc = m_mmu_tmp_buserror_fc; - + int orig_sz = m_mmu_tmp_buserror_sz; /* INTERNAL REGISTERS (18 words) */ m68ki_push_32(0); m68ki_push_32(0); @@ -1322,7 +1331,7 @@ inline void m68ki_stack_frame_1011(uint32_t sr, uint32_t vector, uint32_t pc, ui m68ki_push_16(0); /* SPECIAL STATUS REGISTER */ - m68ki_push_16(0x0100 | orig_fc | orig_rw<<6); + m68ki_push_16(0x0100 | orig_fc | (orig_rw<<6) | (orig_sz<<4)); /* INTERNAL REGISTER */ m68ki_push_16(0); diff --git a/src/devices/cpu/m68000/m68kdasm.cpp b/src/devices/cpu/m68000/m68kdasm.cpp index 7a0163c93e7..86c97eee7b1 100644 --- a/src/devices/cpu/m68000/m68kdasm.cpp +++ b/src/devices/cpu/m68000/m68kdasm.cpp @@ -977,7 +977,7 @@ std::string m68k_disassembler::d68040_cinv() if(limit.first) return limit.second; - static const char *cachetype[4] = { "nop", "data", "inst", "both" }; + static char const *const cachetype[4] = { "nop", "data", "inst", "both" }; switch((m_cpu_ir>>3)&3) { @@ -1241,7 +1241,7 @@ std::string m68k_disassembler::d68040_cpush() if(limit.first) return limit.second; - static const char *cachetype[4] = { "nop", "data", "inst", "both" }; + static char const *const cachetype[4] = { "nop", "data", "inst", "both" }; switch((m_cpu_ir>>3)&3) { diff --git a/src/devices/cpu/m68000/m68kmmu.h b/src/devices/cpu/m68000/m68kmmu.h index 24601755e6d..c22706d5ce2 100644 --- a/src/devices/cpu/m68000/m68kmmu.h +++ b/src/devices/cpu/m68000/m68kmmu.h @@ -489,6 +489,7 @@ uint32_t pmmu_translate_addr_with_fc(uint32_t addr_in, uint8_t fc, uint8_t ptest m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } else if (m_mmu_tmp_sr & M68K_MMU_SR_SUPERVISOR_ONLY) @@ -498,6 +499,7 @@ uint32_t pmmu_translate_addr_with_fc(uint32_t addr_in, uint8_t fc, uint8_t ptest m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } else if ((m_mmu_tmp_sr & M68K_MMU_SR_WRITE_PROTECT) && !m_mmu_tmp_rw) @@ -507,6 +509,7 @@ uint32_t pmmu_translate_addr_with_fc(uint32_t addr_in, uint8_t fc, uint8_t ptest m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } @@ -568,6 +571,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } @@ -593,6 +597,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } @@ -663,6 +668,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } return addr_in; @@ -677,6 +683,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } return addr_in; @@ -695,6 +702,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } @@ -739,6 +747,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } return addr_in; @@ -755,6 +764,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p m_mmu_tmp_buserror_address = addr_in; m_mmu_tmp_buserror_rw = m_mmu_tmp_rw; m_mmu_tmp_buserror_fc = m_mmu_tmp_fc; + m_mmu_tmp_buserror_sz = m_mmu_tmp_sz; } } @@ -1016,7 +1026,18 @@ void m68881_mmu_ops() if (m_mmu_tc & 0x80000000) { - m_pmmu_enabled = 1; + int bits = 0; + for(int shift = 20; shift >= 0; shift -= 4) { + bits += (m_mmu_tc >> shift) & 0x0f; + } + + if (bits != 32 || !((m_mmu_tc >> 23) & 1)) { + logerror("MMU: TC invalid!\n"); + m_mmu_tc &= ~0x80000000; + m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION); + } else { + m_pmmu_enabled = 1; + } // printf("PMMU enabled\n"); } else @@ -1036,6 +1057,12 @@ void m68881_mmu_ops() m_mmu_srp_limit = (temp64>>32) & 0xffffffff; m_mmu_srp_aptr = temp64 & 0xffffffff; // printf("PMMU: SRP limit = %08x aptr = %08x\n", m_mmu_srp_limit, m_mmu_srp_aptr); + // SRP type 0 is not allowed + if ((m_mmu_srp_limit & 3) == 0) { + m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION); + return; + } + if (!(modes & 0x100)) { pmmu_atc_flush(); @@ -1047,6 +1074,13 @@ void m68881_mmu_ops() m_mmu_crp_limit = (temp64>>32) & 0xffffffff; m_mmu_crp_aptr = temp64 & 0xffffffff; // printf("PMMU: CRP limit = %08x aptr = %08x\n", m_mmu_crp_limit, m_mmu_crp_aptr); + // CRP type 0 is not allowed + if ((m_mmu_crp_limit & 3) == 0) { + m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION); + return; + } + + if (!(modes & 0x100)) { pmmu_atc_flush(); diff --git a/src/devices/cpu/mb86233/mb86233d.cpp b/src/devices/cpu/mb86233/mb86233d.cpp index 4530783515d..e4b82cf5484 100644 --- a/src/devices/cpu/mb86233/mb86233d.cpp +++ b/src/devices/cpu/mb86233/mb86233d.cpp @@ -87,7 +87,7 @@ -const char *const mb86233_disassembler::regnames[0x40] = { +char const *const mb86233_disassembler::regnames[0x40] = { "b0", "b1", "x0", "x1", "x2", "i0", "i1", "i2", "sp", "pag", "vsm", "dmc", "c0", "c1", "pc", "-", "a", "ah", "al", "b", "bh", "bl", "c", "ch", "cl", "d", "dh", "dl", "p", "ph", "pl", "sft", "rf0", "rf1", "rf2", "rf3", "rf4", "rf5", "rf6", "rf7", "rf8", "rf9", "rfa", "rfb", "rfc", "rfd", "rfe", "rff", @@ -384,7 +384,7 @@ offs_t mb86233_disassembler::disassemble(std::ostream &stream, offs_t pc, const util::stream_format(stream, "stmh"); if(opcode & 0x0001) util::stream_format(stream, " fp"); - static const char *const round_mode[4] = { "rn", "rp", "rm", "rz" }; + static char const *const round_mode[4] = { "rn", "rp", "rm", "rz" }; util::stream_format(stream, " %s", round_mode[(opcode >> 1) & 3]); break; } @@ -397,7 +397,7 @@ offs_t mb86233_disassembler::disassemble(std::ostream &stream, offs_t pc, const } case 0x0e: { // Load 24 bit val - static const char *const inst[4] = { "lipl", "lia", "lib", "lid" }; + static char const *const inst[4] = { "lipl", "lia", "lib", "lid" }; util::stream_format(stream, "%s #0x%x", inst[(opcode >> 24) & 0x3], opcode&0xffffff); break; } @@ -411,7 +411,7 @@ offs_t mb86233_disassembler::disassemble(std::ostream &stream, offs_t pc, const switch(sub2) { case 0: { - static const char *rl2[16] = { + static char const *const rl2[16] = { "?0", "?1", "a", "b", "d", "?5", "?6", "?7", "?8", "?9", "?a", "?b", "?c", "?d", "?e", "?f" }; util::stream_format(stream, "clr0"); diff --git a/src/devices/cpu/mb86235/mb86235d.cpp b/src/devices/cpu/mb86235/mb86235d.cpp index ca31dbca720..7c361b44b1f 100644 --- a/src/devices/cpu/mb86235/mb86235d.cpp +++ b/src/devices/cpu/mb86235/mb86235d.cpp @@ -3,7 +3,7 @@ #include "emu.h" #include "mb86235d.h" -const char *mb86235_disassembler::regname[128] = +char const *const mb86235_disassembler::regname[128] = { "MA0", "MA1", "MA2", "MA3", "MA4", "MA5", "MA6", "MA7", "AA0", "AA1", "AA2", "AA3", "AA4", "AA5", "AA6", "AA7", @@ -15,7 +15,7 @@ const char *mb86235_disassembler::regname[128] = "???", "???", "???", "???", "???", "???", "???", "???" }; -const char *mb86235_disassembler::db_mnemonic[64] = +char const *const mb86235_disassembler::db_mnemonic[64] = { "DBMN", "DBMZ", "DBMV", "DBMU", "DBZD", "DBNR", "DBIL", "DBZC", "DBAN", "DBAZ", "DBAV", "DBAU", "DBMD", "DBAD", "???", "???", @@ -27,7 +27,7 @@ const char *mb86235_disassembler::db_mnemonic[64] = "???", "???", "???", "???", "???", "???", "???", "???" }; -const char *mb86235_disassembler::dbn_mnemonic[64] = +char const *const mb86235_disassembler::dbn_mnemonic[64] = { "DBNMN", "DBNMZ", "DBNMV", "DBNMU", "DBNZD", "DBNNR", "DBNIL", "DBNZC", "DBNAN", "DBNAZ", "DBNAV", "DBNAU", "DBNMD", "DBNAD", "???", "???", @@ -39,7 +39,7 @@ const char *mb86235_disassembler::dbn_mnemonic[64] = "???", "???", "???", "???", "???", "???", "???", "???" }; -const char *mb86235_disassembler::dc_mnemonic[64] = +char const *const mb86235_disassembler::dc_mnemonic[64] = { "DCMN", "DCMZ", "DCMV", "DCMU", "DCZD", "DCNR", "DCIL", "DCZC", "DCAN", "DCAZ", "DCAV", "DCAU", "DCMD", "DCAD", "???", "???", @@ -51,7 +51,7 @@ const char *mb86235_disassembler::dc_mnemonic[64] = "???", "???", "???", "???", "???", "???", "???", "???" }; -const char *mb86235_disassembler::dcn_mnemonic[64] = +char const *const mb86235_disassembler::dcn_mnemonic[64] = { "DCNMN", "DCNMZ", "DCNMV", "DCNMU", "DCNZD", "DCNNR", "DCNIL", "DCNZC", "DCNAN", "DCNAZ", "DCNAV", "DCNAU", "DCNMD", "DCNAD", "???", "???", @@ -63,25 +63,25 @@ const char *mb86235_disassembler::dcn_mnemonic[64] = "???", "???", "???", "???", "???", "???", "???", "???" }; -const char *mb86235_disassembler::mi1_field[16] = +char const *const mb86235_disassembler::mi1_field[16] = { "MA0", "MA1", "MA2", "MA3", "MA4", "MA5", "MA6", "MA7", "MB0", "MB1", "MB2", "MB3", "MB4", "MB5", "MB6", "MB7" }; -const char *mb86235_disassembler::mi2_field[32] = +char const *const mb86235_disassembler::mi2_field[32] = { "MA0", "MA1", "MA2", "MA3", "MA4", "MA5", "MA6", "MA7", "MB0", "MB1", "MB2", "MB3", "MB4", "MB5", "MB6", "MB7", "PR", "PR++", "PR--", "PR#0", "???", "???", "???", "???", "-1.0E+0", "0.0E+0", "0.5E+0", "1.0E+0", "1.5E+0", "2.0E+0", "3.0E+0", "5.0E+0" }; -const char *mb86235_disassembler::mo_field[32] = +char const *const mb86235_disassembler::mo_field[32] = { "MA0", "MA1", "MA2", "MA3", "MA4", "MA5", "MA6", "MA7", "MB0", "MB1", "MB2", "MB3", "MB4", "MB5", "MB6", "MB7", "AA0", "AA1", "AA2", "AA3", "AA4", "AA5", "AA6", "AA7", "AB0", "AB1", "AB2", "AB3", "AB4", "AB5", "AB6", "AB7" }; -const char *mb86235_disassembler::ai1_field[16] = +char const *const mb86235_disassembler::ai1_field[16] = { "AA0", "AA1", "AA2", "AA3", "AA4", "AA5", "AA6", "AA7", "AB0", "AB1", "AB2", "AB3", "AB4", "AB5", "AB6", "AB7" }; -const char *mb86235_disassembler::ai2_field[32] = +char const *const mb86235_disassembler::ai2_field[32] = { "AA0", "AA1", "AA2", "AA3", "AA4", "AA5", "AA6", "AA7", "AB0", "AB1", "AB2", "AB3", "AB4", "AB5", "AB6", "AB7", "PR", "PR++", "PR--", "PR#0", "???", "???", "???", "???", "0", "1", "-1", "???", "???", "???", "???", "???" }; -const char *mb86235_disassembler::ai2f_field[32] = +char const *const mb86235_disassembler::ai2f_field[32] = { "AA0", "AA1", "AA2", "AA3", "AA4", "AA5", "AA6", "AA7", "AB0", "AB1", "AB2", "AB3", "AB4", "AB5", "AB6", "AB7", "PR", "PR++", "PR--", "PR#0", "???", "???", "???", "???", "-1.0E+0", "0.0E+0", "0.5E+0", "1.0E+0", "1.5E+0", "2.0E+0", "3.0E+0", "5.0E+0" }; diff --git a/src/devices/cpu/mb86235/mb86235d.h b/src/devices/cpu/mb86235/mb86235d.h index 4f9a3c1ed2d..d3f8d2150e9 100644 --- a/src/devices/cpu/mb86235/mb86235d.h +++ b/src/devices/cpu/mb86235/mb86235d.h @@ -15,17 +15,17 @@ public: virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; private: - static const char *regname[128]; - static const char *db_mnemonic[64]; - static const char *dbn_mnemonic[64]; - static const char *dc_mnemonic[64]; - static const char *dcn_mnemonic[64]; - static const char *mi1_field[16]; - static const char *mi2_field[32]; - static const char *mo_field[32]; - static const char *ai1_field[16]; - static const char *ai2_field[32]; - static const char *ai2f_field[32]; + static char const *const regname[128]; + static char const *const db_mnemonic[64]; + static char const *const dbn_mnemonic[64]; + static char const *const dc_mnemonic[64]; + static char const *const dcn_mnemonic[64]; + static char const *const mi1_field[16]; + static char const *const mi2_field[32]; + static char const *const mo_field[32]; + static char const *const ai1_field[16]; + static char const *const ai2_field[32]; + static char const *const ai2f_field[32]; void dasm_ea(std::ostream &stream, int md, int arx, int ary, int disp); void dasm_alu_mul(std::ostream &stream, uint64_t opcode, bool twoop); diff --git a/src/devices/cpu/mcs48/mcs48.cpp b/src/devices/cpu/mcs48/mcs48.cpp index f80cfbc9381..331e05d6456 100644 --- a/src/devices/cpu/mcs48/mcs48.cpp +++ b/src/devices/cpu/mcs48/mcs48.cpp @@ -531,19 +531,25 @@ uint8_t mcs48_cpu_device::p2_mask() void mcs48_cpu_device::expander_operation(expander_op operation, uint8_t port) { - /* put opcode/data on low 4 bits of P2 */ + // put opcode on low 4 bits of P2 (overwriting latch) port_w(2, m_p2 = (m_p2 & 0xf0) | (uint8_t(operation) << 2) | (port & 3)); - /* generate high-to-low transition on PROG line */ + // generate high-to-low transition on PROG line prog_w(0); - /* put data on low 4 bits of P2 */ + // transfer data on low 4 bits of P2 if (operation != EXPANDER_OP_READ) port_w(2, m_p2 = (m_p2 & 0xf0) | (m_a & 0x0f)); else - m_a = port_r(2) | 0x0f; + { + // place P20-P23 in input mode + port_w(2, m_p2 |= 0x0f); + + // input data to lower 4 bits of A (upper 4 bits are cleared) + m_a = port_r(2) & 0x0f; + } - /* generate low-to-high transition on PROG line */ + // generate low-to-high transition on PROG line prog_w(1); } @@ -1099,7 +1105,7 @@ void mcs48_cpu_device::device_start() state_add(STATE_GENPC, "GENPC", m_pc).mask(0xfff).noshow(); state_add(STATE_GENPCBASE, "CURPC", m_prevpc).mask(0xfff).noshow(); state_add(STATE_GENSP, "GENSP", m_psw).mask(0x7).noshow(); - state_add(STATE_GENFLAGS, "GENFLAGS", m_psw).noshow().formatstr("%10s"); + state_add(STATE_GENFLAGS, "GENFLAGS", m_psw).noshow().formatstr("%11s"); state_add(MCS48_A, "A", m_a); state_add(MCS48_TC, "TC", m_timer); state_add(MCS48_TPRE, "TPRE", m_prescaler).mask(0x1f); @@ -1375,17 +1381,6 @@ WRITE8_MEMBER( upi41_cpu_device::upi41_master_w ) } -READ8_MEMBER(mcs48_cpu_device::p1_r) -{ - return m_p1; -} - -READ8_MEMBER(mcs48_cpu_device::p2_r) -{ - return m_p2; -} - - /*************************************************************************** GENERAL CONTEXT ACCESS ***************************************************************************/ diff --git a/src/devices/cpu/mcs48/mcs48.h b/src/devices/cpu/mcs48/mcs48.h index fe8affa2387..ede81b5e87f 100644 --- a/src/devices/cpu/mcs48/mcs48.h +++ b/src/devices/cpu/mcs48/mcs48.h @@ -159,8 +159,8 @@ public: auto t1_in_cb() { return m_test_in_cb[1].bind(); } auto prog_out_cb() { return m_prog_out_cb.bind(); } - DECLARE_READ8_MEMBER(p1_r); - DECLARE_READ8_MEMBER(p2_r); + uint8_t p1_r() { return m_p1; } + uint8_t p2_r() { return m_p2; } void data_6bit(address_map &map); void data_7bit(address_map &map); diff --git a/src/devices/cpu/mips/mips3.cpp b/src/devices/cpu/mips/mips3.cpp index 21e757cbb30..6989e262492 100644 --- a/src/devices/cpu/mips/mips3.cpp +++ b/src/devices/cpu/mips/mips3.cpp @@ -102,6 +102,10 @@ static const uint8_t fpmode_source[4] = #define ROPCODE(pc) m_lr32(pc) +DEFINE_DEVICE_TYPE(R4000BE, r4000be_device, "r4000be", "MIPS R4000 (big)") +DEFINE_DEVICE_TYPE(R4000LE, r4000le_device, "r4000le", "MIPS R4000 (little)") +DEFINE_DEVICE_TYPE(R4400BE, r4400be_device, "r4400be", "MIPS R4400 (big)") +DEFINE_DEVICE_TYPE(R4400LE, r4400le_device, "r4400le", "MIPS R4400 (little)") DEFINE_DEVICE_TYPE(VR4300BE, vr4300be_device, "vr4300be", "NEC VR4300 (big)") DEFINE_DEVICE_TYPE(VR4300LE, vr4300le_device, "vr4300le", "NEC VR4300 (little)") DEFINE_DEVICE_TYPE(VR4310BE, vr4310be_device, "vr4310be", "NEC VR4310 (big)") @@ -284,7 +288,9 @@ void mips3_device::generate_exception(int exception, int backup) /* translate our fake fill exceptions into real exceptions */ if (exception == EXCEPTION_TLBLOAD_FILL || exception == EXCEPTION_TLBSTORE_FILL) { - offset = 0; + /* don't use the tlb exception offset if within another exception */ + if (!(SR & SR_EXL)) + offset = 0; exception = (exception - EXCEPTION_TLBLOAD_FILL) + EXCEPTION_TLBLOAD; } else if (exception == EXCEPTION_INTERRUPT && m_flavor == MIPS3_TYPE_R5900) @@ -292,9 +298,6 @@ void mips3_device::generate_exception(int exception, int backup) offset = 0x200; } - /* set the exception PC */ - m_core->cpr[0][COP0_EPC] = m_core->pc; - /* put the cause in the low 8 bits and clear the branch delay flag */ CAUSE = (CAUSE & ~0x800000ff) | (exception << 2); @@ -304,31 +307,26 @@ void mips3_device::generate_exception(int exception, int backup) CAUSE |= m_badcop_value << 28; } - /* if we were in a branch delay slot, adjust */ - if ((m_nextpc != ~0) || (m_delayslot)) + /* check if exception within another exception */ + if (!(SR & SR_EXL)) { - m_delayslot = false; - m_nextpc = ~0; - m_core->cpr[0][COP0_EPC] -= 4; - CAUSE |= 0x80000000; - } + /* if we were in a branch delay slot, adjust */ + if ((m_nextpc != ~0) || (m_delayslot)) + { + m_delayslot = false; + m_nextpc = ~0; + m_core->cpr[0][COP0_EPC] = m_core->pc - 4; + CAUSE |= 0x80000000; + } + else + m_core->cpr[0][COP0_EPC] = m_core->pc; - /* set the exception level */ - SR |= SR_EXL; + /* set the exception level */ + SR |= SR_EXL; + } /* based on the BEV bit, we either go to ROM or RAM */ - m_core->pc = (SR & SR_BEV) ? 0xbfc00200 : 0x80000000; - - /* most exceptions go to offset 0x180, except for TLB stuff */ - if (exception >= EXCEPTION_TLBMOD && exception <= EXCEPTION_TLBSTORE) - { - fprintf(stderr, "TLB miss @ %08X\n", (uint32_t)m_core->cpr[0][COP0_BadVAddr]); - machine().debug_break(); - } - else - { - m_core->pc += offset; - } + m_core->pc = ((SR & SR_BEV) ? 0xbfc00200 : 0x80000000) + offset; /* useful for tracking interrupts diff --git a/src/devices/cpu/mips/mips3.h b/src/devices/cpu/mips/mips3.h index e36a5aa5fc8..a5d603c15fb 100644 --- a/src/devices/cpu/mips/mips3.h +++ b/src/devices/cpu/mips/mips3.h @@ -20,6 +20,10 @@ MIPS III/IV emulator. #include "cpu/drcuml.h" #include "ps2vu.h" +DECLARE_DEVICE_TYPE(R4000BE, r4000be_device) +DECLARE_DEVICE_TYPE(R4000LE, r4000le_device) +DECLARE_DEVICE_TYPE(R4400BE, r4400be_device) +DECLARE_DEVICE_TYPE(R4400LE, r4400le_device) // NEC VR4300 series is MIPS III with 32-bit address bus and slightly custom COP0/TLB DECLARE_DEVICE_TYPE(VR4300BE, vr4300be_device) DECLARE_DEVICE_TYPE(VR4300LE, vr4300le_device) @@ -278,6 +282,8 @@ protected: enum mips3_flavor { /* MIPS III variants */ MIPS3_TYPE_MIPS_III, + MIPS3_TYPE_R4000, + MIPS3_TYPE_R4400, MIPS3_TYPE_VR4300, MIPS3_TYPE_R4600, MIPS3_TYPE_R4650, @@ -633,6 +639,42 @@ private: }; +class r4000be_device : public mips3_device { +public: + // construction/destruction + r4000be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, R4000BE, tag, owner, clock, MIPS3_TYPE_R4000, ENDIANNESS_BIG, 32) + { + } +}; + +class r4000le_device : public mips3_device { +public: + // construction/destruction + r4000le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, R4000LE, tag, owner, clock, MIPS3_TYPE_R4000, ENDIANNESS_LITTLE, 32) + { + } +}; + +class r4400be_device : public mips3_device { +public: + // construction/destruction + r4400be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, R4400BE, tag, owner, clock, MIPS3_TYPE_R4400, ENDIANNESS_BIG, 32) + { + } +}; + +class r4400le_device : public mips3_device { +public: + // construction/destruction + r4400le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, R4400LE, tag, owner, clock, MIPS3_TYPE_R4400, ENDIANNESS_LITTLE, 32) + { + } +}; + class vr4300be_device : public mips3_device { public: // construction/destruction diff --git a/src/devices/cpu/mips/mips3com.cpp b/src/devices/cpu/mips/mips3com.cpp index 3893dfb19e0..94c7d2d9683 100644 --- a/src/devices/cpu/mips/mips3com.cpp +++ b/src/devices/cpu/mips/mips3com.cpp @@ -303,6 +303,12 @@ uint32_t mips3_device::compute_prid_register() { switch (m_flavor) { + case MIPS3_TYPE_R4000: + return 0x0400; + + case MIPS3_TYPE_R4400: + return 0x0440; + case MIPS3_TYPE_VR4300: return 0x0b00; diff --git a/src/devices/cpu/mips/r3000.cpp b/src/devices/cpu/mips/r3000.cpp index 6495c922f86..9ac90837ec2 100644 --- a/src/devices/cpu/mips/r3000.cpp +++ b/src/devices/cpu/mips/r3000.cpp @@ -115,6 +115,7 @@ // DEVICE INTERFACE //************************************************************************** +DEFINE_DEVICE_TYPE(R2000, r2000_device, "r2000", "MIPS R2000") DEFINE_DEVICE_TYPE(R3041, r3041_device, "r3041", "MIPS R3041") DEFINE_DEVICE_TYPE(R3051, r3051_device, "r3051", "MIPS R3051") DEFINE_DEVICE_TYPE(R3052, r3052_device, "r3052", "MIPS R3052") @@ -166,6 +167,13 @@ r3000_device::~r3000_device() { } +//------------------------------------------------- +// r2000_device - constructor +//------------------------------------------------- + +r2000_device::r2000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : r3000_device(mconfig, R2000, tag, owner, clock, CHIP_TYPE_R2000) { } + //------------------------------------------------- // r3041_device - constructor @@ -242,6 +250,12 @@ void r3000_device::device_start() // determine the cache sizes switch (m_chip_type) { + case CHIP_TYPE_R2000: + { + m_icache_size = 32768; // external + m_dcache_size = 32768; // external + break; + } case CHIP_TYPE_R3041: { m_icache_size = 2048; diff --git a/src/devices/cpu/mips/r3000.h b/src/devices/cpu/mips/r3000.h index db8313309e2..cf495d188df 100644 --- a/src/devices/cpu/mips/r3000.h +++ b/src/devices/cpu/mips/r3000.h @@ -79,10 +79,15 @@ public: template <class Object> devcb_base &set_brcond1_input(Object &&cb) { return m_in_brcond1.set_callback(std::forward<Object>(cb)); } template <class Object> devcb_base &set_brcond2_input(Object &&cb) { return m_in_brcond2.set_callback(std::forward<Object>(cb)); } template <class Object> devcb_base &set_brcond3_input(Object &&cb) { return m_in_brcond3.set_callback(std::forward<Object>(cb)); } + auto in_brcond0() { return m_in_brcond0.bind(); } + auto in_brcond1() { return m_in_brcond1.bind(); } + auto in_brcond2() { return m_in_brcond2.bind(); } + auto in_brcond3() { return m_in_brcond3.bind(); } protected: enum chip_type { + CHIP_TYPE_R2000, CHIP_TYPE_R3041, CHIP_TYPE_R3051, CHIP_TYPE_R3052, @@ -246,6 +251,14 @@ protected: devcb_read_line m_in_brcond3; }; +// ======================> r3041_device + +class r2000_device : public r3000_device +{ +public: + r2000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + // ======================> r3041_device @@ -306,6 +319,7 @@ protected: // device type definition +DECLARE_DEVICE_TYPE(R2000, r2000_device) DECLARE_DEVICE_TYPE(R3041, r3041_device) DECLARE_DEVICE_TYPE(R3051, r3051_device) DECLARE_DEVICE_TYPE(R3052, r3052_device) diff --git a/src/devices/cpu/mips/vudasm.cpp b/src/devices/cpu/mips/vudasm.cpp index cb207498d1d..4b4cbd4247a 100644 --- a/src/devices/cpu/mips/vudasm.cpp +++ b/src/devices/cpu/mips/vudasm.cpp @@ -9,22 +9,22 @@ #include "emu.h" #include "vudasm.h" -/*static*/ const char* sonyvu_disassembler::DEST_STR[] = +/*static*/ char const *const sonyvu_disassembler::DEST_STR[] = { " ", "w ", "z ", "zw ", "y ", "yw ", "yz ", "yzw ", "x ", "xw ", "xz ", "xzw ", "xy ", "xyw ", "xyz ", "xyzw" }; -/*static*/ const char* sonyvu_disassembler::DEST_COMMA_STR[] = +/*static*/ char const *const sonyvu_disassembler::DEST_COMMA_STR[] = { ",", "w,", "z,", "zw,", "y,", "yw,", "yz,", "yzw,", "x,", "xw,", "xz,", "xzw,", "xy,", "xyw,", "xyz,", "xyzw," }; -/*static*/ const char* sonyvu_disassembler::BC_STR[] = { "x", "y", "z", "w" }; -/*static*/ const char* sonyvu_disassembler::BC_COMMA_STR[] = { "x,", "y,", "z,", "w," }; +/*static*/ char const *const sonyvu_disassembler::BC_STR[] = { "x", "y", "z", "w" }; +/*static*/ char const *const sonyvu_disassembler::BC_COMMA_STR[] = { "x,", "y,", "z,", "w," }; -/*static*/ const char* sonyvu_disassembler::VFREG[] = +/*static*/ char const *const sonyvu_disassembler::VFREG[] = { "$vf00", "$vf01", "$vf02", "$vf03", "$vf04", "$vf05", "$vf06", "$vf07", "$vf08", "$vf09", "$vf10", "$vf11", "$vf12", "$vf13", "$vf14", "$vf15", @@ -32,7 +32,7 @@ "$vf24", "$vf25", "$vf26", "$vf27", "$vf28", "$vf29", "$vf30", "$vf31" }; -/*static*/ const char* sonyvu_disassembler::VIREG[] = +/*static*/ char const *const sonyvu_disassembler::VIREG[] = { "$vi00", "$vi01", "$vi02", "$vi03", "$vi04", "$vi05", "$vi06", "$vi07", "$vi08", "$vi09", "$vi10", "$vi11", "$vi12", "$vi13", "$vi14", "$vi15", diff --git a/src/devices/cpu/mips/vudasm.h b/src/devices/cpu/mips/vudasm.h index abd67ed89aa..fff498404ee 100644 --- a/src/devices/cpu/mips/vudasm.h +++ b/src/devices/cpu/mips/vudasm.h @@ -30,12 +30,12 @@ private: std::string signed_11bit_x8(uint16_t val); std::string signed_15bit(uint16_t val); - static const char * DEST_STR[16]; - static const char * DEST_COMMA_STR[16]; - static const char * BC_STR[16]; - static const char * BC_COMMA_STR[16]; - static const char * VFREG[32]; - static const char * VIREG[32]; + static char const *const DEST_STR[16]; + static char const *const DEST_COMMA_STR[16]; + static char const *const BC_STR[16]; + static char const *const BC_COMMA_STR[16]; + static char const *const VFREG[32]; + static char const *const VIREG[32]; }; #endif // MAME_CPU_MIPS_VUDASM_H diff --git a/src/devices/cpu/nec/v53.cpp b/src/devices/cpu/nec/v53.cpp index 82b811c873a..5b31c6bcb7e 100644 --- a/src/devices/cpu/nec/v53.cpp +++ b/src/devices/cpu/nec/v53.cpp @@ -277,11 +277,11 @@ void v53_base_device::install_peripheral_io() if (IOAG) // 8-bit { - space(AS_IO).install_readwrite_handler(base+0x00, base+0x01, read8_delegate(FUNC(pic8259_device::read), (pic8259_device*)m_v53icu), write8_delegate(FUNC(pic8259_device::write), (pic8259_device*)m_v53icu), 0xffff); + space(AS_IO).install_readwrite_handler(base+0x00, base+0x01, read8sm_delegate(FUNC(pic8259_device::read), (pic8259_device*)m_v53icu), write8sm_delegate(FUNC(pic8259_device::write), (pic8259_device*)m_v53icu), 0xffff); } else { - space(AS_IO).install_readwrite_handler(base+0x00, base+0x03, read8_delegate(FUNC(pic8259_device::read), (pic8259_device*)m_v53icu), write8_delegate(FUNC(pic8259_device::write), (pic8259_device*)m_v53icu), 0x00ff); + space(AS_IO).install_readwrite_handler(base+0x00, base+0x03, read8sm_delegate(FUNC(pic8259_device::read), (pic8259_device*)m_v53icu), write8sm_delegate(FUNC(pic8259_device::write), (pic8259_device*)m_v53icu), 0x00ff); } } @@ -314,16 +314,16 @@ void v53_base_device::install_peripheral_io() if (IOAG) // 8-bit { - space(AS_IO).install_readwrite_handler(base+0x00, base+0x01, read8_delegate(FUNC(v53_scu_device::data_r), (v53_scu_device*)m_v53scu), write8_delegate(FUNC(v53_scu_device::data_w), (v53_scu_device*)m_v53scu), 0x00ff); - space(AS_IO).install_readwrite_handler(base+0x00, base+0x01, read8_delegate(FUNC(v53_scu_device::status_r), (v53_scu_device*)m_v53scu), write8_delegate(FUNC(v53_scu_device::command_w), (v53_scu_device*)m_v53scu), 0xff00); - space(AS_IO).install_write_handler(base+0x02, base+0x03, write8_delegate(FUNC(v53_scu_device::mode_w), (v53_scu_device*)m_v53scu), 0x00ff); + space(AS_IO).install_readwrite_handler(base+0x00, base+0x01, read8smo_delegate(FUNC(v53_scu_device::data_r), m_v53scu.target()), write8smo_delegate(FUNC(v53_scu_device::data_w), m_v53scu.target()), 0x00ff); + space(AS_IO).install_readwrite_handler(base+0x00, base+0x01, read8smo_delegate(FUNC(v53_scu_device::status_r), m_v53scu.target()), write8smo_delegate(FUNC(v53_scu_device::command_w), m_v53scu.target()), 0xff00); + space(AS_IO).install_write_handler(base+0x02, base+0x03, write8smo_delegate(FUNC(v53_scu_device::mode_w), m_v53scu.target()), 0x00ff); space(AS_IO).install_readwrite_handler(base+0x02, base+0x03, read8_delegate(FUNC(v53_base_device::scu_simk_r), this), write8_delegate(FUNC(v53_base_device::scu_simk_w), this), 0xff00); } else { - space(AS_IO).install_readwrite_handler(base+0x00, base+0x01, read8_delegate(FUNC(v53_scu_device::data_r), (v53_scu_device*)m_v53scu), write8_delegate(FUNC(v53_scu_device::data_w), (v53_scu_device*)m_v53scu), 0x00ff); - space(AS_IO).install_readwrite_handler(base+0x02, base+0x03, read8_delegate(FUNC(v53_scu_device::status_r), (v53_scu_device*)m_v53scu), write8_delegate(FUNC(v53_scu_device::command_w), (v53_scu_device*)m_v53scu), 0x00ff); - space(AS_IO).install_write_handler(base+0x04, base+0x05, write8_delegate(FUNC(v53_scu_device::mode_w), (v53_scu_device*)m_v53scu), 0x00ff); + space(AS_IO).install_readwrite_handler(base+0x00, base+0x01, read8smo_delegate(FUNC(v53_scu_device::data_r), m_v53scu.target()), write8smo_delegate(FUNC(v53_scu_device::data_w), m_v53scu.target()), 0x00ff); + space(AS_IO).install_readwrite_handler(base+0x02, base+0x03, read8smo_delegate(FUNC(v53_scu_device::status_r), m_v53scu.target()), write8smo_delegate(FUNC(v53_scu_device::command_w), m_v53scu.target()), 0x00ff); + space(AS_IO).install_write_handler(base+0x04, base+0x05, write8smo_delegate(FUNC(v53_scu_device::mode_w), m_v53scu.target()), 0x00ff); space(AS_IO).install_readwrite_handler(base+0x06, base+0x07, read8_delegate(FUNC(v53_base_device::scu_simk_r), this), write8_delegate(FUNC(v53_base_device::scu_simk_w), this), 0x00ff); } @@ -352,15 +352,15 @@ WRITE8_MEMBER(v53_base_device::scu_simk_w) /*** TCU ***/ -WRITE8_MEMBER(v53_base_device::tmu_tct0_w) { m_v53tcu->write(space, 0, data); } -WRITE8_MEMBER(v53_base_device::tmu_tct1_w) { m_v53tcu->write(space, 1, data); } -WRITE8_MEMBER(v53_base_device::tmu_tct2_w) { m_v53tcu->write(space, 2, data); } -WRITE8_MEMBER(v53_base_device::tmu_tmd_w) { m_v53tcu->write(space, 3, data); } +WRITE8_MEMBER(v53_base_device::tmu_tct0_w) { m_v53tcu->write(0, data); } +WRITE8_MEMBER(v53_base_device::tmu_tct1_w) { m_v53tcu->write(1, data); } +WRITE8_MEMBER(v53_base_device::tmu_tct2_w) { m_v53tcu->write(2, data); } +WRITE8_MEMBER(v53_base_device::tmu_tmd_w) { m_v53tcu->write(3, data); } -READ8_MEMBER(v53_base_device::tmu_tst0_r) { return m_v53tcu->read(space, 0); } -READ8_MEMBER(v53_base_device::tmu_tst1_r) { return m_v53tcu->read(space, 1); } -READ8_MEMBER(v53_base_device::tmu_tst2_r) { return m_v53tcu->read(space, 2); } +READ8_MEMBER(v53_base_device::tmu_tst0_r) { return m_v53tcu->read(0); } +READ8_MEMBER(v53_base_device::tmu_tst1_r) { return m_v53tcu->read(1); } +READ8_MEMBER(v53_base_device::tmu_tst2_r) { return m_v53tcu->read(2); } diff --git a/src/devices/cpu/pps4/pps4dasm.cpp b/src/devices/cpu/pps4/pps4dasm.cpp index edb15db12b3..d14912385c8 100644 --- a/src/devices/cpu/pps4/pps4dasm.cpp +++ b/src/devices/cpu/pps4/pps4dasm.cpp @@ -13,7 +13,7 @@ #include "emu.h" #include "pps4dasm.h" -const char *pps4_disassembler::token_str[t_COUNT] = { +char const *const pps4_disassembler::token_str[t_COUNT] = { "ad", /* add */ "adc", /* add with carry-in */ "adsk", /* add and skip on carry-out */ @@ -66,7 +66,7 @@ const char *pps4_disassembler::token_str[t_COUNT] = { "sag" /* special address generation */ }; -const uint16_t pps4_disassembler::table[] = { +uint16_t const pps4_disassembler::table[] = { /* 00 */ t_LBL | t_I8c, /* 01 */ t_TML | t_I4 | t_I8, /* 02 */ t_TML | t_I4 | t_I8, diff --git a/src/devices/cpu/pps4/pps4dasm.h b/src/devices/cpu/pps4/pps4dasm.h index 7e0f0ab9b91..04bfa732144 100644 --- a/src/devices/cpu/pps4/pps4dasm.h +++ b/src/devices/cpu/pps4/pps4dasm.h @@ -51,8 +51,8 @@ private: t_OUT = 1 << 15 /* Debugger step out (RETURN) */ } pps4_token_e; - static const char *token_str[t_COUNT]; - static const uint16_t table[]; + static char const *const token_str[t_COUNT]; + static uint16_t const table[]; }; diff --git a/src/devices/cpu/psx/gte.cpp b/src/devices/cpu/psx/gte.cpp index cec3214cb47..d48b206e84f 100644 --- a/src/devices/cpu/psx/gte.cpp +++ b/src/devices/cpu/psx/gte.cpp @@ -145,24 +145,6 @@ static inline void ATTR_PRINTF(2,3) GTELOG( uint32_t pc, const char *a, ...) {} #define CV2( n ) ( n < 3 ? m_cp2cr[ ( n << 3 ) + 6 ].sd : 0 ) #define CV3( n ) ( n < 3 ? m_cp2cr[ ( n << 3 ) + 7 ].sd : 0 ) -static uint32_t gte_leadingzerocount( uint32_t lzcs ) -{ - uint32_t lzcr = 0; - - if( ( lzcs & 0x80000000 ) == 0 ) - { - lzcs = ~lzcs; - } - - while( ( lzcs & 0x80000000 ) != 0 ) - { - lzcr++; - lzcs <<= 1; - } - - return lzcr; -} - int32_t gte::LIM( int32_t value, int32_t max, int32_t min, uint32_t flag ) { if( value > max ) @@ -233,7 +215,7 @@ void gte::setcp2dr( uint32_t pc, int reg, uint32_t value ) break; case 30: - LZCR = gte_leadingzerocount( value ); + LZCR = (value & 0x80000000) == 0 ? count_leading_zeros(value) : count_leading_ones(value); break; case 31: @@ -332,7 +314,7 @@ static inline uint32_t gte_divide( uint16_t numerator, uint16_t denominator ) 0x00 }; - int shift = gte_leadingzerocount( denominator ) - 16; + int shift = count_leading_zeros( denominator ) - 16; int r1 = ( denominator << shift ) & 0x7fff; int r2 = table[ ( ( r1 + 0x40 ) >> 7 ) ] + 0x101; diff --git a/src/devices/cpu/psx/psx.cpp b/src/devices/cpu/psx/psx.cpp index 8c1f4977990..1ea5787328d 100644 --- a/src/devices/cpu/psx/psx.cpp +++ b/src/devices/cpu/psx/psx.cpp @@ -3462,11 +3462,11 @@ MACHINE_CONFIG_START(psxcpu_device::device_add_mconfig) MCFG_PSX_RCNT_IRQ1_HANDLER( WRITELINE( "irq", psxirq_device, intin5 ) ) MCFG_PSX_RCNT_IRQ2_HANDLER( WRITELINE( "irq", psxirq_device, intin6 ) ) - MCFG_DEVICE_ADD( "sio0", PSX_SIO0, 0 ) - MCFG_PSX_SIO_IRQ_HANDLER( WRITELINE( "irq", psxirq_device, intin7 ) ) + auto &sio0(PSX_SIO0(config, "sio0", DERIVED_CLOCK(1, 2))); + sio0.irq_handler().set("irq", FUNC(psxirq_device::intin7)); - MCFG_DEVICE_ADD( "sio1", PSX_SIO1, 0 ) - MCFG_PSX_SIO_IRQ_HANDLER( WRITELINE( "irq", psxirq_device, intin8 ) ) + auto &sio1(PSX_SIO1(config, "sio1", DERIVED_CLOCK(1, 2))); + sio1.irq_handler().set("irq", FUNC(psxirq_device::intin8)); RAM( config, "ram" ).set_default_value( 0x00 ); MACHINE_CONFIG_END diff --git a/src/devices/cpu/psx/sio.h b/src/devices/cpu/psx/sio.h index 0548480abeb..7e02b57330f 100644 --- a/src/devices/cpu/psx/sio.h +++ b/src/devices/cpu/psx/sio.h @@ -16,21 +16,6 @@ DECLARE_DEVICE_TYPE(PSX_SIO0, psxsio0_device) DECLARE_DEVICE_TYPE(PSX_SIO1, psxsio1_device) -#define MCFG_PSX_SIO_IRQ_HANDLER(_devcb) \ - downcast<psxsio_device &>(*device).set_irq_handler(DEVCB_##_devcb); - -#define MCFG_PSX_SIO_SCK_HANDLER(_devcb) \ - downcast<psxsio_device &>(*device).set_sck_handler(DEVCB_##_devcb); - -#define MCFG_PSX_SIO_TXD_HANDLER(_devcb) \ - downcast<psxsio_device &>(*device).set_txd_handler(DEVCB_##_devcb); - -#define MCFG_PSX_SIO_DTR_HANDLER(_devcb) \ - downcast<psxsio_device &>(*device).set_dtr_handler(DEVCB_##_devcb); - -#define MCFG_PSX_SIO_RTS_HANDLER(_devcb) \ - downcast<psxsio_device &>(*device).set_rts_handler(DEVCB_##_devcb); - #define SIO_BUF_SIZE ( 8 ) #define SIO_STATUS_TX_RDY ( 1 << 0 ) @@ -52,11 +37,11 @@ class psxsio_device : public device_t { public: // configuration helpers - template <class Object> devcb_base &set_irq_handler(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_sck_handler(Object &&cb) { return m_sck_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_txd_handler(Object &&cb) { return m_txd_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_dtr_handler(Object &&cb) { return m_dtr_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_rts_handler(Object &&cb) { return m_rts_handler.set_callback(std::forward<Object>(cb)); } + auto irq_handler() { return m_irq_handler.bind(); } + auto sck_handler() { return m_sck_handler.bind(); } + auto txd_handler() { return m_txd_handler.bind(); } + auto dtr_handler() { return m_dtr_handler.bind(); } + auto rts_handler() { return m_rts_handler.bind(); } DECLARE_WRITE32_MEMBER( write ); DECLARE_READ32_MEMBER( read ); diff --git a/src/devices/cpu/sm8500/sm8500.cpp b/src/devices/cpu/sm8500/sm8500.cpp index 483cd29707b..d5ad5050063 100644 --- a/src/devices/cpu/sm8500/sm8500.cpp +++ b/src/devices/cpu/sm8500/sm8500.cpp @@ -284,56 +284,56 @@ void sm8500_cpu_device::process_interrupts() break; case DMA_INT: m_IR0 |= 0x80; - if ( ( m_IE0 & 0x80 ) && ( ( m_PS0 & 0x07 ) < 8 ) && ( m_PS1 & 0x01 ) ) + if ( BIT( m_IE0, 7) && BIT( m_PS1, 0) ) { take_interrupt( 0x1000 ); } break; case TIM0_INT: m_IR0 |= 0x40; - if ( ( m_IE0 & 0x40 ) && ( ( m_PS0 & 0x07 ) < 8 ) && ( m_PS1 & 0x01 ) ) + if ( BIT( m_IE0, 6) && BIT( m_PS1, 0) ) { take_interrupt( 0x1002 ); } break; case EXT_INT: m_IR0 |= 0x10; - if ( ( m_IE0 & 0x10 ) && ( ( m_PS0 & 0x07 ) < 7 ) && ( m_PS1 & 0x01 ) ) + if ( BIT( m_IE0, 4) && ( ( m_PS0 & 0x07 ) < 7 ) && BIT( m_PS1, 0) ) { take_interrupt( 0x1006 ); } break; case UART_INT: m_IR0 |= 0x08; - if ( ( m_IE0 & 0x08 ) && ( ( m_PS0 & 0x07 ) < 6 ) && ( m_PS1 & 0x01 ) ) + if ( BIT( m_IE0, 3) && ( ( m_PS0 & 0x07 ) < 6 ) && BIT( m_PS1, 0) ) { take_interrupt( 0x1008 ); } break; case LCDC_INT: m_IR0 |= 0x01; - if ( ( m_IE0 & 0x01 ) && ( ( m_PS0 & 0x07 ) < 5 ) && ( m_PS1 & 0x01 ) ) + if ( BIT( m_IE0, 0) && ( ( m_PS0 & 0x07 ) < 5 ) && BIT( m_PS1, 0) ) { take_interrupt( 0x100E ); } break; case TIM1_INT: m_IR1 |= 0x40; - if ( ( m_IE1 & 0x40 ) && ( ( m_PS0 & 0x07 ) < 4 ) && ( m_PS1 & 0x01 ) ) + if ( BIT( m_IE1, 6) && ( ( m_PS0 & 0x07 ) < 4 ) && BIT( m_PS1, 0) ) { take_interrupt( 0x1012 ); } break; case CK_INT: m_IR1 |= 0x10; - if ( ( m_IE1 & 0x10 ) && ( ( m_PS0 & 0x07 ) < 3 ) && ( m_PS1 & 0x01 ) ) + if ( BIT( m_IE1, 4) && ( ( m_PS0 & 0x07 ) < 3 ) && BIT( m_PS1, 0) ) { take_interrupt( 0x1016 ); } break; case PIO_INT: m_IR1 |= 0x04; - if ( ( m_IE1 & 0x04 ) && ( ( m_PS0 & 0x07 ) < 2 ) && ( m_PS1 & 0x01 ) ) + if ( BIT( m_IE1, 2) && ( ( m_PS0 & 0x07 ) < 2 ) && BIT( m_PS1, 0) ) { take_interrupt( 0x101A ); } diff --git a/src/devices/cpu/sm8500/sm8500.h b/src/devices/cpu/sm8500/sm8500.h index 247a283685f..bd18a889bee 100644 --- a/src/devices/cpu/sm8500/sm8500.h +++ b/src/devices/cpu/sm8500/sm8500.h @@ -14,7 +14,7 @@ enum { /* "main" 16 bit register */ - SM8500_PC=1, SM8500_SP, SM8500_PS, SM8500_SYS16, SM8500_RR0, SM8500_RR2, SM8500_RR4, SM8500_RR6, SM8500_RR8, SM8500_RR10, + SM8500_PC=1, SM8500_SP, SM8500_PS, SM8500_SYS16, SM8500_RR0, SM8500_RR2, SM8500_RR4, SM8500_RR6, SM8500_RR8, SM8500_RR10, SM8500_RR12, SM8500_RR14, /* additional internal 8 bit registers */ SM8500_IE0, SM8500_IE1, SM8500_IR0, SM8500_IR1, SM8500_P0, SM8500_P1, SM8500_P2, SM8500_P3, SM8500_SYS, SM8500_CKC, diff --git a/src/devices/cpu/sm8500/sm8500d.cpp b/src/devices/cpu/sm8500/sm8500d.cpp index 3d6139ef8ed..7a30af1dfbe 100644 --- a/src/devices/cpu/sm8500/sm8500d.cpp +++ b/src/devices/cpu/sm8500/sm8500d.cpp @@ -312,11 +312,11 @@ offs_t sm8500_disassembler::disassemble(std::ostream &stream, offs_t pc, const d break; case AM_cbr: offset = (int8_t) opcodes.r8(pos++); - util::stream_format(stream, "%s,$%04X", sm8500_cond[ op & 0x0F ], pc + pos + offset); + util::stream_format(stream, "%s,$%04X", sm8500_cond[ op & 0x0F ], pos + offset); break; case AM_rbr: offset = (int8_t) opcodes.r8(pos++); - util::stream_format(stream, "r%02Xh,$%04X", op & 0x07, pc + pos + offset); + util::stream_format(stream, "r%02Xh,$%04X", op & 0x07, pos + offset); break; case AM_cjp: ea = opcodes.r8(pos++) << 8; @@ -431,7 +431,7 @@ offs_t sm8500_disassembler::disassemble(std::ostream &stream, offs_t pc, const d case AM_Rbr: ea = opcodes.r8(pos++); offset = (int8_t) opcodes.r8(pos++); - util::stream_format(stream, "R%02Xh,#%d,$%04X", ea, op & 0x07, pc + pos + offset); + util::stream_format(stream, "R%02Xh,#%d,$%04X", ea, op & 0x07, pos + offset); break; case AM_Rb: ea = opcodes.r8(pos++); @@ -490,7 +490,7 @@ offs_t sm8500_disassembler::disassemble(std::ostream &stream, offs_t pc, const d } util::stream_format(stream, ",#%d,", ea & 0x07); offset = (int8_t) opcodes.r8(pos++); - util::stream_format(stream, "$%04X", pc + pos + offset); + util::stream_format(stream, "$%04X", pos + offset); break; case AM_1A: ea = opcodes.r8(pos++); diff --git a/src/devices/cpu/sm8500/sm85ops.h b/src/devices/cpu/sm8500/sm85ops.h index 2e3d0cdcbfb..7b934837bd6 100644 --- a/src/devices/cpu/sm8500/sm85ops.h +++ b/src/devices/cpu/sm8500/sm85ops.h @@ -356,7 +356,7 @@ #define OP_INC16(X) d1 = X; \ res = d1 + 1; \ m_PS1 = m_PS1 & ( FLAG_C | FLAG_D | FLAG_H | FLAG_B | FLAG_I ); \ - m_PS1 = m_PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \ + m_PS1 = m_PS1 | ( ( ( res & 0xFFFF ) == 0 ) ? FLAG_Z : 0 ); \ m_PS1 = m_PS1 | ( ( res & 0x8000 ) ? FLAG_S : 0 ); \ m_PS1 = m_PS1 | ( ( ( ( d1 ^ res ) & 0x8000 ) && ! ( res & 0x8000 ) ) ? FLAG_V : 0 ); @@ -377,7 +377,7 @@ #define OP_AND8(X,Y) d1 = X; \ d2 = Y; \ res = d1 & d2; \ - m_PS1 = m_PS1 & ( FLAG_B | FLAG_I | FLAG_H | FLAG_D ); \ + m_PS1 = m_PS1 & ( FLAG_B | FLAG_C | FLAG_I | FLAG_H | FLAG_D ); \ m_PS1 = m_PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \ m_PS1 = m_PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 ); @@ -390,7 +390,7 @@ #define OP_OR8(X,Y) d1 = X; \ d2 = Y; \ res = d1 | d2; \ - m_PS1 = m_PS1 & ( FLAG_B | FLAG_I | FLAG_H | FLAG_D ); \ + m_PS1 = m_PS1 & ( FLAG_B | FLAG_C | FLAG_I | FLAG_H | FLAG_D ); \ m_PS1 = m_PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \ m_PS1 = m_PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 ); @@ -403,7 +403,7 @@ #define OP_XOR8(X,Y) d1 = X; \ d2 = Y; \ res = d1 ^ d2; \ - m_PS1 = m_PS1 & ( FLAG_B | FLAG_I | FLAG_H | FLAG_D ); \ + m_PS1 = m_PS1 & ( FLAG_B | FLAG_C | FLAG_I | FLAG_H | FLAG_D ); \ m_PS1 = m_PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \ m_PS1 = m_PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 ); @@ -501,7 +501,7 @@ case 0x00: /* CLR R - 4 cycles - Flags affected: -------- */ ARG_R; mem_writebyte( r1, 0 ); - mycycles += 4; + mycycles += 4; break; case 0x01: /* NEG R - 5 cycles - Flags affected: CZSV---- */ ARG_R; @@ -909,7 +909,7 @@ logerror( "%04X: unk%02x\n", m_PC-1,op ); case 0x2E: /* MOV PS0,#00 - 4 cycles - Flags affected: -------- */ ARG_R; m_PS0 = r1; - mycycles += 4; + mycycles += 4; break; case 0x2F: /* BTST R,i - 6 cycles - Flags affected: -Z-0---- */ ARG_RR; @@ -1144,7 +1144,7 @@ case 0x4A: /* MOVW RRr,RRs - 8 cycles - Flags affected: -------- */ case 0x4B: /* MOVW RRr,ww - 9 cycles - Flags affected: -------- */ ARG_Sw; mem_writeword( r1, s2 ); - mycycles += 9; + mycycles += 9; break; case 0x4C: /* MULT Rrr,Rs - 24 cycles - Flags affected: -Z-0---- */ // operation is not known if r1 is odd, assuming same as even for now @@ -1268,7 +1268,7 @@ case 0x57: /* XOR Rr,i - 6 cycles - Flags affected: -ZS0---- */ case 0x58: /* MOV Rr,i - 6 cycles - Flags affected: -------- */ ARG_iR; mem_writebyte( r1, r2 ); - mycycles += 6; + mycycles += 6; break; case 0x59: /* Invalid - 2? cycles - Flags affected: --------? */ logerror( "%04X: 59h: Invalid instruction\n", m_PC-1 ); @@ -1302,7 +1302,7 @@ case 0x5B: /* unk5B - 6,7,11,8,7 cycles */ case 0x5C: /* DIV RRr,RRs - 47 cycles - Flags affected: -Z-V---- */ /* lower 8 bits of RRs is used to divide */ /* remainder in stored upper 8 bits of RRs */ -logerror( "%04X: DIV RRr,Rs!\n", m_PC-1 ); +// logerror( "%04X: DIV RRr,Rs!\n", m_PC-1 ); ARG_RR; m_PS1 = m_PS1 & ~ ( FLAG_Z | FLAG_V ); s1 = mem_readbyte( r2 + 1 ); @@ -1318,7 +1318,7 @@ logerror( "%04X: DIV RRr,Rs!\n", m_PC-1 ); mycycles += 47; break; case 0x5D: /* DIV RRr,i - 44 cycles - Flags affected: -Z-V---- */ -logerror( "%04X: DIV RRr,i!\n", m_PC-1 ); +// logerror( "%04X: DIV RRr,i!\n", m_PC-1 ); ARG_iR; m_PS1 = m_PS1 & ~ ( FLAG_Z | FLAG_V ); if ( r2 ) { @@ -1578,7 +1578,7 @@ case 0xC6: case 0xC7: ARG_ri; mem_writebyte( r1, r2 ); - mycycles += 4; + mycycles += 4; break; case 0xC8: /* MOV IE0/IE1/IR0/IR1/P0/P1/P2/P3,i - 4 cycles - Flags affected: -------- */ case 0xC9: @@ -1687,11 +1687,11 @@ case 0xFC: /* SETC - 2 cycles - Flags affected: C------- */ break; case 0xFD: /* EI - 2 cycles - Flags affected: -------I */ m_PS1 = m_PS1 | FLAG_I; - mycycles += 2; + mycycles += 2; break; case 0xFE: /* DI - 2 cycles - Flags affected: -------I */ m_PS1 = m_PS1 & ~ ( FLAG_I ); - mycycles += 2; + mycycles += 2; break; case 0xFF: /* NOP - 2 cycles - Flags affected: -------- */ mycycles += 2; diff --git a/src/devices/cpu/sparc/mb86901.cpp b/src/devices/cpu/sparc/mb86901.cpp index ec7671333d7..2d40cb7ce97 100644 --- a/src/devices/cpu/sparc/mb86901.cpp +++ b/src/devices/cpu/sparc/mb86901.cpp @@ -8,6 +8,13 @@ // the integer instructions in a SPARC v7 // compatible instruction set. // +// Notes: +// - The CPU core implementation has been simplified +// somewhat compared to the spec. In particular, bus +// holding on read/write accesses is disabled, as there +// is currently no use made of it, and it is unlikely to +// ever be. +// // To-Do: // - Ops: FBFcc, LDF, STF // - Test: SPARCv8 ops are untested @@ -41,8 +48,9 @@ const int mb86901_device::NWINDOWS = 7; mb86901_device::mb86901_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : cpu_device(mconfig, MB86901, tag, owner, clock) - , m_program_config("program", ENDIANNESS_BIG, 32, 32) + , m_mmu(*this, finder_base::DUMMY_TAG) { + m_default_config = address_space_config("program", ENDIANNESS_BIG, 32, 32); } @@ -145,6 +153,29 @@ void mb86901_device::device_start() memset(m_privileged_asr, 1, 32 * sizeof(bool)); m_privileged_asr[0] = false; + memset(m_alu_setcc, 0, 64 * sizeof(bool)); + m_alu_setcc[OP3_ADDCC] = true; + m_alu_setcc[OP3_ANDCC] = true; + m_alu_setcc[OP3_ORCC] = true; + m_alu_setcc[OP3_XORCC] = true; + m_alu_setcc[OP3_SUBCC] = true; + m_alu_setcc[OP3_ANDNCC] = true; + m_alu_setcc[OP3_ORNCC] = true; + m_alu_setcc[OP3_XNORCC] = true; + m_alu_setcc[OP3_ADDXCC] = true; + m_alu_setcc[OP3_SUBXCC] = true; + m_alu_setcc[OP3_TADDCC] = true; + m_alu_setcc[OP3_TSUBCC] = true; + m_alu_setcc[OP3_TADDCCTV] = true; + m_alu_setcc[OP3_TSUBCCTV] = true; + m_alu_setcc[OP3_MULSCC] = true; +#if SPARCV8 + m_alu_setcc[OP3_UMULCC] = true; + m_alu_setcc[OP3_SMULCC] = true; + m_alu_setcc[OP3_UDIVCC] = true; + m_alu_setcc[OP3_SDIVCC] = true; +#endif + memset(m_alu_op3_assigned, 0, 64 * sizeof(bool)); m_alu_op3_assigned[OP3_ADD] = true; m_alu_op3_assigned[OP3_AND] = true; @@ -184,9 +215,12 @@ void mb86901_device::device_start() m_alu_op3_assigned[OP3_WRTBR] = true; m_alu_op3_assigned[OP3_FPOP1] = true; m_alu_op3_assigned[OP3_FPOP2] = true; + m_alu_op3_assigned[OP3_CPOP1] = true; + m_alu_op3_assigned[OP3_CPOP2] = true; m_alu_op3_assigned[OP3_JMPL] = true; m_alu_op3_assigned[OP3_RETT] = true; m_alu_op3_assigned[OP3_TICC] = true; + m_alu_op3_assigned[OP3_IFLUSH] = true; m_alu_op3_assigned[OP3_SAVE] = true; m_alu_op3_assigned[OP3_RESTORE] = true; #if SPARCV8 @@ -198,10 +232,7 @@ void mb86901_device::device_start() m_alu_op3_assigned[OP3_SMULCC] = true; m_alu_op3_assigned[OP3_UDIVCC] = true; m_alu_op3_assigned[OP3_SDIVCC] = true; - m_alu_op3_assigned[OP3_CPOP1] = true; - m_alu_op3_assigned[OP3_CPOP2] = true; #endif - m_program = &space(AS_PROGRAM); memset(m_ldst_op3_assigned, 0, 64 * sizeof(bool)); m_ldst_op3_assigned[OP3_LD] = true; @@ -255,7 +286,7 @@ void mb86901_device::device_start() state_add(SPARC_WIM, "WIM", m_wim).formatstr("%08X"); state_add(SPARC_TBR, "TBR", m_tbr).formatstr("%08X"); state_add(SPARC_Y, "Y", m_y).formatstr("%08X"); - state_add(SPARC_ANNUL, "ANNUL", m_annul).formatstr("%01u"); + state_add(SPARC_ANNUL, "ANNUL", m_no_annul).formatstr("%01u"); state_add(SPARC_ICC, "icc", m_icc).formatstr("%4s"); state_add(SPARC_CWP, "CWP", m_cwp).formatstr("%2d"); char regname[3] = "g0"; @@ -312,8 +343,10 @@ void mb86901_device::device_start() save_item(NAME(m_bp_irl)); save_item(NAME(m_bp_fpu_present)); save_item(NAME(m_bp_cp_present)); + save_item(NAME(m_pb_error)); save_item(NAME(m_pb_block_ldst_byte)); save_item(NAME(m_pb_block_ldst_word)); + save_item(NAME(m_irq_state)); save_item(NAME(m_trap)); save_item(NAME(m_tt)); save_item(NAME(m_ticc_trap_type)); @@ -353,10 +386,27 @@ void mb86901_device::device_start() save_item(NAME(m_ps)); save_item(NAME(m_et)); save_item(NAME(m_cwp)); - save_item(NAME(m_asi)); + save_item(NAME(m_alu_op3_assigned)); + save_item(NAME(m_ldst_op3_assigned)); + save_item(NAME(m_alu_setcc)); + save_item(NAME(m_privileged_asr)); + save_item(NAME(m_illegal_instruction_asr)); save_item(NAME(m_mae)); - save_item(NAME(m_annul)); + save_item(NAME(m_no_annul)); save_item(NAME(m_hold_bus)); + save_item(NAME(m_icount)); + save_item(NAME(m_stashed_icount)); + save_item(NAME(m_insn_space)); + save_item(NAME(m_data_space)); + +#if LOG_FCODES + save_item(NAME(m_ss1_next_pc)); + save_item(NAME(m_ss1_next_opcode)); + save_item(NAME(m_ss1_next_handler_base)); + save_item(NAME(m_ss1_next_entry_point)); + save_item(NAME(m_ss1_next_stack)); + save_item(NAME(m_log_fcodes)); +#endif // set our instruction counter set_icountptr(m_icount); @@ -367,6 +417,10 @@ void mb86901_device::device_stop() { } +void mb86901_device::device_resolve_objects() +{ + m_mmu->set_host(this); +} void mb86901_device::device_reset() { @@ -393,10 +447,11 @@ void mb86901_device::device_reset() m_bp_irl = 0; m_irq_state = 0; - m_asi = 0; + m_stashed_icount = -1; + MAE = false; HOLD_BUS = false; - m_annul = false; + m_no_annul = true; PC = 0; nPC = 4; @@ -408,6 +463,8 @@ void mb86901_device::device_reset() Y = 0; PSR = PSR_S_MASK | PSR_PS_MASK; + m_s = true; + m_data_space = 11; for (int i = 0; i < 8; i++) { @@ -426,6 +483,17 @@ void mb86901_device::device_reset() //------------------------------------------------- +// device_post_load - update register pointers +// after loading a savestate +//------------------------------------------------- + +void mb86901_device::device_post_load() +{ + update_gpr_pointers(); +} + + +//------------------------------------------------- // memory_space_config - return the configuration // of the specified address space, or nullptr if // the space doesn't exist @@ -433,9 +501,9 @@ void mb86901_device::device_reset() device_memory_interface::space_config_vector mb86901_device::memory_space_config() const { - return space_config_vector { - std::make_pair(AS_PROGRAM, &m_program_config) - }; + space_config_vector config_vector; + config_vector.push_back(std::make_pair(AS_PROGRAM, &m_default_config)); + return config_vector; } @@ -446,21 +514,10 @@ device_memory_interface::space_config_vector mb86901_device::memory_space_config // a 32-bit word in a big-endian system. //------------------------------------------------- -uint32_t mb86901_device::read_sized_word(uint8_t asi, uint32_t address, int size) +uint32_t mb86901_device::read_sized_word(const uint8_t asi, const uint32_t address, const uint32_t mem_mask) { - m_asi = asi; - if (size == 1) - { - return m_program->read_byte(address) << ((3 - (address & 3)) * 8); - } - else if (size == 2) - { - return m_program->read_word(address) << ((2 - (address & 2)) * 8); - } - else - { - return m_program->read_dword(address); - } + assert(asi < 0x20); // We do not currently support ASIs outside the range used by actual Sun machines. + return m_mmu->read_asi(asi, address >> 2, mem_mask); } @@ -473,21 +530,10 @@ uint32_t mb86901_device::read_sized_word(uint8_t asi, uint32_t address, int size // size handlers //------------------------------------------------- -void mb86901_device::write_sized_word(uint8_t asi, uint32_t address, uint32_t data, int size) +void mb86901_device::write_sized_word(const uint8_t asi, const uint32_t address, const uint32_t data, const uint32_t mem_mask) { - m_asi = asi; - if (size == 1) - { - m_program->write_byte(address, data >> ((3 - (address & 3)) * 8)); - } - else if (size == 2) - { - m_program->write_word(address, data >> ((2 - (address & 2)) * 8)); - } - else - { - m_program->write_dword(address, data); - } + assert(asi < 0x20); // We do not currently support ASIs outside the range used by actual Sun machines. + m_mmu->write_asi(asi, address >> 2, data, mem_mask); } @@ -501,6 +547,30 @@ void mb86901_device::state_string_export(const device_state_entry &entry, std::s switch (entry.index()) { case STATE_GENFLAGS: + case SPARC_ANNUL: + str = string_format("%01u", m_no_annul ? 0 : 1); + break; + case SPARC_CWP: + str = string_format("%2u", PSR & PSR_CWP_MASK); + break; + case SPARC_EC: + str = string_format("%01u", PSR & PSR_EC_MASK ? 1 : 0); + break; + case SPARC_EF: + str = string_format("%01u", PSR & PSR_EF_MASK ? 1 : 0); + break; + case SPARC_ET: + str = string_format("%01u", PSR & PSR_ET_MASK ? 1 : 0); + break; + case SPARC_PS: + str = string_format("%01u", PSR & PSR_PS_MASK ? 1 : 0); + break; + case SPARC_S: + str = string_format("%01u", PSR & PSR_S_MASK ? 1 : 0); + break; + case SPARC_PIL: + str = string_format("%02u", (PSR & PSR_PIL_MASK) >> PSR_PIL_SHIFT); + break; case SPARC_ICC: str = string_format("%c%c%c%c", ICC_N_SET ? 'n' : ' ', ICC_Z_SET ? 'z' : ' ', ICC_V_SET ? 'v' : ' ', ICC_C_SET ? 'c' : ' '); break; @@ -662,7 +732,7 @@ void mb86901_device::execute_add(uint32_t op) else if (ADDX || ADDXCC) result = rs1 + operand2 + ICC_C; - if (RD != 0) + if (RDBITS) RDREG = result; if (ADDCC || ADDXCC) @@ -675,6 +745,9 @@ void mb86901_device::execute_add(uint32_t op) PSR |= ((BIT31(rs1) && BIT31(operand2)) || (!BIT31(result) && (BIT31(rs1) || BIT31(operand2)))) ? PSR_C_MASK : 0; } + + PC = nPC; + nPC = nPC + 4; } @@ -723,19 +796,23 @@ void mb86901_device::execute_taddcc(uint32_t op) { m_trap = 1; m_tag_overflow = true; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - else - { - CLEAR_ICC; - PSR |= (BIT31(result)) ? PSR_N_MASK : 0; - PSR |= (result == 0) ? PSR_Z_MASK : 0; - PSR |= temp_v ? PSR_V_MASK : 0; - PSR |= ((BIT31(rs1) && BIT31(operand2)) || - (!BIT31(result) && (BIT31(rs1) || BIT31(operand2)))) ? PSR_C_MASK : 0; - if (RD != 0) - RDREG = result; - } + CLEAR_ICC; + PSR |= (BIT31(result)) ? PSR_N_MASK : 0; + PSR |= (result == 0) ? PSR_Z_MASK : 0; + PSR |= temp_v ? PSR_V_MASK : 0; + PSR |= ((BIT31(rs1) && BIT31(operand2)) || + (!BIT31(result) && (BIT31(rs1) || BIT31(operand2)))) ? PSR_C_MASK : 0; + + if (RDBITS) + RDREG = result; + + PC = nPC; + nPC = nPC + 4; } @@ -777,7 +854,7 @@ void mb86901_device::execute_sub(uint32_t op) else if (SUBX || SUBXCC) result = rs1 - operand2 - ICC_C; - if (RD != 0) + if (RDBITS) RDREG = result; if (SUBCC || SUBXCC) @@ -790,6 +867,9 @@ void mb86901_device::execute_sub(uint32_t op) PSR |= ((!BIT31(rs1) && BIT31(operand2)) || (BIT31(result) && (!BIT31(rs1) || BIT31(operand2)))) ? PSR_C_MASK : 0; } + + PC = nPC; + nPC = nPC + 4; } @@ -839,93 +919,155 @@ void mb86901_device::execute_tsubcc(uint32_t op) { m_trap = 1; m_tag_overflow = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - else - { - CLEAR_ICC; - PSR |= (BIT31(result)) ? PSR_N_MASK : 0; - PSR |= (result == 0) ? PSR_Z_MASK : 0; - PSR |= temp_v ? PSR_V_MASK : 0; - PSR |= ((!BIT31(rs1) && BIT31(operand2)) || - (BIT31(result) && (!BIT31(rs1) || BIT31(operand2)))) ? PSR_C_MASK : 0; - if (RD != 0) - RDREG = result; - } + CLEAR_ICC; + PSR |= (BIT31(result)) ? PSR_N_MASK : 0; + PSR |= (result == 0) ? PSR_Z_MASK : 0; + PSR |= temp_v ? PSR_V_MASK : 0; + PSR |= ((!BIT31(rs1) && BIT31(operand2)) || + (BIT31(result) && (!BIT31(rs1) || BIT31(operand2)))) ? PSR_C_MASK : 0; + + if (RDBITS) + RDREG = result; + + PC = nPC; + nPC = nPC + 4; } -//------------------------------------------------- -// execute_logical - execute a logical-type -// opcode, and/or/xor/andn/orn/xnor -//------------------------------------------------- +/* The SPARC Instruction Manual: Version 8, page 172, "Appendix C - ISP Descriptions - Logical Instructions" (SPARCv8.pdf, pg. 169) + +operand2 := if (i = 0) then r[rs2] else sign_extend(simm13); -void mb86901_device::execute_logical(uint32_t op) +if ( AND or ANDcc) then result <- r[rs1] and operand2 +if (ANDN or ANDNcc) then result <- r[rs1] and not operand2 +if ( OR or ORcc) then result <- r[rs1] or operand2 +if ( ORN or ORNcc) then result <- r[rs1] or not operand2 +if ( XOR or XORcc) then result <- r[rs1] xor operand2 +if (XNOR or XNORcc) then result <- r[rs1] xor not operand2; +next; + +if (rd != 0) then r[rd] <- result; + +if (ANDcccc or ANDNcc or ORcc or ORNcc or XORcc or XNORcc) then ( + N <- result<31>; + Z <- if (result = 0) then 1 else 0; + V <- 0 + C <- 0 +); +*/ + +template <mb86901_device::set_cc SETCC> +void mb86901_device::execute_and(const uint32_t op) { - /* The SPARC Instruction Manual: Version 8, page 172, "Appendix C - ISP Descriptions - Logical Instructions" (SPARCv8.pdf, pg. 169) + const uint32_t result = RS1REG & (USEIMM ? SIMM13 : RS2REG); + if (RDBITS) RDREG = result; + if (SETCC) + { + CLEAR_ICC; + if (result & 0x80000000) + PSR |= PSR_N_MASK; + else if (!result) + PSR |= PSR_Z_MASK; + } - operand2 := if (i = 0) then r[rs2] else sign_extend(simm13); + PC = nPC; + nPC = nPC + 4; +} - if ( AND or ANDcc) then result <- r[rs1] and operand2 - if (ANDN or ANDNcc) then result <- r[rs1] and not operand2 - if ( OR or ORcc) then result <- r[rs1] or operand2 - if ( ORN or ORNcc) then result <- r[rs1] or not operand2 - if ( XOR or XORcc) then result <- r[rs1] xor operand2 - if (XNOR or XNORcc) then result <- r[rs1] xor not operand2; - next; +template <mb86901_device::set_cc SETCC> +void mb86901_device::execute_or(const uint32_t op) +{ + const uint32_t result = RS1REG | (USEIMM ? SIMM13 : RS2REG); + if (RDBITS) RDREG = result; + if (SETCC) + { + CLEAR_ICC; + if (result & 0x80000000) + PSR |= PSR_N_MASK; + else if (!result) + PSR |= PSR_Z_MASK; + } - if (rd != 0) then r[rd] <- result; + PC = nPC; + nPC = nPC + 4; +} - if (ANDcccc or ANDNcc or ORcc or ORNcc or XORcc or XNORcc) then ( - N <- result<31>; - Z <- if (result = 0) then 1 else 0; - V <- 0 - C <- 0 - ); - */ +template <mb86901_device::set_cc SETCC> +void mb86901_device::execute_xor(const uint32_t op) +{ + const uint32_t result = RS1REG ^ (USEIMM ? SIMM13 : RS2REG); + if (RDBITS) RDREG = result; + if (SETCC) + { + CLEAR_ICC; + if (result & 0x80000000) + PSR |= PSR_N_MASK; + else if (!result) + PSR |= PSR_Z_MASK; + } - uint32_t operand2 = USEIMM ? SIMM13 : RS2REG; + PC = nPC; + nPC = nPC + 4; +} - uint32_t result = 0; - switch (OP3) +template <mb86901_device::set_cc SETCC> +void mb86901_device::execute_andn(const uint32_t op) +{ + const uint32_t result = RS1REG & ~(USEIMM ? SIMM13 : RS2REG); + if (RDBITS) RDREG = result; + if (SETCC) { - case OP3_AND: - case OP3_ANDCC: - result = RS1REG & operand2; - break; - case OP3_ANDN: - case OP3_ANDNCC: - result = RS1REG & ~operand2; - break; - case OP3_OR: - case OP3_ORCC: - result = RS1REG | operand2; - break; - case OP3_ORN: - case OP3_ORNCC: - result = RS1REG | ~operand2; - break; - case OP3_XOR: - case OP3_XORCC: - result = RS1REG ^ operand2; - break; - case OP3_XNOR: - case OP3_XNORCC: - result = RS1REG ^ ~operand2; - break; + CLEAR_ICC; + if (result & 0x80000000) + PSR |= PSR_N_MASK; + else if (!result) + PSR |= PSR_Z_MASK; } - if (RD != 0) - RDREG = result; + PC = nPC; + nPC = nPC + 4; +} - if (ANDCC || ANDNCC || ORCC || ORNCC || XORCC || XNORCC) +template <mb86901_device::set_cc SETCC> +void mb86901_device::execute_orn(const uint32_t op) +{ + const uint32_t result = RS1REG | ~(USEIMM ? SIMM13 : RS2REG); + if (RDBITS) RDREG = result; + if (SETCC) { CLEAR_ICC; - PSR |= (BIT31(result)) ? PSR_N_MASK : 0; - PSR |= (result == 0) ? PSR_Z_MASK : 0; + if (result & 0x80000000) + PSR |= PSR_N_MASK; + else if (!result) + PSR |= PSR_Z_MASK; } + + PC = nPC; + nPC = nPC + 4; } +template <mb86901_device::set_cc SETCC> +void mb86901_device::execute_xnor(const uint32_t op) +{ + const uint32_t result = RS1REG ^ ~(USEIMM ? SIMM13 : RS2REG); + if (RDBITS) RDREG = result; + if (SETCC) + { + CLEAR_ICC; + if (result & 0x80000000) + PSR |= PSR_N_MASK; + else if (!result) + PSR |= PSR_Z_MASK; + } + + PC = nPC; + nPC = nPC + 4; +} //------------------------------------------------- // execute_shift - execute a shift-type opcode, @@ -947,12 +1089,18 @@ void mb86901_device::execute_shift(uint32_t op) */ uint32_t shift_count = USEIMM ? (SIMM13 & 31) : (RS2REG & 31); - if (SLL && RD != 0) - RDREG = RS1REG << shift_count; - else if (SRL && RD != 0) - RDREG = uint32_t(RS1REG) >> shift_count; - else if (SRA && RD != 0) - RDREG = int32_t(RS1REG) >> shift_count; + if (RDBITS) + { + if (SLL) + RDREG = RS1REG << shift_count; + else if (SRL) + RDREG = uint32_t(RS1REG) >> shift_count; + else if (SRA) + RDREG = int32_t(RS1REG) >> shift_count; + } + + PC = nPC; + nPC = nPC + 4; } @@ -992,7 +1140,7 @@ void mb86901_device::execute_mulscc(uint32_t op) uint32_t result = operand1 + operand2; Y = ((RS1REG & 1) ? 0x80000000 : 0) | (Y >> 1); - if (RD != 0) + if (RDBITS) RDREG = result; CLEAR_ICC; @@ -1002,6 +1150,9 @@ void mb86901_device::execute_mulscc(uint32_t op) (!BIT31(operand1) && !BIT31(operand2) && BIT31(result))) ? PSR_V_MASK : 0; PSR |= ((BIT31(operand1) && BIT31(operand2)) || (!BIT31(result) && (BIT31(operand1) || BIT31(operand2)))) ? PSR_C_MASK : 0; + + PC = nPC; + nPC = nPC + 4; } @@ -1034,13 +1185,20 @@ void mb86901_device::execute_rdsr(uint32_t op) { m_trap = 1; m_privileged_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } else if (m_illegal_instruction_asr[RS1]) { m_trap = 1; m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - else if (RD != 0) + + if (RDBITS) { if (RDASR) { @@ -1058,6 +1216,9 @@ void mb86901_device::execute_rdsr(uint32_t op) else if (RDTBR) RDREG = TBR; } + + PC = nPC; + nPC = nPC + 4; } @@ -1118,6 +1279,8 @@ void mb86901_device::execute_wrsr(uint32_t op) if (WRASR && RD == 0) { Y = result; + PC = nPC; + nPC = nPC + 4; } else if (WRASR) { @@ -1125,15 +1288,23 @@ void mb86901_device::execute_wrsr(uint32_t op) { m_trap = 1; m_privileged_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } else if (m_illegal_instruction_asr[RD]) { m_trap = 1; m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } else { // SPARCv8 + PC = nPC; + nPC = nPC + 4; } } else if (WRPSR) @@ -1142,17 +1313,36 @@ void mb86901_device::execute_wrsr(uint32_t op) { m_trap = 1; m_privileged_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } else if ((result & 31) >= NWINDOWS) { m_trap = 1; m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + PSR = result &~ PSR_ZERO_MASK; + update_gpr_pointers(); + + m_et = PSR & PSR_ET_MASK; + m_pil = (PSR & PSR_PIL_MASK) >> PSR_PIL_SHIFT; + m_s = PSR & PSR_S_MASK; + if (m_s) + { + m_data_space = 11; } else { - PSR = result &~ PSR_ZERO_MASK; - update_gpr_pointers(); + m_data_space = 10; } + + PC = nPC; + nPC = nPC + 4; } else if (WRWIM) { @@ -1160,11 +1350,14 @@ void mb86901_device::execute_wrsr(uint32_t op) { m_trap = 1; m_privileged_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - else - { - WIM = result & 0x7f; - } + + WIM = result & 0x7f; + PC = nPC; + nPC = nPC + 4; } else if (WRTBR) { @@ -1172,11 +1365,14 @@ void mb86901_device::execute_wrsr(uint32_t op) { m_trap = 1; m_privileged_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - else - { - TBR = result & 0xfffff000; - } + + TBR = result & 0xfffff000; + PC = nPC; + nPC = nPC + 4; } } @@ -1226,7 +1422,7 @@ void mb86901_device::execute_rett(uint32_t op) uint8_t new_cwp = ((PSR & PSR_CWP_MASK) + 1) % NWINDOWS; uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG); - if (PSR & PSR_ET_MASK) + if (m_et) { m_trap = 1; if (IS_USER) @@ -1237,6 +1433,9 @@ void mb86901_device::execute_rett(uint32_t op) { m_illegal_instruction = 1; } + m_stashed_icount = m_icount; + m_icount = 0; + return; } else if (IS_USER) { @@ -1245,6 +1444,9 @@ void mb86901_device::execute_rett(uint32_t op) m_tt = 3; m_execute_mode = 0; m_error_mode = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } else if ((WIM & (1 << new_cwp)) != 0) { @@ -1253,6 +1455,9 @@ void mb86901_device::execute_rett(uint32_t op) m_tt = 6; m_execute_mode = 0; m_error_mode = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } else if (address & 3) { @@ -1261,20 +1466,30 @@ void mb86901_device::execute_rett(uint32_t op) m_tt = 7; m_execute_mode = 0; m_error_mode = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - else - { - PSR |= PSR_ET_MASK; - PC = nPC; - nPC = address; - PSR &= ~PSR_CWP_MASK; - PSR |= new_cwp; + PSR |= PSR_ET_MASK; + m_et = true; + PC = nPC; + nPC = address; - if (PSR & PSR_PS_MASK) - PSR |= PSR_S_MASK; - else - PSR &= ~PSR_S_MASK; + PSR &= ~PSR_CWP_MASK; + PSR |= new_cwp; + + if (PSR & PSR_PS_MASK) + { + PSR |= PSR_S_MASK; + m_s = true; + m_data_space = 11; + } + else + { + PSR &= ~PSR_S_MASK; + m_s = false; + m_data_space = 10; } update_gpr_pointers(); @@ -1330,14 +1545,14 @@ void mb86901_device::execute_saverestore(uint32_t op) { m_trap = 1; m_window_overflow = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - else - { - result = rs1 + operand2; - PSR &= ~PSR_CWP_MASK; - PSR |= new_cwp; - BREAK_PSR; - } + + result = rs1 + operand2; + PSR &= ~PSR_CWP_MASK; + PSR |= new_cwp; } else if (RESTORE) { @@ -1346,20 +1561,23 @@ void mb86901_device::execute_saverestore(uint32_t op) { m_trap = 1; m_window_underflow = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - else - { - result = rs1 + operand2; - PSR &= ~PSR_CWP_MASK; - PSR |= new_cwp; - BREAK_PSR; - } + + result = rs1 + operand2; + PSR &= ~PSR_CWP_MASK; + PSR |= new_cwp; } update_gpr_pointers(); - if (m_trap == 0 && RD != 0) + if (RDBITS) RDREG = result; + + PC = nPC; + nPC = nPC + 4; } @@ -1389,10 +1607,12 @@ void mb86901_device::execute_jmpl(uint32_t op) { m_trap = 1; m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; } else { - if (RD != 0) + if (RDBITS) RDREG = PC; PC = nPC; nPC = jump_address; @@ -1405,7 +1625,7 @@ void mb86901_device::execute_jmpl(uint32_t op) // mostly ALU ops //------------------------------------------------- -void mb86901_device::execute_group2(uint32_t op) +inline void mb86901_device::execute_group2(uint32_t op) { switch (OP3) { @@ -1434,18 +1654,40 @@ void mb86901_device::execute_group2(uint32_t op) break; case OP3_AND: + execute_and<NOCC>(op); + break; case OP3_OR: + execute_or<NOCC>(op); + break; case OP3_XOR: + execute_xor<NOCC>(op); + break; case OP3_ANDN: + execute_andn<NOCC>(op); + break; case OP3_ORN: + execute_orn<NOCC>(op); + break; case OP3_XNOR: + execute_xnor<NOCC>(op); + break; case OP3_ANDCC: + execute_and<USECC>(op); + break; case OP3_ORCC: + execute_or<USECC>(op); + break; case OP3_XORCC: + execute_xor<USECC>(op); + break; case OP3_ANDNCC: + execute_andn<USECC>(op); + break; case OP3_ORNCC: + execute_orn<USECC>(op); + break; case OP3_XNORCC: - execute_logical(op); + execute_xnor<USECC>(op); break; case OP3_MULSCC: @@ -1474,8 +1716,16 @@ void mb86901_device::execute_group2(uint32_t op) case OP3_FPOP1: case OP3_FPOP2: - // Not yet implemented - break; + if (!(PSR & PSR_EF_MASK) || !m_bp_fpu_present) + { + //printf("fpop @ %08x: %08x\n", PC, op); + m_trap = 1; + m_fp_disabled = 1; + m_stashed_icount = m_icount; + m_icount = 0; + } + complete_fp_execution(op); + return; case OP3_JMPL: execute_jmpl(op); @@ -1489,6 +1739,12 @@ void mb86901_device::execute_group2(uint32_t op) execute_ticc(op); break; + case OP3_IFLUSH: + // Ignored + PC = nPC; + nPC = nPC + 4; + break; + case OP3_SAVE: case OP3_RESTORE: execute_saverestore(op); @@ -1511,15 +1767,21 @@ void mb86901_device::execute_group2(uint32_t op) case OP3_CPOP1: case OP3_CPOP2: - break; + logerror("fpop @ %08x: %08x\n", PC, op); + m_trap = 1; + m_cp_disabled = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; #endif default: - { + logerror("illegal instruction at %08x: %08x\n", PC, op); m_trap = 1; m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; break; - } } } @@ -1671,188 +1933,210 @@ void mb86901_device::execute_store(uint32_t op) { m_trap = 1; m_privileged_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } else if (USEIMM && (STDA || STA || STHA || STBA)) { m_trap = 1; m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } uint32_t address = 0; uint8_t addr_space = 0; - if (!m_trap) + if (STD || ST || STH || STB || STF || STDF || STFSR || STDFQ || STCSR || STC || STDC || STDCQ) { - if (STD || ST || STH || STB || STF || STDF || STFSR || STDFQ || STCSR || STC || STDC || STDCQ) - { - address = RS1REG + (USEIMM ? SIMM13 : RS2REG); - addr_space = (IS_USER ? 10 : 11); - } - else if (STDA || STA || STHA || STBA) - { - address = RS1REG + RS2REG; - addr_space = ASI; - } - if ((STF || STDF || STFSR || STDFQ) && (!(PSR & PSR_EF_MASK) || !m_bp_fpu_present)) - { - m_trap = 1; - m_fp_disabled = 1; - } - if ((STC || STDC || STCSR || STDCQ) && (!(PSR & PSR_EC_MASK) || !m_bp_cp_present)) - { - m_trap = 1; - m_cp_disabled = 1; - } + address = RS1REG + (USEIMM ? SIMM13 : RS2REG); + addr_space = m_data_space; + } + else if (STDA || STA || STHA || STBA) + { + address = RS1REG + RS2REG; + addr_space = ASI; + } + if ((STF || STDF || STFSR || STDFQ) && (!(PSR & PSR_EF_MASK) || !m_bp_fpu_present)) + { + m_trap = 1; + m_fp_disabled = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + if ((STC || STDC || STCSR || STDCQ) && (!(PSR & PSR_EC_MASK) || !m_bp_cp_present)) + { + m_trap = 1; + m_cp_disabled = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - if (!m_trap) + if ((STH || STHA) && ((address & 1) != 0)) { - if ((STH || STHA) && ((address & 1) != 0)) - { - m_trap = 1; - m_mem_address_not_aligned = 1; - } - else if ((ST || STA || STF || STFSR || STC || STCSR) && ((address & 3) != 0)) - { - m_trap = 1; - m_mem_address_not_aligned = 1; - } - else if ((STD || STDA || STDF || STDFQ || STDC || STDCQ) && ((address & 7) != 0)) - { - m_trap = 1; - m_mem_address_not_aligned = 1; - } - else - { - if (STDFQ) - { - // assume no floating-point queue for now - m_trap = 1; - m_fp_exception = 1; - m_ftt = m_fpu_sequence_err; - } - if (STDCQ) - { - // assume no coprocessor queue for now - m_trap = 1; - m_cp_exception = 1; - // { possibly additional implementation-dependent actions } - } - if (STDF && ((RD & 1) != 0)) - { - m_trap = 1; - m_fp_exception = 1; - m_ftt = 0xff; - } - } + m_trap = 1; + m_stashed_icount = m_icount; + m_icount = 0; + m_mem_address_not_aligned = 1; + return; + } + else if ((ST || STA || STF || STFSR || STC || STCSR) && ((address & 3) != 0)) + { + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + else if ((STD || STDA || STDF || STDFQ || STDC || STDCQ) && ((address & 7) != 0)) + { + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (STDFQ) + { + // assume no floating-point queue for now + m_trap = 1; + m_fp_exception = 1; + m_ftt = m_fpu_sequence_err; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + if (STDCQ) + { + // assume no coprocessor queue for now + m_trap = 1; + m_cp_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + // { possibly additional implementation-dependent actions } + return; + } + if (STDF && ((RD & 1) != 0)) + { + m_trap = 1; + m_fp_exception = 1; + m_ftt = 0xff; + m_stashed_icount = m_icount; + m_icount = 0; + return; } uint32_t data0 = 0; - if (!m_trap) + //uint8_t byte_mask; + if (STF) { - //uint8_t byte_mask; - if (STF) - { - //byte_mask = 15; - data0 = FREG(RD); - } - else if (STC) - { - //byte_mask = 15; - data0 = 0; - } - else if (STDF) - { - //byte_mask = 15; - data0 = FREG(RD & 0x1e); - } - else if (STDC) - { - //byte_mask = 15; - data0 = 0; - } - else if (STD || STDA) + //byte_mask = 15; + data0 = FREG(RD); + } + else if (STC) + { + //byte_mask = 15; + data0 = 0; + } + else if (STDF) + { + //byte_mask = 15; + data0 = FREG(RD & 0x1e); + } + else if (STDC) + { + //byte_mask = 15; + data0 = 0; + } + else if (STD || STDA) + { + //byte_mask = 15; + data0 = REG(RD & 0x1e); + } + else if (STDFQ) + { + //byte_mask = 15; + data0 = 0; + } + else if (STDCQ) + { + //byte_mask = 15; + data0 = 0; + } + else if (STFSR) + { + // while ((FSR.qne = 1) and (trap = 0)) ( + // wait for pending floating-point instructions to complete + // ) + // next; + //byte_mask = 15; + data0 = FSR; + } + else if (STCSR) + { + // { implementation-dependent actions } + //byte_mask = 15; + data0 = 0; + } + else if (ST || STA) + { + //byte_mask = 15; + data0 = REG(RD); + } + else if (STH || STHA) + { + if ((address & 3) == 0) { - //byte_mask = 15; - data0 = REG(RD & 0x1e); + //byte_mask = 12; + data0 = REG(RD) << 16; } - else if (STDFQ) + else if ((address & 3) == 2) { - //byte_mask = 15; - data0 = 0; + //byte_mask = 3; + data0 = REG(RD); } - else if (STDCQ) + } + else if (STB || STBA) + { + if ((address & 3) == 0) { - //byte_mask = 15; - data0 = 0; + //byte_mask = 8; + data0 = REG(RD) << 24; } - else if (STFSR) + else if ((address & 3) == 1) { - // while ((FSR.qne = 1) and (trap = 0)) ( - // wait for pending floating-point instructions to complete - // ) - // next; - //byte_mask = 15; - data0 = FSR; + //byte_mask = 4; + data0 = REG(RD) << 16; } - else if (STCSR) + else if ((address & 3) == 2) { - // { implementation-dependent actions } - //byte_mask = 15; - data0 = 0; + //byte_mask = 2; + data0 = REG(RD) << 8; } - else if (ST || STA) + else if ((address & 3) == 3) { - //byte_mask = 15; + //byte_mask = 1; data0 = REG(RD); } - else if (STH || STHA) - { - if ((address & 3) == 0) - { - //byte_mask = 12; - data0 = REG(RD) << 16; - } - else if ((address & 3) == 2) - { - //byte_mask = 3; - data0 = REG(RD); - } - } - else if (STB || STBA) - { - if ((address & 3) == 0) - { - //byte_mask = 8; - data0 = REG(RD) << 24; - } - else if ((address & 3) == 1) - { - //byte_mask = 4; - data0 = REG(RD) << 16; - } - else if ((address & 3) == 2) - { - //byte_mask = 2; - data0 = REG(RD) << 8; - } - else if ((address & 3) == 3) - { - //byte_mask = 1; - data0 = REG(RD); - } - } } - if (!m_trap) + static const uint32_t mask16[4] = { 0xffff0000, 0x00000000, 0x0000ffff, 0x00000000 }; + static const uint32_t mask8[4] = { 0xff000000, 0x00ff0000, 0x0000ff00, 0x000000ff }; + m_mmu->write_asi(addr_space, address >> 2, data0, (ST || STA || STD || STDA || STF || STDF || STDFQ || STFSR || STC || STDC || STDCQ || STCSR) ? 0xffffffff : ((STH || STHA) ? mask16[address & 2] : mask8[address & 3])); + if (MAE) { - write_sized_word(addr_space, address, data0, (ST || STA || STD || STDA || STF || STDF || STDFQ || STFSR || STC || STDC || STDCQ || STCSR) ? 4 : ((STH || STHA) ? 2 : 1)); - if (MAE) - { - m_trap = 1; - m_data_access_exception = 1; - } + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - if (!m_trap && (STD || STDA || STDF || STDC || STDFQ || STDCQ)) + + if (STD || STDA || STDF || STDC || STDFQ || STDCQ) { uint32_t data1 = 0; if (STD || STDA) @@ -1876,257 +2160,944 @@ void mb86901_device::execute_store(uint32_t op) data1 = 0; } - write_sized_word(addr_space, address + 4, data1, 4); + m_mmu->write_asi(addr_space, (address + 4) >> 2, data1, 0xffffffff); if (MAE) { m_trap = 1; m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } } -} -//------------------------------------------------- -// execute_load - execute a load-type opcode -//------------------------------------------------- + PC = nPC; + nPC = nPC + 4; +} -void mb86901_device::execute_load(uint32_t op) -{ - /* The SPARC Instruction Manual: Version 8, page 163, "Appendix C - ISP Descriptions - C.9. Instruction Defintions - Load Instructions" (SPARCv8.pdf, pg. 160) +/* The SPARC Instruction Manual: Version 8, page 163, "Appendix C - ISP Descriptions - C.9. Instruction Defintions - Load Instructions" (SPARCv8.pdf, pg. 160) - if (LDD or LD or LDSH or LDUH or LDSB or LDUB or LDDF or LDF or LDFSR or LDDC or LDC or LDCSR) then ( - address <- r[rs1] + (if (i = 0) then r[rs2] else sign_extend(simm13)); - addr_space <- (if (S = 0) then 10 else 11) - ) else if (LDDA or LDA or LDSHA or LDUHA or LDSBA or LDUBA) then ( - if (S = 0) then ( - trap <- 1; - privileged_instruction <- 1 - ) else if (i = 1) then ( - trap <- 1; - illegal_instruction <- 1 - ) else ( - address <- r[rs1] + r[rs2]; - addr_space <- asi - ) +if (LDD or LD or LDSH or LDUH or LDSB or LDUB or LDDF or LDF or LDFSR or LDDC or LDC or LDCSR) then ( + address <- r[rs1] + (if (i = 0) then r[rs2] else sign_extend(simm13)); + addr_space <- (if (S = 0) then 10 else 11) +) else if (LDDA or LDA or LDSHA or LDUHA or LDSBA or LDUBA) then ( + if (S = 0) then ( + trap <- 1; + privileged_instruction <- 1 + ) else if (i = 1) then ( + trap <- 1; + illegal_instruction <- 1 + ) else ( + address <- r[rs1] + r[rs2]; + addr_space <- asi ) +) +next; +if (trap = 0) then ( + if ( (LDF or LDDF or LDFSR) and ((EF = 0) or (bp_FPU_present = 0)) then ( + trap <- 1; + fp_disabled <- 1 + ) else if ( (LDC or LDDC or LDCSR) and ((EC = 0) or (bp_CP_present = 0)) then ( + trap <- 1; + cp_disabled <- 1 + ) else if ( ( (LDD or LDDA or LDDF or LDDC) and (address<2:0> != 0)) or + ((LD or LDA or LDF or LDFSR or LDC or LDCSR) and (address<1:0> != 0)) or + ((LDSH or LDSHA or LDUH or LDUHA) and address<0> != 0) ) then ( + trap <- 1; + mem_address_not_aligned <- 1 + ) else if (LDDF and (rd<0> != 0)) then ( + trap <- 1; + fp_exception <- 1; + ftt <- invalid_fpr_register + ) else if ((LDF or LDDF or LDFSR) and (an FPU sequence error is detected)) then ( + trap <- 1; + fp_exception <- 1; + ftt <- sequence_error + ) else if ((LDC or LDDC or LDCSR) and (a CP sequence error is detected)) then ( + trap <- 1; + cp_exception <- 1; + { possibly additional implementation-dependent actions } + ) +); +next; +if (trap = 0) then { + (data, MAE) <- memory_read(addr_space, address); next; - if (trap = 0) then ( - if ( (LDF or LDDF or LDFSR) and ((EF = 0) or (bp_FPU_present = 0)) then ( - trap <- 1; - fp_disabled <- 1 - ) else if ( (LDC or LDDC or LDCSR) and ((EC = 0) or (bp_CP_present = 0)) then ( - trap <- 1; - cp_disabled <- 1 - ) else if ( ( (LDD or LDDA or LDDF or LDDC) and (address<2:0> != 0)) or - ((LD or LDA or LDF or LDFSR or LDC or LDCSR) and (address<1:0> != 0)) or - ((LDSH or LDSHA or LDUH or LDUHA) and address<0> != 0) ) then ( - trap <- 1; - mem_address_not_aligned <- 1 - ) else if (LDDF and (rd<0> != 0)) then ( - trap <- 1; - fp_exception <- 1; - ftt <- invalid_fpr_register - ) else if ((LDF or LDDF or LDFSR) and (an FPU sequence error is detected)) then ( - trap <- 1; - fp_exception <- 1; - ftt <- sequence_error - ) else if ((LDC or LDDC or LDCSR) and (a CP sequence error is detected)) then ( - trap <- 1; - cp_exception <- 1; - { possibly additional implementation-dependent actions } - ) - ); - next; - if (trap = 0) then { - (data, MAE) <- memory_read(addr_space, address); - next; - if (MAE = 1) then ( - trap <- 1; - data_access_exception <- 1; - ) else ( - if (LDSB or LDSBA or LDUB or LDUBA) then ( - if (address<1:0> = 0) then byte <- data<31:24> - else if (address<1:0> = 1) then byte <- data<23:16> - else if (address<1:0> = 2) then byte <- data<15: 8> - else if (address<1:0> = 3) then byte <- data< 7: 0> - next; - if (LDSB or LDSBA) then - word0 <- sign_extend_byte(byte) - else - word0 <- zero_extend_byte(byte) - ) else if (LDSH or LDSHA or LDUH or LDUHA) then ( - if (address<1:0> = 0) then halfword <- data<31:16> - else if (address<1:0> = 2) then halfword <- data<15: 0> - next; - if (LDSH or LDSHA) then - word0 <- sign_extend_halfword(halfword) - else - word0 <- zero_extend_halfword(halfword) - ) else - word0 <- data - ) - ); - next; - if (trap = 0) then ( - if ( (rd != 0) and (LD or LDA or LDSH or LDSHA - or LDUHA or LDUH or LDSB or LDSBA or LDUB or LDUBA) ) then - r[rd] <- word0 - else if (LDF) then f[rd] <- word0 - else if (LDC) then { implementation-dependent actions } - else if (LDFSR) then FSR <- word0 - else if (LDCSR) then CSR <- word0 - else if (LDD or LDDA) then r[rd and 11110] <- word0 - else if (LDDF) then f[rd and 11110] <- word0 - else if (LDDC) then { implementation-dependent actions } - ); + if (MAE = 1) then ( + trap <- 1; + data_access_exception <- 1; + ) else ( + if (LDSB or LDSBA or LDUB or LDUBA) then ( + if (address<1:0> = 0) then byte <- data<31:24> + else if (address<1:0> = 1) then byte <- data<23:16> + else if (address<1:0> = 2) then byte <- data<15: 8> + else if (address<1:0> = 3) then byte <- data< 7: 0> + next; + if (LDSB or LDSBA) then + word0 <- sign_extend_byte(byte) + else + word0 <- zero_extend_byte(byte) + ) else if (LDSH or LDSHA or LDUH or LDUHA) then ( + if (address<1:0> = 0) then halfword <- data<31:16> + else if (address<1:0> = 2) then halfword <- data<15: 0> + next; + if (LDSH or LDSHA) then + word0 <- sign_extend_halfword(halfword) + else + word0 <- zero_extend_halfword(halfword) + ) else + word0 <- data + ) +); +next; +if (trap = 0) then ( + if ( (rd != 0) and (LD or LDA or LDSH or LDSHA + or LDUHA or LDUH or LDSB or LDSBA or LDUB or LDUBA) ) then + r[rd] <- word0 + else if (LDF) then f[rd] <- word0 + else if (LDC) then { implementation-dependent actions } + else if (LDFSR) then FSR <- word0 + else if (LDCSR) then CSR <- word0 + else if (LDD or LDDA) then r[rd and 11110] <- word0 + else if (LDDF) then f[rd and 11110] <- word0 + else if (LDDC) then { implementation-dependent actions } +); +next; +if (((trap = 0) and (LDD or LDDA or LDDF or LDDC)) then ( + (word1, MAE) <- memory_read(addr_space, address + 4); next; - if (((trap = 0) and (LDD or LDDA or LDDF or LDDC)) then ( - (word1, MAE) <- memory_read(addr_space, address + 4); - next; - if (MAE = 1) then ( { MAE = 1 only due to a "non-resumable machine-check error" } - trap <- 1; - data_access_exception <- 1 ) - else if (LDD or LDDA) then r[rd or 1] <- word1 - else if (LDDF) then f[rd or 1] <- word1 - else if (LDDC) then { implementation-dependent actions } - ); - */ + if (MAE = 1) then ( { MAE = 1 only due to a "non-resumable machine-check error" } + trap <- 1; + data_access_exception <- 1 ) + else if (LDD or LDDA) then r[rd or 1] <- word1 + else if (LDDF) then f[rd or 1] <- word1 + else if (LDDC) then { implementation-dependent actions } +); +*/ + +inline void mb86901_device::execute_ldd(uint32_t op) +{ + const uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG); - uint32_t address = 0; - uint8_t addr_space = 0; - if (LDD || LD || LDSH || LDUH || LDSB || LDUB || LDDF || LDF || LDFSR || LDDC || LDC || LDCSR) + if (address & 7) { - address = RS1REG + (USEIMM ? SIMM13 : RS2REG); - addr_space = (IS_USER ? 10 : 11); + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; } - else if (LDDA || LDA || LDSHA || LDUHA || LDSBA || LDUBA) + + const uint32_t data = m_mmu->read_asi(m_data_space, address >> 2, 0xffffffff); + + if (MAE) { - if (IS_USER) - { - m_trap = 1; - m_privileged_instruction = 1; - } - else if (USEIMM) - { - m_trap = 1; - m_illegal_instruction = 1; - } - else - { - address = RS1REG + RS2REG; - addr_space = ASI; - } + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - if (!m_trap) + if (RDBITS) + RDREG = data; + + const uint32_t word1 = m_mmu->read_asi(m_data_space, (address + 4) >> 2, 0xffffffff); + if (MAE) { - if ((LDF || LDDF || LDFSR) && (!(PSR & PSR_EF_MASK) || m_bp_fpu_present == 0)) - { - m_trap = 1; - m_fp_disabled = 1; - } - else if ((LDC || LDDC || LDCSR) && (!(PSR & PSR_EC_MASK) || m_bp_cp_present == 0)) - { - m_trap = 1; - m_cp_disabled = 1; - } - else if (((LDD || LDDA || LDDF || LDDC) && ((address & 7) != 0)) || - ((LD || LDA || LDF || LDFSR || LDC || LDCSR) && ((address & 3) != 0)) || - ((LDSH || LDSHA || LDUH || LDUHA) && ((address & 1) != 0))) - { - m_trap = 1; - m_mem_address_not_aligned = 1; - } - else if (LDDF && ((RD & 1) != 0)) - { - m_trap = 1; - m_fp_exception = 1; - m_ftt = 0xff; - } - else if ((LDF || LDDF || LDFSR) && m_fpu_sequence_err != 0) - { - m_trap = 1; - m_fp_exception = 1; - m_ftt = m_fpu_sequence_err; - } - else if ((LDC || LDDC || LDCSR) && m_cp_sequence_err != 0) - { - m_trap = 1; - m_cp_exception = 1; - // possibly additional implementation-dependent actions - } + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - uint32_t word0(0); - if (!m_trap) + REG(RD | 1) = word1; + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_ld(uint32_t op) +{ + const uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG); + + if (address & 3) { - uint32_t data = read_sized_word(addr_space, address, (LD || LDD || LDA || LDDA) ? 4 : ((LDUH || LDSH || LDUHA || LDSHA) ? 2 : 1)); + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } - if (m_mae) - { - m_trap = 1; - m_data_access_exception = 1; - } - else - { - if (LDSB || LDSBA || LDUB || LDUBA) - { - uint8_t byte = 0; - if ((address & 3) == 0) byte = (data >> 24) & 0xff; - else if ((address & 3) == 1) byte = (data >> 16) & 0xff; - else if ((address & 3) == 2) byte = (data >> 8) & 0xff; - else if ((address & 3) == 3) byte = data & 0xff; - - if (LDSB || LDSBA) - word0 = (((int32_t)byte) << 24) >> 24; - else - word0 = byte; - } - else if (LDSH || LDSHA || LDUH || LDUHA) - { - uint16_t halfword = 0; - if ((address & 3) == 0) halfword = (data >> 16) & 0xffff; - else if ((address & 3) == 2) halfword = data & 0xffff; + const uint32_t data = m_mmu->read_asi(m_data_space, address >> 2, 0xffffffff); - if (LDSH || LDSHA) - { - word0 = (((int32_t)halfword) << 16) >> 16; - } - else - { - word0 = halfword; - } - } - else - { - word0 = data; - } - } + if (m_mae) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - if (!m_trap) + if (RDBITS) + RDREG = data; + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_ldsh(uint32_t op) +{ + const uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG); + + if (address & 1) { - if (RD == 0) { } - else if (LD || LDA || LDSH || LDSHA || LDUHA || LDUH || LDSB || LDSBA || LDUB || LDUBA) RDREG = word0; - else if (LDF) FDREG = word0; - else if (LDC) { } // implementation-dependent actions - else if (LDFSR) FSR = word0; - else if (LDD || LDDA) REG(RD & 0x1e) = word0; - else if (LDDF) FREG(RD & 0x1e) = word0; - else if (LDDC) { } // implementation-dependent actions + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - if (!m_trap && (LDD || LDDA || LDDF || LDDC)) + static const uint32_t mask16[4] = { 0xffff0000, 0x00000000, 0x0000ffff, 0x00000000 }; + const uint32_t data = m_mmu->read_asi(m_data_space, address >> 2, mask16[address & 2]); + + if (m_mae) { - uint32_t word1 = read_sized_word(addr_space, address + 4, 4); - if (MAE) - { - m_trap = 1; - m_data_access_exception = 1; - } - else if (LDD || LDDA) REG(RD | 1) = word1; - else if (LDDF) FREG(RD | 1) = word1; - else if (LDDC) { } // implementation-dependent actions + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } + + if (RDBITS) + { + if ((address & 3) == 0) RDREG = (int32_t)data >> 16; + else if ((address & 3) == 2) RDREG = ((int32_t)data << 16) >> 16; + } + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_lduh(uint32_t op) +{ + const uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG); + + if (address & 1) + { + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + static const uint32_t mask16[4] = { 0xffff0000, 0x00000000, 0x0000ffff, 0x00000000 }; + const uint32_t data = m_mmu->read_asi(m_data_space, address >> 2, mask16[address & 2]); + + if (m_mae) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (RDBITS) + { + if ((address & 3) == 0) RDREG = data >> 16; + else if ((address & 3) == 2) RDREG = data & 0xffff; + } + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_ldsb(uint32_t op) +{ + const uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG); + + static const uint32_t mask8[4] = { 0xff000000, 0x00ff0000, 0x0000ff00, 0x000000ff }; + const uint32_t data = m_mmu->read_asi(m_data_space, address >> 2, mask8[address & 3]); + + if (m_mae) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (RDBITS) + { + if ((address & 3) == 0) RDREG = (int32_t)data >> 24; + else if ((address & 3) == 1) RDREG = ((int32_t)data << 8) >> 24; + else if ((address & 3) == 2) RDREG = ((int32_t)data << 16) >> 24; + else if ((address & 3) == 3) RDREG = ((int32_t)data << 24) >> 24; + } + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_ldub(uint32_t op) +{ + const uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG); + + static const uint32_t mask8[4] = { 0xff000000, 0x00ff0000, 0x0000ff00, 0x000000ff }; + const uint32_t byte_idx = address & 3; + const uint32_t data = m_mmu->read_asi(m_data_space, address >> 2, mask8[byte_idx]); + + if (m_mae) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (RDBITS) + { + static const int shifts[4] = { 24, 16, 8, 0 }; + RDREG = (uint8_t)(data >> shifts[byte_idx]); + } + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_lddfpr(uint32_t op) +{ + const uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG); + + if (!(PSR & PSR_EF_MASK) || m_bp_fpu_present == 0) + { + m_trap = 1; + m_fp_disabled = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (address & 7) + { + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (RD & 1) + { + m_trap = 1; + m_fp_exception = 1; + m_ftt = 0xff; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (m_fpu_sequence_err) + { + m_trap = 1; + m_fp_exception = 1; + m_ftt = m_fpu_sequence_err; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + const uint32_t data = m_mmu->read_asi(m_data_space, address >> 2, 0xffffffff); + + if (m_mae) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + FREG(RD & 0x1e) = data; + + const uint32_t word1 = m_mmu->read_asi(m_data_space, (address + 4) >> 2, 0xffffffff); + if (MAE) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + FREG(RD | 1) = word1; + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_ldfpr(uint32_t op) +{ + const uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG); + + if (!(PSR & PSR_EF_MASK) || m_bp_fpu_present == 0) + { + m_trap = 1; + m_fp_disabled = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (address & 3) + { + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (m_fpu_sequence_err) + { + m_trap = 1; + m_fp_exception = 1; + m_ftt = m_fpu_sequence_err; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + const uint32_t data = m_mmu->read_asi(m_data_space, address >> 2, 0xffffffff); + + if (m_mae) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + FDREG = data; + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_ldfsr(uint32_t op) +{ + const uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG); + + if (!(PSR & PSR_EF_MASK) || m_bp_fpu_present == 0) + { + m_trap = 1; + m_fp_disabled = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (address & 3) + { + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (m_fpu_sequence_err) + { + m_trap = 1; + m_fp_exception = 1; + m_ftt = m_fpu_sequence_err; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + const uint32_t data = m_mmu->read_asi(m_data_space, address >> 2, 0xffffffff); + + if (m_mae) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + FSR = data; + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_lddcpr(uint32_t op) +{ + const uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG); + + if (!(PSR & PSR_EC_MASK) || !m_bp_cp_present) + { + m_trap = 1; + m_cp_disabled = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (address & 7) + { + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (m_cp_sequence_err) + { + m_trap = 1; + m_cp_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + // possibly additional implementation-dependent actions + return; + } + + m_mmu->read_asi(m_data_space, address >> 2, 0xffffffff); + if (MAE) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + // implementation-dependent actions + + m_mmu->read_asi(m_data_space, (address + 4) >> 2, 0xffffffff); + if (MAE) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + // implementation-dependent actions + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_ldcpr(uint32_t op) +{ + const uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG); + + if (!(PSR & PSR_EC_MASK) || !m_bp_cp_present) + { + m_trap = 1; + m_cp_disabled = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (address & 3) + { + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (m_cp_sequence_err) + { + m_trap = 1; + m_cp_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + // possibly additional implementation-dependent actions + return; + } + + m_mmu->read_asi(m_data_space, address >> 2, 0xffffffff); + + if (MAE) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + // implementation-dependent actions + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_ldcsr(uint32_t op) +{ + const uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG); + + if (!(PSR & PSR_EC_MASK) || !m_bp_cp_present) + { + m_trap = 1; + m_cp_disabled = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (address & 3) + { + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (m_cp_sequence_err) + { + m_trap = 1; + m_cp_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + // possibly additional implementation-dependent actions + return; + } + + m_mmu->read_asi(m_data_space, address >> 2, 0xffffffff); + + if (MAE) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + // implementation-dependent actions + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_ldda(uint32_t op) +{ + if (IS_USER) + { + m_trap = 1; + m_privileged_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + else if (USEIMM) + { + m_trap = 1; + m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + const uint32_t address = RS1REG + RS2REG; + const uint32_t addr_space = ASI; + + if (address & 7) + { + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + const uint32_t data = m_mmu->read_asi(addr_space, address >> 2, 0xffffffff); + + if (m_mae) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (RDBITS) + RDREG = data; + + uint32_t word1 = m_mmu->read_asi(addr_space, (address + 4) >> 2, 0xffffffff); + if (MAE) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + REG(RD | 1) = word1; + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_lda(uint32_t op) +{ + if (IS_USER) + { + m_trap = 1; + m_privileged_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + else if (USEIMM) + { + m_trap = 1; + m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + const uint32_t address = RS1REG + RS2REG; + + if (address & 3) + { + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + const uint32_t data = m_mmu->read_asi(ASI, address >> 2, 0xffffffff); + + if (m_mae) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (RDBITS) + RDREG = data; + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_ldsha(uint32_t op) +{ + if (IS_USER) + { + m_trap = 1; + m_privileged_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + else if (USEIMM) + { + m_trap = 1; + m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + const uint32_t address = RS1REG + RS2REG; + + if (address & 1) + { + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + static const uint32_t mask16[4] = { 0xffff0000, 0x00000000, 0x0000ffff, 0x00000000 }; + const uint32_t data = m_mmu->read_asi(ASI, address >> 2, mask16[address & 2]); + + if (m_mae) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (RDBITS) + { + if ((address & 3) == 0) RDREG = (int32_t)data >> 16; + else if ((address & 3) == 2) RDREG = ((int32_t)data << 16) >> 16; + } + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_lduha(uint32_t op) +{ + if (IS_USER) + { + m_trap = 1; + m_privileged_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + else if (USEIMM) + { + m_trap = 1; + m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + const uint32_t address = RS1REG + RS2REG; + if (address & 1) + { + m_trap = 1; + m_mem_address_not_aligned = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + static const uint32_t mask16[4] = { 0xffff0000, 0x00000000, 0x0000ffff, 0x00000000 }; + const uint32_t data = m_mmu->read_asi(ASI, address >> 2, mask16[address & 2]); + + if (m_mae) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (RDBITS) + { + if ((address & 3) == 0) RDREG = data >> 16; + else if ((address & 3) == 2) RDREG = data & 0xffff; + } + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_ldsba(uint32_t op) +{ + if (IS_USER) + { + m_trap = 1; + m_privileged_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + else if (USEIMM) + { + m_trap = 1; + m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + static const uint32_t mask8[4] = { 0xff000000, 0x00ff0000, 0x0000ff00, 0x000000ff }; + const uint32_t address = RS1REG + RS2REG; + const uint32_t data = m_mmu->read_asi(ASI, address >> 2, mask8[address & 3]); + + if (m_mae) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (RDBITS) + { + if ((address & 3) == 0) RDREG = (int32_t)data >> 24; + else if ((address & 3) == 1) RDREG = ((int32_t)data << 8) >> 24; + else if ((address & 3) == 2) RDREG = ((int32_t)data << 16) >> 24; + else if ((address & 3) == 3) RDREG = ((int32_t)data << 24) >> 24; + } + + PC = nPC; + nPC = nPC + 4; +} + +inline void mb86901_device::execute_lduba(uint32_t op) +{ + if (IS_USER) + { + m_trap = 1; + m_privileged_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + else if (USEIMM) + { + m_trap = 1; + m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + static const uint32_t mask8[4] = { 0xff000000, 0x00ff0000, 0x0000ff00, 0x000000ff }; + const uint32_t address = RS1REG + RS2REG; + const uint32_t data = m_mmu->read_asi(ASI, address >> 2, mask8[address & 3]); + + if (m_mae) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + if (RDBITS) + { + if ((address & 3) == 0) RDREG = data >> 24; + else if ((address & 3) == 1) RDREG = (data >> 16) & 0xff; + else if ((address & 3) == 2) RDREG = (data >> 8) & 0xff; + else if ((address & 3) == 3) RDREG = data & 0xff; + } + + PC = nPC; + nPC = nPC + 4; } @@ -2209,91 +3180,83 @@ void mb86901_device::execute_ldstub(uint32_t op) { m_trap = 1; m_privileged_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } else if (USEIMM) { m_trap = 1; m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } else { address = RS1REG + RS2REG; addr_space = ASI; + return; } } uint32_t data(0); - if (!m_trap) + while (m_pb_block_ldst_byte || m_pb_block_ldst_word) { - while (m_pb_block_ldst_byte || m_pb_block_ldst_word) - { - // { wait for lock(s) to be lifted } - // { an implementation actually need only block when another LDSTUB or SWAP - // is pending on the same byte in memory as the one addressed by this LDSTUB } - } + // { wait for lock(s) to be lifted } + // { an implementation actually need only block when another LDSTUB or SWAP + // is pending on the same byte in memory as the one addressed by this LDSTUB } + } - m_pb_block_ldst_byte = 1; + m_pb_block_ldst_byte = 1; - data = read_sized_word(addr_space, address, 1); + static const uint32_t mask8[4] = { 0xff000000, 0x00ff0000, 0x0000ff00, 0x000000ff }; + data = m_mmu->read_asi(addr_space, address >> 2, mask8[address & 3]); - if (MAE) - { - m_trap = 1; - m_data_access_exception = 1; - } + if (MAE) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - if (!m_trap) - { - //uint8_t byte_mask; - if ((address & 3) == 0) - { - //byte_mask = 8; - } - else if ((address & 3) == 1) - { - //byte_mask = 4; - } - else if ((address & 3) == 2) - { - //byte_mask = 2; - } - else if ((address & 3) == 3) - { - //byte_mask = 1; - } - write_sized_word(addr_space, address, 0xffffffff, 1); + m_mmu->write_asi(addr_space, address >> 2, 0xffffffff, mask8[address & 3]); - m_pb_block_ldst_byte = 0; + m_pb_block_ldst_byte = 0; - if (MAE) - { - m_trap = 1; - m_data_access_exception = 1; - } - else - { - uint32_t word; - if ((address & 3) == 0) - { - word = (data >> 24) & 0xff; - } - else if ((address & 3) == 1) - { - word = (data >> 16) & 0xff; - } - else if ((address & 3) == 2) - { - word = (data >> 8) & 0xff; - } - else // if ((address & 3) == 3) - { - word = data & 0xff; - } - if (RD != 0) - RDREG = word; - } + if (MAE) + { + m_trap = 1; + m_data_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + + uint32_t word; + if ((address & 3) == 0) + { + word = (data >> 24) & 0xff; + } + else if ((address & 3) == 1) + { + word = (data >> 16) & 0xff; + } + else if ((address & 3) == 2) + { + word = (data >> 8) & 0xff; + } + else // if ((address & 3) == 3) + { + word = data & 0xff; } + if (RDBITS) + RDREG = word; + + PC = nPC; + nPC = nPC + 4; } @@ -2302,7 +3265,7 @@ void mb86901_device::execute_ldstub(uint32_t op) // (load/store) //------------------------------------------------- -void mb86901_device::execute_group3(uint32_t op) +inline void mb86901_device::execute_group3(uint32_t op) { static const int ldst_cycles[64] = { 1, 1, 1, 2, 2, 2, 2, 3, @@ -2318,24 +3281,58 @@ void mb86901_device::execute_group3(uint32_t op) switch (OP3) { case OP3_LD: + execute_ld(op); + break; case OP3_LDUB: + execute_ldub(op); + break; case OP3_LDUH: + execute_lduh(op); + break; case OP3_LDD: + execute_ldd(op); + break; case OP3_LDSB: + execute_ldsb(op); + break; case OP3_LDSH: + execute_ldsh(op); + break; case OP3_LDA: + execute_lda(op); + break; case OP3_LDUBA: + execute_lduba(op); + break; case OP3_LDUHA: + execute_lduha(op); + break; case OP3_LDDA: + execute_ldda(op); + break; case OP3_LDSBA: + execute_ldsba(op); + break; case OP3_LDSHA: + execute_ldsha(op); + break; case OP3_LDFPR: + execute_ldfpr(op); + break; case OP3_LDFSR: + execute_ldfsr(op); + break; case OP3_LDDFPR: + execute_lddfpr(op); + break; case OP3_LDCPR: + execute_ldcpr(op); + break; case OP3_LDCSR: + execute_ldcsr(op); + break; case OP3_LDDCPR: - execute_load(op); + execute_lddcpr(op); break; case OP3_ST: @@ -2368,9 +3365,17 @@ void mb86901_device::execute_group3(uint32_t op) execute_swap(op); break; #endif + + default: + logerror("illegal instruction at %08x: %08x\n", PC, op); + m_trap = 1; + m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + break; } - if (MAE || HOLD_BUS) + if (MAE /*|| HOLD_BUS*/) m_icount--; else m_icount -= ldst_cycles[OP3]; @@ -2384,28 +3389,39 @@ void mb86901_device::execute_group3(uint32_t op) bool mb86901_device::evaluate_condition(uint32_t op) { - bool take = false; - bool n = ICC_N_SET; - bool z = ICC_Z_SET; - bool v = ICC_V_SET; - bool c = ICC_C_SET; - - switch(COND & 7) // COND & 8 - { // 0 8 - case 0: take = false; break; // bn ba - case 1: take = z; break; // bz bne - case 2: take = z | (n ^ z); break; // ble bg - case 3: take = n ^ v; break; // bl bge - case 4: take = c | z; break; // bleu bgu - case 5: take = c; break; // bcs bcc - case 6: take = n; break; // bneg bpos - case 7: take = v; break; // bvs bvc + // COND & 8 + // 0 8 + // bn ba + // bz bne + // ble bg + // bl bge + // bleu bgu + // bcs bcc + // bneg bpos + // bvs bvc + + switch(COND) + { + case 0: return false; + case 1: return ICC_Z_SET; + case 2: return ICC_Z_SET || (ICC_N != ICC_Z); + case 3: return (ICC_N != ICC_V); + case 4: return ICC_C_SET || ICC_Z_SET; + case 5: return ICC_C_SET; + case 6: return ICC_N_SET; + case 7: return ICC_V_SET; + + case 8: return true; + case 9: return ICC_Z_CLEAR; + case 10: return ICC_Z_CLEAR && ICC_N_CLEAR; + case 11: return (ICC_N == ICC_V); + case 12: return ICC_C_CLEAR && ICC_Z_CLEAR; + case 13: return ICC_C_CLEAR; + case 14: return ICC_N_CLEAR; + case 15: return ICC_V_CLEAR; } - if (COND & 8) - take = !take; - - return take; + return false; } @@ -2454,13 +3470,13 @@ void mb86901_device::execute_bicc(uint32_t op) { nPC = pc + DISP22; if (COND == COND_BA && ANNUL) - m_annul = 1; + m_no_annul = false; } else { nPC = nPC + 4; if (ANNUL) - m_annul = 1; + m_no_annul = false; } } @@ -2517,6 +3533,8 @@ void mb86901_device::execute_ticc(uint32_t op) m_trap = 1; m_trap_instruction = 1; m_ticc_trap_type = trap_number & 0x7f; + m_stashed_icount = m_icount; + m_icount = 0; } else { @@ -2543,10 +3561,12 @@ void mb86901_device::select_trap() m_trap = 0; return; } - else if (!(PSR & PSR_ET_MASK)) + else if (!m_et) { m_execute_mode = 0; m_error_mode = 1; + m_stashed_icount = m_icount; + m_icount = 0; } else if (m_data_store_error) m_tt = 0x2b; @@ -2707,6 +3727,7 @@ void mb86901_device::execute_trap() if (!m_error_mode) { PSR &= ~PSR_ET_MASK; + m_et = false; if (IS_USER) PSR &= ~PSR_PS_MASK; @@ -2714,6 +3735,8 @@ void mb86901_device::execute_trap() PSR |= PSR_PS_MASK; PSR |= PSR_S_MASK; + m_s = true; + m_data_space = 11; int cwp = PSR & PSR_CWP_MASK; int new_cwp = ((cwp + NWINDOWS) - 1) % NWINDOWS; @@ -2723,7 +3746,7 @@ void mb86901_device::execute_trap() update_gpr_pointers(); - if (m_annul == 0) + if (m_no_annul) { REG(17) = PC; REG(18) = nPC; @@ -2732,7 +3755,7 @@ void mb86901_device::execute_trap() { REG(17) = nPC; REG(18) = nPC + 4; - m_annul = 0; + m_no_annul = true; } if (!m_reset_trap) @@ -2751,42 +3774,92 @@ void mb86901_device::execute_trap() //------------------------------------------------- -// complete_instruction_execution - execute a -// single fetched instruction that has been -// checked for FP-disabled, CP-disabled, and -// validity. +// dispatch_instruction - executes a +// single fetched instruction. //------------------------------------------------- -void mb86901_device::complete_instruction_execution(uint32_t op) +/* The SPARC Instruction Manual: Version 8, page 159, "Appendix C - ISP Descriptions - C.6. Instruction Dispatch" (SPARCv8.pdf, pg. 156) + +illegal_IU_instr :- ( + if ( ( (op == 00) and (op2 == 000) ) { UNIMP instruction } + or + ( ((op=11) or (op=10)) and (op3=unassigned) ) + then 1 else 0 + +if (illegal_IU_instr = 1) then ( + trap <- 1 + illegal_instruction <- 1 +); +if ((FPop1 or FPop2 or FBfcc) and ((EF = 0) or (bp_FPU_present = 0))) then ( + trap <- 1; + fp_disabled <- 1 +); +if (CPop1 or CPop2 or CBccc) and ((EC = 0) or (bp_CP_present = 0))) then ( + trap <- 1; + cp_disabled <- 1 +); +next; +if (trap = 0) then ( + { code for specific instruction, defined below } +); +*/ + +inline void mb86901_device::dispatch_instruction(uint32_t op) { - switch (OP) + const uint8_t op_type = OP; + switch (op_type) { case OP_TYPE0: // Bicc, SETHI, FBfcc switch (OP2) { case OP2_UNIMP: // unimp - printf("unimp @ %x\n", PC); + logerror("unimp @ %x\n", PC); break; case OP2_BICC: // branch on integer condition codes execute_bicc(op); break; case OP2_SETHI: // sethi - SET_RDREG(IMM22); + //SET_RDREG(IMM22); + *m_regs[RD] = op << 10; + m_r[0] = 0; + PC = nPC; + nPC = nPC + 4; break; case OP2_FBFCC: // branch on floating-point condition codes - printf("fbfcc @ %x\n", PC); + if (!(PSR & PSR_EF_MASK) || !m_bp_fpu_present) + { + logerror("fbfcc at %08x: %08x\n", PC, op); + m_trap = 1; + m_fp_disabled = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } break; #if SPARCV8 case OP2_CBCCC: // branch on coprocessor condition codes, SPARCv8 - break; + if (!(PSR & PSR_EC_MASK) || !m_bp_cp_present) + { + logerror("cbccc @ %08x: %08x\n", PC, op); + m_trap = 1; + m_cp_disabled = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + return; #endif default: - printf("unknown %08x @ %x\n", op, PC); - break; + logerror("illegal instruction at %08x: %08x\n", PC, op); + m_trap = 1; + m_illegal_instruction = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } break; - case OP_CALL: // call + case OP_CALL: { uint32_t pc = PC; uint32_t callpc = PC + DISP30; @@ -2804,70 +3877,9 @@ void mb86901_device::complete_instruction_execution(uint32_t op) case OP_LDST: execute_group3(op); break; - default: - break; - } -} - - -//------------------------------------------------- -// dispatch_instruction - dispatch the previously -// fetched instruction -//------------------------------------------------- - -void mb86901_device::dispatch_instruction(uint32_t op) -{ - /* The SPARC Instruction Manual: Version 8, page 159, "Appendix C - ISP Descriptions - C.6. Instruction Dispatch" (SPARCv8.pdf, pg. 156) - - illegal_IU_instr :- ( - if ( ( (op == 00) and (op2 == 000) ) { UNIMP instruction } - or - ( ((op=11) or (op=10)) and (op3=unassigned) ) - then 1 else 0 - - if (illegal_IU_instr = 1) then ( - trap <- 1 - illegal_instruction <- 1 - ); - if ((FPop1 or FPop2 or FBfcc) and ((EF = 0) or (bp_FPU_present = 0))) then ( - trap <- 1; - fp_disabled <- 1 - ); - if (CPop1 or CPop2 or CBccc) and ((EC = 0) or (bp_CP_present = 0))) then ( - trap <- 1; - cp_disabled <- 1 - ); - next; - if (trap = 0) then ( - { code for specific instruction, defined below } - ); - */ - bool illegal_IU_instr = (OP == 0 && OP2 == 0) || ((OP == 3 && !m_ldst_op3_assigned[OP3]) || (OP == 2 && !m_alu_op3_assigned[OP3])); - - if (illegal_IU_instr) - { - printf("illegal instruction at %08x: %08x\n", PC, op); - m_trap = 1; - m_illegal_instruction = 1; - } - if (((OP == OP_ALU && (FPOP1 || FPOP2)) || (OP == OP_TYPE0 && OP2 == OP2_FBFCC)) && (!(PSR & PSR_EF_MASK) || !m_bp_fpu_present)) - { - m_trap = 1; - m_fp_disabled = 1; - } - if (((OP == OP_ALU && (CPOP1 || CPOP2)) || (OP == OP_TYPE0 && OP2 == OP2_CBCCC)) && (!(PSR & PSR_EC_MASK) || !m_bp_cp_present)) - { - m_trap = 1; - m_cp_disabled = 1; - } - - if (!m_trap) - { - complete_instruction_execution(op); } } - //------------------------------------------------- // complete_fp_execution - completes execution // of a floating-point operation @@ -2882,7 +3894,7 @@ void mb86901_device::complete_fp_execution(uint32_t /*op*/) // mode (versus error or reset modes) //------------------------------------------------- -void mb86901_device::execute_step() +inline void mb86901_device::execute_step() { /* The SPARC Instruction Manual: Version 8, page 156, "Appendix C - ISP Descriptions - C.5. Processor States and Instruction Dispatch" (SPARCv8.pdf, pg. 153) @@ -2936,70 +3948,35 @@ void mb86901_device::execute_step() ) ) */ - if (m_bp_reset_in) - { - m_execute_mode = 0; - m_error_mode = 0; - m_reset_mode = 1; - printf("Entering reset mode\n"); - return; - } - else if ((PSR & PSR_ET_MASK) && (m_bp_irl == 15 || m_bp_irl > ((PSR & PSR_PIL_MASK) >> PSR_PIL_SHIFT))) - { - m_trap = 1; - m_interrupt_level = m_bp_irl; - } - if (m_trap) - { - execute_trap(); - BREAK_PSR; - debugger_instruction_hook(PC); - } - - if (m_execute_mode) - { - // write-state-register delay not yet implemented + // write-state-register delay not yet implemented - uint32_t addr_space = (IS_USER ? 8 : 9); - uint32_t op = read_sized_word(addr_space, PC, 4); + const uint32_t op = m_mmu->fetch_insn(m_s, PC >> 2); #if LOG_FCODES - //if (m_log_fcodes) - { - log_fcodes(); - } + //if (m_log_fcodes) + { + log_fcodes(); + } #endif - if (MAE && !m_annul) + if (m_no_annul) + { + if (MAE) { m_trap = 1; m_instruction_access_exception = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; } - else - { - if (!m_annul) - { - dispatch_instruction(op); - - if (FPOP1 || FPOP2) - { - complete_fp_execution(op); - } - - if (m_trap == 0 && !(OP == OP_CALL || (OP == OP_TYPE0 && (OP2 == OP2_BICC || OP2 == OP2_FBFCC || OP2 == OP2_CBCCC)) || (OP == OP_ALU && (JMPL || TICC || RETT)))) - { - PC = nPC; - nPC = nPC + 4; - } - } - else - { - m_annul = 0; - PC = nPC; - nPC = nPC + 4; - } - } + dispatch_instruction(op); + } + else + { + m_no_annul = true; + PC = nPC; + nPC = nPC + 4; } } @@ -3028,7 +4005,8 @@ void mb86901_device::reset_step() m_execute_mode = 1; m_trap = 1; m_reset_trap = 1; - printf("m_bp_reset_in is false, resetting\n"); + m_stashed_icount = m_icount; + m_icount = 0; } } @@ -3055,44 +4033,39 @@ void mb86901_device::error_step() m_error_mode = 0; m_reset_mode = 1; m_pb_error = 0; + m_stashed_icount = m_icount; + m_icount = 0; } } - -//------------------------------------------------- -// execute_run - execute a timeslice's worth of -// opcodes -//------------------------------------------------- - -void mb86901_device::execute_run() +template <bool CHECK_DEBUG, mb86901_device::running_mode MODE> +void mb86901_device::run_loop() { - bool debug = machine().debug_flags & DEBUG_FLAG_ENABLED; - - while (m_icount > 0) + do { - if (HOLD_BUS) + /*if (HOLD_BUS) { - m_icount--; - continue; - } + m_icount--; + continue; + }*/ - BREAK_PSR; - debugger_instruction_hook(PC); + if (CHECK_DEBUG) + debugger_instruction_hook(PC); - if (m_reset_mode) + if (MODE == MODE_RESET) { reset_step(); } - else if (m_error_mode) + else if (MODE == MODE_ERROR) { error_step(); } - else if (m_execute_mode) + else if (MODE == MODE_EXECUTE) { execute_step(); } - if (debug) + if (CHECK_DEBUG) { for (int i = 0; i < 8; i++) { @@ -3102,7 +4075,65 @@ void mb86901_device::execute_run() } } --m_icount; + } while (m_icount >= 0); +} + +//------------------------------------------------- +// execute_run - execute a timeslice's worth of +// opcodes +//------------------------------------------------- + +void mb86901_device::execute_run() +{ + bool debug = machine().debug_flags & DEBUG_FLAG_ENABLED; + + if (m_bp_reset_in) + { + m_execute_mode = 0; + m_error_mode = 0; + m_reset_mode = 1; + m_stashed_icount = m_icount; + m_icount = 0; + return; + } + else if (m_et && (m_bp_irl == 15 || m_bp_irl > m_pil)) + { + m_trap = 1; + m_interrupt_level = m_bp_irl; } + + do + { + if (m_trap) + { + execute_trap(); + } + + if (debug) + { + if (m_reset_mode) + run_loop<true, MODE_RESET>(); + else if (m_error_mode) + run_loop<true, MODE_ERROR>(); + else + run_loop<true, MODE_EXECUTE>(); + } + else + { + if (m_reset_mode) + run_loop<false, MODE_RESET>(); + else if (m_error_mode) + run_loop<false, MODE_ERROR>(); + else + run_loop<false, MODE_EXECUTE>(); + } + + if (m_stashed_icount >= 0) + { + m_icount = m_stashed_icount; + m_stashed_icount = -1; + } + } while (m_icount >= 0); } diff --git a/src/devices/cpu/sparc/sparc.h b/src/devices/cpu/sparc/sparc.h index 9c97b86bdef..ff337da962c 100644 --- a/src/devices/cpu/sparc/sparc.h +++ b/src/devices/cpu/sparc/sparc.h @@ -10,6 +10,7 @@ #pragma once #include "sparcdasm.h" +#include "sparc_intf.h" #define SPARCV8 (1) #define LOG_FCODES (0) @@ -22,15 +23,19 @@ #define MCFG_SPARC_ADD_ASI_DESC(desc) \ downcast<mb86901_device &>(*device).add_asi_desc([](sparc_disassembler *dasm) { dasm->add_asi_desc(desc); }); -class mb86901_device : public cpu_device, protected sparc_disassembler::config +class mb86901_device : public cpu_device, public sparc_mmu_host_interface, protected sparc_disassembler::config { public: mb86901_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + template <typename T> void set_mmu(T &&tag) { m_mmu.set_tag(std::forward<T>(tag)); } + // device-level overrides virtual void device_start() override; virtual void device_reset() override; virtual void device_stop() override; + virtual void device_post_load() override; + virtual void device_resolve_objects() override; // device_execute_interface overrides virtual uint32_t execute_min_cycles() const override; @@ -48,9 +53,9 @@ public: // device_state_interface overrides virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; - uint8_t get_asi() { return m_asi; } + uint8_t get_asi() { return 0; } uint32_t pc() { return m_pc; } - void set_mae() { m_mae = 1; } + void set_mae() override { m_mae = true; } void add_asi_desc(std::function<void (sparc_disassembler *)> f) { m_asi_desc_adder = f; } @@ -67,7 +72,6 @@ protected: void execute_taddcc(uint32_t op); void execute_sub(uint32_t op); void execute_tsubcc(uint32_t op); - void execute_logical(uint32_t op); void execute_shift(uint32_t op); void execute_mulscc(uint32_t op); void execute_rdsr(uint32_t op); @@ -79,42 +83,83 @@ protected: void execute_mul(uint32_t op); void execute_div(uint32_t op); #endif - void execute_group2(uint32_t op); + inline void execute_group2(uint32_t op); + + inline void execute_ldd(uint32_t op); + inline void execute_ld(uint32_t op); + inline void execute_ldsh(uint32_t op); + inline void execute_lduh(uint32_t op); + inline void execute_ldsb(uint32_t op); + inline void execute_ldub(uint32_t op); + inline void execute_lddfpr(uint32_t op); + inline void execute_ldfpr(uint32_t op); + inline void execute_ldfsr(uint32_t op); + inline void execute_lddcpr(uint32_t op); + inline void execute_ldcpr(uint32_t op); + inline void execute_ldcsr(uint32_t op); + inline void execute_ldda(uint32_t op); + inline void execute_lda(uint32_t op); + inline void execute_ldsha(uint32_t op); + inline void execute_lduha(uint32_t op); + inline void execute_ldsba(uint32_t op); + inline void execute_lduba(uint32_t op); - void execute_load(uint32_t op); void execute_store(uint32_t op); void execute_ldstub(uint32_t op); #if SPARCV8 void execute_swap(uint32_t op); #endif - void execute_group3(uint32_t op); + inline void execute_group3(uint32_t op); + + enum set_cc + { + NOCC = 0, + USECC + }; + + template <set_cc SETCC> void execute_and(const uint32_t op); + template <set_cc SETCC> void execute_or(const uint32_t op); + template <set_cc SETCC> void execute_xor(const uint32_t op); + template <set_cc SETCC> void execute_andn(const uint32_t op); + template <set_cc SETCC> void execute_orn(const uint32_t op); + template <set_cc SETCC> void execute_xnor(const uint32_t op); bool evaluate_condition(uint32_t op); - void execute_bicc(uint32_t op); + inline void execute_bicc(uint32_t op); void execute_ticc(uint32_t op); void select_trap(); void execute_trap(); void complete_instruction_execution(uint32_t op); - void dispatch_instruction(uint32_t op); + inline void dispatch_instruction(uint32_t op); void complete_fp_execution(uint32_t /*op*/); - void execute_step(); + inline void execute_step(); void reset_step(); void error_step(); + enum running_mode + { + MODE_RESET, + MODE_ERROR, + MODE_EXECUTE + }; + + template <bool CHECK_DEBUG, running_mode MODE> void run_loop(); #if LOG_FCODES void indent(); void disassemble_ss1_fcode(uint32_t r5, uint32_t opcode, uint32_t handler_base, uint32_t entry_point, uint32_t stack); void log_fcodes(); #endif + required_device<sparc_mmu_interface> m_mmu; + // address spaces - const address_space_config m_program_config; + address_space_config m_default_config; // memory access - uint32_t read_sized_word(uint8_t asi, uint32_t address, int size); - void write_sized_word(uint8_t asi, uint32_t address, uint32_t data, int size); + uint32_t read_sized_word(const uint8_t asi, const uint32_t address, const uint32_t mem_mask); + void write_sized_word(const uint8_t asi, const uint32_t address, const uint32_t data, const uint32_t mem_mask); // helpers for the disassembler virtual uint64_t get_reg_r(unsigned index) const override; @@ -193,27 +238,25 @@ protected: bool m_alu_op3_assigned[64]; bool m_ldst_op3_assigned[64]; + bool m_alu_setcc[64]; // register windowing helpers uint32_t* m_regs[32]; - // addressing helpers - uint8_t m_asi; - // other internal states bool m_privileged_asr[32]; bool m_illegal_instruction_asr[32]; bool m_mae; - bool m_annul; + bool m_no_annul; bool m_hold_bus; int m_icount; + int m_stashed_icount; + int m_insn_space; + int m_data_space; // debugger helpers uint32_t m_dbgregs[24]; - // address spaces - address_space *m_program; - #if LOG_FCODES uint32_t m_ss1_next_pc; uint32_t m_ss1_next_opcode; diff --git a/src/devices/cpu/sparc/sparc_intf.h b/src/devices/cpu/sparc/sparc_intf.h new file mode 100644 index 00000000000..b1fad3ad9a9 --- /dev/null +++ b/src/devices/cpu/sparc/sparc_intf.h @@ -0,0 +1,31 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/*************************************************************************** + + sparc_intf.h - Sun SPARC MMU interfaces + +***************************************************************************/ + +#ifndef MAME_CPU_SPARC_SPARC_INTF_H +#define MAME_CPU_SPARC_SPARC_INTF_H + +#pragma once + +class sparc_mmu_host_interface +{ +public: + virtual ~sparc_mmu_host_interface() { } + virtual void set_mae() = 0; +}; + +class sparc_mmu_interface +{ +public: + virtual ~sparc_mmu_interface() { } + virtual uint32_t fetch_insn(const bool supervisor, const uint32_t offset) = 0; + virtual uint32_t read_asi(uint8_t asi, uint32_t offset, uint32_t mem_mask) = 0; + virtual void write_asi(uint8_t asi, uint32_t offset, uint32_t data, uint32_t mem_mask) = 0; + virtual void set_host(sparc_mmu_host_interface *host) = 0; +}; + +#endif // MAME_CPU_SPARC_SPARC_INTF_H diff --git a/src/devices/cpu/sparc/sparcdefs.h b/src/devices/cpu/sparc/sparcdefs.h index 823fb3e52f3..38227f4c668 100644 --- a/src/devices/cpu/sparc/sparcdefs.h +++ b/src/devices/cpu/sparc/sparcdefs.h @@ -29,9 +29,13 @@ #define PSR_RES_MASK 0x000fc000 #define PSR_ICC_MASK 0x00f00000 #define PSR_N_MASK 0x00800000 +#define PSR_N_SHIFT 23 #define PSR_Z_MASK 0x00400000 +#define PSR_Z_SHIFT 22 #define PSR_V_MASK 0x00200000 +#define PSR_V_SHIFT 21 #define PSR_C_MASK 0x00100000 +#define PSR_C_SHIFT 20 #define PSR_VER_SHIFT 24 #define PSR_VER_MASK 0x0f000000 #define PSR_VER 0 @@ -41,25 +45,25 @@ #define PSR_ZERO_MASK (PSR_IMPL_MASK | PSR_VER_MASK | PSR_RES_MASK) #define ICC_N_SET (m_psr & PSR_N_MASK) -#define ICC_N (ICC_N_SET ? 1 : 0) +#define ICC_N (ICC_N_SET >> PSR_N_SHIFT) #define ICC_N_CLEAR (!ICC_N_SET) #define SET_ICC_N_FLAG do { m_psr |= PSR_N_MASK; } while(0) #define CLEAR_ICC_N_FLAG do { m_psr &= ~PSR_N_MASK; } while(0) #define ICC_Z_SET (m_psr & PSR_Z_MASK) -#define ICC_Z (ICC_Z_SET ? 1 : 0) +#define ICC_Z (ICC_Z_SET >> PSR_Z_SHIFT) #define ICC_Z_CLEAR (!ICC_Z_SET) #define SET_ICC_Z_FLAG do { m_psr |= PSR_Z_MASK; } while(0) #define CLEAR_ICC_Z_FLAG do { m_psr &= ~PSR_Z_MASK; } while(0) #define ICC_V_SET (m_psr & PSR_V_MASK) -#define ICC_V (ICC_V_SET ? 1 : 0) +#define ICC_V (ICC_V_SET >> PSR_V_SHIFT) #define ICC_V_CLEAR (!ICC_V_SET) #define SET_ICC_V_FLAG do { m_psr |= PSR_V_MASK; } while(0) #define CLEAR_ICC_V_FLAG do { m_psr &= ~PSR_V_MASK; } while(0) #define ICC_C_SET (m_psr & PSR_C_MASK) -#define ICC_C (ICC_C_SET ? 1 : 0) +#define ICC_C (ICC_C_SET >> PSR_C_SHIFT) #define ICC_C_CLEAR (!ICC_C_SET) #define SET_ICC_C_FLAG do { m_psr |= PSR_C_MASK; } while(0) #define CLEAR_ICC_C_FLAG do { m_psr &= ~PSR_C_MASK; } while(0) @@ -81,7 +85,9 @@ #define WIM m_wim #define TBR m_tbr -#define OP (op >> 30) // gangnam style +#define OP_NS (op & 0xc0000000) + +#define OP (op >> 30) #define OP2 ((op >> 22) & 7) #define OP3 ((op >> 19) & 63) #define OPF ((op >> 5) & 0x1ff) @@ -103,24 +109,25 @@ #define SHCNT32 (op & 31) #define SHCNT64 (op & 63) #define IAMODE (op & 0x7) -#define USEIMM ((op >> 13) & 1) -#define USEEXT ((op >> 12) & 1) +#define USEIMM (op & (1 << 13)) +#define USEEXT (op & (1 << 12)) #define COND ((op >> 25) & 15) #define RCOND ((op >> 10) & 7) #define MOVCOND ((op >> 14) & 15) -#define PRED ((op >> 19) & 1) -#define ANNUL ((op >> 29) & 1) +#define PRED (op & (1 << 19)) +#define ANNUL (op & (1 << 29)) #define BRCC ((op >> 20) & 3) #define MOVCC (((op >> 11) & 3) | ((op >> 16) & 4)) #define OPFCC ((op >> 11) & 7) #define TCCCC ((op >> 11) & 3) -#define ASI ((op >> 5) & 255) +#define ASI (uint8_t)(op >> 5) #define MMASK (op & 15) #define CMASK ((op >> 4) & 7) #define RD ((op >> 25) & 31) +#define RDBITS (op & 0x3e000000) #define RS1 ((op >> 14) & 31) #define RS2 (op & 31) @@ -148,10 +155,15 @@ #define UPDATE_PC true #define PC_UPDATED false -#define OP_TYPE0 0 -#define OP_CALL 1 -#define OP_ALU 2 -#define OP_LDST 3 +#define OP_TYPE0 u32(0) +#define OP_CALL u32(1) +#define OP_ALU u32(2) +#define OP_LDST u32(3) + +#define OP_TYPE0_NS (OP_TYPE0 << 30) +#define OP_CALL_NS (OP_CALL << 30) +#define OP_ALU_NS (OP_ALU << 30) +#define OP_LDST_NS (OP_LDST << 30) #define OP2_UNIMP 0 #define OP2_BICC 2 @@ -208,6 +220,7 @@ #define OP3_JMPL 56 #define OP3_RETT 57 #define OP3_TICC 58 +#define OP3_IFLUSH 59 #define OP3_SAVE 60 #define OP3_RESTORE 61 diff --git a/src/devices/cpu/sparc/sparcv8ops.ipp b/src/devices/cpu/sparc/sparcv8ops.ipp index 28149ef6778..b2611d694f2 100644 --- a/src/devices/cpu/sparc/sparcv8ops.ipp +++ b/src/devices/cpu/sparc/sparcv8ops.ipp @@ -245,7 +245,7 @@ void mb86901_device::execute_div(uint32_t op) { uint32_t result = 0; bool temp_v = false; - int64_t temp_64bit; + int64_t temp_64bit = 0; if (UDIV || UDIVCC) { temp_64bit = int64_t(uint64_t((uint64_t(Y) << 32) | uint64_t(RS1REG)) / operand2); diff --git a/src/devices/cpu/st62xx/st62xx_dasm.cpp b/src/devices/cpu/st62xx/st62xx_dasm.cpp index 7328cc32a7c..6905a918611 100644 --- a/src/devices/cpu/st62xx/st62xx_dasm.cpp +++ b/src/devices/cpu/st62xx/st62xx_dasm.cpp @@ -19,7 +19,7 @@ uint32_t st62xx_disassembler::opcode_alignment() const std::string st62xx_disassembler::reg_name(const uint8_t reg) { - static const char* REG_NAMES[256] = + static char const *const REG_NAMES[256] = { nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, diff --git a/src/devices/cpu/tms32025/tms32025.cpp b/src/devices/cpu/tms32025/tms32025.cpp index 6d4b463cb22..a3f8c588869 100644 --- a/src/devices/cpu/tms32025/tms32025.cpp +++ b/src/devices/cpu/tms32025/tms32025.cpp @@ -184,6 +184,14 @@ Table 3-2. TMS32025/26 Memory Blocks #define IND m_AR[ARP] /* address used in indirect memory access operations */ +/* + Processor can be operated in one of two modes based on Pin 1 (MP/MC) + MP/MC = 1 (Microprocessor Mode) + MP/MC = 0 (Microcomputer Mode) + in 'Microcomputer' mode the 4K Word internal ROM is used (TMS320C25) + + use set_mp_mc in the device configuration to set the pin for internal ROM mode +*/ DEFINE_DEVICE_TYPE(TMS32025, tms32025_device, "tms32025", "Texas Instruments TMS32025") DEFINE_DEVICE_TYPE(TMS32026, tms32026_device, "tms32026", "Texas Instruments TMS32026") @@ -214,18 +222,29 @@ void tms32025_device::tms32026_data(address_map &map) map(0x0600, 0x07ff).ram().share("b3"); } +#if 0 +// Instead of using the map here we install the ROM depending on the MP/MC pin set in the config +void tms32025_device::tms32025_program(address_map &map) +{ + map(0x0000, 0x0fff).rom().region("internal", 0); // 4K Words Internal ROM / EPROM +} +#endif -tms32025_device::tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : tms32025_device(mconfig, TMS32025, tag, owner, clock, address_map_constructor(FUNC(tms32025_device::tms32025_data), this)) +ROM_START( tms32025 ) + ROM_REGION16_BE( 0x2000, "internal", ROMREGION_ERASE00 ) + // use blank data if internal ROM is not programmed +ROM_END + +const tiny_rom_entry *tms32025_device::device_rom_region() const { - m_fixed_STR1 = 0x0180; + return ROM_NAME(tms32025); } -tms32025_device::tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map) +tms32025_device::tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prgmap, address_map_constructor datamap) : cpu_device(mconfig, type, tag, owner, clock) - , m_program_config("program", ENDIANNESS_BIG, 16, 16, -1) - , m_data_config("data", ENDIANNESS_BIG, 16, 16, -1, map) + , m_program_config("program", ENDIANNESS_BIG, 16, 16, -1, prgmap) + , m_data_config("data", ENDIANNESS_BIG, 16, 16, -1, datamap) , m_io_config("io", ENDIANNESS_BIG, 16, 16, -1) , m_b0(*this, "b0") , m_b1(*this, "b1") @@ -237,12 +256,24 @@ tms32025_device::tms32025_device(const machine_config &mconfig, device_type type , m_xf_out(*this) , m_dr_in(*this) , m_dx_out(*this) + , m_mp_mc(true) { } +tms32025_device::tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : tms32025_device(mconfig, TMS32025, tag, owner, clock, address_map_constructor(), address_map_constructor(FUNC(tms32025_device::tms32025_data), this)) +{ + m_fixed_STR1 = 0x0180; +} + +tms32025_device::tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : tms32025_device(mconfig, type, tag, owner, clock, address_map_constructor(), address_map_constructor(FUNC(tms32025_device::tms32025_data), this)) +{ + m_fixed_STR1 = 0x0180; +} tms32026_device::tms32026_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : tms32025_device(mconfig, TMS32026, tag, owner, clock, address_map_constructor(FUNC(tms32026_device::tms32026_data), this)) + : tms32025_device(mconfig, TMS32026, tag, owner, clock, address_map_constructor(), address_map_constructor(FUNC(tms32026_device::tms32026_data), this)) { m_fixed_STR1 = 0x0100; } @@ -1625,6 +1656,11 @@ void tms32025_device::device_start() m_data = &space(AS_DATA); m_io = &space(AS_IO); + if (!m_mp_mc) // if pin 1 is 0 then we're using internal ROM + { + m_program->install_rom(0x0000, 0x0fff, memregion("internal")->base()); + } + m_bio_in.resolve_safe(0xffff); m_hold_in.resolve_safe(0xffff); m_hold_ack_out.resolve_safe(); @@ -1653,42 +1689,37 @@ void tms32025_device::device_start() m_mHackIgnoreARP = 0; m_waiting_for_serial_frame = 0; + save_item(NAME(m_PREVPC)); save_item(NAME(m_PC)); + save_item(NAME(m_PFC)); save_item(NAME(m_STR0)); save_item(NAME(m_STR1)); - save_item(NAME(m_PFC)); save_item(NAME(m_IFR)); save_item(NAME(m_RPTC)); save_item(NAME(m_ACC.d)); save_item(NAME(m_ALU.d)); save_item(NAME(m_Preg.d)); save_item(NAME(m_Treg)); - save_item(NAME(m_AR[0])); - save_item(NAME(m_AR[1])); - save_item(NAME(m_AR[2])); - save_item(NAME(m_AR[3])); - save_item(NAME(m_AR[4])); - save_item(NAME(m_AR[5])); - save_item(NAME(m_AR[6])); - save_item(NAME(m_AR[7])); - save_item(NAME(m_STACK[0])); - save_item(NAME(m_STACK[1])); - save_item(NAME(m_STACK[2])); - save_item(NAME(m_STACK[3])); - save_item(NAME(m_STACK[4])); - save_item(NAME(m_STACK[5])); - save_item(NAME(m_STACK[6])); - save_item(NAME(m_STACK[7])); - - save_item(NAME(m_oldacc)); - save_item(NAME(m_memaccess)); - save_item(NAME(m_mHackIgnoreARP)); + save_item(NAME(m_AR)); + save_item(NAME(m_STACK)); + + save_item(NAME(m_drr)); + save_item(NAME(m_dxr)); + save_item(NAME(m_tim)); + save_item(NAME(m_prd)); + save_item(NAME(m_imr)); + save_item(NAME(m_greg)); + save_item(NAME(m_timerover)); save_item(NAME(m_idle)); save_item(NAME(m_hold)); save_item(NAME(m_external_mem_access)); save_item(NAME(m_init_load_addr)); - save_item(NAME(m_PREVPC)); + + save_item(NAME(m_oldacc.d)); + save_item(NAME(m_memaccess)); + save_item(NAME(m_waiting_for_serial_frame)); + save_item(NAME(m_mp_mc)); state_add( TMS32025_PC, "PC", m_PC).formatstr("%04X"); state_add( TMS32025_STR0, "STR0", m_STR0).formatstr("%04X"); diff --git a/src/devices/cpu/tms32025/tms32025.h b/src/devices/cpu/tms32025/tms32025.h index 4deaac2423f..924f0a774cc 100644 --- a/src/devices/cpu/tms32025/tms32025.h +++ b/src/devices/cpu/tms32025/tms32025.h @@ -63,6 +63,7 @@ class tms32025_device : public cpu_device public: // construction/destruction tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); // configuration helpers auto bio_in_cb() { return m_bio_in.bind(); } @@ -72,6 +73,8 @@ public: auto dr_in_cb() { return m_dr_in.bind(); } auto dx_out_cb() { return m_dx_out.bind(); } + void set_mp_mc(bool state) { m_mp_mc = state; } + DECLARE_READ16_MEMBER( drr_r); DECLARE_WRITE16_MEMBER(drr_w); DECLARE_READ16_MEMBER( dxr_r); @@ -85,10 +88,11 @@ public: DECLARE_READ16_MEMBER( greg_r); DECLARE_WRITE16_MEMBER(greg_w); + //void tms32025_program(address_map &map); void tms32025_data(address_map &map); void tms32026_data(address_map &map); protected: - tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map); + tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prgmap, address_map_constructor datamap); // device-level overrides virtual void device_start() override; @@ -110,6 +114,8 @@ protected: // device_disasm_interface overrides virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; + virtual const tiny_rom_entry *device_rom_region() const override; + void common_reset(); address_space_config m_program_config; @@ -177,6 +183,7 @@ protected: int m_icount; int m_mHackIgnoreARP; /* special handling for lst, lst1 instructions */ int m_waiting_for_serial_frame; + bool m_mp_mc; inline void CLR0(uint16_t flag); inline void SET0(uint16_t flag); @@ -370,7 +377,6 @@ protected: virtual void conf() override; }; - DECLARE_DEVICE_TYPE(TMS32025, tms32025_device) DECLARE_DEVICE_TYPE(TMS32026, tms32026_device) diff --git a/src/devices/cpu/tms32082/dis_mp.cpp b/src/devices/cpu/tms32082/dis_mp.cpp index 75c63543256..be0f9d92074 100644 --- a/src/devices/cpu/tms32082/dis_mp.cpp +++ b/src/devices/cpu/tms32082/dis_mp.cpp @@ -8,7 +8,7 @@ #define SIMM15(v) (int32_t)((v & 0x4000) ? (v | 0xffffe000) : (v)) #define UIMM15(v) (v) -const char *tms32082_mp_disassembler::BCND_CONDITION[32] = +char const *const tms32082_mp_disassembler::BCND_CONDITION[32] = { "nev.b", "gt0.b", "eq0.b", "ge0.b", "lt0.b", "ne0.b", "le0.b", "alw.b", "nev.h", "gt0.h", "eq0.h", "ge0.h", "lt0.h", "ne0.h", "le0.h", "alw.h", @@ -16,7 +16,7 @@ const char *tms32082_mp_disassembler::BCND_CONDITION[32] = "nev.d", "gt0.d", "eq0.d", "ge0.d", "lt0.d", "ne0.d", "le0.d", "alw.d", }; -const char *tms32082_mp_disassembler::BITNUM_CONDITION[32] = +char const *const tms32082_mp_disassembler::BITNUM_CONDITION[32] = { "eq.b", "ne.b", "gt.b", "le.b", "lt.b", "ge.b", "hi.b", "ls.b", "lo.b", "hs.b", "eq.h", "ne.h", "gt.h", "le.h", "lt.h", "ge.h", @@ -24,27 +24,27 @@ const char *tms32082_mp_disassembler::BITNUM_CONDITION[32] = "lt.w", "ge.w", "hi.w", "ls.w", "lo.w", "hs.w", "?", "?", }; -const char *tms32082_mp_disassembler::MEMOP_S[2] = +char const *const tms32082_mp_disassembler::MEMOP_S[2] = { ":s", "" }; -const char *tms32082_mp_disassembler::MEMOP_M[2] = +char const *const tms32082_mp_disassembler::MEMOP_M[2] = { ":m", "" }; -const char *tms32082_mp_disassembler::FLOATOP_PRECISION[4] = +char const *const tms32082_mp_disassembler::FLOATOP_PRECISION[4] = { "s", "d", "i", "u" }; -const char *tms32082_mp_disassembler::ACC_SEL[4] = +char const *const tms32082_mp_disassembler::ACC_SEL[4] = { "A0", "A1", "A2", "A3" }; -const char *tms32082_mp_disassembler::FLOATOP_ROUND[4] = +char const *const tms32082_mp_disassembler::FLOATOP_ROUND[4] = { "n", "z", "p", "m" }; diff --git a/src/devices/cpu/tms32082/dis_mp.h b/src/devices/cpu/tms32082/dis_mp.h index 8c3a0721c1a..d04383cf05d 100644 --- a/src/devices/cpu/tms32082/dis_mp.h +++ b/src/devices/cpu/tms32082/dis_mp.h @@ -17,13 +17,13 @@ public: virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; private: - static const char *BCND_CONDITION[32]; - static const char *BITNUM_CONDITION[32]; - static const char *MEMOP_S[2]; - static const char *MEMOP_M[2]; - static const char *FLOATOP_PRECISION[4]; - static const char *ACC_SEL[4]; - static const char *FLOATOP_ROUND[4]; + static char const *const BCND_CONDITION[32]; + static char const *const BITNUM_CONDITION[32]; + static char const *const MEMOP_S[2]; + static char const *const MEMOP_M[2]; + static char const *const FLOATOP_PRECISION[4]; + static char const *const ACC_SEL[4]; + static char const *const FLOATOP_ROUND[4]; std::ostream *output; diff --git a/src/devices/cpu/tms32082/dis_pp.cpp b/src/devices/cpu/tms32082/dis_pp.cpp index 8a3a6475ba0..8d15555b610 100644 --- a/src/devices/cpu/tms32082/dis_pp.cpp +++ b/src/devices/cpu/tms32082/dis_pp.cpp @@ -5,7 +5,7 @@ #include "emu.h" #include "dis_pp.h" -const char *tms32082_pp_disassembler::REG_NAMES[128] = +char const *const tms32082_pp_disassembler::REG_NAMES[128] = { // 0 - 15 "a0", "a1", "a2", "a3", "a4", "???", "a6", "a7", @@ -33,7 +33,7 @@ const char *tms32082_pp_disassembler::REG_NAMES[128] = "???", "???", "???", "???", "tag0", "tag1", "tag2", "tag3" }; -const char *tms32082_pp_disassembler::CONDITION_CODES[16] = +char const *const tms32082_pp_disassembler::CONDITION_CODES[16] = { "", "[p] ", "[ls] ", "[hi] ", "[lt] ", "[le] ", "[ge] ", "[gt] ", @@ -41,7 +41,7 @@ const char *tms32082_pp_disassembler::CONDITION_CODES[16] = "[v] ", "[nv] ", "[n] ", "[nn] " }; -const char *tms32082_pp_disassembler::TRANSFER_SIZE[4] = +char const *const tms32082_pp_disassembler::TRANSFER_SIZE[4] = { "b:", "h:", "w:", "" }; diff --git a/src/devices/cpu/tms32082/dis_pp.h b/src/devices/cpu/tms32082/dis_pp.h index 6541eeccb70..a2f37ea26c8 100644 --- a/src/devices/cpu/tms32082/dis_pp.h +++ b/src/devices/cpu/tms32082/dis_pp.h @@ -17,9 +17,9 @@ public: virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; private: - static const char *REG_NAMES[128]; - static const char *CONDITION_CODES[16]; - static const char *TRANSFER_SIZE[4]; + static char const *const REG_NAMES[128]; + static char const *const CONDITION_CODES[16]; + static char const *const TRANSFER_SIZE[4]; std::ostream *output; diff --git a/src/devices/cpu/tms9900/tms9900.cpp b/src/devices/cpu/tms9900/tms9900.cpp index 61ee5644d7f..8f092a3159d 100644 --- a/src/devices/cpu/tms9900/tms9900.cpp +++ b/src/devices/cpu/tms9900/tms9900.cpp @@ -328,7 +328,7 @@ void tms99xx_device::device_reset() m_irq_state = false; } -const char* tms99xx_device::s_statename[20] = +char const *const tms99xx_device::s_statename[20] = { "PC", "WP", "ST", "IR", "R0", "R1", "R2", "R3", @@ -405,7 +405,7 @@ void tms99xx_device::state_export(const device_state_entry &entry) */ void tms99xx_device::state_string_export(const device_state_entry &entry, std::string &str) const { - static const char *statestr = "LAECOPX-----IIII"; + static char const statestr[] = "LAECOPX-----IIII"; char flags[17]; for (auto &flag : flags) flag = 0x00; uint16_t val = 0x8000; diff --git a/src/devices/cpu/tms9900/tms9900.h b/src/devices/cpu/tms9900/tms9900.h index c223e093432..0c9084579c5 100644 --- a/src/devices/cpu/tms9900/tms9900.h +++ b/src/devices/cpu/tms9900/tms9900.h @@ -223,7 +223,7 @@ private: // State / debug management uint16_t m_state_any; - static const char* s_statename[]; + static char const *const s_statename[]; virtual void state_import(const device_state_entry &entry) override; virtual void state_export(const device_state_entry &entry) override; virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; diff --git a/src/devices/cpu/tms9900/tms9980a.cpp b/src/devices/cpu/tms9900/tms9980a.cpp index aebe26f9575..a2ad92feda7 100644 --- a/src/devices/cpu/tms9900/tms9980a.cpp +++ b/src/devices/cpu/tms9900/tms9980a.cpp @@ -39,6 +39,10 @@ - Memory accesses are always 2 bytes (even address byte, odd address byte) even for byte operations. Thus the 9980A, like the TMS9900, needs to pre-fetch the word at the destination before overwriting it. + - Whereas the TMS9900 relies on the TMS9904 to generate its four phase + clocks, the TMS9980A takes a single 6 MHz to 10 MHz clock input and + divides it by four internally. Only the phase 3 clock is provided as an + output for peripherals. - On the cycle level both TMS9900 and TMS9980A are equal, except for the additional cycles needed for memory read and write access. Accordingly, the emulation shares the core and the microprograms and redefines the @@ -46,6 +50,10 @@ - The 9980A has the same external instructions as the TMS9900, but it indicates the command via A0, A1, and A13 (instead of A0-A2). + TMS9981 is almost identical to TMS9980A except for deleting the -5V Vbb input + and allowing a crystal oscillator to be connected to pins 34 and 33 (OSCOUT). + The D0-D7, INT0-2 and /PHI3 pins are shifted to accommodate this feature. + For pin definitions see tms9900.c Michael Zapf, 2012 @@ -76,8 +84,18 @@ Constructor ****************************************************************************/ +tms9980a_device::tms9980a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : tms99xx_device(mconfig, type, tag, 8, 14, 11, owner, clock) +{ +} + tms9980a_device::tms9980a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : tms99xx_device(mconfig, TMS9980A, tag, 8, 14, 11, owner, clock) + : tms9980a_device(mconfig, TMS9980A, tag, owner, clock) +{ +} + +tms9981_device::tms9981_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : tms9980a_device(mconfig, TMS9981, tag, owner, clock) { } @@ -294,3 +312,4 @@ std::unique_ptr<util::disasm_interface> tms9980a_device::create_disassembler() } DEFINE_DEVICE_TYPE(TMS9980A, tms9980a_device, "tms9980a", "Texas Instruments TMS9980A") +DEFINE_DEVICE_TYPE(TMS9981, tms9981_device, "tms9981", "Texas Instruments TMS9981") diff --git a/src/devices/cpu/tms9900/tms9980a.h b/src/devices/cpu/tms9900/tms9980a.h index 970a5f70839..23abc082eb1 100644 --- a/src/devices/cpu/tms9900/tms9980a.h +++ b/src/devices/cpu/tms9900/tms9980a.h @@ -30,6 +30,8 @@ public: tms9980a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: + tms9980a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + void mem_read(void) override; void mem_write(void) override; void acquire_instruction(void) override; @@ -44,13 +46,23 @@ protected: uint32_t execute_input_lines() const override; void execute_set_input(int irqline, int state) override; + virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; } + virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); } + virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; address_space_config m_program_config80; address_space_config m_io_config80; }; +class tms9981_device : public tms9980a_device +{ +public: + tms9981_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + // device type definition DECLARE_DEVICE_TYPE(TMS9980A, tms9980a_device) +DECLARE_DEVICE_TYPE(TMS9981, tms9981_device) #endif // MAME_CPU_TMS9900_TMS9980A_H diff --git a/src/devices/cpu/tms9900/tms9995.cpp b/src/devices/cpu/tms9900/tms9995.cpp index 8458b2f656d..c83f74ac073 100644 --- a/src/devices/cpu/tms9900/tms9995.cpp +++ b/src/devices/cpu/tms9900/tms9995.cpp @@ -305,7 +305,7 @@ void tms9995_device::device_start() // save_item(NAME(m_first_cycle)); // only for log output } -const char* tms9995_device::s_statename[20] = +char const *const tms9995_device::s_statename[20] = { "PC", "WP", "ST", "IR", "R0", "R1", "R2", "R3", @@ -384,7 +384,7 @@ void tms9995_device::state_export(const device_state_entry &entry) */ void tms9995_device::state_string_export(const device_state_entry &entry, std::string &str) const { - static const char *statestr = "LAECOPX-----IIII"; + static char const statestr[] = "LAECOPX-----IIII"; char flags[17]; memset(flags, 0x00, ARRAY_LENGTH(flags)); uint16_t val = 0x8000; diff --git a/src/devices/cpu/tms9900/tms9995.h b/src/devices/cpu/tms9900/tms9995.h index dbabb79f5d1..72dfc2960a1 100644 --- a/src/devices/cpu/tms9900/tms9995.h +++ b/src/devices/cpu/tms9900/tms9995.h @@ -88,7 +88,7 @@ protected: private: // State / debug management uint16_t m_state_any; - static const char* s_statename[]; + static char const *const s_statename[]; void state_import(const device_state_entry &entry) override; void state_export(const device_state_entry &entry) override; void state_string_export(const device_state_entry &entry, std::string &str) const override; diff --git a/src/devices/cpu/unsp/unsp.cpp b/src/devices/cpu/unsp/unsp.cpp index c8a4025f5cd..ca8b149fe5d 100644 --- a/src/devices/cpu/unsp/unsp.cpp +++ b/src/devices/cpu/unsp/unsp.cpp @@ -1,26 +1,37 @@ // license:BSD-3-Clause // copyright-holders:Ryan Holtz -/**************************\ -* -* SunPlus u'nSP core -* -* by Ryan Holtz -* -\**************************/ +/***************************************************************************** + + SunPlus micro'nSP core + + based primarily on Unununium, by segher + +*****************************************************************************/ #include "emu.h" #include "unsp.h" #include "unspdasm.h" #include "debugger.h" - DEFINE_DEVICE_TYPE(UNSP, unsp_device, "unsp", "SunPlus u'nSP") unsp_device::unsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : cpu_device(mconfig, UNSP, tag, owner, clock) , m_program_config("program", ENDIANNESS_BIG, 16, 23, -1) - , m_irq(0), m_fiq(0), m_curirq(0), m_sirq(0), m_sb(0), m_saved_sb(0), m_program(nullptr), m_icount(0), m_debugger_temp(0) + , m_enable_irq(false) + , m_enable_fiq(false) + , m_irq(false) + , m_fiq(false) + , m_curirq(0) + , m_sirq(0) + , m_sb(0) + , m_program(nullptr) + , m_icount(0) + , m_debugger_temp(0) +#if UNSP_LOG_OPCODES + , m_log_ops(0) +#endif { } @@ -57,54 +68,6 @@ std::unique_ptr<util::disasm_interface> unsp_device::create_disassembler() #define UNSP_S 0x0080 #define UNSP_C 0x0040 -#define STANDARD_ALU_CASES \ - case 0: \ - lres = r0 + r1; \ - unsp_update_nzsc(lres, r0, r1); \ - break; \ - case 1: \ - lres = r0 + r1; \ - if(UNSP_REG(SR) & UNSP_C) lres++; \ - unsp_update_nzsc(lres, r0, r1); \ - break; \ - case 3: \ - lres = r0 + (~r1 & 0x0000ffff); \ - if(UNSP_REG(SR) & UNSP_C) lres++; \ - unsp_update_nzsc(lres, r0, r1); \ - break; \ - case 2: \ - case 4: \ - lres = r0 + (~r1 & 0x0000ffff) + 1; \ - unsp_update_nzsc(lres, r0, r1); \ - break; \ - case 6: \ - lres = -r1; \ - unsp_update_nz(lres); \ - break; \ - case 8: \ - lres = r0 ^ r1; \ - unsp_update_nz(lres); \ - break; \ - case 9: \ - lres = r1; \ - unsp_update_nz(lres); \ - break; \ - case 10: \ - lres = r0 | r1; \ - unsp_update_nz(lres); \ - break; \ - case 11: \ - case 12: \ - lres = r0 & r1; \ - unsp_update_nz(lres); \ - break - -#define WRITEBACK_OPA \ - if(OP0 != 4 && OP0 < 12) \ - { \ - UNSP_REG_I(OPA) = (uint16_t)lres; \ - } - /*****************************************************************************/ void unsp_device::unimplemented_opcode(uint16_t op) @@ -114,12 +77,12 @@ void unsp_device::unimplemented_opcode(uint16_t op) /*****************************************************************************/ -uint16_t unsp_device::READ16(uint32_t address) +uint16_t unsp_device::read16(uint32_t address) { return m_program->read_word(address); } -void unsp_device::WRITE16(uint32_t address, uint16_t data) +void unsp_device::write16(uint32_t address, uint16_t data) { m_program->write_word(address, data); } @@ -129,32 +92,62 @@ void unsp_device::WRITE16(uint32_t address, uint16_t data) void unsp_device::device_start() { memset(m_r, 0, sizeof(uint16_t) * 16); - m_irq = 0; - m_fiq = 0; + m_enable_irq = false; + m_enable_fiq = false; + m_irq = false; + m_fiq = false; m_curirq = 0; m_sirq = 0; m_sb = 0; - m_saved_sb = 0; + memset(m_saved_sb, 0, sizeof(uint8_t) * 3); m_debugger_temp = 0; m_program = &space(AS_PROGRAM); - state_add( UNSP_SP, "SP", UNSP_REG(SP)).formatstr("%04X"); - state_add( UNSP_R1, "R1", UNSP_REG(R1)).formatstr("%04X"); - state_add( UNSP_R2, "R2", UNSP_REG(R2)).formatstr("%04X"); - state_add( UNSP_R3, "R3", UNSP_REG(R3)).formatstr("%04X"); - state_add( UNSP_R4, "R4", UNSP_REG(R4)).formatstr("%04X"); - state_add( UNSP_BP, "BP", UNSP_REG(BP)).formatstr("%04X"); - state_add( UNSP_SR, "SR", UNSP_REG(SR)).formatstr("%04X"); - state_add( UNSP_PC, "PC", m_debugger_temp).callimport().callexport().formatstr("%06X"); - state_add( UNSP_IRQ, "IRQ", m_irq).formatstr("%1u"); - state_add( UNSP_FIQ, "FIQ", m_fiq).formatstr("%1u"); - state_add( UNSP_SB, "SB", m_sb).formatstr("%1u"); + state_add(STATE_GENFLAGS, "GENFLAGS", UNSP_REG(SR)).callimport().callexport().formatstr("%4s").noshow(); + state_add(UNSP_SP, "SP", UNSP_REG(SP)).formatstr("%04X"); + state_add(UNSP_R1, "R1", UNSP_REG(R1)).formatstr("%04X"); + state_add(UNSP_R2, "R2", UNSP_REG(R2)).formatstr("%04X"); + state_add(UNSP_R3, "R3", UNSP_REG(R3)).formatstr("%04X"); + state_add(UNSP_R4, "R4", UNSP_REG(R4)).formatstr("%04X"); + state_add(UNSP_BP, "BP", UNSP_REG(BP)).formatstr("%04X"); + state_add(UNSP_SR, "SR", UNSP_REG(SR)).formatstr("%04X"); + state_add(UNSP_PC, "PC", m_debugger_temp).callimport().callexport().formatstr("%06X"); + state_add(UNSP_IRQ_EN, "IRQE", m_enable_irq).formatstr("%1u"); + state_add(UNSP_FIQ_EN, "FIQE", m_enable_fiq).formatstr("%1u"); + state_add(UNSP_IRQ, "IRQ", m_irq).formatstr("%1u"); + state_add(UNSP_FIQ, "FIQ", m_fiq).formatstr("%1u"); + state_add(UNSP_SB, "SB", m_sb).formatstr("%1u"); +#if UNSP_LOG_OPCODES + state_add(UNSP_LOG_OPS,"LOG", m_log_ops).formatstr("%1u"); +#endif state_add(STATE_GENPC, "GENPC", m_debugger_temp).callexport().noshow(); state_add(STATE_GENPCBASE, "CURPC", m_debugger_temp).callexport().noshow(); set_icountptr(m_icount); + + save_item(NAME(m_r)); + save_item(NAME(m_enable_irq)); + save_item(NAME(m_enable_fiq)); + save_item(NAME(m_irq)); + save_item(NAME(m_fiq)); + save_item(NAME(m_curirq)); + save_item(NAME(m_sirq)); + save_item(NAME(m_sb)); + save_item(NAME(m_saved_sb)); +} + +void unsp_device::state_string_export(const device_state_entry &entry, std::string &str) const +{ + switch (entry.index()) + { + case STATE_GENFLAGS: + { + const uint16_t sr = UNSP_REG(SR); + str = string_format("%c%c%c%c", (sr & UNSP_N) ? 'N' : ' ', (sr & UNSP_Z) ? 'Z' : ' ', (sr & UNSP_S) ? 'S' : ' ', (sr & UNSP_C) ? 'C' : ' '); + } + } } void unsp_device::state_export(const device_state_entry &entry) @@ -184,14 +177,16 @@ void unsp_device::device_reset() { memset(m_r, 0, sizeof(uint16_t) * 16); - UNSP_REG(PC) = READ16(0xfff7); - m_irq = 0; - m_fiq = 0; + UNSP_REG(PC) = read16(0xfff7); + m_enable_irq = false; + m_enable_fiq = false; + m_irq = false; + m_fiq = false; } /*****************************************************************************/ -void unsp_device::unsp_update_nz(uint32_t value) +void unsp_device::update_nz(uint32_t value) { UNSP_REG(SR) &= ~(UNSP_N | UNSP_Z); if(value & 0x8000) @@ -204,10 +199,9 @@ void unsp_device::unsp_update_nz(uint32_t value) } } -void unsp_device::unsp_update_nzsc(uint32_t value, uint16_t r0, uint16_t r1) +void unsp_device::update_sc(uint32_t value, uint16_t r0, uint16_t r1) { UNSP_REG(SR) &= ~(UNSP_C | UNSP_S); - unsp_update_nz(value); if(value != (uint16_t)value) { UNSP_REG(SR) |= UNSP_C; @@ -219,30 +213,114 @@ void unsp_device::unsp_update_nzsc(uint32_t value, uint16_t r0, uint16_t r1) } } -void unsp_device::unsp_push(uint16_t value, uint16_t *reg) +void unsp_device::push(uint16_t value, uint16_t *reg) +{ + write16((*reg)--, value); +} + +uint16_t unsp_device::pop(uint16_t *reg) { - WRITE16((*reg)--, value); + return read16(++(*reg)); } -uint16_t unsp_device::unsp_pop(uint16_t *reg) +void unsp_device::trigger_fiq() { - return READ16(++(*reg)); + if (!m_enable_fiq || m_fiq || m_irq) + { + return; + } + + m_fiq = true; + + m_saved_sb[m_irq ? 1 : 0] = m_sb; + m_sb = m_saved_sb[2]; + + push(UNSP_REG(PC), &UNSP_REG(SP)); + push(UNSP_REG(SR), &UNSP_REG(SP)); + UNSP_REG(PC) = read16(0xfff6); + UNSP_REG(SR) = 0; +} + +void unsp_device::trigger_irq(int line) +{ + if (!m_enable_irq || m_irq || m_fiq) + { + //logerror("Enable %d, IRQ %d, FIQ %d, bailing\n", m_enable_irq ? 1 : 0, m_irq ? 1 : 0, m_fiq ? 1 : 0); + return; + } + + m_irq = true; + + m_saved_sb[0] = m_sb; + m_sb = m_saved_sb[1]; + + push(UNSP_REG(PC), &UNSP_REG(SP)); + push(UNSP_REG(SR), &UNSP_REG(SP)); + UNSP_REG(PC) = read16(0xfff8 + line); + UNSP_REG(SR) = 0; +} + +void unsp_device::check_irqs() +{ + if (!m_sirq) + return; + + int highest_irq = -1; + for (int i = 0; i <= 8; i++) + { + if (BIT(m_sirq, i)) + { + highest_irq = i; + break; + } + } + + if (highest_irq < 0) + return; + + if (highest_irq == UNSP_FIQ_LINE) + { + //logerror("Trying to trigger FIQ\n"); + trigger_fiq(); + } + else + { + //logerror("Trying to trigger IRQ\n"); + trigger_irq(highest_irq - 1); + } } void unsp_device::execute_run() { - uint32_t op; - uint32_t lres; - uint16_t r0, r1; - lres = 0; +#if UNSP_LOG_OPCODES + unsp_disassembler dasm; +#endif + + uint32_t lres = 0; + uint16_t r0 = 0; + uint16_t r1 = 0; + uint32_t r2 = 0; while (m_icount > 0) { + check_irqs(); + debugger_instruction_hook(UNSP_LPC); - op = READ16(UNSP_LPC); + const uint32_t op = read16(UNSP_LPC); + +#if UNSP_LOG_OPCODES + if (m_log_ops) + { + std::stringstream strbuffer; + dasm.disassemble(strbuffer, UNSP_LPC, op, read16(UNSP_LPC+1)); + logerror("%06x: %s\n", UNSP_LPC, strbuffer.str().c_str()); + } +#endif UNSP_REG(PC)++; + const uint8_t lower_op = (OP1 << 4) | OP0; + if(OP0 < 0xf && OPA == 0x7 && OP1 < 2) { switch(OP0) @@ -250,560 +328,563 @@ void unsp_device::execute_run() case 0: // JB if(!(UNSP_REG(SR) & UNSP_C)) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 1: // JAE if(UNSP_REG(SR) & UNSP_C) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 2: // JGE if(!(UNSP_REG(SR) & UNSP_S)) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 3: // JL if(UNSP_REG(SR) & UNSP_S) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 4: // JNE if(!(UNSP_REG(SR) & UNSP_Z)) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 5: // JE if(UNSP_REG(SR) & UNSP_Z) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 6: // JPL if(!(UNSP_REG(SR) & UNSP_N)) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 7: // JMI if(UNSP_REG(SR) & UNSP_N) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 8: // JBE if((UNSP_REG(SR) & (UNSP_Z | UNSP_C)) != UNSP_C) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 9: // JA if((UNSP_REG(SR) & (UNSP_Z | UNSP_C)) == UNSP_C) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 10: // JLE if(UNSP_REG(SR) & (UNSP_Z | UNSP_S)) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 11: // JG if(!(UNSP_REG(SR) & (UNSP_Z | UNSP_S))) { + m_icount -= 4; UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); } - break; + else + m_icount -= 2; + continue; case 14: // JMP UNSP_REG(PC) += (OP1 == 0) ? OPIMM : (0 - OPIMM); - break; + m_icount -= 4; + continue; + default: + unimplemented_opcode(op); + continue; } } - else + else if (lower_op == 0x2d) // Push + { + r0 = OPN; + r1 = OPA; + m_icount -= 4 + 2 * r0; + + while (r0--) + { + push(UNSP_REG_I(r1--), &UNSP_REG_I(OPB)); + } + continue; + } + else if (lower_op == 0x29) // Pop + { + if (op == 0x9a98) // reti + { + m_icount -= 8; + UNSP_REG(SR) = pop(&UNSP_REG(SP)); + UNSP_REG(PC) = pop(&UNSP_REG(SP)); + + if(m_fiq) + { + m_fiq = false; + m_saved_sb[2] = m_sb; + m_sb = m_saved_sb[m_irq ? 1 : 0]; + } + else if(m_irq) + { + m_irq = false; + m_saved_sb[1] = m_sb; + m_sb = m_saved_sb[0]; + } + m_curirq = 0; + + check_irqs(); + continue; + } + else + { + r0 = OPN; + r1 = OPA; + m_icount -= 4 + 2 * r0; + + while (r0--) + { + UNSP_REG_I(++r1) = pop(&UNSP_REG_I(OPB)); + } + continue; + } + } + else if (OP0 == 0xf) { - switch((OP1 << 4) | OP0) + switch (OP1) { - // r, [bp+imm6] - case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x06: case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: - r0 = UNSP_REG_I(OPA); - r1 = READ16(UNSP_REG(BP) + OPIMM); - switch(OP0) + case 0x00: // Multiply, Unsigned * Signed + if(OPN == 1 && OPA != 7) { - STANDARD_ALU_CASES; - case 13: // store r, [bp+imm6] - WRITE16(UNSP_REG(BP) + OPIMM, UNSP_REG_I(OPA)); - break; - default: - unimplemented_opcode(op); - break; + m_icount -= 12; + lres = UNSP_REG_I(OPA) * UNSP_REG_I(OPB); + if(UNSP_REG_I(OPB) & 0x8000) + { + lres -= UNSP_REG_I(OPA) << 16; + } + UNSP_REG(R4) = lres >> 16; + UNSP_REG(R3) = (uint16_t)lres; } - WRITEBACK_OPA; - break; - - // r, imm6 - case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x16: case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: - r0 = UNSP_REG_I(OPA); - r1 = OPIMM; - switch(OP0) + else { - STANDARD_ALU_CASES; - default: - unimplemented_opcode(op); - break; + unimplemented_opcode(op); } - WRITEBACK_OPA; - break; + continue; - // Pop / Interrupt return - case 0x29: - if(op == 0x9a90) // retf + case 0x01: // Call + if(!(OPA & 1)) { - UNSP_REG(SR) = unsp_pop(&UNSP_REG(SP)); - UNSP_REG(PC) = unsp_pop(&UNSP_REG(SP)); - break; + m_icount -= 9; + r1 = read16(UNSP_LPC); + UNSP_REG(PC)++; + push(UNSP_REG(PC), &UNSP_REG(SP)); + push(UNSP_REG(SR), &UNSP_REG(SP)); + UNSP_REG(PC) = r1; + UNSP_REG(SR) &= 0xffc0; + UNSP_REG(SR) |= OPIMM; } - else if(op == 0x9a98) // reti + else { - int i; - UNSP_REG(SR) = unsp_pop(&UNSP_REG(SP)); - UNSP_REG(PC) = unsp_pop(&UNSP_REG(SP)); - if(m_fiq & 2) - { - m_fiq &= 1; - } - else if(m_irq & 2) - { - m_irq &= 1; - } - m_sirq &= ~(1 << m_curirq); - for(i = 0; i < 9; i++) + unimplemented_opcode(op); + } + continue; + + case 0x02: // Far Jump + if (OPA == 7) + { + m_icount -= 5; + UNSP_REG(PC) = read16(UNSP_LPC); + UNSP_REG(SR) &= 0xffc0; + UNSP_REG(SR) |= OPIMM; + } + else + { + unimplemented_opcode(op); + } + continue; + + case 0x04: // Multiply, Signed * Signed + if(OPN == 1 && OPA != 7) + { + m_icount -= 12; + lres = UNSP_REG_I(OPA) * UNSP_REG_I(OPB); + if(UNSP_REG_I(OPB) & 0x8000) { - if((m_sirq & (1 << i)) != 0 && i != m_curirq) - { - m_sirq &= ~(1 << i); - m_curirq = 0; - execute_set_input(UNSP_IRQ0_LINE + i, 1); - i = -1; - break; - } + lres -= UNSP_REG_I(OPA) << 16; } - if(i != -1) + if(UNSP_REG_I(OPA) & 0x8000) { - m_curirq = 0; + lres -= UNSP_REG_I(OPB) << 16; } - break; + UNSP_REG(R4) = lres >> 16; + UNSP_REG(R3) = (uint16_t)lres; } else { - r0 = OPN; - r1 = OPA; - while(r0--) - { - UNSP_REG_I(++r1) = unsp_pop(&UNSP_REG_I(OPB)); - } + unimplemented_opcode(op); } - break; + continue; - // Push - case 0x2d: - r0 = OPN; - r1 = OPA; - while(r0--) + case 0x05: // Interrupt flags + m_icount -= 2; + switch(OPIMM) { - unsp_push(UNSP_REG_I(r1--), &UNSP_REG_I(OPB)); + case 0: + m_enable_irq = false; + m_enable_fiq = false; + break; + case 1: + m_enable_irq = true; + m_enable_fiq = false; + break; + case 2: + m_enable_irq = false; + m_enable_fiq = true; + break; + case 3: + m_enable_irq = true; + m_enable_fiq = true; + break; + case 8: // irq off + m_enable_irq = false; + break; + case 9: // irq on + m_enable_irq = true; + break; + case 12: // fiq off + m_enable_fiq = false; + break; + case 14: // fiq on + m_enable_fiq = true; + break; + case 37: // nop + break; + default: + unimplemented_opcode(op); + break; } - break; + continue; + + default: + unimplemented_opcode(op); + continue; + } + } + + // At this point, we should be dealing solely with ALU ops. + + r0 = UNSP_REG_I(OPA); + + switch (OP1) + { + case 0x00: // r, [bp+imm6] + m_icount -= 6; + + r2 = (uint16_t)(UNSP_REG(BP) + OPIMM); + if (OP0 != 0x0d) + r1 = read16(r2); + break; + + case 0x01: // r, imm6 + m_icount -= 2; + + r1 = OPIMM; + break; + + case 0x03: // Indirect + { + m_icount -= 6; + if (OPA == 7) + m_icount -= 1; - // ALU, Indirect - case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x36: case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: - switch(OPN & 3) + const uint8_t lsbits = OPN & 3; + const uint8_t opb = OPB; + if (OPN & 4) + { + switch (lsbits) { case 0: // r, [r] - r0 = UNSP_REG_I(OPA); - r1 = READ16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB)); - switch(OP0) - { - STANDARD_ALU_CASES; - case 13: // store r, [r] - WRITE16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB), UNSP_REG_I(OPA)); - break; - default: - unimplemented_opcode(op); - break; - } - WRITEBACK_OPA; + r2 = UNSP_LREG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); break; case 1: // r, [<ds:>r--] - r0 = UNSP_REG_I(OPA); - r1 = READ16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB)); - switch(OP0) - { - STANDARD_ALU_CASES; - case 13: // store r, [<ds:>r--] - WRITE16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB), UNSP_REG_I(OPA)); - break; - default: - unimplemented_opcode(op); - break; - } - UNSP_REG_I(OPB)--; - WRITEBACK_OPA; + r2 = UNSP_LREG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); + UNSP_REG_I(opb)--; + if (UNSP_REG_I(opb) == 0xffff) + UNSP_REG(SR) -= 0x0400; break; case 2: // r, [<ds:>r++] - r0 = UNSP_REG_I(OPA); - r1 = READ16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB)); - switch(OP0) - { - STANDARD_ALU_CASES; - case 13: // store r, [<ds:>r++] - WRITE16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB), UNSP_REG_I(OPA)); - break; - default: - unimplemented_opcode(op); - break; - } - UNSP_REG_I(OPB)++; - WRITEBACK_OPA; + r2 = UNSP_LREG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); + UNSP_REG_I(opb)++; + if (UNSP_REG_I(opb) == 0x0000) + UNSP_REG(SR) += 0x0400; break; case 3: // r, [<ds:>++r] - UNSP_REG_I(OPB)++; - r0 = UNSP_REG_I(OPA); - r1 = READ16((OPN & 4) ? UNSP_LREG_I(OPB) : UNSP_REG_I(OPB)); - switch(OP0) - { - STANDARD_ALU_CASES; - default: - unimplemented_opcode(op); - break; - } - WRITEBACK_OPA; + UNSP_REG_I(opb)++; + if (UNSP_REG_I(opb) == 0x0000) + UNSP_REG(SR) += 0x0400; + r2 = UNSP_LREG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); + break; + default: break; } - break; - - // ALU, 16-bit ops - case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x46: case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: - switch(OPN) + } + else + { + switch (lsbits) { - // r, r - case 0: - r0 = UNSP_REG_I(OPA); - r1 = UNSP_REG_I(OPB); - switch(OP0) - { - STANDARD_ALU_CASES; - default: - unimplemented_opcode(op); - break; - } - WRITEBACK_OPA; + case 0: // r, [r] + r2 = UNSP_REG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); break; - - // ALU, 16-bit Immediate - case 1: // r, r, imm16 - if(!((OP0 == 4 || OP0 == 6 || OP0 == 9 || OP0 == 12) && OPA != OPB)) - { - r0 = UNSP_REG_I(OPB); - r1 = READ16(UNSP_LPC); - UNSP_REG(PC)++; - switch(OP0) - { - STANDARD_ALU_CASES; - default: - unimplemented_opcode(op); - break; - } - WRITEBACK_OPA; - } - else - { - unimplemented_opcode(op); - } + case 1: // r, [r--] + r2 = UNSP_REG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); + UNSP_REG_I(opb)--; break; - - // ALU, Direct 16 - case 2: // r, [imm16] - r0 = UNSP_REG_I(OPB); - r1 = READ16(READ16(UNSP_LPC)); - UNSP_REG(PC)++; - switch(OP0) - { - STANDARD_ALU_CASES; - default: - unimplemented_opcode(op); - break; - } - WRITEBACK_OPA; + case 2: // r, [r++] + r2 = UNSP_REG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); + UNSP_REG_I(opb)++; break; - - // ALU, Direct 16 - case 3: // [imm16], r - r0 = UNSP_REG_I(OPB); - r1 = UNSP_REG_I(OPA); - switch(OP0) - { - STANDARD_ALU_CASES; - default: - unimplemented_opcode(op); - break; - } - if(OP0 != 4 && OP0 < 12) - { - WRITE16(READ16(UNSP_LPC), (uint16_t)lres); - } - UNSP_REG(PC)++; + case 3: // r, [++r] + UNSP_REG_I(opb)++; + r2 = UNSP_REG_I(opb); + if (OP0 != 0x0d) + r1 = read16(r2); break; - - // ALU, Shifted default: - { - uint32_t shift = (UNSP_REG_I(OPB) << 4) | m_sb; - if(shift & 0x80000) - { - shift |= 0xf00000; - } - shift >>= (OPN - 3); - m_sb = shift & 0x0f; - r1 = (shift >> 4) & 0x0000ffff; - - switch(OP0) - { - case 9: // load r, r asr n - unsp_update_nz(r1); - UNSP_REG_I(OPA) = r1; - break; - default: - unimplemented_opcode(op); - break; - } break; - } } - break; - - case 0x4d: - if(OPN == 3) - { - if(OPA == OPB) - { - WRITE16(READ16(UNSP_LPC), UNSP_REG_I(OPB)); - UNSP_REG(PC)++; - } - else - { - unimplemented_opcode(op); - } - } - else - { - unimplemented_opcode(op); - } - break; + } + break; + } - // ALU, Shifted - case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x56: case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: - if(OPN & 4) - { - switch(OP0) - { - case 9: // load r, r >> imm2 - lres = ((UNSP_REG_I(OPB) << 4) | m_sb) >> (OPN - 3); - m_sb = lres & 0x0f; - unsp_update_nz((uint16_t)(lres >> 4)); - UNSP_REG_I(OPA) = (uint16_t)(lres >> 4); - break; - default: - unimplemented_opcode(op); - break; - } - } - else - { - uint32_t shift = ((m_sb << 16) | UNSP_REG_I(OPB)) << (OPN + 1); - m_sb = (shift >> 16) & 0x0f; - r0 = UNSP_REG_I(OPA); - r1 = shift & 0x0000ffff; + case 0x04: // 16-bit ops + switch (OPN) + { + case 0x00: // r + m_icount -= 3; + if (OPA == 7) + m_icount -= 2; - switch(OP0) - { - case 0: // add r, r << imm2 - lres = r0 + r1; - unsp_update_nzsc(lres, r0, r1); - UNSP_REG_I(OPA) = (uint16_t)lres; - break; - case 9: // load r, r << imm2 - lres = r1; - unsp_update_nz(lres); - UNSP_REG_I(OPA) = (uint16_t)lres; - break; - case 10: // or r, r << imm2 - lres = r0 | r1; - unsp_update_nz(lres); - UNSP_REG_I(OPA) = (uint16_t)lres; - break; - default: - unimplemented_opcode(op); - break; - } - } - break; + r1 = UNSP_REG_I(OPB); + break; - // ALU, Rotated - case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x66: case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: - if(OPN & 4) // ROR - { - lres = ((((m_sb << 16) | UNSP_REG_I(OPB)) << 4) | m_sb) >> (OPN - 3); - m_sb = lres & 0x0f; - r1 = (uint16_t)(lres >> 4); - } - else - { - lres = ((((m_sb << 16) | UNSP_REG_I(OPB)) << 4) | m_sb) << (OPN + 1); - m_sb = (lres >> 20) & 0x0f; - r1 = (uint16_t)(lres >> 4); - } + case 0x01: // imm16 + m_icount -= 4; + if (OPA == 7) + m_icount -= 1; - switch(OP0) - { - case 9: // load r, r ror imm2 - unsp_update_nz(r1); - UNSP_REG_I(OPA) = r1; - break; - default: - unimplemented_opcode(op); - break; - } - break; + r0 = UNSP_REG_I(OPB); + r1 = read16(UNSP_LPC); + UNSP_REG(PC)++; + break; - // ALU, Direct 8 - case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x76: case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: - //print("%s %s, [%02x]", alu[OP0], reg[OPA], OPIMM); - unimplemented_opcode(op); - break; + case 0x02: // [imm16] + m_icount -= 7; + if (OPA == 7) + m_icount -= 1; - // Call - case 0x1f: - if(OPA == 0) - { - r1 = READ16(UNSP_LPC); + r0 = UNSP_REG_I(OPB); + r2 = read16(UNSP_LPC); UNSP_REG(PC)++; - unsp_push(UNSP_REG(PC), &UNSP_REG(SP)); - unsp_push(UNSP_REG(SR), &UNSP_REG(SP)); - UNSP_REG(PC) = r1; - UNSP_REG(SR) &= 0xffc0; - UNSP_REG(SR) |= OPIMM; - } - else - { - unimplemented_opcode(op); - } - break; - - // Far Jump - case 0x2f: case 0x3f: case 0x6f: case 0x7f: - if (OPA == 7 && OP1 == 2) - { - UNSP_REG(PC) = READ16(UNSP_LPC); - UNSP_REG(SR) &= 0xffc0; - UNSP_REG(SR) |= OPIMM; - } - break; - // Multiply, Unsigned * Signed - case 0x0f: - if(OPN == 1 && OPA != 7) - { - lres = UNSP_REG_I(OPA) * UNSP_REG_I(OPB); - if(UNSP_REG_I(OPB) & 0x8000) + if (OP0 != 0x0d) { - lres -= UNSP_REG_I(OPA) << 16; + r1 = read16(r2); } - UNSP_REG(R4) = lres >> 16; - UNSP_REG(R3) = (uint16_t)lres; break; - } - else - { - unimplemented_opcode(op); - } - break; - // Multiply, Signed * Signed - case 0x4f: - if(OPN == 1 && OPA != 7) - { - lres = UNSP_REG_I(OPA) * UNSP_REG_I(OPB); - if(UNSP_REG_I(OPB) & 0x8000) - { - lres -= UNSP_REG_I(OPA) << 16; - } - if(UNSP_REG_I(OPA) & 0x8000) - { - lres -= UNSP_REG_I(OPB) << 16; - } - UNSP_REG(R4) = lres >> 16; - UNSP_REG(R3) = (uint16_t)lres; + case 0x03: // store [imm16], r + m_icount -= 7; + if (OPA == 7) + m_icount -= 1; + + r1 = r0; + r0 = UNSP_REG_I(OPB); + r2 = read16(UNSP_LPC); + UNSP_REG(PC)++; break; - } - else - { - unimplemented_opcode(op); - } - break; - // Interrupt flags - case 0x5f: - if(OPA == 0) - { - switch(OPIMM) - { - case 0: - m_irq &= ~1; - m_fiq &= ~1; - break; - case 1: - m_irq |= 1; - m_fiq &= ~1; - break; - case 2: - m_irq &= ~1; - m_fiq |= 1; - break; - case 3: - m_irq |= 1; - m_fiq |= 1; - break; - case 8: // irq off - m_irq &= ~1; - break; - case 9: // irq on - m_irq |= 1; - break; - case 12: // fiq off - m_fiq &= ~1; - break; - case 13: // fiq on - m_fiq |= 1; - break; - case 37: // nop - break; - } - } - else + default: // Shifted ops { - unimplemented_opcode(op); + m_icount -= 3; + if (OPA == 7) + m_icount -= 2; + + uint32_t shift = (UNSP_REG_I(OPB) << 4) | m_sb; + if (shift & 0x80000) + shift |= 0xf00000; + shift >>= (OPN - 3); + m_sb = shift & 0x0f; + r1 = (uint16_t)(shift >> 4); + break; } - break; + } + break; + + case 0x05: // More shifted ops + m_icount -= 3; + if (OPA == 7) + m_icount -= 2; + + if (OPN & 4) // Shift right + { + const uint32_t shift = ((UNSP_REG_I(OPB) << 4) | m_sb) >> (OPN - 3); + m_sb = shift & 0x0f; + r1 = (uint16_t)(shift >> 4); + } + else // Shift left + { + const uint32_t shift = ((m_sb << 16) | UNSP_REG_I(OPB)) << (OPN + 1); + m_sb = (shift >> 16) & 0x0f; + r1 = (uint16_t)shift; + } + break; + + case 0x06: // Rotated ops + { + m_icount -= 3; + if (OPA == 7) + m_icount -= 2; + + uint32_t shift = (((m_sb << 16) | UNSP_REG_I(OPB)) << 4) | m_sb; + if (OPN & 4) // Rotate right + { + shift >>= (OPN - 3); + m_sb = shift & 0x0f; + } + else + { + shift <<= (OPN + 1); + m_sb = (shift >> 20) & 0x0f; + } + r1 = (uint16_t)(shift >> 4); + break; } + + case 0x07: // Direct 8 + m_icount -= 5; + if (OPA == 7) + m_icount -= 1; + + r1 = read16(OPIMM); + break; + + default: + break; } - m_icount -= 5; - m_icount = std::max(m_icount, 0); + switch (OP0) + { + case 0x00: // Add + lres = r0 + r1; + break; + case 0x01: // Add w/ carry + lres = r0 + r1; + if(UNSP_REG(SR) & UNSP_C) + lres++; + break; + case 0x02: // Subtract + case 0x04: // Compare + lres = r0 + (uint16_t)(~r1) + 1; + break; + case 0x03: // Subtract w/ carry + lres = r0 + (uint16_t)(~r1); + if(UNSP_REG(SR) & UNSP_C) + lres++; + break; + case 0x06: // Negate + lres = -r1; + break; + case 0x08: // XOR + lres = r0 ^ r1; + break; + case 0x09: // Load + lres = r1; + break; + case 0x0a: // OR + lres = r0 | r1; + break; + case 0x0b: // AND + case 0x0c: // Test + lres = r0 & r1; + break; + case 0x0d: // Store + write16(r2, r0); + continue; + default: + unimplemented_opcode(op); + continue; + } + + if (OP0 != 0x0d && OPA != 7) // If not a store opcode and not updating the PC, update negative/zero flags. + update_nz(lres); + + if (OP0 < 0x05 && OPA != 7) // If Add, Add w/ Carry, Subtract, Subtract w/ Carry, Compare, and not updating the PC, update sign/carry flags. + update_sc(lres, r0, r1); + + if (OP0 == 0x04 || OP0 == 0x0c) // Compare and Test don't write back results. + continue; + + if (OP1 == 0x04 && OPN == 0x03) // store [imm16], r + write16(r2, lres); + else + UNSP_REG_I(OPA) = lres; } } @@ -812,8 +893,6 @@ void unsp_device::execute_run() void unsp_device::execute_set_input(int irqline, int state) { - uint16_t irq_vector = 0; - m_sirq &= ~(1 << irqline); if(!state) @@ -831,40 +910,10 @@ void unsp_device::execute_set_input(int irqline, int state) case UNSP_IRQ5_LINE: case UNSP_IRQ6_LINE: case UNSP_IRQ7_LINE: - if(m_fiq & 2) - { - // FIQ is being serviced, ignore this IRQ trigger. - m_sirq |= state << irqline; - return; - } - if(m_irq != 1) - { - // IRQ is disabled, ignore this IRQ trigger. - m_sirq |= state << irqline; - return; - } - m_irq |= 2; - m_curirq |= (1 << irqline); - irq_vector = 0xfff8 + (irqline - UNSP_IRQ0_LINE); - break; case UNSP_FIQ_LINE: - if(m_fiq != 1) - { - // FIQ is disabled, ignore this FIQ trigger. - m_sirq |= state << irqline; - return; - } - m_fiq |= 2; - m_curirq |= (1 << irqline); - irq_vector = 0xfff6; + m_sirq |= (1 << irqline); break; case UNSP_BRK_LINE: break; } - - m_saved_sb = m_sb; - unsp_push(UNSP_REG(PC), &UNSP_REG(SP)); - unsp_push(UNSP_REG(SR), &UNSP_REG(SP)); - UNSP_REG(PC) = READ16(irq_vector); - UNSP_REG(SR) = 0; } diff --git a/src/devices/cpu/unsp/unsp.h b/src/devices/cpu/unsp/unsp.h index 9131cf8b983..cd939aeb25e 100644 --- a/src/devices/cpu/unsp/unsp.h +++ b/src/devices/cpu/unsp/unsp.h @@ -1,18 +1,20 @@ // license:BSD-3-Clause // copyright-holders:Ryan Holtz -/**************************\ -* -* SunPlus u'nSP emulator -* -* by Ryan Holtz -* -\**************************/ +/***************************************************************************** + + SunPlus micro'nSP core + + based primarily on Unununium, by segher + +*****************************************************************************/ #ifndef MAME_CPU_UNSP_UNSP_H #define MAME_CPU_UNSP_UNSP_H #pragma once +#define UNSP_LOG_OPCODES (0) + enum { UNSP_SP = 1, @@ -26,15 +28,22 @@ enum UNSP_GPR_COUNT = UNSP_PC, + UNSP_IRQ_EN, + UNSP_FIQ_EN, UNSP_IRQ, UNSP_FIQ, +#if UNSP_LOG_OPCODES + UNSP_SB, + UNSP_LOG_OPS +#else UNSP_SB - +#endif }; enum { - UNSP_IRQ0_LINE = 0, + UNSP_FIQ_LINE = 0, + UNSP_IRQ0_LINE, UNSP_IRQ1_LINE, UNSP_IRQ2_LINE, UNSP_IRQ3_LINE, @@ -42,7 +51,6 @@ enum UNSP_IRQ5_LINE, UNSP_IRQ6_LINE, UNSP_IRQ7_LINE, - UNSP_FIQ_LINE, UNSP_BRK_LINE, UNSP_NUM_LINES @@ -73,6 +81,7 @@ protected: // device_state_interface overrides virtual void state_import(const device_state_entry &entry) override; virtual void state_export(const device_state_entry &entry) override; + virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; // device_disasm_interface overrides virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; @@ -81,27 +90,33 @@ private: address_space_config m_program_config; uint16_t m_r[16]; - uint8_t m_irq; - uint8_t m_fiq; + bool m_enable_irq; + bool m_enable_fiq; + bool m_irq; + bool m_fiq; uint16_t m_curirq; uint16_t m_sirq; uint8_t m_sb; - uint8_t m_saved_sb; + uint8_t m_saved_sb[3]; address_space *m_program; int m_icount; uint32_t m_debugger_temp; +#if UNSP_LOG_OPCODES + uint32_t m_log_ops; +#endif void unimplemented_opcode(uint16_t op); - inline uint16_t READ16(uint32_t address); - inline void WRITE16(uint32_t address, uint16_t data); - inline void unsp_update_nz(uint32_t value); - inline void unsp_update_nzsc(uint32_t value, uint16_t r0, uint16_t r1); - inline void unsp_push(uint16_t value, uint16_t *reg); - inline uint16_t unsp_pop(uint16_t *reg); - - + inline uint16_t read16(uint32_t address); + inline void write16(uint32_t address, uint16_t data); + inline void update_nz(uint32_t value); + inline void update_sc(uint32_t value, uint16_t r0, uint16_t r1); + inline void push(uint16_t value, uint16_t *reg); + inline uint16_t pop(uint16_t *reg); + inline void trigger_fiq(); + inline void trigger_irq(int line); + inline void check_irqs(); }; diff --git a/src/devices/cpu/unsp/unspdasm.cpp b/src/devices/cpu/unsp/unspdasm.cpp index bdea7a729a5..14996cbbf2a 100644 --- a/src/devices/cpu/unsp/unspdasm.cpp +++ b/src/devices/cpu/unsp/unspdasm.cpp @@ -1,30 +1,26 @@ // license:BSD-3-Clause // copyright-holders:Ryan Holtz -/**************************\ -* -* SunPlus u'nSP disassembler -* -* by Ryan Holtz -* -\**************************/ +/***************************************************************************** + + SunPlus micro'nSP disassembler + +*****************************************************************************/ #include "emu.h" #include "unspdasm.h" -/*****************************************************************************/ - -const char *unsp_disassembler::reg[] = +char const *const unsp_disassembler::reg[] = { "sp", "r1", "r2", "r3", "r4", "bp", "sr", "pc" }; -const char *unsp_disassembler::jmp[] = +char const *const unsp_disassembler::jmp[] = { "jb", "jae", "jge", "jl", "jne", "je", "jpl", "jmi", "jbe", "ja", "jle", "jg", "jvc", "jvs", "jmp", "<inv>" }; -const char *unsp_disassembler::alu[] = +char const *const unsp_disassembler::alu[] = { "add", "adc", "sub", "sbc", "cmp", "<inv>", "neg", "<inv>", @@ -51,11 +47,8 @@ u32 unsp_disassembler::opcode_alignment() const return 1; } -offs_t unsp_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) +offs_t unsp_disassembler::disassemble(std::ostream &stream, offs_t pc, uint16_t op, uint16_t imm16) { - uint16_t op = opcodes.r16(pc); - uint16_t imm16 = opcodes.r16(pc+1); - if(OP0 < 0xf && OPA == 0x7 && OP1 < 2) { util::stream_format(stream, "%s %04x", jmp[OP0], OP1 ? (pc - OPIMM + 1) : (pc + OPIMM + 1)); @@ -187,7 +180,7 @@ offs_t unsp_disassembler::disassemble(std::ostream &stream, offs_t pc, const dat // Call case 0x1f: if(OPA == 0) - util::stream_format(stream, "call %06x", ((OPIMM << 16) | imm16) << 1); + util::stream_format(stream, "call %06x", (OPIMM << 16) | imm16); else util::stream_format(stream, "<inv>"); return UNSP_DASM_OK; @@ -195,7 +188,7 @@ offs_t unsp_disassembler::disassemble(std::ostream &stream, offs_t pc, const dat // Far Jump case 0x2f: case 0x3f: case 0x6f: case 0x7f: if (OPA == 7 && OP1 == 2) - util::stream_format(stream, "goto %06x", ((OPIMM << 16) | imm16) << 1); + util::stream_format(stream, "goto %06x", (OPIMM << 16) | imm16); else util::stream_format(stream, "<inv>"); return UNSP_DASM_OK; @@ -261,3 +254,11 @@ offs_t unsp_disassembler::disassemble(std::ostream &stream, offs_t pc, const dat util::stream_format(stream, "<inv>"); return UNSP_DASM_OK; } + +offs_t unsp_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) +{ + uint16_t op = opcodes.r16(pc); + uint16_t imm16 = opcodes.r16(pc+1); + + return disassemble(stream, pc, op, imm16); +} diff --git a/src/devices/cpu/unsp/unspdasm.h b/src/devices/cpu/unsp/unspdasm.h index ef25b2a433b..94bfdeece7c 100644 --- a/src/devices/cpu/unsp/unspdasm.h +++ b/src/devices/cpu/unsp/unspdasm.h @@ -1,13 +1,10 @@ // license:BSD-3-Clause // copyright-holders:Ryan Holtz -/**************************\ -* -* SunPlus u'nSP disassembler -* -* by Ryan Holtz -* -\**************************/ +/***************************************************************************** + SunPlus micro'nSP disassembler + +*****************************************************************************/ #ifndef MAME_CPU_UNSP_UNSPDASM_H #define MAME_CPU_UNSP_UNSPDASM_H @@ -22,11 +19,12 @@ public: virtual u32 opcode_alignment() const override; virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; + offs_t disassemble(std::ostream &stream, offs_t pc, uint16_t op, uint16_t imm16); private: - static const char *reg[]; - static const char *jmp[]; - static const char *alu[]; + static char const *const reg[]; + static char const *const jmp[]; + static char const *const alu[]; }; #endif diff --git a/src/devices/cpu/z8/z8.cpp b/src/devices/cpu/z8/z8.cpp index 9b2febe17fc..52c2ee4627e 100644 --- a/src/devices/cpu/z8/z8.cpp +++ b/src/devices/cpu/z8/z8.cpp @@ -321,16 +321,28 @@ uint8_t z8_device::register_read(uint8_t offset) case Z8_REGISTER_P0: switch (P01M & Z8_P01M_P0L_MODE_MASK) { - case Z8_P01M_P0L_MODE_OUTPUT: data = m_output[offset] & 0x0f; break; - case Z8_P01M_P0L_MODE_INPUT: mask = 0x0f; break; - default: /* A8...A11 */ data = 0x0f; break; + case Z8_P01M_P0L_MODE_OUTPUT: + data = m_output[offset] & 0x0f; + break; + case Z8_P01M_P0L_MODE_INPUT: + mask = 0x0f; + break; + default: /* A8...A11 */ + data = 0x0f; + break; } switch (P01M & Z8_P01M_P0H_MODE_MASK) { - case Z8_P01M_P0H_MODE_OUTPUT: data |= m_output[offset] & 0xf0; break; - case Z8_P01M_P0H_MODE_INPUT: mask |= 0xf0; break; - default: /* A12...A15 */ data |= 0xf0; break; + case Z8_P01M_P0H_MODE_OUTPUT: + data |= m_output[offset] & 0xf0; + break; + case Z8_P01M_P0H_MODE_INPUT: + mask |= 0xf0; + break; + default: /* A12...A15 */ + data |= 0xf0; + break; } if (!(P3M & Z8_P3M_P0_STROBED)) @@ -344,9 +356,15 @@ uint8_t z8_device::register_read(uint8_t offset) case Z8_REGISTER_P1: switch (P01M & Z8_P01M_P1_MODE_MASK) { - case Z8_P01M_P1_MODE_OUTPUT: data = m_output[offset]; break; - case Z8_P01M_P1_MODE_INPUT: mask = 0xff; break; - default: /* AD0..AD7 */ data = 0xff; break; + case Z8_P01M_P1_MODE_OUTPUT: + data = m_output[offset]; + break; + case Z8_P01M_P1_MODE_INPUT: + mask = 0xff; + break; + default: /* AD0..AD7 */ + data = 0xff; + break; } if ((P3M & Z8_P3M_P33_P34_MASK) != Z8_P3M_P33_P34_DAV1_RDY1) @@ -370,10 +388,10 @@ uint8_t z8_device::register_read(uint8_t offset) case Z8_REGISTER_P3: // TODO: special port 3 modes - if (!(P3M & 0x7c)) - { + //if (!(P3M & 0x7c)) + //{ mask = 0x0f; - } + //} if (mask) m_input[offset] = m_input_cb[3](0, mask); @@ -439,10 +457,10 @@ void z8_device::register_write(uint8_t offset, uint8_t data) m_output[offset] = data; // TODO: special port 3 modes - if (!(P3M & 0x7c)) - { + //if (!(P3M & 0x7c)) + //{ mask = 0xf0; - } + //} if (mask) m_output_cb[3](0, data & mask, mask); break; @@ -774,9 +792,9 @@ void z8_device::device_start() /* set up the state table */ { - state_add(Z8_PC, "PC", m_pc); - state_add(STATE_GENPC, "GENPC", m_pc).noshow(); - state_add(STATE_GENPCBASE, "CURPC", m_ppc).noshow(); + state_add(Z8_PC, "PC", m_pc).callimport(); + state_add(STATE_GENPC, "GENPC", m_pc).callimport().noshow(); + state_add(STATE_GENPCBASE, "CURPC", m_ppc).callimport().noshow(); state_add(Z8_SP, "SP", m_fake_sp).callimport().callexport(); state_add(STATE_GENSP, "GENSP", m_fake_sp).callimport().callexport().noshow(); state_add(Z8_RP, "RP", m_r[Z8_REGISTER_RP]); @@ -1033,6 +1051,15 @@ void z8_device::state_import(const device_state_entry &entry) { switch (entry.index()) { + case STATE_GENPC: + case Z8_PC: + m_ppc = m_pc; + break; + + case STATE_GENPCBASE: + m_pc = m_ppc; + break; + case Z8_SP: case STATE_GENSP: m_r[Z8_REGISTER_SPH] = m_fake_sp >> 8; diff --git a/src/devices/cpu/z8/z8.h b/src/devices/cpu/z8/z8.h index 287ba9c40fa..8482895879d 100644 --- a/src/devices/cpu/z8/z8.h +++ b/src/devices/cpu/z8/z8.h @@ -163,8 +163,8 @@ private: inline void load_to_memory_autoinc(address_space &space); inline void pop(uint8_t dst); inline void push(uint8_t src); - inline void add_carry(uint8_t dst, int8_t src); - inline void add(uint8_t dst, int8_t src); + inline void add_carry(uint8_t dst, uint8_t src); + inline void add(uint8_t dst, uint8_t src); inline void compare(uint8_t dst, uint8_t src); inline void decimal_adjust(uint8_t dst); inline void decrement(uint8_t dst); @@ -179,7 +179,7 @@ private: inline void _xor(uint8_t dst, uint8_t src); inline void call(uint16_t dst); inline void jump(uint16_t dst); - inline int check_condition_code(int cc); + inline bool check_condition_code(int cc); inline void test_complement_under_mask(uint8_t dst, uint8_t src); inline void test_under_mask(uint8_t dst, uint8_t src); inline void rotate_left(uint8_t dst); diff --git a/src/devices/cpu/z8/z8dasm.cpp b/src/devices/cpu/z8/z8dasm.cpp index a832dab8fe9..35d18fab880 100644 --- a/src/devices/cpu/z8/z8dasm.cpp +++ b/src/devices/cpu/z8/z8dasm.cpp @@ -116,7 +116,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x07: mnemonic("ADD"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x08: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x09: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x0a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x0a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x0b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x0c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x0d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -133,7 +133,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x17: mnemonic("ADC"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x18: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x19: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x1a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x1a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x1b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x1c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x1d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -150,7 +150,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x27: mnemonic("SUB"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x28: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x29: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x2a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x2a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x2b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x2c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x2d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -158,7 +158,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x2f: illegal; break; case 0x30: mnemonic("JP"); arg_IRR(B0); bytes(2); break; - case 0x31: mnemonic("SRP"); arg_IM(B0); bytes(2); break; + case 0x31: mnemonic("SRP"); arg_IM(B0); bytes(2); break; case 0x32: mnemonic("SBC"); arg_r(B0H); arg_r(B0L); bytes(2); break; case 0x33: mnemonic("SBC"); arg_r(B0H); arg_Ir(B0L); bytes(2); break; case 0x34: mnemonic("SBC"); arg_R(B1); arg_R(B0); bytes(3); break; @@ -167,7 +167,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x37: mnemonic("SBC"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x38: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x39: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x3a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x3a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x3b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x3c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x3d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -184,7 +184,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x47: mnemonic("OR"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x48: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x49: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x4a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x4a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x4b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x4c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x4d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -201,7 +201,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x57: mnemonic("AND"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x58: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x59: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x5a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x5a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x5b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x5c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x5d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -218,7 +218,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x67: mnemonic("TCM"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x68: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x69: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x6a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x6a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x6b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x6c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x6d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -235,7 +235,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x77: mnemonic("TM"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0x78: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x79: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x7a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x7a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x7b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x7c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x7d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -252,7 +252,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x87: illegal; break; case 0x88: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x89: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x8a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x8a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x8b: mnemonic("JR"); arg_RA; bytes(2); break; case 0x8c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x8d: mnemonic("JP"); arg_DA; bytes(3); break; @@ -269,7 +269,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0x97: illegal; break; case 0x98: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0x99: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0x9a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0x9a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0x9b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0x9c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0x9d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -286,7 +286,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0xa7: mnemonic("CP"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0xa8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0xa9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0xaa: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0xaa: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0xab: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0xac: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0xad: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -303,7 +303,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0xb7: mnemonic("XOR"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0xb8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0xb9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0xba: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0xba: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0xbb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0xbc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0xbd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -320,7 +320,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0xc7: mnemonic("LD"); arg_r(B0H); arg_X(B1, B0L); bytes(3); break; case 0xc8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0xc9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0xca: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0xca: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0xcb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0xcc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0xcd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -337,7 +337,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0xd7: mnemonic("LD"); arg_r(B0L); arg_X(B1, B0H); bytes(3); break; case 0xd8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0xd9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0xda: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0xda: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0xdb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0xdc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0xdd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -354,7 +354,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0xe7: mnemonic("LD"); arg_IR(B0); arg_IM(B1); bytes(3); break; case 0xe8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0xe9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0xea: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0xea: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0xeb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0xec: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0xed: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; @@ -371,7 +371,7 @@ offs_t z8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_ case 0xf7: illegal; break; case 0xf8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break; case 0xf9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break; - case 0xfa: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break; + case 0xfa: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); step_over; break; case 0xfb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break; case 0xfc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break; case 0xfd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; diff --git a/src/devices/cpu/z8/z8ops.hxx b/src/devices/cpu/z8/z8ops.hxx index 2e42640a344..b08d051caf1 100644 --- a/src/devices/cpu/z8/z8ops.hxx +++ b/src/devices/cpu/z8/z8ops.hxx @@ -37,8 +37,8 @@ _func(dst, src); #define mode_IR2_R1(_func) \ - uint8_t src = read(R);\ - uint8_t dst = IR;\ + uint8_t src = m_r[read(R)];\ + uint8_t dst = R;\ _func(dst, src); #define mode_R1_IM(_func) \ @@ -241,20 +241,21 @@ INSTRUCTION( push_IR2 ) { mode_IR1(push) } ARITHMETIC INSTRUCTIONS ***************************************************************************/ -void z8_device::add_carry(uint8_t dst, int8_t src) +void z8_device::add_carry(uint8_t dst, uint8_t src) { /* dst <- dst + src + C */ uint8_t data = register_read(dst); uint16_t new_data = data + src + flag(C); set_flag_c(new_data & 0x100); + new_data &= 0xff; set_flag_z(new_data == 0); set_flag_s(new_data & 0x80); set_flag_v(((data & 0x80) == (src & 0x80)) && ((new_data & 0x80) != (src & 0x80))); set_flag_d(0); set_flag_h(((data & 0x1f) == 0x0f) && ((new_data & 0x1f) == 0x10)); - register_write(dst, new_data & 0xff); + register_write(dst, new_data); } INSTRUCTION( adc_r1_r2 ) { mode_r1_r2(add_carry) } @@ -264,20 +265,21 @@ INSTRUCTION( adc_IR2_R1 ) { mode_IR2_R1(add_carry) } INSTRUCTION( adc_R1_IM ) { mode_R1_IM(add_carry) } INSTRUCTION( adc_IR1_IM ) { mode_IR1_IM(add_carry) } -void z8_device::add(uint8_t dst, int8_t src) +void z8_device::add(uint8_t dst, uint8_t src) { /* dst <- dst + src */ uint8_t data = register_read(dst); uint16_t new_data = data + src; set_flag_c(new_data & 0x100); + new_data &= 0xff; set_flag_z(new_data == 0); set_flag_s(new_data & 0x80); set_flag_v(((data & 0x80) == (src & 0x80)) && ((new_data & 0x80) != (src & 0x80))); set_flag_d(0); set_flag_h(((data & 0x1f) == 0x0f) && ((new_data & 0x1f) == 0x10)); - register_write(dst, new_data & 0xff); + register_write(dst, new_data); } INSTRUCTION( add_r1_r2 ) { mode_r1_r2(add) } @@ -294,6 +296,7 @@ void z8_device::compare(uint8_t dst, uint8_t src) uint16_t new_data = data - src; set_flag_c(new_data & 0x100); + new_data &= 0xff; set_flag_z(new_data == 0); set_flag_s(new_data & 0x80); set_flag_v(((data & 0x80) != (src & 0x80)) && ((new_data & 0x80) == (src & 0x80))); @@ -400,13 +403,14 @@ void z8_device::subtract_carry(uint8_t dst, uint8_t src) uint16_t new_data = data - src - flag(C); set_flag_c(new_data & 0x100); + new_data &= 0xff; set_flag_z(new_data == 0); set_flag_s(new_data & 0x80); set_flag_v(((data & 0x80) != (src & 0x80)) && ((new_data & 0x80) == (src & 0x80))); set_flag_d(1); set_flag_h(!(((data & 0x1f) == 0x0f) && ((new_data & 0x1f) == 0x10))); - register_write(dst, new_data & 0xff); + register_write(dst, new_data); } INSTRUCTION( sbc_r1_r2 ) { mode_r1_r2(subtract_carry) } @@ -423,13 +427,14 @@ void z8_device::subtract(uint8_t dst, uint8_t src) uint16_t new_data = data - src; set_flag_c(new_data & 0x100); + new_data &= 0xff; set_flag_z(new_data == 0); set_flag_s(new_data & 0x80); set_flag_v(((data & 0x80) != (src & 0x80)) && ((new_data & 0x80) == (src & 0x80))); set_flag_d(1); set_flag_h(!(((data & 0x1f) == 0x0f) && ((new_data & 0x1f) == 0x10))); - register_write(dst, new_data & 0xff); + register_write(dst, new_data); } INSTRUCTION( sub_r1_r2 ) { mode_r1_r2(subtract) } @@ -570,9 +575,9 @@ void z8_device::jump(uint16_t dst) INSTRUCTION( jp_IRR1 ) { jump(register_pair_read(get_register(IM))); } -int z8_device::check_condition_code(int cc) +bool z8_device::check_condition_code(int cc) { - int truth = 0; + bool truth = 0; switch (cc) { @@ -671,7 +676,7 @@ void z8_device::rotate_left(uint8_t dst) uint8_t new_data = (data << 1) | BIT(data, 7); set_flag_c(data & 0x80); - set_flag_z(data == 0); + set_flag_z(new_data == 0); set_flag_s(new_data & 0x80); set_flag_v((data & 0x80) != (new_data & 0x80)); @@ -688,7 +693,7 @@ void z8_device::rotate_left_carry(uint8_t dst) uint8_t new_data = (data << 1) | flag(C); set_flag_c(data & 0x80); - set_flag_z(data == 0); + set_flag_z(new_data == 0); set_flag_s(new_data & 0x80); set_flag_v((data & 0x80) != (new_data & 0x80)); @@ -705,7 +710,7 @@ void z8_device::rotate_right(uint8_t dst) uint8_t new_data = ((data & 0x01) << 7) | (data >> 1); set_flag_c(data & 0x01); - set_flag_z(data == 0); + set_flag_z(new_data == 0); set_flag_s(new_data & 0x80); set_flag_v((data & 0x80) != (new_data & 0x80)); @@ -722,7 +727,7 @@ void z8_device::rotate_right_carry(uint8_t dst) uint8_t new_data = (flag(C) << 7) | (data >> 1); set_flag_c(data & 0x01); - set_flag_z(data == 0); + set_flag_z(new_data == 0); set_flag_s(new_data & 0x80); set_flag_v((data & 0x80) != (new_data & 0x80)); @@ -739,7 +744,7 @@ void z8_device::shift_right_arithmetic(uint8_t dst) uint8_t new_data = (data & 0x80) | ((data >> 1) & 0x7f); set_flag_c(data & 0x01); - set_flag_z(data == 0); + set_flag_z(new_data == 0); set_flag_s(new_data & 0x80); set_flag_v(0); diff --git a/src/devices/cpu/z80/tmpz84c015.cpp b/src/devices/cpu/z80/tmpz84c015.cpp index 80dc417e171..a6a0f773adb 100644 --- a/src/devices/cpu/z80/tmpz84c015.cpp +++ b/src/devices/cpu/z80/tmpz84c015.cpp @@ -150,7 +150,7 @@ WRITE8_MEMBER(tmpz84c015_device::irq_priority_w) if (m_irq_priority != data) { - static const char *dev[3] = { "tmpz84c015_ctc", "tmpz84c015_sio", "tmpz84c015_pio" }; + static const char *const dev[3] = { "tmpz84c015_ctc", "tmpz84c015_sio", "tmpz84c015_pio" }; static const int prio[6][3] = { { 0, 1, 2 }, // 0: ctc -> sio -> pio -> ext diff --git a/src/devices/imagedev/cassette.cpp b/src/devices/imagedev/cassette.cpp index c68a6546316..d94812ba860 100644 --- a/src/devices/imagedev/cassette.cpp +++ b/src/devices/imagedev/cassette.cpp @@ -379,7 +379,7 @@ std::string cassette_image_device::call_display() int n; double position, length; cassette_state uistate; - static const char *shapes[] = { u8"\u2500", u8"\u2572", u8"\u2502", u8"\u2571" }; + static char const *const shapes[] = { u8"\u2500", u8"\u2572", u8"\u2502", u8"\u2571" }; // figure out where we are in the cassette position = get_position(); diff --git a/src/devices/imagedev/diablo.cpp b/src/devices/imagedev/diablo.cpp index 82da0a417ab..56c90e0c66f 100644 --- a/src/devices/imagedev/diablo.cpp +++ b/src/devices/imagedev/diablo.cpp @@ -20,7 +20,7 @@ OPTION_GUIDE_START(dsk_option_guide) OPTION_INT('K', "hunksize", "Hunk Bytes") OPTION_GUIDE_END -static const char *dsk_option_spec = +static char const *const dsk_option_spec = "C1-[203]-1024;H1/[2]/4/8;S1-[12]-64;L267;K6408"; diff --git a/src/devices/imagedev/harddriv.cpp b/src/devices/imagedev/harddriv.cpp index a3d567de33f..c3d2e9ca50c 100644 --- a/src/devices/imagedev/harddriv.cpp +++ b/src/devices/imagedev/harddriv.cpp @@ -29,7 +29,7 @@ OPTION_GUIDE_START(hd_option_guide) OPTION_INT('K', "hunksize", "Hunk Bytes") OPTION_GUIDE_END -static const char *hd_option_spec = +static char const *const hd_option_spec = "C1-[512]-1024;H1/2/[4]/8;S1-[16]-64;L128/256/[512]/1024;K512/1024/2048/[4096]"; diff --git a/src/devices/machine/28fxxx.cpp b/src/devices/machine/28fxxx.cpp index 3d9bdeb639b..6218ada4548 100644 --- a/src/devices/machine/28fxxx.cpp +++ b/src/devices/machine/28fxxx.cpp @@ -44,6 +44,7 @@ enum manufacturer_codes DEFINE_DEVICE_TYPE(INTEL_28F010, intel_28f010_device, "intel_28f010", "Intel 28F010 1024K (128K x 8) CMOS Flash Memory") DEFINE_DEVICE_TYPE(AMD_28F010, amd_28f010_device, "amd_28f010", "Am28F010 1 Megabit (128K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory") +DEFINE_DEVICE_TYPE(AMD_28F020, amd_28f020_device, "amd_28f020", "Am28F020 2 Megabit (256K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory") ALLOW_SAVE_TYPE(base_28fxxx_device::state); @@ -70,6 +71,11 @@ amd_28f010_device::amd_28f010_device(const machine_config &mconfig, const char * { } +amd_28f020_device::amd_28f020_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : base_28fxxx_device(mconfig, AMD_28F020, tag, owner, clock, 0x40000, MFG_AMD, 0x2a) +{ +} + void base_28fxxx_device::device_start() { m_data = std::make_unique<u8[]>(m_size); diff --git a/src/devices/machine/28fxxx.h b/src/devices/machine/28fxxx.h index e045a91f27c..dd64118cfce 100644 --- a/src/devices/machine/28fxxx.h +++ b/src/devices/machine/28fxxx.h @@ -78,7 +78,14 @@ public: amd_28f010_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); }; +class amd_28f020_device : public base_28fxxx_device +{ +public: + amd_28f020_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); +}; + DECLARE_DEVICE_TYPE(INTEL_28F010, intel_28f010_device) DECLARE_DEVICE_TYPE(AMD_28F010, amd_28f010_device) +DECLARE_DEVICE_TYPE(AMD_28F020, amd_28f020_device) #endif // MAME_MACHINE_28FXXX_H diff --git a/src/devices/machine/53c7xx.cpp b/src/devices/machine/53c7xx.cpp index 4373aba1206..a3466da81f1 100644 --- a/src/devices/machine/53c7xx.cpp +++ b/src/devices/machine/53c7xx.cpp @@ -1736,7 +1736,7 @@ void ncr53c7xx_device::tc_int() const char* ncr53c7xx_device::disassemble_scripts() { - static const char* phases[] = + static char const *const phases[] = { "Data Out", "Data In", @@ -1760,7 +1760,7 @@ const char* ncr53c7xx_device::disassemble_scripts() } case 1: { - static const char* ops[] = + static char const *const ops[] = { "SELECT", "DISCONNECT", @@ -1777,7 +1777,7 @@ const char* ncr53c7xx_device::disassemble_scripts() } case 2: { - static const char* ops[] = + static char const *const ops[] = { "JUMP", "CALL", diff --git a/src/devices/machine/6840ptm.cpp b/src/devices/machine/6840ptm.cpp index b98cad197af..bf1e6f4adb1 100644 --- a/src/devices/machine/6840ptm.cpp +++ b/src/devices/machine/6840ptm.cpp @@ -136,7 +136,10 @@ void ptm6840_device::device_reset() m_status_read_since_int = 0; m_irq = 0; m_t3_scaler = 0; - m_hightime = false; + m_hightime[0] = false; + m_hightime[1] = false; + m_hightime[2] = false; + for (int i = 0; i < 3; i++) { m_counter[i] = 0xffff; @@ -185,7 +188,7 @@ void ptm6840_device::subtract_from_counter(int counter, int count) msb--; // If MSB goes less than zero, we've expired - if ((msb == 0 && !m_hightime) || (msb < 0 && m_hightime)) + if ((msb == 0 && !m_hightime[counter]) || (msb < 0 && m_hightime[counter])) { timeout(counter); msb = (m_latch[counter] >> 8) + 1; @@ -224,7 +227,7 @@ void ptm6840_device::subtract_from_counter(int counter, int count) if (m_control_reg[counter] & COUNT_MODE_8BIT) { /* In dual 8 bit mode, let the counter fire when MSB == 0 */ - m_hightime = !(clks & 0xff00); + m_hightime[counter] = !(clks & 0xff00); clks &= 0xff00; } @@ -349,7 +352,7 @@ void ptm6840_device::reload_count(int idx) // Copy the latched value in m_counter[idx] = m_latch[idx]; - m_hightime = false; + // If reset is held, don't start counting if (m_control_reg[0] & RESET_TIMERS) return; @@ -370,10 +373,11 @@ void ptm6840_device::reload_count(int idx) int count = m_counter[idx]; if (m_control_reg[idx] & COUNT_MODE_8BIT) { - if (m_hightime) + if (m_hightime[idx]) count = 0xff; else count = ((count >> 8) + 1) * ((count & 0xff) + 1); + } else { @@ -521,7 +525,7 @@ WRITE8_MEMBER( ptm6840_device::write ) { m_timer[i]->enable(false); m_enabled[i] = 0; - m_hightime = false; + m_hightime[idx] = false; } } // Releasing reset @@ -529,6 +533,7 @@ WRITE8_MEMBER( ptm6840_device::write ) { for (int i = 0; i < 3; i++) { + m_hightime[idx] = false; reload_count(i); } } @@ -540,6 +545,7 @@ WRITE8_MEMBER( ptm6840_device::write ) // Changing the clock source? (e.g. Zwackery) if (diffs & INTERNAL_CLK_EN) { + m_hightime[idx] = false; reload_count(idx); } break; @@ -568,6 +574,7 @@ WRITE8_MEMBER( ptm6840_device::write ) // Reload the count if in an appropriate mode if (!(m_control_reg[idx] & 0x10) || (m_control_reg[0] & RESET_TIMERS)) { + m_hightime[idx] = false; reload_count(idx); } @@ -597,10 +604,11 @@ void ptm6840_device::timeout(int idx) { case 0: case 2: + if (m_control_reg[idx] & COUNT_MODE_8BIT) { - m_hightime = !m_hightime; - m_output[idx] = m_hightime; + m_hightime[idx] = !m_hightime[idx]; + m_output[idx] = m_hightime[idx]; m_out_cb[idx](m_output[idx]); } else @@ -645,6 +653,7 @@ void ptm6840_device::set_gate(int idx, int state) { if (state == 0 && m_gate[idx]) { + m_hightime[idx] = false; reload_count(idx); } } diff --git a/src/devices/machine/6840ptm.h b/src/devices/machine/6840ptm.h index 5cb6b2a9711..ad5859b771b 100644 --- a/src/devices/machine/6840ptm.h +++ b/src/devices/machine/6840ptm.h @@ -129,7 +129,7 @@ private: static const char *const opmode[]; // set in dual 8 bit mode to indicate Output high time cycle - bool m_hightime; + bool m_hightime[3]; }; diff --git a/src/devices/machine/am79c90.cpp b/src/devices/machine/am79c90.cpp index 67f7754b6b9..4c71e7bee42 100644 --- a/src/devices/machine/am79c90.cpp +++ b/src/devices/machine/am79c90.cpp @@ -4,20 +4,21 @@ AMD Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE) - TODO: - - Communication with the outside world - - Error handling - - Clocks + TODO: + - Communication with the outside world + - Error handling + - Clocks *****************************************************************************/ #include "emu.h" #include "am79c90.h" -DEFINE_DEVICE_TYPE(AM79C90, am79c90_device, "am79c90", "Am79C90 LANCE Ethernet Controller") +DEFINE_DEVICE_TYPE(AM7990, am7990_device, "am7990", "Am7990 LANCE Ethernet Controller") +DEFINE_DEVICE_TYPE(AM79C90, am79c90_device, "am79c90", "Am79C90 C-LANCE Ethernet Controller") -am79c90_device::am79c90_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, AM79C90, tag, owner, clock) +am7990_device_base::am7990_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) , m_receive_timer(nullptr) //, m_receive_poll_timer(nullptr) , m_transmit_timer(nullptr) @@ -28,7 +29,17 @@ am79c90_device::am79c90_device(const machine_config &mconfig, const char *tag, d { } -void am79c90_device::device_start() +am7990_device::am7990_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : am7990_device_base(mconfig, AM7990, tag, owner, clock) +{ +} + +am79c90_device::am79c90_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : am7990_device_base(mconfig, AM79C90, tag, owner, clock) +{ +} + +void am7990_device_base::device_start() { m_irq_out_cb.resolve_safe(); m_dma_out_cb.resolve_safe(); // TODO: Should be read/write16! @@ -77,7 +88,7 @@ void am79c90_device::device_start() save_item(NAME(m_transmitting)); } -void am79c90_device::device_reset() +void am7990_device_base::device_reset() { memset(&m_curr_transmit_desc, 0, sizeof(ring_descriptor)); memset(&m_next_transmit_desc, 0, sizeof(ring_descriptor)); @@ -112,7 +123,7 @@ void am79c90_device::device_reset() m_transmitting = false; } -void am79c90_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +void am7990_device_base::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) { switch (id) { @@ -130,7 +141,7 @@ void am79c90_device::device_timer(emu_timer &timer, device_timer_id id, int para } } -void am79c90_device::fetch_transmit_descriptor() +void am7990_device_base::fetch_transmit_descriptor() { const uint32_t next_addr = (m_transmit_ring_addr >> 2) + (m_transmit_ring_pos << 1); ring_descriptor &next = m_next_transmit_desc; @@ -138,7 +149,7 @@ void am79c90_device::fetch_transmit_descriptor() next.m_tmd23 = m_dma_in_cb(next_addr + 1, ~0); } -void am79c90_device::fetch_receive_descriptor() +void am7990_device_base::fetch_receive_descriptor() { const uint32_t next_addr = (m_recv_ring_addr >> 2) + (m_recv_ring_pos << 1); ring_descriptor &next = m_next_recv_desc; @@ -146,7 +157,7 @@ void am79c90_device::fetch_receive_descriptor() next.m_rmd23 = m_dma_in_cb(next_addr + 1, ~0); } -void am79c90_device::recv_fifo_push(uint32_t value) +void am7990_device_base::recv_fifo_push(uint32_t value) { // TODO: Poll for the FIFO at 1.6ms, don't instantly start receiving! // "...If the C-LANCE does not own it, it will poll the ring once every 1.6ms until @@ -172,7 +183,7 @@ void am79c90_device::recv_fifo_push(uint32_t value) } } -void am79c90_device::begin_receiving() +void am7990_device_base::begin_receiving() { fetch_receive_descriptor(); m_curr_recv_desc = m_next_recv_desc; @@ -208,7 +219,7 @@ void am79c90_device::begin_receiving() } } -void am79c90_device::receive() +void am7990_device_base::receive() { const uint32_t received_value = (m_recv_fifo_write == 0) ? 0 : m_recv_fifo[m_recv_fifo_read]; m_recv_fifo_read++; @@ -277,7 +288,7 @@ void am79c90_device::receive() } } -void am79c90_device::transmit() +void am7990_device_base::transmit() { logerror("%s: LANCE transmit, fetching from %08x\n", machine().describe_context(), m_transmit_buf_addr >> 2); uint32_t transmit_value = 0; @@ -359,7 +370,7 @@ void am79c90_device::transmit() } } -void am79c90_device::prepare_transmit_buf() +void am7990_device_base::prepare_transmit_buf() { ring_descriptor &curr = m_curr_transmit_desc; m_transmit_buf_addr = ((curr.m_tmd01 << 16) | ((curr.m_tmd01 >> 16) & 0x00ffffff)) | 0xff000000; @@ -374,7 +385,7 @@ void am79c90_device::prepare_transmit_buf() logerror("%s: LANCE: Valid transmit descriptors found, preparing to transmit %d bytes\n", machine().describe_context(), m_transmit_buf_count); } -void am79c90_device::poll_transmit() +void am7990_device_base::poll_transmit() { ring_descriptor &curr = m_curr_transmit_desc; const uint32_t base_addr = (m_transmit_ring_addr >> 2) + (m_transmit_ring_pos << 1); @@ -436,7 +447,7 @@ void am79c90_device::poll_transmit() m_transmit_timer->adjust(attotime::from_hz(10'000'000), 0, attotime::from_hz(10'000'000)); } -void am79c90_device::update_interrupts() +void am7990_device_base::update_interrupts() { if (m_csr[0] & CSR0_ANY_INTR) { @@ -449,7 +460,7 @@ void am79c90_device::update_interrupts() m_irq_out_cb((m_csr[0] & CSR0_INTR) ? 1 : 0); } -READ16_MEMBER(am79c90_device::regs_r) +READ16_MEMBER(am7990_device_base::regs_r) { uint16_t ret = 0; if (offset) @@ -465,11 +476,11 @@ READ16_MEMBER(am79c90_device::regs_r) return ret; } -WRITE16_MEMBER(am79c90_device::regs_w) +WRITE16_MEMBER(am7990_device_base::regs_w) { if (offset) { - logerror("%s: lance_r: RAP = %d\n", machine().describe_context(), data & 3); + logerror("%s: lance_w: RAP = %d\n", machine().describe_context(), data & 3); m_rap = data & 3; } else @@ -512,7 +523,7 @@ WRITE16_MEMBER(am79c90_device::regs_w) m_mode = init_block[0]; m_physical_addr = ((uint64_t)init_block[3] << 32) | ((uint64_t)init_block[2] << 16) | (uint64_t)init_block[1]; m_logical_addr_filter = ((uint64_t)init_block[7] << 48) | ((uint64_t)init_block[6] << 32) - | ((uint64_t)init_block[5] << 16) | (uint64_t)init_block[4]; + | ((uint64_t)init_block[5] << 16) | (uint64_t)init_block[4]; m_recv_ring_addr = (((uint32_t)init_block[9] << 16) | (uint32_t)init_block[8]) & 0x00fffff8; m_recv_ring_addr |= 0xff000000; m_transmit_ring_addr = (((uint32_t)init_block[11] << 16) | (uint32_t)init_block[10]) & 0x00fffff8; @@ -557,10 +568,17 @@ WRITE16_MEMBER(am79c90_device::regs_w) } break; case 1: // Least significant 15 bits of the Initialization Block - m_csr[1] = data & 0xfffe; + // Datasheet says "must be zero", but doesn't indicate what + // happens if it's written non-zero. Must be writable to pass + // system diagnostic on MIPS RS2030. + m_csr[1] = data; break; case 2: // Most significant 8 bits of the Initialization Block - m_csr[2] = data & 0x00ff; + // The C-LANCE datasheet explicitly states these bits read and + // write as zero, while LANCE datasheet just says "reserved". + // MIPS RS2030 diagnostic requires these bits to be writable, + // so assuming this is older device behaviour. + m_csr[2] = (type() == AM7990) ? data : (data & 0x00ff); break; case 3: // Bus master interface m_csr[3] = data & 0x0007; diff --git a/src/devices/machine/am79c90.h b/src/devices/machine/am79c90.h index 1f6fcfedd5e..e163c7ca4ba 100644 --- a/src/devices/machine/am79c90.h +++ b/src/devices/machine/am79c90.h @@ -4,10 +4,10 @@ AMD Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE) - TODO: - - Communication with the outside world - - Error handling - - Clocks + TODO: + - Communication with the outside world + - Error handling + - Clocks ****************************************************************************** _____ _____ @@ -45,11 +45,9 @@ #include "hashing.h" -class am79c90_device : public device_t +class am7990_device_base : public device_t { public: - am79c90_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); - auto dma_out() { return m_dma_out_cb.bind(); } auto dma_in() { return m_dma_in_cb.bind(); } auto irq_out() { return m_irq_out_cb.bind(); } @@ -57,6 +55,9 @@ public: DECLARE_READ16_MEMBER(regs_r); DECLARE_WRITE16_MEMBER(regs_w); +protected: + am7990_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock = 0); + private: virtual void device_start() override; virtual void device_reset() override; @@ -197,6 +198,19 @@ private: util::crc32_creator m_crc32; }; +class am7990_device : public am7990_device_base +{ +public: + am7990_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); +}; + +class am79c90_device : public am7990_device_base +{ +public: + am79c90_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); +}; + +DECLARE_DEVICE_TYPE(AM7990, am7990_device) DECLARE_DEVICE_TYPE(AM79C90, am79c90_device) -#endif // MAME_MACHINE_AM79C90_H
\ No newline at end of file +#endif // MAME_MACHINE_AM79C90_H diff --git a/src/devices/machine/amigafdc.cpp b/src/devices/machine/amigafdc.cpp index 4217040bd5a..69ec9066f87 100644 --- a/src/devices/machine/amigafdc.cpp +++ b/src/devices/machine/amigafdc.cpp @@ -38,7 +38,7 @@ void amiga_fdc_device::device_start() m_write_dsksyn.resolve_safe(); m_leds.resolve(); - static const char *names[] = { "0", "1", "2", "3" }; + static char const *const names[] = { "0", "1", "2", "3" }; for(int i=0; i != 4; i++) { floppy_connector *con = subdevice<floppy_connector>(names[i]); if(con) @@ -567,15 +567,15 @@ int amiga_fdc_device::pll_t::get_next_bit(attotime &tm, floppy_image_device *flo int bit = transition_time != 0xffff; if(transition_time != 0xffff) { - static const uint8_t pha[8] = { 0xf, 0x7, 0x3, 0x1, 0, 0, 0, 0 }; - static const uint8_t phs[8] = { 0, 0, 0, 0, 0x1, 0x3, 0x7, 0xf }; - static const uint8_t freqa[4][8] = { + static uint8_t const pha[8] = { 0xf, 0x7, 0x3, 0x1, 0, 0, 0, 0 }; + static uint8_t const phs[8] = { 0, 0, 0, 0, 0x1, 0x3, 0x7, 0xf }; + static uint8_t const freqa[4][8] = { { 0xf, 0x7, 0x3, 0x1, 0, 0, 0, 0 }, { 0x7, 0x3, 0x1, 0, 0, 0, 0, 0 }, { 0x7, 0x3, 0x1, 0, 0, 0, 0, 0 }, { 0, 0, 0, 0, 0, 0, 0, 0 } }; - static const uint8_t freqs[4][8] = { + static uint8_t const freqs[4][8] = { { 0, 0, 0, 0, 0, 0, 0, 0 }, { 0, 0, 0, 0, 0, 0x1, 0x3, 0x7 }, { 0, 0, 0, 0, 0, 0x1, 0x3, 0x7 }, diff --git a/src/devices/machine/at_keybc.cpp b/src/devices/machine/at_keybc.cpp index 1c98e8cd43b..aec9154a38f 100644 --- a/src/devices/machine/at_keybc.cpp +++ b/src/devices/machine/at_keybc.cpp @@ -1,214 +1,405 @@ // license:BSD-3-Clause -// copyright-holders:Wilbert Pol +// copyright-holders:Vas Crabb /*************************************************************************** - IBM PC AT compatibles 8042 keyboard controller + IBM PC/AT and PS/2 keyboard controllers + + IBM used Intel UPI-41 microcontrollers to implement bidirectional + keyboard communication from the PC/AT and PS/2. On the PS/2, the + microcontroller also handles mouse communication. The PS/2 host + interface to the keyboard/mouse controller is backwards-compatible + for documented commands. However a number of undocumented commands + are no longer implemented, the pin assignments are different, and + interrupt outputs are latched externally using a 74ALS74 at ZM87. + + PC/AT I/O pin assignments: + P10: NC no connection + P11: NC no connection + P12: NC no connection + P13: NC no connection + P14: -RAM SEL enable external RAM low disables + P15: manufacturing setting low disables + P16: SW1 CRT adapter switch low for CGA + P17: +KBD INH inhibit keyboard active low + P20: RC reset CPU active low + P21: A20 GATE enable A20 line active high + P22: NC no connection + P23: NC no connection + P24: +OPT BUF FULL output buffer full active high + P25: NC no connection + P26: open collector KBD CLK inverted + P27: open collector KBD DATA not inverted + TEST0: KBD CLK not inverted + TEST1: KBD DATA not inverted + + PS/2 I/O pin assignments + P10: KYBD DATA not inverted + P11: MOUSE DATA not inverted + P12: keyboard/mouse power fuse low if blown + P13: no connection + P14: no connection + P15: no connection + P16: no connection + P17: no connection + P20: +HOT RES reset CPU inverted + P21: A20 PASS enable A20 line not inverted + P22: open collector MOUSE DATA inverted + P23: open collector MOUSE CLK inverted + P24: latched as BIRQ1 rising trigger + P25: latched as IRQ12 rising trigger + P26: open collector KYBD CLK inverted + P27: open collector KYBD DATA inverted + TEST0: KYBD CLK not inverted + TEST1: MOUSE CLK not inverted + + Notes: + * PS/2 BIRQ1 and IRQ12 are cleard by reading data. + * PS/2 BIRQ1 and IRQ12 are active low, but we use ASSERT_LINE here. + * PS/2 IRQ12 is open collector for sharing with cards. + + TODO: + * Move display type and key lock controls to drivers. + * Expose power fuse failure. ***************************************************************************/ #include "emu.h" #include "at_keybc.h" +namespace { -//************************************************************************** -// GLOBAL VARIABLES -//************************************************************************** +ROM_START(at_kbc) + ROM_REGION(0x0800, "mcu", 0) + ROM_SYSTEM_BIOS(0, "ibm", "IBM 1983") // 1983 IBM controller BIOS + ROMX_LOAD("1503033.bin", 0x0000, 0x0800, CRC(5a81c0d2) SHA1(0100f8789fb4de74706ae7f9473a12ec2b9bd729), ROM_BIOS(0)) + ROM_SYSTEM_BIOS(1, "ptl", "PTL 1986") // unknown controller BIOS, (c) 1985, 1986 PTL + ROMX_LOAD("yan25d05.bin", 0x0000, 0x0800, CRC(70c798f1) SHA1(ae9a79c7184a17331b70a50035ff63c757df094c), ROM_BIOS(1)) +ROM_END -DEFINE_DEVICE_TYPE(AT_KEYBOARD_CONTROLLER, at_keyboard_controller_device, "at_keybc", "AT Keyboard Controller") +ROM_START(ps2_kbc) + ROM_REGION(0x0800, "mcu", 0) + ROM_LOAD("72x8455.zm82", 0x0000, 0x0800, CRC(7da223d3) SHA1(54c52ff6c6a2310f79b2c7e6d1259be9de868f0e)) +ROM_END -static INPUT_PORTS_START( at_keybc ) - PORT_START("DSW") - PORT_BIT( 0xbf, 0xbf, IPT_UNUSED ) - PORT_DIPNAME( 0x40, 0x00, "Display switch") - PORT_DIPSETTING( 0x40, "Monochrome adapter" ) - PORT_DIPSETTING( 0x00, "Color/Graphics adapter" ) +INPUT_PORTS_START(at_kbc) + PORT_START("P1") + PORT_BIT(0x3f, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_CONFNAME(0x40, 0x00, "CRT Adapter Switch") + PORT_CONFSETTING( 0x40, "Monochrome Display Adapter") + PORT_CONFSETTING( 0x00, "Color Graphics Adapter") + PORT_CONFNAME(0x80, 0x80, "Key Lock") + PORT_CONFSETTING( 0x80, DEF_STR(Off)) + PORT_CONFSETTING( 0x00, DEF_STR(On)) INPUT_PORTS_END -// rom definition for the 8042 internal rom -ROM_START( at_keybc ) - ROM_REGION(0x800, "at_keybc", 0) +} // anonymous namespace - // unknown controller bios, (c) 1985, 1986 PTL - ROM_LOAD("yan25d05.bin", 0x000, 0x800, CRC(70c798f1) SHA1(ae9a79c7184a17331b70a50035ff63c757df094c)) - // 1983 ibm controller bios - ROM_LOAD("1503033.bin", 0x000, 0x800, CRC(5a81c0d2) SHA1(0100f8789fb4de74706ae7f9473a12ec2b9bd729)) -ROM_END //************************************************************************** -// LIVE DEVICE +// DEVICE TYPES //************************************************************************** -//------------------------------------------------- -// at_keyboard_controller_device - constructor -//------------------------------------------------- +DEFINE_DEVICE_TYPE(AT_KEYBOARD_CONTROLLER, at_keyboard_controller_device, "at_keybc", "PC/AT Keyboard Controller") +DEFINE_DEVICE_TYPE(PS2_KEYBOARD_CONTROLLER, ps2_keyboard_controller_device, "ps2_keybc", "PS/2 Keyboard/Mouse Controller") + -at_keyboard_controller_device::at_keyboard_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, AT_KEYBOARD_CONTROLLER, tag, owner, clock), - m_cpu(nullptr), - m_system_reset_cb(*this), - m_gate_a20_cb(*this), - m_input_buffer_full_cb(*this), - m_output_buffer_empty_cb(*this), - m_keyboard_clock_cb(*this), - m_keyboard_data_cb(*this) +//************************************************************************** +// KEYBOARD CONTROLLER DEVICE BASE +//************************************************************************** + +READ8_MEMBER(at_kbc_device_base::data_r) { + return m_mcu->upi41_master_r(space, 0U); } -//------------------------------------------------- -// rom_region - return a pointer to the device's -// internal ROM region -//------------------------------------------------- +READ8_MEMBER(at_kbc_device_base::status_r) +{ + return m_mcu->upi41_master_r(space, 1U); +} -const tiny_rom_entry *at_keyboard_controller_device::device_rom_region() const +WRITE8_MEMBER(at_kbc_device_base::data_w) { - return ROM_NAME(at_keybc); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(at_kbc_device_base::write_data), this), unsigned(data)); } -//------------------------------------------------- -// input_ports - device-specific input ports -//------------------------------------------------- +WRITE8_MEMBER(at_kbc_device_base::command_w) +{ + machine().scheduler().synchronize(timer_expired_delegate(FUNC(at_kbc_device_base::write_command), this), unsigned(data)); +} -ioport_constructor at_keyboard_controller_device::device_input_ports() const +WRITE_LINE_MEMBER(at_kbc_device_base::kbd_clk_w) { - return INPUT_PORTS_NAME( at_keybc ); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(at_kbc_device_base::set_kbd_clk_in), this), state); } -//------------------------------------------------- -// device_add_mconfig - add device configuration -//------------------------------------------------- +WRITE_LINE_MEMBER(at_kbc_device_base::kbd_data_w) +{ + machine().scheduler().synchronize(timer_expired_delegate(FUNC(at_kbc_device_base::set_kbd_data_in), this), state); +} -MACHINE_CONFIG_START(at_keyboard_controller_device::device_add_mconfig) - MCFG_DEVICE_ADD("at_keybc", I8042, DERIVED_CLOCK(1,1)) - MCFG_MCS48_PORT_T0_IN_CB(READLINE(*this, at_keyboard_controller_device, t0_r)) - MCFG_MCS48_PORT_T1_IN_CB(READLINE(*this, at_keyboard_controller_device, t1_r)) - MCFG_MCS48_PORT_P1_IN_CB(READ8(*this, at_keyboard_controller_device, p1_r)) - MCFG_MCS48_PORT_P2_IN_CB(READ8(*this, at_keyboard_controller_device, p2_r)) - MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, at_keyboard_controller_device, p2_w)) -MACHINE_CONFIG_END +at_kbc_device_base::at_kbc_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock) + : device_t(mconfig, type, tag, owner, clock) + , m_mcu(*this, "mcu") + , m_hot_res_cb(*this), m_gate_a20_cb(*this), m_kbd_irq_cb(*this) + , m_kbd_clk_cb(*this), m_kbd_data_cb(*this) + , m_hot_res(0U), m_gate_a20(0U), m_kbd_irq(0U) + , m_kbd_clk_in(1U), m_kbd_clk_out(1U), m_kbd_data_in(1U), m_kbd_data_out(1U) +{ +} -/*------------------------------------------------- - device_start - device-specific startup --------------------------------------------------*/ +void at_kbc_device_base::device_resolve_objects() +{ + m_hot_res_cb.resolve_safe(); + m_gate_a20_cb.resolve_safe(); + m_kbd_irq_cb.resolve_safe(); + m_kbd_clk_cb.resolve_safe(); + m_kbd_data_cb.resolve_safe(); +} -void at_keyboard_controller_device::device_start() +void at_kbc_device_base::device_start() { - // find our cpu - m_cpu = downcast<upi41_cpu_device *>(subdevice("at_keybc")); + save_item(NAME(m_hot_res)); + save_item(NAME(m_gate_a20)); + save_item(NAME(m_kbd_irq)); + save_item(NAME(m_kbd_clk_in)); + save_item(NAME(m_kbd_clk_out)); + save_item(NAME(m_kbd_data_in)); + save_item(NAME(m_kbd_data_out)); + + m_hot_res = m_gate_a20 = m_kbd_irq = 0U; + m_kbd_clk_in = m_kbd_clk_out = 1U; + m_kbd_data_in = m_kbd_data_out = 1U; +} - // resolve callbacks - m_system_reset_cb.resolve_safe(); - m_gate_a20_cb.resolve_safe(); - m_input_buffer_full_cb.resolve_safe(); - m_output_buffer_empty_cb.resolve_safe(); - m_keyboard_clock_cb.resolve_safe(); - m_keyboard_data_cb.resolve_safe(); +inline void at_kbc_device_base::set_hot_res(u8 state) +{ + if (state != m_hot_res) + m_hot_res_cb((m_hot_res = state) ? ASSERT_LINE : CLEAR_LINE); +} - // register for save states - save_item(NAME(m_clock_signal)); - save_item(NAME(m_data_signal)); +inline void at_kbc_device_base::set_gate_a20(u8 state) +{ + if (state != m_gate_a20) + m_gate_a20_cb((m_gate_a20 = state) ? ASSERT_LINE : CLEAR_LINE); } -/*------------------------------------------------- - device_reset - device-specific reset --------------------------------------------------*/ +inline void at_kbc_device_base::set_kbd_irq(u8 state) +{ + if (state != m_kbd_irq) + m_kbd_irq_cb((m_kbd_irq = state) ? ASSERT_LINE : CLEAR_LINE); +} -void at_keyboard_controller_device::device_reset() +inline void at_kbc_device_base::set_kbd_clk_out(u8 state) { + if (state != m_kbd_clk_out) + m_kbd_clk_cb(m_kbd_clk_out = state); } +inline void at_kbc_device_base::set_kbd_data_out(u8 state) +{ + if (state != m_kbd_data_out) + m_kbd_data_cb(m_kbd_data_out = state); +} -//************************************************************************** -// INTERNAL 8042 READ/WRITE HANDLERS -//************************************************************************** +inline u8 at_kbc_device_base::kbd_clk_r() const +{ + return m_kbd_clk_in & m_kbd_clk_out; +} + +inline u8 at_kbc_device_base::kbd_data_r() const +{ + return m_kbd_data_in & m_kbd_data_out; +} + +TIMER_CALLBACK_MEMBER(at_kbc_device_base::write_data) +{ + m_mcu->upi41_master_w(machine().dummy_space(), 0U, u8(u32(param))); +} + +TIMER_CALLBACK_MEMBER(at_kbc_device_base::write_command) +{ + m_mcu->upi41_master_w(machine().dummy_space(), 1U, u8(u32(param))); +} -READ_LINE_MEMBER( at_keyboard_controller_device::t0_r ) +TIMER_CALLBACK_MEMBER(at_kbc_device_base::set_kbd_clk_in) { - return m_clock_signal; + m_kbd_clk_in = param ? 1U : 0U; } -READ_LINE_MEMBER( at_keyboard_controller_device::t1_r ) +TIMER_CALLBACK_MEMBER(at_kbc_device_base::set_kbd_data_in) { - return m_data_signal; + m_kbd_data_in = param ? 1U : 0U; } -/* - Port 1 (Input port) - 0 - P10 - Undefined - 1 - P11 - Undefined - 2 - P12 - Undefined - 3 - P13 - Undefined - 4 - P14 - External RAM (1 = Enable external RAM, 0 = Disable external RAM) - 5 - P15 - Manufacturing setting (1 = Setting enabled, 0 = Setting disabled) - 6 - P16 - Display type switch (1 = Monochrome display, 0 = Color display) - 7 - P17 - Keyboard inhibit switch (1 = Keyboard enabled, 0 = Keyboard inhibited) -*/ -READ8_MEMBER( at_keyboard_controller_device::p1_r ) + +//************************************************************************** +// PC/AT KEYBOARD CONTROLLER DEVICE +//************************************************************************** + +at_keyboard_controller_device::at_keyboard_controller_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) + : at_kbc_device_base(mconfig, AT_KEYBOARD_CONTROLLER, tag, owner, clock) { - return ioport("DSW")->read(); } -READ8_MEMBER( at_keyboard_controller_device::p2_r ) +tiny_rom_entry const *at_keyboard_controller_device::device_rom_region() const { - return 0xff; + return ROM_NAME(at_kbc); } -/* - Port 2 (Output port) - 0 - P20 - System Reset (1 = Normal, 0 = Reset computer) - 1 - P21 - Gate A20 - 2 - P22 - Undefined - 3 - P23 - Undefined - 4 - P24 - Input Buffer Full - 5 - P25 - Output Buffer Empty - 6 - P26 - Keyboard Clock (1 = Pull Clock low, 0 = High-Z) - 7 - P27 - Keyboard Data (1 = Pull Data low, 0 = High-Z) -*/ -WRITE8_MEMBER( at_keyboard_controller_device::p2_w ) +void at_keyboard_controller_device::device_add_mconfig(machine_config &config) { - m_system_reset_cb(BIT(data, 0) ? CLEAR_LINE : ASSERT_LINE); - m_gate_a20_cb(BIT(data, 1) ? ASSERT_LINE : CLEAR_LINE); - m_input_buffer_full_cb(BIT(data, 4) ? ASSERT_LINE : CLEAR_LINE); - m_output_buffer_empty_cb(BIT(data, 5) ? ASSERT_LINE : CLEAR_LINE); + I8042(config, m_mcu, DERIVED_CLOCK(1, 1)); + m_mcu->p1_in_cb().set_ioport("P1"); + m_mcu->p1_out_cb().set_nop(); + m_mcu->p2_in_cb().set_constant(0xffU); + m_mcu->p2_out_cb().set(FUNC(at_keyboard_controller_device::p2_w)); + m_mcu->t0_in_cb().set([this] () { return kbd_clk_r(); }); + m_mcu->t1_in_cb().set([this] () { return kbd_data_r(); }); +} - m_clock_signal = !BIT(data, 6); - m_data_signal = BIT(data, 7); +ioport_constructor at_keyboard_controller_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(at_kbc); +} - m_keyboard_data_cb(m_data_signal); - m_keyboard_clock_cb(m_clock_signal); +WRITE8_MEMBER(at_keyboard_controller_device::p2_w) +{ + set_hot_res(BIT(~data, 0)); + set_gate_a20(BIT(data, 1)); + set_kbd_irq(BIT(data, 4)); + set_kbd_clk_out(BIT(~data, 6)); + set_kbd_data_out(BIT(data, 7)); } //************************************************************************** -// READ/WRITE HANDLERS +// PS/2 KEYBOARD/MOUSE CONTROLLER DEVICE //************************************************************************** -READ8_MEMBER( at_keyboard_controller_device::data_r ) +READ8_MEMBER(ps2_keyboard_controller_device::data_r) +{ + set_kbd_irq(0U); + set_mouse_irq(0U); + return m_mcu->upi41_master_r(space, 0U); +} + +WRITE_LINE_MEMBER(ps2_keyboard_controller_device::mouse_clk_w) +{ + machine().scheduler().synchronize(timer_expired_delegate(FUNC(ps2_keyboard_controller_device::set_mouse_clk_in), this), state); +} + +WRITE_LINE_MEMBER(ps2_keyboard_controller_device::mouse_data_w) +{ + machine().scheduler().synchronize(timer_expired_delegate(FUNC(ps2_keyboard_controller_device::set_mouse_data_in), this), state); +} + +ps2_keyboard_controller_device::ps2_keyboard_controller_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) + : at_kbc_device_base(mconfig, PS2_KEYBOARD_CONTROLLER, tag, owner, clock) + , m_mouse_irq_cb(*this) + , m_mouse_clk_cb(*this), m_mouse_data_cb(*this) + , m_mouse_irq(0U) + , m_mouse_clk_in(1U), m_mouse_clk_out(1U), m_mouse_data_in(1U), m_mouse_data_out(1U) + , m_p2_data(0xffU) +{ +} + +tiny_rom_entry const *ps2_keyboard_controller_device::device_rom_region() const +{ + return ROM_NAME(ps2_kbc); +} + +void ps2_keyboard_controller_device::device_add_mconfig(machine_config &config) +{ + I8042(config, m_mcu, DERIVED_CLOCK(1, 1)); + m_mcu->p1_in_cb().set(FUNC(ps2_keyboard_controller_device::p1_r)); + m_mcu->p1_out_cb().set_nop(); + m_mcu->p2_in_cb().set_constant(0xffU); + m_mcu->p2_out_cb().set(FUNC(ps2_keyboard_controller_device::p2_w)); + m_mcu->t0_in_cb().set([this] () { return kbd_clk_r(); }); + m_mcu->t1_in_cb().set([this] () { return mouse_clk_r(); }); +} + +void ps2_keyboard_controller_device::device_resolve_objects() +{ + at_kbc_device_base::device_resolve_objects(); + + m_mouse_clk_cb.resolve_safe(); + m_mouse_data_cb.resolve_safe(); +} + +void ps2_keyboard_controller_device::device_start() +{ + at_kbc_device_base::device_start(); + + save_item(NAME(m_mouse_irq)); + save_item(NAME(m_mouse_clk_in)); + save_item(NAME(m_mouse_clk_out)); + save_item(NAME(m_mouse_data_in)); + save_item(NAME(m_mouse_data_out)); + save_item(NAME(m_p2_data)); + + m_mouse_irq = 0U; + m_mouse_clk_in = m_mouse_clk_out = 1U; + m_mouse_data_in = m_mouse_data_out = 1U; + m_p2_data = 0xffU; +} + +inline void ps2_keyboard_controller_device::set_mouse_irq(u8 state) +{ + if (state != m_mouse_irq) + m_mouse_irq_cb((m_mouse_irq = state) ? ASSERT_LINE : CLEAR_LINE); +} + +inline void ps2_keyboard_controller_device::set_mouse_clk_out(u8 state) +{ + if (state != m_mouse_clk_out) + m_mouse_clk_cb(m_mouse_clk_out = state); +} + +inline void ps2_keyboard_controller_device::set_mouse_data_out(u8 state) +{ + if (state != m_mouse_data_out) + m_mouse_data_cb(m_mouse_data_out = state); +} + +inline u8 ps2_keyboard_controller_device::mouse_clk_r() const { - return m_cpu->upi41_master_r(space, 0); + return m_mouse_clk_in & m_mouse_clk_out; } -WRITE8_MEMBER( at_keyboard_controller_device::data_w ) +inline u8 ps2_keyboard_controller_device::mouse_data_r() const { - m_cpu->upi41_master_w(space, 0, data); + return m_mouse_data_in & m_mouse_data_out; } -READ8_MEMBER( at_keyboard_controller_device::status_r ) +TIMER_CALLBACK_MEMBER(ps2_keyboard_controller_device::set_mouse_clk_in) { - return m_cpu->upi41_master_r(space, 1); + m_mouse_clk_in = param ? 1U : 0U; } -WRITE8_MEMBER( at_keyboard_controller_device::command_w ) +TIMER_CALLBACK_MEMBER(ps2_keyboard_controller_device::set_mouse_data_in) { - m_cpu->upi41_master_w(space, 1, data); + m_mouse_data_in = param ? 1U : 0U; } -WRITE_LINE_MEMBER( at_keyboard_controller_device::keyboard_clock_w ) +READ8_MEMBER(ps2_keyboard_controller_device::p1_r) { - m_clock_signal = state; + return kbd_data_r() | (mouse_data_r() << 1) | 0xfcU; } -WRITE_LINE_MEMBER( at_keyboard_controller_device::keyboard_data_w ) +WRITE8_MEMBER(ps2_keyboard_controller_device::p2_w) { - m_data_signal = state; + set_hot_res(BIT(~data, 0)); + set_gate_a20(BIT(data, 1)); + set_mouse_data_out(BIT(~data, 2)); + set_mouse_clk_out(BIT(~data, 3)); + set_kbd_clk_out(BIT(~data, 6)); + set_kbd_data_out(BIT(~data, 7)); + + if (BIT(data & ~m_p2_data, 4)) + set_kbd_irq(1U); + if (BIT(data & ~m_p2_data, 5)) + set_mouse_irq(1U); + m_p2_data = data; } diff --git a/src/devices/machine/at_keybc.h b/src/devices/machine/at_keybc.h index b47336dacf4..77bf039a7a1 100644 --- a/src/devices/machine/at_keybc.h +++ b/src/devices/machine/at_keybc.h @@ -1,11 +1,10 @@ // license:BSD-3-Clause -// copyright-holders:Wilbert Pol +// copyright-holders:Vas Crabb /*************************************************************************** - IBM PC AT compatibles 8042 keyboard controller + IBM PC/AT and PS/2 keyboard controllers ***************************************************************************/ - #ifndef MAME_MACHINE_AT_KEYBC_H #define MAME_MACHINE_AT_KEYBC_H @@ -15,70 +14,152 @@ //************************************************************************** -// TYPE DEFINITIONS +// KEYBOARD CONTROLLER DEVICE BASE //************************************************************************** -// ======================> at_keyboard_controller_device - -class at_keyboard_controller_device : public device_t +class at_kbc_device_base : public device_t { public: - // construction/destruction - at_keyboard_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - auto system_reset_cb() { return m_system_reset_cb.bind(); } - auto gate_a20_cb() { return m_gate_a20_cb.bind(); } - auto input_buffer_full_cb() { return m_input_buffer_full_cb.bind(); } - auto output_buffer_empty_cb() { return m_output_buffer_empty_cb.bind(); } - auto keyboard_clock_cb() { return m_keyboard_clock_cb.bind(); } - auto keyboard_data_cb() { return m_keyboard_data_cb.bind(); } - - // interface to the host pc - DECLARE_READ8_MEMBER( data_r ); - DECLARE_WRITE8_MEMBER( data_w ); - DECLARE_READ8_MEMBER( status_r ); - DECLARE_WRITE8_MEMBER( command_w ); - - // interface to the keyboard - DECLARE_WRITE_LINE_MEMBER( keyboard_clock_w ); - DECLARE_WRITE_LINE_MEMBER( keyboard_data_w ); + // outputs to host + auto hot_res() { return m_hot_res_cb.bind(); } + auto gate_a20() { return m_gate_a20_cb.bind(); } + auto kbd_irq() { return m_kbd_irq_cb.bind(); } + + // outputs to keyboard + auto kbd_clk() { return m_kbd_clk_cb.bind(); } // open collector with 10kΩ pull-up + auto kbd_data() { return m_kbd_data_cb.bind(); } // open collector with 10kΩ pull-up + + // host interface + virtual DECLARE_READ8_MEMBER(data_r); + virtual DECLARE_READ8_MEMBER(status_r); + DECLARE_WRITE8_MEMBER(data_w); + DECLARE_WRITE8_MEMBER(command_w); + + // inputs from keyboard + DECLARE_WRITE_LINE_MEMBER(kbd_clk_w); + DECLARE_WRITE_LINE_MEMBER(kbd_data_w); protected: - // device-level overrides + // trampoline constructor + at_kbc_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock); + + // device_t implementation + virtual void device_resolve_objects() override; virtual void device_start() override; - virtual void device_reset() override; - virtual const tiny_rom_entry *device_rom_region() const override; + // host outputs - use 1 = asserted, 0 = deasserted + void set_hot_res(u8 state); + void set_gate_a20(u8 state); + void set_kbd_irq(u8 state); + + // keyboard line drive - use 1 = pulled up, 0 = driven low + void set_kbd_clk_out(u8 state); + void set_kbd_data_out(u8 state); + u8 kbd_clk_r() const; + u8 kbd_data_r() const; + + required_device<upi41_cpu_device> m_mcu; + +private: + // internal sync helpers + TIMER_CALLBACK_MEMBER(write_data); + TIMER_CALLBACK_MEMBER(write_command); + TIMER_CALLBACK_MEMBER(set_kbd_clk_in); + TIMER_CALLBACK_MEMBER(set_kbd_data_in); + + devcb_write_line m_hot_res_cb, m_gate_a20_cb, m_kbd_irq_cb; + devcb_write_line m_kbd_clk_cb, m_kbd_data_cb; + + u8 m_hot_res, m_gate_a20, m_kbd_irq; + u8 m_kbd_clk_in, m_kbd_clk_out, m_kbd_data_in, m_kbd_data_out; +}; + + +//************************************************************************** +// PC/AT KEYBOARD CONTROLLER DEVICE +//************************************************************************** + +class at_keyboard_controller_device : public at_kbc_device_base +{ +public: + // standard constructor + at_keyboard_controller_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); + +protected: + // device_t implementation + virtual tiny_rom_entry const *device_rom_region() const override; + virtual void device_add_mconfig(machine_config &config) override; virtual ioport_constructor device_input_ports() const override; + +private: + // MCU I/O handlers + DECLARE_WRITE8_MEMBER(p2_w); +}; + + +//************************************************************************** +// PS/2 KEYBOARD/MOUSE CONTROLLER DEVICE +//************************************************************************** + +class ps2_keyboard_controller_device : public at_kbc_device_base +{ +public: + // outputs to host + auto mouse_irq() { return m_mouse_irq_cb.bind(); } + + // outputs to mouse + auto mouse_clk() { return m_mouse_clk_cb.bind(); } // open collector with 10kΩ pull-up + auto mouse_data() { return m_mouse_data_cb.bind(); } // open collector with 10kΩ pull-up + + // host interface + virtual DECLARE_READ8_MEMBER(data_r) override; + + // inputs from mouse + DECLARE_WRITE_LINE_MEMBER(mouse_clk_w); + DECLARE_WRITE_LINE_MEMBER(mouse_data_w); + + // standard constructor + ps2_keyboard_controller_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); + +protected: + // device_t implementation + virtual tiny_rom_entry const *device_rom_region() const override; virtual void device_add_mconfig(machine_config &config) override; + virtual void device_resolve_objects() override; + virtual void device_start() override; private: - // internal 8042 interface - DECLARE_READ_LINE_MEMBER( t0_r ); - DECLARE_READ_LINE_MEMBER( t1_r ); - DECLARE_READ8_MEMBER( p1_r ); - DECLARE_READ8_MEMBER( p2_r ); - DECLARE_WRITE8_MEMBER( p2_w ); - - // internal state - upi41_cpu_device *m_cpu; - - // interface to the host pc - devcb_write_line m_system_reset_cb; - devcb_write_line m_gate_a20_cb; - devcb_write_line m_input_buffer_full_cb; - devcb_write_line m_output_buffer_empty_cb; - - // interface to the keyboard - devcb_write_line m_keyboard_clock_cb; - devcb_write_line m_keyboard_data_cb; - - uint8_t m_clock_signal; - uint8_t m_data_signal; + // host outputs - use 1 = asserted, 0 = deasserted + void set_mouse_irq(u8 state); + + // mouse line drive - use 1 = pulled up, 0 = driven low + void set_mouse_clk_out(u8 state); + void set_mouse_data_out(u8 state); + u8 mouse_clk_r() const; + u8 mouse_data_r() const; + + // internal sync helpers + TIMER_CALLBACK_MEMBER(set_mouse_clk_in); + TIMER_CALLBACK_MEMBER(set_mouse_data_in); + + // MCU I/O handlers + DECLARE_READ8_MEMBER(p1_r); + DECLARE_WRITE8_MEMBER(p2_w); + + devcb_write_line m_mouse_irq_cb; + devcb_write_line m_mouse_clk_cb, m_mouse_data_cb; + + u8 m_mouse_irq; + u8 m_mouse_clk_in, m_mouse_clk_out, m_mouse_data_in, m_mouse_data_out; + u8 m_p2_data; }; -// device type definition +//************************************************************************** +// DEVICE TYPES +//************************************************************************** + DECLARE_DEVICE_TYPE(AT_KEYBOARD_CONTROLLER, at_keyboard_controller_device) +DECLARE_DEVICE_TYPE(PS2_KEYBOARD_CONTROLLER, ps2_keyboard_controller_device) #endif // MAME_MACHINE_AT_KEYBC_H diff --git a/src/devices/machine/ay31015.cpp b/src/devices/machine/ay31015.cpp index c3f5ae7f2d6..b9cc6c74a9b 100644 --- a/src/devices/machine/ay31015.cpp +++ b/src/devices/machine/ay31015.cpp @@ -614,6 +614,8 @@ void ay31015_device::internal_reset() m_rx_state = PREP_TIME; m_tx_state = IDLE; m_pins[SI] = 1; + m_pins[EOC] = 1; + m_pins[TBMT] = 1; set_so(1); m_rx_data = 0; @@ -639,6 +641,8 @@ void ay51013_device::internal_reset() m_rx_state = PREP_TIME; m_tx_state = IDLE; m_pins[SI] = 1; + m_pins[EOC] = 1; + m_pins[TBMT] = 1; set_so(1); // no m_rx_data = 0 in this case } diff --git a/src/devices/machine/clock.cpp b/src/devices/machine/clock.cpp index 927a0aecbf5..374dc8a16a8 100644 --- a/src/devices/machine/clock.cpp +++ b/src/devices/machine/clock.cpp @@ -22,48 +22,25 @@ void clock_device::device_start() void clock_device::device_clock_changed() { - update_timer(); -} - -attotime clock_device::period() -{ - if (m_clock > 0) - return attotime::from_hz(m_clock * 2); - - return attotime::never; -} - -void clock_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) -{ - m_signal = !m_signal; - m_signal_handler(m_signal); - - m_timer->adjust(period()); -} - -void clock_device::update_timer() -{ if (!m_signal_handler.isnull() && m_clock > 0) { if (m_timer == nullptr) - { m_timer = timer_alloc(0); - m_timer->adjust(period()); - } - else - { - attotime next = period() - m_timer->elapsed(); - if (next < attotime::zero) - { - next = attotime::zero; - } + const attotime period(attotime::from_hz(m_clock * 2)); + + attotime next = period - m_timer->elapsed(); + if (next < attotime::zero) + next = attotime::zero; - m_timer->adjust(next); - } + m_timer->adjust(next, 0, period); } else if (m_timer != nullptr) - { m_timer->adjust(attotime::never); - } +} + +void clock_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + m_signal = !m_signal; + m_signal_handler(m_signal); } diff --git a/src/devices/machine/clock.h b/src/devices/machine/clock.h index dbe6cd00bd9..32989a15149 100644 --- a/src/devices/machine/clock.h +++ b/src/devices/machine/clock.h @@ -26,9 +26,6 @@ protected: virtual void device_clock_changed() override; private: - void update_timer(); - attotime period(); - int m_signal; emu_timer *m_timer; diff --git a/src/devices/machine/com8116.cpp b/src/devices/machine/com8116.cpp index 3a804d764d0..0a3da24042e 100644 --- a/src/devices/machine/com8116.cpp +++ b/src/devices/machine/com8116.cpp @@ -37,7 +37,7 @@ DEFINE_DEVICE_TYPE(COM5016_013, com5016_013_device, "com5016_013", "COM5016-013 const int com8116_device::divisors_16X_5_0688MHz[16] = { 6336, 4224, 2880, 2355, 2112, 1056, 528, 264, 176, 158, 132, 88, 66, 44, 33, 16 }; -// SMC/COM8116-003 +// SMC/COM8116-003 and WD WD-1943-03 // from http://www.vintagecomputer.net/fjkraan/comp/divcomp/doc/SMC_BaudGen.pdf page 283 (pdf page 20) // baud rates are 50, 75, 110, 134.5, 150, 200, 300, 600, 1200, 1800, 2000, 2400, 3600, 4800, 9600, 19200 // SMC/COM8116T-020 should have similar output rates, but clock is unknown and probably different @@ -54,11 +54,11 @@ const int com8116_device::divisors_16X_4_9152MHz[16] = // SMC/COM5016(T)-6 and WD WD-1943-06 // baud rates are 50, 75, 110, 134.5, 150, 200, 300, 600, 1200, 1800, 2400, 3600, 4800, 7200, 9600, 19200 const int com8116_device::divisors_32X_5_0688MHz[16] = - { 3168, 2112, 1440, 1177, 1056, 792, 528, 264, 132, 88, 66, 44, 33, 22, 16, 8 }; + { 3168, 2112, 1440, 1177, 1056, 792, 528, 264, 132, 88, 66, 44, 33, 22, 17, 8 }; -// SMC/COM5016(T)-013 (from http://bitsavers.informatik.uni-stuttgart.de/pdf/dec/terminal/vt100/EK-VT100-TM-003_VT100_Technical_Manual_Jul82.pdf page 4-27 (pdf page 78)) +// SMC/COM5016(T)-013 and WD WD-1943-02 (from http://bitsavers.informatik.uni-stuttgart.de/pdf/dec/terminal/vt100/EK-VT100-TM-003_VT100_Technical_Manual_Jul82.pdf page 4-27 (pdf page 78)) // and from http://www.vintagecomputer.net/fjkraan/comp/divcomp/doc/SMC_BaudGen.pdf page 283 (pdf page 20) -// SMC/COM5106-013A is the same chip clocked twice as fast, but with 32x clocks per baud instead of 16x +// SMC/COM5106-013A and WD WD-1943-04 are the same chip clocked twice as fast, but with 32x clocks per baud instead of 16x // baud rates are 50, 75, 110, 134.5, 150, 200, 300, 600, 1200, 1800, 2000, 2400, 3600, 4800, 9600, 19200 const int com8116_device::divisors_16X_2_7648MHz[16] = { 3456, 2304, 1571, 1285, 1152, 864, 576, 288, 144, 96, 86, 72, 48, 36, 18, 9 }; diff --git a/src/devices/machine/cs4031.cpp b/src/devices/machine/cs4031.cpp index ea314b7aa5c..fb1ac37b698 100644 --- a/src/devices/machine/cs4031.cpp +++ b/src/devices/machine/cs4031.cpp @@ -173,6 +173,13 @@ cs4031_device::cs4031_device(const machine_config &mconfig, const char *tag, dev m_write_cpureset(*this), m_write_a20m(*this), m_write_spkr(*this), + m_cpu(*this, finder_base::DUMMY_TAG), + m_keybc(*this, finder_base::DUMMY_TAG), + m_isa(*this, finder_base::DUMMY_TAG), + m_bios(*this, finder_base::DUMMY_TAG), + m_space(nullptr), + m_space_io(nullptr), + m_ram(nullptr), m_dma1(*this, "dma1"), m_dma2(*this, "dma2"), m_intc1(*this, "intc1"), @@ -239,13 +246,8 @@ void cs4031_device::device_start() save_item(NAME(m_address_valid)); save_item(NAME(m_registers)); - device_t *cpu = machine().device(m_cputag); - m_space = &cpu->memory().space(AS_PROGRAM); - m_space_io = &cpu->memory().space(AS_IO); - - m_isa = machine().root_device().memregion(m_isatag)->base(); - m_bios = machine().root_device().memregion(m_biostag)->base(); - m_keybc = downcast<at_keyboard_controller_device *>(machine().device(m_keybctag)); + m_space = &m_cpu->memory().space(AS_PROGRAM); + m_space_io = &m_cpu->memory().space(AS_IO); m_ram = ram_dev->pointer(); uint32_t ram_size = ram_dev->size(); @@ -262,17 +264,17 @@ void cs4031_device::device_start() // install i/o accesses m_space_io->install_readwrite_handler(0x0000, 0x000f, read8_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffffffff); - m_space_io->install_readwrite_handler(0x0020, 0x0023, read8_delegate(FUNC(pic8259_device::read), &(*m_intc1)), write8_delegate(FUNC(pic8259_device::write), &(*m_intc1)), 0x0000ffff); + m_space_io->install_readwrite_handler(0x0020, 0x0023, read8sm_delegate(FUNC(pic8259_device::read), &(*m_intc1)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_intc1)), 0x0000ffff); m_space_io->install_write_handler(0x0020, 0x0023, write8_delegate(FUNC(cs4031_device::config_address_w), this), 0x00ff0000); m_space_io->install_readwrite_handler(0x0020, 0x0023, read8_delegate(FUNC(cs4031_device::config_data_r), this), write8_delegate(FUNC(cs4031_device::config_data_w), this), 0xff000000); - m_space_io->install_readwrite_handler(0x0040, 0x0043, read8_delegate(FUNC(pit8254_device::read), &(*m_ctc)), write8_delegate(FUNC(pit8254_device::write), &(*m_ctc)), 0xffffffff); + m_space_io->install_readwrite_handler(0x0040, 0x0043, read8sm_delegate(FUNC(pit8254_device::read), &(*m_ctc)), write8sm_delegate(FUNC(pit8254_device::write), &(*m_ctc)), 0xffffffff); m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(cs4031_device::keyb_data_r), this), write8_delegate(FUNC(cs4031_device::keyb_data_w), this), 0x000000ff); m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(cs4031_device::portb_r), this), write8_delegate(FUNC(cs4031_device::portb_w), this), 0x0000ff00); m_space_io->install_readwrite_handler(0x0064, 0x0067, read8_delegate(FUNC(cs4031_device::keyb_status_r), this), write8_delegate(FUNC(cs4031_device::keyb_command_w), this), 0x000000ff); m_space_io->install_readwrite_handler(0x0070, 0x0073, read8_delegate(FUNC(mc146818_device::read), &(*m_rtc)), write8_delegate(FUNC(cs4031_device::rtc_w), this), 0x0000ffff); m_space_io->install_readwrite_handler(0x0080, 0x008f, read8_delegate(FUNC(cs4031_device::dma_page_r), this), write8_delegate(FUNC(cs4031_device::dma_page_w), this), 0xffffffff); m_space_io->install_readwrite_handler(0x0090, 0x0093, read8_delegate(FUNC(cs4031_device::sysctrl_r), this), write8_delegate(FUNC(cs4031_device::sysctrl_w), this), 0x00ff0000); - m_space_io->install_readwrite_handler(0x00a0, 0x00a3, read8_delegate(FUNC(pic8259_device::read), &(*m_intc2)), write8_delegate(FUNC(pic8259_device::write), &(*m_intc2)), 0x0000ffff); + m_space_io->install_readwrite_handler(0x00a0, 0x00a3, read8sm_delegate(FUNC(pic8259_device::read), &(*m_intc2)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_intc2)), 0x0000ffff); m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8_delegate(FUNC(cs4031_device::dma2_r),this), write8_delegate(FUNC(cs4031_device::dma2_w),this), 0xffffffff); } diff --git a/src/devices/machine/cs4031.h b/src/devices/machine/cs4031.h index 5ffe8562628..4ea5829e3aa 100644 --- a/src/devices/machine/cs4031.h +++ b/src/devices/machine/cs4031.h @@ -35,13 +35,14 @@ class cs4031_device : public device_t { public: // construction/destruction - cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const char *cputag, const char *isatag, const char *biostag, const char *keybctag) + template <typename T, typename U, typename V, typename W> + cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cputag, U &&isatag, V &&biostag, W &&keybctag) : cs4031_device(mconfig, tag, owner, clock) { - set_cputag(cputag); - set_isatag(isatag); - set_biostag(biostag); - set_keybctag(keybctag); + set_cputag(std::forward<T>(cputag)); + set_isatag(std::forward<U>(isatag)); + set_biostag(std::forward<V>(biostag)); + set_keybctag(std::forward<W>(keybctag)); } cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -114,10 +115,10 @@ public: IRQ_CALLBACK_MEMBER(int_ack_r) { return m_intc1->acknowledge(); } // inline configuration - void set_cputag(const char *tag) { m_cputag = tag; } - void set_isatag(const char *tag) { m_isatag = tag; } - void set_biostag(const char *tag) { m_biostag = tag; } - void set_keybctag(const char *tag) { m_keybctag = tag; } + template <typename T> void set_cputag(T &&tag) { m_cpu.set_tag(std::forward<T>(tag)); } + template <typename T> void set_isatag(T &&tag) { m_isa.set_tag(std::forward<T>(tag)); } + template <typename T> void set_biostag(T &&tag) { m_bios.set_tag(std::forward<T>(tag)); } + template <typename T> void set_keybctag(T &&tag) { m_keybc.set_tag(std::forward<T>(tag)); } protected: // device-level overrides @@ -156,15 +157,13 @@ private: void update_write_regions(); // internal state - const char *m_cputag; - const char *m_isatag; - const char *m_biostag; - const char *m_keybctag; + required_device<device_memory_interface> m_cpu; + required_device<at_kbc_device_base> m_keybc; + required_region_ptr<uint8_t> m_isa; + required_region_ptr<uint8_t> m_bios; address_space *m_space; address_space *m_space_io; - uint8_t *m_isa; - uint8_t *m_bios; uint8_t *m_ram; // ipc core devices @@ -186,7 +185,6 @@ private: int m_nmi_mask; // keyboard - at_keyboard_controller_device *m_keybc; int m_cpureset; int m_kbrst; int m_ext_gatea20; diff --git a/src/devices/machine/dp83932c.cpp b/src/devices/machine/dp83932c.cpp new file mode 100644 index 00000000000..c8c7fcfcd9e --- /dev/null +++ b/src/devices/machine/dp83932c.cpp @@ -0,0 +1,140 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +/* + * An implementation of the National Semiconductor DP83932C SONIC™ (Systems- + * Oriented Network Interface Controller) device. + * + * References: + * + * http://bitsavers.org/components/national/_dataBooks/1995_National_Ethernet_Databook.pdf + * + * TODO + * - everything (skeleton only) + */ + +#include "emu.h" +#include "dp83932c.h" +#include "hashing.h" + +#define VERBOSE 0 +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(DP83932C_BE, dp83932c_be_device, "dp83932c_be", "National Semiconductor DP83932C SONIC (big)") +DEFINE_DEVICE_TYPE(DP83932C_LE, dp83932c_le_device, "dp83932c_le", "National Semiconductor DP83932C SONIC (little)") + +dp83932c_device::dp83932c_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endian) + : device_t(mconfig, type, tag, owner, clock) + , device_memory_interface(mconfig, *this) + , device_network_interface(mconfig, *this, 10.0f) + , m_space_config("shared", endian, 32, 32) + , m_out_int(*this) +{ +} + +dp83932c_be_device::dp83932c_be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : dp83932c_device(mconfig, DP83932C_BE, tag, owner, clock, ENDIANNESS_BIG) +{ +} + +dp83932c_le_device::dp83932c_le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : dp83932c_device(mconfig, DP83932C_LE, tag, owner, clock, ENDIANNESS_LITTLE) +{ +} + +void dp83932c_device::map(address_map &map) +{ +/* + // command and status registers + map(0x00, 0x03).rw(FUNC(dp83932c_device::cr_r), FUNC(dp83932c_device::cr_w)); + map(0x04, 0x07).rw(FUNC(dp83932c_device::dcr_r), FUNC(dp83932c_device::dcr_w)); + map(0x08, 0x0b).rw(FUNC(dp83932c_device::rcr_r), FUNC(dp83932c_device::rcr_w)); + map(0x0c, 0x0f).rw(FUNC(dp83932c_device::tcr_r), FUNC(dp83932c_device::tcr_w)); + map(0x10, 0x13).rw(FUNC(dp83932c_device::imr_r), FUNC(dp83932c_device::imr_w)); + map(0x14, 0x17).rw(FUNC(dp83932c_device::isr_r), FUNC(dp83932c_device::isr_w)); + + // transmit registers + map(0x18, 0x1b).rw(FUNC(dp83932c_device::utda_r), FUNC(dp83932c_device::utda_w)); + map(0x1c, 0x1f).rw(FUNC(dp83932c_device::ctda_r), FUNC(dp83932c_device::ctda_w)); + + // tps + // tfc + // tsa0 + // tsa1 + // tfs + + // receive registers + map(0x34, 0x37).rw(FUNC(dp83932c_device::urda_r), FUNC(dp83932c_device::urda_w)); + map(0x38, 0x3b).rw(FUNC(dp83932c_device::crda_r), FUNC(dp83932c_device::crda_w)); + + // crba0 + // crba1 + // rbwc0 + // rbwc1 + // eobc + // urra + // rsa + // rea + // rrp + // rwp + // trba0 + // trba1 + // tbwc0 + // tbwc1 + // addr0 + // addr1 + // llfa + // ttda + // cep + // cap2 + // cap1 + // cap0 + // ce + // cdp + // cdc + // sr + // wt0 + // wt1 + // rsc + // crct + // faet + // mpt + // mdt + + // 30-3e internal use registers +*/ +} + +void dp83932c_device::device_start() +{ + m_space = &space(0); + m_out_int.resolve(); +} + +void dp83932c_device::device_reset() +{ +} + +void dp83932c_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ +} + +device_memory_interface::space_config_vector dp83932c_device::memory_space_config() const +{ + return space_config_vector { + std::make_pair(0, &m_space_config) + }; +} + +void dp83932c_device::send_complete_cb(int result) +{ +} + +int dp83932c_device::recv_start_cb(u8 *buf, int length) +{ + return 0; +} + +void dp83932c_device::recv_complete_cb(int result) +{ +} diff --git a/src/devices/machine/dp83932c.h b/src/devices/machine/dp83932c.h new file mode 100644 index 00000000000..27f5ae60d85 --- /dev/null +++ b/src/devices/machine/dp83932c.h @@ -0,0 +1,59 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +#ifndef MAME_MACHINE_DP83932C_H +#define MAME_MACHINE_DP83932C_H + +#pragma once + +class dp83932c_device : + public device_t, + public device_memory_interface, + public device_network_interface +{ +public: + // callback configuration + auto out_int_cb() { return m_out_int.bind(); } + + void map(address_map &map); + +protected: + dp83932c_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endian); + + // device_t overrides + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + + // device_memory_interface overrides + virtual space_config_vector memory_space_config() const override; + + // device_network_interface overrides + virtual void send_complete_cb(int result) override; + virtual int recv_start_cb(u8 *buf, int length) override; + virtual void recv_complete_cb(int result) override; + +private: + // device_memory_interface members + const address_space_config m_space_config; + address_space *m_space; + + devcb_write_line m_out_int; +}; + +class dp83932c_be_device : public dp83932c_device +{ +public: + dp83932c_be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + +class dp83932c_le_device : public dp83932c_device +{ +public: + dp83932c_le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + +DECLARE_DEVICE_TYPE(DP83932C_BE, dp83932c_be_device) +DECLARE_DEVICE_TYPE(DP83932C_LE, dp83932c_le_device) + +#endif // MAME_MACHINE_DP83932C_H diff --git a/src/devices/machine/er1400.cpp b/src/devices/machine/er1400.cpp index 763e80af58f..dec90501855 100644 --- a/src/devices/machine/er1400.cpp +++ b/src/devices/machine/er1400.cpp @@ -291,7 +291,13 @@ void er1400_device::device_timer(emu_timer &timer, device_timer_id id, int param switch (id) { case PROPAGATION_TIMER: - m_data_output = (m_code_input == 5) ? BIT(m_data_register, 13) : false; + if (m_code_input == 5) + { + m_data_output = BIT(m_data_register, 13); + LOG("Data output %d bit\n", m_data_output); + } + else + m_data_output = false; break; } } @@ -345,6 +351,7 @@ WRITE_LINE_MEMBER(er1400_device::clock_w) break; case 3: // accept address + LOG("Accepting address %d bit\n", m_data_input); m_address_register = (m_address_register << 1) | m_data_input; m_address_register &= 0xfffff; break; @@ -367,6 +374,7 @@ WRITE_LINE_MEMBER(er1400_device::clock_w) break; case 7: // accept data + LOG("Accepting data %d bit\n", m_data_input); m_data_register = (m_data_register & 0x1fff) << 1; m_data_register |= m_data_input; break; diff --git a/src/devices/machine/er1400.h b/src/devices/machine/er1400.h index df95cc226e2..6093a29d60c 100644 --- a/src/devices/machine/er1400.h +++ b/src/devices/machine/er1400.h @@ -32,7 +32,7 @@ class er1400_device : public device_t, public device_nvram_interface { public: // construction/destruction - er1400_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + er1400_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); // line handlers DECLARE_WRITE_LINE_MEMBER(data_w); diff --git a/src/devices/machine/fdc37c93x.cpp b/src/devices/machine/fdc37c93x.cpp index ce18f033dea..d285bac1ee9 100644 --- a/src/devices/machine/fdc37c93x.cpp +++ b/src/devices/machine/fdc37c93x.cpp @@ -240,16 +240,17 @@ FLOPPY_FORMATS_MEMBER(fdc37c93x_device::floppy_formats) FLOPPY_NASLITE_FORMAT FLOPPY_FORMATS_END -MACHINE_CONFIG_START(fdc37c93x_device::device_add_mconfig) +void fdc37c93x_device::device_add_mconfig(machine_config &config) +{ // floppy disc controller - MCFG_SMC37C78_ADD("fdc") - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, fdc37c93x_device, irq_floppy_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, fdc37c93x_device, drq_floppy_w)) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", pc_hd_floppies, "35hd", fdc37c93x_device::floppy_formats) - MCFG_FLOPPY_DRIVE_ADD("fdc:1", pc_hd_floppies, "35hd", fdc37c93x_device::floppy_formats) + smc37c78_device &fdcdev(SMC37C78(config, floppy_controller_fdcdev)); + fdcdev.intrq_wr_callback().set(FUNC(fdc37c93x_device::irq_floppy_w)); + fdcdev.drq_wr_callback().set(FUNC(fdc37c93x_device::drq_floppy_w)); + FLOPPY_CONNECTOR(config, "fdc:0", pc_hd_floppies, "35hd", fdc37c93x_device::floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:1", pc_hd_floppies, "35hd", fdc37c93x_device::floppy_formats); // parallel port - MCFG_DEVICE_ADD("lpt", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE(*this, fdc37c93x_device, irq_parallel_w)) + PC_LPT(config, pc_lpt_lptdev); + pc_lpt_lptdev->irq_handler().set(FUNC(fdc37c93x_device::irq_parallel_w)); // serial ports NS16450(config, pc_serial1_comdev, XTAL(1'843'200)); // or NS16550 ? @@ -275,7 +276,7 @@ MACHINE_CONFIG_START(fdc37c93x_device::device_add_mconfig) m_kbdc->input_buffer_full_callback().set(FUNC(fdc37c93x_device::irq_keyboard_w)); m_kbdc->system_reset_callback().set(FUNC(fdc37c93x_device::kbdp20_gp20_reset_w)); m_kbdc->gate_a20_callback().set(FUNC(fdc37c93x_device::kbdp21_gp25_gatea20_w)); -MACHINE_CONFIG_END +} WRITE_LINE_MEMBER(fdc37c93x_device::irq_floppy_w) { diff --git a/src/devices/machine/genpc.cpp b/src/devices/machine/genpc.cpp index 7f49ee888b3..d16f32c50a3 100644 --- a/src/devices/machine/genpc.cpp +++ b/src/devices/machine/genpc.cpp @@ -194,6 +194,11 @@ WRITE_LINE_MEMBER( ibm5160_mb_device::pc_pit8253_out2_changed ) m_speaker->level_w(m_pc_spkrdata & m_pit_out2); } +WRITE_LINE_MEMBER( ibm5150_mb_device::pc_pit8253_out2_changed ) +{ + ibm5160_mb_device::pc_pit8253_out2_changed(state); + m_cassette->output(m_pit_out2 ? 1.0 : -1.0); +} /********************************************************** * diff --git a/src/devices/machine/genpc.h b/src/devices/machine/genpc.h index 9408b1bde9c..4c412a9a720 100644 --- a/src/devices/machine/genpc.h +++ b/src/devices/machine/genpc.h @@ -48,7 +48,7 @@ public: DECLARE_WRITE_LINE_MEMBER( pc_speaker_set_spkrdata ); DECLARE_WRITE_LINE_MEMBER( pc_pit8253_out1_changed ); - DECLARE_WRITE_LINE_MEMBER( pc_pit8253_out2_changed ); + virtual DECLARE_WRITE_LINE_MEMBER( pc_pit8253_out2_changed ); DECLARE_WRITE_LINE_MEMBER( pic_int_w ); @@ -142,6 +142,8 @@ public: DECLARE_WRITE_LINE_MEMBER( keyboard_clock_w ); + virtual DECLARE_WRITE_LINE_MEMBER( pc_pit8253_out2_changed ) override; + protected: ibm5150_mb_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/hd64610.h b/src/devices/machine/hd64610.h index 0c3008c26da..9e5e0ae18d8 100644 --- a/src/devices/machine/hd64610.h +++ b/src/devices/machine/hd64610.h @@ -69,9 +69,9 @@ private: devcb_write_line m_out_irq_cb; devcb_write_line m_out_1hz_cb; - uint8_t m_regs[0x10]; // Internal registers - int m_hline_state; // H-Start/Stop line - int m_irq_out; // alarm output + uint8_t m_regs[0x10]; // Internal registers + int m_hline_state; // H-Start/Stop line + int m_irq_out; // alarm output emu_timer *m_counter_timer; }; diff --git a/src/devices/machine/i80130.cpp b/src/devices/machine/i80130.cpp index 8758d7854fb..5f974cb532f 100644 --- a/src/devices/machine/i80130.cpp +++ b/src/devices/machine/i80130.cpp @@ -40,14 +40,14 @@ READ16_MEMBER( i80130_device::io_r ) case 0: case 1: if (ACCESSING_BITS_0_7) { - data = m_pic->read(space, offset & 0x01); + data = m_pic->read(offset & 0x01); } break; case 4: case 5: case 6: case 7: if (ACCESSING_BITS_0_7) { - data = m_pit->read(space, offset & 0x03); + data = m_pit->read(offset & 0x03); } break; } @@ -62,14 +62,14 @@ WRITE16_MEMBER( i80130_device::io_w ) case 0: case 1: if (ACCESSING_BITS_0_7) { - m_pic->write(space, offset & 0x01, data & 0xff); + m_pic->write(offset & 0x01, data & 0xff); } break; case 4: case 5: case 6: case 7: if (ACCESSING_BITS_0_7) { - m_pit->write(space, offset & 0x03, data & 0xff); + m_pit->write(offset & 0x03, data & 0xff); } break; } diff --git a/src/devices/machine/i8243.cpp b/src/devices/machine/i8243.cpp index 5a387b55705..4bfbc81ac11 100644 --- a/src/devices/machine/i8243.cpp +++ b/src/devices/machine/i8243.cpp @@ -4,7 +4,7 @@ i8243.c - Intel 8243 Port Expander (for MCS-48) + Intel 8243 Input/Output Expander (for MCS-48) ***************************************************************************/ @@ -25,9 +25,10 @@ DEFINE_DEVICE_TYPE(I8243, i8243_device, "i8243", "Intel 8243 I/O Expander") i8243_device::i8243_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, I8243, tag, owner, clock) - , m_p2out(0), m_p2(0), m_opcode(0), m_prog(0) - , m_readhandler(*this) - , m_writehandler(*this) + , m_p{0, 0, 0, 0} + , m_p2out(0x0f), m_p2(0x0f), m_opcode(0), m_prog(1), m_cs(0) + , m_readhandler{{*this}, {*this}, {*this}, {*this}} + , m_writehandler{{*this}, {*this}, {*this}, {*this}} { } @@ -37,87 +38,101 @@ i8243_device::i8243_device(const machine_config &mconfig, const char *tag, devic void i8243_device::device_start() { - m_readhandler.resolve_safe(0); - m_writehandler.resolve_safe(); + for (auto &cb : m_readhandler) + cb.resolve(); + for (auto &cb : m_writehandler) + cb.resolve(); + + save_item(NAME(m_p)); + save_item(NAME(m_p2out)); + save_item(NAME(m_p2)); + save_item(NAME(m_opcode)); + save_item(NAME(m_prog)); + save_item(NAME(m_cs)); } //------------------------------------------------- -// device_reset - device-specific reset +// p2_r - handle a read from the MCU port //------------------------------------------------- -void i8243_device::device_reset() +uint8_t i8243_device::p2_r() { - m_p2 = 0x0f; - m_p2out = 0x0f; - m_prog = 1; + return m_p2out; } -/*------------------------------------------------- - i8243_p2_r - handle a read from port 2 --------------------------------------------------*/ +//------------------------------------------------- +// p2_w - handle a write to the MCU port +//------------------------------------------------- -READ8_MEMBER(i8243_device::p2_r) +void i8243_device::p2_w(uint8_t data) { - return m_p2out; + m_p2 = data & 0x0f; } -/*------------------------------------------------- - i8243_p2_r - handle a write to port 2 --------------------------------------------------*/ +//------------------------------------------------- +// output_update - helper for port writes +//------------------------------------------------- -WRITE8_MEMBER(i8243_device::p2_w) +void i8243_device::output_update(int which) { - m_p2 = data & 0x0f; + if (m_writehandler[which].isnull()) + logerror("%s: Unconfigured write to P%d (%01X)\n", machine().describe_context(), which + 4, m_p[which]); + else + m_writehandler[which](m_p[which]); } -/*------------------------------------------------- - i8243_prog_w - handle a change in the PROG - line state --------------------------------------------------*/ +//------------------------------------------------- +// prog_w - handle a change in the PROG line +// state +//------------------------------------------------- WRITE_LINE_MEMBER(i8243_device::prog_w) { /* on high->low transition state, latch opcode/port */ - if (m_prog && !state) + if (m_prog && !state && !m_cs) { m_opcode = m_p2; /* if this is a read opcode, copy result to p2out */ if ((m_opcode >> 2) == mcs48_cpu_device::EXPANDER_OP_READ) { - if (m_readhandler.isnull()) - { - m_p[m_opcode & 3] = m_readhandler(m_opcode & 3); - } - m_p2out = m_p[m_opcode & 3] & 0x0f; + int which = m_opcode & 3; + if (m_readhandler[which].isnull()) + logerror("%s: Unconfigured read from P%d\n", machine().describe_context(), which + 4); + else + m_p[which] = m_readhandler[which](); + m_p2out = m_p[which] & 0x0f; } + else + m_p2out = 0x0f; } /* on low->high transition state, act on opcode */ - else if (!m_prog && state) + else if (!m_prog && state && !m_cs) { switch (m_opcode >> 2) { case mcs48_cpu_device::EXPANDER_OP_READ: - break; // handled above + m_p2out = 0x0f; // release expander bus + break; case mcs48_cpu_device::EXPANDER_OP_WRITE: m_p[m_opcode & 3] = m_p2 & 0x0f; - m_writehandler((offs_t)(m_opcode & 3), m_p[m_opcode & 3]); + output_update(m_opcode & 3); break; case mcs48_cpu_device::EXPANDER_OP_OR: m_p[m_opcode & 3] |= m_p2 & 0x0f; - m_writehandler((offs_t)(m_opcode & 3), m_p[m_opcode & 3]); + output_update(m_opcode & 3); break; case mcs48_cpu_device::EXPANDER_OP_AND: m_p[m_opcode & 3] &= m_p2 & 0x0f; - m_writehandler((offs_t)(m_opcode & 3), m_p[m_opcode & 3]); + output_update(m_opcode & 3); break; } } @@ -125,3 +140,15 @@ WRITE_LINE_MEMBER(i8243_device::prog_w) /* remember the state */ m_prog = state; } + + +//------------------------------------------------- +// cs_w - handle chip select line (active low) +//------------------------------------------------- + +WRITE_LINE_MEMBER(i8243_device::cs_w) +{ + m_cs = state; + if (m_cs) + m_p2out = 0x0f; +} diff --git a/src/devices/machine/i8243.h b/src/devices/machine/i8243.h index cea6fe4f468..d6f7d72a0e2 100644 --- a/src/devices/machine/i8243.h +++ b/src/devices/machine/i8243.h @@ -4,7 +4,22 @@ i8243.h - Intel 8243 Port Expander + Intel 8243 Input/Output Expander + +**************************************************************************** + _____ _____ + P50 1 |* \_/ | 24 VCC + P40 2 | | 23 P51 + P41 3 | | 22 P52 + P42 4 | | 21 P53 + P43 5 | | 20 P60 + _CS 6 | | 19 P61 + PROG 7 | 8243 | 18 P62 + P23 8 | | 17 P63 + P22 9 | | 16 P73 + P21 10 | | 15 P72 + P20 11 | | 14 P71 + GND 12 |_____________| 13 P70 ***************************************************************************/ @@ -20,31 +35,37 @@ public: i8243_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); // configuration helpers - auto read_handler() { return m_readhandler.bind(); } - auto write_handler() { return m_writehandler.bind(); } - - DECLARE_READ8_MEMBER(p2_r); - DECLARE_WRITE8_MEMBER(p2_w); + auto p4_in_cb() { return m_readhandler[0].bind(); } + auto p4_out_cb() { return m_writehandler[0].bind(); } + auto p5_in_cb() { return m_readhandler[1].bind(); } + auto p5_out_cb() { return m_writehandler[1].bind(); } + auto p6_in_cb() { return m_readhandler[2].bind(); } + auto p6_out_cb() { return m_writehandler[2].bind(); } + auto p7_in_cb() { return m_readhandler[3].bind(); } + auto p7_out_cb() { return m_writehandler[3].bind(); } + + uint8_t p2_r(); + void p2_w(uint8_t data); DECLARE_WRITE_LINE_MEMBER(prog_w); + DECLARE_WRITE_LINE_MEMBER(cs_w); protected: // device-level overrides virtual void device_start() override; - virtual void device_reset() override; - virtual void device_post_load() override { } - virtual void device_clock_changed() override { } private: + void output_update(int which); - uint8_t m_p[4]; /* 4 ports' worth of data */ - uint8_t m_p2out; /* port 2 bits that will be returned */ - uint8_t m_p2; /* most recent port 2 value */ - uint8_t m_opcode; /* latched opcode */ - uint8_t m_prog; /* previous PROG state */ + uint8_t m_p[4]; // 4 ports' worth of data + uint8_t m_p2out; // port 2 bits that will be returned + uint8_t m_p2; // most recent port 2 value + uint8_t m_opcode; // latched opcode + bool m_prog; // previous PROG state + bool m_cs; // chip select - devcb_read8 m_readhandler; - devcb_write8 m_writehandler; + devcb_read8 m_readhandler[4]; + devcb_write8 m_writehandler[4]; }; diff --git a/src/devices/machine/i8251.cpp b/src/devices/machine/i8251.cpp index d10c724a8f9..da883cd7b06 100644 --- a/src/devices/machine/i8251.cpp +++ b/src/devices/machine/i8251.cpp @@ -561,7 +561,7 @@ void i8251_device::mode_w(uint8_t data) } } -WRITE8_MEMBER(i8251_device::control_w) +void i8251_device::control_w(uint8_t data) { if (m_flags & I8251_EXPECTING_MODE) { @@ -599,7 +599,7 @@ WRITE8_MEMBER(i8251_device::control_w) status_r -------------------------------------------------*/ -READ8_MEMBER(i8251_device::status_r) +uint8_t i8251_device::status_r() { uint8_t status = (m_dsr << 7) | m_status; @@ -613,7 +613,7 @@ READ8_MEMBER(i8251_device::status_r) data_w -------------------------------------------------*/ -WRITE8_MEMBER(i8251_device::data_w) +void i8251_device::data_w(uint8_t data) { m_tx_data = data; @@ -666,7 +666,7 @@ void i8251_device::receive_character(uint8_t ch) data_r - read data -------------------------------------------------*/ -READ8_MEMBER(i8251_device::data_r) +uint8_t i8251_device::data_r() { LOG("read data: %02x, STATUS=%02x\n",m_rx_data,m_status); /* reading clears */ @@ -677,6 +677,23 @@ READ8_MEMBER(i8251_device::data_r) } +uint8_t i8251_device::read(offs_t offset) +{ + if (BIT(offset, 0)) + return status_r(); + else + return data_r(); +} + +void i8251_device::write(offs_t offset, uint8_t data) +{ + if (BIT(offset, 0)) + control_w(data); + else + data_w(data); +} + + WRITE_LINE_MEMBER(i8251_device::write_rxd) { m_rxd = state; @@ -723,13 +740,3 @@ READ_LINE_MEMBER(i8251_device::txrdy_r) { return is_tx_enabled() && (m_status & I8251_STATUS_TX_READY) != 0; } - -WRITE8_MEMBER(v53_scu_device::command_w) -{ - i8251_device::command_w(data); -} - -WRITE8_MEMBER(v53_scu_device::mode_w) -{ - i8251_device::mode_w(data); -} diff --git a/src/devices/machine/i8251.h b/src/devices/machine/i8251.h index 2cf0e67cea6..4a9f7bb3eba 100644 --- a/src/devices/machine/i8251.h +++ b/src/devices/machine/i8251.h @@ -38,10 +38,13 @@ public: auto txempty_handler() { return m_txempty_handler.bind(); } auto syndet_handler() { return m_syndet_handler.bind(); } - DECLARE_READ8_MEMBER(data_r); - DECLARE_WRITE8_MEMBER(data_w); - DECLARE_READ8_MEMBER(status_r); - DECLARE_WRITE8_MEMBER(control_w); + uint8_t data_r(); + void data_w(uint8_t data); + uint8_t status_r(); + void control_w(uint8_t data); + + uint8_t read(offs_t offset); + void write(offs_t offset, uint8_t data); DECLARE_WRITE_LINE_MEMBER( write_rxd ); DECLARE_WRITE_LINE_MEMBER( write_cts ); @@ -141,8 +144,8 @@ public: // construction/destruction v53_scu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - DECLARE_WRITE8_MEMBER(command_w); - DECLARE_WRITE8_MEMBER(mode_w); + void command_w(uint8_t data) { i8251_device::command_w(data); } + void mode_w(uint8_t data) { i8251_device::mode_w(data); } }; diff --git a/src/devices/machine/i8255.cpp b/src/devices/machine/i8255.cpp index 15f646efd57..9023e1ddd19 100644 --- a/src/devices/machine/i8255.cpp +++ b/src/devices/machine/i8255.cpp @@ -714,7 +714,7 @@ void i8255_device::set_pc_bit(int bit, int state) } -READ8_MEMBER( i8255_device::read ) +uint8_t i8255_device::read(offs_t offset) { uint8_t data = 0; @@ -754,7 +754,7 @@ READ8_MEMBER( i8255_device::read ) } -WRITE8_MEMBER( i8255_device::write ) +void i8255_device::write(offs_t offset, uint8_t data) { switch (offset & 0x03) { @@ -807,17 +807,11 @@ WRITE8_MEMBER( i8255_device::write ) } -READ8_MEMBER( i8255_device::pa_r ) -{ - return read_pa(); -} - - //------------------------------------------------- -// read_pa - port A read +// pa_r - port A read //------------------------------------------------- -uint8_t i8255_device::read_pa() +uint8_t i8255_device::pa_r() { uint8_t data = 0xff; @@ -832,12 +826,12 @@ uint8_t i8255_device::read_pa() // acka_r - port A read with PC6 strobe //------------------------------------------------- -READ8_MEMBER( i8255_device::acka_r ) +uint8_t i8255_device::acka_r() { if (!machine().side_effects_disabled()) pc6_w(0); - uint8_t data = read_pa(); + uint8_t data = pa_r(); if (!machine().side_effects_disabled()) pc6_w(1); @@ -846,17 +840,11 @@ READ8_MEMBER( i8255_device::acka_r ) } -READ8_MEMBER( i8255_device::pb_r ) -{ - return read_pb(); -} - - //------------------------------------------------- -// read_pb - port B read +// pb_r - port B read //------------------------------------------------- -uint8_t i8255_device::read_pb() +uint8_t i8255_device::pb_r() { uint8_t data = 0xff; @@ -873,12 +861,12 @@ uint8_t i8255_device::read_pb() // ackb_r - port B read with PC2 strobe //------------------------------------------------- -READ8_MEMBER( i8255_device::ackb_r ) +uint8_t i8255_device::ackb_r() { if (!machine().side_effects_disabled()) pc2_w(0); - uint8_t data = read_pb(); + uint8_t data = pb_r(); if (!machine().side_effects_disabled()) pc2_w(1); diff --git a/src/devices/machine/i8255.h b/src/devices/machine/i8255.h index 44d129b7a3c..bf540a26545 100644 --- a/src/devices/machine/i8255.h +++ b/src/devices/machine/i8255.h @@ -93,16 +93,14 @@ public: auto tri_pa_callback() { return m_tri_pa_cb.bind(); } auto tri_pb_callback() { return m_tri_pb_cb.bind(); } - DECLARE_READ8_MEMBER( read ); - DECLARE_WRITE8_MEMBER( write ); + uint8_t read(offs_t offset); + void write(offs_t offset, uint8_t data ); - DECLARE_READ8_MEMBER( pa_r ); - uint8_t read_pa(); - DECLARE_READ8_MEMBER( acka_r ); + uint8_t pa_r(); + uint8_t acka_r(); - DECLARE_READ8_MEMBER( pb_r ); - uint8_t read_pb(); - DECLARE_READ8_MEMBER( ackb_r ); + uint8_t pb_r(); + uint8_t ackb_r(); DECLARE_WRITE_LINE_MEMBER( pc2_w ); DECLARE_WRITE_LINE_MEMBER( pc4_w ); diff --git a/src/devices/machine/i82586.cpp b/src/devices/machine/i82586.cpp index f728d1f183f..641793ceb94 100644 --- a/src/devices/machine/i82586.cpp +++ b/src/devices/machine/i82586.cpp @@ -2,32 +2,32 @@ // copyright-holders:Patrick Mackinlay /* -* An implementation of the Intel 82586 and 82596 Ethernet controller devices. -* -* This driver covers the following devices: -* -* - 82586 - 16/24 data/address bus, 6/8/10 MHz -* - 82596SX - 16/32 data/address bus, 16/20 MHz -* - 82596DX - 32/32 data/address bus, 25/33 MHz -* - 82596CA - 32/32 data/address bus, 16/20/25/33 MHz -* -* This implementation should cover all of the above reasonably well, but -* no testing of big endian mode in particular, and very limited testing -* of the 82596 in non-linear modes has been done so far. -* -* Some documents covering the above include: -* -* http://bitsavers.org/pdf/intel/_dataBooks/1991_Microcommunications.pdf -* http://bitsavers.org/pdf/intel/_dataBooks/1996_Networking.pdf -* https://www.intel.com/assets/pdf/general/82596ca.pdf -* -* TODO -* - testing for 82596 big endian and non-linear modes -* - more complete statistics capturing -* - 82596 monitor mode -* - throttle timers and diagnostic command -* - special case handling for different 82596 steppings in big endian mode -*/ + * An implementation of the Intel 82586 and 82596 Ethernet controller devices. + * + * This driver covers the following devices: + * + * - 82586 - 16/24 data/address bus, 6/8/10 MHz + * - 82596SX - 16/32 data/address bus, 16/20 MHz + * - 82596DX - 32/32 data/address bus, 25/33 MHz + * - 82596CA - 32/32 data/address bus, 16/20/25/33 MHz + * + * This implementation should cover all of the above reasonably well, but + * no testing of big endian mode in particular, and very limited testing + * of the 82596 in non-linear modes has been done so far. + * + * Sources: + * + * http://bitsavers.org/pdf/intel/_dataBooks/1991_Microcommunications.pdf + * http://bitsavers.org/pdf/intel/_dataBooks/1996_Networking.pdf + * https://www.intel.com/assets/pdf/general/82596ca.pdf + * + * TODO + * - testing for 82596 big endian and non-linear modes + * - more complete statistics capture + * - 82596 monitor mode + * - throttle timers and diagnostic command + * - special case handling for different 82596 steppings in big endian mode + */ #include "emu.h" #include "i82586.h" diff --git a/src/devices/machine/i8271.cpp b/src/devices/machine/i8271.cpp index 243a73b3c6e..bd374a6da6c 100644 --- a/src/devices/machine/i8271.cpp +++ b/src/devices/machine/i8271.cpp @@ -163,6 +163,24 @@ void i8271_device::set_rate(int rate) cur_rate = rate; } +READ8_MEMBER(i8271_device::read) +{ + switch(offset & 0x03) { + case 0x00: return sr_r(space, 0); + case 0x01: return rr_r(space, 0); + } + return 0xff; +} + +WRITE8_MEMBER(i8271_device::write) +{ + switch(offset & 0x03) { + case 0x00: cmd_w(space, 0, data); break; + case 0x01: param_w(space, 0, data); break; + case 0x02: reset_w(space, 0, data); break; + } +} + READ8_MEMBER(i8271_device::data_r) { set_drq(false); diff --git a/src/devices/machine/i8271.h b/src/devices/machine/i8271.h index 86a32365fc0..00342f38e4d 100644 --- a/src/devices/machine/i8271.h +++ b/src/devices/machine/i8271.h @@ -23,6 +23,8 @@ public: auto hdl_wr_callback() { return hdl_cb.bind(); } auto opt_wr_callback() { return opt_cb.bind(); } + DECLARE_READ8_MEMBER(read); + DECLARE_WRITE8_MEMBER(write); DECLARE_READ8_MEMBER (data_r); DECLARE_WRITE8_MEMBER(data_w); diff --git a/src/devices/machine/ins8250.cpp b/src/devices/machine/ins8250.cpp index 8ef13d8c105..e6f44db4c59 100644 --- a/src/devices/machine/ins8250.cpp +++ b/src/devices/machine/ins8250.cpp @@ -97,6 +97,9 @@ History: #include "emu.h" #include "machine/ins8250.h" +//#define VERBOSE 1 +#include "logmacro.h" + DEFINE_DEVICE_TYPE(INS8250, ins8250_device, "ins8250", "National Semiconductor INS8250 UART") DEFINE_DEVICE_TYPE(NS16450, ns16450_device, "ns16450", "National Semiconductor NS16450 UART") DEFINE_DEVICE_TYPE(NS16550, ns16550_device, "ns16550", "National Semiconductor NS16550 UART") @@ -235,9 +238,15 @@ void ins8250_uart_device::clear_int(int flag) update_interrupt(); } +READ_LINE_MEMBER(ins8250_uart_device::intrpt_r) +{ + return !BIT(m_regs.iir, 0); +} + // Baud rate generator is reset after writing to either byte of divisor latch void ins8250_uart_device::update_baud_rate() { + LOG("%.1f baud selected (divisor = %d)\n", double(clock()) / (m_regs.dl * 16), m_regs.dl); set_rate(clock(), m_regs.dl * 16); // FIXME: Baud rate generator should not affect transmitter or receiver, but device_serial_interface resets them regardless. diff --git a/src/devices/machine/ins8250.h b/src/devices/machine/ins8250.h index 0db2e4598cf..454f3ecd9a1 100644 --- a/src/devices/machine/ins8250.h +++ b/src/devices/machine/ins8250.h @@ -33,13 +33,15 @@ public: auto out_out1_callback() { return m_out_out1_cb.bind(); } auto out_out2_callback() { return m_out_out2_cb.bind(); } - DECLARE_WRITE8_MEMBER( ins8250_w ); - DECLARE_READ8_MEMBER( ins8250_r ); - DECLARE_WRITE_LINE_MEMBER( dcd_w ); - DECLARE_WRITE_LINE_MEMBER( dsr_w ); - DECLARE_WRITE_LINE_MEMBER( ri_w ); - DECLARE_WRITE_LINE_MEMBER( cts_w ); - DECLARE_WRITE_LINE_MEMBER( rx_w ); + DECLARE_WRITE8_MEMBER(ins8250_w); + DECLARE_READ8_MEMBER(ins8250_r); + + DECLARE_WRITE_LINE_MEMBER(dcd_w); + DECLARE_WRITE_LINE_MEMBER(dsr_w); + DECLARE_WRITE_LINE_MEMBER(ri_w); + DECLARE_WRITE_LINE_MEMBER(cts_w); + DECLARE_WRITE_LINE_MEMBER(rx_w); + DECLARE_READ_LINE_MEMBER(intrpt_r); protected: enum class dev_type { diff --git a/src/devices/machine/ioptimer.cpp b/src/devices/machine/ioptimer.cpp index a02f6c88ea5..0340c0a2ff3 100644 --- a/src/devices/machine/ioptimer.cpp +++ b/src/devices/machine/ioptimer.cpp @@ -130,7 +130,7 @@ void iop_timer_device::update_count() void iop_timer_device::set_ctrl(uint32_t data) { - static const char *gatm_names[4] = { "low?", "reset+rising?", "reset+falling?", "reset+both?" }; + static char const *const gatm_names[4] = { "low?", "reset+rising?", "reset+falling?", "reset+both?" }; logerror("%s: set_ctrl: GATE=%d, GATM=%s, ZRET=%d\n", machine().describe_context(), data & CTRL_GATE, gatm_names[(data & CTRL_GATM) >> 1], (data & CTRL_ZRET) >> 3); logerror("%s: CMPE=%d, OVFE=%d, REP_INT=%d, TOG_INT=%d\n", machine().describe_context(), (data & CTRL_CMPE) >> 4, (data & CTRL_OVFE) >> 5, (data & CTRL_REPI) >> 6, (data & CTRL_TOGI) >> 7); diff --git a/src/devices/machine/mb87030.cpp b/src/devices/machine/mb87030.cpp new file mode 100644 index 00000000000..8cafde3ba11 --- /dev/null +++ b/src/devices/machine/mb87030.cpp @@ -0,0 +1,795 @@ +// license:BSD-3-Clause +// copyright-holders:Sven Schnelle + +#include "emu.h" +#define VERBOSE 0 +#include "logmacro.h" +#include "mb87030.h" + +DEFINE_DEVICE_TYPE(MB87030, mb87030_device, "mb87030", "Fujitsu MB87030 SCSI controller") + +mb87030_device::mb87030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + mb87030_device(mconfig, MB87030, tag, owner, clock) +{ + +} + +mb87030_device::mb87030_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : + nscsi_device(mconfig, type, tag, owner, clock), + m_irq_handler(*this), + m_dreq_handler(*this) +{ + +} + +void mb87030_device::map(address_map &map) +{ + map(0x00, 0x00).rw(FUNC(mb87030_device::bdid_r), FUNC(mb87030_device::bdid_w)); + map(0x01, 0x01).rw(FUNC(mb87030_device::sctl_r), FUNC(mb87030_device::sctl_w)); + map(0x02, 0x02).rw(FUNC(mb87030_device::scmd_r), FUNC(mb87030_device::scmd_w)); + map(0x03, 0x03).rw(FUNC(mb87030_device::tmod_r), FUNC(mb87030_device::tmod_w)); + map(0x04, 0x04).rw(FUNC(mb87030_device::ints_r), FUNC(mb87030_device::ints_w)); + map(0x05, 0x05).rw(FUNC(mb87030_device::psns_r), FUNC(mb87030_device::sdgc_w)); + map(0x06, 0x06).r(FUNC(mb87030_device::ssts_r)); + map(0x07, 0x07).r(FUNC(mb87030_device::serr_r)); + map(0x08, 0x08).rw(FUNC(mb87030_device::pctl_r), FUNC(mb87030_device::pctl_w)); + map(0x09, 0x09).r(FUNC(mb87030_device::mbc_r)); + map(0x0a, 0x0a).rw(FUNC(mb87030_device::dreg_r), FUNC(mb87030_device::dreg_w)); + map(0x0b, 0x0b).rw(FUNC(mb87030_device::temp_r), FUNC(mb87030_device::temp_w)); + map(0x0c, 0x0c).rw(FUNC(mb87030_device::tch_r), FUNC(mb87030_device::tch_w)); + map(0x0d, 0x0d).rw(FUNC(mb87030_device::tcm_r), FUNC(mb87030_device::tcm_w)); + map(0x0e, 0x0e).rw(FUNC(mb87030_device::tcl_r), FUNC(mb87030_device::tcl_w)); + map(0x0f, 0x0f).rw(FUNC(mb87030_device::exbf_r), FUNC(mb87030_device::exbf_w)); +} + +void mb87030_device::device_reset() +{ + m_bdid = 0; + m_sctl = SCTL_RESET_AND_DISABLE; + m_scmd = 0; + m_tmod = 0; + m_ints = 0; + m_sdgc = 0; + m_ssts = 0; + m_serr = 0; + m_pctl = 0; + m_mbc = 0; + m_dreg = 0; + m_temp = 0; + m_tch = 0; + m_tcm = 0; + m_tc = 0; + m_exbf = 0; + m_fifo.clear(); + scsi_bus->ctrl_wait(scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); + update_state(State::Idle, 0); + scsi_set_ctrl(0, S_ALL); + scsi_bus->data_w(scsi_refid, 0); + update_ssts(); + update_ints(); +} + +auto mb87030_device::get_state_name(State state) const +{ + switch(state) { + case State::Idle: + return "Idle"; + case State::ArbitrationWaitBusFree: + return "ArbitrationWaitBusFree"; + case State::ArbitrationAssertBSY: + return "ArbitrationAssertBSY"; + case State::ArbitrationWait: + return "ArbitrationWait"; + case State::ArbitrationAssertSEL: + return "ArbitrationAssertSEL"; + case State::ArbitrationDeAssertBSY: + return "ArbitrationDeAssertBSY"; + case State::SelectionWaitBusFree: + return "SelectionWaitBusFree"; + case State::SelectionWaitBSY: + return "SelectionWaitBSY"; + case State::SelectionAssertSEL: + return "SelectionAssertSEL"; + case State::Selection: + return "Selection"; + case State::TransferWaitReq: + return "TransferWaitReq"; + case State::TransferSendAck: + return "TransferSendAck"; + case State::TransferSendData: + return "TransferSendData"; + case State::TransferSendDataDMAReq: + return "TransferSendDataDMAReq"; + case State::TransferSendDataDMAResp: + return "TransferSendDataDMAResp"; + case State::TransferRecvData: + return "TransferRecvData"; + case State::TransferRecvDataDMAReq: + return "TransferRecvDataDMAReq"; + case State::TransferRecvDataDMAResp: + return "TransferRecvDataDMAResp"; + + case State::TransferWaitDeassertREQ: + return "TransferWaitDeassertREQ"; + case State::TransferDeassertACK: + return "TransferDeassertACK"; + } + return "Unknown state"; +} + +void mb87030_device::update_state(mb87030_device::State new_state, int delay, int timeout) +{ + LOG("new state: %s -> %s (delay %d, timeout %d)\n", get_state_name(m_state), + get_state_name(new_state), delay, timeout); + m_state = new_state; + if (delay) + m_delay_timer->adjust(clocks_to_attotime(delay)); + else + m_delay_timer->reset(); + if (timeout) + m_timer->adjust(clocks_to_attotime(timeout)); + else + m_timer->reset(); +} + +TIMER_CALLBACK_MEMBER(mb87030_device::timeout) +{ + m_timer->reset(); + step(true); +} + +TIMER_CALLBACK_MEMBER(mb87030_device::delay_timeout) +{ + m_delay_timer->reset(); + step(false); +} + +void mb87030_device::scsi_command_complete() +{ + m_ints |= INTS_COMMAND_COMPLETE; + m_ssts &= ~(SSTS_SPC_BUSY|SSTS_XFER_IN_PROGRESS); + update_ints(); + update_state(State::Idle); +} + +void mb87030_device::scsi_disconnect_timeout() +{ + scsi_set_ctrl(0, S_ALL); + scsi_bus->data_w(scsi_refid, 0); + m_ints = INTS_SPC_TIMEOUT; + update_ints(); + update_state(State::Idle); +} + +void mb87030_device::scsi_disconnect() +{ + LOG("%s: m_tc %d\n", __FUNCTION__, m_tc); + m_ssts &= ~(SSTS_INIT_CONNECTED|SSTS_TARG_CONNECTED|SSTS_SPC_BUSY|SSTS_XFER_IN_PROGRESS); + m_ints = INTS_DISCONNECTED; + if (m_pctl & PCTL_BUS_FREE_IE) { + LOG("disconnect IE\n"); + m_ints |= INTS_DISCONNECTED; + } + update_ints(); + update_state(State::Idle); +} + +void mb87030_device::scsi_set_ctrl(uint32_t value, uint32_t mask) +{ + if (m_sctl & SCTL_DIAG_MODE) { + m_scsi_ctrl &= ~mask; + m_scsi_ctrl |= value; + logerror("update m_scsi_ctrl: %02X%s%s%s%s%s%s\n", m_scsi_ctrl, + (m_scsi_ctrl & S_REQ) ? " REQ" : "", + (m_scsi_ctrl & S_ACK) ? " ACK" : "", + (m_scsi_ctrl & S_BSY) ? " BSY" : "", + (m_scsi_ctrl & S_MSG) ? " MSG" : "", + (m_scsi_ctrl & S_CTL) ? " CTL" : "", + (m_scsi_ctrl & S_INP) ? " INP" : ""); + } else { + scsi_bus->ctrl_w(scsi_refid, value, mask); + } +} + +uint32_t mb87030_device::scsi_get_ctrl(void) +{ + if (m_sctl & SCTL_DIAG_MODE) { + uint32_t ret = 0; + if ((m_sdgc & SDGC_DIAG_IO) || (m_scsi_ctrl & S_INP)) + ret |= S_INP; + if ((m_sdgc & SDGC_DIAG_CD) || (m_scsi_ctrl & S_CTL)) + ret |= S_CTL; + if ((m_sdgc & SDGC_DIAG_MSG) || (m_scsi_ctrl & S_MSG)) + ret |= S_MSG; + if ((m_sdgc & SDGC_DIAG_BSY) || (m_scsi_ctrl & S_BSY)) + ret |= S_BSY; + if ((m_sdgc & SDGC_DIAG_ACK) || (m_scsi_ctrl & S_ACK)) + ret |= S_ACK; + if ((m_sdgc & SDGC_DIAG_REQ) || (m_scsi_ctrl & S_REQ)) + ret |= S_REQ; + if (m_scsi_ctrl & S_SEL) + ret |= S_SEL; + if (m_scsi_ctrl & S_ATN) + ret |= S_ATN; + + return ret; + } else { + return scsi_bus->ctrl_r(); + } +} + +void mb87030_device::step(bool timeout) +{ + uint32_t ctrl = scsi_get_ctrl(); + uint32_t data = scsi_bus->data_r(); + + LOG("%s: %d %s,%s data %02X ctrl %02X TC %d\n", __FUNCTION__, + scsi_refid, get_state_name(m_state), + timeout ? " timeout" : "", data, + ctrl, m_tc); + + if (m_sctl & SCTL_RESET_AND_DISABLE && m_state != State::Idle) { + scsi_set_ctrl(0, S_ALL); + update_state(State::Idle); + return; + } + + + if ((m_ssts & SSTS_INIT_CONNECTED) && !(ctrl & S_BSY)) { + LOG("SCSI disconnect\n"); + scsi_disconnect(); + scsi_set_ctrl(0, S_ALL); + } + + + switch(m_state) { + case State::Idle: + + if (ctrl == 0 && (m_pctl & PCTL_BUS_FREE_IE)) { + m_ints |= INTS_DISCONNECTED; + update_ints(); + } + break; + case State::ArbitrationWaitBusFree: + if (!(ctrl & (S_BSY|S_SEL))) + update_state(State::ArbitrationAssertBSY, 1); + + break; + case State::ArbitrationAssertBSY: + scsi_set_ctrl(S_BSY, S_BSY); + scsi_bus->data_w(scsi_refid, (1 << m_bdid)); + update_state(State::ArbitrationWait, 1); + break; + + case State::ArbitrationWait: + + for (int id = (2 << m_bdid); id <= 0x80; id <<= 1) { + LOG("check %d\n", id); + if (data & id) { + LOG("arbitration lost, winner %d\n", id); + scsi_disconnect_timeout(); + break; + } + } + LOG("Arbitration won\n"); + update_state(State::ArbitrationAssertSEL, 1); + break; + + case State::ArbitrationAssertSEL: + scsi_set_ctrl(S_SEL, S_SEL); + update_state(State::ArbitrationDeAssertBSY, 1); + break; + + case State::ArbitrationDeAssertBSY: + scsi_set_ctrl(0, S_BSY); + update_state(State::SelectionAssertSEL, 1); + break; + + case State::SelectionWaitBusFree: + if (!(ctrl & (S_BSY|S_SEL))) + update_state(State::SelectionAssertSEL, 10); + break; + + case State::SelectionAssertSEL: + scsi_bus->data_w(scsi_refid, m_temp); + scsi_set_ctrl(0, S_SEL); //XXX: needed? + scsi_set_ctrl(S_SEL | (m_send_atn_during_selection ? S_ATN : 0), S_ATN|S_SEL|S_BSY); + scsi_bus->ctrl_wait(scsi_refid, S_BSY, S_BSY); + update_state(State::SelectionWaitBSY, 0, m_tc / 8); + break; + + case State::SelectionWaitBSY: + if (timeout) { + LOG("select timeout\n"); + scsi_disconnect_timeout(); + break; + } + m_timer->reset(); + if ((ctrl & (S_REQ|S_BSY|S_MSG|S_CTL|S_INP)) == S_BSY) + update_state(State::Selection, 1); + + break; + + case State::Selection: + LOG("selection success\n"); + scsi_set_ctrl(0, S_SEL); + m_ssts |= SSTS_INIT_CONNECTED|SSTS_XFER_IN_PROGRESS; + m_ssts &= ~(SSTS_TARG_CONNECTED|SSTS_SPC_BUSY); + update_ssts(); + scsi_command_complete(); + break; + + case State::TransferWaitReq: + + + if (!m_tc && (m_fifo.empty() || m_dma_transfer)) { + LOG("TransferWaitReq: tc == 0\n"); + scsi_bus->data_w(scsi_refid, 0); + scsi_command_complete(); + break; + } + + if (m_tc < 0) + break; + + if (m_scsi_phase != (ctrl & S_PHASE_MASK)) { + LOG("SCSI phase change during transfer\n"); + m_ints |= INTS_SERVICE_REQUIRED; + m_ssts &= ~SSTS_SPC_BUSY; + update_ints(); + break; + } + + if (!(ctrl & S_REQ)) { + scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + break; + } + + if (!m_dma_transfer) { + update_state((ctrl & S_INP) ? State::TransferRecvData : State::TransferSendData, 1); + } else { + update_state((ctrl & S_INP) ? State::TransferRecvDataDMAReq : State::TransferSendDataDMAReq, 1); + } + break; + + case State::TransferRecvData: + if (!m_tc || m_fifo.full()) + break; + + LOG("pushing read data: %02X\n", data); + m_fifo.enqueue(data); + m_tc--; + + update_state(State::TransferSendAck, 10); + break; + + case State::TransferRecvDataDMAReq: + m_hdb = data; + m_hdb_loaded = true; + update_state(State::TransferRecvDataDMAResp, 10); + m_tc--; + m_dreq_handler(true); + break; + + case State::TransferRecvDataDMAResp: + if (m_hdb_loaded) + break; + update_state(State::TransferSendAck, 10); + m_dreq_handler(false); + break; + + case State::TransferSendData: + + if (m_tc < 0 || m_fifo.empty()) { + LOG("fifo empty or m_tc(%d) zero\n", m_tc); + break; + } + + scsi_bus->data_w(scsi_refid, m_fifo.dequeue()); + m_tc--; + update_state(State::TransferSendAck, 10); + break; + + case State::TransferSendDataDMAReq: + m_hdb_loaded = false; + update_state(State::TransferSendDataDMAResp, 10); + m_dreq_handler(true); + break; + + case State::TransferSendDataDMAResp: + if (!m_hdb_loaded) + break; + m_hdb_loaded = false; + m_dreq_handler(false); + scsi_bus->data_w(scsi_refid, m_hdb); + m_tc--; + update_state(State::TransferSendAck, 10); + break; + + case State::TransferSendAck: + + scsi_set_ctrl(S_ACK, S_ACK); + scsi_bus->ctrl_wait(scsi_refid, 0, S_REQ); + + update_state(State::TransferWaitDeassertREQ, 10); + break; + + case State::TransferWaitDeassertREQ: + if (!(ctrl & S_REQ)) + update_state(State::TransferDeassertACK, 10); + break; + + case State::TransferDeassertACK: + scsi_set_ctrl(0, S_ACK); + scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + update_state(State::TransferWaitReq, 10); + break; + + } +} + +void mb87030_device::device_start() +{ + m_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mb87030_device::timeout), this)); + m_delay_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mb87030_device::delay_timeout), this)); + m_irq_handler.resolve_safe(); + m_dreq_handler.resolve_safe(); + + save_item(NAME(m_bdid)); + save_item(NAME(m_sctl)); + save_item(NAME(m_scmd)); + save_item(NAME(m_tmod)); + save_item(NAME(m_ints)); + save_item(NAME(m_sdgc)); + save_item(NAME(m_ssts)); + save_item(NAME(m_serr)); + save_item(NAME(m_pctl)); + save_item(NAME(m_mbc)); + save_item(NAME(m_dreg)); + save_item(NAME(m_temp)); + save_item(NAME(m_tch)); + save_item(NAME(m_tcm)); + save_item(NAME(m_tc)); + save_item(NAME(m_exbf)); + save_item(NAME(m_hdb)); + save_item(NAME(m_hdb_loaded)); + save_item(NAME(m_send_atn_during_selection)); +// save_item(NAME(m_fifo)); + save_item(NAME(m_scsi_phase)); + save_item(NAME(m_scsi_ctrl)); + save_item(NAME(m_dma_transfer)); +// save_item(NAME(m_state)); +} + +void mb87030_device::scsi_ctrl_changed() +{ + if (m_delay_timer->remaining() == attotime::never) + step(false); +} + +WRITE_LINE_MEMBER(mb87030_device::reset_w) +{ + LOG("%s: %s\n", __FUNCTION__, state); + if (state) + device_reset(); +} + +void mb87030_device::update_ssts() +{ + if (!m_tc) + m_ssts |= SSTS_TC_ZERO; + else + m_ssts &= ~SSTS_TC_ZERO; + + if (m_fifo.empty()) + m_ssts |= SSTS_DREQ_EMPTY; + else + m_ssts &= ~SSTS_DREQ_EMPTY; + + if (m_fifo.full()) + m_ssts |= SSTS_DREQ_FULL; + else + m_ssts &= ~SSTS_DREQ_FULL; +} + +void mb87030_device::update_ints() +{ + LOG("%s: %s\n", __FUNCTION__, (m_ints && (m_sctl & 1)) ? "true" : "false"); + m_irq_handler(m_ints && (m_sctl & 1));// || (m_ints & INTS_DISCONNECTED)); +} + +READ8_MEMBER(mb87030_device::bdid_r) +{ + LOG("%s %02X\n", __FUNCTION__, (1 << m_bdid)); + return (1 << m_bdid); +} + +WRITE8_MEMBER(mb87030_device::bdid_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_bdid = data & 0x7; +} + +READ8_MEMBER(mb87030_device::sctl_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_sctl); + return m_sctl; +} + +WRITE8_MEMBER(mb87030_device::sctl_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_sctl = data; + update_ints(); +} + +READ8_MEMBER(mb87030_device::scmd_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_scmd); + return m_scmd; +} + +WRITE8_MEMBER(mb87030_device::scmd_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_scmd = data; + + switch(m_scmd & SCMD_CMD_MASK) { + case SCMD_CMD_BUS_RELEASE: + LOG("%s: Bus release\n", __FUNCTION__); + break; + case SCMD_CMD_SELECT: + LOG("%s: Select\n", __FUNCTION__); + if (m_sctl & SCTL_ARBITRATION_ENABLE) + update_state(State::ArbitrationWaitBusFree, 10); + else + update_state(State::SelectionWaitBusFree, 10); + step(false); + break; + case SCMD_CMD_RESET_ATN: + LOG("%s: Reset ATN\n", __FUNCTION__); +// if (m_state == State::Idle) + m_send_atn_during_selection = false; +// else + scsi_set_ctrl(0, S_ATN); + break; + case SCMD_CMD_SET_ATN: + LOG("%s: Set ATN\n", __FUNCTION__); + if (m_state == State::Idle) + m_send_atn_during_selection = true; + else + scsi_set_ctrl(S_ATN, S_ATN); + break; + case SCMD_CMD_TRANSFER: + if (!(m_ssts & (SSTS_INIT_CONNECTED|SSTS_TARG_CONNECTED))) + break; + + m_dma_transfer = !(data & 0x04); + LOG("%s Transfer\n", m_dma_transfer ? "DMA" : "Program"); + m_ssts |= SSTS_SPC_BUSY|SSTS_XFER_IN_PROGRESS; + update_state(State::TransferWaitReq, 5); + break; + case SCMD_CMD_TRANSFER_PAUSE: + LOG("%s: Transfer Pause\n", __FUNCTION__); + break; + case SCMD_CMD_RESET_ACK_REQ: + LOG("%s: Reset ACK/REQ\n", __FUNCTION__); + if (m_ssts & SSTS_INIT_CONNECTED) + scsi_set_ctrl(0, S_ACK); + if (m_ssts & SSTS_TARG_CONNECTED) + scsi_set_ctrl(0, S_REQ); + break; + case SCMD_CMD_SET_ACK_REQ: + LOG("%s: Set ACK/REQ\n", __FUNCTION__); + if (m_ssts & SSTS_INIT_CONNECTED) { + if (m_pctl & 1) { + m_temp = scsi_bus->data_r(); + } else { + scsi_bus->data_w(scsi_refid, m_temp); + } + LOG("set ACK\n"); + scsi_set_ctrl(S_ACK, S_ACK); + } else { + logerror("not connected\n"); + } + if (m_ssts & SSTS_TARG_CONNECTED) + scsi_set_ctrl(S_REQ, S_REQ); + break; + } +} + +READ8_MEMBER(mb87030_device::tmod_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_tmod); + return m_tmod; +} + +WRITE8_MEMBER(mb87030_device::tmod_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_tmod = data; +} + +READ8_MEMBER(mb87030_device::ints_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_ints); + return m_ints; +} + +WRITE8_MEMBER(mb87030_device::ints_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_ints &= ~(data); + update_ints(); +} + +READ8_MEMBER(mb87030_device::psns_r) +{ + uint32_t ctrl = scsi_get_ctrl(); + uint8_t ret = (!!(ctrl & S_REQ) << 7) | + (!!(ctrl & S_ACK) << 6) | + (!!(ctrl & S_ATN) << 5) | + (!!(ctrl & S_SEL) << 4) | + (!!(ctrl & S_BSY) << 3) | + (!!(ctrl & S_MSG) << 2) | + (!!(ctrl & S_CTL) << 1) | + (!!(ctrl & S_INP)); + LOG("%s: %02X\n", __FUNCTION__, ret); + return ret; +} + +WRITE8_MEMBER(mb87030_device::sdgc_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_sdgc = data; + scsi_ctrl_changed(); +} + +READ8_MEMBER(mb87030_device::ssts_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_ssts); + update_ssts(); + return m_ssts; +} + +READ8_MEMBER(mb87030_device::serr_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_serr); + return m_serr; +} + +READ8_MEMBER(mb87030_device::pctl_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_pctl); + return m_pctl; +} + +WRITE8_MEMBER(mb87030_device::pctl_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_pctl = data; + m_scsi_phase = m_pctl & 7; + if (m_pctl & PCTL_BUS_FREE_IE) + step(false); + +} + +READ8_MEMBER(mb87030_device::mbc_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_mbc); + return m_mbc; +} + +READ8_MEMBER(mb87030_device::dreg_r) +{ + + step(false); + if (!m_fifo.empty()) + m_dreg = m_fifo.dequeue(); + LOG("%s: %02X\n", __FUNCTION__, m_dreg); + return m_dreg; +} + +WRITE8_MEMBER(mb87030_device::dreg_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_dreg = data; + if (!m_fifo.full()) + m_fifo.enqueue(data); + step(false); +} + +READ8_MEMBER(mb87030_device::temp_r) +{ + m_temp = scsi_bus->data_r(); + LOG("%s: %02X\n", __FUNCTION__, m_temp); + return m_temp; + +} + +WRITE8_MEMBER(mb87030_device::temp_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_temp = data; + step(false); +} + +READ8_MEMBER(mb87030_device::tch_r) +{ + uint8_t ret = (m_tc >> 16) & 0xff; + LOG("%s: %02X\n", __FUNCTION__, ret); + return ret; +} + +READ8_MEMBER(mb87030_device::tcm_r) +{ + uint8_t ret = (m_tc >> 8) & 0xff; + LOG("%s: %02X\n", __FUNCTION__, ret); + return ret; +} + +READ8_MEMBER(mb87030_device::tcl_r) +{ + uint8_t ret = m_tc & 0xff; + LOG("%s: %02X\n", __FUNCTION__, ret); + return ret; +} + + +WRITE8_MEMBER(mb87030_device::tch_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_tc &= 0x00ffff; + m_tc |= data << 16; + update_ssts(); +} + +WRITE8_MEMBER(mb87030_device::tcm_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_tc &= 0xff00ff; + m_tc |= data << 8; + update_ssts(); +} + +WRITE8_MEMBER(mb87030_device::tcl_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_tc &= 0xffff00; + m_tc |= data; + update_ssts(); +} + +READ8_MEMBER(mb87030_device::exbf_r) +{ + LOG("%s: %02X\n", __FUNCTION__, m_exbf); + return m_exbf; +} + +WRITE8_MEMBER(mb87030_device::exbf_w) +{ + LOG("%s: %02X\n", __FUNCTION__, data); + m_exbf = data; +} + +void mb87030_device::dma_w(uint8_t data) +{ + if (machine().side_effects_disabled()) + return; + LOG("dma_w: %02X\n", data); + m_hdb = data; + m_hdb_loaded = true; + step(false); +} + +uint8_t mb87030_device::dma_r(void) +{ + uint8_t val = m_hdb; + + if (machine().side_effects_disabled()) + return 0; + LOG("dma_r: %02X\n", val); + m_hdb_loaded = false; + step(false); + return val; +} diff --git a/src/devices/machine/mb87030.h b/src/devices/machine/mb87030.h new file mode 100644 index 00000000000..7ce8c85c8e2 --- /dev/null +++ b/src/devices/machine/mb87030.h @@ -0,0 +1,222 @@ +// license:BSD-3-Clause +// copyright-holders:Sven Schnelle +#ifndef MAME_MACHINE_MB87030_H +#define MAME_MACHINE_MB87030_H + +#pragma once + +#include "machine/nscsi_bus.h" +#include <queue> + +class mb87030_device : public nscsi_device +{ +public: + mb87030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual void map(address_map &map); + + auto out_irq_callback() { return m_irq_handler.bind(); } + auto out_dreq_callback() { return m_dreq_handler.bind(); } + + DECLARE_READ8_MEMBER(bdid_r); + DECLARE_READ8_MEMBER(sctl_r); + DECLARE_READ8_MEMBER(scmd_r); + DECLARE_READ8_MEMBER(tmod_r); + DECLARE_READ8_MEMBER(ints_r); + DECLARE_READ8_MEMBER(psns_r); + DECLARE_READ8_MEMBER(ssts_r); + DECLARE_READ8_MEMBER(serr_r); + DECLARE_READ8_MEMBER(pctl_r); + DECLARE_READ8_MEMBER(mbc_r); + DECLARE_READ8_MEMBER(dreg_r); + DECLARE_READ8_MEMBER(temp_r); + DECLARE_READ8_MEMBER(tch_r); + DECLARE_READ8_MEMBER(tcm_r); + DECLARE_READ8_MEMBER(tcl_r); + DECLARE_READ8_MEMBER(exbf_r); + + DECLARE_WRITE8_MEMBER(bdid_w); + DECLARE_WRITE8_MEMBER(sctl_w); + DECLARE_WRITE8_MEMBER(scmd_w); + DECLARE_WRITE8_MEMBER(tmod_w); + DECLARE_WRITE8_MEMBER(ints_w); + DECLARE_WRITE8_MEMBER(sdgc_w); + DECLARE_WRITE8_MEMBER(pctl_w); + DECLARE_WRITE8_MEMBER(dreg_w); + DECLARE_WRITE8_MEMBER(temp_w); + DECLARE_WRITE8_MEMBER(tch_w); + DECLARE_WRITE8_MEMBER(tcm_w); + DECLARE_WRITE8_MEMBER(tcl_w); + DECLARE_WRITE8_MEMBER(exbf_w); + + DECLARE_WRITE_LINE_MEMBER(reset_w); + virtual void scsi_ctrl_changed() override; + + uint8_t dma_r(); + void dma_w(uint8_t val); + + void ctrl_write(uint32_t value, uint32_t mask) { scsi_bus->ctrl_w(scsi_refid, value, mask); scsi_ctrl_changed(); } + uint32_t data_read() { return scsi_bus->data_r(); }; +protected: + mb87030_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override; + virtual void device_reset() override; +private: + + constexpr static uint8_t SCTL_INT_ENABLE = 0x01; + constexpr static uint8_t SCTL_RESELECT_ENABLE = 0x02; + constexpr static uint8_t SCTL_SELECT_ENABLE = 0x04; + constexpr static uint8_t SCTL_PARITY_ENABLE = 0x08; + constexpr static uint8_t SCTL_ARBITRATION_ENABLE = 0x10; + constexpr static uint8_t SCTL_DIAG_MODE = 0x20; + constexpr static uint8_t SCTL_CONTROL_RESET = 0x40; + constexpr static uint8_t SCTL_RESET_AND_DISABLE = 0x80; + + constexpr static uint8_t SCMD_TERM_MODE = 0x01; + constexpr static uint8_t SCMD_PRG_XFER = 0x02; + constexpr static uint8_t SCMD_INTERCEPT_XFER = 0x04; + constexpr static uint8_t SCMD_RST_OUT = 0x08; + constexpr static uint8_t SCMD_CMD_BUS_RELEASE = 0x00; + constexpr static uint8_t SCMD_CMD_SELECT = 0x20; + constexpr static uint8_t SCMD_CMD_RESET_ATN = 0x40; + constexpr static uint8_t SCMD_CMD_SET_ATN = 0x60; + constexpr static uint8_t SCMD_CMD_TRANSFER = 0x80; + constexpr static uint8_t SCMD_CMD_TRANSFER_PAUSE = 0xa0; + constexpr static uint8_t SCMD_CMD_RESET_ACK_REQ = 0xc0; + constexpr static uint8_t SCMD_CMD_SET_ACK_REQ = 0xe0; + constexpr static uint8_t SCMD_CMD_MASK = 0xe0; + + constexpr static uint8_t TMOD_MIN_TRANSFER_PERIOD_SHIFT = 0x02; + constexpr static uint8_t TMOD_MIN_TRANSFER_PERIOD_MASK = 0x0c; + constexpr static uint8_t TMOD_MAX_TRANSFER_OFFSET_SHIFT = 0x04; + constexpr static uint8_t TMOD_MIN_TRANSFER_OFFSET_MASK = 0x70; + constexpr static uint8_t TMOD_SYNC_XFER = 0x80; + + constexpr static uint8_t PCTL_PHASE_SHIFT = 0x00; + constexpr static uint8_t PCTL_PHASE_MASK = 0x07; + constexpr static uint8_t PCTL_BUS_FREE_IE = 0x80; + + constexpr static uint8_t PSNS_IO = 0x01; + constexpr static uint8_t PSNS_CD = 0x02; + constexpr static uint8_t PSNS_MSG = 0x04; + constexpr static uint8_t PSNS_BSY = 0x08; + constexpr static uint8_t PSNS_SEL = 0x10; + constexpr static uint8_t PSNS_ATN = 0x20; + constexpr static uint8_t PSNS_ACK = 0x40; + constexpr static uint8_t PSNS_REQ = 0x80; + + constexpr static uint8_t INTS_RESET_CONDITION = 0x01; + constexpr static uint8_t INTS_SPC_HARD_ERR = 0x02; + constexpr static uint8_t INTS_SPC_TIMEOUT = 0x04; + constexpr static uint8_t INTS_SERVICE_REQUIRED = 0x08; + constexpr static uint8_t INTS_COMMAND_COMPLETE = 0x10; + constexpr static uint8_t INTS_DISCONNECTED = 0x20; + constexpr static uint8_t INTS_RESELECTED = 0x40; + constexpr static uint8_t INTS_SELECTED = 0x80; + + constexpr static uint8_t SSTS_DREQ_EMPTY = 0x01; + constexpr static uint8_t SSTS_DREQ_FULL = 0x02; + constexpr static uint8_t SSTS_TC_ZERO = 0x04; + constexpr static uint8_t SSTS_SCSI_RST = 0x08; + constexpr static uint8_t SSTS_XFER_IN_PROGRESS = 0x10; + constexpr static uint8_t SSTS_SPC_BUSY = 0x20; + constexpr static uint8_t SSTS_TARG_CONNECTED = 0x40; + constexpr static uint8_t SSTS_INIT_CONNECTED = 0x80; + + constexpr static uint8_t SERR_OFFSET_ERROR = 0x01; + constexpr static uint8_t SERR_SHORT_PERIOD = 0x02; + constexpr static uint8_t SERR_PHASE_ERROR = 0x04; + constexpr static uint8_t SERR_TC_P_ERROR = 0x08; + constexpr static uint8_t SERR_DATA_ERROR_SPC = 0x40; + constexpr static uint8_t SERR_DATA_ERROR_SCSI = 0x80; + + constexpr static uint8_t SDGC_DIAG_IO = 0x01; + constexpr static uint8_t SDGC_DIAG_CD = 0x02; + constexpr static uint8_t SDGC_DIAG_MSG = 0x04; + constexpr static uint8_t SDGC_DIAG_BSY = 0x08; + constexpr static uint8_t SDGC_DIAG_ACK = 0x40; + constexpr static uint8_t SDGC_DIAG_REQ = 0x80; + + emu_timer *m_timer; + emu_timer *m_delay_timer; + + enum TimerId { + Delay, + Timeout, + }; + enum class State: uint8_t { + Idle, + ArbitrationWaitBusFree, + ArbitrationAssertBSY, + ArbitrationWait, + ArbitrationAssertSEL, + ArbitrationDeAssertBSY, + SelectionWaitBusFree, + SelectionAssertSEL, + SelectionWaitBSY, + Selection, + TransferWaitReq, + TransferSendData, + TransferSendDataDMAReq, + TransferSendDataDMAResp, + TransferRecvData, + TransferRecvDataDMAReq, + TransferRecvDataDMAResp, + TransferSendAck, + TransferWaitDeassertREQ, + TransferDeassertACK + //TransferCommand, + } m_state; + + void update_ssts(void); + void update_ints(void); + + void scsi_disconnect_timeout(void); + void scsi_command_complete(void); + void scsi_disconnect(void); + void update_state(mb87030_device::State new_state, int delay = 0, int timeout = 0); + auto get_state_name(State state) const; + void scsi_set_ctrl(uint32_t val, uint32_t mask); + uint32_t scsi_get_ctrl(); + void step(bool timeout); + + devcb_write_line m_irq_handler; + devcb_write_line m_dreq_handler; + + TIMER_CALLBACK_MEMBER(delay_timeout); + TIMER_CALLBACK_MEMBER(timeout); + + // registers + uint8_t m_bdid; + uint8_t m_sctl; + uint8_t m_scmd; + uint8_t m_tmod; + uint8_t m_ints; + uint8_t m_sdgc; + uint8_t m_ssts; + uint8_t m_serr; + uint8_t m_pctl; + uint8_t m_mbc; + uint8_t m_dreg; + uint8_t m_temp; + uint8_t m_tch; + uint8_t m_tcm; + uint32_t m_tc; + uint8_t m_exbf; + + uint8_t m_hdb; + bool m_hdb_loaded; + bool m_send_atn_during_selection; + util::fifo <uint8_t, 8> m_fifo; + + uint8_t m_scsi_phase; + uint32_t m_scsi_ctrl; + + bool m_dma_transfer; +}; + + +DECLARE_DEVICE_TYPE(MB87030, mb87030_device) + +#endif // MAME_MACHINE_MB87030_H diff --git a/src/devices/machine/mb89363b.cpp b/src/devices/machine/mb89363b.cpp index f06bba6b3ac..0c03a66e421 100644 --- a/src/devices/machine/mb89363b.cpp +++ b/src/devices/machine/mb89363b.cpp @@ -120,17 +120,17 @@ WRITE8_MEMBER(mb89363b_device::i8255_b_port_c_w) { m_out_b_pc_cb(space, offset, READ8_MEMBER( mb89363b_device::read ) { if (offset & 4) - return m_i8255_b->read(space, offset & 3); + return m_i8255_b->read(offset & 3); else - return m_i8255_a->read(space, offset & 3); + return m_i8255_a->read(offset & 3); } WRITE8_MEMBER( mb89363b_device::write ) { if (offset & 4) - m_i8255_b->write(space, offset & 3, data); + m_i8255_b->write(offset & 3, data); else - m_i8255_a->write(space, offset & 3, data); + m_i8255_a->write(offset & 3, data); } diff --git a/src/devices/machine/msm58321.cpp b/src/devices/machine/msm58321.cpp index 97bd2a55f09..550645b5255 100644 --- a/src/devices/machine/msm58321.cpp +++ b/src/devices/machine/msm58321.cpp @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Curt Coder +// copyright-holders:Curt Coder,Sven Schnelle /********************************************************************** OKI MSM58321RS Real Time Clock/Calendar emulation @@ -10,9 +10,7 @@ TODO: - - leap year - - test - - reference registers + - non gregorian leap year */ @@ -105,21 +103,13 @@ inline int msm58321_device::read_counter(int counter) { data += (h10 & 3) * 10; } + else if (h10 & H10_PM) + { + data += 12 + (h10 & 1) * 10; + } else { data += (h10 & 1) * 10; - - if (h10 & H10_PM) - { - if (data != 12) - { - data += 12; - } - } - else if (data == 12) - { - data = 0; - } } } else @@ -139,8 +129,7 @@ inline void msm58321_device::write_counter(int address, int data) { int flag = 0; - switch (address) - { + switch (address) { case REGISTER_H1: flag = m_reg[REGISTER_H10] & H10_24; if (!flag) @@ -151,10 +140,8 @@ inline void msm58321_device::write_counter(int address, int data) flag = H10_PM; } - if (data == 0) - { + if ((m_reg[REGISTER_H10] & H10_PM) && data == 0) data = 12; - } } break; @@ -200,9 +187,9 @@ msm58321_device::msm58321_device(const machine_config &mconfig, const char *tag, m_stop(0), m_test(0), m_cs1(0), - m_address(0xf) + m_address(0xf), + m_reg{} { - memset(m_reg, 0x00, sizeof(m_reg)); } @@ -221,12 +208,16 @@ void msm58321_device::device_start() // allocate timers m_clock_timer = timer_alloc(TIMER_CLOCK); - m_clock_timer->adjust(clocks_to_attotime(32768), 0, clocks_to_attotime(32768)); + m_clock_timer->adjust(clocks_to_attotime(32768/1024), 0, clocks_to_attotime(32768/1024)); // busy signal active period is approximately 427 µs m_busy_timer = timer_alloc(TIMER_BUSY); m_busy_timer->adjust(clocks_to_attotime(32768 - 14), 0, clocks_to_attotime(32768)); + // standard signal active period is approximately 122 µs + m_standard_timer = timer_alloc(TIMER_STANDARD); + m_standard_timer->adjust(clocks_to_attotime(32768-4), 0, clocks_to_attotime(32768)); + // state saving save_item(NAME(m_cs2)); save_item(NAME(m_write)); @@ -258,12 +249,29 @@ void msm58321_device::device_timer(emu_timer &timer, device_timer_id id, int par switch (id) { case TIMER_CLOCK: - if (!m_stop) - advance_seconds(); - if (!m_busy) + + if (m_khz_ctr & 1) { - m_busy = 1; - m_busy_handler(m_busy); + m_reg[REGISTER_REF0] |= 1; + m_reg[REGISTER_REF1] |= 1; + } else { + m_reg[REGISTER_REF0] &= ~1; + m_reg[REGISTER_REF1] &= ~1; + } + + if (++m_khz_ctr >= 1024) + { + m_khz_ctr = 0; + if (!m_stop) + { + advance_seconds(); + } + + if (!m_busy) + { + m_busy = 1; + m_busy_handler(m_busy); + } } break; @@ -274,9 +282,29 @@ void msm58321_device::device_timer(emu_timer &timer, device_timer_id id, int par m_busy_handler(m_busy); } break; + case TIMER_STANDARD: + m_reg[REGISTER_REF0] = 0x0e; + m_reg[REGISTER_REF1] = 0x0e; + break; } } +void msm58321_device::update_standard() +{ + uint8_t reg = 0; + + if (m_reg[REGISTER_S1] == 0) + reg |= 1 << 1; + + if (m_reg[REGISTER_MI1] == 0) + reg |= 1 << 2; + + if (m_reg[REGISTER_H1] == 0) + reg |= 1 << 3; + + m_reg[REGISTER_REF0] = (reg ^ 0x0e) | (m_khz_ctr & 1); + m_reg[REGISTER_REF1] = m_reg[REGISTER_REF0]; +} //------------------------------------------------- // rtc_clock_updated - @@ -291,7 +319,7 @@ void msm58321_device::rtc_clock_updated(int year, int month, int day, int day_of write_counter(REGISTER_H1, hour); write_counter(REGISTER_MI1, minute); write_counter(REGISTER_S1, second); - + update_standard(); update_output(); } @@ -319,7 +347,7 @@ void msm58321_device::nvram_default() void msm58321_device::nvram_read(emu_file &file) { - file.read(m_reg, sizeof(m_reg)); + file.read(m_reg.data(), m_reg.size()); clock_updated(); } @@ -332,7 +360,7 @@ void msm58321_device::nvram_read(emu_file &file) void msm58321_device::nvram_write(emu_file &file) { - file.write(m_reg, sizeof(m_reg)); + file.write(m_reg.data(), m_reg.size()); } //------------------------------------------------- @@ -350,13 +378,9 @@ void msm58321_device::update_output() case REGISTER_RESET: data = 0; break; - - case REGISTER_REF0: - case REGISTER_REF1: - // TODO: output reference values - data = 0; + case REGISTER_W: + data = m_reg[m_address] - 1; break; - default: data = m_reg[m_address]; break; @@ -434,15 +458,17 @@ void msm58321_device::update_input() default: LOG("MSM58321 Register Write %s (%01x): %01x\n", reg_name(m_address), m_address, data); - + m_khz_ctr = 0; switch (m_address) { case REGISTER_S10: case REGISTER_MI10: - case REGISTER_W: + m_reg[m_address] = data & 7; break; - + case REGISTER_W: + m_reg[m_address] = (data & 7) + 1; + break; case REGISTER_H10: if (data & H10_24) { diff --git a/src/devices/machine/msm58321.h b/src/devices/machine/msm58321.h index 00f5a524322..1842b4f2036 100644 --- a/src/devices/machine/msm58321.h +++ b/src/devices/machine/msm58321.h @@ -114,14 +114,16 @@ protected: virtual void nvram_default() override; virtual void nvram_read(emu_file &file) override; virtual void nvram_write(emu_file &file) override; + virtual bool rtc_feature_leap_year() const override { return true; } private: - static const device_timer_id TIMER_CLOCK = 0; - static const device_timer_id TIMER_BUSY = 1; + static constexpr device_timer_id TIMER_CLOCK = 0; + static constexpr device_timer_id TIMER_BUSY = 1; + static constexpr device_timer_id TIMER_STANDARD = 2; void update_input(); void update_output(); - + void update_standard(); inline int read_counter(int counter); inline void write_counter(int counter, int value); @@ -151,11 +153,14 @@ private: int m_cs1; // chip select 1 uint8_t m_address; // address latch - uint8_t m_reg[13]; // registers + std::array<uint8_t, 16> m_reg; // registers // timers emu_timer *m_clock_timer; emu_timer *m_busy_timer; + emu_timer *m_standard_timer; + + int m_khz_ctr; }; diff --git a/src/devices/machine/ncr5390.cpp b/src/devices/machine/ncr5390.cpp index 8d9f4b9641b..62c62a038b6 100644 --- a/src/devices/machine/ncr5390.cpp +++ b/src/devices/machine/ncr5390.cpp @@ -33,6 +33,42 @@ void ncr5390_device::map(address_map &map) map(0x9, 0x9).w(FUNC(ncr5390_device::clock_w)); } +READ8_MEMBER(ncr5390_device::read) +{ + switch (offset) + { + case 0: return tcounter_lo_r(space, 0); + case 1: return tcounter_hi_r(space, 0); + case 2: return fifo_r(space, 0); + case 3: return command_r(space, 0); + case 4: return status_r(space, 0); + case 5: return istatus_r(space, 0); + case 6: return seq_step_r(space, 0); + case 7: return fifo_flags_r(space, 0); + case 8: return conf_r(space, 0); + default: return 0; + } +} + +WRITE8_MEMBER(ncr5390_device::write) +{ + switch (offset) + { + case 0: tcount_lo_w(space, 0, data); break; + case 1: tcount_hi_w(space, 0, data); break; + case 2: fifo_w(space, 0, data); break; + case 3: command_w(space, 0, data); break; + case 4: bus_id_w(space, 0, data); break; + case 5: timeout_w(space, 0, data); break; + case 6: sync_period_w(space, 0, data); break; + case 7: sync_offset_w(space, 0, data); break; + case 8: conf_w(space, 0, data); break; + case 9: clock_w(space, 0, data); break; + case 10: test_w(space, 0, data); break; + default: break; + } +} + void ncr53c90a_device::map(address_map &map) { ncr5390_device::map(map); @@ -40,6 +76,20 @@ void ncr53c90a_device::map(address_map &map) map(0xb, 0xb).rw(FUNC(ncr53c90a_device::conf2_r), FUNC(ncr53c90a_device::conf2_w)); } +READ8_MEMBER(ncr53c90a_device::read) +{ + if (offset == 11) + return conf2_r(space, 0); + return ncr5390_device::read(space, offset); +} + +WRITE8_MEMBER(ncr53c90a_device::write) +{ + if (offset == 11) + return conf2_w(space, 0, data); + ncr5390_device::write(space, offset, data); +} + void ncr53c94_device::map(address_map &map) { ncr53c90a_device::map(map); @@ -48,6 +98,23 @@ void ncr53c94_device::map(address_map &map) map(0xf, 0xf).w(FUNC(ncr53c94_device::fifo_align_w)); } +READ8_MEMBER(ncr53c94_device::read) +{ + if (offset == 12) + return conf3_r(space, 0); + return ncr53c90a_device::read(space, offset); +} + +WRITE8_MEMBER(ncr53c94_device::write) +{ + if (offset == 11) + conf3_w(space, 0, data); + else if (offset == 15) + fifo_align_w(space, 0, data); + else + ncr53c90a_device::write(space, offset, data); +} + ncr5390_device::ncr5390_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : nscsi_device(mconfig, type, tag, owner, clock) , tm(nullptr), config(0), status(0), istatus(0), clock_conv(0), sync_offset(0), sync_period(0), bus_id(0) @@ -340,10 +407,15 @@ void ncr5390_device::step(bool timeout) case DISC_SEL_ARBITRATION_INIT: // wait until a command is in the fifo - if (!fifo_pos && dma_command && !(status & S_TC0)) + if (!fifo_pos && dma_command && !(status & S_TC0)) { + // dma starts after bus arbitration/selection is complete + dma_set(DMA_OUT); + step(false); break; + } - command_length = derive_msg_size(fifo[0]); + // "with atn" variants have a message byte before the command descriptor + command_length = (c == CD_SELECT) ? derive_msg_size(fifo[0]) : 1; state = DISC_SEL_ARBITRATION; step(false); break; @@ -783,6 +855,12 @@ void ncr5390_device::start_command() case CM_RESET_BUS: LOGMASKED(LOG_COMMAND, "Reset SCSI bus\n"); reset_soft(); + // FIXME: this interrupt should be generated when the reset is reflected + // back into the device, and not when the device starts the scsi reset + if (!(config & 0x40)) { + istatus = I_SCSI_RESET; + check_irq(); + } break; case CD_RESELECT: @@ -800,7 +878,6 @@ void ncr5390_device::start_command() "Select with ATN and stop sequence\n"); seq = 0; state = DISC_SEL_ARBITRATION_INIT; - dma_set(dma_command ? DMA_OUT : DMA_NONE); arbitrate(); break; diff --git a/src/devices/machine/ncr5390.h b/src/devices/machine/ncr5390.h index 9a2bed1bc28..bf301bed266 100644 --- a/src/devices/machine/ncr5390.h +++ b/src/devices/machine/ncr5390.h @@ -35,7 +35,7 @@ public: DECLARE_WRITE8_MEMBER(fifo_w); DECLARE_READ8_MEMBER(command_r); DECLARE_WRITE8_MEMBER(command_w); - DECLARE_READ8_MEMBER(status_r); + virtual DECLARE_READ8_MEMBER(status_r); DECLARE_WRITE8_MEMBER(bus_id_w); DECLARE_READ8_MEMBER(istatus_r); DECLARE_WRITE8_MEMBER(timeout_w); @@ -48,6 +48,9 @@ public: DECLARE_WRITE8_MEMBER(test_w); DECLARE_WRITE8_MEMBER(clock_w); + virtual DECLARE_READ8_MEMBER(read); + virtual DECLARE_WRITE8_MEMBER(write); + virtual void scsi_ctrl_changed() override; uint8_t dma_r(); @@ -233,7 +236,7 @@ protected: void check_irq(); protected: - void reset_soft(); + virtual void reset_soft(); private: void reset_disconnect(); @@ -259,16 +262,19 @@ public: virtual void map(address_map &map) override; - DECLARE_READ8_MEMBER(status_r); + virtual DECLARE_READ8_MEMBER(status_r) override; DECLARE_READ8_MEMBER(conf2_r) { return config2; }; DECLARE_WRITE8_MEMBER(conf2_w) { config2 = data; }; + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; + protected: ncr53c90a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); virtual void device_start() override; - void reset_soft(); + virtual void reset_soft() override; virtual bool check_valid_command(uint8_t cmd) override; @@ -292,9 +298,12 @@ public: DECLARE_WRITE8_MEMBER(conf3_w) { config3 = data; }; DECLARE_WRITE8_MEMBER(fifo_align_w) { fifo_align = data; }; + virtual DECLARE_READ8_MEMBER(read) override; + virtual DECLARE_WRITE8_MEMBER(write) override; + protected: virtual void device_start() override; - void reset_soft(); + virtual void reset_soft() override; private: u8 config3; diff --git a/src/devices/machine/ncr539x.cpp b/src/devices/machine/ncr539x.cpp index 3e9853a784f..58c69a16ad1 100644 --- a/src/devices/machine/ncr539x.cpp +++ b/src/devices/machine/ncr539x.cpp @@ -56,7 +56,7 @@ enum #define CR2_GENERATE_REGISTER_PARITY 0x02 #define CR2_GENERATE_DATA_PARITY 0x01 -static const char *rdregs[16] = { +static char const *const rdregs[16] = { "Transfer count LSB", // 0 "Transfer count MSB", // 1 "FIFO", // 2 @@ -75,7 +75,7 @@ static const char *rdregs[16] = { "0xF" }; -static const char *wrregs[16] = { +static char const *const wrregs[16] = { "Start Transfer count LSB", "Start Transfer count MSB", "FIFO", diff --git a/src/devices/machine/nscsi_bus.cpp b/src/devices/machine/nscsi_bus.cpp index f8be56e50a7..5308d783313 100644 --- a/src/devices/machine/nscsi_bus.cpp +++ b/src/devices/machine/nscsi_bus.cpp @@ -6,9 +6,10 @@ #define LOG_GENERAL (1U << 0) #define LOG_STATE (1U << 1) #define LOG_CONTROL (1U << 2) +#define LOG_DATA (1U << 3) -//#define VERBOSE (LOG_GENERAL | LOG_STATE | LOG_CONTROL) -#define VERBOSE (LOG_GENERAL) +//#define VERBOSE (LOG_GENERAL | LOG_STATE | LOG_CONTROL | LOG_DATA) +#define VERBOSE 0 #include "logmacro.h" @@ -49,7 +50,7 @@ void nscsi_bus_device::regen_data() void nscsi_bus_device::regen_ctrl(int refid) { - static const char *phase[8] = { + static char const *const phase[8] = { "dout", "din ", "cmd ", "stat", "4 ", "5 ", "mout", "min " }; @@ -465,6 +466,7 @@ uint8_t nscsi_full_device::scsi_get_data(int id, int pos) { switch(id) { case SBUF_MAIN: + LOGMASKED(LOG_DATA, "scsi_get_data MAIN, id:%d pos:%d data:%02x %c\n", id, pos, scsi_cmdbuf[pos], scsi_cmdbuf[pos] >= 0x20 && scsi_cmdbuf[pos] < 0x7f ? (char)scsi_cmdbuf[pos] : ' '); return scsi_cmdbuf[pos]; case SBUF_SENSE: return scsi_sense_buffer[pos]; @@ -477,6 +479,7 @@ void nscsi_full_device::scsi_put_data(int id, int pos, uint8_t data) { switch(id) { case SBUF_MAIN: + LOGMASKED(LOG_DATA, "nscsi_bus: scsi_put_data MAIN, id:%d pos:%d data:%02x %c\n", id, pos, data, data >= 0x20 && data < 0x7f ? (char)data : ' '); scsi_cmdbuf[pos] = data; break; case SBUF_SENSE: diff --git a/src/devices/machine/nscsi_cd.cpp b/src/devices/machine/nscsi_cd.cpp index a3d54d19804..5815ccdfa3e 100644 --- a/src/devices/machine/nscsi_cd.cpp +++ b/src/devices/machine/nscsi_cd.cpp @@ -3,7 +3,7 @@ #include "emu.h" #include "machine/nscsi_cd.h" -#define VERBOSE 1 +#define VERBOSE 0 #include "logmacro.h" DEFINE_DEVICE_TYPE(NSCSI_CDROM, nscsi_cdrom_device, "scsi_cdrom", "SCSI CD-ROM") @@ -37,7 +37,6 @@ MACHINE_CONFIG_END void nscsi_cdrom_device::set_block_size(u32 block_size) { - assert_always(!started(), "block size should not be set after device start"); assert_always(bytes_per_sector % block_size == 0, "block size must be a factor of sector size"); bytes_per_block = block_size; @@ -60,6 +59,25 @@ uint8_t nscsi_cdrom_device::scsi_get_data(int id, int pos) return sector_buffer[(pos + extra_pos) & (bytes_per_sector - 1)]; } +void nscsi_cdrom_device::scsi_put_data(int id, int pos, uint8_t data) +{ + if(id != 2) { + nscsi_full_device::scsi_put_data(id, pos, data); + return; + } + + // process mode parameter header and one block descriptor + if(pos < sizeof(mode_data)) { + mode_data[pos] = data; + + // is this the last byte of the mode parameter block descriptor? + if(pos == sizeof(mode_data) - 1) + // is there exactly one block descriptor? + if(mode_data[3] == 8) + set_block_size((mode_data[9] << 16) | (mode_data[10] << 8) | (mode_data[11] << 0)); + } +} + void nscsi_cdrom_device::return_no_cd() { sense(false, 3); @@ -124,7 +142,7 @@ void nscsi_cdrom_device::scsi_command() * peripheral qualifier set to the value required in 8.2.5.1. * * If the logic from the specification above is applied, Sun SCSI probe - * code gets confused and reports multiple valid logical units are + * code gets confused and reports multiple valid logical units are * attached; proper behaviour is produced when check condition status * is returned with sense data ILLEGAL REQUEST and LOGICAL UNIT NOT * SUPPORTED. @@ -162,6 +180,16 @@ void nscsi_cdrom_device::scsi_command() break; } + case SC_MODE_SELECT_6: + LOG("command MODE SELECT 6 length %d\n", scsi_cmdbuf[4]); + + // accept mode select parameter data + if(scsi_cmdbuf[4]) + scsi_data_out(2, scsi_cmdbuf[4]); + + scsi_status_complete(SS_GOOD); + break; + case SC_START_STOP_UNIT: LOG("command %s UNIT%s\n", (scsi_cmdbuf[4] & 0x1) ? "START" : "STOP", (scsi_cmdbuf[4] & 0x2) ? (scsi_cmdbuf[4] & 0x1) ? " (LOAD)" : " (EJECT)" : ""); diff --git a/src/devices/machine/nscsi_cd.h b/src/devices/machine/nscsi_cd.h index 45e470b4c32..2f7c111c2d6 100644 --- a/src/devices/machine/nscsi_cd.h +++ b/src/devices/machine/nscsi_cd.h @@ -23,6 +23,7 @@ protected: virtual void scsi_command() override; virtual uint8_t scsi_get_data(int id, int pos) override; + virtual void scsi_put_data(int buf, int offset, uint8_t data) override; private: static constexpr uint32_t bytes_per_sector = 2048; @@ -32,6 +33,7 @@ private: uint32_t bytes_per_block; int lba, cur_sector; required_device<cdrom_image_device> image; + uint8_t mode_data[12]; void return_no_cd(); }; diff --git a/src/devices/machine/nscsi_hd.cpp b/src/devices/machine/nscsi_hd.cpp index cc6c9e2167c..c83a2c17ef9 100644 --- a/src/devices/machine/nscsi_hd.cpp +++ b/src/devices/machine/nscsi_hd.cpp @@ -6,8 +6,9 @@ #define LOG_GENERAL (1U << 0) #define LOG_COMMAND (1U << 1) +#define LOG_DATA (1U << 2) -#define VERBOSE (LOG_GENERAL) +#define VERBOSE 0 #include "logmacro.h" @@ -60,21 +61,30 @@ MACHINE_CONFIG_END uint8_t nscsi_harddisk_device::scsi_get_data(int id, int pos) { + uint8_t data = 0; if(id != 2) - return nscsi_full_device::scsi_get_data(id, pos); - int clba = lba + pos / bytes_per_sector; - if(clba != cur_lba) { - cur_lba = clba; - if(!hard_disk_read(harddisk, cur_lba, block)) { - LOG("HD READ ERROR !\n"); - memset(block, 0, sizeof(block)); + { + data = nscsi_full_device::scsi_get_data(id, pos); + } + else + { + int clba = lba + pos / bytes_per_sector; + if(clba != cur_lba) { + cur_lba = clba; + if(!hard_disk_read(harddisk, cur_lba, block)) { + LOG("HD READ ERROR !\n"); + memset(block, 0, sizeof(block)); + } } + data = block[pos % bytes_per_sector]; } - return block[pos % bytes_per_sector]; + LOGMASKED(LOG_DATA, "nscsi_hd: scsi_get_data, id:%d pos:%d data:%02x %c\n", id, pos, data, data >= 0x20 && data < 0x7f ? (char)data : ' '); + return data; } void nscsi_harddisk_device::scsi_put_data(int id, int pos, uint8_t data) { + LOGMASKED(LOG_DATA, "nscsi_hd: scsi_put_data, id:%d pos:%d data:%02x %c\n", id, pos, data, data >= 0x20 && data < 0x7f ? (char)data : ' '); if(id != 2) { nscsi_full_device::scsi_put_data(id, pos, data); return; @@ -328,7 +338,7 @@ void nscsi_harddisk_device::scsi_command() } case SC_START_STOP_UNIT: - LOG("command START STOP UNIT\n"); + LOG("command %s UNIT\n", (scsi_cmdbuf[4] & 0x1) ? "START" : "STOP"); scsi_status_complete(SS_GOOD); break; diff --git a/src/devices/machine/pc_fdc.cpp b/src/devices/machine/pc_fdc.cpp index bc760e832b4..d49450e1318 100644 --- a/src/devices/machine/pc_fdc.cpp +++ b/src/devices/machine/pc_fdc.cpp @@ -34,11 +34,11 @@ void pc_fdc_family_device::map(address_map &map) // The schematics show address decoding is minimal void pc_fdc_xt_device::map(address_map &map) { - map(0x0, 0x0).r("upd765", FUNC(upd765a_device::msr_r)).w(FUNC(pc_fdc_xt_device::dor_w)); - map(0x1, 0x1).r("upd765", FUNC(upd765a_device::fifo_r)).w(FUNC(pc_fdc_xt_device::dor_fifo_w)); + map(0x0, 0x0).r(fdc, FUNC(upd765a_device::msr_r)).w(FUNC(pc_fdc_xt_device::dor_w)); + map(0x1, 0x1).r(fdc, FUNC(upd765a_device::fifo_r)).w(FUNC(pc_fdc_xt_device::dor_fifo_w)); map(0x2, 0x2).w(FUNC(pc_fdc_xt_device::dor_w)); map(0x3, 0x3).w(FUNC(pc_fdc_xt_device::dor_w)); - map(0x4, 0x5).m("upd765", FUNC(upd765a_device::map)); + map(0x4, 0x5).m(fdc, FUNC(upd765a_device::map)); } @@ -46,7 +46,7 @@ void pc_fdc_xt_device::map(address_map &map) void pc_fdc_at_device::map(address_map &map) { map(0x2, 0x2).rw(FUNC(pc_fdc_at_device::dor_r), FUNC(pc_fdc_at_device::dor_w)); - map(0x4, 0x5).m("upd765", FUNC(upd765a_device::map)); + map(0x4, 0x5).m(fdc, FUNC(upd765a_device::map)); map(0x7, 0x7).rw(FUNC(pc_fdc_at_device::dir_r), FUNC(pc_fdc_at_device::ccr_w)); } @@ -72,11 +72,12 @@ void pc_fdc_family_device::dma_w(uint8_t data) fdc->dma_w(data); } -MACHINE_CONFIG_START(pc_fdc_family_device::device_add_mconfig) - MCFG_UPD765A_ADD("upd765", false, false) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pc_fdc_family_device, irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, pc_fdc_family_device, drq_w)) -MACHINE_CONFIG_END +void pc_fdc_family_device::device_add_mconfig(machine_config &config) +{ + UPD765A(config, fdc, false, false); + fdc->intrq_wr_callback().set(FUNC(pc_fdc_family_device::irq_w)); + fdc->drq_wr_callback().set(FUNC(pc_fdc_family_device::drq_w)); +} void pc_fdc_family_device::device_start() { diff --git a/src/devices/machine/pc_lpt.h b/src/devices/machine/pc_lpt.h index d85768bb5d4..72677832926 100644 --- a/src/devices/machine/pc_lpt.h +++ b/src/devices/machine/pc_lpt.h @@ -13,8 +13,6 @@ #include "bus/centronics/ctronics.h" -#define MCFG_PC_LPT_IRQ_HANDLER(_devcb) \ - downcast<pc_lpt_device &>(*device).set_irq_handler(DEVCB_##_devcb); /*************************************************************************** DEVICE CONFIGURATION MACROS @@ -23,10 +21,10 @@ class pc_lpt_device : public device_t { public: - pc_lpt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + pc_lpt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); // configuration helpers - template <class Object> devcb_base &set_irq_handler(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); } + auto irq_handler() { return m_irq_handler.bind(); } DECLARE_READ8_MEMBER( read ); DECLARE_WRITE8_MEMBER( write ); diff --git a/src/devices/machine/pdc.cpp b/src/devices/machine/pdc.cpp index deccddb7869..10dc9fd0619 100644 --- a/src/devices/machine/pdc.cpp +++ b/src/devices/machine/pdc.cpp @@ -157,9 +157,9 @@ void pdc_device::pdc_io(address_map &map) map(0x3c, 0x3c).portr("SW2").mirror(0xFF00); /* FDC Dipswitch */ map(0x3d, 0x3d).portr("SW1").mirror(0xFF00); /* HDC Dipswitch */ map(0x40, 0x41).rw(HDC_TAG, FUNC(hdc9224_device::read), FUNC(hdc9224_device::write)).mirror(0xFF00); - map(0x42, 0x43).m(FDC_TAG, FUNC(upd765a_device::map)).mirror(0xFF00); + map(0x42, 0x43).m(m_fdc, FUNC(upd765a_device::map)).mirror(0xFF00); map(0x50, 0x5f).w(FUNC(pdc_device::p50_5f_w)).mirror(0xFF00); - map(0x60, 0x6f).rw(FDCDMA_TAG, FUNC(am9517a_device::read), FUNC(am9517a_device::write)).mirror(0xFF00); + map(0x60, 0x6f).rw(m_dma8237, FUNC(am9517a_device::read), FUNC(am9517a_device::write)).mirror(0xFF00); } //------------------------------------------------- @@ -255,20 +255,21 @@ FLOPPY_FORMATS_END // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(pdc_device::device_add_mconfig) +void pdc_device::device_add_mconfig(machine_config &config) +{ /* CPU - Zilog Z0840006PSC */ - MCFG_DEVICE_ADD(Z80_TAG, Z80, XTAL(10'000'000) / 2) - MCFG_DEVICE_PROGRAM_MAP(pdc_mem) - MCFG_DEVICE_IO_MAP(pdc_io) + Z80(config, m_pdccpu, XTAL(10'000'000) / 2); + m_pdccpu->set_addrmap(AS_PROGRAM, &pdc_device::pdc_mem); + m_pdccpu->set_addrmap(AS_IO, &pdc_device::pdc_io); //MCFG_QUANTUM_PERFECT_CPU(M6502_TAG) /* Floppy Disk Controller - uPD765a - NEC D765AC-2 */ - MCFG_UPD765A_ADD(FDC_TAG, true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pdc_device, fdc_irq)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(FDCDMA_TAG, am9517a_device, dreq0_w)) //MCFG_DEVCB_INVERT + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(FUNC(pdc_device::fdc_irq)); + m_fdc->drq_wr_callback().set(m_dma8237, FUNC(am9517a_device::dreq0_w)); //.invert(); // Floppy disk drive - MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":0", pdc_floppies, "35hd", pdc_device::floppy_formats) + FLOPPY_CONNECTOR(config, FDC_TAG":0", pdc_floppies, "35hd", pdc_device::floppy_formats); /* DMA Controller - Intel P8237A-5 */ /* Channel 0: uPD765a Floppy Disk Controller */ @@ -288,7 +289,7 @@ MACHINE_CONFIG_START(pdc_device::device_add_mconfig) HDC9224(config, HDC_TAG, 0); MFM_HD_CONNECTOR(config, "h1", pdc_harddisks, nullptr, MFM_BYTE, 3000, 20, MFMHD_GEN_FORMAT); -MACHINE_CONFIG_END +} ioport_constructor pdc_device::device_input_ports() const { diff --git a/src/devices/machine/pic8259.cpp b/src/devices/machine/pic8259.cpp index 1289aac4d40..22cc5e4862a 100644 --- a/src/devices/machine/pic8259.cpp +++ b/src/devices/machine/pic8259.cpp @@ -137,7 +137,7 @@ IRQ_CALLBACK_MEMBER(pic8259_device::inta_cb) } -READ8_MEMBER( pic8259_device::read ) +uint8_t pic8259_device::read(offs_t offset) { /* NPW 18-May-2003 - Changing 0xFF to 0x00 as per Ruslan */ uint8_t data = 0x00; @@ -187,7 +187,7 @@ READ8_MEMBER( pic8259_device::read ) } -WRITE8_MEMBER( pic8259_device::write ) +void pic8259_device::write(offs_t offset, uint8_t data) { switch(offset) { diff --git a/src/devices/machine/pic8259.h b/src/devices/machine/pic8259.h index 8003c5449a7..24e5b1f6e59 100644 --- a/src/devices/machine/pic8259.h +++ b/src/devices/machine/pic8259.h @@ -57,8 +57,8 @@ public: auto in_sp_callback() { return m_in_sp_func.bind(); } auto read_slave_ack_callback() { return m_read_slave_ack_func.bind(); } - DECLARE_READ8_MEMBER( read ); - DECLARE_WRITE8_MEMBER( write ); + uint8_t read(offs_t offset); + void write(offs_t offset, uint8_t data); uint32_t acknowledge(); DECLARE_WRITE_LINE_MEMBER( ir0_w ) { set_irq_line(0, state); } diff --git a/src/devices/machine/pit8253.cpp b/src/devices/machine/pit8253.cpp index 94a99ff6fc4..6e6f86e5b0e 100644 --- a/src/devices/machine/pit8253.cpp +++ b/src/devices/machine/pit8253.cpp @@ -809,7 +809,7 @@ uint8_t pit_counter_device::read() return data; } -READ8_MEMBER( pit8253_device::read ) +uint8_t pit8253_device::read(offs_t offset) { offset &= 3; @@ -1023,7 +1023,7 @@ void pit_counter_device::count_w(uint8_t data) } } -WRITE8_MEMBER( pit8253_device::write ) +void pit8253_device::write(offs_t offset, uint8_t data) { offset &= 3; diff --git a/src/devices/machine/pit8253.h b/src/devices/machine/pit8253.h index 8ccb3474404..722cfa5233d 100644 --- a/src/devices/machine/pit8253.h +++ b/src/devices/machine/pit8253.h @@ -135,8 +135,8 @@ public: template <unsigned N, class Object> devcb_base &set_out_handler(Object &&cb) { return m_out_handler[N].set_callback(std::forward<Object>(cb)); } template <unsigned N> auto out_handler() { return m_out_handler[N].bind(); } - DECLARE_READ8_MEMBER(read); - DECLARE_WRITE8_MEMBER(write); + uint8_t read(offs_t offset); + void write(offs_t offset, uint8_t data); WRITE_LINE_MEMBER(write_gate0) { m_counter[0]->gate_w(state); } WRITE_LINE_MEMBER(write_gate1) { m_counter[1]->gate_w(state); } diff --git a/src/devices/machine/ps2dma.cpp b/src/devices/machine/ps2dma.cpp index 678f106025e..d0779ca7686 100644 --- a/src/devices/machine/ps2dma.cpp +++ b/src/devices/machine/ps2dma.cpp @@ -604,7 +604,7 @@ READ32_MEMBER(ps2_dmac_device::channel_r) WRITE32_MEMBER(ps2_dmac_device::channel_w) { - static const char* mode_strings[4] = { "Normal", "Chain", "Interleave", "Undefined" }; + static char const *const mode_strings[4] = { "Normal", "Chain", "Interleave", "Undefined" }; switch (offset + 0x8000/8) { diff --git a/src/devices/machine/ps2timer.cpp b/src/devices/machine/ps2timer.cpp index 263060b98a5..1ceb1a6257b 100644 --- a/src/devices/machine/ps2timer.cpp +++ b/src/devices/machine/ps2timer.cpp @@ -142,8 +142,8 @@ void ps2_timer_device::update_hold() void ps2_timer_device::set_mode(uint32_t data) { - static const char *clks_names[4] = { "BUSCLK", "BUSCLK/16", "BUSCLK/256", "HBLNK" }; - static const char *gatm_names[4] = { "low", "reset+rising", "reset+falling", "reset+both" }; + static char const *const clks_names[4] = { "BUSCLK", "BUSCLK/16", "BUSCLK/256", "HBLNK" }; + static char const *const gatm_names[4] = { "low", "reset+rising", "reset+falling", "reset+both" }; logerror("%s: CLKS=%s, GATE=%d, GATS=%cBLNK\n", machine().describe_context(), clks_names[data & 3], BIT(data, 2), BIT(data, 3) ? 'V' : 'H'); logerror("%s: GATM=%s, ZRET=%d, CUE=%d\n", machine().describe_context(), gatm_names[(data >> 4) & 3], BIT(data, 6), BIT(data, 7)); logerror("%s: CMPE=%d, OVFE=%d, %s, %s\n", machine().describe_context(), BIT(data, 8), BIT(data, 9), BIT(data, 10) ? "Clear Equal" : "", BIT(data, 11) ? "Clear Overflow" : ""); diff --git a/src/devices/machine/rtc4543.cpp b/src/devices/machine/rtc4543.cpp index ed3b0ee1bcd..9e883ab7fab 100644 --- a/src/devices/machine/rtc4543.cpp +++ b/src/devices/machine/rtc4543.cpp @@ -25,7 +25,7 @@ // MACROS / CONSTANTS //************************************************************************** -const char *rtc4543_device::s_reg_names[7] = +char const *const rtc4543_device::s_reg_names[7] = { "second", "minute", @@ -116,7 +116,7 @@ void rtc4543_device::device_timer(emu_timer &timer, device_timer_id id, int para void rtc4543_device::rtc_clock_updated(int year, int month, int day, int day_of_week, int hour, int minute, int second) { - static const int weekday[7] = { 7, 1, 2, 3, 4, 5, 6 }; + static int const weekday[7] = { 7, 1, 2, 3, 4, 5, 6 }; m_regs[0] = convert_to_bcd(second); // seconds (BCD, 0-59) in bits 0-6, bit 7 = battery low m_regs[1] = convert_to_bcd(minute); // minutes (BCD, 0-59) diff --git a/src/devices/machine/rtc4543.h b/src/devices/machine/rtc4543.h index da51b7cf440..534c6f7fc43 100644 --- a/src/devices/machine/rtc4543.h +++ b/src/devices/machine/rtc4543.h @@ -40,7 +40,7 @@ class rtc4543_device : public device_t, public device_rtc_interface { - static const char *s_reg_names[7]; + static char const *const s_reg_names[7]; public: // construction/destruction diff --git a/src/devices/machine/sis85c496.cpp b/src/devices/machine/sis85c496.cpp index f4e9f426fc1..186c4894b8d 100644 --- a/src/devices/machine/sis85c496.cpp +++ b/src/devices/machine/sis85c496.cpp @@ -97,15 +97,15 @@ MACHINE_CONFIG_START(sis85c496_host_device::device_add_mconfig) m_pic8259_slave->in_sp_callback().set_constant(0); AT_KEYBOARD_CONTROLLER(config, m_keybc, XTAL(12'000'000)); - m_keybc->system_reset_cb().set(FUNC(sis85c496_host_device::cpu_reset_w)); - m_keybc->gate_a20_cb().set(FUNC(sis85c496_host_device::cpu_a20_w)); - m_keybc->input_buffer_full_cb().set("pic8259_master", FUNC(pic8259_device::ir1_w)); - m_keybc->keyboard_clock_cb().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); - m_keybc->keyboard_data_cb().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + m_keybc->hot_res().set(FUNC(sis85c496_host_device::cpu_reset_w)); + m_keybc->gate_a20().set(FUNC(sis85c496_host_device::cpu_a20_w)); + m_keybc->kbd_irq().set("pic8259_master", FUNC(pic8259_device::ir1_w)); + m_keybc->kbd_clk().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); + m_keybc->kbd_data().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); MCFG_DEVICE_ADD("pc_kbdc", PC_KBDC, 0) - MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_clock_w)) - MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_data_w)) + MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_clk_w)) + MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_data_w)) MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL) DS12885(config, m_ds12885); diff --git a/src/devices/machine/spg2xx.cpp b/src/devices/machine/spg2xx.cpp new file mode 100644 index 00000000000..d50aaca694f --- /dev/null +++ b/src/devices/machine/spg2xx.cpp @@ -0,0 +1,2756 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/***************************************************************************** + + SunPlus SPG2xx-series SoC peripheral emulation + + TODO: + - Serial UART + - I2C + - SPI + +**********************************************************************/ + +#include "spg2xx.h" + +DEFINE_DEVICE_TYPE(SPG24X, spg24x_device, "spg24x", "SPG240-series System-on-a-Chip") +DEFINE_DEVICE_TYPE(SPG28X, spg28x_device, "spg28x", "SPG280-series System-on-a-Chip") + +#define LOG_IO_READS (1U << 0) +#define LOG_IO_WRITES (1U << 1) +#define LOG_UNKNOWN_IO (1U << 2) +#define LOG_IRQS (1U << 3) +#define LOG_VLINES (1U << 4) +#define LOG_GPIO (1U << 5) +#define LOG_UART (1U << 6) +#define LOG_I2C (1U << 7) +#define LOG_DMA (1U << 8) +#define LOG_SEGMENT (1U << 9) +#define LOG_WATCHDOG (1U << 10) +#define LOG_TIMERS (1U << 11) +#define LOG_SPU_READS (1U << 12) +#define LOG_SPU_WRITES (1U << 13) +#define LOG_UNKNOWN_SPU (1U << 14) +#define LOG_CHANNEL_READS (1U << 15) +#define LOG_CHANNEL_WRITES (1U << 16) +#define LOG_ENVELOPES (1U << 17) +#define LOG_SAMPLES (1U << 18) +#define LOG_RAMPDOWN (1U << 19) +#define LOG_BEAT (1U << 20) +#define LOG_PPU_READS (1U << 21) +#define LOG_PPU_WRITES (1U << 22) +#define LOG_UNKNOWN_PPU (1U << 23) +#define LOG_IO (LOG_IO_READS | LOG_IO_WRITES | LOG_IRQS | LOG_GPIO | LOG_UART | LOG_I2C | LOG_DMA | LOG_TIMERS | LOG_UNKNOWN_IO) +#define LOG_CHANNELS (LOG_CHANNEL_READS | LOG_CHANNEL_WRITES) +#define LOG_SPU (LOG_SPU_READS | LOG_SPU_WRITES | LOG_UNKNOWN_SPU | LOG_CHANNEL_READS | LOG_CHANNEL_WRITES \ + | LOG_ENVELOPES | LOG_SAMPLES | LOG_RAMPDOWN | LOG_BEAT) +#define LOG_PPU (LOG_PPU_READS | LOG_PPU_WRITES | LOG_UNKNOWN_PPU) +#define LOG_ALL (LOG_IO | LOG_SPU | LOG_PPU | LOG_VLINES | LOG_SEGMENT) + +#define VERBOSE (0) +#include "logmacro.h" + +#define SPG_DEBUG_VIDEO (0) +#define SPG_DEBUG_AUDIO (0) + +#if SPG2XX_VISUAL_AUDIO_DEBUG +static const uint32_t s_visual_debug_palette[8] = { + 0xff000000, + 0xff0000ff, + 0xff00ff00, + 0xff00ffff, + 0xffff0000, + 0xffff00ff, + 0xffffff00, + 0xffffffff +}; +#define SPG_VDB_BLACK 0 +#define SPG_VDB_WAVE 1 +#define SPG_VDB_EDD 2 +#define SPG_VDB_VOL 4 +#endif + +#define IO_IRQ_ENABLE m_io_regs[0x21] +#define IO_IRQ_STATUS m_io_regs[0x22] +#define VIDEO_IRQ_ENABLE m_video_regs[0x62] +#define VIDEO_IRQ_STATUS m_video_regs[0x63] + +spg2xx_device::spg2xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_sound_interface(mconfig, *this) + , m_porta_out(*this) + , m_portb_out(*this) + , m_portc_out(*this) + , m_porta_in(*this) + , m_portb_in(*this) + , m_portc_in(*this) + , m_eeprom_w(*this) + , m_eeprom_r(*this) + , m_uart_tx(*this) + , m_chip_sel(*this) + , m_cpu(*this, finder_base::DUMMY_TAG) + , m_screen(*this, finder_base::DUMMY_TAG) + , m_scrollram(*this, "scrollram") + , m_paletteram(*this, "paletteram") + , m_spriteram(*this, "spriteram") +#if SPG2XX_VISUAL_AUDIO_DEBUG + , m_audio_screen(*this, finder_base::DUMMY_TAG) +#endif +{ +} + +spg24x_device::spg24x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : spg2xx_device(mconfig, SPG24X, tag, owner, clock, 256) +{ +} + +spg28x_device::spg28x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : spg2xx_device(mconfig, SPG28X, tag, owner, clock, 64) +{ +} + +void spg2xx_device::map(address_map &map) +{ + map(0x000000, 0x0027ff).ram(); + map(0x002800, 0x0028ff).rw(FUNC(spg2xx_device::video_r), FUNC(spg2xx_device::video_w)); + map(0x002900, 0x002aff).ram().share("scrollram"); + map(0x002b00, 0x002bff).ram().share("paletteram"); + map(0x002c00, 0x002fff).ram().share("spriteram"); + map(0x003000, 0x0037ff).rw(FUNC(spg2xx_device::audio_r), FUNC(spg2xx_device::audio_w)); + map(0x003d00, 0x003eff).rw(FUNC(spg2xx_device::io_r), FUNC(spg2xx_device::io_w)); +} + +void spg2xx_device::device_start() +{ +#if SPG2XX_VISUAL_AUDIO_DEBUG + m_audio_debug_buffer = std::make_unique<uint8_t[]>(1024*768); +#endif + m_porta_out.resolve_safe(); + m_portb_out.resolve_safe(); + m_portc_out.resolve_safe(); + m_porta_in.resolve_safe(0); + m_portb_in.resolve_safe(0); + m_portc_in.resolve_safe(0); + m_eeprom_w.resolve_safe(); + m_eeprom_r.resolve_safe(0); + m_uart_tx.resolve_safe(); + m_chip_sel.resolve_safe(); + + m_tmb1 = timer_alloc(TIMER_TMB1); + m_tmb2 = timer_alloc(TIMER_TMB2); + m_tmb1->adjust(attotime::never); + m_tmb2->adjust(attotime::never); + + m_screenpos_timer = timer_alloc(TIMER_SCREENPOS); + m_screenpos_timer->adjust(attotime::never); + + m_audio_beat = timer_alloc(TIMER_BEAT); + m_audio_beat->adjust(attotime::never); + + m_stream = stream_alloc(0, 2, 44100); + + m_channel_debug = -1; +} + +void spg2xx_device::device_reset() +{ + memset(m_audio_regs, 0, 0x800 * sizeof(uint16_t)); + memset(m_sample_shift, 0, 16); + memset(m_sample_count, 0, sizeof(uint32_t) * 16); + memset(m_sample_addr, 0, sizeof(uint32_t) * 16); + memset(m_channel_rate, 0, sizeof(double) * 16); + memset(m_channel_rate_accum, 0, sizeof(double) * 16); + memset(m_rampdown_frame, 0, sizeof(uint32_t) * 16); + memset(m_envclk_frame, 4, sizeof(uint32_t) * 16); + memset(m_envelope_addr, 0, sizeof(uint32_t) * 16); + + memset(m_video_regs, 0, 0x100 * sizeof(uint16_t)); + memset(m_io_regs, 0, 0x200 * sizeof(uint16_t)); + + m_io_regs[0x23] = 0x0028; + + m_video_regs[0x36] = 0xffff; + m_video_regs[0x37] = 0xffff; + m_video_regs[0x3c] = 0x0020; + + m_hide_page0 = false; + m_hide_page1 = false; + m_hide_sprites = false; + m_debug_sprites = false; + m_debug_blit = false; + m_sprite_index_to_debug = 0; + + m_debug_samples = false; + m_debug_rates = false; + m_audio_curr_beat_base_count = 0; + + m_audio_regs[AUDIO_CHANNEL_REPEAT] = 0x3f; + m_audio_regs[AUDIO_CHANNEL_ENV_MODE] = 0x3f; + + m_audio_beat->adjust(attotime::from_ticks(4, 281250), 0, attotime::from_ticks(4, 281250)); +} + + +/************************* +* Video Hardware * +*************************/ + +inline uint8_t spg2xx_device::expand_rgb5_to_rgb8(uint8_t val) +{ + uint8_t temp = val & 0x1f; + return (temp << 3) | (temp >> 2); +} + +// Perform a lerp between a and b +inline uint8_t spg2xx_device::mix_channel(uint8_t bottom, uint8_t top) +{ + uint8_t alpha = (m_video_regs[0x2a] & 3) << 6; + return ((256 - alpha) * bottom + alpha * top) >> 8; +} + +void spg2xx_device::mix_pixel(uint32_t offset, uint16_t rgb) +{ + m_screenbuf[offset].r = mix_channel(m_screenbuf[offset].r, expand_rgb5_to_rgb8(rgb >> 10)); + m_screenbuf[offset].g = mix_channel(m_screenbuf[offset].g, expand_rgb5_to_rgb8(rgb >> 5)); + m_screenbuf[offset].b = mix_channel(m_screenbuf[offset].b, expand_rgb5_to_rgb8(rgb)); +} + +void spg2xx_device::set_pixel(uint32_t offset, uint16_t rgb) +{ + m_screenbuf[offset].r = expand_rgb5_to_rgb8(rgb >> 10); + m_screenbuf[offset].g = expand_rgb5_to_rgb8(rgb >> 5); + m_screenbuf[offset].b = expand_rgb5_to_rgb8(rgb); +} + +void spg2xx_device::blit(const rectangle &cliprect, uint32_t xoff, uint32_t yoff, uint32_t attr, uint32_t ctrl, uint32_t bitmap_addr, uint16_t tile) +{ + address_space &space = m_cpu->space(AS_PROGRAM); + + uint32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT); + uint32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT); + + uint32_t yflipmask = attr & TILE_Y_FLIP ? h - 1 : 0; + uint32_t xflipmask = attr & TILE_X_FLIP ? w - 1 : 0; + + uint32_t nc = ((attr & 0x0003) + 1) << 1; + + uint32_t palette_offset = (attr & 0x0f00) >> 4; + if (m_debug_blit && SPG_DEBUG_VIDEO) + { + printf("xy:%08x,%08x attr:%08x ctrl:%08x bitmap_addr:%08x tile:%04x\n", xoff, yoff, attr, ctrl, bitmap_addr, tile); + printf("hw:%d,%d f:%d,%d fm:%d,%d ncols:%d pobs:%02x ", w, h, (attr & TILE_X_FLIP) ? 1 : 0, (attr & TILE_Y_FLIP) ? 1 : 0, xflipmask, yflipmask, nc, palette_offset); + } + palette_offset >>= nc; + palette_offset <<= nc; + if (m_debug_blit && SPG_DEBUG_VIDEO) + { + printf("poas:%02x\n", palette_offset); + } + + uint32_t m = bitmap_addr + nc * w*h / 16 * tile; + uint32_t bits = 0; + uint32_t nbits = 0; + + for (uint32_t y = 0; y < h; y++) + { + int yy = (yoff + (y ^ yflipmask)) & 0x1ff; + if (yy >= 0x01c0) + yy -= 0x0200; + + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf("%3d:\n", yy); + + for (uint32_t x = 0; x < w; x++) + { + int xx = xoff + (x ^ xflipmask); + + bits <<= nc; + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf(" %08x:%d ", bits, nbits); + if (nbits < nc) + { + uint16_t b = space.read_word(m++ & 0x3fffff); + b = (b << 8) | (b >> 8); + bits |= b << (nc - nbits); + nbits += 16; + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf("(%04x:%08x:%d) ", b, bits, nbits); + } + nbits -= nc; + + uint32_t pal = palette_offset + (bits >> 16); + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf("%02x:%02x:%04x ", bits >> 16, pal, bits & 0xffff); + bits &= 0xffff; + + if ((ctrl & 0x0010) && yy < 240) + xx -= (int16_t)m_scrollram[yy + 15]; + + xx &= 0x01ff; + if (xx >= 0x01c0) + xx -= 0x0200; + + if (xx >= 0 && xx < 320 && yy >= 0 && yy < 240) + { + uint16_t rgb = m_paletteram[pal]; + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf("rgb:%04x ", rgb); + if (!(rgb & 0x8000)) + { + if (attr & 0x4000 || ctrl & 0x0100) + { + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf("M\n"); + mix_pixel(xx + 320 * yy, rgb); + } + else + { + if (m_debug_blit && SPG_DEBUG_VIDEO) + printf("S\n"); + set_pixel(xx + 320 * yy, rgb); + } + } + else if (m_debug_blit && SPG_DEBUG_VIDEO) + { + printf("X\n"); + } + } + } + } +} + +void spg2xx_device::blit_page(const rectangle &cliprect, int depth, uint32_t bitmap_addr, uint16_t *regs) +{ + uint32_t xscroll = regs[0]; + uint32_t yscroll = regs[1]; + uint32_t attr = regs[2]; + uint32_t ctrl = regs[3]; + uint32_t tilemap = regs[4]; + uint32_t palette_map = regs[5]; + address_space &space = m_cpu->space(AS_PROGRAM); + + if (!(ctrl & PAGE_ENABLE_MASK)) + { + return; + } + + if (((attr & PAGE_DEPTH_FLAG_MASK) >> PAGE_DEPTH_FLAG_SHIFT) != depth) + { + return; + } + + uint32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT); + uint32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT); + + uint32_t hn = 256 / h; + uint32_t wn = 512 / w; + + for (uint32_t y0 = 0; y0 < hn; y0++) + { + for (uint32_t x0 = 0; x0 < wn; x0++) + { + uint16_t tile = (ctrl & PAGE_BLANK_MASK) ? 0 : space.read_word(tilemap + x0 + wn * y0); + uint16_t palette = 0; + uint32_t xx, yy; + + if (!tile) + { + continue; + } + + palette = space.read_word(palette_map + (x0 + wn * y0) / 2); + if (x0 & 1) + { + palette >>= 8; + } + + uint32_t tileattr = attr; + uint32_t tilectrl = ctrl; + if ((ctrl & 2) == 0) + { // -(1) bld(1) flip(2) pal(4) + tileattr &= ~0x000c; + tileattr |= (palette >> 2) & 0x000c; // flip + + tileattr &= ~0x0f00; + tileattr |= (palette << 8) & 0x0f00; // palette + + tilectrl &= ~0x0100; + tilectrl |= (palette << 2) & 0x0100; // blend + } + + yy = ((h*y0 - yscroll + 0x10) & 0xff) - 0x10; + xx = (w*x0 - xscroll) & 0x1ff; + + blit(cliprect, xx, yy, tileattr, tilectrl, bitmap_addr, tile); + } + } +} + +void spg2xx_device::blit_sprite(const rectangle &cliprect, int depth, uint32_t base_addr) +{ + address_space &space = m_cpu->space(AS_PROGRAM); + uint32_t bitmap_addr = 0x40 * m_video_regs[0x22]; + + uint16_t tile = space.read_word(base_addr + 0); + int16_t x = space.read_word(base_addr + 1); + int16_t y = space.read_word(base_addr + 2); + uint16_t attr = space.read_word(base_addr + 3); + + if (!tile) + { + return; + } + + if (((attr & PAGE_DEPTH_FLAG_MASK) >> PAGE_DEPTH_FLAG_SHIFT) != depth) + { + return; + } + + if (!(m_video_regs[0x42] & SPRITE_COORD_TL_MASK)) + { + x = 160 + x; + y = 120 - y; + + uint32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT); + uint32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT); + + x -= (w / 2); + y -= (h / 2) - 8; + } + + x &= 0x01ff; + y &= 0x01ff; + +#if SPG_DEBUG_VIDEO + if (m_debug_sprites && machine().input().code_pressed(KEYCODE_MINUS)) + m_debug_blit = true; + blit(cliprect, x, y, attr, 0, bitmap_addr, tile); + m_debug_blit = false; +#else + blit(cliprect, x, y, attr, 0, bitmap_addr, tile); +#endif +} + +void spg2xx_device::blit_sprites(const rectangle &cliprect, int depth) +{ + if (!(m_video_regs[0x42] & SPRITE_ENABLE_MASK)) + { + return; + } + +#if SPG_DEBUG_VIDEO + if (!m_debug_sprites) + { +#endif + for (uint32_t n = 0; n < m_sprite_limit; n++) + { + blit_sprite(cliprect, depth, 0x2c00 + 4 * n); + } +#if SPG_DEBUG_VIDEO + } + else + { + blit_sprite(cliprect, depth, 0x2c00 + 4 * m_sprite_index_to_debug); + } +#endif +} + +void spg2xx_device::apply_saturation(const rectangle &cliprect) +{ + static const float s_u8_to_float = 1.0f / 255.0f; + static const float s_gray_r = 0.299f; + static const float s_gray_g = 0.587f; + static const float s_gray_b = 0.114f; + const float sat_adjust = (0xff - (m_video_regs[0x3c] & 0x00ff)) / (float)(0xff - 0x20); + for (int y = cliprect.min_y; y <= cliprect.max_y; y++) + { + rgbtriad_t *src = &m_screenbuf[cliprect.min_x + 320 * y]; + for (int x = cliprect.min_x; x <= cliprect.max_x; x++) + { + const float src_r = src->r * s_u8_to_float; + const float src_g = src->g * s_u8_to_float; + const float src_b = src->b * s_u8_to_float; + const float luma = src_r * s_gray_r + src_g * s_gray_g + src_b * s_gray_b; + const float adjusted_r = luma + (src_r - luma) * sat_adjust; + const float adjusted_g = luma + (src_g - luma) * sat_adjust; + const float adjusted_b = luma + (src_b - luma) * sat_adjust; + const int integer_r = (int)floor(adjusted_r * 255.0f); + const int integer_g = (int)floor(adjusted_g * 255.0f); + const int integer_b = (int)floor(adjusted_b * 255.0f); + src->r = integer_r > 255 ? 255 : (integer_r < 0 ? 0 : (uint8_t)integer_r); + src->g = integer_g > 255 ? 255 : (integer_g < 0 ? 0 : (uint8_t)integer_g); + src->b = integer_b > 255 ? 255 : (integer_b < 0 ? 0 : (uint8_t)integer_b); + src++; + } + } +} + +void spg2xx_device::apply_fade(const rectangle &cliprect) +{ + const uint16_t fade_offset = m_video_regs[0x30] << 1; + for (int y = cliprect.min_y; y <= cliprect.max_y; y++) + { + rgbtriad_t *src = &m_screenbuf[cliprect.min_x + 320 * y]; + for (int x = cliprect.min_x; x <= cliprect.max_x; x++) + { + const uint16_t r = (uint16_t)src->r - fade_offset; + const uint16_t g = (uint16_t)src->g - fade_offset; + const uint16_t b = (uint16_t)src->b - fade_offset; + src->r = (r > src->r ? 0 : r); + src->g = (g > src->g ? 0 : g); + src->b = (b > src->b ? 0 : b); + src++; + } + } +} + +#if SPG2XX_VISUAL_AUDIO_DEBUG +uint32_t spg2xx_device::debug_screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + bitmap.fill(0, cliprect); + for (int y = 0; y < 768; y++) + { + for (int x = 0; x < 1024; x++) + { + bitmap.pix32(y, x) = s_visual_debug_palette[m_audio_debug_buffer[y*1024+x]]; + } + } + return 0; +} + +void spg2xx_device::advance_debug_pos() +{ + m_audio_debug_x++; + if (m_audio_debug_x == 1024) + { + m_audio_debug_x = 0; + } +} +#endif + +uint32_t spg2xx_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + memset(&m_screenbuf[320 * cliprect.min_y], 0, 3 * 320 * ((cliprect.max_y - cliprect.min_y) + 1)); + + const uint32_t page1_addr = 0x40 * m_video_regs[0x20]; + const uint32_t page2_addr = 0x40 * m_video_regs[0x21]; + uint16_t *page1_regs = m_video_regs + 0x10; + uint16_t *page2_regs = m_video_regs + 0x16; + + for (int i = 0; i < 4; i++) + { + if (!m_hide_page0) + blit_page(cliprect, i, page1_addr, page1_regs); + if (!m_hide_page1) + blit_page(cliprect, i, page2_addr, page2_regs); + if (!m_hide_sprites) + blit_sprites(cliprect, i); + } + + if ((m_video_regs[0x3c] & 0x00ff) != 0x0020) + { + apply_saturation(cliprect); + } + + if (m_video_regs[0x30] != 0) + { + apply_fade(cliprect); + } + + bitmap.fill(0, cliprect); + for (int y = cliprect.min_y; y <= cliprect.max_y; y++) + { + uint32_t *dest = &bitmap.pix32(y, cliprect.min_x); + rgbtriad_t *src = &m_screenbuf[cliprect.min_x + 320 * y]; + for (int x = cliprect.min_x; x <= cliprect.max_x; x++) + { + *dest++ = (src->r << 16) | (src->g << 8) | src->b; + src++; + } + } + + return 0; +} + +void spg2xx_device::do_sprite_dma(uint32_t len) +{ + address_space &mem = m_cpu->space(AS_PROGRAM); + + uint32_t src = m_video_regs[0x70] & 0x3fff; + uint32_t dst = (m_video_regs[0x71] & 0x3ff) + 0x2c00; + + for (uint32_t j = 0; j < len; j++) + { + mem.write_word(dst + j, mem.read_word(src + j)); + } + + m_video_regs[0x72] = 0; + VIDEO_IRQ_STATUS |= 4; +} + +READ16_MEMBER(spg2xx_device::video_r) +{ + switch (offset) + { + case 0x38: // Current Line + LOGMASKED(LOG_VLINES, "video_r: Current Line: %04x\n", m_screen->vpos()); + return m_screen->vpos(); + + case 0x62: // Video IRQ Enable + LOGMASKED(LOG_IRQS, "video_r: Video IRQ Enable: %04x\n", VIDEO_IRQ_ENABLE); + return VIDEO_IRQ_ENABLE; + + case 0x63: // Video IRQ Status + LOGMASKED(LOG_IRQS, "video_r: Video IRQ Status: %04x\n", VIDEO_IRQ_STATUS); + return VIDEO_IRQ_STATUS; + + default: + LOGMASKED(LOG_UNKNOWN_PPU, "video_r: Unknown register %04x = %04x\n", 0x2800 + offset, m_video_regs[offset]); + break; + } + return m_video_regs[offset]; +} + +WRITE16_MEMBER(spg2xx_device::video_w) +{ + switch (offset) + { + case 0x10: // Page 1 X scroll + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 1 X Scroll = %04x\n", data & 0x01ff); + m_video_regs[offset] = data & 0x01ff; + break; + + case 0x11: // Page 1 Y scroll + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 1 Y Scroll = %04x\n", data & 0x00ff); + m_video_regs[offset] = data & 0x00ff; + break; + + case 0x12: // Page 1 Attributes + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 1 Attributes = %04x (Depth:%d, Palette:%d, VSize:%d, HSize:%d, FlipY:%d, FlipX:%d, BPP:%d)\n", data + , (data >> 12) & 3, (data >> 8) & 15, 8 << ((data >> 6) & 3), 8 << ((data >> 4) & 3), BIT(data, 3), BIT(data, 2), 2 * ((data & 3) + 1)); + m_video_regs[offset] = data; + break; + + case 0x13: // Page 1 Control + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 1 Control = %04x (Blend:%d, HiColor:%d, RowScroll:%d, Enable:%d, Wallpaper:%d, RegSet:%d, Bitmap:%d)\n", data + , BIT(data, 8), BIT(data, 7), BIT(data, 4), BIT(data, 3), BIT(data, 2), BIT(data, 1), BIT(data, 0)); + m_video_regs[offset] = data; + break; + + case 0x14: // Page 1 Tile Address + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 1 Tile Address = %04x\n", data & 0x1fff); + m_video_regs[offset] = data; + break; + + case 0x15: // Page 1 Attribute Address + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 1 Attribute Address = %04x\n", data & 0x1fff); + m_video_regs[offset] = data; + break; + + case 0x16: // Page 2 X scroll + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 2 X Scroll = %04x\n", data & 0x01ff); + m_video_regs[offset] = data & 0x01ff; + break; + + case 0x17: // Page 2 Y scroll + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 2 Y Scroll: %04x = %04x\n", 0x2800 | offset, data & 0x00ff); + m_video_regs[offset] = data & 0x00ff; + break; + + case 0x18: // Page 2 Attributes + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 2 Attributes = %04x (Depth:%d, Palette:%d, VSize:%d, HSize:%d, FlipY:%d, FlipX:%d, BPP:%d)\n", data + , (data >> 12) & 3, (data >> 8) & 15, 8 << ((data >> 6) & 3), 8 << ((data >> 4) & 3), BIT(data, 3), BIT(data, 2), 2 * ((data & 3) + 1)); + m_video_regs[offset] = data; + break; + + case 0x19: // Page 2 Control + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 2 Control = %04x (Blend:%d, HiColor:%d, RowScroll:%d, Enable:%d, Wallpaper:%d, RegSet:%d, Bitmap:%d)\n", data + , BIT(data, 8), BIT(data, 7), BIT(data, 4), BIT(data, 3), BIT(data, 2), BIT(data, 1), BIT(data, 0)); + m_video_regs[offset] = data; + break; + + case 0x1a: // Page 2 Tile Address + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 2 Tile Address = %04x\n", data & 0x1fff); + m_video_regs[offset] = data; + break; + + case 0x1b: // Page 2 Attribute Address + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 2 Attribute Address = %04x\n", data & 0x1fff); + m_video_regs[offset] = data; + break; + + case 0x20: // Page 1 Segment Address + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 1 Segment Address = %04x\n", data); + m_video_regs[offset] = data; + break; + + case 0x21: // Page 2 Segment Address + LOGMASKED(LOG_PPU_WRITES, "video_w: Page 2 Segment Address = %04x\n", data); + m_video_regs[offset] = data; + break; + + case 0x22: // Sprite Segment Address + LOGMASKED(LOG_PPU_WRITES, "video_w: Sprite Segment Address = %04x\n", data); + m_video_regs[offset] = data; + break; + + case 0x2a: // Blend Level Control + LOGMASKED(LOG_PPU_WRITES, "video_w: Blend Level Control = %04x\n", data & 0x0003); + m_video_regs[offset] = data & 0x0003; + break; + + case 0x30: // Fade Effect Control + LOGMASKED(LOG_PPU_WRITES, "video_w: Fade Effect Control = %04x\n", data & 0x00ff); + m_video_regs[offset] = data & 0x00ff; + break; + + case 0x36: // IRQ pos V + case 0x37: // IRQ pos H + m_video_regs[offset] = data & 0x01ff; + LOGMASKED(LOG_IRQS, "video_w: Video IRQ Position: %04x,%04x (%04x)\n", m_video_regs[0x37], m_video_regs[0x36], 0x2800 | offset); + if (m_video_regs[0x37] < 160 && m_video_regs[0x36] < 240) + m_screenpos_timer->adjust(m_screen->time_until_pos(m_video_regs[0x36], m_video_regs[0x37] << 1)); + else + m_screenpos_timer->adjust(attotime::never); + break; + + case 0x39: // Latch 1st Line Pen Pulse + LOGMASKED(LOG_PPU_WRITES, "video_w: Latch 1st Line Pen Pulse = %04x\n", data & 0x0001); + m_video_regs[offset] = data & 0x0001; + break; + + case 0x3c: // TV Control 1 + LOGMASKED(LOG_PPU_WRITES, "video_w: TV Control 1 = %04x (Hue:%02x, Saturation:%02x)\n", data, data >> 8, data & 0x00ff); + m_video_regs[offset] = data; + break; + + case 0x3d: // TV Control 2 + { + static const char* const s_lpf_mode[4] = { "LPF1", "LPF2", "All", "Edge" }; + LOGMASKED(LOG_PPU_WRITES, "video_w: TV Control 2 = %04x (LPFMode:%s, Enable:%d, Interlace:%d)\n", data & 0x000f + , s_lpf_mode[(data >> 2) & 3], BIT(data, 1), BIT(data, 0)); + m_video_regs[offset] = data & 0x000f; + break; + } + + case 0x3e: // Light Pen Y Position + LOGMASKED(LOG_PPU_WRITES, "video_w: Light Pen Y (read only) = %04x\n", data & 0x01ff); + break; + + case 0x3f: // Light Pen YXPosition + LOGMASKED(LOG_PPU_WRITES, "video_w: Light Pen X (read only) = %04x\n", data & 0x01ff); + break; + + case 0x42: // Sprite Control + LOGMASKED(LOG_PPU_WRITES, "video_w: Sprite Control = %04x (TopLeft:%d, Enable:%d)\n", data & 0x0003, BIT(data, 1), BIT(data, 0)); + m_video_regs[offset] = data & 0x0003; + break; + + case 0x62: // Video IRQ Enable + { + LOGMASKED(LOG_IRQS, "video_w: Video IRQ Enable = %04x (DMA:%d, Timing:%d, Blanking:%d)\n", data & 0x0007, BIT(data, 2), BIT(data, 1), BIT(data, 0)); + const uint16_t old = VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS; + VIDEO_IRQ_ENABLE = data & 0x0007; + const uint16_t changed = old ^ (VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS); + if (changed) + check_video_irq(); + break; + } + + case 0x63: // Video IRQ Acknowledge + { + LOGMASKED(LOG_IRQS, "video_w: Video IRQ Acknowledge = %04x\n", data); + const uint16_t old = VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS; + VIDEO_IRQ_STATUS &= ~data; + const uint16_t changed = old ^ (VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS); + if (changed) + check_video_irq(); + break; + } + + case 0x70: // Sprite DMA Source + LOGMASKED(LOG_DMA, "video_w: Sprite DMA Source = %04x\n", data & 0x3fff); + m_video_regs[offset] = data & 0x3fff; + break; + + case 0x71: // Sprite DMA Dest + LOGMASKED(LOG_DMA, "video_w: Sprite DMA Dest = %04x\n", data & 0x03ff); + m_video_regs[offset] = data & 0x03ff; + break; + + case 0x72: // Sprite DMA Length + LOGMASKED(LOG_DMA, "video_w: Sprite DMA Length = %04x\n", data & 0x03ff); + do_sprite_dma(data & 0x3ff); + break; + + default: + LOGMASKED(LOG_UNKNOWN_PPU, "video_w: Unknown register %04x = %04x\n", 0x2800 + offset, data); + m_video_regs[offset] = data; + break; + } +} + +WRITE_LINE_MEMBER(spg2xx_device::vblank) +{ + if (!state) + return; + +#if SPG_DEBUG_VIDEO + if (machine().input().code_pressed_once(KEYCODE_5)) + m_hide_page0 = !m_hide_page0; + if (machine().input().code_pressed_once(KEYCODE_6)) + m_hide_page1 = !m_hide_page1; + if (machine().input().code_pressed_once(KEYCODE_7)) + m_hide_sprites = !m_hide_sprites; + if (machine().input().code_pressed_once(KEYCODE_8)) + m_debug_sprites = !m_debug_sprites; + if (machine().input().code_pressed_once(KEYCODE_9)) + m_sprite_index_to_debug--; + if (machine().input().code_pressed_once(KEYCODE_0)) + m_sprite_index_to_debug++; +#endif + +#if SPG_DEBUG_AUDIO + if (machine().input().code_pressed_once(KEYCODE_3)) + m_debug_samples = !m_debug_samples; + if (machine().input().code_pressed_once(KEYCODE_4)) + m_debug_rates = !m_debug_rates; + if (machine().input().code_pressed_once(KEYCODE_1)) + { + m_channel_debug--; + if (m_channel_debug < -1) + m_channel_debug = 15; + } + if (machine().input().code_pressed_once(KEYCODE_2)) + { + m_channel_debug++; + if (m_channel_debug == 16) + m_channel_debug = -1; + } +#endif + + const uint16_t old = VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS; + VIDEO_IRQ_STATUS |= 1; + LOGMASKED(LOG_IRQS, "Setting video IRQ status to %04x\n", VIDEO_IRQ_STATUS); + const uint16_t changed = old ^ (VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS); + if (changed) + check_video_irq(); +} + +void spg2xx_device::check_video_irq() +{ + m_cpu->set_input_line(UNSP_IRQ0_LINE, (VIDEO_IRQ_STATUS & VIDEO_IRQ_ENABLE) ? ASSERT_LINE : CLEAR_LINE); +} + + +/************************* +* Machine Hardware * +*************************/ + +void spg2xx_device::uart_rx(uint8_t data) +{ + if (m_uart_rx_index < 8) + { + m_uart_rx_fifo[m_uart_rx_index] = data; + m_uart_rx_index++; + m_io_regs[0x31] |= 1; + if (m_uart_rx_index > (m_io_regs[0x37] & 7)) + { + const uint16_t old = IO_IRQ_STATUS; + IO_IRQ_STATUS |= 0x0100; + const uint16_t changed = old ^ IO_IRQ_STATUS; + if (changed & IO_IRQ_ENABLE) + check_irqs(0x0100); + } + } + else + { + m_io_regs[0x37] |= 0x4000; + } +} + +READ16_MEMBER(spg2xx_device::io_r) +{ + static const char *const gpioregs[] = { "GPIO Data Port", "GPIO Buffer Port", "GPIO Direction Port", "GPIO Attribute Port", "GPIO IRQ/Latch Port" }; + static const char gpioports[] = { 'A', 'B', 'C' }; + + uint16_t val = m_io_regs[offset]; + + switch (offset) + { + case 0x01: case 0x06: case 0x0b: // GPIO Data Port A/B/C + do_gpio(offset); + LOGMASKED(LOG_GPIO, "io_r: %s %c = %04x\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], m_io_regs[offset]); + val = m_io_regs[offset]; + break; + + case 0x02: case 0x03: case 0x04: case 0x05: + case 0x07: case 0x08: case 0x09: case 0x0a: + case 0x0c: case 0x0d: case 0x0e: case 0x0f: // Other GPIO regs + LOGMASKED(LOG_GPIO, "io_r: %s %c = %04x\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], m_io_regs[offset]); + break; + + case 0x10: // Timebase Control + LOGMASKED(LOG_IO_READS, "io_r: Timebase Control = %04x\n", val); + break; + + case 0x1c: // Video line counter + val = m_screen->vpos(); + LOGMASKED(LOG_VLINES, "io_r: Video Line = %04x\n", val); + break; + + case 0x20: // System Control + LOGMASKED(LOG_IO_READS, "io_r: System Control = %04x\n", val); + break; + + case 0x21: // IRQ Control + LOGMASKED(LOG_IRQS, "io_r: I/O IRQ Control = %04x\n", val); + break; + + case 0x22: // IRQ Status + LOGMASKED(LOG_IRQS, "io_r: I/O IRQ Status = %04x\n", val); + break; + + case 0x23: // External Memory Control + LOGMASKED(LOG_IO_READS, "io_r: Ext. Memory Control = %04x\n", val); + break; + + case 0x25: // ADC Control + LOGMASKED(LOG_IO_READS, "io_r: ADC Control = %04x\n", val); + break; + + case 0x27: // ADC Data + m_io_regs[0x27] = 0; + LOGMASKED(LOG_IO_READS, "io_r: ADC Data = %04x\n", val); + break; + + case 0x29: // Wakeup Source + LOGMASKED(LOG_IO_READS, "io_r: Wakeup Source = %04x\n", val); + break; + + case 0x2b: + LOGMASKED(LOG_IO_READS, "io_r: NTSC/PAL = %04x\n", m_pal_flag); + return m_pal_flag; + + case 0x2c: case 0x2d: // PRNG 0/1 + val = machine().rand() & 0x0000ffff; + LOGMASKED(LOG_IO_READS, "io_r: PRNG %d = %04x\n", offset - 0x2c, val); + break; + + case 0x2e: // FIQ Source Select + LOGMASKED(LOG_IRQS, "io_r: FIQ Source Select = %04x\n", val); + break; + + case 0x2f: // Data Segment + val = m_cpu->state_int(UNSP_SR) >> 10; + LOGMASKED(LOG_SEGMENT, "io_r: Data Segment = %04x\n", val); + break; + + case 0x31: // UART Status + val = 0x0002 | (m_uart_rx_index ? 1 : 0) | (m_uart_rx_index == 8 ? 0x80 : 0); + LOGMASKED(LOG_UART, "io_r: UART Status = %04x\n", val); + break; + + case 0x36: // UART RX Data + if (m_uart_rx_index) + { + val = m_uart_rx_fifo[0]; + m_uart_rx_fifo[0] = 0; + m_uart_rx_index--; + for (uint8_t i = 0; i < m_uart_rx_index; i++) + { + m_uart_rx_fifo[i] = m_uart_rx_fifo[i + 1]; + } + } + else + { + m_io_regs[0x37] |= 0x2000; + val = 0; + } + LOGMASKED(LOG_UART, "io_r: UART Rx Data = %04x\n", val); + break; + + case 0x37: // UART Rx FIFO Control + val &= ~0x0070; + val |= (m_uart_rx_index > 7 ? 7 : m_uart_rx_index) << 4; + LOGMASKED(LOG_UART, "io_r: UART Rx FIFO Control = %04x\n", val); + break; + + case 0x59: // I2C Status + LOGMASKED(LOG_I2C, "io_r: I2C Status = %04x\n", val); + break; + + case 0x5e: // I2C Data In + LOGMASKED(LOG_I2C, "io_r: I2C Data In = %04x\n", val); + break; + + case 0x100: // DMA Source (L) + LOGMASKED(LOG_DMA, "io_r: DMA Source (lo) = %04x\n", val); + break; + + case 0x101: // DMA Source (H) + LOGMASKED(LOG_DMA, "io_r: DMA Source (hi) = %04x\n", val); + break; + + case 0x102: // DMA Length + LOGMASKED(LOG_DMA, "io_r: DMA Length = %04x\n", 0); + val = 0; + break; + + case 0x103: // DMA Destination + LOGMASKED(LOG_DMA, "io_r: DMA Dest = %04x\n", val); + break; + + default: + LOGMASKED(LOG_UNKNOWN_IO, "io_r: Unknown register %04x\n", 0x3d00 + offset); + break; + } + + return val; +} + +void spg2xx_device::update_porta_special_modes() +{ + static const char* const s_pa_special[4][16] = + { + // Input, Special 0 + // Input, Special 1 + // Output, Special 0 + // Output, Special 1 + + { "LP", "ExtClk2", "ExtClk1", "-", "SDA", "SlvRDY", "-", "-", "SPICLK", "-", "RxD", "SPISSB", "-", "-", "-", "-" }, + { "-", "-", "-", "SCK", "-", "SWS", "-", "-", "-", "-", "-", "-", "IRQ2B", "-", "-", "IRQ1B" }, + { "-", "-", "-", "SCK", "SDA", "SWS", "-", "-", "SPICLK", "TxD", "-", "SPISSB", "TAPWM", "TM1", "TBPWM", "TM2" }, + { "CSB3", "CSB2", "CSB1", "SCK", "SDA", "VSYNC", "HSYNC", "SYSCLK3", "SPICLK", "TxD", "SWS", "SPISSB", "-", "VSYNC", "HSYNC", "CSYNC" }, + }; + for (int bit = 15; bit >= 0; bit--) + { + if (!BIT(m_io_regs[0x05], bit)) + continue; + uint8_t type = (BIT(m_io_regs[0x03], bit) << 1) | BIT(m_io_regs[0x00], 0); + LOGMASKED(LOG_GPIO, " Bit %2d: %s\n", bit, s_pa_special[type][bit]); + } +} + +void spg2xx_device::update_portb_special_modes() +{ + static const char* const s_pb_special[4][8] = + { + // Input, Special 0 + // Input, Special 1 + // Output, Special 0 + // Output, Special 1 + + { "-", "-", "-", "-", "-", "-", "SDA", "SlvRDY" }, + { "-", "-", "-", "-", "-", "-", "SDA", "SlvRDY" }, + { "VSYNC", "HSYNC", "CSYNC", "-", "-", "SCK", "SDA", "SWS" }, + { "CSB3", "CSB2", "CSB1", "TBPWM", "TM2", "-", "-", "SYSCLK2" }, + }; + for (int bit = 7; bit >= 0; bit--) + { + if (!BIT(m_io_regs[0x0a], bit)) + continue; + uint8_t type = (BIT(m_io_regs[0x08], bit) << 1) | BIT(m_io_regs[0x00], 1); + LOGMASKED(LOG_GPIO, " Bit %2d: %s\n", bit, s_pb_special[type][bit]); + } +} + +WRITE16_MEMBER(spg2xx_device::io_w) +{ + static const char *const gpioregs[] = { "GPIO Data Port", "GPIO Buffer Port", "GPIO Direction Port", "GPIO Attribute Port", "GPIO IRQ/Latch Port" }; + static const char gpioports[3] = { 'A', 'B', 'C' }; + + switch (offset) + { + case 0x00: // GPIO special function select + { + LOGMASKED(LOG_GPIO, "io_w: GPIO Configuration = %04x (IOBWake:%d, IOAWake:%d, IOBSpecSel:%d, IOASpecSel:%d)\n", data + , BIT(data, 4), BIT(data, 3), BIT(data, 1), BIT(data, 0)); + const uint16_t old = m_io_regs[offset]; + m_io_regs[offset] = data; + const uint16_t changed = old ^ data; + if (BIT(changed, 0)) + update_porta_special_modes(); + if (BIT(changed, 1)) + update_portb_special_modes(); + break; + } + + case 0x01: case 0x06: case 0x0b: // GPIO data, port A/B/C + offset++; + // Intentional fallthrough - we redirect data register writes to the buffer register. + + case 0x02: case 0x04: // Port A + case 0x07: case 0x09: // Port B + case 0x0c: case 0x0d: case 0x0e: case 0x0f: // Port C + LOGMASKED(LOG_GPIO, "io_w: %s %c = %04x\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], data); + m_io_regs[offset] = data; + do_gpio(offset); + break; + + case 0x03: // Port A Direction + LOGMASKED(LOG_GPIO, "io_w: GPIO Direction Port A = %04x\n", data); + m_io_regs[offset] = data; + update_porta_special_modes(); + do_gpio(offset); + break; + + case 0x08: // Port B Direction + LOGMASKED(LOG_GPIO, "io_w: GPIO Direction Port B = %04x\n", data); + m_io_regs[offset] = data; + update_portb_special_modes(); + do_gpio(offset); + break; + + case 0x05: // Port A Special + LOGMASKED(LOG_GPIO, "io_w: Port A Special Function Select: %04x\n", data); + m_io_regs[offset] = data; + update_porta_special_modes(); + break; + + case 0x0a: // Port B Special + LOGMASKED(LOG_GPIO, "io_w: Port B Special Function Select: %04x\n", data); + m_io_regs[offset] = data; + update_portb_special_modes(); + break; + + case 0x10: // Timebase Control + { + static const char* const s_tmb1_sel[2][4] = + { + { "8Hz", "16Hz", "32Hz", "64Hz" }, + { "12kHz", "24kHz", "40kHz", "40kHz" } + }; + static const char* const s_tmb2_sel[2][4] = + { + { "128Hz", "256Hz", "512Hz", "1024Hz" }, + { "105kHz", "210kHz", "420kHz", "840kHz" } + }; + static const uint32_t s_tmb1_freq[2][4] = + { + { 8, 16, 32, 64 }, + { 12000, 24000, 40000, 40000 } + }; + static const uint32_t s_tmb2_freq[2][4] = + { + { 128, 256, 512, 1024 }, + { 105000, 210000, 420000, 840000 } + }; + LOGMASKED(LOG_IO_WRITES, "io_w: Timebase Control = %04x (Source:%s, TMB2:%s, TMB1:%s)\n", data, + BIT(data, 4) ? "27MHz" : "32768Hz", s_tmb2_sel[BIT(data, 4)][(data >> 2) & 3], s_tmb1_sel[BIT(data, 4)][data & 3]); + const uint16_t old = m_io_regs[offset]; + m_io_regs[offset] = data; + const uint16_t changed = old ^ m_io_regs[offset]; + if (changed & 0x001f) + { + const uint8_t hifreq = BIT(data, 4); + if (changed & 0x0013) + { + const uint32_t freq = s_tmb1_freq[hifreq][data & 3]; + m_tmb1->adjust(attotime::from_hz(freq), 0, attotime::from_hz(freq)); + } + if (changed & 0x001c) + { + const uint32_t freq = s_tmb2_freq[hifreq][(data >> 2) & 3]; + m_tmb2->adjust(attotime::from_hz(freq), 0, attotime::from_hz(freq)); + } + } + break; + } + + case 0x11: // Timebase Clear + LOGMASKED(LOG_IO_WRITES, "io_w: Timebase Clear = %04x\n", data); + break; + + case 0x20: // System Control + { + static const char* const s_sysclk[4] = { "13.5MHz", "27MHz", "27MHz NoICE", "54MHz" }; + static const char* const s_lvd_voltage[4] = { "2.7V", "2.9V", "3.1V", "3.3V" }; + static const char* const s_weak_strong[2] = { "Weak", "Strong" }; + LOGMASKED(LOG_IO_WRITES, "io_w: System Control = %04x (Watchdog:%d, Sleep:%d, SysClk:%s, SysClkInv:%d, LVROutEn:%d, LVREn:%d\n" + , data, BIT(data, 15), BIT(data, 14), s_sysclk[(data >> 12) & 3], BIT(data, 11), BIT(data, 9), BIT(data, 8)); + LOGMASKED(LOG_IO_WRITES, " LVDEn:%d, LVDVoltSel:%s, 32kHzDisable:%d, StrWkMode:%s, VDACDisable:%d, ADACDisable:%d, ADACOutDisable:%d)\n" + , BIT(data, 7), s_lvd_voltage[(data >> 5) & 3], BIT(data, 4), s_weak_strong[BIT(data, 3)], BIT(data, 2), BIT(data, 1), BIT(data, 0)); + m_io_regs[offset] = data; + break; + } + + case 0x21: // IRQ Enable + { + LOGMASKED(LOG_IRQS, "io_w: IRQ Enable = %04x\n", data); + const uint16_t old = IO_IRQ_ENABLE & IO_IRQ_STATUS; + m_io_regs[offset] = data; + const uint16_t changed = old ^ (IO_IRQ_ENABLE & IO_IRQ_STATUS); + if (changed) + check_irqs(changed); + break; + } + + case 0x22: // IRQ Acknowledge + { + LOGMASKED(LOG_IRQS, "io_w: IRQ Acknowledge = %04x\n", data); + const uint16_t old = IO_IRQ_STATUS; + IO_IRQ_STATUS &= ~data; + const uint16_t changed = old ^ (IO_IRQ_ENABLE & IO_IRQ_STATUS); + if (changed) + check_irqs(changed); + break; + } + + case 0x23: // External Memory Control + { + static const char* const s_bus_arb[8] = + { + "Forbidden", "Forbidden", "Forbidden", "Forbidden", "Forbidden", "1:SPU/2:PPU/3:CPU", "Forbidden", "1:PPU/2:SPU/3:CPU" + }; + static const char* const s_addr_decode[4] = + { + "ROMCSB: 4000-3fffff, CSB1: ---, CSB2: ---, CSB3: ---", + "ROMCSB: 4000-1fffff, CSB1: 200000-3fffff, CSB2: ---, CSB3: ---", + "ROMCSB: 4000-0fffff, CSB1: 100000-1fffff, CSB2: 200000-2fffff, CSB3: 300000-3fffff", + "ROMCSB: 4000-0fffff, CSB1: 100000-1fffff, CSB2: 200000-2fffff, CSB3: 300000-3fffff" + }; + static const char* const s_ram_decode[16] = + { + "None", "None", "None", "None", "None", "None", "None", "None", + "4KW, 3ff000-3fffff\n", + "8KW, 3fe000-3fffff\n", + "16KW, 3fc000-3fffff\n", + "32KW, 3f8000-3fffff\n", + "64KW, 3f0000-3fffff\n", + "128KW, 3e0000-3fffff\n", + "256KW, 3c0000-3fffff\n", + "512KW, 380000-3fffff\n" + }; + LOGMASKED(LOG_IO_WRITES, "io_w: Ext. Memory Control (not yet implemented) = %04x:\n", data); + LOGMASKED(LOG_IO_WRITES, " WaitStates:%d, BusArbPrio:%s\n", (data >> 1) & 3, s_bus_arb[(data >> 3) & 7]); + LOGMASKED(LOG_IO_WRITES, " ROMAddrDecode:%s\n", s_addr_decode[(data >> 6) & 3]); + LOGMASKED(LOG_IO_WRITES, " RAMAddrDecode:%s\n", s_ram_decode[(data >> 8) & 15]); + m_chip_sel((data >> 6) & 3); + m_io_regs[offset] = data; + break; + } + + case 0x24: // Watchdog + LOGMASKED(LOG_WATCHDOG, "io_w: Watchdog Pet = %04x\n", data); + break; + + case 0x25: // ADC Control + { + LOGMASKED(LOG_IO_WRITES, "io_w: ADC Control = %04x\n", data); + const uint16_t changed = m_io_regs[offset] ^ data; + m_io_regs[offset] = data; + if (BIT(changed, 12) && BIT(data, 12) && !BIT(m_io_regs[offset], 1)) + { + m_io_regs[0x27] = 0x80ff; + const uint16_t old = IO_IRQ_STATUS; + IO_IRQ_STATUS |= 0x2000; + const uint16_t changed = IO_IRQ_STATUS ^ old; + if (changed) + check_irqs(changed); + } + break; + } + + case 0x28: // Sleep Mode + LOGMASKED(LOG_IO_WRITES, "io_w: Sleep Mode (%s enter value) = %04x\n", data == 0xaa55 ? "valid" : "invalid", data); + m_io_regs[offset] = data; + break; + + case 0x29: // Wakeup Source + { + m_io_regs[offset] = data; + static const char* const s_sources[8] = + { + "TMB1", "TMB2", "2Hz", "4Hz", "1024Hz", "2048Hz", "4096Hz", "Key" + }; + + LOGMASKED(LOG_IO_WRITES, "io_w: Wakeup Source = %04x:\n", data); + bool comma = false; + char buf[1024]; + int char_idx = 0; + for (int i = 7; i >= 0; i--) + { + if (BIT(data, i)) + { + char_idx += sprintf(&buf[char_idx], "%s%s", comma ? ", " : "", s_sources[i]); + comma = true; + } + } + buf[char_idx] = 0; + LOGMASKED(LOG_IO_WRITES, " %s\n", buf); + break; + } + + case 0x2e: // FIQ Source Select + { + static const char* const s_fiq_select[8] = + { + "PPU", "SPU Channel", "Timer A", "Timer B", "UART/SPI", "External", "Reserved", "None" + }; + LOGMASKED(LOG_IRQS, "io_w: FIQ Source Select (not yet implemented) = %04x, %s\n", data, s_fiq_select[data & 7]); + m_io_regs[offset] = data; + break; + } + + case 0x2f: // Data Segment + { + uint16_t ds = m_cpu->state_int(UNSP_SR); + m_cpu->set_state_int(UNSP_SR, (ds & 0x03ff) | ((data & 0x3f) << 10)); + LOGMASKED(LOG_SEGMENT, "io_w: Data Segment = %04x\n", data); + break; + } + + case 0x30: // UART Control + { + static const char* const s_9th_bit[4] = { "0", "1", "Odd", "Even" }; + LOGMASKED(LOG_UART, "io_w: UART Control = %04x (TxEn:%d, RxEn:%d, Bits:%d, MultiProc:%d, 9thBit:%s, TxIntEn:%d, RxIntEn:%d\n", data + , BIT(data, 7), BIT(data, 6), BIT(data, 5) ? 9 : 8, BIT(data, 4), s_9th_bit[(data >> 2) & 3], BIT(data, 1), BIT(data, 0)); + const uint16_t changed = m_io_regs[offset] ^ data; + m_io_regs[offset] = data; + if (!BIT(data, 6)) + { + m_uart_rx_index = 0; + memset(m_uart_rx_fifo, 0, 8); + } + if (BIT(changed, 7) && BIT(data, 7)) + { + m_io_regs[0x31] |= 0x0002; + } + break; + } + + case 0x31: // UART Status + LOGMASKED(LOG_UART, "io_w: UART Status = %04x\n", data); + //m_io_regs[offset] &= ~data; + break; + + case 0x33: // UART Baud Rate + LOGMASKED(LOG_UART, "io_w: UART Baud Rate = %d\n", 27000000 / (0x10000 - data)); + m_io_regs[offset] = data; + break; + + case 0x35: // UART TX Data + LOGMASKED(LOG_UART, "io_w: UART Tx Data = %02x\n", data & 0x00ff); + m_io_regs[offset] = data; + m_uart_tx((uint8_t)data); + break; + + case 0x36: // UART RX Data + LOGMASKED(LOG_UART, "io_w: UART Rx Data (read-only) = %04x\n", data); + break; + + case 0x37: // UART Rx FIFO Control + LOGMASKED(LOG_UART, "io_w: UART Rx FIFO Control = %04x (Reset:%d, Overrun:%d, Underrun:%d, Count:%d, Threshold:%d)\n", data + , BIT(data, 15), BIT(data, 14), BIT(data, 13), (data >> 4) & 7, data & 7); + if (data & 0x8000) + { + m_uart_rx_index = 0; + memset(m_uart_rx_fifo, 0, 8); + } + m_io_regs[offset] &= ~data & 0x6000; + m_io_regs[offset] &= ~0x0007; + m_io_regs[offset] |= data & 0x0007; + break; + + case 0x58: // I2C Command + LOGMASKED(LOG_I2C, "io_w: I2C Command = %04x\n", data); + m_io_regs[offset] = data; + do_i2c(); + break; + + case 0x59: // I2C Status / Acknowledge + LOGMASKED(LOG_I2C, "io_w: I2C Acknowledge = %04x\n", data); + m_io_regs[offset] &= ~data; + break; + + case 0x5a: // I2C Access Mode + LOGMASKED(LOG_I2C, "io_w: I2C Access Mode = %04x\n", data); + m_io_regs[offset] = data; + break; + + case 0x5b: // I2C Device Address + LOGMASKED(LOG_I2C, "io_w: I2C Device Address = %04x\n", data); + m_io_regs[offset] = data; + break; + + case 0x5c: // I2C Sub-Address + LOGMASKED(LOG_I2C, "io_w: I2C Sub-Address = %04x\n", data); + m_io_regs[offset] = data; + break; + + case 0x5d: // I2C Data Out + LOGMASKED(LOG_I2C, "io_w: I2C Data Out = %04x\n", data); + m_io_regs[offset] = data; + break; + + case 0x5e: // I2C Data In + LOGMASKED(LOG_I2C, "io_w: I2C Data In = %04x\n", data); + m_io_regs[offset] = data; + break; + + case 0x5f: // I2C Controller Mode + LOGMASKED(LOG_I2C, "io_w: I2C Controller Mode = %04x\n", data); + m_io_regs[offset] = data; + break; + + case 0x100: // DMA Source (lo) + LOGMASKED(LOG_DMA, "io_w: DMA Source (lo) = %04x\n", data); + m_io_regs[offset] = data; + break; + + case 0x101: // DMA Source (hi) + LOGMASKED(LOG_DMA, "io_w: DMA Source (hi) = %04x\n", data); + m_io_regs[offset] = data; + break; + + case 0x103: // DMA Destination + LOGMASKED(LOG_DMA, "io_w: DMA Dest = %04x\n", data); + m_io_regs[offset] = data; + break; + + case 0x102: // DMA Length + LOGMASKED(LOG_DMA, "io_w: DMA Length = %04x\n", data); + do_cpu_dma(data); + break; + + default: + LOGMASKED(LOG_UNKNOWN_IO, "io_w: Unknown register %04x = %04x\n", 0x3d00 + offset, data); + m_io_regs[offset] = data; + break; + } +} + +void spg2xx_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + switch (id) + { + case TIMER_TMB1: + { + LOGMASKED(LOG_TIMERS, "TMB1 elapsed, setting IRQ Status bit 0 (old:%04x, new:%04x, enable:%04x)\n", IO_IRQ_STATUS, IO_IRQ_STATUS | 1, IO_IRQ_ENABLE); + IO_IRQ_STATUS |= 1; + check_irqs(0x0001); + break; + } + + case TIMER_TMB2: + { + LOGMASKED(LOG_TIMERS, "TMB2 elapsed, setting IRQ Status bit 1 (old:%04x, new:%04x, enable:%04x)\n", IO_IRQ_STATUS, IO_IRQ_STATUS | 2, IO_IRQ_ENABLE); + IO_IRQ_STATUS |= 2; + check_irqs(0x0002); + break; + } + + case TIMER_SCREENPOS: + { + const uint16_t old = VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS; + VIDEO_IRQ_STATUS |= 2; + const uint16_t changed = old ^ (VIDEO_IRQ_ENABLE & VIDEO_IRQ_STATUS); + if (changed) + { + check_video_irq(); + } + m_screen->update_partial(m_screen->vpos()); + break; + } + + case TIMER_BEAT: + { + audio_frame_tick(); + break; + } + } +} + +void spg2xx_device::check_irqs(const uint16_t changed) +{ + // { + // m_cpu->set_input_line(UNSP_IRQ1_LINE, ASSERT_LINE); + // } + + if (changed & 0x0c00) // Timer A, Timer B IRQ + { + m_cpu->set_input_line(UNSP_IRQ2_LINE, (IO_IRQ_ENABLE & IO_IRQ_STATUS & 0x0c00) ? ASSERT_LINE : CLEAR_LINE); + } + + if (changed & 0x2100) // UART, ADC IRQ + { + m_cpu->set_input_line(UNSP_IRQ3_LINE, (IO_IRQ_ENABLE & IO_IRQ_STATUS & 0x2100) ? ASSERT_LINE : CLEAR_LINE); + } + + if (changed & (AUDIO_BIS_MASK | AUDIO_BIE_MASK)) // Beat IRQ + { + if ((m_audio_regs[AUDIO_BEAT_COUNT] & (AUDIO_BIS_MASK | AUDIO_BIE_MASK)) == (AUDIO_BIS_MASK | AUDIO_BIE_MASK)) + { + LOGMASKED(LOG_BEAT, "Asserting beat IRQ\n"); + m_cpu->set_input_line(UNSP_IRQ4_LINE, ASSERT_LINE); + } + else + { + LOGMASKED(LOG_BEAT, "Clearing beat IRQ\n"); + m_cpu->set_input_line(UNSP_IRQ4_LINE, CLEAR_LINE); + } + } + + if (changed & 0x1200) // External IRQ + { + m_cpu->set_input_line(UNSP_IRQ5_LINE, (IO_IRQ_ENABLE & IO_IRQ_STATUS & 0x1200) ? ASSERT_LINE : CLEAR_LINE); + } + + if (changed & 0x0070) // 1024Hz, 2048Hz, 4096Hz IRQ + { + m_cpu->set_input_line(UNSP_IRQ6_LINE, (IO_IRQ_ENABLE & IO_IRQ_STATUS & 0x0070) ? ASSERT_LINE : CLEAR_LINE); + } + + if (changed & 0x008b) // TMB1, TMB2, 4Hz, key change IRQ + { + LOGMASKED(LOG_IRQS, "%ssserting timer IRQ (%04x)\n", (IO_IRQ_ENABLE & IO_IRQ_STATUS & 0x008b) ? "A" : "Dea", (IO_IRQ_ENABLE & IO_IRQ_STATUS & 0x008b)); + m_cpu->set_input_line(UNSP_IRQ7_LINE, (IO_IRQ_ENABLE & IO_IRQ_STATUS & 0x008b) ? ASSERT_LINE : CLEAR_LINE); + } +} + +void spg2xx_device::do_gpio(uint32_t offset) +{ + uint32_t index = (offset - 1) / 5; + uint16_t buffer = m_io_regs[5 * index + 2]; + uint16_t dir = m_io_regs[5 * index + 3]; + uint16_t attr = m_io_regs[5 * index + 4]; + uint16_t special = m_io_regs[5 * index + 5]; + + uint16_t push = dir; + uint16_t pull = (~dir) & (~attr); + uint16_t what = (buffer & (push | pull)); + what ^= (dir & ~attr); + what &= ~special; + + switch (index) + { + case 0: + m_porta_out(0, what, push &~ special); + what = (what & ~pull) | (m_porta_in(0, pull &~ special) & pull); + break; + case 1: + m_portb_out(0, what, push &~ special); + what = (what & ~pull) | (m_portb_in(0, pull &~ special) & pull); + break; + case 2: + m_portc_out(0, what, push &~ special); + what = (what & ~pull) | (m_portc_in(0, pull &~ special) & pull); + break; + } + + m_io_regs[5 * index + 1] = what; +} + +void spg2xx_device::do_i2c() +{ + const uint16_t addr = ((m_io_regs[0x5b] & 0x06) << 7) | (uint8_t)m_io_regs[0x5c]; + + if (m_io_regs[0x58] & 0x40) // Serial EEPROM read + m_io_regs[0x5e] = m_eeprom_r(addr); + else + m_eeprom_w(addr, m_io_regs[0x5d]); + + m_io_regs[0x59] |= 1; +} + +void spg2xx_device::do_cpu_dma(uint32_t len) +{ + address_space &mem = m_cpu->space(AS_PROGRAM); + + uint32_t src = ((m_io_regs[0x101] & 0x3f) << 16) | m_io_regs[0x100]; + uint32_t dst = m_io_regs[0x103] & 0x3fff; + + for (uint32_t j = 0; j < len; j++) + { + mem.write_word((dst + j) & 0x3fff, mem.read_word(src + j)); + } + + src += len; + m_io_regs[0x100] = (uint16_t)src; + m_io_regs[0x101] = (src >> 16) & 0x3f; + m_io_regs[0x102] = 0; + m_io_regs[0x103] = (dst + len) & 0x3fff; +} + +/*********************** +* Audio Hardware * +***********************/ + +READ16_MEMBER(spg2xx_device::audio_r) +{ + const uint16_t channel = (offset & 0x00f0) >> 4; + uint16_t data = m_audio_regs[offset]; + + if (offset >= 0x400) + { + switch (offset) + { + case AUDIO_CHANNEL_ENABLE: + LOGMASKED(LOG_SPU_READS, "audio_r: Channel Enable: %04x\n", data); + break; + + case AUDIO_MAIN_VOLUME: + LOGMASKED(LOG_SPU_READS, "audio_r: Main Volume: %04x\n", data); + break; + + case AUDIO_CHANNEL_FIQ_ENABLE: + LOGMASKED(LOG_SPU_READS | LOG_IRQS, "audio_r: Channel FIQ Enable: %04x\n", data); + break; + + case AUDIO_CHANNEL_FIQ_STATUS: + LOGMASKED(LOG_SPU_READS | LOG_IRQS, "audio_r: Channel FIQ Acknowledge: %04x\n", data); + break; + + case AUDIO_BEAT_BASE_COUNT: + LOGMASKED(LOG_SPU_READS | LOG_BEAT, "audio_r: Beat Base Count: %04x\n", data); + break; + + case AUDIO_BEAT_COUNT: + LOGMASKED(LOG_SPU_READS | LOG_BEAT, "audio_r: Beat Count: %04x\n", data); + break; + + case AUDIO_ENVCLK0: + case AUDIO_ENVCLK1: + LOGMASKED(LOG_SPU_READS | LOG_ENVELOPES, "audio_r: Envelope Interval %d (lo): %04x\n", offset == AUDIO_ENVCLK0 ? 0 : 1, data); + break; + + case AUDIO_ENVCLK0_HIGH: + case AUDIO_ENVCLK1_HIGH: + LOGMASKED(LOG_SPU_READS | LOG_ENVELOPES, "audio_r: Envelope Interval %d (hi): %04x\n", offset == AUDIO_ENVCLK0_HIGH ? 0 : 1, data); + break; + + case AUDIO_ENV_RAMP_DOWN: + LOGMASKED(LOG_SPU_READS | LOG_RAMPDOWN, "audio_r: Envelope Fast Ramp Down: %04x\n", data); + break; + + case AUDIO_CHANNEL_STOP: + LOGMASKED(LOG_SPU_READS, "audio_r: Channel Stop Status: %04x\n", data); + break; + + case AUDIO_CHANNEL_ZERO_CROSS: + LOGMASKED(LOG_SPU_READS, "audio_r: Channel Zero-Cross Enable: %04x\n", data); + break; + + case AUDIO_CONTROL: + LOGMASKED(LOG_SPU_READS, "audio_r: Control: %04x\n", data); + break; + + case AUDIO_COMPRESS_CTRL: + LOGMASKED(LOG_SPU_READS, "audio_r: Compressor Control: %04x\n", data); + break; + + case AUDIO_CHANNEL_STATUS: + LOGMASKED(LOG_SPU_READS, "audio_r: Channel Status: %04x\n", data); + break; + + case AUDIO_WAVE_IN_L: + LOGMASKED(LOG_SPU_READS, "audio_r: Wave In (L) / FIFO Write Data: %04x\n", data); + break; + + case AUDIO_WAVE_IN_R: + LOGMASKED(LOG_SPU_READS, "audio_r: Wave In (R) / Software Channel FIFO IRQ Control: %04x\n", data); + break; + + case AUDIO_WAVE_OUT_L: + LOGMASKED(LOG_SPU_READS, "audio_r: Wave Out (L): %04x\n", data); + break; + + case AUDIO_WAVE_OUT_R: + LOGMASKED(LOG_SPU_READS, "audio_r: Wave Out (R): %04x\n", data); + break; + + case AUDIO_CHANNEL_REPEAT: + LOGMASKED(LOG_SPU_READS, "audio_r: Channel Repeat Enable: %04x\n", data); + break; + + case AUDIO_CHANNEL_ENV_MODE: + LOGMASKED(LOG_SPU_READS | LOG_ENVELOPES, "audio_r: Channel Envelope Enable: %04x\n", data); + break; + + case AUDIO_CHANNEL_TONE_RELEASE: + LOGMASKED(LOG_SPU_READS, "audio_r: Channel Tone Release Enable: %04x\n", data); + break; + + case AUDIO_CHANNEL_ENV_IRQ: + LOGMASKED(LOG_SPU_READS | LOG_IRQS, "audio_r: Channel Envelope IRQ Status: %04x\n", data); + break; + + case AUDIO_CHANNEL_PITCH_BEND: + LOGMASKED(LOG_SPU_READS, "audio_r: Channel Pitch Bend Enable: %04x\n", data); + break; + + case AUDIO_SOFT_PHASE: + LOGMASKED(LOG_SPU_READS, "audio_r: Software Channel Phase: %04x\n", data); + break; + + case AUDIO_ATTACK_RELEASE: + LOGMASKED(LOG_SPU_READS, "audio_r: Attack/Release Time Control: %04x\n", data); + break; + + case AUDIO_EQ_CUTOFF10: + LOGMASKED(LOG_SPU_READS, "audio_r: EQ Cutoff Frequency 0/1: %04x\n", data); + break; + + case AUDIO_EQ_CUTOFF32: + LOGMASKED(LOG_SPU_READS, "audio_r: EQ Cutoff Frequency 2/3: %04x\n", data); + break; + + case AUDIO_EQ_GAIN10: + LOGMASKED(LOG_SPU_READS, "audio_r: EQ Cutoff Gain 0/1: %04x\n", data); + break; + + case AUDIO_EQ_GAIN32: + LOGMASKED(LOG_SPU_READS, "audio_r: EQ Cutoff Gain 2/3: %04x\n", data); + break; + + default: + LOGMASKED(LOG_UNKNOWN_SPU, "audio_r: Unknown register %04x = %04x\n", 0x3000 + offset, data); + break; + } + } + else if (channel < 16) + { + switch (offset & AUDIO_CHAN_OFFSET_MASK) + { + case AUDIO_WAVE_ADDR: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: Wave Addr (lo): %04x\n", channel, data); + break; + + case AUDIO_MODE: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: Mode: %04x (ADPCM:%d, 16M:%d, TONE:%d, LADDR_HI:%04x, WADDR_HI:%04x)\n", channel, data, + get_adpcm_bit(channel), get_16bit_bit(channel), get_tone_mode(channel), get_loop_addr_high(channel), get_wave_addr_high(channel)); + break; + + case AUDIO_LOOP_ADDR: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: Loop Addr: %04x\n", channel, data); + break; + + case AUDIO_PAN_VOL: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: Pan/Vol: %04x (PAN:%02x, VOL:%02x)\n", channel, data, + get_pan(channel), get_volume(channel)); + break; + + case AUDIO_ENVELOPE0: + LOGMASKED(LOG_CHANNEL_READS | LOG_ENVELOPES, "audio_r: Channel %d: Envelope0: %04x (RPTPER:%d, TARGET:%02x, SIGN:%d, INC:%02x)\n", channel, data, + get_repeat_period_bit(channel), get_envelope_target(channel), get_envelope_sign_bit(channel), get_envelope_inc(channel)); + break; + + case AUDIO_ENVELOPE_DATA: + LOGMASKED(LOG_CHANNEL_READS | LOG_ENVELOPES, "audio_r: Channel %d: Envelope Data: %04x (CNT:%d, EDD:%02x)\n", channel, data, + get_envelope_count(channel), get_edd(channel)); + break; + + case AUDIO_ENVELOPE1: + LOGMASKED(LOG_CHANNEL_READS | LOG_ENVELOPES, "audio_r: Channel %d: Envelope1 Data: %04x (RPTCNT:%02x, RPT:%d, LOAD:%02x)\n", channel, data, + get_envelope_repeat_count(channel), get_envelope_repeat_bit(channel), get_envelope_load(channel)); + break; + + case AUDIO_ENVELOPE_ADDR_HIGH: + LOGMASKED(LOG_CHANNEL_READS | LOG_ENVELOPES, "audio_r: Channel %d: Envelope Addr (hi): %04x (IRQADDR:%03x, IRQEN:%d, EADDR_HI:%02x)\n", channel, data, + get_audio_irq_addr(channel), get_audio_irq_enable_bit(channel), get_envelope_addr_high(channel)); + break; + + case AUDIO_ENVELOPE_ADDR: + LOGMASKED(LOG_CHANNEL_READS | LOG_ENVELOPES, "audio_r: Channel %d: Envelope Addr (lo): %04x \n", channel, data); + break; + + case AUDIO_WAVE_DATA_PREV: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: Wave Data Prev: %04x \n", channel, data); + break; + + case AUDIO_ENVELOPE_LOOP_CTRL: + LOGMASKED(LOG_CHANNEL_READS | LOG_ENVELOPES, "audio_r: Channel %d: Envelope Loop Ctrl: %04x (RDOFFS:%02x, EAOFFS:%03x)\n", channel, data, + get_rampdown_offset(channel), get_envelope_eaoffset(channel)); + break; + + case AUDIO_WAVE_DATA: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: Wave Data: %04x\n", channel, data); + break; + + case AUDIO_ADPCM_SEL: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: ADPCM Sel: %04x (ADPCM36:%d, POINTNUM:%02x\n", channel, data, + get_adpcm36_bit(channel), get_point_number(channel)); + break; + + case AUDIO_PHASE_HIGH: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: Phase High: %04x\n", channel, data); + break; + + case AUDIO_PHASE_ACCUM_HIGH: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: Phase Accum High: %04x\n", channel, data); + break; + + case AUDIO_TARGET_PHASE_HIGH: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: Target Phase High: %04x\n", channel, data); + break; + + case AUDIO_RAMP_DOWN_CLOCK: + LOGMASKED(LOG_CHANNEL_READS | LOG_RAMPDOWN, "audio_r: Channel %d: Rampdown Clock: %04x\n", channel, data); + break; + + case AUDIO_PHASE: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: Phase: %04x\n", channel, data); + break; + + case AUDIO_PHASE_ACCUM: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: Phase Accum: %04x\n", channel, data); + break; + + case AUDIO_TARGET_PHASE: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: Target Phase: %04x\n", channel, data); + break; + + case AUDIO_PHASE_CTRL: + LOGMASKED(LOG_CHANNEL_READS, "audio_r: Channel %d: Phase Ctrl: %04x (TIMESTEP:%d, SIGN:%d, OFFSET:%03x\n", channel, data, + get_phase_time_step(channel), get_phase_sign_bit(channel), get_phase_offset(channel)); + break; + + default: + LOGMASKED(LOG_UNKNOWN_SPU, "audio_r: Unknown register %04x\n", 0x3000 + offset); + break; + } + } + else if (channel >= 16) + { + LOGMASKED(LOG_UNKNOWN_SPU, "audio_r: Trying to read from channel %d\n", channel); + } + return data; +} + +WRITE16_MEMBER(spg2xx_device::audio_w) +{ + const uint16_t channel = (offset & 0x00f0) >> 4; + + if (offset >= 0x400) + { + switch (offset) + { + case AUDIO_CHANNEL_ENABLE: + { + LOGMASKED(LOG_SPU_WRITES, "audio_w: Channel Enable: %04x\n", data); + const uint16_t changed = m_audio_regs[AUDIO_CHANNEL_ENABLE] ^ data; + for (uint32_t channel_bit = 0; channel_bit < 16; channel_bit++) + { + const uint16_t mask = 1 << channel_bit; + if (!(changed & mask)) + continue; + + if (data & mask) + { + if (!(m_audio_regs[AUDIO_CHANNEL_STATUS] & mask)) + { + LOGMASKED(LOG_SPU_WRITES, "Enabling channel %d\n", channel_bit); + m_audio_regs[offset] |= mask; + if (!(m_audio_regs[AUDIO_CHANNEL_STOP] & mask)) + { + LOGMASKED(LOG_SPU_WRITES, "Stop not set, starting playback on channel %d, mask %04x\n", channel_bit, mask); + m_audio_regs[AUDIO_CHANNEL_STATUS] |= mask; + m_sample_addr[channel_bit] = get_wave_addr(channel_bit); + m_envelope_addr[channel_bit] = get_envelope_addr(channel_bit); + set_envelope_count(channel, get_envelope_load(channel)); + } + m_adpcm[channel_bit].reset(); + m_sample_shift[channel_bit] = 0; + m_sample_count[channel_bit] = 0; + } + } + else + { + m_audio_regs[offset] &= ~mask; + m_audio_regs[AUDIO_CHANNEL_STATUS] &= ~mask; + m_audio_regs[AUDIO_CHANNEL_STOP] |= mask; + m_audio_regs[AUDIO_CHANNEL_TONE_RELEASE] &= ~mask; + } + } + break; + } + + case AUDIO_MAIN_VOLUME: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Main Volume: %04x\n", data); + m_audio_regs[offset] = data & AUDIO_MAIN_VOLUME_MASK; + break; + + case AUDIO_CHANNEL_FIQ_ENABLE: + LOGMASKED(LOG_SPU_WRITES | LOG_IRQS, "audio_w: Channel FIQ Enable: %04x\n", data); + m_audio_regs[offset] = data & AUDIO_CHANNEL_FIQ_ENABLE_MASK; + break; + + case AUDIO_CHANNEL_FIQ_STATUS: + LOGMASKED(LOG_SPU_WRITES | LOG_IRQS, "audio_w: Channel FIQ Acknowledge: %04x\n", data); + m_audio_regs[offset] &= ~(data & AUDIO_CHANNEL_FIQ_STATUS_MASK); + break; + + case AUDIO_BEAT_BASE_COUNT: + LOGMASKED(LOG_SPU_WRITES | LOG_BEAT, "audio_w: Beat Base Count: %04x\n", data); + m_audio_regs[offset] = data & AUDIO_BEAT_BASE_COUNT_MASK; + m_audio_curr_beat_base_count = m_audio_regs[offset]; + break; + + case AUDIO_BEAT_COUNT: + { + LOGMASKED(LOG_SPU_WRITES | LOG_BEAT, "audio_w: Beat Count: %04x\n", data); + const uint16_t old = m_audio_regs[offset]; + m_audio_regs[offset] &= ~(data & AUDIO_BIS_MASK); + m_audio_regs[offset] &= AUDIO_BIS_MASK; + m_audio_regs[offset] |= data & ~AUDIO_BIS_MASK; + const uint16_t changed = old ^ m_audio_regs[offset]; + if (data == 0xc000 && m_audio_regs[offset]) + { + } + if (changed & (AUDIO_BIS_MASK | AUDIO_BIE_MASK)) + { + LOGMASKED(LOG_BEAT, "BIS mask changed, updating IRQ\n"); + check_irqs(changed & (AUDIO_BIS_MASK | AUDIO_BIE_MASK)); + } + break; + } + + case AUDIO_ENVCLK0: + case AUDIO_ENVCLK1: + { + LOGMASKED(LOG_SPU_WRITES | LOG_ENVELOPES, "audio_w: Envelope Interval %d (lo): %04x\n", offset == AUDIO_ENVCLK0 ? 0 : 1, data); + const uint16_t old = m_audio_regs[offset]; + m_audio_regs[offset] = data; + const uint16_t changed = old ^ m_audio_regs[offset]; + + if (!changed) + break; + + const uint8_t channel_offset = offset == AUDIO_ENVCLK0 ? 0 : 8; + for (uint8_t channel_bit = 0; channel_bit < 4; channel_bit++) + { + const uint8_t shift = channel_bit << 2; + const uint16_t mask = 0x0f << shift; + if (changed & mask) + { + m_envclk_frame[channel_bit + channel_offset] = get_envclk_frame_count(channel_bit + channel_offset); + } + } + break; + } + + case AUDIO_ENVCLK0_HIGH: + case AUDIO_ENVCLK1_HIGH: + { + LOGMASKED(LOG_SPU_WRITES | LOG_ENVELOPES, "audio_w: Envelope Interval %d (hi): %04x\n", offset == AUDIO_ENVCLK0_HIGH ? 0 : 1, data); + const uint16_t old = m_audio_regs[offset]; + m_audio_regs[offset] = data; + const uint16_t changed = old ^ m_audio_regs[offset]; + if (!changed) + break; + + const uint8_t channel_offset = offset == AUDIO_ENVCLK0_HIGH ? 0 : 8; + for (uint8_t channel_bit = 0; channel_bit < 4; channel_bit++) + { + const uint8_t shift = channel_bit << 2; + const uint16_t mask = 0x0f << shift; + if (changed & mask) + { + m_envclk_frame[channel_bit + channel_offset + 4] = get_envclk_frame_count(channel_bit + channel_offset); + } + } + break; + } + + case AUDIO_ENV_RAMP_DOWN: + { + LOGMASKED(LOG_SPU_WRITES | LOG_RAMPDOWN, "audio_w: Envelope Fast Ramp Down: %04x\n", data); + const uint16_t old = m_audio_regs[offset]; + m_audio_regs[offset] = data & AUDIO_ENV_RAMP_DOWN_MASK; + const uint16_t changed = old ^ m_audio_regs[offset]; + if (!changed) + break; + + for (uint32_t channel_bit = 0; channel_bit < 16; channel_bit++) + { + const uint16_t mask = 1 << channel_bit; + if ((changed & mask) && (data & mask)) + { + m_rampdown_frame[channel_bit] = get_rampdown_frame_count(channel_bit); + LOGMASKED(LOG_RAMPDOWN, "Preparing to ramp down channel %d in %d ticks\n", channel_bit, m_rampdown_frame[channel_bit] / 13); + } + } + break; + } + + case AUDIO_CHANNEL_STOP: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Channel Stop Status: %04x\n", data); + m_audio_regs[offset] &= ~data; + m_audio_regs[AUDIO_CHANNEL_ENABLE] &= ~data; + break; + + case AUDIO_CHANNEL_ZERO_CROSS: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Channel Zero-Cross Enable: %04x\n", data); + m_audio_regs[offset] = data & AUDIO_CHANNEL_ZERO_CROSS_MASK; + break; + + case AUDIO_CONTROL: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Control: %04x (SOFTCH:%d, COMPEN:%d, NOHIGH:%d, NOINT:%d, EQEN:%d\n", data + , (data & AUDIO_CONTROL_SOFTCH_MASK) ? 1 : 0 + , (data & AUDIO_CONTROL_COMPEN_MASK) ? 1 : 0 + , (data & AUDIO_CONTROL_NOHIGH_MASK) ? 1 : 0 + , (data & AUDIO_CONTROL_NOINT_MASK) ? 1 : 0 + , (data & AUDIO_CONTROL_EQEN_MASK) ? 1 : 0); + m_audio_regs[offset] = data & AUDIO_CONTROL_MASK; + break; + + case AUDIO_COMPRESS_CTRL: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Compressor Control: %04x\n", data); + m_audio_regs[offset] = data; + break; + + case AUDIO_CHANNEL_STATUS: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Channel Status (read-only): %04x\n", data); + break; + + case AUDIO_WAVE_IN_L: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Wave In (L) / FIFO Write Data: %04x\n", data); + m_audio_regs[offset] = data; + break; + + case AUDIO_WAVE_IN_R: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Wave In (R) / Software Channel FIFO IRQ Control: %04x\n", data); + m_audio_regs[offset] = data; + break; + + case AUDIO_WAVE_OUT_L: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Wave Out (L): %04x\n", data); + m_audio_regs[offset] = data; + break; + + case AUDIO_WAVE_OUT_R: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Wave Out (R): %04x\n", data); + m_audio_regs[offset] = data; + break; + + case AUDIO_CHANNEL_REPEAT: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Channel Repeat Enable: %04x\n", data); + m_audio_regs[offset] = data & AUDIO_CHANNEL_REPEAT_MASK; + break; + + case AUDIO_CHANNEL_ENV_MODE: + LOGMASKED(LOG_SPU_WRITES | LOG_ENVELOPES, "audio_w: Channel Envelope Enable: %04x\n", data); + m_audio_regs[offset] = data & AUDIO_CHANNEL_ENV_MODE_MASK; + break; + + case AUDIO_CHANNEL_TONE_RELEASE: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Channel Tone Release Enable: %04x\n", data); + m_audio_regs[offset] = data & AUDIO_CHANNEL_TONE_RELEASE_MASK; + break; + + case AUDIO_CHANNEL_ENV_IRQ: + LOGMASKED(LOG_SPU_WRITES | LOG_ENVELOPES | LOG_IRQS, "audio_w: Channel Envelope IRQ Acknowledge: %04x\n", data); + m_audio_regs[offset] &= ~data & AUDIO_CHANNEL_ENV_IRQ_MASK; + break; + + case AUDIO_CHANNEL_PITCH_BEND: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Channel Pitch Bend Enable: %04x\n", data); + m_audio_regs[offset] = data & AUDIO_CHANNEL_PITCH_BEND_MASK; + break; + + case AUDIO_SOFT_PHASE: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Software Channel Phase: %04x\n", data); + m_audio_regs[offset] = data; + break; + + case AUDIO_ATTACK_RELEASE: + LOGMASKED(LOG_SPU_WRITES, "audio_w: Attack/Release Time Control: %04x\n", data); + m_audio_regs[offset] = data; + break; + + case AUDIO_EQ_CUTOFF10: + LOGMASKED(LOG_SPU_WRITES, "audio_w: EQ Cutoff Frequency 0/1: %04x\n", data); + m_audio_regs[offset] = data & AUDIO_EQ_CUTOFF10_MASK; + break; + + case AUDIO_EQ_CUTOFF32: + LOGMASKED(LOG_SPU_WRITES, "audio_w: EQ Cutoff Frequency 2/3: %04x\n", data); + m_audio_regs[offset] = data & AUDIO_EQ_CUTOFF32_MASK; + break; + + case AUDIO_EQ_GAIN10: + LOGMASKED(LOG_SPU_WRITES, "audio_w: EQ Cutoff Gain 0/1: %04x\n", data); + m_audio_regs[offset] = data & AUDIO_EQ_GAIN10_MASK; + break; + + case AUDIO_EQ_GAIN32: + LOGMASKED(LOG_SPU_WRITES, "audio_w: EQ Cutoff Gain 2/3: %04x\n", data); + m_audio_regs[offset] = data & AUDIO_EQ_GAIN32_MASK; + break; + + default: + m_audio_regs[offset] = data; + LOGMASKED(LOG_UNKNOWN_SPU, "audio_w: Unknown register %04x = %04x\n", 0x3000 + offset, data); + break; + } + } + else if (channel < 16) + { + switch (offset & AUDIO_CHAN_OFFSET_MASK) + { + case AUDIO_WAVE_ADDR: + m_audio_regs[offset] = data; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: Wave Addr (lo): %04x\n", channel, data); + break; + + case AUDIO_MODE: + m_audio_regs[offset] = data; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: Mode: %04x (ADPCM:%d, 16M:%d, TONE:%d, LADDR_HI:%04x, WADDR_HI:%04x)\n", channel, data, + get_adpcm_bit(channel), get_16bit_bit(channel), get_tone_mode(channel), get_loop_addr_high(channel), get_wave_addr_high(channel)); + break; + + case AUDIO_LOOP_ADDR: + m_audio_regs[offset] = data; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: Loop Addr: %04x\n", channel, data); + break; + + case AUDIO_PAN_VOL: + m_audio_regs[offset] = data & AUDIO_PAN_VOL_MASK; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: Pan/Vol: %04x (PAN:%02x, VOL:%02x)\n", channel, data, + get_pan(channel), get_volume(channel)); + break; + + case AUDIO_ENVELOPE0: + m_audio_regs[offset] = data; + LOGMASKED(LOG_CHANNEL_WRITES | LOG_ENVELOPES, "audio_w: Channel %d: Envelope0: %04x (RPTPER:%d, TARGET:%02x, SIGN:%d, INC:%02x)\n", channel, data, + get_repeat_period_bit(channel), get_envelope_target(channel), get_envelope_sign_bit(channel), get_envelope_inc(channel)); + break; + + case AUDIO_ENVELOPE_DATA: + m_audio_regs[offset] = data & AUDIO_ENVELOPE_DATA_MASK; + LOGMASKED(LOG_CHANNEL_WRITES | LOG_ENVELOPES, "audio_w: Channel %d: Envelope Data: %04x (CNT:%d, EDD:%02x)\n", channel, data, + get_envelope_count(channel), get_edd(channel)); + break; + + case AUDIO_ENVELOPE1: + m_audio_regs[offset] = data; + LOGMASKED(LOG_CHANNEL_WRITES | LOG_ENVELOPES, "audio_w: Channel %d: Envelope1 Data: %04x (RPTCNT:%02x, RPT:%d, LOAD:%02x)\n", channel, data, + get_envelope_repeat_count(channel), get_envelope_repeat_bit(channel), get_envelope_load(channel)); + break; + + case AUDIO_ENVELOPE_ADDR_HIGH: + m_audio_regs[offset] = data; + LOGMASKED(LOG_CHANNEL_WRITES | LOG_ENVELOPES, "audio_w: Channel %d: Envelope Addr (hi): %04x (IRQADDR:%03x, IRQEN:%d, EADDR_HI:%02x)\n", channel, data, + get_audio_irq_addr(channel), get_audio_irq_enable_bit(channel), get_envelope_addr_high(channel)); + break; + + case AUDIO_ENVELOPE_ADDR: + m_audio_regs[offset] = data; + LOGMASKED(LOG_CHANNEL_WRITES | LOG_ENVELOPES, "audio_w: Channel %d: Envelope Addr (lo): %04x\n", channel, data); + break; + + case AUDIO_WAVE_DATA_PREV: + m_audio_regs[offset] = data; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: Wave Data Prev: %04x \n", channel, data); + break; + + case AUDIO_ENVELOPE_LOOP_CTRL: + m_audio_regs[offset] = data; + LOGMASKED(LOG_CHANNEL_WRITES | LOG_ENVELOPES, "audio_w: Channel %d: Envelope Loop Ctrl: %04x (RDOFFS:%02x, EAOFFS:%03x)\n", channel, data, + get_rampdown_offset(channel), get_envelope_eaoffset(channel)); + break; + + case AUDIO_WAVE_DATA: + m_audio_regs[offset] = data; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: Wave Data: %04x\n", channel, data); + break; + + case AUDIO_ADPCM_SEL: + m_audio_regs[offset] = data & AUDIO_ADPCM_SEL_MASK; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: ADPCM Sel: %04x (ADPCM36:%d, POINTNUM:%02x\n", channel, data, + get_adpcm36_bit(channel), get_point_number(channel)); + break; + + case AUDIO_PHASE_HIGH: + m_audio_regs[offset] = data & AUDIO_PHASE_HIGH_MASK; + m_channel_rate[channel] = ((double)get_phase(channel) * 140625.0 * 2.0) / (double)(1 << 19); + m_channel_rate_accum[channel] = 0.0; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: Phase High: %04x (rate: %f)\n", channel, data, m_channel_rate[channel]); + break; + + case AUDIO_PHASE_ACCUM_HIGH: + m_audio_regs[offset] = data & AUDIO_PHASE_ACCUM_HIGH_MASK; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: Phase Accum High: %04x\n", channel, data); + break; + + case AUDIO_TARGET_PHASE_HIGH: + m_audio_regs[offset] = data & AUDIO_TARGET_PHASE_HIGH_MASK; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: Target Phase High: %04x\n", channel, data); + break; + + case AUDIO_RAMP_DOWN_CLOCK: + m_audio_regs[offset] = data & AUDIO_RAMP_DOWN_CLOCK_MASK; + LOGMASKED(LOG_CHANNEL_WRITES | LOG_RAMPDOWN, "audio_w: Channel %d: Rampdown Clock: %04x\n", channel, data); + break; + + case AUDIO_PHASE: + m_audio_regs[offset] = data; + m_channel_rate[channel] = ((double)get_phase(channel) * 140625.0 * 2.0) / (double)(1 << 19); + m_channel_rate_accum[channel] = 0.0; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: Phase: %04x (rate: %f)\n", channel, data, m_channel_rate[channel]); + break; + + case AUDIO_PHASE_ACCUM: + m_audio_regs[offset] = data; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: Phase Accum: %04x\n", channel, data); + break; + + case AUDIO_TARGET_PHASE: + m_audio_regs[offset] = data; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: Target Phase: %04x\n", channel, data); + break; + + case AUDIO_PHASE_CTRL: + m_audio_regs[offset] = data; + LOGMASKED(LOG_CHANNEL_WRITES, "audio_w: Channel %d: Phase Ctrl: %04x (TIMESTEP:%d, SIGN:%d, OFFSET:%03x\n", channel, data, + get_phase_time_step(channel), get_phase_sign_bit(channel), get_phase_offset(channel)); + break; + + default: + m_audio_regs[offset] = data; + LOGMASKED(LOG_UNKNOWN_SPU, "audio_w: Unknown register %04x = %04x\n", 0x3000 + offset, data); + break; + } + } + else if (channel >= 16) + { + LOGMASKED(LOG_UNKNOWN_SPU, "audio_w: Trying to write to channel %d: %04x = %04x\n", channel, 0x3000 + offset, data); + } + else + { + m_audio_regs[offset] = data; + } +} + +void spg2xx_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) +{ + stream_sample_t *out_l = outputs[0]; + stream_sample_t *out_r = outputs[1]; + address_space &space = m_cpu->space(AS_PROGRAM); + + for (int i = 0; i < samples; i++) + { + int32_t left_total = 0; + int32_t right_total = 0; + int32_t active_count = 0; + +#if SPG2XX_VISUAL_AUDIO_DEBUG + for (int y = 0; y < 768; y++) + { + m_audio_debug_buffer[y*1024 + m_audio_debug_x] = 0; + } +#endif + for (uint32_t ch_index = 0; ch_index < 16; ch_index++) + { +#if SPG2XX_VISUAL_AUDIO_DEBUG + uint32_t debug_y = 0; + if (m_channel_debug < 0) + debug_y = ch_index * 48; +#endif + if (!get_channel_status(ch_index)) + { +#if SPG2XX_VISUAL_AUDIO_DEBUG + if (m_channel_debug == -1) + { + m_audio_debug_buffer[(debug_y + 47)*1024 + m_audio_debug_x] |= SPG_VDB_WAVE; + int edd_y = (int)((float)get_edd(ch_index) * 0.375f); + m_audio_debug_buffer[(debug_y + (47 - edd_y))*1024 + m_audio_debug_x] |= SPG_VDB_EDD; + int vol_y = (int)((float)get_volume(ch_index) * 0.375f); + m_audio_debug_buffer[(debug_y + (47 - vol_y))*1024 + m_audio_debug_x] |= SPG_VDB_VOL; + } + else if (ch_index == m_channel_debug) + { + m_audio_debug_buffer[(debug_y + 767)*1024 + m_audio_debug_x] |= SPG_VDB_WAVE; + int edd_y = (int)((float)get_edd(ch_index) * 3.74f); + m_audio_debug_buffer[(debug_y + (767 - edd_y))*1024 + m_audio_debug_x] |= SPG_VDB_EDD; + int vol_y = (int)((float)get_volume(ch_index) * 3.74f); + m_audio_debug_buffer[(debug_y + (767 - vol_y))*1024 + m_audio_debug_x] |= SPG_VDB_VOL; + } +#endif + continue; + } + + if (SPG_DEBUG_AUDIO && m_debug_rates) + printf("%f:%f ", m_channel_rate[ch_index], m_channel_rate_accum[ch_index]); + bool playing = advance_channel(space, ch_index); + if (playing) + { + int32_t sample = (int16_t)(m_audio_regs[(ch_index << 4) | AUDIO_WAVE_DATA] ^ 0x8000); +#if SPG2XX_VISUAL_AUDIO_DEBUG + if (m_channel_debug == -1) + { + int sample_y = (int)((float)m_audio_regs[(ch_index << 4) | AUDIO_WAVE_DATA] / 1365.0f); + m_audio_debug_buffer[(debug_y + (47 - sample_y))*1024 + m_audio_debug_x] |= SPG_VDB_WAVE; + int edd_y = (int)((float)get_edd(ch_index) * 0.375f); + m_audio_debug_buffer[(debug_y + (47 - edd_y))*1024 + m_audio_debug_x] |= SPG_VDB_EDD; + int vol_y = (int)((float)get_volume(ch_index) * 0.375f); + m_audio_debug_buffer[(debug_y + (47 - vol_y))*1024 + m_audio_debug_x] |= SPG_VDB_VOL; + } + else if (ch_index == m_channel_debug) + { + int sample_y = (int)((float)m_audio_regs[(ch_index << 4) | AUDIO_WAVE_DATA] / 136.0f); + m_audio_debug_buffer[(debug_y + (767 - sample_y))*1024 + m_audio_debug_x] |= SPG_VDB_WAVE; + int edd_y = (int)((float)get_edd(ch_index) * 0.375f); + m_audio_debug_buffer[(debug_y + (767 - edd_y))*1024 + m_audio_debug_x] |= SPG_VDB_EDD; + int vol_y = (int)((float)get_volume(ch_index) * 0.375f); + m_audio_debug_buffer[(debug_y + (767 - vol_y))*1024 + m_audio_debug_x] |= SPG_VDB_VOL; + } +#endif + if (!(m_audio_regs[AUDIO_CONTROL] & AUDIO_CONTROL_NOINT_MASK)) + { + int32_t prev_sample = (int16_t)(m_audio_regs[(ch_index << 4) | AUDIO_WAVE_DATA_PREV] ^ 0x8000); + int16_t lerp_factor = (int16_t)((m_channel_rate_accum[ch_index] / 44100.0) * 256.0); + prev_sample = (prev_sample * (0x100 - lerp_factor)) >> 8; + sample = (sample * lerp_factor) >> 8; + sample += prev_sample; + } + + sample = (sample * (int16_t)get_edd(ch_index)) >> 7; + + active_count++; + + int32_t vol = get_volume(ch_index); + int32_t pan = get_pan(ch_index); + + int32_t pan_left, pan_right; + if (pan < 0x40) + { + pan_left = 0x7f * vol; + pan_right = pan * 2 * vol; + } + else + { + pan_left = (0x7f - pan) * 2 * vol; + pan_right = 0x7f * vol; + } + + left_total += ((int16_t)sample * (int16_t)pan_left) >> 14; + right_total += ((int16_t)sample * (int16_t)pan_right) >> 14; + } + } + +#if SPG2XX_VISUAL_AUDIO_DEBUG + advance_debug_pos(); +#endif + + if (active_count) + { + left_total /= active_count; + right_total /= active_count; + *out_l++ = (left_total * (int16_t)m_audio_regs[AUDIO_MAIN_VOLUME]) >> 7; + *out_r++ = (right_total * (int16_t)m_audio_regs[AUDIO_MAIN_VOLUME]) >> 7; + } + else + { + *out_l++ = 0; + *out_r++ = 0; + } + +#if SPG2XX_VISUAL_AUDIO_DEBUG + for (int y = 0; y < 768; y++) + { + m_audio_debug_buffer[y*1024 + m_audio_debug_x] = 7; + } +#endif + } + //printf("\n"); +} + +inline void spg2xx_device::stop_channel(const uint32_t channel) +{ + // TODO: IRQs + m_audio_regs[AUDIO_CHANNEL_ENABLE] &= ~(1 << channel); + m_audio_regs[AUDIO_CHANNEL_STATUS] &= ~(1 << channel); + m_audio_regs[AUDIO_CHANNEL_STOP] |= (1 << channel); + m_audio_regs[(channel << 4) | AUDIO_MODE] &= ~AUDIO_ADPCM_MASK; + m_audio_regs[AUDIO_CHANNEL_TONE_RELEASE] &= ~(1 << channel); +} + +bool spg2xx_device::advance_channel(address_space &space, const uint32_t channel) +{ + m_channel_rate_accum[channel] += m_channel_rate[channel]; + uint32_t samples_to_advance = 0; + while (m_channel_rate_accum[channel] >= 44100.0) + { + m_channel_rate_accum[channel] -= 44100.0; + samples_to_advance++; + } + + if (!samples_to_advance) + return true; + + bool playing = true; + + if (get_adpcm_bit(channel)) + { + // ADPCM mode + for (uint32_t sample = 0; sample < samples_to_advance && playing; sample++) + { + playing = fetch_sample(space, channel); + if (playing) + { + m_sample_shift[channel] += 4; + if (m_sample_shift[channel] == 16) + { + m_sample_shift[channel] = 0; + m_sample_addr[channel]++; + } + } + } + } + else if (get_16bit_bit(channel)) + { + // 16-bit mode + for (uint32_t sample = 0; sample < samples_to_advance && playing; sample++) + { + playing = fetch_sample(space, channel); + if (playing) + m_sample_addr[channel]++; + } + } + else + { + // 8-bit mode + for (uint32_t sample = 0; sample < samples_to_advance && playing; sample++) + { + playing = fetch_sample(space, channel); + if (playing) + { + m_sample_shift[channel] += 8; + if (m_sample_shift[channel] == 16) + { + m_sample_shift[channel] = 0; + m_sample_addr[channel]++; + } + } + } + } + + return playing; +} + +bool spg2xx_device::fetch_sample(address_space &space, const uint32_t channel) +{ + const uint32_t channel_mask = channel << 4; + m_audio_regs[channel_mask | AUDIO_WAVE_DATA_PREV] = m_audio_regs[channel_mask | AUDIO_WAVE_DATA]; + + const uint32_t wave_data_reg = channel_mask | AUDIO_WAVE_DATA; + const uint16_t tone_mode = get_tone_mode(channel); + const uint16_t raw_sample = tone_mode ? space.read_word(m_sample_addr[channel]) : m_audio_regs[wave_data_reg]; + + m_audio_regs[wave_data_reg] = raw_sample; + + if (get_adpcm_bit(channel)) + { + // ADPCM mode + m_audio_regs[wave_data_reg] >>= m_sample_shift[channel]; + m_audio_regs[wave_data_reg] = (uint16_t)(m_adpcm[channel].clock((uint8_t)(m_audio_regs[wave_data_reg] & 0x000f)) * 7) ^ 0x8000; + if (tone_mode != 0 && raw_sample == 0xffff) + { + if (tone_mode == AUDIO_TONE_MODE_HW_ONESHOT) + { + LOGMASKED(LOG_SAMPLES, "ADPCM stopped after %d samples\n", m_sample_count[channel]); + m_sample_count[channel] = 0; + stop_channel(channel); + return false; + } + else + { + LOGMASKED(LOG_SAMPLES, "ADPCM looping after %d samples\n", m_sample_count[channel]); + m_sample_count[channel] = 0; + loop_channel(channel); + } + } + m_sample_count[channel]++; + } + else if (get_16bit_bit(channel)) + { + // 16-bit mode + if (tone_mode != 0 && raw_sample == 0xffff) + { + if (tone_mode == AUDIO_TONE_MODE_HW_ONESHOT) + { + LOGMASKED(LOG_SAMPLES, "16-bit PCM stopped after %d samples\n", m_sample_count[channel]); + m_sample_count[channel] = 0; + stop_channel(channel); + return false; + } + else + { + LOGMASKED(LOG_SAMPLES, "16-bit PCM looping after %d samples\n", m_sample_count[channel]); + m_sample_count[channel] = 0; + loop_channel(channel); + } + } + m_sample_count[channel]++; + } + else + { + // 8-bit mode + if (tone_mode != 0) + { + if (m_sample_shift[channel]) + m_audio_regs[wave_data_reg] <<= 8; + else + m_audio_regs[wave_data_reg] &= 0xff00; + + if (m_audio_regs[wave_data_reg] == 0xff00) + { + if (tone_mode == AUDIO_TONE_MODE_HW_ONESHOT) + { + LOGMASKED(LOG_SAMPLES, "8-bit PCM stopped after %d samples\n", m_sample_count[channel]); + m_sample_count[channel] = 0; + stop_channel(channel); + return false; + } + else + { + LOGMASKED(LOG_SAMPLES, "8-bit PCM looping after %d samples\n", m_sample_count[channel]); + m_sample_count[channel] = 0; + loop_channel(channel); + } + } + } + m_sample_count[channel]++; + } + + return true; +} + +inline void spg2xx_device::loop_channel(const uint32_t channel) +{ + //printf("Looping from %08x to %08x\n", m_sample_addr[channel], get_loop_addr(channel)); + m_sample_addr[channel] = get_loop_addr(channel); + m_sample_shift[channel] = 0; +} + +void spg2xx_device::audio_frame_tick() +{ + audio_beat_tick(); + + address_space &space = m_cpu->space(AS_PROGRAM); + bool any_changed = false; + for (uint32_t channel = 0; channel < 16; channel++) + { + const uint16_t mask = (1 << channel); + if (!(m_audio_regs[AUDIO_CHANNEL_STATUS] & mask)) + { + continue; + } + + if (m_audio_regs[AUDIO_ENV_RAMP_DOWN] & mask) + { + m_rampdown_frame[channel]--; + if (m_rampdown_frame[channel] == 0) + { + LOGMASKED(LOG_RAMPDOWN, "Ticking rampdown for channel %d\n", channel); + audio_rampdown_tick(channel); + any_changed = true; + } + continue; + } + + if (!(m_audio_regs[AUDIO_CHANNEL_ENV_MODE] & mask)) + { + m_envclk_frame[channel]--; + if (m_envclk_frame[channel] == 0) + { + LOGMASKED(LOG_ENVELOPES, "Ticking envelope for channel %d\n", channel); + any_changed = audio_envelope_tick(space, channel) || any_changed; + m_envclk_frame[channel] = get_envclk_frame_count(channel); + } + } + } + + if (any_changed) + { + m_stream->update(); + } +} + +void spg2xx_device::audio_beat_tick() +{ + if (m_audio_curr_beat_base_count == 0) + { + LOGMASKED(LOG_BEAT, "Beat base count elapsed, reloading with %d\n", m_audio_regs[AUDIO_BEAT_BASE_COUNT]); + m_audio_curr_beat_base_count = m_audio_regs[AUDIO_BEAT_BASE_COUNT]; + + uint16_t beat_count = m_audio_regs[AUDIO_BEAT_COUNT] & AUDIO_BEAT_COUNT_MASK; + if (beat_count == 0) + { + if (m_audio_regs[AUDIO_BEAT_COUNT] & AUDIO_BIE_MASK) + { + LOGMASKED(LOG_BEAT, "Beat count elapsed, setting Status bit and checking IRQs\n"); + m_audio_regs[AUDIO_BEAT_COUNT] |= AUDIO_BIS_MASK; + check_irqs(AUDIO_BIS_MASK); + } + else + { + LOGMASKED(LOG_BEAT, "Beat count elapsed but IRQ not enabled\n"); + } + } + else + { + beat_count--; + m_audio_regs[AUDIO_BEAT_COUNT] = (m_audio_regs[AUDIO_BEAT_COUNT] & ~AUDIO_BEAT_COUNT_MASK) | beat_count; + } + } + else + { + m_audio_curr_beat_base_count--; + } +} + +void spg2xx_device::audio_rampdown_tick(const uint32_t channel) +{ + const uint8_t old_edd = get_edd(channel); + uint8_t new_edd = old_edd - get_rampdown_offset(channel); + if (new_edd > old_edd) + new_edd = 0; + + if (new_edd) + { + LOGMASKED(LOG_RAMPDOWN, "Channel %d preparing for next rampdown step (%02x)\n", channel, new_edd); + const uint16_t channel_mask = channel << 4; + m_audio_regs[channel_mask | AUDIO_ENVELOPE_DATA] &= ~AUDIO_EDD_MASK; + m_audio_regs[channel_mask | AUDIO_ENVELOPE_DATA] |= new_edd & AUDIO_EDD_MASK; + m_rampdown_frame[channel] = get_rampdown_frame_count(channel); + } + else + { + LOGMASKED(LOG_RAMPDOWN, "Stopping channel %d due to rampdown\n", channel); + const uint16_t channel_mask = 1 << channel; + m_audio_regs[AUDIO_CHANNEL_ENABLE] &= ~channel_mask; + m_audio_regs[AUDIO_CHANNEL_STATUS] &= ~channel_mask; + m_audio_regs[AUDIO_CHANNEL_STOP] |= channel_mask; + m_audio_regs[AUDIO_ENV_RAMP_DOWN] &= ~channel_mask; + m_audio_regs[AUDIO_CHANNEL_TONE_RELEASE] &= ~channel_mask; + } +} + +const uint32_t spg2xx_device::s_rampdown_frame_counts[8] = +{ + 13*4, 13*16, 13*64, 13*256, 13*1024, 13*4096, 13*8192, 13*8192 +}; + +uint32_t spg2xx_device::get_rampdown_frame_count(const uint32_t channel) +{ + return s_rampdown_frame_counts[get_rampdown_clock(channel)]; +} + +const uint32_t spg2xx_device::s_envclk_frame_counts[16] = +{ + 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 8192, 8192, 8192, 8192 +}; + +uint32_t spg2xx_device::get_envclk_frame_count(const uint32_t channel) +{ + return s_envclk_frame_counts[get_envelope_clock(channel)]; +} + +uint32_t spg2xx_device::get_envelope_clock(const offs_t channel) const +{ + if (channel < 4) + return (m_audio_regs[AUDIO_ENVCLK0] >> (channel << 2)) & 0x000f; + else if (channel < 8) + return (m_audio_regs[AUDIO_ENVCLK0_HIGH] >> ((channel - 4) << 2)) & 0x000f; + else if (channel < 12) + return (m_audio_regs[AUDIO_ENVCLK1] >> ((channel - 8) << 2)) & 0x000f; + else + return (m_audio_regs[AUDIO_ENVCLK1_HIGH] >> ((channel - 12) << 2)) & 0x000f; +} + +bool spg2xx_device::audio_envelope_tick(address_space &space, const uint32_t channel) +{ + const uint16_t channel_mask = channel << 4; + uint16_t new_count = get_envelope_count(channel); + const uint16_t curr_edd = get_edd(channel); + LOGMASKED(LOG_ENVELOPES, "envelope %d tick, count is %04x, curr edd is %04x\n", channel, new_count, curr_edd); + bool edd_changed = false; + if (new_count == 0) + { + const uint16_t target = get_envelope_target(channel); + uint16_t new_edd = curr_edd; + const uint16_t inc = get_envelope_inc(channel); + + if (new_edd != target) + { + if (get_envelope_sign_bit(channel)) + { + new_edd -= inc; + LOGMASKED(LOG_ENVELOPES, "Envelope %d new EDD-: %04x (%04x), dec %04x\n", channel, new_edd, target, inc); + if (new_edd > curr_edd) + new_edd = 0; + else if (new_edd < target) + new_edd = target; + + if (new_edd == 0) + { + LOGMASKED(LOG_ENVELOPES, "Envelope %d at 0, stopping channel\n", channel); + stop_channel(channel); + return true; + } + } + else + { + new_edd += inc; + LOGMASKED(LOG_ENVELOPES, "Envelope %d new EDD+: %04x\n", channel, new_edd); + if (new_edd >= target) + new_edd = target; + } + } + + if (new_edd == target) + { + LOGMASKED(LOG_ENVELOPES, "Envelope %d at target %04x\n", channel, target); + new_edd = target; + + if (get_envelope_repeat_bit(channel)) + { + const uint16_t repeat_count = get_envelope_repeat_count(channel) - 1; + LOGMASKED(LOG_ENVELOPES, "Repeating envelope, new repeat count %d\n", repeat_count); + if (repeat_count == 0) + { + m_audio_regs[channel_mask | AUDIO_ENVELOPE0] = space.read_word(m_envelope_addr[channel]); + m_audio_regs[channel_mask | AUDIO_ENVELOPE1] = space.read_word(m_envelope_addr[channel] + 1); + m_audio_regs[channel_mask | AUDIO_ENVELOPE_LOOP_CTRL] = space.read_word(m_envelope_addr[channel] + 2); + m_envelope_addr[channel] = get_envelope_addr(channel) + get_envelope_eaoffset(channel); + LOGMASKED(LOG_ENVELOPES, "Envelope data after repeat: %04x %04x %04x (%08x)\n", m_audio_regs[channel_mask | AUDIO_ENVELOPE0], m_audio_regs[channel_mask | AUDIO_ENVELOPE1], m_audio_regs[channel_mask | AUDIO_ENVELOPE_LOOP_CTRL], m_envelope_addr[channel]); + } + else + { + set_envelope_repeat_count(channel, repeat_count); + } + } + else + { + LOGMASKED(LOG_ENVELOPES, "Fetching envelope for channel %d from %08x\n", channel, m_envelope_addr[channel]); + m_audio_regs[channel_mask | AUDIO_ENVELOPE0] = space.read_word(m_envelope_addr[channel]); + m_audio_regs[channel_mask | AUDIO_ENVELOPE1] = space.read_word(m_envelope_addr[channel] + 1); + LOGMASKED(LOG_ENVELOPES, "Fetched envelopes %04x %04x\n", m_audio_regs[channel_mask | AUDIO_ENVELOPE0], m_audio_regs[channel_mask | AUDIO_ENVELOPE1]); + m_envelope_addr[channel] += 2; + } + new_count = get_envelope_load(channel); + set_envelope_count(channel, new_count); + } + else + { + LOGMASKED(LOG_ENVELOPES, "Envelope %d not yet at target %04x (%04x)\n", channel, target, new_edd); + new_count = get_envelope_load(channel); + set_envelope_count(channel, new_count); + } + LOGMASKED(LOG_ENVELOPES, "Envelope %d new count %04x\n", channel, new_count); + + set_edd(channel, new_edd); + edd_changed = true; + LOGMASKED(LOG_ENVELOPES, "Setting channel %d edd to %04x, register is %04x\n", channel, new_edd, m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_DATA]); + } + else + { + new_count--; + set_envelope_count(channel, new_count); + } + LOGMASKED(LOG_ENVELOPES, "envelope %d post-tick, count is now %04x, register is %04x\n", channel, new_count, m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_DATA]); + return edd_changed; +}
\ No newline at end of file diff --git a/src/devices/machine/spg2xx.h b/src/devices/machine/spg2xx.h new file mode 100644 index 00000000000..3e85537dbef --- /dev/null +++ b/src/devices/machine/spg2xx.h @@ -0,0 +1,534 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/***************************************************************************** + + SunPlus SPG2xx-series SoC peripheral emulation + + TODO: + - Serial UART + - I2C + - SPI + +**********************************************************************/ + +#ifndef DEVICES_MACHINE_SPG2XX_H +#define DEVICES_MACHINE_SPG2XX_H + +#pragma once + +#include "emu.h" +#include "cpu/unsp/unsp.h" +#include "sound/okiadpcm.h" +#include "screen.h" + +#define SPG2XX_VISUAL_AUDIO_DEBUG (0) + +class spg2xx_device : public device_t, public device_sound_interface +{ +public: + spg2xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + void set_pal(bool pal) { m_pal_flag = pal ? 1 : 0; } + + void map(address_map &map); + + auto porta_out() { return m_porta_out.bind(); } + auto portb_out() { return m_portb_out.bind(); } + auto portc_out() { return m_portc_out.bind(); } + auto porta_in() { return m_porta_in.bind(); } + auto portb_in() { return m_portb_in.bind(); } + auto portc_in() { return m_portc_in.bind(); } + + auto eeprom_w() { return m_eeprom_w.bind(); } + auto eeprom_r() { return m_eeprom_r.bind(); } + + auto uart_tx() { return m_uart_tx.bind(); } + + auto chip_select() { return m_chip_sel.bind(); } + + void uart_rx(uint8_t data); + + uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); +#if SPG2XX_VISUAL_AUDIO_DEBUG + void advance_debug_pos(); + uint32_t debug_screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); +#endif + DECLARE_WRITE_LINE_MEMBER(vblank); + +protected: + spg2xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const size_t sprite_limit) + : spg2xx_device(mconfig, type, tag, owner, clock) + { + m_sprite_limit = sprite_limit; + } + + // sound stream update overrides + virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override; + + enum + { + PAGE_ENABLE_MASK = 0x0008, + PAGE_BLANK_MASK = 0x0004, + + SPRITE_ENABLE_MASK = 0x0001, + SPRITE_COORD_TL_MASK = 0x0002, + + PAGE_DEPTH_FLAG_MASK = 0x3000, + PAGE_DEPTH_FLAG_SHIFT = 12, + PAGE_TILE_HEIGHT_MASK = 0x00c0, + PAGE_TILE_HEIGHT_SHIFT = 6, + PAGE_TILE_WIDTH_MASK = 0x0030, + PAGE_TILE_WIDTH_SHIFT = 4, + TILE_X_FLIP = 0x0004, + TILE_Y_FLIP = 0x0008 + }; + + void audio_frame_tick(); + void audio_beat_tick(); + void audio_rampdown_tick(const uint32_t channel); + bool audio_envelope_tick(address_space &space, const uint32_t channel); + inline uint32_t get_rampdown_frame_count(const uint32_t channel); + inline uint32_t get_envclk_frame_count(const uint32_t channel); + + // Audio getters + inline bool get_channel_enable(const offs_t channel) const { return m_audio_regs[AUDIO_CHANNEL_ENABLE] & (1 << channel); } + inline bool get_channel_status(const offs_t channel) const { return m_audio_regs[AUDIO_CHANNEL_STATUS] & (1 << channel); } + inline bool get_manual_envelope_enable(const offs_t channel) const { return m_audio_regs[AUDIO_CHANNEL_ENV_MODE] & (1 << channel); } + inline bool get_auto_envelope_enable(const offs_t channel) const { return !get_manual_envelope_enable(channel); } + uint32_t get_envelope_clock(const offs_t channel) const; + + // Audio Mode getters + inline uint16_t get_wave_addr_high(const offs_t channel) const { return m_audio_regs[(channel << 4) | AUDIO_MODE] & AUDIO_WADDR_HIGH_MASK; } + inline uint16_t get_loop_addr_high(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_MODE] & AUDIO_LADDR_HIGH_MASK) >> AUDIO_LADDR_HIGH_SHIFT; } + inline uint16_t get_tone_mode(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_MODE] & AUDIO_TONE_MODE_MASK) >> AUDIO_TONE_MODE_SHIFT; } + inline uint16_t get_16bit_bit(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_MODE] & AUDIO_16M_MASK) ? 1 : 0; } + inline uint16_t get_adpcm_bit(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_MODE] & AUDIO_ADPCM_MASK) ? 1 : 0; } + + // Audio Pan getters + inline uint16_t get_volume(const offs_t channel) const { return m_audio_regs[(channel << 4) | AUDIO_PAN_VOL] & AUDIO_VOLUME_MASK; } + inline uint16_t get_pan(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_PAN_VOL] & AUDIO_PAN_MASK) >> AUDIO_PAN_SHIFT; } + + // Audio Envelope0 Data getters + inline uint16_t get_envelope_inc(const offs_t channel) const { return m_audio_regs[(channel << 4) | AUDIO_ENVELOPE0] & AUDIO_ENVELOPE_INC_MASK; } + inline uint16_t get_envelope_sign_bit(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_ENVELOPE0] & AUDIO_ENVELOPE_SIGN_MASK) ? 1 : 0; } + inline uint16_t get_envelope_target(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_ENVELOPE0] & AUDIO_ENVELOPE_TARGET_MASK) >> AUDIO_ENVELOPE_TARGET_SHIFT; } + inline uint16_t get_repeat_period_bit(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_ENVELOPE0] & AUDIO_ENVELOPE_REPEAT_PERIOD_MASK) ? 1 : 0; } + + // Audio Envelope Data getters + inline uint16_t get_edd(const offs_t channel) const { return m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_DATA] & AUDIO_EDD_MASK; } + inline uint16_t get_envelope_count(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_DATA] & AUDIO_ENVELOPE_COUNT_MASK) >> AUDIO_ENVELOPE_COUNT_SHIFT; } + inline void set_edd(const offs_t channel, uint8_t edd) { m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_DATA] = (m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_DATA] & ~AUDIO_EDD_MASK) | edd; } + inline void set_envelope_count(const offs_t channel, uint16_t count) { m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_DATA] = get_edd(channel) | (count << AUDIO_ENVELOPE_COUNT_SHIFT); } + + // Audio Envelope1 Data getters + inline uint16_t get_envelope_load(const offs_t channel) const { return m_audio_regs[(channel << 4) | AUDIO_ENVELOPE1] & AUDIO_ENVELOPE_LOAD_MASK; } + inline uint16_t get_envelope_repeat_bit(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_ENVELOPE1] & AUDIO_ENVELOPE_RPT_MASK) ? 1 : 0; } + inline uint16_t get_envelope_repeat_count(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_ENVELOPE1] & AUDIO_ENVELOPE_RPCNT_MASK) >> AUDIO_ENVELOPE_RPCNT_SHIFT; } + inline void set_envelope_repeat_count(const offs_t channel, const uint16_t count) { m_audio_regs[(channel << 4) | AUDIO_ENVELOPE1] = (m_audio_regs[(channel << 4) | AUDIO_ENVELOPE1] & ~AUDIO_ENVELOPE_RPCNT_MASK) | ((count << AUDIO_ENVELOPE_RPCNT_SHIFT) & AUDIO_ENVELOPE_RPCNT_MASK); } + + // Audio Envelope Address getters + inline uint16_t get_envelope_addr_high(const offs_t channel) const { return m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_ADDR_HIGH] & AUDIO_EADDR_HIGH_MASK; } + inline uint16_t get_audio_irq_enable_bit(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_ADDR_HIGH] & AUDIO_IRQ_EN_MASK) ? 1 : 0; } + inline uint16_t get_audio_irq_addr(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_ADDR_HIGH] & AUDIO_IRQ_ADDR_MASK) >> AUDIO_IRQ_ADDR_SHIFT; } + + // Audio Envelope Loop getters + inline uint16_t get_envelope_eaoffset(const offs_t channel) const { return m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_LOOP_CTRL] & AUDIO_EAOFFSET_MASK; } + inline uint16_t get_rampdown_offset(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_LOOP_CTRL] & AUDIO_RAMPDOWN_OFFSET_MASK) >> AUDIO_RAMPDOWN_OFFSET_SHIFT; } + inline void set_envelope_eaoffset(const offs_t channel, uint16_t eaoffset) { m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_LOOP_CTRL] = (m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_LOOP_CTRL] & ~AUDIO_RAMPDOWN_OFFSET_MASK) | (eaoffset & AUDIO_EAOFFSET_MASK); } + + // Audio ADPCM getters + inline uint16_t get_point_number(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_ADPCM_SEL] & AUDIO_POINT_NUMBER_MASK) >> AUDIO_POINT_NUMBER_SHIFT; } + inline uint16_t get_adpcm36_bit(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_ADPCM_SEL] & AUDIO_ADPCM36_MASK) ? 1 : 0; } + + // Audio high-word getters + inline uint16_t get_phase_high(const offs_t channel) const { return m_audio_regs[(channel << 4) | AUDIO_PHASE_HIGH] & AUDIO_PHASE_HIGH_MASK; } + inline uint16_t get_phase_accum_high(const offs_t channel) const { return m_audio_regs[(channel << 4) | AUDIO_PHASE_ACCUM_HIGH] & AUDIO_PHASE_ACCUM_HIGH_MASK; } + inline uint16_t get_target_phase_high(const offs_t channel) const { return m_audio_regs[(channel << 4) | AUDIO_TARGET_PHASE_HIGH] & AUDIO_TARGET_PHASE_HIGH_MASK; } + inline uint16_t get_rampdown_clock(const offs_t channel) const { return m_audio_regs[(channel << 4) | AUDIO_RAMP_DOWN_CLOCK] & AUDIO_RAMP_DOWN_CLOCK_MASK; } + + // Audio ADPCM getters + inline uint16_t get_phase_offset(const offs_t channel) const { return m_audio_regs[(channel << 4) | AUDIO_PHASE_CTRL] & AUDIO_PHASE_OFFSET_MASK; } + inline uint16_t get_phase_sign_bit(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_PHASE_CTRL] & AUDIO_PHASE_SIGN_MASK) >> AUDIO_PHASE_SIGN_SHIFT; } + inline uint16_t get_phase_time_step(const offs_t channel) const { return (m_audio_regs[(channel << 4) | AUDIO_PHASE_CTRL] & AUDIO_PHASE_TIME_STEP_MASK) >> AUDIO_PHASE_TIME_STEP_SHIFT; } + + // Audio combined getters + inline uint32_t get_phase(const offs_t channel) const { return ((uint32_t)get_phase_high(channel) << 16) | m_audio_regs[(channel << 4) | AUDIO_PHASE]; } + inline uint32_t get_phase_accum(const offs_t channel) const { return ((uint32_t)get_phase_accum_high(channel) << 16) | m_audio_regs[(channel << 4) | AUDIO_PHASE_ACCUM]; } + inline uint32_t get_target_phase(const offs_t channel) const { return ((uint32_t)get_target_phase_high(channel) << 16) | m_audio_regs[(channel << 4) | AUDIO_TARGET_PHASE]; } + inline uint32_t get_wave_addr(const offs_t channel) const { return ((uint32_t)get_wave_addr_high(channel) << 16) | m_audio_regs[(channel << 4) | AUDIO_WAVE_ADDR]; } + inline uint32_t get_loop_addr(const offs_t channel) const { return ((uint32_t)get_loop_addr_high(channel) << 16) | m_audio_regs[(channel << 4) | AUDIO_LOOP_ADDR]; } + inline uint32_t get_envelope_addr(const offs_t channel) const { return ((uint32_t)get_envelope_addr_high(channel) << 16) | m_audio_regs[(channel << 4) | AUDIO_ENVELOPE_ADDR]; } + + enum + { + AUDIO_WAVE_ADDR = 0x000, + + AUDIO_MODE = 0x001, + AUDIO_WADDR_HIGH_MASK = 0x003f, + AUDIO_LADDR_HIGH_MASK = 0x0fc0, + AUDIO_LADDR_HIGH_SHIFT = 6, + AUDIO_TONE_MODE_MASK = 0x3000, + AUDIO_TONE_MODE_SHIFT = 12, + AUDIO_TONE_MODE_SW = 0, + AUDIO_TONE_MODE_HW_ONESHOT = 1, + AUDIO_TONE_MODE_HW_LOOP = 2, + AUDIO_16M_MASK = 0x4000, + AUDIO_ADPCM_MASK = 0x8000, + + AUDIO_LOOP_ADDR = 0x002, + + AUDIO_PAN_VOL = 0x003, + AUDIO_PAN_VOL_MASK = 0x7f7f, + AUDIO_VOLUME_MASK = 0x007f, + AUDIO_PAN_MASK = 0x7f00, + AUDIO_PAN_SHIFT = 8, + + AUDIO_ENVELOPE0 = 0x004, + AUDIO_ENVELOPE_INC_MASK = 0x007f, + AUDIO_ENVELOPE_SIGN_MASK = 0x0080, + AUDIO_ENVELOPE_TARGET_MASK = 0x7f00, + AUDIO_ENVELOPE_TARGET_SHIFT = 8, + AUDIO_ENVELOPE_REPEAT_PERIOD_MASK = 0x8000, + + AUDIO_ENVELOPE_DATA = 0x005, + AUDIO_ENVELOPE_DATA_MASK = 0xff7f, + AUDIO_EDD_MASK = 0x007f, + AUDIO_ENVELOPE_COUNT_MASK = 0xff00, + AUDIO_ENVELOPE_COUNT_SHIFT = 8, + + AUDIO_ENVELOPE1 = 0x006, + AUDIO_ENVELOPE_LOAD_MASK = 0x00ff, + AUDIO_ENVELOPE_RPT_MASK = 0x0100, + AUDIO_ENVELOPE_RPCNT_MASK = 0xfe00, + AUDIO_ENVELOPE_RPCNT_SHIFT = 9, + + AUDIO_ENVELOPE_ADDR_HIGH = 0x007, + AUDIO_EADDR_HIGH_MASK = 0x003f, + AUDIO_IRQ_EN_MASK = 0x0040, + AUDIO_IRQ_ADDR_MASK = 0xff80, + AUDIO_IRQ_ADDR_SHIFT = 7, + + AUDIO_ENVELOPE_ADDR = 0x008, + AUDIO_WAVE_DATA_PREV = 0x009, + + AUDIO_ENVELOPE_LOOP_CTRL = 0x00a, + AUDIO_EAOFFSET_MASK = 0x01ff, + AUDIO_RAMPDOWN_OFFSET_MASK = 0xfe00, + AUDIO_RAMPDOWN_OFFSET_SHIFT = 9, + + AUDIO_WAVE_DATA = 0x00b, + + AUDIO_ADPCM_SEL = 0x00d, + AUDIO_ADPCM_SEL_MASK = 0xfe00, + AUDIO_POINT_NUMBER_MASK = 0x7e00, + AUDIO_POINT_NUMBER_SHIFT = 9, + AUDIO_ADPCM36_MASK = 0x8000, + + AUDIO_PHASE_HIGH = 0x200, + AUDIO_PHASE_HIGH_MASK = 0x0007, + + AUDIO_PHASE_ACCUM_HIGH = 0x201, + AUDIO_PHASE_ACCUM_HIGH_MASK = 0x0007, + + AUDIO_TARGET_PHASE_HIGH = 0x202, + AUDIO_TARGET_PHASE_HIGH_MASK= 0x0007, + + AUDIO_RAMP_DOWN_CLOCK = 0x203, + AUDIO_RAMP_DOWN_CLOCK_MASK = 0x0007, + + AUDIO_PHASE = 0x204, + AUDIO_PHASE_ACCUM = 0x205, + AUDIO_TARGET_PHASE = 0x206, + + AUDIO_PHASE_CTRL = 0x207, + AUDIO_PHASE_OFFSET_MASK = 0x0fff, + AUDIO_PHASE_SIGN_MASK = 0x1000, + AUDIO_PHASE_SIGN_SHIFT = 12, + AUDIO_PHASE_TIME_STEP_MASK = 0xe000, + AUDIO_PHASE_TIME_STEP_SHIFT = 13, + + AUDIO_CHAN_OFFSET_MASK = 0xf0f, + + AUDIO_CHANNEL_ENABLE = 0x400, + AUDIO_CHANNEL_ENABLE_MASK = 0xffff, + + AUDIO_MAIN_VOLUME = 0x401, + AUDIO_MAIN_VOLUME_MASK = 0x007f, + + AUDIO_CHANNEL_FIQ_ENABLE = 0x402, + AUDIO_CHANNEL_FIQ_ENABLE_MASK = 0xffff, + + AUDIO_CHANNEL_FIQ_STATUS = 0x403, + AUDIO_CHANNEL_FIQ_STATUS_MASK = 0xffff, + + AUDIO_BEAT_BASE_COUNT = 0x404, + AUDIO_BEAT_BASE_COUNT_MASK = 0x07ff, + + AUDIO_BEAT_COUNT = 0x405, + AUDIO_BEAT_COUNT_MASK = 0x3fff, + AUDIO_BIS_MASK = 0x4000, + AUDIO_BIE_MASK = 0x8000, + + AUDIO_ENVCLK0 = 0x406, + + AUDIO_ENVCLK0_HIGH = 0x407, + AUDIO_ENVCLK0_HIGH_MASK = 0xffff, + + AUDIO_ENVCLK1 = 0x408, + + AUDIO_ENVCLK1_HIGH = 0x409, + AUDIO_ENVCLK1_HIGH_MASK = 0xffff, + + AUDIO_ENV_RAMP_DOWN = 0x40a, + AUDIO_ENV_RAMP_DOWN_MASK = 0xffff, + + AUDIO_CHANNEL_STOP = 0x40b, + AUDIO_CHANNEL_STOP_MASK = 0xffff, + + AUDIO_CHANNEL_ZERO_CROSS = 0x40c, + AUDIO_CHANNEL_ZERO_CROSS_MASK = 0xffff, + + AUDIO_CONTROL = 0x40d, + AUDIO_CONTROL_MASK = 0x9fe8, + AUDIO_CONTROL_SATURATE_MASK = 0x8000, + AUDIO_CONTROL_SOFTCH_MASK = 0x1000, + AUDIO_CONTROL_COMPEN_MASK = 0x0800, + AUDIO_CONTROL_NOHIGH_MASK = 0x0400, + AUDIO_CONTROL_NOINT_MASK = 0x0200, + AUDIO_CONTROL_EQEN_MASK = 0x0100, + AUDIO_CONTROL_VOLSEL_MASK = 0x00c0, + AUDIO_CONTROL_VOLSEL_SHIFT = 6, + AUDIO_CONTROL_FOF_MASK = 0x0020, + AUDIO_CONTROL_INIT_MASK = 0x0008, + + AUDIO_COMPRESS_CTRL = 0x40e, + AUDIO_COMPRESS_CTRL_PEAK_MASK = 0x8000, + AUDIO_COMPRESS_CTRL_THRESHOLD_MASK = 0x7f00, + AUDIO_COMPRESS_CTRL_THRESHOLD_SHIFT = 8, + AUDIO_COMPRESS_CTRL_ATTSCALE_MASK = 0x00c0, + AUDIO_COMPRESS_CTRL_ATTSCALE_SHIFT = 6, + AUDIO_COMPRESS_CTRL_RELSCALE_MASK = 0x0030, + AUDIO_COMPRESS_CTRL_RELSCALE_SHIFT = 4, + AUDIO_COMPRESS_CTRL_DISZC_MASK = 0x0008, + AUDIO_COMPRESS_CTRL_RATIO_MASK = 0x0007, + + AUDIO_CHANNEL_STATUS = 0x40f, + AUDIO_CHANNEL_STATUS_MASK = 0xffff, + + AUDIO_WAVE_IN_L = 0x410, + + AUDIO_WAVE_IN_R = 0x411, + AUDIO_SOFTIRQ_MASK = 0x8000, + AUDIO_SOFTIRQ_EN_MASK = 0x4000, + AUDIO_SOFT_PHASE_HIGH_MASK = 0x0070, + AUDIO_SOFT_PHASE_HIGH_SHIFT = 4, + AUDIO_FIFO_IRQ_THRESHOLD_MASK = 0x000f, + + AUDIO_WAVE_OUT_L = 0x412, + AUDIO_WAVE_OUT_R = 0x413, + + AUDIO_CHANNEL_REPEAT = 0x414, + AUDIO_CHANNEL_REPEAT_MASK = 0xffff, + + AUDIO_CHANNEL_ENV_MODE = 0x415, + AUDIO_CHANNEL_ENV_MODE_MASK = 0xffff, + + AUDIO_CHANNEL_TONE_RELEASE = 0x416, + AUDIO_CHANNEL_TONE_RELEASE_MASK = 0xffff, + + AUDIO_CHANNEL_ENV_IRQ = 0x417, + AUDIO_CHANNEL_ENV_IRQ_MASK = 0xffff, + + AUDIO_CHANNEL_PITCH_BEND = 0x418, + AUDIO_CHANNEL_PITCH_BEND_MASK = 0xffff, + + AUDIO_SOFT_PHASE = 0x419, + + AUDIO_ATTACK_RELEASE = 0x41a, + AUDIO_RELEASE_TIME_MASK = 0x00ff, + AUDIO_ATTACK_TIME_MASK = 0xff00, + AUDIO_ATTACK_TIME_SHIFT = 8, + + AUDIO_EQ_CUTOFF10 = 0x41b, + AUDIO_EQ_CUTOFF10_MASK = 0x7f7f, + + AUDIO_EQ_CUTOFF32 = 0x41c, + AUDIO_EQ_CUTOFF32_MASK = 0x7f7f, + + AUDIO_EQ_GAIN10 = 0x41d, + AUDIO_EQ_GAIN10_MASK = 0x7f7f, + + AUDIO_EQ_GAIN32 = 0x41e, + AUDIO_EQ_GAIN32_MASK = 0x7f7f + }; + + DECLARE_READ16_MEMBER(video_r); + DECLARE_WRITE16_MEMBER(video_w); + DECLARE_READ16_MEMBER(audio_r); + DECLARE_WRITE16_MEMBER(audio_w); + DECLARE_READ16_MEMBER(io_r); + DECLARE_WRITE16_MEMBER(io_w); + + void check_irqs(const uint16_t changed); + inline void check_video_irq(); + + void spg2xx_map(address_map &map); + + static const device_timer_id TIMER_TMB1 = 0; + static const device_timer_id TIMER_TMB2 = 1; + static const device_timer_id TIMER_SCREENPOS = 2; + static const device_timer_id TIMER_BEAT = 3; + + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + + void update_porta_special_modes(); + void update_portb_special_modes(); + void do_gpio(uint32_t offset); + + void do_i2c(); + void do_cpu_dma(uint32_t len); + + void do_sprite_dma(uint32_t len); + + void apply_saturation(const rectangle &cliprect); + void apply_fade(const rectangle &cliprect); + void blit(const rectangle &cliprect, uint32_t xoff, uint32_t yoff, uint32_t attr, uint32_t ctrl, uint32_t bitmap_addr, uint16_t tile); + void blit_page(const rectangle &cliprect, int depth, uint32_t bitmap_addr, uint16_t *regs); + void blit_sprite(const rectangle &cliprect, int depth, uint32_t base_addr); + void blit_sprites(const rectangle &cliprect, int depth); + + inline uint8_t expand_rgb5_to_rgb8(uint8_t val); + inline uint8_t mix_channel(uint8_t a, uint8_t b); + void mix_pixel(uint32_t offset, uint16_t rgb); + void set_pixel(uint32_t offset, uint16_t rgb); + + inline void stop_channel(const uint32_t channel); + bool advance_channel(address_space &space, const uint32_t channel); + bool fetch_sample(address_space &space, const uint32_t channel); + inline void loop_channel(const uint32_t channel); + + struct rgbtriad_t + { + uint8_t r, g, b; + }; + + rgbtriad_t m_screenbuf[320 * 240]; + + bool m_hide_page0; + bool m_hide_page1; + bool m_hide_sprites; + bool m_debug_sprites; + bool m_debug_blit; + uint8_t m_sprite_index_to_debug; + + bool m_debug_samples; + bool m_debug_rates; + + uint16_t m_audio_regs[0x800]; + uint8_t m_sample_shift[16]; + uint32_t m_sample_count[16]; + uint32_t m_sample_addr[16]; + double m_channel_rate[16]; + double m_channel_rate_accum[16]; + uint32_t m_rampdown_frame[16]; + uint32_t m_envclk_frame[16]; + uint32_t m_envelope_addr[16]; + int m_channel_debug; + uint16_t m_audio_curr_beat_base_count; + + uint16_t m_io_regs[0x200]; + uint8_t m_uart_rx_fifo[8]; + uint8_t m_uart_rx_index; + + uint16_t m_video_regs[0x100]; + size_t m_sprite_limit; + uint16_t m_pal_flag; + + devcb_write16 m_porta_out; + devcb_write16 m_portb_out; + devcb_write16 m_portc_out; + devcb_read16 m_porta_in; + devcb_read16 m_portb_in; + devcb_read16 m_portc_in; + + devcb_write8 m_eeprom_w; + devcb_read8 m_eeprom_r; + + devcb_write8 m_uart_tx; + + devcb_write8 m_chip_sel; + + emu_timer *m_tmb1; + emu_timer *m_tmb2; + emu_timer *m_screenpos_timer; + emu_timer *m_audio_beat; + + sound_stream *m_stream; + oki_adpcm_state m_adpcm[16]; + + required_device<cpu_device> m_cpu; + required_device<screen_device> m_screen; + required_shared_ptr<uint16_t> m_scrollram; + required_shared_ptr<uint16_t> m_paletteram; + required_shared_ptr<uint16_t> m_spriteram; + +#if SPG2XX_VISUAL_AUDIO_DEBUG + std::unique_ptr<uint8_t[]> m_audio_debug_buffer; + uint16_t m_audio_debug_x; + required_device<screen_device> m_audio_screen; +#endif + + static const uint32_t s_rampdown_frame_counts[8]; + static const uint32_t s_envclk_frame_counts[16]; +}; + +class spg24x_device : public spg2xx_device +{ +public: +#if SPG2XX_VISUAL_AUDIO_DEBUG + template <typename T, typename U, typename V> + spg24x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, U &&screen_tag, V &&debug_screen_tag) +#else + template <typename T, typename U> + spg24x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, U &&screen_tag) +#endif + : spg24x_device(mconfig, tag, owner, clock) + { + m_cpu.set_tag(std::forward<T>(cpu_tag)); + m_screen.set_tag(std::forward<U>(screen_tag)); +#if SPG2XX_VISUAL_AUDIO_DEBUG + m_audio_screen.set_tag(std::forward<V>(debug_screen_tag)); +#endif + } + + spg24x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + +class spg28x_device : public spg2xx_device +{ +public: +#if SPG2XX_VISUAL_AUDIO_DEBUG + template <typename T, typename U, typename V> + spg28x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, U &&screen_tag, V &&debug_screen_tag) +#else + template <typename T, typename U> + spg28x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, U &&screen_tag) +#endif + : spg28x_device(mconfig, tag, owner, clock) + { + m_cpu.set_tag(std::forward<T>(cpu_tag)); + m_screen.set_tag(std::forward<U>(screen_tag)); +#if SPG2XX_VISUAL_AUDIO_DEBUG + m_audio_screen.set_tag(std::forward<V>(debug_screen_tag)); +#endif + } + + spg28x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + +DECLARE_DEVICE_TYPE(SPG24X, spg24x_device) +DECLARE_DEVICE_TYPE(SPG28X, spg28x_device) + +#endif // DEVICES_MACHINE_SPG2XX_H diff --git a/src/devices/machine/sun4c_mmu.cpp b/src/devices/machine/sun4c_mmu.cpp new file mode 100644 index 00000000000..0f5272a1c43 --- /dev/null +++ b/src/devices/machine/sun4c_mmu.cpp @@ -0,0 +1,603 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/*************************************************************************** + + sun4c_mmu.cpp - Sun 4c MMU emulation + +***************************************************************************/ + +#include "emu.h" +#include "sun4c_mmu.h" +#include "cpu/sparc/sparc.h" + +DEFINE_DEVICE_TYPE(SUN4C_MMU, sun4c_mmu_device, "sun4c_mmu", "Sun 4C MMU") + +#define LOG_PAGE_MAP (1U << 0) +#define LOG_SEGMENT_MAP (1U << 1) +#define LOG_INVALID_PTE (1U << 2) +#define LOG_SYSTEM (1U << 3) +#define LOG_CONTEXT (1U << 4) +#define LOG_SYSTEM_ENABLE (1U << 5) +#define LOG_BUSERROR (1U << 6) +#define LOG_CACHE_TAGS (1U << 7) +#define LOG_CACHE_DATA (1U << 8) +#define LOG_UNKNOWN_SYSTEM (1U << 9) +#define LOG_UNKNOWN_SEGMENT (1U << 10) +#define LOG_TYPE0_TIMEOUT (1U << 11) +#define LOG_UNKNOWN_SPACE (1U << 12) +#define LOG_WRITE_PROTECT (1U << 13) +#define LOG_ALL_ASI (1U << 14) // WARNING: Heavy! + +#define VERBOSE (0) +#include "logmacro.h" + +sun4c_mmu_device::sun4c_mmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, SUN4C_MMU, tag, owner, clock) + , m_cpu(*this, finder_base::DUMMY_TAG) + , m_ram(*this, finder_base::DUMMY_TAG) + , m_rom(*this, finder_base::DUMMY_TAG) + , m_scc(*this, finder_base::DUMMY_TAG) + , m_host(nullptr) + , m_type1_r(*this) + , m_type1_w(*this) + , m_rom_ptr(nullptr) + , m_ram_ptr(nullptr) + , m_ram_size(0) + , m_ram_size_words(0) + , m_context(0) + , m_context_masked(0) + , m_system_enable(0) + , m_fetch_bootrom(true) + , m_curr_segmap(nullptr) + , m_curr_segmap_masked(nullptr) +{ +} + +void sun4c_mmu_device::device_start() +{ + m_type1_r.resolve_safe(0xffffffff); + m_type1_w.resolve_safe(); + + // allocate timer for system reset + m_reset_timer = timer_alloc(TIMER_RESET); + m_reset_timer->adjust(attotime::never); + + for (int i = 0; i < 16; i++) + { + save_item(NAME(m_segmap[i]), i); + save_item(NAME(m_segmap_masked[i]), i); + } + + for (int i = 0; i < 16384; i++) + { + save_item(NAME(m_pagemap[i].valid), i); + save_item(NAME(m_pagemap[i].writable), i); + save_item(NAME(m_pagemap[i].supervisor), i); + save_item(NAME(m_pagemap[i].uncached), i); + save_item(NAME(m_pagemap[i].accessed), i); + save_item(NAME(m_pagemap[i].modified), i); + save_item(NAME(m_pagemap[i].page), i); + save_item(NAME(m_pagemap[i].type), i); + } + + save_item(NAME(m_cachetags)); + save_item(NAME(m_cachedata)); + save_item(NAME(m_ram_size)); + save_item(NAME(m_ram_size_words)); + save_item(NAME(m_context)); + save_item(NAME(m_context_masked)); + save_item(NAME(m_system_enable)); + save_item(NAME(m_fetch_bootrom)); + save_item(NAME(m_buserr)); + save_item(NAME(m_page_valid)); + save_item(NAME(m_ctx_mask)); + save_item(NAME(m_pmeg_mask)); + save_item(NAME(m_ram_set_mask)); + save_item(NAME(m_ram_set_base)); + save_item(NAME(m_populated_ram_words)); +} + +void sun4c_mmu_device::device_reset() +{ + m_rom_ptr = (uint32_t *)m_rom->base(); + m_ram_ptr = (uint32_t *)m_ram->pointer(); + m_ram_size = m_ram->size(); + m_ram_size_words = m_ram_size >> 2; + const uint32_t num_16meg_sets = m_ram_size / 0x1000000; + const uint32_t leftover_4meg_size = m_ram_size % 0x1000000; + const uint32_t num_4meg_sets = leftover_4meg_size / 0x400000; + uint32_t base = 0; + uint32_t set = 0; + for (; set < num_16meg_sets; set++) + { + m_ram_set_base[set] = base; + m_ram_set_mask[set] = 0x003fffff; + base += 0x1000000 >> 2; + } + for (; set < num_16meg_sets+num_4meg_sets; set++) + { + m_ram_set_base[set] = base; + m_ram_set_mask[set] = 0x000fffff; + base += 0x400000 >> 2; + } + for (; set < 4; set++) + { + m_ram_set_mask[set] = 0; + m_ram_set_base[set] = 0; + } + m_populated_ram_words = (num_16meg_sets + num_4meg_sets) * (0x1000000 >> 2); + + m_context = 0; + m_context_masked = 0; + m_curr_segmap = m_segmap[0]; + m_curr_segmap_masked = m_segmap_masked[0]; + m_system_enable = 0; + m_fetch_bootrom = true; + + memset(m_buserr, 0, sizeof(uint32_t) * 4); + memset(m_segmap, 0, sizeof(uint8_t) * 16 * 4096); + memset(m_pagemap, 0, sizeof(page_entry_t) * 16384); + memset(m_cachetags, 0, sizeof(uint32_t) * 16384); + memset(m_cachedata, 0, sizeof(uint32_t) * 16384); +} + +void sun4c_mmu_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + if (id == TIMER_RESET) + { + m_reset_timer->adjust(attotime::never); + m_cpu->set_input_line(SPARC_RESET, CLEAR_LINE); + } +} + +uint32_t sun4c_mmu_device::fetch_insn(const bool supervisor, const uint32_t offset) +{ + if (supervisor) + return insn_data_r<SUPER_INSN>(offset, 0xffffffff); + else + return insn_data_r<USER_INSN>(offset, 0xffffffff); +} + +uint32_t sun4c_mmu_device::read_asi(uint8_t asi, uint32_t offset, uint32_t mem_mask) +{ + LOGMASKED(LOG_ALL_ASI, "read_asi %d: %08x & %08x\n", asi, offset << 2, mem_mask); + switch (asi) + { + case 2: + return system_r(offset, mem_mask); + case 3: + return segment_map_r(offset, mem_mask); + case 4: + return page_map_r(offset, mem_mask); + case 8: + return insn_data_r<USER_INSN>(offset, mem_mask); + case 9: + return insn_data_r<SUPER_INSN>(offset, mem_mask); + case 10: + return insn_data_r<USER_DATA>(offset, mem_mask); + case 11: + return insn_data_r<SUPER_DATA>(offset, mem_mask); + case 12: + case 13: + case 14: + cache_flush_r(); + return 0; + default: + return ~0; + } +} + +void sun4c_mmu_device::write_asi(uint8_t asi, uint32_t offset, uint32_t data, uint32_t mem_mask) +{ + LOGMASKED(LOG_ALL_ASI, "write_asi %d: %08x = %08x & %08x\n", asi, offset << 2, data, mem_mask); + switch (asi) + { + case 2: + system_w(offset, data, mem_mask); + return; + case 3: + segment_map_w(offset, data, mem_mask); + return; + case 4: + page_map_w(offset, data, mem_mask); + return; + case 8: + insn_data_w<USER_INSN>(offset, data, mem_mask); + return; + case 9: + insn_data_w<SUPER_INSN>(offset, data, mem_mask); + return; + case 10: + insn_data_w<USER_DATA>(offset, data, mem_mask); + return; + case 11: + insn_data_w<SUPER_DATA>(offset, data, mem_mask); + return; + case 12: + case 13: + case 14: + cache_flush_w(); + return; + default: + return; + } +} + +uint32_t sun4c_mmu_device::cache_flush_r() +{ + // Do nothing for now + return 0; +} + +void sun4c_mmu_device::cache_flush_w() +{ + // Do nothing for now +} + +uint32_t sun4c_mmu_device::system_r(const uint32_t offset, const uint32_t mem_mask) +{ + LOGMASKED(LOG_SYSTEM, "%s: system_r: %08x & %08x\n", machine().describe_context(), offset << 2, mem_mask); + switch (offset >> 26) + { + case 3: // context reg + { + if (mem_mask == 0x00ff0000) + { + LOGMASKED(LOG_CONTEXT, "sun4c_mmu: read context %08x & %08x = %08x\n", offset << 2, mem_mask, m_context<<16); + return m_context<<16; + } + LOGMASKED(LOG_CONTEXT, "sun4c_mmu: read context %08x & %08x = %08x\n", offset << 2, mem_mask, m_context<<24); + return m_context<<24; + } + + case 4: // system enable reg + LOGMASKED(LOG_SYSTEM_ENABLE, "sun4c_mmu: read system enable %08x & %08x = %08x\n", offset << 2, mem_mask, m_system_enable<<24); + return m_system_enable<<24; + + case 6: // bus error register + { + const uint32_t ret = m_buserr[offset & 0xf]; + LOGMASKED(LOG_BUSERROR, "sun4c_mmu: read buserror %08x & %08x = %08x, PC=%x\n", 0x60000000 | (offset << 2), mem_mask, ret, m_cpu->pc()); + m_buserr[offset & 0xf] = 0; // clear on reading + return ret; + } + + case 8: // (d-)cache tags + LOGMASKED(LOG_CACHE_TAGS, "sun4_mmu: read dcache tags @ %x, PC = %x\n", offset, m_cpu->pc()); + return m_cachetags[offset & 0x3fff]; + + case 9: // (d-)cache data + LOGMASKED(LOG_CACHE_DATA, "sun4c_mmu: read dcache data @ %x, PC = %x\n", offset, m_cpu->pc()); + return m_cachedata[offset & 0x3fff]; + + case 0xf: // UART bypass + switch (offset & 3) + { + case 0: if (mem_mask == 0xff000000) return m_scc->cb_r(0)<<24; else return m_scc->db_r(0)<<8; break; + case 1: if (mem_mask == 0xff000000) return m_scc->ca_r(0)<<24; else return m_scc->da_r(0)<<8; break; + } + return 0xffffffff; + + case 0: // IDPROM - SPARCstation-1 does not have an ID prom and a timeout should occur. + default: + LOGMASKED(LOG_UNKNOWN_SYSTEM, "read unhandled ASI 2 space %08x & %08x\n", offset << 2, mem_mask); + return 0; + } +} + +void sun4c_mmu_device::system_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask) +{ + LOGMASKED(LOG_SYSTEM, "system_w: %08x = %08x & %08x\n", offset << 2, data, mem_mask); + switch (offset >> 26) + { + case 3: // context reg + LOGMASKED(LOG_CONTEXT, "write context = %08x & %08x\n", data, mem_mask); + m_context = data >> 24; + m_context_masked = m_context & m_ctx_mask; + m_cache_context = m_context & m_ctx_mask; + m_curr_segmap = m_segmap[m_context_masked]; + m_curr_segmap_masked = m_segmap_masked[m_context_masked]; + return; + + case 4: // system enable reg + { + LOGMASKED(LOG_SYSTEM_ENABLE, "write system enable = %08x & %08x\n", data, mem_mask); + m_system_enable = data >> 24; + m_fetch_bootrom = !(m_system_enable & ENA_NOTBOOT); + + if (m_system_enable & ENA_RESET) + { + m_reset_timer->adjust(attotime::from_usec(1)); + m_cpu->set_input_line(SPARC_RESET, ASSERT_LINE); + } + if (m_system_enable & ENA_RESET) + { + m_system_enable = 0; + m_cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); + m_cpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); + } + return; + } + + case 6: // bus error + { + const uint32_t masked_offset = offset & 0xf; + LOGMASKED(LOG_BUSERROR, "write bus error %08x = %08x & %08x\n", offset << 2, data, mem_mask); + if (masked_offset == 0) + m_buserr[0] = (data & 0x000000ff) | 0x00008000; + else if (masked_offset == 1) + m_buserr[1] = data; + else if (masked_offset == 2) + m_buserr[2] = data & 0x000000b0; + else if (masked_offset == 3) + m_buserr[3] = (data & 0x3fffffff) | ((data & 0x20000000) << 1) | ((data & 0x20000000) << 2); + return; + } + + case 8: // cache tags + LOGMASKED(LOG_CACHE_TAGS, "write cache tags %08x = %08x & %08x\n", offset << 2, data, mem_mask); + m_cachetags[offset&0x3fff] = data & 0x03f8fffc; + return; + + case 9: // cache data + LOGMASKED(LOG_CACHE_DATA, "write cache data %08x = %08x & %08x\n", offset << 2, data, mem_mask); + m_cachedata[offset&0x3fff] = data | (1 << 19); + return; + + case 0xf: // UART bypass + switch (offset & 3) + { + case 0: if (mem_mask == 0xff000000) m_scc->cb_w(0, data>>24); else m_scc->db_w(0, data>>8); break; + case 1: if (mem_mask == 0xff000000) m_scc->ca_w(0, data>>24); else { m_scc->da_w(0, data>>8); printf("%c", data>>8); } break; + } + return; + + case 0: // IDPROM + default: + LOGMASKED(LOG_UNKNOWN_SYSTEM, "write unhandled ASI 2 space %08x = %08x & %08x, PC=%08x\n", offset << 2, data, mem_mask, m_cpu->pc()); + return; + } +} + +uint32_t sun4c_mmu_device::segment_map_r(const uint32_t offset, const uint32_t mem_mask) +{ + uint32_t ret = 0; + if (mem_mask == 0xffff0000) + ret = m_curr_segmap[(offset>>16) & 0xfff]<<16; + else if (mem_mask == 0xff000000) + ret = m_curr_segmap[(offset>>16) & 0xfff]<<24; + else if (mem_mask == 0xffffffff) + ret = m_curr_segmap[(offset>>16) & 0xfff]; + else + LOGMASKED(LOG_UNKNOWN_SEGMENT, "read segment map w/ unknown mask %08x & %08x\n", offset << 2, mem_mask); + LOGMASKED(LOG_SEGMENT_MAP, "read segment map %08x & %08x = %08x\n", offset << 2, mem_mask, ret); + return ret; +} + +void sun4c_mmu_device::segment_map_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask) +{ + LOGMASKED(LOG_SEGMENT_MAP, "write segment map %08x = %08x & %08x\n", offset << 2, data, mem_mask); + + uint8_t segdata = 0; + if (mem_mask == 0xffff0000) segdata = (data >> 16) & 0xff; + else if (mem_mask == 0xff000000) segdata = (data >> 24) & 0xff; + else if (mem_mask == 0xffffffff) segdata = data & 0xff; + else LOGMASKED(LOG_UNKNOWN_SEGMENT, "write segment map w/ unknown mask %08x = %08x & %08x, PC=%08x\n", offset << 2, data, mem_mask, m_cpu->pc()); + + const uint32_t seg = (offset>>16) & 0xfff; + m_curr_segmap[seg] = segdata; + m_curr_segmap_masked[seg] = (segdata & m_pmeg_mask) << 6; +} + +uint32_t sun4c_mmu_device::page_map_r(const uint32_t offset, const uint32_t mem_mask) +{ + const uint32_t page = m_curr_segmap_masked[(offset >> 16) & 0xfff] | ((offset >> 10) & 0x3f); + const uint32_t ret = m_pagemap[page].to_uint(); + LOGMASKED(LOG_PAGE_MAP, "read page map %08x & %08x (%x) = %08x\n", offset << 2, mem_mask, page, ret); + return ret; +} + +void sun4c_mmu_device::page_map_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask) +{ + uint32_t page = m_curr_segmap_masked[(offset >> 16) & 0xfff] | ((offset >> 10) & 0x3f); + LOGMASKED(LOG_PAGE_MAP, "write page map %08x (%x) = %08x & %08x\n", offset << 2, page, data, mem_mask); + m_pagemap[page].merge_uint(data, mem_mask); + m_page_valid[page] = m_pagemap[page].valid; +} + +void sun4c_mmu_device::type0_timeout_r(const uint32_t offset) +{ + LOGMASKED(LOG_TYPE0_TIMEOUT, "type 0 read timeout %08x, PC=%08x\n", offset << 2, m_cpu->pc()); + m_buserr[0] = 0x20; // read timeout + m_buserr[1] = 0x04000000 + (offset << 2); + m_host->set_mae(); +} + +void sun4c_mmu_device::type0_timeout_w(const uint32_t offset) +{ + LOGMASKED(LOG_TYPE0_TIMEOUT, "type 0 write timeout %08x, PC=%08x\n", offset << 2, m_cpu->pc()); + m_buserr[0] = 0x8020; // write timeout + m_buserr[1] = 0x04000000 + (offset << 2); + m_host->set_mae(); +} + +uint32_t sun4c_mmu_device::page_entry_t::to_uint() +{ + return valid | writable | supervisor | uncached | (type << 26) | accessed | modified | (page >> 10); +} + +void sun4c_mmu_device::page_entry_t::merge_uint(uint32_t data, uint32_t mem_mask) +{ + const uint32_t new_value = (to_uint() & ~mem_mask) | (data & mem_mask); + valid = new_value & PM_VALID; + writable = new_value & PM_WRITEMASK; + supervisor = new_value & PM_SYSMASK; + uncached = new_value & PM_CACHE; + type = (new_value & PM_TYPEMASK) >> 26; + accessed = new_value & PM_ACCESSED; + modified = new_value & PM_MODIFIED; + page = (new_value & 0xffff) << 10; +} + +template uint32_t sun4c_mmu_device::insn_data_r<sun4c_mmu_device::USER_INSN>(const uint32_t, const uint32_t); +template uint32_t sun4c_mmu_device::insn_data_r<sun4c_mmu_device::SUPER_INSN>(const uint32_t, const uint32_t); +template uint32_t sun4c_mmu_device::insn_data_r<sun4c_mmu_device::USER_DATA>(const uint32_t, const uint32_t); +template uint32_t sun4c_mmu_device::insn_data_r<sun4c_mmu_device::SUPER_DATA>(const uint32_t, const uint32_t); + +template <sun4c_mmu_device::insn_data_mode MODE> +uint32_t sun4c_mmu_device::insn_data_r(const uint32_t offset, const uint32_t mem_mask) +{ + // supervisor program fetches in boot state are special + if (MODE == SUPER_INSN && m_fetch_bootrom) + { + return m_rom_ptr[offset & 0x1ffff]; + } + + // it's translation time + const uint32_t pmeg = m_curr_segmap_masked[(offset >> 16) & 0xfff];// & m_pmeg_mask; + const uint32_t entry_index = pmeg | ((offset >> 10) & 0x3f); + + if (m_page_valid[entry_index]) + { + page_entry_t &entry = m_pagemap[entry_index]; + entry.accessed = PM_ACCESSED; + + const uint32_t tmp = entry.page | (offset & 0x3ff); + + switch (entry.type) + { + case 0: // type 0 space + if (tmp < m_populated_ram_words) + { + const uint32_t set = (tmp >> 22) & 3; + const uint32_t addr_mask = m_ram_set_mask[set]; + const uint32_t masked_addr = m_ram_set_base[set] + (tmp & addr_mask); + return m_ram_ptr[masked_addr]; + } + else if (tmp >= 0x4000000 >> 2 && tmp < 0x10000000 >> 2) + { + type0_timeout_r(tmp); + } + return ~0; + + case 1: // type 1 space + return m_type1_r(tmp, mem_mask); + + default: + LOGMASKED(LOG_UNKNOWN_SPACE, "read unknown space type %d, %08x & %08x, PC=%08x\n", entry.type, tmp << 2, mem_mask, m_cpu->pc()); + m_host->set_mae(); + m_buserr[0] = 0x20; + m_buserr[1] = offset << 2; + return 0; + } + } + else + { + if (!machine().side_effects_disabled()) + { + LOGMASKED(LOG_INVALID_PTE, "read invalid PTE %d (%08x), %08x & %08x, PC=%08x\n", entry_index, m_pagemap[entry_index].to_uint(), offset << 2, mem_mask, m_cpu->pc()); + m_host->set_mae(); + m_buserr[0] |= 0x80; // invalid PTE + m_buserr[0] &= ~0x8000; // read + m_buserr[1] = offset << 2; + if (mem_mask != ~0 && mem_mask != 0xffff0000 && mem_mask != 0xff000000) + { + if (mem_mask == 0x0000ffff || mem_mask == 0x0000ff00) + { + m_buserr[1] |= 2; + } + else if (mem_mask == 0x00ff0000) + { + m_buserr[1] |= 1; + } + else if (mem_mask == 0x000000ff) + { + m_buserr[1] |= 3; + } + } + } + return 0; + } +} + +template void sun4c_mmu_device::insn_data_w<sun4c_mmu_device::USER_INSN>(const uint32_t, const uint32_t, const uint32_t); +template void sun4c_mmu_device::insn_data_w<sun4c_mmu_device::SUPER_INSN>(const uint32_t, const uint32_t, const uint32_t); +template void sun4c_mmu_device::insn_data_w<sun4c_mmu_device::USER_DATA>(const uint32_t, const uint32_t, const uint32_t); +template void sun4c_mmu_device::insn_data_w<sun4c_mmu_device::SUPER_DATA>(const uint32_t, const uint32_t, const uint32_t); + +template <sun4c_mmu_device::insn_data_mode MODE> +void sun4c_mmu_device::insn_data_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask) +{ + // it's translation time + const uint32_t pmeg = m_curr_segmap_masked[(offset >> 16) & 0xfff];// & m_pmeg_mask; + const uint32_t entry_index = pmeg | ((offset >> 10) & 0x3f); + + if (m_page_valid[entry_index]) + { + page_entry_t &entry = m_pagemap[entry_index]; + if ((!entry.writable) || (entry.supervisor && MODE != SUPER_DATA && MODE != SUPER_INSN)) + { + LOGMASKED(LOG_WRITE_PROTECT, "write protect error with PTE %d (%08x), %08x = %08x & %08x, PC=%08x\n", entry_index, m_pagemap[entry_index].to_uint(), offset << 2, data, mem_mask, m_cpu->pc()); + m_buserr[0] |= 0x8040; // write, protection error + m_buserr[1] = offset << 2; + m_host->set_mae(); + return; + } + + entry.accessed = PM_ACCESSED; + entry.modified = PM_MODIFIED; + + const uint32_t tmp = entry.page | (offset & 0x3ff); + + switch (entry.type) + { + case 0: // type 0 + if (tmp < m_populated_ram_words) + { + const uint32_t set = (tmp >> 22) & 3; + const uint32_t addr_mask = m_ram_set_mask[set]; + const uint32_t masked_addr = m_ram_set_base[set] + (tmp & addr_mask); + COMBINE_DATA((m_ram_ptr + masked_addr)); + } + else if (tmp >= 0x4000000 >> 2 && tmp < 0x10000000 >> 2) + { + type0_timeout_w(tmp); + } + return; + + case 1: // type 1 + m_type1_w(tmp, data, mem_mask); + return; + + default: + LOGMASKED(LOG_UNKNOWN_SPACE, "write unknown space type %d, %08x = %08x & %08x, PC=%08x\n", entry.type, tmp << 2, data, mem_mask, m_cpu->pc()); + m_host->set_mae(); + m_buserr[0] = 0x8020; + m_buserr[1] = offset << 2; + return; + } + } + else + { + LOGMASKED(LOG_INVALID_PTE, "write invalid PTE %d (%08x), %08x = %08x & %08x, PC=%08x\n", entry_index, m_pagemap[entry_index].to_uint(), offset << 2, data, mem_mask, m_cpu->pc()); + m_host->set_mae(); + m_buserr[0] |= 0x8080; // write cycle, invalid PTE + m_buserr[1] = offset << 2; + if (mem_mask != ~0 && mem_mask != 0xffff0000 && mem_mask != 0xff000000) + { + if (mem_mask == 0x0000ffff || mem_mask == 0x0000ff00) + { + m_buserr[1] |= 2; + } + else if (mem_mask == 0x00ff0000) + { + m_buserr[1] |= 1; + } + else if (mem_mask == 0x000000ff) + { + m_buserr[1] |= 3; + } + } + } +} + diff --git a/src/devices/machine/sun4c_mmu.h b/src/devices/machine/sun4c_mmu.h new file mode 100644 index 00000000000..9852013504d --- /dev/null +++ b/src/devices/machine/sun4c_mmu.h @@ -0,0 +1,157 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/*************************************************************************** + + sun4c_mmu.h - Sun 4c MMU emulation + +***************************************************************************/ + +#ifndef MAME_MACHINE_SUN4C_MMU_H +#define MAME_MACHINE_SUN4C_MMU_H + +#pragma once + +#include "cpu/sparc/sparc_intf.h" +#include "machine/ram.h" +#include "machine/z80scc.h" + +class sun4c_mmu_device : public device_t, public sparc_mmu_interface +{ +public: + sun4c_mmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint8_t ctx_mask, uint8_t pmeg_mask) + : sun4c_mmu_device(mconfig, tag, owner, clock) + { + set_ctx_mask(ctx_mask); + set_pmeg_mask(pmeg_mask); + } + + sun4c_mmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + template <typename T> void set_cpu(T &&cpu_tag) { m_cpu.set_tag(std::forward<T>(cpu_tag)); } + template <typename T> void set_ram(T &&ram_tag) { m_ram.set_tag(std::forward<T>(ram_tag)); } + template <typename T> void set_rom(T &&rom_tag) { m_rom.set_tag(std::forward<T>(rom_tag)); } + template <typename T> void set_scc(T &&scc_tag) { m_scc.set_tag(std::forward<T>(scc_tag)); } + + auto type1_r() { return m_type1_r.bind(); } + auto type1_w() { return m_type1_w.bind(); } + + void set_ctx_mask(uint8_t ctx_mask) { m_ctx_mask = ctx_mask; } + void set_pmeg_mask(uint8_t pmeg_mask) { m_pmeg_mask = pmeg_mask; } + + enum insn_data_mode + { + USER_INSN, + SUPER_INSN, + USER_DATA, + SUPER_DATA + }; + + template <insn_data_mode MODE> uint32_t insn_data_r(const uint32_t offset, const uint32_t mem_mask); + template <insn_data_mode MODE> void insn_data_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask); + + // sparc_mmu_device overrides + uint32_t fetch_insn(const bool supervisor, const uint32_t offset) override; + uint32_t read_asi(uint8_t asi, uint32_t offset, uint32_t mem_mask) override; + void write_asi(uint8_t asi, uint32_t offset, uint32_t data, uint32_t mem_mask) override; + void set_host(sparc_mmu_host_interface *host) override { m_host = host; } + +protected: + static const device_timer_id TIMER_RESET = 0; + + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + + uint32_t cache_flush_r(); + void cache_flush_w(); + uint32_t system_r(const uint32_t offset, const uint32_t mem_mask); + void system_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask); + uint32_t segment_map_r(const uint32_t offset, const uint32_t mem_mask); + void segment_map_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask); + uint32_t page_map_r(const uint32_t offset, const uint32_t mem_mask); + void page_map_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask); + void type0_timeout_r(const uint32_t offset); + void type0_timeout_w(const uint32_t offset); + + enum + { + // system enable constants + ENA_NOTBOOT = 0x80, + ENA_SDVMA = 0x20, + ENA_CACHE = 0x10, + ENA_RESET = 0x04, + ENA_DIAG = 0x01, + + // page table entry constants + PM_VALID = 0x80000000, // page is valid + PM_WRITEMASK = 0x40000000, // writable? + PM_SYSMASK = 0x20000000, // system use only? + PM_CACHE = 0x10000000, // cachable? + PM_TYPEMASK = 0x0c000000, // type mask + PM_ACCESSED = 0x02000000, // accessed flag + PM_MODIFIED = 0x01000000 // modified flag + }; + + struct page_entry_t + { + uint32_t valid; + uint32_t writable; + uint32_t supervisor; + uint32_t uncached; + uint32_t accessed; + uint32_t modified; + uint32_t page; + uint8_t type; + uint8_t pad[3]; + + uint32_t to_uint(); + void merge_uint(uint32_t data, uint32_t mem_mask); + }; + + required_device<cpu_device> m_cpu; + required_device<ram_device> m_ram; + required_memory_region m_rom; + required_device<z80scc_device> m_scc; + + sparc_mmu_host_interface *m_host; + + // Bus access callbacks + devcb_read32 m_type1_r; + devcb_write32 m_type1_w; + + // Actual SRAM + uint8_t m_segmap[16][4096]; + page_entry_t m_pagemap[16384]; + uint32_t m_cachetags[16384]; + uint32_t m_cachedata[16384]; + + uint32_t *m_rom_ptr; + uint32_t *m_ram_ptr; + uint32_t m_ram_size; + uint32_t m_ram_size_words; + uint32_t m_context; + uint32_t m_context_masked; + uint32_t m_cache_context; + uint8_t m_system_enable; + bool m_fetch_bootrom; + uint32_t m_buserr[4]; + + // Pre-computed data for optimization purposes + uint32_t m_segmap_masked[16][4096]; + uint8_t *m_curr_segmap; + uint32_t *m_curr_segmap_masked; + bool m_page_valid[16384]; + + // Internal MAME device state + uint8_t m_ctx_mask; // SS2 is sun4c but has 16 contexts; most have 8 + uint8_t m_pmeg_mask; // SS2 is sun4c but has 16384 PTEs; most have 8192 + uint32_t m_ram_set_mask[4]; // Used for mirroring within 4 megabyte sets + uint32_t m_ram_set_base[4]; + uint32_t m_populated_ram_words; + emu_timer *m_reset_timer; +}; + + +DECLARE_DEVICE_TYPE(SUN4C_MMU, sun4c_mmu_device) + +#endif // MAME_MACHINE_SUN4C_MMU_H diff --git a/src/devices/machine/timekpr.cpp b/src/devices/machine/timekpr.cpp index aa7febbf9d4..c9db679e13c 100644 --- a/src/devices/machine/timekpr.cpp +++ b/src/devices/machine/timekpr.cpp @@ -18,6 +18,12 @@ #include "machine/timekpr.h" #include "machine/timehelp.h" +#define LOG_GENERAL (1U << 0) +#define LOG_TICKS (1U << 1) + +#define VERBOSE (0) +#include "logmacro.h" + // device type definition DEFINE_DEVICE_TYPE(M48T02, m48t02_device, "m48t02", "M48T02 Timekeeper") DEFINE_DEVICE_TYPE(M48T35, m48t35_device, "m48t35", "M48T35 Timekeeper") @@ -274,7 +280,7 @@ void timekeeper_device::counters_from_ram() void timekeeper_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) { - logerror("Tick\n"); + LOGMASKED(LOG_TICKS, "Tick\n"); if( ( m_seconds & SECONDS_ST ) != 0 || ( m_control & CONTROL_W ) != 0 ) { @@ -370,7 +376,7 @@ WRITE8_MEMBER(timekeeper_device::watchdog_write) WRITE8_MEMBER( timekeeper_device::write ) { - logerror("timekeeper_device::write: %04x = %02x\n", offset, data); + LOGMASKED(LOG_GENERAL, "timekeeper_device::write: %04x = %02x\n", offset, data); if( offset == m_offset_control ) { if( ( m_control & CONTROL_W ) != 0 && @@ -429,7 +435,7 @@ READ8_MEMBER( timekeeper_device::read ) m_reset_cb(CLEAR_LINE); m_irq_cb(CLEAR_LINE); } - logerror("timekeeper_device::read: %04x (%02x)\n", offset, result); + LOGMASKED(LOG_GENERAL, "timekeeper_device::read: %04x (%02x)\n", offset, result); return result; } diff --git a/src/devices/machine/tms9901.cpp b/src/devices/machine/tms9901.cpp index b0d557b3abf..5282dd6f9f5 100644 --- a/src/devices/machine/tms9901.cpp +++ b/src/devices/machine/tms9901.cpp @@ -12,7 +12,7 @@ CE*| 5 36| S1 INT6*| 6 35| S2 INT5*| 7 34| INT7* / P15 - INT4*| 8 33| int8_t* / P14 + INT4*| 8 33| INT8* / P14 INT3*| 9 32| INT9* / P13 Phi*|10 31| INT10* / P12 INTREQ*|11 30| INT11* / P11 @@ -311,7 +311,7 @@ READ8_MEMBER( tms9901_device::read ) answer &= ~(m_pio_direction_mirror >> 8); answer |= (m_pio_output_mirror & m_pio_direction_mirror) >> 8; } - LOGPINS("input on lines INT15..int8_t = %02x\n", answer); + LOGPINS("input on lines INT15..INT8 = %02x\n", answer); break; case 2: /* exit timer mode */ diff --git a/src/devices/machine/tms9901.h b/src/devices/machine/tms9901.h index eadd549f79e..86a2c6852e3 100644 --- a/src/devices/machine/tms9901.h +++ b/src/devices/machine/tms9901.h @@ -67,6 +67,8 @@ public: auto read_cb() { return m_read_block.bind(); } auto intlevel_cb() { return m_interrupt.bind(); } + uint16_t pio_outputs() const { return m_pio_output | ~m_pio_direction; } + private: static constexpr device_timer_id DECREMENTER = 0; diff --git a/src/devices/machine/tms9902.cpp b/src/devices/machine/tms9902.cpp index c25ea5eacc1..93e48cf03a2 100644 --- a/src/devices/machine/tms9902.cpp +++ b/src/devices/machine/tms9902.cpp @@ -264,6 +264,8 @@ void tms9902_device::device_timer(emu_timer &timer, device_timer_id id, int para // reaches 0. case DECTIMER: m_TIMERR = m_TIMELP; + m_TIMELP = true; + field_interrupts(); break; // Callback for the autonomous operations of the chip. This is normally @@ -865,6 +867,48 @@ void tms9902_device::device_start() m_dectimer = timer_alloc(DECTIMER); m_recvtimer = timer_alloc(RECVTIMER); m_sendtimer = timer_alloc(SENDTIMER); + + save_item(NAME(m_LDCTRL)); + save_item(NAME(m_LDIR)); + save_item(NAME(m_LRDR)); + save_item(NAME(m_LXDR)); + save_item(NAME(m_TSTMD)); + save_item(NAME(m_RTSON)); + save_item(NAME(m_BRKON)); + save_item(NAME(m_BRKout)); + save_item(NAME(m_XBR)); + save_item(NAME(m_XSR)); + save_item(NAME(m_RBR)); + save_item(NAME(m_DSCENB)); + save_item(NAME(m_RIENB)); + save_item(NAME(m_XBIENB)); + save_item(NAME(m_TIMENB)); + save_item(NAME(m_RDR)); + save_item(NAME(m_RDV8)); + save_item(NAME(m_XDR)); + save_item(NAME(m_XDV8)); + save_item(NAME(m_INT)); + save_item(NAME(m_DSCH)); + save_item(NAME(m_CTSin)); + save_item(NAME(m_DSRin)); + save_item(NAME(m_RTSout)); + save_item(NAME(m_TIMELP)); + save_item(NAME(m_TIMERR)); + save_item(NAME(m_XSRE)); + save_item(NAME(m_XBRE)); + save_item(NAME(m_RBRL)); + save_item(NAME(m_RIN)); + save_item(NAME(m_RSBD)); + save_item(NAME(m_RFBD)); + save_item(NAME(m_RFER)); + save_item(NAME(m_ROVER)); + save_item(NAME(m_RPER)); + save_item(NAME(m_RCL)); + save_item(NAME(m_ODDP)); + save_item(NAME(m_PENB)); + save_item(NAME(m_STOPB)); + save_item(NAME(m_CLK4M)); + save_item(NAME(m_TMR)); } DEFINE_DEVICE_TYPE(TMS9902, tms9902_device, "tms9902", "TMS9902 ACC") diff --git a/src/devices/machine/tms9914.cpp b/src/devices/machine/tms9914.cpp index 4f47302a187..a2892eed1cd 100644 --- a/src/devices/machine/tms9914.cpp +++ b/src/devices/machine/tms9914.cpp @@ -285,6 +285,19 @@ WRITE8_MEMBER(tms9914_device::reg8_w) case REG_W_DO: m_reg_do = data; + + if (m_next_eoi) { + m_next_eoi = false; + if (!m_swrst) { + if (m_t_eoi_state == FSM_T_ENIS) { + m_t_eoi_state = FSM_T_ENRS; + } else if (m_t_eoi_state == FSM_T_ENAS) { + m_t_eoi_state = FSM_T_ERAS; + } + } + + } + set_accrq(false); if (!m_swrst) { BIT_CLR(m_reg_int0_status , REG_INT0_BO_BIT); @@ -418,6 +431,55 @@ READ_LINE_MEMBER(tms9914_device::cont_r) // device-level overrides void tms9914_device::device_start() { + save_item(NAME(m_int_line)); + save_item(NAME(m_accrq_line)); + save_item(NAME(m_dio)); + save_item(NAME(m_signals)); + save_item(NAME(m_ext_signals)); + save_item(NAME(m_no_reflection)); + save_item(NAME(m_ext_state_change)); + save_item(NAME(m_reg_int0_status)); + save_item(NAME(m_reg_int0_mask)); + save_item(NAME(m_reg_int1_status)); + save_item(NAME(m_reg_int1_mask)); + save_item(NAME(m_reg_address)); + save_item(NAME(m_reg_serial_p)); + save_item(NAME(m_reg_parallel_p)); + save_item(NAME(m_reg_2nd_parallel_p)); + save_item(NAME(m_reg_di)); + save_item(NAME(m_reg_do)); + save_item(NAME(m_reg_ulpa)); + save_item(NAME(m_swrst)); + save_item(NAME(m_hdfa)); + save_item(NAME(m_hdfe)); + save_item(NAME(m_rtl)); + save_item(NAME(m_gts)); + save_item(NAME(m_rpp)); + save_item(NAME(m_sic)); + save_item(NAME(m_sre)); + save_item(NAME(m_dai)); + save_item(NAME(m_pts)); + save_item(NAME(m_stdl)); + save_item(NAME(m_shdw)); + save_item(NAME(m_vstdl)); + save_item(NAME(m_ah_state)); + save_item(NAME(m_ah_adhs)); + save_item(NAME(m_ah_anhs)); + save_item(NAME(m_sh_state)); + save_item(NAME(m_sh_shfs)); + save_item(NAME(m_sh_vsts)); + save_item(NAME(m_t_state)); + save_item(NAME(m_t_tpas)); + save_item(NAME(m_t_spms)); + save_item(NAME(m_t_eoi_state)); + save_item(NAME(m_l_state)); + save_item(NAME(m_l_lpas)); + save_item(NAME(m_sr_state)); + save_item(NAME(m_rl_state)); + save_item(NAME(m_pp_ppas)); + save_item(NAME(m_c_state)); + save_item(NAME(m_next_eoi)); + m_dio_read_func.resolve_safe(0xff); m_dio_write_func.resolve_safe(); for (auto& f : m_signal_wr_fns) { @@ -1131,6 +1193,7 @@ void tms9914_device::if_cmd_received(uint8_t if_cmd) void tms9914_device::dab_received(uint8_t dab , bool eoi) { LOG("%.6f RX DAB:%02x/%d\n" , machine().time().as_double() , dab , eoi); + m_reg_di = dab; if (!m_shdw) { m_ah_anhs = true; set_int0_bit(REG_INT0_BI_BIT); @@ -1141,7 +1204,6 @@ void tms9914_device::dab_received(uint8_t dab , bool eoi) if (m_hdfe && eoi) { m_ah_aehs = true; } - m_reg_di = dab; } void tms9914_device::do_aux_cmd(unsigned cmd , bool set_bit) @@ -1219,13 +1281,7 @@ void tms9914_device::do_aux_cmd(unsigned cmd , bool set_bit) break; case AUXCMD_FEOI: - if (!m_swrst) { - if (m_t_eoi_state == FSM_T_ENIS) { - m_t_eoi_state = FSM_T_ENRS; - } else if (m_t_eoi_state == FSM_T_ENAS) { - m_t_eoi_state = FSM_T_ERAS; - } - } + m_next_eoi = true; break; case AUXCMD_LON: diff --git a/src/devices/machine/tms9914.h b/src/devices/machine/tms9914.h index 2c21b1a4d4b..08b413af2d9 100644 --- a/src/devices/machine/tms9914.h +++ b/src/devices/machine/tms9914.h @@ -107,6 +107,20 @@ public: template <class Object> devcb_base& set_accrq_write_cb(Object &&cb) { return m_accrq_write_func.set_callback(std::forward<Object>(cb)); } + auto dio_read_cb() { return m_dio_read_func.bind(); } + auto dio_write_cb() { return m_dio_write_func.bind(); } + auto eoi_write_cb() { return m_signal_wr_fns[IEEE_488_EOI].bind(); } + auto dav_write_cb() { return m_signal_wr_fns[IEEE_488_DAV].bind(); } + auto nrfd_write_cb() { return m_signal_wr_fns[IEEE_488_NRFD].bind(); } + auto ndac_write_cb() { return m_signal_wr_fns[IEEE_488_NDAC].bind(); } + auto ifc_write_cb() { return m_signal_wr_fns[IEEE_488_IFC].bind(); } + auto srq_write_cb() { return m_signal_wr_fns[IEEE_488_SRQ].bind(); } + auto atn_write_cb() { return m_signal_wr_fns[IEEE_488_ATN].bind(); } + auto ren_write_cb() { return m_signal_wr_fns[IEEE_488_REN].bind(); } + + auto int_write_cb() { return m_int_write_func.bind(); } + auto accrq_write_cb() { return m_accrq_write_func.bind(); } + DECLARE_WRITE_LINE_MEMBER(eoi_w); DECLARE_WRITE_LINE_MEMBER(dav_w); DECLARE_WRITE_LINE_MEMBER(nrfd_w); @@ -303,6 +317,7 @@ private: void update_ifc(); void update_ren(); void set_accrq(bool state); + bool m_next_eoi; }; // device type definition diff --git a/src/devices/machine/tube.h b/src/devices/machine/tube.h index 17223d22f84..c8d94b1c7a7 100644 --- a/src/devices/machine/tube.h +++ b/src/devices/machine/tube.h @@ -14,27 +14,6 @@ //************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_TUBE_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, TUBE, 0); - -#define MCFG_TUBE_HIRQ_HANDLER(_devcb) \ - downcast<tube_device &>(*device).set_hirq_handler(DEVCB_##_devcb); - -#define MCFG_TUBE_PNMI_HANDLER(_devcb) \ - downcast<tube_device &>(*device).set_pnmi_handler(DEVCB_##_devcb); - -#define MCFG_TUBE_PIRQ_HANDLER(_devcb) \ - downcast<tube_device &>(*device).set_pirq_handler(DEVCB_##_devcb); - -#define MCFG_TUBE_DRQ_HANDLER(_devcb) \ - downcast<tube_device &>(*device).set_drq_handler(DEVCB_##_devcb); - - - -//************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -45,13 +24,9 @@ class tube_device : public device_t { public: // construction/destruction - tube_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + tube_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); // callbacks - template <class Object> devcb_base &set_hirq_handler(Object &&cb) { return m_hirq_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_pnmi_handler(Object &&cb) { return m_pnmi_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_pirq_handler(Object &&cb) { return m_pirq_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_drq_handler(Object &&cb) { return m_drq_handler.set_callback(std::forward<Object>(cb)); } auto hirq_handler() { return m_hirq_handler.bind(); } auto pnmi_handler() { return m_pnmi_handler.bind(); } auto pirq_handler() { return m_pirq_handler.bind(); } diff --git a/src/devices/machine/upd1990a.h b/src/devices/machine/upd1990a.h index a9438b836e9..fbd26e6dfb4 100644 --- a/src/devices/machine/upd1990a.h +++ b/src/devices/machine/upd1990a.h @@ -24,23 +24,6 @@ #include "dirtc.h" - -//************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_UPD1990A_ADD(_tag, _clock, _data, _tp) \ - MCFG_DEVICE_ADD((_tag), UPD1990A, _clock) \ - downcast<upd1990a_device *>(device)->set_data_callback(DEVCB_##_data); \ - downcast<upd1990a_device *>(device)->set_tp_callback(DEVCB_##_tp); - -#define MCFG_UPD4990A_ADD(_tag, _clock, _data, _tp) \ - MCFG_DEVICE_ADD((_tag), UPD4990A, _clock) \ - downcast<upd1990a_device *>(device)->set_data_callback(DEVCB_##_data); \ - downcast<upd1990a_device *>(device)->set_tp_callback(DEVCB_##_tp); - - - //************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -51,10 +34,10 @@ class upd1990a_device : public device_t, public device_rtc_interface { public: // construction/destruction - upd1990a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + upd1990a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 32'768); - template <class Object> void set_data_callback(Object &&data) { m_write_data.set_callback(std::forward<Object>(data)); } - template <class Object> void set_tp_callback(Object &&tp) { m_write_tp.set_callback(std::forward<Object>(tp)); } + auto data_callback() { return m_write_data.bind(); } + auto tp_callback() { return m_write_tp.bind(); } DECLARE_WRITE_LINE_MEMBER( oe_w ); DECLARE_WRITE_LINE_MEMBER( cs_w ); @@ -148,7 +131,7 @@ private: class upd4990a_device : public upd1990a_device { public: - upd4990a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + upd4990a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 32'768); }; diff --git a/src/devices/machine/upd4701.h b/src/devices/machine/upd4701.h index 9fab9024f2c..dcf389ff1c1 100644 --- a/src/devices/machine/upd4701.h +++ b/src/devices/machine/upd4701.h @@ -27,29 +27,16 @@ #pragma once -/*************************************************************************** - MACROS / CONSTANTS -***************************************************************************/ - -#define MCFG_UPD4701_PORTX(_tag) \ - downcast<upd4701_device &>(*device).set_portx_tag(_tag); -#define MCFG_UPD4701_PORTY(_tag) \ - downcast<upd4701_device &>(*device).set_porty_tag(_tag); -#define MCFG_UPD4701_CF_CALLBACK(_devcb) \ - devcb = downcast<upd4701_device &>(*device).set_cf_cb(DEVCB_##_devcb); -#define MCFG_UPD4701_SF_CALLBACK(_devcb) \ - devcb = downcast<upd4701_device &>(*device).set_sf_cb(DEVCB_##_devcb); - class upd4701_device : public device_t { public: - upd4701_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + upd4701_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); // configuration - void set_portx_tag(const char *tag) { m_portx.set_tag(tag); } - void set_porty_tag(const char *tag) { m_porty.set_tag(tag); } - template<class Object> devcb_base &set_cf_cb(Object &&cb) { return m_cf_cb.set_callback(std::forward<Object>(cb)); } - template<class Object> devcb_base &set_sf_cb(Object &&cb) { return m_sf_cb.set_callback(std::forward<Object>(cb)); } + template <typename T> void set_portx_tag(T &&tag) { m_portx.set_tag(std::forward<T>(tag)); } + template <typename T> void set_porty_tag(T &&tag) { m_porty.set_tag(std::forward<T>(tag)); } + auto cf_cb() { return m_cf_cb.bind(); } + auto sf_cb() { return m_sf_cb.bind(); } void x_add(s16 data); void y_add(s16 data); diff --git a/src/devices/machine/upd4992.h b/src/devices/machine/upd4992.h index 6e023bd118d..02627094cf2 100644 --- a/src/devices/machine/upd4992.h +++ b/src/devices/machine/upd4992.h @@ -15,13 +15,6 @@ //************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_UPD4992_ADD(tag) \ - MCFG_DEVICE_ADD((tag), UPD4992, XTAL(32'768)) - -//************************************************************************** // TYPE DEFINITIONS //************************************************************************** diff --git a/src/devices/machine/upd7002.h b/src/devices/machine/upd7002.h index 2dda4bc8e18..5b62d13dc34 100644 --- a/src/devices/machine/upd7002.h +++ b/src/devices/machine/upd7002.h @@ -16,15 +16,6 @@ #pragma once /*************************************************************************** - TYPE DEFINITIONS -***************************************************************************/ - -#define UPD7002_GET_ANALOGUE(name) int name(int channel_number) - -#define UPD7002_EOC(name) void name(int data) - - -/*************************************************************************** MACROS ***************************************************************************/ @@ -36,8 +27,8 @@ public: upd7002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - template <typename Object> void set_get_analogue_callback(Object &&cb) { m_get_analogue_cb = std::forward<Object>(cb); } - template <typename Object> void set_eoc_callback(Object &&cb) { m_eoc_cb = std::forward<Object>(cb); } + template <typename... T> void set_get_analogue_callback(T &&... args) { m_get_analogue_cb = get_analogue_delegate(std::forward<T>(args)...); } + template <typename... T> void set_eoc_callback(T &&... args) { m_eoc_cb = eoc_delegate(std::forward<T>(args)...); } DECLARE_READ8_MEMBER(eoc_r); DECLARE_READ8_MEMBER(read); @@ -94,15 +85,4 @@ private: DECLARE_DEVICE_TYPE(UPD7002, upd7002_device) - -/*************************************************************************** - DEVICE CONFIGURATION MACROS -***************************************************************************/ - -#define MCFG_UPD7002_GET_ANALOGUE_CB(_class, _method) \ - downcast<upd7002_device &>(*device).set_get_analogue_callback(upd7002_device::get_analogue_delegate(&_class::_method, #_class "::" #_method, this)); - -#define MCFG_UPD7002_EOC_CB(_class, _method) \ - downcast<upd7002_device &>(*device).set_eoc_callback(upd7002_device::eoc_delegate(&_class::_method, #_class "::" #_method, this)); - #endif // MAME_MACHINE_UPD7002_H diff --git a/src/devices/machine/upd765.h b/src/devices/machine/upd765.h index ee7dd91b1da..ffe2577fddf 100644 --- a/src/devices/machine/upd765.h +++ b/src/devices/machine/upd765.h @@ -14,66 +14,6 @@ * mode = MODE_AT, MODE_PS2 or MODE_M30 for the fdcs that have reset-time selection */ -#define MCFG_UPD765A_ADD(_tag, _ready, _select) \ - MCFG_DEVICE_ADD(_tag, UPD765A, 0) \ - downcast<upd765a_device *>(device)->set_ready_line_connected(_ready); \ - downcast<upd765a_device *>(device)->set_select_lines_connected(_select); - -#define MCFG_UPD765B_ADD(_tag, _ready, _select) \ - MCFG_DEVICE_ADD(_tag, UPD765B, 0) \ - downcast<upd765b_device *>(device)->set_ready_line_connected(_ready); \ - downcast<upd765b_device *>(device)->set_select_lines_connected(_select); - -#define MCFG_I8272A_ADD(_tag, _ready) \ - MCFG_DEVICE_ADD(_tag, I8272A, 0) \ - downcast<i8272a_device *>(device)->set_ready_line_connected(_ready); - -#define MCFG_UPD72065_ADD(_tag, _ready, _select) \ - MCFG_DEVICE_ADD(_tag, UPD72065, 0) \ - downcast<upd72065_device *>(device)->set_ready_line_connected(_ready); \ - downcast<upd72065_device *>(device)->set_select_lines_connected(_select); - -#define MCFG_I82072_ADD(_tag, _ready) \ - MCFG_DEVICE_ADD(_tag, I82072, 24_MHz_XTAL) \ - downcast<i82072_device *>(device)->set_ready_line_connected(_ready); - -#define MCFG_SMC37C78_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, SMC37C78, 0) - -#define MCFG_N82077AA_ADD(_tag, _mode) \ - MCFG_DEVICE_ADD(_tag, N82077AA, 0) \ - downcast<n82077aa_device *>(device)->set_mode(_mode); - -#define MCFG_PC_FDC_SUPERIO_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, PC_FDC_SUPERIO, 0) - -#define MCFG_DP8473_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, DP8473, 0) - -#define MCFG_PC8477A_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, PC8477A, 0) - -#define MCFG_WD37C65C_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, WD37C65C, 0) - -#define MCFG_MCS3201_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, MCS3201, 0) - -#define MCFG_TC8566AF_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, TC8566AF, 0) - -#define MCFG_MCS3201_INPUT_HANDLER(_devcb) \ - downcast<mcs3201_device &>(*device).set_input_handler(DEVCB_##_devcb); - -#define MCFG_UPD765_INTRQ_CALLBACK(_write) \ - downcast<upd765_family_device &>(*device).set_intrq_wr_callback(DEVCB_##_write); - -#define MCFG_UPD765_DRQ_CALLBACK(_write) \ - downcast<upd765_family_device &>(*device).set_drq_wr_callback(DEVCB_##_write); - -#define MCFG_UPD765_HDL_CALLBACK(_write) \ - downcast<upd765_family_device &>(*device).set_hdl_wr_callback(DEVCB_##_write); - /* Interface required for PC ISA wrapping */ class pc_fdc_interface : public device_t { protected: @@ -101,9 +41,6 @@ class upd765_family_device : public pc_fdc_interface { public: enum { MODE_AT, MODE_PS2, MODE_M30 }; - template <class Object> devcb_base &set_intrq_wr_callback(Object &&cb) { return intrq_cb.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_drq_wr_callback(Object &&cb) { return drq_cb.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_hdl_wr_callback(Object &&cb) { return hdl_cb.set_callback(std::forward<Object>(cb)); } auto intrq_wr_callback() { return intrq_cb.bind(); } auto drq_wr_callback() { return drq_cb.bind(); } auto hdl_wr_callback() { return hdl_cb.bind(); } @@ -454,6 +391,12 @@ public: class upd765b_device : public upd765_family_device { public: + upd765b_device(const machine_config &mconfig, const char *tag, device_t *owner, bool ready, bool select) + : upd765b_device(mconfig, tag, owner, 0U) + { + set_ready_line_connected(ready); + set_select_lines_connected(select); + } upd765b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual void map(address_map &map) override; @@ -461,6 +404,11 @@ public: class i8272a_device : public upd765_family_device { public: + i8272a_device(const machine_config &mconfig, const char *tag, device_t *owner, bool ready) + : i8272a_device(mconfig, tag, owner, 0U) + { + set_ready_line_connected(ready); + } i8272a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual void map(address_map &map) override; @@ -468,7 +416,12 @@ public: class i82072_device : public upd765_family_device { public: - i82072_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + i82072_device(const machine_config &mconfig, const char *tag, device_t *owner, bool ready) + : i82072_device(mconfig, tag, owner) + { + set_ready_line_connected(ready); + } + i82072_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 24'000'000); virtual void map(address_map &map) override; @@ -502,7 +455,7 @@ private: class smc37c78_device : public upd765_family_device { public: - smc37c78_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + smc37c78_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual void map(address_map &map) override; }; @@ -524,6 +477,11 @@ public: class n82077aa_device : public upd765_family_device { public: + n82077aa_device(const machine_config &mconfig, const char *tag, device_t *owner, int mode) + : n82077aa_device(mconfig, tag, owner, 0U) + { + set_mode(mode); + } n82077aa_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual void map(address_map &map) override; @@ -531,38 +489,38 @@ public: class pc_fdc_superio_device : public upd765_family_device { public: - pc_fdc_superio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + pc_fdc_superio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual void map(address_map &map) override; }; class dp8473_device : public upd765_family_device { public: - dp8473_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + dp8473_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual void map(address_map &map) override; }; class pc8477a_device : public upd765_family_device { public: - pc8477a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + pc8477a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual void map(address_map &map) override; }; class wd37c65c_device : public upd765_family_device { public: - wd37c65c_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + wd37c65c_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual void map(address_map &map) override; }; class mcs3201_device : public upd765_family_device { public: - mcs3201_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + mcs3201_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); // configuration helpers - template <class Object> devcb_base &set_input_handler(Object &&cb) { return m_input_handler.set_callback(std::forward<Object>(cb)); } + auto input_handler() { return m_input_handler.bind(); } virtual void map(address_map &map) override; DECLARE_READ8_MEMBER( input_r ); @@ -576,7 +534,7 @@ private: class tc8566af_device : public upd765_family_device { public: - tc8566af_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + tc8566af_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual void map(address_map &map) override; diff --git a/src/devices/machine/vt82c496.h b/src/devices/machine/vt82c496.h index f248247a831..581299f1f3c 100644 --- a/src/devices/machine/vt82c496.h +++ b/src/devices/machine/vt82c496.h @@ -20,7 +20,7 @@ public: // construction/destruction vt82c496_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); - template <typename T> void set_cputag(T &&tag) { m_cpu.set_tag(std::forward<T>(tag)); } + template <typename T> void set_cputag(T &&tag) { m_cpu.set_tag(std::forward<T>(tag)); } template <typename T> void set_ramtag(T &&tag) { m_ram.set_tag(std::forward<T>(tag)); } template <typename T> void set_isatag(T &&tag) { m_rom.set_tag(std::forward<T>(tag)); } diff --git a/src/devices/machine/wd7600.cpp b/src/devices/machine/wd7600.cpp index 2da075c83c4..9c018fede8e 100644 --- a/src/devices/machine/wd7600.cpp +++ b/src/devices/machine/wd7600.cpp @@ -160,15 +160,15 @@ void wd7600_device::device_start() { // FIXME: are all these address ranges correct? m_space_io->install_readwrite_handler(0x0000, 0x000f, read8_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffff); - m_space_io->install_readwrite_handler(0x0020, 0x003f, read8_delegate(FUNC(pic8259_device::read), &(*m_pic1)), write8_delegate(FUNC(pic8259_device::write), &(*m_pic1)), 0xffff); - m_space_io->install_readwrite_handler(0x0040, 0x0043, read8_delegate(FUNC(pit8254_device::read), &(*m_ctc)), write8_delegate(FUNC(pit8254_device::write), &(*m_ctc)), 0xffff); + m_space_io->install_readwrite_handler(0x0020, 0x003f, read8sm_delegate(FUNC(pic8259_device::read), &(*m_pic1)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_pic1)), 0xffff); + m_space_io->install_readwrite_handler(0x0040, 0x0043, read8sm_delegate(FUNC(pit8254_device::read), &(*m_ctc)), write8sm_delegate(FUNC(pit8254_device::write), &(*m_ctc)), 0xffff); m_space_io->install_readwrite_handler(0x0060, 0x0061, read8_delegate(FUNC(wd7600_device::keyb_data_r), this), write8_delegate(FUNC(wd7600_device::keyb_data_w), this), 0x00ff); m_space_io->install_readwrite_handler(0x0060, 0x0061, read8_delegate(FUNC(wd7600_device::portb_r), this), write8_delegate(FUNC(wd7600_device::portb_w), this), 0xff00); m_space_io->install_readwrite_handler(0x0064, 0x0065, read8_delegate(FUNC(wd7600_device::keyb_status_r), this), write8_delegate(FUNC(wd7600_device::keyb_cmd_w), this), 0x00ff); m_space_io->install_readwrite_handler(0x0070, 0x007f, read8_delegate(FUNC(mc146818_device::read), &(*m_rtc)), write8_delegate(FUNC(wd7600_device::rtc_w), this), 0xffff); m_space_io->install_readwrite_handler(0x0080, 0x008f, read8_delegate(FUNC(wd7600_device::dma_page_r), this), write8_delegate(FUNC(wd7600_device::dma_page_w), this), 0xffff); m_space_io->install_readwrite_handler(0x0092, 0x0093, read8_delegate(FUNC(wd7600_device::a20_reset_r), this), write8_delegate(FUNC(wd7600_device::a20_reset_w), this), 0x00ff); - m_space_io->install_readwrite_handler(0x00a0, 0x00a3, read8_delegate(FUNC(pic8259_device::read), &(*m_pic2)), write8_delegate(FUNC(pic8259_device::write), &(*m_pic2)), 0xffff); + m_space_io->install_readwrite_handler(0x00a0, 0x00a3, read8sm_delegate(FUNC(pic8259_device::read), &(*m_pic2)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_pic2)), 0xffff); m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8_delegate(FUNC(am9517a_device::read), &(*m_dma2)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma2)), 0x00ff); m_space_io->install_readwrite_handler(0x2072, 0x2073, read16_delegate(FUNC(wd7600_device::refresh_r), this), write16_delegate(FUNC(wd7600_device::refresh_w), this)); m_space_io->install_readwrite_handler(0x2872, 0x2873, read16_delegate(FUNC(wd7600_device::chipsel_r), this), write16_delegate(FUNC(wd7600_device::chipsel_w), this)); @@ -182,15 +182,15 @@ void wd7600_device::device_start() { assert(m_space_io->data_width() == 32); m_space_io->install_readwrite_handler(0x0000, 0x000f, read8_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffffffff); - m_space_io->install_readwrite_handler(0x0020, 0x003f, read8_delegate(FUNC(pic8259_device::read), &(*m_pic1)), write8_delegate(FUNC(pic8259_device::write), &(*m_pic1)), 0x0000ffff); - m_space_io->install_readwrite_handler(0x0040, 0x0043, read8_delegate(FUNC(pit8254_device::read), &(*m_ctc)), write8_delegate(FUNC(pit8254_device::write), &(*m_ctc)), 0xffffffff); + m_space_io->install_readwrite_handler(0x0020, 0x003f, read8sm_delegate(FUNC(pic8259_device::read), &(*m_pic1)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_pic1)), 0x0000ffff); + m_space_io->install_readwrite_handler(0x0040, 0x0043, read8sm_delegate(FUNC(pit8254_device::read), &(*m_ctc)), write8sm_delegate(FUNC(pit8254_device::write), &(*m_ctc)), 0xffffffff); m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(wd7600_device::keyb_data_r), this), write8_delegate(FUNC(wd7600_device::keyb_data_w), this), 0x000000ff); m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(wd7600_device::portb_r), this), write8_delegate(FUNC(wd7600_device::portb_w), this), 0x0000ff00); m_space_io->install_readwrite_handler(0x0064, 0x0067, read8_delegate(FUNC(wd7600_device::keyb_status_r), this), write8_delegate(FUNC(wd7600_device::keyb_cmd_w), this), 0x000000ff); m_space_io->install_readwrite_handler(0x0070, 0x007f, read8_delegate(FUNC(mc146818_device::read), &(*m_rtc)), write8_delegate(FUNC(wd7600_device::rtc_w), this), 0x0000ffff); m_space_io->install_readwrite_handler(0x0080, 0x008f, read8_delegate(FUNC(wd7600_device::dma_page_r), this), write8_delegate(FUNC(wd7600_device::dma_page_w), this), 0xffffffff); m_space_io->install_readwrite_handler(0x0090, 0x0093, read8_delegate(FUNC(wd7600_device::a20_reset_r), this), write8_delegate(FUNC(wd7600_device::a20_reset_w), this), 0x00ff0000); - m_space_io->install_readwrite_handler(0x00a0, 0x00a3, read8_delegate(FUNC(pic8259_device::read), &(*m_pic2)), write8_delegate(FUNC(pic8259_device::write), &(*m_pic2)), 0x0000ffff); + m_space_io->install_readwrite_handler(0x00a0, 0x00a3, read8sm_delegate(FUNC(pic8259_device::read), &(*m_pic2)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_pic2)), 0x0000ffff); m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8_delegate(FUNC(am9517a_device::read), &(*m_dma2)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma2)), 0x00ff00ff); m_space_io->install_readwrite_handler(0x2070, 0x2073, read16_delegate(FUNC(wd7600_device::refresh_r), this), write16_delegate(FUNC(wd7600_device::refresh_w), this), 0xffff0000); m_space_io->install_readwrite_handler(0x2870, 0x2873, read16_delegate(FUNC(wd7600_device::chipsel_r), this), write16_delegate(FUNC(wd7600_device::chipsel_w), this), 0xffff0000); diff --git a/src/devices/machine/x2201.cpp b/src/devices/machine/x2201.cpp new file mode 100644 index 00000000000..eb7ebd50f05 --- /dev/null +++ b/src/devices/machine/x2201.cpp @@ -0,0 +1,189 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + Xicor X2201 1024 x 1 bit Nonvolatile Static RAM + + This was Xicor's first NOVRAM product, combining static RAM with + an E²PROM overlay. Besides having separate data input and output + lines (and only one of each), its interface differs slightly from + the later NOVRAMs in requiring an active chip select during recall + and store operations. + + While US patent 4535411A suggests that this device was sometimes + used in groups of eight to simulate a byte-wide memory, the + emulation (for the most part) assumes each bit will be accessed + separately and packs them into bytes for storage efficiency. + +**********************************************************************/ + +#include "emu.h" +#include "machine/x2201.h" +#include <algorithm> + + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +DEFINE_DEVICE_TYPE(X2201, x2201_device, "x2201", "Xicor X2201 1024x1 NOVRAM") + + +//************************************************************************** +// DEVICE CONSTRUCTION AND INITIALIZATION +//************************************************************************** + +//------------------------------------------------- +// x2201_device - constructor +//------------------------------------------------- + +x2201_device::x2201_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, X2201, tag, owner, clock) + , device_nvram_interface(mconfig, *this) + , m_default_data(*this, DEVICE_SELF, 1024 / 8) + , m_cs(false) + , m_store(false) + , m_array_recall(false) +{ +} + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void x2201_device::device_start() +{ + // create arrays + m_ram = make_unique_clear<u8[]>(1024 / 8); + m_eeprom = std::make_unique<u8[]>(1028 / 8); + + // register state for saving + save_pointer(NAME(m_ram), 1024 / 8); + save_pointer(NAME(m_eeprom), 1024 / 8); + save_item(NAME(m_cs)); + save_item(NAME(m_store)); + save_item(NAME(m_array_recall)); +} + + +//************************************************************************** +// NVRAM INTERFACE +//************************************************************************** + +//------------------------------------------------- +// nvram_default - called to initialize NVRAM to +// its default state +//------------------------------------------------- + +void x2201_device::nvram_default() +{ + // erase to ones unless region overrides + if (m_default_data.found()) + std::copy_n(&m_default_data[0], 1024 / 8, &m_eeprom[0]); + else + std::fill_n(&m_eeprom[0], 1024 / 8, 0xff); +} + + +//------------------------------------------------- +// nvram_read - called to read NVRAM from the +// specified file +//------------------------------------------------- + +void x2201_device::nvram_read(emu_file &file) +{ + file.read(&m_eeprom[0], 1024 / 8); +} + + +//------------------------------------------------- +// nvram_write - called to write NVRAM to the +// specified file +//------------------------------------------------- + +void x2201_device::nvram_write(emu_file &file) +{ + file.write(&m_eeprom[0], 1024 / 8); +} + + +//************************************************************************** +// MEMORY ACCESS +//************************************************************************** + +//------------------------------------------------- +// read - read the addressed bit of RAM +//------------------------------------------------- + +u8 x2201_device::read(offs_t offset) +{ + return BIT(m_ram[(offset >> 3) & 127], offset & 7); +} + + +//------------------------------------------------- +// read_byte - read 8 bits of data from RAM +// (FIXME: remove once CRU reads are 1-bit) +//------------------------------------------------- + +u8 x2201_device::read_byte(offs_t offset) +{ + return m_ram[offset & 127]; +} + + +//------------------------------------------------- +// write - write one bit of data to RAM +//------------------------------------------------- + +void x2201_device::write(offs_t offset, u8 data) +{ + offs_t address = (offset >> 3) & 127; + if (BIT(data, 0)) + m_ram[address] |= 1 << (offset & 7); + else + m_ram[address] &= ~(1 << (offset & 7)); +} + + +//************************************************************************** +// CONTROL STROBES +//************************************************************************** + +//------------------------------------------------- +// cs_w - write to the CS line (active low) +//------------------------------------------------- + +WRITE_LINE_MEMBER(x2201_device::cs_w) +{ + m_cs = !state; +} + + +//------------------------------------------------- +// store_w - trigger to store RAM data in EEPROM +// (active low) +//------------------------------------------------- + +WRITE_LINE_MEMBER(x2201_device::store_w) +{ + if (m_cs && !state && !m_store) + std::copy_n(&m_ram[0], 1024 / 8, &m_eeprom[0]); + + m_array_recall = !state; +} + + +//------------------------------------------------- +// array_recall_w - trigger to pull EEPROM data +// into RAM (active low) +//------------------------------------------------- + +WRITE_LINE_MEMBER(x2201_device::array_recall_w) +{ + if (m_cs && !state && !m_array_recall) + std::copy_n(&m_eeprom[0], 1024 / 8, &m_ram[0]); + + m_array_recall = !state; +} diff --git a/src/devices/machine/x2201.h b/src/devices/machine/x2201.h new file mode 100644 index 00000000000..670c69b349c --- /dev/null +++ b/src/devices/machine/x2201.h @@ -0,0 +1,75 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/*************************************************************************** + + Xicor X2201 1024 x 1 bit Nonvolatile Static RAM + +**************************************************************************** + ____ ____ + A0 1 |* \_/ | 18 Vcc + A1 2 | | 17 A5 + A2 3 | | 16 A6 + A3 4 | | 15 A7 + A4 5 | X2201 | 14 A8 + DOut 6 | | 13 A9 + /STORE 7 | | 12 DIn + /WE 8 | | 11 /ARRAY RECALL + GND 9 |___________| 10 /CS + +***************************************************************************/ + +#ifndef MAME_MACHINE_X2201_H +#define MAME_MACHINE_X2201_H + +#pragma once + + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> x2201_device + +class x2201_device : public device_t, public device_nvram_interface +{ +public: + // construction/destruction + x2201_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); + + // read/write handlers + u8 read(offs_t offset); + u8 read_byte(offs_t offset); // hack + void write(offs_t offset, u8 data); + + // control lines + DECLARE_WRITE_LINE_MEMBER(cs_w); + DECLARE_WRITE_LINE_MEMBER(array_recall_w); + DECLARE_WRITE_LINE_MEMBER(store_w); + +protected: + // device-level overrides + virtual void device_start() override; + + // device_nvram_interface overrides + virtual void nvram_default() override; + virtual void nvram_read(emu_file &file) override; + virtual void nvram_write(emu_file &file) override; + +private: + // optional default data + optional_region_ptr<u8> m_default_data; + + // memory arrays + std::unique_ptr<u8[]> m_ram; + std::unique_ptr<u8[]> m_eeprom; + + // line state + bool m_cs; + bool m_store; + bool m_array_recall; +}; + +// device type definition +DECLARE_DEVICE_TYPE(X2201, x2201_device) + +#endif // MAME_MACHINE_X2201_H diff --git a/src/devices/machine/z8038.cpp b/src/devices/machine/z8038.cpp new file mode 100644 index 00000000000..7cd55fb6d45 --- /dev/null +++ b/src/devices/machine/z8038.cpp @@ -0,0 +1,700 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +/* + * An emulation of the Zilog Z8038 FIO FIFO Input/Output Interface Unit. + * + * Sources: + * + * http://datasheet.datasheetarchive.com/originals/scans/Scans-98/DSAIHSC00090399.pdf + * + * The external interface uses port number 1 and 2 per the documentation, while + * the implementation uses port number 0 and 1 for convenience. + * + * TODO + * - more i/o lines and handshake + * - Z-BUS interrupt/acknowledge + * - dma cycles + * - fifo save state + */ + +#include "emu.h" +#include "z8038.h" + +#define LOG_GENERAL (1U << 0) +#define LOG_REG (1U << 1) +#define LOG_FIFO (1U << 2) +#define LOG_INT (1U << 3) + +//#define VERBOSE (LOG_GENERAL|LOG_REG|LOG_FIFO|LOG_INT) + +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(Z8038, z8038_device, "z8038", "FIFO Input/Output Interface Unit") + +z8038_device::z8038_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, Z8038, tag, owner, clock) + , m_out_int_cb{ *this, *this } + , m_out_E_cb(*this) + , m_out_F_cb(*this) + , m_out_H_cb(*this) + , m_out_J_cb(*this) +{ +} + +template <u8 Port> void z8038_device::zbus_map(address_map &map) +{ + map(0x0, 0xf).rw(FUNC(z8038_device::zbus_reg_r<Port>), FUNC(z8038_device::zbus_reg_w<Port>)); + + // port 2 can not write to control register 2 + if (Port == 2) + map(0x9, 0x9).unmapw(); + + // Message In register is read-only + map(0xc, 0xc).unmapw(); +} + +// instantiate maps for port 1 and 2 +template void z8038_device::zbus_map<1>(address_map &map); +template void z8038_device::zbus_map<2>(address_map &map); + +void z8038_device::device_start() +{ + m_out_int_cb[0].resolve_safe(); + m_out_int_cb[1].resolve_safe(); + + m_out_E_cb.resolve_safe(); + m_out_F_cb.resolve_safe(); + m_out_H_cb.resolve_safe(); + m_out_J_cb.resolve_safe(); + + save_item(NAME(m_control_2)); + save_item(NAME(m_control_3)); + + for (u8 port = 0; port < 2; port++) + { + save_item(m_port[port].reg_state, "state", port + 1); + save_item(m_port[port].reg_pointer, "pointer", port + 1); + save_item(m_port[port].int_code, "int_code", port + 1); + save_item(m_port[port].int_asserted, "int_asserted", port + 1); + + save_item(m_port[port].control_0, "control_0", port + 1); + save_item(m_port[port].control_1, "control_1", port + 1); + save_item(m_port[port].interrupt_status, "interrupt_status", port + 1); + save_item(m_port[port].interrupt_vector, "interrupt_vector", port + 1); + save_item(m_port[port].byte_count, "byte_count", port + 1); + save_item(m_port[port].byte_count_comparison, "byte_count_comparison", port + 1); + save_item(m_port[port].message_in, "message_in", port + 1); + save_item(m_port[port].pattern_match, "pattern_match", port + 1); + save_item(m_port[port].pattern_mask, "pattern_mask", port + 1); + save_item(m_port[port].data_buffer, "data_buffer", port + 1); + } + + //save_item(NAME(m_fifo)); + + m_int_check = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(z8038_device::int_check), this)); + + // suppress startup interrupt line changes + m_port[0].int_asserted = false; + m_port[1].int_asserted = false; +} + +void z8038_device::device_reset() +{ + m_control_2 = 0; + + for (u8 port = 0; port < 2; port++) + { + m_port[port].reg_state = 0; + m_port[port].reg_pointer = 0; + m_port[port].int_code = 0; + m_port[port].control_0 = CR0_RESET; + set_int_state(port, false); + } +} + +u8 z8038_device::reg_r(u8 const port) +{ + /* + * The Port 2 CPU can determine when it is enabled by reading its Control + * Register 0, which is read as a "floating" data bus if not enabled or as + * 01H if enabled. + * + * FIXME: unsure what value to return for floating data bus + */ + if (port && !(m_control_2 & CR2_P2EN)) + return 0xff; + + // FIXME: reads from port 2 in i/o mode + if (port && (m_port[port].control_0 & CR0_P2M_IO)) + fatalerror("unexpected register read from Port 2 in i/o mode\n"); + + /* + * After reset is asserted, the only register that can be read from or + * written to is Control Register 0 (Control Register 0 will read a 01H). + */ + if (m_port[port].control_0 & CR0_RESET) + return m_port[port].control_0; + + u8 data = 0; + switch (m_port[port].reg_pointer) + { + case 0x0: data = control_0_r(port); break; + case 0x1: data = control_1_r(port); break; + case 0x2: data = interrupt_status_r<0>(port); break; + case 0x3: data = interrupt_status_r<1>(port); break; + case 0x4: data = interrupt_status_r<2>(port); break; + case 0x5: data = interrupt_status_r<3>(port); break; + case 0x6: data = interrupt_vector_r(port); break; + case 0x7: data = byte_count_r(port); break; + case 0x8: data = byte_count_comparison_r(port); break; + case 0x9: data = control_2_r(port); break; + case 0xa: data = control_3_r(port); break; + case 0xb: data = message_out_r(port); break; + case 0xc: data = message_in_r(port); break; + case 0xd: data = pattern_match_r(port); break; + case 0xe: data = pattern_mask_r(port); break; + case 0xf: data = fifo_r(port); break; + } + + m_port[port].reg_state = 0; + + LOGMASKED(LOG_REG, "reg_r port %d reg %d data 0x%02x\n", port + 1, m_port[port].reg_pointer, data); + + return data; +} + +void z8038_device::reg_w(u8 const port, u8 data) +{ + // check port 2 enabled + if (port && !(m_control_2 & CR2_P2EN)) + return; + + // FIXME: writes from port 2 in i/o mode + if (port && (m_port[port].control_0 & CR0_P2M_IO)) + fatalerror("unexpected register write from Port 2 in i/o mode\n"); + + /* + * If C/D̅ is 1, the next byte writes into Control Register 0. When in the + * reset state, a write should not be done when C/D̅ is 0. The reset state + * is exited by writing 00H when C/D̅ is 1. + */ + if (m_port[port].control_0 & CR0_RESET) + { + if (data == 0) + { + LOG("reg_w port %d reset state cleared\n", port + 1); + m_port[port].reg_pointer = 0; + m_port[port].reg_state = 0; + + m_port[port].control_0 = data; + } + + return; + } + + if (m_port[port].reg_state == 1) + { + switch (m_port[port].reg_pointer) + { + case 0x0: control_0_w(port, data); break; + case 0x1: control_1_w(port, data); break; + case 0x2: interrupt_status_w<0>(port, data); break; + case 0x3: interrupt_status_w<1>(port, data); break; + case 0x4: interrupt_status_w<2>(port, data); break; + case 0x5: interrupt_status_w<3>(port, data); break; + case 0x6: interrupt_vector_w(port, data); break; + case 0x7: break; // byte count register (read only) + case 0x8: byte_count_comparison_w(port, data); break; + case 0x9: control_2_w(port, data); break; + case 0xa: control_3_w(port, data); break; + case 0xb: message_out_w(port, data); break; + case 0xc: break; // message in register (read only) + case 0xd: pattern_match_w(port, data); break; + case 0xe: pattern_mask_w(port, data); break; + case 0xf: fifo_w(port, data); break; + } + + LOGMASKED(LOG_REG, "reg_w port %d reg %d data 0x%02x\n", port + 1, m_port[port].reg_pointer, data); + + // schedule interrupt check (don't duplicate for fifo) + if (m_port[port].reg_pointer != 0xf) + m_int_check->adjust(attotime::zero); + } + else + m_port[port].reg_pointer = data & 0xf; + + m_port[port].reg_state = !m_port[port].reg_state; +} + +u8 z8038_device::fifo_r(u8 const port) +{ + // check for underflow + if (!m_fifo.empty()) + { + m_port[port].data_buffer = m_fifo.dequeue(); + + fifo_update(); + + LOGMASKED(LOG_FIFO, "fifo_r port %d data 0x%02x\n", port + 1, m_port[port].data_buffer); + } + else + m_port[port].interrupt_status[2] |= (ISR2_UF | ISR2_EIP); + + // schedule interrupt check + m_int_check->adjust(attotime::zero); + + return m_port[port].data_buffer; +} + +void z8038_device::fifo_w(u8 const port, u8 data) +{ + // check for overflow + if (!m_fifo.full()) + { + m_port[port].data_buffer = data; + m_fifo.enqueue(m_port[port].data_buffer); + + fifo_update(); + + LOGMASKED(LOG_FIFO, "fifo_w port %d data 0x%02x\n", port + 1, m_port[port].data_buffer); + } + else + m_port[port].interrupt_status[2] |= (ISR2_OF | ISR2_EIP); + + // schedule interrupt check + m_int_check->adjust(attotime::zero); +} + +u8 z8038_device::control_1_r(u8 const port) +{ + /* + * Bit 5 (Message Register Out Full), if set, indicates that the CPU has + * placed a message in its Message Out register. This bit is reset when the + * receiving CPU reads the message in its Message In register. This bit is + * the other CPU's message IP bit and is a read-only bit. Bit 4 (Message + * Register Interrupt Under Service), if set, indicates that the other CPU + * has received a message in its Message In register. This bit is the + * message IUS (Interrupt Under Service) bit of the other CPU and is a + * read-only bit. + */ + u8 data = m_port[port].control_1; + + if (m_port[!port].interrupt_status[0] & ISR0_MIP) + data |= CR1_MMRF; + + if (m_port[!port].interrupt_status[0] & ISR0_MIUS) + data |= CR1_MMRUS; + + return data; +} + +u8 z8038_device::interrupt_vector_r(u8 const port) +{ + /* + * When MIE is 1, other than during an Interrupt Acknowledge cycle, the + * Interrupt Vector register always reflects the FIO status in these bits, + * regardless of whether or not the Vector Includes Status bit is set. + */ + if (m_port[port].control_0 & CR0_MIE) + return (m_port[port].interrupt_vector & 0xf1) | (m_port[port].int_code << 1); + else + return m_port[port].interrupt_vector; +} + +u8 z8038_device::byte_count_r(u8 const port) +{ + /* + * Bit 6 is reset upon completion of the CPU read of the Byte Count + * register. The ongoing count appears in t he Byte Count register after + * the read. + */ + if (m_port[port].control_1 & CR1_FBCR) + m_port[port].control_1 &= ~CR1_FBCR; + + return m_port[port].byte_count; +} + +u8 z8038_device::control_3_r(u8 const port) +{ + u8 const mask = (port == 0) ? 0xff : 0xf0; + + // return direction relative to controlling port + if (bool(m_control_3 & CR3_P2DIR) != bool(port)) + return (m_control_3 & mask) ^ CR3_DIR; + else + return (m_control_3 & mask); +} + +u8 z8038_device::message_in_r(u8 const port) +{ + /* + * When the Port 2 CPU reads the data from its Message In register, the + * Port 2 IP is cleared. + */ + m_port[port].interrupt_status[0] &= ~ISR0_MIP; + + return m_port[port].message_in; +} + +void z8038_device::control_0_w(u8 const port, u8 data) +{ + if (!(data & CR0_RESET)) + { + if (port == 0) + m_port[port].control_0 = data; + else + m_port[port].control_0 = (m_port[!port].control_0 & CR0_P2M) | (data & ~CR0_P2M); + } + else + port_reset(port); +} + +void z8038_device::control_1_w(u8 const port, u8 data) +{ + m_port[port].control_1 = data & CR1_WMASK; +} + +template <u8 Number> void z8038_device::interrupt_status_w(u8 const port, u8 data) +{ + // high interrupt status + switch (data & ISR_HMASK) + { + case 0x20: m_port[port].interrupt_status[Number] &= ~(ISR_HIUS | ISR_HIP); break; + case 0x40: m_port[port].interrupt_status[Number] |= ISR_HIUS; break; + case 0x60: m_port[port].interrupt_status[Number] &= ~ISR_HIUS; break; + case 0x80: m_port[port].interrupt_status[Number] |= ISR_HIP; break; + case 0xa0: m_port[port].interrupt_status[Number] &= ~ISR_HIP; break; + case 0xc0: m_port[port].interrupt_status[Number] |= ISR_HIE; break; + case 0xe0: m_port[port].interrupt_status[Number] &= ~ISR_HIE; break; + } + + // low interrupt status + if (Number != 0) + { + switch (data & ISR_LMASK) + { + case 0x02: m_port[port].interrupt_status[Number] &= ~(ISR_LIUS | ISR_LIP); break; + case 0x04: m_port[port].interrupt_status[Number] |= ISR_LIUS; break; + case 0x06: m_port[port].interrupt_status[Number] &= ~ISR_LIUS; break; + case 0x08: m_port[port].interrupt_status[Number] |= ISR_LIP; break; + case 0x0a: m_port[port].interrupt_status[Number] &= ~ISR_LIP; break; + case 0x0c: m_port[port].interrupt_status[Number] |= ISR_LIE; break; + case 0x0e: m_port[port].interrupt_status[Number] &= ~ISR_LIE; break; + } + } +} + +// instantiate helpers for each interrupt status register +template void z8038_device::interrupt_status_w<0>(u8 const port, u8 data); +template void z8038_device::interrupt_status_w<1>(u8 const port, u8 data); +template void z8038_device::interrupt_status_w<2>(u8 const port, u8 data); +template void z8038_device::interrupt_status_w<3>(u8 const port, u8 data); + +void z8038_device::byte_count_comparison_w(u8 const port, u8 data) +{ + /* + * The largest programmable value is 7Fh (127 decimal). + */ + m_port[port].byte_count_comparison = data & 0x7f; + + // check byte count comparison + if (m_fifo.queue_length() == m_port[port].byte_count_comparison) + m_port[port].interrupt_status[2] |= ISR2_BCCIP; +} + +void z8038_device::control_2_w(u8 const port, u8 data) +{ + if (port == 0) + m_control_2 = data & CR2_WMASK; + else + logerror("cannot write to control register 2 from port 2\n"); +} + +void z8038_device::control_3_w(u8 const port, u8 data) +{ + if (m_port[port].control_0 & CR0_P2M_IO) + { + // update all except unused and input line bits + m_control_3 = data & ~(CR3_UNUSED | CR3_P2IN0); + + // update output lines + m_out_H_cb(m_control_3 & CR3_P2OUT1 ? 1 : 0); + m_out_J_cb(m_control_3 & CR3_P2OUT3 ? 1 : 0); + + // update clear if configured as output + if (!(m_control_3 & CR3_P2CLR)) + { + if (!(m_control_3 & CR3_CLR)) + fifo_clear(); + + m_out_E_cb(m_control_3 & CR3_CLR ? 1 : 0); + } + + // update direction if configured as output + if (!(m_control_3 & CR3_P2DIR)) + m_out_F_cb(m_control_3 & CR3_DIR ? 1 : 0); + + // TODO: resample input lines? + } + else + { + if (port == 0) + { + // flag interrupt pending if in control and changing direction + if (!(data & CR3_P2DIR) && ((data ^ m_control_3) & CR3_DIR)) + m_port[!port].interrupt_status[1] |= ISR1_DDCIP; + + // update clear and direction bits only if in control + u8 const mask = (CR3_P2CLR | CR3_P2DIR | CR3_P2OUT3 | CR3_P2OUT1) + | (data & CR3_P2CLR ? 0 : CR3_CLR) + | (data & CR3_P2DIR ? 0 : CR3_DIR); + + m_control_3 = (m_control_3 & ~mask) | (data & mask); + + // clear fifo + if (!(m_control_3 & (CR3_P2CLR | CR3_CLR))) + fifo_clear(); + } + else + { + // flag interrupt pending if in control and changing direction + if ((data & CR3_P2DIR) && ((data ^ m_control_3) & CR3_DIR)) + m_port[!port].interrupt_status[1] |= ISR1_DDCIP; + + // update clear and direction bits only if in control + u8 const mask = (m_control_3 & (CR3_P2CLR | CR3_P2DIR)) >> 1; + + m_control_3 = (m_control_3 & ~mask) | (data & mask); + + // clear fifo + if ((m_control_3 & CR3_P2CLR) && !(m_control_3 & CR3_CLR)) + fifo_clear(); + } + } +} + +void z8038_device::message_out_w(u8 const port, u8 data) +{ + /* + * When Port 1's CPU writes to the Message Out register which is also Port + * 2's Message In register, Port 2's Message Interrupt Pending bit is set. + */ + m_port[!port].message_in = data; + m_port[!port].interrupt_status[0] |= ISR0_MIP; +} + +WRITE_LINE_MEMBER(z8038_device::in_E) +{ + // check port 2 in i/o mode and pin 35 configured as input + if ((m_port[0].control_0 & CR0_P2M_IO) && (m_control_3 & CR3_P2CLR)) + { + // active low - clear fifo + if (!state) + { + m_control_3 &= ~CR3_CLR; + fifo_clear(); + } + else + m_control_3 |= CR3_CLR; + } +} + +WRITE_LINE_MEMBER(z8038_device::in_F) +{ + // check port 2 in i/o mode and pin 34 configured as input + if ((m_port[0].control_0 & CR0_P2M_IO) && (m_control_3 & CR3_P2DIR)) + { + // check for direction change and flag interrupt + if (bool(state) != bool(m_control_3 & CR3_DIR)) + { + if (state) + m_control_3 |= CR3_DIR; + else + m_control_3 &= ~CR3_DIR; + + // flag interrupt pending + m_port[0].interrupt_status[1] |= ISR1_DDCIP; + + // schedule interrupt check + m_int_check->adjust(attotime::zero); + } + } +} + +WRITE_LINE_MEMBER(z8038_device::in_G) +{ + // check port 2 in i/o mode + if (m_port[0].control_0 & CR0_P2M_IO) + { + if (state) + m_control_3 |= CR3_P2IN0; + else + m_control_3 &= ~CR3_P2IN0; + } +} + +void z8038_device::port_reset(u8 const port) +{ + LOG("port_reset port %d \n", port + 1); + + m_port[port].control_1 = 0; + if (port == 0) + { + m_port[port].control_0 = CR0_RESET; + + m_control_2 = 0; + m_control_3 = 0; + + fifo_clear(); + } + else + { + // port 2 mode is not reset + m_port[port].control_0 = CR0_RESET; + m_port[port].control_0 |= (m_port[!port].control_0 & CR0_P2M); + + /* + * It should be noted that if the Port 2 side is reset when it has + * control of the C̅L̅E̅A̅R̅ bit, the C̅L̅E̅A̅R̅ bit is also reset (0). It should + * be noted that if the Port 2 side is reset when it has control of the + * Data Direction bit, the Data Direction is also reset. + */ + if (m_control_3 & CR3_P2CLR) + { + m_control_3 &= ~CR3_CLR; + fifo_clear(); + } + + if (m_control_3 & CR3_P2DIR) + m_control_3 &= ~CR3_DIR; + } + + m_port[port].pattern_mask = 0; + m_port[port].interrupt_status[0] = 0; + /* + * All bits except D1 and D0 are cleared by reset. Bits D1 and D0 may be a 1 + * or 0 depending on whether a match condition exists or not. + */ + m_port[port].interrupt_status[1] = 0; // opt to ignore "random" pattern matches + m_port[port].interrupt_status[2] = 0; + + /* + * All bits except D0 are cleared by reset. + */ + m_port[port].interrupt_status[3] &= ~ISR3_BE; + + /* + * When Port 1 is reset, Port 2 is also reset. If Port 2 is reset by itself, + * Port 1 is not reset. + */ + if (port == 0) + port_reset(!port); +} + +void z8038_device::fifo_clear() +{ + m_fifo.clear(); + + // FIXME: should clearing the fifo trigger buffer empty interrupts? + m_port[0].interrupt_status[3] |= ISR3_BE; + m_port[0].interrupt_status[3] &= ~ISR3_BF; + m_port[1].interrupt_status[3] |= ISR3_BE; + m_port[1].interrupt_status[3] &= ~ISR3_BF; +} + +void z8038_device::fifo_update() +{ + for (u8 port = 0; port < 2; port++) + { + // update byte count + if (!(m_port[port].control_1 & CR1_FBCR)) + m_port[port].byte_count = m_fifo.queue_length(); + + // pattern match check + if ((m_port[port].data_buffer & ~m_port[port].pattern_mask) == (m_port[port].pattern_match & ~m_port[port].pattern_mask)) + m_port[port].interrupt_status[1] |= (ISR1_PMIP | ISR1_PMF); + else + m_port[port].interrupt_status[1] &= ~ISR1_PMF; + + // byte count comparison check + if (m_fifo.queue_length() == m_port[port].byte_count_comparison) + m_port[port].interrupt_status[2] |= ISR2_BCCIP; + + // buffer full check + // TODO: test full pin (pin 37) + if (m_fifo.full()) + m_port[port].interrupt_status[3] |= (ISR3_BF | ISR3_FIP); + + // buffer empty check + // TODO: test empty pin (pin 37) + if (m_fifo.empty()) + m_port[port].interrupt_status[3] |= (ISR3_BE | ISR3_EIP); + } +} + +TIMER_CALLBACK_MEMBER(z8038_device::int_check) +{ + for (u8 port = 0; port < 2; port++) + { + // check master interrupt enable + if (!(m_port[port].control_0 & CR0_MIE)) + { + set_int_state(port, false); + continue; + } + + // check any interrupts under service + if (std::any_of( + std::begin(m_port[port].interrupt_status), + std::end(m_port[port].interrupt_status), + [](u8 const val) { return bool(val & (ISR_HIUS | ISR_LIUS)); })) + continue; + + // check for enabled and pending interrupts in priority order + m_port[port].int_code = 7; + for (u8 &isr : m_port[port].interrupt_status) + { + // check high interrupt enable and pending + if ((isr & ISR_HIE) && (isr & ISR_HIP)) + { + // set interrupt under service + isr |= ISR_HIUS; + break; + } + m_port[port].int_code--; + + if (m_port[port].int_code != 6) + { + // check low interrupt enable and pending + if ((isr & ISR_LIE) && (isr & ISR_LIP)) + { + // set interrupt under service + isr |= ISR_LIUS; + break; + } + m_port[port].int_code--; + } + } + + if (m_port[port].int_code) + LOGMASKED(LOG_INT, "int_check port %d interrupt code %d detected\n", port + 1, m_port[port].int_code); + + // update interrupt state + set_int_state(port, bool(m_port[port].int_code)); + } +} + +void z8038_device::set_int_state(u8 const port, bool asserted) +{ + if (m_port[port].int_asserted != asserted) + { + LOGMASKED(LOG_INT, "set_int_state port %d interrupt %s\n", + port + 1, asserted ? "asserted" : "deasserted"); + + m_port[port].int_asserted = asserted; + + // line is active low + m_out_int_cb[port](asserted ? 0 : 1); + } +} diff --git a/src/devices/machine/z8038.h b/src/devices/machine/z8038.h new file mode 100644 index 00000000000..d3e1532c40d --- /dev/null +++ b/src/devices/machine/z8038.h @@ -0,0 +1,229 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +#ifndef MAME_MACHINE_Z8038_H +#define MAME_MACHINE_Z8038_H + +#pragma once + +class z8038_device : public device_t +{ +public: + z8038_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // port 1 and 2 I̅N̅T̅ output lines + template <u8 Port> auto out_int_cb() { return m_out_int_cb[Port - 1].bind(); } + + // port 2 output lines + auto out_E() { return m_out_E_cb.bind(); } + auto out_F() { return m_out_F_cb.bind(); } + auto out_H() { return m_out_H_cb.bind(); } + auto out_J() { return m_out_J_cb.bind(); } + + // port 2 input lines + DECLARE_WRITE_LINE_MEMBER(in_E); // C̅L̅E̅A̅R̅ + DECLARE_WRITE_LINE_MEMBER(in_F); // Data Direction + DECLARE_WRITE_LINE_MEMBER(in_G); // IN0 + + // indirect register access + template <u8 Port> u8 reg_r() { return reg_r(Port - 1); } + template <u8 Port> void reg_w(u8 data) { reg_w(Port - 1, data); } + + // direct register access + template <u8 Port> void zbus_map(address_map &map); + template <u8 Port> u8 zbus_reg_r(offs_t offset) { m_port[Port - 1].reg_state = 1; m_port[Port - 1].reg_pointer = offset & 0xf; return reg_r(Port - 1); } + template <u8 Port> void zbus_reg_w(offs_t offset, u8 data) { m_port[Port - 1].reg_state = 1; m_port[Port - 1].reg_pointer = offset & 0xf; reg_w(Port - 1, data); } + + // direct fifo access + template <u8 Port> u8 fifo_r() { return fifo_r(Port - 1); } + template <u8 Port> void fifo_w(u8 data) { fifo_w(Port - 1, data); } + +protected: + // standard device_interface overrides + virtual void device_start() override; + virtual void device_reset() override; + + // primary device read/write handlers + u8 reg_r(u8 const port); + void reg_w(u8 const port, u8 data); + u8 fifo_r(u8 const port); + void fifo_w(u8 const port, u8 data); + + // register read helpers + u8 control_0_r(u8 const port) { return m_port[port].control_0; } + u8 control_1_r(u8 const port); + template <u8 Number> u8 interrupt_status_r(u8 const port) { return m_port[port].interrupt_status[Number]; } + u8 interrupt_vector_r(u8 const port); + u8 byte_count_r(u8 const port); + u8 byte_count_comparison_r(u8 const port) { return m_port[port].byte_count_comparison; } + u8 control_2_r(u8 const port) { return (port == 0) ? m_control_2 : 0; } + u8 control_3_r(u8 const port); + u8 message_out_r(u8 const port) { return m_port[!port].message_in; } + u8 message_in_r(u8 const port); + u8 pattern_match_r(u8 const port) { return m_port[port].pattern_match; } + u8 pattern_mask_r(u8 const port) { return m_port[port].pattern_mask; } + + // register write helpers + void control_0_w(u8 const port, u8 data); + void control_1_w(u8 const port, u8 data); + template <u8 Number> void interrupt_status_w(u8 const port, u8 data); + void interrupt_vector_w(u8 const port, u8 data) { m_port[port].interrupt_vector = data; } + void byte_count_comparison_w(u8 const port, u8 data); + void control_2_w(u8 const port, u8 data); + void control_3_w(u8 const port, u8 data); + void message_out_w(u8 const port, u8 data); + void pattern_match_w(u8 const port, u8 data) { m_port[port].pattern_match = data; } + void pattern_mask_w(u8 const port, u8 data) { m_port[port].pattern_mask = data; } + + // other helpers + void port_reset(u8 const port); + void fifo_clear(); + void fifo_update(); + TIMER_CALLBACK_MEMBER(int_check); + void set_int_state(u8 const port, bool asserted); + +private: + enum control_0_mask : u8 + { + CR0_RESET = 0x01, // reset port + CR0_RJA = 0x02, // right-justify address + CR0_P2M = 0x0c, // port 2 mode (read-only from port 2 side) + CR0_VIS = 0x10, // vector includes status + CR0_NV = 0x20, // no vector on interrupt + CR0_DLC = 0x40, // disable lower daisy chain + CR0_MIE = 0x80, // master interrupt enable + }; + enum control_0_p2mode_mask : u8 + { + CR0_P2M_ZBUSCPU = 0x00, // z-bus cpu + CR0_P2M_NZBUSCPU = 0x04, // non z-bus cpu + CR0_P2M_3WHSIO = 0x08, // 3-wire handshake i/o + CR0_P2M_2WHSIO = 0x0c, // 2-wire handshake i/o + + CR0_P2M_IO = 0x08, // i/o mode + }; + enum control_1_mask : u8 + { + CR1_RWE = 0x01, // R̅E̅Q̅U̅E̅S̅T̅ or W̅A̅I̅T̅ enable + CR1_RWS = 0x02, // R̅E̅Q̅U̅E̅S̅T̅ or W̅A̅I̅T̅ select + CR1_SDBC = 0x04, // start dma on byte count + CR1_SDPM = 0x08, // stop dma on pattern match + CR1_MMRUS = 0x10, // message mailbox register under service (read only) + CR1_MMRF = 0x20, // message mailbox register full (read only) + CR1_FBCR = 0x40, // freeze byte count register + + CR1_WMASK = 0x4f, + }; + enum control_2_mask : u8 + { + CR2_P2EN = 0x01, // port 2 side enable + CR2_P2HE = 0x02, // port 2 side handshake enable + + CR2_WMASK = 0x03, + }; + enum control_3_mask : u8 + { + CR3_P2IN0 = 0x01, // port 2 input line 0 + CR3_P2OUT1 = 0x02, // port 2 output line 1 + CR3_UNUSED = 0x04, // not used (mut be programmed 0) + CR3_P2OUT3 = 0x08, // port 2 output line 3 + CR3_DIR = 0x10, // data direction + CR3_P2DIR = 0x20, // port 2 controls direction + CR3_CLR = 0x40, // clear fifo (active low) + CR3_P2CLR = 0x80, // port 2 controls clear + }; + enum interrupt_status_0_mask : u8 + { + ISR0_MIP = 0x20, // message interrupt pending + ISR0_MIE = 0x40, // message interrupt enable + ISR0_MIUS = 0x80, // message interrupt under service + + ISR0_WMASK = 0xe0 + }; + enum interrupt_status_1_mask : u8 + { + ISR1_PMF = 0x01, // pattern match flag + ISR1_PMIP = 0x02, // pattern match interrupt pending + ISR1_PMIE = 0x04, // pattern match interrupt enable + ISR1_PMIUS = 0x08, // pattern match interrupt under service + ISR1_DDCIP = 0x20, // data direction change interrupt pending + ISR1_DDCIE = 0x40, // data direction change interrupt enable + ISR1_DDCIUS = 0x80, // data direction change interrupt under service + }; + enum interrupt_status_2_mask : u8 + { + ISR2_UF = 0x01, // underflow error + ISR2_EIP = 0x02, // error interrupt pending + ISR2_EIE = 0x04, // error interrupt enable + ISR2_EIUS = 0x08, // error interrupt under service + ISR2_OF = 0x10, // overflow error + ISR2_BCCIP = 0x20, // byte count compare interrupt pending + ISR2_BCCIE = 0x40, // byte count compare interrupt enable + ISR2_BCCIUS = 0x80, // byte count compare interrupt under service + }; + enum interrupt_status_3_mask : u8 + { + ISR3_BE = 0x01, // buffer empty + ISR3_EIP = 0x02, // empty interrupt pending + ISR3_EIE = 0x04, // empty interrupt enable + ISR3_EIUS = 0x08, // empty interrupt under service + ISR3_BF = 0x10, // buffer full + ISR3_FIP = 0x20, // full interrupt pending + ISR3_FIE = 0x40, // full interrupt enable + ISR3_FIUS = 0x80, // full interrupt under service + }; + + // generic interrupt status bit names + enum interrupt_status_mask : u8 + { + ISR_LIP = 0x02, // low interrupt pending + ISR_LIE = 0x04, // low interrupt enable + ISR_LIUS = 0x08, // low interrupt under service + ISR_HIP = 0x20, // high interrupt pending + ISR_HIE = 0x40, // high interrupt enable + ISR_HIUS = 0x80, // high interrupt under service + + ISR_LMASK = 0x0e, + ISR_HMASK = 0xe0, + }; + + devcb_write_line m_out_int_cb[2]; + devcb_write_line m_out_E_cb; // pin number 35 + devcb_write_line m_out_F_cb; // pin number 34 + devcb_write_line m_out_H_cb; // pin number 32 + devcb_write_line m_out_J_cb; // pin number 30 + + emu_timer *m_int_check; + + // registers largely or entirely controlled by port 1 + u8 m_control_2; + u8 m_control_3; + + struct port_state + { + // non-register, per-port state + u8 reg_state; + u8 reg_pointer; + u8 int_code; + bool int_asserted; + + // accessible registers + u8 control_0; + u8 control_1; + u8 interrupt_status[4]; + u8 interrupt_vector; + u8 byte_count; + u8 byte_count_comparison; + u8 message_in; + u8 pattern_match; + u8 pattern_mask; + u8 data_buffer; + } + m_port[2]; + + util::fifo <u8, 128> m_fifo; +}; + +DECLARE_DEVICE_TYPE(Z8038, z8038_device) + +#endif // MAME_MACHINE_Z8038_H diff --git a/src/devices/machine/z80scc.cpp b/src/devices/machine/z80scc.cpp index dd967d6af27..711d58b8b49 100644 --- a/src/devices/machine/z80scc.cpp +++ b/src/devices/machine/z80scc.cpp @@ -2590,10 +2590,10 @@ void z80scc_channel::m_tx_fifo_rp_step() } } -READ8_MEMBER (z80scc_device::da_r) { return m_chanA->data_read(); } -WRITE8_MEMBER (z80scc_device::da_w) { m_chanA->data_write(data); } -READ8_MEMBER (z80scc_device::db_r) { return m_chanB->data_read(); } -WRITE8_MEMBER (z80scc_device::db_w) { m_chanB->data_write(data); } +uint8_t z80scc_device::da_r(offs_t offset) { return m_chanA->data_read(); } +void z80scc_device::da_w(offs_t offset, uint8_t data) { m_chanA->data_write(data); } +uint8_t z80scc_device::db_r(offs_t offset) { return m_chanB->data_read(); } +void z80scc_device::db_w(offs_t offset, uint8_t data) { m_chanB->data_write(data); } //------------------------------------------------- // data_write - write data register diff --git a/src/devices/machine/z80scc.h b/src/devices/machine/z80scc.h index 259536290da..e2cad9e660b 100644 --- a/src/devices/machine/z80scc.h +++ b/src/devices/machine/z80scc.h @@ -363,15 +363,15 @@ public: DECLARE_WRITE8_MEMBER( ba_cd_inv_w ); /* Definitions moved to z80scc.c for enhancements */ - DECLARE_READ8_MEMBER( da_r ); // { return m_chanA->data_read(); } - DECLARE_WRITE8_MEMBER( da_w ); // { m_chanA->data_write(data); } - DECLARE_READ8_MEMBER( db_r ); // { return m_chanB->data_read(); } - DECLARE_WRITE8_MEMBER( db_w ); // { m_chanB->data_write(data); } - - DECLARE_READ8_MEMBER( ca_r ) { return m_chanA->control_read(); } - DECLARE_WRITE8_MEMBER( ca_w ) { m_chanA->control_write(data); } - DECLARE_READ8_MEMBER( cb_r ) { return m_chanB->control_read(); } - DECLARE_WRITE8_MEMBER( cb_w ) { m_chanB->control_write(data); } + uint8_t da_r(offs_t offset); + void da_w(offs_t offset, uint8_t data); + uint8_t db_r(offs_t offset); + void db_w(offs_t offset, uint8_t data); + + uint8_t ca_r(offs_t offset) { return m_chanA->control_read(); } + void ca_w(offs_t offset, uint8_t data) { m_chanA->control_write(data); } + uint8_t cb_r(offs_t offset) { return m_chanB->control_read(); } + void cb_w(offs_t offset, uint8_t data) { m_chanB->control_write(data); } DECLARE_READ8_MEMBER( zbus_r ); DECLARE_WRITE8_MEMBER( zbus_w ); diff --git a/src/devices/sound/2608intf.cpp b/src/devices/sound/2608intf.cpp index 4dc5bedf02f..1445de91f37 100644 --- a/src/devices/sound/2608intf.cpp +++ b/src/devices/sound/2608intf.cpp @@ -85,8 +85,6 @@ void ym2608_device::device_start() ay8910_device::device_start(); int rate = clock()/72; - void *pcmbufa; - int pcmsizea; m_irq_handler.resolve(); @@ -96,14 +94,12 @@ void ym2608_device::device_start() /* stream system initialize */ m_stream = machine().sound().stream_alloc(*this,0,2,rate, stream_update_delegate(&ym2608_device::stream_generate,this)); - /* setup adpcm buffers */ - pcmbufa = m_region->base(); - pcmsizea = m_region->bytes(); /* initialize YM2608 */ m_chip = ym2608_init(this,clock(),rate, - pcmbufa,pcmsizea, - &ym2608_device::static_timer_handler,&ym2608_device::static_irq_handler,&psgintf); + &ym2608_device::static_internal_read_byte, + &ym2608_device::static_external_read_byte, &ym2608_device::static_external_write_byte, + &ym2608_device::static_timer_handler,&ym2608_device::static_irq_handler,&psgintf); assert_always(m_chip != nullptr, "Error creating YM2608 chip"); } @@ -135,6 +131,15 @@ void ym2608_device::device_reset() ym2608_reset_chip(m_chip); } +//------------------------------------------------- +// rom_bank_updated +//------------------------------------------------- + +void ym2608_device::rom_bank_updated() +{ + m_stream->update(); +} + READ8_MEMBER( ym2608_device::read ) { @@ -150,16 +155,17 @@ DEFINE_DEVICE_TYPE(YM2608, ym2608_device, "ym2608", "YM2608 OPNA") ym2608_device::ym2608_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : ay8910_device(mconfig, YM2608, tag, owner, clock, PSG_TYPE_YM, 1, 2) + , device_rom_interface(mconfig, *this, 21) , m_stream(nullptr) , m_timer{ nullptr, nullptr } , m_chip(nullptr) , m_irq_handler(*this) - , m_region(*this, DEVICE_SELF) + , m_internal(*this, "internal") { } ROM_START( ym2608 ) - ROM_REGION( 0x2000, "ym2608", 0 ) + ROM_REGION( 0x2000, "internal", 0 ) /* This data is derived from the chip's output - internal ROM can't be read. It was verified, using real YM2608, that this ADPCM stream produces 100% correct output signal. diff --git a/src/devices/sound/2608intf.h b/src/devices/sound/2608intf.h index d3ba76506ee..de64a23245b 100644 --- a/src/devices/sound/2608intf.h +++ b/src/devices/sound/2608intf.h @@ -14,7 +14,8 @@ struct ssg_callbacks; #define MCFG_YM2608_IRQ_HANDLER(cb) \ downcast<ym2608_device &>(*device).set_irq_handler(DEVCB_##cb); -class ym2608_device : public ay8910_device +class ym2608_device : public ay8910_device, + public device_rom_interface { public: ym2608_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -38,6 +39,8 @@ protected: virtual void device_stop() override; virtual void device_reset() override; + virtual void rom_bank_updated() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; void stream_generate(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples); @@ -46,6 +49,10 @@ private: void timer_handler(int c, int count, int clock); void update_request() { m_stream->update(); } + static uint8_t static_external_read_byte(device_t *param, offs_t offset) { return downcast<ym2608_device *>(param)->read_byte(offset); } + static void static_external_write_byte(device_t *param, offs_t offset, uint8_t data) { return downcast<ym2608_device *>(param)->space().write_byte(offset, data); } + static uint8_t static_internal_read_byte(device_t *param, offs_t offset) { return downcast<ym2608_device *>(param)->m_internal->as_u8(offset % downcast<ym2608_device *>(param)->m_internal->bytes()); }; + static void static_irq_handler(device_t *param, int irq) { downcast<ym2608_device *>(param)->irq_handler(irq); } static void static_timer_handler(device_t *param, int c, int count, int clock) { downcast<ym2608_device *>(param)->timer_handler(c, count, clock); } @@ -54,7 +61,7 @@ private: emu_timer * m_timer[2]; void * m_chip; devcb_write_line m_irq_handler; - required_memory_region m_region; + required_memory_region m_internal; static const ssg_callbacks psgintf; }; diff --git a/src/devices/sound/2610intf.cpp b/src/devices/sound/2610intf.cpp index 6b2e2886d8c..84598507274 100644 --- a/src/devices/sound/2610intf.cpp +++ b/src/devices/sound/2610intf.cpp @@ -17,9 +17,6 @@ #include "2610intf.h" #include "fm.h" -char const *const ym2610_device::YM2610_TAG = "ymsnd"; -char const *const ym2610_device::YM2610_DELTAT_TAG = "ymsnd.deltat"; - const ssg_callbacks ym2610_device::psgintf = { &ym2610_device::psg_set_clock, @@ -107,24 +104,21 @@ void ym2610_device::device_start() /* stream system initialize */ m_stream = machine().sound().stream_alloc(*this,0,2,rate, stream_update_delegate(&ym2610_device::stream_generate,this)); - /* setup adpcm buffers */ - void *pcmbufa = m_region->base(); - int pcmsizea = m_region->bytes(); - - std::string name = tag() + std::string(".deltat"); - memory_region *deltat_region = machine().root_device().memregion(name.c_str()); - void *pcmbufb = pcmbufa; - int pcmsizeb = pcmsizea; - if (deltat_region != nullptr && deltat_region->base() != nullptr && deltat_region->bytes() != 0) + if (!has_configured_map(0) && !has_configured_map(1)) { - pcmbufb = deltat_region->base(); - pcmsizeb = deltat_region->bytes(); + if (m_adpcm_a_region) + space(0).install_rom(0, m_adpcm_a_region->bytes() - 1, m_adpcm_a_region->base()); + + if (m_adpcm_b_region) + space(1).install_rom(0, m_adpcm_b_region->bytes() - 1, m_adpcm_b_region->base()); + else if (m_adpcm_a_region) + space(1).install_rom(0, m_adpcm_a_region->bytes() - 1, m_adpcm_a_region->base()); } /**** initialize YM2610 ****/ - m_chip = ym2610_init(this,clock(),rate, - pcmbufa,pcmsizea,pcmbufb,pcmsizeb, - &ym2610_device::static_timer_handler,&ym2610_device::static_irq_handler,&psgintf); + m_chip = ym2610_init(this, clock(), rate, + &ym2610_device::static_adpcm_a_read_byte, &ym2610_device::static_adpcm_b_read_byte, + &ym2610_device::static_timer_handler, &ym2610_device::static_irq_handler, &psgintf); assert_always(m_chip != nullptr, "Error creating YM2610 chip"); } @@ -156,6 +150,19 @@ void ym2610_device::device_reset() ym2610_reset_chip(m_chip); } +//------------------------------------------------- +// memory_space_config - return a description of +// any address spaces owned by this device +//------------------------------------------------- + +device_memory_interface::space_config_vector ym2610_device::memory_space_config() const +{ + return space_config_vector{ + std::make_pair(0, &m_adpcm_a_config), + std::make_pair(1, &m_adpcm_b_config) + }; +} + READ8_MEMBER( ym2610_device::read ) { @@ -177,10 +184,15 @@ ym2610_device::ym2610_device(const machine_config &mconfig, const char *tag, dev ym2610_device::ym2610_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : ay8910_device(mconfig, type, tag, owner, clock, PSG_TYPE_YM, 1, 0) + , device_memory_interface(mconfig, *this) + , m_adpcm_a_config("adpcm-a", ENDIANNESS_LITTLE, 8, 24, 0) + , m_adpcm_b_config("adpcm-b", ENDIANNESS_LITTLE, 8, 24, 0) , m_stream(nullptr) , m_timer{ nullptr, nullptr } , m_irq_handler(*this) - , m_region(*this, DEVICE_SELF) + , m_adpcm_b_region_name("^" + std::string(basetag()) + ".deltat") + , m_adpcm_a_region(*this, DEVICE_SELF) + , m_adpcm_b_region(*this, m_adpcm_b_region_name.c_str()) { } diff --git a/src/devices/sound/2610intf.h b/src/devices/sound/2610intf.h index 583091a666b..9f9dc69c123 100644 --- a/src/devices/sound/2610intf.h +++ b/src/devices/sound/2610intf.h @@ -14,7 +14,8 @@ struct ssg_callbacks; #define MCFG_YM2610_IRQ_HANDLER(cb) \ downcast<ym2610_device &>(*device).set_irq_handler((DEVCB_##cb)); -class ym2610_device : public ay8910_device +class ym2610_device : public ay8910_device, + public device_memory_interface { public: ym2610_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -23,15 +24,14 @@ public: template <class Object> devcb_base &set_irq_handler(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); } auto irq_handler() { return m_irq_handler.bind(); } + virtual space_config_vector memory_space_config() const override; + DECLARE_READ8_MEMBER( read ); DECLARE_WRITE8_MEMBER( write ); // update request from fm.cpp static void update_request(device_t *param) { downcast<ym2610_device *>(param)->update_request(); } - static char const *const YM2610_TAG; - static char const *const YM2610_DELTAT_TAG; - protected: ym2610_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -53,14 +53,21 @@ private: void timer_handler(int c, int count, int clock); void update_request() { m_stream->update(); } + static uint8_t static_adpcm_a_read_byte(device_t *param, offs_t offset) { return downcast<ym2610_device *>(param)->space(0).read_byte(offset); } + static uint8_t static_adpcm_b_read_byte(device_t *param, offs_t offset) { return downcast<ym2610_device *>(param)->space(1).read_byte(offset); } + static void static_irq_handler(device_t *param, int irq) { downcast<ym2610_device *>(param)->irq_handler(irq); } static void static_timer_handler(device_t *param, int c, int count, int clock) { downcast<ym2610_device *>(param)->timer_handler(c, count, clock); } // internal state + const address_space_config m_adpcm_a_config; + const address_space_config m_adpcm_b_config; sound_stream * m_stream; emu_timer * m_timer[2]; devcb_write_line m_irq_handler; - required_memory_region m_region; + const std::string m_adpcm_b_region_name; + optional_memory_region m_adpcm_a_region; + optional_memory_region m_adpcm_b_region; static const ssg_callbacks psgintf; }; diff --git a/src/devices/sound/8950intf.cpp b/src/devices/sound/8950intf.cpp index da0049f0a91..f56f34c88f9 100644 --- a/src/devices/sound/8950intf.cpp +++ b/src/devices/sound/8950intf.cpp @@ -84,7 +84,7 @@ void y8950_device::device_start() assert_always(m_chip != nullptr, "Error creating Y8950 chip"); /* ADPCM ROM data */ - y8950_set_delta_t_memory(m_chip, m_region->base(), m_region->bytes()); + y8950_set_delta_t_memory(m_chip, &y8950_device::static_read_byte, &y8950_device::static_write_byte); m_stream = machine().sound().stream_alloc(*this,0,1,rate); /* port and keyboard handler */ @@ -128,6 +128,15 @@ void y8950_device::device_reset() y8950_reset_chip(m_chip); } +//------------------------------------------------- +// rom_bank_updated +//------------------------------------------------- + +void y8950_device::rom_bank_updated() +{ + m_stream->update(); +} + READ8_MEMBER( y8950_device::read ) { @@ -150,6 +159,7 @@ DEFINE_DEVICE_TYPE(Y8950, y8950_device, "y8950", "Y8950 MSX-Audio") y8950_device::y8950_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, Y8950, tag, owner, clock) , device_sound_interface(mconfig, *this) + , device_rom_interface(mconfig, *this, 21) , m_stream(nullptr) , m_timer{ nullptr, nullptr } , m_chip(nullptr) @@ -158,6 +168,5 @@ y8950_device::y8950_device(const machine_config &mconfig, const char *tag, devic , m_keyboard_write_handler(*this) , m_io_read_handler(*this) , m_io_write_handler(*this) - , m_region(*this, DEVICE_SELF) { } diff --git a/src/devices/sound/8950intf.h b/src/devices/sound/8950intf.h index c1f3163a9ee..258e27ccdb2 100644 --- a/src/devices/sound/8950intf.h +++ b/src/devices/sound/8950intf.h @@ -21,7 +21,9 @@ #define MCFG_Y8950_IO_WRITE_HANDLER(cb) \ downcast<y8950_device &>(*device).set_io_write_handler((DEVCB_##cb)); -class y8950_device : public device_t, public device_sound_interface +class y8950_device : public device_t, + public device_sound_interface, + public device_rom_interface { public: y8950_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -48,6 +50,8 @@ protected: virtual void device_stop() override; virtual void device_reset() override; + virtual void rom_bank_updated() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; // sound stream update overrides @@ -63,6 +67,9 @@ private: unsigned char keyboard_handler_r() { return m_keyboard_read_handler(0); } void keyboard_handler_w(unsigned char data) { m_keyboard_write_handler(offs_t(0), data); } + static uint8_t static_read_byte(device_t *param, offs_t offset) { return downcast<y8950_device *>(param)->read_byte(offset); } + static void static_write_byte(device_t *param, offs_t offset, uint8_t data) { return downcast<y8950_device *>(param)->space().write_byte(offset, data); } + static void static_irq_handler(device_t *param, int irq) { downcast<y8950_device *>(param)->irq_handler(irq); } static void static_timer_handler(device_t *param, int c, const attotime &period) { downcast<y8950_device *>(param)->timer_handler(c, period); } static void static_update_request(device_t *param, int interval) { downcast<y8950_device *>(param)->update_request(); } @@ -81,7 +88,6 @@ private: devcb_write8 m_keyboard_write_handler; devcb_read8 m_io_read_handler; devcb_write8 m_io_write_handler; - required_memory_region m_region; }; DECLARE_DEVICE_TYPE(Y8950, y8950_device) diff --git a/src/devices/sound/dac.h b/src/devices/sound/dac.h index ef3393d3cea..96ebb2757d7 100644 --- a/src/devices/sound/dac.h +++ b/src/devices/sound/dac.h @@ -280,6 +280,7 @@ DAC_GENERATOR(DAC1200, dac1200_device, dac_word_interface, dac_code_binary<12>, DAC_GENERATOR(MC1408, mc1408_device, dac_byte_interface, dac_code_binary<8>, dac_gain_r2r, "MC1408", "mc1408") DAC_GENERATOR(MC3408, mc3408_device, dac_byte_interface, dac_code_binary<8>, dac_gain_r2r, "MC3408", "mc3408") DAC_GENERATOR(MC3410, mc3410_device, dac_word_interface, dac_code_binary<10>, dac_gain_r2r, "MC3410", "mc3410") +DAC_GENERATOR(MP1210, mp1210_device, dac_word_interface, dac_code_twos_complement<12>, dac_gain_r2r, "MP1210", "mp1210") // also addressable with separate 8-bit and 4-bit input latches DAC_GENERATOR(PCM54HP, pcm54hp_device, dac_word_interface, dac_code_binary<16>, dac_gain_r2r, "PCM54HP", "pcm54hp") DAC_GENERATOR(UDA1341TS, uda1341ts_device, dac_word_interface, dac_code_twos_complement<16>, dac_gain_r2r, "UDA1341TS", "uda1341ts") // I2C stereo audio codec DAC_GENERATOR(ZN425E, zn425e_device, dac_byte_interface, dac_code_binary<8>, dac_gain_r2r, "ZN425E", "zn425e") diff --git a/src/devices/sound/fm.cpp b/src/devices/sound/fm.cpp index e93d009f65f..8f679e99357 100644 --- a/src/devices/sound/fm.cpp +++ b/src/devices/sound/fm.cpp @@ -2441,8 +2441,7 @@ struct ym2610_state uint8_t addr_A1; /* address line A1 */ /* ADPCM-A unit */ - const uint8_t *pcmbuf; /* pcm rom buffer */ - uint32_t pcm_size; /* size of pcm rom */ + FM_READBYTE read_byte; uint8_t adpcmTL; /* adpcmA total level */ ADPCM_CH adpcm[6]; /* adpcm channels */ uint32_t adpcmreg[0x30]; /* registers */ @@ -2492,7 +2491,7 @@ struct ym2610_state data = ch->now_data & 0x0f; else { - ch->now_data = *(pcmbuf+(ch->now_addr>>1)); + ch->now_data = read_byte(device, ch->now_addr>>1); data = (ch->now_data >> 4) & 0x0f; } @@ -2543,25 +2542,6 @@ struct ym2610_state adpcm[c].adpcm_step= 0; adpcm[c].adpcm_out = 0; adpcm[c].flag = 1; - - if(pcmbuf==nullptr) - { /* Check ROM Mapped */ - device->logerror("YM2608-YM2610: ADPCM-A rom not mapped\n"); - adpcm[c].flag = 0; - } - else - { - if(adpcm[c].end >= pcm_size) - { /* Check End in Range */ - device->logerror("YM2610: ADPCM-A end out of range: $%08x\n",adpcm[c].end); - /*adpcm[c].end = pcm_size-1;*/ /* JB: DO NOT uncomment this, otherwise you will break the comparison in the ADPCM_CALC_CHA() */ - } - if(adpcm[c].start >= pcm_size) /* Check Start in Range */ - { - device->logerror("YM2608-YM2610: ADPCM-A start out of range: $%08x\n",adpcm[c].start); - adpcm[c].flag = 0; - } - } } } } @@ -2959,8 +2939,10 @@ static void YM2608_deltat_status_reset(void *chip, uint8_t changebits) FM_STATUS_RESET(&(F2608->OPN.ST), changebits); } /* YM2608(OPNA) */ -void * ym2608_init(device_t *device, int clock, int rate, void *pcmrom,int pcmsize, - FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg) +void * ym2608_init(device_t *device, int clock, int rate, + FM_READBYTE InternalReadByte, + FM_READBYTE ExternalReadByte, FM_WRITEBYTE ExternalWriteByte, + FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg) { ym2608_state *F2608; @@ -2986,8 +2968,8 @@ void * ym2608_init(device_t *device, int clock, int rate, void *pcmrom,int pcmsi F2608->OPN.ST.SSG = ssg; /* DELTA-T */ - F2608->deltaT.memory = (uint8_t *)pcmrom; - F2608->deltaT.memory_size = pcmsize; + F2608->deltaT.read_byte = ExternalReadByte; + F2608->deltaT.write_byte = ExternalWriteByte; /*F2608->deltaT.write_time = 20.0 / clock;*/ /* a single byte write takes 20 cycles of main clock */ /*F2608->deltaT.read_time = 18.0 / clock;*/ /* a single byte read takes 18 cycles of main clock */ @@ -3000,8 +2982,7 @@ void * ym2608_init(device_t *device, int clock, int rate, void *pcmrom,int pcmsi F2608->deltaT.status_change_ZERO_bit = 0x10; /* status flag: set bit4 if silence continues for more than 290 milliseconds while recording the ADPCM */ /* ADPCM Rhythm */ - F2608->pcmbuf = device->memregion("ym2608")->base(); - F2608->pcm_size = 0x2000; + F2608->read_byte = InternalReadByte; Init_ADPCMATable(); @@ -3646,9 +3627,9 @@ static void YM2610_deltat_status_reset(void *chip, uint8_t changebits) F2610->adpcm_arrivedEndAddress &= (~changebits); } -void *ym2610_init(device_t *device, int clock, int rate, void *pcmroma,int pcmsizea,void *pcmromb,int pcmsizeb, - FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg) - +void *ym2610_init(device_t *device, int clock, int rate, + FM_READBYTE adpcm_a_read_byte, FM_READBYTE adpcm_b_read_byte, + FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg) { ym2610_state *F2610; @@ -3673,11 +3654,10 @@ void *ym2610_init(device_t *device, int clock, int rate, void *pcmroma,int pcmsi F2610->OPN.ST.IRQ_Handler = IRQHandler; F2610->OPN.ST.SSG = ssg; /* ADPCM */ - F2610->pcmbuf = (const uint8_t *)pcmroma; - F2610->pcm_size = pcmsizea; + F2610->read_byte = adpcm_a_read_byte; /* DELTA-T */ - F2610->deltaT.memory = (uint8_t *)pcmromb; - F2610->deltaT.memory_size = pcmsizeb; + F2610->deltaT.read_byte = adpcm_b_read_byte; + F2610->deltaT.write_byte = nullptr; F2610->deltaT.status_set_handler = YM2610_deltat_status_set; F2610->deltaT.status_reset_handler = YM2610_deltat_status_reset; @@ -3719,26 +3699,6 @@ void ym2610_reset_chip(void *chip) device_t* dev = F2610->OPN.ST.device; std::string name(dev->tag()); - /* setup PCM buffers again */ - F2610->pcmbuf = (const uint8_t *)dev->machine().root_device().memregion(name.c_str())->base(); - F2610->pcm_size = dev->machine().root_device().memregion(name.c_str())->bytes(); - name.append(".deltat"); - memory_region *deltat_region = dev->machine().root_device().memregion(name.c_str()); - F2610->deltaT.memory = nullptr; - if (deltat_region != nullptr) - { - F2610->deltaT.memory = (uint8_t *)dev->machine().root_device().memregion(name.c_str())->base(); - } - if(F2610->deltaT.memory == nullptr) - { - F2610->deltaT.memory = (uint8_t*)F2610->pcmbuf; - F2610->deltaT.memory_size = F2610->pcm_size; - } - else - { - F2610->deltaT.memory_size = dev->machine().root_device().memregion(name.c_str())->bytes(); - } - /* Reset Prescaler */ OPNSetPres( OPN, 6*24, 6*24, 4*2); /* OPN 1/6 , SSG 1/4 */ /* reset SSG section */ diff --git a/src/devices/sound/fm.h b/src/devices/sound/fm.h index 7b919ea7402..50b6b0d3d99 100644 --- a/src/devices/sound/fm.h +++ b/src/devices/sound/fm.h @@ -60,6 +60,8 @@ typedef unsigned char FMSAMPLE; #endif */ +typedef uint8_t (*FM_READBYTE)(device_t *device, offs_t offset); +typedef void(*FM_WRITEBYTE)(device_t *device, offs_t offset, uint8_t data); typedef void (*FM_TIMERHANDLER)(device_t *device,int c,int cnt,int clock); typedef void (*FM_IRQHANDLER)(device_t *device,int irq); /* FM_TIMERHANDLER : Stop or Start timer */ @@ -134,8 +136,9 @@ void ym2203_postload(void *chip); #if BUILD_YM2608 /* -------------------- YM2608(OPNA) Interface -------------------- */ void * ym2608_init(device_t *device, int baseclock, int rate, - void *pcmroma,int pcmsizea, - FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg); + FM_READBYTE InternalReadByte, + FM_READBYTE ExternalReadByte, FM_WRITEBYTE ExternalWriteByte, + FM_TIMERHANDLER TimerHandler, FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg); void ym2608_clock_changed(void *chip, int clock, int rate); void ym2608_shutdown(void *chip); void ym2608_reset_chip(void *chip); @@ -150,8 +153,8 @@ void ym2608_postload(void *chip); #if (BUILD_YM2610||BUILD_YM2610B) /* -------------------- YM2610(OPNB) Interface -------------------- */ void * ym2610_init(device_t *device, int baseclock, int rate, - void *pcmroma,int pcmasize,void *pcmromb,int pcmbsize, - FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg); + FM_READBYTE adpcm_a_read_byte, FM_READBYTE adpcm_b_read_byte, + FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg); void ym2610_clock_changed(void *chip, int clock, int rate); void ym2610_shutdown(void *chip); void ym2610_reset_chip(void *chip); diff --git a/src/devices/sound/fmopl.cpp b/src/devices/sound/fmopl.cpp index c7390842710..99139310d69 100644 --- a/src/devices/sound/fmopl.cpp +++ b/src/devices/sound/fmopl.cpp @@ -70,8 +70,8 @@ Revision History: */ #include "emu.h" -#include "ymdeltat.h" #include "fmopl.h" +#include "ymdeltat.h" @@ -2477,11 +2477,11 @@ void y8950_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,device_ reinterpret_cast<FM_OPL *>(chip)->SetUpdateHandler(UpdateHandler, device); } -void y8950_set_delta_t_memory(void *chip, void * deltat_mem_ptr, int deltat_mem_size ) +void y8950_set_delta_t_memory(void *chip, FM_READBYTE read_byte, FM_WRITEBYTE write_byte) { FM_OPL *OPL = (FM_OPL *)chip; - OPL->deltat->memory = (uint8_t *)(deltat_mem_ptr); - OPL->deltat->memory_size = deltat_mem_size; + OPL->deltat->read_byte = read_byte; + OPL->deltat->write_byte = write_byte; } /* diff --git a/src/devices/sound/fmopl.h b/src/devices/sound/fmopl.h index 5da3f110830..add973a2369 100644 --- a/src/devices/sound/fmopl.h +++ b/src/devices/sound/fmopl.h @@ -26,6 +26,8 @@ typedef int8_t OPLSAMPLE; #endif */ +typedef uint8_t (*FM_READBYTE)(device_t *device, offs_t offset); +typedef void(*FM_WRITEBYTE)(device_t *device, offs_t offset, uint8_t data); typedef void (*OPL_TIMERHANDLER)(device_t *device,int timer,const attotime &period); typedef void (*OPL_IRQHANDLER)(device_t *device,int irq); typedef void (*OPL_UPDATEHANDLER)(device_t *device,int min_interval_us); @@ -89,7 +91,7 @@ void ym3526_set_update_handler(void *chip, OPL_UPDATEHANDLER UpdateHandler, devi /* Y8950 port handlers */ void y8950_set_port_handler(void *chip, OPL_PORTHANDLER_W PortHandler_w, OPL_PORTHANDLER_R PortHandler_r, device_t *device); void y8950_set_keyboard_handler(void *chip, OPL_PORTHANDLER_W KeyboardHandler_w, OPL_PORTHANDLER_R KeyboardHandler_r, device_t *device); -void y8950_set_delta_t_memory(void *chip, void * deltat_mem_ptr, int deltat_mem_size ); +void y8950_set_delta_t_memory(void *chip, FM_READBYTE read_byte, FM_WRITEBYTE write_byte); void * y8950_init(device_t *device, uint32_t clock, uint32_t rate); void y8950_clock_changed(void *chip, uint32_t clock, uint32_t rate); diff --git a/src/devices/sound/iremga20.cpp b/src/devices/sound/iremga20.cpp index 5b9d5f050bb..e3c18cbf700 100644 --- a/src/devices/sound/iremga20.cpp +++ b/src/devices/sound/iremga20.cpp @@ -1,10 +1,19 @@ // license:BSD-3-Clause -// copyright-holders:Acho A. Tang,R. Belmont +// copyright-holders:Acho A. Tang,R. Belmont, Valley Bell /********************************************************* Irem GA20 PCM Sound Chip +80 pin QFP, label NANAO GA20 (Nanao Corporation was Irem's parent company) -It's not currently known whether this chip is stereo. +TODO: +- It's not currently known whether this chip is stereo. +- Is sample position base(regs 0,1) used while sample is playing, or + latched at key on? We've always emulated it the latter way. + gunforc2 seems to be the only game updating the address regs sometimes + while a sample is playing, but it doesn't seem intentional. +- What is the 2nd sample address for? Is it end(cut-off) address, or + loop start address? Every game writes a value that's past sample end. +- All games write either 0 or 2 to reg #6, do other bits have any function? Revisions: @@ -26,6 +35,9 @@ Revisions: 02-03-2007 R. Belmont - Cleaned up faux x86 assembly. +09-25-2018 Valley Bell & co +- rewrote channel update to make data 0 act as sample terminator + *********************************************************/ #include "emu.h" @@ -33,8 +45,6 @@ Revisions: #include <algorithm> -#define MAX_VOL 256 - // device type definition DEFINE_DEVICE_TYPE(IREMGA20, iremga20_device, "iremga20", "Irem GA20") @@ -63,26 +73,16 @@ iremga20_device::iremga20_device(const machine_config &mconfig, const char *tag, void iremga20_device::device_start() { - int i; - - iremga20_reset(); - - std::fill(std::begin(m_regs), std::end(m_regs), 0); - m_stream = stream_alloc(0, 2, clock()/4); save_item(NAME(m_regs)); - for (i = 0; i < 4; i++) + for (int i = 0; i < 4; i++) { save_item(NAME(m_channel[i].rate), i); - save_item(NAME(m_channel[i].size), i); - save_item(NAME(m_channel[i].start), i); save_item(NAME(m_channel[i].pos), i); - save_item(NAME(m_channel[i].frac), i); + save_item(NAME(m_channel[i].counter), i); save_item(NAME(m_channel[i].end), i); save_item(NAME(m_channel[i].volume), i); - save_item(NAME(m_channel[i].pan), i); - save_item(NAME(m_channel[i].effect), i); save_item(NAME(m_channel[i].play), i); } } @@ -94,7 +94,16 @@ void iremga20_device::device_start() void iremga20_device::device_reset() { - iremga20_reset(); + std::fill(std::begin(m_regs), std::end(m_regs), 0); + for (int i = 0; i < 4; i++) + { + m_channel[i].rate = 0; + m_channel[i].pos = 0; + m_channel[i].counter = 0; + m_channel[i].end = 0; + m_channel[i].volume = 0; + m_channel[i].play = 0; + } } //------------------------------------------------- @@ -122,159 +131,101 @@ void iremga20_device::rom_bank_updated() void iremga20_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) { - uint32_t rate[4], pos[4], frac[4], end[4], vol[4], play[4]; stream_sample_t *outL, *outR; - int i, sampleout; - - /* precache some values */ - for (i=0; i < 4; i++) - { - rate[i] = m_channel[i].rate; - pos[i] = m_channel[i].pos; - frac[i] = m_channel[i].frac; - end[i] = m_channel[i].end - 0x20; - vol[i] = m_channel[i].volume; - play[i] = m_channel[i].play; - } - i = samples; outL = outputs[0]; outR = outputs[1]; - for (i = 0; i < samples; i++) + for (int i = 0; i < samples; i++) { - sampleout = 0; + stream_sample_t sampleout = 0; - // update the 4 channels inline - if (play[0]) - { - sampleout += (read_byte(pos[0]) - 0x80) * vol[0]; - frac[0] += rate[0]; - pos[0] += frac[0] >> 24; - frac[0] &= 0xffffff; - play[0] = (pos[0] < end[0]); - } - if (play[1]) - { - sampleout += (read_byte(pos[1]) - 0x80) * vol[1]; - frac[1] += rate[1]; - pos[1] += frac[1] >> 24; - frac[1] &= 0xffffff; - play[1] = (pos[1] < end[1]); - } - if (play[2]) - { - sampleout += (read_byte(pos[2]) - 0x80) * vol[2]; - frac[2] += rate[2]; - pos[2] += frac[2] >> 24; - frac[2] &= 0xffffff; - play[2] = (pos[2] < end[2]); - } - if (play[3]) + for (auto & ch : m_channel) { - sampleout += (read_byte(pos[3]) - 0x80) * vol[3]; - frac[3] += rate[3]; - pos[3] += frac[3] >> 24; - frac[3] &= 0xffffff; - play[3] = (pos[3] < end[3]); + if (ch.play) + { + int sample = read_byte(ch.pos); + if (sample == 0x00) // check for sample end marker + ch.play = 0; + else + { + sampleout += (sample - 0x80) * (int32_t)ch.volume; + ch.counter--; + if (ch.counter <= ch.rate) + { + ch.pos++; + ch.counter = 0x100; + } + } + } } sampleout >>= 2; outL[i] = sampleout; outR[i] = sampleout; } - - /* update the regs now */ - for (i=0; i < 4; i++) - { - m_channel[i].pos = pos[i]; - m_channel[i].frac = frac[i]; - m_channel[i].play = play[i]; - } } WRITE8_MEMBER( iremga20_device::irem_ga20_w ) { - int channel; - - //logerror("GA20: Offset %02x, data %04x\n",offset,data); - m_stream->update(); - channel = offset >> 3; - + offset &= 0x1f; m_regs[offset] = data; + int ch = offset >> 3; + + // channel regs: + // 0,1: start address + // 2,3: end? address + // 4: rate + // 5: volume + // 6: control + // 7: voice status (read-only) switch (offset & 0x7) { - case 0: /* start address low */ - m_channel[channel].start = ((m_channel[channel].start)&0xff000) | (data<<4); - break; - - case 1: /* start address high */ - m_channel[channel].start = ((m_channel[channel].start)&0x00ff0) | (data<<12); - break; - - case 2: /* end address low */ - m_channel[channel].end = ((m_channel[channel].end)&0xff000) | (data<<4); - break; - - case 3: /* end address high */ - m_channel[channel].end = ((m_channel[channel].end)&0x00ff0) | (data<<12); - break; - case 4: - m_channel[channel].rate = 0x1000000 / (256 - data); + m_channel[ch].rate = data; break; - case 5: //AT: gain control - m_channel[channel].volume = (data * MAX_VOL) / (data + 10); + case 5: + m_channel[ch].volume = (data * 256) / (data + 10); break; - case 6: //AT: this is always written 2(enabling both channels?) - m_channel[channel].play = data; - m_channel[channel].pos = m_channel[channel].start; - m_channel[channel].frac = 0; + case 6: + // d1: key on/off + if (data & 2) + { + m_channel[ch].play = 1; + m_channel[ch].pos = (m_regs[ch << 3 | 0] | m_regs[ch << 3 | 1] << 8) << 4; + m_channel[ch].end = (m_regs[ch << 3 | 2] | m_regs[ch << 3 | 3] << 8) << 4; + m_channel[ch].counter = 0x100; + } + else + m_channel[ch].play = 0; + + // other: unknown/unused + // possibilities are: loop flag, left/right speaker(stereo) break; } } READ8_MEMBER( iremga20_device::irem_ga20_r ) { - int channel; - m_stream->update(); - channel = offset >> 3; + offset &= 0x1f; + int ch = offset >> 3; switch (offset & 0x7) { - case 7: // voice status. bit 0 is 1 if active. (routine around 0xccc in rtypeleo) - return m_channel[channel].play ? 1 : 0; + case 7: // voice status. bit 0 is 1 if active. (routine around 0xccc in rtypeleo) + return m_channel[ch].play; default: - logerror("GA20: read unk. register %d, channel %d\n", offset & 0xf, channel); + logerror("GA20: read unk. register %d, channel %d\n", offset & 0x7, ch); break; } return 0; } - - -void iremga20_device::iremga20_reset() -{ - int i; - - for( i = 0; i < 4; i++ ) { - m_channel[i].rate = 0; - m_channel[i].size = 0; - m_channel[i].start = 0; - m_channel[i].pos = 0; - m_channel[i].frac = 0; - m_channel[i].end = 0; - m_channel[i].volume = 0; - m_channel[i].pan = 0; - m_channel[i].effect = 0; - m_channel[i].play = 0; - } -} diff --git a/src/devices/sound/iremga20.h b/src/devices/sound/iremga20.h index bf673714eaf..e5b250a8f0a 100644 --- a/src/devices/sound/iremga20.h +++ b/src/devices/sound/iremga20.h @@ -44,21 +44,15 @@ private: struct channel_def { uint32_t rate; - uint32_t size; - uint32_t start; uint32_t pos; - uint32_t frac; + uint32_t counter; uint32_t end; uint32_t volume; - uint32_t pan; - uint32_t effect; uint32_t play; }; - void iremga20_reset(); - sound_stream *m_stream; - uint8_t m_regs[0x40/2]; + uint8_t m_regs[0x20]; channel_def m_channel[4]; }; diff --git a/src/devices/sound/pokey.cpp b/src/devices/sound/pokey.cpp index ebeaf344660..f9eb377a136 100644 --- a/src/devices/sound/pokey.cpp +++ b/src/devices/sound/pokey.cpp @@ -547,6 +547,10 @@ void pokey_device::step_keyboard() void pokey_device::step_pot() { int pot; + + if( (m_SKCTL & SK_RESET) == 0) + return; + uint8_t upd = 0; m_pot_counter++; for (pot = 0; pot < 8; pot++) @@ -809,7 +813,7 @@ READ8_MEMBER( pokey_device::read ) ****************************************************************/ if( (m_SKCTL & SK_RESET) == 0) { - data = 0; + data = m_ALLPOT; LOG(("POKEY '%s' ALLPOT internal $%02x (reset)\n", tag(), data)); } else if( !m_allpot_r_cb.isnull() ) @@ -1072,6 +1076,9 @@ void pokey_device::pokey_potgo(void) { int pot; + if( (m_SKCTL & SK_RESET) == 0) + return; + LOG(("POKEY #%p pokey_potgo\n", (void *) this)); m_ALLPOT = 0x00; diff --git a/src/devices/sound/qsoundhle.cpp b/src/devices/sound/qsoundhle.cpp index 2fac6a79012..7cfe01391f4 100644 --- a/src/devices/sound/qsoundhle.cpp +++ b/src/devices/sound/qsoundhle.cpp @@ -532,17 +532,21 @@ void qsound_hle_device::state_normal_update() { // Echo is output on the unfiltered component of the left channel and // the filtered component of the right channel. - int32_t wet = (ch == 1) ? echo_output << 16 : 0; - int32_t dry = (ch == 0) ? echo_output << 16 : 0; + int32_t wet = (ch == 1) ? echo_output << 14 : 0; + int32_t dry = (ch == 0) ? echo_output << 14 : 0; for (int i = 0; i < 19; i++) { uint16_t pan_index = m_voice_pan[i] + (ch * PAN_TABLE_CH_OFFSET); // Apply different volume tables on the dry and wet inputs. - dry -= (m_voice_output[i] * (int16_t)read_dsp_rom(pan_index + PAN_TABLE_DRY)) << 2; - wet -= (m_voice_output[i] * (int16_t)read_dsp_rom(pan_index + PAN_TABLE_WET)) << 2; + dry -= (m_voice_output[i] * (int16_t)read_dsp_rom(pan_index + PAN_TABLE_DRY)); + wet -= (m_voice_output[i] * (int16_t)read_dsp_rom(pan_index + PAN_TABLE_WET)); } + // Saturate accumulated voices + dry = (std::min<int32_t>(std::max<int32_t>(dry, -0x1fffffff), 0x1fffffff)) << 2; + wet = (std::min<int32_t>(std::max<int32_t>(wet, -0x1fffffff), 0x1fffffff)) << 2; + // Apply FIR filter on 'wet' input wet = m_filter[ch].apply(wet >> 16); @@ -551,11 +555,11 @@ void qsound_hle_device::state_normal_update() dry = m_alt_filter[ch].apply(dry >> 16); // output goes through a delay line and attenuation - int32_t output = (m_wet[ch].apply(wet) + m_dry[ch].apply(dry)) << 2; + int32_t output = (m_wet[ch].apply(wet) + m_dry[ch].apply(dry)); // DSP round function - output = (output + 0x8000) & ~0xffff; - m_out[ch] = output >> 16; + output = (output + 0x2000) & ~0x3fff; + m_out[ch] = (std::min<int32_t>(std::max<int32_t>(output >> 14, -0x7fff), 0x7fff)); if (m_delay_update) { diff --git a/src/devices/sound/spu.cpp b/src/devices/sound/spu.cpp index 383287b9114..90d8504b439 100644 --- a/src/devices/sound/spu.cpp +++ b/src/devices/sound/spu.cpp @@ -108,7 +108,7 @@ enum srrr_flags srrr_rr_mask=0x1f }; -static const unsigned int /*sound_buffer_size=65536*4,*/ +static unsigned int const /*sound_buffer_size=65536*4,*/ xa_sector_size=(18*28*8)<<1, xa_buffer_sectors=16, cdda_sector_size=2352, @@ -132,7 +132,7 @@ static const unsigned int /*sound_buffer_size=65536*4,*/ // // -static const int filter_coef[5][2]= +static int const filter_coef[5][2]= { { 0,0 }, { 60,0 }, @@ -160,7 +160,7 @@ static const int filter_coef[5][2]= _name##"0-15", \ _name##"16-23" - static const char *spu_register_names[256]= + static char const *const spu_register_names[256]= { _voice_registers(0), _voice_registers(1), diff --git a/src/devices/sound/vrender0.cpp b/src/devices/sound/vrender0.cpp index 385575ab426..2da1aaab29a 100644 --- a/src/devices/sound/vrender0.cpp +++ b/src/devices/sound/vrender0.cpp @@ -77,19 +77,18 @@ static const unsigned short ULawTo16[]= // LIVE DEVICE //************************************************************************** -DEFINE_DEVICE_TYPE(VRENDER0, vrender0_device, "vrender0", "VRender0") +DEFINE_DEVICE_TYPE(SOUND_VRENDER0, vr0sound_device, "vr0sound", "MagicEyes VRender0 Sound Engine") //------------------------------------------------- -// vrender0_device - constructor +// vr0sound_device - constructor //------------------------------------------------- -vrender0_device::vrender0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, VRENDER0, tag, owner, clock), - device_sound_interface(mconfig, *this), - m_TexBase(nullptr), - m_FBBase(nullptr), - m_stream(nullptr), - m_reg_base(0) +vr0sound_device::vr0sound_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, SOUND_VRENDER0, tag, owner, clock), + device_sound_interface(mconfig, *this), + m_TexBase(nullptr), + m_FBBase(nullptr), + m_stream(nullptr) { } @@ -98,11 +97,11 @@ vrender0_device::vrender0_device(const machine_config &mconfig, const char *tag, // device_start - device-specific startup //------------------------------------------------- -void vrender0_device::device_start() +void vr0sound_device::device_start() { memset(m_SOUNDREGS,0,sizeof(m_SOUNDREGS)); - m_stream = stream_alloc(0, 2, 44100); + m_stream = stream_alloc(0, 2, 44100); // TODO : Related to clock? save_item(NAME(m_SOUNDREGS)); } @@ -113,20 +112,20 @@ void vrender0_device::device_start() // for our sound stream //------------------------------------------------- -void vrender0_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) +void vr0sound_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) { VR0_RenderAudio(samples, outputs[0], outputs[1]); } -READ32_MEMBER(vrender0_device::vr0_snd_read) +READ32_MEMBER(vr0sound_device::vr0_snd_read) { return m_SOUNDREGS[offset]; } -WRITE32_MEMBER(vrender0_device::vr0_snd_write) +WRITE32_MEMBER(vr0sound_device::vr0_snd_write) { if(offset==0x404/4) { @@ -150,14 +149,14 @@ WRITE32_MEMBER(vrender0_device::vr0_snd_write) } -void vrender0_device::set_areas(uint32_t *texture, uint32_t *frame) +void vr0sound_device::set_areas(uint32_t *texture, uint32_t *frame) { m_TexBase=texture; m_FBBase=frame; } -void vrender0_device::VR0_RenderAudio(int nsamples, stream_sample_t *l, stream_sample_t *r) +void vr0sound_device::VR0_RenderAudio(int nsamples, stream_sample_t *l, stream_sample_t *r) { int16_t *SAMPLES; uint32_t st=STATUS; diff --git a/src/devices/sound/vrender0.h b/src/devices/sound/vrender0.h index 77306137752..ecb629d61a8 100644 --- a/src/devices/sound/vrender0.h +++ b/src/devices/sound/vrender0.h @@ -7,32 +7,17 @@ //************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_SOUND_VRENDER0_ADD(_tag, _clock) \ - MCFG_DEVICE_ADD(_tag, VRENDER0, _clock) -#define MCFG_SOUND_VRENDER0_REPLACE(_tag, _clock) \ - MCFG_DEVICE_REPLACE(_tag, VRENDER0, _clock) - -#define MCFG_VR0_REGBASE(_base) \ - downcast<vrender0_device &>(*device).set_reg_base(_base); - -//************************************************************************** // TYPE DEFINITIONS //************************************************************************** -// ======================> vrender0_device +// ======================> vr0sound_device -class vrender0_device : public device_t, +class vr0sound_device : public device_t, public device_sound_interface { public: - vrender0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - // configuration - void set_reg_base(int base) { m_reg_base = base; } + vr0sound_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); DECLARE_READ32_MEMBER( vr0_snd_read ); DECLARE_WRITE32_MEMBER( vr0_snd_write ); @@ -51,11 +36,10 @@ private: uint32_t *m_FBBase; uint32_t m_SOUNDREGS[0x10000/4]; sound_stream *m_stream; - uint32_t m_reg_base; void VR0_RenderAudio(int nsamples, stream_sample_t *l, stream_sample_t *r); }; -DECLARE_DEVICE_TYPE(VRENDER0, vrender0_device) +DECLARE_DEVICE_TYPE(SOUND_VRENDER0, vr0sound_device) #endif // MAME_SOUND_VRENDER0_H diff --git a/src/devices/sound/ymdeltat.cpp b/src/devices/sound/ymdeltat.cpp index 29e05b4ef9e..ea13da9782b 100644 --- a/src/devices/sound/ymdeltat.cpp +++ b/src/devices/sound/ymdeltat.cpp @@ -121,7 +121,7 @@ uint8_t YM_DELTAT::ADPCM_Read() if (now_addr != (end << 1)) { - v = memory[now_addr>>1]; + v = read_byte(device, now_addr>>1); /*logerror("YM Delta-T memory read $%08x, v=$%02x\n", now_addr >> 1, v);*/ @@ -200,6 +200,7 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning: if (emulation_mode == EMULATION_MODE_YM2610) { v |= 0x20; /* YM2610 always uses external memory and doesn't even have memory flag bit. */ + v &= ~0x40; /* YM2610 has no rec bit */ } portstate = v & (0x80|0x40|0x20|0x10|0x01); /* start, rec, memory mode, repeat flag copy, reset(bit0) */ @@ -223,28 +224,6 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning: { now_addr = start << 1; memread = 2; /* two dummy reads needed before accesing external memory via register $08*/ - - /* if yes, then let's check if ADPCM memory is mapped and big enough */ - if (!memory) - { - device->logerror("YM Delta-T ADPCM rom not mapped\n"); - portstate = 0x00; - PCM_BSY = 0; - } - else - { - if (end >= memory_size) /* Check End in Range */ - { - device->logerror("YM Delta-T ADPCM end out of range: $%08x\n", end); - end = memory_size - 1; - } - if (start >= memory_size) /* Check Start in Range */ - { - device->logerror("YM Delta-T ADPCM start out of range: $%08x\n", start); - portstate = 0x00; - PCM_BSY = 0; - } - } } else /* we access CPU memory (ADPCM data register $08) so we only reset now_addr here */ { @@ -340,7 +319,7 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning: if (now_addr != (end << 1)) { - memory[now_addr >> 1] = v; + write_byte(device, now_addr >> 1, v); now_addr += 2; /* two nybbles at a time */ /* reset BRDY bit in status register, which means we are processing the write */ @@ -450,8 +429,7 @@ void YM_DELTAT::postload(uint8_t *regs) reg[0] = regs[0]; /* current rom data */ - if (memory) - now_data = *(memory + (now_addr >> 1)); + now_data = read_byte(device, now_addr >> 1); } void YM_DELTAT::savestate(device_t *device) @@ -515,7 +493,7 @@ static inline void YM_DELTAT_synthesis_from_external_memory(YM_DELTAT *DELTAT) if( DELTAT->now_addr&1 ) data = DELTAT->now_data & 0x0f; else { - DELTAT->now_data = *(DELTAT->memory + (DELTAT->now_addr>>1)); + DELTAT->now_data = DELTAT->read_byte(DELTAT->device, DELTAT->now_addr>>1); data = DELTAT->now_data >> 4; } diff --git a/src/devices/sound/ymdeltat.h b/src/devices/sound/ymdeltat.h index f52bd46f5cb..def88c712b9 100644 --- a/src/devices/sound/ymdeltat.h +++ b/src/devices/sound/ymdeltat.h @@ -6,6 +6,8 @@ #pragma once +typedef uint8_t (*FM_READBYTE)(device_t *device, offs_t offset); +typedef void (*FM_WRITEBYTE)(device_t *device, offs_t offset, uint8_t data); typedef void (*STATUS_CHANGE_HANDLER)(void *chip, uint8_t status_bits); @@ -14,7 +16,8 @@ struct YM_DELTAT { /* AT: rearranged and tightened structure */ static constexpr int EMULATION_MODE_NORMAL = 0; static constexpr int EMULATION_MODE_YM2610 = 1; - uint8_t *memory; + FM_READBYTE read_byte; + FM_WRITEBYTE write_byte; int32_t *output_pointer;/* pointer of output pointers */ int32_t *pan; /* pan : &output_pointer[pan] */ double freqbase; diff --git a/src/devices/video/bt459.cpp b/src/devices/video/bt459.cpp index da7d2ac8899..6e1ba2294d1 100644 --- a/src/devices/video/bt459.cpp +++ b/src/devices/video/bt459.cpp @@ -548,8 +548,8 @@ void bt459_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, co { u8 data = *pixel_data++; - bitmap.pix(y, x + 1) = get_rgb(data & 0x7, pixel_mask); data >>= 4; - bitmap.pix(y, x + 0) = get_rgb(data & 0x7, pixel_mask); + bitmap.pix(y, x + 1) = get_rgb(data & 0xf, pixel_mask); data >>= 4; + bitmap.pix(y, x + 0) = get_rgb(data & 0xf, pixel_mask); } break; diff --git a/src/devices/video/crt9007.cpp b/src/devices/video/crt9007.cpp index f8b72603ea2..22b73a98124 100644 --- a/src/devices/video/crt9007.cpp +++ b/src/devices/video/crt9007.cpp @@ -964,5 +964,6 @@ void crt9007_device::set_character_width(unsigned value) { m_hpixels_per_column = value; - recompute_parameters(); + if (started()) + recompute_parameters(); } diff --git a/src/devices/video/crt9007.h b/src/devices/video/crt9007.h index aa024d2c24e..5f0b1f30897 100644 --- a/src/devices/video/crt9007.h +++ b/src/devices/video/crt9007.h @@ -38,48 +38,6 @@ //************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_CRT9007_CHARACTER_WIDTH(_value) \ - downcast<crt9007_device &>(*device).config_set_character_width(_value); - -#define MCFG_CRT9007_INT_CALLBACK(_write) \ - downcast<crt9007_device &>(*device).set_int_wr_callback(DEVCB_##_write); - -#define MCFG_CRT9007_DMAR_CALLBACK(_write) \ - downcast<crt9007_device &>(*device).set_dmar_wr_callback(DEVCB_##_write); - -#define MCFG_CRT9007_VS_CALLBACK(_write) \ - downcast<crt9007_device &>(*device).set_vs_wr_callback(DEVCB_##_write); - -#define MCFG_CRT9007_HS_CALLBACK(_write) \ - downcast<crt9007_device &>(*device).set_hs_wr_callback(DEVCB_##_write); - -#define MCFG_CRT9007_VLT_CALLBACK(_write) \ - downcast<crt9007_device &>(*device).set_vlt_wr_callback(DEVCB_##_write); - -#define MCFG_CRT9007_CURS_CALLBACK(_write) \ - downcast<crt9007_device &>(*device).set_curs_wr_callback(DEVCB_##_write); - -#define MCFG_CRT9007_DRB_CALLBACK(_write) \ - downcast<crt9007_device &>(*device).set_drb_wr_callback(DEVCB_##_write); - -#define MCFG_CRT9007_WBEN_CALLBACK(_write) \ - downcast<crt9007_device &>(*device).set_wben_wr_callback(DEVCB_##_write); - -#define MCFG_CRT9007_CBLANK_CALLBACK(_write) \ - downcast<crt9007_device &>(*device).set_cblank_wr_callback(DEVCB_##_write); - -#define MCFG_CRT9007_SLG_CALLBACK(_write) \ - downcast<crt9007_device &>(*device).set_slg_wr_callback(DEVCB_##_write); - -#define MCFG_CRT9007_SLD_CALLBACK(_write) \ - downcast<crt9007_device &>(*device).set_sld_wr_callback(DEVCB_##_write); - - - -//************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -93,19 +51,17 @@ public: // construction/destruction crt9007_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - void config_set_character_width(unsigned value) { m_hpixels_per_column = value; } - - template <class Object> devcb_base &set_int_wr_callback(Object &&cb) { return m_write_int.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_dmar_wr_callback(Object &&cb) { return m_write_dmar.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_vs_wr_callback(Object &&cb) { return m_write_vs.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_hs_wr_callback(Object &&cb) { return m_write_hs.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_vlt_wr_callback(Object &&cb) { return m_write_vlt.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_curs_wr_callback(Object &&cb) { return m_write_curs.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_drb_wr_callback(Object &&cb) { return m_write_drb.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_wben_wr_callback(Object &&cb) { return m_write_wben.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_cblank_wr_callback(Object &&cb) { return m_write_cblank.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_slg_wr_callback(Object &&cb) { return m_write_slg.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_sld_wr_callback(Object &&cb) { return m_write_sld.set_callback(std::forward<Object>(cb)); } + auto int_callback() { return m_write_int.bind(); } + auto dmar_callback() { return m_write_dmar.bind(); } + auto vs_callback() { return m_write_vs.bind(); } + auto hs_callback() { return m_write_hs.bind(); } + auto vlt_callback() { return m_write_vlt.bind(); } + auto curs_callback() { return m_write_curs.bind(); } + auto drb_callback() { return m_write_drb.bind(); } + auto wben_callback() { return m_write_wben.bind(); } + auto cblank_callback() { return m_write_cblank.bind(); } + auto slg_callback() { return m_write_slg.bind(); } + auto sld_callback() { return m_write_sld.bind(); } DECLARE_READ8_MEMBER( read ); DECLARE_WRITE8_MEMBER( write ); diff --git a/src/devices/video/dp8350.cpp b/src/devices/video/dp8350.cpp new file mode 100644 index 00000000000..6d240c68793 --- /dev/null +++ b/src/devices/video/dp8350.cpp @@ -0,0 +1,524 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + National Semiconductor DP8350 Series CRT Controllers + + These dedicated CRTC devices are “programmable” by specifying a + long list of mask parameters. Since the dot clock is generated + internally, these parameters determine the character field size + (16 x 16 maximum) as well as the number of characters displayed + on screen and the timing, width and polarity of the sync pulses + (though two different vertical timings are incorporated so the + refresh rate can be switched between 60 Hz and 50 Hz). + + The number of parameters adjustable through software control is + relatively small, there being no dedicated microprocessor data bus. + In practice, however, the CPU's D0 and D1 are usually tied to the + Register Select lines, due to shared use of the address bus for + DMA purposes. A per-row interrupt can be derived in various ways + from the timing outputs; this can be used to reload the Row Start + Register to point to display memory at nonconsecutive addresses. + + National released the DP8350 and a few other standard versions. + DP8367 appears to have originally been a custom mask variant + ordered by Hewlett-Packard, though it is listed as option “I” in + later datasheets; its parameters have been derived from the + information presented in Manual Part No. 13220-91087. (The 8367 + designation also comes from there, since the actual IC is merely + marked with its HP part number, 1820-2373.) DP8369 is another + variant ordered by General Terminal Corp. for their SW10 terminal; + option “K” is its National designation. + + Variant Dot rate Monitor type + ------- -------- ------------ + DP8350 10.92 MHz Ball Brothers TV-12, TV-120, etc. + DP8352 7.02 MHz RS-170 compatible + DP8353 17.6256 MHz Motorola M3003 + DP8367 25.7715 MHz HP 13220 + DP8369 12.2472 MHz GTC SW10 + +**********************************************************************/ + +#include "emu.h" +#include "video/dp8350.h" +#include "screen.h" + +//#define VERBOSE 1 +#include "logmacro.h" + + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +// device type definitions +DEFINE_DEVICE_TYPE(DP8350, dp8350_device, "dp8350", "DP8350 CRTC") +DEFINE_DEVICE_TYPE(DP8367, dp8367_device, "dp8367", "DP8367 CRTC") + + +//************************************************************************** +// DEVICE IMPLEMENTATION +//************************************************************************** + +//------------------------------------------------- +// dp835x_device - constructor +//------------------------------------------------- + +dp835x_device::dp835x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, + int char_width, int char_height, int chars_per_row, int rows_per_frame, + int vsync_delay_f1, int vsync_width_f1, int vblank_interval_f1, + int vsync_delay_f0, int vsync_width_f0, int vblank_interval_f0, + int chars_per_line, int hsync_delay, int hsync_width, int vblank_stop, + bool cursor_on_all_lines, int lbc_0_width, int hsync_serration, + bool hsync_active, bool vsync_active, bool vblank_active) + : device_t(mconfig, type, tag, owner, clock) + , device_video_interface(mconfig, *this) + , m_char_width(char_width) + , m_char_height(char_height) + , m_chars_per_row(chars_per_row) + , m_rows_per_frame(rows_per_frame) + , m_vsync_delay{vsync_delay_f0, vsync_delay_f1} + , m_vsync_width{vsync_width_f0, vsync_width_f1} + , m_vblank_interval{vblank_interval_f0, vblank_interval_f1} + , m_chars_per_line(chars_per_line) + , m_hsync_delay(hsync_delay) + , m_hsync_width(hsync_width) + , m_vblank_stop(vblank_stop) + , m_cursor_on_all_lines(cursor_on_all_lines) + , m_lbc_0_width(lbc_0_width) + , m_hsync_serration(hsync_serration) + , m_hsync_active(hsync_active) + , m_vsync_active(vsync_active) + , m_vblank_active(vblank_active) + , m_dots_per_line(char_width * chars_per_line) + , m_dots_per_row(char_width * chars_per_row) + , m_video_scan_lines(char_height * rows_per_frame) + , m_lrc_callback(*this) + , m_clc_callback(*this) + , m_lc_callback(*this) + , m_lbre_callback(*this) + , m_hsync_callback(*this) + , m_vsync_callback(*this) + , m_vblank_callback(*this) + , m_60hz_refresh(true) + , m_cgpi(false) + , m_topr(0) + , m_rsr(0) + , m_cr(0) + , m_row_start(0) + , m_lc(0) +{ + // some parameters are not used (at least not directly) + (void)m_rows_per_frame; + (void)m_chars_per_line; + (void)m_cursor_on_all_lines; + (void)m_lbc_0_width; + (void)m_hsync_serration; +} + + +//------------------------------------------------- +// dp8350_device - constructor +//------------------------------------------------- + +dp8350_device::dp8350_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : dp835x_device(mconfig, DP8350, tag, owner, clock, + 7, 10, 80, 24, + 4, 10, 20, + 30, 10, 72, + 100, 0, 43, 1, // yes, the horizontal sync pulse is more than twice as long as the blanking period + true, 4, 0, + true, false, true) +{ +} + + +//------------------------------------------------- +// dp8367_device - constructor +//------------------------------------------------- + +dp8367_device::dp8367_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : dp835x_device(mconfig, DP8367, tag, owner, clock, + 9, 15, 80, 26, + 0, 19, 25, + 38, 64, 108, + 115, -16, 7, 1, // value of vblank_stop assumed + true, 5, 0, // values assumed + true, true, true) +{ +} + + +//------------------------------------------------- +// device_config_complete - finalise device +// configuration +//------------------------------------------------- + +void dp835x_device::device_config_complete() +{ + if (has_screen() && screen().refresh_attoseconds() == 0) + { + int lines_per_frame = m_video_scan_lines + m_vblank_interval[m_60hz_refresh ? 1 : 0]; + if (m_half_shift) + screen().set_raw(clock() * 2, m_dots_per_line * 2, 0, m_dots_per_row * 2, lines_per_frame, 0, m_video_scan_lines); + else + screen().set_raw(clock(), m_dots_per_line, 0, m_dots_per_row, lines_per_frame, 0, m_video_scan_lines); + } +} + + +//------------------------------------------------- +// device_resolve_objects - resolve objects that +// may be needed for other devices to set +// initial conditions at start time +//------------------------------------------------- + +void dp835x_device::device_resolve_objects() +{ + m_lrc_callback.resolve_safe(); + m_clc_callback.resolve_safe(); + m_lc_callback.resolve_safe(); + m_lbre_callback.resolve_safe(); + m_hsync_callback.resolve_safe(); + m_vsync_callback.resolve_safe(); + m_vblank_callback.resolve_safe(); +} + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void dp835x_device::device_start() +{ + // create timers + m_hblank_start_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(dp835x_device::hblank_start), this)); + m_hblank_near_end_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(dp835x_device::hblank_near_end), this)); + m_hsync_on_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(dp835x_device::hsync_update), this)); + m_hsync_off_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(dp835x_device::hsync_update), this)); + + // save state + save_item(NAME(m_60hz_refresh)); + save_item(NAME(m_cgpi)); + save_item(NAME(m_lc)); + save_item(NAME(m_topr)); + save_item(NAME(m_rsr)); + save_item(NAME(m_cr)); + save_item(NAME(m_row_start)); +} + + +//------------------------------------------------- +// device_reset - device-specific reset +//------------------------------------------------- + +void dp835x_device::device_reset() +{ + m_topr = 0; + m_rsr = 0; + m_cr = 0; + m_row_start = 0; +} + + +//------------------------------------------------- +// device_clock_changed - called when the +// device clock is altered in any way +//------------------------------------------------- + +void dp835x_device::device_clock_changed() +{ + reconfigure_screen(); +} + + +//------------------------------------------------- +// reconfigure_screen - update screen parameters +//------------------------------------------------- + +void dp835x_device::reconfigure_screen() +{ + int lines_per_frame = m_video_scan_lines + m_vblank_interval[m_60hz_refresh ? 1 : 0]; + attotime scan_period = clocks_to_attotime(m_dots_per_line); + attotime refresh = clocks_to_attotime(lines_per_frame * m_dots_per_line); + + if (m_half_shift) + screen().configure(2 * m_dots_per_line, lines_per_frame, screen().visible_area(), refresh.as_attoseconds()); + else + screen().configure(m_dots_per_line, lines_per_frame, screen().visible_area(), refresh.as_attoseconds()); + + logerror("Frame rate refresh: %.2f Hz (f%d); horizontal rate scan: %.4f kHz; character rate: %.4f MHz; dot rate: %.5f MHz\n", + ATTOSECONDS_TO_HZ(refresh.as_attoseconds()), + m_60hz_refresh ? 1 : 0, + clock() / (m_dots_per_line * 1000.0), + clock() / (m_char_width * 1000000.0), + clock() / 1000000.0); + + // get current screen position (note that this method is more accurate than calling hpos and vpos separately) + u32 dpos = attotime_to_clocks(refresh - screen().time_until_pos(lines_per_frame - 1, m_dots_per_row * (m_half_shift ? 2 : 1))); + int hpos = (dpos + m_dots_per_row) % m_dots_per_line; + int vpos = dpos / m_dots_per_line; + + // set line rate clock timers + int hblank_begin = m_dots_per_row; + int hblank_near_end = m_dots_per_line - m_char_width * 5; + if (hpos >= hblank_begin) + hblank_begin += m_dots_per_line; + m_hblank_start_timer->adjust(clocks_to_attotime(hblank_begin - hpos), 0, scan_period); + if (hpos >= hblank_near_end) + hblank_near_end += m_dots_per_line; + m_hblank_near_end_timer->adjust(clocks_to_attotime(hblank_near_end - hpos), 0, scan_period); + + // set horizontal sync timers (note that HSYNC may precede horizontal blanking or even outlast it, as on the DP8350) + int hsync_begin = m_dots_per_row + m_char_width * m_hsync_delay; + int hsync_end = hsync_begin + m_char_width * m_hsync_width; + if (hpos >= hsync_begin) + hsync_begin += m_dots_per_line; + m_hsync_on_timer->adjust(clocks_to_attotime(hsync_begin - hpos), m_hsync_active, scan_period); + if (hpos >= hsync_end) + hsync_end += m_dots_per_line; + else if (hpos < hsync_end - m_dots_per_line) + hsync_end -= m_dots_per_line; + m_hsync_off_timer->adjust(clocks_to_attotime(hsync_end - hpos), !m_hsync_active, scan_period); + logerror("hblank_begin: %d; hsync_begin: %d; hsync_end: %d; hpos: %d\n", hblank_begin, hsync_begin, hsync_end, hpos); + + // calculate vertical sync and blanking parameters + int vsync_begin = m_video_scan_lines + m_vsync_delay[m_60hz_refresh ? 1 : 0]; + int vsync_end = vsync_begin + m_vsync_width[m_60hz_refresh ? 1 : 0]; + int vblank_end = lines_per_frame - m_vblank_stop; + logerror("vblank_begin: %d; vsync_begin: %d; vsync_end: %d; vblank_end: %d; vpos: %d\n", m_video_scan_lines, vsync_begin, vsync_end, vblank_end, vpos); + + // set counters + m_line = vpos; + if (m_line >= lines_per_frame - m_char_height) + m_lc = m_line - (lines_per_frame - m_char_height); + else + m_lc = m_line % m_char_height; +} + + +//------------------------------------------------- +// refresh_control - set or configure one of two +// field refresh rates (f1 = 60 Hz, f0 = 50 Hz) +//------------------------------------------------- + +WRITE_LINE_MEMBER(dp835x_device::refresh_control) +{ + if (m_60hz_refresh != bool(state)) + { + m_60hz_refresh = state; + if (started()) + reconfigure_screen(); + } +} + + +//------------------------------------------------- +// character_generator_program - set or configure +// the character generator program input (CGPI): +// 0 = video begins on scan line 0; new addresses +// loaded on last scan line of previous character +// 1 = video begins on scan line 1; new addresses +// loaded on scan line 0 +//------------------------------------------------- + +WRITE_LINE_MEMBER(dp835x_device::character_generator_program) +{ + m_cgpi = bool(state); +} + + +//------------------------------------------------- +// register_load - write to one of three CRTC +// address registers +//------------------------------------------------- + +void dp835x_device::register_load(u8 rs, u16 addr) +{ + addr &= 0xfff; + + switch (rs & 3) + { + case 0: + default: + // A = 0, B = 0: No Select + break; + + case 1: + // A = 0, B = 1: Top-of-Page + LOG("Top-of-Page Register = %03X\n", addr); + m_topr = addr; + break; + + case 2: + // A = 1, B = 0: Row Start (also Top-of-Page during vertical blanking) + if (m_line >= m_video_scan_lines) + { + LOG("Row Start Register = %03X (redirected to Top-of-Page)\n", addr); + m_topr = addr; + } + else + { + LOG("Row Start Register = %03X\n", addr); + m_rsr = addr; + } + break; + + case 3: + // A = 1, B = 1: Cursor + LOG("Cursor Register = %03X\n", addr); + m_cr = addr; + break; + } +} + + +//------------------------------------------------- +// lrc_r - poll line rate clock state +//------------------------------------------------- + +READ_LINE_MEMBER(dp835x_device::lrc_r) +{ + if (m_hblank_start_timer->remaining() > m_hblank_near_end_timer->remaining()) + return 0; + else + return 1; +} + + +//------------------------------------------------- +// lbre_r - poll line buffer recirculate enable +// state +//------------------------------------------------- + +READ_LINE_MEMBER(dp835x_device::lbre_r) +{ + if (m_lc == (m_cgpi ? 0 : m_char_height - 1)) + return 0; + else + return 1; +} + + + +//------------------------------------------------- +// hsync_r - poll horizontal sync state +//------------------------------------------------- + +READ_LINE_MEMBER(dp835x_device::hsync_r) +{ + if (m_hsync_on_timer->remaining() > m_hsync_off_timer->remaining()) + return m_hsync_active; + else + return !m_hsync_active; +} + + +//------------------------------------------------- +// vsync_r - poll vertical sync state +//------------------------------------------------- + +READ_LINE_MEMBER(dp835x_device::vsync_r) +{ + int vsync_begin = m_video_scan_lines + m_vsync_delay[m_60hz_refresh ? 1 : 0]; + int vsync_end = vsync_begin + m_vsync_width[m_60hz_refresh ? 1 : 0]; + return (m_line >= vsync_begin && m_line < vsync_end) ? m_vsync_active : !m_vsync_active; +} + + +//------------------------------------------------- +// vblank_r - poll vertical blanking state +//------------------------------------------------- + +READ_LINE_MEMBER(dp835x_device::vblank_r) +{ + int vblank_end = m_video_scan_lines + m_vblank_interval[m_60hz_refresh ? 1 : 0] - m_vblank_stop; + return (m_line >= m_video_scan_lines && m_line < vblank_end) ? m_vblank_active : !m_vblank_active; +} + + +//------------------------------------------------- +// hblank_start - update timing outputs at the +// start of horizontal blanking +//------------------------------------------------- + +TIMER_CALLBACK_MEMBER(dp835x_device::hblank_start) +{ + int lines_per_frame = m_video_scan_lines + m_vblank_interval[m_60hz_refresh ? 1 : 0]; + int vsync_begin = m_video_scan_lines + m_vsync_delay[m_60hz_refresh ? 1 : 0]; + int vsync_end = vsync_begin + m_vsync_width[m_60hz_refresh ? 1 : 0]; + int vblank_end = lines_per_frame - m_vblank_stop; + + // falling edge of line rate clock + m_lrc_callback(0); + + // increment line counter or reset it + if (m_lc < m_char_height - 1 && m_line != lines_per_frame - m_char_height) + m_lc++; + else + { + m_lc = 0; + m_clc_callback(0); + } + m_lc_callback(m_lc); + + // increment internal 9-bit scan counter + m_line++; + //assert(m_line == screen().vpos() + 1); + + // update line buffer recirculate enable output based on address mode + bool lbre = m_lc != (m_cgpi ? 0 : m_char_height - 1); + m_lbre_callback(lbre ? 1 : 0); + + if (m_line >= lines_per_frame - m_char_height && m_line < lines_per_frame) + { + m_row_start = m_rsr = m_topr; + } + else if (!lbre || m_line >= m_video_scan_lines) + { + // calculate starting address of next row (address counter runs continuously during VBLANK) + m_row_start = m_rsr; + m_rsr = (m_row_start + m_chars_per_row) & 0xfff; + } + + // update vertical blanking output + if (m_line == m_video_scan_lines) + m_vblank_callback(m_vblank_active); + else if (m_line == vblank_end) + m_vblank_callback(!m_vblank_active); + + // update vertical sync output + if (m_line == vsync_begin) + m_vsync_callback(m_vsync_active); + else if (m_line == vsync_end) + m_vsync_callback(!m_vsync_active); + + if (m_line == lines_per_frame) + m_line = 0; +} + + +//------------------------------------------------- +// hblank_near_end - update line rate outputs +// five chars before horizontal blanking ends +//------------------------------------------------- + +TIMER_CALLBACK_MEMBER(dp835x_device::hblank_near_end) +{ + // rising edge of line rate clock + m_lrc_callback(1); + if (m_lc == 0) + m_clc_callback(1); +} + + +//------------------------------------------------- +// hsync_update - update state of horizontal +// sync output +//------------------------------------------------- + +TIMER_CALLBACK_MEMBER(dp835x_device::hsync_update) +{ + m_hsync_callback(param); +} diff --git a/src/devices/video/dp8350.h b/src/devices/video/dp8350.h new file mode 100644 index 00000000000..f202bc730e9 --- /dev/null +++ b/src/devices/video/dp8350.h @@ -0,0 +1,177 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************** + + National Semiconductor DP8350 Series CRT Controllers + +*********************************************************************** + _____ _____ + RSB 1 |* \__/ | 40 Vcc + VBLANK 2 | | 39 RSA + 50/60 HZ 3 | | 38 RL + VSYNC 4 | | 37 RAE + FULL/HALF 5 | | 36 A0 + LC3 6 | | 35 A1 + LC2 7 | | 34 A2 + LC1 8 | | 33 A3 + LC0 9 | | 32 A4 + CLC 10 | | 31 A5 + CGP 11 | DP835X | 30 A6 + LBRE 12 | | 29 A7 + LRC 13 | | 28 A8 + HSYNC 14 | | 27 A9 + RESET 15 | | 26 A10 + LBC 16 | | 25 A11 + ECLC 17 | | 24 LCGA + LVSR 18 | | 23 DRC + CUR 19 | | 22 X2 + GND 20 |______________| 21 X1 + +**********************************************************************/ + +#ifndef MAME_VIDEO_DP8350_H +#define MAME_VIDEO_DP8350_H + +#pragma once + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> dp835x_device + +class dp835x_device : public device_t, public device_video_interface +{ +public: + // device configuration + auto lrc_callback() { return m_lrc_callback.bind(); } + auto clc_callback() { return m_clc_callback.bind(); } + auto lc_callback() { return m_lc_callback.bind(); } + auto lbre_callback() { return m_lbre_callback.bind(); } + auto hsync_callback() { return m_hsync_callback.bind(); } + auto vsync_callback() { return m_vsync_callback.bind(); } + auto vblank_callback() { return m_vblank_callback.bind(); } + void set_half_shift(bool half_shift) { m_half_shift = half_shift; } + + // write handlers + DECLARE_WRITE_LINE_MEMBER(refresh_control); + DECLARE_WRITE_LINE_MEMBER(character_generator_program); + void register_load(u8 rs, u16 addr); + + // read handlers + DECLARE_READ_LINE_MEMBER(lrc_r); + u8 lc_r() { return m_lc; } + DECLARE_READ_LINE_MEMBER(lbre_r); + DECLARE_READ_LINE_MEMBER(hsync_r); + DECLARE_READ_LINE_MEMBER(vsync_r); + DECLARE_READ_LINE_MEMBER(vblank_r); + + // address getters (TODO: accurate character-by-character emulation) + u16 top_of_page() const { return m_topr; } + u16 row_start() const { return m_row_start; } + u16 cursor_address() const { return m_cr; } + +protected: + // base type constructor + dp835x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, + int char_width, int char_height, int chars_per_row, int rows_per_frame, + int vsync_delay_f1, int vsync_width_f1, int vblank_interval_f1, + int vsync_delay_f0, int vsync_width_f0, int vblank_interval_f0, + int chars_per_line, int hsync_delay, int hsync_width, int vblank_stop, + bool cursor_on_all_lines, int lbc_0_width, int hsync_serration, + bool hsync_active, bool vsync_active, bool vblank_active); + + // device-specific overrides + virtual void device_config_complete() override; + virtual void device_resolve_objects() override; + virtual void device_start() override; + virtual void device_clock_changed() override; + virtual void device_reset() override; + +private: + // internal helpers + void reconfigure_screen(); + + // timer callbacks + TIMER_CALLBACK_MEMBER(hblank_start); + TIMER_CALLBACK_MEMBER(hblank_near_end); + TIMER_CALLBACK_MEMBER(hsync_update); + + // mask parameters + const int m_char_width; // character field cell size (width in dots) + const int m_char_height; // character field cell size (height in scan lines) + const int m_chars_per_row; // video characters per row + const int m_rows_per_frame; // video characters per frame + const int m_vsync_delay[2]; // delay from VBLANK start to VSYNC in scan lines + const int m_vsync_width[2]; // vertical sync width in scan lines + const int m_vblank_interval[2]; // scan lines of vertical blanking + const int m_chars_per_line; // character times per scan line + const int m_hsync_delay; // delay from HBLANK start to HSYNC in character times + const int m_hsync_width; // horizontal sync width in character times + const int m_vblank_stop; // VBLANK stop before video start in scan lines + const bool m_cursor_on_all_lines; // true if cursor active on all scan lines of row + const int m_lbc_0_width; // width of LBC 0 output within character time + const int m_hsync_serration; // width of HSYNC pulse serrations within VSYNC (0 if unused) + const bool m_hsync_active; // active level of horizontal sync pulse + const bool m_vsync_active; // active level of vertical sync pulse + const bool m_vblank_active; // active level of vertical blanking pulse + + // derived parameters + const int m_dots_per_line; // number of dots per scan line + const int m_dots_per_row; // number of dots displayed in each scan line + const int m_video_scan_lines; // number of active scan lines between VBLANK periods + + // misc. configuration + bool m_half_shift; // adjust screen parameters to allow half-dot shifting + + // device callbacks + devcb_write_line m_lrc_callback; // line rate clock output (active high) + devcb_write_line m_clc_callback; // clear line counter output (active low during blanking) + devcb_write8 m_lc_callback; // line counter output + devcb_write_line m_lbre_callback; // line buffer recirculate enable output (active high) + devcb_write_line m_hsync_callback; // horizontal sync output (polarity may vary by type) + devcb_write_line m_vsync_callback; // vertical sync output (polarity may vary by type) + devcb_write_line m_vblank_callback; // vertical blanking output (polarity may vary by type) + + // internal registers and control parameters + bool m_60hz_refresh; // refresh rate selector (true = f1, false = f0) + bool m_cgpi; // character generator program/address mode input + u16 m_topr; // top-of-page register + u16 m_rsr; // row start register (to be loaded during next row) + u16 m_cr; // cursor register + u16 m_row_start; // start of current row + u16 m_line; // current scan line (starting at HBLANK) + + // output state + u8 m_lc; // 4-bit line counter + + // timers + emu_timer *m_hblank_start_timer; + emu_timer *m_hblank_near_end_timer; + emu_timer *m_hsync_on_timer; + emu_timer *m_hsync_off_timer; +}; + +// ======================> dp8350_device + +class dp8350_device : public dp835x_device +{ +public: + // device constructor + dp8350_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); +}; + +// ======================> dp8367_device + +class dp8367_device : public dp835x_device +{ +public: + // device constructor + dp8367_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); +}; + +// device type declarations +DECLARE_DEVICE_TYPE(DP8350, dp8350_device) +DECLARE_DEVICE_TYPE(DP8367, dp8367_device) + +#endif // MAME_VIDEO_DP8350_H diff --git a/src/devices/video/gba_lcd.cpp b/src/devices/video/gba_lcd.cpp index 98957a3353a..af7b42115bc 100644 --- a/src/devices/video/gba_lcd.cpp +++ b/src/devices/video/gba_lcd.cpp @@ -113,7 +113,7 @@ public: void size(int &width, int &height) { - static const int size_table[4][4][2] = + static int const size_table[4][4][2] = { { { 8, 8 }, { 16, 16 }, { 32, 32 }, { 64, 64 } }, // square { { 16, 8 }, { 32, 8 }, { 32, 16 }, { 64, 32 } }, // horizontal rect @@ -207,7 +207,7 @@ inline uint32_t gba_lcd_device::bg_screen_base(uint16_t bgxcnt) inline void gba_lcd_device::bg_screen_size(uint16_t bgxcnt, bool text, int &width, int &height) { - static const int size_table[2][4][2] = + static int const size_table[2][4][2] = { { { 256, 256 }, { 512, 256 }, { 256, 512 }, { 512, 512 } }, // text mode { { 128, 128 }, { 256, 256 }, { 512, 512 }, { 1024, 1024 } } // rotation/scaling (roz) mode @@ -1466,7 +1466,7 @@ inline bool gba_lcd_device::is_in_window_v(int y, int window) return false; } -static const int coeff[32] = { +static int const coeff[32] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16 }; @@ -1536,7 +1536,7 @@ inline uint32_t gba_lcd_device::decrease_brightness(uint32_t color) return (color & 0xffff0000) | (b << 10) | (g << 5) | r; } -static const char *reg_names[] = { +static char const *const reg_names[] = { /* LCD I/O Registers */ "DISPCNT", "GRNSWAP", "DISPSTAT", "VCOUNT", "BG0CNT", "BG1CNT", "BG2CNT", "BG3CNT", diff --git a/src/devices/video/ims_cvc.cpp b/src/devices/video/ims_cvc.cpp new file mode 100644 index 00000000000..60b76604ef5 --- /dev/null +++ b/src/devices/video/ims_cvc.cpp @@ -0,0 +1,140 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +/* + * An implementation of the INMOS G300, G332 and G364 CVC (Colour Video + * Controller) devices. + * + * References: + * + * http://bitsavers.org/components/inmos/graphics/72-TRN-204-01_Graphics_Databook_Second_Edition_1990.pdf + * + * TODO + * - everything (skeleton only) + */ + +#include "emu.h" +#include "ims_cvc.h" + +#include "screen.h" + +#define VERBOSE 0 +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(G300, g300_device, "g300", "INMOS G300 Colour Video Controller") +DEFINE_DEVICE_TYPE(G332, g332_device, "g332", "INMOS G332 Colour Video Controller") +DEFINE_DEVICE_TYPE(G364, g364_device, "g364", "INMOS G364 Colour Video Controller") + +ims_cvc_device::ims_cvc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_memory_interface(mconfig, *this) + , device_palette_interface(mconfig, *this) + , m_space_config("shared", ENDIANNESS_LITTLE, 32, 24) +{ +} + +g300_device::g300_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : ims_cvc_device(mconfig, G300, tag, owner, clock) +{ +} + +g332_device::g332_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : ims_cvc_device(mconfig, type, tag, owner, clock) +{ +} + +g332_device::g332_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : ims_cvc_device(mconfig, G332, tag, owner, clock) +{ +} + +g364_device::g364_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : g332_device(mconfig, G364, tag, owner, clock) +{ +} + +device_memory_interface::space_config_vector ims_cvc_device::memory_space_config() const +{ + return space_config_vector{ + std::make_pair(0, &m_space_config) + }; +} + +void g300_device::map(address_map &map) +{ + // datasheet gives unshifted addresses + const int shift = 2; + + // colour palette + map(0x000 << shift, (0x0ff << shift) | 0x3).rw(FUNC(g300_device::colour_palette_r), FUNC(g300_device::colour_palette_w)); + + // data path registers + map(0x121, (0x121 << shift) | 0x3).rw(FUNC(g300_device::halfsync_r), FUNC(g300_device::halfsync_w)); + map(0x122, (0x122 << shift) | 0x3).rw(FUNC(g300_device::backporch_r), FUNC(g300_device::backporch_w)); + map(0x123, (0x123 << shift) | 0x3).rw(FUNC(g300_device::display_r), FUNC(g300_device::display_w)); + map(0x124, (0x124 << shift) | 0x3).rw(FUNC(g300_device::shortdisplay_r), FUNC(g300_device::shortdisplay_w)); + map(0x125, (0x125 << shift) | 0x3).rw(FUNC(g300_device::broadpulse_r), FUNC(g300_device::broadpulse_w)); + map(0x126, (0x126 << shift) | 0x3).rw(FUNC(g300_device::vsync_r), FUNC(g300_device::vsync_w)); + map(0x127, (0x127 << shift) | 0x3).rw(FUNC(g300_device::vblank_r), FUNC(g300_device::vblank_w)); + map(0x128, (0x128 << shift) | 0x3).rw(FUNC(g300_device::vdisplay_r), FUNC(g300_device::vdisplay_w)); + map(0x129, (0x129 << shift) | 0x3).rw(FUNC(g300_device::linetime_r), FUNC(g300_device::linetime_w)); + map(0x12a, (0x12a << shift) | 0x3).rw(FUNC(g300_device::tos_r), FUNC(g300_device::tos_w)); + map(0x12b, (0x12b << shift) | 0x3).rw(FUNC(g300_device::meminit_r), FUNC(g300_device::meminit_w)); + map(0x12c, (0x12c << shift) | 0x3).rw(FUNC(g300_device::transferdelay_r), FUNC(g300_device::transferdelay_w)); + + map(0x140 << shift, (0x140 << shift) | 0x3).rw(FUNC(g300_device::mask_r), FUNC(g300_device::mask_w)); + map(0x160 << shift, (0x160 << shift) | 0x3).rw(FUNC(g300_device::control_r), FUNC(g300_device::control_w)); + map(0x180 << shift, (0x180 << shift) | 0x3).rw(FUNC(g300_device::tos_r), FUNC(g300_device::tos_w)); + map(0x1a0 << shift, (0x1a0 << shift) | 0x3).w(FUNC(g300_device::boot_w)); +} + +void g332_device::map(address_map &map) +{ + // datasheet gives unshifted addresses + const int shift = 2; // TODO: 64 bit mode + + map(0x000 << shift, (0x000 << shift) | 0x3).w(FUNC(g332_device::boot_w)); + + // data path registers + map(0x021, (0x021 << shift) | 0x3).rw(FUNC(g332_device::halfsync_r), FUNC(g332_device::halfsync_w)); + map(0x022, (0x022 << shift) | 0x3).rw(FUNC(g332_device::backporch_r), FUNC(g332_device::backporch_w)); + map(0x023, (0x023 << shift) | 0x3).rw(FUNC(g332_device::display_r), FUNC(g332_device::display_w)); + map(0x024, (0x024 << shift) | 0x3).rw(FUNC(g332_device::shortdisplay_r), FUNC(g332_device::shortdisplay_w)); + map(0x025, (0x025 << shift) | 0x3).rw(FUNC(g332_device::broadpulse_r), FUNC(g332_device::broadpulse_w)); + map(0x026, (0x026 << shift) | 0x3).rw(FUNC(g332_device::vsync_r), FUNC(g332_device::vsync_w)); + map(0x027, (0x027 << shift) | 0x3).rw(FUNC(g332_device::vpreequalise_r), FUNC(g332_device::vpreequalise_w)); + map(0x028, (0x028 << shift) | 0x3).rw(FUNC(g332_device::vpostequalise_r), FUNC(g332_device::vpostequalise_w)); + map(0x029, (0x029 << shift) | 0x3).rw(FUNC(g332_device::vblank_r), FUNC(g332_device::vblank_w)); + map(0x02a, (0x02a << shift) | 0x3).rw(FUNC(g332_device::vdisplay_r), FUNC(g332_device::vdisplay_w)); + map(0x02b, (0x02b << shift) | 0x3).rw(FUNC(g332_device::linetime_r), FUNC(g332_device::linetime_w)); + map(0x02c, (0x02c << shift) | 0x3).rw(FUNC(g332_device::linestart_r), FUNC(g332_device::linestart_w)); + map(0x02d, (0x02d << shift) | 0x3).rw(FUNC(g332_device::meminit_r), FUNC(g332_device::meminit_w)); + map(0x02e, (0x02e << shift) | 0x3).rw(FUNC(g332_device::transferdelay_r), FUNC(g332_device::transferdelay_w)); + + map(0x040 << shift, (0x040 << shift) | 0x3).rw(FUNC(g332_device::mask_r), FUNC(g332_device::mask_w)); + map(0x060 << shift, (0x060 << shift) | 0x3).rw(FUNC(g332_device::control_a_r), FUNC(g332_device::control_a_w)); + map(0x070 << shift, (0x070 << shift) | 0x3).rw(FUNC(g332_device::control_b_r), FUNC(g332_device::control_b_w)); + map(0x080 << shift, (0x080 << shift) | 0x3).rw(FUNC(g332_device::tos_r), FUNC(g332_device::tos_w)); + + // cursor palette (0a1-0a3) + // checksum registers (0c0-0c2) + + // colour palette + map(0x100 << shift, (0x1ff << shift) | 0x3).rw(FUNC(g332_device::colour_palette_r), FUNC(g332_device::colour_palette_w)); + + // cursor store (200-3ff) + // cursor position (0c7) +} + +void ims_cvc_device::device_start() +{ + m_space = &space(0); +} + +void ims_cvc_device::device_reset() +{ +} + +void ims_cvc_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ +} diff --git a/src/devices/video/ims_cvc.h b/src/devices/video/ims_cvc.h new file mode 100644 index 00000000000..25c0163642d --- /dev/null +++ b/src/devices/video/ims_cvc.h @@ -0,0 +1,142 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay +#ifndef MAME_VIDEO_IMS_CVC_H +#define MAME_VIDEO_IMS_CVC_H + +#pragma once + +class ims_cvc_device : + public device_t, + public device_memory_interface, + public device_palette_interface +{ +public: + virtual void map(address_map &map) = 0; + + void screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + +protected: + ims_cvc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + // device_t overrides + virtual void device_start() override; + virtual void device_reset() override; + + // device_memory_interface overrides + virtual space_config_vector memory_space_config() const override; + + // device_palette_interface overrides + virtual u32 palette_entries() const override { return 256; } // FIXME + + u32 colour_palette_r(const offs_t offset) { return 0; } + void colour_palette_w(const offs_t offset, const u32 data) {} + u32 halfsync_r() { return m_halfsync; } + void halfsync_w(const u32 data) { m_halfsync = data; } + u32 backporch_r() { return m_backporch; } + void backporch_w(const u32 data) { m_backporch = data; } + u32 display_r() { return m_display; } + void display_w(const u32 data) { m_display = data; } + u32 shortdisplay_r() { return m_shortdisplay; } + void shortdisplay_w(const u32 data) { m_shortdisplay = data; } + u32 broadpulse_r() { return m_broadpulse; } + void broadpulse_w(const u32 data) { m_broadpulse = data; } + u32 vsync_r() { return m_vsync; } + void vsync_w(const u32 data) { m_vsync = data; } + u32 vblank_r() { return m_vblank; } + void vblank_w(const u32 data) { m_vblank = data; } + u32 vdisplay_r() { return m_vdisplay; } + void vdisplay_w(const u32 data) { m_vdisplay = data; } + u32 linetime_r() { return m_linetime; } + void linetime_w(const u32 data) { m_linetime = data; } + //u32 tos_r() { return m_tos; } + //void tos_w(const u32 data) { m_tos = data; } + u32 meminit_r() { return m_meminit; } + void meminit_w(const u32 data) { m_meminit = data; } + u32 transferdelay_r() { return m_transferdelay; } + void transferdelay_w(const u32 data) { m_transferdelay = data; } + + u32 mask_r() { return m_mask; } + void mask_w(const u32 data) { m_mask = data; } + u32 tos_r() { return m_tos; } + void tos_w(const u32 data) { m_tos = data; } + + void boot_w(const u32 data) { m_boot = data; } + +private: + // device_memory_interface members + const address_space_config m_space_config; + address_space *m_space; + + // device state + u32 m_halfsync; + u32 m_backporch; + u32 m_display; + u32 m_shortdisplay; + u32 m_broadpulse; + u32 m_vsync; + u32 m_vblank; + u32 m_vdisplay; + u32 m_linetime; + u32 m_meminit; + u32 m_transferdelay; + + u32 m_mask; + u32 m_tos; + u32 m_boot; +}; + +class g300_device : public ims_cvc_device +{ +public: + g300_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual void map(address_map &map) override; + +protected: + u32 control_r() { return m_control; } + void control_w(const u32 data) { m_control = data; } + +private: + u32 m_control; +}; + +class g332_device : public ims_cvc_device +{ +public: + g332_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual void map(address_map &map) override; + +protected: + g332_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + u32 vpreequalise_r() { return m_vpreequalise; } + void vpreequalise_w(const u32 data) { m_vpreequalise = data; } + u32 vpostequalise_r() { return m_vpostequalise; } + void vpostequalise_w(const u32 data) { m_vpostequalise = data; } + u32 linestart_r() { return m_linestart; } + void linestart_w(const u32 data) { m_linestart = data; } + u32 control_a_r() { return m_control_a; } + void control_a_w(const u32 data) { m_control_a = data; } + u32 control_b_r() { return m_control_b; } + void control_b_w(const u32 data) { m_control_b = data; } + +private: + u32 m_vpreequalise; + u32 m_vpostequalise; + u32 m_linestart; + u32 m_control_a; + u32 m_control_b; +}; + +class g364_device : public g332_device +{ +public: + g364_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + +DECLARE_DEVICE_TYPE(G300, g300_device) +DECLARE_DEVICE_TYPE(G332, g332_device) +DECLARE_DEVICE_TYPE(G364, g364_device) + +#endif // MAME_VIDEO_IMS_CVC_H diff --git a/src/devices/video/nereid.cpp b/src/devices/video/nereid.cpp index 39ddff2897c..7cbaf5fa252 100644 --- a/src/devices/video/nereid.cpp +++ b/src/devices/video/nereid.cpp @@ -4,7 +4,7 @@ #include "emu.h" #include "nereid.h" -//#define VERBOSE 1 +#define VERBOSE 1 #include "logmacro.h" DEFINE_DEVICE_TYPE(NEREID, nereid_device, "nereid", "HP Nereid ASIC") diff --git a/src/devices/video/poly.h b/src/devices/video/poly.h index 1b8130ceca0..c619c50c2a1 100644 --- a/src/devices/video/poly.h +++ b/src/devices/video/poly.h @@ -323,6 +323,8 @@ poly_manager<_BaseType, _ObjectData, _MaxParams, _MaxPolys>::poly_manager(runnin if (!(flags & FLAG_NO_WORK_QUEUE)) m_queue = osd_work_queue_alloc(WORK_QUEUE_FLAG_MULTI | WORK_QUEUE_FLAG_HIGH_FREQ); + memset(m_unit_bucket, 0xff, sizeof(m_unit_bucket)); + // request a pre-save callback for synchronization machine.save().register_presave(save_prepost_delegate(FUNC(poly_manager::presave), this)); } diff --git a/src/devices/video/ps2gs.cpp b/src/devices/video/ps2gs.cpp index 79a7653dafa..79ba24339d2 100644 --- a/src/devices/video/ps2gs.cpp +++ b/src/devices/video/ps2gs.cpp @@ -14,7 +14,7 @@ DEFINE_DEVICE_TYPE(SONYPS2_GS, ps2_gs_device, "ps2gs", "Playstation 2 GS") -/*static*/ const size_t ps2_gs_device::FORMAT_PIXEL_WIDTHS[] = { +/*static*/ size_t const ps2_gs_device::FORMAT_PIXEL_WIDTHS[] = { 32, 24, 16, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 8, 4, 0, 0, 0, @@ -25,7 +25,7 @@ DEFINE_DEVICE_TYPE(SONYPS2_GS, ps2_gs_device, "ps2gs", "Playstation 2 GS") 0, 0, 16, 0, 0, 0, 0, 0 }; -/*static*/ const char* ps2_gs_device::FORMAT_NAMES[] = { +/*static*/ char const *const ps2_gs_device::FORMAT_NAMES[] = { "PSMCT32", "PSMCT24", "PSMCT16", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "PCMCT16S", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "PSMT8", "PSMT4", "Unknown", "Unknown", "Unknown", @@ -36,7 +36,7 @@ DEFINE_DEVICE_TYPE(SONYPS2_GS, ps2_gs_device, "ps2gs", "Playstation 2 GS") "Unknown", "Unknown", "PSMZ16S", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown" }; -/*static*/ const uint32_t ps2_gs_device::KICK_COUNTS[] = { +/*static*/ uint32_t const ps2_gs_device::KICK_COUNTS[] = { 1, 2, 2, 3, 3, 3, 2, 1 }; @@ -442,10 +442,10 @@ void ps2_gs_device::write_packed(const uint8_t reg, const uint64_t hi, const uin WRITE64_MEMBER(ps2_gs_device::regs_w) { - static const char* dir_strs[4] = { + static char const *const dir_strs[4] = { "Host->Local", "Local->Host", "Local->Local", "None" }; - static const char* prim_strs[8] = { + static char const *const prim_strs[8] = { "Point", "Line", "Line Strip", "Tri", "Tri Strip", "Tri Fan", "Sprite", "Invalid" }; diff --git a/src/devices/video/ps2gs.h b/src/devices/video/ps2gs.h index a68ae9913df..28db82d1945 100644 --- a/src/devices/video/ps2gs.h +++ b/src/devices/video/ps2gs.h @@ -307,9 +307,9 @@ protected: uint8_t m_curr_field; - static const size_t FORMAT_PIXEL_WIDTHS[0x40]; - static const char* FORMAT_NAMES[0x40]; - static const uint32_t KICK_COUNTS[8]; + static size_t const FORMAT_PIXEL_WIDTHS[0x40]; + static char const *const FORMAT_NAMES[0x40]; + static uint32_t const KICK_COUNTS[8]; }; DECLARE_DEVICE_TYPE(SONYPS2_GS, ps2_gs_device) diff --git a/src/devices/video/psx.cpp b/src/devices/video/psx.cpp index 464e2a1fd59..5713a5aa1f0 100644 --- a/src/devices/video/psx.cpp +++ b/src/devices/video/psx.cpp @@ -566,10 +566,8 @@ void psxgpu_device::psx_gpu_init( int n_gputype ) } } - // icky!!! - machine().save().save_memory( this, "globals", nullptr, 0, "m_packet", (uint8_t *)&m_packet, 1, sizeof( m_packet ) ); - save_pointer(NAME(p_vram), width * height ); + save_item(NAME(m_packet.n_entry)); save_item(NAME(n_gpu_buffer_offset)); save_item(NAME(n_vramx)); save_item(NAME(n_vramy)); @@ -600,6 +598,8 @@ void psxgpu_device::psx_gpu_init( int n_gputype ) save_item(NAME(n_ix)); save_item(NAME(n_iy)); save_item(NAME(n_ti)); + save_item(NAME(m_draw_stp)); + save_item(NAME(m_check_stp)); } void psxgpu_device::device_post_load() @@ -763,7 +763,16 @@ uint32_t psxgpu_device::update_screen(screen_device &screen, bitmap_rgb32 &bitma return 0; } -#define WRITE_PIXEL( p ) *( p_vram ) = p; +#define WRITE_PIXEL( p ) \ + { \ + if( !m_check_stp || ( *( p_vram ) & 0x8000 ) == 0 ) \ + { \ + if( m_draw_stp ) \ + *( p_vram ) = ( p ) | 0x8000; \ + else \ + *( p_vram ) = p; \ + } \ + } /* type 1 @@ -781,7 +790,7 @@ void psxgpu_device::decode_tpage( uint32_t tpage ) { if( m_n_gputype == 2 ) { - n_gpustatus = ( n_gpustatus & 0xfffff800 ) | ( tpage & 0x7ff ); + n_gpustatus = ( n_gpustatus & 0xffff7800 ) | ( tpage & 0x7ff ) | ( ( tpage & 0x800 ) << 4 ); m_n_tx = ( tpage & 0x0f ) << 6; m_n_ty = ( ( tpage & 0x10 ) << 4 ) | ( ( tpage & 0x800 ) >> 2 ); @@ -801,6 +810,7 @@ void psxgpu_device::decode_tpage( uint32_t tpage ) } else { + // TODO: confirm status bits on real type 1 gpu n_gpustatus = ( n_gpustatus & 0xffffe000 ) | ( tpage & 0x1fff ); m_n_tx = ( tpage & 0x0f ) << 6; @@ -1035,7 +1045,8 @@ void psxgpu_device::decode_tpage( uint32_t tpage ) WRITE_PIXEL( \ p_n_redshade[ p_n_redlevel[ n_bgr ] | n_r.w.h ] | \ p_n_greenshade[ p_n_greenlevel[ n_bgr ] | n_g.w.h ] | \ - p_n_blueshade[ p_n_bluelevel[ n_bgr ] | n_b.w.h ] ) \ + p_n_blueshade[ p_n_bluelevel[ n_bgr ] | n_b.w.h ] | \ + ( n_bgr & 0x8000 ) ) \ } \ p_vram++; \ PIXELUPDATE \ @@ -1050,7 +1061,8 @@ void psxgpu_device::decode_tpage( uint32_t tpage ) WRITE_PIXEL( \ p_n_redtrans[ p_n_f[ p_n_redlevel[ n_bgr ] | n_r.w.h ] | p_n_redb[ *( p_vram ) ] ] | \ p_n_greentrans[ p_n_f[ p_n_greenlevel[ n_bgr ] | n_g.w.h ] | p_n_greenb[ *( p_vram ) ] ] | \ - p_n_bluetrans[ p_n_f[ p_n_bluelevel[ n_bgr ] | n_b.w.h ] | p_n_blueb[ *( p_vram ) ] ] ) \ + p_n_bluetrans[ p_n_f[ p_n_bluelevel[ n_bgr ] | n_b.w.h ] | p_n_blueb[ *( p_vram ) ] ] | \ + 0x8000 ) \ } \ else \ { \ @@ -3185,16 +3197,12 @@ void psxgpu_device::gpu_write( uint32_t *p_ram, int32_t n_size ) n_drawoffset_x, n_drawoffset_y ); break; case 0xe6: + m_draw_stp = BIT( data, 0 ); + m_check_stp = BIT( data, 1 ); + // TODO: confirm status bits on real type 1 gpu n_gpustatus &= ~( 3L << 0xb ); n_gpustatus |= ( data & 0x03 ) << 0xb; - if( ( m_packet.n_entry[ 0 ] & 3 ) != 0 ) - { - verboselog( *this, 1, "not handled: mask setting %d\n", m_packet.n_entry[ 0 ] & 3 ); - } - else - { - verboselog( *this, 1, "mask setting %d\n", m_packet.n_entry[ 0 ] & 3 ); - } + verboselog( *this, 1, "mask setting %d\n", m_packet.n_entry[ 0 ] & 3 ); break; default: #if defined( MAME_DEBUG ) diff --git a/src/devices/video/psx.h b/src/devices/video/psx.h index 6fdbcc80633..847458390cc 100644 --- a/src/devices/video/psx.h +++ b/src/devices/video/psx.h @@ -277,6 +277,8 @@ private: uint32_t n_lightgun_y; uint32_t n_screenwidth; uint32_t n_screenheight; + bool m_draw_stp; + bool m_check_stp; PACKET m_packet; diff --git a/src/devices/video/ramdac.h b/src/devices/video/ramdac.h index be8e885b54a..47671009f68 100644 --- a/src/devices/video/ramdac.h +++ b/src/devices/video/ramdac.h @@ -15,22 +15,6 @@ //************************************************************************** -// INTERFACE CONFIGURATION MACROS -//************************************************************************** - -#define MCFG_RAMDAC_ADD(_tag, _map, _palette) \ - MCFG_DEVICE_ADD(_tag, RAMDAC, 0) \ - MCFG_DEVICE_ADDRESS_MAP(0, _map) \ - downcast<ramdac_device &>(*device).set_palette(_palette); - -#define MCFG_RAMDAC_COLOR_BASE(_color_base) \ - downcast<ramdac_device &>(*device).set_color_base(_color_base); - -#define MCFG_RAMDAC_SPLIT_READ(_split) \ - downcast<ramdac_device &>(*device).set_split_read(_split); - - -//************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -41,10 +25,15 @@ class ramdac_device : public device_t, { public: // construction/destruction + template <typename T> + ramdac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&palette_tag) + : ramdac_device(mconfig, tag, owner, clock) + { + m_palette.set_tag(std::forward<T>(palette_tag)); + } ramdac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // configuration - template <typename T> void set_palette(T &&tag) { m_palette.set_tag(std::forward<T>(tag)); } void set_color_base(uint32_t color_base) { m_color_base = color_base; } void set_split_read(int split) { m_split_read_reg = split; } diff --git a/src/devices/video/scn2674.cpp b/src/devices/video/scn2674.cpp index 3058e110846..67a5fe19f94 100644 --- a/src/devices/video/scn2674.cpp +++ b/src/devices/video/scn2674.cpp @@ -601,7 +601,13 @@ void scn2674_device::write_interrupt_mask(bool enabled, uint8_t bits) if (BIT(changed_bits, 3)) LOGMASKED(LOG_INTR, "Line Zero IRQ %s\n", enabled ? "enabled" : "disabled"); if (BIT(changed_bits, 4)) + { LOGMASKED(LOG_INTR, "V-Blank IRQ %s\n", enabled ? "enabled" : "disabled"); + + // hack to allow PC-X to get its first interrupt + if (BIT(bits, 4) && !m_display_enabled) + recompute_parameters(); + } } void scn2674_device::write_delayed_command(uint8_t data) @@ -919,9 +925,10 @@ WRITE8_MEMBER( scn2674_device::write ) void scn2674_device::recompute_parameters() { - int horiz_pix_total = ((m_equalizing_constant + (m_horz_sync_width << 1)) << 1) * m_hpixels_per_column; + int horiz_chars_total = (m_equalizing_constant + (m_horz_sync_width << 1)) << 1; + int horiz_pix_total = horiz_chars_total * m_hpixels_per_column; int vert_pix_total = m_rows_per_screen * m_scanline_per_char_row + m_vert_front_porch + m_vert_back_porch + m_vsync_width; - attoseconds_t refresh = screen().frame_period().attoseconds(); + attoseconds_t refresh = screen().frame_period().as_attoseconds(); int max_visible_x = (m_character_per_row * m_hpixels_per_column) - 1; int max_visible_y = (m_rows_per_screen * m_scanline_per_char_row) - 1; @@ -931,10 +938,10 @@ void scn2674_device::recompute_parameters() return; } - LOGMASKED(LOG_IR, "width %u height %u max_x %u max_y %u refresh %f\n", horiz_pix_total, vert_pix_total, max_visible_x, max_visible_y, 1 / ATTOSECONDS_TO_DOUBLE(refresh)); + //attoseconds_t refresh = clocks_to_attotime(horiz_chars_total * vert_pix_total).as_attoseconds(); + LOGMASKED(LOG_IR, "width %u height %u max_x %u max_y %u refresh %f\n", horiz_pix_total, vert_pix_total, max_visible_x, max_visible_y, ATTOSECONDS_TO_HZ(refresh)); - rectangle visarea; - visarea.set(0, max_visible_x, 0, max_visible_y); + rectangle visarea(0, max_visible_x, 0, max_visible_y); screen().configure(horiz_pix_total, vert_pix_total, visarea, refresh); m_scanline_timer->adjust(screen().time_until_pos(0, 0), 0, screen().scan_period()); diff --git a/src/devices/video/topcat.cpp b/src/devices/video/topcat.cpp index 2b5b32a6750..87bb60cb1d7 100644 --- a/src/devices/video/topcat.cpp +++ b/src/devices/video/topcat.cpp @@ -24,11 +24,10 @@ topcat_device::topcat_device(const machine_config &mconfig, const char *tag, dev void topcat_device::device_start() { + m_int_write_func.resolve_safe(); m_cursor_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(topcat_device::cursor_callback), this)); m_cursor_timer->adjust(attotime::from_hz(3)); - m_int_write_func.resolve_safe(); - save_item(NAME(m_vblank)); save_item(NAME(m_wmove_active)); save_item(NAME(m_vert_retrace_intrq)); @@ -46,14 +45,18 @@ void topcat_device::device_start() save_item(NAME(m_dst_y_pixel)); save_item(NAME(m_block_mover_pixel_width)); save_item(NAME(m_block_mover_pixel_height)); + save_item(NAME(m_unknown_reg4a)); + save_item(NAME(m_unknown_reg4c)); + save_item(NAME(m_cursor_state)); + save_item(NAME(m_cursor_x_pos)); + save_item(NAME(m_cursor_y_pos)); + save_item(NAME(m_cursor_width)); save_item(NAME(m_fb_width)); save_item(NAME(m_fb_height)); + save_item(NAME(m_plane_mask)); save_item(NAME(m_read_enable)); save_item(NAME(m_write_enable)); save_item(NAME(m_fb_enable)); - save_item(NAME(m_unknown_reg4a)); - save_item(NAME(m_unknown_reg4c)); - save_item(NAME(m_cursor_state)); save_item(NAME(m_changed)); } @@ -355,7 +358,6 @@ WRITE16_MEMBER(topcat_device::ctrl_w) m_changed = true; switch (offset) { case TOPCAT_REG_VBLANK: - m_vblank = data; break; case TOPCAT_REG_WMOVE_ACTIVE: break; @@ -436,7 +438,7 @@ WRITE16_MEMBER(topcat_device::ctrl_w) m_cursor_width = data; break; default: - logerror("unknown register: %02X = %04x\n", offset, data, mem_mask); + logerror("unknown register write: %02X = %04x (mask %04X)\n", offset, data, mem_mask); break; } } diff --git a/src/devices/video/topcat.h b/src/devices/video/topcat.h index bba7d5e077c..492096ee8b5 100644 --- a/src/devices/video/topcat.h +++ b/src/devices/video/topcat.h @@ -5,24 +5,9 @@ #pragma once -#define MCFG_TOPCAT_FB_WIDTH(_pixels) \ - downcast<topcat_device &>(*device).set_fb_width(_pixels); - -#define MCFG_TOPCAT_FB_HEIGHT(_pixels) \ - downcast<topcat_device &>(*device).set_fb_height(_pixels); - -#define MCFG_TOPCAT_PLANEMASK(_mask) \ - downcast<topcat_device &>(*device).set_planemask(_mask); - -#define MCFG_TOPCAT_INT_CB(_write) \ - downcast<topcat_device &>(*device).set_int_write_cb(DEVCB_##_write); - class topcat_device : public device_t { public: - template <class Object> devcb_base& set_int_write_cb(Object &&cb) - { return m_int_write_func.set_callback(std::forward<Object>(cb)); } - topcat_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); bool has_changed() { bool ret = m_changed; m_changed = false; return ret; }; void set_fb_width(int _pixels) { m_fb_width = _pixels; } @@ -40,6 +25,7 @@ public: bool plane_enabled(); + auto irq_out_cb() { return m_int_write_func.bind(); } protected: topcat_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -98,6 +84,7 @@ private: }; void window_move(); + void execute_rule(bool src, replacement_rule_t rule, bool &dst); void update_cursor(int x, int y, uint16_t ctrl, uint8_t width); @@ -116,7 +103,7 @@ private: m_vram[offset] &= ~m_plane_mask; } - bool get_vram_pixel(int x, int y) { + bool get_vram_pixel(int x, int y) const { return m_vram[y * m_fb_width + x] & m_plane_mask; } diff --git a/src/emu/debug/debugcpu.cpp b/src/emu/debug/debugcpu.cpp index c546cc66ffd..3ebd9951a8a 100644 --- a/src/emu/debug/debugcpu.cpp +++ b/src/emu/debug/debugcpu.cpp @@ -2747,7 +2747,7 @@ device_debug::watchpoint::watchpoint(device_debug* debugInterface, std::fill(std::begin(m_end_address), std::end(m_end_address), 0); std::fill(std::begin(m_masks), std::end(m_masks), 0); - offs_t ashift = m_space.addr_shift(); + int ashift = m_space.addr_shift(); endianness_t endian = m_space.endianness(); offs_t subamask = m_space.alignment() - 1; offs_t unit_size = ashift <= 0 ? 8 << -ashift : 8 >> ashift; @@ -2939,7 +2939,7 @@ void device_debug::watchpoint::triggered(read_or_write type, offs_t address, u64 // adjust address, size & value_to_write based on mem_mask. offs_t size = 0; - offs_t ashift = m_space.addr_shift(); + int ashift = m_space.addr_shift(); offs_t unit_size = ashift <= 0 ? 8 << -ashift : 8 >> ashift; u64 unit_mask = make_bitmask<u64>(unit_size); diff --git a/src/emu/debug/dvmemory.cpp b/src/emu/debug/dvmemory.cpp index 63c2f445b30..fd27ca40abd 100644 --- a/src/emu/debug/dvmemory.cpp +++ b/src/emu/debug/dvmemory.cpp @@ -464,14 +464,16 @@ void debug_view_memory::view_char(int chval) if (hexchar == nullptr) break; + const debug_view_memory_source &source = downcast<const debug_view_memory_source &>(*m_source); + offs_t address = (source.m_space != nullptr) ? source.m_space->byte_to_address(pos.m_address) : pos.m_address; u64 data; - bool ismapped = read(m_bytes_per_chunk, pos.m_address, data); + bool ismapped = read(m_bytes_per_chunk, address, data); if (!ismapped) break; data &= ~(u64(0x0f) << pos.m_shift); data |= u64(hexchar - hexvals) << pos.m_shift; - write(m_bytes_per_chunk, pos.m_address, data); + write(m_bytes_per_chunk, address, data); // fall through to the right-arrow press } diff --git a/src/emu/dirtc.cpp b/src/emu/dirtc.cpp index 4243622822b..0d5442fe6c2 100644 --- a/src/emu/dirtc.cpp +++ b/src/emu/dirtc.cpp @@ -195,10 +195,13 @@ void device_rtc_interface::advance_days() m_register[RTC_DAY_OF_WEEK] = 1; } - if (m_register[RTC_DAY] > DAYS_PER_MONTH[m_register[RTC_MONTH] - 1]) + if (m_register[RTC_MONTH] > 0 && m_register[RTC_DAY] > DAYS_PER_MONTH[m_register[RTC_MONTH] - 1]) { - m_register[RTC_DAY] = 1; - m_register[RTC_MONTH]++; + if (m_register[RTC_MONTH] != 2 || m_register[RTC_DAY] != 29 || !rtc_feature_leap_year() || + (m_register[RTC_YEAR] % 4) != 0) { + m_register[RTC_DAY] = 1; + m_register[RTC_MONTH]++; + } } if (m_register[RTC_MONTH] == 13) diff --git a/src/emu/diserial.cpp b/src/emu/diserial.cpp index 8c1abb494fc..01bb07bf8c7 100644 --- a/src/emu/diserial.cpp +++ b/src/emu/diserial.cpp @@ -157,6 +157,8 @@ WRITE_LINE_MEMBER(device_serial_interface::clock_w) void device_serial_interface::set_data_frame(int start_bit_count, int data_bit_count, parity_t parity, stop_bits_t stop_bits) { + //device().logerror("Start bits: %d; Data bits: %d; Parity: %s; Stop bits: %s\n", start_bit_count, data_bit_count, parity_tostring(parity), stop_bits_tostring(stop_bits)); + m_df_word_length = data_bit_count; switch (stop_bits) diff --git a/src/emu/diserial.h b/src/emu/diserial.h index af55c7d4bc5..e1e2a447dff 100644 --- a/src/emu/diserial.h +++ b/src/emu/diserial.h @@ -188,6 +188,16 @@ class device_buffered_serial_interface : public device_serial_interface protected: using device_serial_interface::device_serial_interface; + void interface_post_start() override + { + device_serial_interface::interface_post_start(); + + device().save_item(NAME(m_fifo)); + device().save_item(NAME(m_head)); + device().save_item(NAME(m_tail)); + device().save_item(NAME(m_empty)); + } + virtual void tra_complete() override { assert(!m_empty || (m_head == m_tail)); @@ -236,20 +246,14 @@ protected: } } - bool fifo_full() const + bool fifo_empty() const { - return !m_empty && (m_head == m_tail); + return m_empty; } -protected: - void interface_post_start() override + bool fifo_full() const { - device_serial_interface::interface_post_start(); - - device().save_item(NAME(m_fifo)); - device().save_item(NAME(m_head)); - device().save_item(NAME(m_tail)); - device().save_item(NAME(m_empty)); + return !m_empty && (m_head == m_tail); } private: diff --git a/src/emu/emumem.cpp b/src/emu/emumem.cpp index 754f2ddca65..891fd3caeb7 100644 --- a/src/emu/emumem.cpp +++ b/src/emu/emumem.cpp @@ -1890,7 +1890,7 @@ template<int Width, int AddrShift, endianness_t Endian> void address_space_speci VPRINTF(("address_space::install_readwrite_port(%s-%s mirror=%s, read=\"%s\" / write=\"%s\")\n", core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars), - rtag.empty() ? "(none)" : rtag.c_str(), wtag.empty() ? "(none)" : wtag.c_str())); + rtag.empty() ? "(none)" : rtag.c_str(), wtag.empty() ? "(none)" : wtag.c_str())); offs_t nstart, nend, nmask, nmirror; check_optimize_mirror("install_readwrite_port", addrstart, addrend, addrmirror, nstart, nend, nmask, nmirror); @@ -1934,7 +1934,7 @@ template<int Width, int AddrShift, endianness_t Endian> void address_space_speci VPRINTF(("address_space::install_readwrite_bank(%s-%s mirror=%s, read=\"%s\" / write=\"%s\")\n", core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars), - rtag.empty() ? "(none)" : rtag.c_str(), wtag.empty() ? "(none)" : wtag.c_str())); + rtag.empty() ? "(none)" : rtag.c_str(), wtag.empty() ? "(none)" : wtag.c_str())); offs_t nstart, nend, nmask, nmirror; check_optimize_mirror("install_bank_generic", addrstart, addrend, addrmirror, nstart, nend, nmask, nmirror); diff --git a/src/emu/emuopts.cpp b/src/emu/emuopts.cpp index 1cb0fbadc3d..160398d165f 100644 --- a/src/emu/emuopts.cpp +++ b/src/emu/emuopts.cpp @@ -389,9 +389,9 @@ namespace if (!same_name) result.push_back(image.brief_instance_name()); - if (strcmp(image.device_typename(image.image_type()), image.instance_name().c_str()) == 0) + if( image.instance_name() != image.cannonical_instance_name() ) { - result.push_back(image.instance_name() + "1"); + result.push_back(image.cannonical_instance_name()); if (!same_name) result.push_back(image.brief_instance_name() + "1"); } diff --git a/src/emu/emupal.cpp b/src/emu/emupal.cpp index 16fc8716c94..5bdffe04a4b 100644 --- a/src/emu/emupal.cpp +++ b/src/emu/emupal.cpp @@ -117,13 +117,22 @@ WRITE8_MEMBER(palette_device::write8_ext) update_for_write(offset, 1); } - WRITE16_MEMBER(palette_device::write16_ext) { m_paletteram_ext.write16(offset, data, mem_mask); update_for_write(offset * 2, 2); } +READ8_MEMBER(palette_device::read8_ext) +{ + return m_paletteram_ext.read8(offset); +} + +READ16_MEMBER(palette_device::read16_ext) +{ + return m_paletteram_ext.read16(offset); +} + //------------------------------------------------- // write_indirect - write a byte to the base diff --git a/src/emu/emupal.h b/src/emu/emupal.h index a9ccdc99565..cafed72589a 100644 --- a/src/emu/emupal.h +++ b/src/emu/emupal.h @@ -399,11 +399,13 @@ public: // generic read/write handlers DECLARE_READ8_MEMBER(read8); + DECLARE_READ8_MEMBER(read8_ext); DECLARE_WRITE8_MEMBER(write8); DECLARE_WRITE8_MEMBER(write8_ext); DECLARE_WRITE8_MEMBER(write_indirect); DECLARE_WRITE8_MEMBER(write_indirect_ext); DECLARE_READ16_MEMBER(read16); + DECLARE_READ16_MEMBER(read16_ext); DECLARE_WRITE16_MEMBER(write16); DECLARE_WRITE16_MEMBER(write16_ext); DECLARE_READ32_MEMBER(read32); diff --git a/src/emu/render.cpp b/src/emu/render.cpp index e3071d5f9f4..ab26abaf154 100644 --- a/src/emu/render.cpp +++ b/src/emu/render.cpp @@ -1728,15 +1728,6 @@ void render_target::load_additional_layout_files(const char *basename, bool have screen_device_iterator iter(m_manager.machine().root_device()); std::vector<screen_info> const screens(std::begin(iter), std::end(iter)); - if (!have_default && !have_artwork) - { - if (screens.size() == 2U) - { - load_layout_file(nullptr, layout_dualhsxs); - if (m_filelist.empty()) - throw emu_fatalerror("Couldn't parse default layout??"); - } - } if (screens.empty()) // ensure the fallback view for systems with no screens is loaded if necessary { @@ -1945,6 +1936,47 @@ void render_target::load_additional_layout_files(const char *basename, bool have generate_view("Top-to-Bottom", 1U, false, [] (unsigned x, unsigned y) { return y; }); generate_view("Top-to-Bottom (Gapless)", 1U, true, [] (unsigned x, unsigned y) { return y; }); + // generate fake cocktail view for systems with two screens + if (screens.size() == 2U) + { + float const height0(float(screens[0].physical_y()) / screens[0].physical_x()); + float const height1(float(screens[1].physical_y()) / screens[1].physical_x()); + float const minor_dim((std::max)((std::min)(height0, 1.0F), (std::min)(height1, 1.0F))); + + util::xml::data_node *const viewnode(layoutnode->add_child("view", nullptr)); + if (!viewnode) + throw emu_fatalerror("Couldn't create XML node??"); + viewnode->set_attribute("name", "Cocktail"); + + util::xml::data_node *const mirrornode(viewnode->add_child("screen", nullptr)); + if (!mirrornode) + throw emu_fatalerror("Couldn't create XML node??"); + mirrornode->set_attribute_int("index", 1); + util::xml::data_node *const mirrorbounds(mirrornode->add_child("bounds", nullptr)); + if (!mirrorbounds) + throw emu_fatalerror("Couldn't create XML node??"); + mirrorbounds->set_attribute_int("x", 0); + mirrorbounds->set_attribute_float("y", (-0.01 * minor_dim) - height1); + mirrorbounds->set_attribute_int("width", 1); + mirrorbounds->set_attribute_float("height", height1); + util::xml::data_node *const flipper(mirrornode->add_child("orientation", nullptr)); + if (!flipper) + throw emu_fatalerror("Couldn't create XML node??"); + flipper->set_attribute_int("rotate", 180); + + util::xml::data_node *const screennode(viewnode->add_child("screen", nullptr)); + if (!screennode) + throw emu_fatalerror("Couldn't create XML node??"); + screennode->set_attribute_int("index", 0); + util::xml::data_node *const screenbounds(screennode->add_child("bounds", nullptr)); + if (!screenbounds) + throw emu_fatalerror("Couldn't create XML node??"); + screenbounds->set_attribute_int("x", 0); + screenbounds->set_attribute_int("y", 0); + screenbounds->set_attribute_int("width", 1); + screenbounds->set_attribute_float("height", height0); + } + // generate tiled views for (unsigned mindim = 2; ((screens.size() + mindim - 1) / mindim) >= mindim; ++mindim) { diff --git a/src/emu/rendutil.cpp b/src/emu/rendutil.cpp index 3511d311bdc..ba8e177f93e 100644 --- a/src/emu/rendutil.cpp +++ b/src/emu/rendutil.cpp @@ -577,7 +577,7 @@ void render_load_jpeg(bitmap_argb32 &bitmap, emu_file &file, const char *dirname jpeg_mem_src(&cinfo, jpg_buffer.get(), jpg_size); // read JPEG header and start decompression - jpeg_read_header(&cinfo, true); + jpeg_read_header(&cinfo, TRUE); jpeg_start_decompress(&cinfo); // allocates the destination bitmap diff --git a/src/emu/save.h b/src/emu/save.h index 9097c195dec..cfdf119a156 100644 --- a/src/emu/save.h +++ b/src/emu/save.h @@ -92,21 +92,21 @@ class save_manager template <typename T> struct array_unwrap { using underlying_type = T; - static constexpr std::size_t COUNT = 1U; + static constexpr std::size_t SAVE_COUNT = 1U; static constexpr std::size_t SIZE = sizeof(underlying_type); static underlying_type *ptr(T &value) { return &value; } }; template <typename T, std::size_t N> struct array_unwrap<T[N]> { using underlying_type = typename array_unwrap<T>::underlying_type; - static constexpr std::size_t COUNT = N * array_unwrap<T>::COUNT; + static constexpr std::size_t SAVE_COUNT = N * array_unwrap<T>::SAVE_COUNT; static constexpr std::size_t SIZE = sizeof(underlying_type); static underlying_type *ptr(T (&value)[N]) { return array_unwrap<T>::ptr(value[0]); } }; template <typename T, std::size_t N> struct array_unwrap<std::array<T, N> > { using underlying_type = typename array_unwrap<T>::underlying_type; - static constexpr std::size_t COUNT = N * array_unwrap<T>::COUNT; + static constexpr std::size_t SAVE_COUNT = N * array_unwrap<T>::SAVE_COUNT; static constexpr std::size_t SIZE = sizeof(underlying_type); static underlying_type *ptr(std::array<T, N> &value) { return array_unwrap<T>::ptr(value[0]); } }; @@ -151,7 +151,7 @@ public: throw emu_fatalerror("Called save_item on a pointer with no count!"); if (!type_checker<typename array_unwrap<ItemType>::underlying_type>::is_atom) throw emu_fatalerror("Called save_item on a non-fundamental type!"); - save_memory(device, module, tag, index, valname, array_unwrap<ItemType>::ptr(value), array_unwrap<ItemType>::SIZE, array_unwrap<ItemType>::COUNT); + save_memory(device, module, tag, index, valname, array_unwrap<ItemType>::ptr(value), array_unwrap<ItemType>::SIZE, array_unwrap<ItemType>::SAVE_COUNT); } // templatized wrapper for pointers @@ -160,7 +160,7 @@ public: { if (!type_checker<typename array_unwrap<ItemType>::underlying_type>::is_atom) throw emu_fatalerror("Called save_item on a non-fundamental type!"); - save_memory(device, module, tag, index, valname, array_unwrap<ItemType>::ptr(value[0]), array_unwrap<ItemType>::SIZE, array_unwrap<ItemType>::COUNT * count); + save_memory(device, module, tag, index, valname, array_unwrap<ItemType>::ptr(value[0]), array_unwrap<ItemType>::SIZE, array_unwrap<ItemType>::SAVE_COUNT * count); } // templatized wrapper for std::unique_ptr @@ -169,7 +169,7 @@ public: { if (!type_checker<typename array_unwrap<ItemType>::underlying_type>::is_atom) throw emu_fatalerror("Called save_item on a non-fundamental type!"); - save_memory(device, module, tag, index, valname, array_unwrap<ItemType>::ptr(value[0]), array_unwrap<ItemType>::SIZE, array_unwrap<ItemType>::COUNT * count); + save_memory(device, module, tag, index, valname, array_unwrap<ItemType>::ptr(value[0]), array_unwrap<ItemType>::SIZE, array_unwrap<ItemType>::SAVE_COUNT * count); } // global memory registration diff --git a/src/emu/softlist.cpp b/src/emu/softlist.cpp index 40b0013490b..1db2879fcda 100644 --- a/src/emu/softlist.cpp +++ b/src/emu/softlist.cpp @@ -475,7 +475,7 @@ void softlist_parser::parse_root_start(const char *tagname, const char **attribu // <softwarelist name='' description=''> if (strcmp(tagname, "softwarelist") == 0) { - static const char *attrnames[] = { "name", "description" }; + static char const *const attrnames[] = { "name", "description" }; const auto attrvalues = parse_attributes(attributes, attrnames); if (!attrvalues[1].empty()) @@ -496,7 +496,7 @@ void softlist_parser::parse_main_start(const char *tagname, const char **attribu // <software name='' cloneof='' supported=''> if (strcmp(tagname, "software") == 0) { - static const char *attrnames[] = { "name", "cloneof", "supported" }; + static char const *const attrnames[] = { "name", "cloneof", "supported" }; auto attrvalues = parse_attributes(attributes, attrnames); if (!attrvalues[0].empty()) @@ -563,7 +563,7 @@ void softlist_parser::parse_soft_start(const char *tagname, const char **attribu // <part name='' interface=''> else if (strcmp(tagname, "part" ) == 0) { - static const char *attrnames[] = { "name", "interface" }; + static char const *const attrnames[] = { "name", "interface" }; auto attrvalues = parse_attributes(attributes, attrnames); if (!attrvalues[0].empty() && !attrvalues[1].empty()) @@ -596,7 +596,7 @@ void softlist_parser::parse_part_start(const char *tagname, const char **attribu // <dataarea name='' size=''> if (strcmp(tagname, "dataarea") == 0) { - static const char *attrnames[] = { "name", "size", "width", "endianness" }; + static char const *const attrnames[] = { "name", "size", "width", "endianness" }; auto attrvalues = parse_attributes(attributes, attrnames); if (!attrvalues[0].empty() && !attrvalues[1].empty()) @@ -638,7 +638,7 @@ void softlist_parser::parse_part_start(const char *tagname, const char **attribu // <diskarea name=''> else if (strcmp(tagname, "diskarea") == 0) { - static const char *attrnames[] = { "name" }; + static char const *const attrnames[] = { "name" }; auto attrvalues = parse_attributes(attributes, attrnames); if (!attrvalues[0].empty()) @@ -683,7 +683,7 @@ void softlist_parser::parse_data_start(const char *tagname, const char **attribu // <rom name='' size='' crc='' sha1='' offset='' value='' status='' loadflag=''> if (strcmp(tagname, "rom") == 0) { - static const char *attrnames[] = { "name", "size", "crc", "sha1", "offset", "value", "status", "loadflag" }; + static char const *const attrnames[] = { "name", "size", "crc", "sha1", "offset", "value", "status", "loadflag" }; auto attrvalues = parse_attributes(attributes, attrnames); std::string &name = attrvalues[0]; @@ -757,7 +757,7 @@ void softlist_parser::parse_data_start(const char *tagname, const char **attribu // <rom name='' sha1='' status='' writeable=''> else if (strcmp(tagname, "disk") == 0) { - static const char *attrnames[] = { "name", "sha1", "status", "writeable" }; + static char const *const attrnames[] = { "name", "sha1", "status", "writeable" }; auto attrvalues = parse_attributes(attributes, attrnames); std::string &name = attrvalues[0]; diff --git a/src/emu/speaker.h b/src/emu/speaker.h index ce4034ade0f..47ad0f6b7d2 100644 --- a/src/emu/speaker.h +++ b/src/emu/speaker.h @@ -19,6 +19,7 @@ magnitude), and completely ignores the y and z coordinates. ***************************************************************************/ + #ifndef MAME_EMU_SPEAKER_H #define MAME_EMU_SPEAKER_H @@ -57,6 +58,7 @@ public: speaker_device &front_center() { set_position(0.0, 0.0, 1.0); return *this; } speaker_device &front_left() { set_position(-0.2, 0.0, 1.0); return *this; } speaker_device &front_right() { set_position(0.2, 0.0, 1.0); return *this; } + speaker_device &rear_center() { set_position(0.0, 0.0, -0.5); return *this; } speaker_device &rear_left() { set_position(-0.2, 0.0, -0.5); return *this; } speaker_device &rear_right() { set_position(0.2, 0.0, -0.5); return *this; } speaker_device &subwoofer() { set_position(0.0, 0.0, 0.0); return *this; } diff --git a/src/emu/validity.cpp b/src/emu/validity.cpp index 03530727721..93c06eff52d 100644 --- a/src/emu/validity.cpp +++ b/src/emu/validity.cpp @@ -81,7 +81,7 @@ void validity_checker::validate_tag(const char *tag) osd_printf_error("Invalid generic tag '%s' used\n", tag); // scan for invalid characters - static const char *validchars = "abcdefghijklmnopqrstuvwxyz0123456789_.:^$"; + static char const *const validchars = "abcdefghijklmnopqrstuvwxyz0123456789_.:^$"; for (const char *p = tag; *p != 0; p++) { // only lower-case permitted diff --git a/src/emu/video.h b/src/emu/video.h index fa9fc6abbe7..4c73db42393 100644 --- a/src/emu/video.h +++ b/src/emu/video.h @@ -28,7 +28,6 @@ constexpr int FRAMESKIP_LEVELS = 12; constexpr int MAX_FRAMESKIP = FRAMESKIP_LEVELS - 2; -#define LCD_FRAMES_PER_SECOND 30 //************************************************************************** // TYPE DEFINITIONS @@ -107,7 +106,6 @@ public: std::string &timecode_text(std::string &str); std::string &timecode_total_text(std::string &str); - private: // internal helpers void exit(); @@ -222,7 +220,6 @@ private: std::string m_timecode_text; // Message for that video part (intro, gameplay, extra) attotime m_timecode_start; // Starting timer for that video part (intro, gameplay, extra) attotime m_timecode_total; // Show/hide timer at left (total elapsed on resulting video preview) - }; #endif // MAME_EMU_VIDEO_H diff --git a/src/emu/xtal.cpp b/src/emu/xtal.cpp index 85f064dcddf..31f7d0b8d06 100644 --- a/src/emu/xtal.cpp +++ b/src/emu/xtal.cpp @@ -221,12 +221,13 @@ const double XTAL::known_xtals[] = { 16'777'216, /* 16.777216_MHz_XTAL Nintendo Game Boy Advance */ 16'934'400, /* 16.9344_MHz_XTAL Usually used to drive 90's Yamaha OPL/FM chips (44100 * 384) */ 17'064'000, /* 17.064_MHz_XTAL Memorex 1377 */ + 17'350'000, /* 17.35_MHz_XTAL ITT Courier 1700 */ 17'360'000, /* 17.36_MHz_XTAL OMTI Series 10 SCSI controller */ 17'550'000, /* 17.55_MHz_XTAL HP 264x display clock (50 Hz configuration) */ 17'600'000, /* 17.6_MHz_XTAL LSI Octopus */ 17'734'470, /* 17.73447_MHz_XTAL (~4x PAL subcarrier) */ 17'734'472, /* 17.734472_MHz_XTAL actually ~4x PAL subcarrier */ - 17'971'200, /* 17.9712_MHz_XTAL - */ + 17'971'200, /* 17.9712_MHz_XTAL Compucolor II, Hazeltine Esprit III */ 18'000'000, /* 18_MHz_XTAL S.A.R, Ikari Warriors 3 */ 18'432'000, /* 18.432_MHz_XTAL Extremely common, used on 100's of PCBs (48000 * 384) */ 18'480'000, /* 18.48_MHz_XTAL Wyse WY-100 video */ @@ -235,6 +236,7 @@ const double XTAL::known_xtals[] = { 18'869'600, /* 18.8696_MHz_XTAL Memorex 2178 */ 19'339'600, /* 19.3396_MHz_XTAL TeleVideo TVI-955 80-column display clock */ 19'600'000, /* 19.6_MHz_XTAL Universal Mr. Do - Model 8021 PCB */ + 19'602'000, /* 19.602_MHz_XTAL Ampex 210+ 80-column display clock */ 19'660'800, /* 19.6608_MHz_XTAL Euro League (bootleg), labeled as "UKI 19.6608 20PF" */ 19'661'400, /* 19.6614_MHz_XTAL Wyse WY-30 */ 19'923'000, /* 19.923_MHz_XTAL Cinematronics vectors */ @@ -304,6 +306,7 @@ const double XTAL::known_xtals[] = { 31'684'000, /* 31.684_MHz_XTAL TeleVideo TVI-955 132-column display clock */ 31'948'800, /* 31.9488_MHz_XTAL NEC PC-88xx, PC-98xx */ 32'000'000, /* 32_MHz_XTAL - */ + 32'147'000, /* 32.147_MHz_XTAL Ampex 210+ 132-column display clock */ 32'220'000, /* 32.22_MHz_XTAL Typically used on 90's Data East PCBs (close to 9x NTSC subcarrier which is 32.215905Mhz */ 32'317'400, /* 32.3174_MHz_XTAL DEC VT330, VT340 */ 32'530'400, /* 32.5304_MHz_XTAL Seta 2 */ @@ -317,6 +320,7 @@ const double XTAL::known_xtals[] = { 34'846'000, /* 34.846_MHz_XTAL Visual 550 */ 35'904'000, /* 35.904_MHz_XTAL Used on HP98543 graphics board */ 36'000'000, /* 36_MHz_XTAL Sega Model 1 video board */ + 37'980'000, /* 37.98_MHz_XTAL Falco 5220 */ 38'769'220, /* 38.76922_MHz_XTAL Namco System 21 video board */ 38'863'630, /* 38.86363_MHz_XTAL Sharp X68000 15.98kHz video */ 39'321'600, /* 39.3216_MHz_XTAL Sun 2/120 */ @@ -345,6 +349,7 @@ const double XTAL::known_xtals[] = { 50'000'000, /* 50_MHz_XTAL Williams/Midway T/W/V-unit system */ 50'113'000, /* 50.113_MHz_XTAL Namco NA-1 (14x NTSC subcarrier)*/ 50'349'000, /* 50.349_MHz_XTAL Sega System 18 (~3200x NTSC line rate) */ + 51'200'000, /* 51.2_MHz_XTAL Namco Super System 22 video clock */ 52'000'000, /* 52_MHz_XTAL Cojag */ 52'832'000, /* 52.832_MHz_XTAL Wang PC TIG video controller */ 53'203'400, /* 53.2034_MHz_XTAL Master System, Mega Drive PAL (~12x PAL subcarrier) */ @@ -357,6 +362,7 @@ const double XTAL::known_xtals[] = { 60'000'000, /* 60_MHz_XTAL ARM610 */ 61'440'000, /* 61.44_MHz_XTAL Donkey Kong */ 64'000'000, /* 64_MHz_XTAL BattleToads */ + 64'108'800, /* 64.108.800_Mhz_XTAL HP Topcat high-res */ 66'666'700, /* 66.6667_MHz_XTAL Later Midway games */ 67'737'600, /* 67.7376_MHz_XTAL PSX-based h/w, Sony ZN1-2-based */ 68'850'000, /* 68.85_MHz_XTAL Wyse WY-50 */ diff --git a/src/frontend/mame/luaengine.cpp b/src/frontend/mame/luaengine.cpp index ddae8e8aeb6..44c4fc94b3a 100644 --- a/src/frontend/mame/luaengine.cpp +++ b/src/frontend/mame/luaengine.cpp @@ -24,6 +24,7 @@ #include "natkeyboard.h" #include "uiinput.h" #include "pluginopts.h" +#include "softlist.h" #ifdef __clang__ #pragma clang diagnostic ignored "-Wshift-count-overflow" @@ -1986,6 +1987,7 @@ void lua_engine::initialize() "manufacturer", &device_image_interface::manufacturer, "year", &device_image_interface::year, "software_list_name", &device_image_interface::software_list_name, + "software_parent", sol::property([](device_image_interface &di) { const software_info *si = di.software_entry(); return si ? si->parentname() : ""; }), "image_type_name", &device_image_interface::image_type_name, "load", &device_image_interface::load, "unload", &device_image_interface::unload, diff --git a/src/frontend/mame/mame.cpp b/src/frontend/mame/mame.cpp index 63c765abc24..528a1717a4a 100644 --- a/src/frontend/mame/mame.cpp +++ b/src/frontend/mame/mame.cpp @@ -211,6 +211,9 @@ int mame_machine_manager::execute() // parse any INI files as the first thing if (m_options.read_config()) { + // but first, revert out any potential game-specific INI settings from previous runs via the internal UI + m_options.revert(OPTION_PRIORITY_INI); + std::ostringstream errors; mame_options::parse_standard_inis(m_options, errors); } diff --git a/src/frontend/mame/ui/filesel.cpp b/src/frontend/mame/ui/filesel.cpp index 348ed3207f4..3907f007517 100644 --- a/src/frontend/mame/ui/filesel.cpp +++ b/src/frontend/mame/ui/filesel.cpp @@ -284,6 +284,105 @@ void menu_file_selector::append_entry_menu_item(const file_selector_entry *entry //------------------------------------------------- +// select_item +//------------------------------------------------- + +void menu_file_selector::select_item(const file_selector_entry &entry) +{ + switch (entry.type) + { + case SELECTOR_ENTRY_TYPE_EMPTY: + // empty slot - unload + m_result = result::EMPTY; + stack_pop(); + break; + + case SELECTOR_ENTRY_TYPE_CREATE: + // create + m_result = result::CREATE; + stack_pop(); + break; + + case SELECTOR_ENTRY_TYPE_SOFTWARE_LIST: + m_result = result::SOFTLIST; + stack_pop(); + break; + + case SELECTOR_ENTRY_TYPE_DRIVE: + case SELECTOR_ENTRY_TYPE_DIRECTORY: + // drive/directory - first check the path + { + util::zippath_directory::ptr dir; + osd_file::error const err = util::zippath_directory::open(entry.fullpath, dir); + if (err != osd_file::error::NONE) + { + // this path is problematic; present the user with an error and bail + ui().popup_time(1, _("Error accessing %s"), entry.fullpath); + break; + } + } + m_current_directory.assign(entry.fullpath); + reset(reset_options::SELECT_FIRST); + break; + + case SELECTOR_ENTRY_TYPE_FILE: + // file + m_current_file.assign(entry.fullpath); + m_result = result::FILE; + stack_pop(); + break; + } +} + + +//------------------------------------------------- +// type_search_char +//------------------------------------------------- + +void menu_file_selector::type_search_char(char32_t ch) +{ + std::string const current(m_filename); + if (input_character(m_filename, ch, uchar_is_printable)) + { + ui().popup_time(ERROR_MESSAGE_TIME, "%s", m_filename.c_str()); + + file_selector_entry const *const cur_selected(reinterpret_cast<file_selector_entry const *>(get_selection_ref())); + + // if it's a perfect match for the current selection, don't move it + if (!cur_selected || core_strnicmp(cur_selected->basename.c_str(), m_filename.c_str(), m_filename.size())) + { + std::string::size_type bestmatch(0); + file_selector_entry const *selected_entry(cur_selected); + for (auto &entry : m_entrylist) + { + // TODO: more efficient "common prefix" code + std::string::size_type match(0); + for (std::string::size_type i = 1; m_filename.size() >= i; ++i) + { + if (!core_strnicmp(entry.basename.c_str(), m_filename.c_str(), i)) + match = i; + else + break; + } + + if (match > bestmatch) + { + bestmatch = match; + selected_entry = &entry; + } + } + + if (selected_entry && (selected_entry != cur_selected)) + { + set_selection((void *)selected_entry); + centre_selection(); + } + } + } +} + + +//------------------------------------------------- // populate //------------------------------------------------- @@ -375,61 +474,14 @@ void menu_file_selector::populate(float &customtop, float &custombottom) void menu_file_selector::handle() { - osd_file::error err; - const file_selector_entry *selected_entry = nullptr; - int bestmatch = 0; - // process the menu - const event *event = process(0); - if (event != nullptr && event->itemref != nullptr) + event const *const event = process(0); + if (event && event->itemref) { // handle selections if (event->iptkey == IPT_UI_SELECT) { - auto entry = (const file_selector_entry *) event->itemref; - switch (entry->type) - { - case SELECTOR_ENTRY_TYPE_EMPTY: - // empty slot - unload - m_result = result::EMPTY; - stack_pop(); - break; - - case SELECTOR_ENTRY_TYPE_CREATE: - // create - m_result = result::CREATE; - stack_pop(); - break; - - case SELECTOR_ENTRY_TYPE_SOFTWARE_LIST: - m_result = result::SOFTLIST; - stack_pop(); - break; - - case SELECTOR_ENTRY_TYPE_DRIVE: - case SELECTOR_ENTRY_TYPE_DIRECTORY: - // drive/directory - first check the path - { - util::zippath_directory::ptr dir; - err = util::zippath_directory::open(entry->fullpath, dir); - } - if (err != osd_file::error::NONE) - { - // this path is problematic; present the user with an error and bail - ui().popup_time(1, _("Error accessing %s"), entry->fullpath); - break; - } - m_current_directory.assign(entry->fullpath); - reset(reset_options::SELECT_FIRST); - break; - - case SELECTOR_ENTRY_TYPE_FILE: - // file - m_current_file.assign(entry->fullpath); - m_result = result::FILE; - stack_pop(); - break; - } + select_item(*reinterpret_cast<file_selector_entry const *>(event->itemref)); // reset the char buffer when pressing IPT_UI_SELECT m_filename.clear(); @@ -437,38 +489,7 @@ void menu_file_selector::handle() else if (event->iptkey == IPT_SPECIAL) { // if it's any other key and we're not maxed out, update - if (input_character(m_filename, event->unichar, uchar_is_printable)) - { - ui().popup_time(ERROR_MESSAGE_TIME, "%s", m_filename.c_str()); - - file_selector_entry const *const cur_selected(reinterpret_cast<file_selector_entry const *>(get_selection_ref())); - - // check for entries which matches our m_filename_buffer: - for (auto &entry : m_entrylist) - { - if (cur_selected != &entry) - { - int match = 0; - for (int i = 0; i < m_filename.size() + 1; i++) - { - if (core_strnicmp(entry.basename.c_str(), m_filename.c_str(), i) == 0) - match = i; - } - - if (match > bestmatch) - { - bestmatch = match; - selected_entry = &entry; - } - } - } - - if (selected_entry != nullptr && selected_entry != cur_selected) - { - set_selection((void *)selected_entry); - centre_selection(); - } - } + type_search_char(event->unichar); } else if (event->iptkey == IPT_UI_CANCEL) { diff --git a/src/frontend/mame/ui/filesel.h b/src/frontend/mame/ui/filesel.h index 2aec3a77da1..768cf1ba55e 100644 --- a/src/frontend/mame/ui/filesel.h +++ b/src/frontend/mame/ui/filesel.h @@ -89,6 +89,8 @@ private: file_selector_entry &append_entry(file_selector_entry_type entry_type, std::string &&entry_basename, std::string &&entry_fullpath); file_selector_entry *append_dirent_entry(const osd::directory::entry *dirent); void append_entry_menu_item(const file_selector_entry *entry); + void select_item(const file_selector_entry &entry); + void type_search_char(char32_t ch); }; diff --git a/src/frontend/mame/ui/ui.cpp b/src/frontend/mame/ui/ui.cpp index 9fe360d3891..94eea829b4c 100644 --- a/src/frontend/mame/ui/ui.cpp +++ b/src/frontend/mame/ui/ui.cpp @@ -49,7 +49,7 @@ enum ***************************************************************************/ // list of natural keyboard keys that are not associated with UI_EVENT_CHARs -static const input_item_id non_char_keys[] = +static input_item_id const non_char_keys[] = { ITEM_ID_ESC, ITEM_ID_F1, @@ -92,7 +92,7 @@ static const input_item_id non_char_keys[] = ITEM_ID_CANCEL }; -static const char *s_color_list[] = { +static char const *const s_color_list[] = { OPTION_UI_BORDER_COLOR, OPTION_UI_BACKGROUND_COLOR, OPTION_UI_GFXVIEWER_BG_COLOR, @@ -129,7 +129,7 @@ slider_state *mame_ui_manager::slider_current; CORE IMPLEMENTATION ***************************************************************************/ -static const uint32_t mouse_bitmap[32*32] = +static uint32_t const mouse_bitmap[32*32] = { 0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff, 0x09a46f30,0x81ac7c43,0x24af8049,0x00ad7d45,0x00a8753a,0x00a46f30,0x009f6725,0x009b611c,0x00985b14,0x0095560d,0x00935308,0x00915004,0x00904e02,0x008f4e01,0x008f4d00,0x008f4d00,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff,0x00ffffff, diff --git a/src/lib/formats/acorn_dsk.cpp b/src/lib/formats/acorn_dsk.cpp index 59261f9b4d5..d8992b9ad5a 100644 --- a/src/lib/formats/acorn_dsk.cpp +++ b/src/lib/formats/acorn_dsk.cpp @@ -127,6 +127,10 @@ const acorn_ssd_format::format acorn_ssd_format::formats[] = floppy_image::FF_35, floppy_image::DSDD, floppy_image::FM, 4000, 10, 80, 2, 256,{}, 0,{}, 40, 10, 10 }, + { // 100k 40 track single sided single density + floppy_image::FF_3, floppy_image::SSSD, floppy_image::FM, + 4000, 10, 40, 1, 256,{}, 0,{}, 40, 10, 10 + }, {} }; diff --git a/src/lib/formats/cbm_crt.cpp b/src/lib/formats/cbm_crt.cpp index 0da119c006f..05bd56d5c38 100644 --- a/src/lib/formats/cbm_crt.cpp +++ b/src/lib/formats/cbm_crt.cpp @@ -40,9 +40,10 @@ *********************************************************************/ #include "emu.h" // fatalerror -#include "corefile.h" #include "cbm_crt.h" +#include "corefile.h" + //************************************************************************** // MACROS/CONSTANTS @@ -52,7 +53,7 @@ // slot names for the C64 cartridge types -static const char * CRT_C64_SLOT_NAMES[_CRT_C64_COUNT] = +static char const *const CRT_C64_SLOT_NAMES[_CRT_C64_COUNT] = { "standard", // 0 - Normal cartridge UNSUPPORTED, // 1 - Action Replay diff --git a/src/lib/formats/dsk_dsk.cpp b/src/lib/formats/dsk_dsk.cpp index 463573ccc25..d661e1cd105 100644 --- a/src/lib/formats/dsk_dsk.cpp +++ b/src/lib/formats/dsk_dsk.cpp @@ -420,12 +420,12 @@ bool dsk_format::load(io_generic *io, uint32_t form_factor, floppy_image *image) else sects[j].actual_size = 128 << tr.sector_size_code; - if (sector.fdc_status_reg1 == 0xb2 || (sector.fdc_status_reg2 & 0x40)) + if (sector.fdc_status_reg2 & 0x40) sects[j].deleted = 1; - if (sector.fdc_status_reg1 == 0xb5 || (sector.fdc_status_reg2 & 0x20)) + if ((sector.fdc_status_reg1 & 0x20) || (sector.fdc_status_reg2 & 0x20)) sects[j].bad_crc = 1; - if(!sects[j].deleted) { + if(!(sector.fdc_status_reg1 & 0x04)) { sects[j].data = sect_data + sdatapos; io_generic_read(io, sects[j].data, pos, sects[j].actual_size); sdatapos += sects[j].actual_size; diff --git a/src/lib/formats/hti_tape.cpp b/src/lib/formats/hti_tape.cpp index 92f28228a59..f046ea0c130 100644 --- a/src/lib/formats/hti_tape.cpp +++ b/src/lib/formats/hti_tape.cpp @@ -10,8 +10,6 @@ #include "imageutl.h" static constexpr uint32_t FILE_MAGIC = 0x5441434f; // Magic value at start of image file: "TACO" -static constexpr hti_format_t::tape_pos_t ZERO_BIT_LEN = 619; // Length of 0 bits at slow tape speed: 1/(35200 Hz) -static constexpr hti_format_t::tape_pos_t ONE_BIT_LEN = 1083; // Length of 1 bits at slow tape speed: 1.75 times ZERO_BIT_LEN // *** Position of tape holes *** // At beginning of tape: diff --git a/src/lib/formats/hti_tape.h b/src/lib/formats/hti_tape.h index 3366b48f697..4c5e5ed3279 100644 --- a/src/lib/formats/hti_tape.h +++ b/src/lib/formats/hti_tape.h @@ -33,6 +33,12 @@ public: // Tape length: 140 ft of usable tape + 72" of punched tape at either end static constexpr tape_pos_t TAPE_LENGTH = (140 * 12 + 72 * 2) * ONE_INCH_POS; + // Length of 0 bits at slow tape speed: 1/(35200 Hz) + static constexpr tape_pos_t ZERO_BIT_LEN = 619; + + // Length of 1 bits at slow tape speed: 1.75 times ZERO_BIT_LEN + static constexpr tape_pos_t ONE_BIT_LEN = 1083; + // Words stored on tape typedef uint16_t tape_word_t; diff --git a/src/lib/formats/tzx_cas.cpp b/src/lib/formats/tzx_cas.cpp index fe12640e773..ddfe21b81dc 100644 --- a/src/lib/formats/tzx_cas.cpp +++ b/src/lib/formats/tzx_cas.cpp @@ -286,11 +286,11 @@ static int tzx_cas_handle_block( int16_t **buffer, const uint8_t *bytes, int pau tzx_output_wave(buffer, start_pause_samples); size += start_pause_samples; - + if (pause > 0) - { + { int rest_pause_samples = millisec_to_samplecount(pause - 1); - + wave_data = WAVE_LOW; tzx_output_wave(buffer, rest_pause_samples); size += rest_pause_samples; diff --git a/src/lib/netlist/plib/ptypes.h b/src/lib/netlist/plib/ptypes.h index c40cd283787..0934a86fdf2 100644 --- a/src/lib/netlist/plib/ptypes.h +++ b/src/lib/netlist/plib/ptypes.h @@ -83,7 +83,7 @@ namespace plib enum E { __VA_ARGS__ }; \ ename (E v) : m_v(v) { } \ bool set_from_string (const pstring &s) { \ - static const char *strings = # __VA_ARGS__; \ + static char const *const strings = # __VA_ARGS__; \ int f = from_string_int(strings, s.c_str()); \ if (f>=0) { m_v = static_cast<E>(f); return true; } else { return false; } \ } \ @@ -91,7 +91,7 @@ namespace plib bool operator==(const ename &rhs) const {return m_v == rhs.m_v;} \ bool operator==(const E &rhs) const {return m_v == rhs;} \ const pstring name() const { \ - static const char *strings = # __VA_ARGS__; \ + static char const *const strings = # __VA_ARGS__; \ return nthstr(static_cast<int>(m_v), strings); \ } \ private: E m_v; }; diff --git a/src/lib/util/coretmpl.h b/src/lib/util/coretmpl.h index 4b3b05bf274..6c8ac39b45c 100644 --- a/src/lib/util/coretmpl.h +++ b/src/lib/util/coretmpl.h @@ -885,6 +885,17 @@ public: bool full() const { return !m_empty && (m_head == m_tail); } bool empty() const { return m_empty; } + // number of currently enqueued elements + std::size_t queue_length() const + { + if (m_empty) + return 0; + + auto const distance = std::distance(m_head, m_tail); + + return (distance > 0) ? distance : (N + distance); + } + void enqueue(T const &v) { if (WriteWrap || m_empty || (m_head != m_tail)) diff --git a/src/lib/util/hash.cpp b/src/lib/util/hash.cpp index 4593ad181a4..ddb6f52ac5c 100644 --- a/src/lib/util/hash.cpp +++ b/src/lib/util/hash.cpp @@ -20,15 +20,15 @@ namespace util { // GLOBAL VARIABLES //************************************************************************** -const char hash_collection::HASH_CRC; -const char hash_collection::HASH_SHA1; +char const hash_collection::HASH_CRC; +char const hash_collection::HASH_SHA1; -const char *hash_collection::HASH_TYPES_CRC = "R"; -const char *hash_collection::HASH_TYPES_CRC_SHA1 = "RS"; -const char *hash_collection::HASH_TYPES_ALL = "RS"; +char const *const hash_collection::HASH_TYPES_CRC = "R"; +char const *const hash_collection::HASH_TYPES_CRC_SHA1 = "RS"; +char const *const hash_collection::HASH_TYPES_ALL = "RS"; -const char hash_collection::FLAG_NO_DUMP; -const char hash_collection::FLAG_BAD_DUMP; +char const hash_collection::FLAG_NO_DUMP; +char const hash_collection::FLAG_BAD_DUMP; diff --git a/src/lib/util/hash.h b/src/lib/util/hash.h index cb87f3f8b3c..98a851bfd60 100644 --- a/src/lib/util/hash.h +++ b/src/lib/util/hash.h @@ -46,9 +46,9 @@ public: static constexpr char HASH_SHA1 = 'S'; // common combinations for requests - static const char *HASH_TYPES_CRC; - static const char *HASH_TYPES_CRC_SHA1; - static const char *HASH_TYPES_ALL; + static char const *const HASH_TYPES_CRC; + static char const *const HASH_TYPES_CRC_SHA1; + static char const *const HASH_TYPES_ALL; // flags are identified by punctuation marks static constexpr char FLAG_NO_DUMP = '!'; diff --git a/src/lib/util/options.cpp b/src/lib/util/options.cpp index d323ef11ffe..cffb7493fe3 100644 --- a/src/lib/util/options.cpp +++ b/src/lib/util/options.cpp @@ -1025,3 +1025,30 @@ bool core_options::header_exists(const char *description) const return iter != m_entries.end(); } + +//------------------------------------------------- +// revert - revert options at or below a certain +// priority back to their defaults +//------------------------------------------------- + +void core_options::revert(int priority_hi, int priority_lo) +{ + for (entry::shared_ptr &curentry : m_entries) + if (curentry->type() != option_type::HEADER) + curentry->revert(priority_hi, priority_lo); +} + +//------------------------------------------------- +// revert - revert back to our default if we are +// within the given priority range +//------------------------------------------------- + +void core_options::simple_entry::revert(int priority_hi, int priority_lo) +{ + // if our priority is within the range, revert to the default + if (priority() <= priority_hi && priority() >= priority_lo) + { + set_value(std::string(default_value()), priority(), true); + set_priority(OPTION_PRIORITY_DEFAULT); + } +} diff --git a/src/lib/util/options.h b/src/lib/util/options.h index d0cb6e5c29f..74fec7b0a90 100644 --- a/src/lib/util/options.h +++ b/src/lib/util/options.h @@ -130,6 +130,7 @@ public: virtual void set_default_value(std::string &&newvalue); void set_description(const char *description) { m_description = description; } void set_value_changed_handler(std::function<void(const char *)> &&handler) { m_value_changed_handler = std::move(handler); } + virtual void revert(int priority_hi, int priority_lo) { } protected: virtual void internal_set_value(std::string &&newvalue) = 0; @@ -171,6 +172,7 @@ public: void set_description(const char *name, const char *description); void remove_entry(entry &delentry); void set_value_changed_handler(const std::string &name, std::function<void(const char *)> &&handler); + void revert(int priority_hi = OPTION_PRIORITY_MAXIMUM, int priority_lo = OPTION_PRIORITY_DEFAULT); // parsing/input void parse_command_line(const std::vector<std::string> &args, int priority, bool ignore_unknown_options = false); @@ -217,6 +219,7 @@ private: virtual const char *minimum() const override; virtual const char *maximum() const override; virtual const std::string &default_value() const override; + virtual void revert(int priority_hi, int priority_lo) override; virtual void set_default_value(std::string &&newvalue) override; diff --git a/src/mame/arcade.flt b/src/mame/arcade.flt index 40c6c2df8c1..49c2da8d7ee 100644 --- a/src/mame/arcade.flt +++ b/src/mame/arcade.flt @@ -817,6 +817,8 @@ namcos11.cpp namcos12.cpp namcos2.cpp namcos21.cpp +namcos21_c67.cpp +namcos21_de.cpp namcos22.cpp namcos23.cpp namcos86.cpp diff --git a/src/mame/audio/dkong.cpp b/src/mame/audio/dkong.cpp index d79231d629a..bf990751411 100644 --- a/src/mame/audio/dkong.cpp +++ b/src/mame/audio/dkong.cpp @@ -1333,8 +1333,8 @@ MACHINE_CONFIG_START(dkong_state::dkong2b_audio) * P2.Bit2-0 -> select the 256 byte bank for external ROM */ - LATCH8(config, m_dev_vp2); /* virtual latch for port B */ - m_dev_vp2->set_xorvalue(0x20); /* signal is inverted */ + LATCH8(config, m_dev_vp2); /* virtual latch for port B */ + m_dev_vp2->set_xorvalue(0x20); /* signal is inverted */ m_dev_vp2->read_cb<5>().set(m_dev_6h, FUNC(latch8_device::bit3_r)); m_dev_vp2->write_cb<7>().set("discrete", FUNC(discrete_device::write_line<DS_DISCHARGE_INV>)); @@ -1372,8 +1372,8 @@ MACHINE_CONFIG_START(dkong_state::radarscp1_audio) MCFG_MCS48_PORT_P2_IN_CB(CONSTANT(0)) /* virtual_p2 is not read -see memory map-, all bits are output bits */ - latch8_device &vp1(LATCH8(config, "virtual_p1")); /* virtual latch for port A */ - vp1.set_xorvalue(0x80); /* signal is inverted */ + latch8_device &vp1(LATCH8(config, "virtual_p1")); /* virtual latch for port A */ + vp1.set_xorvalue(0x80); /* signal is inverted */ vp1.read_cb<7>().set(m_dev_6h, FUNC(latch8_device::bit3_r)); vp1.read_cb<6>().set("tms", FUNC(m58817_device::status_r)); @@ -1405,8 +1405,8 @@ MACHINE_CONFIG_START(dkong_state::dkongjr_audio) latch8_device &dev_4h(LATCH8(config, "ls259.4h")); - LATCH8(config, m_dev_vp2); /* virtual latch for port B */ - m_dev_vp2->set_xorvalue(0x70); /* all signals are inverted */ + LATCH8(config, m_dev_vp2); /* virtual latch for port B */ + m_dev_vp2->set_xorvalue(0x70); /* all signals are inverted */ m_dev_vp2->read_cb<6>().set(dev_4h, FUNC(latch8_device::bit1_r)); m_dev_vp2->read_cb<5>().set(m_dev_6h, FUNC(latch8_device::bit3_r)); m_dev_vp2->read_cb<4>().set(m_dev_6h, FUNC(latch8_device::bit6_r)); diff --git a/src/mame/audio/dsbz80.cpp b/src/mame/audio/dsbz80.cpp index c521ac825b6..a55613566cd 100644 --- a/src/mame/audio/dsbz80.cpp +++ b/src/mame/audio/dsbz80.cpp @@ -29,8 +29,7 @@ void dsbz80_device::dsbz80io_map(address_map &map) map(0xe5, 0xe7).w(FUNC(dsbz80_device::mpeg_end_w)); map(0xe8, 0xe8).w(FUNC(dsbz80_device::mpeg_volume_w)); map(0xe9, 0xe9).w(FUNC(dsbz80_device::mpeg_stereo_w)); - map(0xf0, 0xf0).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf1, 0xf1).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xf0, 0xf1).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); } diff --git a/src/mame/audio/leland.cpp b/src/mame/audio/leland.cpp index 027e1ff2adb..8019b0c514e 100644 --- a/src/mame/audio/leland.cpp +++ b/src/mame/audio/leland.cpp @@ -690,14 +690,14 @@ READ16_MEMBER( leland_80186_sound_device::peripheral_r ) case 2: if (ACCESSING_BITS_0_7) - return m_pit[0]->read(space, offset & 3); + return m_pit[0]->read(offset & 3); break; case 3: if (m_type <= TYPE_REDLINE) { if (ACCESSING_BITS_0_7) - return m_pit[1]->read(space, offset & 3); + return m_pit[1]->read(offset & 3); } else if (m_type == TYPE_WSF) return m_ymsnd->read(space, offset); @@ -707,7 +707,7 @@ READ16_MEMBER( leland_80186_sound_device::peripheral_r ) if (m_type == TYPE_REDLINE) { if (ACCESSING_BITS_0_7) - return m_pit[2]->read(space, offset & 3); + return m_pit[2]->read(offset & 3); } else logerror("%s:Unexpected peripheral read %d/%02X\n", machine().describe_context(), select, offset*2); @@ -735,14 +735,14 @@ WRITE16_MEMBER( leland_80186_sound_device::peripheral_w ) case 2: if (ACCESSING_BITS_0_7) - m_pit[0]->write(space, offset & 3, data); + m_pit[0]->write(offset & 3, data); break; case 3: if (m_type <= TYPE_REDLINE) { if (ACCESSING_BITS_0_7) - m_pit[1]->write(space, offset & 3, data); + m_pit[1]->write(offset & 3, data); } else if(m_type == TYPE_WSF) m_ymsnd->write(space, offset, data); @@ -752,7 +752,7 @@ WRITE16_MEMBER( leland_80186_sound_device::peripheral_w ) if (m_type == TYPE_REDLINE) { if (ACCESSING_BITS_0_7) - m_pit[2]->write(space, offset & 3, data); + m_pit[2]->write(offset & 3, data); } else if (mem_mask == 0xffff) { diff --git a/src/mame/audio/segag80r.cpp b/src/mame/audio/segag80r.cpp index 50704c5a648..27e5f47a68f 100644 --- a/src/mame/audio/segag80r.cpp +++ b/src/mame/audio/segag80r.cpp @@ -687,43 +687,6 @@ void monsterb_sound_device::device_start() save_item(NAME(m_sound_addr)); } -/************************************* - * - * Machine driver - * - *************************************/ - -MACHINE_CONFIG_START(monsterb_sound_device::device_add_mconfig) - /* basic machine hardware */ - MCFG_DEVICE_ADD(m_audiocpu, N7751, 6000000) - MCFG_MCS48_PORT_T1_IN_CB(CONSTANT(0)) // labelled as "TEST", connected to ground - MCFG_MCS48_PORT_P2_IN_CB(READ8(*this, monsterb_sound_device, n7751_command_r)) - MCFG_MCS48_PORT_BUS_IN_CB(READ8(*this, monsterb_sound_device, n7751_rom_r)) - MCFG_MCS48_PORT_P1_OUT_CB(WRITE8("dac", dac_byte_interface, data_w)) - MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, monsterb_sound_device, n7751_p2_w)) - MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(m_i8243, i8243_device, prog_w)) - - I8243(config, m_i8243); - m_i8243->read_handler().set_constant(0); - m_i8243->write_handler().set(FUNC(monsterb_sound_device::n7751_rom_control_w)); - - MCFG_DEVICE_ADD(m_samples, SAMPLES) - MCFG_SAMPLES_CHANNELS(2) - MCFG_SAMPLES_NAMES(monsterb_sample_names) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.25) - - MCFG_TMS36XX_ADD(m_music, 247) - MCFG_TMS36XX_TYPE(TMS3617) - MCFG_TMS36XX_DECAY_TIMES(0.5, 0.5, 0.5, 0.5, 0.5, 0.5) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) - - MCFG_DEVICE_ADD("dac", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) // 50K (R91-97)/100K (R98-106) ladder network - MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0) - MCFG_SOUND_ROUTE(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac", -1.0, DAC_VREF_NEG_INPUT) - - SPEAKER(config, "speaker").front_center(); -MACHINE_CONFIG_END - /************************************* * @@ -791,37 +754,26 @@ WRITE8_MEMBER(monsterb_sound_device::n7751_command_w) } -WRITE8_MEMBER(monsterb_sound_device::n7751_rom_control_w) +template<int Shift> +void monsterb_sound_device::n7751_rom_addr_w(uint8_t data) { - /* P4 - address lines 0-3 */ - /* P5 - address lines 4-7 */ - /* P6 - address lines 8-11 */ - /* P7 - ROM selects */ - switch (offset) - { - case 0: - m_sound_addr = (m_sound_addr & ~0x00f) | ((data & 0x0f) << 0); - break; - - case 1: - m_sound_addr = (m_sound_addr & ~0x0f0) | ((data & 0x0f) << 4); - break; + // P4 - address lines 0-3 + // P5 - address lines 4-7 + // P5 - address lines 8-11 + m_sound_addr = (m_sound_addr & ~(0x00f << Shift)) | ((data & 0x0f) << Shift); +} - case 2: - m_sound_addr = (m_sound_addr & ~0xf00) | ((data & 0x0f) << 8); - break; - case 3: - m_sound_addr &= 0xfff; - { - int numroms = m_audiocpu_region->bytes() / 0x1000; - if (!(data & 0x01) && numroms >= 1) m_sound_addr |= 0x0000; - if (!(data & 0x02) && numroms >= 2) m_sound_addr |= 0x1000; - if (!(data & 0x04) && numroms >= 3) m_sound_addr |= 0x2000; - if (!(data & 0x08) && numroms >= 4) m_sound_addr |= 0x3000; - } - break; - } +void monsterb_sound_device::n7751_rom_select_w(uint8_t data) +{ + // P7 - ROM selects + m_sound_addr &= 0xfff; + + int numroms = m_audiocpu_region->bytes() / 0x1000; + if (!(data & 0x01) && numroms >= 1) m_sound_addr |= 0x0000; + if (!(data & 0x02) && numroms >= 2) m_sound_addr |= 0x1000; + if (!(data & 0x04) && numroms >= 3) m_sound_addr |= 0x2000; + if (!(data & 0x08) && numroms >= 4) m_sound_addr |= 0x3000; } @@ -843,9 +795,50 @@ READ8_MEMBER(monsterb_sound_device::n7751_command_r) WRITE8_MEMBER(monsterb_sound_device::n7751_p2_w) { /* write to P2; low 4 bits go to 8243 */ - m_i8243->p2_w(space, offset, data & 0x0f); + m_i8243->p2_w(data & 0x0f); /* output of bit $80 indicates we are ready (1) or busy (0) */ /* no other outputs are used */ m_n7751_busy = data >> 7; } + + + +/************************************* + * + * Machine driver + * + *************************************/ + +MACHINE_CONFIG_START(monsterb_sound_device::device_add_mconfig) + /* basic machine hardware */ + MCFG_DEVICE_ADD(m_audiocpu, N7751, 6000000) + MCFG_MCS48_PORT_T1_IN_CB(CONSTANT(0)) // labelled as "TEST", connected to ground + MCFG_MCS48_PORT_P2_IN_CB(READ8(*this, monsterb_sound_device, n7751_command_r)) + MCFG_MCS48_PORT_BUS_IN_CB(READ8(*this, monsterb_sound_device, n7751_rom_r)) + MCFG_MCS48_PORT_P1_OUT_CB(WRITE8("dac", dac_byte_interface, data_w)) + MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, monsterb_sound_device, n7751_p2_w)) + MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(m_i8243, i8243_device, prog_w)) + + I8243(config, m_i8243); + m_i8243->p4_out_cb().set(FUNC(monsterb_sound_device::n7751_rom_addr_w<0>)); + m_i8243->p5_out_cb().set(FUNC(monsterb_sound_device::n7751_rom_addr_w<4>)); + m_i8243->p6_out_cb().set(FUNC(monsterb_sound_device::n7751_rom_addr_w<8>)); + m_i8243->p7_out_cb().set(FUNC(monsterb_sound_device::n7751_rom_select_w)); + + MCFG_DEVICE_ADD(m_samples, SAMPLES) + MCFG_SAMPLES_CHANNELS(2) + MCFG_SAMPLES_NAMES(monsterb_sample_names) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.25) + + MCFG_TMS36XX_ADD(m_music, 247) + MCFG_TMS36XX_TYPE(TMS3617) + MCFG_TMS36XX_DECAY_TIMES(0.5, 0.5, 0.5, 0.5, 0.5, 0.5) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) + + MCFG_DEVICE_ADD("dac", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) // 50K (R91-97)/100K (R98-106) ladder network + MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0) + MCFG_SOUND_ROUTE(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac", -1.0, DAC_VREF_NEG_INPUT) + + SPEAKER(config, "speaker").front_center(); +MACHINE_CONFIG_END diff --git a/src/mame/audio/segag80r.h b/src/mame/audio/segag80r.h index 6338984dadc..833a5d94f74 100644 --- a/src/mame/audio/segag80r.h +++ b/src/mame/audio/segag80r.h @@ -47,7 +47,8 @@ protected: DECLARE_WRITE8_MEMBER(n7751_p2_w); DECLARE_READ8_MEMBER(n7751_rom_r); - DECLARE_WRITE8_MEMBER(n7751_rom_control_w); + template<int Shift> void n7751_rom_addr_w(uint8_t data); + void n7751_rom_select_w(uint8_t data); required_device<n7751_device> m_audiocpu; required_memory_region m_audiocpu_region; diff --git a/src/mame/audio/segam1audio.cpp b/src/mame/audio/segam1audio.cpp index 4638106761a..f3f5ea7273b 100644 --- a/src/mame/audio/segam1audio.cpp +++ b/src/mame/audio/segam1audio.cpp @@ -14,39 +14,30 @@ #include "machine/clock.h" #include "speaker.h" -#define M68000_TAG "sndcpu" -#define MULTIPCM_1_TAG "pcm1" -#define MULTIPCM_2_TAG "pcm2" -#define YM3438_TAG "ymsnd" -#define UART_TAG "uart" -#define MPCMBANK1_TAG "m1pcm1_bank" -#define MPCMBANK2_TAG "m1pcm2_bank" - void segam1audio_device::segam1audio_map(address_map &map) { map(0x000000, 0x03ffff).rom(); - map(0x080000, 0x09ffff).rom().region(M68000_TAG, 0x20000); // mirror of upper ROM socket - map(0xc20001, 0xc20001).rw(UART_TAG, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xc20003, 0xc20003).rw(UART_TAG, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xc40000, 0xc40007).rw(MULTIPCM_1_TAG, FUNC(multipcm_device::read), FUNC(multipcm_device::write)).umask16(0x00ff); + map(0x080000, 0x09ffff).rom().region("sndcpu", 0x20000); // mirror of upper ROM socket + map(0xc20000, 0xc20003).rw(m_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0xc40000, 0xc40007).rw(m_multipcm_1, FUNC(multipcm_device::read), FUNC(multipcm_device::write)).umask16(0x00ff); map(0xc40012, 0xc40013).nopw(); map(0xc50000, 0xc50001).w(FUNC(segam1audio_device::m1_snd_mpcm_bnk1_w)); - map(0xc60000, 0xc60007).rw(MULTIPCM_2_TAG, FUNC(multipcm_device::read), FUNC(multipcm_device::write)).umask16(0x00ff); + map(0xc60000, 0xc60007).rw(m_multipcm_2, FUNC(multipcm_device::read), FUNC(multipcm_device::write)).umask16(0x00ff); map(0xc70000, 0xc70001).w(FUNC(segam1audio_device::m1_snd_mpcm_bnk2_w)); - map(0xd00000, 0xd00007).rw(YM3438_TAG, FUNC(ym3438_device::read), FUNC(ym3438_device::write)).umask16(0x00ff); + map(0xd00000, 0xd00007).rw(m_ym, FUNC(ym3438_device::read), FUNC(ym3438_device::write)).umask16(0x00ff); map(0xf00000, 0xf0ffff).ram(); } void segam1audio_device::mpcm1_map(address_map &map) { map(0x000000, 0x0fffff).rom(); - map(0x100000, 0x1fffff).bankr(MPCMBANK1_TAG); + map(0x100000, 0x1fffff).bankr(m_mpcmbank1); } void segam1audio_device::mpcm2_map(address_map &map) { map(0x000000, 0x0fffff).rom(); - map(0x100000, 0x1fffff).bankr(MPCMBANK2_TAG); + map(0x100000, 0x1fffff).bankr(m_mpcmbank2); } //************************************************************************** @@ -59,26 +50,27 @@ DEFINE_DEVICE_TYPE(SEGAM1AUDIO, segam1audio_device, "segam1audio", "Sega Model 1 // device_add_mconfig - add device configuration //------------------------------------------------- -MACHINE_CONFIG_START(segam1audio_device::device_add_mconfig) - MCFG_DEVICE_ADD(M68000_TAG, M68000, 10000000) // verified on real h/w - MCFG_DEVICE_PROGRAM_MAP(segam1audio_map) +void segam1audio_device::device_add_mconfig(machine_config &config) +{ + M68000(config, m_audiocpu, 10000000); // verified on real h/w + m_audiocpu->set_addrmap(AS_PROGRAM, &segam1audio_device::segam1audio_map); SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - MCFG_DEVICE_ADD(YM3438_TAG, YM3438, 8000000) - MCFG_SOUND_ROUTE(0, "lspeaker", 0.60) - MCFG_SOUND_ROUTE(1, "rspeaker", 0.60) + YM3438(config, m_ym, 8000000); + m_ym->add_route(0, "lspeaker", 0.60); + m_ym->add_route(1, "rspeaker", 0.60); - MCFG_DEVICE_ADD(MULTIPCM_1_TAG, MULTIPCM, 8000000) - MCFG_DEVICE_ADDRESS_MAP(0, mpcm1_map) - MCFG_SOUND_ROUTE(0, "lspeaker", 1.0) - MCFG_SOUND_ROUTE(1, "rspeaker", 1.0) + MULTIPCM(config, m_multipcm_1, 8000000); + m_multipcm_1->set_addrmap(0, &segam1audio_device::mpcm1_map); + m_multipcm_1->add_route(0, "lspeaker", 1.0); + m_multipcm_1->add_route(1, "rspeaker", 1.0); - MCFG_DEVICE_ADD(MULTIPCM_2_TAG, MULTIPCM, 8000000) - MCFG_DEVICE_ADDRESS_MAP(0, mpcm2_map) - MCFG_SOUND_ROUTE(0, "lspeaker", 1.0) - MCFG_SOUND_ROUTE(1, "rspeaker", 1.0) + MULTIPCM(config, m_multipcm_2, 8000000); + m_multipcm_2->set_addrmap(0, &segam1audio_device::mpcm2_map); + m_multipcm_2->add_route(0, "lspeaker", 1.0); + m_multipcm_2->add_route(1, "rspeaker", 1.0); I8251(config, m_uart, 8000000); // T82C51, clock unknown m_uart->rxrdy_handler().set_inputline(m_audiocpu, M68K_IRQ_2); @@ -87,7 +79,7 @@ MACHINE_CONFIG_START(segam1audio_device::device_add_mconfig) clock_device &uart_clock(CLOCK(config, "uart_clock", 500000)); // 16 times 31.25MHz (standard Sega/MIDI sound data rate) uart_clock.signal_handler().set(m_uart, FUNC(i8251_device::write_txc)); uart_clock.signal_handler().append(m_uart, FUNC(i8251_device::write_rxc)); -MACHINE_CONFIG_END +} //************************************************************************** // LIVE DEVICE @@ -99,15 +91,15 @@ MACHINE_CONFIG_END segam1audio_device::segam1audio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, SEGAM1AUDIO, tag, owner, clock), - m_audiocpu(*this, M68000_TAG), - m_multipcm_1(*this, MULTIPCM_1_TAG), - m_multipcm_2(*this, MULTIPCM_2_TAG), - m_ym(*this, YM3438_TAG), - m_uart(*this, UART_TAG), - m_multipcm1_region(*this, MULTIPCM_1_TAG), - m_multipcm2_region(*this, MULTIPCM_2_TAG), - m_mpcmbank1(*this, MPCMBANK1_TAG), - m_mpcmbank2(*this, MPCMBANK2_TAG), + m_audiocpu(*this, "sndcpu"), + m_multipcm_1(*this, "pcm1"), + m_multipcm_2(*this, "pcm2"), + m_ym(*this, "ymsnd"), + m_uart(*this, "uart"), + m_multipcm1_region(*this, "pcm1"), + m_multipcm2_region(*this, "pcm2"), + m_mpcmbank1(*this, "m1pcm1_bank"), + m_mpcmbank2(*this, "m1pcm2_bank"), m_rxd_handler(*this) { } diff --git a/src/mame/audio/xavix.cpp b/src/mame/audio/xavix.cpp new file mode 100644 index 00000000000..ff284aeb376 --- /dev/null +++ b/src/mame/audio/xavix.cpp @@ -0,0 +1,160 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood + +#include "emu.h" +#include "includes/xavix.h" + +// #define VERBOSE 1 +#include "logmacro.h" + +READ8_MEMBER(xavix_state::sound_75f0_r) +{ + LOG("%s: sound_75f0_r\n", machine().describe_context()); + return m_soundregs[0]; +} + +READ8_MEMBER(xavix_state::sound_75f1_r) +{ + LOG("%s: sound_75f1_r\n", machine().describe_context()); + return m_soundregs[1]; +} + +READ8_MEMBER(xavix_state::sound_75f6_r) +{ + LOG("%s: sound_75f6_r\n", machine().describe_context()); + return m_soundregs[6]; +} + +READ8_MEMBER(xavix_state::sound_75f8_r) +{ + LOG("%s: sound_75f8_r\n", machine().describe_context()); + return m_soundregs[8]; +} + +READ8_MEMBER(xavix_state::sound_75f9_r) +{ + LOG("%s: sound_75f9_r\n", machine().describe_context()); + return 0x00; +} + +READ8_MEMBER(xavix_state::sound_75fa_r) +{ + LOG("%s: sound_75fa_r\n", machine().describe_context()); + return m_soundregs[10]; +} + +READ8_MEMBER(xavix_state::sound_75fb_r) +{ + LOG("%s: sound_75fb_r\n", machine().describe_context()); + return m_soundregs[11]; +} + +READ8_MEMBER(xavix_state::sound_75fc_r) +{ + LOG("%s: sound_75fc_r\n", machine().describe_context()); + return m_soundregs[12]; +} + +READ8_MEMBER(xavix_state::sound_75fd_r) +{ + LOG("%s: sound_75fd_r\n", machine().describe_context()); + return m_soundregs[13]; +} + + + + +WRITE8_MEMBER(xavix_state::sound_75f0_w) +{ + // expected to return data written + m_soundregs[0] = data; + LOG("%s: sound_75f0_w %02x\n", machine().describe_context(), data); +} + + +WRITE8_MEMBER(xavix_state::sound_75f1_w) +{ + // expected to return data written + m_soundregs[1] = data; + LOG("%s: sound_75f1_w %02x\n", machine().describe_context(), data); +} + + +WRITE8_MEMBER(xavix_state::sound_75f6_w) +{ + // expected to return data written + m_soundregs[6] = data; + LOG("%s: sound_75f6_w %02x\n", machine().describe_context(), data); +} + +WRITE8_MEMBER(xavix_state::sound_75f7_w) +{ + m_soundregs[7] = data; + LOG("%s: sound_75f7_w %02x\n", machine().describe_context(), data); +} + + +WRITE8_MEMBER(xavix_state::sound_75f8_w) +{ + // expected to return data written + m_soundregs[8] = data; + LOG("%s: sound_75f8_w %02x\n", machine().describe_context(), data); +} + +WRITE8_MEMBER(xavix_state::sound_75f9_w) +{ + m_soundregs[9] = data; + LOG("%s: sound_75f9_w %02x\n", machine().describe_context(), data); +} + +WRITE8_MEMBER(xavix_state::sound_75fa_w) +{ + // expected to return data written + m_soundregs[10] = data; + LOG("%s: sound_75fa_w %02x\n", machine().describe_context(), data); +} + +WRITE8_MEMBER(xavix_state::sound_75fb_w) +{ + // expected to return data written + m_soundregs[11] = data; + LOG("%s: sound_75fb_w %02x\n", machine().describe_context(), data); +} + +WRITE8_MEMBER(xavix_state::sound_75fc_w) +{ + // expected to return data written + m_soundregs[12] = data; + LOG("%s: sound_75fc_w %02x\n", machine().describe_context(), data); +} + +WRITE8_MEMBER(xavix_state::sound_75fd_w) +{ + // expected to return data written + m_soundregs[13] = data; + LOG("%s: sound_75fd_w %02x\n", machine().describe_context(), data); +} + +WRITE8_MEMBER(xavix_state::sound_75fe_w) +{ + m_soundregs[14] = data; + LOG("%s: sound_75fe_w %02x\n", machine().describe_context(), data); +} + +WRITE8_MEMBER(xavix_state::sound_75ff_w) +{ + m_soundregs[15] = data; + LOG("%s: sound_75ff_w %02x\n", machine().describe_context(), data); +} + +READ8_MEMBER(xavix_state::sound_75f4_r) +{ + // used with 75f0 + return 0xff; +} + +READ8_MEMBER(xavix_state::sound_75f5_r) +{ + // used with 75f1 + return 0xff; +} diff --git a/src/mame/drivers/3do.cpp b/src/mame/drivers/3do.cpp index fca1b451d1f..9e6af48c6cf 100644 --- a/src/mame/drivers/3do.cpp +++ b/src/mame/drivers/3do.cpp @@ -288,7 +288,7 @@ CONS( 1993, 3do_pal, 3do, 0, _3do_pal, 3do, _3do_state, empty_init, // Misc 3do Arcade games GAME( 1993, 3dobios, 0, _3do, 3do, _3do_state, empty_init, ROT0, "The 3DO Company", "3DO Bios", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IS_BIOS_ROOT ) -GAME( 199?, orbatak, 3dobios, _3do, 3do, _3do_state, empty_init, ROT0, "<unknown>", "Orbatak (prototype)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 1995, orbatak, 3dobios, _3do, 3do, _3do_state, empty_init, ROT0, "American Laser Games", "Orbatak (prototype)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // Beavis and Butthead (prototype) diff --git a/src/mame/drivers/a5105.cpp b/src/mame/drivers/a5105.cpp index 93b6b34d7dc..152d3ec1688 100644 --- a/src/mame/drivers/a5105.cpp +++ b/src/mame/drivers/a5105.cpp @@ -608,7 +608,7 @@ MACHINE_CONFIG_START(a5105_state::a5105) MCFG_CASSETTE_ADD( "cassette" ) - MCFG_UPD765A_ADD("upd765a", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765a:0", a5105_floppies, "525qd", a5105_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765a:1", a5105_floppies, "525qd", a5105_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765a:2", a5105_floppies, "525qd", a5105_state::floppy_formats) diff --git a/src/mame/drivers/a7150.cpp b/src/mame/drivers/a7150.cpp index ff46df7a1d8..ef44b6550a8 100644 --- a/src/mame/drivers/a7150.cpp +++ b/src/mame/drivers/a7150.cpp @@ -327,8 +327,7 @@ void a7150_state::a7150_io(address_map &map) map(0x00c0, 0x00c3).rw(m_pic8259, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff); map(0x00c8, 0x00cf).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0x00ff); map(0x00d0, 0x00d7).rw(m_pit8253, FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff); - map(0x00d8, 0x00d8).rw(m_uart8251, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x00da, 0x00da).rw(m_uart8251, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x00d8, 0x00db).rw(m_uart8251, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0x0200, 0x0203).rw(FUNC(a7150_state::a7150_kgs_r), FUNC(a7150_state::a7150_kgs_w)).umask16(0x00ff); // ABS/KGS board map(0x0300, 0x031f).unmaprw(); // ASP board #1 map(0x0320, 0x033f).unmaprw(); // ASP board #2 diff --git a/src/mame/drivers/adp.cpp b/src/mame/drivers/adp.cpp index c5a3c9f4687..cd926cf31aa 100644 --- a/src/mame/drivers/adp.cpp +++ b/src/mame/drivers/adp.cpp @@ -629,7 +629,8 @@ MACHINE_CONFIG_START(adp_state::funland) MCFG_DEVICE_REMOVE("palette") MCFG_PALETTE_ADD_INIT_BLACK("palette", 0x100) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &adp_state::ramdac_map); MCFG_DEVICE_MODIFY("acrtc") MCFG_HD63484_ADDRESS_MAP(fstation_hd63484_map) diff --git a/src/mame/drivers/akaiax80.cpp b/src/mame/drivers/akaiax80.cpp index 7a53beeb242..b3d2fdcbe95 100644 --- a/src/mame/drivers/akaiax80.cpp +++ b/src/mame/drivers/akaiax80.cpp @@ -108,12 +108,12 @@ MACHINE_CONFIG_START(ax80_state::ax80) MCFG_DEVICE_ADD(PPI1_TAG, I8255A, 0) I8279(config, "kdc", 6554800 / 8); // Keyboard/Display Controller - //kdc.out_irq_calback().set_inputline("maincpu", UPD7810_INTF1); // irq - //kdc.out_sl_callback().set(FUNC(ax80_state::scanlines_w)); // scan SL lines - //kdc.out_disp_callback().set(FUNC(ax80_state::digit_w)); // display A&B - //kdc.in_rl_callback().set(FUNC(ax80_state::kbd_r)) // kbd RL lines - //kdc.in_shift_callback().set_constant(1); // not connected - //kdc.in_ctrl_callback().set_constant(1); // not connected + //kdc.out_irq_calback().set_inputline("maincpu", UPD7810_INTF1); // irq + //kdc.out_sl_callback().set(FUNC(ax80_state::scanlines_w)); // scan SL lines + //kdc.out_disp_callback().set(FUNC(ax80_state::digit_w)); // display A&B + //kdc.in_rl_callback().set(FUNC(ax80_state::kbd_r)) // kbd RL lines + //kdc.in_shift_callback().set_constant(1); // not connected + //kdc.in_ctrl_callback().set_constant(1); // not connected MACHINE_CONFIG_END static INPUT_PORTS_START( ax80 ) diff --git a/src/mame/drivers/alphatpx.cpp b/src/mame/drivers/alphatpx.cpp index 71225a67d7e..6376b1b318a 100644 --- a/src/mame/drivers/alphatpx.cpp +++ b/src/mame/drivers/alphatpx.cpp @@ -269,8 +269,7 @@ void alphatp_12_state::alphatp2_map(address_map &map) void alphatp_12_state::alphatp2_io(address_map &map) { map.unmap_value_high(); - map(0x04, 0x04).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x05, 0x05).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x04, 0x05).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x10, 0x11).rw(m_kbdmcu, FUNC(i8041_device::upi41_master_r), FUNC(i8041_device::upi41_master_w)); map(0x12, 0x12).w(FUNC(alphatp_12_state::beep_w)); map(0x50, 0x53).rw(FUNC(alphatp_12_state::fdc_r), FUNC(alphatp_12_state::fdc_w)); @@ -309,8 +308,7 @@ void alphatp_34_state::alphatp3_io(address_map &map) { map.unmap_value_high(); //AM_RANGE(0x00, 0x00) AM_READ // unknown - map(0x04, 0x04).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x05, 0x05).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x04, 0x05).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x08, 0x09).rw(FUNC(alphatp_34_state::comm88_r), FUNC(alphatp_34_state::comm88_w)); map(0x10, 0x11).rw(m_kbdmcu, FUNC(i8041_device::upi41_master_r), FUNC(i8041_device::upi41_master_w)); map(0x12, 0x12).w(FUNC(alphatp_34_state::beep_w)); diff --git a/src/mame/drivers/alphatro.cpp b/src/mame/drivers/alphatro.cpp index 7e69c57b949..9a4cd32ae99 100644 --- a/src/mame/drivers/alphatro.cpp +++ b/src/mame/drivers/alphatro.cpp @@ -438,8 +438,7 @@ void alphatro_state::alphatro_io(address_map &map) map(0x2b, 0x2b).portr("XB"); map(0x30, 0x30).rw(FUNC(alphatro_state::port30_r), FUNC(alphatro_state::port30_w)); // USART for cassette reading and writing - map(0x40, 0x40).rw(m_usart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x41, 0x41).rw(m_usart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x40, 0x41).rw(m_usart, FUNC(i8251_device::read), FUNC(i8251_device::write)); // CRTC - HD46505 / HD6845SP map(0x50, 0x50).w(m_crtc, FUNC(mc6845_device::address_w)); map(0x51, 0x51).rw(m_crtc, FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); @@ -723,9 +722,9 @@ MACHINE_CONFIG_START(alphatro_state::alphatro) WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "mono", 0.25); /* Devices */ - MCFG_UPD765A_ADD("fdc", true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, alphatro_state, fdc_irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(m_dmac, i8257_device, dreq2_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(FUNC(alphatro_state::fdc_irq_w)); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(i8257_device::dreq2_w)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", alphatro_floppies, "525dd", alphatro_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:1", alphatro_floppies, "525dd", alphatro_state::floppy_formats) MCFG_SOFTWARE_LIST_ADD("flop_list", "alphatro_flop") diff --git a/src/mame/drivers/altos2.cpp b/src/mame/drivers/altos2.cpp index b9ba88922af..410dff740a9 100644 --- a/src/mame/drivers/altos2.cpp +++ b/src/mame/drivers/altos2.cpp @@ -21,7 +21,8 @@ Keyboard: P8035L CPU, undumped 2716 labelled "358_2758", XTAL marked "4608-300-1 #include "machine/z80dart.h" #include "machine/clock.h" #include "machine/x2212.h" -//#include "video/crt9007.h" +//#include "video/crt9006.h" +#include "video/crt9007.h" //#include "video/crt9021.h" #include "screen.h" @@ -32,6 +33,7 @@ public: : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") , m_novram(*this, "novram") + , m_vpac(*this, "vpac") , m_p_chargen(*this, "chargen") , m_p_videoram(*this, "videoram") { } @@ -39,6 +41,8 @@ public: void altos2(machine_config &config); private: + DECLARE_READ8_MEMBER(vpac_r); + DECLARE_WRITE8_MEMBER(vpac_w); DECLARE_WRITE8_MEMBER(video_mode_w); u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); @@ -49,6 +53,7 @@ private: required_device<z80_device> m_maincpu; required_device<x2210_device> m_novram; + required_device<crt9007_device> m_vpac; required_region_ptr<u8> m_p_chargen; required_shared_ptr<u8> m_p_videoram; }; @@ -59,10 +64,31 @@ void altos2_state::machine_reset() m_novram->recall(CLEAR_LINE); } +READ8_MEMBER(altos2_state::vpac_r) +{ + return m_vpac->read(space, offset >> 1); +} + +WRITE8_MEMBER(altos2_state::vpac_w) +{ + m_vpac->write(space, offset >> 1, data); +} + WRITE8_MEMBER(altos2_state::video_mode_w) { - // D5 = 1 for 132-column mode (6-pixel char width) - // D5 = 0 for 80-column mode (10-pixel char width) + if (BIT(data, 5)) + { + // D5 = 1 for 132-column mode + m_vpac->set_unscaled_clock(40_MHz_XTAL / 12); + m_vpac->set_character_width(6); + } + else + { + // D5 = 0 for 80-column mode + m_vpac->set_unscaled_clock(40_MHz_XTAL / 20); + m_vpac->set_character_width(10); + } + logerror("Writing %02X to mode register at %s\n", data, machine().describe_context()); } @@ -86,10 +112,10 @@ void altos2_state::io_map(address_map &map) map(0x08, 0x0b).rw("ctc", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)); map(0x0c, 0x0c).w(FUNC(altos2_state::video_mode_w)); map(0x40, 0x7f).rw(m_novram, FUNC(x2210_device::read), FUNC(x2210_device::write)); - //AM_RANGE(0x80, 0xff) AM_DEVREADWRITE_MOD("vpac", crt9007_device, read, write, rshift<1>) + map(0x80, 0xff).rw(FUNC(altos2_state::vpac_r), FUNC(altos2_state::vpac_w)); } -static INPUT_PORTS_START( altos2 ) +static INPUT_PORTS_START(altos2) INPUT_PORTS_END static const z80_daisy_config daisy_chain[] = @@ -100,19 +126,19 @@ static const z80_daisy_config daisy_chain[] = { nullptr } }; -MACHINE_CONFIG_START(altos2_state::altos2) - /* basic machine hardware */ - Z80(config, m_maincpu, XTAL(4'000'000)); // unknown clock +void altos2_state::altos2(machine_config &config) +{ + Z80(config, m_maincpu, 8_MHz_XTAL / 2); m_maincpu->set_addrmap(AS_PROGRAM, &altos2_state::mem_map); m_maincpu->set_addrmap(AS_IO, &altos2_state::io_map); m_maincpu->set_daisy_config(daisy_chain); - clock_device &ctc_clock(CLOCK(config, "ctc_clock", 4915200)); // ctc & dart connections are guesswork + clock_device &ctc_clock(CLOCK(config, "ctc_clock", 4.9152_MHz_XTAL / 2)); // ctc & dart connections are guesswork ctc_clock.signal_handler().set("ctc", FUNC(z80ctc_device::trg0)); ctc_clock.signal_handler().append("ctc", FUNC(z80ctc_device::trg1)); ctc_clock.signal_handler().append("ctc", FUNC(z80ctc_device::trg2)); - z80ctc_device &ctc(Z80CTC(config, "ctc", 4_MHz_XTAL)); + z80ctc_device &ctc(Z80CTC(config, "ctc", 8_MHz_XTAL / 2)); ctc.intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); ctc.zc_callback<0>().set("dart1", FUNC(z80dart_device::txca_w)); ctc.zc_callback<0>().append("dart1", FUNC(z80dart_device::rxca_w)); @@ -120,23 +146,24 @@ MACHINE_CONFIG_START(altos2_state::altos2) ctc.zc_callback<2>().set("dart2", FUNC(z80dart_device::rxca_w)); ctc.zc_callback<2>().append("dart2", FUNC(z80dart_device::txca_w)); - z80dart_device &dart1(Z80DART(config, "dart1", 4_MHz_XTAL)); + z80dart_device &dart1(Z80DART(config, "dart1", 8_MHz_XTAL / 2)); dart1.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); - z80dart_device &dart2(Z80DART(config, "dart2", 4_MHz_XTAL)); // channel B not used for communications + z80dart_device &dart2(Z80DART(config, "dart2", 8_MHz_XTAL / 2)); // channel B not used for communications dart2.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); dart2.out_dtrb_callback().set(m_novram, FUNC(x2210_device::store)).invert(); // FIXME: no inverter should be needed - X2210(config, m_novram, 0); + X2210(config, m_novram); - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_RAW_PARAMS(XTAL(40'000'000) / 2, 960, 0, 800, 347, 0, 325) - MCFG_SCREEN_UPDATE_DRIVER(altos2_state, screen_update) + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(40_MHz_XTAL / 2, 960, 0, 800, 347, 0, 325); + screen.set_screen_update(FUNC(altos2_state::screen_update)); - //MCFG_DEVICE_ADD("vpac", CRT9007, VPAC_CLOCK) - //MCFG_CRT9007_INT_CALLBACK(WRITELINE("ctc", z80ctc_device, trg3)) - //MCFG_VIDEO_SET_SCREEN("screen") -MACHINE_CONFIG_END + CRT9007(config, m_vpac, 40_MHz_XTAL / 20); + m_vpac->set_screen("screen"); + m_vpac->set_character_width(10); + m_vpac->int_callback().set("ctc", FUNC(z80ctc_device::trg3)); +} ROM_START( altos2 ) ROM_REGION( 0x4000, "roms", 0 ) diff --git a/src/mame/drivers/altos486.cpp b/src/mame/drivers/altos486.cpp index 19267323754..01fbd01ebb0 100644 --- a/src/mame/drivers/altos486.cpp +++ b/src/mame/drivers/altos486.cpp @@ -146,9 +146,9 @@ MACHINE_CONFIG_START(altos486_state::altos486) pic8259.in_sp_callback().set_constant(1); pic8259.read_slave_ack_callback().set(FUNC(altos486_state::read_rmx_ack)); - MCFG_DEVICE_ADD("ppi8255", I8255, 0) + I8255(config, "ppi8255"); - MCFG_UPD765A_ADD("fdc", false, false) + UPD765A(config, "fdc", false, false); MCFG_FLOPPY_DRIVE_ADD("fdc:0", altos486_floppies, "525qd", altos486_state::floppy_formats) MCFG_SLOT_FIXED(true) @@ -182,36 +182,36 @@ MACHINE_CONFIG_START(altos486_state::altos486) i8274.out_rtsa_callback().set("rs422_wn", FUNC(rs232_port_device::write_rts)); //i8274.out_int_callback().set(FUNC(altos486_state::sio_interrupt)); - MCFG_DEVICE_ADD("rs232a", RS232_PORT, default_rs232_devices, "terminal") - MCFG_RS232_RXD_HANDLER(WRITELINE("sio0", z80dart_device, rxa_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio0", z80dart_device, dcda_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio0", z80dart_device, ctsa_w)) - //MCFG_SLOT_OPTION_DEVICE_INPUT_DEFAULTS("terminal", altos486_terminal) - - MCFG_DEVICE_ADD("rs232b", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("sio0", z80dart_device, rxb_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio0", z80dart_device, dcdb_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio0", z80dart_device, ctsb_w)) - - MCFG_DEVICE_ADD("rs232c", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("sio1", z80dart_device, rxa_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio1", z80dart_device, dcda_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio1", z80dart_device, ctsa_w)) - - MCFG_DEVICE_ADD("rs232d", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("sio1", z80dart_device, rxb_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio1", z80dart_device, dcdb_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio1", z80dart_device, ctsb_w)) - - MCFG_DEVICE_ADD("rs232_lp", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("sio2", z80dart_device, rxa_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio2", z80dart_device, dcda_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio2", z80dart_device, ctsa_w)) - - MCFG_DEVICE_ADD("rs422_wn", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("i8274", z80dart_device, rxa_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("i8274", z80dart_device, dcda_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("i8274", z80dart_device, ctsa_w)) + rs232_port_device &rs232a(RS232_PORT(config, "rs232a", default_rs232_devices, "terminal")); + rs232a.rxd_handler().set("sio0", FUNC(z80dart_device::rxa_w)); + rs232a.dcd_handler().set("sio0", FUNC(z80dart_device::dcda_w)); + rs232a.cts_handler().set("sio0", FUNC(z80dart_device::ctsa_w)); + //rs232a.set_option_device_input_defaults("terminal", DEVICE_INPUT_DEFAULTS_NAME(altos486_terminal)); + + rs232_port_device &rs232b(RS232_PORT(config, "rs232b", default_rs232_devices, nullptr)); + rs232b.rxd_handler().set("sio0", FUNC(z80dart_device::rxb_w)); + rs232b.dcd_handler().set("sio0", FUNC(z80dart_device::dcdb_w)); + rs232b.cts_handler().set("sio0", FUNC(z80dart_device::ctsb_w)); + + rs232_port_device &rs232c(RS232_PORT(config, "rs232c", default_rs232_devices, nullptr)); + rs232c.rxd_handler().set("sio1", FUNC(z80dart_device::rxa_w)); + rs232c.dcd_handler().set("sio1", FUNC(z80dart_device::dcda_w)); + rs232c.cts_handler().set("sio1", FUNC(z80dart_device::ctsa_w)); + + rs232_port_device &rs232d(RS232_PORT(config, "rs232d", default_rs232_devices, nullptr)); + rs232d.rxd_handler().set("sio1", FUNC(z80dart_device::rxb_w)); + rs232d.dcd_handler().set("sio1", FUNC(z80dart_device::dcdb_w)); + rs232d.cts_handler().set("sio1", FUNC(z80dart_device::ctsb_w)); + + rs232_port_device &rs232_lp(RS232_PORT(config, "rs232_lp", default_rs232_devices, nullptr)); + rs232_lp.rxd_handler().set("sio2", FUNC(z80dart_device::rxa_w)); + rs232_lp.dcd_handler().set("sio2", FUNC(z80dart_device::dcda_w)); + rs232_lp.cts_handler().set("sio2", FUNC(z80dart_device::ctsa_w)); + + rs232_port_device &rs422_wn(RS232_PORT(config, "rs422_wn", default_rs232_devices, nullptr)); + rs422_wn.rxd_handler().set("i8274", FUNC(z80dart_device::rxa_w)); + rs422_wn.dcd_handler().set("i8274", FUNC(z80dart_device::dcda_w)); + rs422_wn.cts_handler().set("i8274", FUNC(z80dart_device::ctsa_w)); MCFG_DEVICE_ADD("pit0", PIT8253, 0) MCFG_PIT8253_CLK0(XTAL(22'118'400)/18) diff --git a/src/mame/drivers/altos5.cpp b/src/mame/drivers/altos5.cpp index df01069142a..fa223a9f8a9 100644 --- a/src/mame/drivers/altos5.cpp +++ b/src/mame/drivers/altos5.cpp @@ -463,10 +463,10 @@ MACHINE_CONFIG_START(altos5_state::altos5) ctc.zc_callback<1>().append("sio", FUNC(z80sio_device::rxca_w)); ctc.zc_callback<2>().set("dart", FUNC(z80dart_device::rxtxcb_w)); // Z80DART Ch B - MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, "terminal") - MCFG_RS232_RXD_HANDLER(WRITELINE("sio", z80sio_device, rxb_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio", z80sio_device, dcdb_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio", z80sio_device, ctsb_w)) + rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, "terminal")); + rs232.rxd_handler().set("sio", FUNC(z80sio_device::rxb_w)); + rs232.dcd_handler().set("sio", FUNC(z80sio_device::dcdb_w)); + rs232.cts_handler().set("sio", FUNC(z80sio_device::ctsb_w)); FD1797(config, m_fdc, 8_MHz_XTAL / 8); m_fdc->intrq_wr_callback().set(FUNC(altos5_state::fdc_intrq_w)); diff --git a/src/mame/drivers/altos8600.cpp b/src/mame/drivers/altos8600.cpp index 9560c0163c5..2aab3feb743 100644 --- a/src/mame/drivers/altos8600.cpp +++ b/src/mame/drivers/altos8600.cpp @@ -766,15 +766,15 @@ MACHINE_CONFIG_START(altos8600_state::altos8600) m_uart8274->out_rtsb_callback().set("rs232b", FUNC(rs232_port_device::write_rts)); m_uart8274->out_int_callback().set("pic8259_1", FUNC(pic8259_device::ir7_w)); - MCFG_DEVICE_ADD("rs232a", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(m_uart8274, i8274_new_device, rxa_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(m_uart8274, i8274_new_device, dcda_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(m_uart8274, i8274_new_device, ctsa_w)) - - MCFG_DEVICE_ADD("rs232b", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(m_uart8274, i8274_new_device, rxb_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(m_uart8274, i8274_new_device, dcdb_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(m_uart8274, i8274_new_device, ctsb_w)) + rs232_port_device &rs232a(RS232_PORT(config, "rs232a", default_rs232_devices, nullptr)); + rs232a.rxd_handler().set(m_uart8274, FUNC(i8274_new_device::rxa_w)); + rs232a.dcd_handler().set(m_uart8274, FUNC(i8274_new_device::dcda_w)); + rs232a.cts_handler().set(m_uart8274, FUNC(i8274_new_device::ctsa_w)); + + rs232_port_device &rs232b(RS232_PORT(config, "rs232b", default_rs232_devices, nullptr)); + rs232b.rxd_handler().set(m_uart8274, FUNC(i8274_new_device::rxb_w)); + rs232b.dcd_handler().set(m_uart8274, FUNC(i8274_new_device::dcdb_w)); + rs232b.cts_handler().set(m_uart8274, FUNC(i8274_new_device::ctsb_w)); I8255A(config, "ppi", 0); diff --git a/src/mame/drivers/amiga.cpp b/src/mame/drivers/amiga.cpp index 97cec6e61a1..f8d942df2b2 100644 --- a/src/mame/drivers/amiga.cpp +++ b/src/mame/drivers/amiga.cpp @@ -1608,12 +1608,12 @@ MACHINE_CONFIG_START(amiga_state::amiga_base) MCFG_FLOPPY_DRIVE_SOUND(true) // rs232 - MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(*this, amiga_state, rs232_rx_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(*this, amiga_state, rs232_dcd_w)) - MCFG_RS232_DSR_HANDLER(WRITELINE(*this, amiga_state, rs232_dsr_w)) - MCFG_RS232_RI_HANDLER(WRITELINE(*this, amiga_state, rs232_ri_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(*this, amiga_state, rs232_cts_w)) + rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, nullptr)); + rs232.rxd_handler().set(FUNC(amiga_state::rs232_rx_w)); + rs232.dcd_handler().set(FUNC(amiga_state::rs232_dcd_w)); + rs232.dsr_handler().set(FUNC(amiga_state::rs232_dsr_w)); + rs232.ri_handler().set(FUNC(amiga_state::rs232_ri_w)); + rs232.cts_handler().set(FUNC(amiga_state::rs232_cts_w)); // centronics MCFG_DEVICE_ADD("centronics", CENTRONICS, centronics_devices, "printer") diff --git a/src/mame/drivers/ampex210.cpp b/src/mame/drivers/ampex210.cpp index 62a576a9594..6f9c0152eea 100644 --- a/src/mame/drivers/ampex210.cpp +++ b/src/mame/drivers/ampex210.cpp @@ -9,6 +9,7 @@ #include "emu.h" #include "cpu/z80/z80.h" #include "machine/mos6551.h" +#include "machine/nvram.h" #include "video/scn2674.h" #include "screen.h" @@ -29,6 +30,8 @@ private: void mem_map(address_map &map); void io_map(address_map &map); + void vram_map(address_map &map); + required_device<cpu_device> m_maincpu; required_region_ptr<u8> m_chargen; }; @@ -41,7 +44,7 @@ SCN2672_DRAW_CHARACTER_MEMBER(ampex210_state::draw_character) void ampex210_state::mem_map(address_map &map) { map(0x0000, 0x7fff).rom().region("maincpu", 0); - map(0x8000, 0x87ff).ram(); + map(0x8000, 0x87ff).ram().share("nvram"); map(0x8800, 0x9fff).ram(); } @@ -51,6 +54,14 @@ void ampex210_state::io_map(address_map &map) map(0x00, 0x07).rw("pvtc", FUNC(scn2672_device::read), FUNC(scn2672_device::write)); map(0x44, 0x47).rw("acia", FUNC(mos6551_device::read), FUNC(mos6551_device::write)); map(0x80, 0x80).nopw(); + map(0xc0, 0xc0).w("pvtc", FUNC(scn2672_device::buffer_w)); + map(0xc1, 0xc1).r("pvtc", FUNC(scn2672_device::buffer_r)); + map(0xc7, 0xc7).nopw(); +} + +void ampex210_state::vram_map(address_map &map) +{ + map(0x0000, 0x1fff).ram(); // MB8464A-10L (second half unused?) } @@ -60,21 +71,25 @@ INPUT_PORTS_END void ampex210_state::ampex210p(machine_config &config) { - Z80(config, m_maincpu, 4'000'000); + Z80(config, m_maincpu, 3.6864_MHz_XTAL); // Z80ACPU; clock uncertain m_maincpu->set_addrmap(AS_PROGRAM, &ex210_state::mem_map); m_maincpu->set_addrmap(AS_IO, &ex210_state::io_map); - mos6551_device &acia(MOS6551(config, "acia", 1'843'200)); + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // UM6116-2 + + mos6551_device &acia(MOS6551(config, "acia", 3.6864_MHz_XTAL / 2)); // AMI S6551AP acia.irq_handler().set_inputline("maincpu", INPUT_LINE_IRQ0); - scn2672_device &pvtc(SCN2672(config, "pvtc", 2'178'000)); + scn2672_device &pvtc(SCN2672(config, "pvtc", 19.602_MHz_XTAL / 9)); // MC2672B4P pvtc.intr_callback().set_inputline("maincpu", INPUT_LINE_NMI); - pvtc.set_character_width(10); + pvtc.set_character_width(9); pvtc.set_display_callback(FUNC(ampex210_state::draw_character)); + pvtc.set_addrmap(0, &ex210_state::vram_map); pvtc.set_screen("screen"); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_raw(21'780'000, 1000, 0, 800, 363, 0, 300); // clock guessed + screen.set_raw(19.602_MHz_XTAL, 900, 0, 720, 363, 0, 300); + //screen.set_raw(32.147_MHz_XTAL, 1476, 0, 1188, 363, 0, 300); screen.set_screen_update("pvtc", FUNC(scn2672_device::screen_update)); } diff --git a/src/mame/drivers/amstr_pc.cpp b/src/mame/drivers/amstr_pc.cpp index 4df7b158d05..6788af70430 100644 --- a/src/mame/drivers/amstr_pc.cpp +++ b/src/mame/drivers/amstr_pc.cpp @@ -510,14 +510,14 @@ MACHINE_CONFIG_START(amstrad_pc_state::pc200) MCFG_DEVICE_ADD("isa2", ISA8_SLOT, 0, "mb:isa", pc_isa8_cards, nullptr, false) /* printer */ - MCFG_DEVICE_ADD("lpt_0", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE("mb:pic8259", pic8259_device, ir7_w)) + pc_lpt_device &lpt0(PC_LPT(config, "lpt_0")); + lpt0.irq_handler().set("mb:pic8259", FUNC(pic8259_device::ir7_w)); - MCFG_DEVICE_ADD("lpt_1", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE("mb:pic8259", pic8259_device, ir7_w)) + PC_LPT(config, m_lpt1); + m_lpt1->irq_handler().set("mb:pic8259", FUNC(pic8259_device::ir7_w)); - MCFG_DEVICE_ADD("lpt_2", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE("mb:pic8259", pic8259_device, ir5_w)) + PC_LPT(config, m_lpt2); + m_lpt2->irq_handler().set("mb:pic8259", FUNC(pic8259_device::ir5_w)); MCFG_PC_JOY_ADD("pc_joy") diff --git a/src/mame/drivers/amstrad.cpp b/src/mame/drivers/amstrad.cpp index f1531b47de5..d099a99b872 100644 --- a/src/mame/drivers/amstrad.cpp +++ b/src/mame/drivers/amstrad.cpp @@ -984,7 +984,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(amstrad_state::cpc664) amstrad_base(config); - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765:0", amstrad_floppies, "3ssdd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", amstrad_floppies, "35ssdd", floppy_image_device::default_floppy_formats) MCFG_SOFTWARE_LIST_ADD("flop_list","cpc_flop") @@ -1002,7 +1002,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(amstrad_state::cpc6128) amstrad_base(config); - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765:0", amstrad_floppies, "3ssdd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", amstrad_floppies, "35ssdd", floppy_image_device::default_floppy_formats) MCFG_SOFTWARE_LIST_ADD("flop_list","cpc_flop") @@ -1087,7 +1087,7 @@ MACHINE_CONFIG_START(amstrad_state::cpcplus) MCFG_CASSETTE_INTERFACE("cpc_cass") MCFG_SOFTWARE_LIST_ADD("cass_list","cpc_cass") - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_fdc, true, true); cpcplus_cartslot(config); @@ -1173,8 +1173,7 @@ MACHINE_CONFIG_START(amstrad_state::aleste) MCFG_DEVICE_ADD("rtc", MC146818, 4.194304_MHz_XTAL) - MCFG_DEVICE_REMOVE("upd765") - MCFG_I8272A_ADD("upd765", true) + I8272A(config.replace(), m_fdc, true); MCFG_DEVICE_REMOVE("exp") MCFG_DEVICE_ADD("exp", CPC_EXPANSION_SLOT, 0) diff --git a/src/mame/drivers/amust.cpp b/src/mame/drivers/amust.cpp index 7f9f315c240..8a810dce397 100644 --- a/src/mame/drivers/amust.cpp +++ b/src/mame/drivers/amust.cpp @@ -193,10 +193,8 @@ void amust_state::io_map(address_map &map) { map.unmap_value_high(); map.global_mask(0xff); - map(0x00, 0x00).rw("uart1", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x01, 0x01).rw("uart1", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x02, 0x02).rw("uart2", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x03, 0x03).rw("uart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x00, 0x01).rw("uart1", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x02, 0x03).rw("uart2", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x04, 0x07).rw("ppi1", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x08, 0x0b).rw("ppi2", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x0d, 0x0d).nopr().w(FUNC(amust_state::port0d_w)); diff --git a/src/mame/drivers/apc.cpp b/src/mame/drivers/apc.cpp index b4fe4b567a7..db93be349aa 100644 --- a/src/mame/drivers/apc.cpp +++ b/src/mame/drivers/apc.cpp @@ -309,7 +309,7 @@ READ8_MEMBER(apc_state::apc_port_28_r) uint8_t res; if(offset & 1) - res = m_pit->read(space, (offset & 6) >> 1); + res = m_pit->read((offset & 6) >> 1); else { if(offset & 4) @@ -318,7 +318,7 @@ READ8_MEMBER(apc_state::apc_port_28_r) res = 0xff; } else - res = m_i8259_s->read(space, (offset & 2) >> 1); + res = m_i8259_s->read((offset & 2) >> 1); } return res; @@ -327,13 +327,13 @@ READ8_MEMBER(apc_state::apc_port_28_r) WRITE8_MEMBER(apc_state::apc_port_28_w) { if(offset & 1) - m_pit->write(space, (offset & 6) >> 1, data); + m_pit->write((offset & 6) >> 1, data); else { if(offset & 4) printf("Write undefined port %02x\n",offset+0x28); else - m_i8259_s->write(space, (offset & 2) >> 1, data); + m_i8259_s->write((offset & 2) >> 1, data); } } @@ -971,11 +971,11 @@ MACHINE_CONFIG_START(apc_state::apc) m_dmac->out_dack_callback<3>().set(FUNC(apc_state::apc_dack3_w)); NVRAM(config, m_cmos, nvram_device::DEFAULT_ALL_1); - MCFG_UPD1990A_ADD(m_rtc, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); - MCFG_UPD765A_ADD(m_fdc, true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(m_i8259_s, pic8259_device, ir4_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(m_dmac, am9517a_device, dreq1_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(m_i8259_s, FUNC(pic8259_device::ir4_w)); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq1_w)); MCFG_FLOPPY_DRIVE_ADD(m_fdc_connector[0], apc_floppies, "8", apc_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(m_fdc_connector[1], apc_floppies, "8", apc_floppy_formats) MCFG_SOFTWARE_LIST_ADD("disk_list","apc") diff --git a/src/mame/drivers/apple2gs.cpp b/src/mame/drivers/apple2gs.cpp index 237e5b74ebc..2ee0ed761e9 100644 --- a/src/mame/drivers/apple2gs.cpp +++ b/src/mame/drivers/apple2gs.cpp @@ -2227,16 +2227,16 @@ READ8_MEMBER(apple2gs_state::c000_r) return m_speed; case 0x38: // SCCBREG - return m_scc->cb_r(space, 0); + return m_scc->cb_r(0); case 0x39: // SCCAREG - return m_scc->ca_r(space, 0); + return m_scc->ca_r(0); case 0x3a: // SCCBDATA - return m_scc->db_r(space, 0); + return m_scc->db_r(0); case 0x3b: // SCCADATA - return m_scc->da_r(space, 0); + return m_scc->da_r(0); case 0x3c: // SOUNDCTL return m_sndglu_ctrl; @@ -2549,19 +2549,19 @@ WRITE8_MEMBER(apple2gs_state::c000_w) break; case 0x38: // SCCBREG - m_scc->cb_w(space, 0, data); + m_scc->cb_w(0, data); break; case 0x39: // SCCAREG - m_scc->ca_w(space, 0, data); + m_scc->ca_w(0, data); break; case 0x3a: // SCCBDATA - m_scc->db_w(space, 0, data); + m_scc->db_w(0, data); break; case 0x3b: // SCCADATA - m_scc->da_w(space, 0, data); + m_scc->da_w(0, data); break; case 0x3c: // SOUNDCTL @@ -4672,15 +4672,15 @@ MACHINE_CONFIG_START( apple2gs_state::apple2gs ) m_scc->out_txda_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_txd)); m_scc->out_txdb_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_txd)); - MCFG_DEVICE_ADD(RS232A_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(m_scc, z80scc_device, rxa_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(m_scc, z80scc_device, dcda_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(m_scc, z80scc_device, ctsa_w)) + rs232_port_device &rs232a(RS232_PORT(config, RS232A_TAG, default_rs232_devices, nullptr)); + rs232a.rxd_handler().set(m_scc, FUNC(z80scc_device::rxa_w)); + rs232a.dcd_handler().set(m_scc, FUNC(z80scc_device::dcda_w)); + rs232a.cts_handler().set(m_scc, FUNC(z80scc_device::ctsa_w)); - MCFG_DEVICE_ADD(RS232B_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(m_scc, z80scc_device, rxb_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(m_scc, z80scc_device, dcdb_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(m_scc, z80scc_device, ctsb_w)) + rs232_port_device &rs232b(RS232_PORT(config, RS232B_TAG, default_rs232_devices, nullptr)); + rs232b.rxd_handler().set(m_scc, FUNC(z80scc_device::rxb_w)); + rs232b.dcd_handler().set(m_scc, FUNC(z80scc_device::dcdb_w)); + rs232b.cts_handler().set(m_scc, FUNC(z80scc_device::ctsb_w)); /* slot devices */ A2BUS(config, m_a2bus, 0); diff --git a/src/mame/drivers/apple3.cpp b/src/mame/drivers/apple3.cpp index d7931e7e535..6b04985680f 100644 --- a/src/mame/drivers/apple3.cpp +++ b/src/mame/drivers/apple3.cpp @@ -121,11 +121,11 @@ MACHINE_CONFIG_START(apple3_state::apple3) m_acia->rts_handler().set("rs232", FUNC(rs232_port_device::write_rts)); m_acia->dtr_handler().set("rs232", FUNC(rs232_port_device::write_dtr)); - MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("acia", mos6551_device, write_rxd)) - MCFG_RS232_DCD_HANDLER(WRITELINE("acia", mos6551_device, write_dcd)) - MCFG_RS232_DSR_HANDLER(WRITELINE("acia", mos6551_device, write_dsr)) - // TODO: remove cts kludge from machine/apple3.c and come up with a good way of coping with pull up resistors. + rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, nullptr)); + rs232.rxd_handler().set(m_acia, FUNC(mos6551_device::write_rxd)); + rs232.dcd_handler().set(m_acia, FUNC(mos6551_device::write_dcd)); + rs232.dsr_handler().set(m_acia, FUNC(mos6551_device::write_dsr)); + // TODO: remove cts kludge from machine/apple3.cpp and come up with a good way of coping with pull up resistors. /* paddle */ MCFG_TIMER_DRIVER_ADD("pdltimer", apple3_state, paddle_timer); diff --git a/src/mame/drivers/astinvad.cpp b/src/mame/drivers/astinvad.cpp index af986b232f2..b0f0efb45e7 100644 --- a/src/mame/drivers/astinvad.cpp +++ b/src/mame/drivers/astinvad.cpp @@ -340,9 +340,9 @@ READ8_MEMBER(astinvad_state::kamikaze_ppi_r) /* the address lines are used for /CS; yes, they can overlap! */ if (!(offset & 4)) - result &= m_ppi8255_0->read(space, offset); + result &= m_ppi8255_0->read(offset); if (!(offset & 8)) - result &= m_ppi8255_1->read(space, offset); + result &= m_ppi8255_1->read(offset); return result; } @@ -351,9 +351,9 @@ WRITE8_MEMBER(astinvad_state::kamikaze_ppi_w) { /* the address lines are used for /CS; yes, they can overlap! */ if (!(offset & 4)) - m_ppi8255_0->write(space, offset, data); + m_ppi8255_0->write(offset, data); if (!(offset & 8)) - m_ppi8255_1->write(space, offset, data); + m_ppi8255_1->write(offset, data); } @@ -853,6 +853,8 @@ void astinvad_state::init_spcking2() { /* don't have the schematics, but the blanking must center the screen here */ m_flip_yoffs = 0; + + save_item(NAME(m_player)); } diff --git a/src/mame/drivers/at.cpp b/src/mame/drivers/at.cpp index 635a04b03f1..fed18dbd2e7 100644 --- a/src/mame/drivers/at.cpp +++ b/src/mame/drivers/at.cpp @@ -684,15 +684,15 @@ MACHINE_CONFIG_START(megapc_state::megapc) MCFG_DEVICE_ADD("isa1", ISA16_SLOT, 0, "isabus", pc_isa16_cards, nullptr, false) at_keyboard_controller_device &keybc(AT_KEYBOARD_CONTROLLER(config, "keybc", 12_MHz_XTAL)); - keybc.system_reset_cb().set("wd7600", FUNC(wd7600_device::kbrst_w)); - keybc.gate_a20_cb().set("wd7600", FUNC(wd7600_device::gatea20_w)); - keybc.input_buffer_full_cb().set("wd7600", FUNC(wd7600_device::irq01_w)); - keybc.keyboard_clock_cb().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); - keybc.keyboard_data_cb().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + keybc.hot_res().set("wd7600", FUNC(wd7600_device::kbrst_w)); + keybc.gate_a20().set("wd7600", FUNC(wd7600_device::gatea20_w)); + keybc.kbd_irq().set("wd7600", FUNC(wd7600_device::irq01_w)); + keybc.kbd_clk().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); + keybc.kbd_data().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); MCFG_DEVICE_ADD("pc_kbdc", PC_KBDC, 0) - MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_clock_w)) - MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_data_w)) + MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_clk_w)) + MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_data_w)) MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL) /* internal ram */ diff --git a/src/mame/drivers/atarist.cpp b/src/mame/drivers/atarist.cpp index 8712e0f1ee4..dae918572a7 100644 --- a/src/mame/drivers/atarist.cpp +++ b/src/mame/drivers/atarist.cpp @@ -2046,7 +2046,7 @@ MACHINE_CONFIG_START(st_state::st) MCFG_FLOPPY_DRIVE_ADD(WD1772_TAG ":1", atari_floppies, nullptr, st_state::floppy_formats) MCFG_DEVICE_ADD("centronics", CENTRONICS, centronics_devices, "printer") - MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i0_w)) + MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(m_mfp, mc68901_device, i0_w)) MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") @@ -2058,11 +2058,11 @@ MACHINE_CONFIG_START(st_state::st) m_mfp->out_tdo_cb().set(FUNC(st_state::mfp_tdo_w)); m_mfp->out_so_cb().set(RS232_TAG, FUNC(rs232_port_device::write_txd)); - MCFG_DEVICE_ADD(RS232_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, write_rx)) - MCFG_RS232_DCD_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i1_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i2_w)) - MCFG_RS232_RI_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i6_w)) + rs232_port_device &rs232(RS232_PORT(config, RS232_TAG, default_rs232_devices, nullptr)); + rs232.rxd_handler().set(m_mfp, FUNC(mc68901_device::write_rx)); + rs232.dcd_handler().set(m_mfp, FUNC(mc68901_device::i1_w)); + rs232.cts_handler().set(m_mfp, FUNC(mc68901_device::i2_w)); + rs232.ri_handler().set(m_mfp, FUNC(mc68901_device::i6_w)); ACIA6850(config, m_acia0, 0); m_acia0->txd_handler().set(FUNC(st_state::ikbd_tx_w)); @@ -2073,7 +2073,7 @@ MACHINE_CONFIG_START(st_state::st) m_acia1->irq_handler().set("aciairq", FUNC(input_merger_device::in_w<1>)); input_merger_device &aciairq(INPUT_MERGER_ANY_HIGH(config, "aciairq")); - aciairq.output_handler().set(MC68901_TAG, FUNC(mc68901_device::i4_w)).invert(); + aciairq.output_handler().set(m_mfp, FUNC(mc68901_device::i4_w)).invert(); MCFG_MIDI_PORT_ADD("mdin", midiin_slot, "midiin") MCFG_MIDI_RX_HANDLER(WRITELINE(MC6850_1_TAG, acia6850_device, write_rxd)) @@ -2140,7 +2140,7 @@ MACHINE_CONFIG_START(megast_state::megast) MCFG_FLOPPY_DRIVE_ADD(WD1772_TAG ":1", atari_floppies, nullptr, st_state::floppy_formats) MCFG_DEVICE_ADD("centronics", CENTRONICS, centronics_devices, "printer") - MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i0_w)) + MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(m_mfp, mc68901_device, i0_w)) MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") @@ -2152,11 +2152,11 @@ MACHINE_CONFIG_START(megast_state::megast) m_mfp->out_tdo_cb().set(FUNC(st_state::mfp_tdo_w)); m_mfp->out_so_cb().set(RS232_TAG, FUNC(rs232_port_device::write_txd)); - MCFG_DEVICE_ADD(RS232_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, write_rx)) - MCFG_RS232_DCD_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i1_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i2_w)) - MCFG_RS232_RI_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i6_w)) + rs232_port_device &rs232(RS232_PORT(config, RS232_TAG, default_rs232_devices, nullptr)); + rs232.rxd_handler().set(m_mfp, FUNC(mc68901_device::write_rx)); + rs232.dcd_handler().set(m_mfp, FUNC(mc68901_device::i1_w)); + rs232.cts_handler().set(m_mfp, FUNC(mc68901_device::i2_w)); + rs232.ri_handler().set(m_mfp, FUNC(mc68901_device::i6_w)); ACIA6850(config, m_acia0, 0); m_acia0->txd_handler().set(FUNC(st_state::ikbd_tx_w)); @@ -2167,7 +2167,7 @@ MACHINE_CONFIG_START(megast_state::megast) m_acia1->irq_handler().set("aciairq", FUNC(input_merger_device::in_w<1>)); input_merger_device &aciairq(INPUT_MERGER_ANY_HIGH(config, "aciairq")); - aciairq.output_handler().set(MC68901_TAG, FUNC(mc68901_device::i4_w)).invert(); + aciairq.output_handler().set(m_mfp, FUNC(mc68901_device::i4_w)).invert(); MCFG_MIDI_PORT_ADD("mdin", midiin_slot, "midiin") MCFG_MIDI_RX_HANDLER(WRITELINE(MC6850_1_TAG, acia6850_device, write_rxd)) @@ -2242,7 +2242,7 @@ MACHINE_CONFIG_START(ste_state::ste) MCFG_FLOPPY_DRIVE_ADD(WD1772_TAG ":1", atari_floppies, nullptr, st_state::floppy_formats) MCFG_DEVICE_ADD("centronics", CENTRONICS, centronics_devices, "printer") - MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i0_w)) + MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(m_mfp, mc68901_device, i0_w)) MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") @@ -2254,11 +2254,11 @@ MACHINE_CONFIG_START(ste_state::ste) m_mfp->out_tdo_cb().set(FUNC(st_state::mfp_tdo_w)); m_mfp->out_so_cb().set(RS232_TAG, FUNC(rs232_port_device::write_txd)); - MCFG_DEVICE_ADD(RS232_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, write_rx)) - MCFG_RS232_DCD_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i1_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i2_w)) - MCFG_RS232_RI_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i6_w)) + rs232_port_device &rs232(RS232_PORT(config, RS232_TAG, default_rs232_devices, nullptr)); + rs232.rxd_handler().set(m_mfp, FUNC(mc68901_device::write_rx)); + rs232.dcd_handler().set(m_mfp, FUNC(mc68901_device::i1_w)); + rs232.cts_handler().set(m_mfp, FUNC(mc68901_device::i2_w)); + rs232.ri_handler().set(m_mfp, FUNC(mc68901_device::i6_w)); ACIA6850(config, m_acia0, 0); m_acia0->txd_handler().set(FUNC(st_state::ikbd_tx_w)); @@ -2269,7 +2269,7 @@ MACHINE_CONFIG_START(ste_state::ste) m_acia1->irq_handler().set("aciairq", FUNC(input_merger_device::in_w<1>)); input_merger_device &aciairq(INPUT_MERGER_ANY_HIGH(config, "aciairq")); - aciairq.output_handler().set(MC68901_TAG, FUNC(mc68901_device::i4_w)).invert(); + aciairq.output_handler().set(m_mfp, FUNC(mc68901_device::i4_w)).invert(); MCFG_MIDI_PORT_ADD("mdin", midiin_slot, "midiin") MCFG_MIDI_RX_HANDLER(WRITELINE(MC6850_1_TAG, acia6850_device, write_rxd)) @@ -2358,15 +2358,15 @@ static MACHINE_CONFIG_START(stbook_state::stbook) MCFG_FLOPPY_DRIVE_ADD(WD1772_TAG ":1", atari_floppies, 0, 0, st_state::floppy_formats) MCFG_DEVICE_ADD("centronics", CENTRONICS, centronics_devices, "printer") - MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i0_w)) + MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(m_mfp, mc68901_device, i0_w)) MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") - MCFG_DEVICE_ADD(RS232_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_SERIAL_OUT_RX_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, write_rx)) - MCFG_RS232_OUT_DCD_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i1_w)) - MCFG_RS232_OUT_CTS_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i2_w)) - MCFG_RS232_OUT_RI_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, i6_w)) + rs232_port_device &rs232(RS232_PORT(config, RS232_TAG, default_rs232_devices, nullptr)); + rs232.rxd_handler().set(m_mfp, FUNC(mc68901_device::write_rx)); + rs232.dcd_handler().set(m_mfp, FUNC(mc68901_device::i1_w)); + rs232.cts_handler().set(m_mfp, FUNC(mc68901_device::i2_w)); + rs232.ri_handler().set(m_mfp, FUNC(mc68901_device::i6_w)); // device hardware ACIA6850(config, m_acia0, 0); @@ -2378,7 +2378,7 @@ static MACHINE_CONFIG_START(stbook_state::stbook) m_acia1->irq_handler().set("aciairq", FUNC(input_merger_device::in_w<1>)); input_merger_device &aciairq(INPUT_MERGER_ANY_HIGH(config, "aciairq")); - aciairq.output_handler().set(MC68901_TAG, FUNC(mc68901_device::i4_w)).invert(); + aciairq.output_handler().set(m_mfp, FUNC(mc68901_device::i4_w)).invert(); MCFG_SERIAL_PORT_ADD("mdin", midiin_slot, "midiin") MCFG_MIDI_RX_HANDLER(WRITELINE(MC6850_1_TAG, acia6850_device, write_rxd)) diff --git a/src/mame/drivers/atetris.cpp b/src/mame/drivers/atetris.cpp index 3640ee05bdf..846d2785db9 100644 --- a/src/mame/drivers/atetris.cpp +++ b/src/mame/drivers/atetris.cpp @@ -239,7 +239,7 @@ void atetris_mcu_state::atetrisb3_map(address_map &map) READ8_MEMBER(atetris_mcu_state::mcu_bus_r) { - switch (m_mcu->p2_r(space, 0) & 0xf0) + switch (m_mcu->p2_r() & 0xf0) { case 0x40: return m_soundlatch[1]->read(space, 0); @@ -255,7 +255,7 @@ READ8_MEMBER(atetris_mcu_state::mcu_bus_r) WRITE8_MEMBER(atetris_mcu_state::mcu_p2_w) { if ((data & 0xc0) == 0x80) - m_sn[(data >> 4) & 3]->write(m_mcu->p1_r(space, 0)); + m_sn[(data >> 4) & 3]->write(m_mcu->p1_r()); } WRITE8_MEMBER(atetris_mcu_state::mcu_reg_w) @@ -468,22 +468,26 @@ ROM_END ROM_START( atetrisb2 ) - ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD( "k1-01", 0x10000, 0x8000, CRC(fa056809) SHA1(e4ccccdf9b04b68127c7b03ae263519cf00f94cb) ) + ROM_REGION( 0x18000, "maincpu", 0 ) // Some bootleg PCBs uses unmodified Atari ROMs + ROM_LOAD( "k1-01", 0x10000, 0x8000, CRC(fa056809) SHA1(e4ccccdf9b04b68127c7b03ae263519cf00f94cb) ) // 27512 ROM_CONTINUE( 0x08000, 0x8000 ) - ROM_REGION( 0x10000, "gfx1", 0 ) - ROM_LOAD( "136066-1101.35a", 0x0000, 0x10000, CRC(84a1939f) SHA1(d8577985fc8ed4e74f74c68b7c00c4855b7c3270) ) + ROM_REGION( 0x10000, "gfx1", 0 ) // Some bootleg PCBs uses unmodified Atari ROMs + ROM_LOAD( "136066-1101.35a", 0x0000, 0x10000, CRC(84a1939f) SHA1(d8577985fc8ed4e74f74c68b7c00c4855b7c3270) ) // 27512 ROM_REGION( 0x0020, "proms", 0 ) // currently unused - ROM_LOAD( "m3-7603-5.prom1", 0x00000, 0x0020, CRC(79656af3) SHA1(bf55f100806520b291157c03999606367dd14ecc) ) - - ROM_REGION( 0xa00, "plds", 0 ) // all protected - ROM_LOAD( "tibpal16r4-25cn.pal1", 0x000, 0x104, NO_DUMP ) // sub PCB - ROM_LOAD( "tibpal16r4-25cn.pal3", 0x200, 0x104, NO_DUMP ) // sub PCB - ROM_LOAD( "tibpal16l8-25cn.pal2", 0x400, 0x104, NO_DUMP ) // sub PCB - ROM_LOAD( "tibpal16l8-25cn.pal4", 0x600, 0x104, NO_DUMP ) // main PCB - ROM_LOAD( "tibpal16l8-25cn.pal5", 0x800, 0x104, NO_DUMP ) // main PCB + ROM_LOAD( "m3-7603-5.prom1", 0x00000, 0x0020, CRC(79656af3) SHA1(bf55f100806520b291157c03999606367dd14ecc) ) // 82s123 or TBP18S030 + + /* Unused. It's usual to find PLDs with different hashes, but defining equivalent equations */ + ROM_REGION( 0x859, "plds", 0 ) + ROM_LOAD( "a-gal16v8-b.bin", 0x000, 0x117, CRC(b1dfab0f) SHA1(e9e4db5459617a35a13df4b7a4586dd1b7be04ac) ) // sub PCB - Same content as "b" + ROM_LOAD( "b-gal16v8-b.bin", 0x117, 0x117, CRC(b1dfab0f) SHA1(e9e4db5459617a35a13df4b7a4586dd1b7be04ac) ) // sub PCB - Same content as "a" + ROM_LOAD( "c-gal16v8-b.bin", 0x22e, 0x117, CRC(e1a9db0b) SHA1(5bbac24e37a4d9b8a1387054722fa35478ca7941) ) // sub PCB + ROM_LOAD( "1-pal16l8-a.3g" , 0x345, 0x104, CRC(dcf0d2fe) SHA1(0496acaa605ec5008b110c387136bbc714441384) ) // main PCB - Found also as GAL16v8 on some PCBs + ROM_LOAD( "2-pal16r4-a.3r" , 0x449, 0x104, CRC(d71bdf27) SHA1(cc3503cb037de344fc353886f3492601638c9d45) ) // main PCB + ROM_LOAD( "3-pal16r4-a.8p" , 0x54D, 0x104, CRC(e007edf2) SHA1(4f1bc31abd64e402edb4c900ddb21f258d6782c8) ) // main PCB - Found also as GAL16v8 on some PCBs + ROM_LOAD( "4-pal16l8-a.9n" , 0x651, 0x104, CRC(3630e734) SHA1(a29dc202ffc75ac48815115b85e984fc0c9d5b59) ) // main PCB - Found also as GAL16v8 on some PCBs + ROM_LOAD( "5-pal16l8-a.9m" , 0x755, 0x104, CRC(53b64be1) SHA1(2bf712b766541c90c38c0810ee16848e448c5205) ) // main PCB - Found also as GAL16v8 on some PCBs ROM_END @@ -542,6 +546,61 @@ ROM_START( atetrisb3 ) ROM_LOAD( "pal16r4b-2cn.6", 0xa00, 0x104, NO_DUMP ) ROM_END +/* +atetb3482: Atari Tetris bootleg with additional UM3482 and Z80 (with its ROM) + __________________________________________________________________ + | | +A | ????? 74LS06 74LS197 74LS374 74LS04 | + | | +B | 74LS08 74LS74 74LS374 74LS374 | + | | +C | 74LS32 74LS27 74LS357 74LS374 XTAL | + | 74LS10 | +D | 74LS04 74LS273 74LS74 74LS374 | + | ?? ?? 74LS393 UM6116K 74LS74 74LS257 ______ 74LS27 | +E | | D2 | | + | 74LS245 74LS245 _______ | | 74LS74 | +F |UM3482 74LS139 PAL16L8 | | |27PC |74LS161 | + |______ __________ 74LS245 | MS | | 512 | | +G ||DIPS | PAL16R4 |UNPOPULAT| | 6264 | |_____|74LS161 | + ||_____| |_________| 74LS245 | L-10 | _______ | +H |74LS04 PAL16R8 ___________ | | | UN |74LS161 | + | |D1 27PC512| 74LS00 |______| | PO | | +I |74LS32 74LS373 |__________| 74LS32 | PU |PAL16L8 | + | __________ 74LS04 | LA | | +J |74LS374 74LS357 | X2804AP | 74LS257 74LS138 | TED |PAL16?? | + |____________ |_________| 74LS257 74LS257 | | | +K ||D3 27PC256 | |_____|74LS161 | + ||___________| 74LS245 74LS245 | +L |________________ _______________ 74LS257 74LS74 74LS161 | + ||SHARP LH0080B | | UM6502A | | +M ||_______________| |______________| 74LS00 74LS74 74LS161 | + | | +N |PAL16R4 74LS??? 4017 74LS08 74LS32 74LS04 PAL16R4 82S123 74LS32 | + |_________________________________________________________________| + 1 2 3 4 5 6 7 8 9 +*/ +ROM_START( atetb3482 ) + ROM_REGION( 0x18000, "maincpu", 0 ) + ROM_LOAD( "i4-d1.bin", 0x10000, 0x8000, CRC(2acbdb09) SHA1(5e1189227f26563fd3e5372121ea5c915620f892) ) + ROM_CONTINUE( 0x08000, 0x8000 ) + + ROM_REGION( 0x10000, "gfx1", 0 ) + ROM_LOAD( "f8-d2.bin", 0x0000, 0x10000, CRC(84a1939f) SHA1(d8577985fc8ed4e74f74c68b7c00c4855b7c3270) ) + + ROM_REGION( 0x08000, "tunes", 0 ) // Not hooked up. Same 8K repeated four times + ROM_LOAD( "k1-d3.bin", 0x00000, 0x08000, CRC(ce51c82b) SHA1(f90ed16f817e6b2a22b69db20348386b9c1ecb67) ) + + /* Not dumped, unused */ + ROM_REGION( 0x71c, "plds", 0 ) + ROM_LOAD( "pal16r4.1n" , 0x000, 0x104, NO_DUMP ) + ROM_LOAD( "pal16r4.7n" , 0x104, 0x104, NO_DUMP ) + ROM_LOAD( "pal16l8.9j" , 0x208, 0x104, NO_DUMP ) + ROM_LOAD( "pal16l8.9i" , 0x30c, 0x104, NO_DUMP ) + ROM_LOAD( "pal16r8.2h" , 0x410, 0x104, NO_DUMP ) + ROM_LOAD( "pal16r4.2g" , 0x514, 0x104, NO_DUMP ) + ROM_LOAD( "pal16l8.4f" , 0x618, 0x104, NO_DUMP ) +ROM_END ROM_START( atetrisc ) ROM_REGION( 0x18000, "maincpu", 0 ) @@ -592,5 +651,6 @@ GAME( 1988, atetrisa, atetris, atetris, atetris, atetris_state, init_ate GAME( 1988, atetrisb, atetris, atetris, atetris, atetris_state, init_atetris, ROT0, "bootleg", "Tetris (bootleg set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1988, atetrisb2, atetris, atetrisb2, atetris, atetris_state, init_atetris, ROT0, "bootleg", "Tetris (bootleg set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1988, atetrisb3, atetris, atetrisb3, atetris, atetris_mcu_state, init_atetris, ROT0, "bootleg", "Tetris (bootleg set 3)", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, atetb3482, atetris, atetris, atetris, atetris_state, init_atetris, ROT0, "bootleg", "Tetris (bootleg set 4, with UM3482)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_SOUND ) GAME( 1989, atetrisc, atetris, atetris, atetrisc, atetris_state, init_atetris, ROT270, "Atari Games", "Tetris (cocktail set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1989, atetrisc2, atetris, atetris, atetrisc, atetris_state, init_atetris, ROT270, "Atari Games", "Tetris (cocktail set 2)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/att4425.cpp b/src/mame/drivers/att4425.cpp index 11cdf80bf5d..494c6e47aad 100644 --- a/src/mame/drivers/att4425.cpp +++ b/src/mame/drivers/att4425.cpp @@ -110,8 +110,7 @@ void att4425_state::att4425_mem(address_map &map) void att4425_state::att4425_io(address_map &map) { map.global_mask(0xff); - map(0x00, 0x00).rw(m_i8251, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x01, 0x01).rw(m_i8251, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x00, 0x01).rw(m_i8251, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x10, 0x10).w(FUNC(att4425_state::port10_w)); map(0x14, 0x14).rw(FUNC(att4425_state::port14_r), FUNC(att4425_state::port14_w)); map(0x15, 0x15).r(FUNC(att4425_state::port15_r)); @@ -273,14 +272,14 @@ MACHINE_CONFIG_START(att4425_state::att4425) m_sio->out_txdb_callback().set(RS232_B_TAG, FUNC(rs232_port_device::write_txd)); // host - MCFG_DEVICE_ADD(RS232_A_TAG, RS232_PORT, default_rs232_devices, "null_modem") - MCFG_RS232_RXD_HANDLER(WRITELINE(m_sio, z80sio_device, rxa_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(m_sio, z80sio_device, dcda_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(m_sio, z80sio_device, ctsa_w)) + rs232_port_device &rs232a(RS232_PORT(config, RS232_A_TAG, default_rs232_devices, "null_modem")); + rs232a.rxd_handler().set(m_sio, FUNC(z80sio_device::rxa_w)); + rs232a.dcd_handler().set(m_sio, FUNC(z80sio_device::dcda_w)); + rs232a.cts_handler().set(m_sio, FUNC(z80sio_device::ctsa_w)); // aux printer? - MCFG_DEVICE_ADD(RS232_B_TAG, RS232_PORT, default_rs232_devices, "printer") - MCFG_RS232_RXD_HANDLER(WRITELINE(m_sio, z80sio_device, rxb_w)) + rs232_port_device &rs232b(RS232_PORT(config, RS232_B_TAG, default_rs232_devices, "printer")); + rs232b.rxd_handler().set(m_sio, FUNC(z80sio_device::rxb_w)); // XXX MCFG_DEVICE_ADD("line_clock", CLOCK, 9600*64) @@ -291,10 +290,10 @@ MACHINE_CONFIG_START(att4425_state::att4425) m_i8251->dtr_handler().set("rs232", FUNC(rs232_port_device::write_dtr)); m_i8251->rts_handler().set("rs232", FUNC(rs232_port_device::write_rts)); - MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, "keyboard") - MCFG_RS232_RXD_HANDLER(WRITELINE(I8251_TAG, i8251_device, write_rxd)) - MCFG_RS232_CTS_HANDLER(WRITELINE(I8251_TAG, i8251_device, write_cts)) - MCFG_RS232_DSR_HANDLER(WRITELINE(I8251_TAG, i8251_device, write_dsr)) + rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, "keyboard")); + rs232.rxd_handler().set(m_i8251, FUNC(i8251_device::write_rxd)); + rs232.cts_handler().set(m_i8251, FUNC(i8251_device::write_cts)); + rs232.dsr_handler().set(m_i8251, FUNC(i8251_device::write_dsr)); // XXX MCFG_DEVICE_ADD("keyboard_clock", CLOCK, 4800*64) diff --git a/src/mame/drivers/aussiebyte.cpp b/src/mame/drivers/aussiebyte.cpp index cb4c3b25a93..b371206e878 100644 --- a/src/mame/drivers/aussiebyte.cpp +++ b/src/mame/drivers/aussiebyte.cpp @@ -503,12 +503,11 @@ MACHINE_CONFIG_START(aussiebyte_state::aussiebyte) m_maincpu->set_daisy_config(daisy_chain_intf); /* video hardware */ - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(50) - MCFG_SCREEN_SIZE(640, 480) - MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1) - MCFG_SCREEN_UPDATE_DEVICE("crtc", sy6545_1_device, screen_update) - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_crt8002) + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(16_MHz_XTAL, 952, 0, 640, 336, 0, 288); + screen.set_screen_update("crtc", FUNC(sy6545_1_device::screen_update)); + + GFXDECODE(config, "gfxdecode", "palette", gfx_crt8002); MCFG_PALETTE_ADD_MONOCHROME("palette") /* sound hardware */ diff --git a/src/mame/drivers/ax20.cpp b/src/mame/drivers/ax20.cpp index bcee6d7cd3e..4047d3ff3e1 100644 --- a/src/mame/drivers/ax20.cpp +++ b/src/mame/drivers/ax20.cpp @@ -149,7 +149,7 @@ MACHINE_CONFIG_START(ax20_state::ax20) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_ax20) MCFG_PALETTE_ADD_MONOCHROME("palette") - MCFG_I8272A_ADD("fdc", true) + I8272A(config, m_fdc, true); /* Devices */ MCFG_FLOPPY_DRIVE_ADD("fdc:0", ax20_floppies, "525dd", isa8_fdc_device::floppy_formats) diff --git a/src/mame/drivers/b2m.cpp b/src/mame/drivers/b2m.cpp index e3584d0b747..f3c7b2ab6a6 100644 --- a/src/mame/drivers/b2m.cpp +++ b/src/mame/drivers/b2m.cpp @@ -42,8 +42,7 @@ void b2m_state::b2m_io(address_map &map) map(0x0c, 0x0c).rw(FUNC(b2m_state::b2m_localmachine_r), FUNC(b2m_state::b2m_localmachine_w)); map(0x10, 0x13).rw(FUNC(b2m_state::b2m_palette_r), FUNC(b2m_state::b2m_palette_w)); map(0x14, 0x15).rw(m_pic, FUNC(pic8259_device::read), FUNC(pic8259_device::write)); - map(0x18, 0x18).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x19, 0x19).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x18, 0x19).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x1c, 0x1f).rw(m_fdc, FUNC(fd1793_device::read), FUNC(fd1793_device::write)); } @@ -56,8 +55,7 @@ void b2m_state::b2m_rom_io(address_map &map) map(0x0c, 0x0c).rw(FUNC(b2m_state::b2m_localmachine_r), FUNC(b2m_state::b2m_localmachine_w)); map(0x10, 0x13).rw(FUNC(b2m_state::b2m_palette_r), FUNC(b2m_state::b2m_palette_w)); map(0x14, 0x15).rw(m_pic, FUNC(pic8259_device::read), FUNC(pic8259_device::write)); - map(0x18, 0x18).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x19, 0x19).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x18, 0x19).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); } diff --git a/src/mame/drivers/bbc.cpp b/src/mame/drivers/bbc.cpp index af78c26ebe6..0312b0a224c 100644 --- a/src/mame/drivers/bbc.cpp +++ b/src/mame/drivers/bbc.cpp @@ -150,14 +150,14 @@ void bbc_state::bbca_mem(address_map &map) map(0x8000, 0xbfff).bankr("bank4").w(FUNC(bbc_state::bbc_memoryb4_w)); // 8000-bfff Paged ROM map(0xc000, 0xfbff).bankr("bank7"); // c000-fbff OS ROM map(0xfc00, 0xfdff).noprw(); // fc00-fdff FRED & JIM Pages - // fe00-feff SHEILA Address Page + map(0xfe00, 0xfeff).r(FUNC(bbc_state::bbc_fe_r)); // fe00-feff SHEILA Address Page map(0xfe00, 0xfe00).mirror(0x06).rw(m_hd6845, FUNC(hd6845_device::status_r), FUNC(hd6845_device::address_w)); // fe00-fe07 6845 CRTC Video controller map(0xfe01, 0xfe01).mirror(0x06).rw(m_hd6845, FUNC(hd6845_device::register_r), FUNC(hd6845_device::register_w)); map(0xfe08, 0xfe09).mirror(0x06).rw(m_acia, FUNC(acia6850_device::read), FUNC(acia6850_device::write)); // fe08-fe0f 6850 ACIA Serial controller map(0xfe10, 0xfe17).rw(FUNC(bbc_state::bbc_fe_r), FUNC(bbc_state::bbc_SerialULA_w)); // fe10-fe17 Serial ULA Serial system chip map(0xfe18, 0xfe1f).noprw(); // fe18-fe1f INTOFF/STATID # ECONET Interrupt Off / ID No. map(0xfe20, 0xfe2f).rw(FUNC(bbc_state::bbc_fe_r), FUNC(bbc_state::bbc_videoULA_w)); // R: fe20-fe2f INTON # ECONET Interrupt On - // W: fe20-fe2f Video ULA Video system chip + // W: fe20-fe2f Video ULA Video system chip map(0xfe30, 0xfe3f).rw(FUNC(bbc_state::bbc_fe_r), FUNC(bbc_state::page_selecta_w)); // W: fe30-fe3f 74LS161 Paged ROM selector map(0xfe40, 0xfe5f).rw(m_via6522_0, FUNC(via6522_device::read), FUNC(via6522_device::write)); // fe40-fe5f 6522 VIA SYSTEM VIA map(0xfe60, 0xfe7f).noprw(); // fe60-fe7f 6522 VIA # USER VIA @@ -173,7 +173,8 @@ void bbc_state::bbc_base(address_map &map) { map.unmap_value_high(); map(0xc000, 0xfbff).bankr("bank7"); // c000-fbff OS ROM - map(0xfc00, 0xfdff).noprw(); // fc00-fdff FRED & JIM Pages + map(0xfc00, 0xfcff).rw(m_1mhzbus, FUNC(bbc_1mhzbus_slot_device::fred_r), FUNC(bbc_1mhzbus_slot_device::fred_w)); // fc00-fcff FRED Address Page + map(0xfd00, 0xfdff).rw(m_1mhzbus, FUNC(bbc_1mhzbus_slot_device::jim_r), FUNC(bbc_1mhzbus_slot_device::jim_w)); // fd00-fdff JIM Address Page map(0xfe00, 0xfeff).r(FUNC(bbc_state::bbc_fe_r)); // fe00-feff SHEILA Address Page map(0xfe00, 0xfe00).mirror(0x06).rw(m_hd6845, FUNC(hd6845_device::status_r), FUNC(hd6845_device::address_w)); // fe00-fe07 6845 CRTC Video controller map(0xfe01, 0xfe01).mirror(0x06).rw(m_hd6845, FUNC(hd6845_device::register_r), FUNC(hd6845_device::register_w)); @@ -181,10 +182,10 @@ void bbc_state::bbc_base(address_map &map) map(0xfe10, 0xfe17).rw(FUNC(bbc_state::bbc_fe_r), FUNC(bbc_state::bbc_SerialULA_w)); // fe10-fe17 Serial ULA Serial system chip map(0xfe18, 0xfe1f).portr("STATID"); // fe18-fe1f INTOFF/STATID ECONET Interrupt Off / ID No. map(0xfe20, 0xfe2f).rw(FUNC(bbc_state::bbc_fe_r), FUNC(bbc_state::bbc_videoULA_w)); // R: fe20-fe2f INTON ECONET Interrupt On - // W: fe20-fe2f Video ULA Video system chip + // W: fe20-fe2f Video ULA Video system chip map(0xfe40, 0xfe5f).rw(m_via6522_0, FUNC(via6522_device::read), FUNC(via6522_device::write)); // fe40-fe5f 6522 VIA SYSTEM VIA map(0xfe60, 0xfe7f).rw(m_via6522_1, FUNC(via6522_device::read), FUNC(via6522_device::write)); // fe60-fe7f 6522 VIA USER VIA - // fe80-fe9f FDC Floppy disc controller + // fe80-fe9f FDC Floppy disc controller map(0xfea0, 0xfebf).r(FUNC(bbc_state::bbc_fe_r)); // fea0-febf 68B54 ADLC ECONET controller map(0xfec0, 0xfedf).rw(m_upd7002, FUNC(upd7002_device::read), FUNC(upd7002_device::write)); // fec0-fedf uPD7002 Analogue to digital converter map(0xfee0, 0xfeff).rw(m_tube, FUNC(bbc_tube_slot_device::host_r), FUNC(bbc_tube_slot_device::host_w)); // fee0-feff Tube ULA Tube system interface @@ -211,6 +212,7 @@ void bbc_state::bbcb_nofdc_mem(address_map &map) map(0x4000, 0x7fff).bankrw("bank3"); // 4000-7fff Regular RAM map(0x8000, 0xbfff).bankr("bank4").w(FUNC(bbc_state::bbc_memoryb4_w)); // 8000-bfff Paged ROM/RAM map(0xfe30, 0xfe3f).w(FUNC(bbc_state::page_selectb_w)); // W: fe30-fe3f 84LS161 Paged ROM selector + map(0xfe80, 0xfe9f).rw(m_fdc, FUNC(bbc_fdc_slot_device::read), FUNC(bbc_fdc_slot_device::write)); // fe84-fe9f 8271 FDC Floppy disc controller } @@ -796,30 +798,21 @@ WRITE_LINE_MEMBER(bbc_state::adlc_irq_w) } -WRITE_LINE_MEMBER(bbc_state::econet_clk_w) +// 4 x EPROM sockets (16K) in BBC-A, these should grow to 16 for BBC-B and later... +void bbc_state::bbc_eprom_sockets(machine_config &config) { - m_adlc->rxc_w(state); - m_adlc->txc_w(state); -} + GENERIC_SOCKET(config, m_exp1, generic_linear_slot, "bbc_rom", "bin,rom"); + m_exp1->set_device_load(device_image_load_delegate(&bbc_state::device_image_load_exp1_load, this)); -// 4 x EPROM sockets (16K) in BBC-A, these should grow to 16 for BBC-B and later... -MACHINE_CONFIG_START(bbc_state::bbc_eprom_sockets) - MCFG_GENERIC_SOCKET_ADD("exp_rom1", generic_linear_slot, "bbc_cart") - MCFG_GENERIC_EXTENSIONS("bin,rom") - MCFG_GENERIC_LOAD(bbc_state, exp1_load) - - MCFG_GENERIC_SOCKET_ADD("exp_rom2", generic_linear_slot, "bbc_cart") - MCFG_GENERIC_EXTENSIONS("bin,rom") - MCFG_GENERIC_LOAD(bbc_state, exp2_load) - - MCFG_GENERIC_SOCKET_ADD("exp_rom3", generic_linear_slot, "bbc_cart") - MCFG_GENERIC_EXTENSIONS("bin,rom") - MCFG_GENERIC_LOAD(bbc_state, exp3_load) - - MCFG_GENERIC_SOCKET_ADD("exp_rom4", generic_linear_slot, "bbc_cart") - MCFG_GENERIC_EXTENSIONS("bin,rom") - MCFG_GENERIC_LOAD(bbc_state, exp4_load) -MACHINE_CONFIG_END + GENERIC_SOCKET(config, m_exp2, generic_linear_slot, "bbc_rom", "bin,rom"); + m_exp2->set_device_load(device_image_load_delegate(&bbc_state::device_image_load_exp2_load, this)); + + GENERIC_SOCKET(config, m_exp3, generic_linear_slot, "bbc_rom", "bin,rom"); + m_exp3->set_device_load(device_image_load_delegate(&bbc_state::device_image_load_exp3_load, this)); + + GENERIC_SOCKET(config, m_exp4, generic_linear_slot, "bbc_rom", "bin,rom"); + m_exp4->set_device_load(device_image_load_delegate(&bbc_state::device_image_load_exp4_load, this)); +} /*************************************************************************** @@ -831,13 +824,12 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(bbc_state::bbca) /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", M6502, 16_MHz_XTAL/8) /* 2.00 MHz */ - MCFG_DEVICE_PROGRAM_MAP(bbca_mem) - MCFG_DEVICE_PERIODIC_INT_DRIVER(bbc_state, bbcb_keyscan, 1000) /* scan keyboard */ - MCFG_QUANTUM_TIME(attotime::from_hz(60)) + M6502(config, m_maincpu, 16_MHz_XTAL / 8); + m_maincpu->set_addrmap(AS_PROGRAM, &bbc_state::bbca_mem); + m_maincpu->set_periodic_int(FUNC(bbc_state::bbcb_keyscan), attotime::from_hz(1000)); /* scan keyboard */ + config.m_minimum_quantum = attotime::from_hz(60); - MCFG_INPUT_MERGER_ANY_HIGH("irqs") - MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("maincpu", M6502_IRQ_LINE)) + INPUT_MERGER_ANY_HIGH(config, m_irqs).output_handler().set_inputline(m_maincpu, M6502_IRQ_LINE); /* internal ram */ RAM(config, m_ram).set_default_size("16K").set_extra_options("32K").set_default_value(0x00); @@ -846,24 +838,25 @@ MACHINE_CONFIG_START(bbc_state::bbca) MCFG_MACHINE_RESET_OVERRIDE(bbc_state, bbca) /* video hardware */ - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_RAW_PARAMS(16_MHz_XTAL, 1024, 0, 640, 312, 0, 256) - MCFG_SCREEN_UPDATE_DEVICE("hd6845", hd6845_device, screen_update) + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_raw(16_MHz_XTAL, 1024, 0, 640, 312, 0, 256); + m_screen->set_screen_update("hd6845", FUNC(hd6845_device::screen_update)); - MCFG_PALETTE_ADD("palette", 16) - MCFG_PALETTE_INIT_OWNER(bbc_state,bbc) + palette_device &palette(PALETTE(config, "palette", 16)); + palette.set_init(palette_init_delegate(FUNC(bbc_state::palette_init_bbc), this)); - MCFG_DEVICE_ADD("saa5050", SAA5050, 12_MHz_XTAL/2) - MCFG_SAA5050_SCREEN_SIZE(40, 25, 40) + SAA5050(config, m_trom, 12_MHz_XTAL / 2); + m_trom->set_screen_size(40, 25, 40); /* crtc */ - MCFG_MC6845_ADD("hd6845", HD6845, "screen", 16_MHz_XTAL / 8) - MCFG_MC6845_SHOW_BORDER_AREA(false) - MCFG_MC6845_CHAR_WIDTH(12) - MCFG_MC6845_UPDATE_ROW_CB(bbc_state, crtc_update_row) - MCFG_MC6845_OUT_DE_CB(WRITELINE(*this, bbc_state, bbc_de_changed)) - MCFG_MC6845_OUT_HSYNC_CB(WRITELINE(*this, bbc_state, bbc_hsync_changed)) - MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, bbc_state, bbc_vsync_changed)) + HD6845(config, m_hd6845, 16_MHz_XTAL / 8); + m_hd6845->set_screen("screen"); + m_hd6845->set_show_border_area(false); + m_hd6845->set_char_width(12); + m_hd6845->set_update_row_callback(FUNC(bbc_state::crtc_update_row), this); + m_hd6845->out_de_callback().set(FUNC(bbc_state::bbc_de_changed)); + m_hd6845->out_hsync_callback().set(FUNC(bbc_state::bbc_hsync_changed)); + m_hd6845->out_vsync_callback().set(FUNC(bbc_state::bbc_vsync_changed)); MCFG_VIDEO_START_OVERRIDE(bbc_state, bbc) @@ -871,23 +864,23 @@ MACHINE_CONFIG_START(bbc_state::bbca) /* sound hardware */ SPEAKER(config, "mono").front_center(); - MCFG_DEVICE_ADD("sn76489", SN76489, 16_MHz_XTAL/4) /* 4 MHz */ - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + SN76489(config, m_sn, 16_MHz_XTAL / 4); + m_sn->add_route(ALL_OUTPUTS, "mono", 1.0); /* cassette relay */ - MCFG_DEVICE_ADD("samples", SAMPLES) - MCFG_SAMPLES_CHANNELS(1) - MCFG_SAMPLES_NAMES(bbc_sample_names) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + SAMPLES(config, m_samples); + m_samples->set_channels(1); + m_samples->set_samples_names(bbc_sample_names); + m_samples->add_route(ALL_OUTPUTS, "mono", 1.0); /* cassette */ - MCFG_CASSETTE_ADD( "cassette" ) - MCFG_CASSETTE_FORMATS(bbc_cassette_formats) - MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED) - MCFG_CASSETTE_INTERFACE("bbc_cass") + CASSETTE(config, m_cassette); + m_cassette->set_formats(bbc_cassette_formats); + m_cassette->set_default_state(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED); + m_cassette->set_interface("bbc_cass"); /* software lists */ - MCFG_SOFTWARE_LIST_ADD("cass_ls_a", "bbca_cass") + SOFTWARE_LIST(config, "cass_ls_a").set_original("bbca_cass"); /* acia */ ACIA6850(config, m_acia, 0); @@ -895,13 +888,13 @@ MACHINE_CONFIG_START(bbc_state::bbca) m_acia->rts_handler().set(FUNC(bbc_state::bbc_rts_w)); m_acia->irq_handler().set("irqs", FUNC(input_merger_device::in_w<0>)); - MCFG_DEVICE_ADD(RS232_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(*this, bbc_state, write_rxd_serial)) - MCFG_RS232_DCD_HANDLER(WRITELINE(*this, bbc_state, write_dcd_serial)) - MCFG_RS232_CTS_HANDLER(WRITELINE(*this, bbc_state, write_cts_serial)) + RS232_PORT(config, m_rs232, default_rs232_devices, nullptr); + m_rs232->rxd_handler().set(FUNC(bbc_state::write_rxd_serial)); + m_rs232->dcd_handler().set(FUNC(bbc_state::write_dcd_serial)); + m_rs232->cts_handler().set(FUNC(bbc_state::write_cts_serial)); - MCFG_DEVICE_ADD("acia_clock", CLOCK, 16_MHz_XTAL / 13) - MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(*this, bbc_state, write_acia_clock)) + CLOCK(config, m_acia_clock, 16_MHz_XTAL / 13); + m_acia_clock->signal_handler().set(FUNC(bbc_state::write_acia_clock)); /* system via */ VIA6522(config, m_via6522_0, 16_MHz_XTAL / 16); @@ -919,8 +912,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(bbc_state::bbcb) bbca(config); /* basic machine hardware */ - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(bbcb_nofdc_mem) + m_maincpu->set_addrmap(AS_PROGRAM, &bbc_state::bbcb_nofdc_mem); MCFG_MACHINE_START_OVERRIDE(bbc_state, bbcb) MCFG_MACHINE_RESET_OVERRIDE(bbc_state, bbcb) @@ -929,10 +921,10 @@ MACHINE_CONFIG_START(bbc_state::bbcb) m_ram->set_default_size("32K").set_default_value(0x00); /* speech hardware */ - MCFG_DEVICE_ADD("vsm", SPEECHROM, 0) - MCFG_DEVICE_ADD("tms5220", TMS5220, 640000) - MCFG_TMS52XX_SPEECHROM("vsm") - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + SPEECHROM(config, "vsm", 0).set_reverse_bit_order(true); + TMS5220(config, m_tms, 640000); + m_tms->set_speechrom_tag("vsm"); + m_tms->add_route(ALL_OUTPUTS, "mono", 1.0); /* user via */ VIA6522(config, m_via6522_1, 16_MHz_XTAL / 16); @@ -943,133 +935,130 @@ MACHINE_CONFIG_START(bbc_state::bbcb) m_via6522_1->irq_handler().set("irqs", FUNC(input_merger_device::in_w<2>)); /* adc */ - MCFG_DEVICE_ADD("upd7002", UPD7002, 0) - MCFG_UPD7002_GET_ANALOGUE_CB(bbc_state, BBC_get_analogue_input) - MCFG_UPD7002_EOC_CB(bbc_state, BBC_uPD7002_EOC) + UPD7002(config, m_upd7002, 0); + m_upd7002->set_get_analogue_callback(FUNC(bbc_state::BBC_get_analogue_input), this); + m_upd7002->set_eoc_callback(FUNC(bbc_state::BBC_uPD7002_EOC), this); /* printer */ centronics_device ¢ronics(CENTRONICS(config, "centronics", centronics_devices, "printer")); centronics.ack_handler().set("via6522_1", FUNC(via6522_device::write_ca1)).invert(); // ack seems to be inverted? - MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") + output_latch_device &latch(OUTPUT_LATCH(config, "cent_data_out")); + centronics.set_output_latch(latch); /* fdc */ - MCFG_BBC_FDC_SLOT_ADD("fdc", bbc_fdc_devices, "acorn8271", false) - MCFG_BBC_FDC_SLOT_INTRQ_HANDLER(WRITELINE(*this, bbc_state, fdc_intrq_w)) - MCFG_BBC_FDC_SLOT_DRQ_HANDLER(WRITELINE(*this, bbc_state, fdc_drq_w)) + BBC_FDC_SLOT(config, m_fdc, bbc_fdc_devices, "acorn8271"); + m_fdc->intrq_wr_callback().set(FUNC(bbc_state::fdc_intrq_w)); + m_fdc->drq_wr_callback().set(FUNC(bbc_state::fdc_drq_w)); /* econet */ MC6854(config, m_adlc); m_adlc->out_txd_cb().set(ECONET_TAG, FUNC(econet_device::host_data_w)); m_adlc->out_irq_cb().set(FUNC(bbc_state::adlc_irq_w)); - MCFG_ECONET_ADD() - MCFG_ECONET_CLK_CALLBACK(WRITELINE(*this, bbc_state, econet_clk_w)) - MCFG_ECONET_DATA_CALLBACK(WRITELINE("mc6854", mc6854_device, set_rx)) - MCFG_ECONET_SLOT_ADD("econet254", 254, econet_devices, nullptr) + + econet_device &econet(ECONET(config, "econet", 0)); + econet.clk_wr_callback().set(m_adlc, FUNC(mc6854_device::txc_w)); + econet.clk_wr_callback().append(m_adlc, FUNC(mc6854_device::rxc_w)); + econet.data_wr_callback().set(m_adlc, FUNC(mc6854_device::set_rx)); + + econet_slot_device &econet_slot(ECONET_SLOT(config, "econet254", 0)); + econet_devices(econet_slot); + econet_slot.set_slot(254); /* analogue port */ - MCFG_BBC_ANALOGUE_SLOT_ADD("analogue", bbc_analogue_devices, nullptr) + BBC_ANALOGUE_SLOT(config, m_analog, bbc_analogue_devices, nullptr); + m_analog->lpstb_handler().set(FUNC(bbc_state::lpstb_w)); /* 1mhz bus port */ - MCFG_BBC_1MHZBUS_SLOT_ADD("1mhzbus", bbc_1mhzbus_devices, nullptr) - MCFG_BBC_1MHZBUS_SLOT_IRQ_HANDLER(WRITELINE("irqs", input_merger_device, in_w<3>)) - MCFG_BBC_1MHZBUS_SLOT_NMI_HANDLER(WRITELINE(*this, bbc_state, bus_nmi_w)) + BBC_1MHZBUS_SLOT(config, m_1mhzbus, bbc_1mhzbus_devices, nullptr); + m_1mhzbus->irq_handler().set(m_irqs, FUNC(input_merger_device::in_w<3>)); + m_1mhzbus->nmi_handler().set(FUNC(bbc_state::bus_nmi_w)); /* tube port */ - MCFG_BBC_TUBE_SLOT_ADD("tube", bbc_extube_devices, nullptr) - MCFG_BBC_TUBE_SLOT_IRQ_HANDLER(WRITELINE("irqs", input_merger_device, in_w<4>)) + BBC_TUBE_SLOT(config, m_tube, bbc_extube_devices, nullptr); + m_tube->irq_handler().set(m_irqs, FUNC(input_merger_device::in_w<4>)); /* user port */ - MCFG_BBC_USERPORT_SLOT_ADD("userport", bbc_userport_devices, nullptr) - MCFG_BBC_USERPORT_CB1_HANDLER(WRITELINE("via6522_1", via6522_device, write_cb1)) - MCFG_BBC_USERPORT_CB2_HANDLER(WRITELINE("via6522_1", via6522_device, write_cb2)) + BBC_USERPORT_SLOT(config, m_userport, bbc_userport_devices, nullptr); + m_userport->cb1_handler().set(m_via6522_1, FUNC(via6522_device::write_cb1)); + m_userport->cb2_handler().set(m_via6522_1, FUNC(via6522_device::write_cb2)); /* software lists */ - MCFG_SOFTWARE_LIST_ADD("cass_ls_b", "bbcb_cass") - MCFG_SOFTWARE_LIST_ADD("flop_ls_b", "bbcb_flop") - MCFG_SOFTWARE_LIST_ADD("flop_ls_b_orig", "bbcb_flop_orig") + SOFTWARE_LIST(config, "cass_ls_b").set_original("bbcb_cass"); + SOFTWARE_LIST(config, "flop_ls_b").set_original("bbcb_flop"); + SOFTWARE_LIST(config, "flop_ls_b_orig").set_original("bbcb_flop_orig"); MACHINE_CONFIG_END -MACHINE_CONFIG_START(bbc_state::bbcb_de) +void bbc_state::bbcb_de(machine_config &config) +{ bbcb(config); /* basic machine hardware */ - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(bbcb_mem) + m_maincpu->set_addrmap(AS_PROGRAM, &bbc_state::bbcb_mem); /* fdc */ - MCFG_DEVICE_REMOVE("fdc") - I8271(config, m_i8271, 0); + config.device_remove("fdc"); + I8271(config, m_i8271, 16_MHz_XTAL / 8); m_i8271->intrq_wr_callback().set(FUNC(bbc_state::fdc_intrq_w)); m_i8271->hdl_wr_callback().set(FUNC(bbc_state::motor_w)); m_i8271->opt_wr_callback().set(FUNC(bbc_state::side_w)); - MCFG_FLOPPY_DRIVE_ADD("i8271:0", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc) - MCFG_FLOPPY_DRIVE_SOUND(true) - MCFG_FLOPPY_DRIVE_ADD("i8271:1", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc) - MCFG_FLOPPY_DRIVE_SOUND(true) + + FLOPPY_CONNECTOR(config, "i8271:0", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc).enable_sound(true); + FLOPPY_CONNECTOR(config, "i8271:1", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc).enable_sound(true); /* software lists */ - MCFG_SOFTWARE_LIST_ADD("flop_ls_b_de", "bbcb_cass_de") -MACHINE_CONFIG_END + SOFTWARE_LIST(config, "flop_ls_b_de").set_original("bbcb_cass_de"); +} -MACHINE_CONFIG_START(bbc_state::bbcb_us) +void bbc_state::bbcb_us(machine_config &config) +{ bbcb(config); /* basic machine hardware */ - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(bbcb_mem) + m_maincpu->set_addrmap(AS_PROGRAM, &bbc_state::bbcb_mem); /* video hardware */ - MCFG_SCREEN_MODIFY("screen") - MCFG_SCREEN_SIZE(640, 200) - MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 200-1) - MCFG_SCREEN_REFRESH_RATE(60) + m_screen->set_raw(16_MHz_XTAL, 1024, 0, 640, 262, 0, 200); /* fdc */ - MCFG_DEVICE_REMOVE("fdc") - I8271(config, m_i8271, 0); + config.device_remove("fdc"); + I8271(config, m_i8271, 16_MHz_XTAL / 8); m_i8271->intrq_wr_callback().set(FUNC(bbc_state::fdc_intrq_w)); m_i8271->hdl_wr_callback().set(FUNC(bbc_state::motor_w)); m_i8271->opt_wr_callback().set(FUNC(bbc_state::side_w)); - MCFG_FLOPPY_DRIVE_ADD("i8271:0", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc) - MCFG_FLOPPY_DRIVE_SOUND(true) - MCFG_FLOPPY_DRIVE_ADD("i8271:1", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc) - MCFG_FLOPPY_DRIVE_SOUND(true) + FLOPPY_CONNECTOR(config, "i8271:0", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc).enable_sound(true); + FLOPPY_CONNECTOR(config, "i8271:1", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc).enable_sound(true); /* software lists */ - MCFG_SOFTWARE_LIST_ADD("flop_ls_b_us", "bbcb_flop_us") -MACHINE_CONFIG_END + SOFTWARE_LIST(config, "flop_ls_b_us").set_original("bbcb_cass_us"); +} MACHINE_CONFIG_START(bbc_state::bbcbp) bbcb(config); /* basic machine hardware */ - MCFG_DEVICE_MODIFY("maincpu") /* M6512 */ - MCFG_DEVICE_PROGRAM_MAP(bbcbp_mem) - MCFG_DEVICE_OPCODES_MAP(bbcbp_fetch) + m_maincpu->set_addrmap(AS_PROGRAM, &bbc_state::bbcbp_mem); + m_maincpu->set_addrmap(AS_OPCODES, &bbc_state::bbcbp_fetch); MCFG_MACHINE_START_OVERRIDE(bbc_state, bbcbp) MCFG_MACHINE_RESET_OVERRIDE(bbc_state, bbcbp) /* fdc */ - MCFG_DEVICE_REMOVE("fdc") + config.device_remove("fdc"); WD1770(config, m_wd1770, 16_MHz_XTAL / 2); m_wd1770->intrq_wr_callback().set(FUNC(bbc_state::fdc_intrq_w)); m_wd1770->drq_wr_callback().set(FUNC(bbc_state::fdc_drq_w)); - MCFG_FLOPPY_DRIVE_ADD("wd1770:0", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc) - MCFG_FLOPPY_DRIVE_SOUND(true) - MCFG_FLOPPY_DRIVE_ADD("wd1770:1", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc) - MCFG_FLOPPY_DRIVE_SOUND(true) + FLOPPY_CONNECTOR(config, "wd1770:0", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc).enable_sound(true); + FLOPPY_CONNECTOR(config, "wd1770:1", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc).enable_sound(true); MACHINE_CONFIG_END MACHINE_CONFIG_START(bbc_state::bbcbp128) bbcbp(config); /* basic machine hardware */ - MCFG_DEVICE_MODIFY("maincpu") /* M6512 */ - MCFG_DEVICE_PROGRAM_MAP(bbcbp128_mem) - MCFG_DEVICE_OPCODES_MAP(bbcbp_fetch) + m_maincpu->set_addrmap(AS_PROGRAM, &bbc_state::bbcbp128_mem); + m_maincpu->set_addrmap(AS_OPCODES, &bbc_state::bbcbp_fetch); MCFG_MACHINE_START_OVERRIDE(bbc_state, bbcbp) MCFG_MACHINE_RESET_OVERRIDE(bbc_state, bbcbp) @@ -1092,42 +1081,41 @@ MACHINE_CONFIG_START(torch_state::torchf) MCFG_MACHINE_RESET_OVERRIDE(bbc_state, torch) /* fdc */ - MCFG_DEVICE_REMOVE("fdc") - I8271(config, m_i8271, 0); + config.device_remove("fdc"); + I8271(config, m_i8271, 16_MHz_XTAL / 8); m_i8271->intrq_wr_callback().set(FUNC(bbc_state::fdc_intrq_w)); m_i8271->hdl_wr_callback().set(FUNC(bbc_state::motor_w)); m_i8271->opt_wr_callback().set(FUNC(bbc_state::side_w)); - MCFG_FLOPPY_DRIVE_ADD_FIXED("i8271:0", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc) - MCFG_FLOPPY_DRIVE_SOUND(true) - MCFG_FLOPPY_DRIVE_ADD_FIXED("i8271:1", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc) - MCFG_FLOPPY_DRIVE_SOUND(true) + FLOPPY_CONNECTOR(config, "i8271:0", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc, true).enable_sound(true); + FLOPPY_CONNECTOR(config, "i8271:1", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc).enable_sound(true); /* Add Torch Z80 Communicator co-processor */ - MCFG_DEVICE_MODIFY("tube") - MCFG_SLOT_DEFAULT_OPTION("zep100") - MCFG_SLOT_FIXED(true) + m_tube->set_default_option("zep100"); + m_tube->set_fixed(true); MACHINE_CONFIG_END -MACHINE_CONFIG_START(torch_state::torchh10) +void torch_state::torchh10(machine_config &config) +{ torchf(config); /* fdc */ - MCFG_DEVICE_REMOVE("i8271:1") + config.device_remove("i8271:1"); /* Add 10MB HDD */ -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(torch_state::torchh21) +void torch_state::torchh21(machine_config &config) +{ torchf(config); /* fdc */ - MCFG_DEVICE_REMOVE("i8271:1") + config.device_remove("i8271:1"); /* Add 21MB HDD */ -MACHINE_CONFIG_END +} /*************************************************************************** @@ -1137,94 +1125,74 @@ MACHINE_CONFIG_END ****************************************************************************/ -MACHINE_CONFIG_START(bbc_state::abc110) +void bbc_state::abc110(machine_config &config) +{ bbcbp(config); /* fdc */ - MCFG_DEVICE_REMOVE("wd1770:1") + config.device_remove("wd1770:1"); /* Acorn Z80 co-processor */ - MCFG_DEVICE_MODIFY("tube") - MCFG_SLOT_DEFAULT_OPTION("z80") - MCFG_SLOT_FIXED(true) + m_tube->set_default_option("z80"); + m_tube->set_fixed(true); /* Add ADAPTEC ACB-4000 Winchester Disc Controller */ - //scsi_port_device &scsibus(SCSI_PORT(config, SCSIBUS_TAG)); - //scsibus.set_data_input_buffer("scsi_data_in"); - //scsibus.msg_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::write_bit0)); - //scsibus.bsy_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::scsi_bsy_w)) - //scsibus.req_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::scsi_req_w)) - //scsibus.io_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::write_bit6)); - //scsibus.cd_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::write_bit7)); - //scsibus.set_slot_device(1, "harddisk", ACB4070, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_0)); - - //output_latch_device &scsiout(OUTPUT_LATCH(config, "scsi_data_out")); - //scsibus.set_output_latch(scsiout); - //scsiout.bit_handler<0>().set("scsi", FUNC(scsi_port_device::write_data0)); - //scsiout.bit_handler<1>().set("scsi", FUNC(scsi_port_device::write_data1)); - //scsiout.bit_handler<2>().set("scsi", FUNC(scsi_port_device::write_data2)); - //scsiout.bit_handler<3>().set("scsi", FUNC(scsi_port_device::write_data3)); - //scsiout.bit_handler<4>().set("scsi", FUNC(scsi_port_device::write_data4)); - //scsiout.bit_handler<5>().set("scsi", FUNC(scsi_port_device::write_data5)); - //scsiout.bit_handler<6>().set("scsi", FUNC(scsi_port_device::write_data6)); - //scsiout.bit_handler<7>().set("scsi", FUNC(scsi_port_device::write_data7)); - - //INPUT_BUFFER(config, "scsi_ctrl_in"); - //INPUT_BUFFER(config, "scsi_data_in"); /* Add 10MB ST-412 Winchester */ /* software lists */ - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_a") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b_orig") -MACHINE_CONFIG_END + config.device_remove("cass_ls_a"); + config.device_remove("cass_ls_b"); + config.device_remove("flop_ls_b"); + config.device_remove("flop_ls_b_orig"); +} -MACHINE_CONFIG_START(bbc_state::acw443) +void bbc_state::acw443(machine_config &config) +{ bbcbp(config); /* fdc */ - MCFG_DEVICE_REMOVE("wd1770:1") + config.device_remove("wd1770:1"); /* Add 32016 co-processor */ - //MCFG_DEVICE_MODIFY("tube") - //MCFG_SLOT_DEFAULT_OPTION("32016") - //MCFG_SLOT_FIXED(true) + //m_tube->set_default_option("32016"); + //m_tube->set_fixed(true); /* Add ADAPTEC ACB-4000 Winchester Disc Controller */ + //m_1mhzbus->set_default_option("awdd"); + //m_1mhzbus->set_fixed(true); /* Add 10MB ST-412 Winchester ABC210 */ /* Add 20MB ST-412 Winchester Cambridge */ /* software lists */ - MCFG_SOFTWARE_LIST_ADD("flop_ls_32016", "bbc_flop_32016") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_a") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b_orig") -MACHINE_CONFIG_END + SOFTWARE_LIST(config, "flop_ls_32016").set_original("bbc_flop_32016"); + config.device_remove("cass_ls_a"); + config.device_remove("cass_ls_b"); + config.device_remove("flop_ls_b"); + config.device_remove("flop_ls_b_orig"); +} -MACHINE_CONFIG_START(bbc_state::abc310) +void bbc_state::abc310(machine_config &config) +{ bbcbp(config); /* fdc */ - MCFG_DEVICE_REMOVE("wd1770:1") + config.device_remove("wd1770:1"); /* Acorn 80286 co-processor */ - MCFG_DEVICE_MODIFY("tube") - MCFG_SLOT_DEFAULT_OPTION("80286") - MCFG_SLOT_FIXED(true) + m_tube->set_default_option("80286"); + m_tube->set_fixed(true); /* Add ADAPTEC ACB-4000 Winchester Disc Controller */ /* Add 10MB ST-412 Winchester */ /* software lists */ - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_a") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b") -MACHINE_CONFIG_END + config.device_remove("cass_ls_a"); + config.device_remove("cass_ls_b"); + config.device_remove("flop_ls_b"); +} /*************************************************************************** @@ -1234,35 +1202,35 @@ MACHINE_CONFIG_END ****************************************************************************/ -MACHINE_CONFIG_START(bbc_state::reutapm) +void bbc_state::reutapm(machine_config &config) +{ bbcbp(config); /* basic machine hardware */ - MCFG_DEVICE_MODIFY("maincpu") /* M6512 */ - MCFG_DEVICE_PROGRAM_MAP(reutapm_mem) - MCFG_DEVICE_OPCODES_MAP(bbcbp_fetch) + m_maincpu->set_addrmap(AS_PROGRAM, &bbc_state::reutapm_mem); + m_maincpu->set_addrmap(AS_OPCODES, &bbc_state::bbcbp_fetch); /* sound hardware */ - MCFG_DEVICE_REMOVE("mono") - MCFG_DEVICE_REMOVE("sn76489") - MCFG_DEVICE_REMOVE("samples") - MCFG_DEVICE_REMOVE("vsm") - MCFG_DEVICE_REMOVE("tms5220") + config.device_remove("mono"); + config.device_remove("sn76489"); + config.device_remove("samples"); + config.device_remove("vsm"); + config.device_remove("tms5220"); /* cassette */ - MCFG_DEVICE_REMOVE( "cassette" ) + config.device_remove("cassette"); /* fdc */ config.device_remove("wd1770"); /* software lists */ - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_a") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b_orig") + config.device_remove("cass_ls_a"); + config.device_remove("cass_ls_b"); + config.device_remove("flop_ls_b"); + config.device_remove("flop_ls_b_orig"); /* expansion ports */ - MCFG_DEVICE_REMOVE("analogue") -MACHINE_CONFIG_END + config.device_remove("analogue"); +} /*************************************************************************** @@ -1280,11 +1248,12 @@ void bbc_state::econx25(machine_config &config) config.device_remove("tms5220"); /* fdc */ - //config.device_remove("wd1770"); + //config.device_remove("wd1770") /* Add Econet X25 Gateway co-processor */ - //MCFG_DEVICE_MODIFY("tube") - //MCFG_DEVICE_SLOT_INTERFACE(bbc_x25tube_devices, "x25", true) + //m_tube->option_list(bbc_x25tube_devices); + //m_tube->set_default_option("x25"); + //m_tube->set_fixed(true); /* software lists */ config.device_remove("cass_ls_a"); @@ -1303,14 +1272,13 @@ void bbc_state::econx25(machine_config &config) MACHINE_CONFIG_START(bbc_state::bbcm) /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", M65SC02, 16_MHz_XTAL/8) /* 2.00 MHz */ - MCFG_DEVICE_PROGRAM_MAP(bbcm_mem) - MCFG_DEVICE_OPCODES_MAP(bbcm_fetch) - MCFG_DEVICE_PERIODIC_INT_DRIVER(bbc_state, bbcb_keyscan, 1000) /* scan keyboard */ - MCFG_QUANTUM_TIME(attotime::from_hz(60)) + M65SC02(config, m_maincpu, 16_MHz_XTAL / 8); + m_maincpu->set_addrmap(AS_PROGRAM, &bbc_state::bbcm_mem); + m_maincpu->set_addrmap(AS_OPCODES, &bbc_state::bbcm_fetch); + m_maincpu->set_periodic_int(FUNC(bbc_state::bbcb_keyscan), attotime::from_hz(1000)); /* scan keyboard */ + config.m_minimum_quantum = attotime::from_hz(60); - MCFG_INPUT_MERGER_ANY_HIGH("irqs") - MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("maincpu", M6502_IRQ_LINE)) + INPUT_MERGER_ANY_HIGH(config, m_irqs).output_handler().set_inputline(m_maincpu, M6502_IRQ_LINE); /* internal ram */ RAM(config, RAM_TAG).set_default_size("32K").set_default_value(0x00); @@ -1321,67 +1289,69 @@ MACHINE_CONFIG_START(bbc_state::bbcm) config.set_default_layout(layout_bbcm); /* video hardware */ - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_RAW_PARAMS(16_MHz_XTAL, 1024, 0, 640, 312, 0, 256) - MCFG_SCREEN_UPDATE_DEVICE("hd6845", hd6845_device, screen_update) + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_raw(16_MHz_XTAL, 1024, 0, 640, 312, 0, 256); + m_screen->set_screen_update("hd6845", FUNC(hd6845_device::screen_update)); - MCFG_PALETTE_ADD("palette", 16) - MCFG_PALETTE_INIT_OWNER(bbc_state, bbc) + palette_device &palette(PALETTE(config, "palette", 16)); + palette.set_init(palette_init_delegate(FUNC(bbc_state::palette_init_bbc), this)); - MCFG_DEVICE_ADD("saa5050", SAA5050, 12_MHz_XTAL / 2) - MCFG_SAA5050_SCREEN_SIZE(40, 25, 40) + SAA5050(config, m_trom, 12_MHz_XTAL / 2); + m_trom->set_screen_size(40, 25, 40); /* crtc */ - MCFG_MC6845_ADD("hd6845", HD6845, "screen", 16_MHz_XTAL / 8) - MCFG_MC6845_SHOW_BORDER_AREA(false) - MCFG_MC6845_CHAR_WIDTH(12) - MCFG_MC6845_UPDATE_ROW_CB(bbc_state, crtc_update_row) - MCFG_MC6845_OUT_DE_CB(WRITELINE(*this, bbc_state, bbc_de_changed)) - MCFG_MC6845_OUT_HSYNC_CB(WRITELINE(*this, bbc_state, bbc_hsync_changed)) - MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, bbc_state, bbc_vsync_changed)) + HD6845(config, m_hd6845, 16_MHz_XTAL / 8); + m_hd6845->set_screen("screen"); + m_hd6845->set_show_border_area(false); + m_hd6845->set_char_width(12); + m_hd6845->set_update_row_callback(FUNC(bbc_state::crtc_update_row), this); + m_hd6845->out_de_callback().set(FUNC(bbc_state::bbc_de_changed)); + m_hd6845->out_hsync_callback().set(FUNC(bbc_state::bbc_hsync_changed)); + m_hd6845->out_vsync_callback().set(FUNC(bbc_state::bbc_vsync_changed)); MCFG_VIDEO_START_OVERRIDE(bbc_state, bbc) /* sound hardware */ SPEAKER(config, "mono").front_center(); - MCFG_DEVICE_ADD("sn76489", SN76489, 16_MHz_XTAL/4) /* 4 MHz */ - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + SN76489(config, m_sn, 16_MHz_XTAL / 4); + m_sn->add_route(ALL_OUTPUTS, "mono", 1.0); /* cassette relay */ - MCFG_DEVICE_ADD("samples", SAMPLES) - MCFG_SAMPLES_CHANNELS(1) - MCFG_SAMPLES_NAMES(bbc_sample_names) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) + SAMPLES(config, m_samples); + m_samples->set_channels(1); + m_samples->set_samples_names(bbc_sample_names); + m_samples->add_route(ALL_OUTPUTS, "mono", 1.0); /* rtc and cmos */ - MCFG_DEVICE_ADD("rtc", MC146818, 32.768_kHz_XTAL) + MC146818(config, m_rtc, 32.768_kHz_XTAL); /* printer */ centronics_device ¢ronics(CENTRONICS(config, "centronics", centronics_devices, "printer")); centronics.ack_handler().set("via6522_1", FUNC(via6522_device::write_ca1)).invert(); // ack seems to be inverted? - MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") + output_latch_device &latch(OUTPUT_LATCH(config, "cent_data_out")); + centronics.set_output_latch(latch); /* cassette */ - MCFG_CASSETTE_ADD( "cassette" ) - MCFG_CASSETTE_FORMATS(bbc_cassette_formats) - MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED) - MCFG_CASSETTE_INTERFACE("bbc_cass") + CASSETTE(config, m_cassette); + m_cassette->set_formats(bbc_cassette_formats); + m_cassette->set_default_state(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED); + m_cassette->set_interface("bbc_cass"); // 2 x cartridge sockets in BBC-Master - MCFG_GENERIC_CARTSLOT_ADD("exp_rom1", generic_plain_slot, "bbcm_cart") - MCFG_GENERIC_LOAD(bbc_state, bbcm_exp1_load) + GENERIC_CARTSLOT(config, m_exp1, generic_linear_slot, "bbcm_cart", "bin,rom"); + m_exp1->set_device_load(device_image_load_delegate(&bbc_state::device_image_load_bbcm_cart1_load, this)); - MCFG_GENERIC_CARTSLOT_ADD("exp_rom2", generic_plain_slot, "bbcm_cart") - MCFG_GENERIC_LOAD(bbc_state, bbcm_exp2_load) + GENERIC_CARTSLOT(config, m_exp2, generic_linear_slot, "bbcm_cart", "bin,rom"); + m_exp2->set_device_load(device_image_load_delegate(&bbc_state::device_image_load_bbcm_cart2_load, this)); /* software lists */ - MCFG_SOFTWARE_LIST_ADD("cass_ls_m", "bbcm_cass") - MCFG_SOFTWARE_LIST_ADD("flop_ls_m", "bbcm_flop") - MCFG_SOFTWARE_LIST_ADD("cart_ls_m", "bbcm_cart") - MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("cass_ls_a", "bbca_cass") - MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("cass_ls_b", "bbcb_cass") - MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("flop_ls_b", "bbcb_flop") - MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("flop_ls_b_orig", "bbcb_flop_orig") + SOFTWARE_LIST(config, "cass_ls_m").set_original("bbcm_cass"); + SOFTWARE_LIST(config, "flop_ls_m").set_original("bbcm_flop"); + SOFTWARE_LIST(config, "cart_ls_m").set_original("bbcm_cart"); + SOFTWARE_LIST(config, "cass_ls_a").set_compatible("bbca_cass"); + SOFTWARE_LIST(config, "cass_ls_b").set_compatible("bbcb_cass"); + SOFTWARE_LIST(config, "flop_ls_b").set_compatible("bbcb_flop"); + SOFTWARE_LIST(config, "flop_ls_b_orig").set_compatible("bbcb_flop_orig"); /* acia */ ACIA6850(config, m_acia, 0); @@ -1389,18 +1359,18 @@ MACHINE_CONFIG_START(bbc_state::bbcm) m_acia->rts_handler().set(FUNC(bbc_state::bbc_rts_w)); m_acia->irq_handler().set("irqs", FUNC(input_merger_device::in_w<0>)); - MCFG_DEVICE_ADD(RS232_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(*this, bbc_state, write_rxd_serial)) - MCFG_RS232_DCD_HANDLER(WRITELINE(*this, bbc_state, write_dcd_serial)) - MCFG_RS232_CTS_HANDLER(WRITELINE(*this, bbc_state, write_cts_serial)) + RS232_PORT(config, m_rs232, default_rs232_devices, nullptr); + m_rs232->rxd_handler().set(FUNC(bbc_state::write_rxd_serial)); + m_rs232->dcd_handler().set(FUNC(bbc_state::write_dcd_serial)); + m_rs232->cts_handler().set(FUNC(bbc_state::write_cts_serial)); - MCFG_DEVICE_ADD("acia_clock", CLOCK, 16_MHz_XTAL / 13) - MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(*this, bbc_state, write_acia_clock)) + CLOCK(config, m_acia_clock, 16_MHz_XTAL / 13); + m_acia_clock->signal_handler().set(FUNC(bbc_state::write_acia_clock)); /* adc */ - MCFG_DEVICE_ADD("upd7002", UPD7002, 0) - MCFG_UPD7002_GET_ANALOGUE_CB(bbc_state, BBC_get_analogue_input) - MCFG_UPD7002_EOC_CB(bbc_state, BBC_uPD7002_EOC) + UPD7002(config, m_upd7002, 0); + m_upd7002->set_get_analogue_callback(FUNC(bbc_state::BBC_get_analogue_input), this); + m_upd7002->set_eoc_callback(FUNC(bbc_state::BBC_uPD7002_EOC), this); /* system via */ VIA6522(config, m_via6522_0, 16_MHz_XTAL / 16); @@ -1423,152 +1393,156 @@ MACHINE_CONFIG_START(bbc_state::bbcm) m_wd1770->intrq_wr_callback().set(FUNC(bbc_state::fdc_intrq_w)); m_wd1770->drq_wr_callback().set(FUNC(bbc_state::fdc_drq_w)); - MCFG_FLOPPY_DRIVE_ADD("wd1770:0", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc) - MCFG_FLOPPY_DRIVE_SOUND(true) - MCFG_FLOPPY_DRIVE_ADD("wd1770:1", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc) - MCFG_FLOPPY_DRIVE_SOUND(true) + FLOPPY_CONNECTOR(config, "wd1770:0", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc).enable_sound(true); + FLOPPY_CONNECTOR(config, "wd1770:1", bbc_floppies_525, "525qd", bbc_state::floppy_formats_bbc).enable_sound(true); /* econet */ MC6854(config, m_adlc); m_adlc->out_txd_cb().set(ECONET_TAG, FUNC(econet_device::host_data_w)); m_adlc->out_irq_cb().set(FUNC(bbc_state::adlc_irq_w)); - MCFG_ECONET_ADD() - MCFG_ECONET_CLK_CALLBACK(WRITELINE(*this, bbc_state, econet_clk_w)) - MCFG_ECONET_DATA_CALLBACK(WRITELINE("mc6854", mc6854_device, set_rx)) - MCFG_ECONET_SLOT_ADD("econet254", 254, econet_devices, nullptr) + + econet_device &econet(ECONET(config, "econet", 0)); + econet.clk_wr_callback().set(m_adlc, FUNC(mc6854_device::txc_w)); + econet.clk_wr_callback().append(m_adlc, FUNC(mc6854_device::rxc_w)); + econet.data_wr_callback().set(m_adlc, FUNC(mc6854_device::set_rx)); + + econet_slot_device &econet_slot(ECONET_SLOT(config, "econet254", 0)); + econet_devices(econet_slot); + econet_slot.set_slot(254); /* analogue port */ - MCFG_BBC_ANALOGUE_SLOT_ADD("analogue", bbc_analogue_devices, nullptr) + BBC_ANALOGUE_SLOT(config, m_analog, bbc_analogue_devices, nullptr); /* 1mhz bus port */ - MCFG_BBC_1MHZBUS_SLOT_ADD("1mhzbus", bbc_1mhzbus_devices, nullptr) - MCFG_BBC_1MHZBUS_SLOT_IRQ_HANDLER(WRITELINE("irqs", input_merger_device, in_w<3>)) - MCFG_BBC_1MHZBUS_SLOT_NMI_HANDLER(WRITELINE(*this, bbc_state, bus_nmi_w)) + BBC_1MHZBUS_SLOT(config, m_1mhzbus, bbc_1mhzbus_devices, nullptr); + m_1mhzbus->irq_handler().set(m_irqs, FUNC(input_merger_device::in_w<3>)); + m_1mhzbus->nmi_handler().set(FUNC(bbc_state::bus_nmi_w)); /* tube ports */ - MCFG_BBC_TUBE_SLOT_ADD("intube", bbc_intube_devices, nullptr) - MCFG_BBC_TUBE_SLOT_IRQ_HANDLER(WRITELINE("irqs", input_merger_device, in_w<4>)) - MCFG_BBC_TUBE_SLOT_ADD("extube", bbc_extube_devices, nullptr) - MCFG_BBC_TUBE_SLOT_IRQ_HANDLER(WRITELINE("irqs", input_merger_device, in_w<5>)) + BBC_TUBE_SLOT(config, m_intube, bbc_intube_devices, nullptr); + m_intube->irq_handler().set(m_irqs, FUNC(input_merger_device::in_w<4>)); + BBC_TUBE_SLOT(config, m_extube, bbc_extube_devices, nullptr); + m_extube->irq_handler().set(m_irqs, FUNC(input_merger_device::in_w<5>)); /* user port */ - MCFG_BBC_USERPORT_SLOT_ADD("userport", bbc_userport_devices, nullptr) - MCFG_BBC_USERPORT_CB1_HANDLER(WRITELINE("via6522_1", via6522_device, write_cb1)) - MCFG_BBC_USERPORT_CB2_HANDLER(WRITELINE("via6522_1", via6522_device, write_cb2)) + BBC_USERPORT_SLOT(config, m_userport, bbc_userport_devices, nullptr); + m_userport->cb1_handler().set(m_via6522_1, FUNC(via6522_device::write_cb1)); + m_userport->cb2_handler().set(m_via6522_1, FUNC(via6522_device::write_cb2)); MACHINE_CONFIG_END -MACHINE_CONFIG_START(bbc_state::bbcmt) +void bbc_state::bbcmt(machine_config &config) +{ bbcm(config); /* Acorn 65C102 co-processor */ - MCFG_DEVICE_MODIFY("intube") - MCFG_SLOT_DEFAULT_OPTION("65c102") - MCFG_SLOT_FIXED(true) -MACHINE_CONFIG_END + m_intube->set_default_option("65c102"); + m_intube->set_fixed(true); +} -MACHINE_CONFIG_START(bbc_state::bbcmaiv) +void bbc_state::bbcmaiv(machine_config &config) +{ bbcm(config); /* Acorn 65C102 co-processor */ - MCFG_DEVICE_MODIFY("intube") - MCFG_SLOT_DEFAULT_OPTION("65c102") - MCFG_SLOT_FIXED(true) + m_intube->set_default_option("65c102"); + m_intube->set_fixed(true); /* Add Philips VP415 Laserdisc player */ /* Acorn Tracker Ball */ - MCFG_DEVICE_MODIFY("userport") - MCFG_SLOT_DEFAULT_OPTION("tracker") -MACHINE_CONFIG_END + m_userport->set_default_option("tracker"); +} -MACHINE_CONFIG_START(bbc_state::bbcmet) +void bbc_state::bbcmet(machine_config &config) +{ bbcm(config); /* printer */ - MCFG_DEVICE_REMOVE("centronics") - MCFG_DEVICE_REMOVE("cent_data_out") + config.device_remove("centronics"); + config.device_remove("cent_data_out"); /* cassette */ - MCFG_DEVICE_REMOVE("cassette") + config.device_remove("cassette"); /* software lists */ - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_m") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_a") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_m") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b_orig") + config.device_remove("cass_ls_m"); + config.device_remove("cass_ls_a"); + config.device_remove("cass_ls_b"); + config.device_remove("flop_ls_m"); + config.device_remove("flop_ls_b"); + config.device_remove("flop_ls_b_orig"); /* acia */ - MCFG_DEVICE_REMOVE("acia6850") - MCFG_DEVICE_REMOVE(RS232_TAG) - MCFG_DEVICE_REMOVE("acia_clock") + config.device_remove("acia6850"); + config.device_remove(RS232_TAG); + config.device_remove("acia_clock"); /* devices */ - MCFG_DEVICE_REMOVE("upd7002") - MCFG_DEVICE_REMOVE("via6522_1") + config.device_remove("upd7002"); + config.device_remove("via6522_1"); /* fdc */ config.device_remove("wd1770"); - /* expansion ports */ - MCFG_DEVICE_REMOVE("analogue") - MCFG_DEVICE_REMOVE("extube") - MCFG_DEVICE_REMOVE("1mhzbus") - MCFG_DEVICE_REMOVE("userport") -MACHINE_CONFIG_END + /* expansion ports (not fitted) */ + config.device_remove("analogue"); + config.device_remove("extube"); + config.device_remove("1mhzbus"); + config.device_remove("userport"); +} -MACHINE_CONFIG_START(bbc_state::bbcm512) +void bbc_state::bbcm512(machine_config &config) +{ bbcm(config); /* Acorn Intel 80186 co-processor */ - MCFG_DEVICE_MODIFY("intube") - MCFG_SLOT_DEFAULT_OPTION("80186") - MCFG_SLOT_FIXED(true) + m_intube->set_default_option("80186"); + m_intube->set_fixed(true); /* Acorn Mouse */ - MCFG_DEVICE_MODIFY("userport") - MCFG_SLOT_DEFAULT_OPTION("m512mouse") -MACHINE_CONFIG_END + m_userport->set_default_option("m512mouse"); +} -MACHINE_CONFIG_START(bbc_state::bbcmarm) +void bbc_state::bbcmarm(machine_config &config) +{ bbcm(config); /* Acorn ARM co-processor */ - MCFG_DEVICE_MODIFY("extube") - MCFG_SLOT_DEFAULT_OPTION("arm") - MCFG_SLOT_FIXED(true) -MACHINE_CONFIG_END + m_extube->set_default_option("arm"); + m_extube->set_fixed(true); +} -MACHINE_CONFIG_START(bbc_state::discmon) +void bbc_state::discmon(machine_config &config) +{ bbcm(config); /* Add coin slot */ /* software lists */ - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_m") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_a") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_m") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b_orig") -MACHINE_CONFIG_END + config.device_remove("cass_ls_m"); + config.device_remove("cass_ls_a"); + config.device_remove("cass_ls_b"); + config.device_remove("flop_ls_m"); + config.device_remove("flop_ls_b"); + config.device_remove("flop_ls_b_orig"); +} -MACHINE_CONFIG_START(bbc_state::discmate) +void bbc_state::discmate(machine_config &config) +{ bbcm(config); /* Add Sony CDK-3000PII Auto Disc Loader */ /* Add interface boards connected to cassette and RS423 */ /* software lists */ - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_m") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_a") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_m") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b_orig") -MACHINE_CONFIG_END + config.device_remove("cass_ls_m"); + config.device_remove("cass_ls_a"); + config.device_remove("cass_ls_b"); + config.device_remove("flop_ls_m"); + config.device_remove("flop_ls_b"); + config.device_remove("flop_ls_b_orig"); +} MACHINE_CONFIG_START(bbc_state::cfa3000) @@ -1582,24 +1556,21 @@ MACHINE_CONFIG_START(bbc_state::cfa3000) MCFG_DEVICE_SLOT_INTERFACE(bbc_floppies_525, nullptr, false) /* keyboard */ - MCFG_DEVICE_MODIFY("userport") - MCFG_SLOT_DEFAULT_OPTION("cfa3000kbd") + m_userport->set_default_option("cfa3000kbd"); /* option board */ - MCFG_DEVICE_MODIFY("1mhzbus") - MCFG_SLOT_DEFAULT_OPTION("cfa3000opt") + m_1mhzbus->set_default_option("cfa3000opt"); /* analogue dials/sensors */ - MCFG_DEVICE_MODIFY("analogue") - MCFG_SLOT_DEFAULT_OPTION("cfa3000a") + m_analog->set_default_option("cfa3000a"); /* software lists */ - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_m") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_a") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_m") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b_orig") + config.device_remove("cass_ls_m"); + config.device_remove("cass_ls_a"); + config.device_remove("cass_ls_b"); + config.device_remove("flop_ls_m"); + config.device_remove("flop_ls_b"); + config.device_remove("flop_ls_b_orig"); MACHINE_CONFIG_END @@ -1613,22 +1584,20 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(bbc_state::bbcmc) bbcm(config); /* cassette */ - MCFG_DEVICE_REMOVE("cassette") + config.device_remove("cassette"); /* fdc */ config.device_remove("wd1770"); - wd1772_device& wd1772(WD1772(config, "wd1772", 16_MHz_XTAL / 2)); - wd1772.intrq_wr_callback().set(FUNC(bbc_state::fdc_intrq_w)); - wd1772.drq_wr_callback().set(FUNC(bbc_state::fdc_drq_w)); + WD1772(config, m_wd1772, 16_MHz_XTAL / 2); + m_wd1772->intrq_wr_callback().set(FUNC(bbc_state::fdc_intrq_w)); + m_wd1772->drq_wr_callback().set(FUNC(bbc_state::fdc_drq_w)); - MCFG_FLOPPY_DRIVE_ADD_FIXED("wd1772:0", bbc_floppies_35, "35dd", bbc_state::floppy_formats_bbc) - MCFG_FLOPPY_DRIVE_SOUND(true) - MCFG_FLOPPY_DRIVE_ADD("wd1772:1", bbc_floppies_35, nullptr, bbc_state::floppy_formats_bbc) - MCFG_FLOPPY_DRIVE_SOUND(true) + FLOPPY_CONNECTOR(config, "wd1772:0", bbc_floppies_35, "35dd", bbc_state::floppy_formats_bbc, true).enable_sound(true); + FLOPPY_CONNECTOR(config, "wd1772:1", bbc_floppies_35, nullptr, bbc_state::floppy_formats_bbc).enable_sound(true); /* eeprom pcd8572 */ - //MCFG_DEVICE_REMOVE("rtc") + //config.device_remove("rtc"); MCFG_MACHINE_START_OVERRIDE(bbc_state, bbcmc) MCFG_MACHINE_RESET_OVERRIDE(bbc_state, bbcmc) @@ -1639,39 +1608,40 @@ MACHINE_CONFIG_START(bbc_state::bbcmc) m_via6522_1->writepb_handler().set("joyport", FUNC(bbc_joyport_slot_device::pb_w)); /* cartridge sockets */ - MCFG_DEVICE_REMOVE("exp_rom1") - MCFG_DEVICE_REMOVE("exp_rom2") + config.device_remove("exp_rom1"); + config.device_remove("exp_rom2"); /* software lists */ - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_m") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_a") - MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_m") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b_orig") - MCFG_SOFTWARE_LIST_REMOVE("cart_ls_m") - MCFG_SOFTWARE_LIST_ADD("flop_ls_mc", "bbcmc_flop") - MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("flop_ls_pro128s", "pro128s_flop") + config.device_remove("cass_ls_m"); + config.device_remove("cass_ls_a"); + config.device_remove("cass_ls_b"); + config.device_remove("flop_ls_m"); + config.device_remove("flop_ls_b"); + config.device_remove("flop_ls_b_orig"); + config.device_remove("cart_ls_m"); + SOFTWARE_LIST(config, "flop_ls_mc").set_original("bbcmc_flop"); + SOFTWARE_LIST(config, "flop_ls_pro128s").set_compatible("pro128s_flop"); /* expansion ports */ - MCFG_BBC_JOYPORT_ADD("joyport", bbc_joyport_devices, "joystick") - MCFG_BBC_JOYPORT_CB1_HANDLER(WRITELINE("via6522_1", via6522_device, write_cb1)) - MCFG_BBC_JOYPORT_CB2_HANDLER(WRITELINE("via6522_1", via6522_device, write_cb2)) + BBC_JOYPORT_SLOT(config, m_joyport, bbc_joyport_devices, "joystick"); + m_joyport->cb1_handler().set(m_via6522_1, FUNC(via6522_device::write_cb1)); + m_joyport->cb2_handler().set(m_via6522_1, FUNC(via6522_device::write_cb2)); - MCFG_DEVICE_REMOVE("analogue") - MCFG_DEVICE_REMOVE("intube") - MCFG_DEVICE_REMOVE("extube") + config.device_remove("analogue"); + config.device_remove("intube"); + config.device_remove("extube"); MACHINE_CONFIG_END -MACHINE_CONFIG_START(bbc_state::pro128s) +void bbc_state::pro128s(machine_config &config) +{ bbcmc(config); /* software lists */ - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_mc") - MCFG_SOFTWARE_LIST_REMOVE("flop_ls_pro128s") - MCFG_SOFTWARE_LIST_ADD("flop_ls_pro128s", "pro128s_flop") - MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("flop_ls_mc", "bbcmc_flop") -MACHINE_CONFIG_END + config.device_remove("flop_ls_mc"); + config.device_remove("flop_ls_pro128s"); + SOFTWARE_LIST(config, "flop_ls_pro128s").set_original("pro128s_flop"); + SOFTWARE_LIST(config, "flop_ls_mc").set_compatible("bbcmc_flop"); +} /*************************************************************************** diff --git a/src/mame/drivers/bfcobra.cpp b/src/mame/drivers/bfcobra.cpp index 039292fa44b..9bd0b24055f 100644 --- a/src/mame/drivers/bfcobra.cpp +++ b/src/mame/drivers/bfcobra.cpp @@ -1661,8 +1661,9 @@ MACHINE_CONFIG_START(bfcobra_state::bfcobra) MCFG_PALETTE_ADD("palette", 256) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") // MUSIC Semiconductor TR9C1710 RAMDAC or equivalent - MCFG_RAMDAC_SPLIT_READ(1) + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); // MUSIC Semiconductor TR9C1710 RAMDAC or equivalent + ramdac.set_addrmap(0, &bfcobra_state::ramdac_map); + ramdac.set_split_read(1); SPEAKER(config, "mono").front_center(); diff --git a/src/mame/drivers/bfm_sc2.cpp b/src/mame/drivers/bfm_sc2.cpp index 804698c183b..cbdaf1301dc 100644 --- a/src/mame/drivers/bfm_sc2.cpp +++ b/src/mame/drivers/bfm_sc2.cpp @@ -3,7 +3,7 @@ // thanks-to: 'Re-Animator' /**************************************************************************************** - bfm_sc2.c + bfm_sc2.cpp Bellfruit scorpion2/3 driver, (under heavy construction !!!) @@ -7110,8 +7110,6 @@ ROM_START( sc2scshxgman ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "scxgm10.bin", 0x0000, 0x010000, CRC(f8c5bac8) SHA1(7858b2c8442b80b69598244870620d45042b7abb) ) ROM_REGION( 0x200000, "altrevs", ROMREGION_ERASE00 ) - ROM_LOAD( "scxgm10a.bin", 0x0000, 0x010000, CRC(deab7e4e) SHA1(472a55b0ba289b0f4e538bb4c8b826dede3a40bb) ) -//scxgm10b.bin identical ROM_LOAD( "scxhiv1.gmn", 0x0000, 0x010000, CRC(c43c2f43) SHA1(8bd8b2a71f19d6fd1f96d6032d1b60bb75dcaeb8) ) ROM_LOAD( "scxhiv2.gmn", 0x0000, 0x010000, CRC(83a1ecc9) SHA1(b0176b25c97739442f3743136833d0e5fe51c03f) ) ROM_LOAD( "scxlov1.gm", 0x0000, 0x010000, CRC(e305ff5a) SHA1(0bbc1cfaf7c7aaf324c65fd22148437e2bd4ca1e) ) diff --git a/src/mame/drivers/bingoc.cpp b/src/mame/drivers/bingoc.cpp index f4b3e9c3296..51266ba6d62 100644 --- a/src/mame/drivers/bingoc.cpp +++ b/src/mame/drivers/bingoc.cpp @@ -129,22 +129,14 @@ WRITE8_MEMBER(bingoc_state::sound_play_w) void bingoc_state::main_map(address_map &map) { map(0x000000, 0x03ffff).rom(); - map(0x100001, 0x100001).rw("uart1", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x100003, 0x100003).rw("uart1", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x100009, 0x100009).rw("uart2", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x10000b, 0x10000b).rw("uart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x100011, 0x100011).rw("uart3", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x100013, 0x100013).rw("uart3", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x100019, 0x100019).rw("uart4", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x10001b, 0x10001b).rw("uart4", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x100021, 0x100021).rw("uart5", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x100023, 0x100023).rw("uart5", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x100029, 0x100029).rw("uart6", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x10002b, 0x10002b).rw("uart6", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x100031, 0x100031).rw("uart7", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x100033, 0x100033).rw("uart7", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x100039, 0x100039).rw("uart8", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x10003b, 0x10003b).rw("uart8", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x100000, 0x100003).rw("uart1", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0x100008, 0x10000b).rw("uart2", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0x100010, 0x100013).rw("uart3", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0x100018, 0x10001b).rw("uart4", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0x100020, 0x100023).rw("uart5", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0x100028, 0x10002b).rw("uart6", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0x100030, 0x100033).rw("uart7", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0x100038, 0x10003b).rw("uart8", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0x180000, 0x18001f).rw("io", FUNC(sega_315_5338a_device::read), FUNC(sega_315_5338a_device::write)).umask16(0x00ff); //lamps? #if 0 // !SOUND_TEST map(0x180010, 0x180011).w(FUNC(bingoc_state::main_sound_latch_w)); //WRONG there... diff --git a/src/mame/drivers/blitz68k.cpp b/src/mame/drivers/blitz68k.cpp index 8ad214c4749..3316322b91e 100644 --- a/src/mame/drivers/blitz68k.cpp +++ b/src/mame/drivers/blitz68k.cpp @@ -79,6 +79,29 @@ public: , m_leds(*this, "led%u", 0U) { } + void init_bankrob(); + void init_cjffruit(); + void init_deucesw2(); + void init_megadble(); + void init_bankroba(); + void init_maxidbl(); + void init_cj3play(); + void init_megadblj(); + void init_hermit(); + void init_dualgame(); + + void hermit(machine_config &config); + void bankrob(machine_config &config); + void cjffruit(machine_config &config); + void steaser(machine_config &config); + void deucesw2(machine_config &config); + void ilpag(machine_config &config); + void maxidbl(machine_config &config); + void dualgame(machine_config &config); + void bankroba(machine_config &config); + void ramdac_config(machine_config &config); +private: + DECLARE_WRITE16_MEMBER(blit_copy_w); DECLARE_READ8_MEMBER(blit_status_r); DECLARE_WRITE8_MEMBER(blit_x_w); @@ -157,31 +180,12 @@ public: DECLARE_WRITE_LINE_MEMBER(crtc_vsync_irq1); DECLARE_WRITE_LINE_MEMBER(crtc_vsync_irq3); DECLARE_WRITE_LINE_MEMBER(crtc_vsync_irq5); - void init_bankrob(); - void init_cjffruit(); - void init_deucesw2(); - void init_megadble(); - void init_bankroba(); - void init_maxidbl(); - void init_cj3play(); - void init_megadblj(); - void init_hermit(); - void init_dualgame(); DECLARE_VIDEO_START(blitz68k); DECLARE_VIDEO_START(blitz68k_addr_factor1); uint32_t screen_update_blitz68k(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); uint32_t screen_update_blitz68k_noblit(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); TIMER_DEVICE_CALLBACK_MEMBER(steaser_mcu_sim); MC6845_ON_UPDATE_ADDR_CHANGED(crtc_addr); - void hermit(machine_config &config); - void bankrob(machine_config &config); - void cjffruit(machine_config &config); - void steaser(machine_config &config); - void deucesw2(machine_config &config); - void ilpag(machine_config &config); - void maxidbl(machine_config &config); - void dualgame(machine_config &config); - void bankroba(machine_config &config); void bankrob_map(address_map &map); void bankroba_map(address_map &map); void cjffruit_map(address_map &map); @@ -193,7 +197,6 @@ public: void ramdac_map(address_map &map); void steaser_map(address_map &map); -protected: virtual void machine_start() override { m_leds.resolve(); } optional_shared_ptr<uint16_t> m_nvram; @@ -1710,6 +1713,13 @@ void blitz68k_state::ramdac_map(address_map &map) map(0x000, 0x3ff).rw("ramdac", FUNC(ramdac_device::ramdac_pal_r), FUNC(ramdac_device::ramdac_rgb666_w)); } +void blitz68k_state::ramdac_config(machine_config &config) +{ + PALETTE(config, m_palette, 0x100); + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &blitz68k_state::ramdac_map); +} + MACHINE_CONFIG_START(blitz68k_state::ilpag) MCFG_DEVICE_ADD(m_maincpu, M68000, 11059200 ) // ? MCFG_DEVICE_PROGRAM_MAP(ilpag_map) @@ -1724,11 +1734,9 @@ MACHINE_CONFIG_START(blitz68k_state::ilpag) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); - MCFG_PALETTE_ADD(m_palette, 0x100) + ramdac_config(config); MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k) - - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") MACHINE_CONFIG_END /* @@ -1799,10 +1807,9 @@ MACHINE_CONFIG_START(blitz68k_state::cjffruit) MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr) MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq1)) - MCFG_PALETTE_ADD(m_palette, 0x100) + ramdac_config(config); MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") MACHINE_CONFIG_END @@ -1831,10 +1838,9 @@ MACHINE_CONFIG_START(blitz68k_state::bankrob) MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr) MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq3)) - MCFG_PALETTE_ADD(m_palette, 0x100) + ramdac_config(config); MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") MACHINE_CONFIG_END @@ -1861,10 +1867,9 @@ MACHINE_CONFIG_START(blitz68k_state::bankroba) MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr) MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq5)) - MCFG_PALETTE_ADD(m_palette, 0x100) + ramdac_config(config); MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k_addr_factor1) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") MACHINE_CONFIG_END @@ -1890,10 +1895,9 @@ MACHINE_CONFIG_START(blitz68k_state::deucesw2) MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr) MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq3)) - MCFG_PALETTE_ADD(m_palette, 0x100) + ramdac_config(config); MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") MACHINE_CONFIG_END @@ -1921,10 +1925,9 @@ MACHINE_CONFIG_START(blitz68k_state::dualgame) MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr) MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq3)) - MCFG_PALETTE_ADD(m_palette, 0x100) + ramdac_config(config); MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") MACHINE_CONFIG_END @@ -1950,10 +1953,9 @@ MACHINE_CONFIG_START(blitz68k_state::hermit) MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr) MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq1)) - MCFG_PALETTE_ADD(m_palette, 0x100) + ramdac_config(config); MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") MACHINE_CONFIG_END @@ -1984,8 +1986,7 @@ MACHINE_CONFIG_START(blitz68k_state::maxidbl) MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr) MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq3)) - MCFG_PALETTE_ADD(m_palette, 0x100) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_config(config); SPEAKER(config, "mono").front_center(); MCFG_SAA1099_ADD("saa", XTAL(8'000'000)/2) diff --git a/src/mame/drivers/bmcbowl.cpp b/src/mame/drivers/bmcbowl.cpp index 2ca7256b8bf..3d5eb818798 100644 --- a/src/mame/drivers/bmcbowl.cpp +++ b/src/mame/drivers/bmcbowl.cpp @@ -477,8 +477,7 @@ void bmcbowl_state::bmcbowl(machine_config &config) screen.screen_vblank().set_inputline(m_maincpu, M68K_IRQ_2, HOLD_LINE); PALETTE(config, m_palette, 256); - ramdac_device &ramdac(RAMDAC(config, "ramdac", 0)); - ramdac.set_palette(m_palette); + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); ramdac.set_addrmap(0, &bmcbowl_state::ramdac_map); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); diff --git a/src/mame/drivers/bmcpokr.cpp b/src/mame/drivers/bmcpokr.cpp index ff27925690c..674b405b95f 100644 --- a/src/mame/drivers/bmcpokr.cpp +++ b/src/mame/drivers/bmcpokr.cpp @@ -823,7 +823,8 @@ MACHINE_CONFIG_START(bmcpokr_state::bmcpokr) MCFG_SCREEN_PALETTE("palette") MCFG_PALETTE_ADD("palette", 256) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &bmcpokr_state::ramdac_map); MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_bmcpokr) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); diff --git a/src/mame/drivers/bw12.cpp b/src/mame/drivers/bw12.cpp index 6285c6d1825..1a26bd62754 100644 --- a/src/mame/drivers/bw12.cpp +++ b/src/mame/drivers/bw12.cpp @@ -579,7 +579,7 @@ MACHINE_CONFIG_START(bw12_state::common) /* devices */ MCFG_TIMER_DRIVER_ADD(FLOPPY_TIMER_TAG, bw12_state, floppy_motor_off_tick) - MCFG_UPD765A_ADD(UPD765_TAG, false, true) + UPD765A(config, m_fdc, false, true); PIA6821(config, m_pia, 0); m_pia->readpa_handler().set(FUNC(bw12_state::pia_pa_r)); diff --git a/src/mame/drivers/bw2.cpp b/src/mame/drivers/bw2.cpp index 55dd940c817..564a3d000af 100644 --- a/src/mame/drivers/bw2.cpp +++ b/src/mame/drivers/bw2.cpp @@ -191,8 +191,7 @@ void bw2_state::bw2_io(address_map &map) map(0x10, 0x13).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0x20, 0x21).m(m_lcdc, FUNC(msm6255_device::map)); map(0x30, 0x3f).rw(m_exp, FUNC(bw2_expansion_slot_device::slot_r), FUNC(bw2_expansion_slot_device::slot_w)); - map(0x40, 0x40).rw(m_uart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x41, 0x41).rw(m_uart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x40, 0x41).rw(m_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x50, 0x50).w("cent_data_out", FUNC(output_latch_device::bus_w)); map(0x60, 0x63).rw(m_fdc, FUNC(wd2797_device::read), FUNC(wd2797_device::write)); map(0x70, 0x7f).rw(m_exp, FUNC(bw2_expansion_slot_device::modsel_r), FUNC(bw2_expansion_slot_device::modsel_w)); diff --git a/src/mame/drivers/bzone.cpp b/src/mame/drivers/bzone.cpp index f35d0a23888..e101e5182c1 100644 --- a/src/mame/drivers/bzone.cpp +++ b/src/mame/drivers/bzone.cpp @@ -669,7 +669,7 @@ ROM_START( bzone ) /* Analog Vec Gen A035742-02 */ ROM_LOAD( "036409-01.n1", 0x7800, 0x0800, CRC(1e14e919) SHA1(448fab30535e6fad7e0ab4427bc06bbbe075e797) ) /* Vector Generator ROMs */ ROM_LOAD( "036422-01.bc3", 0x3000, 0x0800, CRC(7414177b) SHA1(147d97a3b475e738ce00b1a7909bbd787ad06eda) ) - ROM_LOAD( "036421-01.a3", 0x3800, 0x0800, CRC(8ea8f939) SHA1(b71e0ab0e220c3e64dc2b094c701fb1a960b64e4) ) + ROM_LOAD( "036421-01.a3", 0x3800, 0x0800, CRC(8ea8f939) SHA1(b71e0ab0e220c3e64dc2b094c701fb1a960b64e4) ) // 036421-01e.a3 same contents /* AVG PROM */ ROM_REGION( 0x100, "user1", 0 ) @@ -699,7 +699,7 @@ ROM_START( bzonea ) /* Analog Vec Gen A035742-02 */ ROM_LOAD( "036409-01.n1", 0x7800, 0x0800, CRC(1e14e919) SHA1(448fab30535e6fad7e0ab4427bc06bbbe075e797) ) /* Vector Generator ROMs */ ROM_LOAD( "036422-01.bc3", 0x3000, 0x0800, CRC(7414177b) SHA1(147d97a3b475e738ce00b1a7909bbd787ad06eda) ) - ROM_LOAD( "036421-01.a3", 0x3800, 0x0800, CRC(8ea8f939) SHA1(b71e0ab0e220c3e64dc2b094c701fb1a960b64e4) ) + ROM_LOAD( "036421-01.a3", 0x3800, 0x0800, CRC(8ea8f939) SHA1(b71e0ab0e220c3e64dc2b094c701fb1a960b64e4) ) // 036421-01e.a3 same contents /* AVG PROM */ ROM_REGION( 0x100, "user1", 0 ) diff --git a/src/mame/drivers/cabal.cpp b/src/mame/drivers/cabal.cpp index 8a24021bba1..a32ce364351 100644 --- a/src/mame/drivers/cabal.cpp +++ b/src/mame/drivers/cabal.cpp @@ -553,13 +553,13 @@ MACHINE_CONFIG_START(cabal_state::cabalt) MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_PROGRAM_MAP(trackball_main_map) - MCFG_DEVICE_ADD("upd4701l", UPD4701A, 0) - MCFG_UPD4701_PORTX("IN0") - MCFG_UPD4701_PORTY("IN1") + upd4701_device &upd4701l(UPD4701A(config, "upd4701l")); + upd4701l.set_portx_tag("IN0"); + upd4701l.set_porty_tag("IN1"); - MCFG_DEVICE_ADD("upd4701h", UPD4701A, 0) - MCFG_UPD4701_PORTX("IN2") - MCFG_UPD4701_PORTY("IN3") + upd4701_device &upd4701h(UPD4701A(config, "upd4701h")); + upd4701h.set_portx_tag("IN2"); + upd4701h.set_porty_tag("IN3"); MACHINE_CONFIG_END MACHINE_CONFIG_START(cabal_state::cabalbl2) diff --git a/src/mame/drivers/cgc7900.cpp b/src/mame/drivers/cgc7900.cpp index 6b02457a645..d14c727179c 100644 --- a/src/mame/drivers/cgc7900.cpp +++ b/src/mame/drivers/cgc7900.cpp @@ -347,10 +347,8 @@ void cgc7900_state::cgc7900_mem(address_map &map) // AM_RANGE(0xefc446, 0xefc447) HVG Load dY // AM_RANGE(0xefc448, 0xefc449) HVG Load Pixel Color // AM_RANGE(0xefc44a, 0xefc44b) HVG Load Trip - map(0xff8001, 0xff8001).rw(m_i8251_0, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xff8003, 0xff8003).rw(m_i8251_0, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xff8041, 0xff8041).rw(m_i8251_1, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xff8043, 0xff8043).rw(m_i8251_1, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xff8000, 0xff8003).rw(m_i8251_0, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0xff8040, 0xff8043).rw(m_i8251_1, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0xff8080, 0xff8081).rw(FUNC(cgc7900_state::keyboard_r), FUNC(cgc7900_state::keyboard_w)); // AM_RANGE(0xff80c6, 0xff80c7) Joystick X axis // AM_RANGE(0xff80ca, 0xff80cb) Joystick Y axis diff --git a/src/mame/drivers/chihiro.cpp b/src/mame/drivers/chihiro.cpp index fc410064974..32beb7c23ae 100644 --- a/src/mame/drivers/chihiro.cpp +++ b/src/mame/drivers/chihiro.cpp @@ -374,8 +374,9 @@ Thanks to Alex, Mr Mudkips, and Philip Burke for this info. */ #include "emu.h" -#include "includes/xbox.h" +#include "machine/pci.h" #include "includes/xbox_pci.h" +#include "includes/xbox.h" #include "cpu/i386/i386.h" #include "machine/idehd.h" diff --git a/src/mame/drivers/chsuper.cpp b/src/mame/drivers/chsuper.cpp index 28e8b6aa44f..786db5fe8ab 100644 --- a/src/mame/drivers/chsuper.cpp +++ b/src/mame/drivers/chsuper.cpp @@ -386,7 +386,8 @@ MACHINE_CONFIG_START(chsuper_state::chsuper) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_chsuper) MCFG_PALETTE_ADD("palette", 0x100) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &chsuper_state::ramdac_map); /* sound hardware */ SPEAKER(config, "speaker").front_center(); diff --git a/src/mame/drivers/cinemat.cpp b/src/mame/drivers/cinemat.cpp index 7c199f9e9ee..31729e463d4 100644 --- a/src/mame/drivers/cinemat.cpp +++ b/src/mame/drivers/cinemat.cpp @@ -768,6 +768,41 @@ static INPUT_PORTS_START( starcas ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, cinemat_state,coin_inserted, 0) INPUT_PORTS_END +static INPUT_PORTS_START( starcasc ) + PORT_START("INPUTS") + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON2 ) + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON1 ) + PORT_BIT( 0x07c0, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(2) + PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(2) + PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) + PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) + PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("SWITCHES") + PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) + PORT_DIPSETTING( 0x03, "3" ) + PORT_DIPSETTING( 0x01, "4" ) + PORT_DIPSETTING( 0x02, "5" ) + PORT_DIPSETTING( 0x00, "6" ) + PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coinage ) ) + PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 4C_3C ) ) + PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x08, DEF_STR( 2C_3C ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_SERVICE( 0x40, IP_ACTIVE_HIGH ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, cinemat_state, coin_inserted, 0) +INPUT_PORTS_END static INPUT_PORTS_START( solarq ) PORT_START("INPUTS") @@ -1319,6 +1354,16 @@ ROM_START( starcas ) CCPU_PROMS ROM_END +ROM_START( starcasc ) + ROM_REGION( 0x2000, "maincpu", 0 ) // all HN462716G, all labels hand-written + ROM_LOAD16_BYTE( "ctsc926_ue_3265.t7", 0x0000, 0x0800, CRC(c140a1bb) SHA1(82c5871af7171408cccb93b4905312856f16a607) ) + ROM_LOAD16_BYTE( "ctsc926_le_deac.p7", 0x0001, 0x0800, CRC(8a074f6c) SHA1(e6be9897b4e8b94a9a75ab03c39637f499811d3a) ) + ROM_LOAD16_BYTE( "ctsc926_u0_48e7.u7", 0x1000, 0x0800, CRC(ed136f11) SHA1(75965b79a7e5466fb80b61d3dd024907a9a0248a) ) + ROM_LOAD16_BYTE( "ctsc926_l0_f707.r7", 0x1001, 0x0800, CRC(1930b1fb) SHA1(8f8370f62536ab7529ad74e51698973ee61b97e2) ) + + CCPU_PROMS +ROM_END + ROM_START( starcasp ) ROM_REGION( 0x2000, "maincpu", 0 ) ROM_LOAD16_BYTE( "starcasp.t7", 0x0000, 0x0800, CRC(d2c551a2) SHA1(90b5e1c6988839b812028f1baaea16420c011c08) ) @@ -1506,6 +1551,7 @@ GAMEL( 1980, armorar, armora, armora, armora, cinemat_state, empt GAME( 1980, ripoff, 0, ripoff, ripoff, cinemat_state, empty_init, ORIENTATION_FLIP_Y, "Cinematronics", "Rip Off", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAMEL( 1980, starcas, 0, starcas, starcas, cinemat_state, empty_init, ORIENTATION_FLIP_Y, "Cinematronics", "Star Castle (version 3)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_starcas ) GAMEL( 1980, starcas1, starcas, starcas, starcas, cinemat_state, empty_init, ORIENTATION_FLIP_Y, "Cinematronics", "Star Castle (older)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_starcas ) +GAMEL( 1980, starcasc, starcas, starcas, starcasc, cinemat_state, empty_init, ORIENTATION_FLIP_Y, "Cinematronics", "Star Castle (cocktail)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_starcas ) GAMEL( 1980, starcasp, starcas, starcas, starcas, cinemat_state, empty_init, ORIENTATION_FLIP_Y, "Cinematronics", "Star Castle (prototype)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_starcas ) GAMEL( 1980, starcase, starcas, starcas, starcas, cinemat_state, empty_init, ORIENTATION_FLIP_Y, "Cinematronics (Mottoeis license)", "Star Castle (Mottoeis)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_starcas ) GAMEL( 1980, stellcas, starcas, starcas, starcas, cinemat_state, empty_init, ORIENTATION_FLIP_Y, "bootleg (Elettronolo)", "Stellar Castle (Elettronolo)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_starcas ) diff --git a/src/mame/drivers/cischeat.cpp b/src/mame/drivers/cischeat.cpp index 6586557d435..3f5a98cc7c5 100644 --- a/src/mame/drivers/cischeat.cpp +++ b/src/mame/drivers/cischeat.cpp @@ -3496,6 +3496,51 @@ Notes: ROM_START( armchmp2 ) ROM_REGION( 0x080000, "maincpu", 0 ) /* Main CPU Code */ + ROM_LOAD16_BYTE( "4_ver_2.7.ic63", 0x000000, 0x020000, CRC(e0cec032) SHA1(743b022b6de3efb045c4f1cca49caed0259ccfff) ) // same rom contents as ver 2.6, it appears to be correct; + ROM_LOAD16_BYTE( "3_ver_2.7.ic62", 0x000001, 0x020000, CRC(44186a37) SHA1(d21fbba11e9c82f48de2a699011ca7f3b90061ba) ) // modifications are in data area, where upper bytes are 00 + + ROM_REGION( 0x080000, "scroll0", 0 ) /* Scroll 0 */ + ROM_LOAD( "mr91042-07-r66_6.ic95", 0x000000, 0x080000, CRC(d1be8699) SHA1(67563761f95892b08c7113ab1c52ab5aa7118fb8) ) + +// ROM_REGION( 0x080000, "scroll1", 0 ) /* Scroll 1 */ +// UNUSED + + ROM_REGION( 0x020000, "scroll2", 0 ) /* Scroll 2 */ + ROM_LOAD( "ac91106_ver1.2_7.ic99", 0x000000, 0x020000, CRC(09755aef) SHA1(39c901fb9408a0ba488f0112d7f48b929b092e3b) ) + + ROM_REGION( 0x300000, "sprites", 0 ) /* Sprites */ + ROM_LOAD16_BYTE( "mr91042-01-r60_1.ic1", 0x000000, 0x080000, CRC(fdfe6951) SHA1(ba6c5cd5d16fdca6f131302b19e621f8abe8136a) ) + ROM_LOAD16_BYTE( "mr91042-02-r61_2.ic2", 0x000001, 0x080000, CRC(2e6c8b30) SHA1(70503fec251606b37fea2c7f91e682aece252035) ) + ROM_LOAD16_BYTE( "mr91042-03-r62_3.ic5", 0x100000, 0x080000, CRC(07ba6d3a) SHA1(9c58e3a1931b593448c53a59e7f5b9aaac40ff88) ) + ROM_LOAD16_BYTE( "mr91042-04-r63_4.ic6", 0x100001, 0x080000, CRC(f37cb12c) SHA1(282ebbd795284d7efa335b797ca1eedc1110e9da) ) + ROM_LOAD16_BYTE( "mr91042-05-r64_5.ic11", 0x200000, 0x080000, CRC(7a3bb52d) SHA1(7f9d1dad4c89e6b55415b082363bc261115e9f96) ) + ROM_LOAD16_BYTE( "mr91042-06-r65_6.ic12", 0x200001, 0x080000, CRC(5312a4f2) SHA1(4dcd2839bb5acccecf1eb6c0e19e877a0cff6875) ) + + ROM_REGION( 0x100000, "oki1", 0 ) /* Samples (4x40000) */ + ROM_LOAD( "mr91042-08_2.ic57", 0x000000, 0x080000, CRC(dc015f6c) SHA1(9d0677c50a25be1d11d43e54dbf3005f18b79b66) ) + ROM_RELOAD( 0x080000, 0x080000 ) + + ROM_REGION( 0x100000, "oki2", 0 ) /* Samples (4x40000) */ + ROM_LOAD( "ac-91106v2.0_1.ic56", 0x000000, 0x080000, CRC(0ff5cbcf) SHA1(25ef8d67749ca78afc4c13a31b3f7a87284947c1) ) + ROM_RELOAD( 0x080000, 0x080000 ) + + ROM_REGION( 0x80000, "user2", 0 ) /* ? Unused ROMs ? */ + ROM_LOAD( "ch9072-4_13.ic39", 0x000000, 0x002000, CRC(b45b4dc0) SHA1(b9fae0c9ac2d40f0a202c538d866d5f2941ba8dd) ) + ROM_LOAD( "ch9072-5_11.ic33", 0x000000, 0x002000, CRC(e122916b) SHA1(86d5ecc7ecc6f175ecb28459697ef33e1ee06860) ) + ROM_LOAD( "ch9072-6_12.ic35", 0x000000, 0x002000, CRC(05d95bf7) SHA1(78181cf71f22c090a1e62823a43757353a9ef6ab) ) + ROM_LOAD( "ch9072-8_15.ic59", 0x000000, 0x002000, CRC(6bf52596) SHA1(bf4e7e7df3daae4aa6a441b58b15a435aa45630e) ) + + ROM_LOAD( "mr90015-35-w33_17.ic67", 0x000000, 0x080000, CRC(9d428fb7) SHA1(02f72938d73db932bd217620a175a05215f6016a) ) + ROM_LOAD( "mr90015-35-w33_14.ic54", 0x000000, 0x080000, CRC(9d428fb7) SHA1(02f72938d73db932bd217620a175a05215f6016a) ) + + ROM_LOAD( "pr88004q_8.ic102", 0x000000, 0x000200, CRC(9327dc37) SHA1(cfe7b144cdcd76170d47f1c4e0f72b6d4fca0c8d) ) + ROM_LOAD( "pr88004w_16.ic66", 0x000000, 0x000100, CRC(3d648467) SHA1(bf8dbaa2176c801f7370313425c87f0eefe8a3a4) ) + + ROM_LOAD( "pr91042_5.ic91", 0x000000, 0x000100, CRC(e71de4aa) SHA1(d06e5a35ad2127df2d6328cce153073380ee7819) ) +ROM_END + +ROM_START( armchmp2o2 ) + ROM_REGION( 0x080000, "maincpu", 0 ) /* Main CPU Code */ ROM_LOAD16_BYTE( "ac-91106v2.6_4.ic63", 0x000000, 0x020000, CRC(e0cec032) SHA1(743b022b6de3efb045c4f1cca49caed0259ccfff) ) ROM_LOAD16_BYTE( "ac-91106v2.6_3.ic62", 0x000001, 0x020000, CRC(5de6da19) SHA1(1f46056596924789394ad2d99ec2d7fcb7845d3c) ) @@ -3654,12 +3699,13 @@ void cischeat_state::init_captflag() ***************************************************************************/ -GAMEL( 1989, bigrun, 0, bigrun, bigrun, cischeat_state, init_bigrun, ROT0, "Jaleco", "Big Run (11th Rallye version)", MACHINE_NODEVICE_LAN, layout_cischeat ) // there's a 13th Rallye version (1991) (only on the SNES? Could just be updated title, 1989 -> 11th Paris-Dakar ...) +GAMEL( 1989, bigrun, 0, bigrun, bigrun, cischeat_state, init_bigrun, ROT0, "Jaleco", "Big Run (11th Rallye version)", MACHINE_NODEVICE_LAN, layout_cischeat ) // there's a 13th Rallye version (1991) (only on the SNES? Could just be updated title, 1989 -> 11th Paris-Dakar ...) GAMEL( 1990, cischeat, 0, cischeat, cischeat, cischeat_state, init_cischeat, ROT0, "Jaleco", "Cisco Heat", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN, layout_cischeat ) -GAMEL( 1991, f1gpstar, 0, f1gpstar, f1gpstar, cischeat_state, init_f1gpstar, ROT0, "Jaleco", "Grand Prix Star (v3.0)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN, layout_f1gpstar ) -GAMEL( 1991, f1gpstaro, f1gpstar, f1gpstar, f1gpstar, cischeat_state, init_f1gpstar, ROT0, "Jaleco", "Grand Prix Star (v2.0)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN, layout_f1gpstar ) -GAME( 1992, armchmp2, 0, armchmp2, armchmp2, cischeat_state, empty_init, ROT270, "Jaleco", "Arm Champs II v2.6", MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1992, armchmp2o, armchmp2, armchmp2, armchmp2, cischeat_state, empty_init, ROT270, "Jaleco", "Arm Champs II v1.7", MACHINE_IMPERFECT_GRAPHICS ) +GAMEL( 1991, f1gpstar, 0, f1gpstar, f1gpstar, cischeat_state, init_f1gpstar, ROT0, "Jaleco", "Grand Prix Star (ver 3.0)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN, layout_f1gpstar ) +GAMEL( 1991, f1gpstaro, f1gpstar, f1gpstar, f1gpstar, cischeat_state, init_f1gpstar, ROT0, "Jaleco", "Grand Prix Star (ver 2.0)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN, layout_f1gpstar ) +GAME( 1992, armchmp2, 0, armchmp2, armchmp2, cischeat_state, empty_init, ROT270, "Jaleco", "Arm Champs II (ver 2.7)", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1992, armchmp2o2,armchmp2, armchmp2, armchmp2, cischeat_state, empty_init, ROT270, "Jaleco", "Arm Champs II (ver 2.6)", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1992, armchmp2o, armchmp2, armchmp2, armchmp2, cischeat_state, empty_init, ROT270, "Jaleco", "Arm Champs II (ver 1.7)", MACHINE_IMPERFECT_GRAPHICS ) GAME( 1992, wildplt, 0, wildplt, wildplt, wildplt_state, init_f1gpstar, ROT0, "Jaleco", "Wild Pilot", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) // busted timings GAMEL( 1993, f1gpstr2, 0, f1gpstr2, f1gpstr2, cischeat_state, init_f1gpstar, ROT0, "Jaleco", "F-1 Grand Prix Star II", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN, layout_f1gpstar ) GAME( 1993, captflag, 0, captflag, captflag, cischeat_state, init_captflag, ROT270, "Jaleco", "Captain Flag (Japan)", MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/drivers/cit101.cpp b/src/mame/drivers/cit101.cpp index 62848c4adbd..0f450b1276b 100644 --- a/src/mame/drivers/cit101.cpp +++ b/src/mame/drivers/cit101.cpp @@ -306,12 +306,9 @@ void cit101_state::mem_map(address_map &map) map(0x8000, 0xbfff).ram().share("extraram"); // only 4 bits wide? map(0x8000, 0x8000).w(FUNC(cit101_state::screen_control_w)); map(0xc000, 0xdfff).rw(FUNC(cit101_state::c000_ram_r), FUNC(cit101_state::c000_ram_w)); - map(0xfc00, 0xfc00).rw("auxuart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xfc01, 0xfc01).rw("auxuart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xfc20, 0xfc20).rw("comuart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xfc21, 0xfc21).rw("comuart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xfc40, 0xfc40).rw("kbduart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xfc41, 0xfc41).rw("kbduart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xfc00, 0xfc01).rw("auxuart", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0xfc20, 0xfc21).rw("comuart", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0xfc40, 0xfc41).rw("kbduart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xfc60, 0xfc63).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0xfc80, 0xfc83).w("pit0", FUNC(pit8253_device::write)); map(0xfcc0, 0xfcc3).w("pit1", FUNC(pit8253_device::write)); @@ -319,12 +316,9 @@ void cit101_state::mem_map(address_map &map) void cit101_state::io_map(address_map &map) { - map(0x00, 0x00).rw("auxuart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x01, 0x01).rw("auxuart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x20, 0x20).rw("comuart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x21, 0x21).rw("comuart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x40, 0x40).rw("kbduart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x41, 0x41).rw("kbduart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x00, 0x01).rw("auxuart", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x20, 0x21).rw("comuart", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x40, 0x41).rw("kbduart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x60, 0x63).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0xa0, 0xa0).w(FUNC(cit101_state::brightness_w)); map(0xe0, 0xe0).rw(FUNC(cit101_state::e0_latch_r), FUNC(cit101_state::e0_latch_w)); diff --git a/src/mame/drivers/cit220.cpp b/src/mame/drivers/cit220.cpp index 851c8fd4309..17ce79680d7 100644 --- a/src/mame/drivers/cit220.cpp +++ b/src/mame/drivers/cit220.cpp @@ -70,8 +70,7 @@ void cit220_state::mem_map(address_map &map) void cit220_state::io_map(address_map &map) { map(0x00, 0x0f).rw("duart", FUNC(scn2681_device::read), FUNC(scn2681_device::write)); - map(0x10, 0x10).rw("usart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x11, 0x11).rw("usart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x10, 0x11).rw("usart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x20, 0x27).rw("avdc", FUNC(scn2674_device::read), FUNC(scn2674_device::write)); map(0xa0, 0xa0).rw("avdc", FUNC(scn2674_device::attr_buffer_r), FUNC(scn2674_device::attr_buffer_w)); map(0xc0, 0xc0).rw("avdc", FUNC(scn2674_device::buffer_r), FUNC(scn2674_device::buffer_w)); diff --git a/src/mame/drivers/clpoker.cpp b/src/mame/drivers/clpoker.cpp index d06d490b615..eaedb21383f 100644 --- a/src/mame/drivers/clpoker.cpp +++ b/src/mame/drivers/clpoker.cpp @@ -283,7 +283,8 @@ MACHINE_CONFIG_START(clpoker_state::clpoker) MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, clpoker_state, vblank_w)) MCFG_PALETTE_ADD("palette", 0x100) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") // HM86171 + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, "palette")); // HM86171 + ramdac.set_addrmap(0, &clpoker_state::ramdac_map); MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_clpoker) diff --git a/src/mame/drivers/coco12.cpp b/src/mame/drivers/coco12.cpp index 9e0b7212698..f727080da08 100644 --- a/src/mame/drivers/coco12.cpp +++ b/src/mame/drivers/coco12.cpp @@ -191,7 +191,7 @@ static INPUT_PORTS_START( coco_keyboard ) PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_NAME("UP") PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP), '^') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_NAME("UP") PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_NAME("DOWN") PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN), 10) PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_NAME("LEFT") PORT_CODE(KEYCODE_LEFT) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(UCHAR_MAMEKEY(LEFT), 8) PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_NAME("RIGHT") PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT), 9) @@ -199,27 +199,27 @@ static INPUT_PORTS_START( coco_keyboard ) PORT_START("row4") PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_0) PORT_CHAR('0') - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') PORT_CHAR('|') PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('\"') - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') PORT_CHAR('~') PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') PORT_CHAR('^') PORT_START("row5") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') PORT_CHAR('[') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') PORT_CHAR(']') PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_MINUS) PORT_CHAR(':') PORT_CHAR('*') PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+') - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('-') PORT_CHAR('=') - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') PORT_CHAR('{') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('-') PORT_CHAR('=') PORT_CHAR('_') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') PORT_CHAR('}') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') PORT_CHAR('\\') PORT_START("row6") PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_NAME("ENTER") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_NAME("CLEAR") PORT_CODE(KEYCODE_HOME) PORT_CHAR(12) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_NAME("CLEAR") PORT_CODE(KEYCODE_HOME) PORT_CHAR(12, UCHAR_SHIFT_2) PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_NAME("BREAK") PORT_CODE(KEYCODE_END) PORT_CODE(KEYCODE_ESC) PORT_CHAR(27) PORT_BIT(0x78, IP_ACTIVE_LOW, IPT_UNUSED) PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco12_state, coco_state::keyboard_changed, nullptr) PORT_NAME("SHIFT") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1) diff --git a/src/mame/drivers/coco3.cpp b/src/mame/drivers/coco3.cpp index c27967c358c..1f76dd9be0f 100644 --- a/src/mame/drivers/coco3.cpp +++ b/src/mame/drivers/coco3.cpp @@ -122,7 +122,7 @@ static INPUT_PORTS_START( coco3_keyboard ) PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') PORT_CHAR('|') PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('\"') - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') PORT_CHAR('~') PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') diff --git a/src/mame/drivers/coinmvga.cpp b/src/mame/drivers/coinmvga.cpp index c74de251f78..dc340e2f41b 100644 --- a/src/mame/drivers/coinmvga.cpp +++ b/src/mame/drivers/coinmvga.cpp @@ -659,10 +659,12 @@ MACHINE_CONFIG_START(coinmvga_state::coinmvga) MCFG_DEVICE_ADD("gfxdecode2", GFXDECODE, "palette2", gfx_coinmvga2) MCFG_PALETTE_ADD("palette", 256) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &coinmvga_state::ramdac_map); MCFG_PALETTE_ADD("palette2", 16) - MCFG_RAMDAC_ADD("ramdac2", ramdac2_map, "palette2") + ramdac_device &ramdac2(RAMDAC(config, "ramdac2", 0, m_palette2)); + ramdac2.set_addrmap(0, &coinmvga_state::ramdac2_map); /* sound hardware */ SPEAKER(config, "lspeaker").front_left(); diff --git a/src/mame/drivers/combatsc.cpp b/src/mame/drivers/combatsc.cpp index 4a32f1b3f69..28712bec092 100644 --- a/src/mame/drivers/combatsc.cpp +++ b/src/mame/drivers/combatsc.cpp @@ -663,6 +663,10 @@ MACHINE_START_MEMBER(combatsc_state,combatsc) save_item(NAME(m_prot)); save_item(NAME(m_pos)); save_item(NAME(m_sign)); + save_pointer(NAME(m_page[0]),0x2000); + save_pointer(NAME(m_page[1]),0x2000); + save_pointer(NAME(m_scrollram0), 0x40); + save_pointer(NAME(m_scrollram1), 0x40); } MACHINE_START_MEMBER(combatsc_state,combatscb) diff --git a/src/mame/drivers/compis.cpp b/src/mame/drivers/compis.cpp index ce70b1e4a79..a7ad6f25013 100644 --- a/src/mame/drivers/compis.cpp +++ b/src/mame/drivers/compis.cpp @@ -203,14 +203,7 @@ READ16_MEMBER( compis_state::pcs6_2_3_r ) } else { - if (BIT(offset, 0)) - { - return m_uart->status_r(space, 0) << 8; - } - else - { - return m_uart->data_r(space, 0) << 8; - } + return m_uart->read(offset & 1) << 8; } } @@ -221,14 +214,7 @@ WRITE16_MEMBER( compis_state::pcs6_2_3_w ) } else { - if (BIT(offset, 0)) - { - m_uart->control_w(space, 0, data >> 8); - } - else - { - m_uart->data_w(space, 0, data >> 8); - } + m_uart->write(offset & 1, data >> 8); } } diff --git a/src/mame/drivers/comquest.cpp b/src/mame/drivers/comquest.cpp index 35af6fbf93b..ba4d2f88789 100644 --- a/src/mame/drivers/comquest.cpp +++ b/src/mame/drivers/comquest.cpp @@ -39,7 +39,7 @@ team concepts icq3250a-d 1f71lctctab973 - */ +*/ #include "emu.h" #include "includes/comquest.h" @@ -249,7 +249,7 @@ MACHINE_CONFIG_START(comquest_state::comquest) /* video hardware */ MCFG_SCREEN_ADD("screen", LCD) - MCFG_SCREEN_REFRESH_RATE(LCD_FRAMES_PER_SECOND) + MCFG_SCREEN_REFRESH_RATE(30) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ MCFG_SCREEN_SIZE(64*4, 128) /* 160 x 102 */ MCFG_SCREEN_VISIBLE_AREA(0, 64*4-1, 0, 128-1) diff --git a/src/mame/drivers/contra.cpp b/src/mame/drivers/contra.cpp index 3af801f7f68..797c7ded4c1 100644 --- a/src/mame/drivers/contra.cpp +++ b/src/mame/drivers/contra.cpp @@ -86,11 +86,11 @@ void contra_state::contra_map(address_map &map) map(0x2400, 0x27ff).w(FUNC(contra_state::contra_fg_vram_w)).share("fg_vram"); map(0x2800, 0x2bff).w(FUNC(contra_state::contra_text_cram_w)).share("tx_cram"); map(0x2c00, 0x2fff).w(FUNC(contra_state::contra_text_vram_w)).share("tx_vram"); - map(0x3000, 0x37ff).writeonly().share("spriteram");/* 2nd bank is at 0x5000 */ - map(0x3800, 0x3fff).writeonly(); // second sprite buffer + map(0x3000, 0x3fff).ram().share("spriteram"); map(0x4000, 0x43ff).w(FUNC(contra_state::contra_bg_cram_w)).share("bg_cram"); map(0x4400, 0x47ff).w(FUNC(contra_state::contra_bg_vram_w)).share("bg_vram"); - map(0x4800, 0x5fff).writeonly(); + map(0x4800, 0x4fff).ram(); + map(0x5000, 0x5fff).ram().share("spriteram_2"); map(0x6000, 0x7fff).bankr("bank1"); map(0x7000, 0x7000).w(FUNC(contra_state::contra_bankswitch_w)); diff --git a/src/mame/drivers/coolpool.cpp b/src/mame/drivers/coolpool.cpp index 6167a3d461a..c9c7e9bccb6 100644 --- a/src/mame/drivers/coolpool.cpp +++ b/src/mame/drivers/coolpool.cpp @@ -17,6 +17,8 @@ The second CPU in Cool Pool and 9 Ball Shootout is a TMS320C26; the code is the same in the two games. + The audio DAC is a Micro Power Systems MP1210HN. + Cool Pool: - The checksum test routine is wrong, e.g. when it says to be testing 4U/8U it is actually reading 4U/8U/3U/7U, when testing 3U/7U it @@ -746,7 +748,7 @@ MACHINE_CONFIG_START(coolpool_state::amerdart) /* sound hardware */ SPEAKER(config, "speaker").front_center(); - MCFG_DEVICE_ADD("dac", DAC_12BIT_R2R_TWOS_COMPLEMENT, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.0) // unknown DAC + MCFG_DEVICE_ADD("dac", MP1210, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.0) MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0) MCFG_SOUND_ROUTE(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac", -1.0, DAC_VREF_NEG_INPUT) MACHINE_CONFIG_END @@ -793,7 +795,7 @@ MACHINE_CONFIG_START(coolpool_state::coolpool) /* sound hardware */ SPEAKER(config, "speaker").front_center(); - MCFG_DEVICE_ADD("dac", DAC_12BIT_R2R_TWOS_COMPLEMENT, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.0) // unknown DAC + MCFG_DEVICE_ADD("dac", MP1210, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.0) MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0) MCFG_SOUND_ROUTE(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac", -1.0, DAC_VREF_NEG_INPUT) MACHINE_CONFIG_END diff --git a/src/mame/drivers/cosmic.cpp b/src/mame/drivers/cosmic.cpp index 2f4d164f65b..f9bce981824 100644 --- a/src/mame/drivers/cosmic.cpp +++ b/src/mame/drivers/cosmic.cpp @@ -1092,15 +1092,10 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(cosmic_state::cosmicg) /* basic machine hardware */ - TMS9980A(config, m_maincpu, COSMICG_MASTER_CLOCK/8); + TMS9980A(config, m_maincpu, COSMICG_MASTER_CLOCK); // 9.828 MHz Crystal m_maincpu->set_addrmap(AS_PROGRAM, &cosmic_state::cosmicg_map); m_maincpu->set_addrmap(AS_IO, &cosmic_state::cosmicg_io_map); - /* 9.828 MHz Crystal */ - /* R Nabet : huh ? This would imply the crystal frequency is somehow divided by 2 before being - fed to the tms9904 or tms9980. Also, I have never heard of a tms9900/9980 operating under - 1.5MHz. So, if someone can check this... */ - MCFG_MACHINE_START_OVERRIDE(cosmic_state,cosmic) MCFG_MACHINE_RESET_OVERRIDE(cosmic_state,cosmicg) diff --git a/src/mame/drivers/cps1.cpp b/src/mame/drivers/cps1.cpp index 1da56494129..a104c6fd590 100644 --- a/src/mame/drivers/cps1.cpp +++ b/src/mame/drivers/cps1.cpp @@ -3427,9 +3427,9 @@ MACHINE_CONFIG_START(cps_state::forgottn) MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_PROGRAM_MAP(forgottn_map) - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) - MCFG_UPD4701_PORTX("DIAL0") - MCFG_UPD4701_PORTY("DIAL1") + upd4701_device &upd4701(UPD4701A(config, "upd4701")); + upd4701.set_portx_tag("DIAL0"); + upd4701.set_porty_tag("DIAL1"); MACHINE_CONFIG_END MACHINE_CONFIG_START(cps_state::cps1_12MHz) @@ -5874,6 +5874,29 @@ ROM_START( mtwins ) ROM_LOAD( "iob1.11e", 0x0000, 0x0117, CRC(3abc0700) SHA1(973043aa46ec6d5d1db20dc9d5937005a0f9f6ae) ) ROM_END +ROM_START( mtwinsb ) // board marked MGT-026 + ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */ + ROM_LOAD16_BYTE( "1-prg-27c4001.bin", 0x00001, 0x80000, CRC(8938a029) SHA1(50104d2afaec8d69d317780c071a4f2248e23e62) ) + ROM_LOAD16_BYTE( "2-prg-27c4001.bin", 0x00000, 0x80000, CRC(7d5b8a97) SHA1(d3e456061a569765d400fc7c9b43e4fdacf17951) ) + + ROM_REGION( 0x200000, "gfx", 0 ) // identical to the original, but differently arranged + ROMX_LOAD( "g4.bin", 0x000004, 0x40000, CRC(11493e55) SHA1(0e45f53b034d66ce8d029346d4d88e46021df1a7), ROM_SKIP(7) ) + ROM_CONTINUE( 0x000000, 0x40000) + ROMX_LOAD( "g3.bin", 0x000005, 0x40000, CRC(feda0f8b) SHA1(59c740478791ce95bf06feeda5173cc283a1eaea), ROM_SKIP(7) ) + ROM_CONTINUE( 0x000001, 0x40000) + ROMX_LOAD( "g2.bin", 0x000006, 0x40000, CRC(745f0eba) SHA1(1cb07be5df7cc43b5aa236f114d303bf92436c74), ROM_SKIP(7) ) + ROM_CONTINUE( 0x000002, 0x40000) + ROMX_LOAD( "g1.bin", 0x000007, 0x40000, CRC(8069026f) SHA1(3d5e9b36a349328bcd93d83d8d2fe3cd40e68a3b), ROM_SKIP(7) ) + ROM_CONTINUE( 0x000003, 0x40000) + + ROM_REGION( 0x18000, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "4-snd-z80-27c512.bin", 0x00000, 0x08000, CRC(4d4255b7) SHA1(81a76b58043af7252a854b7efc4109957ef0e679) ) // identical to the original + ROM_CONTINUE( 0x10000, 0x08000 ) + + ROM_REGION( 0x40000, "oki", 0 ) /* Samples */ + ROM_LOAD( "3-snd-27c208.bin", 0x00000, 0x40000, CRC(a0c3de92) SHA1(5135cd982564f898f799ff1bc2bb2a75154be0cd) ) // identical to the original, but one single bigger ROM +ROM_END + /* B-Board 89625B-1 */ ROM_START( chikij ) ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */ @@ -13082,6 +13105,7 @@ GAME( 1990, mercsur1, mercs, cps1_10MHz, mercs, cps_state, init_cps1, GAME( 1990, mercsj, mercs, cps1_10MHz, mercs, cps_state, init_cps1, ROT270, "Capcom", "Senjou no Ookami II (Japan 900302)", MACHINE_SUPPORTS_SAVE ) GAME( 1990, mtwins, 0, cps1_10MHz, mtwins, cps_state, init_cps1, ROT0, "Capcom", "Mega Twins (World 900619)", MACHINE_SUPPORTS_SAVE ) // "ETC" - (c) Capcom U.S.A. but World "warning" GAME( 1990, chikij, mtwins, cps1_10MHz, mtwins, cps_state, init_cps1, ROT0, "Capcom", "Chiki Chiki Boys (Japan 900619)", MACHINE_SUPPORTS_SAVE ) +GAME( 1993, mtwinsb, mtwins, cps1_10MHz, mtwins, cps_state, init_cps1, ROT0, "Capcom", "Mega Twins (bootleg)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // severe GFX problems due to different bootleg hardware GAME( 1990, msword, 0, cps1_10MHz, msword, cps_state, init_cps1, ROT0, "Capcom", "Magic Sword: Heroic Fantasy (World 900725)", MACHINE_SUPPORTS_SAVE ) // 25.07.1990 "OTHER COUNTRY" GAME( 1990, mswordr1, msword, cps1_10MHz, msword, cps_state, init_cps1, ROT0, "Capcom", "Magic Sword: Heroic Fantasy (World 900623)", MACHINE_SUPPORTS_SAVE ) // 23.06.1990 "OTHER COUNTRY" GAME( 1990, mswordu, msword, cps1_10MHz, msword, cps_state, init_cps1, ROT0, "Capcom", "Magic Sword: Heroic Fantasy (USA 900725)", MACHINE_SUPPORTS_SAVE ) // 25.07.1990 "U.S.A." diff --git a/src/mame/drivers/cps3.cpp b/src/mame/drivers/cps3.cpp index 8cd672a6c4f..fb7118533be 100644 --- a/src/mame/drivers/cps3.cpp +++ b/src/mame/drivers/cps3.cpp @@ -859,13 +859,11 @@ static const gfx_layout cps3_tiles8x8_layout = void cps3_state::cps3_set_mame_colours(int colournum, uint16_t data, uint32_t fadeval) { - int r,g,b; uint16_t* dst = (uint16_t*)m_colourram.target(); - - r = (data >> 0) & 0x1f; - g = (data >> 5) & 0x1f; - b = (data >> 10) & 0x1f; + int r = (data >> 0) & 0x1f; + int g = (data >> 5) & 0x1f; + int b = (data >> 10) & 0x1f; /* is this 100% correct? */ if (fadeval!=0) @@ -929,137 +927,162 @@ void cps3_state::video_start() m_renderbuffer_clip.set(0, m_screenwidth-1, 0, 224-1); m_renderbuffer_bitmap.fill(0x3f, m_renderbuffer_clip); - } // the 0x400 bit in the tilemap regs is "draw it upside-down" (bios tilemap during flashing, otherwise capcom logo is flipped) -void cps3_state::cps3_draw_tilemapsprite_line(int tmnum, int drawline, bitmap_rgb32 &bitmap, const rectangle &cliprect ) +void cps3_state::cps3_draw_tilemapsprite_line(int tmnum, int drawline, bitmap_rgb32 &bitmap, const rectangle &cliprect) { uint32_t* tmapregs[4] = { m_tilemap20_regs_base, m_tilemap30_regs_base, m_tilemap40_regs_base, m_tilemap50_regs_base }; - uint32_t* regs; - int line; - int scrolly; - if (tmnum>3) + if (tmnum > 3) { - printf("cps3_draw_tilemapsprite_line Illegal tilemap number %d\n",tmnum); + printf("cps3_draw_tilemapsprite_line Illegal tilemap number %d\n", tmnum); return; } - regs = tmapregs[tmnum]; + uint32_t* regs = tmapregs[tmnum]; + + int scrolly = ((regs[0] & 0x0000ffff) >> 0) + 4; + int line = drawline + scrolly; + line &= 0x3ff; - scrolly = ((regs[0]&0x0000ffff)>>0)+4; - line = drawline+scrolly; - line&=0x3ff; + if (!(regs[1] & 0x00008000)) return; + uint32_t mapbase = (regs[2] & 0x007f0000) >> 16; + uint32_t linebase = (regs[2] & 0x7f000000) >> 24; + int linescroll_enable = (regs[1] & 0x00004000); - if (!(regs[1]&0x00008000)) return; + int scrollx; + int x; + int tileline = (line / 16) + 1; + int tilesubline = line % 16; + rectangle clip; + mapbase = mapbase << 10; + linebase = linebase << 10; + + if (!linescroll_enable) + { + scrollx = (regs[0] & 0xffff0000) >> 16; + } + else { - uint32_t mapbase = (regs[2]&0x007f0000)>>16; - uint32_t linebase= (regs[2]&0x7f000000)>>24; - int linescroll_enable = (regs[1]&0x00004000); + //printf("linebase %08x\n", linebase); - int scrollx; - int x; - int tileline = (line/16)+1; - int tilesubline = line % 16; - rectangle clip; + scrollx = (regs[0] & 0xffff0000) >> 16; + scrollx += (m_spriteram[linebase + ((line + 16 - 4) & 0x3ff)] >> 16) & 0x3ff; - mapbase = mapbase << 10; - linebase = linebase << 10; + } - if (!linescroll_enable) - { - scrollx = (regs[0]&0xffff0000)>>16; - } - else - { - // printf("linebase %08x\n", linebase); + //zoombase = (layerregs[1]&0xffff0000)>>16; - scrollx = (regs[0]&0xffff0000)>>16; - scrollx+= (m_spriteram[linebase+((line+16-4)&0x3ff)]>>16)&0x3ff; + drawline &= 0x3ff; - } + if (drawline > cliprect.bottom() + 4) return; + + clip.set(cliprect.left(), cliprect.right(), drawline, drawline); + + for (x = 0; x < (cliprect.right() / 16) + 2; x++) + { + uint32_t dat; + int tileno; + int colour; + int bpp; + int xflip, yflip; + + dat = m_spriteram[mapbase + ((tileline & 63) * 64) + ((x + scrollx / 16) & 63)]; + tileno = (dat & 0xffff0000) >> 17; + colour = (dat & 0x000001ff) >> 0; + bpp = (dat & 0x0000200) >> 9; + yflip = (dat & 0x00000800) >> 11; + xflip = (dat & 0x00001000) >> 12; -// zoombase = (layerregs[1]&0xffff0000)>>16; + if (!bpp) m_gfxdecode->gfx(1)->set_granularity(256); + else m_gfxdecode->gfx(1)->set_granularity(64); - drawline&=0x3ff; + cps3_drawgfxzoom(bitmap, clip, m_gfxdecode->gfx(1), tileno, colour, xflip, yflip, (x * 16) - scrollx % 16, drawline - tilesubline, CPS3_TRANSPARENCY_PEN_INDEX, 0, 0x10000, 0x10000, nullptr, 0); + } +} + +// fg layer (TODO: this could be handled with an actual tilemap) +void cps3_state::draw_fg_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + // bank select? (sfiii2 intro) (could also be a scroll bit if the tilemap is just double height) + int bank = 0x800; + if (m_ss_bank_base & 0x01000000) bank = 0x000; + + for (int line = cliprect.top(); line <= cliprect.bottom(); line++) + { + rectangle clip = cliprect; + clip.min_y = clip.max_y = line; - if (drawline>cliprect.bottom()+4) return; + int y = line / 8; + int count = (y * 64) + bank; - clip.set(cliprect.left(), cliprect.right(), drawline, drawline); + // 'combo meter' in JoJo games uses rowscroll + int rowscroll = m_ss_ram[((line - 1) & 0x1ff) + 0x4000 / 4] >> 16; - for (x=0;x<(cliprect.right()/16)+2;x++) + for (int x = 0; x < 64; x++) { - uint32_t dat; - int tileno; - int colour; - int bpp; - int xflip,yflip; - - dat = m_spriteram[mapbase+((tileline&63)*64)+((x+scrollx/16)&63)]; - tileno = (dat & 0xffff0000)>>17; - colour = (dat & 0x000001ff)>>0; - bpp = (dat & 0x0000200)>>9; - yflip = (dat & 0x00000800)>>11; - xflip = (dat & 0x00001000)>>12; - - if (!bpp) m_gfxdecode->gfx(1)->set_granularity(256); - else m_gfxdecode->gfx(1)->set_granularity(64); - - cps3_drawgfxzoom(bitmap,clip,m_gfxdecode->gfx(1),tileno,colour,xflip,yflip,(x*16)-scrollx%16,drawline-tilesubline,CPS3_TRANSPARENCY_PEN_INDEX,0, 0x10000, 0x10000, nullptr, 0); + uint32_t data = m_ss_ram[count]; // +0x800 = 2nd bank, used on sfiii2 intro.. + uint32_t tile = (data >> 16) & 0x1ff; + int pal = (data & 0x003f) >> 1; + int flipx = (data & 0x0080) >> 7; + int flipy = (data & 0x0040) >> 6; + pal += m_ss_pal_base << 5; + tile += 0x200; + + cps3_drawgfxzoom(bitmap, clip, m_gfxdecode->gfx(0), tile, pal, flipx, flipy, (x * 8) - rowscroll, y * 8, CPS3_TRANSPARENCY_PEN, 0, 0x10000, 0x10000, nullptr, 0); + cps3_drawgfxzoom(bitmap, clip, m_gfxdecode->gfx(0), tile, pal, flipx, flipy, 512 + (x * 8) - rowscroll, y * 8, CPS3_TRANSPARENCY_PEN, 0, 0x10000, 0x10000, nullptr, 0); + + count++; } } } uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - int y,x, count; attoseconds_t period = screen.frame_period().attoseconds(); rectangle visarea = screen.visible_area(); int bg_drawn[4] = { 0, 0, 0, 0 }; - uint32_t fullscreenzoomx, fullscreenzoomy; - uint32_t fszx, fszy; - -// decode_ssram(); -// decode_charram(); + // decode_ssram(); + // decode_charram(); /* registers are normally 002a006f 01ef01c6 - widescreen mode = 00230076 026501c6 - only SFIII2 uses widescreen, I don't know exactly which register controls it */ - if (((m_fullscreenzoom[1]&0xffff0000)>>16)==0x0265) + widescreen mode = 00230076 026501c6 + only SFIII2 uses widescreen, I don't know exactly which register controls it */ + if (((m_fullscreenzoom[1] & 0xffff0000) >> 16) == 0x0265) { - if (m_screenwidth!=496) + if (m_screenwidth != 496) { m_screenwidth = 496; - visarea.set(0, 496-1, 0, 224-1); + visarea.set(0, 496 - 1, 0, 224 - 1); screen.configure(496, 224, visarea, period); } } else { - if (m_screenwidth!=384) + if (m_screenwidth != 384) { m_screenwidth = 384; - visarea.set(0, 384-1, 0, 224-1); + visarea.set(0, 384 - 1, 0, 224 - 1); screen.configure(384, 224, visarea, period); } } - fullscreenzoomx = m_fullscreenzoom[3] & 0x000000ff; - fullscreenzoomy = m_fullscreenzoom[3] & 0x000000ff; + uint32_t fullscreenzoomx = m_fullscreenzoom[3] & 0x000000ff; + uint32_t fullscreenzoomy = m_fullscreenzoom[3] & 0x000000ff; /* clamp at 0x80, I don't know if this is accurate */ - if (fullscreenzoomx>0x80) fullscreenzoomx = 0x80; - if (fullscreenzoomy>0x80) fullscreenzoomy = 0x80; + if (fullscreenzoomx > 0x80) fullscreenzoomx = 0x80; + if (fullscreenzoomy > 0x80) fullscreenzoomy = 0x80; - fszx = (fullscreenzoomx<<16)/0x40; - fszy = (fullscreenzoomy<<16)/0x40; + uint32_t fszx = (fullscreenzoomx << 16) / 0x40; + uint32_t fszy = (fullscreenzoomy << 16) / 0x40; m_renderbuffer_clip.set( - 0, ((m_screenwidth*fszx)>>16)-1, - 0, ((224*fszx)>>16)-1); + 0, ((m_screenwidth*fszx) >> 16) - 1, + 0, ((224 * fszx) >> 16) - 1); m_renderbuffer_bitmap.fill(0, m_renderbuffer_clip); @@ -1068,98 +1091,76 @@ uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bit int i; //printf("Spritelist start:\n"); - for (i=0x00000/4;i<0x2000/4;i+=4) + for (i = 0x00000 / 4; i < 0x2000 / 4; i += 4) { - int xpos = (m_spriteram[i+1]&0x03ff0000)>>16; - int ypos = m_spriteram[i+1]&0x000003ff; - int j; - int gscroll = (m_spriteram[i+0]&0x70000000)>>28; - int length = (m_spriteram[i+0]&0x01ff0000)>>16; // how many entries in the sprite table - uint32_t start = (m_spriteram[i+0]&0x00007ff0)>>4; - - int whichbpp = (m_spriteram[i+2]&0x40000000)>>30; // not 100% sure if this is right, jojo title / characters - int whichpal = (m_spriteram[i+2]&0x20000000)>>29; - int global_xflip = (m_spriteram[i+2]&0x10000000)>>28; - int global_yflip = (m_spriteram[i+2]&0x08000000)>>27; - int global_alpha = (m_spriteram[i+2]&0x04000000)>>26; // alpha / shadow? set on sfiii2 shadows, and big black image in jojo intro - int global_bpp = (m_spriteram[i+2]&0x02000000)>>25; - int global_pal = (m_spriteram[i+2]&0x01ff0000)>>16; - - int gscrollx = (m_unk_vidregs[gscroll]&0x03ff0000)>>16; - int gscrolly = (m_unk_vidregs[gscroll]&0x000003ff)>>0; + int xpos = (m_spriteram[i + 1] & 0x03ff0000) >> 16; + int ypos = m_spriteram[i + 1] & 0x000003ff; + int gscroll = (m_spriteram[i + 0] & 0x70000000) >> 28; + int length = (m_spriteram[i + 0] & 0x01ff0000) >> 16; // how many entries in the sprite table + uint32_t start = (m_spriteram[i + 0] & 0x00007ff0) >> 4; + + int whichbpp = (m_spriteram[i + 2] & 0x40000000) >> 30; // not 100% sure if this is right, jojo title / characters + int whichpal = (m_spriteram[i + 2] & 0x20000000) >> 29; + int global_xflip = (m_spriteram[i + 2] & 0x10000000) >> 28; + int global_yflip = (m_spriteram[i + 2] & 0x08000000) >> 27; + int global_alpha = (m_spriteram[i + 2] & 0x04000000) >> 26; // alpha / shadow? set on sfiii2 shadows, and big black image in jojo intro + int global_bpp = (m_spriteram[i + 2] & 0x02000000) >> 25; + int global_pal = (m_spriteram[i + 2] & 0x01ff0000) >> 16; + + int gscrollx = (m_unk_vidregs[gscroll] & 0x03ff0000) >> 16; + int gscrolly = (m_unk_vidregs[gscroll] & 0x000003ff) >> 0; start = (start * 0x100) >> 2; - if ((m_spriteram[i+0]&0xf0000000) == 0x80000000) + if ((m_spriteram[i + 0] & 0xf0000000) == 0x80000000) break; - for (j=0;j<(length)*4;j+=4) + for (int j = 0; j < (length) * 4; j += 4) { - uint32_t value1 = (m_spriteram[start+j+0]); - uint32_t value2 = (m_spriteram[start+j+1]); - uint32_t value3 = (m_spriteram[start+j+2]); - + uint32_t value1 = (m_spriteram[start + j + 0]); + uint32_t value2 = (m_spriteram[start + j + 1]); + uint32_t value3 = (m_spriteram[start + j + 2]); //uint8_t* srcdata = (uint8_t*)m_char_ram; //uint32_t sourceoffset = (value1 >>14)&0x7fffff; - int count; - - uint32_t tileno = (value1&0xfffe0000)>>17; - int xpos2 = (value2 & 0x03ff0000)>>16; - int ypos2 = (value2 & 0x000003ff)>>0; - int flipx = (value1 & 0x00001000)>>12; - int flipy = (value1 & 0x00000800)>>11; - int alpha = (value1 & 0x00000400)>>10; //? this one is used for alpha effects on warzard - int bpp = (value1 & 0x00000200)>>9; - int pal = (value1 & 0x000001ff); + uint32_t tileno = (value1 & 0xfffe0000) >> 17; + int xpos2 = (value2 & 0x03ff0000) >> 16; + int ypos2 = (value2 & 0x000003ff) >> 0; + int flipx = (value1 & 0x00001000) >> 12; + int flipy = (value1 & 0x00000800) >> 11; + int alpha = (value1 & 0x00000400) >> 10; //? this one is used for alpha effects on warzard + int bpp = (value1 & 0x00000200) >> 9; + int pal = (value1 & 0x000001ff); /* these are the sizes to actually draw */ - int ysizedraw2 = ((value3 & 0x7f000000)>>24); - int xsizedraw2 = ((value3 & 0x007f0000)>>16); - int xx,yy; + int ysizedraw2 = ((value3 & 0x7f000000) >> 24); + int xsizedraw2 = ((value3 & 0x007f0000) >> 16); + int xx, yy; static const int tilestable[4] = { 8,1,2,4 }; - int ysize2 = ((value3 & 0x0000000c)>>2); - int xsize2 = ((value3 & 0x00000003)>>0); - uint32_t xinc,yinc; + int ysize2 = ((value3 & 0x0000000c) >> 2); + int xsize2 = ((value3 & 0x00000003) >> 0); + uint32_t xinc, yinc; - if (ysize2==0) + if (ysize2 == 0) { - // printf("invalid sprite ysize of 0 tiles\n"); + // printf("invalid sprite ysize of 0 tiles\n"); continue; } - if (xsize2==0) // xsize of 0 tiles seems to be a special command to draw tilemaps + if (xsize2 == 0) // xsize of 0 tiles seems to be a special command to draw tilemaps { - int tilemapnum = ((value3 & 0x00000030)>>4); - //int startline;// = value2 & 0x3ff; - //int endline; - //int height = (value3 & 0x7f000000)>>24; - int uu; -// uint32_t* tmapregs[4] = { m_tilemap20_regs_base, m_tilemap30_regs_base, m_tilemap40_regs_base, m_tilemap50_regs_base }; -// uint32_t* regs; -// regs = tmapregs[tilemapnum]; - //endline = value2; - //startline = endline - height; - - //startline &=0x3ff; - //endline &=0x3ff; - - //printf("tilemap draw %01x %02x %02x %02x\n",tilemapnum, value2, height, regs[0]&0x000003ff ); - - //printf("tilemap draw %01x %d %d\n",tilemapnum, startline, endline ); - + int tilemapnum = ((value3 & 0x00000030) >> 4); /* Urgh, the startline / endline seem to be direct screen co-ordinates regardless of fullscreen zoom - which probably means the fullscreen zoom is applied when rendering everything, not aftewards */ - //for (uu=startline;uu<endline+1;uu++) + which probably means the fullscreen zoom is applied when rendering everything, not aftewards */ - if (bg_drawn[tilemapnum]==0) + if (bg_drawn[tilemapnum] == 0) { - for (uu=0;uu<1023;uu++) + for (int uu = 0; uu < 1023; uu++) { - cps3_draw_tilemapsprite_line(tilemapnum, uu, m_renderbuffer_bitmap, m_renderbuffer_clip ); + cps3_draw_tilemapsprite_line(tilemapnum, uu, m_renderbuffer_bitmap, m_renderbuffer_clip); } } bg_drawn[tilemapnum] = 1; @@ -1169,53 +1170,53 @@ uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bit ysize2 = tilestable[ysize2]; xsize2 = tilestable[xsize2]; - xinc = ((xsizedraw2+1)<<16) / ((xsize2*0x10)); - yinc = ((ysizedraw2+1)<<16) / ((ysize2*0x10)); + xinc = ((xsizedraw2 + 1) << 16) / ((xsize2 * 0x10)); + yinc = ((ysizedraw2 + 1) << 16) / ((ysize2 * 0x10)); - xsize2-=1; - ysize2-=1; + xsize2 -= 1; + ysize2 -= 1; flipx ^= global_xflip; flipy ^= global_yflip; - if (!flipx) xpos2+=((xsizedraw2+1)/2); - else xpos2-=((xsizedraw2+1)/2); + if (!flipx) xpos2 += ((xsizedraw2 + 1) / 2); + else xpos2 -= ((xsizedraw2 + 1) / 2); - ypos2+=((ysizedraw2+1)/2); + ypos2 += ((ysizedraw2 + 1) / 2); - if (!flipx) xpos2-= ((xsize2+1)*16*xinc)>>16; - else xpos2+= (xsize2*16*xinc)>>16; + if (!flipx) xpos2 -= ((xsize2 + 1) * 16 * xinc) >> 16; + else xpos2 += (xsize2 * 16 * xinc) >> 16; - if (flipy) ypos2-= (ysize2*16*yinc)>>16; + if (flipy) ypos2 -= (ysize2 * 16 * yinc) >> 16; { - count = 0; - for (xx=0;xx<xsize2+1;xx++) + int count = 0; + for (xx = 0; xx < xsize2 + 1; xx++) { int current_xpos; - if (!flipx) current_xpos = (xpos+xpos2+((xx*16*xinc)>>16)); - else current_xpos = (xpos+xpos2-((xx*16*xinc)>>16)); + if (!flipx) current_xpos = (xpos + xpos2 + ((xx * 16 * xinc) >> 16)); + else current_xpos = (xpos + xpos2 - ((xx * 16 * xinc) >> 16)); //current_xpos += machine().rand()&0x3ff; current_xpos += gscrollx; current_xpos += 1; - current_xpos &=0x3ff; - if (current_xpos&0x200) current_xpos-=0x400; + current_xpos &= 0x3ff; + if (current_xpos & 0x200) current_xpos -= 0x400; - for (yy=0;yy<ysize2+1;yy++) + for (yy = 0; yy < ysize2 + 1; yy++) { int current_ypos; int actualpal; - if (flipy) current_ypos = (ypos+ypos2+((yy*16*yinc)>>16)); - else current_ypos = (ypos+ypos2-((yy*16*yinc)>>16)); + if (flipy) current_ypos = (ypos + ypos2 + ((yy * 16 * yinc) >> 16)); + else current_ypos = (ypos + ypos2 - ((yy * 16 * yinc) >> 16)); current_ypos += gscrolly; - current_ypos = 0x3ff-current_ypos; + current_ypos = 0x3ff - current_ypos; current_ypos -= 17; - current_ypos &=0x3ff; + current_ypos &= 0x3ff; - if (current_ypos&0x200) current_ypos-=0x400; + if (current_ypos & 0x200) current_ypos -= 0x400; //if ( (whichbpp) && (m_screen->frame_number() & 1)) continue; @@ -1242,24 +1243,21 @@ uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bit } { - int realtileno = tileno+count; + int realtileno = tileno + count; if (global_alpha || alpha) { - cps3_drawgfxzoom(m_renderbuffer_bitmap,m_renderbuffer_clip,m_gfxdecode->gfx(1),realtileno,actualpal,0^flipx,0^flipy,current_xpos,current_ypos,CPS3_TRANSPARENCY_PEN_INDEX_BLEND,0,xinc,yinc, nullptr, 0); + cps3_drawgfxzoom(m_renderbuffer_bitmap, m_renderbuffer_clip, m_gfxdecode->gfx(1), realtileno, actualpal, 0 ^ flipx, 0 ^ flipy, current_xpos, current_ypos, CPS3_TRANSPARENCY_PEN_INDEX_BLEND, 0, xinc, yinc, nullptr, 0); } else { - cps3_drawgfxzoom(m_renderbuffer_bitmap,m_renderbuffer_clip,m_gfxdecode->gfx(1),realtileno,actualpal,0^flipx,0^flipy,current_xpos,current_ypos,CPS3_TRANSPARENCY_PEN_INDEX,0,xinc,yinc, nullptr, 0); + cps3_drawgfxzoom(m_renderbuffer_bitmap, m_renderbuffer_clip, m_gfxdecode->gfx(1), realtileno, actualpal, 0 ^ flipx, 0 ^ flipy, current_xpos, current_ypos, CPS3_TRANSPARENCY_PEN_INDEX, 0, xinc, yinc, nullptr, 0); } count++; } } } } - // */ - - // printf("cell %08x %08x %08x\n",value1, value2, value3); } } } @@ -1267,22 +1265,16 @@ uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bit /* copy render bitmap with zoom */ { - uint32_t renderx,rendery; - uint32_t srcx, srcy; - uint32_t* srcbitmap; - uint32_t* dstbitmap; - - - srcy=0; - for (rendery=0;rendery<224;rendery++) + uint32_t srcy = 0; + for (uint32_t rendery = 0; rendery < 224; rendery++) { - dstbitmap = &bitmap.pix32(rendery); - srcbitmap = &m_renderbuffer_bitmap.pix32(srcy>>16); - srcx=0; + uint32_t* dstbitmap = &bitmap.pix32(rendery); + uint32_t* srcbitmap = &m_renderbuffer_bitmap.pix32(srcy >> 16); + uint32_t srcx = 0; - for (renderx=0;renderx<m_screenwidth;renderx++) + for (uint32_t renderx = 0; renderx < m_screenwidth; renderx++) { - dstbitmap[renderx] = m_mame_colours[srcbitmap[srcx>>16]&0x1ffff]; + dstbitmap[renderx] = m_mame_colours[srcbitmap[srcx >> 16] & 0x1ffff]; srcx += fszx; } @@ -1290,43 +1282,22 @@ uint32_t cps3_state::screen_update_cps3(screen_device &screen, bitmap_rgb32 &bit } } - /* Draw the text layer */ - /* Copy the first 0x800 colours to be used for fg layer rendering */ -// for (offset=0;offset<0x200;offset++) -// { -// int palreadbase = (m_ss_pal_base << 9); -// m_palette->set_pen_color(offset,m_mame_colours[palreadbase+offset]); -// } + draw_fg_layer(screen, bitmap, cliprect); - // fg layer - { - // bank select? (sfiii2 intro) - if (m_ss_bank_base & 0x01000000) count = 0x000; - else count = 0x800; - - for (y=0;y<32;y++) - { - for (x=0;x<64;x++) - { - uint32_t data = m_ss_ram[count]; // +0x800 = 2nd bank, used on sfiii2 intro.. - uint32_t tile = (data >> 16) & 0x1ff; - int pal = (data&0x003f) >> 1; - int flipx = (data & 0x0080) >> 7; - int flipy = (data & 0x0040) >> 6; - pal += m_ss_pal_base << 5; - tile+=0x200; - - cps3_drawgfxzoom(bitmap, cliprect, m_gfxdecode->gfx(0),tile,pal,flipx,flipy,x*8,y*8,CPS3_TRANSPARENCY_PEN,0,0x10000,0x10000,nullptr,0); - count++; - } - } - } return 0; } +/* + SSRAM 0x0000 - 0x1fff tilemap layout bank 0 + 0x2000 - 0x3fff tilemap layout bank 1 + 0x4000 - 0x7fff rowscroll (banked?) + 0x8000 - 0xffff tile character definitions + +*/ + READ32_MEMBER(cps3_state::cps3_ssram_r) { - if (offset>0x8000/4) + if (offset>=0x8000/4) return little_endianize_int32(m_ss_ram[offset]); else return m_ss_ram[offset]; @@ -1334,7 +1305,7 @@ READ32_MEMBER(cps3_state::cps3_ssram_r) WRITE32_MEMBER(cps3_state::cps3_ssram_w) { - if (offset>0x8000/4) + if (offset>=0x8000/4) { // we only want to endian-flip the character data, the tilemap info is fine data = little_endianize_int32(data); diff --git a/src/mame/drivers/crospang.cpp b/src/mame/drivers/crospang.cpp index c4033000661..baa07d8ff7b 100644 --- a/src/mame/drivers/crospang.cpp +++ b/src/mame/drivers/crospang.cpp @@ -488,7 +488,7 @@ MACHINE_CONFIG_START(crospang_state::pitapat) crospang(config); // can't be 14'318'181 / 2 as the inputs barely respond and the background graphics glitch badly when the screen fills, doesn't appear to be a vblank bit anywhere to negate this either, P12 reated part - MCFG_DEVICE_REPLACE("maincpu", M68000, XTAL(14'318'181)) + MCFG_DEVICE_REPLACE("maincpu", M68000, XTAL(14'318'181)) MCFG_DEVICE_PROGRAM_MAP(pitapat_map) MCFG_DEVICE_VBLANK_INT_DRIVER("screen", crospang_state, irq6_line_hold) diff --git a/src/mame/drivers/crystal.cpp b/src/mame/drivers/crystal.cpp index beafc934ced..43349c843d4 100644 --- a/src/mame/drivers/crystal.cpp +++ b/src/mame/drivers/crystal.cpp @@ -237,38 +237,60 @@ GUN_xP are 6 pin gun connectors (pins 3-6 match the UNICO sytle guns): #include "screen.h" #include "speaker.h" +#include <algorithm> + #define IDLE_LOOP_SPEEDUP class crystal_state : public driver_device { public: - crystal_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), + crystal_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), m_sysregs(*this, "sysregs"), + m_crtcregs(*this, "crtcregs"), m_workram(*this, "workram"), m_vidregs(*this, "vidregs"), m_textureram(*this, "textureram"), m_frameram(*this, "frameram"), m_reset_patch(*this, "reset_patch"), + m_flash(*this, "flash"), + m_mainbank(*this, "mainbank"), m_maincpu(*this, "maincpu"), - m_vr0(*this, "vr0"), - m_video(*this, "vrender"), + m_vr0vid(*this, "vr0vid"), + m_vr0snd(*this, "vr0snd"), m_ds1302(*this, "rtc"), m_screen(*this, "screen") { } + void init_topbladv(); + void init_officeye(); + void init_crysking(); + void init_evosocc(); + void init_donghaer(); + void init_psattack(); + + void crospuzl(machine_config &config); + void crystal(machine_config &config); + void crzyddz2(machine_config &config); + void trivrus(machine_config &config); + +private: /* memory pointers */ required_shared_ptr<uint32_t> m_sysregs; + required_shared_ptr<uint32_t> m_crtcregs; required_shared_ptr<uint32_t> m_workram; required_shared_ptr<uint32_t> m_vidregs; required_shared_ptr<uint32_t> m_textureram; required_shared_ptr<uint32_t> m_frameram; optional_shared_ptr<uint32_t> m_reset_patch; // not needed for trivrus + optional_region_ptr<uint32_t> m_flash; + + optional_memory_bank m_mainbank; /* devices */ - required_device<cpu_device> m_maincpu; - required_device<vr0video_device> m_vr0; - required_device<vrender0_device> m_video; + required_device<se3208_device> m_maincpu; + required_device<vr0video_device> m_vr0vid; + required_device<vr0sound_device> m_vr0snd; required_device<ds1302_device> m_ds1302; required_device<screen_device> m_screen; @@ -277,6 +299,7 @@ public: #endif uint32_t m_Bank; + uint32_t m_maxbank; uint8_t m_FlipCount; uint8_t m_IntHigh; emu_timer *m_Timer[4]; @@ -290,34 +313,24 @@ public: DECLARE_READ32_MEMBER(FlipCount_r); DECLARE_WRITE32_MEMBER(FlipCount_w); - DECLARE_READ32_MEMBER(Input_r); DECLARE_WRITE32_MEMBER(IntAck_w); + template<int Which> DECLARE_WRITE32_MEMBER(Timer_w); + template<int Which> DECLARE_READ32_MEMBER(Timer_r); + template<int Which> DECLARE_READ32_MEMBER(DMA_r); + template<int Which> DECLARE_WRITE32_MEMBER(DMA_w); + DECLARE_READ32_MEMBER(crtc_r); + DECLARE_WRITE32_MEMBER(crtc_w); + void crtc_update(); + + DECLARE_READ32_MEMBER(Input_r); DECLARE_WRITE32_MEMBER(Banksw_w); - DECLARE_WRITE32_MEMBER(Timer0_w); - DECLARE_READ32_MEMBER(Timer0_r); - DECLARE_WRITE32_MEMBER(Timer1_w); - DECLARE_READ32_MEMBER(Timer1_r); - DECLARE_WRITE32_MEMBER(Timer2_w); - DECLARE_READ32_MEMBER(Timer2_r); - DECLARE_WRITE32_MEMBER(Timer3_w); - DECLARE_READ32_MEMBER(Timer3_r); - DECLARE_READ32_MEMBER(FlashCmd_r); - DECLARE_WRITE32_MEMBER(FlashCmd_w); DECLARE_READ32_MEMBER(PIO_r); DECLARE_WRITE32_MEMBER(PIO_w); - DECLARE_READ32_MEMBER(DMA0_r); - DECLARE_WRITE32_MEMBER(DMA0_w); - DECLARE_READ32_MEMBER(DMA1_r); - DECLARE_WRITE32_MEMBER(DMA1_w); - void init_topbladv(); - void init_officeye(); - void init_crysking(); - void init_evosocc(); - void init_donghaer(); - void init_psattack(); + DECLARE_READ32_MEMBER(FlashCmd_r); + DECLARE_WRITE32_MEMBER(FlashCmd_w); - DECLARE_READ32_MEMBER(trivrus_input_r); - DECLARE_WRITE32_MEMBER(trivrus_input_w); + DECLARE_READ8_MEMBER(trivrus_input_r); + DECLARE_WRITE8_MEMBER(trivrus_input_w); uint8_t m_trivrus_input; DECLARE_READ32_MEMBER(crzyddz2_key_r); @@ -326,25 +339,19 @@ public: virtual void machine_start() override; virtual void machine_reset() override; - uint32_t screen_update_crystal(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - DECLARE_WRITE_LINE_MEMBER(screen_vblank_crystal); - INTERRUPT_GEN_MEMBER(crystal_interrupt); + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + DECLARE_WRITE_LINE_MEMBER(screen_vblank); TIMER_CALLBACK_MEMBER(Timercb); IRQ_CALLBACK_MEMBER(icallback); - void crystal_banksw_postload(); void IntReq( int num ); - inline void Timer_w( address_space &space, int which, uint32_t data, uint32_t mem_mask ); inline void DMA_w( address_space &space, int which, uint32_t data, uint32_t mem_mask ); void PatchReset( ); uint16_t GetVidReg( address_space &space, uint16_t reg ); void SetVidReg( address_space &space, uint16_t reg, uint16_t val ); - void crospuzl(machine_config &config); - void crystal(machine_config &config); - void crzyddz2(machine_config &config); - void trivrus(machine_config &config); void crospuzl_mem(address_map &map); void crystal_mem(address_map &map); void crzyddz2_mem(address_map &map); + void internal_map(address_map &map); void trivrus_mem(address_map &map); }; @@ -388,25 +395,6 @@ WRITE32_MEMBER(crystal_state::FlipCount_w) } } -READ32_MEMBER(crystal_state::Input_r) -{ - if (offset == 0) - return ioport("P1_P2")->read(); - else if (offset == 1) - return ioport("P3_P4")->read(); - else if( offset == 2) - { - uint8_t Port4 = ioport("SYSTEM")->read(); - if (!(Port4 & 0x10) && ((m_OldPort4 ^ Port4) & 0x10)) //coin buttons trigger IRQs - IntReq(12); - if (!(Port4 & 0x20) && ((m_OldPort4 ^ Port4) & 0x20)) - IntReq(19); - m_OldPort4 = Port4; - return /*dips*/ioport("DSW")->read() | (Port4 << 16); - } - return 0; -} - WRITE32_MEMBER(crystal_state::IntAck_w) { uint32_t IntPend = space.read_dword(0x01800c0c); @@ -438,15 +426,6 @@ IRQ_CALLBACK_MEMBER(crystal_state::icallback) return 0; //This should never happen } -WRITE32_MEMBER(crystal_state::Banksw_w) -{ - m_Bank = (data >> 1) & 7; - if (m_Bank <= 2) - membank("bank1")->set_base(memregion("user1")->base() + m_Bank * 0x1000000); - else - membank("bank1")->set_base(memregion("user2")->base()); -} - uint32_t *crystal_state::TimerRegsPtr(int which) const { return &m_sysregs[0x1400/4 + which * 8/4]; @@ -458,7 +437,7 @@ void crystal_state::TimerStart(int which) int PD = (regs[0] >> 8) & 0xff; int TCV = regs[1] & 0xffff; - attotime period = attotime::from_hz(43000000) * ((PD + 1) * (TCV + 1)); + attotime period = attotime::from_hz(14318180 * 3) * ((PD + 1) * (TCV + 1)); // TODO : related to CPU clock m_Timer[which]->adjust(period); // printf("timer %d start, PD = %x TCV = %x period = %s\n", which, PD, TCV, period.as_string()); @@ -479,9 +458,10 @@ TIMER_CALLBACK_MEMBER(crystal_state::Timercb) IntReq(num[which]); } -void crystal_state::Timer_w( address_space &space, int which, uint32_t data, uint32_t mem_mask ) +template<int Which> +WRITE32_MEMBER(crystal_state::Timer_w) { - uint32_t *regs = TimerRegsPtr(which); + uint32_t *regs = TimerRegsPtr(Which); uint32_t old = regs[0]; data = COMBINE_DATA(®s[0]); @@ -490,82 +470,253 @@ void crystal_state::Timer_w( address_space &space, int which, uint32_t data, uin { if (data & 1) { - TimerStart(which); + TimerStart(Which); } else { // Timer stop - m_Timer[which]->adjust(attotime::never); -// printf("timer %d stop\n", which); + m_Timer[Which]->adjust(attotime::never); +// printf("timer %d stop\n", Which); } } } -WRITE32_MEMBER(crystal_state::Timer0_w) +template<int Which> +READ32_MEMBER(crystal_state::Timer_r) { - Timer_w(space, 0, data, mem_mask); + return *TimerRegsPtr(Which); } -READ32_MEMBER(crystal_state::Timer0_r) +template<int Which> +READ32_MEMBER(crystal_state::DMA_r) { - return *TimerRegsPtr(0); + return m_DMActrl[Which]; } -WRITE32_MEMBER(crystal_state::Timer1_w) +template<int Which> +WRITE32_MEMBER(crystal_state::DMA_w) { - Timer_w(space, 1, data, mem_mask); -} + if (((data ^ m_DMActrl[Which]) & (1 << 10)) && (data & (1 << 10))) //DMAOn + { + uint32_t CTR = data; + uint32_t SRC = space.read_dword(0x01800804 + Which * 0x10); + uint32_t DST = space.read_dword(0x01800808 + Which * 0x10); + uint32_t CNT = space.read_dword(0x0180080C + Which * 0x10); + int i; -READ32_MEMBER(crystal_state::Timer1_r) -{ - return *TimerRegsPtr(1); + if (CTR & 0x2) //32 bits + { + for (i = 0; i < CNT; ++i) + { + uint32_t v = space.read_dword(SRC + i * 4); + space.write_dword(DST + i * 4, v); + } + } + else if (CTR & 0x1) //16 bits + { + for (i = 0; i < CNT; ++i) + { + uint16_t v = space.read_word(SRC + i * 2); + space.write_word(DST + i * 2, v); + } + } + else //8 bits + { + for (i = 0; i < CNT; ++i) + { + uint8_t v = space.read_byte(SRC + i); + space.write_byte(DST + i, v); + } + } + data &= ~(1 << 10); + space.write_dword(0x0180080C + Which * 0x10, 0); + IntReq(7 + Which); + } + COMBINE_DATA(&m_DMActrl[Which]); } -WRITE32_MEMBER(crystal_state::Timer2_w) +READ32_MEMBER(crystal_state::crtc_r) { - Timer_w(space, 2, data, mem_mask); + uint32_t res = m_crtcregs[offset]; + uint32_t hdisp = (m_crtcregs[0x0c / 4] + 1); + uint32_t vdisp = (m_crtcregs[0x1c / 4] + 1); + switch (offset) + { + case 0: // CRTC Status / Mode + if ((m_crtcregs[0x30 / 4] & 1) == 0) // Interrace + vdisp <<= 1; + + if (m_screen->vpos() <= vdisp) // Vertical display enable status + res |= 0x4000; + + if (m_screen->hpos() > hdisp) // horizontal & vertical blank period + res &= ~0x2000; + else + res |= 0x2000; + + break; + default: + break; + } + return res; } -READ32_MEMBER(crystal_state::Timer2_r) +WRITE32_MEMBER(crystal_state::crtc_w) { - return *TimerRegsPtr(2); + if (((m_crtcregs[0] & 0x0100) == 0x0100) && (offset > 0)) // Write protect + return; + + uint32_t old = m_crtcregs[offset]; + switch (offset * 4) + { + case 0: // CRTC Status / Mode Register (CRTMOD) + mem_mask &= ~0xfffffc00; // Bit 31-10 Reserved + break; + case 0x04: // CRTC Timing Control Register (CRTTIM) + mem_mask &= ~0xffffc000; // Bit 31-14 Reserved + break; + case 0x08: // Horizontal Sync Width / Back Porch Register (HSWBP) + mem_mask &= ~0xffff0000; // Bit 31-16 Reserved + break; + case 0x0c: // Horizontal Display Total Register (HDISP) + mem_mask &= ~0xfffffc00; // Bit 31-10 Reserved + break; + case 0x10: // Horizontal Sync Front Porch Register (HSFP) + mem_mask &= ~0xfffffe00; // Bit 31-9 Reserved + break; + case 0x14: // Field Window Bound Register (FWINB) + mem_mask &= ~0xffff80c0; // Bit 31-15, 7-6 Reserved + break; + case 0x18: // Vertical Sync Back Porch Register (VSBP) + mem_mask &= ~0xffffff00; // Bit 31-8 Reserved + break; + case 0x1c: // Vertical Display Total Register (VDISP) + mem_mask &= ~0xfffffe00; // Bit 31-9 Reserved + break; + case 0x20: // Horizontal Total Register (HTOT) + mem_mask &= ~0xffffe000; // Bit 31-13 Reserved + break; + case 0x24: // Vertical Total Register (VTOT) + mem_mask &= ~0xfffff000; // Bit 31-12 Reserved + break; + case 0x28: // Horizontal Line Back Porch Register (HLBP) + mem_mask &= ~0xfffffc00; // Bit 31-10 Reserved + break; + case 0x2c: // CRT Display Start Address 0 Register (STAD0) + mem_mask &= ~0xffff8000; // Bit 31-15 Reserved + break; + case 0x30: // CRT Display Start Address 1 Register (STAD1) + mem_mask &= ~0xffff8000; // Bit 31-15 Reserved + break; + case 0x38: // Light Pen 0 X Register (LIGHT0X) + mem_mask &= ~0xfffff800; // Bit 31-11 Reserved + break; + case 0x3c: // Light Pen 0 Y Register (LIGHT0Y) + mem_mask &= ~0xfffffe00; // Bit 31-9 Reserved + break; + case 0x40: // Light Pen 1 X Register (LIGHT1X) + mem_mask &= ~0xfffff800; // Bit 31-11 Reserved + break; + case 0x44: // Light Pen 1 Y Register (LIGHT1Y) + mem_mask &= ~0xfffffe00; // Bit 31-9 Reserved + break; + case 0x48: // Light Pen Input Control Register (LIGHTC) + mem_mask &= ~0xfffffffc; // Bit 31-2 Reserved + break; + default: + return; + } + COMBINE_DATA(&m_crtcregs[offset]); + if (((offset == (0xc / 4)) || (offset == (0x1c / 4)) || (offset == (0x30 / 4))) && (old ^ m_crtcregs[offset])) + crtc_update(); + } -WRITE32_MEMBER(crystal_state::Timer3_w) +void crystal_state::crtc_update() { - Timer_w(space, 3, data, mem_mask); + // TODO : Implement other CRTC parameters + uint32_t hdisp = m_crtcregs[0x0c / 4] + 1; + uint32_t vdisp = m_crtcregs[0x1c / 4] + 1; + if ((m_crtcregs[0x30 / 4] & 1) == 0) // Interrace + vdisp <<= 1; + + rectangle visarea; + visarea.set(0, hdisp - 1, 0, vdisp - 1); + m_screen->configure(hdisp, vdisp, visarea, m_screen->frame_period().attoseconds() ); } -READ32_MEMBER(crystal_state::Timer3_r) +void crystal_state::internal_map(address_map &map) { - return *TimerRegsPtr(3); +// map(0x00000000, 0x00ffffff) // Local ROM +// map(0x01000000, 0x010fffff) // Peripheral Device 0 +// map(0x01100000, 0x011fffff) // Peripheral Device 1 +// map(0x01200000, 0x012fffff) // Peripheral Device 2 +// map(0x01300000, 0x013fffff) // Peripheral Device 3 +// map(0x01400000, 0x014fffff) // Peripheral Device 4 +// map(0x01500000, 0x015fffff) // Peripheral Device 5 +// map(0x01600000, 0x016fffff) // Peripheral Device 6 +// map(0x01700000, 0x017fffff) // Peripheral Device 7 +// map(0x01800000, 0x01ffffff) // Internal Registers(VRender0, or Amazon) + + map(0x01800000, 0x0180ffff).ram().share("sysregs"); +// map(0x01800000, 0x018003ff) // System/General +// map(0x01800400, 0x018007ff) // Local Memory Controller +// map(0x01800800, 0x01800bff) // DMA + map(0x01800800, 0x01800803).rw(FUNC(crystal_state::DMA_r<0>), FUNC(crystal_state::DMA_w<0>)); + map(0x01800810, 0x01800813).rw(FUNC(crystal_state::DMA_r<1>), FUNC(crystal_state::DMA_w<1>)); +// map(0x01800c00, 0x01800fff) // Interrupt Controller + map(0x01800c04, 0x01800c07).w(FUNC(crystal_state::IntAck_w)); +// map(0x01801000, 0x018013ff) // UART +// map(0x01801400, 0x018017ff) // Timer & Counter + map(0x01801400, 0x01801403).rw(FUNC(crystal_state::Timer_r<0>), FUNC(crystal_state::Timer_w<0>)); + map(0x01801408, 0x0180140b).rw(FUNC(crystal_state::Timer_r<1>), FUNC(crystal_state::Timer_w<1>)); + map(0x01801410, 0x01801413).rw(FUNC(crystal_state::Timer_r<2>), FUNC(crystal_state::Timer_w<2>)); + map(0x01801418, 0x0180141b).rw(FUNC(crystal_state::Timer_r<3>), FUNC(crystal_state::Timer_w<3>)); +// map(0x01801800, 0x01801bff) // Pulse Width Modulation +// map(0x01802000, 0x018023ff) // PIO (Port) +// map(0x01802004, 0x01802007).rw(FUNC(crystal_state::PIO_r), FUNC(crystal_state::PIO_w)); // PIOLDAT +// map(0x01802008, 0x0180200b) // PIOEDAT +// map(0x01802400, 0x018027ff) // Peripheral Chip Select +// map(0x01802800, 0x01802bff) // SIO +// map(0x01803400, 0x018037ff) // CRT Controller + map(0x01803400, 0x018037ff).rw(FUNC(crystal_state::crtc_r), FUNC(crystal_state::crtc_w)).share("crtcregs"); +// map(0x01804000, 0x018043ff) // RAMDAC & PLL + +// map(0x02000000, 0x02ffffff).ram().share("workram"); // Local RAM/DRAM (Max.16MB) + + map(0x03000000, 0x0300ffff).ram().share("vidregs"); + map(0x030000a4, 0x030000a7).rw(FUNC(crystal_state::FlipCount_r), FUNC(crystal_state::FlipCount_w)); +// map(0x03800000, 0x03ffffff).ram().share("textureram"); // Texture Buffer Memory (Max.8MB) +// map(0x04000000, 0x047fffff).ram().share("frameram"); // Frame Buffer Memory (Max.8MB) + map(0x04800000, 0x04800fff).rw(m_vr0snd, FUNC(vr0sound_device::vr0_snd_read), FUNC(vr0sound_device::vr0_snd_write)); + +// map(0x05000000, 0x0fffffff) // Expansion ROM } -READ32_MEMBER(crystal_state::FlashCmd_r) + +READ32_MEMBER(crystal_state::Input_r) { - if ((m_FlashCmd & 0xff) == 0xff) - { - if (m_Bank <= 2) - { - uint32_t *ptr = (uint32_t*)(memregion("user1")->base() + m_Bank * 0x1000000); - return ptr[0]; - } - else - return 0xffffffff; - } - if ((m_FlashCmd & 0xff) == 0x90) + if (offset == 0) + return ioport("P1_P2")->read(); + else if (offset == 1) + return ioport("P3_P4")->read(); + else if( offset == 2) { - if (m_Bank <= 2) - return 0x00180089; //Intel 128MBit - else - return 0xffffffff; + uint8_t Port4 = ioport("SYSTEM")->read(); + if (!(Port4 & 0x10) && ((m_OldPort4 ^ Port4) & 0x10)) //coin buttons trigger IRQs + IntReq(12); + if (!(Port4 & 0x20) && ((m_OldPort4 ^ Port4) & 0x20)) + IntReq(19); + m_OldPort4 = Port4; + return /*dips*/ioport("DSW")->read() | (Port4 << 16); } return 0; } -WRITE32_MEMBER(crystal_state::FlashCmd_w) +WRITE32_MEMBER(crystal_state::Banksw_w) { - m_FlashCmd = data; + m_Bank = (data >> 1) & 7; + m_mainbank->set_entry(m_Bank); } READ32_MEMBER(crystal_state::PIO_r) @@ -591,98 +742,50 @@ WRITE32_MEMBER(crystal_state::PIO_w) COMBINE_DATA(&m_PIO); } -void crystal_state::DMA_w( address_space &space, int which, uint32_t data, uint32_t mem_mask ) +READ32_MEMBER(crystal_state::FlashCmd_r) { - if (((data ^ m_DMActrl[which]) & (1 << 10)) && (data & (1 << 10))) //DMAOn + if ((m_FlashCmd & 0xff) == 0xff) { - uint32_t CTR = data; - uint32_t SRC = space.read_dword(0x01800804 + which * 0x10); - uint32_t DST = space.read_dword(0x01800808 + which * 0x10); - uint32_t CNT = space.read_dword(0x0180080C + which * 0x10); - int i; - - if (CTR & 0x2) //32 bits - { - for (i = 0; i < CNT; ++i) - { - uint32_t v = space.read_dword(SRC + i * 4); - space.write_dword(DST + i * 4, v); - } - } - else if (CTR & 0x1) //16 bits + if (m_Bank < m_maxbank) { - for (i = 0; i < CNT; ++i) - { - uint16_t v = space.read_word(SRC + i * 2); - space.write_word(DST + i * 2, v); - } - } - else //8 bits - { - for (i = 0; i < CNT; ++i) - { - uint8_t v = space.read_byte(SRC + i); - space.write_byte(DST + i, v); - } + uint32_t *ptr = (uint32_t*)(m_mainbank->base()); + return ptr[0]; } - data &= ~(1 << 10); - space.write_dword(0x0180080C + which * 0x10, 0); - IntReq(7 + which); + else + return 0xffffffff; } - COMBINE_DATA(&m_DMActrl[which]); -} - -READ32_MEMBER(crystal_state::DMA0_r) -{ - return m_DMActrl[0]; -} - -WRITE32_MEMBER(crystal_state::DMA0_w) -{ - DMA_w(space, 0, data, mem_mask); -} - -READ32_MEMBER(crystal_state::DMA1_r) -{ - return m_DMActrl[1]; + if ((m_FlashCmd & 0xff) == 0x90) + { + if (m_Bank < m_maxbank) + return 0x00180089; //Intel 128MBit + else + return 0xffffffff; + } + return 0; } -WRITE32_MEMBER(crystal_state::DMA1_w) +WRITE32_MEMBER(crystal_state::FlashCmd_w) { - DMA_w(space, 1, data, mem_mask); + m_FlashCmd = data; } - void crystal_state::crystal_mem(address_map &map) { + internal_map(map); map(0x00000000, 0x0001ffff).rom().nopw(); map(0x01200000, 0x0120000f).r(FUNC(crystal_state::Input_r)); map(0x01280000, 0x01280003).w(FUNC(crystal_state::Banksw_w)); map(0x01400000, 0x0140ffff).ram().share("nvram"); - map(0x01800000, 0x0180ffff).ram().share("sysregs"); - - map(0x01800800, 0x01800803).rw(FUNC(crystal_state::DMA0_r), FUNC(crystal_state::DMA0_w)); - map(0x01800810, 0x01800813).rw(FUNC(crystal_state::DMA1_r), FUNC(crystal_state::DMA1_w)); - - map(0x01800c04, 0x01800c07).w(FUNC(crystal_state::IntAck_w)); - - map(0x01801400, 0x01801403).rw(FUNC(crystal_state::Timer0_r), FUNC(crystal_state::Timer0_w)); - map(0x01801408, 0x0180140b).rw(FUNC(crystal_state::Timer1_r), FUNC(crystal_state::Timer1_w)); - map(0x01801410, 0x01801413).rw(FUNC(crystal_state::Timer2_r), FUNC(crystal_state::Timer2_w)); - map(0x01801418, 0x0180141b).rw(FUNC(crystal_state::Timer3_r), FUNC(crystal_state::Timer3_w)); map(0x01802004, 0x01802007).rw(FUNC(crystal_state::PIO_r), FUNC(crystal_state::PIO_w)); map(0x02000000, 0x027fffff).ram().share("workram"); - map(0x03000000, 0x0300ffff).ram().share("vidregs"); - map(0x030000a4, 0x030000a7).rw(FUNC(crystal_state::FlipCount_r), FUNC(crystal_state::FlipCount_w)); map(0x03800000, 0x03ffffff).ram().share("textureram"); map(0x04000000, 0x047fffff).ram().share("frameram"); - map(0x04800000, 0x04800fff).rw("vrender", FUNC(vrender0_device::vr0_snd_read), FUNC(vrender0_device::vr0_snd_write)); - map(0x05000000, 0x05ffffff).bankr("bank1"); + map(0x05000000, 0x05ffffff).bankr("mainbank"); map(0x05000000, 0x05000003).rw(FUNC(crystal_state::FlashCmd_r), FUNC(crystal_state::FlashCmd_w)); map(0x44414F4C, 0x44414F7F).ram().share("reset_patch"); @@ -691,7 +794,7 @@ void crystal_state::crystal_mem(address_map &map) // Trivia R Us // To do: touch panel, RTC -READ32_MEMBER(crystal_state::trivrus_input_r) +READ8_MEMBER(crystal_state::trivrus_input_r) { switch (m_trivrus_input) { @@ -703,21 +806,21 @@ READ32_MEMBER(crystal_state::trivrus_input_r) case 6: return ioport("DSW")->read(); } logerror("%s: unknown input %02x read\n", machine().describe_context(), m_trivrus_input); - return 0xffffffff; + return 0xff; } -WRITE32_MEMBER(crystal_state::trivrus_input_w) +WRITE8_MEMBER(crystal_state::trivrus_input_w) { - if (ACCESSING_BITS_0_7) - m_trivrus_input = data & 0xff; + m_trivrus_input = data & 0xff; } void crystal_state::trivrus_mem(address_map &map) { + internal_map(map); map(0x00000000, 0x0007ffff).rom().nopw(); // 0x01280000 & 0x0000ffff (written at boot) - map(0x01500000, 0x01500003).rw(FUNC(crystal_state::trivrus_input_r), FUNC(crystal_state::trivrus_input_w)); + map(0x01500000, 0x01500000).rw(FUNC(crystal_state::trivrus_input_r), FUNC(crystal_state::trivrus_input_w)); // 0x01500010 & 0x000000ff = sec // 0x01500010 & 0x00ff0000 = min // 0x01500014 & 0x000000ff = hour @@ -726,29 +829,14 @@ void crystal_state::trivrus_mem(address_map &map) // 0x0150001c & 0x000000ff = year - 2000 map(0x01600000, 0x01607fff).ram().share("nvram"); - map(0x01800000, 0x0180ffff).ram().share("sysregs"); - - map(0x01800800, 0x01800803).rw(FUNC(crystal_state::DMA0_r), FUNC(crystal_state::DMA0_w)); - map(0x01800810, 0x01800813).rw(FUNC(crystal_state::DMA1_r), FUNC(crystal_state::DMA1_w)); - - map(0x01800c04, 0x01800c07).w(FUNC(crystal_state::IntAck_w)); - - map(0x01801400, 0x01801403).rw(FUNC(crystal_state::Timer0_r), FUNC(crystal_state::Timer0_w)); - map(0x01801408, 0x0180140b).rw(FUNC(crystal_state::Timer1_r), FUNC(crystal_state::Timer1_w)); - map(0x01801410, 0x01801413).rw(FUNC(crystal_state::Timer2_r), FUNC(crystal_state::Timer2_w)); - map(0x01801418, 0x0180141b).rw(FUNC(crystal_state::Timer3_r), FUNC(crystal_state::Timer3_w)); map(0x01802004, 0x01802007).rw(FUNC(crystal_state::PIO_r), FUNC(crystal_state::PIO_w)); map(0x02000000, 0x027fffff).ram().share("workram"); - - map(0x03000000, 0x0300ffff).ram().share("vidregs"); - map(0x030000a4, 0x030000a7).rw(FUNC(crystal_state::FlipCount_r), FUNC(crystal_state::FlipCount_w)); map(0x03800000, 0x03ffffff).ram().share("textureram"); map(0x04000000, 0x047fffff).ram().share("frameram"); - map(0x04800000, 0x04800fff).rw("vrender", FUNC(vrender0_device::vr0_snd_read), FUNC(vrender0_device::vr0_snd_write)); - map(0x05000000, 0x05ffffff).bankr("bank1"); + map(0x05000000, 0x05ffffff).bankr("mainbank"); map(0x05000000, 0x05000003).rw(FUNC(crystal_state::FlashCmd_r), FUNC(crystal_state::FlashCmd_w)); // AM_RANGE(0x44414F4C, 0x44414F7F) AM_RAM AM_SHARE("reset_patch") @@ -809,6 +897,7 @@ crzyddz2 in out void crystal_state::crzyddz2_mem(address_map &map) { + internal_map(map); map(0x00000000, 0x00ffffff).rom().nopw(); map(0x01280000, 0x01280003).w(FUNC(crystal_state::Banksw_w)); @@ -816,29 +905,14 @@ void crystal_state::crzyddz2_mem(address_map &map) map(0x01500000, 0x01500003).portr("P1_P2"); map(0x01500004, 0x01500007).r(FUNC(crystal_state::crzyddz2_key_r)); - map(0x01800000, 0x0180ffff).ram().share("sysregs"); - - map(0x01800800, 0x01800803).rw(FUNC(crystal_state::DMA0_r), FUNC(crystal_state::DMA0_w)); - map(0x01800810, 0x01800813).rw(FUNC(crystal_state::DMA1_r), FUNC(crystal_state::DMA1_w)); - - map(0x01800c04, 0x01800c07).w(FUNC(crystal_state::IntAck_w)); - - map(0x01801400, 0x01801403).rw(FUNC(crystal_state::Timer0_r), FUNC(crystal_state::Timer0_w)); - map(0x01801408, 0x0180140b).rw(FUNC(crystal_state::Timer1_r), FUNC(crystal_state::Timer1_w)); - map(0x01801410, 0x01801413).rw(FUNC(crystal_state::Timer2_r), FUNC(crystal_state::Timer2_w)); - map(0x01801418, 0x0180141b).rw(FUNC(crystal_state::Timer3_r), FUNC(crystal_state::Timer3_w)); map(0x01802004, 0x01802007).rw(FUNC(crystal_state::PIO_r), FUNC(crystal_state::crzyddz2_PIO_w)); map(0x02000000, 0x027fffff).ram().share("workram"); - - map(0x03000000, 0x0300ffff).ram().share("vidregs"); - map(0x030000a4, 0x030000a7).rw(FUNC(crystal_state::FlipCount_r), FUNC(crystal_state::FlipCount_w)); map(0x03800000, 0x03ffffff).ram().share("textureram"); map(0x04000000, 0x047fffff).ram().share("frameram"); - map(0x04800000, 0x04800fff).rw("vrender", FUNC(vrender0_device::vr0_snd_read), FUNC(vrender0_device::vr0_snd_write)); - map(0x05000000, 0x05ffffff).bankr("bank1"); + map(0x05000000, 0x05ffffff).bankr("mainbank"); map(0x05000000, 0x05000003).rw(FUNC(crystal_state::FlashCmd_r), FUNC(crystal_state::FlashCmd_w)); // AM_RANGE(0x44414F4C, 0x44414F7F) AM_RAM AM_SHARE("reset_patch") @@ -897,23 +971,28 @@ loop: #endif } -void crystal_state::crystal_banksw_postload() -{ - if (m_Bank <= 2) - membank("bank1")->set_base(memregion("user1")->base() + m_Bank * 0x1000000); - else - membank("bank1")->set_base(memregion("user2")->base()); -} - void crystal_state::machine_start() { - int i; - - for (i = 0; i < 4; i++) + for (int i = 0; i < 4; i++) m_Timer[i] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(crystal_state::Timercb),this), (void*)(uintptr_t)i); PatchReset(); + if (m_mainbank) + { + m_maxbank = (m_flash) ? m_flash.bytes() / 0x1000000 : 0; + uint8_t *dummy_region = auto_alloc_array(machine(), uint8_t, 0x1000000); + std::fill_n(&dummy_region[0], 0x1000000, 0xff); // 0xff Filled at Unmapped area + uint8_t *ROM = (m_flash) ? (uint8_t *)&m_flash[0] : dummy_region; + for (int i = 0; i < 8; i++) + { + if ((i < m_maxbank)) + m_mainbank->configure_entry(i, ROM + i * 0x1000000); + else + m_mainbank->configure_entry(i, dummy_region); + } + } + #ifdef IDLE_LOOP_SPEEDUP save_item(NAME(m_FlipCntRead)); #endif @@ -926,18 +1005,19 @@ void crystal_state::machine_start() save_item(NAME(m_DMActrl)); save_item(NAME(m_OldPort4)); save_item(NAME(m_trivrus_input)); - machine().save().register_postload(save_prepost_delegate(FUNC(crystal_state::crystal_banksw_postload), this)); } void crystal_state::machine_reset() { - memset(m_sysregs, 0, 0x10000); - memset(m_vidregs, 0, 0x10000); + std::fill_n(&m_sysregs[0], m_sysregs.bytes() / 4, 0); + std::fill_n(&m_vidregs[0], m_vidregs.bytes() / 4, 0); + std::fill_n(&m_crtcregs[0], m_crtcregs.bytes() / 4, 0); + m_crtcregs[1] = 0x00000022; m_FlipCount = 0; m_IntHigh = 0; m_Bank = 0; - membank("bank1")->set_base(memregion("user1")->base() + 0); + m_mainbank->set_entry(m_Bank); m_FlashCmd = 0xff; m_OldPort4 = 0; @@ -950,7 +1030,7 @@ void crystal_state::machine_reset() m_Timer[i]->adjust(attotime::never); } - m_video->set_areas(m_textureram, m_frameram); + m_vr0snd->set_areas(m_textureram, m_frameram); #ifdef IDLE_LOOP_SPEEDUP m_FlipCntRead = 0; #endif @@ -971,25 +1051,13 @@ void crystal_state::SetVidReg( address_space &space, uint16_t reg, uint16_t val } -uint32_t crystal_state::screen_update_crystal(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +uint32_t crystal_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - int xres = 320; - int yres = 240; - - // probably more registers around here control height / interlace enable etc. - // 0x341c looks like height, but doesn't change for interlace mode. - xres = m_sysregs[0x340c / 4]+1; - if (xres > 640) xres = 640; - - // force double height if 640 wide (probably a reg for this) - if (xres == 640) yres = 480; - - - rectangle visarea; - visarea.set(0, xres-1, 0, yres-1); - m_screen->configure(xres, yres, visarea, m_screen->frame_period().attoseconds() ); - - + if ((m_crtcregs[0] & 0x0200) == 0x0200) // Blank Screen + { + bitmap.fill(0, cliprect); + return 0; + } address_space &space = m_maincpu->space(AS_PROGRAM); int DoFlip; @@ -1001,7 +1069,7 @@ uint32_t crystal_state::screen_update_crystal(screen_device &screen, bitmap_ind1 uint16_t *srcline; int y; uint16_t head, tail; - uint32_t width = screen.width(); + uint32_t width = cliprect.width(); if (GetVidReg(space, 0x8e) & 1) { @@ -1034,7 +1102,7 @@ uint32_t crystal_state::screen_update_crystal(screen_device &screen, bitmap_ind1 while ((head & 0x7ff) != (tail & 0x7ff)) { // ERROR: This cast is NOT endian-safe without the use of BYTE/WORD/DWORD_XOR_* macros! - DoFlip = m_vr0->vrender0_ProcessPacket(0x03800000 + head * 64, DrawDest, reinterpret_cast<uint8_t*>(m_textureram.target())); + DoFlip = m_vr0vid->vrender0_ProcessPacket(0x03800000 + head * 64, DrawDest, reinterpret_cast<uint8_t*>(m_textureram.target())); head++; head &= 0x7ff; if (DoFlip) @@ -1045,13 +1113,14 @@ uint32_t crystal_state::screen_update_crystal(screen_device &screen, bitmap_ind1 SetVidReg(space, 0x8e, GetVidReg(space, 0x8e) ^ 1); srcline = (uint16_t *) Visible; - for (y = 0; y < screen.height(); y++) - memcpy(&bitmap.pix16(y), &srcline[y * 1024], width * 2); + uint32_t dx = cliprect.left(); + for (y = cliprect.top(); y <= cliprect.bottom(); y++) + std::copy_n( &srcline[(y * 1024) + dx], width, &bitmap.pix16(y, dx)); return 0; } -WRITE_LINE_MEMBER(crystal_state::screen_vblank_crystal) +WRITE_LINE_MEMBER(crystal_state::screen_vblank) { // rising edge if (state) @@ -1079,14 +1148,10 @@ WRITE_LINE_MEMBER(crystal_state::screen_vblank_crystal) m_FlipCount--; } + IntReq(24); //VRender0 VBlank } } -INTERRUPT_GEN_MEMBER(crystal_state::crystal_interrupt) -{ - IntReq(24); //VRender0 VBlank -} - static INPUT_PORTS_START(crystal) PORT_START("P1_P2") PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) @@ -1238,52 +1303,47 @@ INPUT_PORTS_END static INPUT_PORTS_START(trivrus) PORT_START("IN1") - PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Up") PORT_CODE(KEYCODE_UP) - PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Left/True") PORT_CODE(KEYCODE_LEFT) - PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN) - PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Up") PORT_CODE(KEYCODE_UP) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Left/True") PORT_CODE(KEYCODE_LEFT) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN) PORT_START("IN2") - PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Enter/Exit") - PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Next") - PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Right/False") PORT_CODE(KEYCODE_RIGHT) - PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) - PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Enter/Exit") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Next") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Right/False") PORT_CODE(KEYCODE_RIGHT) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("IN3") - PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Sound") - PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Sound") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("IN4") - PORT_BIT( 0x000000ff, IP_ACTIVE_LOW, IPT_OTHER )PORT_CODE(KEYCODE_9) - PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_OTHER )PORT_CODE(KEYCODE_9) PORT_START("IN5") - PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_SERVICE1 ) // Free Game - PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) // Free Game + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW ) // Setup - PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("DSW") PORT_DIPNAME( 0x01, 0x01, "Interlace?" ) @@ -1310,7 +1370,6 @@ static INPUT_PORTS_START(trivrus) PORT_DIPNAME( 0x80, 0x80, "Touch Screen" ) PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) INPUT_PORTS_END static INPUT_PORTS_START(crospuzl) @@ -1486,90 +1545,82 @@ static INPUT_PORTS_START(crzyddz2) INPUT_PORTS_END -MACHINE_CONFIG_START(crystal_state::crystal) - - MCFG_DEVICE_ADD("maincpu", SE3208, 43000000) - MCFG_DEVICE_PROGRAM_MAP(crystal_mem) - MCFG_DEVICE_VBLANK_INT_DRIVER("screen", crystal_state, crystal_interrupt) - MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(crystal_state, icallback) +void crystal_state::crystal(machine_config &config) +{ + SE3208(config, m_maincpu, 14318180 * 3); // TODO : different between each PCBs + m_maincpu->set_addrmap(AS_PROGRAM, &crystal_state::crystal_mem); + m_maincpu->set_irq_acknowledge_callback(FUNC(crystal_state::icallback)); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) - MCFG_SCREEN_SIZE(640, 480) - MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479) - MCFG_SCREEN_UPDATE_DRIVER(crystal_state, screen_update_crystal) - MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, crystal_state, screen_vblank_crystal)) - MCFG_SCREEN_PALETTE("palette") + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_refresh(HZ_TO_ATTOSECONDS(60)); + m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0)); + m_screen->set_size(640, 480); + m_screen->set_visarea(0, 639, 0, 479); + m_screen->set_screen_update(FUNC(crystal_state::screen_update)); + m_screen->screen_vblank().set(FUNC(crystal_state::screen_vblank)); + m_screen->set_palette("palette"); - MCFG_DEVICE_ADD("vr0", VIDEO_VRENDER0, 0, "maincpu") + VIDEO_VRENDER0(config, m_vr0vid, 14318180, m_maincpu); - MCFG_PALETTE_ADD_RRRRRGGGGGGBBBBB("palette") + PALETTE(config, "palette", 65536).set_init("palette", FUNC(palette_device::palette_init_RRRRRGGGGGGBBBBB)); - MCFG_DEVICE_ADD("rtc", DS1302, 32.768_kHz_XTAL) + DS1302(config, m_ds1302, 32.768_kHz_XTAL); SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - MCFG_SOUND_VRENDER0_ADD("vrender", 0) - MCFG_VR0_REGBASE(0x04800000) - MCFG_SOUND_ROUTE(0, "lspeaker", 1.0) - MCFG_SOUND_ROUTE(1, "rspeaker", 1.0) -MACHINE_CONFIG_END + SOUND_VRENDER0(config, m_vr0snd, 0); + m_vr0snd->add_route(0, "lspeaker", 1.0); + m_vr0snd->add_route(1, "rspeaker", 1.0); +} -MACHINE_CONFIG_START(crystal_state::trivrus) +void crystal_state::trivrus(machine_config &config) +{ crystal(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(trivrus_mem) -MACHINE_CONFIG_END + m_maincpu->set_addrmap(AS_PROGRAM, &crystal_state::trivrus_mem); +} -MACHINE_CONFIG_START(crystal_state::crospuzl) +void crystal_state::crospuzl(machine_config &config) +{ crystal(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(crospuzl_mem) -MACHINE_CONFIG_END + m_maincpu->set_addrmap(AS_PROGRAM, &crystal_state::crospuzl_mem); +} -MACHINE_CONFIG_START(crystal_state::crzyddz2) +void crystal_state::crzyddz2(machine_config &config) +{ crystal(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(crzyddz2_mem) -MACHINE_CONFIG_END + m_maincpu->set_addrmap(AS_PROGRAM, &crystal_state::crzyddz2_mem); +} ROM_START( crysbios ) ROM_REGION( 0x20000, "maincpu", 0 ) // bios ROM_LOAD("mx27l1000.u14", 0x000000, 0x020000, CRC(beff39a9) SHA1(b6f6dda58d9c82273f9422c1bd623411e58982cb) ) - ROM_REGION32_LE( 0x3000000, "user1", ROMREGION_ERASEFF ) // Flash - - ROM_REGION( 0x1000000, "user2", ROMREGION_ERASEFF ) // Unmapped flash + ROM_REGION32_LE( 0x1000000, "flash", ROMREGION_ERASEFF ) // Flash ROM_END ROM_START( crysking ) ROM_REGION( 0x20000, "maincpu", 0 ) // bios ROM_LOAD("mx27l1000.u14", 0x000000, 0x020000, CRC(beff39a9) SHA1(b6f6dda58d9c82273f9422c1bd623411e58982cb)) - ROM_REGION32_LE( 0x3000000, "user1", 0 ) // Flash + ROM_REGION32_LE( 0x3000000, "flash", 0 ) // Flash ROM_LOAD("bcsv0004f01.u1", 0x0000000, 0x1000000, CRC(8feff120) SHA1(2ea42fa893bff845b5b855e2556789f8354e9066) ) ROM_LOAD("bcsv0004f02.u2", 0x1000000, 0x1000000, CRC(0e799845) SHA1(419674ce043cb1efb18303f4cb7fdbbae642ee39) ) ROM_LOAD("bcsv0004f03.u3", 0x2000000, 0x1000000, CRC(659e2d17) SHA1(342c98f3f695ef4dea8b533612451c4d2fb58809) ) - - ROM_REGION( 0x1000000, "user2", ROMREGION_ERASEFF ) // Unmapped flash ROM_END ROM_START( evosocc ) ROM_REGION( 0x20000, "maincpu", 0 ) // bios ROM_LOAD("mx27l1000.u14", 0x000000, 0x020000, CRC(beff39a9) SHA1(b6f6dda58d9c82273f9422c1bd623411e58982cb)) - ROM_REGION32_LE( 0x3000000, "user1", 0 ) // Flash + ROM_REGION32_LE( 0x3000000, "flash", 0 ) // Flash ROM_LOAD("bcsv0001u01", 0x0000000, 0x1000000, CRC(2581a0ea) SHA1(ee483ac60a3ed00a21cb515974cec4af19916a7d) ) ROM_LOAD("bcsv0001u02", 0x1000000, 0x1000000, CRC(47ef1794) SHA1(f573706c17d1342b9b7aed9b40b8b648f0bf58db) ) ROM_LOAD("bcsv0001u03", 0x2000000, 0x1000000, CRC(f396a2ec) SHA1(f305eb10856fb5d4c229a6b09d6a2fb21b24ce66) ) - - ROM_REGION( 0x1000000, "user2", ROMREGION_ERASEFF ) // Unmapped flash ROM_END ROM_START( topbladv ) @@ -1579,11 +1630,8 @@ ROM_START( topbladv ) ROM_REGION( 0x4300, "pic", 0 ) // pic16c727 - we don't have a core for this ROM_LOAD("top_blade_v_pic16c727.bin", 0x000000, 0x4300, CRC(9cdea57b) SHA1(884156085f9e780cdf719aedc2e8a0fd5983613b) ) - - ROM_REGION32_LE( 0x3000000, "user1", 0 ) // Flash + ROM_REGION32_LE( 0x1000000, "flash", 0 ) // Flash ROM_LOAD("flash.u1", 0x0000000, 0x1000000, CRC(bd23f640) SHA1(1d22aa2c828642bb7c1dfea4e13f777f95acc701) ) - - ROM_REGION( 0x1000000, "user2", ROMREGION_ERASEFF ) // Unmapped flash ROM_END ROM_START( officeye ) @@ -1593,12 +1641,9 @@ ROM_START( officeye ) ROM_REGION( 0x4280, "pic", 0 ) // pic16f84a - we don't have a core for this ROM_LOAD("office_yeo_in_cheon_ha_pic16f84a.bin", 0x000000, 0x4280, CRC(7561cdf5) SHA1(eade592823a110019b4af81a7dc56d01f7d6589f) ) - - ROM_REGION32_LE( 0x3000000, "user1", 0 ) // Flash + ROM_REGION32_LE( 0x2000000, "flash", 0 ) // Flash ROM_LOAD("flash.u1", 0x0000000, 0x1000000, CRC(d3f3eec4) SHA1(ea728415bd4906964b7d37f4379a8a3bd42a1c2d) ) ROM_LOAD("flash.u2", 0x1000000, 0x1000000, CRC(e4f85d0a) SHA1(2ddfa6b3a30e69754aa9d96434ff3d37784bfa57) ) - - ROM_REGION( 0x1000000, "user2", ROMREGION_ERASEFF ) // Unmapped flash ROM_END ROM_START( donghaer ) @@ -1608,32 +1653,26 @@ ROM_START( donghaer ) ROM_REGION( 0x4280, "pic", 0 ) // pic16f84a - we don't have a core for this (or the dump in this case) ROM_LOAD("donghaer_pic16f84a.bin", 0x000000, 0x4280, NO_DUMP ) - ROM_REGION32_LE( 0x3000000, "user1", 0 ) // Flash + ROM_REGION32_LE( 0x2000000, "flash", 0 ) // Flash ROM_LOAD( "u1", 0x0000000, 0x1000000, CRC(61217ad7) SHA1(2593f1356aa850f4f9aa5d00bec822aa59c59224) ) ROM_LOAD( "u2", 0x1000000, 0x1000000, CRC(6d82f1a5) SHA1(036bd45f0daac1ffeaa5ad9774fc1b56e3c75ff9) ) - - ROM_REGION( 0x1000000, "user2", ROMREGION_ERASEFF ) // Unmapped flash ROM_END ROM_START( trivrus ) ROM_REGION( 0x80000, "maincpu", 0 ) ROM_LOAD( "u4", 0x00000, 0x80000, CRC(2d2e9a11) SHA1(73e7b19a032eae21312ca80f8c42cc16725496a7) ) - ROM_REGION32_LE( 0x3000000, "user1", ROMREGION_ERASEFF ) // Flash + ROM_REGION32_LE( 0x2000000, "flash", ROMREGION_ERASEFF ) // Flash ROM_LOAD( "u3", 0x000000, 0x1000010, CRC(ba901707) SHA1(e281ba07024cd19ef1ab72d2197014f7b1f4d30f) ) - - ROM_REGION( 0x1000000, "user2", ROMREGION_ERASEFF ) // Unmapped flash ROM_END ROM_START( crospuzl ) /* This PCB uses ADC 'Amazon-LF' SoC, EISC CPU core - However PCBs have been see with a standard VRenderZERO+ MagicEyes EISC chip */ ROM_REGION( 0x80010, "maincpu", 0 ) ROM_LOAD("en29lv040a.u5", 0x000000, 0x80010, CRC(d50e8500) SHA1(d681cd18cd0e48854c24291d417d2d6d28fe35c1) ) - ROM_REGION32_LE( 0x8400010, "user1", ROMREGION_ERASEFF ) // Flash + ROM_REGION32_LE( 0x8400010, "flash", ROMREGION_ERASEFF ) // NAND Flash // mostly empty, but still looks good ROM_LOAD("k9f1g08u0a.riser", 0x000000, 0x8400010, CRC(7f3c88c3) SHA1(db3169a7b4caab754e9d911998a2ece13c65ce5b) ) - - ROM_REGION( 0x1000000, "user2", ROMREGION_ERASEFF ) // Unmapped flash ROM_END ROM_START( psattack ) @@ -1646,10 +1685,6 @@ ROM_START( psattack ) DISK_REGION( "cfcard" ) DISK_IMAGE_READONLY( "psattack", 0, SHA1(e99cd0dafc33ec13bf56061f81dc7c0a181594ee) ) - - // keep driver happy - ROM_REGION32_LE( 0x3000000, "user1", ROMREGION_ERASEFF ) - ROM_REGION( 0x1000000, "user2", ROMREGION_ERASEFF ) ROM_END ROM_START( ddz ) @@ -1657,10 +1692,6 @@ ROM_START( ddz ) ROM_LOAD("ddz.001.rom", 0x000000, 0x400000, CRC(b379f823) SHA1(531885b35d668d22c75a9759994f4aca6eacb046) ) ROM_LOAD("ddz.002.rom", 0x400000, 0x400000, CRC(285c744d) SHA1(2f8bc70825e55e3114015cb263e786df35cde275) ) ROM_LOAD("ddz.003.rom", 0x800000, 0x400000, CRC(61c9b5c9) SHA1(0438417398403456a1c49408881797a94aa86f49) ) - - // keep driver happy - ROM_REGION32_LE( 0x3000000, "user1", ROMREGION_ERASEFF ) - ROM_REGION( 0x1000000, "user2", ROMREGION_ERASEFF ) ROM_END @@ -1700,10 +1731,6 @@ ROM_START( crzclass ) // PCB marked MAH-JONG ROM_LOAD("tjf-mahjong-rom2.bin", 0x400000, 0x400000, CRC(2a04e84a) SHA1(189b16fd4314fd2a5f8a1214618b5db83f8ac59a) ) // SHARP LH28F320BJD-TTL80 ROM_LOAD("tjf-mahjong-rom3.bin", 0x800000, 0x400000, CRC(1cacf3f9) SHA1(e6c88c98aeb7df4098f8e20f412018617005724d) ) // SHARP LH28F320BJD-TTL80 // rom4 not populated - - // keep driver happy - ROM_REGION32_LE( 0x3000000, "user1", ROMREGION_ERASEFF ) - ROM_REGION( 0x1000000, "user2", ROMREGION_ERASEFF ) ROM_END /*************************************************************************** @@ -1752,18 +1779,16 @@ Notes: ***************************************************************************/ ROM_START( crzyddz2 ) - ROM_REGION32_LE( 0x3000000, "user1", ROMREGION_ERASEFF ) // Flash + ROM_REGION32_LE( 0x1000000, "flash", 0 ) // Flash ROM_LOAD( "rom.u48", 0x000000, 0x1000000, CRC(0f3a1987) SHA1(6cad943846c79db31226676c7391f32216cfff79) ) ROM_REGION( 0x1000000, "maincpu", ROMREGION_ERASEFF ) - ROM_COPY( "user1", 0x000000, 0x000000, 0x1000000 ) // copy flash here + ROM_COPY( "flash", 0x000000, 0x000000, 0x1000000 ) // copy flash here ROM_LOAD( "27c322.u49", 0x000000, 0x0200000, CRC(b3177f39) SHA1(2a28bf8045bd2e053d88549b79fbc11f30ef9a32) ) // 1ST AND 2ND HALF IDENTICAL ROM_CONTINUE( 0x000000, 0x0200000 ) ROM_REGION( 0x4280, "pic", 0 ) // hy04 ROM_LOAD("hy04", 0x000000, 0x4280, NO_DUMP ) - - ROM_REGION( 0x1000000, "user2", ROMREGION_ERASEFF ) // Unmapped flash ROM_END /*************************************************************************** @@ -1776,23 +1801,21 @@ Red PCB, very similar to crzyddz2 ***************************************************************************/ ROM_START( menghong ) - ROM_REGION32_LE( 0x3000000, "user1", ROMREGION_ERASEFF ) // Flash + ROM_REGION32_LE( 0x1000000, "flash", 0 ) // Flash ROM_LOAD( "rom.u48", 0x000000, 0x1000000, CRC(e24257c4) SHA1(569d79a61ff6d35100ba5727069363146df9e0b7) ) ROM_REGION( 0x1000000, "maincpu", 0 ) - ROM_COPY( "user1", 0x000000, 0x000000, 0x1000000 ) // copy flash here + ROM_COPY( "flash", 0x000000, 0x000000, 0x1000000 ) // copy flash here ROM_LOAD( "060511_08-01-18.u49", 0x000000, 0x0200000, CRC(b0c12107) SHA1(b1753757bbdb7d996df563ac6abdc6b46676704b) ) // 27C160 ROM_REGION( 0x4280, "pic", 0 ) // hy04 ROM_LOAD("menghong_hy04", 0x000000, 0x4280, NO_DUMP ) - - ROM_REGION( 0x1000000, "user2", ROMREGION_ERASEFF ) // Unmapped flash ROM_END void crystal_state::init_crysking() { - uint16_t *Rom = (uint16_t*) memregion("user1")->base(); + uint16_t *Rom = (uint16_t*) memregion("flash")->base(); //patch the data feed by the protection @@ -1811,7 +1834,7 @@ void crystal_state::init_crysking() void crystal_state::init_evosocc() { - uint16_t *Rom = (uint16_t*) memregion("user1")->base(); + uint16_t *Rom = (uint16_t*) memregion("flash")->base(); Rom += 0x1000000 * 2 / 2; Rom[WORD_XOR_LE(0x97388E/2)] = 0x90FC; //PUSH R2..R7 @@ -1839,7 +1862,7 @@ also it seems that bit 0x40000000 is the PIC reset. void crystal_state::init_topbladv() { // patches based on analysis of PIC dump - uint16_t *Rom = (uint16_t*) memregion("user1")->base(); + uint16_t *Rom = (uint16_t*) memregion("flash")->base(); /* PIC Protection data: - RAM ADDR - --PATCH-- @@ -1866,7 +1889,7 @@ void crystal_state::init_topbladv() void crystal_state::init_officeye() { // patches based on analysis of PIC dump - uint16_t *Rom = (uint16_t*) memregion("user1")->base(); + uint16_t *Rom = (uint16_t*) memregion("flash")->base(); /* PIC Protection data: @@ -1892,7 +1915,7 @@ void crystal_state::init_officeye() void crystal_state::init_donghaer() { - uint16_t *Rom = (uint16_t*)memregion("user1")->base(); + uint16_t *Rom = (uint16_t*)memregion("flash")->base(); Rom[WORD_XOR_LE(0x037A2 / 2)] = 0x9004; // PUSH %R2 Rom[WORD_XOR_LE(0x037A4 / 2)] = 0x8202; // LD (%SP,0x8),%R2 @@ -1920,10 +1943,10 @@ GAME( 2001, officeye, 0, crystal, officeye, crystal_state, init_officeye GAME( 2001, donghaer, 0, crystal, crystal, crystal_state, init_donghaer, ROT0, "Danbi", "Donggul Donggul Haerong", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) GAME( 2004?,menghong, 0, crzyddz2, crzyddz2, crystal_state, empty_init, ROT0, "Sealy", "Meng Hong Lou", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) GAME( 2006, crzyddz2, 0, crzyddz2, crzyddz2, crystal_state, empty_init, ROT0, "Sealy", "Crazy Dou Di Zhu II", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2009, trivrus, 0, trivrus, trivrus, crystal_state, empty_init, ROT0, "AGT", "Trivia R Us (v1.07)", 0 ) // has a CF card instead of flash roms +GAME( 2009, trivrus, 0, trivrus, trivrus, crystal_state, empty_init, ROT0, "AGT", "Trivia R Us (v1.07)", 0 ) GAME( 200?, crospuzl, 0, crospuzl, crospuzl, crystal_state, empty_init, ROT0, "<unknown>", "Cross Puzzle", MACHINE_NOT_WORKING ) -GAME( 2004, psattack, 0, crystal, crystal, crystal_state, init_psattack, ROT0, "Uniana", "P's Attack", MACHINE_IS_SKELETON ) +GAME( 2004, psattack, 0, crystal, crystal, crystal_state, init_psattack, ROT0, "Uniana", "P's Attack", MACHINE_IS_SKELETON ) // has a CF card instead of flash roms // looks like the same kind of hw from strings in the ROM, but scrambled / encrypted? GAME( 200?, ddz, 0, crystal, crystal, crystal_state, empty_init, ROT0, "IGS?", "Dou Di Zhu", MACHINE_IS_SKELETON ) GAME( 200?, crzclass, 0, crystal, crystal, crystal_state, empty_init, ROT0, "TJF", "Zhaoji Fengdou", MACHINE_IS_SKELETON ) // 'Crazy Class' diff --git a/src/mame/drivers/ct486.cpp b/src/mame/drivers/ct486.cpp index 2f42882ff79..fddaafe2d65 100644 --- a/src/mame/drivers/ct486.cpp +++ b/src/mame/drivers/ct486.cpp @@ -132,15 +132,16 @@ MACHINE_CONFIG_START(ct486_state::ct486) RAM(config, RAM_TAG).set_default_size("4M").set_extra_options("1M,2M,8M,16M,32M,64M"); - at_keyboard_controller_device &keybc(AT_KEYBOARD_CONTROLLER(config, "keybc", XTAL(12'000'000))); - keybc.system_reset_cb().set("cs4031", FUNC(cs4031_device::kbrst_w)); - keybc.gate_a20_cb().set("cs4031", FUNC(cs4031_device::gatea20_w)); - keybc.input_buffer_full_cb().set("cs4031", FUNC(cs4031_device::irq01_w)); - keybc.keyboard_clock_cb().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); - keybc.keyboard_data_cb().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + at_kbc_device_base &keybc(AT_KEYBOARD_CONTROLLER(config, "keybc", XTAL(12'000'000))); + keybc.hot_res().set("cs4031", FUNC(cs4031_device::kbrst_w)); + keybc.gate_a20().set("cs4031", FUNC(cs4031_device::gatea20_w)); + keybc.kbd_irq().set("cs4031", FUNC(cs4031_device::irq01_w)); + keybc.kbd_clk().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); + keybc.kbd_data().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + MCFG_DEVICE_ADD("pc_kbdc", PC_KBDC, 0) - MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_clock_w)) - MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_data_w)) + MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_kbc_device_base, kbd_clk_w)) + MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_kbc_device_base, kbd_data_w)) MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL) MCFG_DEVICE_ADD("isabus", ISA16, 0) diff --git a/src/mame/drivers/czk80.cpp b/src/mame/drivers/czk80.cpp index fcedf34fb1a..e9c165ce16a 100644 --- a/src/mame/drivers/czk80.cpp +++ b/src/mame/drivers/czk80.cpp @@ -195,7 +195,7 @@ MACHINE_CONFIG_START(czk80_state::czk80) MCFG_DEVICE_ADD(m_terminal, GENERIC_TERMINAL, 0) MCFG_GENERIC_TERMINAL_KEYBOARD_CB(PUT(czk80_state, kbd_put)) - MCFG_UPD765A_ADD("fdc", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("fdc:0", czk80_floppies, "525dd", floppy_image_device::default_floppy_formats) z80ctc_device& ctc(Z80CTC(config, "ctc", XTAL(16'000'000) / 4)); diff --git a/src/mame/drivers/d400.cpp b/src/mame/drivers/d400.cpp index be5aed24c18..6d65cf9f191 100644 --- a/src/mame/drivers/d400.cpp +++ b/src/mame/drivers/d400.cpp @@ -10,7 +10,7 @@ Skeleton driver for Data General Dasher 400 series terminals. #include "cpu/m6809/m6809.h" #include "machine/mc68681.h" #include "machine/x2212.h" -//#include "video/crt9007.h" +#include "video/crt9007.h" #include "screen.h" class d400_state : public driver_device @@ -62,7 +62,7 @@ READ8_MEMBER(d400_state::novram_store_r) void d400_state::mem_map(address_map &map) { map(0x0000, 0x3fff).ram(); - //AM_RANGE(0x4000, 0x403f) AM_DEVREADWRITE("vpac", crt9007_device, read, write) + map(0x4000, 0x403f).rw("vpac", FUNC(crt9007_device::read), FUNC(crt9007_device::write)); map(0x4800, 0x48ff).ram(); map(0x5000, 0x50ff).ram(); map(0x6000, 0x6fff).ram(); @@ -74,23 +74,29 @@ void d400_state::mem_map(address_map &map) map(0x8000, 0xffff).rom().region("maincpu", 0); } -static INPUT_PORTS_START( d461 ) +static INPUT_PORTS_START(d461) INPUT_PORTS_END -MACHINE_CONFIG_START(d400_state::d461) - MCFG_DEVICE_ADD("maincpu", MC6809E, 4'000'000) // HD68B09EP - MCFG_DEVICE_PROGRAM_MAP(mem_map) +void d400_state::d461(machine_config &config) +{ + MC6809E(config, m_maincpu, 59.292_MHz_XTAL / 30); // HD68B09EP (clock not verified) + m_maincpu->set_addrmap(AS_PROGRAM, &d400_state::mem_map); + + X2210(config, "novram"); - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_RAW_PARAMS(XTAL(59'292'000) / 3, 1080, 0, 810, 305, 0, 300) // yes, 81 columns - //MCFG_SCREEN_RAW_PARAMS(XTAL(59'292'000) / 2, 1620, 0, 1215, 305, 0, 300) // for 135-column mode - MCFG_SCREEN_UPDATE_DRIVER(d400_state, screen_update) + scn2681_device &duart(SCN2681(config, "duart", 3.6864_MHz_XTAL)); + duart.irq_cb().set_inputline(m_maincpu, M6809_FIRQ_LINE); - MCFG_DEVICE_ADD("novram", X2210, 0) + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(59.292_MHz_XTAL / 3, 1080, 0, 810, 305, 0, 300); // yes, 81 columns + //screen.set_raw(59.292_MHz_XTAL / 2, 1620, 0, 1215, 305, 0, 300); // for 135-column mode + screen.set_screen_update(FUNC(d400_state::screen_update)); - MCFG_DEVICE_ADD("duart", SCN2681, XTAL(3'686'400)) - MCFG_MC68681_IRQ_CALLBACK(INPUTLINE("maincpu", M6809_FIRQ_LINE)) -MACHINE_CONFIG_END + crt9007_device &vpac(CRT9007(config, "vpac", 59.292_MHz_XTAL / 30)); + vpac.set_screen("screen"); + vpac.set_character_width(10); // 9 in 135-column mode + vpac.int_callback().set_inputline(m_maincpu, M6809_IRQ_LINE); +} diff --git a/src/mame/drivers/dec0.cpp b/src/mame/drivers/dec0.cpp index 445892464e9..f28fd4e6719 100644 --- a/src/mame/drivers/dec0.cpp +++ b/src/mame/drivers/dec0.cpp @@ -2363,7 +2363,7 @@ ROM_START( drgninjab2 ) ROM_LOAD( "a15.7b", 0x8000, 0x8000, CRC(82007af2) SHA1(f0db1b1dab199df402a7590e56d4d5ab4baca803) ) // 99.612427% ROM_REGION( 0x1000, "mcu", 0 ) /* 68705 microcontroller */ - ROM_LOAD( "mc68705r3p", 0x0000, 0x1000, NO_DUMP ) + ROM_LOAD( "68705r3.0m", 0x0000, 0x1000, CRC(34bc5e7f) SHA1(7231dd7eb9b5152a287e1bcceb3c3a0b35f441af) ) ROM_REGION( 0x10000, "gfx1", 0 ) /* chars */ ROM_LOAD( "a22.9m", 0x00000, 0x08000, CRC(6791bc20) SHA1(7240b2688cda04ee9ea331472a84fbffc85b8e90) ) // 99.996948% @@ -3797,7 +3797,7 @@ GAME( 1988, drgninjab, baddudes, drgninjab, drgninja, dec0_state, init_drgni GAME( 1989, midresb, midres, midresb, midresb, dec0_state, init_midresb, ROT0, "bootleg", "Midnight Resistance (bootleg with 68705)", MACHINE_SUPPORTS_SAVE ) // need to hook up 68705? (probably unused) GAME( 1989, midresbj, midres, midresbj, midresb, dec0_state, init_midresb, ROT0, "bootleg", "Midnight Resistance (Joystick bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1989, ffantasybl, hippodrm, ffantasybl, ffantasybl, dec0_state, init_ffantasybl, ROT0, "bootleg", "Fighting Fantasy (bootleg with 68705)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // 68705 not dumped, might be the same as midresb -GAME( 1988, drgninjab2, baddudes, drgninjab, drgninja, dec0_state, init_drgninja, ROT0, "bootleg", "Dragonninja (bootleg with 68705)", MACHINE_SUPPORTS_SAVE ) // is this the same board as above? (region warning hacked to World, but still shows Japanese text) +GAME( 1988, drgninjab2, baddudes, drgninjab, drgninja, dec0_state, init_drgninja, ROT0, "bootleg", "Dragonninja (bootleg with 68705)", MACHINE_SUPPORTS_SAVE ) // is this the same board as above? (region warning hacked to World, but still shows Japanese text), 68705 dumped but not hooked up // these are different to the above but quite similar to each other GAME( 1988, automat, robocop, automat, robocop, dec0_automat_state, empty_init, ROT0, "bootleg", "Automat (bootleg of Robocop)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) // sound rom / music from section z with mods for ADPCM? diff --git a/src/mame/drivers/decwritr.cpp b/src/mame/drivers/decwritr.cpp index 46c0f0be4f7..e1e2b450db7 100644 --- a/src/mame/drivers/decwritr.cpp +++ b/src/mame/drivers/decwritr.cpp @@ -255,8 +255,7 @@ void decwriter_state::la120_mem(address_map &map) void decwriter_state::la120_io(address_map &map) { map.unmap_value_high(); - map(0x00, 0x00).mirror(0x7C).rw(m_usart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); // 8251 Data - map(0x01, 0x01).mirror(0x7C).rw(m_usart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); // 8251 Status/Control + map(0x00, 0x01).mirror(0x7C).rw(m_usart, FUNC(i8251_device::read), FUNC(i8251_device::write)); // 8251 Status/Control //map(0x02, 0x02).mirror(0x7D); // other io ports, serial loopback etc, see table 4-9 in TM // 0x80-0xff are reserved for expansion (i.e. unused, open bus) map.global_mask(0xff); @@ -462,7 +461,7 @@ MACHINE_CONFIG_START(decwriter_state::la120) MCFG_RS232_DSR_HANDLER(WRITELINE("usart", i8251_device, write_dsr)) */ - MCFG_DEVICE_ADD("nvm", ER1400, 0) + ER1400(config, m_nvm); MACHINE_CONFIG_END diff --git a/src/mame/drivers/dim68k.cpp b/src/mame/drivers/dim68k.cpp index 77e7952dac6..f68c5eb3ccc 100644 --- a/src/mame/drivers/dim68k.cpp +++ b/src/mame/drivers/dim68k.cpp @@ -331,7 +331,7 @@ MACHINE_CONFIG_START(dim68k_state::dim68k) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50) /* Devices */ - MCFG_UPD765A_ADD("fdc", true, true) // these options unknown + UPD765A(config, "fdc", true, true); // these options unknown MCFG_FLOPPY_DRIVE_ADD("fdc:0", dim68k_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:1", dim68k_floppies, "525hd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/dkmb.cpp b/src/mame/drivers/dkmb.cpp index 6534feed830..617f45138cf 100644 --- a/src/mame/drivers/dkmb.cpp +++ b/src/mame/drivers/dkmb.cpp @@ -106,7 +106,7 @@ void dkmb_state::main_map(address_map &map) map(0x020c0000, 0x020c0007).ram(); // write map(0x020c0010, 0x020c0017).r(FUNC(dkmb_state::unk_20c0010_r)); // read - map(0x04090000, 0x0409ffff).ram(); // size uncertain + map(0x04090000, 0x0409ffff).ram(); // size uncertain // map(0xff000000, 0xff0fffff) // looks like flash ROM access, mirror of main ROM or just checking if extra exist? // map(0xff800000, 0xff8fffff) // looks like flash ROM access, mirror of main ROM or just checking if extra exist? @@ -145,12 +145,12 @@ ROM_START( dkmb ) ROM_REGION( 0x1000, "pic", 0 ) /* - Intel HEX format dump. When converted to binary using - "srec_cat.exe 12c508.u12 -intel -o 12c508.bin -binary" - this contains only the string - "Copyright 2001 Core Technologies why are you looking in here?" - in the first 0x80 bytes, which is the unprotected area of the PIC. - the rest is blank, therefore protected and a bad dump + Intel HEX format dump. When converted to binary using + "srec_cat.exe 12c508.u12 -intel -o 12c508.bin -binary" + this contains only the string + "Copyright 2001 Core Technologies why are you looking in here?" + in the first 0x80 bytes, which is the unprotected area of the PIC. + the rest is blank, therefore protected and a bad dump */ ROM_LOAD("12c508.u12", 0x000, 0x09db, BAD_DUMP CRC(3adb3e33) SHA1(36a96886d83b64633eea83e57bdfa8a20c6d4f6a) ) ROM_END diff --git a/src/mame/drivers/dmv.cpp b/src/mame/drivers/dmv.cpp index 5232bdda4f7..23a5c3ead87 100644 --- a/src/mame/drivers/dmv.cpp +++ b/src/mame/drivers/dmv.cpp @@ -821,9 +821,9 @@ MACHINE_CONFIG_START(dmv_state::dmv) m_dmac->out_iow_callback<3>().set(m_fdc, FUNC(i8272a_device::mdma_w)); m_dmac->out_dack_callback<3>().set(FUNC(dmv_state::dmac_dack3)); - MCFG_I8272A_ADD( "i8272", true ) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, dmv_state, fdc_irq)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dma8237", am9517a_device, dreq3_w)) + I8272A(config, m_fdc, true); + m_fdc->intrq_wr_callback().set(FUNC(dmv_state::fdc_irq)); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq3_w)); MCFG_FLOPPY_DRIVE_ADD("i8272:0", dmv_floppies, "525dd", dmv_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("i8272:1", dmv_floppies, "525dd", dmv_state::floppy_formats) diff --git a/src/mame/drivers/dps1.cpp b/src/mame/drivers/dps1.cpp index 8d104b1fdc0..ecc3c5c7931 100644 --- a/src/mame/drivers/dps1.cpp +++ b/src/mame/drivers/dps1.cpp @@ -218,9 +218,9 @@ MACHINE_CONFIG_START(dps1_state::dps1) AM9519(config, "am9519b", 0); // floppy - MCFG_UPD765A_ADD("fdc", false, true) - //MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, dps1_state, fdc_int_w)) // doesn't appear to be used - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, dps1_state, fdc_drq_w)) + UPD765A(config, m_fdc, false, true); + //m_fdc->intrq_wr_callback().set(FUNC(dps1_state::fdc_int_w)); // doesn't appear to be used + m_fdc->drq_wr_callback().set(FUNC(dps1_state::fdc_drq_w)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", floppies, "floppy0", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_SOUND(true) //MCFG_FLOPPY_DRIVE_ADD("fdc:1", floppies, "floppy1", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/dribling.cpp b/src/mame/drivers/dribling.cpp index 01351167c26..93a9694ce31 100644 --- a/src/mame/drivers/dribling.cpp +++ b/src/mame/drivers/dribling.cpp @@ -148,9 +148,9 @@ WRITE8_MEMBER(dribling_state::shr_w) READ8_MEMBER(dribling_state::ioread) { if (offset & 0x08) - return m_ppi8255_0->read(space, offset & 3); + return m_ppi8255_0->read(offset & 3); else if (offset & 0x10) - return m_ppi8255_1->read(space, offset & 3); + return m_ppi8255_1->read(offset & 3); return 0xff; } @@ -158,9 +158,9 @@ READ8_MEMBER(dribling_state::ioread) WRITE8_MEMBER(dribling_state::iowrite) { if (offset & 0x08) - m_ppi8255_0->write(space, offset & 3, data); + m_ppi8255_0->write(offset & 3, data); else if (offset & 0x10) - m_ppi8255_1->write(space, offset & 3, data); + m_ppi8255_1->write(offset & 3, data); else if (offset & 0x40) { m_dr = m_ds; diff --git a/src/mame/drivers/duet16.cpp b/src/mame/drivers/duet16.cpp index 382be0445b9..3b37314e0c3 100644 --- a/src/mame/drivers/duet16.cpp +++ b/src/mame/drivers/duet16.cpp @@ -94,12 +94,12 @@ void duet16_state::machine_reset() READ8_MEMBER(duet16_state::pic_r) { - return m_pic->read(space, offset ^ 1, mem_mask); + return m_pic->read(offset ^ 1); } WRITE8_MEMBER(duet16_state::pic_w) { - m_pic->write(space, offset ^ 1, data); + m_pic->write(offset ^ 1, data); } WRITE8_MEMBER(duet16_state::fdcctrl_w) @@ -157,12 +157,11 @@ void duet16_state::duet16_mem(address_map &map) map(0xf8040, 0xf804f).rw("itm", FUNC(ptm6840_device::read), FUNC(ptm6840_device::write)).umask16(0x00ff); map(0xf8060, 0xf8067).rw("bgpit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff); map(0xf8080, 0xf8087).rw("sio", FUNC(upd7201_new_device::ba_cd_r), FUNC(upd7201_new_device::ba_cd_w)).umask16(0x00ff); - map(0xf80a0, 0xf80a0).rw("kbusart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf80a2, 0xf80a2).rw("kbusart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xf80a0, 0xf80a3).rw("kbusart", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0xf80c0, 0xf80c0).rw("crtc", FUNC(h46505_device::status_r), FUNC(h46505_device::address_w)); map(0xf80c2, 0xf80c2).rw("crtc", FUNC(h46505_device::register_r), FUNC(h46505_device::register_w)); map(0xf80e0, 0xf80e3).rw("i8741", FUNC(upi41_cpu_device::upi41_master_r), FUNC(upi41_cpu_device::upi41_master_w)).umask16(0x00ff); - map(0xf8100, 0xf8103).m("fdc", FUNC(upd765a_device::map)).umask16(0x00ff); + map(0xf8100, 0xf8103).m(m_fdc, FUNC(upd765a_device::map)).umask16(0x00ff); map(0xf8120, 0xf8120).rw(FUNC(duet16_state::rtc_r), FUNC(duet16_state::rtc_w)); map(0xf8160, 0xf819f).w(FUNC(duet16_state::pal_w)); map(0xf8200, 0xf8201).r(FUNC(duet16_state::sysstat_r)); @@ -407,9 +406,9 @@ MACHINE_CONFIG_START(duet16_state::duet16) MCFG_INPUT_MERGER_ANY_HIGH("tmint") MCFG_INPUT_MERGER_OUTPUT_HANDLER(WRITELINE("pic", pic8259_device, ir0_w)) // INT6 - MCFG_UPD765A_ADD("fdc", true, false) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dmac", am9517a_device, dreq0_w)) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE("pic", pic8259_device, ir3_w)) // INT4 + UPD765A(config, m_fdc, true, false); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq0_w)); + m_fdc->intrq_wr_callback().set(m_pic, FUNC(pic8259_device::ir3_w)); // INT4 MCFG_FLOPPY_DRIVE_ADD("fdc:0", duet16_floppies, "525qd", floppy_image_device::default_floppy_formats) MCFG_SLOT_FIXED(true) MCFG_FLOPPY_DRIVE_ADD("fdc:1", duet16_floppies, "525qd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/dunhuang.cpp b/src/mame/drivers/dunhuang.cpp index 85d0608546a..63365fbbb81 100644 --- a/src/mame/drivers/dunhuang.cpp +++ b/src/mame/drivers/dunhuang.cpp @@ -826,7 +826,8 @@ MACHINE_CONFIG_START(dunhuang_state::dunhuang) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_dunhuang) MCFG_PALETTE_ADD("palette", 0x100) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") // HMC HM86171 VGA 256 colour RAMDAC + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); // HMC HM86171 VGA 256 colour RAMDAC + ramdac.set_addrmap(0, &dunhuang_state::ramdac_map); /* sound hardware */ SPEAKER(config, "mono").front_center(); diff --git a/src/mame/drivers/dvk_ksm.cpp b/src/mame/drivers/dvk_ksm.cpp index cc9e8188705..7f2ce0b4754 100644 --- a/src/mame/drivers/dvk_ksm.cpp +++ b/src/mame/drivers/dvk_ksm.cpp @@ -174,10 +174,8 @@ void ksm_state::ksm_io(address_map &map) { map.unmap_value_high(); map(0x5e, 0x5f).rw(m_pic8259, FUNC(pic8259_device::read), FUNC(pic8259_device::write)); - map(0x6e, 0x6e).rw(m_i8251kbd, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x6f, 0x6f).rw(m_i8251kbd, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x76, 0x76).rw(m_i8251line, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x77, 0x77).rw(m_i8251line, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x6e, 0x6f).rw(m_i8251kbd, FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x76, 0x77).rw(m_i8251line, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x78, 0x7b).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)); } diff --git a/src/mame/drivers/ec7915.cpp b/src/mame/drivers/ec7915.cpp index 37edfc352fa..e2e8de9a3fb 100644 --- a/src/mame/drivers/ec7915.cpp +++ b/src/mame/drivers/ec7915.cpp @@ -46,8 +46,7 @@ void ec7915_state::io_map(address_map &map) { map(0x00, 0x03).rw("ppi1", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x04, 0x07).rw("ppi2", FUNC(i8255_device::read), FUNC(i8255_device::write)); - map(0x08, 0x08).rw("usart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x09, 0x09).rw("usart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x08, 0x09).rw("usart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x0c, 0x0f).rw("ppi3", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x10, 0x13).w("pit", FUNC(pit8253_device::write)); //map(0x14, 0x14).w("picu", FUNC(i8214_device::write)); diff --git a/src/mame/drivers/ecoinfr.cpp b/src/mame/drivers/ecoinfr.cpp index bd7facf240d..18cc6751b29 100644 --- a/src/mame/drivers/ecoinfr.cpp +++ b/src/mame/drivers/ecoinfr.cpp @@ -488,8 +488,7 @@ void ecoinfr_state::memmap(address_map &map) map(0x0000, 0x7fff).rom(); map(0x8000, 0x9fff).ram(); - map(0xa000, 0xa000).rw(UPD8251_TAG, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xa001, 0xa001).rw(UPD8251_TAG, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xa000, 0xa001).rw(UPD8251_TAG, FUNC(i8251_device::read), FUNC(i8251_device::write)); } diff --git a/src/mame/drivers/einstein.cpp b/src/mame/drivers/einstein.cpp index 7b5a7951cd0..a284efde7fc 100644 --- a/src/mame/drivers/einstein.cpp +++ b/src/mame/drivers/einstein.cpp @@ -430,8 +430,7 @@ void einstein_state::einstein_io(address_map &map) map(0x03, 0x03).mirror(0xff04).w(m_psg, FUNC(ay8910_device::data_w)); map(0x08, 0x08).mirror(0xff06).rw("vdp", FUNC(tms9129_device::vram_r), FUNC(tms9129_device::vram_w)); map(0x09, 0x09).mirror(0xff06).rw("vdp", FUNC(tms9129_device::register_r), FUNC(tms9129_device::register_w)); - map(0x10, 0x10).mirror(0xff06).rw(IC_I060, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x11, 0x11).mirror(0xff06).rw(IC_I060, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x10, 0x11).mirror(0xff06).rw(IC_I060, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x18, 0x1b).mirror(0xff04).rw(m_fdc, FUNC(wd1770_device::read), FUNC(wd1770_device::write)); map(0x20, 0x20).mirror(0xff00).rw(FUNC(einstein_state::kybint_msk_r), FUNC(einstein_state::kybint_msk_w)); map(0x21, 0x21).mirror(0xff00).w(FUNC(einstein_state::adcint_msk_w)); diff --git a/src/mame/drivers/elwro800.cpp b/src/mame/drivers/elwro800.cpp index 3cc87788e42..778ff0052bf 100644 --- a/src/mame/drivers/elwro800.cpp +++ b/src/mame/drivers/elwro800.cpp @@ -277,7 +277,7 @@ READ8_MEMBER(elwro800_state::elwro800jr_io_r) else if (!BIT(cs,2)) { // CS55 - return m_i8255->read(space, (offset & 0x03) ^ 0x03); + return m_i8255->read((offset & 0x03) ^ 0x03); } else if (!BIT(cs,3)) { @@ -294,14 +294,7 @@ READ8_MEMBER(elwro800_state::elwro800jr_io_r) else if (!BIT(cs,4)) { // CS51 - if (offset & 1) - { - return m_i8251->status_r(space, 0); - } - else - { - return m_i8251->data_r(space, 0); - } + return m_i8251->read(offset & 1); } else if (!BIT(cs,5)) { @@ -332,7 +325,7 @@ WRITE8_MEMBER(elwro800_state::elwro800jr_io_w) else if (!BIT(cs,2)) { // CS55 - m_i8255->write(space, (offset & 0x03) ^ 0x03, data); + m_i8255->write((offset & 0x03) ^ 0x03, data); } else if (!BIT(cs,3)) { @@ -345,14 +338,7 @@ WRITE8_MEMBER(elwro800_state::elwro800jr_io_w) else if (!BIT(cs,4)) { // CS51 - if (offset & 1) - { - m_i8251->control_w(space, 0, data); - } - else - { - m_i8251->data_w(space, 0, data); - } + m_i8251->write(offset & 1, data); } else if (!BIT(cs,5)) { diff --git a/src/mame/drivers/emma2.cpp b/src/mame/drivers/emma2.cpp new file mode 100644 index 00000000000..2a1fa2ebfdb --- /dev/null +++ b/src/mame/drivers/emma2.cpp @@ -0,0 +1,235 @@ +// license:BSD-3-Clause +// copyright-holders:Robbbert +/*************************************************************************** + +Emma and Emma II by L.J.Technical Systems +These were produced by L.J.Electronics Ltd, Norwich in 1979. + +2018-09-20 Working driver. + +We don't have roms for the Emma, so only the Emma II is emulated. + +Keys: +0-9,A-F: hex input +M : memory mode (modify address, or modify data) +G : go +R : single step (not emulated) +P : insert a forced break +S : save to cassette +L : load from cassette ++ : up (use UP-arrow key) +- : down (use DOWN-arrow key) + +Pasting example: +M0020M01^02^03^04^05^06^07^08^09^M000020 +Press up arrow to see your input. + +To save, press S, enter beginning address, press S, enter end address+1, +press S, start the recorder, press 0 for 300 baud or 1 for 1200 baud. The +data is saved. + +To load, press L, press play, while leader is playing press 0 or 1 as above. +When a row of dots appears, the data has been loaded. + + +There's an expansion unit with its own rom, a 8255, an eprom programmer, +and 16k of static RAM. + + + +To Do: +- Cassette LED doesn't work. +- Display should blank if PB0 not being pulsed. +- Code up the expansion unit (rom is there but no schematic exists) +- Need software. + + +****************************************************************************/ + +#include "emu.h" +#include "cpu/m6502/m6502.h" +#include "machine/6522via.h" +#include "machine/6821pia.h" +#include "imagedev/cassette.h" +#include "sound/wave.h" +#include "speaker.h" +#include "emma2.lh" + + +class emma2_state : public driver_device +{ +public: + emma2_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_cassette(*this, "cassette") + , m_via(*this, "via") + , m_pia(*this, "pia") + , m_keyboard(*this, "X%u", 0) + , m_digits(*this, "digit%u", 0U) + { } + + void emma2(machine_config &config); + +private: + DECLARE_WRITE8_MEMBER(segment_w); + DECLARE_WRITE8_MEMBER(digit_w); + DECLARE_READ8_MEMBER(keyboard_r); + virtual void machine_reset() override; + virtual void machine_start() override; + + void mem_map(address_map &map); + + uint8_t m_digit; + bool m_dig_change; + required_device<cpu_device> m_maincpu; + required_device<cassette_image_device> m_cassette; + required_device<via6522_device> m_via; + required_device<pia6821_device> m_pia; + required_ioport_array<8> m_keyboard; + output_finder<8> m_digits; +}; + +void emma2_state::mem_map(address_map &map) +{ + map.unmap_value_high(); + map(0x0000, 0x03ff).ram(); + map(0x0900, 0x090f).mirror(0x02f0).rw(m_via, FUNC(via6522_device::read), FUNC(via6522_device::write)); + map(0x0a00, 0x0a03).mirror(0x00fc).rw(m_pia, FUNC(pia6821_device::read), FUNC(pia6821_device::write)); + map(0x0c00, 0x0fff).ram(); + map(0xd800, 0xdfff).mirror(0x2000).rom(); +} + + +/* Input ports */ +static INPUT_PORTS_START( emma2 ) +/* +M L 0 4 8 C +G R 1 5 9 D +P + 2 6 A E +S - 3 7 B F +*/ + + PORT_START("X0") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('M') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') + + PORT_START("X1") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('G') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') + + PORT_START("X2") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('A') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('P') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') + + PORT_START("X3") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('B') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('S') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') + + PORT_START("X4") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('C') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('L') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') + + PORT_START("X5") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('D') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('R') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') + + PORT_START("X6") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('E') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR('^') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') + + PORT_START("X7") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('F') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR('V') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') +INPUT_PORTS_END + + +WRITE8_MEMBER( emma2_state::digit_w ) +{ + m_cassette->output( BIT(data, 6) ? +1.0 : -1.0); + + data &= 7; + if (data != m_digit) + { + m_digit = data; + m_dig_change = true; + } +} + +WRITE8_MEMBER( emma2_state::segment_w ) +{ + if (m_dig_change) + { + m_dig_change = false; + m_digits[m_digit] = data; + } +} + +READ8_MEMBER( emma2_state::keyboard_r ) +{ + u8 data = m_keyboard[m_digit]->read(); + data |= ((m_cassette)->input() < 0.0) ? 0x80 : 0; + return data; +} + +void emma2_state::machine_start() +{ + m_digits.resolve(); +} + +void emma2_state::machine_reset() +{ + m_digit = 0; + m_dig_change = 0; +} + +MACHINE_CONFIG_START(emma2_state::emma2) + /* basic machine hardware */ + MCFG_DEVICE_ADD("maincpu", M6502, 1'000'000) + MCFG_DEVICE_PROGRAM_MAP(mem_map) + + /* video hardware */ + config.set_default_layout(layout_emma2); + + /* Devices */ + VIA6522(config, m_via, 1'000'000); // #2 from cpu + m_via->irq_handler().set_inputline(m_maincpu, m6502_device::IRQ_LINE); + + PIA6821(config, m_pia, 0); + m_pia->writepa_handler().set(FUNC(emma2_state::segment_w)); + m_pia->writepb_handler().set(FUNC(emma2_state::digit_w)); + m_pia->readpb_handler().set(FUNC(emma2_state::keyboard_r)); + m_pia->ca2_handler().set([this] (bool state) { output().set_value("led0", state); }); + m_pia->irqa_handler().set_inputline(m_maincpu, m6502_device::IRQ_LINE); + m_pia->irqb_handler().set_inputline(m_maincpu, m6502_device::IRQ_LINE); + + /* cassette */ + MCFG_CASSETTE_ADD( "cassette" ) + MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_MOTOR_ENABLED | CASSETTE_SPEAKER_ENABLED) + + /* sound hardware */ + SPEAKER(config, "mono").front_center(); + WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "mono", 0.05); +MACHINE_CONFIG_END + + +/* ROM definition */ +ROM_START( emma2 ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD( "se118a_90-97", 0x9000, 0x0800, CRC(32d36938) SHA1(910fd1c18c7deae83933c7c4f397103a35bf574a) ) + ROM_LOAD( "se116a_d8-dd_fe-ff", 0xd800, 0x0800, CRC(ef0f1513) SHA1(46089ba0402828b4204812a04134b313d9be0f93) ) +ROM_END + + +/* Driver */ + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +COMP( 1979, emma2, 0, 0, emma2, emma2, emma2_state, empty_init, "L.J.Technical Systems", "Emma II trainer", 0 ) diff --git a/src/mame/drivers/esprit.cpp b/src/mame/drivers/esprit.cpp index 723ba2c5795..b59d8e5de7e 100644 --- a/src/mame/drivers/esprit.cpp +++ b/src/mame/drivers/esprit.cpp @@ -8,13 +8,17 @@ Hazeltine Esprit terminals. Espirit: R6502P, R6531, HD46505RP, MC6850P, 16.5888 -Espirit3: 2x R6551AP, HD46850P (6850), R6502BP, R6545-1AP, R6522AP, 1.8432, 17.9712 +Espirit3: 2x R6551AP, HD46850P (6850), R6502BP, R6545-1AP, R6522AP, RO-3-9333B, 1.8432, 17.9712 ************************************************************************************************************************************/ #include "emu.h" #include "cpu/m6502/m6502.h" +#include "machine/input_merger.h" +#include "machine/6850acia.h" +#include "machine/6522via.h" +#include "machine/mos6551.h" #include "video/mc6845.h" #include "emupal.h" #include "screen.h" @@ -37,6 +41,7 @@ public: private: MC6845_UPDATE_ROW(crtc_update_row); + MC6845_ON_UPDATE_ADDR_CHANGED(crtc_update_addr); void mem3_map(address_map &map); void mem_map(address_map &map); @@ -52,8 +57,10 @@ void esprit_state::mem_map(address_map &map) map.global_mask(0x7fff); map(0x0058, 0x0058).rw("crtc", FUNC(mc6845_device::status_r), FUNC(mc6845_device::address_w)); map(0x0059, 0x0059).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); - map(0x0080, 0x1fff).ram(); - map(0x2000, 0x6fff).ram().share("videoram"); + map(0x0078, 0x0079).rw("acia", FUNC(acia6850_device::read), FUNC(acia6850_device::write)); + map(0x0080, 0x00ff).mirror(0x100).ram(); + //map(0x0780, 0x078e).rw("rrioc", FUNC(r6531_device::io_r), FUNC(r6531_device::io_w)); + map(0x2000, 0x27ff).ram().share("videoram"); map(0x7000, 0x7fff).rom().region("roms", 0); } @@ -61,30 +68,33 @@ void esprit_state::mem3_map(address_map &map) { map(0x0000, 0x202f).ram(); map(0x2030, 0x3fff).ram().share("videoram"); // it might start at 3000 - map(0x81c0, 0x81c0).rw("crtc", FUNC(mc6845_device::status_r), FUNC(mc6845_device::address_w)); - map(0x81c1, 0x81c1).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); + map(0x81c0, 0x81c0).rw("crtc", FUNC(r6545_1_device::status_r), FUNC(r6545_1_device::address_w)); + map(0x81c1, 0x81c1).rw("crtc", FUNC(r6545_1_device::register_r), FUNC(r6545_1_device::register_w)); + map(0x93c0, 0x93c1).rw("acia", FUNC(acia6850_device::read), FUNC(acia6850_device::write)); + map(0x95c0, 0x95c3).rw("acia1", FUNC(mos6551_device::read), FUNC(mos6551_device::write)); + map(0x99c0, 0x99c3).rw("acia2", FUNC(mos6551_device::read), FUNC(mos6551_device::write)); + map(0xb1c0, 0xb1cf).rw("via", FUNC(via6522_device::read), FUNC(via6522_device::write)); map(0xe000, 0xffff).rom().region("roms", 0); } static INPUT_PORTS_START( esprit ) INPUT_PORTS_END -MC6845_UPDATE_ROW( esprit_state::crtc_update_row ) +MC6845_UPDATE_ROW(esprit_state::crtc_update_row) { const rgb_t *pens = m_palette->palette()->entry_list_raw(); - uint8_t chr,gfx; - uint16_t mem,x; uint32_t *p = &bitmap.pix32(y); - for (x = 0; x < x_count; x++) + for (uint16_t x = 0; x < x_count; x++) { - mem = (ma + x) & 0x7ff; - chr = m_p_videoram[mem]; + uint16_t mem = (ma + x) & 0x7ff; + uint8_t chr = m_p_videoram[mem]; /* get pattern of pixels for that character scanline */ - gfx = m_p_chargen[(chr<<4) | ra] ^ ((x == cursor_x) ? 0xff : 0); + uint16_t gfx = m_p_chargen[(chr<<4) | ra] ^ ((x == cursor_x) ? 0x1ff : 0); - /* Display a scanline of a character (8 pixels) */ + /* Display a scanline of a character (9 pixels) */ + *p++ = pens[BIT(gfx, 8)]; *p++ = pens[BIT(gfx, 7)]; *p++ = pens[BIT(gfx, 6)]; *p++ = pens[BIT(gfx, 5)]; @@ -96,6 +106,10 @@ MC6845_UPDATE_ROW( esprit_state::crtc_update_row ) } } +MC6845_ON_UPDATE_ADDR_CHANGED(esprit_state::crtc_update_addr) +{ +} + /* F4 Character Displayer */ static const gfx_layout esprit_charlayout = { @@ -122,32 +136,69 @@ void esprit_state::init_init() } -MACHINE_CONFIG_START(esprit_state::esprit) - MCFG_DEVICE_ADD("maincpu", M6502, 1000000) // no idea of clock - MCFG_DEVICE_PROGRAM_MAP(mem_map) +void esprit_state::esprit(machine_config &config) +{ + M6502(config, m_maincpu, 16.5888_MHz_XTAL / 18); // divider guessed + m_maincpu->set_addrmap(AS_PROGRAM, &esprit_state::mem_map); + + //R6531(config, "rrioc", 16.5888_MHz_XTAL / 18); + + acia6850_device &acia(ACIA6850(config, "acia")); + acia.irq_handler().set_inputline(m_maincpu, m6502_device::NMI_LINE); /* video hardware */ - MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::green()) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // not correct - MCFG_SCREEN_UPDATE_DEVICE("crtc", mc6845_device, screen_update) - MCFG_SCREEN_SIZE(32*8, 32*8) - MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1) - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_esprit) - MCFG_PALETTE_ADD_MONOCHROME("palette") + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_color(rgb_t::green()); + screen.set_raw(16.5888_MHz_XTAL, 900, 0, 720, 307, 0, 288); + screen.set_screen_update("crtc", FUNC(mc6845_device::screen_update)); + + GFXDECODE(config, "gfxdecode", "palette", gfx_esprit); + PALETTE(config, m_palette, 2).set_init("palette", FUNC(palette_device::palette_init_monochrome)); /* Devices */ - MCFG_MC6845_ADD("crtc", MC6845, "screen", 1000000) // clk unknown - MCFG_MC6845_SHOW_BORDER_AREA(false) - MCFG_MC6845_CHAR_WIDTH(8) - MCFG_MC6845_UPDATE_ROW_CB(esprit_state, crtc_update_row) -MACHINE_CONFIG_END - -MACHINE_CONFIG_START(esprit_state::esprit3) - esprit(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(mem3_map) -MACHINE_CONFIG_END + mc6845_device &crtc(MC6845(config, "crtc", 16.5888_MHz_XTAL / 9)); + crtc.set_screen("screen"); + crtc.set_show_border_area(false); + crtc.set_char_width(9); + crtc.set_update_row_callback(FUNC(esprit_state::crtc_update_row), this); +} + +void esprit_state::esprit3(machine_config &config) +{ + M6502(config, m_maincpu, 17.9712_MHz_XTAL / 18); // divider guessed + m_maincpu->set_addrmap(AS_PROGRAM, &esprit_state::mem3_map); + + INPUT_MERGER_ANY_HIGH(config, "mainirq").output_handler().set_inputline(m_maincpu, m6502_device::IRQ_LINE); + + ACIA6850(config, "acia"); + + mos6551_device &acia1(MOS6551(config, "acia1", 17.9712_MHz_XTAL / 18)); + acia1.set_xtal(1.8432_MHz_XTAL); + acia1.irq_handler().set("mainirq", FUNC(input_merger_device::in_w<0>)); + + mos6551_device &acia2(MOS6551(config, "acia2", 17.9712_MHz_XTAL / 18)); + acia2.set_xtal(1.8432_MHz_XTAL); + acia2.irq_handler().set("mainirq", FUNC(input_merger_device::in_w<1>)); + + via6522_device &via(VIA6522(config, "via", 17.9712_MHz_XTAL / 18)); + via.irq_handler().set("mainirq", FUNC(input_merger_device::in_w<2>)); + + /* video hardware */ + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_color(rgb_t::green()); + screen.set_raw(17.9712_MHz_XTAL, 936, 0, 720, 320, 0, 288); + screen.set_screen_update("crtc", FUNC(r6545_1_device::screen_update)); + + GFXDECODE(config, "gfxdecode", "palette", gfx_esprit); + PALETTE(config, m_palette, 2).set_init("palette", FUNC(palette_device::palette_init_monochrome)); + + r6545_1_device &crtc(R6545_1(config, "crtc", 17.9712_MHz_XTAL / 9)); + crtc.set_screen("screen"); + crtc.set_show_border_area(false); + crtc.set_char_width(9); + crtc.set_update_row_callback(FUNC(esprit_state::crtc_update_row), this); + crtc.set_on_update_addr_change_callback(FUNC(esprit_state::crtc_update_addr), this); +} ROM_START( esprit ) // Esprit @@ -155,6 +206,8 @@ ROM_START( esprit ) ROM_LOAD( "hazeltine_esprit.u19", 0x0000, 0x1000, CRC(6fdec792) SHA1(a1d1d68c8793e7e15ab5cd17682c299dff3985cb) ) ROM_REGION( 0x1000, "chargen", ROMREGION_INVERT ) ROM_LOAD( "hazeltine_esprit.u26", 0x0000, 0x0804, CRC(93f45f13) SHA1(1f493b44124c348759469e24fdfa8b7c52fe6fac) ) + ROM_REGION( 0x0800, "rrioc", 0 ) + ROM_LOAD( "r3198-11.u20", 0x0000, 0x0800, NO_DUMP ) // internal ROM apparently unused ROM_END ROM_START( esprit3 ) diff --git a/src/mame/drivers/excali64.cpp b/src/mame/drivers/excali64.cpp index 037615aee37..8111dc96b40 100644 --- a/src/mame/drivers/excali64.cpp +++ b/src/mame/drivers/excali64.cpp @@ -136,8 +136,7 @@ void excali64_state::io_map(address_map &map) { map.global_mask(0xff); map(0x00, 0x0f).r(FUNC(excali64_state::port00_r)); - map(0x10, 0x10).mirror(0x0e).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x11, 0x11).mirror(0x0e).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x10, 0x11).mirror(0x0e).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x20, 0x23).mirror(0x0c).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0x30, 0x30).mirror(0x0e).rw(m_crtc, FUNC(mc6845_device::status_r), FUNC(mc6845_device::address_w)); map(0x31, 0x31).mirror(0x0e).rw(m_crtc, FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); diff --git a/src/mame/drivers/exidy440.cpp b/src/mame/drivers/exidy440.cpp index 68da9250cef..248b57d46a5 100644 --- a/src/mame/drivers/exidy440.cpp +++ b/src/mame/drivers/exidy440.cpp @@ -1867,6 +1867,71 @@ ROM_START( showdown ) ROM_LOAD( "xbl.8k", 0x00800, 0x0100, CRC(9d434cb1) SHA1(c3390bc1c02fe74ff2067f7fccfd1ad2c30b54a9) ) ROM_END +ROM_START( showdown4 ) + ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code for the first CPU, plus lots of banked ROMs */ + ROM_LOAD( "sld-4_1-a.1a", 0x08000, 0x2000, CRC(674e078e) SHA1(35540ce394f3cb03d9a6b49dabf071b7c1dd7194) ) // only different ROM from the parent, label not verified + ROM_LOAD( "sld-5_3-a.3a", 0x0a000, 0x2000, CRC(e7de171e) SHA1(881a2b596949de3b4bb1263e2aa08faeb3051a6e) ) + ROM_LOAD( "sld-5_4-a.4a", 0x0c000, 0x2000, CRC(5c8683c9) SHA1(81d0880fcbd3c1662ea4dd1662d6987adbdb4f71) ) + ROM_LOAD( "sld-5_6-a.6a", 0x0e000, 0x2000, CRC(4a408379) SHA1(1ec83b7416f948bc31bafa8ddaa87c23490bce16) ) + ROM_LOAD( "sld-5_11-e.11e", 0x1e000, 0x2000, CRC(1c6b34e5) SHA1(ae5ddd80d5fdc89274f44a30c4ec1aa325b26cc7) ) + ROM_LOAD( "sld-5_1-d.1d", 0x20000, 0x2000, CRC(db4c8cf6) SHA1(11fb37afb87b926f94f23abf90fb537a3a867aec) ) + ROM_LOAD( "sld-5_3-d.3d", 0x22000, 0x2000, CRC(24242867) SHA1(aa109231cad5fcb9e24578b567ff0fe50a72be44) ) + ROM_LOAD( "sld-5_4-d.4d", 0x24000, 0x2000, CRC(36f247e9) SHA1(749f5ea3307bfc02bced9535ebd733bb1297a0ae) ) + ROM_LOAD( "sld-5_6-d.6d", 0x26000, 0x2000, CRC(c9b14d8d) SHA1(48e66f5a4dc63c3948e32aeb0a151c8f9d2082b2) ) + ROM_LOAD( "sld-5_7-d.7d", 0x28000, 0x2000, CRC(fd054cd2) SHA1(a7fcedd30c088d2cb9fe013eaa1214b48f3569ab) ) + ROM_LOAD( "sld-5_8-d.8d", 0x2a000, 0x2000, CRC(8bf32822) SHA1(91a1ab0bc6aac3dfe7b7e60e3d35e7d4909aa09d) ) + ROM_LOAD( "sld-5_10-d.10d", 0x2c000, 0x2000, CRC(a2051da2) SHA1(f879459a90a00c9dc4ba0b1e8895bc1352286a8a) ) + ROM_LOAD( "sld-5_11-d.11d", 0x2e000, 0x2000, CRC(0748f345) SHA1(c435cd0769aa44162b3f7aa1bc230cadf572ca73) ) + ROM_LOAD( "sld-5_1-c.1c", 0x30000, 0x2000, CRC(c016cf73) SHA1(30221e5f878354933b8caf8c644f2c6f1e5dcd30) ) + ROM_LOAD( "sld-5_3-c.3c", 0x32000, 0x2000, CRC(652503ee) SHA1(90c76bb5d59ce0626d1d7f3feaea05ef984f9551) ) + ROM_LOAD( "sld-5_4-c.4c", 0x34000, 0x2000, CRC(b4dab193) SHA1(e028d2c865e7607f43bb7b4f2afe75082618a47b) ) + ROM_LOAD( "sld-5_6-c.6c", 0x36000, 0x2000, CRC(a1e6a2b3) SHA1(b75a0355e1245a8ca0dc438c66a96c064b7ab40a) ) + ROM_LOAD( "sld-5_7-c.7c", 0x38000, 0x2000, CRC(bc1bea93) SHA1(77fcfef6c509186af394f0ad67717c11ca447fb7) ) + ROM_LOAD( "sld-5_8-c.8c", 0x3a000, 0x2000, CRC(337dd7fa) SHA1(4df916968f5a2e12cdc8bab585f58b6f6a9d2f4c) ) + ROM_LOAD( "sld-5_10-c.10c", 0x3c000, 0x2000, CRC(3ad32d71) SHA1(1a032eb136c56b97305e64572730a40c40d9c52b) ) + ROM_LOAD( "sld-5_11-c.11c", 0x3e000, 0x2000, CRC(5fe91932) SHA1(f4f880c55e72159a6754f7c939b4dbb16522e3ad) ) + ROM_LOAD( "sld-5_1-b.1b", 0x40000, 0x2000, CRC(54ff987e) SHA1(ea50a6e2b6c409403cec035f96f4672814e153e2) ) + ROM_LOAD( "sld-5_3-b.3b", 0x42000, 0x2000, CRC(e302e915) SHA1(cb2413c24503fd2363f6e717e8de558f771427a4) ) + ROM_LOAD( "sld-5_4-b.4b", 0x44000, 0x2000, CRC(1b981516) SHA1(16c417c9c1918a00dee976f3513925f8f28e6f41) ) + ROM_LOAD( "sld-5_6-b.6b", 0x46000, 0x2000, CRC(4ee00996) SHA1(7201aef40f6ea3b73d0c009117c174f19d97b98e) ) + ROM_LOAD( "sld-5_7-b.7b", 0x48000, 0x2000, CRC(018b7c00) SHA1(04879f476687e087d21bd8d5f439f3e45d39d142) ) + ROM_LOAD( "sld-5_8-b.8b", 0x4a000, 0x2000, CRC(024fe6ee) SHA1(4287091e65c58aec75c54e320c534d41def951f9) ) + ROM_LOAD( "sld-5_10-b.10b", 0x4c000, 0x2000, CRC(0b318dfe) SHA1(feb65530ea3aea6b0786875dc48d96e07d579636) ) + + ROM_REGION( 0x02000, "440audio:audiocpu", 0 ) + ROM_LOAD( "sda-5_h-1.h1", 0x00000, 0x2000, CRC(6a10ff47) SHA1(ee57de74ab9a5cfe5726212a9b905e91e6461225) ) + + ROM_REGION( 0x20000, "440audio:samples", 0 ) + ROM_LOAD( "sda-5_k-2.k2", 0x00000, 0x2000, CRC(67a86f7f) SHA1(a4f70aab90acd2502e8f3f39efdafcd71b1a22b4) ) + ROM_LOAD( "sda-5_l-2.l2", 0x02000, 0x2000, CRC(0bb8874b) SHA1(8b643dbd5412a713b3e2831dd1ba2b7d1f613ac2) ) + ROM_LOAD( "sda-5_m-2.m2", 0x04000, 0x2000, CRC(8b77eac8) SHA1(d70038cd6655e71c6488c555ecb1d1a424d00d49) ) + ROM_LOAD( "sda-5_n-2.n2", 0x06000, 0x2000, CRC(78e6eed6) SHA1(d9218745fc497a67373b0f6fd82caeef33bb4b3e) ) + ROM_LOAD( "sda-5_p-2.p2", 0x08000, 0x2000, CRC(03a13435) SHA1(1965d26a2f294e883cc6a13bc89bf0c28e30d28e) ) + ROM_LOAD( "sda-5_r-2.r2", 0x0a000, 0x2000, CRC(1b6b7eac) SHA1(b30965203807d8b863e8b2863a222d2e614eee2d) ) + ROM_LOAD( "sda-5_s-2.s2", 0x0c000, 0x2000, CRC(b88aeb82) SHA1(62d87430c7aec1aec892a15e45fb257206d8cf94) ) + ROM_LOAD( "sda-5_t-2.t2", 0x0e000, 0x2000, CRC(5c801f4d) SHA1(e6dbb2d2815b9d848c0580cff47d1f0d10c1906d) ) + ROM_LOAD( "sda-5_k-1.k1", 0x10000, 0x2000, CRC(4e1f4f15) SHA1(cf075e09eaeab1e630b5b2e28c806d4c34eece48) ) + ROM_LOAD( "sda-5_l-1.l1", 0x12000, 0x2000, CRC(6779a745) SHA1(de7d8e39f053eaa45238844e477732295d9af494) ) + ROM_LOAD( "sda-5_m-1.m1", 0x14000, 0x2000, CRC(9cebd8ea) SHA1(ff8121c16e8fe93a59c49c20459287f6b002bbbc) ) + ROM_LOAD( "sda-5_n-1.n1", 0x16000, 0x2000, CRC(689d8a3f) SHA1(aa592b9edcac8d264c9c89871283dfeebce2300e) ) + ROM_LOAD( "sda-5_p-1.p1", 0x18000, 0x2000, CRC(862b350d) SHA1(12e6c92ba424df578eac5a820a68aaaffd73c577) ) + ROM_LOAD( "sda-5_r-1.r1", 0x1a000, 0x2000, CRC(95b099ed) SHA1(1327852712ade3fc96bd8192045c081c4d32f4ba) ) + ROM_LOAD( "sda-5_s-1.s1", 0x1c000, 0x2000, CRC(8f230881) SHA1(daa8efc355fb042b2fce89a0d2950a90e56a806f) ) + ROM_LOAD( "sda-5_t-1.t1", 0x1e000, 0x2000, CRC(70e724c7) SHA1(df2905f91038693c87452813216aa86bbb81521b) ) + + ROM_REGION( 0x00900, "user1", 0 ) + /* vertical sync timing */ + ROM_LOAD( "xbl.12h", 0x00000, 0x0100, CRC(375c8bfc) SHA1(2602dde6961cc6b63d1652e2f3e4cfae2d8a34d9) ) + /* horizontal sync timing */ + ROM_LOAD( "xbl.9h", 0x00100, 0x0100, CRC(2e7d5562) SHA1(7cd51fad8236b9853eff2eb84b474838ae1b44e8) ) + ROM_LOAD( "xbl.2h", 0x00200, 0x0100, CRC(b078c1e4) SHA1(13834da4384ad43bc1671366fd428520cc3d1c1a) ) + ROM_LOAD( "xml-3k_mmi_6331.bin", 0x00300, 0x0020, CRC(afa289d1) SHA1(703f3e433ebe0b9c2f1be31bef0d01b8007d48ea) ) + ROM_LOAD( "xbl.4k", 0x00400, 0x0100, CRC(31a9549c) SHA1(5bfba7ef3f3f5fc59bc03feca39bb16d54a92778) ) + ROM_LOAD( "xbl.5k", 0x00500, 0x0100, CRC(1379bb2a) SHA1(51e9e21aeb0db8727f58fda708ddea8fb53378d9) ) + ROM_LOAD( "xbl.6k", 0x00600, 0x0100, CRC(588969f7) SHA1(316db275c4026e3a24e44f39f160e10189d310a3) ) + ROM_LOAD( "xbl.7k", 0x00700, 0x0100, CRC(eda360b8) SHA1(79d84207e28c1289210cebd96abad6cfe1b4c1d0) ) + ROM_LOAD( "xbl.8k", 0x00800, 0x0100, CRC(9d434cb1) SHA1(c3390bc1c02fe74ff2067f7fccfd1ad2c30b54a9) ) +ROM_END ROM_START( yukon ) ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code for the first CPU, plus lots of banked ROMs */ @@ -2093,5 +2158,6 @@ GAME( 1987, hitnmiss2, hitnmiss, exidy440, hitnmiss, exidy440_state, init_exidy4 GAME( 1988, whodunit, 0, exidy440, whodunit, exidy440_state, init_exidy440, ROT0, "Exidy", "Who Dunit (version 9.0)", 0 ) GAME( 1988, whodunit8, whodunit, exidy440, whodunit, exidy440_state, init_exidy440, ROT0, "Exidy", "Who Dunit (version 8.0)", 0 ) GAME( 1988, showdown, 0, exidy440, showdown, exidy440_state, init_showdown, ROT0, "Exidy", "Showdown (version 5.0)", 0 ) +GAME( 1988, showdown4, showdown, exidy440, showdown, exidy440_state, init_showdown, ROT0, "Exidy", "Showdown (version 4.0)", MACHINE_NOT_WORKING ) // different PAL, expects different values GAME( 1989, yukon, 0, exidy440, showdown, exidy440_state, init_yukon, ROT0, "Exidy", "Yukon (version 2.0)", 0 ) GAME( 1989, yukon1, yukon, exidy440, showdown, exidy440_state, init_yukon, ROT0, "Exidy", "Yukon (version 1.0)", 0 ) diff --git a/src/mame/drivers/facit4440.cpp b/src/mame/drivers/facit4440.cpp new file mode 100644 index 00000000000..22d329d5e74 --- /dev/null +++ b/src/mame/drivers/facit4440.cpp @@ -0,0 +1,292 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/**************************************************************************** + + Preliminary driver for Facit 4440 Twist terminal. + + The “Twist” sobriquet refers to the adjustable orientation of the + monitor, whose normally black-on-white display has the dimensions of a + sheet of A4 paper. It displays 24 lines of 80 characters in landscape + mode and 72 lines of rather smaller characters in portrait mode. + + No user manual for this terminal has been found. The layout of the + keyboard is also unclear, not to mention the serial protocol. + + Nonvolatile settings are configured through VT100-style setup screens. + Several non-ANSI emulation modes are also available. + + An OEM customized version was sold by Norsk Data AS as the ND 319 Twist. + + The timing of the display circuit seems a bit uncertain. Promotional + information claims that it has a 40 MHz bandwidth, but this may be only + a nominal maximum rating since the only high-frequency oscillator seen + on the PCB is 32 MHz. It is unclear how the CRTC parameters and this + value can produce the documented 65 Hz refresh rate. The actual circuit + also generates alarming levels of electromagnetic radiation. + +****************************************************************************/ + +#include "emu.h" +//#include "bus/rs232/rs232.h" +#include "cpu/z80/z80.h" +#include "machine/clock.h" +#include "machine/er1400.h" +#include "machine/z80ctc.h" +#include "machine/z80dart.h" +#include "video/mc6845.h" +#include "screen.h" + +class facit4440_state : public driver_device +{ +public: + facit4440_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_earom(*this, "earom%u", 0U) + , m_crtc(*this, "crtc") + , m_test(*this, "TEST") + , m_orientation(*this, "ORIENTATION") + , m_chargen(*this, "chargen") + , m_scanprom(*this, "scanprom") + , m_videoram(*this, "videoram") + { + } + + void facit4440(machine_config &config); + +protected: + virtual void machine_start() override; + +private: + void earom_latch_w(u8 data); + void control_2000_w(u8 data); + u8 misc_status_r(); + void control_6000_w(u8 data); + void control_a000_w(u8 data); + + DECLARE_WRITE_LINE_MEMBER(vsync_w); + + MC6845_UPDATE_ROW(update_row); + + void mem_map(address_map &map); + void io_map(address_map &map); + + required_device<z80_device> m_maincpu; + required_device_array<er1400_device, 2> m_earom; + required_device<mc6845_device> m_crtc; + + required_ioport m_test; + required_ioport m_orientation; + + required_region_ptr<u8> m_chargen; + required_region_ptr<u8> m_scanprom; + required_shared_ptr<u8> m_videoram; + + u8 m_control_latch[3]; +}; + +void facit4440_state::earom_latch_w(u8 data) +{ + // SN74LS174 latch + SN7406 inverter + + // Prevent outputs from interfering with data reads + if (!BIT(data, 2)) + data &= 0xfc; + + // FIXME: clock must be written first here due to data/control setup time + m_earom[0]->clock_w(BIT(data, 5)); + m_earom[1]->clock_w(BIT(data, 5)); + + m_earom[0]->data_w(BIT(data, 1)); + m_earom[1]->data_w(BIT(data, 0)); + + for (auto &earom : m_earom) + { + earom->c2_w(BIT(data, 2)); + earom->c1_w(BIT(data, 3)); + earom->c3_w(BIT(data, 4)); + } +} + +void facit4440_state::control_2000_w(u8 data) +{ + m_control_latch[0] = data; + + if (!BIT(m_control_latch[0], 5)) + m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE); +} + +void facit4440_state::control_6000_w(u8 data) +{ + m_control_latch[1] = data; +} + +void facit4440_state::control_a000_w(u8 data) +{ + m_control_latch[2] = data; +} + +u8 facit4440_state::misc_status_r() +{ + u8 status = m_test->read() << 6; + + status |= m_earom[0]->data_r() << 4; + status |= m_earom[1]->data_r() << 3; + + status |= m_crtc->vsync_r() << 1; + status |= m_orientation->read(); + + return status; +} + +WRITE_LINE_MEMBER(facit4440_state::vsync_w) +{ + if (state && BIT(m_control_latch[0], 5)) + m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); +} + +MC6845_UPDATE_ROW(facit4440_state::update_row) +{ + offs_t base = ma / 5 * 6; + u32 *px = &bitmap.pix32(y); + + for (int i = 0; i < x_count; i++) + { + u8 chr = m_videoram[(base + i) & 0x1fff]; + rgb_t fg = rgb_t::white(); + rgb_t bg = rgb_t::black(); + + // TODO: double-width scans based on attributes + u8 scan = m_scanprom[ra | (BIT(m_control_latch[1], 7) ? 0x20 : 0x00)]; + u8 dots = m_chargen[(u16(chr) << 5) | (scan & 0x1f)]; + + for (int n = 8; n > 0; n--, dots <<= 1) + *px++ = BIT(dots, 7) ? fg : bg; + } +} + +void facit4440_state::mem_map(address_map &map) +{ + map(0x0000, 0x7fff).rom().region("mainprg", 0); + map(0x0000, 0x0000).w(FUNC(facit4440_state::earom_latch_w)); + map(0x2000, 0x2000).w(FUNC(facit4440_state::control_2000_w)); + map(0x4000, 0x4000).mirror(0x1ffe).w("crtc", FUNC(mc6845_device::address_w)); + map(0x4001, 0x4001).mirror(0x1ffe).w("crtc", FUNC(mc6845_device::register_w)); + map(0x6000, 0x6000).w(FUNC(facit4440_state::control_6000_w)); + map(0x8000, 0x8000).r(FUNC(facit4440_state::misc_status_r)); + map(0x8000, 0x8050).nopw(); + map(0xa000, 0xbfff).rom().region("testprg", 0); + map(0xa000, 0xa000).w(FUNC(facit4440_state::control_a000_w)); + map(0xc000, 0xdfff).ram().share("videoram"); // 4x TMM2016AP-90 + map(0xe000, 0xffff).ram(); // 4x TMM2016AP-90 +} + +void facit4440_state::io_map(address_map &map) +{ + map.global_mask(0xff); + map(0xec, 0xef).rw("kbdart", FUNC(z80dart_device::cd_ba_r), FUNC(z80dart_device::cd_ba_w)); + map(0xf4, 0xf7).rw("iodart", FUNC(z80dart_device::cd_ba_r), FUNC(z80dart_device::cd_ba_w)); + map(0xf8, 0xfb).rw("ctc", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)); +} + +void facit4440_state::machine_start() +{ + m_control_latch[0] = m_control_latch[1] = m_control_latch[2] = 0; + + save_item(NAME(m_control_latch)); +} + +static INPUT_PORTS_START(facit4440) + PORT_START("TEST") + PORT_CONFNAME(3, 0, "Test Mode") + PORT_CONFSETTING(0, DEF_STR(Off)) + PORT_CONFSETTING(3, DEF_STR(On)) + PORT_CONFSETTING(2, "Burn In") + + PORT_START("ORIENTATION") + PORT_CONFNAME(1, 1, "Orientation") + PORT_CONFSETTING(0, "Portrait") + PORT_CONFSETTING(1, "Landscape") +INPUT_PORTS_END + +static const z80_daisy_config daisy_chain[] = +{ + { "ctc" }, + { "iodart" }, + { "kbdart" }, + { nullptr } +}; + +void facit4440_state::facit4440(machine_config &config) +{ + constexpr u32 CHAR_WIDTH = 8; + constexpr u32 FAKE_DOT_CLOCK = 65 * 103 * 621 * CHAR_WIDTH; + + Z80(config, m_maincpu, 32_MHz_XTAL / 8); // clock unknown + m_maincpu->set_addrmap(AS_PROGRAM, &facit4440_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &facit4440_state::io_map); + m_maincpu->set_daisy_config(daisy_chain); + + ER1400(config, m_earom[0]); // M5G1400P + ER1400(config, m_earom[1]); // M5G1400P + + z80ctc_device &ctc(Z80CTC(config, "ctc", 32_MHz_XTAL / 8)); + ctc.intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); + ctc.zc_callback<0>().set("iodart", FUNC(z80dart_device::txca_w)); + ctc.zc_callback<1>().set("iodart", FUNC(z80dart_device::rxca_w)); + ctc.zc_callback<2>().set("iodart", FUNC(z80dart_device::txcb_w)); + ctc.zc_callback<2>().append("iodart", FUNC(z80dart_device::rxcb_w)); + + clock_device &baudclk(CLOCK(config, "baudclk", 2.4576_MHz_XTAL / 4)); + baudclk.signal_handler().set("ctc", FUNC(z80ctc_device::trg0)); + baudclk.signal_handler().append("ctc", FUNC(z80ctc_device::trg1)); + baudclk.signal_handler().append("ctc", FUNC(z80ctc_device::trg2)); + + clock_device &keybclk(CLOCK(config, "keybclk", 2.4576_MHz_XTAL / 32)); // unclear + keybclk.signal_handler().set("kbdart", FUNC(z80dart_device::txca_w)); + keybclk.signal_handler().append("kbdart", FUNC(z80dart_device::rxca_w)); + + z80dart_device &iodart(Z80DART(config, "iodart", 32_MHz_XTAL / 8)); // Z80ADART + iodart.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); + iodart.out_txda_callback().set("iodart", FUNC(z80dart_device::rxa_w)); // temporary loopback for testing + iodart.out_rtsa_callback().set("iodart", FUNC(z80dart_device::ctsa_w)); // temporary loopback for testing + iodart.out_dtra_callback().set("iodart", FUNC(z80dart_device::dcdb_w)); // temporary loopback for testing + iodart.out_txdb_callback().set("iodart", FUNC(z80dart_device::rxb_w)); // temporary loopback for testing + + z80dart_device &kbdart(Z80DART(config, "kbdart", 32_MHz_XTAL / 8)); // Z80ADART + kbdart.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); + kbdart.out_txda_callback().set("kbdart", FUNC(z80dart_device::rxa_w)); // FIXME: serial keyboard needed here + // Channel B is not used + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(FAKE_DOT_CLOCK, 103 * CHAR_WIDTH, 0, 80 * CHAR_WIDTH, 621, 0, 500); + //screen.set_raw(FAKE_DOT_CLOCK, 103 * CHAR_WIDTH, 0, 80 * CHAR_WIDTH, 621, 0, 560); + screen.set_screen_update("crtc", FUNC(mc6845_device::screen_update)); + + MC6845(config, m_crtc, FAKE_DOT_CLOCK / CHAR_WIDTH); // HD46505SP-2 + m_crtc->set_char_width(CHAR_WIDTH); + m_crtc->set_show_border_area(false); + m_crtc->set_update_row_callback(FUNC(facit4440_state::update_row), this); + m_crtc->out_hsync_callback().set("ctc", FUNC(z80ctc_device::trg3)); + m_crtc->out_vsync_callback().set(FUNC(facit4440_state::vsync_w)); +} + + +ROM_START(facit4440) + ROM_REGION(0x8000, "mainprg", 0) + ROM_LOAD("rom7.bin", 0x0000, 0x4000, CRC(a8da2b11) SHA1(4436ef14c29ae299f7bc338748158771c02d02a9)) + ROM_LOAD("rom6.bin", 0x4000, 0x4000, CRC(790b7642) SHA1(688a80cbf011e5c14f501e11fe0e3bf64a85bbd7)) + + ROM_REGION(0x2000, "testprg", 0) + ROM_LOAD("rom5.bin", 0x0000, 0x2000, CRC(715d02b6) SHA1(e304718dbdc8867ac01909fd2d027e5014a8c4f9)) + + ROM_REGION(0x3000, "chargen", 0) // order unknown + ROM_LOAD("rom1.bin", 0x0000, 0x1000, CRC(b503c173) SHA1(209bf59e2e9953179d04c4e768fc41574e039d36)) + ROM_LOAD("rom3.bin", 0x1000, 0x1000, CRC(a55a25d9) SHA1(c0d321e65f214adee01bf5f8c495b2518fa31b7b)) + ROM_LOAD("rom4.bin", 0x2000, 0x1000, CRC(52004ef8) SHA1(50d6e2eb48f60db3a3c9d206fc40d3294b6adc0e)) + + ROM_REGION(0x0800, "scanprom", 0) + ROM_LOAD("rom2.bin", 0x0000, 0x0800, CRC(9e1a190c) SHA1(fb08ee806f1056bcdfb5b08ea85995e1d3d01298)) +ROM_END + +COMP(1984, facit4440, 0, 0, facit4440, facit4440, facit4440_state, empty_init, "Facit", "4440 Twist (30M-F1)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_SOUND) diff --git a/src/mame/drivers/falco5220.cpp b/src/mame/drivers/falco5220.cpp new file mode 100644 index 00000000000..68a36c6b733 --- /dev/null +++ b/src/mame/drivers/falco5220.cpp @@ -0,0 +1,126 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/**************************************************************************** + + Skeleton driver for Falco 5220 terminal. + + Three variations of this terminal were introduced in 1986. Falco 5220 + primarily emulates the DEC VT220; Falco 542 primarily emulates the LSI + ADM 42; and Falco 5550 primarily emulates the Wyse WY-50. + + All three of these terminals have the same video characteristics, with + 9x12 characters rendered in a 10x16 cell, displayed in up to 2 screen + windows on 24 or 44 lines (not counting the status line). They also + likely share the gate array which is thus labeled on the Falco 5220 + PCB: + + LIA3417 + 041500-001 + FALCO + TAE8379Δ + + The Falco 500 is also supposed to be part of the series, though it was + introduced earlier and has definitely different video capabilities. + +****************************************************************************/ + +#include "emu.h" +//#include "bus/rs232/rs232.h" +#include "cpu/z80/z80.h" +#include "machine/clock.h" +#include "machine/nvram.h" +#include "machine/z80ctc.h" +#include "machine/z80sio.h" +#include "screen.h" + +class falco5220_state : public driver_device +{ +public: + falco5220_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_screen(*this, "screen") + { + } + + void falco5220(machine_config &config); + +protected: + virtual void machine_start() override; + +private: + u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + + void mem_map(address_map &map); + void io_map(address_map &map); + + required_device<z80_device> m_maincpu; + required_device<screen_device> m_screen; + + //required_shared_ptr<u8> m_cram; // 1x or 2x NEC D43256C-10L + //required_shared_ptr<u8> m_aram; // 1x or 2x NEC D43256C-10L +}; + +u32 falco5220_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + return 0; +} + +void falco5220_state::mem_map(address_map &map) +{ + map(0x0000, 0xbfff).rom().region("roms", 0); + map(0xc000, 0xdfff).ram().share("nvram"); + map(0xe000, 0xffff).ram(); +} + +void falco5220_state::io_map(address_map &map) +{ + map.global_mask(0xff); + map(0x60, 0x63).rw("sio", FUNC(z80sio_device::ba_cd_r), FUNC(z80sio_device::ba_cd_w)); + map(0x70, 0x73).rw("ctc", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)); +} + +void falco5220_state::machine_start() +{ +} + +static INPUT_PORTS_START(falco5220) +INPUT_PORTS_END + +static const z80_daisy_config daisy_chain[] = +{ + { "ctc" }, + { "sio" }, + { nullptr } +}; + +void falco5220_state::falco5220(machine_config &config) +{ + Z80(config, m_maincpu, 37.98_MHz_XTAL / 8); // Z0840006PSC; clock unverified + m_maincpu->set_addrmap(AS_PROGRAM, &falco5220_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &falco5220_state::io_map); + m_maincpu->set_daisy_config(daisy_chain); + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // CXK5864AP-10L + battery + + z80ctc_device &ctc(Z80CTC(config, "ctc", 37.98_MHz_XTAL / 8)); // Z0843006PSC + ctc.intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); + + clock_device &baudclk(CLOCK(config, "baudclk", 12.288_MHz_XTAL / 5)); + (void)baudclk; + + z80sio_device &sio(Z80SIO(config, "sio", 37.98_MHz_XTAL / 8)); // Z0844006PSC + sio.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(37.98_MHz_XTAL, 1500, 0, 1320, 422, 0, 400); // parameters guessed + screen.set_screen_update(FUNC(falco5220_state::screen_update)); +} + +ROM_START(falco5220) + ROM_REGION(0x10000, "roms", 0 ) + ROM_LOAD("152321-000.bin", 0x0000, 0x8000, CRC(45ef4a68) SHA1(71e12dce710f9b66290618e299b2382834845057)) + ROM_LOAD("152321-001.bin", 0x8000, 0x8000, CRC(91056626) SHA1(217ca3de76d5e9861284f5b64f8eff8e541fad3d)) +ROM_END + +COMP(1987, falco5220, 0, 0, falco5220, falco5220, falco5220_state, empty_init, "Falco Data Products", "Falco 5220", MACHINE_IS_SKELETON) diff --git a/src/mame/drivers/fanucspmg.cpp b/src/mame/drivers/fanucspmg.cpp index b367305eaa9..9733705191d 100644 --- a/src/mame/drivers/fanucspmg.cpp +++ b/src/mame/drivers/fanucspmg.cpp @@ -728,14 +728,10 @@ void fanucspmg_state::maincpu_mem(address_map &map) map(0xf0000, 0xf0003).rw(m_pic0, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff); map(0xf0004, 0xf0007).m(m_fdc, FUNC(upd765a_device::map)).umask16(0x00ff); map(0xf0008, 0xf000f).rw(m_pit0, FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff); - map(0xf0010, 0xf0010).rw(m_usart0, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf0012, 0xf0012).rw(m_usart0, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xf0014, 0xf0014).rw(m_usart1, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf0016, 0xf0016).rw(m_usart1, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xf0018, 0xf0018).rw(m_usart2, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf001a, 0xf001a).rw(m_usart2, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xf001c, 0xf001c).rw(m_usart3, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf001e, 0xf001e).rw(m_usart3, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xf0010, 0xf0013).rw(m_usart0, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0xf0014, 0xf0017).rw(m_usart1, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0xf0018, 0xf001b).rw(m_usart2, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0xf001c, 0xf001f).rw(m_usart3, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0xf0020, 0xf0029).rw(m_dmac, FUNC(i8257_device::read), FUNC(i8257_device::write)); map(0xf0042, 0xf0043).r(FUNC(fanucspmg_state::magic_r)); map(0xf0046, 0xf0046).w(FUNC(fanucspmg_state::dma_page_w)); @@ -1015,9 +1011,9 @@ MACHINE_CONFIG_START(fanucspmg_state::fanucspmg) MCFG_PIC8259_OUT_INT_CB(WRITELINE(PIC0_TAG, pic8259_device, ir7_w)) MCFG_PIC8259_IN_SP_CB(CONSTANT(0)) - MCFG_UPD765A_ADD(FDC_TAG, true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(PIC0_TAG, pic8259_device, ir3_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(DMAC_TAG, i8257_device, dreq0_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(m_pic0, FUNC(pic8259_device::ir3_w)); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(i8257_device::dreq0_w)); MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":0", fanuc_floppies, "525dd", fanucspmg_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":1", fanuc_floppies, "525dd", fanucspmg_state::floppy_formats) diff --git a/src/mame/drivers/fb01.cpp b/src/mame/drivers/fb01.cpp index fc1834ccb0a..018714dbb66 100644 --- a/src/mame/drivers/fb01.cpp +++ b/src/mame/drivers/fb01.cpp @@ -82,8 +82,7 @@ void fb01_state::fb01_io(address_map &map) map(0x01, 0x01).rw("ym2164", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w)); // 10-11 USART uPD71051C 4MHz & 4MHz / 8 - map(0x10, 0x10).rw(m_upd71051, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x11, 0x11).rw(m_upd71051, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x10, 0x11).rw(m_upd71051, FUNC(i8251_device::read), FUNC(i8251_device::write)); // 20 PANEL SWITCH map(0x20, 0x20).portr("PANEL"); diff --git a/src/mame/drivers/fidelz80.cpp b/src/mame/drivers/fidelz80.cpp index dd0a799b59c..5cbfcbef38f 100644 --- a/src/mame/drivers/fidelz80.cpp +++ b/src/mame/drivers/fidelz80.cpp @@ -597,7 +597,7 @@ private: DECLARE_READ_LINE_MEMBER(vbrc_mcu_t0_r); DECLARE_READ_LINE_MEMBER(vbrc_mcu_t1_r); DECLARE_READ8_MEMBER(vbrc_mcu_p2_r); - DECLARE_WRITE8_MEMBER(vbrc_ioexp_port_w); + template<int P> void vbrc_ioexp_port_w(uint8_t data); void vbrc_main_io(address_map &map); void vbrc_main_map(address_map &map); @@ -1050,10 +1050,11 @@ WRITE8_MEMBER(fidelz80_state::vbrc_speech_w) // I8243 I/O expander -WRITE8_MEMBER(fidelz80_state::vbrc_ioexp_port_w) +template<int P> +void fidelz80_state::vbrc_ioexp_port_w(uint8_t data) { // P4-P7: digit segment data - m_7seg_data = (m_7seg_data & ~(0xf << (4*offset))) | ((data & 0xf) << (4*offset)); + m_7seg_data = (m_7seg_data & ~(0xf << (4*P))) | ((data & 0xf) << (4*P)); vbrc_prepare_display(); } @@ -1071,7 +1072,7 @@ READ8_MEMBER(fidelz80_state::vbrc_mcu_p2_r) { // P20-P23: I8243 P2 // P24-P27: multiplexed inputs (active low) - return (m_i8243->p2_r(space, offset) & 0x0f) | (read_inputs(8) << 4 ^ 0xf0); + return (m_i8243->p2_r() & 0x0f) | (read_inputs(8) << 4 ^ 0xf0); } READ_LINE_MEMBER(fidelz80_state::vbrc_mcu_t0_r) @@ -1203,7 +1204,7 @@ READ8_MEMBER(fidelz80_state::vsc_io_trampoline_r) { u8 data = 0xff; // open bus if (~offset & 4) - data &= m_ppi8255->read(space, offset & 3); + data &= m_ppi8255->read(offset & 3); if (~offset & 8) data &= m_z80pio->read(space, offset & 3); @@ -1213,7 +1214,7 @@ READ8_MEMBER(fidelz80_state::vsc_io_trampoline_r) WRITE8_MEMBER(fidelz80_state::vsc_io_trampoline_w) { if (~offset & 4) - m_ppi8255->write(space, offset & 3, data); + m_ppi8255->write(offset & 3, data); if (~offset & 8) m_z80pio->write(space, offset & 3, data); } @@ -1792,8 +1793,10 @@ MACHINE_CONFIG_START(fidelz80_state::vbrc) MCFG_MCS48_PORT_T1_IN_CB(READLINE(*this, fidelz80_state, vbrc_mcu_t1_r)) I8243(config, m_i8243); - m_i8243->read_handler().set_constant(0); - m_i8243->write_handler().set(FUNC(fidelz80_state::vbrc_ioexp_port_w)); + m_i8243->p4_out_cb().set(FUNC(fidelz80_state::vbrc_ioexp_port_w<0>)); + m_i8243->p5_out_cb().set(FUNC(fidelz80_state::vbrc_ioexp_port_w<1>)); + m_i8243->p6_out_cb().set(FUNC(fidelz80_state::vbrc_ioexp_port_w<2>)); + m_i8243->p7_out_cb().set(FUNC(fidelz80_state::vbrc_ioexp_port_w<3>)); MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", fidelbase_state, display_decay_tick, attotime::from_msec(1)) config.set_default_layout(layout_fidel_vbrc); diff --git a/src/mame/drivers/fk1.cpp b/src/mame/drivers/fk1.cpp index 16b8bde9d5f..982f5155c43 100644 --- a/src/mame/drivers/fk1.cpp +++ b/src/mame/drivers/fk1.cpp @@ -328,8 +328,7 @@ void fk1_state::fk1_io(address_map &map) map(0x10, 0x13).rw("pit8253", FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0x20, 0x23).rw("ppi8255_2", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x30, 0x30).rw(FUNC(fk1_state::fk1_bank_ram_r), FUNC(fk1_state::fk1_intr_w)); - map(0x40, 0x40).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x41, 0x41).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x40, 0x41).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x50, 0x50).rw(FUNC(fk1_state::fk1_bank_rom_r), FUNC(fk1_state::fk1_disk_w)); map(0x60, 0x63).rw("ppi8255_3", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x70, 0x70).rw(FUNC(fk1_state::fk1_mouse_r), FUNC(fk1_state::fk1_reset_int_w)); diff --git a/src/mame/drivers/flkatck.cpp b/src/mame/drivers/flkatck.cpp index c967926f624..0d111f7a17d 100644 --- a/src/mame/drivers/flkatck.cpp +++ b/src/mame/drivers/flkatck.cpp @@ -98,8 +98,9 @@ void flkatck_state::flkatck_map(address_map &map) map(0x0008, 0x03ff).ram(); /* RAM */ map(0x0400, 0x041f).rw(FUNC(flkatck_state::flkatck_ls138_r), FUNC(flkatck_state::flkatck_ls138_w)); /* inputs, DIPS, bankswitch, counters, sound command */ map(0x0800, 0x0bff).ram().w("palette", FUNC(palette_device::write8)).share("palette"); /* palette */ - map(0x1000, 0x1fff).ram(); /* RAM */ - map(0x2000, 0x3fff).ram().w(FUNC(flkatck_state::flkatck_k007121_w)).share("k007121_ram"); /* Video RAM (007121) */ + map(0x1000, 0x1fff).ram().share("spriteram"); /* RAM */ + map(0x2000, 0x2fff).ram().w(FUNC(flkatck_state::vram_w)).share("vram"); /* Video RAM (007121) */ + map(0x3000, 0x3fff).ram(); map(0x4000, 0x5fff).bankr("bank1"); /* banked ROM */ map(0x6000, 0xffff).rom(); /* ROM */ } diff --git a/src/mame/drivers/fmtowns.cpp b/src/mame/drivers/fmtowns.cpp index 62681fb91b2..656db340a54 100644 --- a/src/mame/drivers/fmtowns.cpp +++ b/src/mame/drivers/fmtowns.cpp @@ -2122,10 +2122,8 @@ WRITE8_MEMBER( towns_state::towns_serial_w ) switch(offset) { case 0: - m_i8251->data_w(space,0,data); - break; case 1: - m_i8251->control_w(space,0,data); + m_i8251->write(offset, data); break; case 4: m_serial_irq_enable = data; @@ -2140,9 +2138,8 @@ READ8_MEMBER( towns_state::towns_serial_r ) switch(offset) { case 0: - return m_i8251->data_r(space,0); case 1: - return m_i8251->status_r(space,0); + return m_i8251->read(offset); case 3: return m_serial_irq_source; default: diff --git a/src/mame/drivers/gaiden.cpp b/src/mame/drivers/gaiden.cpp index 4b2e81c13e8..67daef9ff66 100644 --- a/src/mame/drivers/gaiden.cpp +++ b/src/mame/drivers/gaiden.cpp @@ -55,6 +55,11 @@ Notes: pixels behind the blended object and the object itself, and then adding the RGB values. +- The location of the protection MCU (right next to the DIP switches, and + not populated on Ninja Gaiden) is marked “µPD8049” on the PCB. This has + found to actually be a 8749 (internal EPROM type) on Raiga and Tecmo + Knight/Wild Fang. + todo: - make sure all of the protection accesses in raiga are handled correctly. @@ -662,10 +667,10 @@ static const gfx_layout tilelayout = 8,8, /* tile size */ RGN_FRAC(1,1), /* number of tiles */ 4, /* 4 bits per pixel */ - { 0, 1, 2, 3 }, - { 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4 }, - { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 }, - 32*8 /* offset to next tile */ + { STEP4(0,1) }, /* the bitplanes are packed in one nibble */ + { STEP8(0,4) }, + { STEP8(0,4*8) }, + 4*8*8 /* offset to next tile */ }; static const gfx_layout tile2layout = @@ -673,31 +678,17 @@ static const gfx_layout tile2layout = 16,16, /* tile size */ RGN_FRAC(1,1), /* number of tiles */ 4, /* 4 bits per pixel */ - { 0, 1, 2, 3 }, /* the bitplanes are packed in one nibble */ - { 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4, - 32*8+0*4, 32*8+1*4, 32*8+2*4, 32*8+3*4, - 32*8+4*4, 32*8+5*4, 32*8+6*4, 32*8+7*4 }, - { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32, - 16*32, 17*32, 18*32, 19*32, 20*32, 21*32, 22*32, 23*32}, - 128*8 /* offset to next tile */ -}; - -static const gfx_layout spritelayout = -{ - 8,8, /* sprites size */ - RGN_FRAC(1,2), /* number of sprites */ - 4, /* 4 bits per pixel */ - { 0, 1, 2, 3 }, /* the bitplanes are packed in one nibble */ - { 0,4,RGN_FRAC(1,2),4+RGN_FRAC(1,2),8,12,8+RGN_FRAC(1,2),12+RGN_FRAC(1,2) }, - { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16 }, - 16*8 /* offset to next sprite */ + { STEP4(0,1) }, /* the bitplanes are packed in one nibble */ + { STEP8(0,4), STEP8(4*8*8,4) }, + { STEP8(0,4*8), STEP8(4*8*8*2,4*8) }, + 4*8*8*2*2 /* offset to next tile */ }; static GFXDECODE_START( gfx_gaiden ) - GFXDECODE_ENTRY( "gfx1", 0, tilelayout, 0x100, 16 ) /* tiles 8x8 */ - GFXDECODE_ENTRY( "gfx2", 0, tile2layout, 0x000, 0x1000 ) /* tiles 16x16 */ - GFXDECODE_ENTRY( "gfx3", 0, tile2layout, 0x000, 0x1000 ) /* tiles 16x16 (only colors 0x00-0x0f and 0x80-0x8f are used) */ - GFXDECODE_ENTRY( "gfx4", 0, spritelayout, 0x000, 0x1000 ) /* sprites 8x8 (only colors 0x00-0x0f and 0x80-0x8f are used) */ + GFXDECODE_ENTRY( "gfx1", 0, tilelayout, 0x100, 16 ) /* tiles 8x8 */ + GFXDECODE_ENTRY( "gfx2", 0, tile2layout, 0x000, 0x100 ) /* tiles 16x16 */ + GFXDECODE_ENTRY( "gfx3", 0, tile2layout, 0x000, 0x100 ) /* tiles 16x16 (only colors 0x00-0x0f and 0x80-0x8f are used) */ + GFXDECODE_ENTRY( "gfx4", 0, tilelayout, 0x000, 0x100 ) /* sprites 8x8 (only colors 0x00-0x0f and 0x80-0x8f are used) */ GFXDECODE_END static const gfx_layout mastninj_tile2layout = @@ -773,6 +764,8 @@ MACHINE_CONFIG_START(gaiden_state::shadoww) WATCHDOG_TIMER(config, "watchdog"); /* video hardware */ + BUFFERED_SPRITERAM16(config, m_spriteram); + MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(59.17) /* verified on pcb */ MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) @@ -787,13 +780,13 @@ MACHINE_CONFIG_START(gaiden_state::shadoww) MCFG_DEVICE_ADD("spritegen", TECMO_SPRITE, 0) MCFG_TECMO_SPRITE_GFX_REGION(3) - MCFG_DEVICE_ADD("mixer", TECMO_MIXER, 0) - MCFG_TECMO_MIXER_SHIFTS(10,9,4) - MCFG_TECMO_MIXER_BLENDCOLS( 0x0400 + 0x300, 0x0400 + 0x200, 0x0400 + 0x100, 0x0400 + 0x000 ) - MCFG_TECMO_MIXER_REGULARCOLS( 0x0000 + 0x300, 0x0000 + 0x200, 0x0000 + 0x100, 0x0000 + 0x000 ) - MCFG_TECMO_MIXER_BLENDSOURCE( 0x0800 + 0x000, 0x0800 + 0x200) - MCFG_TECMO_MIXER_REVSPRITETILE - MCFG_TECMO_MIXER_BGPEN(0x000 + 0x200) + TECMO_MIXER(config, m_mixer, 0); + m_mixer->set_mixer_shifts(10,9,4); + m_mixer->set_blendcols( 0x0400 + 0x300, 0x0400 + 0x200, 0x0400 + 0x100, 0x0400 + 0x000 ); + m_mixer->set_regularcols( 0x0000 + 0x300, 0x0000 + 0x200, 0x0000 + 0x100, 0x0000 + 0x000 ); + m_mixer->set_blendsource( 0x0800 + 0x000, 0x0800 + 0x200); + m_mixer->set_revspritetile(); + m_mixer->set_bgpen(0x000 + 0x200, 0x400 + 0x200); MCFG_VIDEO_START_OVERRIDE(gaiden_state,gaiden) @@ -825,7 +818,7 @@ MACHINE_CONFIG_START(gaiden_state::wildfang) MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_PROGRAM_MAP(wildfang_map) - MCFG_DEVICE_ADD("mcu", I8049, 4_MHz_XTAL) + MCFG_DEVICE_ADD("mcu", I8749, 4_MHz_XTAL) MCFG_DEVICE_DISABLE() MACHINE_CONFIG_END @@ -834,12 +827,17 @@ MACHINE_CONFIG_START(gaiden_state::raiga) MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_PROGRAM_MAP(raiga_map) - MCFG_DEVICE_ADD("mcu", I8049, 4_MHz_XTAL) + MCFG_DEVICE_ADD("mcu", I8749, 4_MHz_XTAL) MCFG_DEVICE_DISABLE() MCFG_MACHINE_RESET_OVERRIDE(gaiden_state,raiga) MCFG_VIDEO_START_OVERRIDE(gaiden_state,raiga) + + MCFG_SCREEN_MODIFY("screen") + MCFG_SCREEN_UPDATE_DRIVER(gaiden_state, screen_update_raiga) + MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE("spriteram", buffered_spriteram16_device, vblank_copy_rising)) + MACHINE_CONFIG_END MACHINE_CONFIG_START(gaiden_state::drgnbowl) @@ -854,6 +852,8 @@ MACHINE_CONFIG_START(gaiden_state::drgnbowl) MCFG_DEVICE_IO_MAP(drgnbowl_sound_port_map) /* video hardware */ + BUFFERED_SPRITERAM16(config, m_spriteram); + MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) @@ -1012,6 +1012,8 @@ MACHINE_CONFIG_START(gaiden_state::mastninj) WATCHDOG_TIMER(config, "watchdog"); /* video hardware */ + BUFFERED_SPRITERAM16(config, m_spriteram); + MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) @@ -1095,17 +1097,17 @@ ROM_START( shadoww ) ROM_REGION( 0x100000, "gfx4", 0 ) /* Should all these roms be 0x10000 bytes on this board? */ - ROM_LOAD( "6.3m", 0x000000, 0x20000, CRC(e7ccdf9f) SHA1(80ffcefc95660471124898a9c2bee55df36bda13) ) /* sprites A1 */ - ROM_LOAD( "8.3n", 0x020000, 0x20000, CRC(7ef7f880) SHA1(26ba9a76adce24beea3cffa1cb95aeafe6f82f96) ) /* sprites B1 */ - ROM_LOAD( "10.3r", 0x040000, 0x20000, CRC(a6451dec) SHA1(553e7a1453b59055fa0b10ca04125543d9f8987c) ) /* sprites C1 */ - ROM_LOAD( "shadoww_12a.xx", 0x060000, 0x10000, CRC(9bb07731) SHA1(b799b1958dc9b84797fdab2591e33bd5d28884a3) ) /* sprites D1 */ - ROM_LOAD( "shadoww_12b.xx", 0x070000, 0x10000, CRC(a4a950a2) SHA1(9766b5e88edd16554e59179a37cca49d29f83367) ) /* sprites D1 */ - - ROM_LOAD( "7.1m", 0x080000, 0x20000, CRC(016bec95) SHA1(6a6757c52ca9a2398ea43d1af4a8d5adde6f4cd2) ) /* sprites A2 */ - ROM_LOAD( "9.1n", 0x0a0000, 0x20000, CRC(6e9b7fd3) SHA1(c86ff61844fc94c02625bb812b9062d0649c8fdf) ) /* sprites B2 */ - ROM_LOAD( "11.1r", 0x0c0000, 0x20000, CRC(7fbfdf5e) SHA1(ab67b72dcadb5f2236d29de751de5bf890a9e423) ) /* sprites C2 */ - ROM_LOAD( "shadoww_13a.xx", 0x0e0000, 0x10000, CRC(996d2fa5) SHA1(a32526949af3635914927ebbbe684c3de9562a9d) ) /* sprites D2 */ - ROM_LOAD( "shadoww_13b.xx", 0x0f0000, 0x10000, CRC(b8df8a34) SHA1(6810f7961052a983b8c78b42d550038051012c6d) ) /* sprites D2 */ + ROM_LOAD16_BYTE( "6.3m", 0x000000, 0x20000, CRC(e7ccdf9f) SHA1(80ffcefc95660471124898a9c2bee55df36bda13) ) /* sprites A1 */ + ROM_LOAD16_BYTE( "8.3n", 0x040000, 0x20000, CRC(7ef7f880) SHA1(26ba9a76adce24beea3cffa1cb95aeafe6f82f96) ) /* sprites B1 */ + ROM_LOAD16_BYTE( "10.3r", 0x080000, 0x20000, CRC(a6451dec) SHA1(553e7a1453b59055fa0b10ca04125543d9f8987c) ) /* sprites C1 */ + ROM_LOAD16_BYTE( "shadoww_12a.xx", 0x0c0000, 0x10000, CRC(9bb07731) SHA1(b799b1958dc9b84797fdab2591e33bd5d28884a3) ) /* sprites D1 */ + ROM_LOAD16_BYTE( "shadoww_12b.xx", 0x0e0000, 0x10000, CRC(a4a950a2) SHA1(9766b5e88edd16554e59179a37cca49d29f83367) ) /* sprites D1 */ + + ROM_LOAD16_BYTE( "7.1m", 0x000001, 0x20000, CRC(016bec95) SHA1(6a6757c52ca9a2398ea43d1af4a8d5adde6f4cd2) ) /* sprites A2 */ + ROM_LOAD16_BYTE( "9.1n", 0x040001, 0x20000, CRC(6e9b7fd3) SHA1(c86ff61844fc94c02625bb812b9062d0649c8fdf) ) /* sprites B2 */ + ROM_LOAD16_BYTE( "11.1r", 0x080001, 0x20000, CRC(7fbfdf5e) SHA1(ab67b72dcadb5f2236d29de751de5bf890a9e423) ) /* sprites C2 */ + ROM_LOAD16_BYTE( "shadoww_13a.xx", 0x0c0001, 0x10000, CRC(996d2fa5) SHA1(a32526949af3635914927ebbbe684c3de9562a9d) ) /* sprites D2 */ + ROM_LOAD16_BYTE( "shadoww_13b.xx", 0x0e0001, 0x10000, CRC(b8df8a34) SHA1(6810f7961052a983b8c78b42d550038051012c6d) ) /* sprites D2 */ ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */ ROM_LOAD( "4.4a", 0x0000, 0x20000, CRC(b0e0faf9) SHA1(2275d2ef5eee356ccf80b9e9644d16fc30a4d107) ) /* samples */ @@ -1136,17 +1138,17 @@ ROM_START( shadowwa ) ROM_REGION( 0x100000, "gfx4", 0 ) /* Should all these roms be 0x10000 bytes on this board? */ - ROM_LOAD( "6.3m", 0x000000, 0x20000, CRC(e7ccdf9f) SHA1(80ffcefc95660471124898a9c2bee55df36bda13) ) /* sprites A1 */ - ROM_LOAD( "8.3n", 0x020000, 0x20000, CRC(7ef7f880) SHA1(26ba9a76adce24beea3cffa1cb95aeafe6f82f96) ) /* sprites B1 */ - ROM_LOAD( "10.3r", 0x040000, 0x20000, CRC(a6451dec) SHA1(553e7a1453b59055fa0b10ca04125543d9f8987c) ) /* sprites C1 */ - ROM_LOAD( "shadoww_12a.xx", 0x060000, 0x10000, CRC(9bb07731) SHA1(b799b1958dc9b84797fdab2591e33bd5d28884a3) ) /* sprites D1 */ - ROM_LOAD( "shadoww_12b.xx", 0x070000, 0x10000, CRC(a4a950a2) SHA1(9766b5e88edd16554e59179a37cca49d29f83367) ) /* sprites D1 */ - - ROM_LOAD( "7.1m", 0x080000, 0x20000, CRC(016bec95) SHA1(6a6757c52ca9a2398ea43d1af4a8d5adde6f4cd2) ) /* sprites A2 */ - ROM_LOAD( "9.1n", 0x0a0000, 0x20000, CRC(6e9b7fd3) SHA1(c86ff61844fc94c02625bb812b9062d0649c8fdf) ) /* sprites B2 */ - ROM_LOAD( "11.1r", 0x0c0000, 0x20000, CRC(7fbfdf5e) SHA1(ab67b72dcadb5f2236d29de751de5bf890a9e423) ) /* sprites C2 */ - ROM_LOAD( "shadoww_13a.xx", 0x0e0000, 0x10000, CRC(996d2fa5) SHA1(a32526949af3635914927ebbbe684c3de9562a9d) ) /* sprites D2 */ - ROM_LOAD( "shadoww_13b.xx", 0x0f0000, 0x10000, CRC(b8df8a34) SHA1(6810f7961052a983b8c78b42d550038051012c6d) ) /* sprites D2 */ + ROM_LOAD16_BYTE( "6.3m", 0x000000, 0x20000, CRC(e7ccdf9f) SHA1(80ffcefc95660471124898a9c2bee55df36bda13) ) /* sprites A1 */ + ROM_LOAD16_BYTE( "8.3n", 0x040000, 0x20000, CRC(7ef7f880) SHA1(26ba9a76adce24beea3cffa1cb95aeafe6f82f96) ) /* sprites B1 */ + ROM_LOAD16_BYTE( "10.3r", 0x080000, 0x20000, CRC(a6451dec) SHA1(553e7a1453b59055fa0b10ca04125543d9f8987c) ) /* sprites C1 */ + ROM_LOAD16_BYTE( "shadoww_12a.xx", 0x0c0000, 0x10000, CRC(9bb07731) SHA1(b799b1958dc9b84797fdab2591e33bd5d28884a3) ) /* sprites D1 */ + ROM_LOAD16_BYTE( "shadoww_12b.xx", 0x0e0000, 0x10000, CRC(a4a950a2) SHA1(9766b5e88edd16554e59179a37cca49d29f83367) ) /* sprites D1 */ + + ROM_LOAD16_BYTE( "7.1m", 0x000001, 0x20000, CRC(016bec95) SHA1(6a6757c52ca9a2398ea43d1af4a8d5adde6f4cd2) ) /* sprites A2 */ + ROM_LOAD16_BYTE( "9.1n", 0x040001, 0x20000, CRC(6e9b7fd3) SHA1(c86ff61844fc94c02625bb812b9062d0649c8fdf) ) /* sprites B2 */ + ROM_LOAD16_BYTE( "11.1r", 0x080001, 0x20000, CRC(7fbfdf5e) SHA1(ab67b72dcadb5f2236d29de751de5bf890a9e423) ) /* sprites C2 */ + ROM_LOAD16_BYTE( "shadoww_13a.xx", 0x0c0001, 0x10000, CRC(996d2fa5) SHA1(a32526949af3635914927ebbbe684c3de9562a9d) ) /* sprites D2 */ + ROM_LOAD16_BYTE( "shadoww_13b.xx", 0x0e0001, 0x10000, CRC(b8df8a34) SHA1(6810f7961052a983b8c78b42d550038051012c6d) ) /* sprites D2 */ ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */ ROM_LOAD( "4.4a", 0x0000, 0x20000, CRC(b0e0faf9) SHA1(2275d2ef5eee356ccf80b9e9644d16fc30a4d107) ) /* samples */ @@ -1176,15 +1178,15 @@ ROM_START( gaiden ) ROM_LOAD( "21.4b", 0x060000, 0x20000, CRC(1ac892f5) SHA1(28364266ca9d1955fb7953f5c2d6f35e114beec6) ) ROM_REGION( 0x100000, "gfx4", 0 ) - ROM_LOAD( "6.3m", 0x000000, 0x20000, CRC(e7ccdf9f) SHA1(80ffcefc95660471124898a9c2bee55df36bda13) ) /* sprites A1 */ - ROM_LOAD( "8.3n", 0x020000, 0x20000, CRC(7ef7f880) SHA1(26ba9a76adce24beea3cffa1cb95aeafe6f82f96) ) /* sprites B1 */ - ROM_LOAD( "10.3r", 0x040000, 0x20000, CRC(a6451dec) SHA1(553e7a1453b59055fa0b10ca04125543d9f8987c) ) /* sprites C1 */ - ROM_LOAD( "gaiden_12.3s", 0x060000, 0x20000, CRC(90f1e13a) SHA1(3fe9fe62aa9e92c871c791a3b11f96c9a48099a9) ) /* sprites D1 */ + ROM_LOAD16_BYTE( "6.3m", 0x000000, 0x20000, CRC(e7ccdf9f) SHA1(80ffcefc95660471124898a9c2bee55df36bda13) ) /* sprites A1 */ + ROM_LOAD16_BYTE( "8.3n", 0x040000, 0x20000, CRC(7ef7f880) SHA1(26ba9a76adce24beea3cffa1cb95aeafe6f82f96) ) /* sprites B1 */ + ROM_LOAD16_BYTE( "10.3r", 0x080000, 0x20000, CRC(a6451dec) SHA1(553e7a1453b59055fa0b10ca04125543d9f8987c) ) /* sprites C1 */ + ROM_LOAD16_BYTE( "gaiden_12.3s", 0x0c0000, 0x20000, CRC(90f1e13a) SHA1(3fe9fe62aa9e92c871c791a3b11f96c9a48099a9) ) /* sprites D1 */ - ROM_LOAD( "7.1m", 0x080000, 0x20000, CRC(016bec95) SHA1(6a6757c52ca9a2398ea43d1af4a8d5adde6f4cd2) ) /* sprites A2 */ - ROM_LOAD( "9.1n", 0x0a0000, 0x20000, CRC(6e9b7fd3) SHA1(c86ff61844fc94c02625bb812b9062d0649c8fdf) ) /* sprites B2 */ - ROM_LOAD( "11.1r", 0x0c0000, 0x20000, CRC(7fbfdf5e) SHA1(ab67b72dcadb5f2236d29de751de5bf890a9e423) ) /* sprites C2 */ - ROM_LOAD( "gaiden_13.1s", 0x0e0000, 0x20000, CRC(7d9f5c5e) SHA1(200102532ea9a88c7c708e03f8893c46dff827d1) ) /* sprites D2 */ + ROM_LOAD16_BYTE( "7.1m", 0x000001, 0x20000, CRC(016bec95) SHA1(6a6757c52ca9a2398ea43d1af4a8d5adde6f4cd2) ) /* sprites A2 */ + ROM_LOAD16_BYTE( "9.1n", 0x040001, 0x20000, CRC(6e9b7fd3) SHA1(c86ff61844fc94c02625bb812b9062d0649c8fdf) ) /* sprites B2 */ + ROM_LOAD16_BYTE( "11.1r", 0x080001, 0x20000, CRC(7fbfdf5e) SHA1(ab67b72dcadb5f2236d29de751de5bf890a9e423) ) /* sprites C2 */ + ROM_LOAD16_BYTE( "gaiden_13.1s", 0x0c0001, 0x20000, CRC(7d9f5c5e) SHA1(200102532ea9a88c7c708e03f8893c46dff827d1) ) /* sprites D2 */ ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */ ROM_LOAD( "4.4a", 0x0000, 0x20000, CRC(b0e0faf9) SHA1(2275d2ef5eee356ccf80b9e9644d16fc30a4d107) ) /* samples */ @@ -1215,17 +1217,17 @@ ROM_START( ryukendn ) ROM_REGION( 0x100000, "gfx4", 0 ) /* Should all these roms be 0x10000 bytes on this board? */ - ROM_LOAD( "6.3m", 0x000000, 0x20000, CRC(e7ccdf9f) SHA1(80ffcefc95660471124898a9c2bee55df36bda13) ) /* sprites A1 */ - ROM_LOAD( "8.3n", 0x020000, 0x20000, CRC(7ef7f880) SHA1(26ba9a76adce24beea3cffa1cb95aeafe6f82f96) ) /* sprites B1 */ - ROM_LOAD( "10.3r", 0x040000, 0x20000, CRC(a6451dec) SHA1(553e7a1453b59055fa0b10ca04125543d9f8987c) ) /* sprites C1 */ - ROM_LOAD( "shadoww_12a.xx", 0x060000, 0x10000, CRC(9bb07731) SHA1(b799b1958dc9b84797fdab2591e33bd5d28884a3) ) /* sprites D1 */ - ROM_LOAD( "ryukendn_12b.xx", 0x070000, 0x10000, CRC(1773628a) SHA1(e7eacc880f2a4174f17b263bedf8c1bc64007dbd) ) /* sprites D1 */ - - ROM_LOAD( "7.1m", 0x080000, 0x20000, CRC(016bec95) SHA1(6a6757c52ca9a2398ea43d1af4a8d5adde6f4cd2) ) /* sprites A2 */ - ROM_LOAD( "9.1n", 0x0a0000, 0x20000, CRC(6e9b7fd3) SHA1(c86ff61844fc94c02625bb812b9062d0649c8fdf) ) /* sprites B2 */ - ROM_LOAD( "11.1r", 0x0c0000, 0x20000, CRC(7fbfdf5e) SHA1(ab67b72dcadb5f2236d29de751de5bf890a9e423) ) /* sprites C2 */ - ROM_LOAD( "shadoww_13a.xx", 0x0e0000, 0x10000, CRC(996d2fa5) SHA1(a32526949af3635914927ebbbe684c3de9562a9d) ) /* sprites D2 */ - ROM_LOAD( "ryukendn_13b.xx", 0x0f0000, 0x10000, CRC(1f43c507) SHA1(29f655442c16677855073284c7ab41059c99c497) ) /* sprites D2 */ + ROM_LOAD16_BYTE( "6.3m", 0x000000, 0x20000, CRC(e7ccdf9f) SHA1(80ffcefc95660471124898a9c2bee55df36bda13) ) /* sprites A1 */ + ROM_LOAD16_BYTE( "8.3n", 0x040000, 0x20000, CRC(7ef7f880) SHA1(26ba9a76adce24beea3cffa1cb95aeafe6f82f96) ) /* sprites B1 */ + ROM_LOAD16_BYTE( "10.3r", 0x080000, 0x20000, CRC(a6451dec) SHA1(553e7a1453b59055fa0b10ca04125543d9f8987c) ) /* sprites C1 */ + ROM_LOAD16_BYTE( "shadoww_12a.xx", 0x0c0000, 0x10000, CRC(9bb07731) SHA1(b799b1958dc9b84797fdab2591e33bd5d28884a3) ) /* sprites D1 */ + ROM_LOAD16_BYTE( "ryukendn_12b.xx", 0x0e0000, 0x10000, CRC(1773628a) SHA1(e7eacc880f2a4174f17b263bedf8c1bc64007dbd) ) /* sprites D1 */ + + ROM_LOAD16_BYTE( "7.1m", 0x000001, 0x20000, CRC(016bec95) SHA1(6a6757c52ca9a2398ea43d1af4a8d5adde6f4cd2) ) /* sprites A2 */ + ROM_LOAD16_BYTE( "9.1n", 0x040001, 0x20000, CRC(6e9b7fd3) SHA1(c86ff61844fc94c02625bb812b9062d0649c8fdf) ) /* sprites B2 */ + ROM_LOAD16_BYTE( "11.1r", 0x080001, 0x20000, CRC(7fbfdf5e) SHA1(ab67b72dcadb5f2236d29de751de5bf890a9e423) ) /* sprites C2 */ + ROM_LOAD16_BYTE( "shadoww_13a.xx", 0x0c0001, 0x10000, CRC(996d2fa5) SHA1(a32526949af3635914927ebbbe684c3de9562a9d) ) /* sprites D2 */ + ROM_LOAD16_BYTE( "ryukendn_13b.xx", 0x0e0001, 0x10000, CRC(1f43c507) SHA1(29f655442c16677855073284c7ab41059c99c497) ) /* sprites D2 */ ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */ ROM_LOAD( "4.4a", 0x0000, 0x20000, CRC(b0e0faf9) SHA1(2275d2ef5eee356ccf80b9e9644d16fc30a4d107) ) /* samples */ @@ -1265,15 +1267,15 @@ ROM_START( ryukendna ) ROM_LOAD( "21.4b", 0x060000, 0x20000, CRC(1ac892f5) SHA1(28364266ca9d1955fb7953f5c2d6f35e114beec6) ) ROM_REGION( 0x100000, "gfx4", 0 ) - ROM_LOAD( "6.3m", 0x000000, 0x20000, CRC(e7ccdf9f) SHA1(80ffcefc95660471124898a9c2bee55df36bda13) ) /* sprites A1 */ - ROM_LOAD( "8.3n", 0x020000, 0x20000, CRC(7ef7f880) SHA1(26ba9a76adce24beea3cffa1cb95aeafe6f82f96) ) /* sprites B1 */ - ROM_LOAD( "10.3r", 0x040000, 0x20000, CRC(a6451dec) SHA1(553e7a1453b59055fa0b10ca04125543d9f8987c) ) /* sprites C1 */ - ROM_LOAD( "12.3s", 0x060000, 0x20000, CRC(277204f0) SHA1(918e05f10959f2b50c16b6e0dc62e3076c99250e) ) /* sprites D1 */ + ROM_LOAD16_BYTE( "6.3m", 0x000000, 0x20000, CRC(e7ccdf9f) SHA1(80ffcefc95660471124898a9c2bee55df36bda13) ) /* sprites A1 */ + ROM_LOAD16_BYTE( "8.3n", 0x040000, 0x20000, CRC(7ef7f880) SHA1(26ba9a76adce24beea3cffa1cb95aeafe6f82f96) ) /* sprites B1 */ + ROM_LOAD16_BYTE( "10.3r", 0x080000, 0x20000, CRC(a6451dec) SHA1(553e7a1453b59055fa0b10ca04125543d9f8987c) ) /* sprites C1 */ + ROM_LOAD16_BYTE( "12.3s", 0x0c0000, 0x20000, CRC(277204f0) SHA1(918e05f10959f2b50c16b6e0dc62e3076c99250e) ) /* sprites D1 */ - ROM_LOAD( "7.1m", 0x080000, 0x20000, CRC(016bec95) SHA1(6a6757c52ca9a2398ea43d1af4a8d5adde6f4cd2) ) /* sprites A2 */ - ROM_LOAD( "9.1n", 0x0a0000, 0x20000, CRC(6e9b7fd3) SHA1(c86ff61844fc94c02625bb812b9062d0649c8fdf) ) /* sprites B2 */ - ROM_LOAD( "11.1r", 0x0c0000, 0x20000, CRC(7fbfdf5e) SHA1(ab67b72dcadb5f2236d29de751de5bf890a9e423) ) /* sprites C2 */ - ROM_LOAD( "13.1s", 0x0e0000, 0x20000, CRC(4e56a508) SHA1(f89a6037e602b26d6ce11859e0b43a602b50d985) ) /* sprites D2 */ + ROM_LOAD16_BYTE( "7.1m", 0x000001, 0x20000, CRC(016bec95) SHA1(6a6757c52ca9a2398ea43d1af4a8d5adde6f4cd2) ) /* sprites A2 */ + ROM_LOAD16_BYTE( "9.1n", 0x040001, 0x20000, CRC(6e9b7fd3) SHA1(c86ff61844fc94c02625bb812b9062d0649c8fdf) ) /* sprites B2 */ + ROM_LOAD16_BYTE( "11.1r", 0x080001, 0x20000, CRC(7fbfdf5e) SHA1(ab67b72dcadb5f2236d29de751de5bf890a9e423) ) /* sprites C2 */ + ROM_LOAD16_BYTE( "13.1s", 0x0c0001, 0x20000, CRC(4e56a508) SHA1(f89a6037e602b26d6ce11859e0b43a602b50d985) ) /* sprites D2 */ ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */ ROM_LOAD( "4.4a", 0x0000, 0x20000, CRC(b0e0faf9) SHA1(2275d2ef5eee356ccf80b9e9644d16fc30a4d107) ) /* samples */ @@ -1345,7 +1347,7 @@ ROM_START( wildfang ) /* Dipswitch selectable title of Wild Fang or Tecmo Knight ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "tkni3.bin", 0x0000, 0x10000, CRC(15623ec7) SHA1(db43fe6c417117d7cd90a26e12a52efb0e1a5ca6) ) /* Audio CPU is a Z80 */ - ROM_REGION( 0x0800, "mcu", 0 ) /* protection NEC D8049 */ + ROM_REGION( 0x0800, "mcu", 0 ) /* protection NEC D8749 */ ROM_LOAD( "a-6v.mcu", 0x00000, 0x0800, NO_DUMP ) ROM_REGION( 0x010000, "gfx1", 0 ) @@ -1361,8 +1363,8 @@ ROM_START( wildfang ) /* Dipswitch selectable title of Wild Fang or Tecmo Knight ROM_LOAD( "tkni6.bin", 0x000000, 0x80000, CRC(f68fafb1) SHA1(aeca38eaea2f6dfc484e48ac1114c0c4abaafb9c) ) ROM_REGION( 0x100000, "gfx4", 0 ) - ROM_LOAD( "tkni9.bin", 0x000000, 0x80000, CRC(d22f4239) SHA1(360a9a821faabe911eef407ef85452d8b706538f) ) /* sprites */ - ROM_LOAD( "tkni8.bin", 0x080000, 0x80000, CRC(4931b184) SHA1(864e827ac109c0ee52a898034c021cd5e92ff000) ) /* sprites */ + ROM_LOAD16_BYTE( "tkni9.bin", 0x000000, 0x80000, CRC(d22f4239) SHA1(360a9a821faabe911eef407ef85452d8b706538f) ) /* sprites */ + ROM_LOAD16_BYTE( "tkni8.bin", 0x000001, 0x80000, CRC(4931b184) SHA1(864e827ac109c0ee52a898034c021cd5e92ff000) ) /* sprites */ ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */ ROM_LOAD( "tkni4.bin", 0x0000, 0x20000, CRC(a7a1dbcf) SHA1(2fee1d9745ce2ab54b0b9cbb6ab2e66ba9677245) ) /* samples */ @@ -1376,7 +1378,7 @@ ROM_START( wildfangs ) /* Wild Fang - No title change option */ ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "tkni3.bin", 0x0000, 0x10000, CRC(15623ec7) SHA1(db43fe6c417117d7cd90a26e12a52efb0e1a5ca6) ) /* Audio CPU is a Z80 */ - ROM_REGION( 0x0800, "mcu", 0 ) /* protection NEC D8049 */ + ROM_REGION( 0x0800, "mcu", 0 ) /* protection NEC D8749 */ ROM_LOAD( "a-6v.mcu", 0x00000, 0x0800, NO_DUMP ) ROM_REGION( 0x010000, "gfx1", 0 ) @@ -1392,8 +1394,8 @@ ROM_START( wildfangs ) /* Wild Fang - No title change option */ ROM_LOAD( "tkni6.bin", 0x000000, 0x80000, CRC(f68fafb1) SHA1(aeca38eaea2f6dfc484e48ac1114c0c4abaafb9c) ) ROM_REGION( 0x100000, "gfx4", 0 ) - ROM_LOAD( "tkni9.bin", 0x000000, 0x80000, CRC(d22f4239) SHA1(360a9a821faabe911eef407ef85452d8b706538f) ) /* sprites */ - ROM_LOAD( "tkni8.bin", 0x080000, 0x80000, CRC(4931b184) SHA1(864e827ac109c0ee52a898034c021cd5e92ff000) ) /* sprites */ + ROM_LOAD16_BYTE( "tkni9.bin", 0x000000, 0x80000, CRC(d22f4239) SHA1(360a9a821faabe911eef407ef85452d8b706538f) ) /* sprites */ + ROM_LOAD16_BYTE( "tkni8.bin", 0x000001, 0x80000, CRC(4931b184) SHA1(864e827ac109c0ee52a898034c021cd5e92ff000) ) /* sprites */ ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */ ROM_LOAD( "tkni4.bin", 0x0000, 0x20000, CRC(a7a1dbcf) SHA1(2fee1d9745ce2ab54b0b9cbb6ab2e66ba9677245) ) /* samples */ @@ -1407,7 +1409,7 @@ ROM_START( tknight ) /* Tecmo Knight - No title change option */ ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "tkni3.bin", 0x0000, 0x10000, CRC(15623ec7) SHA1(db43fe6c417117d7cd90a26e12a52efb0e1a5ca6) ) /* Audio CPU is a Z80 */ - ROM_REGION( 0x0800, "mcu", 0 ) /* protection NEC D8049 */ + ROM_REGION( 0x0800, "mcu", 0 ) /* protection NEC D8749 */ ROM_LOAD( "a-6v.mcu", 0x00000, 0x0800, NO_DUMP ) ROM_REGION( 0x010000, "gfx1", 0 ) @@ -1420,8 +1422,8 @@ ROM_START( tknight ) /* Tecmo Knight - No title change option */ ROM_LOAD( "tkni6.bin", 0x000000, 0x80000, CRC(f68fafb1) SHA1(aeca38eaea2f6dfc484e48ac1114c0c4abaafb9c) ) ROM_REGION( 0x100000, "gfx4", 0 ) - ROM_LOAD( "tkni9.bin", 0x000000, 0x80000, CRC(d22f4239) SHA1(360a9a821faabe911eef407ef85452d8b706538f) ) /* sprites */ - ROM_LOAD( "tkni8.bin", 0x080000, 0x80000, CRC(4931b184) SHA1(864e827ac109c0ee52a898034c021cd5e92ff000) ) /* sprites */ + ROM_LOAD16_BYTE( "tkni9.bin", 0x000000, 0x80000, CRC(d22f4239) SHA1(360a9a821faabe911eef407ef85452d8b706538f) ) /* sprites */ + ROM_LOAD16_BYTE( "tkni8.bin", 0x000001, 0x80000, CRC(4931b184) SHA1(864e827ac109c0ee52a898034c021cd5e92ff000) ) /* sprites */ ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */ ROM_LOAD( "tkni4.bin", 0x0000, 0x20000, CRC(a7a1dbcf) SHA1(2fee1d9745ce2ab54b0b9cbb6ab2e66ba9677245) ) /* samples */ @@ -1435,7 +1437,7 @@ ROM_START( stratof ) ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "a-4b.3", 0x00000, 0x10000, CRC(18655c95) SHA1(8357e0520565a201bb930cadffc759463931ec41) ) - ROM_REGION( 0x0800, "mcu", 0 ) /* protection NEC D8049 */ + ROM_REGION( 0x0800, "mcu", 0 ) /* protection NEC D8749 */ ROM_LOAD( "a-6v.mcu", 0x00000, 0x0800, NO_DUMP ) ROM_REGION( 0x10000, "gfx1", 0 ) @@ -1448,8 +1450,8 @@ ROM_START( stratof ) ROM_LOAD( "b-4b", 0x00000, 0x80000, CRC(89468b84) SHA1(af60fe957c98fa3f00623d420a0941a941f5bc6b) ) ROM_REGION( 0x100000, "gfx4", 0 ) - ROM_LOAD( "b-2m", 0x00000, 0x80000, CRC(5794ec32) SHA1(07e78d8bcb2373da77ef9f8cde6a01f384f8bf7e) ) - ROM_LOAD( "b-1m", 0x80000, 0x80000, CRC(b0de0ded) SHA1(45c74d0c58e3e73c79e587722d9fea9f7ba9cb0a) ) + ROM_LOAD16_BYTE( "b-2m", 0x00000, 0x80000, CRC(5794ec32) SHA1(07e78d8bcb2373da77ef9f8cde6a01f384f8bf7e) ) + ROM_LOAD16_BYTE( "b-1m", 0x00001, 0x80000, CRC(b0de0ded) SHA1(45c74d0c58e3e73c79e587722d9fea9f7ba9cb0a) ) ROM_REGION( 0x40000, "oki", 0 ) ROM_LOAD( "a-4a.4", 0x00000, 0x20000, CRC(ef9acdcf) SHA1(8d62a666843f0cb22e8926ae18a961052d4f9ed5) ) @@ -1463,7 +1465,7 @@ ROM_START( raiga ) ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "a-4b.3", 0x00000, 0x10000, CRC(18655c95) SHA1(8357e0520565a201bb930cadffc759463931ec41) ) - ROM_REGION( 0x0800, "mcu", 0 ) /* protection NEC D8049 */ + ROM_REGION( 0x0800, "mcu", 0 ) /* protection NEC D8749 */ ROM_LOAD( "a-6v.mcu", 0x00000, 0x0800, NO_DUMP ) ROM_REGION( 0x10000, "gfx1", 0 ) @@ -1476,8 +1478,8 @@ ROM_START( raiga ) ROM_LOAD( "b-4b", 0x00000, 0x80000, CRC(89468b84) SHA1(af60fe957c98fa3f00623d420a0941a941f5bc6b) ) ROM_REGION( 0x100000, "gfx4", 0 ) - ROM_LOAD( "b-2m", 0x00000, 0x80000, CRC(5794ec32) SHA1(07e78d8bcb2373da77ef9f8cde6a01f384f8bf7e) ) - ROM_LOAD( "b-1m", 0x80000, 0x80000, CRC(b0de0ded) SHA1(45c74d0c58e3e73c79e587722d9fea9f7ba9cb0a) ) + ROM_LOAD16_BYTE( "b-2m", 0x00000, 0x80000, CRC(5794ec32) SHA1(07e78d8bcb2373da77ef9f8cde6a01f384f8bf7e) ) + ROM_LOAD16_BYTE( "b-1m", 0x00001, 0x80000, CRC(b0de0ded) SHA1(45c74d0c58e3e73c79e587722d9fea9f7ba9cb0a) ) ROM_REGION( 0x40000, "oki", 0 ) ROM_LOAD( "a-4a.4", 0x00000, 0x20000, CRC(ef9acdcf) SHA1(8d62a666843f0cb22e8926ae18a961052d4f9ed5) ) diff --git a/src/mame/drivers/gal3.cpp b/src/mame/drivers/gal3.cpp index 002ae32e84c..d64fdccc9a4 100644 --- a/src/mame/drivers/gal3.cpp +++ b/src/mame/drivers/gal3.cpp @@ -45,8 +45,8 @@ | | | | | | | |------- Slave 68020 | | | |-------- 1x master DSP, 4x slave DSPs, Polygon, 2D Sprite ------> V-MIX board -----> SCREEN - | | | |-------- ........ more video boards ......... | - | | | |-------- ........ more video boards ......... LD Player + | | | |-------- ........ more video boards ......... (max 2 per slave?) | + | | | LD Player | | | | | |------- ........ more slave 68020s ......... | | @@ -135,6 +135,9 @@ better notes (complete chip lists) for each board still needed #include "rendlay.h" #include "speaker.h" #include "video/namco_c355spr.h" +#include "machine/namcos21_dsp_c67.h" +#include "video/namcos21_3d.h" +#include "emupal.h" #define NAMCOS21_NUM_COLORS 0x8000 @@ -143,39 +146,45 @@ class gal3_state : public driver_device public: gal3_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), - m_c355spr(*this, "c355spr"), - m_palette(*this, "palette"), + m_c355spr(*this, "c355spr_%u", 1U), + m_palette(*this, "palette_%u", 1U), m_rso_shared_ram(*this, "rso_shared_ram"), - m_generic_paletteram_16(*this, "paletteram"), m_c140_16a(*this, "c140_16a"), - m_c140_16g(*this, "c140_16g") + m_c140_16g(*this, "c140_16g"), + m_namcos21_3d(*this, "namcos21_3d_%u", 1U), + m_namcos21_dsp_c67(*this, "namcos21dsp_c67_%u", 1U) { } void gal3(machine_config &config); private: - required_device<namco_c355spr_device> m_c355spr; - required_device<palette_device> m_palette; - uint16_t m_namcos21_video_enable; + required_device_array<namco_c355spr_device, 2> m_c355spr; + required_device_array<palette_device, 2> m_palette; + uint16_t m_video_enable[2]; required_shared_ptr<uint16_t> m_rso_shared_ram; - optional_shared_ptr<uint16_t> m_generic_paletteram_16; required_device<c140_device> m_c140_16a; required_device<c140_device> m_c140_16g; + + + required_device_array<namcos21_3d_device, 2> m_namcos21_3d; + required_device_array<namcos21_dsp_c67_device, 2> m_namcos21_dsp_c67; + uint32_t m_led_mst; uint32_t m_led_slv; DECLARE_READ32_MEMBER(led_mst_r); DECLARE_WRITE32_MEMBER(led_mst_w); DECLARE_READ32_MEMBER(led_slv_r); DECLARE_WRITE32_MEMBER(led_slv_w); - DECLARE_READ32_MEMBER(paletteram32_r); - DECLARE_WRITE32_MEMBER(paletteram32_w); - DECLARE_READ32_MEMBER(namcos21_video_enable_r); - DECLARE_WRITE32_MEMBER(namcos21_video_enable_w); - DECLARE_READ32_MEMBER(rso_r); - DECLARE_WRITE32_MEMBER(rso_w); - DECLARE_VIDEO_START(gal3); - uint32_t screen_update_gal3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - void update_palette( ); + template<int Screen> DECLARE_READ16_MEMBER(video_enable_r); + template<int Screen> DECLARE_WRITE16_MEMBER(video_enable_w); + DECLARE_READ16_MEMBER(rso_r); + DECLARE_WRITE16_MEMBER(rso_w); + virtual void machine_start() override; + virtual void video_start() override; + + // using ind16 for now because namco_c355spr_device::zdrawgfxzoom does not support rgb32, will probably need to be improved for LD use + uint32_t screen_update_left(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_right(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void cpu_mst_map(address_map &map); void cpu_slv_map(address_map &map); void psn_b1_cpu_map(address_map &map); @@ -184,57 +193,37 @@ private: }; -VIDEO_START_MEMBER(gal3_state,gal3) +void gal3_state::machine_start() { - m_generic_paletteram_16.allocate(0x10000); + save_item(NAME(m_led_mst)); + save_item(NAME(m_led_slv)); } -/* FIXME: this code has simply been copypasted from namcos21.c - (which has subsequently been rewritten to use generic MAME - palette handling) with a 32-bit CPU it's rather unlikely - that the palette RAM is actually laid out this way */ - -void gal3_state::update_palette( ) +void gal3_state::video_start() { - int i; - int16_t data1,data2; - int r,g,b; - - for( i=0; i<NAMCOS21_NUM_COLORS; i++ ) - { - data1 = m_generic_paletteram_16[0x00000/2+i]; - data2 = m_generic_paletteram_16[0x10000/2+i]; - - r = data1>>8; - g = data1&0xff; - b = data2&0xff; - - m_palette->set_pen_color( i, rgb_t(r,g,b) ); - } -} /* update_palette */ + save_item(NAME(m_video_enable)); +} -uint32_t gal3_state::screen_update_gal3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +uint32_t gal3_state::screen_update_left(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { int i; char mst[18], slv[18]; static int pivot = 15; int pri; - update_palette(); - if( machine().input().code_pressed_once(KEYCODE_H)&&(pivot<15) ) pivot+=1; if( machine().input().code_pressed_once(KEYCODE_J)&&(pivot>0) ) pivot-=1; for( pri=0; pri<pivot; pri++ ) { - m_c355spr->draw(screen, bitmap, cliprect, pri); + m_c355spr[0]->draw(screen, bitmap, cliprect, pri); } /* CopyVisiblePolyFrameBuffer( bitmap, cliprect,0,0x7fbf ); for( pri=pivot; pri<15; pri++ ) { - m_c355spr->draw(screen, bitmap, cliprect, pri); + m_c355spr[0]->draw(screen, bitmap, cliprect, pri); }*/ // CPU Diag LEDs @@ -265,6 +254,29 @@ uint32_t gal3_state::screen_update_gal3(screen_device &screen, bitmap_rgb32 &bit return 0; } +uint32_t gal3_state::screen_update_right(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + static int pivot = 15; + int pri; + + if( machine().input().code_pressed_once(KEYCODE_H)&&(pivot<15) ) pivot+=1; + if( machine().input().code_pressed_once(KEYCODE_J)&&(pivot>0) ) pivot-=1; + + for( pri=0; pri<pivot; pri++ ) + { + m_c355spr[1]->draw(screen, bitmap, cliprect, pri); + } + +/* CopyVisiblePolyFrameBuffer( bitmap, cliprect,0,0x7fbf ); + + for( pri=pivot; pri<15; pri++ ) + { + m_c355spr[1]->draw(screen, bitmap, cliprect, pri); + }*/ + + return 0; +} + /***************************************************************************************/ @@ -288,55 +300,30 @@ WRITE32_MEMBER(gal3_state::led_slv_w) COMBINE_DATA(&m_led_slv); } -/* palette memory handlers */ - -READ32_MEMBER(gal3_state::paletteram32_r) -{ - offset *= 2; - return (m_generic_paletteram_16[offset]<<16)|m_generic_paletteram_16[offset+1]; -} - -WRITE32_MEMBER(gal3_state::paletteram32_w) -{ - uint32_t v; - offset *= 2; - v = (m_generic_paletteram_16[offset]<<16)|m_generic_paletteram_16[offset+1]; - COMBINE_DATA( &v ); - m_generic_paletteram_16[offset+0] = v>>16; - m_generic_paletteram_16[offset+1] = v&0xffff; -} - -READ32_MEMBER(gal3_state::namcos21_video_enable_r) +template<int Screen> +READ16_MEMBER(gal3_state::video_enable_r) { - return m_namcos21_video_enable<<16; + return m_video_enable[Screen]; } -WRITE32_MEMBER(gal3_state::namcos21_video_enable_w) +template<int Screen> +WRITE16_MEMBER(gal3_state::video_enable_w) { - uint32_t v; - v = m_namcos21_video_enable<<16; - COMBINE_DATA( &v ); // 0xff53, instead of 0x40 in namcos21 - m_namcos21_video_enable = v>>16; + COMBINE_DATA(&m_video_enable[Screen]); // 0xff53, instead of 0x40 in namcos21 } -READ32_MEMBER(gal3_state::rso_r) +READ16_MEMBER(gal3_state::rso_r) { /*store $5555 @$0046, and readback @$0000 read @$0144 and store at A6_21e & A4_5c Check @$009a==1 to start DEMO HACK*/ - offset *= 2; - return (m_rso_shared_ram[offset]<<16)|m_rso_shared_ram[offset+1]; + return m_rso_shared_ram[offset]; } -WRITE32_MEMBER(gal3_state::rso_w) +WRITE16_MEMBER(gal3_state::rso_w) { - uint32_t v; - offset *= 2; - v = (m_rso_shared_ram[offset]<<16)|m_rso_shared_ram[offset+1]; - COMBINE_DATA( &v ); - m_rso_shared_ram[offset+0] = v>>16; - m_rso_shared_ram[offset+1] = v&0xffff; + COMBINE_DATA(&m_rso_shared_ram[offset]); } @@ -371,21 +358,31 @@ void gal3_state::cpu_slv_map(address_map &map) map(0x60010000, 0x60017fff).ram().share("share1"); map(0x80000000, 0x8007ffff).ram(); //512K Local RAM - map(0xf1200000, 0xf120ffff).ram(); //DSP RAM -/// AM_RANGE(0xf1400000, 0xf1400003) AM_WRITE(pointram_control_w) -/// AM_RANGE(0xf1440000, 0xf1440003) AM_READWRITE(pointram_data_r,pointram_data_w) -/// AM_RANGE(0x440002, 0x47ffff) AM_WRITENOP /* (frame buffer?) */ -/// AM_RANGE(0xf1480000, 0xf14807ff) AM_READWRITE(namcos21_depthcue_r,namcos21_depthcue_w) - map(0xf1700000, 0xf170ffff).rw(m_c355spr, FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)).share("objram"); - map(0xf1720000, 0xf1720007).rw(m_c355spr, FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); - map(0xf1740000, 0xf175ffff).rw(FUNC(gal3_state::paletteram32_r), FUNC(gal3_state::paletteram32_w)); - map(0xf1760000, 0xf1760003).rw(FUNC(gal3_state::namcos21_video_enable_r), FUNC(gal3_state::namcos21_video_enable_w)); - - map(0xf2200000, 0xf220ffff).ram(); - map(0xf2700000, 0xf270ffff).ram(); //AM_READWRITE16(spriteram_r,spriteram_w,0xffffffff) AM_SHARE("objram") - map(0xf2720000, 0xf2720007).ram(); //AM_READWRITE16(position_r,position_w,0xffffffff) - map(0xf2740000, 0xf275ffff).ram(); //AM_READWRITE(paletteram16_r,paletteram16_w) AM_SHARE("paletteram") - map(0xf2760000, 0xf2760003).ram(); //AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w) + // Video chain 1 + map(0xf1200000, 0xf120ffff).rw(m_namcos21_dsp_c67[0], FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_hack_w)); + map(0xf1400000, 0xf1400003).w(m_namcos21_dsp_c67[0], FUNC(namcos21_dsp_c67_device::pointram_control_w)); + map(0xf1440000, 0xf1440003).rw(m_namcos21_dsp_c67[0], FUNC(namcos21_dsp_c67_device::pointram_data_r), FUNC(namcos21_dsp_c67_device::pointram_data_w)); + map(0xf1440004, 0xf147ffff).nopw(); + map(0xf1480000, 0xf14807ff).rw(m_namcos21_dsp_c67[0], FUNC(namcos21_dsp_c67_device::namcos21_depthcue_r), FUNC(namcos21_dsp_c67_device::namcos21_depthcue_w)); + + map(0xf1700000, 0xf170ffff).rw(m_c355spr[0], FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)).share("objram_1"); + map(0xf1720000, 0xf1720007).rw(m_c355spr[0], FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); + map(0xf1740000, 0xf174ffff).rw(m_palette[0], FUNC(palette_device::read16), FUNC(palette_device::write16)).share("palette_1"); + map(0xf1750000, 0xf175ffff).rw(m_palette[0], FUNC(palette_device::read16_ext), FUNC(palette_device::write16_ext)).share("palette_1_ext"); + map(0xf1760000, 0xf1760001).rw(FUNC(gal3_state::video_enable_r<0>), FUNC(gal3_state::video_enable_w<0>)); + + // Video chain 2 + map(0xf2200000, 0xf220ffff).rw(m_namcos21_dsp_c67[1], FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_hack_w)); + map(0xf2400000, 0xf2400003).w(m_namcos21_dsp_c67[1], FUNC(namcos21_dsp_c67_device::pointram_control_w)); + map(0xf2440000, 0xf2440003).rw(m_namcos21_dsp_c67[1], FUNC(namcos21_dsp_c67_device::pointram_data_r), FUNC(namcos21_dsp_c67_device::pointram_data_w)); + map(0xf2440004, 0xf247ffff).nopw(); + map(0xf2480000, 0xf24807ff).rw(m_namcos21_dsp_c67[1], FUNC(namcos21_dsp_c67_device::namcos21_depthcue_r), FUNC(namcos21_dsp_c67_device::namcos21_depthcue_w)); + + map(0xf2700000, 0xf270ffff).rw(m_c355spr[1], FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)).share("objram_2"); + map(0xf2720000, 0xf2720007).rw(m_c355spr[1], FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); + map(0xf2740000, 0xf274ffff).rw(m_palette[1], FUNC(palette_device::read16), FUNC(palette_device::write16)).share("palette_2"); + map(0xf2750000, 0xf275ffff).rw(m_palette[1], FUNC(palette_device::read16_ext), FUNC(palette_device::write16_ext)).share("palette_2_ext"); + map(0xf2760000, 0xf2760001).rw(FUNC(gal3_state::video_enable_r<1>), FUNC(gal3_state::video_enable_w<1>)); } void gal3_state::rs_cpu_map(address_map &map) @@ -603,10 +600,14 @@ static const gfx_layout tile_layout = 8*64 /* sprite offset */ }; -static GFXDECODE_START( gfx_namcos21 ) +static GFXDECODE_START( gfx_gal3_l ) GFXDECODE_ENTRY( "obj_board1", 0x000000, tile_layout, 0x000, 0x20 ) GFXDECODE_END +static GFXDECODE_START( gfx_gal3_r ) + GFXDECODE_ENTRY( "obj_board2", 0x000000, tile_layout, 0x000, 0x20 ) +GFXDECODE_END + MACHINE_CONFIG_START(gal3_state::gal3) MCFG_DEVICE_ADD("maincpu", M68020, 49152000/2) MCFG_DEVICE_PROGRAM_MAP(cpu_mst_map) @@ -636,32 +637,68 @@ MACHINE_CONFIG_START(gal3_state::gal3) NVRAM(config, "nvmem", nvram_device::DEFAULT_ALL_0); + // video chain 1 + MCFG_SCREEN_ADD("lscreen", RASTER) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) MCFG_SCREEN_SIZE(64*8, 64*8) MCFG_SCREEN_VISIBLE_AREA(0*8, 512-1, 0*8, 512-1) - MCFG_SCREEN_UPDATE_DRIVER(gal3_state, screen_update_gal3) + MCFG_SCREEN_UPDATE_DRIVER(gal3_state, screen_update_left) + MCFG_SCREEN_PALETTE("palette_1") + + MCFG_DEVICE_ADD("gfxdecode_1", GFXDECODE, "palette_1", gfx_gal3_l) + MCFG_PALETTE_ADD("palette_1", NAMCOS21_NUM_COLORS) + MCFG_PALETTE_MEMBITS(16) + MCFG_PALETTE_FORMAT(XBRG) + + NAMCO_C355SPR(config, m_c355spr[0], 0); + m_c355spr[0]->set_screen("lscreen"); + m_c355spr[0]->set_gfxdecode_tag("gfxdecode_1"); + m_c355spr[0]->set_is_namcofl(false); + m_c355spr[0]->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); + m_c355spr[0]->set_palxor(0xf); // reverse mapping + m_c355spr[0]->set_gfxregion(0); + + NAMCOS21_3D(config, m_namcos21_3d[0], 0); + m_namcos21_3d[0]->set_zz_shift_mult(11, 0x200); + m_namcos21_3d[0]->set_depth_reverse(false); + m_namcos21_3d[0]->set_framebuffer_size(496,480); + + NAMCOS21_DSP_C67(config, m_namcos21_dsp_c67[0], 0); + m_namcos21_dsp_c67[0]->set_renderer_tag("namcos21_3d_1"); + + // video chain 2 MCFG_SCREEN_ADD("rscreen", RASTER) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) MCFG_SCREEN_SIZE(64*8, 64*8) MCFG_SCREEN_VISIBLE_AREA(0*8, 512-1, 0*8, 512-1) - MCFG_SCREEN_UPDATE_DRIVER(gal3_state, screen_update_gal3) + MCFG_SCREEN_UPDATE_DRIVER(gal3_state, screen_update_right) + MCFG_SCREEN_PALETTE("palette_2") + + MCFG_DEVICE_ADD("gfxdecode_2", GFXDECODE, "palette_2", gfx_gal3_r) + MCFG_PALETTE_ADD("palette_2", NAMCOS21_NUM_COLORS) + MCFG_PALETTE_MEMBITS(16) + MCFG_PALETTE_FORMAT(XBRG) + + NAMCO_C355SPR(config, m_c355spr[1], 0); + m_c355spr[1]->set_screen("rscreen"); + m_c355spr[1]->set_gfxdecode_tag("gfxdecode_2"); + m_c355spr[1]->set_is_namcofl(false); + m_c355spr[1]->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); + m_c355spr[1]->set_palxor(0xf); // reverse mapping + m_c355spr[1]->set_gfxregion(0); - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos21) - MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS) + NAMCOS21_3D(config, m_namcos21_3d[1], 0); + m_namcos21_3d[1]->set_zz_shift_mult(11, 0x200); + m_namcos21_3d[1]->set_depth_reverse(false); + m_namcos21_3d[1]->set_framebuffer_size(496,480); - NAMCO_C355SPR(config, m_c355spr, 0); - m_c355spr->set_palette_tag("palette"); - m_c355spr->set_gfxdecode_tag("gfxdecode"); - m_c355spr->set_is_namcofl(false); - m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); - m_c355spr->set_palxor(0xf); // reverse mapping - m_c355spr->set_gfxregion(0); + NAMCOS21_DSP_C67(config, m_namcos21_dsp_c67[1], 0); + m_namcos21_dsp_c67[1]->set_renderer_tag("namcos21_3d_2"); - MCFG_VIDEO_START_OVERRIDE(gal3_state,gal3) SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); @@ -816,17 +853,15 @@ ROM_START( gal3 ) ROM_LOAD32_BYTE( "glc-slv-prg3.18b", 0x00000, 0x20000, CRC(deae86d2) SHA1(1898955423b8da585b6319406566aad02db20d64) ) /********* DSP board x2 *********/ - ROM_REGION32_BE( 0x400000, "dsp_board1", ROMREGION_ERASE ) /* 24bit signed point data */ + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67_1:point24", ROMREGION_ERASE ) /* 24bit signed point data */ ROM_LOAD32_BYTE( "glc1-dsp-ptoh.2f", 0x000001, 0x80000, CRC(b4213c83) SHA1(9d036b73149656fdc13eed38946a70f532bff3f1) ) /* most significant */ ROM_LOAD32_BYTE( "glc1-dsp-ptou.2k", 0x000002, 0x80000, CRC(14877cef) SHA1(5ebdccd6db837ceb9473bd219eb211431944cbf0) ) ROM_LOAD32_BYTE( "glc1-dsp-ptol.2n", 0x000003, 0x80000, CRC(b318534a) SHA1(6fcf2ead6dd0d5a6f22438520588ba4e33ca39a8) ) /* least significant */ - /* and 5x C67 (TMS320C25) */ - ROM_REGION32_BE( 0x400000, "dsp_board2", ROMREGION_ERASE ) /* 24bit signed point data */ + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67_2:point24", ROMREGION_ERASE ) /* 24bit signed point data */ ROM_LOAD32_BYTE( "glc1-dsp-ptoh.2f", 0x000001, 0x80000, CRC(b4213c83) SHA1(9d036b73149656fdc13eed38946a70f532bff3f1) ) /* most significant */ ROM_LOAD32_BYTE( "glc1-dsp-ptou.2k", 0x000002, 0x80000, CRC(14877cef) SHA1(5ebdccd6db837ceb9473bd219eb211431944cbf0) ) ROM_LOAD32_BYTE( "glc1-dsp-ptol.2n", 0x000003, 0x80000, CRC(b318534a) SHA1(6fcf2ead6dd0d5a6f22438520588ba4e33ca39a8) ) /* least significant */ - /* and 5x C67 (TMS320C25) */ /********* OBJ board x2 *********/ ROM_REGION( 0x200000, "obj_board1", 0 ) diff --git a/src/mame/drivers/galaxian.cpp b/src/mame/drivers/galaxian.cpp index 3f1307ce6db..878d1a5b614 100644 --- a/src/mame/drivers/galaxian.cpp +++ b/src/mame/drivers/galaxian.cpp @@ -867,8 +867,8 @@ READ8_MEMBER(galaxian_state::theend_ppi8255_r) { /* the decoding here is very simplistic, and you can address both simultaneously */ uint8_t result = 0xff; - if (offset & 0x0100) result &= m_ppi8255[0]->read(space, offset & 3); - if (offset & 0x0200) result &= m_ppi8255[1]->read(space, offset & 3); + if (offset & 0x0100) result &= m_ppi8255[0]->read(offset & 3); + if (offset & 0x0200) result &= m_ppi8255[1]->read(offset & 3); return result; } @@ -876,8 +876,8 @@ READ8_MEMBER(galaxian_state::theend_ppi8255_r) WRITE8_MEMBER(galaxian_state::theend_ppi8255_w) { /* the decoding here is very simplistic, and you can address both simultaneously */ - if (offset & 0x0100) m_ppi8255[0]->write(space, offset & 3, data); - if (offset & 0x0200) m_ppi8255[1]->write(space, offset & 3, data); + if (offset & 0x0100) m_ppi8255[0]->write(offset & 3, data); + if (offset & 0x0200) m_ppi8255[1]->write(offset & 3, data); } @@ -972,7 +972,7 @@ READ8_MEMBER(galaxian_state::sfx_sample_io_r) { /* the decoding here is very simplistic, and you can address both simultaneously */ uint8_t result = 0xff; - if (offset & 0x04) result &= m_ppi8255[2]->read(space, offset & 3); + if (offset & 0x04) result &= m_ppi8255[2]->read(offset & 3); return result; } @@ -980,7 +980,7 @@ READ8_MEMBER(galaxian_state::sfx_sample_io_r) WRITE8_MEMBER(galaxian_state::sfx_sample_io_w) { /* the decoding here is very simplistic, and you can address both simultaneously */ - if (offset & 0x04) m_ppi8255[2]->write(space, offset & 3, data); + if (offset & 0x04) m_ppi8255[2]->write(offset & 3, data); if (offset & 0x10) m_dac->write(data); } @@ -1064,8 +1064,8 @@ READ8_MEMBER(galaxian_state::frogger_ppi8255_r) { /* the decoding here is very simplistic, and you can address both simultaneously */ uint8_t result = 0xff; - if (offset & 0x1000) result &= m_ppi8255[1]->read(space, (offset >> 1) & 3); - if (offset & 0x2000) result &= m_ppi8255[0]->read(space, (offset >> 1) & 3); + if (offset & 0x1000) result &= m_ppi8255[1]->read((offset >> 1) & 3); + if (offset & 0x2000) result &= m_ppi8255[0]->read((offset >> 1) & 3); return result; } @@ -1073,8 +1073,8 @@ READ8_MEMBER(galaxian_state::frogger_ppi8255_r) WRITE8_MEMBER(galaxian_state::frogger_ppi8255_w) { /* the decoding here is very simplistic, and you can address both simultaneously */ - if (offset & 0x1000) m_ppi8255[1]->write(space, (offset >> 1) & 3, data); - if (offset & 0x2000) m_ppi8255[0]->write(space, (offset >> 1) & 3, data); + if (offset & 0x1000) m_ppi8255[1]->write((offset >> 1) & 3, data); + if (offset & 0x2000) m_ppi8255[0]->write((offset >> 1) & 3, data); } @@ -1129,8 +1129,8 @@ READ8_MEMBER(galaxian_state::frogf_ppi8255_r) { /* the decoding here is very simplistic, and you can address both simultaneously */ uint8_t result = 0xff; - if (offset & 0x1000) result &= m_ppi8255[0]->read(space, (offset >> 3) & 3); - if (offset & 0x2000) result &= m_ppi8255[1]->read(space, (offset >> 3) & 3); + if (offset & 0x1000) result &= m_ppi8255[0]->read((offset >> 3) & 3); + if (offset & 0x2000) result &= m_ppi8255[1]->read((offset >> 3) & 3); return result; } @@ -1138,8 +1138,8 @@ READ8_MEMBER(galaxian_state::frogf_ppi8255_r) WRITE8_MEMBER(galaxian_state::frogf_ppi8255_w) { /* the decoding here is very simplistic, and you can address both simultaneously */ - if (offset & 0x1000) m_ppi8255[0]->write(space, (offset >> 3) & 3, data); - if (offset & 0x2000) m_ppi8255[1]->write(space, (offset >> 3) & 3, data); + if (offset & 0x1000) m_ppi8255[0]->write((offset >> 3) & 3, data); + if (offset & 0x2000) m_ppi8255[1]->write((offset >> 3) & 3, data); } @@ -1150,10 +1150,10 @@ WRITE8_MEMBER(galaxian_state::frogf_ppi8255_w) * *************************************/ -READ8_MEMBER(galaxian_state::turtles_ppi8255_0_r){ return m_ppi8255[0]->read(space, (offset >> 4) & 3); } -READ8_MEMBER(galaxian_state::turtles_ppi8255_1_r){ return m_ppi8255[1]->read(space, (offset >> 4) & 3); } -WRITE8_MEMBER(galaxian_state::turtles_ppi8255_0_w){ m_ppi8255[0]->write(space, (offset >> 4) & 3, data); } -WRITE8_MEMBER(galaxian_state::turtles_ppi8255_1_w){ m_ppi8255[1]->write(space, (offset >> 4) & 3, data); } +READ8_MEMBER(galaxian_state::turtles_ppi8255_0_r){ return m_ppi8255[0]->read((offset >> 4) & 3); } +READ8_MEMBER(galaxian_state::turtles_ppi8255_1_r){ return m_ppi8255[1]->read((offset >> 4) & 3); } +WRITE8_MEMBER(galaxian_state::turtles_ppi8255_0_w){ m_ppi8255[0]->write((offset >> 4) & 3, data); } +WRITE8_MEMBER(galaxian_state::turtles_ppi8255_1_w){ m_ppi8255[1]->write((offset >> 4) & 3, data); } @@ -2191,8 +2191,8 @@ READ8_MEMBER(galaxian_state::froggeram_ppi8255_r) { // same as theend, but accesses are scrambled uint8_t result = 0xff; - if (offset & 0x0100) result &= m_ppi8255[0]->read(space, offset & 3); - if (offset & 0x0200) result &= m_ppi8255[1]->read(space, offset & 3); + if (offset & 0x0100) result &= m_ppi8255[0]->read(offset & 3); + if (offset & 0x0200) result &= m_ppi8255[1]->read(offset & 3); return bitswap<8>(result, 0, 1, 2, 3, 4, 5, 6, 7); } @@ -2200,8 +2200,8 @@ WRITE8_MEMBER(galaxian_state::froggeram_ppi8255_w) { // same as theend, but accesses are scrambled data = bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7); - if (offset & 0x0100) m_ppi8255[0]->write(space, offset & 3, data); - if (offset & 0x0200) m_ppi8255[1]->write(space, offset & 3, data); + if (offset & 0x0100) m_ppi8255[0]->write(offset & 3, data); + if (offset & 0x0200) m_ppi8255[1]->write(offset & 3, data); } void galaxian_state::froggeram_map(address_map &map) @@ -6468,14 +6468,14 @@ MACHINE_CONFIG_START(galaxian_state::amigo2) // marked "AMI", but similar to abo MCFG_DEVICE_ADD("audiocpu", Z80, 12_MHz_XTAL / 2 / 2 / 2) /* clock not verified */ MCFG_DEVICE_PROGRAM_MAP(konami_sound_map) MCFG_DEVICE_IO_MAP(konami_sound_portmap) - MCFG_GENERIC_LATCH_8_ADD("soundlatch") + MCFG_GENERIC_LATCH_8_ADD("soundlatch") /* sound hardware */ MCFG_DEVICE_ADD("8910.0", AY8910, 12_MHz_XTAL / 2 / 2 / 2) /* matches PCB, needs verification */ MCFG_AY8910_PORT_A_READ_CB(READ8("soundlatch", generic_latch_8_device, read)) MCFG_AY8910_PORT_B_READ_CB(READ8(*this, galaxian_state, konami_sound_timer_r)) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.25) - MCFG_DEVICE_ADD("8910.1", AY8910, 12_MHz_XTAL / 2 / 2 / 2) /* matches PCB, needs verification */ + MCFG_DEVICE_ADD("8910.1", AY8910, 12_MHz_XTAL / 2 / 2 / 2) /* matches PCB, needs verification */ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.25) MACHINE_CONFIG_END @@ -8063,6 +8063,24 @@ ROM_START( zerotimed ) ROM_LOAD( "6l.bpr", 0x0000, 0x0020, CRC(c3ac9467) SHA1(f382ad5a34d282056c78a5ec00c30ec43772bae2) ) ROM_END +/* Marti Colls (Falgas) bootleg */ +ROM_START( zerotimemc ) + ROM_REGION( 0x4000, "maincpu", 0 ) + ROM_LOAD( "4_7k.bin", 0x0000, 0x0800, CRC(ac64aabe) SHA1(1cd834bf8b387428639dffd5e4b0ee72fa8aafdf) ) + ROM_LOAD( "5_7j.bin", 0x0800, 0x0800, CRC(a433067e) SHA1(1aed1a2153c4a32a9996fc709e544f2063885599) ) + ROM_LOAD( "6_7h.bin", 0x1000, 0x0800, CRC(7c86fc8a) SHA1(ea7e16cfd765fb992bd476796e2e3a5f87e8360c) ) + ROM_LOAD( "7_7f.bin", 0x1800, 0x0800, CRC(786d690a) SHA1(50c5c07941006e3b71afbf057d27daa2f2274925) ) + ROM_LOAD( "3_7l.bin", 0x2000, 0x0800, CRC(af9260d7) SHA1(955e466a8989993351dc69d73ca322c1c9af7b63) ) + + ROM_REGION( 0x1000, "gfx1", 0 ) + ROM_LOAD( "2_1hj.bin", 0x0000, 0x0800, CRC(bc7d0985) SHA1(550a44c9ddc8da66a29405591a590f91d2675cdf) ) + ROM_LOAD( "1_1kl.bin", 0x0800, 0x0800, CRC(c48b88d0) SHA1(dc79f596395af0f3137eb932fe224ab8307d8771) ) + + /* Not dumped on the Marti Colls PCB, taken from the parent set */ + ROM_REGION( 0x0020, "proms", 0 ) + ROM_LOAD( "6l.bpr", 0x0000, 0x0020, CRC(c3ac9467) SHA1(f382ad5a34d282056c78a5ec00c30ec43772bae2) ) +ROM_END + ROM_START( starfght ) ROM_REGION( 0x4000, "maincpu", 0 ) @@ -10740,7 +10758,7 @@ ROM_START( froggrs ) ROM_LOAD( "pr-91.6l", 0x0000, 0x0020, CRC(413703bf) SHA1(66648b2b28d3dcbda5bdb2605d1977428939dd3c) ) ROM_END -/* Video Dens Frogger */ +/* Hermatic Frogger, found on a Video Dens PCB */ ROM_START( froggervd ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "frogvd_r1-libro-s1.ac9", 0x0000, 0x0800, CRC(81c2020e) SHA1(8c9292b399a408795e78b7dc5c706d3b526d3751) ) // 2716 @@ -12382,8 +12400,9 @@ GAME( 1979, supergs, galaxian, galaxian, superg, galaxian_state, init_ GAME( 1979, galturbo, galaxian, galaxian, superg, galaxian_state, init_galaxian, ROT90, "hack", "Galaxian Turbo (superg hack)", MACHINE_SUPPORTS_SAVE ) GAME( 1979, galap1, galaxian, galaxian, superg, galaxian_state, init_galaxian, ROT90, "hack", "Space Invaders Galactica (galaxiana hack)", MACHINE_SUPPORTS_SAVE ) GAME( 1979, galap4, galaxian, galaxian, superg, galaxian_state, init_galaxian, ROT90, "hack (G.G.I)", "Galaxian Part 4 (hack)", MACHINE_SUPPORTS_SAVE ) -GAME( 1979, zerotime, galaxian, galaxian, zerotime, galaxian_state, init_galaxian, ROT90, "bootleg? (Petaco S.A.)", "Zero Time", MACHINE_SUPPORTS_SAVE ) +GAME( 1979, zerotime, galaxian, galaxian, zerotime, galaxian_state, init_galaxian, ROT90, "bootleg? (Petaco S.A.)", "Zero Time (Petaco S.A.)", MACHINE_SUPPORTS_SAVE ) GAME( 1979, zerotimed, galaxian, galaxian, zerotime, galaxian_state, init_galaxian, ROT90, "bootleg (Datamat)", "Zero Time (Datamat)", MACHINE_SUPPORTS_SAVE ) // a 1994 bootleg of the Petaco bootleg +GAME( 1979, zerotimemc, galaxian, galaxian, zerotime, galaxian_state, init_galaxian, ROT90, "bootleg (Marti Colls)", "Zero Time (Marti Colls)", MACHINE_SUPPORTS_SAVE ) GAME( 1979, starfght, galaxian, galaxian, swarm, galaxian_state, init_galaxian, ROT90, "bootleg (Jeutel)", "Star Fighter", MACHINE_SUPPORTS_SAVE ) GAME( 1979, galaxbsf, galaxian, galaxian, galaxian, galaxian_state, init_galaxian, ROT90, "bootleg", "Galaxian (bootleg, set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1979, galaxianbl, galaxian, galaxian, galaxianbl, galaxian_state, init_galaxian, ROT90, "bootleg", "Galaxian (bootleg, set 2)", MACHINE_SUPPORTS_SAVE ) @@ -12582,7 +12601,7 @@ GAME( 1981, froggers, frogger, froggers, frogger, galaxian_state, init_ GAME( 1981, frogf, frogger, frogf, frogger, galaxian_state, init_froggers, ROT90, "bootleg (Falcon)", "Frog (Falcon bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, frogg, frogger, frogg, frogg, galaxian_state, init_frogg, ROT90, "bootleg", "Frog (Galaxian hardware)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, froggrs, frogger, froggers, frogger, galaxian_state, init_froggrs, ROT90, "bootleg (Coin Music)", "Frogger (Coin Music, bootleg on Scramble hardware)", MACHINE_SUPPORTS_SAVE ) -GAME( 1981, froggervd, frogger, froggervd, frogger, galaxian_state, init_quaak, ROT90, "bootleg (Video Dens)", "Frogger (Video Dens, bootleg on Scramble hardware)", MACHINE_SUPPORTS_SAVE ) +GAME( 1981, froggervd, frogger, froggervd, frogger, galaxian_state, init_quaak, ROT90, "bootleg (Hermatic)", "Frogger (Hermatic, bootleg on Scramble hardware from Video Dens)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, quaak, frogger, quaak, frogger, galaxian_state, init_quaak, ROT90, "bootleg", "Quaak (bootleg of Frogger)", MACHINE_SUPPORTS_SAVE ) // closest to Super Cobra hardware, presumably a bootleg from Germany (Quaak is the German frog sound) GAME( 1981, froggeram, frogger, froggeram, froggeram, galaxian_state, init_quaak, ROT90, "bootleg", "Frogger (bootleg on Amigo? hardware)", MACHINE_SUPPORTS_SAVE ) // meant to be Amigo hardware, but maybe a different bootleg than the one we have? diff --git a/src/mame/drivers/gamecom.cpp b/src/mame/drivers/gamecom.cpp index bb7e765deca..afc4175eec9 100644 --- a/src/mame/drivers/gamecom.cpp +++ b/src/mame/drivers/gamecom.cpp @@ -14,11 +14,16 @@ Todo: Game Status: - Inbuilt ROM and PDA functions all work -- On the screen where the cart goes into the slot, there are vertical bands of randomness - Due to an irritating message, the NVRAM is commented out in the machine config - All carts appear to work except: -- - Henry: crash just after "HENRY" button clicked -- - Lost World: freeze just after entering Stage 2 (the nest) +- - Henry: misbehaviour just after "HENRY" button clicked. +- --- You can still click where the invisible HENRY button is, and have one + turn. After that, it's game over, and you can't play any more until + you cold boot the emulation. +- - Lost World: freeze just after entering Stage 2 (the nest). +- --- If you do nothing it freezes at the point where the stegasaurus + should turn around. So, straight away start moving to the right + and you can keep playing. - Weblink and Internet are of no use as there is nothing to connect to. ***************************************************************************/ @@ -71,6 +76,7 @@ static INPUT_PORTS_START( gamecom ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME( "Button D" ) PORT_CODE( KEYCODE_D ) PORT_CODE( KEYCODE_LSHIFT ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME( "Stylus press" ) PORT_CODE( KEYCODE_Z ) PORT_CODE( MOUSECODE_BUTTON1 ) + // These are used by the "Default Grid" artwork to detect mouse clicks PORT_START("GRID.0") PORT_BIT( 0x001, IP_ACTIVE_HIGH, IPT_OTHER) PORT_BIT( 0x002, IP_ACTIVE_HIGH, IPT_OTHER) diff --git a/src/mame/drivers/geneve.cpp b/src/mame/drivers/geneve.cpp index 287a1d14059..d0849d802be 100644 --- a/src/mame/drivers/geneve.cpp +++ b/src/mame/drivers/geneve.cpp @@ -637,7 +637,7 @@ WRITE_LINE_MEMBER( geneve_state::keyboard_interrupt ) WRITE8_MEMBER( geneve_state::external_operation ) { - static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; + static char const *const extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; if (offset != IDLE_OP) LOGMASKED(LOG_WARN, "External operation %s not implemented on Geneve board\n", extop[offset]); } diff --git a/src/mame/drivers/gkigt.cpp b/src/mame/drivers/gkigt.cpp index ead0439482b..690d5bd7226 100644 --- a/src/mame/drivers/gkigt.cpp +++ b/src/mame/drivers/gkigt.cpp @@ -637,7 +637,8 @@ MACHINE_CONFIG_START(igt_gameking_state::igt_gameking) MCFG_PALETTE_ADD("palette", 0x100) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &igt_gameking_state::ramdac_map); /* sound hardware */ SPEAKER(config, "mono").front_center(); diff --git a/src/mame/drivers/glass.cpp b/src/mame/drivers/glass.cpp index a0d2865508f..e6b01d1b103 100644 --- a/src/mame/drivers/glass.cpp +++ b/src/mame/drivers/glass.cpp @@ -53,29 +53,22 @@ INTERRUPT_GEN_MEMBER(glass_state::interrupt) static const gfx_layout glass_tilelayout16 = { 16,16, /* 16x16 tiles */ - 0x100000/32, /* number of tiles */ + RGN_FRAC(1,2), /* number of tiles */ 4, /* 4 bpp */ - { 3*0x100000*8, 2*0x100000*8, 1*0x100000*8, 0*0x100000*8 }, - { - 0, 1, 2, 3, 4, 5, 6, 7, - 16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7 - }, - { - 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, - 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 - }, - 32*8 + { RGN_FRAC(1,2)+8, RGN_FRAC(1,2), 8, 0 }, + { STEP8(0,1), STEP8(8*2*16,1), }, + { STEP16(0,8*2) }, + 8*2*16*2 }; static GFXDECODE_START( gfx_glass ) - GFXDECODE_ENTRY( "gfx1", 0x000000, glass_tilelayout16, 0, 64 ) + GFXDECODE_ENTRY( "gfx", 0x000000, glass_tilelayout16, 0, 64 ) GFXDECODE_END -WRITE16_MEMBER(glass_state::OKIM6295_bankswitch_w) +WRITE8_MEMBER(glass_state::oki_bankswitch_w) { - if (ACCESSING_BITS_0_7) - membank("okibank")->set_entry(data & 0x0f); + m_okibank->set_entry(data & 0x0f); } WRITE16_MEMBER(glass_state::coin_w) @@ -125,7 +118,7 @@ void glass_state::glass_map(address_map &map) map(0x700006, 0x700007).portr("P2"); map(0x700008, 0x700009).w(FUNC(glass_state::blitter_w)); // serial blitter map(0x70000a, 0x70000b).select(0x000070).w(FUNC(glass_state::coin_w)); // Coin Counters/Lockout - map(0x70000c, 0x70000d).w(FUNC(glass_state::OKIM6295_bankswitch_w)); // OKI6295 bankswitch + map(0x70000d, 0x70000d).w(FUNC(glass_state::oki_bankswitch_w)); // OKI6295 bankswitch map(0x70000f, 0x70000f).rw("oki", FUNC(okim6295_device::read), FUNC(okim6295_device::write)); // OKI6295 status register map(0xfec000, 0xfeffff).ram().share("shareram"); // Work RAM (partially shared with DS5002FP) } @@ -213,22 +206,18 @@ INPUT_PORTS_END void glass_state::machine_start() { - membank("okibank")->configure_entries(0, 16, memregion("oki")->base(), 0x10000); + m_okibank->configure_entries(0, 16, memregion("oki")->base(), 0x10000); save_item(NAME(m_cause_interrupt)); save_item(NAME(m_current_bit)); - save_item(NAME(m_current_command)); - save_item(NAME(m_blitter_serial_buffer)); + save_item(NAME(m_blitter_command)); } void glass_state::machine_reset() { m_cause_interrupt = 1; m_current_bit = 0; - m_current_command = 0; - - for (int i = 0; i < 5; i++) - m_blitter_serial_buffer[i] = 0; + m_blitter_command = 0; } MACHINE_CONFIG_START(glass_state::glass) @@ -286,14 +275,11 @@ ROM_START( glass ) /* Version 1.1 */ DS5002FP_SET_RPCTL( 0x00 ) DS5002FP_SET_CRCR( 0x80 ) - ROM_REGION( 0x400000, "gfx1", ROMREGION_ERASE00 ) /* Graphics */ - /* 0x000000-0x3fffff filled in later in the DRIVER_INIT */ - - ROM_REGION( 0x400000, "gfx2", 0 ) /* Graphics */ + ROM_REGION( 0x400000, "gfx", 0 ) /* Graphics */ ROM_LOAD( "h13.bin", 0x000000, 0x200000, CRC(13ab7f31) SHA1(468424f74d6cccd1b445a9f20e2d24bc46d61ed6) ) ROM_LOAD( "h11.bin", 0x200000, 0x200000, CRC(c6ac41c8) SHA1(22408ef1e35c66d0fba0c72972c46fad891d1193) ) - ROM_REGION( 0x100000, "gfx3", 0 ) /* 16 bitmaps (320x200, indexed colors) */ + ROM_REGION( 0x100000, "bmap", 0 ) /* 16 bitmaps (320x200, indexed colors) */ ROM_LOAD( "h9.bin", 0x000000, 0x100000, CRC(b9492557) SHA1(3f5c0d696d65e1cd492763dfa749c813dd56a9bf) ) ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples - sound chip is OKIM6295 */ @@ -315,14 +301,11 @@ ROM_START( glass10 ) /* Version 1.0 */ DS5002FP_SET_RPCTL( 0x00 ) DS5002FP_SET_CRCR( 0x80 ) - ROM_REGION( 0x400000, "gfx1", ROMREGION_ERASE00 ) /* Graphics */ - /* 0x000000-0x3fffff filled in later in the DRIVER_INIT */ - - ROM_REGION( 0x400000, "gfx2", 0 ) /* Graphics */ + ROM_REGION( 0x400000, "gfx", 0 ) /* Graphics */ ROM_LOAD( "h13.bin", 0x000000, 0x200000, CRC(13ab7f31) SHA1(468424f74d6cccd1b445a9f20e2d24bc46d61ed6) ) ROM_LOAD( "h11.bin", 0x200000, 0x200000, CRC(c6ac41c8) SHA1(22408ef1e35c66d0fba0c72972c46fad891d1193) ) - ROM_REGION( 0x100000, "gfx3", 0 ) /* 16 bitmaps (320x200, indexed colors) */ + ROM_REGION( 0x100000, "bmap", 0 ) /* 16 bitmaps (320x200, indexed colors) */ ROM_LOAD( "h9.bin", 0x000000, 0x100000, CRC(b9492557) SHA1(3f5c0d696d65e1cd492763dfa749c813dd56a9bf) ) ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples - sound chip is OKIM6295 */ @@ -344,14 +327,11 @@ ROM_START( glass10a ) /* Title screen shows "GLASS" and under that "Break Editio DS5002FP_SET_RPCTL( 0x00 ) DS5002FP_SET_CRCR( 0x80 ) - ROM_REGION( 0x400000, "gfx1", ROMREGION_ERASE00 ) /* Graphics */ - /* 0x000000-0x3fffff filled in later in the DRIVER_INIT */ - - ROM_REGION( 0x400000, "gfx2", 0 ) /* Graphics */ + ROM_REGION( 0x400000, "gfx", 0 ) /* Graphics */ ROM_LOAD( "h13.bin", 0x000000, 0x200000, CRC(13ab7f31) SHA1(468424f74d6cccd1b445a9f20e2d24bc46d61ed6) ) ROM_LOAD( "h11.bin", 0x200000, 0x200000, CRC(c6ac41c8) SHA1(22408ef1e35c66d0fba0c72972c46fad891d1193) ) - ROM_REGION( 0x100000, "gfx3", 0 ) /* 16 bitmaps (320x200, indexed colors) */ + ROM_REGION( 0x100000, "bmap", 0 ) /* 16 bitmaps (320x200, indexed colors) */ ROM_LOAD( "h9.bin", 0x000000, 0x100000, CRC(b9492557) SHA1(3f5c0d696d65e1cd492763dfa749c813dd56a9bf) ) ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples - sound chip is OKIM6295 */ @@ -364,14 +344,11 @@ ROM_START( glasskr ) ROM_LOAD16_BYTE( "glassk.c23", 0x000000, 0x080000, CRC(6ee19376) SHA1(8a8fdeebe094bd3e29c35cf59584e3cab708732d) ) ROM_LOAD16_BYTE( "glassk.c22", 0x000001, 0x080000, CRC(bd546568) SHA1(bcd5e7591f4e68c9470999b8a0ef1ee4392c907c) ) - ROM_REGION( 0x400000, "gfx1", ROMREGION_ERASE00 ) /* Graphics */ - /* 0x000000-0x3fffff filled in later in the DRIVER_INIT */ - - ROM_REGION( 0x400000, "gfx2", 0 ) /* Graphics */ + ROM_REGION( 0x400000, "gfx", 0 ) /* Graphics */ ROM_LOAD( "h13.bin", 0x000000, 0x200000, CRC(13ab7f31) SHA1(468424f74d6cccd1b445a9f20e2d24bc46d61ed6) ) ROM_LOAD( "h11.bin", 0x200000, 0x200000, CRC(c6ac41c8) SHA1(22408ef1e35c66d0fba0c72972c46fad891d1193) ) - ROM_REGION( 0x100000, "gfx3", 0 ) /* 16 bitmaps (320x200, indexed colors) */ + ROM_REGION( 0x100000, "bmap", 0 ) /* 16 bitmaps (320x200, indexed colors) */ ROM_LOAD( "glassk.h9", 0x000000, 0x100000, CRC(d499be4c) SHA1(204f754813be687e8dc00bfe7b5dbc4857ac8738) ) ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples - sound chip is OKIM6295 */ @@ -379,53 +356,6 @@ ROM_START( glasskr ) /* 0x00000-0x2ffff is fixed, 0x30000-0x3ffff is bank switched from all the ROMs */ ROM_END -/*************************************************************************** - - Split even/odd bytes from ROMs in 16 bit mode to different memory areas - -***************************************************************************/ - -void glass_state::ROM16_split_gfx( const char *src_reg, const char *dst_reg, int start, int length, int dest1, int dest2 ) -{ - int i; - - /* get a pointer to the source data */ - uint8_t *src = (uint8_t *)memregion(src_reg)->base(); - - /* get a pointer to the destination data */ - uint8_t *dst = (uint8_t *)memregion(dst_reg)->base(); - - /* fill destination areas with the proper data */ - for (i = 0; i < length / 2; i++) - { - dst[dest1 + i] = src[start + i * 2 + 0]; - dst[dest2 + i] = src[start + i * 2 + 1]; - } -} - - -void glass_state::init_glass() -{ - /* - For "gfx2" we have this memory map: - 0x000000-0x1fffff ROM H13 - 0x200000-0x3fffff ROM H11 - - and we are going to construct this one for "gfx1": - 0x000000-0x0fffff ROM H13 even bytes - 0x100000-0x1fffff ROM H13 odd bytes - 0x200000-0x2fffff ROM H11 even bytes - 0x300000-0x3fffff ROM H11 odd bytes - */ - - /* split ROM H13 */ - ROM16_split_gfx("gfx2", "gfx1", 0x0000000, 0x0200000, 0x0000000, 0x0100000); - - /* split ROM H11 */ - ROM16_split_gfx("gfx2", "gfx1", 0x0200000, 0x0200000, 0x0200000, 0x0300000); - -} - /* ALL versions of Glass contain the 'Break Edition' string (it just seems to be part of the title?) @@ -436,7 +366,7 @@ void glass_state::init_glass() The unprotected version appears to be a Korean set, is censored, and has different girl pictures. */ -GAME( 1994, glass, 0, glass_ds5002fp, glass, glass_state, init_glass, ROT0, "OMK / Gaelco", "Glass (Ver 1.1, Break Edition, Checksum 49D5E66B, Version 1994)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1994, glasskr, glass, glass, glass, glass_state, init_glass, ROT0, "OMK / Gaelco (Promat license)", "Glass (Ver 1.1, Break Edition, Checksum D419AB69, Version 1994) (censored, unprotected)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // promat stickers on program roms -GAME( 1993, glass10, glass, glass_ds5002fp, glass, glass_state, init_glass, ROT0, "OMK / Gaelco", "Glass (Ver 1.0, Break Edition, Checksum C5513F3C)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1993, glass10a, glass, glass_ds5002fp, glass, glass_state, init_glass, ROT0, "OMK / Gaelco", "Glass (Ver 1.0, Break Edition, Checksum D3864FDB)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1994, glass, 0, glass_ds5002fp, glass, glass_state, empty_init, ROT0, "OMK / Gaelco", "Glass (Ver 1.1, Break Edition, Checksum 49D5E66B, Version 1994)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1994, glasskr, glass, glass, glass, glass_state, empty_init, ROT0, "OMK / Gaelco (Promat license)", "Glass (Ver 1.1, Break Edition, Checksum D419AB69, Version 1994) (censored, unprotected)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // promat stickers on program roms +GAME( 1993, glass10, glass, glass_ds5002fp, glass, glass_state, empty_init, ROT0, "OMK / Gaelco", "Glass (Ver 1.0, Break Edition, Checksum C5513F3C)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1993, glass10a, glass, glass_ds5002fp, glass, glass_state, empty_init, ROT0, "OMK / Gaelco", "Glass (Ver 1.0, Break Edition, Checksum D3864FDB)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/drivers/goldstar.cpp b/src/mame/drivers/goldstar.cpp index 5adf78da874..14b310be8f8 100644 --- a/src/mame/drivers/goldstar.cpp +++ b/src/mame/drivers/goldstar.cpp @@ -8389,7 +8389,7 @@ MACHINE_CONFIG_START(sanghopm_state::star100) MCFG_SCREEN_VBLANK_CALLBACK(HOLDLINE("maincpu", 0)) MCFG_PALETTE_ADD("palette", 0x100) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + RAMDAC(config, "ramdac", 0, "palette").set_addrmap(0, &sanghopm_state::ramdac_map); MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_sangho) diff --git a/src/mame/drivers/h8.cpp b/src/mame/drivers/h8.cpp index eca8a3cdb83..188e2a7ebaa 100644 --- a/src/mame/drivers/h8.cpp +++ b/src/mame/drivers/h8.cpp @@ -197,11 +197,9 @@ void h8_state::h8_io(address_map &map) map.global_mask(0xff); map(0xf0, 0xf0).rw(FUNC(h8_state::portf0_r), FUNC(h8_state::portf0_w)); map(0xf1, 0xf1).w(FUNC(h8_state::portf1_w)); - map(0xf8, 0xf8).rw(m_uart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf9, 0xf9).rw(m_uart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xf8, 0xf9).rw(m_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)); // optional connection to a serial terminal @ 600 baud - //AM_RANGE(0xfa, 0xfa) AM_DEVREADWRITE("uart1", i8251_device, data_r, data_w) - //AM_RANGE(0xfb, 0xfb) AM_DEVREADWRITE("uart1", i8251_device, status_r, control_w) + //map(0xfa, 0xfb).rw("uart1", FUNC(i8251_device::read), FUNC(i8251_device::write)); } /* Input ports */ diff --git a/src/mame/drivers/harddriv.cpp b/src/mame/drivers/harddriv.cpp index 86e98898c75..986e7aaff7f 100644 --- a/src/mame/drivers/harddriv.cpp +++ b/src/mame/drivers/harddriv.cpp @@ -1496,8 +1496,8 @@ MACHINE_CONFIG_START(harddriv_state::driver_nomsp) MCFG_MC68681_IRQ_CALLBACK(WRITELINE(*this, harddriv_state, harddriv_duart_irq_handler)) MCFG_MC68681_A_TX_CALLBACK(WRITELINE ("rs232", rs232_port_device, write_txd)) - MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE ("duartn68681", mc68681_device, rx_a_w)) + rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, nullptr)); + rs232.rxd_handler().set("duartn68681", FUNC(mc68681_device::rx_a_w)); /* video hardware */ MCFG_PALETTE_ADD("palette", 1024) diff --git a/src/mame/drivers/hazeltin.cpp b/src/mame/drivers/hazeltin.cpp index b7e300c23f0..f916fb95e23 100644 --- a/src/mame/drivers/hazeltin.cpp +++ b/src/mame/drivers/hazeltin.cpp @@ -480,7 +480,7 @@ WRITE8_MEMBER(hazl1500_state::refresh_address_w) void hazl1500_state::hazl1500_mem(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x07ff).rom(); + map(0x0000, 0x0fff).rom().region(CPU_TAG, 0); map(0x3000, 0x377f).rw(FUNC(hazl1500_state::ram_r), FUNC(hazl1500_state::ram_w)); map(0x3780, 0x37ff).ram(); } @@ -781,7 +781,7 @@ MACHINE_CONFIG_END ROM_START( hazl1500 ) ROM_REGION( 0x10000, NETLIST_TAG, ROMREGION_ERASE00 ) - ROM_REGION( 0x10000, CPU_TAG, ROMREGION_ERASEFF ) + ROM_REGION( 0x1000, CPU_TAG, ROMREGION_ERASEFF ) ROM_LOAD( "h15s-00i-10-3.bin", 0x0000, 0x0800, CRC(a2015f72) SHA1(357cde517c3dcf693de580881add058c7b26dfaa)) ROM_REGION( 0x800, CHAR_EPROM_TAG, ROMREGION_ERASEFF ) @@ -794,7 +794,25 @@ ROM_START( hazl1500 ) ROM_LOAD( "u90_702128_82s129.bin", 0x0000, 0x0100, CRC(277bc424) SHA1(528a0de3b54d159bc14411961961706bf9ec41bf)) ROM_END +ROM_START( hazl1552 ) + ROM_REGION( 0x10000, NETLIST_TAG, ROMREGION_ERASE00 ) + + ROM_REGION( 0x1000, CPU_TAG, ROMREGION_ERASEFF ) + ROM_LOAD( "h200-009-11-0_vt52_u22.bin", 0x0000, 0x0800, CRC(622e3fe1) SHA1(886cea7315c4945f4dced7ee45b695ae0bd004aa)) + ROM_LOAD( "h200-009-21-0_vt52_u23.bin", 0x0800, 0x0800, CRC(25494fea) SHA1(89059ec76b386114208f2e589046f230502577f4)) + + ROM_REGION( 0x800, CHAR_EPROM_TAG, ROMREGION_ERASEFF ) + ROM_LOAD( "h200-010-0.bin", 0x0000, 0x0800, CRC(80a58198) SHA1(ae37adbceedd7de22770f5831e32d8749c6ef3b8)) + + ROM_REGION( 0x100, BAUD_PROM_TAG, ROMREGION_ERASEFF ) + ROM_LOAD( "u49.bin", 0x0000, 0x0100, CRC(b35aea2b) SHA1(4702620cdef72b32a397580c22b75df36e24ac74)) + + ROM_REGION( 0x100, VIDEO_PROM_TAG, ROMREGION_ERASEFF ) + ROM_LOAD( "u90.bin", 0x0000, 0x0100, CRC(277bc424) SHA1(528a0de3b54d159bc14411961961706bf9ec41bf)) +ROM_END + /* Driver */ // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS COMP( 1977, hazl1500, 0, 0, hazl1500, hazl1500, hazl1500_state, empty_init, "Hazeltine Corporation", "Hazeltine 1500", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW) +COMP( 1979, hazl1552, 0, 0, hazl1500, hazl1500, hazl1500_state, empty_init, "Hazeltine Corporation", "Hazeltine 1552", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW) diff --git a/src/mame/drivers/hazl1420.cpp b/src/mame/drivers/hazl1420.cpp new file mode 100644 index 00000000000..85400ec2347 --- /dev/null +++ b/src/mame/drivers/hazl1420.cpp @@ -0,0 +1,400 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/**************************************************************************** + + Skeleton driver for Hazeltine 1420 terminal. + +****************************************************************************/ + +#include "emu.h" +#include "bus/rs232/rs232.h" +#include "cpu/mcs48/mcs48.h" +#include "machine/bankdev.h" +#include "machine/i8243.h" +#include "machine/input_merger.h" +#include "machine/ins8250.h" +#include "sound/beep.h" +#include "video/dp8350.h" +#include "screen.h" +#include "speaker.h" + +class hazl1420_state : public driver_device +{ +public: + hazl1420_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_bankdev(*this, "bankdev") + , m_ioexp(*this, "ioexp%u", 0U) + , m_mainint(*this, "mainint") + , m_crtc(*this, "crtc") + , m_beeper(*this, "beep") + , m_videoram(*this, "videoram") + , m_keys(*this, "KEY%u", 0U) + { + } + + void hazl1420(machine_config &config); + +protected: + virtual void machine_start() override; + +private: + void p1_w(u8 data); + u8 p2_r(); + void p2_w(u8 data); + void videoram_w(offs_t offset, u8 data); + void crtc_w(offs_t offset, u8 data); + void p6_w(u8 data); + void p7_w(u8 data); + + u8 key_r(); + + DECLARE_WRITE_LINE_MEMBER(crtc_lbre_w); + DECLARE_WRITE_LINE_MEMBER(crtc_vblank_w); + + void prog_map(address_map &map); + void io_map(address_map &map); + void bank_map(address_map &map); + + u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + + required_device<mcs48_cpu_device> m_maincpu; + required_device<address_map_bank_device> m_bankdev; + required_device_array<i8243_device, 2> m_ioexp; + required_device<input_merger_device> m_mainint; + required_device<dp8350_device> m_crtc; + required_device<beep_device> m_beeper; + required_shared_ptr<u8> m_videoram; + required_ioport_array<10> m_keys; +}; + +void hazl1420_state::p1_w(u8 data) +{ + m_ioexp[0]->cs_w((data & 0xc0) == 0x80 ? 0 : 1); + m_ioexp[1]->cs_w((data & 0xc0) == 0xc0 ? 0 : 1); + + // acknowledge CRTC interrupts + if (BIT(data, 4)) + m_mainint->in_w<0>(0); +} + +u8 hazl1420_state::p2_r() +{ + u8 result = 0xe0 | (!m_crtc->lbre_r() << 4); + result |= m_ioexp[0]->p2_r() & m_ioexp[1]->p2_r(); + return result; +} + +void hazl1420_state::p2_w(u8 data) +{ + m_bankdev->set_bank((data & 0xe0) >> 1 | (data & 0x0f)); +} + +void hazl1420_state::videoram_w(offs_t offset, u8 data) +{ + m_videoram[offset] = data; + if (BIT(m_maincpu->p1_r(), 5)) + m_videoram[offset ^ 1] = data; +} + +void hazl1420_state::crtc_w(offs_t offset, u8 data) +{ + // CRTC registers are loaded only during vertical blanking period + m_crtc->register_load(bitswap<2>(offset >> 12, 0, 1), offset & 0xfff); +} + +void hazl1420_state::p6_w(u8 data) +{ + m_beeper->set_state(!BIT(data, 1)); +} + +void hazl1420_state::p7_w(u8 data) +{ +} + +u8 hazl1420_state::key_r() +{ + u8 row = m_maincpu->p1_r() & 0x0f; + return (row < 10) ? m_keys[row]->read() : 0xff; +} + +void hazl1420_state::prog_map(address_map &map) +{ + map(0x000, 0xfff).rom().region("maincpu", 0); +} + +void hazl1420_state::io_map(address_map &map) +{ + map(0x00, 0xff).m(m_bankdev, FUNC(address_map_bank_device::amap8)); +} + +void hazl1420_state::bank_map(address_map &map) +{ + map(0x0000, 0x07ff).ram().share("videoram").w(FUNC(hazl1420_state::videoram_w)); + map(0x0800, 0x0807).mirror(0x10).rw("ace", FUNC(ins8250_device::ins8250_r), FUNC(ins8250_device::ins8250_w)); + map(0x0c00, 0x0cff).ram(); // optional input buffer? + map(0x4000, 0x7fff).w(FUNC(hazl1420_state::crtc_w)); +} + +void hazl1420_state::machine_start() +{ +} + +WRITE_LINE_MEMBER(hazl1420_state::crtc_lbre_w) +{ + if (!state && !m_crtc->vblank_r() && !BIT(m_maincpu->p1_r(), 4)) + m_mainint->in_w<0>(1); +} + +WRITE_LINE_MEMBER(hazl1420_state::crtc_vblank_w) +{ + if (state && !BIT(m_maincpu->p1_r(), 4)) + m_mainint->in_w<0>(1); +} + +u32 hazl1420_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + return 0; +} + +static INPUT_PORTS_START(hazl1420) + PORT_START("KEY0") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) PORT_CODE(KEYCODE_0_PAD) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) PORT_CODE(KEYCODE_1_PAD) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) PORT_CODE(KEYCODE_2_PAD) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) PORT_CODE(KEYCODE_3_PAD) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) PORT_CODE(KEYCODE_4_PAD) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) PORT_CODE(KEYCODE_5_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) PORT_CODE(KEYCODE_MINUS_PAD) + + PORT_START("KEY1") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) PORT_CODE(KEYCODE_6_PAD) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) PORT_CODE(KEYCODE_7_PAD) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) PORT_CODE(KEYCODE_8_PAD) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) PORT_CODE(KEYCODE_9_PAD) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(COMMA_PAD)) PORT_CODE(KEYCODE_COMMA_PAD) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD)) PORT_CODE(KEYCODE_DEL_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD)) PORT_CODE(KEYCODE_ENTER_PAD) + + PORT_START("KEY2") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('1') PORT_CHAR('!') PORT_CODE(KEYCODE_1) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('2') PORT_CHAR('@') PORT_CODE(KEYCODE_2) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('3') PORT_CHAR('#') PORT_CODE(KEYCODE_3) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('4') PORT_CHAR('$') PORT_CODE(KEYCODE_4) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('5') PORT_CHAR('%') PORT_CODE(KEYCODE_5) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('6') PORT_CHAR('^') PORT_CODE(KEYCODE_6) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('7') PORT_CHAR('&') PORT_CODE(KEYCODE_7) + + PORT_START("KEY3") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('q') PORT_CHAR('Q') PORT_CODE(KEYCODE_Q) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('w') PORT_CHAR('W') PORT_CODE(KEYCODE_W) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('e') PORT_CHAR('E') PORT_CODE(KEYCODE_E) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('r') PORT_CHAR('R') PORT_CODE(KEYCODE_R) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('t') PORT_CHAR('T') PORT_CODE(KEYCODE_T) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('y') PORT_CHAR('Y') PORT_CODE(KEYCODE_Y) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('u') PORT_CHAR('U') PORT_CODE(KEYCODE_U) + + PORT_START("KEY4") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('a') PORT_CHAR('A') PORT_CODE(KEYCODE_A) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('s') PORT_CHAR('S') PORT_CODE(KEYCODE_S) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('d') PORT_CHAR('D') PORT_CODE(KEYCODE_D) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('f') PORT_CHAR('F') PORT_CODE(KEYCODE_F) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('g') PORT_CHAR('G') PORT_CODE(KEYCODE_G) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('h') PORT_CHAR('H') PORT_CODE(KEYCODE_H) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('j') PORT_CHAR('J') PORT_CODE(KEYCODE_J) + + PORT_START("KEY5") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('z') PORT_CHAR('Z') PORT_CODE(KEYCODE_Z) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('x') PORT_CHAR('X') PORT_CODE(KEYCODE_X) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('c') PORT_CHAR('C') PORT_CODE(KEYCODE_C) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('v') PORT_CHAR('V') PORT_CODE(KEYCODE_V) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('b') PORT_CHAR('B') PORT_CODE(KEYCODE_B) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('n') PORT_CHAR('N') PORT_CODE(KEYCODE_N) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('m') PORT_CHAR('M') PORT_CODE(KEYCODE_M) + + PORT_START("KEY6") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('=') PORT_CHAR('+') PORT_CODE(KEYCODE_EQUALS) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('8') PORT_CHAR('*') PORT_CODE(KEYCODE_8) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('9') PORT_CHAR('(') PORT_CODE(KEYCODE_9) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('0') PORT_CHAR(')') PORT_CODE(KEYCODE_0) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('-') PORT_CHAR('_') PORT_CODE(KEYCODE_MINUS) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(0x08) PORT_CODE(KEYCODE_BACKSPACE) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('`') PORT_CHAR('~') PORT_CODE(KEYCODE_TILDE) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KEY7") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(']') PORT_CHAR('}') PORT_CODE(KEYCODE_CLOSEBRACE) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('i') PORT_CHAR('I') PORT_CODE(KEYCODE_I) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('o') PORT_CHAR('O') PORT_CODE(KEYCODE_O) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('p') PORT_CHAR('P') PORT_CODE(KEYCODE_P) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('[') PORT_CHAR('{') PORT_CODE(KEYCODE_OPENBRACE) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('\\') PORT_CHAR('|') PORT_CODE(KEYCODE_BACKSLASH) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY8") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Return") PORT_CHAR(0x0d) PORT_CODE(KEYCODE_ENTER) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('k') PORT_CHAR('K') PORT_CODE(KEYCODE_K) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('l') PORT_CHAR('L') PORT_CODE(KEYCODE_L) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(';') PORT_CHAR(':') PORT_CODE(KEYCODE_COLON) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('\'') PORT_CHAR('"') PORT_CODE(KEYCODE_QUOTE) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(' ') PORT_CODE(KEYCODE_SPACE) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(0x1b) PORT_CODE(KEYCODE_RALT) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY9") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("LF") PORT_CHAR(0x0a) PORT_CODE(KEYCODE_INSERT) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(',') PORT_CHAR('<') PORT_CODE(KEYCODE_COMMA) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('.') PORT_CHAR('>') PORT_CODE(KEYCODE_STOP) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('/') PORT_CHAR('/') PORT_CODE(KEYCODE_SLASH) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Del") PORT_CHAR(0x7f) PORT_CODE(KEYCODE_DEL) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) + + // DIP switches are on access panel above keyboard + // "SW1" and "SW2" are not actual names + + PORT_START("INP4") + PORT_DIPNAME(0x7, 0x6, "Baud Rate") PORT_DIPLOCATION("SW1:3,4,5") + PORT_DIPSETTING(0x0, "110") + PORT_DIPSETTING(0x1, "300") + PORT_DIPSETTING(0x2, "600") + PORT_DIPSETTING(0x3, "1200") + PORT_DIPSETTING(0x4, "1800") + PORT_DIPSETTING(0x5, "2400") + PORT_DIPSETTING(0x6, "4800") + PORT_DIPSETTING(0x7, "9600") + PORT_DIPNAME(0x8, 0x0, "Lead-In") PORT_DIPLOCATION("SW1:6") // not verified + PORT_DIPSETTING(0x0, "ESC") + PORT_DIPSETTING(0x8, "~") + + PORT_START("INP5") + PORT_DIPNAME(0x3, 0x3, "Parity") PORT_DIPLOCATION("SW1:7,8") + PORT_DIPSETTING(0x0, "Odd") + PORT_DIPSETTING(0x1, "Even") + PORT_DIPSETTING(0x2, "1") + PORT_DIPSETTING(0x3, "0") + PORT_DIPNAME(0x4, 0x0, DEF_STR(Unused)) PORT_DIPLOCATION("SW2:1") + PORT_DIPSETTING(0x4, DEF_STR(Off)) + PORT_DIPSETTING(0x0, DEF_STR(On)) + PORT_BIT(0x8, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("INP6") + PORT_DIPNAME(0x1, 0x0, "Cursor") PORT_DIPLOCATION("SW2:2") + PORT_DIPSETTING(0x0, "Wraparound") + PORT_DIPSETTING(0x1, "No Wrap") + PORT_DIPNAME(0x2, 0x2, "On Line") PORT_DIPLOCATION("SW2:7") + PORT_DIPSETTING(0x2, DEF_STR(Off)) + PORT_DIPSETTING(0x0, DEF_STR(On)) + PORT_DIPNAME(0x4, 0x4, "Automatic LF/CR") PORT_DIPLOCATION("SW2:6") + PORT_DIPSETTING(0x4, "Auto LF") + PORT_DIPSETTING(0x0, "Carriage Return") + PORT_DIPNAME(0x8, 0x8, "Communication Mode") PORT_DIPLOCATION("SW2:5") + PORT_DIPSETTING(0x0, "Half Duplex") + PORT_DIPSETTING(0x8, "Full Duplex") + + PORT_START("INP7") + PORT_DIPNAME(0x1, 0x1, "Font") PORT_DIPLOCATION("SW2:4") + PORT_DIPSETTING(0x1, "Upper/Lower Case") + PORT_DIPSETTING(0x0, "Upper Case Only") + PORT_BIT(0x2, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("All Caps") PORT_CODE(KEYCODE_CAPSLOCK) PORT_TOGGLE + PORT_BIT(0x4, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) + PORT_BIT(0x8, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_LCONTROL) + + PORT_START("UNUSED") + PORT_DIPNAME(0x1, 0x0, DEF_STR(Unused)) PORT_DIPLOCATION("SW1:1") + PORT_DIPSETTING(0x1, DEF_STR(Off)) + PORT_DIPSETTING(0x0, DEF_STR(On)) + PORT_DIPNAME(0x2, 0x0, DEF_STR(Unused)) PORT_DIPLOCATION("SW1:2") + PORT_DIPSETTING(0x2, DEF_STR(Off)) + PORT_DIPSETTING(0x0, DEF_STR(On)) + PORT_DIPNAME(0x4, 0x0, DEF_STR(Unused)) PORT_DIPLOCATION("SW2:3") + PORT_DIPSETTING(0x4, DEF_STR(Off)) + PORT_DIPSETTING(0x0, DEF_STR(On)) + PORT_DIPNAME(0x8, 0x0, DEF_STR(Unused)) PORT_DIPLOCATION("SW2:8") + PORT_DIPSETTING(0x8, DEF_STR(Off)) + PORT_DIPSETTING(0x0, DEF_STR(On)) +INPUT_PORTS_END + +void hazl1420_state::hazl1420(machine_config &config) +{ + I8049(config, m_maincpu, 11_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &hazl1420_state::prog_map); + m_maincpu->set_addrmap(AS_IO, &hazl1420_state::io_map); + m_maincpu->p1_out_cb().set(FUNC(hazl1420_state::p1_w)); + m_maincpu->p2_in_cb().set(FUNC(hazl1420_state::p2_r)); + m_maincpu->p2_out_cb().set(FUNC(hazl1420_state::p2_w)); + m_maincpu->p2_out_cb().append(m_ioexp[0], FUNC(i8243_device::p2_w)); + m_maincpu->p2_out_cb().append(m_ioexp[1], FUNC(i8243_device::p2_w)); + m_maincpu->prog_out_cb().set(m_ioexp[0], FUNC(i8243_device::prog_w)); + m_maincpu->prog_out_cb().append(m_ioexp[1], FUNC(i8243_device::prog_w)); + m_maincpu->t0_in_cb().set(m_crtc, FUNC(dp8350_device::vblank_r)); + m_maincpu->t1_in_cb().set("ace", FUNC(ins8250_device::intrpt_r)); + + INPUT_MERGER_ANY_HIGH(config, m_mainint); + m_mainint->output_handler().set_inputline(m_maincpu, MCS48_INPUT_IRQ); + + ADDRESS_MAP_BANK(config, m_bankdev); + m_bankdev->set_addrmap(0, &hazl1420_state::bank_map); + m_bankdev->set_data_width(8); + m_bankdev->set_addr_width(15); + m_bankdev->set_stride(0x100); + + I8243(config, m_ioexp[0]); + m_ioexp[0]->p4_in_cb().set_ioport("INP4"); + m_ioexp[0]->p5_in_cb().set_ioport("INP5"); + m_ioexp[0]->p6_out_cb().set(FUNC(hazl1420_state::p6_w)); + m_ioexp[0]->p7_out_cb().set(FUNC(hazl1420_state::p7_w)); + + I8243(config, m_ioexp[1]); + m_ioexp[1]->p4_in_cb().set(FUNC(hazl1420_state::key_r)); + m_ioexp[1]->p5_in_cb().set(FUNC(hazl1420_state::key_r)).rshift(4); + m_ioexp[1]->p6_in_cb().set_ioport("INP6"); + m_ioexp[1]->p7_in_cb().set_ioport("INP7"); + + ins8250_device &ace(INS8250(config, "ace", 2'764'800)); + ace.out_int_callback().set(m_mainint, FUNC(input_merger_device::in_w<1>)); + ace.out_tx_callback().set("eia", FUNC(rs232_port_device::write_txd)); + ace.out_rts_callback().set("eia", FUNC(rs232_port_device::write_rts)); + ace.out_dtr_callback().set("eia", FUNC(rs232_port_device::write_dtr)); + //ace.baudout_callback().set("eia", FUNC(rs232_port_device::write_etc)); // 16x rate output (unemulated) + + DP8350(config, m_crtc, 10.92_MHz_XTAL).set_screen("screen"); + m_crtc->lbre_callback().set(FUNC(hazl1420_state::crtc_lbre_w)); + m_crtc->vblank_callback().set(FUNC(hazl1420_state::crtc_vblank_w)); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_screen_update(FUNC(hazl1420_state::screen_update)); + + SPEAKER(config, "mono").front_center(); + BEEP(config, m_beeper, 1000).add_route(ALL_OUTPUTS, "mono", 1.00); + + rs232_port_device &eia(RS232_PORT(config, "eia", default_rs232_devices, nullptr)); + eia.rxd_handler().set("ace", FUNC(ins8250_device::rx_w)); + eia.cts_handler().set("ace", FUNC(ins8250_device::cts_w)); + eia.dsr_handler().set("ace", FUNC(ins8250_device::dsr_w)); + eia.dcd_handler().set("ace", FUNC(ins8250_device::dcd_w)); +} + +ROM_START(hazl1420) + ROM_REGION(0x0800, "maincpu_internal", 0) + // This internal ROM seems to belong to some earlier program revision + ROM_LOAD("8049h.u19", 0x0000, 0x0800, CRC(81beb6de) SHA1(f272d1277f100af92384a4c4cec2c9db9424b603)) + + ROM_REGION(0x1000, "maincpu", 0) + ROM_LOAD("2716.u10", 0x0000, 0x0800, CRC(7c40ba24) SHA1(7575225adf1a06d66b079efcf0f4f9ee77fbddd4)) + ROM_LOAD("8316.u11", 0x0800, 0x0800, CRC(1c112f09) SHA1(fa4973e99c6d66809cffef009c4869787089a774)) + + ROM_REGION(0x0800, "chargen", 0) + ROM_LOAD("8316.u23", 0x0000, 0x0800, NO_DUMP) +ROM_END + +COMP(1979, hazl1420, 0, 0, hazl1420, hazl1420, hazl1420_state, empty_init, "Hazeltine", "1420 Video Display Terminal", MACHINE_NOT_WORKING) diff --git a/src/mame/drivers/hec2hrp.cpp b/src/mame/drivers/hec2hrp.cpp index 76a09123b7a..9b5cd732fea 100644 --- a/src/mame/drivers/hec2hrp.cpp +++ b/src/mame/drivers/hec2hrp.cpp @@ -464,9 +464,9 @@ MACHINE_CONFIG_START(hec2hrp_state::hec2mx40) MCFG_DEVICE_ADD("disc2cpu", Z80, 4_MHz_XTAL) MCFG_DEVICE_PROGRAM_MAP(hecdisc2_mem) MCFG_DEVICE_IO_MAP(hecdisc2_io) - MCFG_UPD765A_ADD(m_upd_fdc, false, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, hec2hrp_state, disc2_fdc_interrupt)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, hec2hrp_state, disc2_fdc_dma_irq)) + UPD765A(config, m_upd_fdc, false, true); + m_upd_fdc->intrq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_interrupt)); + m_upd_fdc->drq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_dma_irq)); MCFG_FLOPPY_DRIVE_ADD(m_upd_connector[0], hector_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(m_upd_connector[1], hector_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_MACHINE_RESET_OVERRIDE(hec2hrp_state,hec2hrx) @@ -504,9 +504,9 @@ MACHINE_CONFIG_START(hec2hrp_state::hec2hrx) MCFG_DEVICE_ADD("disc2cpu", Z80, 4_MHz_XTAL) MCFG_DEVICE_PROGRAM_MAP(hecdisc2_mem) MCFG_DEVICE_IO_MAP(hecdisc2_io) - MCFG_UPD765A_ADD(m_upd_fdc, false, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, hec2hrp_state, disc2_fdc_interrupt)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, hec2hrp_state, disc2_fdc_dma_irq)) + UPD765A(config, m_upd_fdc, false, true); + m_upd_fdc->intrq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_interrupt)); + m_upd_fdc->drq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_dma_irq)); MCFG_FLOPPY_DRIVE_ADD(m_upd_connector[0], hector_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(m_upd_connector[1], hector_floppies, "525hd", floppy_image_device::default_floppy_formats) @@ -575,9 +575,9 @@ MACHINE_CONFIG_START(hec2hrp_state::hec2mx80) MCFG_DEVICE_ADD("disc2cpu", Z80, 4_MHz_XTAL) MCFG_DEVICE_PROGRAM_MAP(hecdisc2_mem) MCFG_DEVICE_IO_MAP(hecdisc2_io) - MCFG_UPD765A_ADD(m_upd_fdc, false, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, hec2hrp_state, disc2_fdc_interrupt)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, hec2hrp_state, disc2_fdc_dma_irq)) + UPD765A(config, m_upd_fdc, false, true); + m_upd_fdc->intrq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_interrupt)); + m_upd_fdc->drq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_dma_irq)); MCFG_FLOPPY_DRIVE_ADD(m_upd_connector[0], hector_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(m_upd_connector[1], hector_floppies, "525hd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/hh_sm510.cpp b/src/mame/drivers/hh_sm510.cpp index b224001112a..d3c3c53b2d1 100644 --- a/src/mame/drivers/hh_sm510.cpp +++ b/src/mame/drivers/hh_sm510.cpp @@ -1139,6 +1139,90 @@ MACHINE_CONFIG_END /*************************************************************************** + Nintendo Game & Watch: Donkey Kong (model DK-52) + * PCB label DK-52C + * Sharp SM510 label DK-52 52ZD (no decap) + * vertical dual lcd screens with custom segments, 1-bit sound + +***************************************************************************/ + +class gnw_dkong_state : public hh_sm510_state +{ +public: + gnw_dkong_state(const machine_config &mconfig, device_type type, const char *tag) + : hh_sm510_state(mconfig, type, tag) + { + m_inp_lines = 3; + } + + void gnw_dkong(machine_config &config); +}; + +// config + +static INPUT_PORTS_START( gnw_dkong ) + PORT_START("IN.0") // S1 + PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) // Jump + + PORT_START("IN.1") // S2 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) + + PORT_START("IN.2") // S3 + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Time") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_START2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Game B") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_START1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Game A") + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SERVICE2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, input_changed, nullptr) PORT_NAME("Alarm") + + PORT_START("ACL") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_sm510_state, acl_button, nullptr) PORT_NAME("ACL") + + PORT_START("B") // MCU B(beta) pin pulled to GND + PORT_CONFNAME( 0x01, 0x01, "Infinite Lives (Cheat)") + PORT_CONFSETTING( 0x01, DEF_STR( Off ) ) + PORT_CONFSETTING( 0x00, DEF_STR( On ) ) +INPUT_PORTS_END + +MACHINE_CONFIG_START(gnw_dkong_state::gnw_dkong) + + /* basic machine hardware */ + MCFG_DEVICE_ADD("maincpu", SM510) + MCFG_SM510_R_MASK_OPTION(2) // confirmed + MCFG_SM510_WRITE_SEGS_CB(WRITE16(*this, hh_sm510_state, sm510_lcd_segment_w)) + MCFG_SM510_READ_K_CB(READ8(*this, hh_sm510_state, input_r)) + MCFG_SM510_WRITE_S_CB(WRITE8(*this, hh_sm510_state, input_w)) + MCFG_SM510_WRITE_R_CB(WRITE8(*this, hh_sm510_state, piezo_r1_w)) + MCFG_SM510_READ_B_CB(IOPORT("B")) + + /* video hardware */ + MCFG_SCREEN_SVG_ADD("screen_top", "svg_top") + MCFG_SCREEN_REFRESH_RATE(50) + MCFG_SCREEN_SIZE(1920/2, 1266/2) + MCFG_SCREEN_VISIBLE_AREA(0, 1920/2-1, 0, 1266/2-1) + + MCFG_SCREEN_SVG_ADD("screen_bottom", "svg_bottom") + MCFG_SCREEN_REFRESH_RATE(50) + MCFG_SCREEN_SIZE(1920/2, 1266/2) + MCFG_SCREEN_VISIBLE_AREA(0, 1920/2-1, 0, 1266/2-1) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) + config.set_default_layout(layout_gnw_dualv); + + /* sound hardware */ + SPEAKER(config, "mono").front_center(); + MCFG_DEVICE_ADD("speaker", SPEAKER_SOUND) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) +MACHINE_CONFIG_END + + + + + +/*************************************************************************** + Nintendo Game & Watch: Mickey & Donald (model DM-53) * PCB label DM-53 * Sharp SM510 label DM-53 52ZC (die label CMS54C, CMS565) @@ -1205,6 +1289,7 @@ MACHINE_CONFIG_START(gnw_mickdon_state::gnw_mickdon) MCFG_SCREEN_VISIBLE_AREA(0, 1920/2-1, 0, 1236/2-1) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) + config.set_default_layout(layout_gnw_dualv); /* sound hardware */ SPEAKER(config, "mono").front_center(); @@ -1288,6 +1373,7 @@ MACHINE_CONFIG_START(gnw_dkong2_state::gnw_dkong2) MCFG_SCREEN_VISIBLE_AREA(0, 1920/2-1, 0, 1237/2-1) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) + config.set_default_layout(layout_gnw_dualv); /* sound hardware */ SPEAKER(config, "mono").front_center(); @@ -1373,6 +1459,7 @@ MACHINE_CONFIG_START(gnw_mario_state::gnw_mario) MCFG_SCREEN_VISIBLE_AREA(0, 2261/2-1, 0, 1440/2-1) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_sm510_state, display_decay_tick, attotime::from_msec(1)) + config.set_default_layout(layout_gnw_dualh); /* sound hardware */ SPEAKER(config, "mono").front_center(); @@ -6554,6 +6641,16 @@ ROM_START( exospace ) ROM_LOAD( "exospace.svg", 0, 66790, BAD_DUMP CRC(df31043a) SHA1(2d8caf42894df699e469652e5f448beaebbcc1ae) ) ROM_END +ROM_START( gnw_dkong ) + ROM_REGION( 0x1000, "maincpu", 0 ) + ROM_LOAD( "dk-52", 0x0000, 0x1000, CRC(5180cbf8) SHA1(5174570a8d6a601226f51e972bac6735535fe11d) ) + + ROM_REGION( 176706, "svg_top", 0) + ROM_LOAD( "gnw_dkong_top.svg", 0, 176706, CRC(db041556) SHA1(fb0f979dea3ecd25288d341fa80e35b5fd0a8349) ) + + ROM_REGION( 145397, "svg_bottom", 0) + ROM_LOAD( "gnw_dkong_bottom.svg", 0, 145397, CRC(2c8c9d08) SHA1(658fd0bbccaabb0645b02e5cb81709c4b2a4250e) ) +ROM_END ROM_START( gnw_mickdon ) ROM_REGION( 0x1000, "maincpu", 0 ) @@ -7126,6 +7223,7 @@ CONS( 1984, nupogodi, gnw_mmouse, 0, nupogodi, gnw_mmouse, gnw_mmouse_sta CONS( 1989, exospace, gnw_mmouse, 0, exospace, exospace, gnw_mmouse_state, empty_init, "Elektronika", "Explorers of Space", MACHINE_SUPPORTS_SAVE ) // multi screen +CONS( 1982, gnw_dkong, 0, 0, gnw_dkong, gnw_dkong, gnw_dkong_state, empty_init, "Nintendo", "Game & Watch: Donkey Kong", MACHINE_SUPPORTS_SAVE ) CONS( 1982, gnw_mickdon, 0, 0, gnw_mickdon, gnw_mickdon, gnw_mickdon_state, empty_init, "Nintendo", "Game & Watch: Mickey & Donald", MACHINE_SUPPORTS_SAVE ) CONS( 1983, gnw_dkong2, 0, 0, gnw_dkong2, gnw_dkong2, gnw_dkong2_state, empty_init, "Nintendo", "Game & Watch: Donkey Kong II", MACHINE_SUPPORTS_SAVE ) CONS( 1983, gnw_mario, 0, 0, gnw_mario, gnw_mario, gnw_mario_state, empty_init, "Nintendo", "Game & Watch: Mario Bros.", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/highvdeo.cpp b/src/mame/drivers/highvdeo.cpp index 1812972e332..d98aa4f0c43 100644 --- a/src/mame/drivers/highvdeo.cpp +++ b/src/mame/drivers/highvdeo.cpp @@ -1223,7 +1223,8 @@ MACHINE_CONFIG_START(highvdeo_state::tv_vcf) MCFG_SCREEN_UPDATE_DRIVER(highvdeo_state, screen_update_tourvisn) MCFG_PALETTE_ADD("palette", 0x100) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &highvdeo_state::ramdac_map); /* sound hardware */ SPEAKER(config, "mono").front_center(); diff --git a/src/mame/drivers/holeland.cpp b/src/mame/drivers/holeland.cpp index a627865c8c2..17ad2762bf2 100644 --- a/src/mame/drivers/holeland.cpp +++ b/src/mame/drivers/holeland.cpp @@ -554,9 +554,44 @@ ROM_START( crzrallyg ) ROM_LOAD( "pal16r8a.1d", 0x0600, 0x0104, NO_DUMP ) /* PAL is read protected */ ROM_END +/* Recreativos Franco */ +ROM_START( crzrallyrf ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "crzrallyrf_1.7g", 0x0000, 0x4000, CRC(c49ec48e) SHA1(8ec87ced3c42158be735fa7c81c271e51b114986) ) + ROM_LOAD( "crzrallyrf_2.7f", 0x4000, 0x4000, CRC(8a594a0e) SHA1(8da7099ae7a272dd10bb58b114ca98a58f1df4bb) ) + ROM_LOAD( "crzrallyrf_3.7d", 0x8000, 0x4000, CRC(01ed44dc) SHA1(6078f21f281e3de54f4a2f9869da2728f184bea7) ) + + ROM_REGION( 0x4000, "gfx1", ROMREGION_INVERT ) + ROM_LOAD( "crzrallyrf_4.5h", 0x0000, 0x2000, CRC(68ec2811) SHA1(6a30544d905e373440740877cdbae4a9c4e361cb) ) + ROM_LOAD( "crzrallyrf_5.5g", 0x2000, 0x2000, CRC(81e9b043) SHA1(effc082a025ce36ab6ba8603a82be1469eee6276) ) + + ROM_REGION( 0x8000, "gfx2", 0 ) + ROM_LOAD( "crzrallyrf_6.1n", 0x0000, 0x2000, CRC(985ed5c8) SHA1(ee91a6701a8b8bb24d6fa08596deff95816e759e) ) + ROM_LOAD( "crzrallyrf_7.1l", 0x2000, 0x2000, CRC(c02ddda2) SHA1(262e33cada0e7935d03014583117c2bc6278865b) ) + ROM_LOAD( "crzrallyrf_8.1k", 0x4000, 0x2000, CRC(2a0d5bca) SHA1(8d7aedd63ea374a5809c24f957b0afa3cad437d0) ) + ROM_LOAD( "crzrallyrf_9.1i", 0x6000, 0x2000, CRC(49c0c2b8) SHA1(30c4fe1dc2df499927f8fd4a041a707b81a04e1d) ) + + /* Not dumped on the Refreativos Franco PCB, taken from the parent set */ + ROM_REGION( 0x0300, "proms", 0 ) + ROM_LOAD( "82s129.9n", 0x0000, 0x0100, CRC(98ff725a) SHA1(553f033212a7c4785c0beb8156400cabcd53cf25) ) /* Red component */ + ROM_LOAD( "82s129.9m", 0x0100, 0x0100, CRC(d41f5800) SHA1(446046f5694357da876e1307f49584d79c8d9a1a) ) /* Green component */ + ROM_LOAD( "82s129.9l", 0x0200, 0x0100, CRC(9ed49cb4) SHA1(f54e66e2211d5fb0da9a81e11670367ee4d9b49a) ) /* Blue component */ + + /* Not dumped on the Refreativos Franco PCB, taken from the parent set */ + ROM_REGION( 0x0200, "user1", 0 ) // unknown + ROM_LOAD( "82s147.1f", 0x0000, 0x0200, CRC(5261bc11) SHA1(1cc7a9a7376e65f4587b75ef9382049458656372) ) + + /* Not dumped on the Refreativos Franco PCB, taken from the parent set */ + ROM_REGION( 0x0800, "plds", 0 ) + ROM_LOAD( "pal16r6a.5k", 0x0000, 0x0104, CRC(3d12afba) SHA1(60245089947e4a4f7bfa94a8cc96d4d8eebe4afc) ) + ROM_LOAD( "pal16r4a.5l", 0x0200, 0x0104, NO_DUMP ) /* PAL is read protected */ + ROM_LOAD( "pal16r4a.5m", 0x0400, 0x0104, NO_DUMP ) /* PAL is read protected */ + ROM_LOAD( "pal16r8a.1d", 0x0600, 0x0104, NO_DUMP ) /* PAL is read protected */ +ROM_END -GAME( 1984, holeland, 0, holeland, holeland, holeland_state, empty_init, ROT0, "Tecfri", "Hole Land (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1984, holeland2, holeland, holeland, holeland2, holeland_state, empty_init, ROT0, "Tecfri", "Hole Land (Spain)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) //attract is different -GAME( 1985, crzrally, 0, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri", "Crazy Rally (set 1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1985, crzrallya, crzrally, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri", "Crazy Rally (set 2)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1985, crzrallyg, crzrally, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri (Gecas license)", "Crazy Rally (Gecas license)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1984, holeland, 0, holeland, holeland, holeland_state, empty_init, ROT0, "Tecfri", "Hole Land (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1984, holeland2, holeland, holeland, holeland2, holeland_state, empty_init, ROT0, "Tecfri", "Hole Land (Spain)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) //attract is different +GAME( 1985, crzrally, 0, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri", "Crazy Rally (set 1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1985, crzrallya, crzrally, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri", "Crazy Rally (set 2)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1985, crzrallyg, crzrally, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri (Gecas license)", "Crazy Rally (Gecas license)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1985, crzrallyrf, crzrally, crzrally, crzrally, holeland_state, empty_init, ROT270, "Tecfri (Recreativos Franco license)", "Crazy Rally (Recreativos Franco license)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/hp16500.cpp b/src/mame/drivers/hp16500.cpp index a8a05fb2873..a816ef21a55 100644 --- a/src/mame/drivers/hp16500.cpp +++ b/src/mame/drivers/hp16500.cpp @@ -493,8 +493,10 @@ MACHINE_CONFIG_START(hp16500_state::hp16500) // TODO: for now hook up the ipc hil keyboard - this might be replaced // later with a 16500b specific keyboard implementation - MCFG_HP_HIL_SLOT_ADD("mlc", "hil1", hp_hil_devices, "hp_ipc_kbd") - MCFG_HP_HIL_SLOT_ADD("mlc", "hil2", hp_hil_devices, "hp_ipc_kbd") + hp_hil_slot_device &keyboard(HP_HIL_SLOT(config, "hil1", 0)); + hp_hil_devices(keyboard); + keyboard.set_default_option("hp_ipc_kbd"); + keyboard.set_hp_hil_slot(this, "mlc"); SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); diff --git a/src/mame/drivers/hp2620.cpp b/src/mame/drivers/hp2620.cpp index 0bf3e11c1c1..3c82cd8a414 100644 --- a/src/mame/drivers/hp2620.cpp +++ b/src/mame/drivers/hp2620.cpp @@ -7,11 +7,16 @@ Skeleton driver for HP-2620 series display terminals. ************************************************************************************************************************************/ #include "emu.h" +#include "bus/rs232/rs232.h" #include "cpu/z80/z80.h" +#include "machine/input_merger.h" #include "machine/mos6551.h" #include "machine/nvram.h" -//#include "video/dp8350.h" +#include "machine/ripple_counter.h" +#include "sound/spkrdev.h" +#include "video/dp8350.h" #include "screen.h" +#include "speaker.h" class hp2620_state : public driver_device { @@ -19,28 +24,50 @@ public: hp2620_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") + , m_nmigate(*this, "nmigate") + , m_crtc(*this, "crtc") + , m_datacomm(*this, "datacomm") + , m_bell(*this, "bell") + , m_bellctr(*this, "bellctr") , m_p_chargen(*this, "chargen") , m_nvram(*this, "nvram") { } void hp2622(machine_config &config); +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + private: - DECLARE_READ8_MEMBER(nvram_r); - DECLARE_WRITE8_MEMBER(nvram_w); - DECLARE_READ8_MEMBER(keystat_r); - DECLARE_WRITE8_MEMBER(keydisp_w); - DECLARE_READ8_MEMBER(sysstat_r); - DECLARE_WRITE8_MEMBER(modem_w); + u8 nvram_r(offs_t offset); + void nvram_w(offs_t offset, u8 data); + u8 keystat_r(); + void keydisp_w(u8 data); + u8 sysstat_r(); + void modem_w(u8 data); + void crtc_w(offs_t offset, u8 data); + void ennmi_w(offs_t offset, u8 data); u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + DECLARE_WRITE_LINE_MEMBER(nlrc_w); + DECLARE_WRITE_LINE_MEMBER(bell_w); + void io_map(address_map &map); void mem_map(address_map &map); required_device<cpu_device> m_maincpu; + required_device<input_merger_device> m_nmigate; + required_device<dp8367_device> m_crtc; + required_device<rs232_port_device> m_datacomm; + required_device<speaker_sound_device> m_bell; + required_device<ripple_counter_device> m_bellctr; required_region_ptr<u8> m_p_chargen; required_shared_ptr<u8> m_nvram; + + u16 m_display_page; + u8 m_key_status; }; @@ -49,37 +76,84 @@ u32 hp2620_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, con return 0; } -READ8_MEMBER(hp2620_state::nvram_r) +u8 hp2620_state::nvram_r(offs_t offset) { + // TODO: wait states return 0xf0 | m_nvram[offset]; } -WRITE8_MEMBER(hp2620_state::nvram_w) +void hp2620_state::nvram_w(offs_t offset, u8 data) { + // TODO: wait states m_nvram[offset] = data & 0x0f; } -READ8_MEMBER(hp2620_state::keystat_r) +u8 hp2620_state::keystat_r() { - return 0xff; + // LS299 at U25 + return m_key_status; } -WRITE8_MEMBER(hp2620_state::keydisp_w) +void hp2620_state::keydisp_w(u8 data) { + // LS374 at U26 + + // TODO: D0-D3 = KEY3-KEY6 + m_bellctr->reset_w(BIT(data, 4)); + // TODO: D6 = BLINK RATE + // TODO: D7 = ENHOFF } -READ8_MEMBER(hp2620_state::sysstat_r) +u8 hp2620_state::sysstat_r() { - return 0xff; + // LS244 at U36 + u8 status = 0xe0; + + status |= m_crtc->vblank_r() << 0; + // TODO: D1 = PINT + status |= m_datacomm->dsr_r() << 2; // DM (J6-12) + status |= m_datacomm->cts_r() << 3; // CS (J6-11) + status |= m_datacomm->ri_r() << 4; // OCR1 (J6-18) + + return status; } -WRITE8_MEMBER(hp2620_state::modem_w) +void hp2620_state::modem_w(u8 data) { + // LS174 at U35 (TODO: D0 = DISPOFF) + m_datacomm->write_spds(BIT(data, 1)); // OCD1 (J6-7) + m_crtc->refresh_control(BIT(data, 5)); +} + +void hp2620_state::crtc_w(offs_t offset, u8 data) +{ + m_crtc->register_load(data & 3, offset & 0xfff); + m_display_page = offset & 0x3000; +} + +void hp2620_state::ennmi_w(offs_t offset, u8 data) +{ + m_nmigate->in_w<0>(BIT(offset, 0)); +} + +WRITE_LINE_MEMBER(hp2620_state::nlrc_w) +{ + // clock input for LS175 at U59 + if (state) + m_nmigate->in_w<1>((m_crtc->lc_r() & 7) == 3); + + // TODO: shift keyboard response into m_key_status +} + +WRITE_LINE_MEMBER(hp2620_state::bell_w) +{ + m_bell->level_w(state); } void hp2620_state::mem_map(address_map &map) { map(0x0000, 0xbfff).rom().region("maincpu", 0); + map(0x8000, 0xbfff).w(FUNC(hp2620_state::crtc_w)); map(0xc000, 0xffff).ram(); } @@ -88,11 +162,26 @@ void hp2620_state::io_map(address_map &map) map.global_mask(0xff); map(0x00, 0x7f).rw(FUNC(hp2620_state::nvram_r), FUNC(hp2620_state::nvram_w)).share("nvram"); map(0x80, 0x80).r(FUNC(hp2620_state::keystat_r)); + map(0x88, 0x89).w(FUNC(hp2620_state::ennmi_w)); map(0x90, 0x90).r(FUNC(hp2620_state::sysstat_r)); map(0xa0, 0xa3).w("acia", FUNC(mos6551_device::write)); map(0xa4, 0xa7).r("acia", FUNC(mos6551_device::read)); map(0xa8, 0xa8).w(FUNC(hp2620_state::modem_w)); map(0xb8, 0xb8).w(FUNC(hp2620_state::keydisp_w)); + map(0xe1, 0xe1).nopw(); // program bug, undocumented expansion or ??? +} + +void hp2620_state::machine_start() +{ + save_item(NAME(m_display_page)); + save_item(NAME(m_key_status)); +} + +void hp2620_state::machine_reset() +{ + m_nmigate->in_w<1>(0); + m_display_page = 0; + m_key_status = 0; } static INPUT_PORTS_START( hp2622 ) @@ -106,15 +195,32 @@ void hp2620_state::hp2622(machine_config &config) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // 5101 (A7 tied to GND) + battery (+ wait states) + INPUT_MERGER_ALL_HIGH(config, m_nmigate).output_handler().set_inputline(m_maincpu, INPUT_LINE_NMI); + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_raw(25.7715_MHz_XTAL, 1035, 0, 720, 415, 0, 390); // 498 total lines in 50 Hz mode screen.set_screen_update(FUNC(hp2620_state::screen_update)); - //DP8367(config, "crtc", 25.7715_MHz_XTAL).set_screen("screen"); + DP8367(config, m_crtc, 25.7715_MHz_XTAL).set_screen("screen"); + m_crtc->set_half_shift(true); + m_crtc->hsync_callback().set(m_bellctr, FUNC(ripple_counter_device::clock_w)).invert(); + m_crtc->lrc_callback().set(FUNC(hp2620_state::nlrc_w)).invert(); mos6551_device &acia(MOS6551(config, "acia", 0)); // SY6551 acia.set_xtal(25.7715_MHz_XTAL / 14); // 1.84 MHz acia.irq_handler().set_inputline("maincpu", INPUT_LINE_IRQ0); + acia.rts_handler().set(m_datacomm, FUNC(rs232_port_device::write_rts)); // RS (J6-22) + acia.dtr_handler().set(m_datacomm, FUNC(rs232_port_device::write_dtr)); // TR (J6-23) + acia.txd_handler().set(m_datacomm, FUNC(rs232_port_device::write_txd)); // SD (J6-21) + + RS232_PORT(config, m_datacomm, default_rs232_devices, nullptr); + m_datacomm->rxd_handler().set("acia", FUNC(mos6551_device::write_rxd)); // RD (J6-9) + + RIPPLE_COUNTER(config, m_bellctr); // LS393 at U114 + m_bellctr->set_stages(8); + m_bellctr->count_out_cb().set(FUNC(hp2620_state::bell_w)).bit(4); + + SPEAKER(config, "mono").front_center(); // on keyboard + SPEAKER_SOUND(config, m_bell).add_route(ALL_OUTPUTS, "mono", 0.50); } /************************************************************************************************************** @@ -130,10 +236,10 @@ ROM_START( hp2622a ) ROM_LOAD( "1818-1685.xu63", 0x0000, 0x2000, CRC(a57ffe5e) SHA1(4d7844320deba916d9ec289927af987fea025b02) ) ROM_LOAD( "1818-1686.xu64", 0x2000, 0x2000, CRC(bee9274c) SHA1(20796c559031a91cb2666776fcf7ffdb52a0a318) ) ROM_LOAD( "1818-1687.xu65", 0x4000, 0x2000, CRC(e9ecd489) SHA1(9b249b8d066d256069ccdb8809bb808c414f106a) ) - // XU66-XU68 are empty + // XU66-XU68 are empty sockets ROM_REGION(0x2000, "chargen", 0) ROM_LOAD( "1818-1489.xu311", 0x0000, 0x2000, CRC(9879b153) SHA1(fc1705d6de38eb6d3a67f1ae439e359e5124d028) ) ROM_END -COMP( 1982, hp2622a, 0, 0, hp2622, hp2622, hp2620_state, empty_init, "HP", "HP-2622A", MACHINE_IS_SKELETON ) +COMP(1982, hp2622a, 0, 0, hp2622, hp2622, hp2620_state, empty_init, "HP", "HP-2622A", MACHINE_NOT_WORKING) diff --git a/src/mame/drivers/hp64k.cpp b/src/mame/drivers/hp64k.cpp index 9528f53c968..23139325f1d 100644 --- a/src/mame/drivers/hp64k.cpp +++ b/src/mame/drivers/hp64k.cpp @@ -961,13 +961,7 @@ void hp64k_state::hp64k_floppy_wpt_cb(floppy_image_device *floppy , int state) READ16_MEMBER(hp64k_state::hp64k_usart_r) { - uint16_t tmp; - - if ((offset & 1) == 0) { - tmp = m_uart->status_r(space , 0); - } else { - tmp = m_uart->data_r(space , 0); - } + uint16_t tmp = m_uart->read(~offset & 1); // bit 8 == bit 7 rear panel switches (modem/terminal) ??? @@ -982,11 +976,7 @@ READ16_MEMBER(hp64k_state::hp64k_usart_r) WRITE16_MEMBER(hp64k_state::hp64k_usart_w) { - if ((offset & 1) == 0) { - m_uart->control_w(space , 0 , (uint8_t)(data & 0xff)); - } else { - m_uart->data_w(space , 0 , (uint8_t)(data & 0xff)); - } + m_uart->write(~offset & 1, data & 0xff); } WRITE_LINE_MEMBER(hp64k_state::hp64k_rxrdy_w) @@ -1385,11 +1375,12 @@ static void hp64k_floppies(device_slot_interface &device) } MACHINE_CONFIG_START(hp64k_state::hp64k) - MCFG_DEVICE_ADD("cpu" , HP_5061_3011 , 6250000) - MCFG_DEVICE_PROGRAM_MAP(cpu_mem_map) - MCFG_DEVICE_IO_MAP(cpu_io_map) - MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(hp64k_state , hp64k_irq_callback) - MCFG_QUANTUM_TIME(attotime::from_hz(100)) + HP_5061_3011(config , m_cpu , 6250000); + m_cpu->set_rw_cycles(6 , 6); + m_cpu->set_relative_mode(true); + m_cpu->set_addrmap(AS_PROGRAM , &hp64k_state::cpu_mem_map); + m_cpu->set_addrmap(AS_IO , &hp64k_state::cpu_io_map); + m_cpu->set_irq_acknowledge_callback(FUNC(hp64k_state::hp64k_irq_callback)); // Actual keyboard refresh rate should be between 1 and 2 kHz MCFG_TIMER_DRIVER_ADD_PERIODIC("kb_timer", hp64k_state, hp64k_kb_scan, attotime::from_hz(100)) diff --git a/src/mame/drivers/hp700.cpp b/src/mame/drivers/hp700.cpp index 62b7046de71..5e6a03483f0 100644 --- a/src/mame/drivers/hp700.cpp +++ b/src/mame/drivers/hp700.cpp @@ -21,10 +21,13 @@ public: { } void hp700_92(machine_config &config); + void hp700_70(machine_config &config); private: void io_map(address_map &map); void mem_map(address_map &map); + void hp700_70_map(address_map &map); + required_device<cpu_device> m_maincpu; required_device<scn2681_device> m_duart; }; @@ -45,24 +48,45 @@ void hp700_state::mem_map(address_map &map) map(0xffff0, 0xfffff).rom().region("maincpu", 0x1fff0); } +void hp700_state::hp700_70_map(address_map &map) +{ + map(0x00000, 0x3ffff).rom().region("maincpu", 0); + map(0x60000, 0x6ffff).ram(); + map(0x70000, 0x71fff).ram().share("nvram"); + map(0x780f0, 0x780ff).rw(m_duart, FUNC(scn2681_device::read), FUNC(scn2681_device::write)); + map(0xffff0, 0xfffff).rom().region("maincpu", 0x1fff0); +} + void hp700_state::io_map(address_map &map) { map(0x00f2, 0x00f2).nopw(); } -static INPUT_PORTS_START( hp700_92 ) +static INPUT_PORTS_START(hp700_92) INPUT_PORTS_END -MACHINE_CONFIG_START(hp700_state::hp700_92) - MCFG_DEVICE_ADD("maincpu", V20, XTAL(29'491'200) / 3) // divider not verified - MCFG_DEVICE_PROGRAM_MAP(mem_map) - MCFG_DEVICE_IO_MAP(io_map) +void hp700_state::hp700_92(machine_config &config) +{ + V20(config, m_maincpu, 29.4912_MHz_XTAL / 3); // divider not verified + m_maincpu->set_addrmap(AS_PROGRAM, &hp700_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &hp700_state::io_map); + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); + + SCN2681(config, m_duart, 29.4912_MHz_XTAL / 8); // divider not verified + m_duart->irq_cb().set_inputline(m_maincpu, INPUT_LINE_NMI); +} + +void hp700_state::hp700_70(machine_config &config) +{ + V20(config, m_maincpu, 39.3216_MHz_XTAL / 4); // divider not verified (XTAL value not readable, assumed to be same as HP 700/60) + m_maincpu->set_addrmap(AS_PROGRAM, &hp700_state::hp700_70_map); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); - MCFG_DEVICE_ADD("duart", SCN2681, XTAL(29'491'200) / 8) // divider not verified - MCFG_MC68681_IRQ_CALLBACK(INPUTLINE("maincpu", INPUT_LINE_NMI)) -MACHINE_CONFIG_END + SCN2681(config, m_duart, 39.3216_MHz_XTAL / 8); // divider not verified; device type probably wrong (48-pin DIP labeled 1LVS-0001) + m_duart->irq_cb().set_inputline(m_maincpu, INPUT_LINE_NMI); +} /************************************************************************************************************** @@ -73,9 +97,46 @@ Crystals: 29.4912 ***************************************************************************************************************/ -ROM_START( hp700_92 ) +ROM_START(hp700_92) ROM_REGION(0x20000, "maincpu", 0) - ROM_LOAD( "5181-8672.u803", 0x00000, 0x20000, CRC(21440d2f) SHA1(69a3de064ae2b18adc46c2fdd0bf69620375efe7) ) + ROM_LOAD("5181-8672.u803", 0x00000, 0x20000, CRC(21440d2f) SHA1(69a3de064ae2b18adc46c2fdd0bf69620375efe7)) +ROM_END + +/************************************************************************************************************** + +HP 700/70 Terminal with AlphaWindows capability + +Board D-3416 C1093-60001 +------------- +2 EPROMs +EPROM Type: M27C1001 (128KB - 1 MBit) +------------- + +------------- +1LV5-0001 +93491 +SINGAPORE +------------- + +------------- +NEC +9401Y5 V20 +D70108C-10(C)'84 NEC +------------- + +------------- +HP ASIC 1MH1-0202 +94281 Singapore +HJP02 +------------- + +***************************************************************************************************************/ + +ROM_START(hp700_70) + ROM_REGION(0x40000, "maincpu", 0) // "© HP 1994 REV: 3440" + ROM_LOAD("c1093-80008.u802", 0x00000, 0x20000, CRC(25c527a6) SHA1(97e82774d25eab6fd4cc6ff7a5a473341281abb1)) // "CKSM 96A5" + ROM_LOAD("c1093-80009.u817", 0x20000, 0x20000, CRC(369e6855) SHA1(938ac9cd120d0aa7c76011d1a5e91244a142b397)) // "CKSM 7B6B" ROM_END -COMP( 1987, hp700_92, 0, 0, hp700_92, hp700_92, hp700_state, empty_init, "HP", "HP-700/92", MACHINE_IS_SKELETON ) +COMP(1987, hp700_92, 0, 0, hp700_92, hp700_92, hp700_state, empty_init, "Hewlett-Packard", "HP 700/92 Display Terminal", MACHINE_IS_SKELETON) +COMP(1994, hp700_70, 0, 0, hp700_70, hp700_92, hp700_state, empty_init, "Hewlett-Packard", "HP 700/70 Windowing Terminal", MACHINE_IS_SKELETON) diff --git a/src/mame/drivers/hp9825.cpp b/src/mame/drivers/hp9825.cpp new file mode 100644 index 00000000000..b04967f41c1 --- /dev/null +++ b/src/mame/drivers/hp9825.cpp @@ -0,0 +1,733 @@ +// license:BSD-3-Clause +// copyright-holders:F. Ulivi + +// ************************** +// Driver for HP 9825 systems +// ************************** +// +// **** Temporary header, will hopefully evolve into proper doc **** +// +// What's in: +// - Emulation of 9825B system +// - 12 kw of RAMs +// - 12 kw of system ROM +// - Keyboard (SHIFT LOCK & RESET not implemented) +// - Display & run light +// - DC100 tape drive +// What's not yet in: +// - Internal & external expansion ROMs +// - Configurable RAM size +// - Printer +// - I/O expansion slots: 98034 & 98035 modules from hp9845 emulation can be used here, too +// - Beeper +// +// 9825A & 9825T can also be emulated. At the moment I haven't all the necessary +// ROM dumps, though. + +#include "emu.h" +#include "cpu/hphybrid/hphybrid.h" +#include "machine/timer.h" +#include "machine/hp9825_tape.h" +#include "hp9825.lh" + +// CPU clock (generated by a trimmered RC oscillator) +constexpr unsigned MAIN_CLOCK = 6000000; + +// KDP chip clock +constexpr unsigned KDP_CLOCK = MAIN_CLOCK / 4; + +// Peripheral Addresses (PA) +constexpr uint8_t KDP_PA = 0; +constexpr uint8_t TAPE_PA = 1; + +// Bit manipulation +namespace { + template<typename T> constexpr T BIT_MASK(unsigned n) + { + return (T)1U << n; + } + + template<typename T> void BIT_CLR(T& w , unsigned n) + { + w &= ~BIT_MASK<T>(n); + } + + template<typename T> void BIT_SET(T& w , unsigned n) + { + w |= BIT_MASK<T>(n); + } +} + +class hp9825_state : public driver_device +{ +public: + hp9825_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_cpu(*this , "cpu") + , m_cursor_timer(*this , "cursor_timer") + , m_tape(*this , "tape") + , m_io_key(*this , "KEY%u" , 0) + , m_shift_key(*this , "KEY_SHIFT") + , m_display(*this , "char_%u_%u" , 0U , 0U) + , m_run_light(*this , "run_light") + { + } + + void hp9825b(machine_config &config); + +private: + required_device<hp_09825_67907_cpu_device> m_cpu; + required_device<timer_device> m_cursor_timer; + required_device<hp9825_tape_device> m_tape; + required_ioport_array<4> m_io_key; + required_ioport m_shift_key; + output_finder<32 , 7> m_display; + output_finder<> m_run_light; + + bool m_display_on; + uint8_t m_display_mem[ 32 ]; + uint8_t m_display_idx; + bool m_rpl_cursor; + bool m_cursor_blink; + bool m_any_cursor; + uint8_t m_scancode; + bool m_key_pressed; + bool m_autorepeating; + unsigned m_autorepeat_cnt; + uint8_t m_irl_pending; + uint8_t m_irh_pending; + // FLG/STS handling + uint8_t m_pa; + uint16_t m_flg_status; + uint16_t m_sts_status; + + virtual void machine_start() override; + virtual void machine_reset() override; + + void cpu_io_map(address_map &map); + void cpu_mem_map(address_map &map); + + DECLARE_READ16_MEMBER(kb_scancode_r); + DECLARE_WRITE16_MEMBER(disp_w); + DECLARE_READ16_MEMBER(kdp_status_r); + DECLARE_WRITE16_MEMBER(kdp_control_w); + + void update_display(); + TIMER_DEVICE_CALLBACK_MEMBER(cursor_blink); + void kb_scan_ioport(ioport_value pressed , ioport_port &port , unsigned idx_base , int& max_seq_len , unsigned& max_seq_idx); + TIMER_DEVICE_CALLBACK_MEMBER(kb_scan); + + IRQ_CALLBACK_MEMBER(irq_callback); + void update_irq(); + void set_irq(uint8_t sc , int state); + + DECLARE_WRITE8_MEMBER(pa_w); + void update_flg_sts(); + void set_sts(uint8_t sc , int state); + void set_flg(uint8_t sc , int state); +}; + +void hp9825_state::machine_start() +{ + m_display.resolve(); + m_run_light.resolve(); + + save_item(NAME(m_display_on)); + save_item(NAME(m_display_mem)); + save_item(NAME(m_display_idx)); + save_item(NAME(m_scancode)); + save_item(NAME(m_irl_pending)); + save_item(NAME(m_irh_pending)); +} + +void hp9825_state::machine_reset() +{ + m_display_on = false; + m_display_idx = 0; + m_rpl_cursor = false; + m_cursor_timer->reset(); + m_cursor_blink = true; + update_display(); + m_scancode = 0; + m_key_pressed = false; + m_autorepeating = false; + m_autorepeat_cnt = 0; + m_irl_pending = 0; + m_irh_pending = 0; + update_irq(); + m_pa = 0; + m_flg_status = 0; + m_sts_status = 0; +} + +void hp9825_state::cpu_io_map(address_map &map) +{ + map.unmap_value_low(); + map(HP_MAKE_IOADDR(KDP_PA , 0) , HP_MAKE_IOADDR(KDP_PA , 0)).rw(FUNC(hp9825_state::kb_scancode_r) , FUNC(hp9825_state::disp_w)); + map(HP_MAKE_IOADDR(KDP_PA , 1) , HP_MAKE_IOADDR(KDP_PA , 1)).rw(FUNC(hp9825_state::kdp_status_r) , FUNC(hp9825_state::kdp_control_w)); + map(HP_MAKE_IOADDR(TAPE_PA , 0) , HP_MAKE_IOADDR(TAPE_PA , 3)).rw(m_tape , FUNC(hp9825_tape_device::tape_r) , FUNC(hp9825_tape_device::tape_w)); + // TODO: +} + +void hp9825_state::cpu_mem_map(address_map &map) +{ + map.unmap_value_low(); + map(0x0000 , 0x2fff).rom(); + map(0x5000 , 0x7fff).ram(); +} + +READ16_MEMBER(hp9825_state::kb_scancode_r) +{ + // TODO: + uint8_t res = m_scancode; + if (m_shift_key->read()) { + BIT_SET(res , 7); + } + set_irq(KDP_PA , false); + return res; +} + +WRITE16_MEMBER(hp9825_state::disp_w) +{ + // TODO: + if (m_display_on) { + m_display_on = false; + m_cursor_timer->reset(); + m_cursor_blink = true; + m_display_idx = 0; + update_display(); + } + m_display_mem[ m_display_idx++ ] = uint8_t(data); +} + +READ16_MEMBER(hp9825_state::kdp_status_r) +{ + // TODO: + return 8; +} + +WRITE16_MEMBER(hp9825_state::kdp_control_w) +{ + // TODO: + bool regen_display = false; + if (BIT(data , 1) && !m_display_on) { + m_display_on = true; + // Cursor should blink at 2^-19 the KDP clock + attotime cursor_half_period{ attotime::from_ticks(262144 , KDP_CLOCK) }; + m_cursor_timer->adjust(cursor_half_period , 0 , cursor_half_period); + regen_display = true; + } + if (BIT(data , 6) && !m_rpl_cursor) { + m_rpl_cursor = true; + regen_display = true; + } + if (BIT(data , 5) && m_rpl_cursor) { + m_rpl_cursor = false; + regen_display = true; + } + if (BIT(data , 4)) { + if (BIT(data , 3)) { + m_run_light = !m_run_light; + } else { + m_run_light = false; + } + } else if (BIT(data , 3)) { + m_run_light = true; + } + if (regen_display) { + update_display(); + } +} + +// The character generator was reverse engineered from images of printer & display test patterns. +// It is not guaranteed to be pixel-accurate though it looks quite close to the original. +static const uint8_t chargen[ 128 ][ 5 ] = { + { 0x08,0x1c,0x3e,0x7f,0x00 }, // 00 + { 0x30,0x48,0x45,0x40,0x30 }, // 01 + { 0x45,0x29,0x11,0x29,0x45 }, // 02 + { 0x7d,0x09,0x11,0x21,0x7d }, // 03 + { 0x38,0x44,0x44,0x38,0x44 }, // 04 + { 0x7c,0x2a,0x4a,0x4a,0x34 }, // 05 + { 0x7f,0x01,0x01,0x01,0x03 }, // 06 + { 0x7d,0x09,0x05,0x05,0x79 }, // 07 + { 0x60,0x58,0x46,0x58,0x60 }, // 08 + { 0x38,0x44,0x44,0x3c,0x04 }, // 09 + { 0x10,0x20,0x7f,0x20,0x10 }, // 0a + { 0x62,0x14,0x08,0x10,0x60 }, // 0b + { 0x40,0x3c,0x20,0x20,0x1c }, // 0c + { 0x08,0x1c,0x2a,0x08,0x08 }, // 0d + { 0x10,0x08,0x78,0x08,0x04 }, // 0e + { 0x08,0x55,0x7f,0x55,0x08 }, // 0f + { 0x3e,0x49,0x49,0x49,0x3e }, // 10 + { 0x5e,0x61,0x01,0x61,0x5e }, // 11 + { 0x30,0x4a,0x4d,0x49,0x30 }, // 12 + { 0x78,0x14,0x15,0x14,0x78 }, // 13 + { 0x38,0x44,0x45,0x3c,0x40 }, // 14 + { 0x78,0x15,0x14,0x15,0x78 }, // 15 + { 0x38,0x45,0x44,0x3d,0x40 }, // 16 + { 0x3c,0x43,0x42,0x43,0x3c }, // 17 + { 0x38,0x45,0x44,0x45,0x38 }, // 18 + { 0x3e,0x41,0x40,0x41,0x3e }, // 19 + { 0x3c,0x41,0x40,0x41,0x3c }, // 1a + { 0x7e,0x09,0x7f,0x49,0x49 }, // 1b + { 0x38,0x44,0x38,0x54,0x58 }, // 1c + { 0x12,0x19,0x15,0x12,0x00 }, // 1d + { 0x48,0x7e,0x49,0x41,0x42 }, // 1e + { 0x55,0x2a,0x55,0x2a,0x55 }, // 1f + { 0x00,0x00,0x00,0x00,0x00 }, // 20 + { 0x00,0x5f,0x00,0x00,0x00 }, // 21 + { 0x00,0x03,0x00,0x03,0x00 }, // 22 + { 0x14,0x7f,0x14,0x7f,0x14 }, // 23 + { 0x24,0x2a,0x7f,0x2a,0x12 }, // 24 + { 0x23,0x13,0x08,0x64,0x62 }, // 25 + { 0x36,0x49,0x56,0x20,0x50 }, // 26 + { 0x00,0x0b,0x07,0x00,0x00 }, // 27 + { 0x00,0x00,0x3e,0x41,0x00 }, // 28 + { 0x00,0x41,0x3e,0x00,0x00 }, // 29 + { 0x08,0x2a,0x1c,0x2a,0x08 }, // 2a + { 0x08,0x08,0x3e,0x08,0x08 }, // 2b + { 0x00,0x58,0x38,0x00,0x00 }, // 2c + { 0x08,0x08,0x08,0x08,0x08 }, // 2d + { 0x00,0x60,0x60,0x00,0x00 }, // 2e + { 0x20,0x10,0x08,0x04,0x02 }, // 2f + { 0x3e,0x51,0x49,0x45,0x3e }, // 30 + { 0x00,0x42,0x7f,0x40,0x00 }, // 31 + { 0x62,0x51,0x49,0x49,0x46 }, // 32 + { 0x22,0x41,0x49,0x49,0x36 }, // 33 + { 0x18,0x14,0x12,0x7f,0x10 }, // 34 + { 0x27,0x45,0x45,0x45,0x39 }, // 35 + { 0x3c,0x4a,0x49,0x49,0x30 }, // 36 + { 0x01,0x71,0x09,0x05,0x03 }, // 37 + { 0x36,0x49,0x49,0x49,0x36 }, // 38 + { 0x06,0x49,0x49,0x29,0x1e }, // 39 + { 0x00,0x36,0x36,0x00,0x00 }, // 3a + { 0x00,0x5b,0x3b,0x00,0x00 }, // 3b + { 0x00,0x08,0x14,0x22,0x41 }, // 3c + { 0x14,0x14,0x14,0x14,0x14 }, // 3d + { 0x41,0x22,0x14,0x08,0x00 }, // 3e + { 0x06,0x01,0x51,0x09,0x06 }, // 3f + { 0x3e,0x41,0x5d,0x55,0x1e }, // 40 + { 0x7e,0x09,0x09,0x09,0x7e }, // 41 + { 0x7f,0x49,0x49,0x49,0x36 }, // 42 + { 0x3e,0x41,0x41,0x41,0x22 }, // 43 + { 0x7f,0x41,0x41,0x41,0x3e }, // 44 + { 0x7f,0x49,0x49,0x49,0x41 }, // 45 + { 0x7f,0x09,0x09,0x09,0x01 }, // 46 + { 0x3e,0x41,0x41,0x51,0x72 }, // 47 + { 0x7f,0x08,0x08,0x08,0x7f }, // 48 + { 0x00,0x41,0x7f,0x41,0x00 }, // 49 + { 0x20,0x40,0x40,0x40,0x3f }, // 4a + { 0x7f,0x08,0x14,0x22,0x41 }, // 4b + { 0x7f,0x40,0x40,0x40,0x40 }, // 4c + { 0x7f,0x02,0x0c,0x02,0x7f }, // 4d + { 0x7f,0x04,0x08,0x10,0x7f }, // 4e + { 0x3e,0x41,0x41,0x41,0x3e }, // 4f + { 0x7f,0x09,0x09,0x09,0x06 }, // 50 + { 0x3e,0x41,0x51,0x21,0x5e }, // 51 + { 0x7f,0x09,0x19,0x29,0x46 }, // 52 + { 0x26,0x49,0x49,0x49,0x32 }, // 53 + { 0x01,0x01,0x7f,0x01,0x01 }, // 54 + { 0x3f,0x40,0x40,0x40,0x3f }, // 55 + { 0x07,0x18,0x60,0x18,0x07 }, // 56 + { 0x7f,0x20,0x10,0x20,0x7f }, // 57 + { 0x63,0x14,0x08,0x14,0x63 }, // 58 + { 0x03,0x04,0x78,0x04,0x03 }, // 59 + { 0x61,0x51,0x49,0x45,0x43 }, // 5a + { 0x00,0x00,0x7f,0x41,0x41 }, // 5b + { 0x20,0x7f,0x01,0x01,0x01 }, // 5c + { 0x41,0x41,0x7f,0x00,0x00 }, // 5d + { 0x04,0x02,0x7f,0x02,0x04 }, // 5e + { 0x40,0x40,0x40,0x40,0x40 }, // 5f + { 0x00,0x07,0x0b,0x00,0x00 }, // 60 + { 0x38,0x44,0x44,0x3c,0x40 }, // 61 + { 0x7f,0x48,0x44,0x44,0x38 }, // 62 + { 0x38,0x44,0x44,0x44,0x20 }, // 63 + { 0x38,0x44,0x44,0x48,0x7f }, // 64 + { 0x38,0x54,0x54,0x54,0x08 }, // 65 + { 0x08,0x7e,0x09,0x02,0x00 }, // 66 + { 0x08,0x14,0x54,0x54,0x3c }, // 67 + { 0x7f,0x08,0x04,0x04,0x78 }, // 68 + { 0x00,0x44,0x7d,0x40,0x00 }, // 69 + { 0x20,0x40,0x44,0x3d,0x00 }, // 6a + { 0x7f,0x10,0x28,0x44,0x00 }, // 6b + { 0x00,0x41,0x7f,0x40,0x00 }, // 6c + { 0x78,0x04,0x18,0x04,0x78 }, // 6d + { 0x7c,0x08,0x04,0x04,0x78 }, // 6e + { 0x38,0x44,0x44,0x44,0x38 }, // 6f + { 0x7c,0x14,0x24,0x24,0x18 }, // 70 + { 0x18,0x24,0x14,0x7c,0x40 }, // 71 + { 0x7c,0x08,0x04,0x04,0x00 }, // 72 + { 0x48,0x54,0x54,0x54,0x20 }, // 73 + { 0x04,0x3e,0x44,0x20,0x00 }, // 74 + { 0x3c,0x40,0x40,0x20,0x7c }, // 75 + { 0x1c,0x20,0x40,0x20,0x1c }, // 76 + { 0x3c,0x40,0x30,0x40,0x3c }, // 77 + { 0x44,0x28,0x10,0x28,0x44 }, // 78 + { 0x04,0x48,0x30,0x08,0x04 }, // 79 + { 0x44,0x64,0x54,0x4c,0x44 }, // 7a + { 0x08,0x7c,0x04,0x7c,0x02 }, // 7b + { 0x00,0x00,0x7f,0x00,0x00 }, // 7c + { 0x08,0x08,0x2a,0x1c,0x08 }, // 7d + { 0x41,0x63,0x55,0x49,0x63 }, // 7e + { 0x7f,0x08,0x08,0x08,0x08 } // 7f +}; + +void hp9825_state::update_display() +{ + m_any_cursor = false; + for (unsigned i = 0; i < 32; ++i) { + bool cursor_here = BIT(m_display_mem[ i ] , 7); + if (cursor_here) { + m_any_cursor = true; + } + bool show_cursor = m_cursor_blink && cursor_here; + uint8_t char_code = m_display_mem[ i ] & 0x7f; + for (unsigned j = 0; j < 7; ++j) { + uint8_t five_dots = 0; + if (m_display_on) { + for (unsigned col = 0; col < 5; col++) { + uint8_t char_col; + if (show_cursor) { + if (m_rpl_cursor) { + // Replace cursor: all pixels lit + char_col = ~0; + } else { + // Insert cursor: character code 0 + char_col = chargen[ 0 ][ col ]; + } + } else { + char_col = chargen[ char_code ][ col ]; + } + if (BIT(char_col , j)) { + BIT_SET(five_dots , col); + } + } + } + m_display[ i ][ j ] = five_dots; + } + } +} + +TIMER_DEVICE_CALLBACK_MEMBER(hp9825_state::cursor_blink) +{ + m_cursor_blink = !m_cursor_blink; + if (m_any_cursor) { + update_display(); + } +} + +TIMER_DEVICE_CALLBACK_MEMBER(hp9825_state::kb_scan) +{ + ioport_value input[ 4 ] + { m_io_key[ 0 ]->read(), + m_io_key[ 1 ]->read(), + m_io_key[ 2 ]->read(), + m_io_key[ 3 ]->read() + }; + + if (m_key_pressed) { + // Still pressed ? + m_key_pressed = BIT(input[ m_scancode / 32 ] , m_scancode % 32); + } else { + int max_seq_len = 0; + unsigned max_seq_idx = 0; + for (unsigned i = 0; i < 4; i++) { + kb_scan_ioport(input[ i ] , *m_io_key[ i ] , i << 5 , max_seq_len , max_seq_idx); + } + if (max_seq_len) { + m_scancode = max_seq_idx; + m_key_pressed = true; + set_irq(KDP_PA , true); + } + } + + if (m_key_pressed) { + auto prev_cnt = m_autorepeat_cnt; + m_autorepeat_cnt++; + // Auto-repeat initial delay & frequency are entirely guessed.. + if (BIT(m_autorepeat_cnt , 5)) { + // Initial delay passed + m_autorepeating = true; + } + if (m_autorepeating && BIT(~prev_cnt & m_autorepeat_cnt , 3)) { + // Repeat key every time bit 3 of autorepeat counter goes 0->1 + set_irq(KDP_PA , true); + } + } else { + m_autorepeating = false; + m_autorepeat_cnt = 0; + } +} + +void hp9825_state::kb_scan_ioport(ioport_value pressed , ioport_port &port , unsigned idx_base , int& max_seq_len , unsigned& max_seq_idx) +{ + while (pressed) { + unsigned bit_no = 31 - count_leading_zeros(pressed); + ioport_value mask = BIT_MASK<ioport_value>(bit_no); + int seq_len = port.field(mask)->seq().length(); + if (seq_len > max_seq_len) { + max_seq_len = seq_len; + max_seq_idx = bit_no + idx_base; + } + pressed &= ~mask; + } +} + +IRQ_CALLBACK_MEMBER(hp9825_state::irq_callback) +{ + if (irqline == HPHYBRID_IRL) { + return m_irl_pending; + } else { + return m_irh_pending; + } +} + +void hp9825_state::update_irq() +{ + m_cpu->set_input_line(HPHYBRID_IRL , m_irl_pending != 0); + m_cpu->set_input_line(HPHYBRID_IRH , m_irh_pending != 0); +} + +void hp9825_state::set_irq(uint8_t sc , int state) +{ + unsigned bit_n = sc % 8; + + if (sc < 8) { + if (state) { + BIT_SET(m_irl_pending, bit_n); + } else { + BIT_CLR(m_irl_pending, bit_n); + } + } else { + if (state) { + BIT_SET(m_irh_pending, bit_n); + } else { + BIT_CLR(m_irh_pending, bit_n); + } + } + update_irq(); +} + +WRITE8_MEMBER(hp9825_state::pa_w) +{ + m_pa = data; + update_flg_sts(); +} + +void hp9825_state::update_flg_sts() +{ + bool sts = BIT(m_sts_status , m_pa); + bool flg = BIT(m_flg_status , m_pa); + m_cpu->status_w(sts); + m_cpu->flag_w(flg); +} + +void hp9825_state::set_sts(uint8_t sc , int state) +{ + if (state) { + BIT_SET(m_sts_status, sc); + } else { + BIT_CLR(m_sts_status, sc); + } + if (sc == m_pa) { + update_flg_sts(); + } +} + +void hp9825_state::set_flg(uint8_t sc , int state) +{ + if (state) { + BIT_SET(m_flg_status, sc); + } else { + BIT_CLR(m_flg_status, sc); + } + if (sc == m_pa) { + update_flg_sts(); + } +} + +MACHINE_CONFIG_START(hp9825_state::hp9825b) + HP_09825_67907(config , m_cpu , MAIN_CLOCK); + // Just guessing... settings borrowed from hp9845 + m_cpu->set_rw_cycles(6 , 6); + m_cpu->set_relative_mode(false); + m_cpu->set_addrmap(AS_PROGRAM , &hp9825_state::cpu_mem_map); + m_cpu->set_addrmap(AS_IO , &hp9825_state::cpu_io_map); + m_cpu->set_irq_acknowledge_callback(FUNC(hp9825_state::irq_callback)); + m_cpu->pa_changed_cb().set(FUNC(hp9825_state::pa_w)); + + TIMER(config , m_cursor_timer , 0).configure_generic(timer_device::expired_delegate(FUNC(hp9825_state::cursor_blink) , this)); + + // Keyboard scan timer. A scan of the whole keyboard should take 2^14 KDP clocks. + TIMER(config , "kb_timer" , 0).configure_periodic(timer_device::expired_delegate(FUNC(hp9825_state::kb_scan) , this) , attotime::from_ticks(16384 , KDP_CLOCK)); + + // Tape drive + HP9825_TAPE(config , m_tape , 0); + m_tape->flg().set([this , sc = TAPE_PA](int state) { set_flg(sc , state); }); + m_tape->sts().set([this , sc = TAPE_PA](int state) { set_sts(sc , state); }); + m_tape->dmar().set(m_cpu , FUNC(hp_09825_67907_cpu_device::dmar_w)); + + config.set_default_layout(layout_hp9825); +MACHINE_CONFIG_END + +#define IOP_MASK(x) BIT_MASK<ioport_value>((x)) + +static INPUT_PORTS_START(hp9825) + // Keyboard is arranged in a 8 x 16 matrix. Of the 128 possible positions, 102 are used. + // Keys are mapped on bit b of KEYn + // where b = (row & 1) << 4 + column, n = row >> 1 + // column = [0..15] + // row = [0..7] + // 4 more keys are not in the matrix: 2 SHIFTs, 1 SHIFT LOCK and RESET key. + // Fun fact: alphanumeric keys are arranged in the matrix so that their scancode (row/column number) + // equals the lower case ASCII code. The person in charge of routing the keyboard PCB + // must have loved this arrangement... + PORT_START("KEY0") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,0: N/U + PORT_BIT(IOP_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) PORT_NAME("Stop") // 0,1: Stop + PORT_BIT(IOP_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Rewind") // 0,2: Rewind + PORT_BIT(IOP_MASK(3) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,3: N/U + PORT_BIT(IOP_MASK(4) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,4: N/U + PORT_BIT(IOP_MASK(5) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,5: N/U + PORT_BIT(IOP_MASK(6) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,6: N/U + PORT_BIT(IOP_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Result") // 0,7: Result + PORT_BIT(IOP_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Line insert") // 0,8: Line insert + PORT_BIT(IOP_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Line delete") // 0,9: Line delete + PORT_BIT(IOP_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD)) PORT_NAME("Execute") // 0,10: Execute + PORT_BIT(IOP_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Line recall") // 0,11: Line recall + PORT_BIT(IOP_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Run") // 0,12: Run + PORT_BIT(IOP_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Store") // 0,13: Store + PORT_BIT(IOP_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Display left") // 0,14: Display left + PORT_BIT(IOP_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Display right") // 0,15: Display right + PORT_BIT(IOP_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) PORT_NAME("Display down") // 1,0: Display down + PORT_BIT(IOP_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) PORT_NAME("Display up") // 1,1: Display up + PORT_BIT(IOP_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_HOME) PORT_NAME("Clear") // 1,2: Clear + PORT_BIT(IOP_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Print all") // 1,3: Print all + PORT_BIT(IOP_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_NAME("Char back") // 1,4: Char back + PORT_BIT(IOP_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_NAME("Char forward") // 1,5: Char forward + PORT_BIT(IOP_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_INSERT) PORT_NAME("Char ins/rpl") // 1,6: Char ins/rpl + PORT_BIT(IOP_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL) PORT_NAME("Char delete") // 1,7: Char delete + PORT_BIT(IOP_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Step") // 1,8: Step + PORT_BIT(IOP_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_NAME("Continue") PORT_CHAR(13) // 1,9: Continue + PORT_BIT(IOP_MASK(26) , IP_ACTIVE_HIGH , IPT_UNUSED) // 1,10: N/U + PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("List") // 1,11: List + PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Line fetch") // 1,12: Line fetch + PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Erase") // 1,13: Erase + PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Record") // 1,14: Record + PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Load") // 1,15: Load + + PORT_START("KEY1") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') // 2,0: Space + PORT_BIT(IOP_MASK(1) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,1: N/U + PORT_BIT(IOP_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,2: N/U + PORT_BIT(IOP_MASK(3) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,3: N/U + PORT_BIT(IOP_MASK(4) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,4: N/U + PORT_BIT(IOP_MASK(5) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,5: N/U + PORT_BIT(IOP_MASK(6) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,6: N/U + PORT_BIT(IOP_MASK(7) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,7: N/U + PORT_BIT(IOP_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('(') PORT_NAME("Keypad (") // 2,8: KP ( + PORT_BIT(IOP_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(')') PORT_NAME("Keypad )") // 2,9: KP ) + PORT_BIT(IOP_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK)) // 2,10: KP * + PORT_BIT(IOP_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD)) // 2,11: KP + + PORT_BIT(IOP_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') // 2,12: , + PORT_BIT(IOP_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) // 2,13: KP - + PORT_BIT(IOP_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') // 2,14: . + PORT_BIT(IOP_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD)) // 2,15: KP / + PORT_BIT(IOP_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('\'') // 3,0: 0 + PORT_BIT(IOP_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') // 3,1: 1 + PORT_BIT(IOP_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') // 3,2: 2 + PORT_BIT(IOP_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') // 3,3: 3 + PORT_BIT(IOP_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') // 3,4: 4 + PORT_BIT(IOP_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') // 3,5: 5 + PORT_BIT(IOP_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') // 3,6: 6 + PORT_BIT(IOP_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('@') // 3,7: 7 + PORT_BIT(IOP_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('[') // 3,8: 8 + PORT_BIT(IOP_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(']') // 3,9: 9 + PORT_BIT(IOP_MASK(26) , IP_ACTIVE_HIGH , IPT_UNUSED) // 3,10: N/U + PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') // 3,11: ; + PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_UNUSED) // 3,12: N/U + PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS_PAD) PORT_CHAR(UCHAR_MAMEKEY(EQUALS_PAD)) // 3,13: = + PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_UNUSED) // 3,14: N/U + PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('?') PORT_CHAR(':') // 3,15: ? + + PORT_START("KEY2") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // 4,0: N/U + PORT_BIT(IOP_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("f0") // 4,1: f0 + PORT_BIT(IOP_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1)) PORT_NAME("f1") // 4,2: f1 + PORT_BIT(IOP_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) PORT_NAME("f2") // 4,3: f2 + PORT_BIT(IOP_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3)) PORT_NAME("f3") // 4,4: f3 + PORT_BIT(IOP_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4)) PORT_NAME("f4") // 4,5: f4 + PORT_BIT(IOP_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5)) PORT_NAME("f5") // 4,6: f5 + PORT_BIT(IOP_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6)) PORT_NAME("f6") // 4,7: f6 + PORT_BIT(IOP_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7)) PORT_NAME("f7") // 4,8: f7 + PORT_BIT(IOP_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8)) PORT_NAME("f8") // 4,9: f8 + PORT_BIT(IOP_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9)) PORT_NAME("f9") // 4,10: f9 + PORT_BIT(IOP_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F10) PORT_CHAR(UCHAR_MAMEKEY(F10)) PORT_NAME("f10") // 4,11: f10 + PORT_BIT(IOP_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F11) PORT_CHAR(UCHAR_MAMEKEY(F11)) PORT_NAME("f11") // 4,12: f11 + PORT_BIT(IOP_MASK(13) , IP_ACTIVE_HIGH , IPT_UNUSED) // 4,13: N/U + PORT_BIT(IOP_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) // 4,14: KP 0 + PORT_BIT(IOP_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) // 4,15: KP 1 + PORT_BIT(IOP_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) // 5,0: KP 2 + PORT_BIT(IOP_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_3_PAD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) // 5,1: KP 3 + PORT_BIT(IOP_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) // 5,2: KP 4 + PORT_BIT(IOP_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_5_PAD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) // 5,3: KP 5 + PORT_BIT(IOP_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) // 5,4: KP 6 + PORT_BIT(IOP_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) // 5,5: KP 7 + PORT_BIT(IOP_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) // 5,6: KP 8 + PORT_BIT(IOP_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) // 5,7: KP 9 + PORT_BIT(IOP_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD)) // 5,8: KP . + PORT_BIT(IOP_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA_PAD) PORT_CHAR(UCHAR_MAMEKEY(COMMA_PAD)) // 5,9: KP , + PORT_BIT(IOP_MASK(26) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,10: N/U + PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,11: N/U + PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,12: N/U + PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,13: N/U + PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_NAME("↑ √") // 5,14: ^ + PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,15: N/U + + PORT_START("KEY3") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Enter exp _") // 6,0: Enter exp + PORT_BIT(IOP_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') // 6,1: A + PORT_BIT(IOP_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') // 6,2: B + PORT_BIT(IOP_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') // 6,3: C + PORT_BIT(IOP_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') // 6,4: D + PORT_BIT(IOP_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') // 6,5: E + PORT_BIT(IOP_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') // 6,6: F + PORT_BIT(IOP_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') // 6,7: G + PORT_BIT(IOP_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') // 6,8: H + PORT_BIT(IOP_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') // 6,9: I + PORT_BIT(IOP_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') // 6,10: J + PORT_BIT(IOP_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') // 6,11: K + PORT_BIT(IOP_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') // 6,12: L + PORT_BIT(IOP_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') // 6,13: M + PORT_BIT(IOP_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') // 6,14: N + PORT_BIT(IOP_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') // 6,15: O + PORT_BIT(IOP_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') // 7,0: P + PORT_BIT(IOP_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') // 7,1: Q + PORT_BIT(IOP_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') // 7,2: R + PORT_BIT(IOP_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') // 7,3: S + PORT_BIT(IOP_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') // 7,4: T + PORT_BIT(IOP_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') // 7,5: U + PORT_BIT(IOP_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') // 7,6: V + PORT_BIT(IOP_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') // 7,7: W + PORT_BIT(IOP_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') // 7,8: X + PORT_BIT(IOP_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') // 7,9: Y + PORT_BIT(IOP_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') // 7,10: Z + PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("π |") // 7,11: Pi + PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,12: N/U + PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_END) PORT_NAME("→") // 7,13: Gazinta + PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,14: N/U + PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,15: N/U + + PORT_START("KEY_SHIFT") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // Shift +INPUT_PORTS_END + +ROM_START(hp9825b) + ROM_REGION(0x6000 , "cpu" , ROMREGION_16BIT | ROMREGION_BE) + ROM_LOAD("sysrom1.bin" , 0x0000 , 0x2000 , CRC(fe429268) SHA1(f2fe7c5abca92bd13f81b4385fc4fce0cafb0da0)) + ROM_LOAD("sysrom2.bin" , 0x2000 , 0x2000 , CRC(96093b5d) SHA1(c6ec4cafd019887df0fa849b3c7070bb74faee54)) + ROM_LOAD("sysrom3.bin" , 0x4000 , 0x2000 , CRC(f9470f67) SHA1(b80cb4a366d93bd7acc3508ce987bb11c5986b2a)) +ROM_END + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +COMP(1980, hp9825b, 0, 0, hp9825b, hp9825, hp9825_state, empty_init, "Hewlett-Packard", "HP 9825B", MACHINE_NO_SOUND) diff --git a/src/mame/drivers/hp9845.cpp b/src/mame/drivers/hp9845.cpp index f6e2e3fbf68..01c2caf375e 100644 --- a/src/mame/drivers/hp9845.cpp +++ b/src/mame/drivers/hp9845.cpp @@ -3737,15 +3737,19 @@ void hp9845_base_state::ppu_io_map(address_map &map) } MACHINE_CONFIG_START(hp9845_base_state::hp9845_base) - MCFG_DEVICE_ADD("lpu", HP_5061_3001, 5700000) - MCFG_DEVICE_PROGRAM_MAP(global_mem_map) - MCFG_HPHYBRID_SET_9845_BOOT(true) - MCFG_DEVICE_ADD("ppu", HP_5061_3001, 5700000) - MCFG_DEVICE_PROGRAM_MAP(global_mem_map) - MCFG_DEVICE_IO_MAP(ppu_io_map) - MCFG_HPHYBRID_SET_9845_BOOT(true) - MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(hp9845_base_state , irq_callback) - MCFG_HPHYBRID_PA_CHANGED(WRITE8(*this, hp9845_base_state , pa_w)) + HP_5061_3001(config , m_lpu , 5700000); + m_lpu->set_addrmap(AS_PROGRAM , &hp9845_base_state::global_mem_map); + m_lpu->set_9845_boot_mode(true); + m_lpu->set_rw_cycles(6 , 6); + m_lpu->set_relative_mode(true); + HP_5061_3001(config , m_ppu , 5700000); + m_ppu->set_addrmap(AS_PROGRAM , &hp9845_base_state::global_mem_map); + m_ppu->set_addrmap(AS_IO , &hp9845_base_state::ppu_io_map); + m_ppu->set_9845_boot_mode(true); + m_ppu->set_rw_cycles(6 , 6); + m_ppu->set_relative_mode(true); + m_ppu->set_irq_acknowledge_callback(FUNC(hp9845_base_state::irq_callback)); + m_ppu->pa_changed_cb().set(FUNC(hp9845_base_state::pa_w)); // video hardware MCFG_SCREEN_ADD("screen", RASTER) diff --git a/src/mame/drivers/hp9k_3xx.cpp b/src/mame/drivers/hp9k_3xx.cpp index f28e296a6a7..112287b8939 100644 --- a/src/mame/drivers/hp9k_3xx.cpp +++ b/src/mame/drivers/hp9k_3xx.cpp @@ -27,6 +27,10 @@ MC68030 CPU @ 16.67 MHz w/built-in MMU MC68881 FPU + 360: + MC68030 CPU @ 25 MHz w/built-in MMU + MC68882 FPU + 370: MC68030 CPU @ 33 MHz w/built-in MMU MC68881 FPU @@ -57,30 +61,15 @@ #include "emu.h" #include "logmacro.h" #include "cpu/m68000/m68000.h" -#include "cpu/mcs48/mcs48.h" #include "machine/6840ptm.h" -#include "machine/tms9914.h" -#include "sound/sn76496.h" #include "bus/hp_dio/hp_dio.h" -#include "bus/hp_dio/hp98543.h" -#include "bus/hp_dio/hp98544.h" -#include "bus/hp_hil/hp_hil.h" -#include "bus/hp_hil/hil_devices.h" -#include "bus/hp_dio/hp98603a.h" -#include "bus/hp_dio/hp98603b.h" -#include "bus/hp_dio/hp98644.h" -#include "bus/ieee488/ieee488.h" + #include "screen.h" -#include "speaker.h" #include "softlist_dev.h" +#include "hp9k_3xx.lh" #define MAINCPU_TAG "maincpu" -#define IOCPU_TAG "iocpu" #define PTM6840_TAG "ptm" -#define MLC_TAG "mlc" -#define SN76494_TAG "sn76494" - -#define SN76494_CLOCK 333333 class hp9k3xx_state : public driver_device { @@ -88,155 +77,81 @@ public: hp9k3xx_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, MAINCPU_TAG), - m_iocpu(*this, IOCPU_TAG), - m_mlc(*this, MLC_TAG), - m_sound(*this, SN76494_TAG), - m_tms9914(*this, "tms9914"), - m_vram16(*this, "vram16"), - m_vram(*this, "vram") + m_diag_led(*this, "led_diag_%u", 0U) { } - void hp9k370(machine_config &config); - void hp9k330(machine_config &config); - void hp9k382(machine_config &config); void hp9k310(machine_config &config); - void hp9k340(machine_config &config); - void hp9k380(machine_config &config); void hp9k320(machine_config &config); + void hp9k330(machine_config &config); void hp9k332(machine_config &config); - void hp9k300(machine_config &config); + void hp9k340(machine_config &config); + void hp9k360(machine_config &config); + void hp9k370(machine_config &config); + void hp9k380(machine_config &config); + void hp9k382(machine_config &config); private: + void hp9k300(machine_config &config); required_device<m68000_base_device> m_maincpu; - optional_device<i8042_device> m_iocpu; - optional_device<hp_hil_mlc_device> m_mlc; - optional_device<sn76494_device> m_sound; - optional_device<tms9914_device> m_tms9914; + virtual void machine_reset() override; + virtual void machine_start() override; + virtual void driver_start() override; - optional_shared_ptr<uint16_t> m_vram16; - optional_shared_ptr<uint32_t> m_vram; + output_finder<8> m_diag_led; - uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - uint32_t hp_medres_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + void set_bus_error(uint32_t address, bool write, uint16_t mem_mask); DECLARE_READ16_MEMBER(buserror16_r); DECLARE_WRITE16_MEMBER(buserror16_w); DECLARE_READ32_MEMBER(buserror_r); DECLARE_WRITE32_MEMBER(buserror_w); - /* 8042 interface */ - DECLARE_WRITE8_MEMBER(iocpu_port1_w); - DECLARE_WRITE8_MEMBER(iocpu_port2_w); - DECLARE_READ8_MEMBER(iocpu_port1_r); - DECLARE_READ8_MEMBER(iocpu_test0_r); - - DECLARE_READ8_MEMBER(gpib_r); - DECLARE_WRITE8_MEMBER(gpib_w); - - DECLARE_WRITE_LINE_MEMBER(gpib_irq); - DECLARE_WRITE32_MEMBER(led_w) - { - if (mem_mask != 0x000000ff) - { - return; - } -#if 0 - printf("LED: %02x (", data&0xff); - for (int i = 7; i >= 0; i--) - { - if (data & (1 << i)) - { - printf("o"); - } - else - { - printf("*"); - } - } - printf(")\n"); -#endif - } + DECLARE_WRITE16_MEMBER(led_w); void hp9k310_map(address_map &map); void hp9k320_map(address_map &map); void hp9k330_map(address_map &map); void hp9k332_map(address_map &map); + void hp9k360_map(address_map &map); void hp9k370_map(address_map &map); void hp9k380_map(address_map &map); void hp9k382_map(address_map &map); void hp9k3xx_common(address_map &map); - void iocpu_map(address_map &map); - - DECLARE_WRITE_LINE_MEMBER(cpu_reset); - - static constexpr uint8_t HIL_CS = 0x01; - static constexpr uint8_t HIL_WE = 0x02; - static constexpr uint8_t HIL_OE = 0x04; - static constexpr uint8_t LATCH_EN = 0x08; - static constexpr uint8_t KBD_RESET = 0x40; - static constexpr uint8_t SN76494_EN = 0x80; - - bool m_hil_read; - bool m_kbd_nmi; - uint8_t m_hil_data; - uint8_t m_latch_data; - uint32_t m_lastpc; - bool gpib_irq_line; -}; -uint32_t hp9k3xx_state::hp_medres_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) -{ - uint32_t *scanline; - int x, y; - uint32_t pixels; - uint32_t m_palette[2] = { 0x00000000, 0xffffffff }; - - for (y = 0; y < 390; y++) - { - scanline = &bitmap.pix32(y); - for (x = 0; x < 512/4; x++) - { - pixels = m_vram[(y * 256) + x]; - - *scanline++ = m_palette[(pixels>>24) & 1]; - *scanline++ = m_palette[(pixels>>16) & 1]; - *scanline++ = m_palette[(pixels>>8) & 1]; - *scanline++ = m_palette[(pixels & 1)]; - } - } - - return 0; -} + void add_dio16_bus(machine_config &mconfig); + void add_dio32_bus(machine_config &mconfig); + + DECLARE_WRITE_LINE_MEMBER(dio_irq1_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_1, state, M68K_INT_ACK_AUTOVECTOR); }; + DECLARE_WRITE_LINE_MEMBER(dio_irq2_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_2, state, M68K_INT_ACK_AUTOVECTOR); }; + DECLARE_WRITE_LINE_MEMBER(dio_irq3_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_3, state, M68K_INT_ACK_AUTOVECTOR); }; + DECLARE_WRITE_LINE_MEMBER(dio_irq4_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_4, state, M68K_INT_ACK_AUTOVECTOR); }; + DECLARE_WRITE_LINE_MEMBER(dio_irq5_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_5, state, M68K_INT_ACK_AUTOVECTOR); }; + DECLARE_WRITE_LINE_MEMBER(dio_irq6_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_6, state, M68K_INT_ACK_AUTOVECTOR); }; + DECLARE_WRITE_LINE_MEMBER(dio_irq7_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_7, state, M68K_INT_ACK_AUTOVECTOR); }; + + bool m_bus_error; + emu_timer *m_bus_error_timer; + TIMER_CALLBACK_MEMBER(bus_error_timeout); +}; // shared mappings for all 9000/3xx systems void hp9k3xx_state::hp9k3xx_common(address_map &map) { map(0x00000000, 0xffffffff).rw(FUNC(hp9k3xx_state::buserror_r), FUNC(hp9k3xx_state::buserror_w)); map(0x00000000, 0x0001ffff).rom().region("maincpu", 0).w(FUNC(hp9k3xx_state::led_w)); // writes to 1fffc are the LED - - map(0x00428000, 0x00428003).rw(m_iocpu, FUNC(upi41_cpu_device::upi41_master_r), FUNC(upi41_cpu_device::upi41_master_w)).umask32(0x00ff00ff); - map(0x00470000, 0x0047001f).mirror(0x0000ffe0).rw(FUNC(hp9k3xx_state::gpib_r), FUNC(hp9k3xx_state::gpib_w)).umask16(0x00ff); - + map(0x005f4000, 0x005f400f).ram(); // somehow coprocessor related - bootrom crashes if not present map(0x005f8000, 0x005f800f).rw(PTM6840_TAG, FUNC(ptm6840_device::read), FUNC(ptm6840_device::write)).umask32(0x00ff00ff); - map(0x005f4000, 0x005f400f).ram(); // somehow coprocessor related - bootrom crashes if not present } // 9000/310 - has onboard video that the graphics card used in other 3xxes conflicts with void hp9k3xx_state::hp9k310_map(address_map &map) { - map(0x000000, 0x01ffff).rom().region("maincpu", 0).nopw(); // writes to 1fffc are the LED - - map(0x428000, 0x428003).rw(m_iocpu, FUNC(upi41_cpu_device::upi41_master_r), FUNC(upi41_cpu_device::upi41_master_w)).umask16(0x00ff); - map(0x470000, 0x47001f).mirror(0x00ffe0).rw(FUNC(hp9k3xx_state::gpib_r), FUNC(hp9k3xx_state::gpib_w)).umask16(0x00ff); - - map(0x510000, 0x510003).rw(FUNC(hp9k3xx_state::buserror16_r), FUNC(hp9k3xx_state::buserror16_w)); // no "Alpha display" - map(0x538000, 0x538003).rw(FUNC(hp9k3xx_state::buserror16_r), FUNC(hp9k3xx_state::buserror16_w)); // no "Graphics" - map(0x5c0000, 0x5c0003).rw(FUNC(hp9k3xx_state::buserror16_r), FUNC(hp9k3xx_state::buserror16_w)); // no add-on FP coprocessor - + map(0x000000, 0xffffff).rw(FUNC(hp9k3xx_state::buserror16_r), FUNC(hp9k3xx_state::buserror16_w)); + map(0x000000, 0x01ffff).rom().region("maincpu", 0).w(FUNC(hp9k3xx_state::led_w)); // writes to 1fffc are the LED + map(0x5f4000, 0x5f400f).ram(); // somehow coprocessor related - bootrom crashes if not present map(0x5f8000, 0x5f800f).rw(PTM6840_TAG, FUNC(ptm6840_device::read), FUNC(ptm6840_device::write)).umask16(0x00ff); - map(0x600000, 0x7fffff).rw(FUNC(hp9k3xx_state::buserror16_r), FUNC(hp9k3xx_state::buserror16_w)); // prevent reading invalid DIO slots map(0x800000, 0xffffff).ram(); } @@ -244,12 +159,6 @@ void hp9k3xx_state::hp9k310_map(address_map &map) void hp9k3xx_state::hp9k320_map(address_map &map) { hp9k3xx_common(map); - - // unknown, but bootrom crashes without - map(0x00510000, 0x00510fff).ram(); - map(0x00516000, 0x00516fff).ram(); - map(0x00440000, 0x0044ffff).ram(); - // main memory map(0xfff00000, 0xffffffff).ram(); } @@ -258,8 +167,7 @@ void hp9k3xx_state::hp9k320_map(address_map &map) void hp9k3xx_state::hp9k330_map(address_map &map) { hp9k3xx_common(map); - - map(0xffb00000, 0xffbfffff).rw(FUNC(hp9k3xx_state::buserror_r), FUNC(hp9k3xx_state::buserror_w)); + // main memory map(0xffc00000, 0xffffffff).ram(); } @@ -267,20 +175,23 @@ void hp9k3xx_state::hp9k330_map(address_map &map) void hp9k3xx_state::hp9k332_map(address_map &map) { hp9k3xx_common(map); - - map(0x00200000, 0x002fffff).ram().share("vram"); // 98544 mono framebuffer - map(0x00560000, 0x00563fff).rom().region("graphics", 0x0000); // 98544 mono ROM - - map(0xffb00000, 0xffbfffff).rw(FUNC(hp9k3xx_state::buserror_r), FUNC(hp9k3xx_state::buserror_w)); + // main memory map(0xffc00000, 0xffffffff).ram(); } +// 9000/360 - 16 MB RAM to run HP/UX +void hp9k3xx_state::hp9k360_map(address_map &map) +{ + hp9k3xx_common(map); + // main memory + map(0xff000000, 0xffffffff).ram(); +} + // 9000/370 - 8 MB RAM standard void hp9k3xx_state::hp9k370_map(address_map &map) { hp9k3xx_common(map); - - map(0xff700000, 0xff7fffff).rw(FUNC(hp9k3xx_state::buserror_r), FUNC(hp9k3xx_state::buserror_w)); + // main memory map(0xff800000, 0xffffffff).ram(); } @@ -288,10 +199,7 @@ void hp9k3xx_state::hp9k370_map(address_map &map) void hp9k3xx_state::hp9k380_map(address_map &map) { hp9k3xx_common(map); - - map(0x0051a000, 0x0051afff).rw(FUNC(hp9k3xx_state::buserror_r), FUNC(hp9k3xx_state::buserror_w)); // no "Alpha display" - - map(0xc0000000, 0xff7fffff).rw(FUNC(hp9k3xx_state::buserror_r), FUNC(hp9k3xx_state::buserror_w)); + // main memory map(0xff800000, 0xffffffff).ram(); } @@ -299,226 +207,143 @@ void hp9k3xx_state::hp9k380_map(address_map &map) void hp9k3xx_state::hp9k382_map(address_map &map) { hp9k3xx_common(map); - - map(0xffb00000, 0xffbfffff).rw(FUNC(hp9k3xx_state::buserror_r), FUNC(hp9k3xx_state::buserror_w)); + // main memory map(0xffc00000, 0xffffffff).ram(); - - map(0x0051a000, 0x0051afff).rw(FUNC(hp9k3xx_state::buserror_r), FUNC(hp9k3xx_state::buserror_w)); // no "Alpha display" -} - -void hp9k3xx_state::iocpu_map(address_map &map) -{ -} - -uint32_t hp9k3xx_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) -{ - return 0; } /* Input ports */ static INPUT_PORTS_START( hp9k330 ) INPUT_PORTS_END -WRITE_LINE_MEMBER(hp9k3xx_state::cpu_reset) +void hp9k3xx_state::driver_start() { - m_iocpu->reset(); + m_diag_led.resolve(); } - void hp9k3xx_state::machine_reset() { - m_maincpu->set_reset_callback(write_line_delegate(FUNC(hp9k3xx_state::cpu_reset), this)); + auto *dio = subdevice<bus::hp_dio::dio16_device>("diobus"); + if (dio) + m_maincpu->set_reset_callback(write_line_delegate(FUNC(bus::hp_dio::dio16_device::reset_in), dio)); } -WRITE_LINE_MEMBER(hp9k3xx_state::gpib_irq) +void hp9k3xx_state::machine_start() { - gpib_irq_line = state; - m_maincpu->set_input_line(M68K_IRQ_3, state ? ASSERT_LINE : CLEAR_LINE); + m_bus_error_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(hp9k3xx_state::bus_error_timeout), this)); + save_item(NAME(m_bus_error)); } -WRITE8_MEMBER(hp9k3xx_state::gpib_w) +TIMER_CALLBACK_MEMBER(hp9k3xx_state::bus_error_timeout) { - if (offset & 0x08) { - m_tms9914->reg8_w(space, offset & 0x07, data); - return; - } - LOG("gpib_w: %s %02X = %02X\n", machine().describe_context().c_str(), offset, data); + m_bus_error = false; } -READ8_MEMBER(hp9k3xx_state::gpib_r) +WRITE16_MEMBER(hp9k3xx_state::led_w) { - uint8_t data = 0xff; - - if (offset & 0x8) { - data = m_tms9914->reg8_r(space, offset & 0x07); - return data; - } - - switch(offset) { - case 0: /* ID */ - data = 0x80; - break; - case 1: - /* Int control */ - data = 0x80 | (gpib_irq_line ? 0x40 : 0); - break; - case 2: - /* Address */ - data = (m_tms9914->cont_r() ? 0x0 : 0x40) | 0x81; - if (m_kbd_nmi) - data |= 0x04; - break; - } - LOG("gpib_r: %s %02X = %02X\n", machine().describe_context().c_str(), offset, data); - return data; + if (!(mem_mask & 0xff)) + return; + + LOG("LED: %02x\n", data & 0xff); + + m_diag_led[0] = BIT(data, 0); + m_diag_led[1] = BIT(data, 1); + m_diag_led[2] = BIT(data, 2); + m_diag_led[3] = BIT(data, 3); + m_diag_led[4] = BIT(data, 4); + m_diag_led[5] = BIT(data, 5); + m_diag_led[6] = BIT(data, 6); + m_diag_led[7] = BIT(data, 7); } -READ16_MEMBER(hp9k3xx_state::buserror16_r) +void hp9k3xx_state::add_dio16_bus(machine_config &config) { - m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); - m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); - m_lastpc = m_maincpu->pc(); - return 0; + bus::hp_dio::dio16_device &dio16(DIO16(config, "diobus", 0)); + dio16.set_cputag(m_maincpu); + + dio16.irq1_out_cb().set(FUNC(hp9k3xx_state::dio_irq1_w)); + dio16.irq2_out_cb().set(FUNC(hp9k3xx_state::dio_irq2_w)); + dio16.irq3_out_cb().set(FUNC(hp9k3xx_state::dio_irq3_w)); + dio16.irq4_out_cb().set(FUNC(hp9k3xx_state::dio_irq4_w)); + dio16.irq5_out_cb().set(FUNC(hp9k3xx_state::dio_irq5_w)); + dio16.irq6_out_cb().set(FUNC(hp9k3xx_state::dio_irq6_w)); + dio16.irq7_out_cb().set(FUNC(hp9k3xx_state::dio_irq7_w)); } -WRITE16_MEMBER(hp9k3xx_state::buserror16_w) +void hp9k3xx_state::add_dio32_bus(machine_config &config) { - if (m_lastpc == m_maincpu->pc()) { - logerror("%s: ignoring r-m-w double bus error\n", __FUNCTION__); - return; - } - - m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); - m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); -} - -READ32_MEMBER(hp9k3xx_state::buserror_r) -{ - m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); - m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); - m_lastpc = m_maincpu->pc(); - return 0; + bus::hp_dio::dio32_device &dio32(DIO32(config, "diobus", 0)); + dio32.set_cputag(m_maincpu); + + dio32.irq1_out_cb().set(FUNC(hp9k3xx_state::dio_irq1_w)); + dio32.irq2_out_cb().set(FUNC(hp9k3xx_state::dio_irq2_w)); + dio32.irq3_out_cb().set(FUNC(hp9k3xx_state::dio_irq3_w)); + dio32.irq4_out_cb().set(FUNC(hp9k3xx_state::dio_irq4_w)); + dio32.irq5_out_cb().set(FUNC(hp9k3xx_state::dio_irq5_w)); + dio32.irq6_out_cb().set(FUNC(hp9k3xx_state::dio_irq6_w)); + dio32.irq7_out_cb().set(FUNC(hp9k3xx_state::dio_irq7_w)); } -WRITE32_MEMBER(hp9k3xx_state::buserror_w) +void hp9k3xx_state::set_bus_error(uint32_t address, bool write, uint16_t mem_mask) { - if (m_lastpc == m_maincpu->pc()) { - logerror("%s: ignoring r-m-w double bus error\n", __FUNCTION__); + if (m_bus_error) return; - } - m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); - m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); -} -WRITE8_MEMBER(hp9k3xx_state::iocpu_port1_w) -{ - m_hil_data = data; + m_bus_error = true; + m_maincpu->set_buserror_details(address, write, m_maincpu->get_fc()); + m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); + m_bus_error_timer->adjust(m_maincpu->cycles_to_attotime(16)); // let rmw cycles complete } -WRITE8_MEMBER(hp9k3xx_state::iocpu_port2_w) +READ16_MEMBER(hp9k3xx_state::buserror16_r) { - if ((data & (HIL_CS|HIL_WE)) == 0) - m_mlc->write(space, (m_latch_data & 0xc0) >> 6, m_hil_data, 0xff); - - if ((data & SN76494_EN) == 0) - m_sound->write(m_hil_data); - - m_hil_read = ((data & (HIL_CS|HIL_OE)) == 0); - - if (!(data & LATCH_EN)) - m_latch_data = m_hil_data; - - m_maincpu->set_input_line(M68K_IRQ_1, data & 0x10 ? ASSERT_LINE : CLEAR_LINE); - - if (!(data & KBD_RESET)) { - m_maincpu->set_input_line(M68K_IRQ_7, ASSERT_LINE); - m_kbd_nmi = true; - } else { - m_maincpu->set_input_line(M68K_IRQ_7, CLEAR_LINE); - m_kbd_nmi = false; - } + if (!machine().side_effects_disabled()) + set_bus_error((offset << 1) & 0xFFFFFF, false, mem_mask); + return 0xffff; } -READ8_MEMBER(hp9k3xx_state::iocpu_port1_r) +WRITE16_MEMBER(hp9k3xx_state::buserror16_w) { - if (m_hil_read) - return m_mlc->read(space, (m_latch_data & 0xc0) >> 6, 0xff); - return 0xff; + if (!machine().side_effects_disabled()) + set_bus_error((offset << 1) & 0xFFFFFF, true, mem_mask); } -READ8_MEMBER(hp9k3xx_state::iocpu_test0_r) +READ32_MEMBER(hp9k3xx_state::buserror_r) { - return !m_mlc->get_int(); + if (!machine().side_effects_disabled()) + set_bus_error(offset << 2, false, mem_mask); + return 0xffffffff; } -static void dio16_cards(device_slot_interface &device) +WRITE32_MEMBER(hp9k3xx_state::buserror_w) { - device.option_add("98543", HPDIO_98543); /* 98543 Medium Resolution Color Card */ - device.option_add("98544", HPDIO_98544); /* 98544 High Resolution Monochrome Card */ - device.option_add("98603a", HPDIO_98603A); /* 98603A ROM BASIC (4.0) */ - device.option_add("98603b", HPDIO_98603B); /* 98603B ROM BASIC (5.1) */ - device.option_add("98644", HPDIO_98644); /* 98644 Async serial interface */ + if (!machine().side_effects_disabled()) + set_bus_error(offset << 2, false, mem_mask); } MACHINE_CONFIG_START(hp9k3xx_state::hp9k300) - MCFG_DEVICE_ADD(m_iocpu, I8042, 5000000) - MCFG_DEVICE_PROGRAM_MAP(iocpu_map) - MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(*this, hp9k3xx_state, iocpu_port1_w)) - MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, hp9k3xx_state, iocpu_port2_w)) - MCFG_MCS48_PORT_P1_IN_CB(READ8(*this, hp9k3xx_state, iocpu_port1_r)) - MCFG_MCS48_PORT_T0_IN_CB(READ8(*this, hp9k3xx_state, iocpu_test0_r)) - - MCFG_DEVICE_ADD(m_mlc, HP_HIL_MLC, XTAL(8'000'000)) - MCFG_HP_HIL_SLOT_ADD(MLC_TAG, "hil1", hp_hil_devices, "hp_46021a") - ptm6840_device &ptm(PTM6840(config, PTM6840_TAG, 250000)); // from oscillator module next to the 6840 ptm.set_external_clocks(250000.0f, 0.0f, 250000.0f); ptm.o3_callback().set(PTM6840_TAG, FUNC(ptm6840_device::set_c2)); ptm.irq_callback().set_inputline("maincpu", M68K_IRQ_6); - SPEAKER(config, "mono").front_center(); - MCFG_DEVICE_ADD(SN76494_TAG, SN76494, SN76494_CLOCK) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75) - - MCFG_DEVICE_ADD(m_tms9914, TMS9914, XTAL(5000000)) - MCFG_TMS9914_INT_WRITE_CB(WRITELINE(*this, hp9k3xx_state, gpib_irq)); - MCFG_TMS9914_DIO_READWRITE_CB(READ8(IEEE488_TAG, ieee488_device, dio_r), WRITE8(IEEE488_TAG, ieee488_device, host_dio_w)) - MCFG_TMS9914_EOI_WRITE_CB(WRITELINE(IEEE488_TAG, ieee488_device, host_eoi_w)) - MCFG_TMS9914_DAV_WRITE_CB(WRITELINE(IEEE488_TAG, ieee488_device, host_dav_w)) - MCFG_TMS9914_NRFD_WRITE_CB(WRITELINE(IEEE488_TAG, ieee488_device, host_nrfd_w)) - MCFG_TMS9914_NDAC_WRITE_CB(WRITELINE(IEEE488_TAG, ieee488_device, host_ndac_w)) - MCFG_TMS9914_IFC_WRITE_CB(WRITELINE(IEEE488_TAG, ieee488_device, host_ifc_w)) - MCFG_TMS9914_SRQ_WRITE_CB(WRITELINE(IEEE488_TAG, ieee488_device, host_srq_w)) - MCFG_TMS9914_ATN_WRITE_CB(WRITELINE(IEEE488_TAG, ieee488_device, host_atn_w)) - MCFG_TMS9914_REN_WRITE_CB(WRITELINE(IEEE488_TAG, ieee488_device, host_ren_w)) - - MCFG_IEEE488_SLOT_ADD("ieee0", 0, hp_ieee488_devices, "hp9122c") - MCFG_IEEE488_SLOT_ADD("ieee_rem", 0, remote488_devices, nullptr) - MCFG_IEEE488_BUS_ADD() - - MCFG_IEEE488_EOI_CALLBACK(WRITELINE(m_tms9914, tms9914_device, eoi_w)) - MCFG_IEEE488_DAV_CALLBACK(WRITELINE(m_tms9914, tms9914_device, dav_w)) - MCFG_IEEE488_NRFD_CALLBACK(WRITELINE(m_tms9914, tms9914_device, nrfd_w)) - MCFG_IEEE488_NDAC_CALLBACK(WRITELINE(m_tms9914, tms9914_device, ndac_w)) - MCFG_IEEE488_IFC_CALLBACK(WRITELINE(m_tms9914, tms9914_device, ifc_w)) - MCFG_IEEE488_SRQ_CALLBACK(WRITELINE(m_tms9914, tms9914_device, srq_w)) - MCFG_IEEE488_ATN_CALLBACK(WRITELINE(m_tms9914, tms9914_device, atn_w)) - MCFG_IEEE488_REN_CALLBACK(WRITELINE(m_tms9914, tms9914_device, ren_w)) - MCFG_SOFTWARE_LIST_ADD("flop_list", "hp9k3xx_flop") + config.set_default_layout(layout_hp9k_3xx); MACHINE_CONFIG_END MACHINE_CONFIG_START(hp9k3xx_state::hp9k310) + hp9k300(config); + MCFG_DEVICE_ADD(m_maincpu, M68010, 10000000) MCFG_DEVICE_PROGRAM_MAP(hp9k310_map) - MCFG_DEVICE_ADD("diobus", DIO16, 0) - MCFG_DIO16_CPU(m_maincpu) - MCFG_DEVICE_ADD("sl1", DIO16_SLOT, 0, "diobus", dio16_cards, "98544", true) - MCFG_DEVICE_ADD("sl2", DIO16_SLOT, 0, "diobus", dio16_cards, "98603b", true) - MCFG_DEVICE_ADD("sl3", DIO16_SLOT, 0, "diobus", dio16_cards, "98644", true) - MCFG_DEVICE_ADD("sl4", DIO16_SLOT, 0, "diobus", dio16_cards, nullptr, false) + add_dio16_bus(config); + + DIO16_SLOT(config, "sl0", 0, "diobus", dio16_cards, "human_interface", false); + DIO16_SLOT(config, "sl1", 0, "diobus", dio16_cards, "98544", false); + DIO16_SLOT(config, "sl2", 0, "diobus", dio16_cards, "98603b", false); + DIO16_SLOT(config, "sl3", 0, "diobus", dio16_cards, "98644", false); + DIO16_SLOT(config, "sl4", 0, "diobus", dio16_cards, nullptr, false); MACHINE_CONFIG_END @@ -527,13 +352,15 @@ MACHINE_CONFIG_START(hp9k3xx_state::hp9k320) MCFG_DEVICE_PROGRAM_MAP(hp9k320_map) hp9k300(config); - - MCFG_DEVICE_ADD("diobus", DIO32, 0) - MCFG_DIO32_CPU(m_maincpu) - MCFG_DEVICE_ADD("sl1", DIO32_SLOT, 0, "diobus", dio16_cards, "98544", true) - MCFG_DEVICE_ADD("sl2", DIO16_SLOT, 0, "diobus", dio16_cards, "98603b", true) - MCFG_DEVICE_ADD("sl3", DIO16_SLOT, 0, "diobus", dio16_cards, "98644", true) - MCFG_DEVICE_ADD("sl4", DIO32_SLOT, 0, "diobus", dio16_cards, nullptr, false) + add_dio32_bus(config); + + DIO32_SLOT(config, "sl0", 0, "diobus", dio16_cards, "human_interface", true); + DIO32_SLOT(config, "sl1", 0, "diobus", dio16_cards, "98543", false); + DIO32_SLOT(config, "sl2", 0, "diobus", dio16_cards, "98603b", false); + DIO32_SLOT(config, "sl3", 0, "diobus", dio16_cards, "98644", false); + DIO32_SLOT(config, "sl4", 0, "diobus", dio32_cards, "98620", false); + DIO32_SLOT(config, "sl5", 0, "diobus", dio32_cards, "98265a", false); + DIO32_SLOT(config, "sl6", 0, "diobus", dio16_cards, nullptr, false); MACHINE_CONFIG_END MACHINE_CONFIG_START(hp9k3xx_state::hp9k330) @@ -541,13 +368,13 @@ MACHINE_CONFIG_START(hp9k3xx_state::hp9k330) MCFG_DEVICE_PROGRAM_MAP(hp9k330_map) hp9k300(config); + add_dio32_bus(config); - MCFG_DEVICE_ADD("diobus", DIO32, 0) - MCFG_DIO32_CPU(m_maincpu) - MCFG_DEVICE_ADD("sl1", DIO32_SLOT, 0, "diobus", dio16_cards, "98544", true) - MCFG_DEVICE_ADD("sl2", DIO16_SLOT, 0, "diobus", dio16_cards, "98603b", true) - MCFG_DEVICE_ADD("sl3", DIO16_SLOT, 0, "diobus", dio16_cards, "98644", true) - MCFG_DEVICE_ADD("sl4", DIO32_SLOT, 0, "diobus", dio16_cards, nullptr, false) + DIO32_SLOT(config, "sl0", 0, "diobus", dio16_cards, "human_interface", true); + DIO32_SLOT(config, "sl1", 0, "diobus", dio16_cards, "98544", false); + DIO32_SLOT(config, "sl2", 0, "diobus", dio16_cards, "98603b", false); + DIO32_SLOT(config, "sl3", 0, "diobus", dio16_cards, "98644", false); + DIO32_SLOT(config, "sl4", 0, "diobus", dio16_cards, nullptr, false); MACHINE_CONFIG_END MACHINE_CONFIG_START(hp9k3xx_state::hp9k332) @@ -555,12 +382,14 @@ MACHINE_CONFIG_START(hp9k3xx_state::hp9k332) MCFG_DEVICE_PROGRAM_MAP(hp9k332_map) hp9k300(config); + add_dio16_bus(config); + + DIO16_SLOT(config, "sl0", 0, "diobus", dio16_cards, "human_interface", true); + DIO16_SLOT(config, "sl1", 0, "diobus", dio16_cards, "98603b", false); + DIO16_SLOT(config, "sl2", 0, "diobus", dio16_cards, "98644", false); + DIO16_SLOT(config, "sl3", 0, "diobus", dio16_cards, "98543", false); + DIO16_SLOT(config, "sl4", 0, "diobus", dio16_cards, nullptr, false); - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_UPDATE_DRIVER(hp9k3xx_state, hp_medres_update) - MCFG_SCREEN_SIZE(512,390) - MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 390-1) - MCFG_SCREEN_REFRESH_RATE(70) MACHINE_CONFIG_END MACHINE_CONFIG_START(hp9k3xx_state::hp9k340) @@ -570,6 +399,14 @@ MACHINE_CONFIG_START(hp9k3xx_state::hp9k340) MCFG_DEVICE_PROGRAM_MAP(hp9k330_map) MACHINE_CONFIG_END +MACHINE_CONFIG_START(hp9k3xx_state::hp9k360) + hp9k320(config); + + MCFG_DEVICE_REPLACE(m_maincpu, M68030, 25000000) + MCFG_DEVICE_PROGRAM_MAP(hp9k370_map) +MACHINE_CONFIG_END + + MACHINE_CONFIG_START(hp9k3xx_state::hp9k370) hp9k320(config); @@ -596,10 +433,6 @@ ROM_START( hp9k310 ) ROM_LOAD16_BYTE( "1818-3771.bin", 0x000001, 0x008000, CRC(b9e4e3ad) SHA1(ed6f1fad94a15d95362701dbe124b52877fc3ec4) ) ROM_LOAD16_BYTE( "1818-3772.bin", 0x000000, 0x008000, CRC(a3665919) SHA1(ec1bc7e5b7990a1b09af947a06401e8ed3cb0516) ) - ROM_REGION( 0x800, IOCPU_TAG, 0 ) - ROM_LOAD( "1820-4784_1.bin", 0x000000, 0x000800, CRC(e929044a) SHA1(90849a10bdb8c6e38e73ce027c9c0ad8b3956b1b) ) - ROM_LOAD( "1820-4784_2.bin", 0x000000, 0x000800, CRC(8defcf50) SHA1(d3abfea468a43db7c2369500a3e390e77a8e22e6) ) - ROM_REGION( 0x4000, "graphics", ROMREGION_ERASEFF | ROMREGION_BE ) ROM_LOAD16_BYTE( "98544_1818-1999.bin", 0x000000, 0x002000, CRC(8c7d6480) SHA1(d2bcfd39452c38bc652df39f84c7041cfdf6bd51) ) ROM_END @@ -610,30 +443,18 @@ ROM_START( hp9k320 ) ROM_LOAD16_BYTE( "5061-6539.bin", 0x000000, 0x004000, CRC(a7ff104c) SHA1(c640fe68314654716bd41b04c6a7f4e560036c7e) ) ROM_LOAD16_BYTE( "5061-6540.bin", 0x008001, 0x004000, CRC(4f6796d6) SHA1(fd254897ac1afb8628f40ea93213f60a082c8d36) ) ROM_LOAD16_BYTE( "5061-6541.bin", 0x008000, 0x004000, CRC(39d32998) SHA1(6de1bda75187b0878c03c074942b807cf2924f0e) ) - - ROM_REGION( 0x800, IOCPU_TAG, 0 ) - ROM_LOAD( "1820-4784.bin", 0x000000, 0x000800, CRC(e929044a) SHA1(90849a10bdb8c6e38e73ce027c9c0ad8b3956b1b) ) ROM_END ROM_START( hp9k330 ) ROM_REGION( 0x20000, MAINCPU_TAG, 0 ) ROM_LOAD16_BYTE( "1818-4416.bin", 0x000000, 0x010000, CRC(cd71e85e) SHA1(3e83a80682f733417fdc3720410e45a2cfdcf869) ) ROM_LOAD16_BYTE( "1818-4417.bin", 0x000001, 0x010000, CRC(374d49db) SHA1(a12cbf6c151e2f421da4571000b5dffa3ef403b3) ) - - ROM_REGION( 0x800, IOCPU_TAG, 0 ) - ROM_LOAD( "1820-4784.bin", 0x000000, 0x000800, CRC(e929044a) SHA1(90849a10bdb8c6e38e73ce027c9c0ad8b3956b1b) ) ROM_END ROM_START( hp9k332 ) ROM_REGION( 0x20000, MAINCPU_TAG, 0 ) ROM_LOAD16_BYTE( "1818-4796.bin", 0x000000, 0x010000, CRC(8a7642da) SHA1(7ba12adcea85916d18b021255391bec806c32e94) ) ROM_LOAD16_BYTE( "1818-4797.bin", 0x000001, 0x010000, CRC(98129eb1) SHA1(f3451a854060f1be1bee9f17c5c198b4b1cd61ac) ) - - ROM_REGION( 0x800, IOCPU_TAG, 0 ) - ROM_LOAD( "1820-4784.bin", 0x000000, 0x000800, CRC(e929044a) SHA1(90849a10bdb8c6e38e73ce027c9c0ad8b3956b1b) ) - - ROM_REGION( 0x4000, "graphics", ROMREGION_ERASEFF | ROMREGION_BE | ROMREGION_32BIT ) - ROM_LOAD16_BYTE( "5180-0471.bin", 0x000001, 0x002000, CRC(7256af2e) SHA1(584e8d4dcae8c898c1438125dc9c4709631b32f7) ) ROM_END ROM_START( hp9k340 ) @@ -641,44 +462,41 @@ ROM_START( hp9k340 ) ROM_LOAD16_BYTE( "1818-4416.bin", 0x000000, 0x010000, CRC(cd71e85e) SHA1(3e83a80682f733417fdc3720410e45a2cfdcf869) ) ROM_LOAD16_BYTE( "1818-4417.bin", 0x000001, 0x010000, CRC(374d49db) SHA1(a12cbf6c151e2f421da4571000b5dffa3ef403b3) ) - ROM_REGION( 0x800, IOCPU_TAG, 0 ) - ROM_LOAD( "1820-4784.bin", 0x000000, 0x000800, CRC(e929044a) SHA1(90849a10bdb8c6e38e73ce027c9c0ad8b3956b1b) ) ROM_END +ROM_START( hp9k360 ) + ROM_REGION( 0x20000, MAINCPU_TAG, 0 ) + ROM_LOAD16_BYTE( "1818-4796.bin", 0x000000, 0x010000, CRC(8a7642da) SHA1(7ba12adcea85916d18b021255391bec806c32e94) ) + ROM_LOAD16_BYTE( "1818-4797.bin", 0x000001, 0x010000, CRC(98129eb1) SHA1(f3451a854060f1be1bee9f17c5c198b4b1cd61ac) ) +ROM_END + + ROM_START( hp9k370 ) ROM_REGION( 0x20000, MAINCPU_TAG, 0 ) ROM_LOAD16_BYTE( "1818-4416.bin", 0x000000, 0x010000, CRC(cd71e85e) SHA1(3e83a80682f733417fdc3720410e45a2cfdcf869) ) ROM_LOAD16_BYTE( "1818-4417.bin", 0x000001, 0x010000, CRC(374d49db) SHA1(a12cbf6c151e2f421da4571000b5dffa3ef403b3) ) - - ROM_REGION( 0x800, IOCPU_TAG, 0 ) - ROM_LOAD( "1820-4784.bin", 0x000000, 0x000800, CRC(e929044a) SHA1(90849a10bdb8c6e38e73ce027c9c0ad8b3956b1b) ) ROM_END ROM_START( hp9k380 ) ROM_REGION( 0x20000, MAINCPU_TAG, 0 ) ROM_LOAD16_WORD_SWAP( "1818-5062_98754_9000-380_27c210.bin", 0x000000, 0x020000, CRC(500a0797) SHA1(4c0a3929e45202a2689e353657e5c4b58ff9a1fd) ) - - ROM_REGION( 0x800, IOCPU_TAG, 0 ) - ROM_LOAD( "1820-4784.bin", 0x000000, 0x000800, CRC(e929044a) SHA1(90849a10bdb8c6e38e73ce027c9c0ad8b3956b1b) ) ROM_END ROM_START( hp9k382 ) ROM_REGION( 0x20000, MAINCPU_TAG, 0 ) ROM_LOAD16_WORD_SWAP( "1818-5468_27c1024.bin", 0x000000, 0x020000, CRC(d1d9ef13) SHA1(6bbb17b9adad402fbc516dc2f3143e9c38ceef8e) ) - ROM_REGION( 0x800, IOCPU_TAG, 0 ) - ROM_LOAD( "1820-4784.bin", 0x000000, 0x000800, CRC(e929044a) SHA1(90849a10bdb8c6e38e73ce027c9c0ad8b3956b1b) ) - ROM_REGION( 0x2000, "unknown", ROMREGION_ERASEFF | ROMREGION_BE | ROMREGION_32BIT ) ROM_LOAD( "1818-5282_8ce61e951207_28c64.bin", 0x000000, 0x002000, CRC(740442f3) SHA1(ab65bd4eec1024afb97fc2dd3bd3f017e90f49ae) ) ROM_END /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ -COMP( 1985, hp9k310, 0, 0, hp9k310, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/310", MACHINE_NOT_WORKING) -COMP( 1985, hp9k320, 0, 0, hp9k320, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/320", MACHINE_NOT_WORKING) -COMP( 1987, hp9k330, 0, 0, hp9k330, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/330", MACHINE_NOT_WORKING) -COMP( 1987, hp9k332, 0, 0, hp9k332, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/332", MACHINE_NOT_WORKING) -COMP( 1989, hp9k340, hp9k330, 0, hp9k340, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/340", MACHINE_NOT_WORKING) -COMP( 1988, hp9k370, hp9k330, 0, hp9k370, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/370", MACHINE_NOT_WORKING) -COMP( 1991, hp9k380, 0, 0, hp9k380, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/380", MACHINE_NOT_WORKING) -COMP( 1991, hp9k382, 0, 0, hp9k382, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/382", MACHINE_NOT_WORKING) +COMP( 1985, hp9k310, 0, 0, hp9k310, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/310", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE) +COMP( 1985, hp9k320, 0, 0, hp9k320, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/320", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE) +COMP( 1987, hp9k330, 0, 0, hp9k330, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/330", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE) +COMP( 1987, hp9k332, 0, 0, hp9k332, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/332", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE) +COMP( 1989, hp9k340, hp9k330, 0, hp9k340, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/340", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE) +COMP( 1988, hp9k360, hp9k330, 0, hp9k360, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/360", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE) +COMP( 1988, hp9k370, hp9k330, 0, hp9k370, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/370", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE) +COMP( 1991, hp9k380, 0, 0, hp9k380, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/380", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE) +COMP( 1991, hp9k382, 0, 0, hp9k382, hp9k330, hp9k3xx_state, empty_init, "Hewlett-Packard", "HP9000/382", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE) diff --git a/src/mame/drivers/hp_ipc.cpp b/src/mame/drivers/hp_ipc.cpp index c28116b37a4..a4cb3238067 100644 --- a/src/mame/drivers/hp_ipc.cpp +++ b/src/mame/drivers/hp_ipc.cpp @@ -754,10 +754,18 @@ MACHINE_CONFIG_START(hp_ipc_state::hp_ipc_base) MCFG_MM58167_IRQ_CALLBACK(WRITELINE(*this, hp_ipc_state, irq_1)) // MCFG_MM58167_STANDBY_IRQ_CALLBACK(WRITELINE(*this, hp_ipc_state, irq_6)) - MCFG_DEVICE_ADD("mlc", HP_HIL_MLC, 15.92_MHz_XTAL / 2) - MCFG_HP_HIL_INT_CALLBACK(WRITELINE(*this, hp_ipc_state, irq_2)) - MCFG_HP_HIL_NMI_CALLBACK(WRITELINE(*this, hp_ipc_state, irq_7)) - MCFG_HP_HIL_SLOT_ADD("mlc", "hil1", hp_hil_devices, "hp_ipc_kbd") + hp_hil_mlc_device &mlc(HP_HIL_MLC(config, "mlc", XTAL(15'920'000)/2)); + mlc.int_callback().set(FUNC(hp_ipc_state::irq_2)); + mlc.nmi_callback().set(FUNC(hp_ipc_state::irq_7)); + hp_hil_slot_device &keyboard(HP_HIL_SLOT(config, "hil1", 0)); + hp_hil_devices(keyboard); + keyboard.set_default_option("hp_ipc_kbd"); + keyboard.set_hp_hil_slot(this, "mlc"); + + hp_hil_slot_device &mouse(HP_HIL_SLOT(config, "hil2", 0)); + hp_hil_devices(mouse); + mouse.set_default_option("hp_46060b"); + mouse.set_hp_hil_slot(this, "mlc"); MCFG_DEVICE_ADD("hpib", TMS9914, 4_MHz_XTAL) MCFG_TMS9914_INT_WRITE_CB(WRITELINE(*this, hp_ipc_state, irq_3)) diff --git a/src/mame/drivers/i7000.cpp b/src/mame/drivers/i7000.cpp index d2e06197003..20a6a684eaa 100644 --- a/src/mame/drivers/i7000.cpp +++ b/src/mame/drivers/i7000.cpp @@ -381,10 +381,10 @@ MACHINE_CONFIG_START(i7000_state::i7000) /* Keyboard interface */ i8279_device &kbdc(I8279(config, "i8279", 4000000)); /* guessed value. TODO: verify on PCB */ - kbdc.out_sl_callback().set(FUNC(i7000_state::i7000_scanlines_w)); // scan SL lines - kbdc.in_rl_callback().set(FUNC(i7000_state::i7000_kbd_r)); // kbd RL lines - kbdc.in_shift_callback().set_constant(1); // TODO: Shift key - kbdc.in_ctrl_callback().set_constant(1); // TODO: Ctrl key + kbdc.out_sl_callback().set(FUNC(i7000_state::i7000_scanlines_w)); // scan SL lines + kbdc.in_rl_callback().set(FUNC(i7000_state::i7000_kbd_r)); // kbd RL lines + kbdc.in_shift_callback().set_constant(1); // TODO: Shift key + kbdc.in_ctrl_callback().set_constant(1); // TODO: Ctrl key /* Cartridge slot */ MCFG_GENERIC_CARTSLOT_ADD("cardslot", generic_romram_plain_slot, "i7000_card") diff --git a/src/mame/drivers/ibm6580.cpp b/src/mame/drivers/ibm6580.cpp index 1abb11bda65..092c062daca 100644 --- a/src/mame/drivers/ibm6580.cpp +++ b/src/mame/drivers/ibm6580.cpp @@ -701,10 +701,8 @@ void ibm6580_state::ibm6580_io(address_map &map) map(0x0040, 0x005f).rw(FUNC(ibm6580_state::p40_r), FUNC(ibm6580_state::p40_w)).umask16(0x00ff); map(0x0070, 0x007f).unmaprw(); map(0x0120, 0x0127).rw(m_pit8253, FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff); - map(0x0140, 0x0140).rw("upd8251a", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x0142, 0x0142).rw("upd8251a", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x0160, 0x0160).rw("upd8251b", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x0162, 0x0162).rw("upd8251b", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x0140, 0x0143).rw("upd8251a", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0x0160, 0x0163).rw("upd8251b", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0x4000, 0x400f).unmaprw(); map(0x5000, 0x500f).unmaprw(); map(0x6000, 0x601f).unmaprw(); @@ -920,16 +918,16 @@ MACHINE_CONFIG_START(ibm6580_state::ibm6580) I8257(config, m_dma8257, XTAL(14'745'600)/3); m_dma8257->out_hrq_cb().set(FUNC(ibm6580_state::hrq_w)); - m_dma8257->out_tc_cb().set(UPD765_TAG, FUNC(upd765a_device::tc_line_w)); + m_dma8257->out_tc_cb().set(m_fdc, FUNC(upd765a_device::tc_line_w)); m_dma8257->in_memr_cb().set(FUNC(ibm6580_state::memory_read_byte)); m_dma8257->out_memw_cb().set(FUNC(ibm6580_state::memory_write_byte)); - m_dma8257->in_ior_cb<0>().set(UPD765_TAG, FUNC(upd765a_device::mdma_r)); - m_dma8257->out_iow_cb<0>().set(UPD765_TAG, FUNC(upd765a_device::mdma_w)); + m_dma8257->in_ior_cb<0>().set(m_fdc, FUNC(upd765a_device::mdma_r)); + m_dma8257->out_iow_cb<0>().set(m_fdc, FUNC(upd765a_device::mdma_w)); - MCFG_UPD765A_ADD(UPD765_TAG, false, false) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, ibm6580_state, floppy_intrq)) -// MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE("pic8259", pic8259_device, ir4_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dma8257", i8257_device, dreq0_w)) + UPD765A(config, m_fdc, false, false); + m_fdc->intrq_wr_callback().set(FUNC(ibm6580_state::floppy_intrq)); +// m_fdc->intrq_wr_callback().append("pic8259", FUNC(pic8259_device::ir4_w)); + m_fdc->drq_wr_callback().set(m_dma8257, FUNC(i8257_device::dreq0_w)); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", dw_floppies, "8sssd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", dw_floppies, "8sssd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/ibmpc.cpp b/src/mame/drivers/ibmpc.cpp index 29360686561..17252e45276 100644 --- a/src/mame/drivers/ibmpc.cpp +++ b/src/mame/drivers/ibmpc.cpp @@ -467,12 +467,12 @@ ROM_START( ibm5160 ) ROM_DEFAULT_BIOS( "rev4" ) - ROM_SYSTEM_BIOS( 0, "rev1", "IBM XT 5160 08/16/82" ) /* ROM at u18 marked as BAD_DUMP for now, as current dump, while likely correct, was regenerated from a number of smaller dumps, and needs a proper redump. */ - ROMX_LOAD("5000027.u19", 0x0000, 0x8000, CRC(fc982309) SHA1(2aa781a698a21c332398d9bc8503d4f580df0a05), ROM_BIOS(0) ) - ROMX_LOAD("5000026.u18", 0x8000, 0x8000, BAD_DUMP CRC(3c9b0ac3) SHA1(271c9f4cef5029a1560075550b67c3395db09fef), ROM_BIOS(0) ) /* This is probably a good dump, and works fine, but as it was manually regenerated based on a partial dump, it needs to be reverified. It's a very rare rom revision and may have only appeared on XT prototypes. */ + ROM_SYSTEM_BIOS( 0, "rev1", "IBM XT 5160 08/16/82" ) /* This is a very rare ROM revision and may have only appeared on XT prototypes. Only 2 machines with this ROM set have been observed in the wild so far. */ + ROMX_LOAD("5000027.u19", 0x0000, 0x8000, CRC(fc982309) SHA1(2aa781a698a21c332398d9bc8503d4f580df0a05), ROM_BIOS(0) ) /* silkscreen "MK37050N-4 // 5000027 // ZA // (C) IBM 1982 // D MALAYSIA // 8248 B" - FRU: 6359116 - Alt Silkscreen (from yesterpc.com): "(M) // 5000027 // (C) 1983 IBM CORP // X E // 8425B NM"; Contents repeat 4 times */ + ROMX_LOAD("5000026.u18", 0x8000, 0x8000, CRC(3c9b0ac3) SHA1(271c9f4cef5029a1560075550b67c3395db09fef), ROM_BIOS(0) ) /* ceramic chip; silkscreen "MK38022 P-25 // 5000026 // ZA // (C) IBM 1982 // D DALLAS // 8304" */ ROM_SYSTEM_BIOS( 1, "rev2", "IBM XT 5160 11/08/82" ) /* Same as PC 5155 BIOS and PC/3270 BIOS */ - ROMX_LOAD("5000027.u19", 0x0000, 0x8000, CRC(fc982309) SHA1(2aa781a698a21c332398d9bc8503d4f580df0a05), ROM_BIOS(1) ) /* silkscreen "MK37050N-4 // 5000027" - FRU: 6359116 - Contents repeat 4 times; Alt Silkscreen (from yesterpc.com): "(M) // 5000027 // (C) 1983 IBM CORP // X E // 8425B NM"*/ + ROMX_LOAD("5000027.u19", 0x0000, 0x8000, CRC(fc982309) SHA1(2aa781a698a21c332398d9bc8503d4f580df0a05), ROM_BIOS(1) ) /* silkscreen "MK37050N-4 // 5000027 // ZA // (C) IBM 1982 // D MALAYSIA // 8248 B" - FRU: 6359116 - Alt Silkscreen (from yesterpc.com): "(M) // 5000027 // (C) 1983 IBM CORP // X E // 8425B NM"; Contents repeat 4 times */ ROMX_LOAD("1501512.u18", 0x8000, 0x8000, CRC(79522c3d) SHA1(6bac726d8d033491d52507278aa388ec04cf8b7e), ROM_BIOS(1) ) /* silkscreen "MK38036N-25 // 1501512 // ZA // (C)IBM CORP // 1981,1983 // D MALAYSIA // 8438 AP"*/ ROM_SYSTEM_BIOS( 2, "rev3", "IBM XT 5160 01/10/86" ) /* Has enhanced keyboard support and a 3.5" drive */ diff --git a/src/mame/drivers/ibmpcjr.cpp b/src/mame/drivers/ibmpcjr.cpp index 07774a1eef6..eb24d034596 100644 --- a/src/mame/drivers/ibmpcjr.cpp +++ b/src/mame/drivers/ibmpcjr.cpp @@ -20,8 +20,10 @@ #include "bus/generic/slot.h" #include "bus/isa/fdc.h" #include "bus/pc_joy/pc_joy.h" +#include "bus/rs232/hlemouse.h" #include "bus/rs232/rs232.h" -#include "bus/rs232/ser_mouse.h" +#include "bus/rs232/null_modem.h" +#include "bus/rs232/terminal.h" #include "screen.h" #include "softlist.h" @@ -512,8 +514,13 @@ static void pcjr_floppies(device_slot_interface &device) static void pcjr_com(device_slot_interface &device) { - device.option_add("microsoft_mouse", MSFT_SERIAL_MOUSE); - device.option_add("mousesys_mouse", MSYSTEM_SERIAL_MOUSE); + device.option_add("microsoft_mouse", MSFT_HLE_SERIAL_MOUSE); + device.option_add("logitech_mouse", LOGITECH_HLE_SERIAL_MOUSE); + device.option_add("wheel_mouse", WHEEL_HLE_SERIAL_MOUSE); + device.option_add("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE); + device.option_add("rotatable_mouse", ROTATABLE_HLE_SERIAL_MOUSE); + device.option_add("terminal",SERIAL_TERMINAL); + device.option_add("null_modem",NULL_MODEM); } static const gfx_layout pc_8_charlayout = @@ -604,12 +611,12 @@ MACHINE_CONFIG_START(pcjr_state::ibmpcjr) */ MCFG_DEVICE_ADD("pit8253", PIT8253, 0) MCFG_PIT8253_CLK0(XTAL(14'318'181)/12) - MCFG_PIT8253_OUT0_HANDLER(WRITELINE("pic8259", pic8259_device, ir0_w)) + MCFG_PIT8253_OUT0_HANDLER(WRITELINE(m_pic8259, pic8259_device, ir0_w)) MCFG_PIT8253_CLK1(XTAL(14'318'181)/12) MCFG_PIT8253_CLK2(XTAL(14'318'181)/12) MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, pcjr_state, out2_changed)) - MCFG_DEVICE_ADD("pic8259", PIC8259, 0) + MCFG_DEVICE_ADD(m_pic8259, PIC8259, 0) MCFG_PIC8259_OUT_INT_CB(WRITELINE(*this, pcjr_state, pic8259_set_int_line)) i8255_device &ppi(I8255(config, "ppi8255")); @@ -621,7 +628,7 @@ MACHINE_CONFIG_START(pcjr_state::ibmpcjr) uart.out_tx_callback().set("serport", FUNC(rs232_port_device::write_txd)); uart.out_dtr_callback().set("serport", FUNC(rs232_port_device::write_dtr)); uart.out_rts_callback().set("serport", FUNC(rs232_port_device::write_rts)); - uart.out_int_callback().set("pic8259", FUNC(pic8259_device::ir3_w)); + uart.out_int_callback().set(m_pic8259, FUNC(pic8259_device::ir3_w)); MCFG_DEVICE_ADD( "serport", RS232_PORT, pcjr_com, nullptr ) MCFG_RS232_RXD_HANDLER(WRITELINE("ins8250", ins8250_uart_device, rx_w)) @@ -644,8 +651,8 @@ MACHINE_CONFIG_START(pcjr_state::ibmpcjr) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80) /* printer */ - MCFG_DEVICE_ADD("lpt_0", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE("pic8259", pic8259_device, ir7_w)) + pc_lpt_device &lpt0(PC_LPT(config, "lpt_0")); + lpt0.irq_handler().set(m_pic8259, FUNC(pic8259_device::ir7_w)); MCFG_PC_JOY_ADD("pc_joy") @@ -653,7 +660,7 @@ MACHINE_CONFIG_START(pcjr_state::ibmpcjr) MCFG_CASSETTE_ADD( "cassette") MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_ENABLED) - MCFG_UPD765A_ADD("fdc", false, false) + UPD765A(config, m_fdc, false, false); MCFG_FLOPPY_DRIVE_ADD("fdc:0", pcjr_floppies, "525dd", isa8_fdc_device::floppy_formats) MCFG_SLOT_FIXED(true) diff --git a/src/mame/drivers/icebox.cpp b/src/mame/drivers/icebox.cpp index b658c38753d..b1052d290fb 100644 --- a/src/mame/drivers/icebox.cpp +++ b/src/mame/drivers/icebox.cpp @@ -169,10 +169,8 @@ void icebox_state::io_map(address_map &map) { map.global_mask(0xff); map.unmap_value_high(); - map(0xe0, 0xe0).rw(m_uart0, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xe1, 0xe1).rw(m_uart0, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xe2, 0xe2).rw(m_uart1, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xe3, 0xe3).rw(m_uart1, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xe0, 0xe1).rw(m_uart0, FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0xe2, 0xe3).rw(m_uart1, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xe4, 0xe7).lrw8("fdc_usage", [this](offs_t offset) { return m_fdc->read(offset^3); }, [this](offs_t offset, u8 data) { m_fdc->write(offset^3, data); }); diff --git a/src/mame/drivers/icecold.cpp b/src/mame/drivers/icecold.cpp index 79ba88d9ca6..85a5c3f95d6 100644 --- a/src/mame/drivers/icecold.cpp +++ b/src/mame/drivers/icecold.cpp @@ -386,10 +386,10 @@ MACHINE_CONFIG_START(icecold_state::icecold) pia2.irqb_handler().set_inputline("maincpu", M6809_IRQ_LINE); i8279_device &kbdc(I8279(config, "i8279", XTAL(6'000'000)/4)); - kbdc.out_irq_callback().set("pia0", FUNC(pia6821_device::cb1_w)); // irq - kbdc.out_sl_callback().set(FUNC(icecold_state::scanlines_w)); // scan SL lines - kbdc.out_disp_callback().set(FUNC(icecold_state::digit_w)); // display A&B - kbdc.in_rl_callback().set(FUNC(icecold_state::kbd_r)); // kbd RL lines + kbdc.out_irq_callback().set("pia0", FUNC(pia6821_device::cb1_w)); // irq + kbdc.out_sl_callback().set(FUNC(icecold_state::scanlines_w)); // scan SL lines + kbdc.out_disp_callback().set(FUNC(icecold_state::digit_w)); // display A&B + kbdc.in_rl_callback().set(FUNC(icecold_state::kbd_r)); // kbd RL lines // 30Hz signal from CH-C of ay0 MCFG_TIMER_DRIVER_ADD_PERIODIC("sint_timer", icecold_state, icecold_sint_timer, attotime::from_hz(30)) diff --git a/src/mame/drivers/idsa.cpp b/src/mame/drivers/idsa.cpp index d10be5f8c59..b73051d0867 100644 --- a/src/mame/drivers/idsa.cpp +++ b/src/mame/drivers/idsa.cpp @@ -251,9 +251,9 @@ WRITE8_MEMBER( idsa_state::ppi_control_w ) { //logerror("%s: AY1 port A = %02X\n", machine().describe_context(), data); if (!BIT(data, 2)) - m_ppi[0]->write(space, data & 0x03, m_ppi_data); + m_ppi[0]->write(data & 0x03, m_ppi_data); if (!BIT(data, 3)) - m_ppi[1]->write(space, data & 0x03, m_ppi_data); + m_ppi[1]->write(data & 0x03, m_ppi_data); } WRITE8_MEMBER( idsa_state::ppi_data_w ) diff --git a/src/mame/drivers/imds2.cpp b/src/mame/drivers/imds2.cpp index b0f44b148c7..f4ca5570f46 100644 --- a/src/mame/drivers/imds2.cpp +++ b/src/mame/drivers/imds2.cpp @@ -143,10 +143,8 @@ void imds2_state::ipc_io_map(address_map &map) map.unmap_value_low(); map(0xc0, 0xc1).rw(m_ioc, FUNC(imds2ioc_device::dbb_master_r), FUNC(imds2ioc_device::dbb_master_w)); map(0xf0, 0xf3).rw(m_ipctimer, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); - map(0xf4, 0xf4).rw(m_ipcusart[0], FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf5, 0xf5).rw(m_ipcusart[0], FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xf6, 0xf6).rw(m_ipcusart[1], FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf7, 0xf7).rw(m_ipcusart[1], FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xf4, 0xf5).rw(m_ipcusart[0], FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0xf6, 0xf7).rw(m_ipcusart[1], FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xf8, 0xf9).rw(m_ioc, FUNC(imds2ioc_device::pio_master_r), FUNC(imds2ioc_device::pio_master_w)); map(0xfa, 0xfb).rw(FUNC(imds2_state::ipclocpic_r), FUNC(imds2_state::ipclocpic_w)); map(0xfc, 0xfd).rw(FUNC(imds2_state::ipcsyspic_r), FUNC(imds2_state::ipcsyspic_w)); @@ -198,22 +196,22 @@ WRITE_LINE_MEMBER(imds2_state::ipc_intr_w) READ8_MEMBER(imds2_state::ipcsyspic_r) { - return m_ipcsyspic->read(space, !BIT(offset, 0)); + return m_ipcsyspic->read(!BIT(offset, 0)); } READ8_MEMBER(imds2_state::ipclocpic_r) { - return m_ipclocpic->read(space, !BIT(offset, 0)); + return m_ipclocpic->read(!BIT(offset, 0)); } WRITE8_MEMBER(imds2_state::ipcsyspic_w) { - m_ipcsyspic->write(space, !BIT(offset, 0), data); + m_ipcsyspic->write(!BIT(offset, 0), data); } WRITE8_MEMBER(imds2_state::ipclocpic_w) { - m_ipclocpic->write(space, !BIT(offset, 0), data); + m_ipclocpic->write(!BIT(offset, 0), data); } void imds2_state::driver_start() diff --git a/src/mame/drivers/imsai.cpp b/src/mame/drivers/imsai.cpp index d58b9ec0166..327d326ddc6 100644 --- a/src/mame/drivers/imsai.cpp +++ b/src/mame/drivers/imsai.cpp @@ -68,10 +68,8 @@ void imsai_state::imsai_io(address_map &map) map.global_mask(0xff); map(0x02, 0x02).r(FUNC(imsai_state::keyin_r)).w(m_terminal, FUNC(generic_terminal_device::write)); map(0x03, 0x03).r(FUNC(imsai_state::status_r)); - map(0x04, 0x04).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x05, 0x05).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x12, 0x12).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x13, 0x13).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x04, 0x05).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x12, 0x13).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x14, 0x14).r(FUNC(imsai_state::keyin_r)).w(m_terminal, FUNC(generic_terminal_device::write)); map(0x15, 0x15).r(FUNC(imsai_state::status_r)); map(0xf3, 0xf3).w(FUNC(imsai_state::control_w)); diff --git a/src/mame/drivers/indy_indigo2.cpp b/src/mame/drivers/indy_indigo2.cpp index b020cc494d7..5294ef68b9b 100644 --- a/src/mame/drivers/indy_indigo2.cpp +++ b/src/mame/drivers/indy_indigo2.cpp @@ -96,10 +96,10 @@ private: static void cdrom_config(device_t *device); - static const char* HAL2_TAG; - static const char* HPC3_TAG; - static const char* IOC2_TAG; - static const char* RTC_TAG; + static char const *const HAL2_TAG; + static char const *const HPC3_TAG; + static char const *const IOC2_TAG; + static char const *const RTC_TAG; required_device<mips3_device> m_maincpu; required_shared_ptr<uint32_t> m_mainram; @@ -114,10 +114,10 @@ private: inline void ATTR_PRINTF(3,4) verboselog(int n_level, const char *s_fmt, ... ); }; -/*static*/ const char* ip22_state::HAL2_TAG = "hal2"; -/*static*/ const char* ip22_state::HPC3_TAG = "hpc3"; -/*static*/ const char* ip22_state::IOC2_TAG = "ioc2"; -/*static*/ const char* ip22_state::RTC_TAG = "rtc"; +/*static*/ char const *const ip22_state::HAL2_TAG = "hal2"; +/*static*/ char const *const ip22_state::HPC3_TAG = "hpc3"; +/*static*/ char const *const ip22_state::IOC2_TAG = "ioc2"; +/*static*/ char const *const ip22_state::RTC_TAG = "rtc"; #define VERBOSE_LEVEL ( 0 ) diff --git a/src/mame/drivers/ipc.cpp b/src/mame/drivers/ipc.cpp index 339ce3e5a92..b126c30b61a 100644 --- a/src/mame/drivers/ipc.cpp +++ b/src/mame/drivers/ipc.cpp @@ -77,10 +77,8 @@ void ipc_state::ipc_io(address_map &map) map.unmap_value_high(); map.global_mask(0xff); map(0xf0, 0xf3).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)); - map(0xf4, 0xf4).rw("uart1", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf5, 0xf5).rw("uart1", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xf6, 0xf6).rw("uart2", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf7, 0xf7).rw("uart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xf4, 0xf5).rw("uart1", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0xf6, 0xf7).rw("uart2", FUNC(i8251_device::read), FUNC(i8251_device::write)); } /* Input ports */ diff --git a/src/mame/drivers/irisha.cpp b/src/mame/drivers/irisha.cpp index b468d88bd40..ed792c68df7 100644 --- a/src/mame/drivers/irisha.cpp +++ b/src/mame/drivers/irisha.cpp @@ -83,8 +83,7 @@ void irisha_state::irisha_mem(address_map &map) void irisha_state::irisha_io(address_map &map) { map(0x04, 0x05).r(FUNC(irisha_state::irisha_keyboard_r)); - map(0x06, 0x06).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x07, 0x07).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x06, 0x07).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x08, 0x0B).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0x0C, 0x0F).rw("pic8259", FUNC(pic8259_device::read), FUNC(pic8259_device::write)).mask(0x01); map(0x10, 0x13).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)); diff --git a/src/mame/drivers/is48x.cpp b/src/mame/drivers/is48x.cpp new file mode 100644 index 00000000000..8c06be7ac97 --- /dev/null +++ b/src/mame/drivers/is48x.cpp @@ -0,0 +1,70 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/*********************************************************************************************************************************** + + Skeleton driver for Decision Data IS-48x/LM-48xC IBM-compatible coax workstation displays. + +***********************************************************************************************************************************/ + +#include "emu.h" +#include "cpu/i86/i186.h" +//#include "cpu/bcp/bcp.h" +//#include "machine/eeprompar.h" +//#include "video/mc6845.h" +//#include "screen.h" + +class is48x_state : public driver_device +{ +public: + is48x_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + { } + + void is482(machine_config &config); + +private: + void mem_map(address_map &map); + void io_map(address_map &map); + + required_device<cpu_device> m_maincpu; +}; + +void is48x_state::mem_map(address_map &map) +{ + map(0x00000, 0x07fff).ram(); + map(0x40000, 0x47fff).ram(); + map(0x50000, 0x51fff).ram(); + map(0x54000, 0x55fff).ram(); + map(0x60022, 0x60022).nopr(); + map(0x61ffa, 0x61ffa).nopr(); + map(0x80000, 0xfffff).rom().region("program", 0); +} + +void is48x_state::io_map(address_map &map) +{ + map(0x8005, 0x8005).nopw(); + //map(0x8080, 0x8080).w("crtc", FUNC(mc6845_device::address_w)); + //map(0x8081, 0x8081).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); + map(0x8101, 0x8101).nopr(); + map(0x8180, 0x8180).ram(); +} + +static INPUT_PORTS_START(is482) +INPUT_PORTS_END + +void is48x_state::is482(machine_config &config) +{ + I80188(config, m_maincpu, 16_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &is48x_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &is48x_state::io_map); + + //DP8344(config, "bcp", 18.867_MHz_XTAL); +} + +ROM_START(is482) // "IS-488-A" on case + ROM_REGION(0x80000, "program", 0) + ROM_LOAD("is-482_u67_s008533243.bin", 0x00000, 0x80000, CRC(1e23ac17) SHA1(aadc73bc0454c5b1c33d440dc511009dc6b7f9e0)) +ROM_END + +COMP(199?, is482, 0, 0, is482, is482, is48x_state, empty_init, "Decision Data", "IS-482 Workstation", MACHINE_IS_SKELETON) diff --git a/src/mame/drivers/isbc.cpp b/src/mame/drivers/isbc.cpp index 052249359c8..9e738703524 100644 --- a/src/mame/drivers/isbc.cpp +++ b/src/mame/drivers/isbc.cpp @@ -135,10 +135,8 @@ void isbc_state::rpc86_io(address_map &map) map(0x00c4, 0x00c7).rw(m_pic_0, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff); map(0x00c8, 0x00cf).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0x00ff); map(0x00d0, 0x00d7).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff); - map(0x00d8, 0x00d8).rw(m_uart8251, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x00da, 0x00da).rw(m_uart8251, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x00dc, 0x00dc).rw(m_uart8251, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x00de, 0x00de).rw(m_uart8251, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x00d8, 0x00db).rw(m_uart8251, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0x00dc, 0x00df).rw(m_uart8251, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); } void isbc_state::isbc8605_io(address_map &map) @@ -169,10 +167,8 @@ void isbc_state::isbc_io(address_map &map) map(0x00c4, 0x00c7).rw(m_pic_0, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff); map(0x00c8, 0x00cf).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0x00ff); map(0x00d0, 0x00d7).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff); - map(0x00d8, 0x00d8).rw(m_uart8251, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x00da, 0x00da).rw(m_uart8251, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x00dc, 0x00dc).rw(m_uart8251, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x00de, 0x00de).rw(m_uart8251, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x00d8, 0x00db).rw(m_uart8251, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0x00dc, 0x00df).rw(m_uart8251, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); } void isbc_state::isbc286_io(address_map &map) diff --git a/src/mame/drivers/isbc8010.cpp b/src/mame/drivers/isbc8010.cpp index 5535f9bb504..21e76fd841b 100644 --- a/src/mame/drivers/isbc8010.cpp +++ b/src/mame/drivers/isbc8010.cpp @@ -106,8 +106,7 @@ void isbc8010_state::isbc8010_io(address_map &map) map.global_mask(0xff); map(0xe4, 0xe7).rw(m_ppi_0, FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0xe8, 0xeb).rw(m_ppi_1, FUNC(i8255_device::read), FUNC(i8255_device::write)); - map(0xec, 0xec).mirror(0x02).rw(m_usart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xed, 0xed).mirror(0x02).rw(m_usart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xec, 0xed).mirror(0x02).rw(m_usart, FUNC(i8251_device::read), FUNC(i8251_device::write)); //AM_RANGE(0xf0, 0xf7) MCS0 - iSBX Multimodule //AM_RANGE(0xf8, 0xff) MCS1 - iSBX Multimodule } @@ -226,11 +225,11 @@ MACHINE_CONFIG_START(isbc8010_state::isbc8010) /* Devices */ // i8279_device &kbdc(I8279(config, "i8279", 3100000)); // based on divider -// kbdc.out_irq_callback().set_inputline("maincpu", I8085_RST55_LINE); // irq -// kbdc.out_sl_callback().set(FUNC(sdk80_state::scanlines_w)); // scan SL lines -// kbdc.out_disp_callback().set(FUNC(sdk80_state::digit_w)); // display A&B -// kbdc.in_rl_callback().set(FUNC(sdk80_state::kbd_r)); // kbd RL lines -// kbdc.in_shift_callback().set_constant(1); // Shift key +// kbdc.out_irq_callback().set_inputline("maincpu", I8085_RST55_LINE); // irq +// kbdc.out_sl_callback().set(FUNC(sdk80_state::scanlines_w)); // scan SL lines +// kbdc.out_disp_callback().set(FUNC(sdk80_state::digit_w)); // display A&B +// kbdc.in_rl_callback().set(FUNC(sdk80_state::kbd_r)); // kbd RL lines +// kbdc.in_shift_callback().set_constant(1); // Shift key // kbdc.in_ctrl_callback().set_constant(1); MACHINE_CONFIG_END diff --git a/src/mame/drivers/isbc8030.cpp b/src/mame/drivers/isbc8030.cpp index 4f7cc6d2ed6..36752136c1f 100644 --- a/src/mame/drivers/isbc8030.cpp +++ b/src/mame/drivers/isbc8030.cpp @@ -79,8 +79,7 @@ void isbc8030_state::isbc8030_io(address_map &map) map(0xd8, 0xd9).rw(m_pic, FUNC(pic8259_device::read), FUNC(pic8259_device::write)); map(0xdc, 0xdf).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0xe8, 0xeb).rw(m_ppi, FUNC(i8255_device::read), FUNC(i8255_device::write)); - map(0xec, 0xec).mirror(0x02).rw(m_usart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xed, 0xed).mirror(0x02).rw(m_usart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xec, 0xed).mirror(0x02).rw(m_usart, FUNC(i8251_device::read), FUNC(i8251_device::write)); } static INPUT_PORTS_START( isbc8030 ) diff --git a/src/mame/drivers/istrebiteli.cpp b/src/mame/drivers/istrebiteli.cpp index e078cd65be8..95f9cba8ed7 100644 --- a/src/mame/drivers/istrebiteli.cpp +++ b/src/mame/drivers/istrebiteli.cpp @@ -363,19 +363,19 @@ WRITE8_MEMBER(istrebiteli_state::road_ctrl_w) READ8_MEMBER(istrebiteli_state::ppi0_r) { - return m_ppi0->read(space, offset ^ 3) ^ 0xff; + return m_ppi0->read(offset ^ 3) ^ 0xff; } WRITE8_MEMBER(istrebiteli_state::ppi0_w) { - m_ppi0->write(space, offset ^ 3, data ^ 0xff); + m_ppi0->write(offset ^ 3, data ^ 0xff); } READ8_MEMBER(istrebiteli_state::ppi1_r) { - return m_ppi1->read(space, offset ^ 3) ^ 0xff; + return m_ppi1->read(offset ^ 3) ^ 0xff; } WRITE8_MEMBER(istrebiteli_state::ppi1_w) { - m_ppi1->write(space, offset ^ 3, data ^ 0xff); + m_ppi1->write(offset ^ 3, data ^ 0xff); } WRITE8_MEMBER(istrebiteli_state::sound_w) diff --git a/src/mame/drivers/itech8.cpp b/src/mame/drivers/itech8.cpp index b36a38432ef..88d4fb7ba71 100644 --- a/src/mame/drivers/itech8.cpp +++ b/src/mame/drivers/itech8.cpp @@ -614,18 +614,33 @@ MACHINE_START_MEMBER(itech8_state,sstrike) void itech8_state::machine_start() { - if (membank("bank1")) - membank("bank1")->configure_entries(0, 2, memregion("maincpu")->base() + 0x4000, 0xc000); + if (m_mainbank) + { + if (memregion("maincpu")->bytes() > 0x10000) + { + // rimrockn uses different banking address and more banks + m_mainbank->configure_entries(0, 4, memregion("maincpu")->base() + 0x0000, 0x4000); + } + else + { + m_mainbank->configure_entries(0, 2, memregion("maincpu")->base() + 0x0000, 0x4000); + } + } + + if (m_fixed) + { + uint8_t* fixedstart = memregion("maincpu")->base() + memregion("maincpu")->bytes() - 0x8000; // last 0x8000 bytes of the ROM + m_fixed->configure_entry(0, fixedstart); + m_fixed->set_entry(0); + } m_irq_off_timer = timer_alloc(TIMER_IRQ_OFF); - m_delayed_sound_data_timer = timer_alloc(TIMER_DELAYED_SOUND_DATA); m_blitter_done_timer = timer_alloc(TIMER_BLITTER_DONE); save_item(NAME(m_grom_bank)); save_item(NAME(m_blitter_int)); save_item(NAME(m_tms34061_int)); save_item(NAME(m_periodic_int)); - save_item(NAME(m_sound_data)); save_item(NAME(m_pia_porta_data)); save_item(NAME(m_pia_portb_data)); } @@ -639,12 +654,10 @@ void grmatch_state::machine_start() void itech8_state::machine_reset() { - device_type main_cpu_type = m_maincpu->type(); - /* make sure bank 0 is selected */ - if (main_cpu_type == MC6809 || main_cpu_type == HD6309) + if (m_mainbank) { - membank("bank1")->set_entry(0); + m_mainbank->set_entry(0 ^ m_bankxor); m_maincpu->reset(); } @@ -672,9 +685,6 @@ void itech8_state::device_timer(emu_timer &timer, device_timer_id id, int param, case TIMER_BEHIND_BEAM_UPDATE: behind_the_beam_update(ptr, param); break; - case TIMER_DELAYED_SOUND_DATA: - delayed_sound_data_w(ptr, param); - break; case TIMER_BLITTER_DONE: blitter_done(ptr, param); break; @@ -721,7 +731,7 @@ WRITE8_MEMBER(itech8_state::blitter_bank_w) { /* bit 0x20 on address 7 controls CPU banking */ if (offset / 2 == 7) - membank("bank1")->set_entry((data >> 5) & 1); + m_mainbank->set_entry(((data >> 5) & 1) ^ m_bankxor); /* the rest is handled by the video hardware */ blitter_w(space, offset, data); @@ -731,7 +741,7 @@ WRITE8_MEMBER(itech8_state::blitter_bank_w) WRITE8_MEMBER(itech8_state::rimrockn_bank_w) { /* banking is controlled here instead of by the blitter output */ - membank("bank1")->set_entry(data & 3); + m_mainbank->set_entry(data & 3); } @@ -796,18 +806,6 @@ WRITE8_MEMBER(itech8_state::ym2203_portb_out) * *************************************/ -TIMER_CALLBACK_MEMBER(itech8_state::delayed_sound_data_w) -{ - m_sound_data = param; - m_soundcpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE); -} - - -WRITE8_MEMBER(itech8_state::sound_data_w) -{ - synchronize(TIMER_DELAYED_SOUND_DATA, data); -} - WRITE8_MEMBER(itech8_state::gtg2_sound_data_w) { @@ -816,14 +814,7 @@ WRITE8_MEMBER(itech8_state::gtg2_sound_data_w) ((data & 0x5d) << 1) | ((data & 0x20) >> 3) | ((data & 0x02) << 5); - synchronize(TIMER_DELAYED_SOUND_DATA, data); -} - - -READ8_MEMBER(itech8_state::sound_data_r) -{ - m_soundcpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE); - return m_sound_data; + m_soundlatch->write(space, offset, data); } @@ -840,19 +831,6 @@ WRITE8_MEMBER(itech8_state::grom_bank_w) * *************************************/ -WRITE16_MEMBER(itech8_state::grom_bank16_w) -{ - if (ACCESSING_BITS_8_15) - m_grom_bank = data >> 8; -} - - -WRITE16_MEMBER(itech8_state::display_page16_w) -{ - if (ACCESSING_BITS_8_15) - page_w(space, 0, ~data >> 8); -} - READ16_MEMBER(itech8_state::rom_constant_r) { // Ninja Clowns reads this area for program ROM checksum @@ -879,36 +857,80 @@ WRITE8_MEMBER(itech8_state::ninclown_palette_w) *************************************/ /*------ common layout with TMS34061 at 0000 ------*/ -void itech8_state::tmslo_map(address_map &map) +void itech8_state::common_lo_map(address_map &map) { map(0x0000, 0x0fff).rw(FUNC(itech8_state::tms34061_r), FUNC(itech8_state::tms34061_w)); map(0x1100, 0x1100).nopw(); - map(0x1120, 0x1120).w(FUNC(itech8_state::sound_data_w)); + map(0x1120, 0x1120).w(m_soundlatch, FUNC(generic_latch_8_device::write)); map(0x1140, 0x1140).portr("40").w(FUNC(itech8_state::grom_bank_w)); map(0x1160, 0x1160).portr("60").w(FUNC(itech8_state::page_w)); map(0x1180, 0x1180).portr("80").w(m_tms34061, FUNC(tms34061_device::latch_w)); map(0x11a0, 0x11a0).w(FUNC(itech8_state::nmi_ack_w)); - map(0x11c0, 0x11df).r(FUNC(itech8_state::blitter_r)).w(FUNC(itech8_state::blitter_bank_w)); + map(0x11c0, 0x11df).rw(FUNC(itech8_state::blitter_r), FUNC(itech8_state::blitter_bank_w)); map(0x11e0, 0x11ff).w(FUNC(itech8_state::palette_w)); map(0x2000, 0x3fff).ram().share("nvram"); - map(0x4000, 0xffff).bankr("bank1"); + map(0x4000, 0x7fff).bankr("mainbank"); + map(0x8000, 0xffff).bankr("fixed"); // non-banked area } /*------ common layout with TMS34061 at 1000 ------*/ -void itech8_state::tmshi_map(address_map &map) +void itech8_state::common_hi_map(address_map &map) { - map(0x1000, 0x1fff).rw(FUNC(itech8_state::tms34061_r), FUNC(itech8_state::tms34061_w)); map(0x0100, 0x0100).nopw(); - map(0x0120, 0x0120).w(FUNC(itech8_state::sound_data_w)); + map(0x0120, 0x0120).w(m_soundlatch, FUNC(generic_latch_8_device::write)); map(0x0140, 0x0140).portr("40").w(FUNC(itech8_state::grom_bank_w)); map(0x0160, 0x0160).portr("60").w(FUNC(itech8_state::page_w)); map(0x0180, 0x0180).portr("80").w(m_tms34061, FUNC(tms34061_device::latch_w)); map(0x01a0, 0x01a0).w(FUNC(itech8_state::nmi_ack_w)); - map(0x01c0, 0x01df).r(FUNC(itech8_state::blitter_r)).w(FUNC(itech8_state::blitter_bank_w)); + map(0x01c0, 0x01df).rw(FUNC(itech8_state::blitter_r), FUNC(itech8_state::blitter_bank_w)); map(0x01e0, 0x01ff).w(FUNC(itech8_state::palette_w)); + map(0x1000, 0x1fff).rw(FUNC(itech8_state::tms34061_r), FUNC(itech8_state::tms34061_w)); map(0x2000, 0x3fff).ram().share("nvram"); - map(0x4000, 0xffff).bankr("bank1"); + map(0x4000, 0x7fff).bankr("mainbank"); + map(0x8000, 0xffff).bankr("fixed"); // non-banked area +} + + +/*------ Grudge Match layout ------*/ +void grmatch_state::grmatch_map(address_map &map) +{ + itech8_state::common_hi_map(map); + map(0x0160, 0x0160).w(FUNC(grmatch_state::palette_w)); + map(0x0180, 0x0180).w(FUNC(grmatch_state::xscroll_w)); + map(0x01e0, 0x01ff).nopw(); +} + + +/*------ Slick Shot layout ------*/ +void itech8_state::slikshot_map(address_map &map) +{ + common_hi_map(map); + map(0x0180, 0x0180).r(FUNC(itech8_state::slikshot_z80_r)); + map(0x01cf, 0x01cf).rw(FUNC(itech8_state::slikshot_z80_control_r), FUNC(itech8_state::slikshot_z80_control_w)); +} + + +/*------ Super Strike Bowling layout ------*/ +void itech8_state::sstrike_map(address_map &map) +{ + common_lo_map(map); + map(0x1180, 0x1180).r(FUNC(itech8_state::slikshot_z80_r)); + map(0x11cf, 0x11cf).rw(FUNC(itech8_state::slikshot_z80_control_r), FUNC(itech8_state::slikshot_z80_control_w)); +} + + +/*------ Rim Rockin' Basketball layout ------*/ +void itech8_state::rimrockn_map(address_map &map) +{ + common_hi_map(map); + map(0x0161, 0x0161).portr("161"); + map(0x0162, 0x0162).portr("162"); + map(0x0163, 0x0163).portr("163"); + map(0x0164, 0x0164).portr("164"); + map(0x0165, 0x0165).portr("165"); + map(0x01a0, 0x01a0).w(FUNC(itech8_state::rimrockn_bank_w)); + map(0x01c0, 0x01df).w(FUNC(itech8_state::blitter_w)); } @@ -920,12 +942,13 @@ void itech8_state::gtg2_map(address_map &map) map(0x0140, 0x015f).w(FUNC(itech8_state::palette_w)); map(0x0140, 0x0140).portr("80"); map(0x0160, 0x0160).w(FUNC(itech8_state::grom_bank_w)); - map(0x0180, 0x019f).r(FUNC(itech8_state::blitter_r)).w(FUNC(itech8_state::blitter_bank_w)); + map(0x0180, 0x019f).rw(FUNC(itech8_state::blitter_r), FUNC(itech8_state::blitter_bank_w)); map(0x01c0, 0x01c0).w(FUNC(itech8_state::gtg2_sound_data_w)); map(0x01e0, 0x01e0).w(m_tms34061, FUNC(tms34061_device::latch_w)); map(0x1000, 0x1fff).rw(FUNC(itech8_state::tms34061_r), FUNC(itech8_state::tms34061_w)); map(0x2000, 0x3fff).ram().share("nvram"); - map(0x4000, 0xffff).bankr("bank1"); + map(0x4000, 0x7fff).bankr("mainbank"); + map(0x8000, 0xffff).bankr("fixed"); // non-banked area } /*------ Ninja Clowns layout ------*/ @@ -935,9 +958,11 @@ void itech8_state::ninclown_map(address_map &map) map(0x000080, 0x003fff).ram().share("nvram"); map(0x004000, 0x03ffff).rom(); map(0x040000, 0x07ffff).r(FUNC(itech8_state::rom_constant_r)); - map(0x100080, 0x100080).w(FUNC(itech8_state::sound_data_w)); - map(0x100100, 0x100101).portr("40").w(FUNC(itech8_state::grom_bank16_w)); - map(0x100180, 0x100181).portr("60").w(FUNC(itech8_state::display_page16_w)); + map(0x100080, 0x100080).w(m_soundlatch, FUNC(generic_latch_8_device::write)); + map(0x100100, 0x100100).w(FUNC(itech8_state::grom_bank_w)); + map(0x100100, 0x100101).portr("40"); + map(0x100180, 0x100180).lw8("page_inv_w", [this](u8 data){ page_w(~data); } ); + map(0x100180, 0x100181).portr("60"); map(0x100240, 0x100240).w(m_tms34061, FUNC(tms34061_device::latch_w)); map(0x100280, 0x100281).portr("80").nopw(); map(0x100300, 0x10031f).rw(FUNC(itech8_state::blitter_r), FUNC(itech8_state::blitter_w)); @@ -957,7 +982,7 @@ void itech8_state::ninclown_map(address_map &map) void itech8_state::sound2203_map(address_map &map) { map(0x0000, 0x0000).nopw(); - map(0x1000, 0x1000).r(FUNC(itech8_state::sound_data_r)); + map(0x1000, 0x1000).r(m_soundlatch, FUNC(generic_latch_8_device::read)); map(0x2000, 0x2001).mirror(0x0002).rw("ymsnd", FUNC(ym2203_device::read), FUNC(ym2203_device::write)); map(0x3000, 0x37ff).ram(); map(0x4000, 0x4000).rw("oki", FUNC(okim6295_device::read), FUNC(okim6295_device::write)); @@ -969,7 +994,7 @@ void itech8_state::sound2203_map(address_map &map) void itech8_state::sound2608b_map(address_map &map) { map(0x1000, 0x1000).nopw(); - map(0x2000, 0x2000).r(FUNC(itech8_state::sound_data_r)); + map(0x2000, 0x2000).r(m_soundlatch, FUNC(generic_latch_8_device::read)); map(0x4000, 0x4003).rw("ymsnd", FUNC(ym2608_device::read), FUNC(ym2608_device::write)); map(0x6000, 0x67ff).ram(); map(0x8000, 0xffff).rom(); @@ -980,7 +1005,7 @@ void itech8_state::sound2608b_map(address_map &map) void itech8_state::sound3812_map(address_map &map) { map(0x0000, 0x0000).nopw(); - map(0x1000, 0x1000).r(FUNC(itech8_state::sound_data_r)); + map(0x1000, 0x1000).r(m_soundlatch, FUNC(generic_latch_8_device::read)); map(0x2000, 0x2001).rw("ymsnd", FUNC(ym3812_device::read), FUNC(ym3812_device::write)); map(0x3000, 0x37ff).ram(); map(0x4000, 0x4000).rw("oki", FUNC(okim6295_device::read), FUNC(okim6295_device::write)); @@ -993,7 +1018,7 @@ void itech8_state::sound3812_map(address_map &map) void itech8_state::sound3812_external_map(address_map &map) { map(0x0000, 0x0000).nopw(); - map(0x1000, 0x1000).r(FUNC(itech8_state::sound_data_r)); + map(0x1000, 0x1000).r(m_soundlatch, FUNC(generic_latch_8_device::read)); map(0x2000, 0x2001).rw("ymsnd", FUNC(ym3812_device::read), FUNC(ym3812_device::write)); map(0x3000, 0x37ff).ram(); map(0x4000, 0x4000).rw("oki", FUNC(okim6295_device::read), FUNC(okim6295_device::write)); @@ -1718,6 +1743,9 @@ void itech8_state::itech8_core_devices(machine_config &config) SPEAKER(config, "mono").front_center(); + GENERIC_LATCH_8(config, m_soundlatch, 0); + m_soundlatch->data_pending_callback().set_inputline(m_soundcpu, M6809_IRQ_LINE); + via6522_device &via(VIA6522(config, "via6522_0", CLOCK_8MHz/4)); via.writepb_handler().set(FUNC(itech8_state::pia_portb_out)); via.irq_handler().set_inputline(m_soundcpu, M6809_FIRQ_LINE); @@ -1726,7 +1754,7 @@ void itech8_state::itech8_core_devices(machine_config &config) void itech8_state::itech8_core_lo(machine_config &config) { MC6809(config, m_maincpu, CLOCK_8MHz); - m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::tmslo_map); + m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::common_lo_map); itech8_core_devices(config); } @@ -1734,7 +1762,7 @@ void itech8_state::itech8_core_lo(machine_config &config) void itech8_state::itech8_core_hi(machine_config &config) { itech8_core_lo(config); - m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::tmshi_map); + m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::common_hi_map); } void itech8_state::itech8_sound_ym2203(machine_config &config) @@ -1821,6 +1849,8 @@ void grmatch_state::grmatch(machine_config &config) itech8_core_hi(config); itech8_sound_ym2608b(config); + m_maincpu->set_addrmap(AS_PROGRAM, &grmatch_state::grmatch_map); + m_screen->set_visarea(0, 399, 0, 239); m_screen->set_screen_update(FUNC(grmatch_state::screen_update)); } @@ -1848,6 +1878,8 @@ void itech8_state::slikshot_hi(machine_config &config) itech8_core_hi(config); itech8_sound_ym2203(config); + m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::slikshot_map); + Z80(config, m_subcpu, CLOCK_8MHz/2); m_subcpu->set_addrmap(AS_PROGRAM, &itech8_state::slikz80_mem_map); m_subcpu->set_addrmap(AS_IO, &itech8_state::slikz80_io_map); @@ -1862,6 +1894,8 @@ void itech8_state::slikshot_lo(machine_config &config) itech8_core_lo(config); itech8_sound_ym2203(config); + m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::sstrike_map); + Z80(config, m_subcpu, CLOCK_8MHz/2); m_subcpu->set_addrmap(AS_PROGRAM, &itech8_state::slikz80_mem_map); m_subcpu->set_addrmap(AS_IO, &itech8_state::slikz80_io_map); @@ -1910,7 +1944,7 @@ void itech8_state::rimrockn(machine_config &config) itech8_sound_ym3812_external(config); HD6309(config, m_maincpu, CLOCK_12MHz); - m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::tmshi_map); + m_maincpu->set_addrmap(AS_PROGRAM, &itech8_state::rimrockn_map); m_screen->set_visarea(24, 375, 0, 239); m_screen->set_screen_update(FUNC(itech8_state::screen_update_2page_large)); @@ -1948,10 +1982,8 @@ void itech8_state::gtg2(machine_config &config) *************************************/ ROM_START( wfortune ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "wofpgm", 0x04000, 0x4000, CRC(bd984654) SHA1(8e16d2feb26e9a6f86c4a36bf0f03db80ded03f6) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "wofpgm", 0x00000, 0x10000, CRC(bd984654) SHA1(8e16d2feb26e9a6f86c4a36bf0f03db80ded03f6) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "wofsnd", 0x08000, 0x8000, CRC(0a6aa5dc) SHA1(42eef40a4300d6d16d9e2af678432a02be05f104) ) @@ -1968,10 +2000,8 @@ ROM_END ROM_START( wfortunea ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "wofpgmr1.bin", 0x04000, 0x4000, CRC(c3d3eb21) SHA1(21137663afd19fba875e188640f0347fc8c5dcf0) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "wofpgmr1.bin", 0x00000, 0x10000, CRC(c3d3eb21) SHA1(21137663afd19fba875e188640f0347fc8c5dcf0) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "wofsnd", 0x08000, 0x8000, CRC(0a6aa5dc) SHA1(42eef40a4300d6d16d9e2af678432a02be05f104) ) @@ -1988,10 +2018,8 @@ ROM_END ROM_START( grmatch ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "grudgematch.u5", 0x04000, 0x4000, CRC(11cadec9) SHA1(e21df623d1311ea63bafa2d6d0d94eb7d13232da) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "grudgematch.u5", 0x00000, 0x10000, CRC(11cadec9) SHA1(e21df623d1311ea63bafa2d6d0d94eb7d13232da) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "grudgematch.u27", 0x08000, 0x8000, CRC(59c18e63) SHA1(0d00c9cc683ff17e3213ba343ae65d533b57a243) ) @@ -2011,9 +2039,8 @@ ROM_END ROM_START( stratab ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "sb_prog_v3_u5.u5", 0x08000, 0x8000, CRC(a5ae728f) SHA1(85098eef1614d5148e8082df4c936883662292ee) ) /* Labeled as SB PROG V3 (U5) */ - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x8000, "maincpu", 0 ) + ROM_LOAD( "sb_prog_v3_u5.u5", 0x00000, 0x8000, CRC(a5ae728f) SHA1(85098eef1614d5148e8082df4c936883662292ee) ) /* Labeled as SB PROG V3 (U5) */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sb_snds_u27.u27", 0x08000, 0x8000, CRC(b36c8f0a) SHA1(c4c3edf3352d95561f76705087338c1946137447) ) /* Labeled as SB SNDS (U27) */ @@ -2029,9 +2056,8 @@ ROM_END ROM_START( stratab1 ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "sb_prog_v1_u5.u5", 0x08000, 0x8000, CRC(46d51604) SHA1(de7b6306fdcee4907b07667baf874bd195822e6a) ) /* Labeled as SB PROG V1 (U5) */ - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x8000, "maincpu", 0 ) + ROM_LOAD( "sb_prog_v1_u5.u5", 0x00000, 0x8000, CRC(46d51604) SHA1(de7b6306fdcee4907b07667baf874bd195822e6a) ) /* Labeled as SB PROG V1 (U5) */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sb_snds_u27.u27", 0x08000, 0x8000, CRC(b36c8f0a) SHA1(c4c3edf3352d95561f76705087338c1946137447) ) /* Labeled as SB SNDS (U27) */ @@ -2047,10 +2073,8 @@ ROM_END ROM_START( gtg ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtg_joy_3.3_u5.u5", 0x04000, 0x4000, CRC(983a5c0c) SHA1(245fd6b86e96ef57ea9a85c7a501d846e135cfc6) ) /* Joystick version - Labeled GTG JOY V3.3 (U5) */ - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x08000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtg_joy_3.3_u5.u5", 0x00000, 0x10000, CRC(983a5c0c) SHA1(245fd6b86e96ef57ea9a85c7a501d846e135cfc6) ) /* Joystick version - Labeled GTG JOY V3.3 (U5) */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "u27.bin", 0x08000, 0x8000, CRC(358d2440) SHA1(7b09350c89f9d2c86dc187d8812bbf26b576a38f) ) @@ -2069,10 +2093,8 @@ ROM_END ROM_START( gtgj31 ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtg_joy_3.1_u5.u5", 0x04000, 0x4000, CRC(61984272) SHA1(be735f8576fb2cccc0e9e6ea6f2fd54b6c0b3bb3) ) /* Joystick version - Labeled GTG JOY V3.1 (U5) */ - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x08000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtg_joy_3.1_u5.u5", 0x00000, 0x10000, CRC(61984272) SHA1(be735f8576fb2cccc0e9e6ea6f2fd54b6c0b3bb3) ) /* Joystick version - Labeled GTG JOY V3.1 (U5) */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "u27.bin", 0x08000, 0x8000, CRC(358d2440) SHA1(7b09350c89f9d2c86dc187d8812bbf26b576a38f) ) @@ -2091,10 +2113,8 @@ ROM_END ROM_START( gtgt ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtg.bin_2.0.u5", 0x4000, 0x4000, CRC(4c907166) SHA1(338a599645fa49c9fcbfbe5ba3431dafffddacc7) ) /* Trackball version */ - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtg.bin_2.0.u5", 0x0000, 0x10000, CRC(4c907166) SHA1(338a599645fa49c9fcbfbe5ba3431dafffddacc7) ) /* Trackball version */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "golf-snd.u27", 0x08000, 0x8000, CRC(f6a7429b) SHA1(0fb378606c12c3543aa1ff603101e262acb9c692) ) @@ -2113,10 +2133,8 @@ ROM_END ROM_START( gtgt1 ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtg.bin_1.0.u5", 0x04000, 0x4000, CRC(ec70b510) SHA1(318984d77eb1df6258b855781ae1c9a09aa74f15) ) /* Trackball version */ - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtg.bin_1.0.u5", 0x00000, 0x10000, CRC(ec70b510) SHA1(318984d77eb1df6258b855781ae1c9a09aa74f15) ) /* Trackball version */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "snd-u27.256", 0x08000, 0x8000, CRC(471da557) SHA1(32bfe450a42d9eb6c14edcfa2b4e33f65a11126e) ) @@ -2135,11 +2153,8 @@ ROM_END ROM_START( gtg2t ) - /* banks are loaded in the opposite order from the others, */ - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtgii_tb_v1.1.u5", 0x10000, 0x4000, CRC(c7b3a9f3) SHA1(5edaca6fd6ee58bd1676dc9b2c86da4dd2f51687) ) /* Trackball version - labeled GTGII TB V1.1 (U5) */ - ROM_CONTINUE( 0x04000, 0xc000 ) - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtgii_tb_v1.1.u5", 0x00000, 0x10000, CRC(c7b3a9f3) SHA1(5edaca6fd6ee58bd1676dc9b2c86da4dd2f51687) ) /* Trackball version - labeled GTGII TB V1.1 (U5) */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "gtgii_snd_v1_u27.u27", 0x08000, 0x8000, CRC(dd2a5905) SHA1(dc93f13de3953852a6757361eb9683a57d3ed326) ) /* labeled GTGII SND V1 (U27) */ @@ -2161,10 +2176,8 @@ ROM_END ROM_START( gtg2j ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtg2.bin_1.0.u5", 0x04000, 0x4000, CRC(9c95ceaa) SHA1(d9fd2b2419c026822a07d2ba51d6ab40b7cd0d49) ) /* Joystick version */ - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtg2.bin_1.0.u5", 0x00000, 0x10000, CRC(9c95ceaa) SHA1(d9fd2b2419c026822a07d2ba51d6ab40b7cd0d49) ) /* Joystick version */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "gtgii_snd_v1_u27.u27", 0x08000, 0x8000, CRC(dd2a5905) SHA1(dc93f13de3953852a6757361eb9683a57d3ed326) ) /* labeled GTGII SND V1 (U27) */ @@ -2186,10 +2199,8 @@ ROM_END ROM_START( slikshot ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "poolpgm-20.u5", 0x04000, 0x4000, CRC(370a00eb) SHA1(b2878f161f4931d9fc3979a84b29660941e2608f) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "poolpgm-20.u5", 0x00000, 0x10000, CRC(370a00eb) SHA1(b2878f161f4931d9fc3979a84b29660941e2608f) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "u27.bin", 0x08000, 0x8000, CRC(a96ce0f7) SHA1(c1fec3aeef97c846fd1a20b91af54f6bf9723a71) ) @@ -2210,10 +2221,8 @@ ROM_END ROM_START( slikshot17 ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "poolpgm-17.u5", 0x04000, 0x4000, CRC(09d70554) SHA1(a009cd3b22261c60f1028694baef51f61713154f) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "poolpgm-17.u5", 0x00000, 0x10000, CRC(09d70554) SHA1(a009cd3b22261c60f1028694baef51f61713154f) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "u27.bin", 0x08000, 0x8000, CRC(a96ce0f7) SHA1(c1fec3aeef97c846fd1a20b91af54f6bf9723a71) ) @@ -2234,10 +2243,8 @@ ROM_END ROM_START( slikshot16 ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "poolpgm-16.u5", 0x04000, 0x4000, CRC(c0f17012) SHA1(5d466e058daf91b4f52e634498df9d2a03627aaa) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "poolpgm-16.u5", 0x00000, 0x10000, CRC(c0f17012) SHA1(5d466e058daf91b4f52e634498df9d2a03627aaa) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "u27.bin", 0x08000, 0x8000, CRC(a96ce0f7) SHA1(c1fec3aeef97c846fd1a20b91af54f6bf9723a71) ) @@ -2260,10 +2267,8 @@ ROM_END ROM_START( dynobop ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "dyno_pgm_1.1_u5.u5", 0x04000, 0x4000, CRC(98452c40) SHA1(9b9316fc258792e0d825f16e0fadf8e0c35a864e) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x08000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "dyno_pgm_1.1_u5.u5", 0x00000, 0x10000, CRC(98452c40) SHA1(9b9316fc258792e0d825f16e0fadf8e0c35a864e) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "dyno_snd-u27.u27", 0x08000, 0x8000, CRC(a37d862b) SHA1(922eeae184df2c5c28040da27699dd55744f8dca) ) @@ -2284,9 +2289,8 @@ ROM_END ROM_START( sstrike ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "sstrik_prg-v1_u5.u5", 0x08000, 0x8000, CRC(af00cddf) SHA1(b866e8dfce1449f7462a79efa385ea6b55cdc6e7) ) /* labeled SSTRIKE PRG-V1(U5) */ - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x8000, "maincpu", 0 ) + ROM_LOAD( "sstrik_prg-v1_u5.u5", 0x00000, 0x8000, CRC(af00cddf) SHA1(b866e8dfce1449f7462a79efa385ea6b55cdc6e7) ) /* labeled SSTRIKE PRG-V1(U5) */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sstrik_snd1.4_u27.u27", 0x08000, 0x8000, CRC(efab7252) SHA1(eb3b2002531e551e3d67958ea3cc56a69fa660e2) ) /* labeled SSTRIKE SND1.4(U27) */ @@ -2308,9 +2312,8 @@ ROM_END ROM_START( stratabs ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "sb_prog-v4t.u5", 0x08000, 0x8000, CRC(38ddae75) SHA1(71a9cbd36cf7b180a88bab3ab92a4dff93ce365f) ) - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x8000, "maincpu", 0 ) + ROM_LOAD( "sb_prog-v4t.u5", 0x00000, 0x8000, CRC(38ddae75) SHA1(71a9cbd36cf7b180a88bab3ab92a4dff93ce365f) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sb_snds_1.4.u27", 0x08000, 0x8000, CRC(526ef093) SHA1(884f9149b3d5eb33e47258e466ad9cd9ce5ffddb) ) @@ -2332,10 +2335,8 @@ ROM_END ROM_START( pokrdice ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "pd-v17.u5", 0x04000, 0x4000, CRC(5e24be82) SHA1(97e50cc023ff651fb09cc5e85a1bef1bc234ccb9) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "pd-v17.u5", 0x00000, 0x10000, CRC(5e24be82) SHA1(97e50cc023ff651fb09cc5e85a1bef1bc234ccb9) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "pd-snd.bin", 0x08000, 0x8000, CRC(4925401c) SHA1(e35983bec4a0dd4cb1d942fd909790b1adeb415d) ) @@ -2350,10 +2351,8 @@ ROM_END ROM_START( hstennis ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "tenbim.v11", 0x04000, 0x4000, CRC(faffab5c) SHA1(4de525f6adb16205c47788b78aecdebd57008295) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "tenbim.v11", 0x00000, 0x10000, CRC(faffab5c) SHA1(4de525f6adb16205c47788b78aecdebd57008295) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "tensnd.v1", 0x08000, 0x8000, CRC(f034a694) SHA1(3540e2edff2ce47504260ec856bab9b638d9260d) ) @@ -2374,10 +2373,8 @@ ROM_END ROM_START( hstennis10 ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "tenbim.v10", 0x04000, 0x4000, CRC(d108a6e0) SHA1(1041e1d95b10245fc50f6484e710803db2706f9a) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "tenbim.v10", 0x00000, 0x10000, CRC(d108a6e0) SHA1(1041e1d95b10245fc50f6484e710803db2706f9a) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "tensnd.v1", 0x08000, 0x8000, CRC(f034a694) SHA1(3540e2edff2ce47504260ec856bab9b638d9260d) ) @@ -2398,10 +2395,8 @@ ROM_END ROM_START( arlingtn ) /* PCB p/n 1030 rev. 1A */ - ROM_REGION( 0x1c000, "maincpu", 0 ) /* banks are loaded in the opposite order from the others, */ - ROM_LOAD( "ahr-d_v_1.21.u5", 0x10000, 0x4000, CRC(00aae02e) SHA1(3bcfbd256c34ae222dde24ba9544f19da70b698e) ) /* Service menu reports version as 1.21-D */ - ROM_CONTINUE( 0x04000, 0xc000 ) - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "ahr-d_v_1.21.u5", 0x00000, 0x10000, CRC(00aae02e) SHA1(3bcfbd256c34ae222dde24ba9544f19da70b698e) ) /* Service menu reports version as 1.21-D */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "ahr_snd_v1.1.u27", 0x08000, 0x8000, CRC(dec57dca) SHA1(21a8ead10b0434629f41f6b067c49b6622569a6c) ) @@ -2418,10 +2413,8 @@ ROM_END ROM_START( peggle ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "j-stick.u5", 0x04000, 0x4000, CRC(140d5a9c) SHA1(841e5f45c6f306d9bd286e7d3e3c75b169c932e1) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "j-stick.u5", 0x00000, 0x10000, CRC(140d5a9c) SHA1(841e5f45c6f306d9bd286e7d3e3c75b169c932e1) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sound.u27", 0x08000, 0x8000, CRC(b99beb70) SHA1(8d82c3b081a1afb236afa658abb3aa605c6c2264) ) @@ -2437,10 +2430,8 @@ ROM_END ROM_START( pegglet ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "trakball.u5", 0x04000, 0x4000, CRC(d2694868) SHA1(9945a308550c9d89a647d80257e3ab14f793ac6f) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "trakball.u5", 0x00000, 0x10000, CRC(d2694868) SHA1(9945a308550c9d89a647d80257e3ab14f793ac6f) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sound.u27", 0x08000, 0x8000, CRC(b99beb70) SHA1(8d82c3b081a1afb236afa658abb3aa605c6c2264) ) @@ -2456,11 +2447,8 @@ ROM_END ROM_START( neckneck ) - /* banks are loaded in the opposite order from the others, */ - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "nn_prg12.u5", 0x04000, 0x4000, CRC(8e51734a) SHA1(c184af73670235a9245bfdeec2b58acfe93170e3) ) - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "nn_prg12.u5", 0x00000, 0x10000, CRC(8e51734a) SHA1(c184af73670235a9245bfdeec2b58acfe93170e3) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "nn_snd10.u27", 0x08000, 0x8000, CRC(74771b2f) SHA1(0a963d2962699bb1b4d08bd486979151d0a228da) ) @@ -2477,15 +2465,8 @@ ROM_END ROM_START( rimrockn ) - ROM_REGION( 0x34000, "maincpu", 0 ) - ROM_LOAD( "rrb.bin_2.2.u5", 0x04000, 0x4000, CRC(97777683) SHA1(0998dde26daaa2d2b78e83647e03ba01b0ef31f2) ) - ROM_CONTINUE( 0x10000, 0x4000 ) - ROM_CONTINUE( 0x1c000, 0x4000 ) - ROM_CONTINUE( 0x28000, 0xc000 ) - ROM_CONTINUE( 0x2c000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x08000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x14000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x20000, 0x8000 ) + ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_LOAD( "rrb.bin_2.2.u5", 0x00000, 0x20000, CRC(97777683) SHA1(0998dde26daaa2d2b78e83647e03ba01b0ef31f2) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "rrbsndv11.u27", 0x08000, 0x8000, CRC(59f87f0e) SHA1(46f38aca35a7c2faee227b4c950d20a6076c6fa7) ) /* Labeled as RRBSND V1.1 U27 */ @@ -2507,15 +2488,8 @@ ROM_END ROM_START( rimrockn20 ) - ROM_REGION( 0x34000, "maincpu", 0 ) - ROM_LOAD( "rrb.bin_2.0.u5", 0x04000, 0x4000, CRC(7e9d5545) SHA1(2aa028b3f5d05bec4ee289e7d39eaad30b3d4d5f) ) - ROM_CONTINUE( 0x10000, 0x4000 ) - ROM_CONTINUE( 0x1c000, 0x4000 ) - ROM_CONTINUE( 0x28000, 0xc000 ) - ROM_CONTINUE( 0x2c000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x08000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x14000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x20000, 0x8000 ) + ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_LOAD( "rrb.bin_2.0.u5", 0x00000, 0x20000, CRC(7e9d5545) SHA1(2aa028b3f5d05bec4ee289e7d39eaad30b3d4d5f) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "rrbsndv11.u27", 0x08000, 0x8000, CRC(59f87f0e) SHA1(46f38aca35a7c2faee227b4c950d20a6076c6fa7) ) /* Labeled as RRBSND V1.1 U27 */ @@ -2532,15 +2506,8 @@ ROM_END ROM_START( rimrockn16 ) - ROM_REGION( 0x34000, "maincpu", 0 ) - ROM_LOAD( "rrb.bin_1.6.u5",0x04000, 0x4000, CRC(999cd502) SHA1(8ad0d641a9f853eff27be1d4de04ab86b9275d57) ) - ROM_CONTINUE( 0x10000, 0x4000 ) - ROM_CONTINUE( 0x1c000, 0x4000 ) - ROM_CONTINUE( 0x28000, 0xc000 ) - ROM_CONTINUE( 0x2c000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x08000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x14000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x20000, 0x8000 ) + ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_LOAD( "rrb.bin_1.6.u5",0x00000, 0x20000, CRC(999cd502) SHA1(8ad0d641a9f853eff27be1d4de04ab86b9275d57) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "rrbsndv11.u27", 0x08000, 0x8000, CRC(59f87f0e) SHA1(46f38aca35a7c2faee227b4c950d20a6076c6fa7) ) /* Labeled as RRBSND V1.1 U27 */ @@ -2557,15 +2524,8 @@ ROM_END ROM_START( rimrockn12 ) - ROM_REGION( 0x34000, "maincpu", 0 ) - ROM_LOAD( "rrb.bin_1.2.u5",0x04000, 0x4000, CRC(661761a6) SHA1(7224b1eac2fd0969d70657448ab241a433143df4) ) - ROM_CONTINUE( 0x10000, 0x4000 ) - ROM_CONTINUE( 0x1c000, 0x4000 ) - ROM_CONTINUE( 0x28000, 0xc000 ) - ROM_CONTINUE( 0x2c000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x08000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x14000, 0x8000 ) - ROM_COPY( "maincpu", 0x2c000, 0x20000, 0x8000 ) + ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_LOAD( "rrb.bin_1.2.u5",0x00000, 0x20000, CRC(661761a6) SHA1(7224b1eac2fd0969d70657448ab241a433143df4) ) ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "rrbsndv1.u27", 0x08000, 0x8000, CRC(8eda5f53) SHA1(f256544a8c87125587719460ed0fef14efef9015) ) @@ -2581,6 +2541,34 @@ ROM_START( rimrockn12 ) ROM_END +ROM_START( rimrockn12b ) + ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_LOAD( "rbba-1.u5", 0x00000, 0x20000, CRC(f99561a8) SHA1(ee59b934839ef5599bb393e0860d54c95f6df1b0) ) // ZX2880JL + + ROM_REGION( 0x10000, "soundcpu", 0 ) + ROM_LOAD( "rrbsndv1.u27", 0x08000, 0x8000, CRC(8eda5f53) SHA1(f256544a8c87125587719460ed0fef14efef9015) ) // Found on a double-sized ROM (27C512) with its first half empty + + ROM_REGION( 0x100000, "grom", 0 ) + ROM_LOAD( "rbb-grom00", 0x00000, 0x40000, CRC(3eacbad9) SHA1(bff1ec6a24ccf983434e4e9453c30f36fa397534) ) + ROM_LOAD( "rbb-grom01", 0x40000, 0x40000, CRC(864cc269) SHA1(06f92889cd20881faeb59ec06ca1578ead2294f4) ) + ROM_LOAD( "rbb-grom02", 0x80000, 0x40000, CRC(34e567d5) SHA1(d0eb6fd0da8b9c3bfe7d4ecfb4bd903e4926b63a) ) + ROM_LOAD( "rbb-grom03", 0xc0000, 0x40000, CRC(fd18045d) SHA1(a1b98e4a2aa6f3cd33a3e2f5744160e05cc9f8d1) ) + + ROM_REGION( 0x40000, "oki", 0 ) + ROM_LOAD( "rbb-srom0", 0x00000, 0x40000, CRC(7ad42be0) SHA1(c9b519bad3c5c9a3315d1bf3292cc30ee0771db7) ) + + /* Unused */ + ROM_REGION( 0x0096b, "plds", 0 ) + ROM_LOAD( "a-palce16v8h.u53", 0x00000, 0x00117, NO_DUMP ) // Undumped (solderded) + ROM_LOAD( "a-palce16v8q.u45", 0x00117, 0x00117, NO_DUMP ) // Undumped (solderded) + ROM_LOAD( "a-palce16v8h.u14", 0x0022e, 0x00117, NO_DUMP ) // Undumped (solderded) + ROM_LOAD( "a-gal22v10.u55", 0x00345, 0x002e1, NO_DUMP ) // Undumped (solderded) + ROM_LOAD( "a-palce16v8h.u65", 0x00626, 0x00117, NO_DUMP ) // Undumped (solderded) + ROM_LOAD( "a-palce16v8h.u50", 0x0073d, 0x00117, NO_DUMP ) // Undumped (solderded) + ROM_LOAD( "b-palce16v8h.u29", 0x00854, 0x00117, NO_DUMP ) // Undumped (solderded) +ROM_END + + ROM_START( ninclown ) ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD16_BYTE( "prog1", 0x00000, 0x20000, CRC(fabfdcd2) SHA1(7a9852838cf7772d8f8f956b03823c4222520a5a) ) @@ -2603,10 +2591,8 @@ ROM_END ROM_START( gpgolf ) - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gpgv1_1.bin", 0x04000, 0x4000, CRC(631e77e0) SHA1(847ba1e00d31441620a2a1f45a9aa58df84bde8b) ) /* Joystick version */ - ROM_CONTINUE( 0x10000, 0xc000 ) - ROM_COPY( "maincpu", 0x14000, 0x8000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gpgv1_1.bin", 0x00000, 0x10000, CRC(631e77e0) SHA1(847ba1e00d31441620a2a1f45a9aa58df84bde8b) ) /* Joystick version */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sndv1.u27", 0x08000, 0x8000, CRC(55734876) SHA1(eb5ef816acbc6e35642749e38a2908b7ba359b9d) ) @@ -2622,11 +2608,8 @@ ROM_END ROM_START( gtg2 ) - /* banks are loaded in the opposite order from the others, */ - ROM_REGION( 0x1c000, "maincpu", 0 ) - ROM_LOAD( "gtg2_v2_2.u5", 0x10000, 0x4000, CRC(4a61580f) SHA1(7c64648d47418fbcc0f9b5bd91f88856209bc0f5) ) /* Trackball version */ - ROM_CONTINUE( 0x04000, 0xc000 ) - ROM_COPY( "maincpu", 0x8000, 0x14000, 0x8000 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "gtg2_v2_2.u5", 0x00000, 0x10000, CRC(4a61580f) SHA1(7c64648d47418fbcc0f9b5bd91f88856209bc0f5) ) /* Trackball version */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "sndv1.u27", 0x08000, 0x8000, CRC(55734876) SHA1(eb5ef816acbc6e35642749e38a2908b7ba359b9d) ) @@ -2654,12 +2637,13 @@ ROM_END * *************************************/ -void grmatch_state::driver_init() +void itech8_state::init_invbank() { - m_maincpu->space(AS_PROGRAM).install_write_handler(0x0160, 0x0160, write8_delegate(FUNC(grmatch_state::palette_w),this)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x0180, 0x0180, write8_delegate(FUNC(grmatch_state::xscroll_w),this)); - m_maincpu->space(AS_PROGRAM).unmap_write(0x01e0, 0x01ff); + m_bankxor = 1; +} +void grmatch_state::driver_init() +{ save_item(NAME(m_palcontrol)); save_item(NAME(m_xscroll)); save_item(NAME(m_palette)); @@ -2668,10 +2652,6 @@ void grmatch_state::driver_init() void itech8_state::init_slikshot() { - m_maincpu->space(AS_PROGRAM).install_read_handler (0x0180, 0x0180, read8_delegate(FUNC(itech8_state::slikshot_z80_r),this)); - m_maincpu->space(AS_PROGRAM).install_read_handler (0x01cf, 0x01cf, read8_delegate(FUNC(itech8_state::slikshot_z80_control_r),this)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x01cf, 0x01cf, write8_delegate(FUNC(itech8_state::slikshot_z80_control_w),this)); - m_delayed_z80_control_timer = timer_alloc(TIMER_DELAYED_Z80_CONTROL); save_item(NAME(m_z80_ctrl)); @@ -2693,14 +2673,6 @@ void itech8_state::init_slikshot() } -void itech8_state::init_sstrike() -{ - m_maincpu->space(AS_PROGRAM).install_read_handler (0x1180, 0x1180, read8_delegate(FUNC(itech8_state::slikshot_z80_r),this)); - m_maincpu->space(AS_PROGRAM).install_read_handler (0x11cf, 0x11cf, read8_delegate(FUNC(itech8_state::slikshot_z80_control_r),this)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x11cf, 0x11cf, write8_delegate(FUNC(itech8_state::slikshot_z80_control_w),this)); -} - - void itech8_state::init_hstennis() { m_visarea.set(0, 375, 0, 239); @@ -2709,6 +2681,7 @@ void itech8_state::init_hstennis() void itech8_state::init_arligntn() { + init_invbank(); m_visarea.set(16, 389, 0, 239); } @@ -2724,24 +2697,6 @@ void itech8_state::init_neckneck() m_visarea.set(8, 375, 0, 239); } - -void itech8_state::init_rimrockn() -{ - /* additional input ports */ - m_maincpu->space(AS_PROGRAM).install_read_port (0x0161, 0x0161, "161"); - m_maincpu->space(AS_PROGRAM).install_read_port (0x0162, 0x0162, "162"); - m_maincpu->space(AS_PROGRAM).install_read_port (0x0163, 0x0163, "163"); - m_maincpu->space(AS_PROGRAM).install_read_port (0x0164, 0x0164, "164"); - m_maincpu->space(AS_PROGRAM).install_read_port (0x0165, 0x0165, "165"); - - /* different banking mechanism (disable the old one) */ - membank("bank1")->configure_entries(0, 4, memregion("maincpu")->base() + 0x4000, 0xc000); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x01a0, 0x01a0, write8_delegate(FUNC(itech8_state::rimrockn_bank_w),this)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x01c0, 0x01df, write8_delegate(FUNC(itech8_state::blitter_w),this)); -} - - - /************************************* * * Game drivers @@ -2749,48 +2704,49 @@ void itech8_state::init_rimrockn() *************************************/ /* Wheel of Fortune-style PCB */ -GAME( 1989, wfortune, 0, wfortune, wfortune, itech8_state, empty_init, ROT0, "GameTek", "Wheel Of Fortune (set 1)", 0 ) -GAME( 1989, wfortunea, wfortune, wfortune, wfortune, itech8_state, empty_init, ROT0, "GameTek", "Wheel Of Fortune (set 2)", 0 ) +GAME( 1989, wfortune, 0, wfortune, wfortune, itech8_state, empty_init, ROT0, "GameTek", "Wheel Of Fortune (set 1)", 0 ) +GAME( 1989, wfortunea, wfortune, wfortune, wfortune, itech8_state, empty_init, ROT0, "GameTek", "Wheel Of Fortune (set 2)", 0 ) /* Grudge Match-style PCB */ -GAME( 1989, grmatch, 0, grmatch, grmatch, grmatch_state, empty_init, ROT0, "Yankee Game Technology", "Grudge Match (Yankee Game Technology)", 0 ) +GAME( 1989, grmatch, 0, grmatch, grmatch, grmatch_state, empty_init, ROT0, "Yankee Game Technology", "Grudge Match (Yankee Game Technology)", 0 ) /* Strata Bowling-style PCB */ -GAME( 1990, stratab, 0, stratab_hi, stratab, itech8_state, empty_init, ROT270, "Strata/Incredible Technologies", "Strata Bowling (V3)", 0 ) // still says V1 in service mode? -GAME( 1990, stratab1, stratab, stratab_hi, stratab, itech8_state, empty_init, ROT270, "Strata/Incredible Technologies", "Strata Bowling (V1)", 0 ) -GAME( 1990, gtg, 0, stratab_hi, gtg, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Joystick, v3.3)", 0 ) -GAME( 1990, gtgj31, gtg, stratab_hi, gtg, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Joystick, v3.1)", 0 ) -GAME( 1989, gtgt, gtg, stratab_hi, gtgt, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Trackball, v2.0)", 0 ) -GAME( 1989, gtgt1, gtg, stratab_hi, gtgt, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Trackball, v1.0)", 0 ) -GAME( 1989, gtg2t, gtg2, stratab_hi, gtg2t, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf II (Trackball, V1.1)", 0 ) -GAME( 1991, gtg2j, gtg2, stratab_lo, gtg, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf II (Joystick, V1.0)", 0 ) +GAME( 1990, stratab, 0, stratab_hi, stratab, itech8_state, empty_init, ROT270, "Strata/Incredible Technologies", "Strata Bowling (V3)", 0 ) // still says V1 in service mode? +GAME( 1990, stratab1, stratab, stratab_hi, stratab, itech8_state, empty_init, ROT270, "Strata/Incredible Technologies", "Strata Bowling (V1)", 0 ) +GAME( 1990, gtg, 0, stratab_hi, gtg, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Joystick, v3.3)", 0 ) +GAME( 1990, gtgj31, gtg, stratab_hi, gtg, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Joystick, v3.1)", 0 ) +GAME( 1989, gtgt, gtg, stratab_hi, gtgt, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Trackball, v2.0)", 0 ) +GAME( 1989, gtgt1, gtg, stratab_hi, gtgt, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf (Trackball, v1.0)", 0 ) +GAME( 1989, gtg2t, gtg2, stratab_hi, gtg2t, itech8_state, init_invbank, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf II (Trackball, V1.1)", 0 ) +GAME( 1991, gtg2j, gtg2, stratab_lo, gtg, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf II (Joystick, V1.0)", 0 ) /* Slick Shot-style PCB */ -GAME( 1990, slikshot, 0, slikshot_hi, slikshot, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Slick Shot (V2.2)", MACHINE_MECHANICAL ) -GAME( 1990, slikshot17, slikshot, slikshot_hi, slikshot, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Slick Shot (V1.7)", MACHINE_MECHANICAL ) -GAME( 1990, slikshot16, slikshot, slikshot_hi, slikshot, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Slick Shot (V1.6)", MACHINE_MECHANICAL ) -GAME( 1990, dynobop, 0, slikshot_hi, dynobop, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Dyno Bop (V1.1)", MACHINE_MECHANICAL ) -GAME( 1990, sstrike, 0, sstrike, sstrike, itech8_state, init_sstrike, ROT270, "Strata/Incredible Technologies", "Super Strike Bowling (V1)", MACHINE_MECHANICAL ) -GAME( 1990, stratabs, stratab, sstrike, stratabs, itech8_state, init_sstrike, ROT270, "Strata/Incredible Technologies", "Strata Bowling (V1 4T, Super Strike Bowling type PCB)", MACHINE_NOT_WORKING ) // need to figure out the control hookup for this set, service mode indicates it's still a trackball like stratab -GAME( 1991, pokrdice, 0, slikshot_lo_noz80, pokrdice, itech8_state, empty_init, ROT90, "Strata/Incredible Technologies", "Poker Dice", 0 ) +GAME( 1990, slikshot, 0, slikshot_hi, slikshot, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Slick Shot (V2.2)", MACHINE_MECHANICAL ) +GAME( 1990, slikshot17, slikshot, slikshot_hi, slikshot, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Slick Shot (V1.7)", MACHINE_MECHANICAL ) +GAME( 1990, slikshot16, slikshot, slikshot_hi, slikshot, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Slick Shot (V1.6)", MACHINE_MECHANICAL ) +GAME( 1990, dynobop, 0, slikshot_hi, dynobop, itech8_state, init_slikshot, ROT90, "Grand Products/Incredible Technologies", "Dyno Bop (V1.1)", MACHINE_MECHANICAL ) +GAME( 1990, sstrike, 0, sstrike, sstrike, itech8_state, empty_init, ROT270, "Strata/Incredible Technologies", "Super Strike Bowling (V1)", MACHINE_MECHANICAL ) +GAME( 1990, stratabs, stratab, sstrike, stratabs, itech8_state, empty_init, ROT270, "Strata/Incredible Technologies", "Strata Bowling (V1 4T, Super Strike Bowling type PCB)", MACHINE_NOT_WORKING ) // need to figure out the control hookup for this set, service mode indicates it's still a trackball like stratab +GAME( 1991, pokrdice, 0, slikshot_lo_noz80, pokrdice, itech8_state, empty_init, ROT90, "Strata/Incredible Technologies", "Poker Dice", 0 ) /* Hot Shots Tennis-style PCB */ -GAME( 1990, hstennis, 0, hstennis_hi, hstennis, itech8_state, init_hstennis, ROT90, "Strata/Incredible Technologies", "Hot Shots Tennis (V1.1)", 0 ) -GAME( 1990, hstennis10, hstennis, hstennis_hi, hstennis, itech8_state, init_hstennis, ROT90, "Strata/Incredible Technologies", "Hot Shots Tennis (V1.0)", 0 ) -GAME( 1991, arlingtn, 0, hstennis_hi, arlingtn, itech8_state, init_arligntn, ROT0, "Strata/Incredible Technologies", "Arlington Horse Racing (v1.21-D)", 0 ) -GAME( 1991, peggle, 0, hstennis_lo, peggle, itech8_state, init_peggle, ROT90, "Strata/Incredible Technologies", "Peggle (Joystick, v1.0)", 0 ) -GAME( 1991, pegglet, peggle, hstennis_lo, pegglet, itech8_state, init_peggle, ROT90, "Strata/Incredible Technologies", "Peggle (Trackball, v1.0)", 0 ) -GAME( 1992, neckneck, 0, hstennis_lo, neckneck, itech8_state, init_neckneck, ROT0, "Bundra Games/Incredible Technologies", "Neck-n-Neck (v1.2)", 0 ) +GAME( 1990, hstennis, 0, hstennis_hi, hstennis, itech8_state, init_hstennis, ROT90, "Strata/Incredible Technologies", "Hot Shots Tennis (V1.1)", 0 ) +GAME( 1990, hstennis10, hstennis, hstennis_hi, hstennis, itech8_state, init_hstennis, ROT90, "Strata/Incredible Technologies", "Hot Shots Tennis (V1.0)", 0 ) +GAME( 1991, arlingtn, 0, hstennis_hi, arlingtn, itech8_state, init_arligntn, ROT0, "Strata/Incredible Technologies", "Arlington Horse Racing (v1.21-D)", 0 ) +GAME( 1991, peggle, 0, hstennis_lo, peggle, itech8_state, init_peggle, ROT90, "Strata/Incredible Technologies", "Peggle (Joystick, v1.0)", 0 ) +GAME( 1991, pegglet, peggle, hstennis_lo, pegglet, itech8_state, init_peggle, ROT90, "Strata/Incredible Technologies", "Peggle (Trackball, v1.0)", 0 ) +GAME( 1992, neckneck, 0, hstennis_lo, neckneck, itech8_state, init_neckneck, ROT0, "Bundra Games/Incredible Technologies", "Neck-n-Neck (v1.2)", 0 ) /* Rim Rockin' Basketball-style PCB */ -GAME( 1991, rimrockn, 0, rimrockn, rimrockn, itech8_state, init_rimrockn, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V2.2)", 0 ) -GAME( 1991, rimrockn20, rimrockn, rimrockn, rimrockn, itech8_state, init_rimrockn, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V2.0)", 0 ) -GAME( 1991, rimrockn16, rimrockn, rimrockn, rimrockn, itech8_state, init_rimrockn, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V1.6)", 0 ) -GAME( 1991, rimrockn12, rimrockn, rimrockn, rimrockn, itech8_state, init_rimrockn, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V1.2)", 0 ) +GAME( 1991, rimrockn, 0, rimrockn, rimrockn, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V2.2)", 0 ) +GAME( 1991, rimrockn20, rimrockn, rimrockn, rimrockn, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V2.0)", 0 ) +GAME( 1991, rimrockn16, rimrockn, rimrockn, rimrockn, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V1.6)", 0 ) +GAME( 1991, rimrockn12, rimrockn, rimrockn, rimrockn, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Rim Rockin' Basketball (V1.2)", 0 ) +GAME( 1991, rimrockn12b, rimrockn, rimrockn, rimrockn, itech8_state, empty_init, ROT0, "bootleg", "Rim Rockin' Basketball (V1.2, bootleg)", 0 ) /* Ninja Clowns-style PCB */ -GAME( 1991, ninclown, 0, ninclown, ninclown, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Ninja Clowns (27 oct 91)", 0 ) +GAME( 1991, ninclown, 0, ninclown, ninclown, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Ninja Clowns (27 oct 91)", 0 ) /* Golden Tee Golf II-style PCB */ -GAME( 1992, gpgolf, 0, gtg2, gpgolf, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Par Golf (Joystick, V1.1)", 0 ) -GAME( 1992, gtg2, 0, gtg2, gtg2, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf II (Trackball, V2.2)", 0 ) +GAME( 1992, gpgolf, 0, gtg2, gpgolf, itech8_state, empty_init, ROT0, "Strata/Incredible Technologies", "Golden Par Golf (Joystick, V1.1)", 0 ) +GAME( 1992, gtg2, 0, gtg2, gtg2, itech8_state, init_invbank, ROT0, "Strata/Incredible Technologies", "Golden Tee Golf II (Trackball, V2.2)", 0 ) diff --git a/src/mame/drivers/itgamble.cpp b/src/mame/drivers/itgamble.cpp index 12b225a8237..c2638354246 100644 --- a/src/mame/drivers/itgamble.cpp +++ b/src/mame/drivers/itgamble.cpp @@ -16,35 +16,104 @@ --- Hardware Notes --- - The hardware is normally composed by: - - - CPU: 1x H8/3048 (HD64F3048F16). - (128KB ROM; 4KB RAM) - - Sound: 1x AD-65 (OKI 6295) - 1x TDA2003 (audio amplifier). - - PLDs: 1x ispLSI2064-80LJ. - - Clock: 1x Xtal 30.000 MHz. - 1x Resonator ZTB1000J (1000 kHz) or similar. - - ROMs: 1x (up to) 27C2001 or similar (sound). - 2x or more 27C4001 or similar (graphics). - - Timekeeping: 1x Dallas DS1302 Trickle Charge Timekeeping Chip (optional). - - Connectors: 1x 28x2 edge connector. - 1x 12 legs connector. - 1x 24 legs female connector. - 1x 50 legs flat cable connector. - - Other: 1x battery. - 2x 12 DIP switches. - 2x trimmer. - - +There are at least 4 variants for this hardware. +The first 3 share the same layout, the latest is a complete redesign. + +--------- +The oldest revision (green) is marked "H83048" with the following hardware: +(note that @IC2 is unpopulated) + CPU: + 1x H8/3048 (HD64F3048F16) @IC1 + (128KB ROM; 4KB RAM) + Sound: + 1x OKI 6295 or clones @IC24 + 1x LM358N dual operational amplifier @IC27 + 1x TDA2003 audio amplifier @IC26 + PLDs: + 1x ispLSI2064-80LJ @IC12 + Clock: + 1x Xtal 30.000 MHz @OSC1 + 1x Resonator ZTB1000J (1000 kHz) @X1 + ROMs: + 1x 27C010 or 27C020 (sound) @IC25 + 2x or 4x 27C040 (graphics) @IC17,18,19,20 + RAMs: + 2x SRAM 32k x 8 @IC13,14 + Connectors: + 1x 28x2 edge connector + 1x 12 legs connector @CN1 + 1x 50 legs flat cable connector @CN4 + Other: + 1x battery @BAT1 + 1x 12 DIP switches bank @CN2,3 + 2x trimmer (VOLUME, SPARK) @P1,2 + +Known games on this hardware revision are: +200x Book Theatre (ver 1.2) +2000.04.12 Capitan Uncino (Ver 1.2) +2001.02 Capitani Coraggiosi (Ver 1.3) + +--------- +A slightly newer revision (green) is marked "H83048" and adds a very small piggyback @IC2 with: + Timekeeping: 1x Dallas DS1302 Trickle Charge Timekeeping Chip + Clock: 1x Xtal 32.768 + A jumper cable connects the piggyback with ICL7673 pin2 @IC31 Automatic battery back-up switch + +Known games on this hardware revision are: +200x Pin Ups (Ver 1.0 Rev.A) +200x Venezia (Ver 1.0 Rev.A) +2001 Bowling Road (Ver 1.5) - note: SRAMs are 8k x 8 instead of 32k x 8 +2001 Europa 2002 (Ver 2.0, set 1) +2001 Europa 2002 (Ver 2.0, set 2) +2001 World Cup (Ver 1.5) - note: SRAMs are 8k x 8 instead of 32k x 8 +2001.06 Labyrinth (Versione 1.5) +2001.11 La Perla Nera Gold (Ver 2.0) +2002.01 La Perla Nera (Ver 2.0) + + +--------- +A more recent revision (red) is marked "H83048 Rev 1.1" and removes the piggyback putting Timekeeping and Clock (X2) directly on the board. + A jumper cable on the solder side connects Timekeeping pin5 to unpopulated IC2 pin11 +Known games on this hardware revision are: +2001.08 Labyrinth (Versione 1.5) +2001.08.24 Abacus (Ver 1.0) +2001.11 Bowling Road (Ver 1.4) - note: SRAMs are 8k x 8 instead of 32k x 8 +2002 Europa 2002 Space (Ver 3.0) +2002.12 UFO Robot (Ver 1.0 Rev.A) + + +--------- +A complete redesign (green) is marked "ND 2001 Rev 1.0" and uses smaller factor SMDs instead of traditional DIP components. + CPU: + 1x H8/3048 (HD64F3048F16) @IC17 + (128KB ROM; 4KB RAM) + Sound: + 1x OKI 6295 or clones @IC15 + 1x LM358N dual operational amplifier @IC13 + 1x TDA2003 audio amplifier @IC8 + PLDs: + 1x ispLSI2064-80LJ @IC24 + Clock: + 1x Xtal 30.000 MHz @OSC1 + 1x Resonator ZTB1000J (1000 kHz) @X1 + 1x Xtal K0SoF @X2 + ROMs: + 1x 27C010 (sound) @IC1 + 2x 27C040 (graphics) @IC7,8 + RAMs: + 2x SRAM 32k x 8 @IC25,26 + Connectors: + 1x 28x2 edge connector + 1x 12 legs connector @CN2 + Other: + 1x battery @BAT1 + 2x trimmer (VOLUME, SPARK) @P1,2 + +Known games on this hardware revision are: +2001.11 Bowling Road (Ver 1.4) +2001.12 World Cup (Ver 1.4) + + *******************************************************************/ #include "emu.h" @@ -266,36 +335,30 @@ MACHINE_CONFIG_END * Rom Load * *************************/ -/* Capitan Uncino (Ver 1.2) - -CPU: - -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x AD-65 (equivalent to M6295) (ic24)(sound) -1x oscillator 30.00MHz (close to main) -1x blu resonator 1000J (close to sound) - -ROMs: - -1x M27C2001 (1) -2x M27C4001 (2,3) - -Note: +/* Book Theatre (ver 1.2) +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "BOOK THEATER Vers. 1.2" on component side +*/ +ROM_START( bookthr ) + ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ + ROM_LOAD( "bookthr_ver1.2_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x 12x2 jumpers -1x trimmer (volume) -1x trimmer (spark) + ROM_REGION( 0x100000, "gfx1", 0 ) //bigger than 8bpps? + ROM_LOAD( "2.ic18", 0x000000, 0x80000, CRC(39433a74) SHA1(088944bfb43b4f239f22d0d2213efd19cea7db30) ) + ROM_LOAD( "3.ic17", 0x080000, 0x80000, CRC(893abdcc) SHA1(4dd28fd46bec8be5549d679d31c771888fcb1286) ) --------------------- + ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ + ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) //same as Abacus +ROM_END +/* Capitan Uncino (Ver 1.2) +PCB is marked: "CE H83048" on component side +PCB is marked: "ET5" and "H83048 bottom" on solder side +PCB is labeled: "Capitan Uncino Vers. 1.3" and " PASSED 12/04/00" on component side +-- PCB is labeled Ver 1.3, while EPROMs are labeled Ver 1.2 - */ - ROM_START( capunc ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ ROM_LOAD( "capunc.ver1.2.mcu", 0x00000, 0x4000, NO_DUMP ) @@ -308,42 +371,11 @@ ROM_START( capunc ) ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) ROM_END - /* Capitani Coraggiosi (Ver 1.3) - -CPU: - -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x AD-65 (equivalent to M6295) (ic24)(sound) -1x oscillator 30MHz (close to main) -1x orange resonator ZTB1000J (close to sound) - -ROMs: - -1x M27C2001 (1) -2x M27C4001 (2,3) - -Note: - -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x 12x2 switches dip -1x trimmer (volume) -1x trimmer (spark) - - -The differences between this set and the alternate one, are only 4 bytes -in the samples ROM header. Replaced the sound ROM with the clean one. - -3 and 3 files -2.ic18 2.ic18 IDENTICAL -3.ic17 3.ic17 IDENTICAL -1.ic25 1.ic25 99.998474% - +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "Capitani Coraggiosi Vers. 1.3" and "PASSED 02/2001" on component side */ - ROM_START( capcor ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ ROM_LOAD( "capcor.ver1.3.mcu", 0x00000, 0x4000, NO_DUMP ) @@ -356,120 +388,11 @@ ROM_START( capcor ) ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) ROM_END - -/* La Perla Nera (Ver 2.0) - -CPU: - -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x AD-65 (equivalent to M6295) (ic24)(sound) -1x oscillator 30.00MHz (close to main) -1x red resonator ZTB1000J (close to sound) - -ROMs: - -1x M27C2001 (1) -2x M27C4001 (2,3) - -Note: - -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x 12x2 jumper -1x trimmer (volume) -1x trimmer (spark) - -*/ - -ROM_START( laperla ) - ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ - ROM_LOAD( "laperla_ver2.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) - - ROM_REGION( 0x100000, "gfx1", 0 ) - ROM_LOAD( "2jolly.ic18", 0x000000, 0x80000, CRC(7bf3d5f2) SHA1(f3a51dd642358a20f6324f28fdf458e8ceaca7a1) ) - ROM_LOAD( "3jolly.ic17", 0x080000, 0x80000, CRC(c3a8d9a0) SHA1(cc95c56ebc6137e11c82ed17be7c9f83ed7b6cfc) ) - - ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ - ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) -ROM_END - - -/* La Perla Nera Gold (Ver 2.0) - -CPU: - -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x AD-65 (equivalent to M6295) (ic24)(sound) -1x oscillator 30.00MHz (close to main) -1x red resonator ZTB1000J (close to sound) - -ROMs: - -1x M27C2001 (1) -2x M27C4001 (2,3) - -Note: - -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x 12x2 jumper -1x trimmer (volume) -1x trimmer (spark) - ---------------------------------------------- - -laperla vs. laperlag - -3 and 3 files -3jolly.ic17 ic17-laperlanera 11.018181% -2jolly.ic18 ic18-laperlanera 10.766602% -1.ic25 NO MATCH - ic25-uno.bin NO MATCH -*/ - -ROM_START( laperlag ) - ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ - ROM_LOAD( "laperlag_ver2.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) - - ROM_REGION( 0x100000, "gfx1", 0 ) - ROM_LOAD( "ic18-laperlaneragold2.bin", 0x000000, 0x80000, CRC(ae37de44) SHA1(089f97678fa39aee1885d7c63c4bc7c88e7fe553) ) - ROM_LOAD( "ic17-laperlaneragold3.bin", 0x080000, 0x80000, CRC(86da6d11) SHA1(e6b7f9ccbf2e91a60fdf38067ec7ac7e73dea8cd) ) - - ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ - ROM_LOAD( "ic25-uno.bin", 0x00000, 0x20000, CRC(e6a0854b) SHA1(394e01bb24abd1e0d2c447b4d620fc5d02257d8a) ) -ROM_END - - /* Europa 2002 (Ver 2.0, set 1) - -CPU: - -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x AD-65 (equivalent to M6295) (ic24)(sound) -1x oscillator 30MHz (close to main) -1x blu resonator 1000J (close to sound) - -ROMs: - -3x M27C2001 (1,2,3) -2x M27C4001 (4,5) - -Note: - -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x 12x2 switches dip -1x trimmer (volume) -1x trimmer (spark) - +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "EUROPA 2002 Versione 2_0" and "Non rimuovere PASSED 11/2001 Garanzia 6 MESI" on component side */ - ROM_START( euro2k2 ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ ROM_LOAD( "euro2k2_ver2.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) @@ -484,47 +407,11 @@ ROM_START( euro2k2 ) ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(b9b1aff0) SHA1(35622d7d099a10e5c6bcae152fded1f50692f740) ) ROM_END - /* Europa 2002 (Ver 2.0, set 2) - -CPU: - -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x U6295 (equivalent to M6295) (ic24)(sound) -1x oscillator 30.00MHz (close to main) -1x orange resonator ZTB1000J (close to sound) - -ROMs: - -2x M27C2001 (1,2) -3x M27C4001 (3,4,5) - -Note: - -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x 12x2 switches dip -1x trimmer (volume) -1x trimmer (spark) - ---------------------------------------- - -euro2k2 vs. euro2k2a - -5 and 5 files -4a.ic18 FIXED BITS (xxxxxxx0) - 3a.ic19 1ST AND 2ND HALF IDENTICAL - 4a.ic18 FIXED BITS (xxxxxxx0) -2a.ic20 2a.ic20 IDENTICAL -4a.ic18 4a.ic18 IDENTICAL -5a.ic17 5a.ic17 IDENTICAL -1.ic25 1.ic25 99.998474% -3a.ic19 NO MATCH - 3a.ic19 NO MATCH +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "EUROPA 2002 Versione 2_0" and "PASSED 10/2001" on component side */ - ROM_START( euro2k2a ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ ROM_LOAD( "euro2k2a_ver2.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) @@ -539,80 +426,85 @@ ROM_START( euro2k2a ) ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) // sldh ROM_END +/* La Perla Nera (Ver 2.0) +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "LA PERLA NERA Versione 2.0" and "Non Rimuovere PASSED 01/2002 garanzia 6 MESI" on component side +*/ +ROM_START( laperla ) + ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ + ROM_LOAD( "laperla_ver2.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) + + ROM_REGION( 0x100000, "gfx1", 0 ) + ROM_LOAD( "2jolly.ic18", 0x000000, 0x80000, CRC(7bf3d5f2) SHA1(f3a51dd642358a20f6324f28fdf458e8ceaca7a1) ) + ROM_LOAD( "3jolly.ic17", 0x080000, 0x80000, CRC(c3a8d9a0) SHA1(cc95c56ebc6137e11c82ed17be7c9f83ed7b6cfc) ) -/* Europa 2002 Space (Ver 3.0) + ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ + ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) +ROM_END -Year: 2002 -Company: Nazionale Elettronica -CPU: +/* La Perla Nera Gold (Ver 2.0) +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "LA PERLA NERA GOLD Versione 2.0" and "Non Rimuovere PASSED 11/2001 garanzia 6 MESI" on component side +*/ +ROM_START( laperlag ) + ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ + ROM_LOAD( "laperlag_ver2.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) -1x HD64F3048F16 (main)(ic1) -1x ispLSI2064-80LJ (ic12) -1x U6295 (equivalent to M6295) (ic24)(sound) -1x TDA2003 (sound)(ic26) -1x LM358N (sound)(ic27) -1x oscillator 30MHz (close to main)(osc1) -1x blue resonator (close to sound) (x1) + ROM_REGION( 0x100000, "gfx1", 0 ) + ROM_LOAD( "ic18-laperlaneragold2.bin", 0x000000, 0x80000, CRC(ae37de44) SHA1(089f97678fa39aee1885d7c63c4bc7c88e7fe553) ) + ROM_LOAD( "ic17-laperlaneragold3.bin", 0x080000, 0x80000, CRC(86da6d11) SHA1(e6b7f9ccbf2e91a60fdf38067ec7ac7e73dea8cd) ) -ROMs: + ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ + ROM_LOAD( "ic25-uno.bin", 0x00000, 0x20000, CRC(e6a0854b) SHA1(394e01bb24abd1e0d2c447b4d620fc5d02257d8a) ) +ROM_END -1x MX27C1000 (1) -2x M27C2001 (2,3) -2x M27C4001 (4,5) +/* World Cup (Ver 1.5) +PCB is marked: "CE H83048" on component side +PCB is marked: "H83048 bottom" on solder side +PCB is labeled: "WORLD CUP Versione 1.5" on component side +--- +It is the same game as World Cup (Ver 1.4) but with less RAM +*/ +ROM_START( wcup ) + ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ + ROM_LOAD( "wcup_ver1.5_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) -Note: + ROM_REGION( 0x100000, "gfx1", 0 ) //bigger than 8bpps? + ROM_LOAD( "world cup 2.ic18", 0x000000, 0x80000, CRC(4524445b) SHA1(50ec31ac9e4cd807fd4bf3d667644ed662681782) ) + ROM_LOAD( "world cup 3.ic17", 0x080000, 0x80000, CRC(0df1af40) SHA1(f5050533e5a9cf2113e5aeffaeca23c7572cafae) ) -1x 28x2 edge connector -1x 12 legs connector -1x 50 legs flat cable connector -1x trimmer (volume) -1x trimmer (spark) + ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ + ROM_LOAD( "1.ic25", 0x00000, 0x20000, CRC(e6a0854b) SHA1(394e01bb24abd1e0d2c447b4d620fc5d02257d8a) ) // same as laperlag +ROM_END +/* World Cup (Ver 1.4) +PCB is marked: "CE ND2001" on component side +PCB is marked: "ND2001 Rev. 1.0" and "bottom" on solder side +PCB is labeled: "WORLD CUP Versione 1.4" and "Non Rimuovere PASSED 12/2001 Garanzia 6 MESI" on component side +--- +It is the same game as World Cup (Ver 1.5) but ICs location are numbered differently due to a different PCB layout */ -ROM_START( euro2k2s ) +ROM_START( wcup14 ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ - ROM_LOAD( "euro2k2s_ver3.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) + ROM_LOAD( "wcup_ver1.4_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) - ROM_REGION( 0x180000, "gfx1", 0 ) - ROM_LOAD( "europa2002space4.ic18", 0x000000, 0x80000, CRC(cf4db4f1) SHA1(6c03e54e30eb83778d1cad5ade17c26a370ea8a3) ) - ROM_LOAD( "europa2002space5.ic17", 0x080000, 0x80000, CRC(1070b4ac) SHA1(3492de52cd0c784479d2774f6050b24cf4591484) ) - ROM_LOAD( "europa2002_2-a.ic20", 0x100000, 0x40000, CRC(971bc33b) SHA1(c385e5bef57cdb52a86c1e38fca471ef5ab3da7c) ) - ROM_LOAD( "europa2002space3.ic19", 0x140000, 0x40000, CRC(d82dba04) SHA1(63d407dd036d3c7f190ad7b6d694288e9a9e56d0) ) /* identical halves */ + ROM_REGION( 0x100000, "gfx1", 0 ) //bigger than 8bpps? + ROM_LOAD( "world cup 2.ic18", 0x000000, 0x80000, CRC(4524445b) SHA1(50ec31ac9e4cd807fd4bf3d667644ed662681782) ) + ROM_LOAD( "world cup 3.ic17", 0x080000, 0x80000, CRC(0df1af40) SHA1(f5050533e5a9cf2113e5aeffaeca23c7572cafae) ) ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ - ROM_LOAD( "1-a.ic25", 0x00000, 0x20000, CRC(8fcb283d) SHA1(9e95c72967da13606eed6d16f84145273b9ffddf) ) + ROM_LOAD( "1.ic25", 0x00000, 0x20000, CRC(e6a0854b) SHA1(394e01bb24abd1e0d2c447b4d620fc5d02257d8a) ) // same as laperlag ROM_END -/* - -CPUs -1x H8/3048 ic1 16-bit Single-Chip Microcomputer - main (internal ROM not dumped) -1x AD-65 ic24 4-Channel Mixing ADCPM Voice Synthesis LSI - sound -1x LM358N ic27 Dual Operational Amplifier - sound -1x TDA2003 ic26 Audio Amplifier - sound -1x oscillator 30.000MHz osc1 -1x blu resonator 1000J x1 -1x oscillator KDS0D x2 -ROMs -1x W27C020 1 dumped -2x M27C4001 2,3 dumped -RAMs -2x LST62832I-70LL-10L ic13,ic14 -PLDs -1x ispLSI2064-80LJ ic12 not dumped - -Others -1x 28x2 edge connector -1x 50 pins flat cable connector (CN4) -1x 12 legs connector (CN1) -2x trimmer (volume,spark) -1x 12x2 switches DIP -1x battery 3.6V - +/* Abacus (Ver 1.0) +PCB is marked: "CE H83048" on component side +PCB is marked: "bottom" and "H83048 Rev. 1.1" on solder side +PCB is labeled: "ABACUS Vers. 1.0" and "FR 24.08.01" on component side */ - ROM_START( abacus ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ ROM_LOAD( "abacus_ver1.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) @@ -625,43 +517,24 @@ ROM_START( abacus ) ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) ROM_END -/* - -CPUs -1x H8/3048 ic1 16-bit Single-Chip Microcomputer - main (internal ROM not dumped) -1x AD-65 ic24 4-Channel Mixing ADCPM Voice Synthesis LSI - sound -1x LM358N ic27 Dual Operational Amplifier - sound -1x TDA2003 ic26 Audio Amplifier - sound -1x oscillator 30.000MHz osc1 -1x red resonator ZTB1000J x1 -ROMs -1x W27C020 1 dumped -2x M27C4001 2,3 dumped -RAMs -2x MB8464C-10L ic13,ic14 -PLDs -1x ispLSI2064-80LJ ic12 not dumped - -Others -1x 28x2 edge connector -1x 50 pins flat cable connector (CN4) -1x 12 legs connector (CN1) -2x trimmer (volume,spark) -1x 12x2 switches DIP -1x battery 3V +/* Europa 2002 Space (Ver 3.0) +PCB is marked: "CE H83048" on component side +PCB is marked: "bottom" and "H83048 Rev. 1.1" on solder side +PCB is labeled: "EUROPA 2002 SPACE Ver. 3.0" and "Non rimuovere PASSED 04/2002 Garanzia 6 MESI" on component side */ - -ROM_START( bookthr ) +ROM_START( euro2k2s ) ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */ - ROM_LOAD( "bookthr_ver1.2_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) + ROM_LOAD( "euro2k2s_ver3.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP ) - ROM_REGION( 0x100000, "gfx1", 0 ) //bigger than 8bpps? - ROM_LOAD( "2.ic18", 0x000000, 0x80000, CRC(39433a74) SHA1(088944bfb43b4f239f22d0d2213efd19cea7db30) ) - ROM_LOAD( "3.ic17", 0x080000, 0x80000, CRC(893abdcc) SHA1(4dd28fd46bec8be5549d679d31c771888fcb1286) ) + ROM_REGION( 0x180000, "gfx1", 0 ) + ROM_LOAD( "europa2002space4.ic18", 0x000000, 0x80000, CRC(cf4db4f1) SHA1(6c03e54e30eb83778d1cad5ade17c26a370ea8a3) ) + ROM_LOAD( "europa2002space5.ic17", 0x080000, 0x80000, CRC(1070b4ac) SHA1(3492de52cd0c784479d2774f6050b24cf4591484) ) + ROM_LOAD( "europa2002_2-a.ic20", 0x100000, 0x40000, CRC(971bc33b) SHA1(c385e5bef57cdb52a86c1e38fca471ef5ab3da7c) ) + ROM_LOAD( "europa2002space3.ic19", 0x140000, 0x40000, CRC(d82dba04) SHA1(63d407dd036d3c7f190ad7b6d694288e9a9e56d0) ) /* identical halves */ ROM_REGION( 0x40000, "oki", 0 ) /* M6295 samples */ - ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) ) //same as Abacus + ROM_LOAD( "1-a.ic25", 0x00000, 0x20000, CRC(8fcb283d) SHA1(9e95c72967da13606eed6d16f84145273b9ffddf) ) ROM_END /********** DIFFERENT HARDWARE **********/ @@ -712,15 +585,22 @@ ROM_END *************************/ // YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS +/* hardware green H83048*/ +GAME( 200?, bookthr, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Book Theatre (Ver 1.2)", MACHINE_IS_SKELETON ) GAME( 2000, capunc, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Capitan Uncino (Ver 1.2)", MACHINE_IS_SKELETON ) GAME( 2001, capcor, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Capitani Coraggiosi (Ver 1.3)", MACHINE_IS_SKELETON ) -GAME( 2002, laperla, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "La Perla Nera (Ver 2.0)", MACHINE_IS_SKELETON ) -GAME( 2001, laperlag, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "La Perla Nera Gold (Ver 2.0)", MACHINE_IS_SKELETON ) + +/* hardware green H83048 + piggyback for timekeeping*/ GAME( 2001, euro2k2, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Europa 2002 (Ver 2.0, set 1)", MACHINE_IS_SKELETON ) GAME( 2001, euro2k2a, euro2k2, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Europa 2002 (Ver 2.0, set 2)", MACHINE_IS_SKELETON ) +GAME( 2002, laperla, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "La Perla Nera (Ver 2.0)", MACHINE_IS_SKELETON ) +GAME( 2001, laperlag, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "La Perla Nera Gold (Ver 2.0)", MACHINE_IS_SKELETON ) +GAME( 2001, wcup, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "World Cup (Ver 1.5)", MACHINE_IS_SKELETON ) +GAME( 2001, wcup14, wcup, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "World Cup (Ver 1.4)", MACHINE_IS_SKELETON ) + +/* hardware red H83048 Rev 1.1 + timekeeping on board*/ +GAME( 2001, abacus, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Abacus (Ver 1.0)", MACHINE_IS_SKELETON ) GAME( 2002, euro2k2s, euro2k2, itgamble, itgamble, itgamble_state, empty_init, ROT0, "Nazionale Elettronica", "Europa 2002 Space (Ver 3.0)", MACHINE_IS_SKELETON ) -GAME( 200?, abacus, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "<unknown>", "Abacus (Ver 1.0)", MACHINE_IS_SKELETON ) -GAME( 200?, bookthr, 0, itgamble, itgamble, itgamble_state, empty_init, ROT0, "<unknown>", "Book Theatre (Ver 1.2)", MACHINE_IS_SKELETON ) /* different hardware */ GAME( 2000, mnumber, 0, mnumber, itgamble, itgamble_state, empty_init, ROT0, "MM / BRL Bologna", "Mystery Number", MACHINE_IS_SKELETON ) diff --git a/src/mame/drivers/itt1700.cpp b/src/mame/drivers/itt1700.cpp new file mode 100644 index 00000000000..f59d1236daf --- /dev/null +++ b/src/mame/drivers/itt1700.cpp @@ -0,0 +1,107 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/*********************************************************************************************************************************** + +Skeleton driver for ITT Courier 1700 compact IBM 3278-compatible display terminal. + +Next to the CPU is a 40-pin DIP marked: + + AMI 8421MAF + 2651-P2 + C02805 + PHILIPPINES + +This device may be related to the Intel 8251, but it is definitely not a SCN2651 equivalent. + +************************************************************************************************************************************/ + +#include "emu.h" +#include "cpu/z80/z80.h" +#include "cpu/mcs48/mcs48.h" +#include "machine/itt1700_kbd.h" +#include "video/mc6845.h" +#include "screen.h" + + +class itt1700_state : public driver_device +{ +public: + itt1700_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_chargen(*this, "chargen") + { + } + + void itt1700(machine_config &config); + +private: + MC6845_UPDATE_ROW(update_row); + + void mem_map(address_map &map); + void io_map(address_map &map); + + required_device<cpu_device> m_maincpu; + required_region_ptr<u8> m_chargen; +}; + + +MC6845_UPDATE_ROW(itt1700_state::update_row) +{ +} + +void itt1700_state::mem_map(address_map &map) +{ + map(0x0000, 0x0fff).rom().region("maincpu", 0); + map(0x2000, 0x7fff).ram(); + map(0x8000, 0x8000).nopr(); +} + +void itt1700_state::io_map(address_map &map) +{ + map.global_mask(0xff); + map(0x10, 0x10).w("crtc", FUNC(hd6845_device::address_w)); + map(0x11, 0x11).w("crtc", FUNC(hd6845_device::register_w)); + map(0x20, 0x21).rw("upi", FUNC(i8741_device::upi41_master_r), FUNC(i8741_device::upi41_master_w)); +} + +static INPUT_PORTS_START(itt1700) +INPUT_PORTS_END + +void itt1700_state::itt1700(machine_config &config) +{ + Z80(config, m_maincpu, 17.35_MHz_XTAL / 5); // divider guessed + m_maincpu->set_addrmap(AS_PROGRAM, &itt1700_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &itt1700_state::io_map); + + upi41_cpu_device &upi(I8741(config, "upi", 16.6698_MHz_XTAL / 3)); // clock guessed + upi.p1_out_cb().set("keyboard", FUNC(itt1700_keyboard_device::clock_w)).bit(0); + upi.p1_out_cb().append("keyboard", FUNC(itt1700_keyboard_device::line1_w)).bit(1); + upi.p1_out_cb().append("keyboard", FUNC(itt1700_keyboard_device::line2_w)).bit(2); + upi.t0_in_cb().set("keyboard", FUNC(itt1700_keyboard_device::sense_r)); + + ITT1700_KEYBOARD(config, "keyboard"); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(16.6698_MHz_XTAL, 882, 0, 720, 315, 0, 300); + screen.set_screen_update("crtc", FUNC(mc6845_device::screen_update)); + + hd6845_device &crtc(HD6845(config, "crtc", 16.6698_MHz_XTAL / 9)); // on video board + crtc.set_char_width(9); + crtc.set_screen("screen"); + crtc.set_show_border_area(false); + crtc.set_update_row_callback(FUNC(itt1700_state::update_row), this); +} + +ROM_START(itt1700) + ROM_REGION(0x1000, "maincpu", 0) + ROM_LOAD("173562-007_2732_u32.bin", 0x0000, 0x1000, CRC(b1f4b349) SHA1(89ca344b89a0a746cdedcefdf5ff594287a5aa92)) + + ROM_REGION(0x0400, "upi", 0) + ROM_LOAD("173561-002_8741_u17.bin", 0x0000, 0x0400, CRC(7af333fa) SHA1(1edd77e9e32e3c7280f0906625e06718a0ba109f)) + + ROM_REGION(0x2000, "chargen", 0) + ROM_LOAD("173563-001_2764_u56.bin", 0x0000, 0x2000, CRC(8ca58ab9) SHA1(b92e3985dd13afcf63dbb279f5fb9668d5eb645b)) +ROM_END + +COMP(1983, itt1700, 0, 0, itt1700, itt1700, itt1700_state, empty_init, "ITT Courier", "ITT 1700", MACHINE_IS_SKELETON) diff --git a/src/mame/drivers/jazz.cpp b/src/mame/drivers/jazz.cpp new file mode 100644 index 00000000000..fbf1669a576 --- /dev/null +++ b/src/mame/drivers/jazz.cpp @@ -0,0 +1,206 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +/* + * An emulation of systems based on the Jazz computer architecture, originally + * developed by Microsoft. Specific systems which implemented this architecture + * include the MIPS Magnum/Millenium 4000 and Olivetti M700-10. + * + * References: + * + * https://www.linux-mips.org/wiki/Jazz + * http://gunkies.org/wiki/MIPS_Magnum + * http://www.sensi.org/~alec/mips/mips-history.html + * + * TODO + * - everything (skeleton only) + * + * Unconfirmed parts lists from ARCSystem reference design (which appears to + * be very similar or identical to the Jazz system) taken from: + * https://www.linux-mips.org/archives/riscy/1993-12/msg00013.html + * + * Ref Part Function + * + * System board: + * + * Dallas DS1287 RTC and NVRAM + * Dallas DS1225Y 8k non-volatile SRAM + * WD16C552 Dual serial and parallel port controller + * Intel N82077A Floppy drive controller + * National DP83932BFV Ethernet controller + * Intel 82358 EISA Bus Controller + * Intel 82357 EISA Integrated System Peripheral (ISP) + * Intel 82352 x 2 EISA Bus Buffer (EBB) + * Emulex FAS216 SCSI controller + * 27C01 128k EPROM + * 28F020 256k flash memory + * NEC μPD31432 ARC address path ASIC + * NEC μPD31431 x 2 ARC data path ASIC + * NEC μPD30400 R4000PC/50 CPU + * + * Audio board: + * + * Crystal CS4215 Audio codec + * Altera FPGA x 4 Audio DMA + * + * Video board: + * + * 27C010 128k EPROM + * IMS G364-11S Video controller + * NEC μPD42274V-80 x 16 256kx4 VRAM (2MiB) + */ + +#include "emu.h" + +#include "includes/jazz.h" + +#include "debugger.h" + +#define VERBOSE 0 +#include "logmacro.h" + +void jazz_state::machine_start() +{ +} + +void jazz_state::machine_reset() +{ +} + +void jazz_state::init_common() +{ + // map the configured ram + m_maincpu->space(AS_PROGRAM).install_ram(0, m_ram->mask(), m_ram->pointer()); +} + +void jazz_state::jazz_common_map(address_map &map) +{ + map(0x1fc00000, 0x1fc3ffff).r(m_flash, FUNC(amd_28f020_device::read)); + + // FIXME: lots of guesswork and assumptions here for now + map(0x80000000, 0x80000fff).m(m_mct_adr, FUNC(jazz_mct_adr_device::map)); + map(0x80001000, 0x80001fff).m(m_network, FUNC(dp83932c_device::map)); + //map(0x80002000, 0x80002fff).m(m_scsi, FUNC(ncr5390_device::map)).umask32(0x000000ff); + map(0x80003000, 0x80003fff).m(m_fdc, FUNC(n82077aa_device::map)); + //map(0x80004000, 0x80004fff).rw(m_rtc, FUNC(mc146818_device::read), FUNC(mc146818_device::write)); + //map(0x80005000, 0x80005fff).m() // keyboard/mouse + //map(0x80006000, 0x80006fff).m() // serial1 + //map(0x80007000, 0x80007fff).m() // serial2 + //map(0x80008000, 0x80008fff).m() // parallel + map(0x80009000, 0x80009fff).ram().share("nvram"); // unprotected? + map(0x8000a000, 0x8000afff).ram().share("nvram"); // protected? + map(0x8000b000, 0x8000bfff).ram().share("nvram"); // read-only? also sonic IO access? + //map(0x8000c000, 0x8000cfff) // sound + map(0x8000d000, 0x8000dfff).noprw(); // dummy dma device? + + map(0x8000f000, 0x8000f001).rw(FUNC(jazz_state::led_r), FUNC(jazz_state::led_w)); + + //map(0x800e0000, 0x800e0000).rw(FUNC(jazz_state::dram_config_r), FUNC(jazz_state::dram_config_w)); + + map(0xe0800000, 0xe0bfffff).ram().share("vram"); // framebuffer? + + map(0xfff00000, 0xfff3ffff).r(m_flash, FUNC(amd_28f020_device::read)); // mirror? +} + +static void jazz_scsi_devices(device_slot_interface &device) +{ + device.option_add("harddisk", NSCSI_HARDDISK); + device.option_add("cdrom", NSCSI_CDROM); +} + +void jazz_state::jazz(machine_config &config) +{ + m_maincpu->set_addrmap(AS_PROGRAM, &jazz_state::jazz_common_map); + + RAM(config, m_ram, 0); + m_ram->set_default_size("8M"); + m_ram->set_extra_options("16M,32M,64M,128M,256M"); + m_ram->set_default_value(0); + + // FIXME: may require big and little endian variants + JAZZ_MCT_ADR(config, m_mct_adr, 0); + + // scsi bus and devices + NSCSI_BUS(config, m_scsibus, 0); + + nscsi_connector &harddisk(NSCSI_CONNECTOR(config, "scsi:0", 0)); + jazz_scsi_devices(harddisk); + harddisk.set_default_option("harddisk"); + + nscsi_connector &cdrom(NSCSI_CONNECTOR(config, "scsi:6", 0)); + jazz_scsi_devices(cdrom); + cdrom.set_default_option("cdrom"); + + jazz_scsi_devices(NSCSI_CONNECTOR(config, "scsi:1", 0)); + jazz_scsi_devices(NSCSI_CONNECTOR(config, "scsi:2", 0)); + jazz_scsi_devices(NSCSI_CONNECTOR(config, "scsi:3", 0)); + jazz_scsi_devices(NSCSI_CONNECTOR(config, "scsi:4", 0)); + jazz_scsi_devices(NSCSI_CONNECTOR(config, "scsi:5", 0)); + + // scsi host adapter + nscsi_connector &adapter(NSCSI_CONNECTOR(config, "scsi:7", 0)); + adapter.option_add_internal("host", NCR53C90A); + adapter.set_default_option("host"); + adapter.set_fixed(true); + + N82077AA(config, m_fdc, 24_MHz_XTAL); + + MC146818(config, m_rtc, 32.768_kHz_XTAL); + + NVRAM(config, m_nvram, nvram_device::DEFAULT_ALL_0); + + AMD_28F020(config, m_flash); + + // pc keyboard controller? + pc_kbdc_device &kbdc(PC_KBDC(config, "pc_kbdc", 0)); + kbdc.out_clock_cb().set(m_kbdc, FUNC(at_keyboard_controller_device::kbd_clk_w)); + kbdc.out_data_cb().set(m_kbdc, FUNC(at_keyboard_controller_device::kbd_data_w)); + + // keyboard port + pc_kbdc_slot_device &kbd(PC_KBDC_SLOT(config, "kbd", 0)); + pc_at_keyboards(kbd); + kbd.set_default_option(STR_KBD_IBM_PC_AT_84); + kbd.set_pc_kbdc_slot(&kbdc); + + // at keyboard controller + AT_KEYBOARD_CONTROLLER(config, m_kbdc, 12_MHz_XTAL); + m_kbdc->hot_res().set_inputline(m_maincpu, INPUT_LINE_RESET); + m_kbdc->kbd_clk().set(kbdc, FUNC(pc_kbdc_device::clock_write_from_mb)); + m_kbdc->kbd_data().set(kbdc, FUNC(pc_kbdc_device::data_write_from_mb)); + + G364(config, m_ramdac, 0); +} + +void jazz_state::mmr4000be(machine_config &config) +{ + R4000BE(config, m_maincpu, 50_MHz_XTAL); + + jazz(config); + + DP83932C_BE(config, m_network, 20_MHz_XTAL); +} + +void jazz_state::mmr4000le(machine_config &config) +{ + R4000LE(config, m_maincpu, 50_MHz_XTAL); + + jazz(config); + + DP83932C_LE(config, m_network, 20_MHz_XTAL); +} + +ROM_START(mmr4000be) + ROM_REGION32_BE(0x40000, "flash", 0) + ROM_SYSTEM_BIOS(0, "riscos", "R4000 RISC/os PROM") + ROMX_LOAD("riscos.bin", 0x00000, 0x40000, CRC(cea6bc8f) SHA1(3e47b4ad5d1a0c7aac649e6aef3df1bf86fc938b), ROM_BIOS(0)) +ROM_END + +ROM_START(mmr4000le) + ROM_REGION32_LE(0x40000, "flash", 0) + ROM_SYSTEM_BIOS(0, "ntprom", "R4000 Windows NT PROM") + ROMX_LOAD("ntprom.bin", 0x00000, 0x40000, CRC(d91018d7) SHA1(316de17820192c89b8ee6d9936ab8364a739ca53), ROM_BIOS(0)) +ROM_END + +/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ +COMP( 1992, mmr4000be, 0, 0, mmr4000be, 0, jazz_state, init_common, "MIPS", "Magnum R4000 (big)", MACHINE_IS_SKELETON) +COMP( 1992, mmr4000le, 0, 0, mmr4000le, 0, jazz_state, init_common, "MIPS", "Magnum R4000 (little)", MACHINE_IS_SKELETON) diff --git a/src/mame/drivers/jpms80.cpp b/src/mame/drivers/jpms80.cpp index 65109f5cfb0..84fb746a6c2 100644 --- a/src/mame/drivers/jpms80.cpp +++ b/src/mame/drivers/jpms80.cpp @@ -2,13 +2,13 @@ // copyright-holders:David Haywood /* JPM System 80 Hardware - TMS9995 CPU + TMS9980A CPU + ??? - AY8910? + AY8912? TMS9902 (is there a 9901 as well?) @@ -24,7 +24,7 @@ System80 is based on the SRU platform, but with more outputs and finally a separ #include "emu.h" -#include "cpu/tms9900/tms9995.h" +#include "cpu/tms9900/tms9980a.h" #include "sound/ay8910.h" #include "machine/74259.h" #include "machine/tms9902.h" @@ -51,9 +51,9 @@ class jpms80_state : public driver_device { public: jpms80_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_duart(*this, "tms9902duart") + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_acc(*this, "acc") { } void jpms80(machine_config &config); @@ -73,8 +73,8 @@ private: void jpms80_map(address_map &map); // devices - required_device<tms9995_device> m_maincpu; - required_device<tms9902_device> m_duart; + required_device<tms9980a_device> m_maincpu; + required_device<tms9902_device> m_acc; }; WRITE_LINE_MEMBER(jpms80_state::int1_enable_w) @@ -95,7 +95,7 @@ WRITE_LINE_MEMBER(jpms80_state::io_enable_w) void jpms80_state::jpms80_map(address_map &map) { - map(0x0000, 0x2fff).rom(); + map(0x0000, 0x2fff).rom().region("maincpu", 0); map(0x3000, 0x3fff).ram(); } @@ -115,7 +115,7 @@ void jpms80_state::jpms80_io_map(address_map &map) map(0x0048, 0x004f).w("outlatch9", FUNC(ls259_device::write_d0)); map(0x0050, 0x0057).w("outlatch10", FUNC(ls259_device::write_d0)); // AM_RANGE(0x0140, 0x015f) // AY - map(0x01e0, 0x01ff).rw("tms9902duart", FUNC(tms9902_device::cruread), FUNC(tms9902_device::cruwrite)); + map(0x01e0, 0x01ff).rw(m_acc, FUNC(tms9902_device::cruread), FUNC(tms9902_device::cruwrite)); // Lamps, Meters etc. can move around } @@ -123,21 +123,13 @@ void jpms80_state::jpms80_io_map(address_map &map) static INPUT_PORTS_START( jpms80 ) INPUT_PORTS_END -// these are wrong -#define MAIN_CLOCK 2000000 -#define SOUND_CLOCK 2000000 -#define DUART_CLOCK 2000000 - void jpms80_state::machine_reset() { - // Disable auto wait state generation by raising the READY line on reset - m_maincpu->ready_line(ASSERT_LINE); - m_maincpu->reset_line(ASSERT_LINE); } MACHINE_CONFIG_START(jpms80_state::jpms80) - // CPU TMS9995, standard variant; no line connections - TMS9995(config, m_maincpu, MAIN_CLOCK); + // CPU TMS9980A, standard variant; no line connections + TMS9980A(config, m_maincpu, 10_MHz_XTAL); m_maincpu->set_addrmap(AS_PROGRAM, &jpms80_state::jpms80_map); m_maincpu->set_addrmap(AS_IO, &jpms80_state::jpms80_io_map); @@ -160,9 +152,10 @@ MACHINE_CONFIG_START(jpms80_state::jpms80) outlatch10.q_out_cb<2>().set(FUNC(jpms80_state::watchdog_w)); // 52 - Watchdog outlatch10.q_out_cb<3>().set(FUNC(jpms80_state::io_enable_w)); // 53 - I/O Enable - TMS9902(config, m_duart, DUART_CLOCK); + TMS9902(config, m_acc, 10_MHz_XTAL / 4); + m_acc->int_cb().set_inputline(m_maincpu, INT_9980A_LEVEL3); - MCFG_DEVICE_ADD("aysnd", AY8910, 2000000) + MCFG_DEVICE_ADD("aysnd", AY8912, 10_MHz_XTAL / 8) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) MACHINE_CONFIG_END @@ -173,14 +166,14 @@ void jpms80_state::init_jpms80() ROM_START( j80bac ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "bankacoinp1.bin", 0x0000, 0x1000, CRC(7b82025b) SHA1(f698688c55f8c5dc891e470de8df2eb12f6b1ec5) ) ROM_LOAD( "bankacoinp2.bin", 0x1000, 0x1000, CRC(91d71fbe) SHA1(d0c45218b7568d5293f015334d7d1045bcb2fe03) ) ROM_LOAD( "bankacoinp3.bin", 0x2000, 0x1000, CRC(0c3b2954) SHA1(4342a2a047496caf8569d4519dd8daad47e634e3) ) ROM_END ROM_START( j80blbnk ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "blankity-bank-p1.bin", 0x0000, 0x1000, CRC(8b2aeca6) SHA1(207db63d5130cb7a8eb9be41d116432f7b7728b0) ) ROM_LOAD( "blankity-bank-p2.bin", 0x1000, 0x1000, CRC(561262da) SHA1(d1f3e7815c5ea3ba7c26ed3b95a16c802f6af50f) ) ROM_LOAD( "blankity-bank-p3.bin", 0x2000, 0x1000, CRC(39925035) SHA1(0af8c8f8074c4873581250474d59d715178cded4) ) @@ -188,7 +181,7 @@ ROM_END ROM_START( j80bounc ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "bouncer.p1", 0x0000, 0x1000, CRC(81de115b) SHA1(0890de1492859c58411fd130ecf721df7611247a) ) ROM_LOAD( "bouncer.p2", 0x1000, 0x1000, CRC(8507ea42) SHA1(e4838fe737c8a9964e0067be460e8bfc18b0a406) ) ROM_END @@ -196,7 +189,7 @@ ROM_END ROM_START( j80frogh ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "froghop1.bin", 0x0000, 0x1000, CRC(606846f8) SHA1(8796fb647a41dad087b9eb3e24fa7071c933d1ec) ) ROM_LOAD( "froghop2.bin", 0x1000, 0x1000, CRC(b64ed5ad) SHA1(5697b0a16191ee3845f0f4077cf7b597f0b20024) ) ROM_LOAD( "froghop3.bin", 0x2000, 0x1000, CRC(f5b55c0e) SHA1(9fdef9f634f9b832a1bf6e3e3890a7fa328d20e3) ) @@ -205,7 +198,7 @@ ROM_END ROM_START( j80fruit ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "fruit_snappa_1-1.bin", 0x0000, 0x1000, CRC(f6eea72d) SHA1(ae994f9eb68aa6ea127586afb448cc8fbff0c314) ) ROM_LOAD( "fruit_snappa_1-2.bin", 0x1000, 0x1000, CRC(10eccac5) SHA1(3c9cc57a3b51fdae713c11a33677555be3f669bc) ) ROM_LOAD( "fruit_snappa_1-3.bin", 0x2000, 0x1000, CRC(6f938a9a) SHA1(edbf44ae7cb060420b6f952652f08271c4af35bd) ) @@ -218,7 +211,7 @@ ROM_END ROM_START( j80golds ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "goldstep2-1.p1", 0x0000, 0x1000, CRC(bc1e0788) SHA1(5e01881bda22fc00b2d2ac2b80acc67caddea682) ) ROM_LOAD( "goldstep2-2.p2", 0x1000, 0x1000, CRC(6ea82bd9) SHA1(289c9a076b9e5039f09283d64ceb77dfd7ea79ea) ) ROM_END @@ -226,7 +219,7 @@ ROM_END ROM_START( j80hotln ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "lines2_1.rom", 0x0000, 0x1000, CRC(f0ce5d7f) SHA1(be3f8ff3f83737a004d6a78cc61c3385307df1c3) ) ROM_LOAD( "lines2_2.rom", 0x1000, 0x1000, CRC(d5e69b49) SHA1(fcaa527875f81e03c5a5866d6d8b017450c50d9c) ) ROM_END @@ -234,7 +227,7 @@ ROM_END ROM_START( j80myspn ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "ms1.bin", 0x0000, 0x1000, CRC(b247374e) SHA1(33399f39bba68eff13e05529174d17f5b1ca0f70) ) ROM_LOAD( "ms2.bin", 0x1000, 0x1000, CRC(721c35df) SHA1(05ea0cdc83823f268becc7b9dd99db61949ad229) ) ROM_END @@ -242,14 +235,14 @@ ROM_END ROM_START( j80nudg2 ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "ndu.p1", 0x0000, 0x1000, CRC(4cfd3c6f) SHA1(06ad825343178a694585ee3b4ff8400caf15dd21) ) // aka ndudx5-1-5p.p1 (was in j2nuddud) ROM_END ROM_START( j80rr ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "jpmroadrunnerp1.bin", 0x0000, 0x1000, CRC(86f50997) SHA1(8bb266274d3ebeee942e5f878f7faae012712382) ) ROM_LOAD( "jpmroadrunnerp2.bin", 0x1000, 0x1000, CRC(aea12b9e) SHA1(6f6eb286c43a9bc04bfcab71713ce59da61cc063) ) ROM_LOAD( "jpmroadrunnerp3.bin", 0x2000, 0x1000, CRC(9b0b6fb9) SHA1(0282189e2945e4aa3a338930666d1eb34022894c) ) @@ -257,7 +250,7 @@ ROM_END ROM_START( j80rra ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "rr.p1", 0x0000, 0x1000, CRC(38cd5043) SHA1(f4b828ad2e761bba91336714357a18f10d79c22b) ) ROM_LOAD( "rr.p2", 0x1000, 0x1000, CRC(81dc46ec) SHA1(17c60590cf5628df6bd109213a3f671b1a6df14b) ) ROM_LOAD( "rr.p3", 0x2000, 0x1000, CRC(5e617600) SHA1(1a2a25f81818fc3abeceb74608b2ffd53fac2c6d) ) @@ -269,7 +262,7 @@ ROM_END ROM_START( j80supst ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "supasteppa2-1.p1", 0x0000, 0x1000, CRC(aac5b165) SHA1(5bf4acb85be227e1f4979fea4552fa5f64e9b7b2) ) ROM_LOAD( "supasteppa2-2.p2", 0x1000, 0x1000, CRC(3a93ea9e) SHA1(24e711a398d7f071fb904993ff0a974b4ac8b1d6) ) ROM_END @@ -277,7 +270,7 @@ ROM_END ROM_START( j80supbk ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "sbank-4.1.bin", 0x0000, 0x1000, CRC(effd29fa) SHA1(1e20bc6130f5d49db3856c56c64746f3fa49bd9c) ) ROM_LOAD( "sbank-4.2.bin", 0x1000, 0x1000, CRC(6ca5cc1d) SHA1(77d9bb44e6837027b61286f30bcb2c1b0e6a53fb) ) ROM_LOAD( "sbank-4.3.bin", 0x2000, 0x1000, CRC(af08594d) SHA1(ebff60e63e99af102874f4b3f070d9bfd229ab89) ) @@ -286,7 +279,7 @@ ROM_END ROM_START( j80topsp ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "topsprint4-1.p1", 0x0000, 0x1000, CRC(91c4f494) SHA1(e4fd688a1fd23694c4fe8529d07ac248f262ad70) ) ROM_LOAD( "topsprint4-2.p2", 0x1000, 0x1000, CRC(e9ad3706) SHA1(bb6cb1a8ea740be017055e4fa621fabc8df77086) ) ROM_LOAD( "topsprint4-3.p3", 0x2000, 0x1000, CRC(d1abfb54) SHA1(33b11563c6e1ddfaa5527ad7a384fecd03c7de0a) ) @@ -295,7 +288,7 @@ ROM_END ROM_START( j80topup ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "topup3-1.bin", 0x0000, 0x1000, CRC(2feb37e8) SHA1(098671f81fa94b851a8fa41ee7bd3d1b762eb824) ) ROM_LOAD( "topup3-2.bin", 0x1000, 0x1000, CRC(1937e7c9) SHA1(a9ae5163e560642598ec9878276d8785c28eb035) ) ROM_LOAD( "topup3-3.bin", 0x2000, 0x1000, CRC(283d7dd2) SHA1(8246c80c85956a0a3b59d68700319a59b35a5326) ) @@ -304,7 +297,7 @@ ROM_END ROM_START( j80tumbl ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "tumble3-1.bin", 0x0000, 0x1000, CRC(2feb37e8) SHA1(098671f81fa94b851a8fa41ee7bd3d1b762eb824) ) ROM_LOAD( "tumble3-2.bin", 0x1000, 0x1000, CRC(1937e7c9) SHA1(a9ae5163e560642598ec9878276d8785c28eb035) ) ROM_LOAD( "tumble3-3.bin", 0x2000, 0x1000, CRC(23789c80) SHA1(6b6ac4e1dc66d5eb399437e87a9e7ee461bee086) ) @@ -312,48 +305,48 @@ ROM_END ROM_START( j80wsprt ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "winsprint4-1.bin", 0x0000, 0x1000, CRC(57259716) SHA1(76ac953f3edefd0fe540e931bd73f564ea49d0c5) ) ROM_LOAD( "winsprint4-2.bin", 0x1000, 0x1000, CRC(f097bde3) SHA1(22bccd74564fbc2df63ffed3972199d25059b881) ) ROM_LOAD( "winsprint4-3.bin", 0x2000, 0x1000, CRC(c7318871) SHA1(6534f06be122ed0c9665437485fb860547dd1d7f) ) ROM_END ROM_START( j80wsprt3 ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "winsprint3-1.bin", 0x0000, 0x1000, CRC(1af581c2) SHA1(5e04bf37551fc8fc7f477770635f8a573d659a2f) ) ROM_LOAD( "winsprint3-2.bin", 0x1000, 0x1000, CRC(f097bde3) SHA1(22bccd74564fbc2df63ffed3972199d25059b881) ) ROM_LOAD( "winsprint3-3.bin", 0x2000, 0x1000, CRC(73098120) SHA1(e353714350681c84f4d3d093dbf07f7e8c70e109) ) ROM_END ROM_START( j80wsprt2 ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "winsprint.p1", 0x0000, 0x1000, CRC(e440c7bb) SHA1(5ef85a93a6170115c750257ac6c755b18b3114a9) ) ROM_LOAD( "winsprint.p2", 0x1000, 0x1000, CRC(225674bf) SHA1(d8a15226ff4f7b16f7f1a8dff969585a6b4536fe) ) ROM_LOAD( "winsprint.p3", 0x2000, 0x1000, CRC(51d11f59) SHA1(756ba5f02c0733d082767cbdaa93105a7d3f31f3) ) ROM_END ROM_START( j80alad ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "al_p1.bin", 0x0000, 0x001000, CRC(41134b85) SHA1(8d48af9e3eae8dcc5888a3fa8ae9681ff6047dbb) ) ROM_LOAD( "al_p2.bin", 0x1000, 0x001000, CRC(934248eb) SHA1(2abb23907acf5036b63185afb164117f1d1bab0c) ) ROM_LOAD( "al_p3.bin", 0x2000, 0x001000, CRC(da2a56a3) SHA1(1b125be1bd4f0d63c68f370a2a7202f68ff11577) ) ROM_END ROM_START( j80fortr ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "fortunetrail1.1", 0x0000, 0x001000, CRC(1691b72f) SHA1(be0966c9560249f2529dd76421fe6646adaeeadb) ) ROM_LOAD( "fortunetrail1.2", 0x1000, 0x001000, CRC(02dfcfc4) SHA1(ae97b670a4d5b341ee150cabf3d264a02cd7a32c) ) ROM_END ROM_START( j80mster ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "masterspyp1.bin", 0x0000, 0x001000, CRC(7264e304) SHA1(cd50fd116226de2980f31728faa6723dca0ac061) ) ROM_LOAD( "masterspyp2.bin", 0x1000, 0x001000, CRC(e6349ee9) SHA1(207a4089e7128143eaeebe1dc082b742b5dfab96) ) ROM_LOAD( "masterspyp3.bin", 0x2000, 0x001000, CRC(83868a58) SHA1(3264dfa7994c62615da2418d1667cb3bd2e00435) ) ROM_END ROM_START( j80plsnd ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x3000, "maincpu", 0 ) ROM_LOAD( "plus_p1.bin", 0x0000, 0x000400, CRC(02721d4f) SHA1(ea5da3f08098a9d12c71d41d70f09aca6660d6c5) ) ROM_LOAD( "plus_p2.bin", 0x0400, 0x000400, CRC(f58b492f) SHA1(569805044fa64c1d0c3620f380b4a09152ce2964) ) ROM_LOAD( "plus_p3.bin", 0x0800, 0x000400, CRC(e9584323) SHA1(7b2101626920bed533b392d1064fde305c8c18e8) ) diff --git a/src/mame/drivers/jtc.cpp b/src/mame/drivers/jtc.cpp index 7a93142b2d5..ad083dec1ae 100644 --- a/src/mame/drivers/jtc.cpp +++ b/src/mame/drivers/jtc.cpp @@ -1,12 +1,22 @@ // license:BSD-3-Clause -// copyright-holders:Curt Coder -/*************************************************************************** +// copyright-holders:Curt Coder, Robbbert +/*************************************************************************************** - Jugend+Technik CompJU+TEr +Jugend+Technik CompJU+TEr - 15/07/2009 Skeleton driver. +2009-07-15 Skeleton driver. -****************************************************************************/ +2018-09: Made mostly working + +To Do: +- Figure out how to use the so-called "Basic", all documents are in German. +- Fix any remaining CPU bugs +- On jtces40, the use of ALT key will usually freeze the system. Normal, or a bug? +- On jtces40, no backspace? +- On jtces40, is there a way to type lower case? +- On jtces40, hires gfx and colours to fix. + +****************************************************************************************/ #include "emu.h" #include "bus/centronics/ctronics.h" @@ -15,11 +25,11 @@ #include "machine/ram.h" #include "sound/spkrdev.h" #include "sound/wave.h" +#include "imagedev/snapquik.h" #include "emupal.h" #include "screen.h" #include "speaker.h" -#define SCREEN_TAG "screen" #define UB8830D_TAG "ub8830d" #define CENTRONICS_TAG "centronics" @@ -35,15 +45,9 @@ public: , m_cassette(*this, "cassette") , m_speaker(*this, "speaker") , m_centronics(*this, CENTRONICS_TAG) - , m_video_ram(*this, "video_ram") + , m_video_ram(*this, "videoram") { } - required_device<cpu_device> m_maincpu; - required_device<ram_device> m_ram; - required_device<cassette_image_device> m_cassette; - required_device<speaker_sound_device> m_speaker; - required_device<centronics_device> m_centronics; - virtual void machine_start() override; uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); @@ -52,13 +56,20 @@ public: DECLARE_READ8_MEMBER( p3_r ); DECLARE_WRITE8_MEMBER( p3_w ); DECLARE_PALETTE_INIT(jtc_es40); - optional_shared_ptr<uint8_t> m_video_ram; + DECLARE_QUICKLOAD_LOAD_MEMBER( jtc ); int m_centronics_busy; DECLARE_WRITE_LINE_MEMBER(write_centronics_busy); void basic(machine_config &config); void jtc(machine_config &config); void jtc_mem(address_map &map); + + required_device<cpu_device> m_maincpu; + required_device<ram_device> m_ram; + required_device<cassette_image_device> m_cassette; + required_device<speaker_sound_device> m_speaker; + required_device<centronics_device> m_centronics; + optional_shared_ptr<uint8_t> m_video_ram; }; @@ -68,8 +79,8 @@ public: jtces88_state(const machine_config &mconfig, device_type type, const char *tag) : jtc_state(mconfig, type, tag) { } + void jtces88(machine_config &config); - void jtc_es1988_mem(address_map &map); }; @@ -80,8 +91,9 @@ public: : jtc_state(mconfig, type, tag) { } - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void jtces23(machine_config &config); +private: + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void jtc_es23_mem(address_map &map); }; @@ -93,6 +105,8 @@ public: : jtc_state(mconfig, type, tag) { } + void jtces40(machine_config &config); +private: virtual void video_start() override; uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); @@ -104,7 +118,6 @@ public: std::unique_ptr<uint8_t[]> m_color_ram_r; std::unique_ptr<uint8_t[]> m_color_ram_g; std::unique_ptr<uint8_t[]> m_color_ram_b; - void jtces40(machine_config &config); void jtc_es40_mem(address_map &map); }; @@ -146,10 +159,6 @@ READ8_MEMBER( jtc_state::p3_r ) P31 P32 P33 centronics busy input - P34 - P35 - P36 tape output - P37 speaker output */ @@ -167,10 +176,6 @@ WRITE8_MEMBER( jtc_state::p3_w ) bit description - P30 tape input - P31 - P32 - P33 centronics busy input P34 P35 P36 tape output @@ -179,10 +184,11 @@ WRITE8_MEMBER( jtc_state::p3_w ) */ /* tape */ - m_cassette->output( BIT(data, 6) ? +1.0 : -1.0); - + if (BIT(data, 7)) + m_cassette->output( BIT(data, 6) ? +1.0 : -1.0); + else /* speaker */ - m_speaker->level_w(BIT(data, 7)); + m_speaker->level_w(BIT(data, 6)); } READ8_MEMBER( jtces40_state::videoram_r ) @@ -207,7 +213,7 @@ WRITE8_MEMBER( jtces40_state::videoram_w ) WRITE8_MEMBER( jtces40_state::banksel_w ) { - m_video_bank = offset & 0xf0; + m_video_bank = data; } /* Memory Maps */ @@ -233,7 +239,7 @@ void jtc_state::jtc_mem(address_map &map) map(0x700e, 0x700e).mirror(0x0ff0).portr("Y14"); map(0x700f, 0x700f).mirror(0x0ff0).portr("Y15"); map(0xe000, 0xfdff).ram(); - map(0xfe00, 0xffff).ram().share("video_ram"); + map(0xfe00, 0xffff).ram().share("videoram"); } void jtces23_state::jtc_es23_mem(address_map &map) @@ -257,7 +263,7 @@ void jtces23_state::jtc_es23_mem(address_map &map) map(0x700e, 0x700e).mirror(0x0ff0).portr("Y14"); map(0x700f, 0x700f).mirror(0x0ff0).portr("Y15"); map(0xe000, 0xf7ff).ram(); - map(0xf800, 0xffff).ram().share("video_ram"); + map(0xf800, 0xffff).ram().share("videoram"); } void jtces40_state::jtc_es40_mem(address_map &map) @@ -493,11 +499,12 @@ INPUT_PORTS_END static INPUT_PORTS_START( jtces40 ) PORT_START("Y0") + PORT_START("Y1") PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("SHT3") PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(LALT)) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("SHT2") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL)) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("SHT2") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("SHT1") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) PORT_START("Y2") @@ -505,7 +512,7 @@ static INPUT_PORTS_START( jtces40 ) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') PORT_START("Y3") PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_UNUSED ) @@ -538,7 +545,7 @@ static INPUT_PORTS_START( jtces40 ) PORT_START("Y7") PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') @@ -572,7 +579,8 @@ static INPUT_PORTS_START( jtces40 ) PORT_START("Y12") PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("CLR") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('<') PORT_CHAR('>') PORT_CHAR('^') + // can't find this: PORT_NAME("CLR") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('+') PORT_CHAR('-') PORT_CHAR('\\') PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('*') PORT_CHAR('/') PORT_CHAR('|') PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("RET") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) PORT_CHAR('?') PORT_CHAR('~') @@ -582,6 +590,94 @@ static INPUT_PORTS_START( jtces40 ) PORT_START("Y15") INPUT_PORTS_END +QUICKLOAD_LOAD_MEMBER( jtc_state, jtc ) +{ + address_space &space = m_maincpu->space(AS_PROGRAM); + u16 i, quick_addr, quick_length; + std::vector<uint8_t> quick_data; + image_init_result result = image_init_result::FAIL; + + quick_length = image.length(); + if (image.is_filetype("jtc")) + { + if (quick_length < 0x0088) + { + image.seterror(IMAGE_ERROR_INVALIDIMAGE, "File too short"); + image.message(" File too short"); + } + else + if (quick_length > 0x8000) + { + image.seterror(IMAGE_ERROR_INVALIDIMAGE, "File too long"); + image.message(" File too long"); + } + else + { + quick_data.resize(quick_length+1); + u16 read_ = image.fread( &quick_data[0], quick_length); + if (read_ != quick_length) + { + image.seterror(IMAGE_ERROR_INVALIDIMAGE, "Cannot read the file"); + image.message(" Cannot read the file"); + } + else + { + quick_addr = quick_data[0x12] * 256 + quick_data[0x11]; + quick_length = quick_data[0x14] * 256 + quick_data[0x13] - quick_addr + 0x81; + if (image.length() != quick_length) + { + image.seterror(IMAGE_ERROR_INVALIDIMAGE, "Invalid file header"); + image.message(" Invalid file header"); + } + else + { + for (i = 0x80; i < image.length(); i++) + space.write_byte(quick_addr+i-0x80, quick_data[i]); + + /* display a message about the loaded quickload */ + image.message(" Quickload: size=%04X : loaded at %04X",quick_length,quick_addr); + + result = image_init_result::PASS; + } + } + } + } + else + if (image.is_filetype("bin")) + { + quick_addr = 0xe000; + if (quick_length > 0x8000) + { + image.seterror(IMAGE_ERROR_INVALIDIMAGE, "File too long"); + image.message(" File too long"); + } + else + { + quick_data.resize(quick_length+1); + u16 read_ = image.fread( &quick_data[0], quick_length); + if (read_ != quick_length) + { + image.seterror(IMAGE_ERROR_INVALIDIMAGE, "Cannot read the file"); + image.message(" Cannot read the file"); + } + else + { + for (i = 0; i < image.length(); i++) + space.write_byte(quick_addr+i, quick_data[i]); + + /* display a message about the loaded quickload */ + image.message(" Quickload: size=%04X : loaded at %04X",quick_length,quick_addr); + + result = image_init_result::PASS; + m_maincpu->set_pc(quick_addr); + } + } + } + + return result; +} + + /* Video */ uint32_t jtc_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) @@ -622,6 +718,8 @@ uint32_t jtces23_state::screen_update(screen_device &screen, bitmap_ind16 &bitma PALETTE_INIT_MEMBER(jtc_state,jtc_es40) { + for (u8 i = 8; i < 16; i++) + palette.set_pen_color(i, rgb_t(BIT(i, 0) ? 0xc0 : 0, BIT(i, 1) ? 0xc0 : 0, BIT(i, 2) ? 0xc0 : 0)); } void jtces40_state::video_start() @@ -643,21 +741,26 @@ void jtces40_state::video_start() uint32_t jtces40_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - u8 i, y, sx; + u8 i, y, z, x; + u16 ma = 0; - for (y = 0; y < 192; y++) + for (y = 0; y < 64; y++) { - for (sx = 0; sx < 40; sx++) + for (z = 0; z < 3; z++) { - u8 data = m_video_ram[(y * 40) + sx]; - u8 r = m_color_ram_r[(y * 40) + sx]; - u8 g = m_color_ram_g[(y * 40) + sx]; - u8 b = m_color_ram_b[(y * 40) + sx]; - - for (i = 0; i < 8; i++) - //bitmap.pix16(y, (sx * 8) + 7 - i) = (BIT(r, i) << 3) | (BIT(g, i) << 2) | (BIT(b, i) << 1) | BIT(data, i); - bitmap.pix16(y, (sx * 8) + 7 - i) = BIT(data, i) ? 0 : (BIT(r, i) << 0) | (BIT(g, i) << 1) | (BIT(b, i) << 2); + for (x = 0; x < 40; x++) + { + u8 data = m_video_ram[ma + x]; + u8 r = ~m_color_ram_r[ma + x]; + u8 g = ~m_color_ram_g[ma + x]; + u8 b = ~m_color_ram_b[ma + x]; + + for (i = 0; i < 8; i++) + bitmap.pix16(y*3+z, (x * 8) + 7 - i) = (BIT(r, i) << 0) | (BIT(g, i) << 1) | (BIT(b, i) << 2) | (BIT(data, i) << 3); + } + ma+=40; } + ma+=8; } return 0; @@ -688,7 +791,7 @@ static const gfx_layout jtces23_charlayout = static const gfx_layout jtces40_charlayout = { - 8, 8, /* 8 x 16 characters */ + 8, 8, /* 8 x 8 characters */ 128, /* 128 characters */ 1, /* 1 bits per pixel */ { 0 }, /* no bitplanes */ @@ -715,25 +818,27 @@ MACHINE_CONFIG_START(jtc_state::basic) MCFG_Z8_PORT_P3_READ_CB(READ8(*this, jtc_state, p3_r)) MCFG_Z8_PORT_P3_WRITE_CB(WRITE8(*this, jtc_state, p3_w)) + /* cassette */ + MCFG_CASSETTE_ADD( "cassette" ) + MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_MOTOR_ENABLED | CASSETTE_SPEAKER_ENABLED) + /* sound hardware */ SPEAKER(config, "mono").front_center(); SPEAKER_SOUND(config, "speaker").add_route(ALL_OUTPUTS, "mono", 0.25); - - WAVE(config, "wave", "cassette").add_route(1, "mono", 0.25); - - /* cassette */ - MCFG_CASSETTE_ADD("cassette") - MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_MOTOR_ENABLED | CASSETTE_SPEAKER_ENABLED) + WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "mono", 0.05); /* printer */ MCFG_DEVICE_ADD(m_centronics, CENTRONICS, centronics_devices, "printer") MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(*this, jtc_state, write_centronics_busy)) + + /* quickload */ + MCFG_QUICKLOAD_ADD("quickload", jtc_state, jtc, "jtc,bin", 2) MACHINE_CONFIG_END MACHINE_CONFIG_START(jtc_state::jtc) basic(config); /* video hardware */ - MCFG_SCREEN_ADD(SCREEN_TAG, RASTER) + MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(50) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ MCFG_SCREEN_UPDATE_DRIVER(jtc_state, screen_update) @@ -761,7 +866,7 @@ MACHINE_CONFIG_START(jtces23_state::jtces23) MCFG_DEVICE_PROGRAM_MAP(jtc_es23_mem) /* video hardware */ - MCFG_SCREEN_ADD(SCREEN_TAG, RASTER) + MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(50) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ MCFG_SCREEN_UPDATE_DRIVER(jtces23_state, screen_update) @@ -783,7 +888,7 @@ MACHINE_CONFIG_START(jtces40_state::jtces40) MCFG_DEVICE_PROGRAM_MAP(jtc_es40_mem) /* video hardware */ - MCFG_SCREEN_ADD(SCREEN_TAG, RASTER) + MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(50) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ MCFG_SCREEN_UPDATE_DRIVER(jtces40_state, screen_update) @@ -830,7 +935,7 @@ ROM_END /* System Drivers */ /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ -COMP( 1987, jtc, 0, 0, jtc, jtc, jtc_state, empty_init, "Jugend+Technik", "CompJU+TEr", MACHINE_NOT_WORKING ) -COMP( 1988, jtces88, jtc, 0, jtces88, jtc, jtces88_state, empty_init, "Jugend+Technik", "CompJU+TEr (EMR-ES 1988)", MACHINE_NOT_WORKING ) -COMP( 1989, jtces23, jtc, 0, jtces23, jtces23, jtces23_state, empty_init, "Jugend+Technik", "CompJU+TEr (ES 2.3)", MACHINE_NOT_WORKING ) -COMP( 1990, jtces40, jtc, 0, jtces40, jtces40, jtces40_state, empty_init, "Jugend+Technik", "CompJU+TEr (ES 4.0)", MACHINE_NOT_WORKING ) +COMP( 1987, jtc, 0, 0, jtc, jtc, jtc_state, empty_init, "Jugend+Technik", "CompJU+TEr", MACHINE_SUPPORTS_SAVE ) +COMP( 1988, jtces88, jtc, 0, jtces88, jtc, jtces88_state, empty_init, "Jugend+Technik", "CompJU+TEr (EMR-ES 1988)", MACHINE_SUPPORTS_SAVE ) +COMP( 1989, jtces23, jtc, 0, jtces23, jtces23, jtces23_state, empty_init, "Jugend+Technik", "CompJU+TEr (ES 2.3)", MACHINE_SUPPORTS_SAVE ) +COMP( 1990, jtces40, jtc, 0, jtces40, jtces40, jtces40_state, empty_init, "Jugend+Technik", "CompJU+TEr (ES 4.0)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/jubilee.cpp b/src/mame/drivers/jubilee.cpp index be8a61c57da..bb53eeaa07e 100644 --- a/src/mame/drivers/jubilee.cpp +++ b/src/mame/drivers/jubilee.cpp @@ -201,7 +201,7 @@ #include "screen.h" #define MASTER_CLOCK XTAL(6'000'000) /* confirmed */ -#define CPU_CLOCK (MASTER_CLOCK / 2) /* guess */ +#define CPU_CLOCK MASTER_CLOCK /* guess */ #define CRTC_CLOCK (MASTER_CLOCK / 8) /* guess */ diff --git a/src/mame/drivers/jupace.cpp b/src/mame/drivers/jupace.cpp index d2db0f2b4b4..dcf80912314 100644 --- a/src/mame/drivers/jupace.cpp +++ b/src/mame/drivers/jupace.cpp @@ -313,22 +313,22 @@ WRITE8_MEMBER( ace_state::io_w ) READ8_MEMBER( ace_state::ppi_pa_r ) { - return m_ppi->read(space, 0); + return m_ppi->read(0); } READ8_MEMBER( ace_state::ppi_pb_r ) { - return m_ppi->read(space, 1); + return m_ppi->read(1); } READ8_MEMBER( ace_state::ppi_pc_r ) { - return m_ppi->read(space, 2); + return m_ppi->read(2); } READ8_MEMBER( ace_state::ppi_control_r ) { - return m_ppi->read(space, 3); + return m_ppi->read(3); } @@ -338,22 +338,22 @@ READ8_MEMBER( ace_state::ppi_control_r ) WRITE8_MEMBER( ace_state::ppi_pa_w ) { - m_ppi->write(space, 0, data); + m_ppi->write(0, data); } WRITE8_MEMBER( ace_state::ppi_pb_w ) { - m_ppi->write(space, 1, data); + m_ppi->write(1, data); } WRITE8_MEMBER( ace_state::ppi_pc_w ) { - m_ppi->write(space, 2, data); + m_ppi->write(2, data); } WRITE8_MEMBER( ace_state::ppi_control_w ) { - m_ppi->write(space, 3, data); + m_ppi->write(3, data); } diff --git a/src/mame/drivers/jvh.cpp b/src/mame/drivers/jvh.cpp index 9c7ec1a908c..0a2c546f366 100644 --- a/src/mame/drivers/jvh.cpp +++ b/src/mame/drivers/jvh.cpp @@ -123,7 +123,7 @@ void jvh_state::init_jvh() void jvh_state::common(machine_config &config) { // CPU TMS9980A; no line connections - TMS9980A(config, m_maincpu, 1000000); + TMS9980A(config, m_maincpu, 10000000); m_maincpu->set_addrmap(AS_PROGRAM, &jvh_state::jvh_map); m6802_cpu_device &soundcpu(M6802(config, "soundcpu", XTAL(4'000'000))); diff --git a/src/mame/drivers/kdt6.cpp b/src/mame/drivers/kdt6.cpp index dcd91a68ccb..0d60a88380c 100644 --- a/src/mame/drivers/kdt6.cpp +++ b/src/mame/drivers/kdt6.cpp @@ -705,11 +705,11 @@ MACHINE_CONFIG_START(kdt6_state::psi98) INPUT_BUFFER(config, "cent_data_in"); MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") - MCFG_UPD1990A_ADD("rtc", XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); - MCFG_UPD765A_ADD("fdc", true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE("ctc1", z80ctc_device, trg0)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, kdt6_state, fdc_drq_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set("ctc1", FUNC(z80ctc_device::trg0)); + m_fdc->drq_wr_callback().set(FUNC(kdt6_state::fdc_drq_w)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", kdt6_floppies, "fd55f", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:1", kdt6_floppies, "fd55f", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/koftball.cpp b/src/mame/drivers/koftball.cpp index e8a7ca4acde..05b82ee4fa7 100644 --- a/src/mame/drivers/koftball.cpp +++ b/src/mame/drivers/koftball.cpp @@ -252,7 +252,8 @@ MACHINE_CONFIG_START(koftball_state::koftball) MCFG_SCREEN_PALETTE("palette") MCFG_PALETTE_ADD("palette", 256) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &koftball_state::ramdac_map); MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_koftball) diff --git a/src/mame/drivers/konamigv.cpp b/src/mame/drivers/konamigv.cpp index 1d126a06536..858e6becf38 100644 --- a/src/mame/drivers/konamigv.cpp +++ b/src/mame/drivers/konamigv.cpp @@ -229,8 +229,8 @@ void konamigv_state::btchamp_map(address_map &map) konamigv_map(map); map(0x1f380000, 0x1f3fffff).rw("flash", FUNC(intelfsh16_device::read), FUNC(intelfsh16_device::write)); - map(0x1f680080, 0x1f680087).r("upd1", FUNC(upd4701_device::read_xy)).umask32(0xff00ff00); - map(0x1f680080, 0x1f680087).r("upd2", FUNC(upd4701_device::read_xy)).umask32(0x00ff00ff); + map(0x1f680080, 0x1f680087).r(m_btc_trackball[0], FUNC(upd4701_device::read_xy)).umask32(0xff00ff00); + map(0x1f680080, 0x1f680087).r(m_btc_trackball[1], FUNC(upd4701_device::read_xy)).umask32(0x00ff00ff); map(0x1f680088, 0x1f680089).w(FUNC(konamigv_state::btc_trackball_w)); map(0x1f6800e0, 0x1f6800e3).nopw(); } @@ -518,9 +518,9 @@ MACHINE_CONFIG_START(simpbowl_state::simpbowl) FUJITSU_29F016A(config, "flash2"); FUJITSU_29F016A(config, "flash3"); - MCFG_DEVICE_ADD("upd", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK0_X") - MCFG_UPD4701_PORTY("TRACK0_Y") + upd4701_device &upd(UPD4701A(config, "upd")); + upd.set_portx_tag("TRACK0_X"); + upd.set_porty_tag("TRACK0_Y"); MACHINE_CONFIG_END static INPUT_PORTS_START( simpbowl ) @@ -555,13 +555,13 @@ MACHINE_CONFIG_START(konamigv_state::btchamp) SHARP_LH28F400(config, "flash"); - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK0_X") - MCFG_UPD4701_PORTY("TRACK0_Y") + UPD4701A(config, m_btc_trackball[0]); + m_btc_trackball[0]->set_portx_tag("TRACK0_X"); + m_btc_trackball[0]->set_porty_tag("TRACK0_Y"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK1_X") - MCFG_UPD4701_PORTY("TRACK1_Y") + UPD4701A(config, m_btc_trackball[1]); + m_btc_trackball[1]->set_portx_tag("TRACK1_X"); + m_btc_trackball[1]->set_porty_tag("TRACK1_Y"); MACHINE_CONFIG_END static INPUT_PORTS_START( btchamp ) diff --git a/src/mame/drivers/konin.cpp b/src/mame/drivers/konin.cpp index ae2c597866b..8342e9e4b5f 100644 --- a/src/mame/drivers/konin.cpp +++ b/src/mame/drivers/konin.cpp @@ -106,21 +106,13 @@ void konin_state::konin_io(address_map &map) map.global_mask(0xff); map(0x24, 0x24).w(FUNC(konin_state::picu_b_w)); map(0x80, 0x83).lrw8("ioppi_rw", - [this](address_space &space, offs_t offset, u8 mem_mask) { - return m_ioppi->read(space, offset^3, mem_mask); - }, - [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { - m_ioppi->write(space, offset^3, data, mem_mask); - }); + [this](offs_t offset) { return m_ioppi->read(offset^3); }, + [this](offs_t offset, u8 data) { m_ioppi->write(offset^3, data); }); map(0xf6, 0xf6).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); map(0xf7, 0xf7).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); map(0xf8, 0xfb).lrw8("iopit_rw", - [this](address_space &space, offs_t offset, u8 mem_mask) { - return m_iopit->read(space, offset^3, mem_mask); - }, - [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { - m_iopit->write(space, offset^3, data, mem_mask); - }); + [this](offs_t offset) { return m_iopit->read(offset^3); }, + [this](offs_t offset, u8 data) { m_iopit->write(offset^3, data); }); } /* Input ports */ diff --git a/src/mame/drivers/ksys573.cpp b/src/mame/drivers/ksys573.cpp index b937fcd8a44..f033f6ff45f 100644 --- a/src/mame/drivers/ksys573.cpp +++ b/src/mame/drivers/ksys573.cpp @@ -2240,10 +2240,11 @@ MACHINE_CONFIG_END // Dance Dance Revolution -MACHINE_CONFIG_START(ksys573_state::ddr) +void ksys573_state::ddr(machine_config &config) +{ k573a(config); cassx(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::ddr2ml) k573a(config); @@ -2290,16 +2291,18 @@ MACHINE_CONFIG_END // Dancing Stage -MACHINE_CONFIG_START(ksys573_state::dsfdcta) +void ksys573_state::dsfdcta(machine_config &config) +{ k573a(config); pccard2_32mb(config); cassyyi(config); -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::dsftkd) +void ksys573_state::dsftkd(machine_config &config) +{ k573a(config); cassyi(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::dsfdr) k573d(config); @@ -2346,10 +2349,11 @@ MACHINE_CONFIG_END // DrumMania -MACHINE_CONFIG_START(ksys573_state::drmn) +void ksys573_state::drmn(machine_config &config) +{ k573a(config); cassx(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::drmn2m) k573d(config); @@ -2371,34 +2375,39 @@ MACHINE_CONFIG_END // Guitar Freaks -MACHINE_CONFIG_START(ksys573_state::gtrfrks) +void ksys573_state::gtrfrks(machine_config &config) +{ k573a(config); cassx(config); -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::gtrfrk2m) +void ksys573_state::gtrfrk2m(machine_config &config) +{ k573a(config); cassyi(config); pccard1_32mb(config); // HACK: The installation tries to check and erase 32mb but only flashes 16mb. -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::gtrfrk3m) +void ksys573_state::gtrfrk3m(machine_config &config) +{ k573d(config); cassxzi(config); pccard1_16mb(config); -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::gtrfrk5m) +void ksys573_state::gtrfrk5m(machine_config &config) +{ k573d(config); casszi(config); pccard1_32mb(config); -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::gtrfrk7m) +void ksys573_state::gtrfrk7m(machine_config &config) +{ k573d(config); casszi(config); pccard1_32mb(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::gtfrk10mb) gtrfrk7m(config); @@ -2407,20 +2416,22 @@ MACHINE_CONFIG_END // Miscellaneous -MACHINE_CONFIG_START(ksys573_state::konami573x) +void ksys573_state::konami573x(machine_config &config) +{ konami573(config); cassx(config); -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::fbaitbc) +void ksys573_state::fbaitbc(machine_config & config) +{ konami573(config); m_maincpu->set_addrmap(AS_PROGRAM, &ksys573_state::fbaitbc_map); - MCFG_DEVICE_ADD(m_upd4701, UPD4701A, 0) - MCFG_UPD4701_PORTY("uPD4701_y") + UPD4701A(config, m_upd4701); + m_upd4701->set_porty_tag("uPD4701_y"); cassx(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::hyperbbc) konami573(config); @@ -2446,11 +2457,12 @@ MACHINE_CONFIG_START(ksys573_state::salarymc) MCFG_SLOT_OPTION_MACHINE_CONFIG( "game", [this] (device_t *device) { salarymc_cassette_install(device); } ) MACHINE_CONFIG_END -MACHINE_CONFIG_START(ksys573_state::gchgchmp) +void ksys573_state::gchgchmp(machine_config &config) +{ konami573(config); pccard1_16mb(config); cassx(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::pnchmn) konami573(config); @@ -2463,18 +2475,20 @@ MACHINE_CONFIG_START(ksys573_state::pnchmn) MCFG_SLOT_OPTION_MACHINE_CONFIG( "game", [this] (device_t *device) { punchmania_cassette_install(device); } ) MACHINE_CONFIG_END -MACHINE_CONFIG_START(ksys573_state::pnchmn2) +void ksys573_state::pnchmn2(machine_config &config) +{ pnchmn(config); pccard2_64mb(config); -MACHINE_CONFIG_END +} -MACHINE_CONFIG_START(ksys573_state::gunmania) +void ksys573_state::gunmania(machine_config &config) +{ konami573(config); m_maincpu->set_addrmap(AS_PROGRAM, &ksys573_state::gunmania_map); DS2401( config, "gunmania_id" ); pccard2_32mb(config); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ksys573_state::dmx) k573d(config); diff --git a/src/mame/drivers/kyocera.cpp b/src/mame/drivers/kyocera.cpp index 4d76285f6d5..c8ad6c26c48 100644 --- a/src/mame/drivers/kyocera.cpp +++ b/src/mame/drivers/kyocera.cpp @@ -628,8 +628,7 @@ void tandy200_state::tandy200_io(address_map &map) map(0x90, 0x9f).rw(m_rtc, FUNC(rp5c01_device::read), FUNC(rp5c01_device::write)); // AM_RANGE(0xa0, 0xa0) AM_MIRROR(0x0f) AM_DEVWRITE(TCM5089_TAG, write) map(0xb0, 0xb7).mirror(0x08).rw(I8155_TAG, FUNC(i8155_device::io_r), FUNC(i8155_device::io_w)); - map(0xc0, 0xc0).mirror(0x0e).rw(I8251_TAG, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xc1, 0xc1).mirror(0x0e).rw(I8251_TAG, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xc0, 0xc1).mirror(0x0e).rw(I8251_TAG, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xd0, 0xd0).mirror(0x0f).rw(FUNC(tandy200_state::bank_r), FUNC(tandy200_state::bank_w)); map(0xe0, 0xe0).mirror(0x0f).rw(FUNC(tandy200_state::stbk_r), FUNC(tandy200_state::stbk_w)); map(0xf0, 0xf0).mirror(0x0e).rw(m_lcdc, FUNC(hd61830_device::data_r), FUNC(hd61830_device::data_w)); @@ -1348,7 +1347,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(tandy200_state::tandy200_tp_tick) MACHINE_CONFIG_START(kc85_state::kc85) /* basic machine hardware */ - MCFG_DEVICE_ADD(I8085_TAG, I8085A, XTAL(4'915'200)) + MCFG_DEVICE_ADD(m_maincpu, I8085A, XTAL(4'915'200)) MCFG_DEVICE_PROGRAM_MAP(kc85_mem) MCFG_DEVICE_IO_MAP(kc85_io) MCFG_I8085A_SID(READLINE(*this, kc85_state,kc85_sid_r)) @@ -1369,7 +1368,8 @@ MACHINE_CONFIG_START(kc85_state::kc85) i8155.in_pc_callback().set(FUNC(kc85_state::i8155_pc_r)); i8155.out_to_callback().set(FUNC(kc85_state::i8155_to_w)); - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, INPUTLINE(I8085_TAG, I8085_RST75_LINE)) + UPD1990A(config, m_rtc); + m_rtc->tp_callback().set_inputline(m_maincpu, I8085_RST75_LINE); IM6402(config, m_uart, 0, 0); m_uart->tro_callback().set(RS232_TAG, FUNC(rs232_port_device::write_txd)); @@ -1397,7 +1397,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(pc8201_state::pc8201) /* basic machine hardware */ - MCFG_DEVICE_ADD(I8085_TAG, I8085A, XTAL(4'915'200)) + MCFG_DEVICE_ADD(m_maincpu, I8085A, XTAL(4'915'200)) MCFG_DEVICE_PROGRAM_MAP(pc8201_mem) MCFG_DEVICE_IO_MAP(pc8201_io) MCFG_I8085A_SID(READLINE(*this, kc85_state,kc85_sid_r)) @@ -1418,7 +1418,8 @@ MACHINE_CONFIG_START(pc8201_state::pc8201) i8155.in_pc_callback().set(FUNC(kc85_state::i8155_pc_r)); i8155.out_to_callback().set(FUNC(kc85_state::i8155_to_w)); - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, INPUTLINE(I8085_TAG, I8085_RST75_LINE)) + UPD1990A(config, m_rtc); + m_rtc->tp_callback().set_inputline(m_maincpu, I8085_RST75_LINE); IM6402(config, m_uart, 0, 0); m_uart->tro_callback().set(RS232_TAG, FUNC(rs232_port_device::write_txd)); @@ -1456,7 +1457,7 @@ void pc8201_state::pc8300(machine_config &config) MACHINE_CONFIG_START(trsm100_state::trsm100) /* basic machine hardware */ - MCFG_DEVICE_ADD(I8085_TAG, I8085A, XTAL(4'915'200)) + MCFG_DEVICE_ADD(m_maincpu, I8085A, XTAL(4'915'200)) MCFG_DEVICE_PROGRAM_MAP(kc85_mem) MCFG_DEVICE_IO_MAP(trsm100_io) MCFG_I8085A_SID(READLINE(*this, kc85_state,kc85_sid_r)) @@ -1477,7 +1478,8 @@ MACHINE_CONFIG_START(trsm100_state::trsm100) i8155.in_pc_callback().set(FUNC(kc85_state::i8155_pc_r)); i8155.out_to_callback().set(FUNC(kc85_state::i8155_to_w)); - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, INPUTLINE(I8085_TAG, I8085_RST75_LINE)) + UPD1990A(config, m_rtc); + m_rtc->tp_callback().set_inputline(m_maincpu, I8085_RST75_LINE); IM6402(config, m_uart, 0, 0); m_uart->tro_callback().set(RS232_TAG, FUNC(rs232_port_device::write_txd)); @@ -1510,7 +1512,7 @@ void trsm100_state::tandy102(machine_config &config) MACHINE_CONFIG_START(tandy200_state::tandy200) /* basic machine hardware */ - MCFG_DEVICE_ADD(I8085_TAG, I8085A, XTAL(4'915'200)) + MCFG_DEVICE_ADD(m_maincpu, I8085A, XTAL(4'915'200)) MCFG_DEVICE_PROGRAM_MAP(tandy200_mem) MCFG_DEVICE_IO_MAP(tandy200_io) MCFG_I8085A_SID(READLINE(*this, tandy200_state,kc85_sid_r)) diff --git a/src/mame/drivers/lastfght.cpp b/src/mame/drivers/lastfght.cpp index a9eb5d1e6ca..db1107ec162 100644 --- a/src/mame/drivers/lastfght.cpp +++ b/src/mame/drivers/lastfght.cpp @@ -565,7 +565,8 @@ MACHINE_CONFIG_START(lastfght_state::lastfght) /* video hardware */ MCFG_PALETTE_ADD( "palette", 256 ) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") // HMC HM86171 VGA 256 colour RAMDAC + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); // HMC HM86171 VGA 256 colour RAMDAC + ramdac.set_addrmap(0, &lastfght_state::ramdac_map); MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_SIZE( 512, 256 ) diff --git a/src/mame/drivers/lb186.cpp b/src/mame/drivers/lb186.cpp index 73a42c04d55..d6e604ca9ae 100644 --- a/src/mame/drivers/lb186.cpp +++ b/src/mame/drivers/lb186.cpp @@ -143,10 +143,10 @@ MACHINE_CONFIG_START(lb186_state::lb186) MCFG_MC68681_B_TX_CALLBACK(WRITELINE("rs232_2", rs232_port_device, write_txd)) MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(*this, lb186_state, sio_out_w)) - MCFG_DEVICE_ADD("rs232_1", RS232_PORT, default_rs232_devices, "terminal") - MCFG_RS232_RXD_HANDLER(WRITELINE("duart", scn2681_device, rx_a_w)) - MCFG_DEVICE_ADD("rs232_2", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("duart", scn2681_device, rx_b_w)) + rs232_port_device &rs232_1(RS232_PORT(config, "rs232_1", default_rs232_devices, "terminal")); + rs232_1.rxd_handler().set("duart", FUNC(scn2681_device::rx_a_w)); + rs232_port_device &rs232_2(RS232_PORT(config, "rs232_2", default_rs232_devices, nullptr)); + rs232_2.rxd_handler().set("duart", FUNC(scn2681_device::rx_b_w)); WD1772(config, m_fdc, 16_MHz_XTAL / 2); m_fdc->intrq_wr_callback().set(m_maincpu, FUNC(i80186_cpu_device::int2_w)); diff --git a/src/mame/drivers/lee1214.cpp b/src/mame/drivers/lee1214.cpp new file mode 100644 index 00000000000..6d6f91864e9 --- /dev/null +++ b/src/mame/drivers/lee1214.cpp @@ -0,0 +1,86 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/**************************************************************************** + + Skeleton driver for Lee Data 1214 terminal (IBM 3278-compatible). + +****************************************************************************/ + +#include "emu.h" +#include "cpu/i86/i186.h" +#include "machine/eeprompar.h" +#include "machine/z80sio.h" +//#include "video/mc6845.h" +//#include "screen.h" + +class lee1214_state : public driver_device +{ +public: + lee1214_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + { + } + + void lee1214(machine_config &config); + +protected: + virtual void machine_start() override; + +private: + void mem_map(address_map &map); + void io_map(address_map &map); + + u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + + required_device<cpu_device> m_maincpu; +}; + +void lee1214_state::mem_map(address_map &map) +{ + map(0x00000, 0x007ff).ram(); + map(0x80000, 0x80fff).ram(); + map(0xa0000, 0xa1fff).ram(); + map(0xf8000, 0xfffff).rom().region("maincpu", 0); +} + +void lee1214_state::io_map(address_map &map) +{ + map(0x0000, 0x0003).rw("mpsc", FUNC(i8274_new_device::cd_ba_r), FUNC(i8274_new_device::cd_ba_w)); + //map(0x0100, 0x0100).w("crtc", FUNC(mc6845_device::address_w)); + //map(0x0101, 0x0101).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); +} + +void lee1214_state::machine_start() +{ +} + +u32 lee1214_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + return 0; +} + +static INPUT_PORTS_START(lee1214) +INPUT_PORTS_END + +void lee1214_state::lee1214(machine_config &config) +{ + I80188(config, m_maincpu, 12_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &lee1214_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &lee1214_state::io_map); + + i8274_new_device &mpsc(I8274_NEW(config, "mpsc", 4'000'000)); + mpsc.out_int_callback().set("maincpu", FUNC(i80188_cpu_device::int0_w)); + + EEPROM_2816(config, "eeprom"); +} + +ROM_START(lee1214d) // X1 = 12 MHz, X2 = 41.028 MHz, X3 = 24.823 MHz, X5 = 5.9335 MHz + ROM_REGION(0x8000, "maincpu", 0) + ROM_LOAD("13311502_u41_27256.bin", 0x0000, 0x8000, CRC(6f469221) SHA1(deef1d83c41fdbe09b830dc45698988cf89003e0)) + + ROM_REGION(0x0800, "eeprom", 0) + ROM_LOAD("13300001_u19_2816.bin", 0x0000, 0x0800, CRC(30411ecd) SHA1(8755a1e0a36fe96d438bf2ee35cb0917fbc97e52)) +ROM_END + +COMP(1985, lee1214d, 0, 0, lee1214, lee1214, lee1214_state, empty_init, "Lee Data", "1214D Display Terminal", MACHINE_IS_SKELETON) diff --git a/src/mame/drivers/legionna.cpp b/src/mame/drivers/legionna.cpp index eca38245abe..34d45eb65ed 100644 --- a/src/mame/drivers/legionna.cpp +++ b/src/mame/drivers/legionna.cpp @@ -54,7 +54,7 @@ Denjin Makai Godzilla -------- -The COP-MCU appears to write to the work ram area,otherwise it resets in mid-animation +The COP-MCU appears to write to the work ram area, otherwise it resets in mid-animation of the title screen. @@ -146,7 +146,7 @@ void legionna_state::legionna_cop_map(address_map &map) map(0x10045c, 0x10045d).w(m_raiden2cop, FUNC(raiden2cop_device::cop_pal_brightness_mode_w)); //palette DMA brightness mode, used by X Se Dae / Zero Team (sets to 5) // map(0x100470, 0x100471).rw(FUNC(legionna_state::cop_tile_bank_2_r), FUNC(legionna_state::cop_tile_bank_2_w)); -// map(0x100474, 0x100475).w(m_raiden2cop, FUNC(raiden2cop_device::...)); // this gets set to a pointer to spriteram (relative to start of ram) on all games excecpt raiden 2, where it isn't set +// map(0x100474, 0x100475).w(m_raiden2cop, FUNC(raiden2cop_device::...)); // this gets set to a pointer to spriteram (relative to start of ram) on all games except raiden 2, where it isn't set map(0x100476, 0x100477).w(m_raiden2cop, FUNC(raiden2cop_device::cop_dma_adr_rel_w)); map(0x100478, 0x100479).w(m_raiden2cop, FUNC(raiden2cop_device::cop_dma_src_w)); map(0x10047a, 0x10047b).w(m_raiden2cop, FUNC(raiden2cop_device::cop_dma_size_w)); @@ -1774,6 +1774,48 @@ ROM_START( heatbrl2 ) ROM_LOAD( "copx-d2.u0339", 0x000000, 0x080000, CRC(7c52581b) SHA1(7e668476f886806b0c06fa0bcf4bbc955878c87c) ) /* not dumped from this PCB assumed to be the same */ ROM_END +ROM_START( heatbrl3 ) // only the maincpu and audiocpu ROMs were provided for this set. This is the only known set with a different audiocpu ROM, though it's quite similar. + ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */ + ROM_LOAD32_BYTE( "barrel_1.u025.9k", 0x00000, 0x20000, CRC(b360c9cd) SHA1(3722c7220f99c28ac47ef5abac027ac62f838caa) ) + ROM_LOAD32_BYTE( "barrel_2.u024.9m", 0x00001, 0x20000, CRC(06730aac) SHA1(451ebe6fdc9f983b05cfd20c5b6e89f2c1e7d17a) ) + ROM_LOAD32_BYTE( "barrel_3.u026.9f", 0x00002, 0x20000, CRC(63fff651) SHA1(4bf060e3338fce8d0eecdcb7418d353ca3616382) ) + ROM_LOAD32_BYTE( "barrel_4.u023.9h", 0x00003, 0x20000, CRC(7a119fd5) SHA1(ffccb7cec9b6f420edb658705a7434041854e77e) ) + + ROM_REGION( 0x20000, "audiocpu", 0 ) /* Z80 code, banked data */ + ROM_LOAD( "u1110.a6", 0x00000, 0x08000, CRC(790bdba4) SHA1(9030ddcf06b632a53ec49cbb7c94d1a5195e0316) ) // no label + ROM_CONTINUE( 0x10000, 0x08000 ) /* banked stuff */ + ROM_COPY( "audiocpu", 0x000000, 0x18000, 0x08000 ) + + ROM_REGION( 0x020000, "char", 0 ) /* chars */ + ROM_LOAD16_BYTE( "barrel_6.u077.5t", 0x000000, 0x10000, CRC(bea3c581) SHA1(7f7f0a74bf106acaf57c182d47f0c707da2011bd) ) + ROM_LOAD16_BYTE( "barrel_5.u072.5v", 0x000001, 0x10000, CRC(5604d155) SHA1(afc30347b1e1316ec25056c0c1576f78be5f1a72) ) + + ROM_REGION( 0x200000, "sprite", 0 ) /* sprites */ + ROM_LOAD( "heated-barrel_obj1.u085", 0x000000, 0x100000, CRC(f7a7c31c) SHA1(683e5c7a0732ff5fd56167dd82035ca050de0507) ) + ROM_LOAD( "heated-barrel_obj2.u0814", 0x100000, 0x100000, CRC(24236116) SHA1(b27bd771cacd1587d4927e3f489c4f54b5dec110) ) + + ROM_REGION( 0x100000, "gfx3", 0 ) /* MBK tiles */ + ROM_LOAD( "heated-barrel_bg-1.u075", 0x000000, 0x100000, CRC(2f5d8baa) SHA1(0bf687c46c603150eadb304adcd78d53a338e615) ) + + ROM_REGION( 0x020000, "gfx4", 0 ) /* not used? */ + ROM_COPY( "char", 0x010000, 0x000000, 0x010000 ) // this is just corrupt tiles if we decode it + + ROM_REGION( 0x080000, "gfx5", 0 ) /* BK3 tiles */ + ROM_LOAD( "heated-barrel_bg-3.u076", 0x000000, 0x080000, CRC(83850e2d) SHA1(cdc2df8e3bc58319c50768ea2a05b9c7ddc2a652) ) + + ROM_REGION( 0x080000, "gfx6", 0 ) /* LBK tiles */ + ROM_LOAD( "heated-barrel_bg-2.u074", 0x000000, 0x080000, CRC(77ee4c6f) SHA1(a0072331bc970ba448ac5bb1ae5caa0332c82a99) ) + + ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */ + ROM_LOAD( "barrel_8.u106", 0x00000, 0x20000, CRC(489e5b1d) SHA1(ecd69d87ed354d1d08dbe6c2890af5f05d9d67d0) ) + + ROM_REGION( 0x200, "proms", 0 ) /* Priority */ + ROM_LOAD( "heat07.u0910", 0x000000, 0x000200, CRC(265eccc8) SHA1(cf650c69f97b887251b5079e5518497721692af3) ) /* N82S147N type BPROM */ + + ROM_REGION( 0x080000, "user1", 0 ) /* SEI300 data rom */ + ROM_LOAD( "copx-d2.u0339", 0x000000, 0x080000, CRC(7c52581b) SHA1(7e668476f886806b0c06fa0bcf4bbc955878c87c) ) /* not dumped from this PCB assumed to be the same */ +ROM_END + ROM_START( heatbrlo ) ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */ ROM_LOAD32_BYTE( "barrel.1h", 0x00000, 0x20000, CRC(d5a85c36) SHA1(421a42863faa940057ed5637748f791152a15502) ) @@ -1907,12 +1949,13 @@ ROM_START( heatbrle ) ROM_LOAD( "copx-d2.u0339", 0x000000, 0x080000, CRC(7c52581b) SHA1(7e668476f886806b0c06fa0bcf4bbc955878c87c) ) /* not dumped from this PCB assumed to be the same */ ROM_END + /* Godzilla Banpresto 1993 -This game runs on Seibu hardware, similar to Legionairre. +This game runs on Seibu hardware, similar to Legionnaire. PCB Layout |----------------------------------------------------| @@ -2006,7 +2049,7 @@ Denjin Makai Banpresto, 1994 This game runs on early 90's Seibu hardware. -(i.e. Raiden II, Godzilla, Seibu Cup Soccer, Legionairre, Heated Barrel etc). +(i.e. Raiden II, Godzilla, Seibu Cup Soccer, Legionnaire, Heated Barrel etc). The PCB looks to have been converted from some other game (a lot of flux traces are left on the PCB). The game might be a simple ROM swap for some other Seibu-based game. @@ -2580,7 +2623,7 @@ ROM_END In Seibu Cup Soccer Selection the only way I've found to not display debug text is by changing this area, and for Olympic Soccer '92 it appears to be the only way to get the Olympic Soccer '92 titles - to be used instead of the reagular Seibu Cup Soccer one (and AFAIK both dumps are confirmed to show + to be used instead of the regular Seibu Cup Soccer one (and AFAIK both dumps are confirmed to show that on hardware, as are all early versions with the advertising boards of dubious legality) You can also enable other debug menus by patching this area of ROM, but some initial tests appear to @@ -2634,7 +2677,7 @@ void legionna_state::init_legiongfx() void legionna_state::init_godzilla() { uint16_t *ROM = (uint16_t *)memregion("maincpu")->base(); - // TODO: some game elements doesn't collide properly, @see seibucop.cpp + // TODO: some game elements don't collide properly, @see seibucop.cpp ROM[(0xbe0e + 0x0a)/2] = 0xb000; ROM[(0xbe0e + 0x1a)/2] = 0xb800; ROM[(0xbb0a + 0x0a)/2] = 0xb000; @@ -2649,6 +2692,7 @@ GAME( 1992, legionnaj, legionna, legionna, legionna, legionna_state, init_legion GAME( 1992, heatbrl, 0, heatbrl, heatbrl, legionna_state, empty_init, ROT0, "TAD Corporation", "Heated Barrel (World version 3)", 0 ) GAME( 1992, heatbrl2, heatbrl, heatbrl, heatbrl, legionna_state, empty_init, ROT0, "TAD Corporation", "Heated Barrel (World version 2)", 0 ) +GAME( 1992, heatbrl3, heatbrl, heatbrl, heatbrl, legionna_state, empty_init, ROT0, "TAD Corporation", "Heated Barrel (World version ?)", 0 ) GAME( 1992, heatbrlo, heatbrl, heatbrl, heatbrl, legionna_state, empty_init, ROT0, "TAD Corporation", "Heated Barrel (World old version)", 0 ) GAME( 1992, heatbrlu, heatbrl, heatbrl, heatbrl, legionna_state, empty_init, ROT0, "TAD Corporation", "Heated Barrel (US)", 0 ) GAME( 1992, heatbrle, heatbrl, heatbrl, heatbrl, legionna_state, empty_init, ROT0, "TAD Corporation (Electronic Devices license)", "Heated Barrel (Electronic Devices license)", 0 ) diff --git a/src/mame/drivers/looping.cpp b/src/mame/drivers/looping.cpp index ac1db512b37..71691121b4f 100644 --- a/src/mame/drivers/looping.cpp +++ b/src/mame/drivers/looping.cpp @@ -630,7 +630,7 @@ MACHINE_CONFIG_START(looping_state::looping) m_maincpu->set_vblank_int("screen", FUNC(looping_state::looping_interrupt)); // CPU TMS9980A for audio subsystem; no line connections - TMS9980A(config, m_audiocpu, SOUND_CLOCK/4); + TMS9980A(config, m_audiocpu, SOUND_CLOCK); m_audiocpu->set_addrmap(AS_PROGRAM, &looping_state::looping_sound_map); m_audiocpu->set_addrmap(AS_IO, &looping_state::looping_sound_io_map); diff --git a/src/mame/drivers/luckybal.cpp b/src/mame/drivers/luckybal.cpp index 463af27eda1..2f198250492 100644 --- a/src/mame/drivers/luckybal.cpp +++ b/src/mame/drivers/luckybal.cpp @@ -262,7 +262,7 @@ *********************************************************************/ -#define CPU_CLOCK XTAL(12'000'000) // 12MHz. from schematics. +#define CPU_CLOCK XTAL(12'000'000) // 12MHz. from schematics. #define MCU_CLOCK XTAL(8'000'000) #define VID_CLOCK XTAL(21'477'272) @@ -341,7 +341,7 @@ private: void luckybal_state::main_map(address_map &map) { map(0x0000, 0xbfff).rom(); - map(0xc000, 0xdfff).bankr("bank1"); // Banked ROM. + map(0xc000, 0xdfff).bankr("bank1"); // Banked ROM. map(0xe000, 0xffff).ram().share("nvram"); // 6264 SRAM } @@ -394,12 +394,12 @@ WRITE8_MEMBER(luckybal_state::port90_bitswap_w) READ8_MEMBER(luckybal_state::ppi_bitswap_r) { - return bitswap<8>(m_ppi->read(space, offset), 6, 7, 4, 5, 2, 3, 0, 1); + return bitswap<8>(m_ppi->read(offset), 6, 7, 4, 5, 2, 3, 0, 1); } WRITE8_MEMBER(luckybal_state::ppi_bitswap_w) { - m_ppi->write(space, offset, bitswap<8>(data, 6, 7, 4, 5, 2, 3, 0, 1)); + m_ppi->write(offset, bitswap<8>(data, 6, 7, 4, 5, 2, 3, 0, 1)); } WRITE8_MEMBER(luckybal_state::output_port_a_w) @@ -428,21 +428,21 @@ WRITE8_MEMBER(luckybal_state::output_port_b_w) READ8_MEMBER(luckybal_state::input_port_c_r) { uint8_t mux_player, sel_line, bit5, bit6, bit7, ret; - sel_line = m_ppi->read_pb() & 0x7f; + sel_line = m_ppi->pb_r() & 0x7f; mux_player = m_latch[0]->output_state(); bit5 = BIT(m_aux->read(), sel_line & 0x07) ? 0xff : 0xdf; // Operator & Page. bit6 = 0xff; - for (int i = 0; 6 > i; ++i) - { - if (!BIT(mux_player, i) && !BIT(m_keymx[i]->read(), sel_line & 0x07)) // Player buttons. - bit6 &= 0xbf; - } + for (int i = 0; 6 > i; ++i) + { + if (!BIT(mux_player, i) && !BIT(m_keymx[i]->read(), sel_line & 0x07)) // Player buttons. + bit6 &= 0xbf; + } bit7 = BIT(m_dsw->read(), sel_line & 0x07) ? 0xff : 0x7f; // Dip Switch. - if ((sel_line & 0x07) == 6) m_lamps[37] = (bit5 == 0xff) ? 0 : 1; // Operator lamp. + if ((sel_line & 0x07) == 6) m_lamps[37] = (bit5 == 0xff) ? 0 : 1; // Operator lamp. ret = bit7 & bit6 & bit5; return ret; @@ -450,7 +450,7 @@ READ8_MEMBER(luckybal_state::input_port_c_r) WRITE8_MEMBER(luckybal_state::output_port_c_w) { -/* Writes 0xF0/0xF1 constantly at the begining... like a watchdog. +/* Writes 0xF0/0xF1 constantly at the begining... like a watchdog. After a while, just stop (when roulette LEDs are transmitted). */ } @@ -468,7 +468,7 @@ static INPUT_PORTS_START( luckybal ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(KEYCODE_Q) PORT_NAME("Player 1 - Bet") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_Z) PORT_NAME("Player 1 - Credits OUT") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1) PORT_CODE(KEYCODE_D) PORT_NAME("Player 1 - Right") - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) PORT_CODE(KEYCODE_S) PORT_NAME("Player 1 - Down") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) PORT_CODE(KEYCODE_S) PORT_NAME("Player 1 - Down") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) // 'Player 1 - Coins' in the schematics. Maybe for another game. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) PORT_CODE(KEYCODE_A) PORT_NAME("Player 1 - Left") @@ -478,7 +478,7 @@ static INPUT_PORTS_START( luckybal ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CODE(KEYCODE_R) PORT_NAME("Player 2 - Bet") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_X) PORT_NAME("Player 2 - Credits OUT") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) PORT_CODE(KEYCODE_H) PORT_NAME("Player 2 - Right") - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) PORT_CODE(KEYCODE_G) PORT_NAME("Player 2 - Down") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) PORT_CODE(KEYCODE_G) PORT_NAME("Player 2 - Down") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) // 'Player 2 - Coins' in the schematics. Maybe for another game. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) PORT_CODE(KEYCODE_F) PORT_NAME("Player 2 - Left") @@ -488,7 +488,7 @@ static INPUT_PORTS_START( luckybal ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_U) PORT_NAME("Player 3 - Bet") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_C) PORT_NAME("Player 3 - Credits OUT") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(3) PORT_CODE(KEYCODE_L) PORT_NAME("Player 3 - Right") - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(3) PORT_CODE(KEYCODE_K) PORT_NAME("Player 3 - Down") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(3) PORT_CODE(KEYCODE_K) PORT_NAME("Player 3 - Down") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) // 'Player 3 - Coins' in the schematics. Maybe for another game. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(3) PORT_CODE(KEYCODE_J) PORT_NAME("Player 3 - Left") @@ -498,7 +498,7 @@ static INPUT_PORTS_START( luckybal ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_CODE(KEYCODE_LALT) PORT_NAME("Player 4 - Bet") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_V) PORT_NAME("Player 4 - Credits OUT") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(4) PORT_CODE(KEYCODE_7) PORT_NAME("Player 4 - Right") - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(4) PORT_CODE(KEYCODE_PGDN) PORT_NAME("Player 4 - Down") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(4) PORT_CODE(KEYCODE_PGDN) PORT_NAME("Player 4 - Down") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) // 'Player 4 - Coins' in the schematics. Maybe for another game. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(4) PORT_CODE(KEYCODE_8) PORT_NAME("Player 4 - Left") @@ -508,7 +508,7 @@ static INPUT_PORTS_START( luckybal ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_LCONTROL) PORT_NAME("Player 5 - Bet") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_B) PORT_NAME("Player 5 - Credits OUT") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(5) PORT_CODE(KEYCODE_LEFT) PORT_NAME("Player 5 - Right") - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(5) PORT_CODE(KEYCODE_UP) PORT_NAME("Player 5 - Down") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(5) PORT_CODE(KEYCODE_UP) PORT_NAME("Player 5 - Down") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) // 'Player 5 - Coins' in the schematics. Maybe for another game. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(5) PORT_CODE(KEYCODE_RIGHT) PORT_NAME("Player 5 - Left") @@ -518,7 +518,7 @@ static INPUT_PORTS_START( luckybal ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("Player 6 - Bet") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_N) PORT_NAME("Player 6 - Credits OUT") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(6) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("Player 6 - Right") - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(6) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Player 6 - Down") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(6) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Player 6 - Down") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) // 'Player 6 - Coins' in the schematics. Maybe for another game. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(6) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("Player 6 - Left") @@ -673,17 +673,17 @@ void luckybal_state::init_luckybala() } /* The following patches are to avoid hardware verifications through - the unemulated synchronic serial comm of the z180... - */ - rom[0x571] = 0x68; //31 - rom[0x572] = 0xE8; //4C - rom[0x573] = 0x18; //42 - rom[0x574] = 0x98; //39 - rom[0x575] = 0x58; //36 - rom[0x16E1] = 0x0D; //OC - rom[0x1D65] = 0x0E; //0C - rom[0x4499] = 0x00; //FF <------- Checksum. - rom[0x4AB6] = 0xAF; //B9 + the unemulated synchronic serial comm of the z180... + */ + rom[0x571] = 0x68; //31 + rom[0x572] = 0xE8; //4C + rom[0x573] = 0x18; //42 + rom[0x574] = 0x98; //39 + rom[0x575] = 0x58; //36 + rom[0x16E1] = 0x0D; //OC + rom[0x1D65] = 0x0E; //0C + rom[0x4499] = 0x00; //FF <------- Checksum. + rom[0x4AB6] = 0xAF; //B9 membank("bank1")->configure_entries(0, 0x40, &rom[0x10000], 0x2000); } @@ -700,17 +700,17 @@ void luckybal_state::init_luckybald() } /* The following patches are to avoid hardware verifications through - the unemulated synchronic serial comm of the z180... - */ - rom[0x571] = 0x68; //31 - rom[0x572] = 0xE8; //4C - rom[0x573] = 0x18; //42 - rom[0x574] = 0x98; //39 - rom[0x575] = 0x58; //36 - rom[0x16C1] = 0x0D; //OC - rom[0x1D45] = 0x0E; //0C - rom[0x44A9] = 0x00; //FF <------- Checksum. - rom[0x4AC6] = 0xAF; //B9 + the unemulated synchronic serial comm of the z180... + */ + rom[0x571] = 0x68; //31 + rom[0x572] = 0xE8; //4C + rom[0x573] = 0x18; //42 + rom[0x574] = 0x98; //39 + rom[0x575] = 0x58; //36 + rom[0x16C1] = 0x0D; //OC + rom[0x1D45] = 0x0E; //0C + rom[0x44A9] = 0x00; //FF <------- Checksum. + rom[0x4AC6] = 0xAF; //B9 membank("bank1")->configure_entries(0, 0x40, &rom[0x10000], 0x2000); } diff --git a/src/mame/drivers/lynx.cpp b/src/mame/drivers/lynx.cpp index d75b0cfa5dd..5695d10e2c6 100644 --- a/src/mame/drivers/lynx.cpp +++ b/src/mame/drivers/lynx.cpp @@ -85,7 +85,7 @@ MACHINE_CONFIG_START(lynx_state::lynx) /* video hardware */ MCFG_SCREEN_ADD("screen", LCD) - MCFG_SCREEN_REFRESH_RATE(LCD_FRAMES_PER_SECOND) + MCFG_SCREEN_REFRESH_RATE(30) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ MCFG_SCREEN_UPDATE_DRIVER(lynx_state, screen_update) MCFG_SCREEN_SIZE(160, 102) diff --git a/src/mame/drivers/m20.cpp b/src/mame/drivers/m20.cpp index 12791412f7f..4a1c4f8124d 100644 --- a/src/mame/drivers/m20.cpp +++ b/src/mame/drivers/m20.cpp @@ -203,12 +203,12 @@ WRITE16_MEMBER(m20_state::port21_w) READ16_MEMBER(m20_state::m20_i8259_r) { - return m_i8259->read(space, offset)<<1; + return m_i8259->read(offset)<<1; } WRITE16_MEMBER(m20_state::m20_i8259_w) { - m_i8259->write(space, offset, (data>>1)); + m_i8259->write(offset, (data>>1)); } WRITE_LINE_MEMBER( m20_state::tty_clock_tick_w ) diff --git a/src/mame/drivers/m5.cpp b/src/mame/drivers/m5.cpp index a6b289916f4..3d9ee11c460 100644 --- a/src/mame/drivers/m5.cpp +++ b/src/mame/drivers/m5.cpp @@ -1411,7 +1411,7 @@ MACHINE_CONFIG_START(m5_state::m5) m_maincpu->set_addrmap(AS_IO, &m5_state::m5_io); m_maincpu->set_daisy_config(m5_daisy_chain); - MCFG_DEVICE_ADD(Z80_FD5_TAG, Z80, 14.318181_MHz_XTAL / 4) + MCFG_DEVICE_ADD(m_fd5cpu, Z80, 14.318181_MHz_XTAL / 4) MCFG_DEVICE_PROGRAM_MAP(fd5_mem) MCFG_DEVICE_IO_MAP(fd5_io) @@ -1443,8 +1443,8 @@ MACHINE_CONFIG_START(m5_state::m5) m_ppi->in_pc_callback().set(FUNC(m5_state::ppi_pc_r)); m_ppi->out_pc_callback().set(FUNC(m5_state::ppi_pc_w)); - MCFG_UPD765A_ADD(UPD765_TAG, true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE(Z80_FD5_TAG, INPUT_LINE_IRQ0)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_fd5cpu, INPUT_LINE_IRQ0); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", m5_floppies, "525dd", m5_state::floppy_formats) // cartridge @@ -1507,9 +1507,9 @@ MACHINE_CONFIG_START(brno_state::brno) //remove devices used for fd5 floppy - MCFG_DEVICE_REMOVE(Z80_FD5_TAG) - MCFG_DEVICE_REMOVE(I8255A_TAG) - MCFG_DEVICE_REMOVE(UPD765_TAG) + config.device_remove(Z80_FD5_TAG); + config.device_remove(I8255A_TAG); + config.device_remove(UPD765_TAG); // video hardware tms9929a_device &vdp(TMS9929A(config, "tms9928a", 10.738635_MHz_XTAL)); diff --git a/src/mame/drivers/m72.cpp b/src/mame/drivers/m72.cpp index 3bab6823a37..ef60eed7877 100644 --- a/src/mame/drivers/m72.cpp +++ b/src/mame/drivers/m72.cpp @@ -2111,13 +2111,13 @@ MACHINE_CONFIG_START(m72_state::poundfor) MCFG_DEVICE_ADD("upd71059c", PIC8259, 0) MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0)) - MCFG_DEVICE_ADD("upd4701l", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK0_X") - MCFG_UPD4701_PORTY("TRACK0_Y") + UPD4701A(config, m_upd4701[0]); + m_upd4701[0]->set_portx_tag("TRACK0_X"); + m_upd4701[0]->set_porty_tag("TRACK0_Y"); - MCFG_DEVICE_ADD("upd4701h", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK1_X") - MCFG_UPD4701_PORTY("TRACK1_Y") + UPD4701A(config, m_upd4701[1]); + m_upd4701[1]->set_portx_tag("TRACK1_X"); + m_upd4701[1]->set_porty_tag("TRACK1_Y"); /* video hardware */ MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_rtype2) @@ -3484,7 +3484,7 @@ ROM_START( rtype2j ) ROM_REGION( 0x0200, "proms", 0 ) /* located on M84-B-A */ ROM_LOAD( "rt2_b-4n-.bin", 0x0000, 0x0100, CRC(b460c438) SHA1(00e20cf754b6fd5138ee4d2f6ec28dff9e292fe6) ) ROM_LOAD( "rt2_b-4p-.bin", 0x0100, 0x0100, CRC(a4f2c4bc) SHA1(f13b0a4b52dcc6704063b676f09d83dcba170133) ) - + /* stuff below isn't used but loaded because it was on the board .. */ ROM_REGION( 0x0800, "plds", 0 ) ROM_LOAD( "rt2-a-2h-.5", 0x0000, 0x0104, NO_DUMP ) // TIBPAL-16L8-25 diff --git a/src/mame/drivers/magicard.cpp b/src/mame/drivers/magicard.cpp index 8039b842de8..55fb5edb424 100644 --- a/src/mame/drivers/magicard.cpp +++ b/src/mame/drivers/magicard.cpp @@ -1010,7 +1010,8 @@ MACHINE_CONFIG_START(magicard_state::magicard) MCFG_SCREEN_UPDATE_DRIVER(magicard_state, screen_update_magicard) MCFG_PALETTE_ADD("palette", 0x100) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &magicard_state::ramdac_map); SPEAKER(config, "mono").front_center(); MCFG_DEVICE_ADD("saa", SAA1099, CLOCK_B) diff --git a/src/mame/drivers/mainevt.cpp b/src/mame/drivers/mainevt.cpp index 6bb8666686f..94b5cd148fb 100644 --- a/src/mame/drivers/mainevt.cpp +++ b/src/mame/drivers/mainevt.cpp @@ -767,8 +767,8 @@ GAME( 1988, mainevt, 0, mainevt, mainevt, mainevt_state, empty_ini GAME( 1988, mainevto, mainevt, mainevt, mainevt, mainevt_state, empty_init, ROT0, "Konami", "The Main Event (4 Players ver. F)", MACHINE_SUPPORTS_SAVE ) GAME( 1988, mainevt2p, mainevt, mainevt, mainev2p, mainevt_state, empty_init, ROT0, "Konami", "The Main Event (2 Players ver. X)", MACHINE_SUPPORTS_SAVE ) GAME( 1988, ringohja, mainevt, mainevt, mainev2p, mainevt_state, empty_init, ROT0, "Konami", "Ring no Ohja (Japan 2 Players ver. N)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, devstors, 0, devstors, devstors, mainevt_state, empty_init, ROT90, "Konami", "Devastators (ver. Z)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, devstorsx, devstors, devstors, devstors_ct, mainevt_state, empty_init, ROT90, "Konami", "Devastators (ver. X)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, devstorsv, devstors, devstors, devstors, mainevt_state, empty_init, ROT90, "Konami", "Devastators (ver. V)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, devstors2, devstors, devstors, devstors_ct, mainevt_state, empty_init, ROT90, "Konami", "Devastators (ver. 2)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, garuka, devstors, devstors, devstors_ct, mainevt_state, empty_init, ROT90, "Konami", "Garuka (Japan ver. W)", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, devstors, 0, devstors, devstors, mainevt_state, empty_init, ROT90, "Konami", "Devastators (ver. Z)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION ) +GAME( 1988, devstorsx, devstors, devstors, devstors_ct, mainevt_state, empty_init, ROT90, "Konami", "Devastators (ver. X)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION ) +GAME( 1988, devstorsv, devstors, devstors, devstors, mainevt_state, empty_init, ROT90, "Konami", "Devastators (ver. V)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION ) +GAME( 1988, devstors2, devstors, devstors, devstors_ct, mainevt_state, empty_init, ROT90, "Konami", "Devastators (ver. 2)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION ) +GAME( 1988, garuka, devstors, devstors, devstors_ct, mainevt_state, empty_init, ROT90, "Konami", "Garuka (Japan ver. W)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION ) diff --git a/src/mame/drivers/marywu.cpp b/src/mame/drivers/marywu.cpp index 00cac9256d4..a1d7aed0d4a 100644 --- a/src/mame/drivers/marywu.cpp +++ b/src/mame/drivers/marywu.cpp @@ -194,9 +194,9 @@ MACHINE_CONFIG_START(marywu_state::marywu) //TODO: figure out what each bit is mapped to in the 80c31 ports P1 and P3 /* Keyboard & display interface */ - i8279_device &kbdc(I8279(config, "i8279", XTAL(10'738'635))); // should it be perhaps a fraction of the XTAL clock ? - kbdc.out_sl_callback().set(FUNC(marywu_state::multiplex_7seg_w)); // select block of 7seg modules by multiplexing the SL scan lines - kbdc.in_rl_callback().set(FUNC(marywu_state::keyboard_r)); // keyboard Return Lines + i8279_device &kbdc(I8279(config, "i8279", XTAL(10'738'635))); // should it be perhaps a fraction of the XTAL clock ? + kbdc.out_sl_callback().set(FUNC(marywu_state::multiplex_7seg_w)); // select block of 7seg modules by multiplexing the SL scan lines + kbdc.in_rl_callback().set(FUNC(marywu_state::keyboard_r)); // keyboard Return Lines kbdc.out_disp_callback().set(FUNC(marywu_state::display_7seg_data_w)); /* Video */ diff --git a/src/mame/drivers/maygay1b.cpp b/src/mame/drivers/maygay1b.cpp index c1ae852cbfd..aea38b6aac5 100644 --- a/src/mame/drivers/maygay1b.cpp +++ b/src/mame/drivers/maygay1b.cpp @@ -811,16 +811,16 @@ MACHINE_CONFIG_START(maygay1b_state::maygay_m1) MCFG_TIMER_DRIVER_ADD_PERIODIC("nmitimer", maygay1b_state, maygay1b_nmitimer_callback, attotime::from_hz(75)) // freq? - i8279_device &kbdc(I8279(config, "i8279", M1_MASTER_CLOCK/4)); // unknown clock - kbdc.out_sl_callback().set(FUNC(maygay1b_state::scanlines_w)); // scan SL lines - kbdc.out_disp_callback().set(FUNC(maygay1b_state::lamp_data_w)); // display A&B - kbdc.in_rl_callback().set(FUNC(maygay1b_state::kbd_r)); // kbd RL lines + i8279_device &kbdc(I8279(config, "i8279", M1_MASTER_CLOCK/4)); // unknown clock + kbdc.out_sl_callback().set(FUNC(maygay1b_state::scanlines_w)); // scan SL lines + kbdc.out_disp_callback().set(FUNC(maygay1b_state::lamp_data_w)); // display A&B + kbdc.in_rl_callback().set(FUNC(maygay1b_state::kbd_r)); // kbd RL lines #ifndef USE_MCU // on M1B there is a 2nd i8279, on M1 / M1A a 8051 handles this task! - i8279_device &kbdc2(I8279(config, "i8279_2", M1_MASTER_CLOCK/4)); // unknown clock - kbdc2.out_sl_callback().set(FUNC(maygay1b_state::scanlines_2_w)); // scan SL lines - kbdc2.out_disp_callback().set(FUNC(maygay1b_state::lamp_data_2_w)); // display A&B + i8279_device &kbdc2(I8279(config, "i8279_2", M1_MASTER_CLOCK/4)); // unknown clock + kbdc2.out_sl_callback().set(FUNC(maygay1b_state::scanlines_2_w)); // scan SL lines + kbdc2.out_disp_callback().set(FUNC(maygay1b_state::lamp_data_2_w)); // display A&B #endif MCFG_DEVICE_ADD("reel0", REEL, STARPOINT_48STEP_REEL, 1, 3, 0x09, 4) diff --git a/src/mame/drivers/maygay1b.hxx b/src/mame/drivers/maygay1b.hxx index 31da295f939..44a5d9c3f2c 100644 --- a/src/mame/drivers/maygay1b.hxx +++ b/src/mame/drivers/maygay1b.hxx @@ -10,7 +10,7 @@ YM2419s and even AY8930s. some of the sound roms we have look more like uPD7749 ones? did some - ROM boards use that instead? + third party ROM boards use that instead? typically games with a single sound rom appear to be uPD7749 whereas the ones with a u2/u3 combo are MSM6376 diff --git a/src/mame/drivers/maygayv1.cpp b/src/mame/drivers/maygayv1.cpp index fb07a7e9cc6..141a82de1e6 100644 --- a/src/mame/drivers/maygayv1.cpp +++ b/src/mame/drivers/maygayv1.cpp @@ -914,10 +914,10 @@ MACHINE_CONFIG_START(maygayv1_state::maygayv1) MCFG_MC68681_IRQ_CALLBACK(WRITELINE(*this, maygayv1_state, duart_irq_handler)) MCFG_MC68681_A_TX_CALLBACK(WRITELINE(*this, maygayv1_state, duart_txa)) - i8279_device &kbdc(I8279(config, "i8279", MASTER_CLOCK/4)); // unknown clock - kbdc.out_sl_callback().set(FUNC(maygayv1_state::strobe_w)); // scan SL lines - kbdc.out_disp_callback().set(FUNC(maygayv1_state::lamp_data_w)); // display A&B - kbdc.in_rl_callback().set(FUNC(maygayv1_state::kbd_r)); // kbd RL lines + i8279_device &kbdc(I8279(config, "i8279", MASTER_CLOCK/4)); // unknown clock + kbdc.out_sl_callback().set(FUNC(maygayv1_state::strobe_w)); // scan SL lines + kbdc.out_disp_callback().set(FUNC(maygayv1_state::lamp_data_w)); // display A&B + kbdc.in_rl_callback().set(FUNC(maygayv1_state::kbd_r)); // kbd RL lines SPEAKER(config, "mono").front_center(); diff --git a/src/mame/drivers/mbc200.cpp b/src/mame/drivers/mbc200.cpp index bcb7bd74dd4..9038c0eb99e 100644 --- a/src/mame/drivers/mbc200.cpp +++ b/src/mame/drivers/mbc200.cpp @@ -151,13 +151,11 @@ void mbc200_state::mbc200_io(address_map &map) { map.unmap_value_high(); map.global_mask(0xff); - //AM_RANGE(0xe0, 0xe0) AM_DEVREADWRITE("uart1", i8251_device, data_r, data_w) - //AM_RANGE(0xe1, 0xe1) AM_DEVREADWRITE("uart1", i8251_device, status_r, control_w) + //map(0xe0, 0xe1).rw("uart1", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xe0, 0xe1).r(FUNC(mbc200_state::keyboard_r)).nopw(); map(0xe4, 0xe7).rw(m_fdc, FUNC(mb8876_device::read), FUNC(mb8876_device::write)); map(0xe8, 0xeb).rw(m_ppi_m, FUNC(i8255_device::read), FUNC(i8255_device::write)); - map(0xec, 0xec).rw("uart2", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xed, 0xed).rw("uart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xec, 0xed).rw("uart2", FUNC(i8251_device::read), FUNC(i8251_device::write)); } diff --git a/src/mame/drivers/mc1502.cpp b/src/mame/drivers/mc1502.cpp index 72bbcb21df6..8c3c7d3cd6c 100644 --- a/src/mame/drivers/mc1502.cpp +++ b/src/mame/drivers/mc1502.cpp @@ -219,8 +219,7 @@ void mc1502_state::mc1502_map(address_map &map) void mc1502_state::mc1502_io(address_map &map) { map(0x0020, 0x0021).rw(m_pic8259, FUNC(pic8259_device::read), FUNC(pic8259_device::write)); - map(0x0028, 0x0028).rw(m_upd8251, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x0029, 0x0029).rw(m_upd8251, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x0028, 0x0029).rw(m_upd8251, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x0040, 0x0043).rw(m_pit8253, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0x0060, 0x0063).rw(m_ppi8255n1, FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x0068, 0x006B).rw(m_ppi8255n2, FUNC(i8255_device::read), FUNC(i8255_device::write)); // keyboard poll diff --git a/src/mame/drivers/mediagx.cpp b/src/mame/drivers/mediagx.cpp index ea2bf537ca8..a6460ad57af 100644 --- a/src/mame/drivers/mediagx.cpp +++ b/src/mame/drivers/mediagx.cpp @@ -898,7 +898,8 @@ MACHINE_CONFIG_START(mediagx_state::mediagx) MCFG_TIMER_DRIVER_ADD("sound_timer", mediagx_state, sound_timer_callback) - MCFG_RAMDAC_ADD(m_ramdac, ramdac_map, "palette") + RAMDAC(config, m_ramdac, 0, m_palette); + m_ramdac->set_addrmap(0, &mediagx_state::ramdac_map); /* video hardware */ MCFG_SCREEN_ADD(m_screen, RASTER) diff --git a/src/mame/drivers/meritum.cpp b/src/mame/drivers/meritum.cpp index 94ef2df1218..84bd6e27743 100644 --- a/src/mame/drivers/meritum.cpp +++ b/src/mame/drivers/meritum.cpp @@ -110,8 +110,7 @@ void meritum_state::io_map(address_map &map) map(0xf0, 0xf3).rw("flopppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0xf4, 0xf7).rw("mainppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0xf8, 0xfb).rw("mainpit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)); - map(0xfc, 0xfc).rw("usart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xfd, 0xfd).rw("usart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xfc, 0xfd).rw("usart", FUNC(i8251_device::read), FUNC(i8251_device::write)); // map(0xfe, 0xfe) audio interface map(0xff, 0xff).rw(FUNC(meritum_state::port_ff_r), FUNC(meritum_state::port_ff_w)); } diff --git a/src/mame/drivers/metro.cpp b/src/mame/drivers/metro.cpp index 0ae0ebbea43..4ec8f31ea33 100644 --- a/src/mame/drivers/metro.cpp +++ b/src/mame/drivers/metro.cpp @@ -1142,12 +1142,6 @@ void metro_state::mouja_okimap(address_map &map) Puzzlet ***************************************************************************/ -#define MCFG_PUZZLET_IO_ADD(_tag) \ - MCFG_DEVICE_ADD(_tag, PUZZLET_IO, 0) - -#define MCFG_PUZZLET_IO_DATA_CALLBACK(_devcb) \ - puzzlet_io_device::set_data_cb(*device, DEVCB_##_devcb); - class puzzlet_io_device : public device_t { public: puzzlet_io_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -1155,7 +1149,7 @@ public: DECLARE_WRITE_LINE_MEMBER( ce_w ); DECLARE_WRITE_LINE_MEMBER( clk_w ); - template <class Object> static devcb_base &set_data_cb(device_t &device, Object &&cb) { return downcast<puzzlet_io_device &>(device).data_cb.set_callback(std::forward<Object>(cb)); } + auto data_callback() { return data_cb.bind(); } protected: virtual void device_start() override; @@ -3805,8 +3799,8 @@ MACHINE_CONFIG_START(metro_state::puzzlet) MCFG_DEVICE_IO_MAP(puzzlet_io_map) /* Coins/service */ - MCFG_PUZZLET_IO_ADD("coins") - MCFG_PUZZLET_IO_DATA_CALLBACK(WRITELINE("maincpu:sci1", h8_sci_device, rx_w)) + puzzlet_io_device &coins(PUZZLET_IO(config, "coins", 0)); + coins.data_callback().set("maincpu:sci1", FUNC(h8_sci_device::rx_w)); MCFG_DEVICE_MODIFY("maincpu:sci1") MCFG_H8_SCI_TX_CALLBACK(WRITELINE("coins", puzzlet_io_device, ce_w)) MCFG_H8_SCI_CLK_CALLBACK(WRITELINE("coins", puzzlet_io_device, clk_w)) diff --git a/src/mame/drivers/mfabfz.cpp b/src/mame/drivers/mfabfz.cpp index 0c9b3aa76f9..fd2c520e10b 100644 --- a/src/mame/drivers/mfabfz.cpp +++ b/src/mame/drivers/mfabfz.cpp @@ -78,18 +78,15 @@ void mfabfz_state::mfabfz_io(address_map &map) { map.unmap_value_high(); map.global_mask(0xff); - map(0xbe, 0xbe).rw("uart1", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xbf, 0xbf).rw("uart1", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xfe, 0xfe).rw("uart2", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xff, 0xff).rw("uart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xbe, 0xbf).rw("uart1", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0xfe, 0xff).rw("uart2", FUNC(i8251_device::read), FUNC(i8251_device::write)); } void mfabfz_state::mfabfz85_io(address_map &map) { map.unmap_value_high(); map.global_mask(0xff); - map(0xfe, 0xfe).rw("uart2", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xff, 0xff).rw("uart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xfe, 0xff).rw("uart2", FUNC(i8251_device::read), FUNC(i8251_device::write)); } /* Input ports */ diff --git a/src/mame/drivers/mice.cpp b/src/mame/drivers/mice.cpp index 6a49a3e5f0c..4159256be1f 100644 --- a/src/mame/drivers/mice.cpp +++ b/src/mame/drivers/mice.cpp @@ -69,8 +69,7 @@ void mice_state::mice_io(address_map &map) { map.unmap_value_high(); map.global_mask(0xff); - map(0x50, 0x50).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x51, 0x51).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x50, 0x51).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x60, 0x67).rw("rpt", FUNC(i8155_device::io_r), FUNC(i8155_device::io_w)); map(0x70, 0x73).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); } @@ -88,8 +87,7 @@ void mice_state::mice2_io(address_map &map) { map.unmap_value_high(); map.global_mask(0xff); - map(0x80, 0x80).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x81, 0x81).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x80, 0x81).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x90, 0x97).rw("rpt", FUNC(i8155_device::io_r), FUNC(i8155_device::io_w)); map(0xa0, 0xa3).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0xc0, 0xc3).rw("rttppi1", FUNC(i8255_device::read), FUNC(i8255_device::write)); diff --git a/src/mame/drivers/microdec.cpp b/src/mame/drivers/microdec.cpp index bd1cfb699a9..f8a3d10e8eb 100644 --- a/src/mame/drivers/microdec.cpp +++ b/src/mame/drivers/microdec.cpp @@ -142,10 +142,8 @@ void microdec_state::microdec_io(address_map &map) map(0xf7, 0xf7).rw(FUNC(microdec_state::portf7_r), FUNC(microdec_state::portf7_w)); map(0xf8, 0xf8).w(FUNC(microdec_state::portf8_w)); map(0xfa, 0xfb).m(m_fdc, FUNC(upd765a_device::map)); - map(0xfc, 0xfc).rw("uart1", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xfd, 0xfd).rw("uart1", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xfe, 0xfe).rw("uart2", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xff, 0xff).rw("uart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xfc, 0xfd).rw("uart1", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0xfe, 0xff).rw("uart2", FUNC(i8251_device::read), FUNC(i8251_device::write)); // AM_RANGE(0xf0, 0xf3) 8253 PIT (md3 only) used as a baud rate generator for serial ports // AM_RANGE(0xf4, 0xf4) Centronics data // AM_RANGE(0xf5, 0xf5) motor check (md1/2) diff --git a/src/mame/drivers/midwunit.cpp b/src/mame/drivers/midwunit.cpp index c762e3a4cdd..d29a9971081 100644 --- a/src/mame/drivers/midwunit.cpp +++ b/src/mame/drivers/midwunit.cpp @@ -17,9 +17,12 @@ * WWF Wrestlemania * Rampage World Tour - Known bugs: + TODO: * WWF has an unimplemented and not Y2K compatible real-time clock + BTANB: + * umk3 Scorpion's "Get Over Here" sample gets cut off, ROM dumps confirmed good + NOTE: There is known to exist (currently not dumped) a Wrestlemania PCB with the following labels: Wrestlemania 1.0 U63 #8549 & Wrestlemania 1.0 U54 #40C7 @@ -1435,9 +1438,9 @@ GAME( 1994, mk3r20, mk3, wunit_picsim, mk3, midwunit_state, init_mk GAME( 1994, mk3r10, mk3, wunit_picsim, mk3, midwunit_state, init_mk3r10, ROT0, "Midway", "Mortal Kombat 3 (rev 1.0)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, mk3p40, mk3, wunit_picsim, mk3, midwunit_state, init_mk3r10, ROT0, "Midway", "Mortal Kombat 3 (rev 1 chip label p4.0)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, umk3, 0, wunit_picemu, mk3, midwunit_state, init_umk3, ROT0, "Midway", "Ultimate Mortal Kombat 3 (rev 1.2)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) -GAME( 1994, umk3r11, umk3, wunit_picemu, mk3, midwunit_state, init_umk3r11, ROT0, "Midway", "Ultimate Mortal Kombat 3 (rev 1.1)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) -GAME( 1994, umk3r10, umk3, wunit_picemu, mk3, midwunit_state, init_umk3r11, ROT0, "Midway", "Ultimate Mortal Kombat 3 (rev 1.0)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 1994, umk3, 0, wunit_picemu, mk3, midwunit_state, init_umk3, ROT0, "Midway", "Ultimate Mortal Kombat 3 (rev 1.2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, umk3r11, umk3, wunit_picemu, mk3, midwunit_state, init_umk3r11, ROT0, "Midway", "Ultimate Mortal Kombat 3 (rev 1.1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, umk3r10, umk3, wunit_picemu, mk3, midwunit_state, init_umk3r11, ROT0, "Midway", "Ultimate Mortal Kombat 3 (rev 1.0)", MACHINE_SUPPORTS_SAVE ) // Ultimate Mortal Kombat 3 rev 2.0.35 (TE? Hack?) version known to exist GAME( 1995, wwfmania, 0, wunit_picsim, wwfmania, midwunit_state, init_wwfmania, ROT0, "Midway", "WWF: Wrestlemania (rev 1.30 08/10/95)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/mikromik.cpp b/src/mame/drivers/mikromik.cpp index b1df94bccd8..96d9a72381c 100644 --- a/src/mame/drivers/mikromik.cpp +++ b/src/mame/drivers/mikromik.cpp @@ -102,7 +102,7 @@ READ8_MEMBER( mm1_state::read ) break; case 3: - data = m_pit->read(space, offset & 0x03); + data = m_pit->read(offset & 0x03); break; case 4: @@ -171,7 +171,7 @@ WRITE8_MEMBER( mm1_state::write ) break; case 3: - m_pit->write(space, offset & 0x03, data); + m_pit->write(offset & 0x03, data); break; case 4: @@ -490,9 +490,9 @@ MACHINE_CONFIG_START(mm1_state::mm1) m_pit->set_clk<2>(6.144_MHz_XTAL/2/2); m_pit->out_handler<2>().set(FUNC(mm1_state::auxc_w)); - MCFG_UPD765A_ADD(UPD765_TAG, /* 16_MHz_XTAL/2/2 */ true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE(I8085A_TAG, I8085_RST55_LINE)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(I8237_TAG, am9517a_device, dreq3_w)) + UPD765A(config, m_fdc, /* 16_MHz_XTAL/2/2, */ true, true); + m_fdc->intrq_wr_callback().set_inputline(m_maincpu, I8085_RST55_LINE); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq3_w)); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", mm1_floppies, "525qd", mm1_state::floppy_formats) MCFG_FLOPPY_DRIVE_SOUND(true) MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", mm1_floppies, "525qd", mm1_state::floppy_formats) diff --git a/src/mame/drivers/mips.cpp b/src/mame/drivers/mips.cpp new file mode 100644 index 00000000000..2a184bf2af6 --- /dev/null +++ b/src/mame/drivers/mips.cpp @@ -0,0 +1,303 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +/* + * An emulation of systems designed and manufactured by MIPS Computer Systems, + * all of which use MIPS R2000, R3000 or R6000 CPUs, and run the RISC/os + * operating system. + * + * This driver is intended to eventually cover the following models: + * + * Name CPU Clock Slots Disk Package Other + * M/500 R2000 5MHz VME ESDI + * M/800 R2000 8MHz VME ESDI + * M/1000 R2000 10MHz VME ESDI + * M/120-3 R2000 12MHz PC-AT SCSI Deskside + * M/120-5 R2000 16MHz PC-AT SCSI Deskside + * M/2000-6 R3000 20MHz VMEx13 SMD Rack Cabinet + * M/2000-8 R3000 25MHz VMEx13 SMD Rack Cabinet + * RC2030 R2000 16MHz SCSI Desktop + * RS2030 R2000 16MHz SCSI Desktop aka M/12 + * RC3230 R3000 25MHz PC-ATx1 SCSI Desktop + * RS3230 R3000 25MHz PC-ATx1 SCSI Desktop aka M/20, Magnum 3000 + * RC3240 R3000 20MHz PC-ATx4 SCSI Deskside M/120 with CPU-board upgrade + * RC3330 R3000 33MHz PC-AT SCSI Desktop + * RS3330 R3000 33MHz PC-AT SCSI Desktop + * RC3260 R3000 25MHz VMEx7 SCSI Pedestal + * RC3360 R3000 33MHz VME SCSI Pedestal + * RC6260 R6000 66MHz VME SCSI Pedestal + * RC6280 R6000 66MHz VMEx6 SMD Data Center + * RC6380-100 R6000x1 66MHz VME SMD Data Center + * RC6380-200 R6000x2 66MHz VME SMD Data Center + * RC6380-400 R6000x4 66MHz VME SMD Data Center + * + * Sources: + * + * http://www.umips.net/ + * http://www.geekdot.com/the-mips-rs2030/ + * http://www.jp.netbsd.org/ports/mipsco/models.html + * + * TODO + * - everything (skeleton only) + * + * Ref Part Function + * + * System board: + * + * Video board: + * + */ +/* + * WIP notes + * + * nvram must be prepped with 0x74, 0x61 or 0x31 at offset 0x29 + * + * Currently fails during IOP address path diagnostic. Bypass with: + * bp f7c51; g + * pc=f7c54; aw=0; g + * + * V50 internal peripherals: + * base = 0xfe00 + * serial (sula): fe00 + * timer (tula): fe08 + * int (iula): fe10 + * dma (dula): fe20 - unimplemented in uPD71037 mode (sctl & 2) + * + */ + +#include "emu.h" + +#include "includes/mips.h" + +#include "debugger.h" + +#define VERBOSE 0 +#include "logmacro.h" + +void rx2030_state::machine_start() +{ +} + +void rx2030_state::machine_reset() +{ +} + +void rx2030_state::rx2030_init() +{ + // map the configured ram and vram + m_maincpu->space(0).install_ram(0x00000000, 0x00000000 | m_ram->mask(), m_ram->pointer()); + + if (m_vram) + m_maincpu->space(0).install_ram(0x01000000, 0x01000000 | m_vram->mask(), m_vram->pointer()); +} + +void rx2030_state::iop_program_map(address_map &map) +{ + map(0x00000, 0x1ffff).ram(); + + map(0x20000, 0xbffff).lrw16("shared", + [this](offs_t offset, u16 mem_mask) + { + offs_t const address = 0x1000 + (offset << 1); + + u16 const data = (m_ram->read(address + 1) << 8) | m_ram->read(address + 0); + //logerror("shared_r 0x%04x data 0x%04x mask 0x%04x\n", address, data, mem_mask); + return data; + }, + [this](offs_t offset, u16 data, u16 mem_mask) + { + offs_t const address = 0x1000 + (offset << 1); + + //logerror("shared_w 0x%04x data 0x%04x mask 0x%04x\n", address, data, mem_mask); + m_ram->write(address + 0, data); + m_ram->write(address + 1, data >> 8); + }); + map(0xc0000, 0xfffff).rom().region("eprom", 0); +} + +void rx2030_state::iop_io_map(address_map &map) +{ + // 0x180-18a ? .umask16(0xff) + // 0x1c0 ? + // 0x044 + // 0x2c0 + + map(0x0000, 0x003f).lrw16("mmu", + [this](offs_t offset, u16 mem_mask) + { + return m_mmu[offset]; + }, + [this](offs_t offset, u16 data, u16 mem_mask) + { + //logerror("mmu_w %d data 0x%04x\n", offset, data); + + m_mmu[offset] = data; + }); + + map(0x00c0, 0x00c1).rw(m_kbdc, FUNC(at_keyboard_controller_device::data_r), FUNC(at_keyboard_controller_device::data_w)).umask16(0xff); + map(0x00c4, 0x00c5).rw(m_kbdc, FUNC(at_keyboard_controller_device::status_r), FUNC(at_keyboard_controller_device::command_w)).umask16(0xff); + + map(0x0080, 0x0083).rw(m_scsi, FUNC(wd33c93_device::read), FUNC(wd33c93_device::write)).umask16(0xff); + + map(0x0100, 0x0107).rw(m_scc, FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w)).umask16(0xff); + map(0x0140, 0x0143).rw(m_net, FUNC(am7990_device::regs_r), FUNC(am7990_device::regs_w)); + //map(0x0200, 0x0203).rw(m_lpt, FUNC(::read), FUNC(::write)); + + map(0x0240, 0x0241).lw8("rtc", [this](address_space &space, offs_t offset, u8 data) { m_rtc->write(space, 0, data); }).umask16(0xff00); + map(0x0280, 0x0281).lrw8("rtc", + [this](address_space &space, offs_t offset) { return m_rtc->read(space, 1); }, + [this](address_space &space, offs_t offset, u8 data) { m_rtc->write(space, 1, data); }).umask16(0xff00); + + map(0x0380, 0x0381).lw8("led", [this](u8 data) { logerror("led_w 0x%02x\n", data); }).umask16(0xff00); +} + +void rx2030_state::cpu_map(address_map &map) +{ + //map(0x01ff0000, 0x01ffffff).m() // ramdac + //map(0x1fc00000, 0x1fc3ffff).rom().region("eprom", 0); + + //map(0x10003000, 0x1003ffff).rom().region("eprom", 0); // mirror? +} + +void rx2030_state::rx2030(machine_config &config) +{ + // FIXME: main cpu disabled for now + R2000(config, m_maincpu, 16.6698_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &rx2030_state::cpu_map); + m_maincpu->in_brcond0().set([]() { return ASSERT_LINE; }); + m_maincpu->set_disable(); + + // TODO: mouse connects to v50 serial? + V53(config, m_iop, 20_MHz_XTAL / 2); + m_iop->set_addrmap(AS_PROGRAM, &rx2030_state::iop_program_map); + m_iop->set_addrmap(AS_IO, &rx2030_state::iop_io_map); + + RAM(config, m_ram); + m_ram->set_default_size("16M"); + m_ram->set_extra_options("4M,8M,12M"); + m_ram->set_default_value(0); + + // rtc and nvram + MC146818(config, m_rtc, 32.768_kHz_XTAL); + + // TODO: ethernet id prom + // TODO: parallel port + + // keyboard + pc_kbdc_device &kbdc(PC_KBDC(config, "pc_kbdc", 0)); + kbdc.out_clock_cb().set(m_kbdc, FUNC(at_keyboard_controller_device::kbd_clk_w)); + kbdc.out_data_cb().set(m_kbdc, FUNC(at_keyboard_controller_device::kbd_data_w)); + + PC_KBDC_SLOT(config, m_kbd, 0); + pc_at_keyboards(*m_kbd); + m_kbd->set_pc_kbdc_slot(&kbdc); + + AT_KEYBOARD_CONTROLLER(config, m_kbdc, 12_MHz_XTAL); + //m_kbdc->hot_res().set_inputline(m_maincpu, INPUT_LINE_RESET); + m_kbdc->kbd_clk().set(kbdc, FUNC(pc_kbdc_device::clock_write_from_mb)); + m_kbdc->kbd_data().set(kbdc, FUNC(pc_kbdc_device::data_write_from_mb)); + + // TODO: verify scc device and clock + SCC85C30(config, m_scc, 4.9152_MHz_XTAL); + m_scc->configure_channels(1'843'200, 1'843'200, 1'843'200, 1'843'200); + //m_scc->out_int_callback().set(m_iop, FUNC(v53_device::intp1_w)); + + // scc channel A (tty0) + RS232_PORT(config, m_tty[0], default_rs232_devices, nullptr); + m_tty[0]->cts_handler().set(m_scc, FUNC(z80scc_device::ctsa_w)); + m_tty[0]->dcd_handler().set(m_scc, FUNC(z80scc_device::dcda_w)); + m_tty[0]->rxd_handler().set(m_scc, FUNC(z80scc_device::rxa_w)); + m_scc->out_rtsa_callback().set(m_tty[0], FUNC(rs232_port_device::write_rts)); + m_scc->out_txda_callback().set(m_tty[0], FUNC(rs232_port_device::write_txd)); + //m_scc->out_wreqa_callback().set(m_ioga, FUNC(interpro_ioga_device::drq_serial1)).invert(); + + // scc channel B (tty1) + RS232_PORT(config, m_tty[1], default_rs232_devices, nullptr); + m_tty[1]->cts_handler().set(m_scc, FUNC(z80scc_device::ctsb_w)); + m_tty[1]->dcd_handler().set(m_scc, FUNC(z80scc_device::dcdb_w)); + m_tty[1]->rxd_handler().set(m_scc, FUNC(z80scc_device::rxb_w)); + m_scc->out_rtsb_callback().set(m_tty[1], FUNC(rs232_port_device::write_rts)); + m_scc->out_txdb_callback().set(m_tty[1], FUNC(rs232_port_device::write_txd)); + //m_scc->out_wreqb_callback().set(m_ioga, FUNC(interpro_ioga_device::drq_serial2)).invert(); + + // floppy controller and drive + WD37C65C(config, m_fdc, 16_MHz_XTAL); + //m_fdc->intrq_wr_callback().set(m_mct_adr, FUNC(jazz_mct_adr_device::irq<1>)); + //m_fdc->drq_wr_callback().set(m_mct_adr, FUNC(jazz_mct_adr_device::drq<1>)); + FLOPPY_CONNECTOR(config, "fdc:0", "35hd", FLOPPY_35_HD, true, &FLOPPY_PC_FORMAT).enable_sound(false); + //m_mct_adr->dma_r_cb<1>().set(m_fdc, FUNC(n82077aa_device::dma_r)); + //m_mct_adr->dma_w_cb<1>().set(m_fdc, FUNC(n82077aa_device::dma_w)); + + // scsi controller and port + scsi_port_device &scsi_port(SCSI_PORT(config, "scsi_port")); + WD33C93(config, m_scsi); + m_scsi->set_scsi_port(scsi_port); + //m_scsi->irq_cb().set_inputline() + + // ethernet + AM7990(config, m_net); + //m_net->dma_in().set(FUNC(rx2030_state::lance_dma_r)); + //m_net->dma_out().set(FUNC(rx2030_state::lance_dma_w)); +} + +void rx2030_state::rc2030(machine_config &config) +{ + rx2030(config); + + // no keyboard + m_kbd->set_default_option(nullptr); + + m_tty[1]->set_default_option("terminal"); +} + +void rx2030_state::rs2030(machine_config &config) +{ + rx2030(config); + + m_kbd->set_default_option(STR_KBD_MICROSOFT_NATURAL); + + // video hardware (1280x1024x8bpp @ 60Hz), 40 parts vram + const u32 pixclock = 108'189'000; + + // timing from VESA 1280x1024 @ 60Hz + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_raw(pixclock, 1688, 248, 1528, 1066, 38, 1062); + m_screen->set_screen_update(FUNC(rx2030_state::screen_update)); + m_screen->screen_vblank().set([](int state) {}); + + BT458(config, m_ramdac, pixclock); + RAM(config, m_vram, 0).set_default_size("2M"); +} + +u32 rx2030_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + u8 *pixel_data = m_vram->pointer(); + + for (int y = screen.visible_area().min_y; y <= screen.visible_area().max_y; y++) + for (int x = screen.visible_area().min_x; x <= screen.visible_area().max_x; x++) + bitmap.pix(y, x) = m_ramdac->pen_color(*pixel_data++); + + return 0; +} + +ROM_START(rx2030) + ROM_REGION(0x40000, "eprom", 0) + + ROM_SYSTEM_BIOS(0, "v4.32", "Rx2030 v4.32, Jan 1991") + ROMX_LOAD("50-00121__005.u139", 0x00000, 0x10000, CRC(b2f42665) SHA1(81c83aa6b8865338fda5c03733ede91749997648), ROM_BIOS(0) | ROM_SKIP(1)) + ROMX_LOAD("50-00120__005.u140", 0x00001, 0x10000, CRC(0ffa485e) SHA1(7cdfb81d1a547c5ccc88e1e0ef73d447cd03e9e2), ROM_BIOS(0) | ROM_SKIP(1)) + ROMX_LOAD("50-00119__005.u141", 0x20001, 0x10000, CRC(68fb219d) SHA1(7161ad8e5e0207d8730e09753ca74bfec0e782f8), ROM_BIOS(0) | ROM_SKIP(1)) + ROMX_LOAD("50-00118__005.u142", 0x20000, 0x10000, CRC(b59426d3) SHA1(3fc09b0368f731c2c07cf29b481f30c01e330929), ROM_BIOS(0) | ROM_SKIP(1)) + + ROM_SYSTEM_BIOS(1, "v4.30", "Rx2030 v4.30, Jul 1989") + ROMX_LOAD("50-00121__003.u139", 0x00000, 0x10000, CRC(ebc580ac) SHA1(63f9a1d344d53f32ee769f5137820faf64ffa291), ROM_BIOS(1) | ROM_SKIP(1)) + ROMX_LOAD("50-00120__003.u140", 0x00001, 0x10000, CRC(e1991721) SHA1(028d33be271c95f198473b650f7800f9ca4a60b2), ROM_BIOS(1) | ROM_SKIP(1)) + ROMX_LOAD("50-00119__003.u141", 0x20001, 0x10000, CRC(c8469906) SHA1(69bbf4b5c415b2e2156a4467bf9cb30e79f586ef), ROM_BIOS(1) | ROM_SKIP(1)) + ROMX_LOAD("50-00118__003.u142", 0x20000, 0x10000, CRC(18cc001a) SHA1(198023e92e1e3ba2fc8637f5dd6f370e7e023fdd), ROM_BIOS(1) | ROM_SKIP(1)) +ROM_END +#define rom_rc2030 rom_rx2030 +#define rom_rs2030 rom_rx2030 + +/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ +COMP(1989, rc2030, 0, 0, rc2030, 0, rx2030_state, rx2030_init, "MIPS", "RC2030", MACHINE_IS_SKELETON ) +COMP(1989, rs2030, 0, 0, rs2030, 0, rx2030_state, rx2030_init, "MIPS", "RS2030", MACHINE_IS_SKELETON ) diff --git a/src/mame/drivers/mitchell.cpp b/src/mame/drivers/mitchell.cpp index c869081a6e8..89035778207 100644 --- a/src/mame/drivers/mitchell.cpp +++ b/src/mame/drivers/mitchell.cpp @@ -2073,6 +2073,60 @@ ROM_START( spangbl ) ROM_LOAD( "ic125.14", 0x030000, 0x10000, CRC(bd5c2f4b) SHA1(3c71d63637633a98ab513e4336e2954af3f964f4) ) ROM_END +ROM_START( spangbl2 ) + ROM_REGION( 0x50000*2, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD( "ic2.1", 0x00000, 0x08000, CRC(4403f652) SHA1(62a232985a334ea8af840c2c3e766f316cc9e3da) ) // 1ST AND 2ND HALF IDENTICAL, but found as is on two different boards + ROM_CONTINUE(0x50000,0x8000) + ROM_LOAD( "ic18.2", 0x60000, 0x04000, CRC(6f377832) SHA1(25755ed77a797f50fdfbb4c42a04f51d3d08f87c) ) + ROM_CONTINUE(0x10000,0x4000) + ROM_CONTINUE(0x64000,0x4000) + ROM_CONTINUE(0x14000,0x4000) + ROM_CONTINUE(0x68000,0x4000) + ROM_CONTINUE(0x18000,0x4000) + ROM_CONTINUE(0x6c000,0x4000) + ROM_CONTINUE(0x1c000,0x4000) + ROM_CONTINUE(0x70000,0x4000) + ROM_CONTINUE(0x20000,0x4000) + ROM_CONTINUE(0x74000,0x4000) + ROM_CONTINUE(0x24000,0x4000) + ROM_CONTINUE(0x78000,0x4000) + ROM_CONTINUE(0x28000,0x4000) + ROM_CONTINUE(0x7c000,0x4000) + ROM_CONTINUE(0x2c000,0x4000) + ROM_LOAD( "ic19.3", 0x40000, 0x04000, CRC(7c776309) SHA1(8861ed11484ca0727dfbc3003888a9de32ed8ecc) ) + ROM_CONTINUE(0x48000,0x4000) + ROM_CONTINUE(0x44000,0x4000) + ROM_CONTINUE(0x4c000,0x4000) + + ROM_REGION( 0x20000, "audiocpu", 0 ) /* Sound Z80 + M5205 samples */ + ROM_LOAD( "ic28.4", 0x00000, 0x10000, CRC(02b07d0a) SHA1(77cb9bf1b0d93ebad1bd8cdbedb7fdbad23697be) ) + ROM_LOAD( "ic45.5", 0x10000, 0x10000, CRC(95c32824) SHA1(02de90a7bfbe89feb7708fda8dfac4ed32bc0773) ) + + ROM_REGION( 0x100000, "gfx1", ROMREGION_INVERT| ROMREGION_ERASE00 ) + ROM_LOAD16_BYTE( "ic79.11", 0x000001, 0x10000, CRC(10839ddd) SHA1(bfb56aa5d6ee1d3aa19e346264bee90d64545e51) ) + ROM_LOAD16_BYTE( "ic78.7", 0x000000, 0x10000, CRC(c1d5df89) SHA1(a86e641af1b41c8f642fe3a14ebcbe6c27f80c79) ) + ROM_LOAD16_BYTE( "ic49.10", 0x020001, 0x10000, CRC(113c2753) SHA1(37b480b5d9c581d3c807c81924b4bbbc21d0698d) ) + ROM_LOAD16_BYTE( "ic48.6", 0x020000, 0x10000, CRC(4ffae6c9) SHA1(71df3c374a24d6a90e78d33929cb91d05bd10b78) ) + ROM_LOAD16_BYTE( "ic81.13", 0x080001, 0x10000, CRC(ebe9c63a) SHA1(1aeeea5051086405ceb803ca7a5bfd82a07ade0f) ) + ROM_LOAD16_BYTE( "ic80.9", 0x080000, 0x10000, CRC(f680051d) SHA1(b6e09e14baf839961f46e0986d2c17f7edfaf13d) ) + ROM_LOAD16_BYTE( "ic51.12", 0x0a0001, 0x10000, CRC(beb49dc9) SHA1(c93f65b0f4ce0a0f400202f2998b89abad1f6942) ) + ROM_LOAD16_BYTE( "ic50.8", 0x0a0000, 0x10000, CRC(3f91014c) SHA1(b3947caa0c667d871c19d7dda6536d043ad296f2) ) + + ROM_REGION( 0x040000, "gfx2", ROMREGION_INVERT ) + ROM_LOAD( "ic94.17", 0x000000, 0x10000, CRC(a56f3c20) SHA1(cb440e0e612da8b8a50fe25a6336869b62ab4cfd) ) + ROM_LOAD( "ic95.16", 0x020000, 0x10000, CRC(14df4659) SHA1(d73fab0a8c1e56a26cc15333a294e876f1552bc9) ) + ROM_LOAD( "ic124.15", 0x010000, 0x10000, CRC(4702c768) SHA1(ff996f1355f32451fa57836c2255027a8108eb40) ) + ROM_LOAD( "ic125.14", 0x030000, 0x10000, CRC(bd5c2f4b) SHA1(3c71d63637633a98ab513e4336e2954af3f964f4) ) + + /* Unused */ + ROM_REGION( 0x008000, "key", 0) + ROM_LOAD( "extra-27c256.bin", 0x00000, 0x08000, CRC(100dda13) SHA1(9a0b6d4439127abc4995c9df3839bfe1f13d8bc2) ) + + /* Unsused */ + ROM_REGION( 0x000104, "plds", 0) + ROM_LOAD( "1-pal16l8.ic32", 0x0000, 0x0104, CRC(b78ee715) SHA1(df9ed2bef394b4e26ac87bd39d81f4df2b5cefe5) ) +ROM_END + /* seems to be the same basic hardware, but the memory map and io map are different at least.. */ ROM_START( mstworld ) ROM_REGION( 0x50000*2, "maincpu", 0 ) /* CPU1 code */ @@ -2485,7 +2539,8 @@ GAME( 1990, hatena, 0, pang, qtono1, mitchell_state, init_ha GAME( 1990, spang, 0, pangnv, pang, mitchell_state, init_spang, ROT0, "Mitchell", "Super Pang (World 900914)", MACHINE_SUPPORTS_SAVE ) GAME( 1990, sbbros, spang, pangnv, pang, mitchell_state, init_sbbros, ROT0, "Mitchell (Capcom license)", "Super Buster Bros. (USA 901001)", MACHINE_SUPPORTS_SAVE ) GAME( 1990, spangj, spang, pangnv, pang, mitchell_state, init_spangj, ROT0, "Mitchell", "Super Pang (Japan 901023)", MACHINE_SUPPORTS_SAVE ) -GAME( 1990, spangbl, spang, spangbl, spangbl, mitchell_state, init_spangbl, ROT0, "bootleg", "Super Pang (World 900914, bootleg)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // different sound hardware +GAME( 1990, spangbl, spang, spangbl, spangbl, mitchell_state, init_spangbl, ROT0, "bootleg", "Super Pang (World 900914, bootleg, set 1)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // different sound hardware +GAME( 1990, spangbl2, spang, spangbl, spangbl, mitchell_state, init_spangbl, ROT0, "bootleg", "Super Pang (World 900914, bootleg, set 2)", MACHINE_NOT_WORKING ) GAME( 1994, mstworld, 0, mstworld, mstworld, mitchell_state, init_mstworld, ROT0, "bootleg (TCH)", "Monsters World (bootleg of Super Pang)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1990, marukin, 0, marukin, marukin, mitchell_state, init_marukin, ROT0, "Yuga", "Super Marukin-Ban (Japan 901017)", MACHINE_SUPPORTS_SAVE ) GAME( 1991, qtono1, 0, pang, qtono1, mitchell_state, init_qtono1, ROT0, "Capcom", "Quiz Tonosama no Yabou (Japan)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/mmd1.cpp b/src/mame/drivers/mmd1.cpp index 6e34f766fac..730647cd164 100644 --- a/src/mame/drivers/mmd1.cpp +++ b/src/mame/drivers/mmd1.cpp @@ -519,11 +519,11 @@ MACHINE_CONFIG_START(mmd1_state::mmd2) config.set_default_layout(layout_mmd2); /* Devices */ - i8279_device &kbdc(I8279(config, "i8279", 400000)); // based on divider - kbdc.out_sl_callback().set(FUNC(mmd1_state::mmd2_scanlines_w)); // scan SL lines - kbdc.out_disp_callback().set(FUNC(mmd1_state::mmd2_digit_w)); // display A&B - kbdc.in_rl_callback().set(FUNC(mmd1_state::mmd2_kbd_r)); // kbd RL lines - kbdc.in_shift_callback().set_constant(1); // Shift key + i8279_device &kbdc(I8279(config, "i8279", 400000)); // based on divider + kbdc.out_sl_callback().set(FUNC(mmd1_state::mmd2_scanlines_w)); // scan SL lines + kbdc.out_disp_callback().set(FUNC(mmd1_state::mmd2_digit_w)); // display A&B + kbdc.in_rl_callback().set(FUNC(mmd1_state::mmd2_kbd_r)); // kbd RL lines + kbdc.in_shift_callback().set_constant(1); // Shift key kbdc.in_ctrl_callback().set_constant(1); MACHINE_CONFIG_END diff --git a/src/mame/drivers/model1.cpp b/src/mame/drivers/model1.cpp index f6221e7382d..5079d0a93f0 100644 --- a/src/mame/drivers/model1.cpp +++ b/src/mame/drivers/model1.cpp @@ -838,7 +838,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(model1_state::model1_interrupt) } } -MACHINE_RESET_MEMBER(model1_state,model1) +void model1_state::machine_reset() { membank("bank1")->set_base(memregion("maincpu")->base() + 0x1000000); irq_init(); @@ -938,8 +938,7 @@ void model1_state::model1_mem(address_map &map) map(0xc00000, 0xc00fff).r(FUNC(model1_state::dpram_r)).w(m_dpram, FUNC(mb8421_device::right_w)).umask16(0x00ff); // 2k*8-bit dual port ram - map(0xc40000, 0xc40000).rw(m_m1uart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xc40002, 0xc40002).rw(m_m1uart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xc40000, 0xc40003).rw(m_m1uart, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0xd00000, 0xd00001).rw(FUNC(model1_state::v60_copro_ram_adr_r), FUNC(model1_state::v60_copro_ram_adr_w)); map(0xd20000, 0xd20003).w(FUNC(model1_state::v60_copro_ram_w)); @@ -1400,7 +1399,7 @@ ROM_START( swa ) ROM_LOAD32_WORD( "mpr-16480.30", 0x800000, 0x200000, CRC(3185547a) SHA1(9871937372c2c755717802117a3ad39e1a11410e) ) ROM_LOAD32_WORD( "mpr-16481.31", 0x800002, 0x200000, CRC(ce8d76fe) SHA1(0406f0500d19d6707515627b4143f92a9a5db769) ) - ROM_REGION32_LE( 0x200000, "tgp_data", 0 ) /* TGP data roms */ + ROM_REGION32_LE( 0x200000, "copro_data", 0 ) /* TGP data roms */ ROM_LOAD32_BYTE( "mpr-16472.39", 0x000000, 0x80000, CRC(5a0d7553) SHA1(ba8e08e5a0c6b7fbc10084ad7ad3edf61efb0d70) ) ROM_LOAD32_BYTE( "mpr-16473.40", 0x000001, 0x80000, CRC(876c5399) SHA1(be7e40c77a385600941f11c24852cd73c71696f0) ) ROM_LOAD32_BYTE( "mpr-16474.41", 0x000002, 0x80000, CRC(5864a26f) SHA1(be0c22dfff37408f6b401b1970f7fcc6fc7fbcd2) ) @@ -1453,7 +1452,7 @@ ROM_START( wingwar ) ROM_LOAD32_WORD( "mpr-16749.32", 0xc00000, 0x200000, CRC(0e36dc1a) SHA1(4939177a6ac51ca57d0acd118ff14af4f4e438bb) ) ROM_LOAD32_WORD( "mpr-16750.33", 0xc00002, 0x200000, CRC(e4f0b98d) SHA1(e69de2e5ccea2834fb8326bdd61fc6b517bc60b7) ) - ROM_REGION32_LE( 0x200000, "tgp_data", 0 ) /* TGP data roms */ + ROM_REGION32_LE( 0x200000, "copro_data", 0 ) /* TGP data roms */ ROM_LOAD32_BYTE( "mpr-16741.39", 0x000000, 0x80000, CRC(84b2ffd8) SHA1(0eba3855d20b88567c6fa08046e12429664d87cb) ) ROM_LOAD32_BYTE( "mpr-16742.40", 0x000001, 0x80000, CRC(e9cc12bb) SHA1(40c83c968be3b11fad193a00e7b760f074450683) ) ROM_LOAD32_BYTE( "mpr-16739.41", 0x000002, 0x80000, CRC(6c73e98f) SHA1(7b31e62922ab6d0df97c3ecc52b78e6d086c8635) ) @@ -1465,7 +1464,7 @@ wing War (US) Sega game ID# 833-10844-91-01 Sega ROM board ID# 834-10845-91-01 -Driver/Control BD ID# 837-10859 with EPR-16891 (not dumped) +Driver/Control BD ID# 837-10859 with EPR-16891 837-8679 MODEL-1 SOUND BD + 837-8680 SOUND BD OPTION daughterboard with ID# 837-10858 838-10141-04 Sound AMP board */ @@ -1514,7 +1513,7 @@ ROM_START( wingwaru ) ROM_LOAD32_WORD( "mpr-16749.32", 0xc00000, 0x200000, CRC(0e36dc1a) SHA1(4939177a6ac51ca57d0acd118ff14af4f4e438bb) ) ROM_LOAD32_WORD( "mpr-16750.33", 0xc00002, 0x200000, CRC(e4f0b98d) SHA1(e69de2e5ccea2834fb8326bdd61fc6b517bc60b7) ) - ROM_REGION32_LE( 0x200000, "tgp_data", 0 ) /* TGP data roms */ + ROM_REGION32_LE( 0x200000, "copro_data", 0 ) /* TGP data roms */ ROM_LOAD32_BYTE( "mpr-16741.39", 0x000000, 0x80000, CRC(84b2ffd8) SHA1(0eba3855d20b88567c6fa08046e12429664d87cb) ) ROM_LOAD32_BYTE( "mpr-16742.40", 0x000001, 0x80000, CRC(e9cc12bb) SHA1(40c83c968be3b11fad193a00e7b760f074450683) ) ROM_LOAD32_BYTE( "mpr-16739.41", 0x000002, 0x80000, CRC(6c73e98f) SHA1(7b31e62922ab6d0df97c3ecc52b78e6d086c8635) ) @@ -1566,7 +1565,7 @@ ROM_START( wingwarj ) ROM_LOAD32_WORD( "mpr-16749.32", 0xc00000, 0x200000, CRC(0e36dc1a) SHA1(4939177a6ac51ca57d0acd118ff14af4f4e438bb) ) ROM_LOAD32_WORD( "mpr-16750.33", 0xc00002, 0x200000, CRC(e4f0b98d) SHA1(e69de2e5ccea2834fb8326bdd61fc6b517bc60b7) ) - ROM_REGION32_LE( 0x200000, "tgp_data", 0 ) /* TGP data roms */ + ROM_REGION32_LE( 0x200000, "copro_data", 0 ) /* TGP data roms */ ROM_LOAD32_BYTE( "mpr-16741.39", 0x000000, 0x80000, CRC(84b2ffd8) SHA1(0eba3855d20b88567c6fa08046e12429664d87cb) ) ROM_LOAD32_BYTE( "mpr-16742.40", 0x000001, 0x80000, CRC(e9cc12bb) SHA1(40c83c968be3b11fad193a00e7b760f074450683) ) ROM_LOAD32_BYTE( "mpr-16739.41", 0x000002, 0x80000, CRC(6c73e98f) SHA1(7b31e62922ab6d0df97c3ecc52b78e6d086c8635) ) @@ -1620,7 +1619,7 @@ ROM_START( wingwar360 ) ROM_LOAD32_WORD( "mpr-16749.32", 0xc00000, 0x200000, CRC(0e36dc1a) SHA1(4939177a6ac51ca57d0acd118ff14af4f4e438bb) ) ROM_LOAD32_WORD( "mpr-16750.33", 0xc00002, 0x200000, CRC(e4f0b98d) SHA1(e69de2e5ccea2834fb8326bdd61fc6b517bc60b7) ) - ROM_REGION32_LE( 0x200000, "tgp_data", 0 ) /* TGP data roms */ + ROM_REGION32_LE( 0x200000, "copro_data", 0 ) /* TGP data roms */ ROM_LOAD32_BYTE( "mpr-16741.39", 0x000000, 0x80000, CRC(84b2ffd8) SHA1(0eba3855d20b88567c6fa08046e12429664d87cb) ) ROM_LOAD32_BYTE( "mpr-16742.40", 0x000001, 0x80000, CRC(e9cc12bb) SHA1(40c83c968be3b11fad193a00e7b760f074450683) ) ROM_LOAD32_BYTE( "mpr-16739.41", 0x000002, 0x80000, CRC(6c73e98f) SHA1(7b31e62922ab6d0df97c3ecc52b78e6d086c8635) ) @@ -1668,7 +1667,7 @@ ROM_START( netmerc ) ROM_LOAD32_WORD( "mpr-18132.ic30", 0x800000, 0x200000, CRC(a17e3ac2) SHA1(19827c06ebc3e9de63668ef07675224e169d853e) ) ROM_LOAD32_WORD( "mpr-18133.ic31", 0x800002, 0x200000, CRC(f56354dd) SHA1(2ef1fe8b4995a67b70b565adf8f0ea0ad6e10094) ) - ROM_REGION32_LE( 0x200000, "tgp_data", ROMREGION_ERASE00 ) // IC39-IC42 unpopulated + ROM_REGION32_LE( 0x200000, "copro_data", ROMREGION_ERASE00 ) // IC39-IC42 unpopulated ROM_REGION( 0x8000, "polhemus", 0 ) /* POLHEMUS board */ ROM_LOAD16_BYTE( "u1", 0x0000, 0x4000, CRC(7073a312) SHA1(d2582f9520b8c8c051708dd372633112af59206e) ) @@ -1694,9 +1693,6 @@ MACHINE_CONFIG_START(model1_state::model1) MCFG_DEVICE_ADDRESS_MAP(mb86233_device::AS_RF, copro_rf_map) #endif - MCFG_MACHINE_START_OVERRIDE(model1_state,model1) - MCFG_MACHINE_RESET_OVERRIDE(model1_state,model1) - model1io_device &ioboard(SEGA_MODEL1IO(config, "ioboard", 0)); ioboard.read_callback().set(m_dpram, FUNC(mb8421_device::left_r)); ioboard.write_callback().set(m_dpram, FUNC(mb8421_device::left_w)); @@ -1717,8 +1713,6 @@ MACHINE_CONFIG_START(model1_state::model1) MCFG_PALETTE_ADD("palette", 8192) MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR) - MCFG_VIDEO_START_OVERRIDE(model1_state,model1) - SEGAM1AUDIO(config, m_m1audio, 0); m_m1audio->rxd_handler().set(m_m1uart, FUNC(i8251_device::write_rxd)); diff --git a/src/mame/drivers/model2.cpp b/src/mame/drivers/model2.cpp index aa84d4c004a..e3487f79106 100644 --- a/src/mame/drivers/model2.cpp +++ b/src/mame/drivers/model2.cpp @@ -990,9 +990,9 @@ READ32_MEMBER(model2_state::model2_serial_r) { u32 result = 0; if (ACCESSING_BITS_0_7 && (offset == 0)) - result |= m_uart->data_r(space, 0); + result |= m_uart->data_r(); if (ACCESSING_BITS_16_23 && (offset == 0)) - result |= m_uart->status_r(space, 0) << 16; + result |= m_uart->status_r() << 16; return result; } @@ -1004,7 +1004,7 @@ WRITE32_MEMBER(model2_state::model2_serial_w) { if (ACCESSING_BITS_0_7 && (offset == 0)) { - m_uart->data_w(space, 0, data & 0xff); + m_uart->data_w(data & 0xff); if (m_scsp.found()) { @@ -1017,7 +1017,7 @@ WRITE32_MEMBER(model2_state::model2_serial_w) } if (ACCESSING_BITS_16_23 && (offset == 0)) { - m_uart->control_w(space, 0, (data >> 16) & 0xff); + m_uart->control_w((data >> 16) & 0xff); } } diff --git a/src/mame/drivers/model3.cpp b/src/mame/drivers/model3.cpp index 8e31ee66491..40af0d28e40 100644 --- a/src/mame/drivers/model3.cpp +++ b/src/mame/drivers/model3.cpp @@ -1729,7 +1729,7 @@ READ8_MEMBER(model3_state::model3_sound_r) case 0: { if (m_uart.found()) - return m_uart->data_r(space, 0); + return m_uart->data_r(); break; } @@ -1737,7 +1737,7 @@ READ8_MEMBER(model3_state::model3_sound_r) case 4: { if (m_uart.found()) - return m_uart->status_r(space, 0); + return m_uart->status_r(); uint8_t res = 0; res |= 1; @@ -1757,7 +1757,7 @@ WRITE8_MEMBER(model3_state::model3_sound_w) set_irq_line(0x40, CLEAR_LINE); if (m_uart.found()) - m_uart->data_w(space, 0, data); + m_uart->data_w(data); // send to the sound board m_scsp1->midi_in(data); @@ -1771,7 +1771,7 @@ WRITE8_MEMBER(model3_state::model3_sound_w) case 4: if (m_uart.found()) - m_uart->control_w(space, 0, data); + m_uart->control_w(data); if (data == 0x27) { @@ -5109,6 +5109,71 @@ ROM_START( eca ) /* Step 2.1 Export version */ ROM_PARAMETER( ":315_5881:key", "2923aa91" ) ROM_END +ROM_START( ecaj ) /* Step 2.1, ROM board ID# 834-13946 ECA */ + ROM_REGION64_BE( 0x8800000, "user1", 0 ) /* program + data ROMs */ + // CROM + ROM_LOAD64_WORD_SWAP( "epr-22891.17", 0x000006, 0x200000, CRC(823a251c) SHA1(d2cc4be9dffa860d9af519e1387e7b51322c5454) ) + ROM_LOAD64_WORD_SWAP( "epr-22892.18", 0x000004, 0x200000, CRC(0ff828a8) SHA1(2a74414891ceb5989e6ccb6e9d597f7d2e31fec4) ) + ROM_LOAD64_WORD_SWAP( "epr-22893.19", 0x000002, 0x200000, CRC(9755dd8c) SHA1(41f27a303f4af179f17520d0c2d6a0aa4467aae8) ) + ROM_LOAD64_WORD_SWAP( "epr-22894.20", 0x000000, 0x200000, CRC(cde48c5d) SHA1(62e640110e204b682fc582a0c1aeca370e36b4cf) ) + + // CROM0 + ROM_LOAD64_WORD_SWAP( "mpr-22870.1", 0x800006, 0x400000, CRC(52054043) SHA1(f07c1f95a5847393c9e640c10cd14e2a3750b3ff) ) + ROM_LOAD64_WORD_SWAP( "mpr-22871.2", 0x800004, 0x400000, CRC(cf5bb5b5) SHA1(fd056fcf9a48854faa357014c2cb4a6ed301c3a6) ) + ROM_LOAD64_WORD_SWAP( "mpr-22872.3", 0x800002, 0x400000, CRC(4fde63a1) SHA1(72f88e514caea28eeee9e57e55c835c490465df0) ) + ROM_LOAD64_WORD_SWAP( "mpr-22873.4", 0x800000, 0x400000, CRC(dd406330) SHA1(e17ed1814cb84820f19922eef27bbad65be1d355) ) + + // CROM1 + ROM_LOAD64_WORD_SWAP( "mpr-22874.5", 0x1800006, 0x400000, CRC(5e990497) SHA1(f0df52a19a11ef23f82e88eddbacdcb2a6357ded) ) + ROM_LOAD64_WORD_SWAP( "mpr-22875.6", 0x1800004, 0x400000, CRC(1bb5c018) SHA1(5d0146c32f6a50613340ba0d2f5cc5430b595965) ) + ROM_LOAD64_WORD_SWAP( "mpr-22876.7", 0x1800002, 0x400000, CRC(a7561249) SHA1(b4217cb088234831ca2e9486af849866790bf704) ) + ROM_LOAD64_WORD_SWAP( "mpr-22877.8", 0x1800000, 0x400000, CRC(e53b8764) SHA1(03756ef0526aa0b56c2944336590918d8ff9a9b8) ) + + // CROM3 + ROM_LOAD64_WORD_SWAP( "epr-22882.13", 0x3800006, 0x400000, CRC(b161416f) SHA1(753810fa4db80a2d3a333a257dc92095a112d282) ) + ROM_LOAD64_WORD_SWAP( "epr-22883.14", 0x3800004, 0x400000, CRC(86d90148) SHA1(4336efb9e3d62cc5e8073993c44cbe49141d987f) ) + ROM_LOAD64_WORD_SWAP( "epr-22884.15", 0x3800002, 0x400000, CRC(254c3b63) SHA1(b5cd94ecbffb6f0da70fb2cb7541d5bfc96cb67c) ) + ROM_LOAD64_WORD_SWAP( "epr-22885.16", 0x3800000, 0x400000, CRC(3525b46d) SHA1(d7914cd5c558b50b9115303f77bef63e04316b29) ) + + ROM_REGION( 0x2000000, "user3", 0 ) /* Video ROMs Part 1 */ + ROM_LOAD_VROM( "mpr-22854.26", 0x000002, 0x400000, CRC(97a23d16) SHA1(17a11a3e1b1806f7b994955ae22dd0e5333d47ea) ) + ROM_LOAD_VROM( "mpr-22855.27", 0x000000, 0x400000, CRC(7249cdc9) SHA1(4bd07d911382cc569e09fb888858806d06809f9f) ) + ROM_LOAD_VROM( "mpr-22856.28", 0x000006, 0x400000, CRC(9c0d1d1b) SHA1(f15c756fb262e15d784328ed3f731aea40797d98) ) + ROM_LOAD_VROM( "mpr-22857.29", 0x000004, 0x400000, CRC(44e6ce2b) SHA1(03a33417dc96d3ddcbeb92422654f75f620ef265) ) + ROM_LOAD_VROM( "mpr-22858.30", 0x00000a, 0x400000, CRC(0af40aae) SHA1(1af762e09af932d267b860712fa46eaf4b1500ac) ) + ROM_LOAD_VROM( "mpr-22859.31", 0x000008, 0x400000, CRC(c64f0158) SHA1(b92dba07e52b4fdabc9bd4bbd26cc41cdab0414d) ) + ROM_LOAD_VROM( "mpr-22860.32", 0x00000e, 0x400000, CRC(053af14b) SHA1(6d13609e52a4999d6dca3c4da695ebd973b06b7e) ) + ROM_LOAD_VROM( "mpr-22861.33", 0x00000c, 0x400000, CRC(d26343da) SHA1(9d8c860c388cc2434cc8d753cde139096c12e79e) ) + + ROM_REGION( 0x2000000, "user4", 0 ) /* Video ROMs Part 2 */ + ROM_LOAD_VROM( "mpr-22862.34", 0x000002, 0x400000, CRC(38347c14) SHA1(6222a5001d3a6ed8e8ff3010284658dbc69edee6) ) + ROM_LOAD_VROM( "mpr-22863.35", 0x000000, 0x400000, CRC(28b558e6) SHA1(9b4849499baebbd2ea81d00663dff0d40c9db602) ) + ROM_LOAD_VROM( "mpr-22864.36", 0x000006, 0x400000, CRC(31ed02f6) SHA1(a669aa8a42ff70562c86f348fcf4be6f14c2f650) ) + ROM_LOAD_VROM( "mpr-22865.37", 0x000004, 0x400000, CRC(3e3a211a) SHA1(422f960914a6604de59b110b18f3e67ed9116f22) ) + ROM_LOAD_VROM( "mpr-22866.38", 0x00000a, 0x400000, CRC(a863a3c8) SHA1(52e13b76a3698deef05df4c607d047e6362d81c0) ) + ROM_LOAD_VROM( "mpr-22867.39", 0x000008, 0x400000, CRC(1ce6c7b2) SHA1(d5fd49f9838d3dc636366c436c507ac2b4f2596e) ) + ROM_LOAD_VROM( "mpr-22868.40", 0x00000e, 0x400000, CRC(2db40cf8) SHA1(be1e04aeb5034c2edc5c0ad153700c385a1b773a) ) + ROM_LOAD_VROM( "mpr-22869.41", 0x00000c, 0x400000, CRC(c6d62634) SHA1(72d493653b50fb31333f70c7ee143a8c7531106f) ) + + ROM_REGION( 0x080000, "audiocpu", 0 ) /* 68000 code */ + ROM_LOAD16_WORD_SWAP( "epr-22886.21", 0x000000, 0x080000, CRC(374ec1c6) SHA1(b06e678db191971f6701bd1f739815d00d4cfb3e) ) + + ROM_REGION16_BE( 0x1000000, "samples", 0 ) /* SCSP samples */ + ROM_LOAD16_WORD_SWAP( "mpr-22887.22", 0x000000, 0x400000, CRC(7d04a867) SHA1(053de98105880188b4daff183710d7932617547f) ) + ROM_LOAD16_WORD_SWAP( "mpr-22889.24", 0x400000, 0x400000, CRC(4f9ba45d) SHA1(d60314e852637edf6510be52b9b6576a1f3e1b7e) ) + ROM_LOAD16_WORD_SWAP( "mpr-22888.23", 0x800000, 0x400000, CRC(018fcf22) SHA1(c5133358f591d699f177617463e7dfa22edf5369) ) + ROM_LOAD16_WORD_SWAP( "mpr-22890.25", 0xc00000, 0x400000, CRC(b638bd7c) SHA1(ed9c69175fd0ca4c6f22e542b4e68398a6e4ad07) ) + + ROM_REGION( 0x20000, "cpu2", 0 ) /* Z80 code */ + ROM_FILL( 0x000000, 0x20000, 0x0000 ) + + ROM_REGION( 0x1000000, "dsb", 0 ) /* DSB samples */ + ROM_FILL( 0x000000, 0x1000000, 0x0000 ) + + // ???? 317-0265-COM Model 3 + ROM_PARAMETER( ":315_5881:key", "2923aa91" ) +ROM_END + ROM_START( ecau ) /* Step 2.1, ROM board ID# 834-13946-01 ECA */ ROM_REGION64_BE( 0x8800000, "user1", 0 ) /* program + data ROMs */ // CROM @@ -6050,5 +6115,6 @@ GAME( 1998, spikeout, 0, model3_21_5881, model3, model3_state, init_sp GAME( 1999, spikeofe, 0, model3_21_5881, model3, model3_state, init_spikeofe, ROT0, "Sega", "Spikeout Final Edition", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1998, magtruck, 0, model3_21_5881, eca, model3_state, init_magtruck, ROT0, "Sega", "Magical Truck Adventure (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1999, eca, 0, model3_21_5881, eca, model3_state, init_eca, ROT0, "Sega", "Emergency Call Ambulance (Export)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) +GAME( 1999, ecaj, eca, model3_21_5881, eca, model3_state, init_eca, ROT0, "Sega", "Emergency Call Ambulance (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1999, ecau, eca, model3_21_5881, eca, model3_state, init_eca, ROT0, "Sega", "Emergency Call Ambulance (USA)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1999, ecap, eca, model3_21_5881, eca, model3_state, init_eca, ROT0, "Sega", "Emergency Call Ambulance (US location test?)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) diff --git a/src/mame/drivers/monzagp.cpp b/src/mame/drivers/monzagp.cpp index b105b0da967..cd455f2faf1 100644 --- a/src/mame/drivers/monzagp.cpp +++ b/src/mame/drivers/monzagp.cpp @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Phil Stroffolino +// copyright-holders:Tomasz Slanina /*************************************************************************** Monza GP - Olympia @@ -33,7 +33,7 @@ Lower board (MGP_01): #include "cpu/mcs48/mcs48.h" #include "machine/nvram.h" #include "machine/timer.h" -//#include "video/dp8350.h" +#include "video/dp8350.h" #include "video/resnet.h" #include "emupal.h" #include "screen.h" @@ -46,6 +46,7 @@ public: monzagp_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), + m_crtc(*this, "crtc"), m_gfxdecode(*this, "gfxdecode"), m_palette(*this, "palette"), m_nvram(*this, "nvram"), @@ -72,8 +73,9 @@ private: virtual void machine_start() override; TIMER_DEVICE_CALLBACK_MEMBER(time_tick_timer); DECLARE_PALETTE_INIT(monzagp); - uint32_t screen_update_monzagp(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); required_device<cpu_device> m_maincpu; + required_device<dp8350_device> m_crtc; required_device<gfxdecode_device> m_gfxdecode; required_device<palette_device> m_palette; required_device<nvram_device> m_nvram; @@ -166,7 +168,7 @@ void monzagp_state::machine_start() m_digits.resolve(); } -uint32_t monzagp_state::screen_update_monzagp(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +uint32_t monzagp_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { /* for(int i=0;i<8;i++) @@ -188,7 +190,7 @@ uint32_t monzagp_state::screen_update_monzagp(screen_device &screen, bitmap_ind1 uint8_t mycar_y = m_mycar_pos; bool inv = false; - for(int y=0; y<=256; y++, start_tile += inv ? -1 : +1) + for (int y = 0; y < 240; y++, start_tile += inv ? -1 : +1) { if (inv_counter++ == 0xff) inv = true; @@ -196,7 +198,7 @@ uint32_t monzagp_state::screen_update_monzagp(screen_device &screen, bitmap_ind1 uint16_t start_x = (((m_video_ctrl[0][3] << 8) | m_video_ctrl[0][2]) ^ 0xffff); uint8_t mycar_x = m_video_ctrl[1][2]; - for(int x=0; x<=256; x++, start_x++) + for (int x = 0; x < 280; x++, start_x++) { uint8_t tile_attr = m_tile_attr->base()[((start_x >> 5) & 0x1ff) | ((m_video_ctrl[0][3] & 0x80) ? 0 : 0x200)]; @@ -241,8 +243,10 @@ uint32_t monzagp_state::screen_update_monzagp(screen_device &screen, bitmap_ind1 } } - if (cliprect.contains(x, y)) - bitmap.pix16(y, x) = color; + if (cliprect.contains(x * 2, y)) + bitmap.pix16(y, x * 2) = color; + if (cliprect.contains(x * 2 + 1, y)) + bitmap.pix16(y, x * 2 + 1) = color; // collisions uint8_t coll_prom_addr = bitswap<8>(tile_idx, 7, 6, 5, 4, 2, 0, 1, 3); @@ -253,15 +257,16 @@ uint32_t monzagp_state::screen_update_monzagp(screen_device &screen, bitmap_ind1 } // characters - for(int y=0;y<26;y++) + for (int y = 0; y < 24; y++) { - for(int x=0;x<40;x++) + for (int x = 0; x < 40; x++) { - m_gfxdecode->gfx(0)->transpen(bitmap,cliprect, + m_gfxdecode->gfx(0)->zoom_transpen(bitmap,cliprect, m_vram[y*40+x], 0, 0, 0, - x*7,y*10, + x*14,y*10, + 0x20000, 0x10000, 1); } } @@ -505,21 +510,19 @@ MACHINE_CONFIG_START(monzagp_state::monzagp) MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, monzagp_state, port2_w)) /* video hardware */ - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) - MCFG_SCREEN_SIZE(32*8, 32*8) - MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 32*8-1) - MCFG_SCREEN_UPDATE_DRIVER(monzagp_state, screen_update_monzagp) - MCFG_SCREEN_PALETTE("palette") - MCFG_SCREEN_VBLANK_CALLBACK(INPUTLINE("maincpu", MCS48_INPUT_IRQ)) // inversion of DP8350 pin 2 + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(10920000, 700, 0, 560, 312, 11, 240); // 11-line offset makes attract mode look symmetric + screen.set_screen_update(FUNC(monzagp_state::screen_update)); + screen.set_palette(m_palette); - //MCFG_DEVICE_ADD("crtc", DP8350, 10920000) // pins 21/22 connected to XTAL, 3 to GND, 5 to +5 + DP8350(config, m_crtc, 10920000); // pins 21/22 connected to XTAL, 3 to GND, 5 to +5 + m_crtc->set_screen("screen"); + m_crtc->refresh_control(0); + m_crtc->vsync_callback().set_inputline(m_maincpu, MCS48_INPUT_IRQ).invert(); // active low; no inverter should be needed - MCFG_PALETTE_ADD("palette", 0x200) - MCFG_PALETTE_INIT_OWNER(monzagp_state, monzagp) + PALETTE(config, m_palette, 0x200).set_init(FUNC(monzagp_state::palette_init_monzagp)); - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_monzagp) + GFXDECODE(config, "gfxdecode", "palette", gfx_monzagp); MCFG_TIMER_DRIVER_ADD_PERIODIC("time_tick_timer", monzagp_state, time_tick_timer, attotime::from_hz(4)) @@ -600,5 +603,5 @@ ROM_START( monzagpb ) ROM_END -GAMEL( 1981, monzagp, 0, monzagp, monzagp, monzagp_state, empty_init, ROT270, "Olympia", "Monza GP", MACHINE_NOT_WORKING|MACHINE_NO_SOUND, layout_monzagp ) -GAMEL( 1981, monzagpb, monzagp, monzagp, monzagp, monzagp_state, empty_init, ROT270, "bootleg", "Monza GP (bootleg)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND, layout_monzagp ) +GAMEL( 1981, monzagp, 0, monzagp, monzagp, monzagp_state, empty_init, ROT270, "Olympia", "Monza GP", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_COLORS | MACHINE_NO_SOUND, layout_monzagp ) +GAMEL( 1981, monzagpb, monzagp, monzagp, monzagp, monzagp_state, empty_init, ROT270, "bootleg", "Monza GP (bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_COLORS | MACHINE_NO_SOUND, layout_monzagp ) diff --git a/src/mame/drivers/mpc3000.cpp b/src/mame/drivers/mpc3000.cpp index 42e2197e230..fee0ca9f1aa 100644 --- a/src/mame/drivers/mpc3000.cpp +++ b/src/mame/drivers/mpc3000.cpp @@ -213,9 +213,9 @@ void mpc3000_state::mpc3000(machine_config &config) MCFG_PALETTE_ADD("palette", 2) MCFG_PALETTE_INIT_OWNER(mpc3000_state, mpc3000) - MCFG_UPD72065_ADD("upd72068", true, true) // TODO: upd72068 supports motor control - //MCFG_UPD765_INTRQ_CALLBACK(WRITELINE("maincpu", v53a_device, ir?_w)) - //MCFG_UPD765_DRQ_CALLBACK(WRITELINE("maincpu", v53a_device, drq?_w)) + UPD72065(config, m_fdc, 0, true, true); // TODO: upd72068 supports motor control + //m_fdc->intrq_wr_callback().set(m_maincpu, FUNC(v53a_device::ir?_w)); + //m_fdc->drq_wr_callback().set(m_maincpu, FUNC(v53a_device::drq?_w)); pit8254_device &pit(PIT8254(config, "synctmr", 0)); // MB89254 pit.set_clk<0>(16_MHz_XTAL / 4); diff --git a/src/mame/drivers/mpu4empire.cpp b/src/mame/drivers/mpu4empire.cpp index 56fbd611974..b5bf1a33f73 100644 --- a/src/mame/drivers/mpu4empire.cpp +++ b/src/mame/drivers/mpu4empire.cpp @@ -500,8 +500,7 @@ ROM_START( m4gamblr ) ROM_LOAD( "gambsnd2.bin", 0x080000, 0x080000, CRC(bc8b78bc) SHA1(6a27804483eaed7912fb6a6e673d1ce9f36371cd) ) ROM_REGION( 0x100000, "altmsm6376", 0 ) // different SFX, does this belong to a specific revision? - ROM_LOAD( "gambsnd1f.bin", 0x000000, 0x080000, CRC(249ae0fd) SHA1(024ae694f6d09b7f2bf5b94e3a07e9267707f794) ) - ROM_LOAD( "gambsnd2f.bin", 0x080000, 0x080000, CRC(bc8b78bc) SHA1(6a27804483eaed7912fb6a6e673d1ce9f36371cd) ) + ROM_LOAD( "gambsnd1f.bin", 0x000000, 0x080000, CRC(249ae0fd) SHA1(024ae694f6d09b7f2bf5b94e3a07e9267707f794) )//replaces gambsnd1.bin ROM_END ROM_START( m4gamblra ) diff --git a/src/mame/drivers/mpu4mdm.cpp b/src/mame/drivers/mpu4mdm.cpp index c0f63256755..87ec7c193f3 100644 --- a/src/mame/drivers/mpu4mdm.cpp +++ b/src/mame/drivers/mpu4mdm.cpp @@ -360,7 +360,15 @@ ROM_START( m4excam ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "ex1_4.bin", 0x0000, 0x010000, CRC(34c4aee2) SHA1(c5487c5b0144ca188bc2e3926a0343fd4c9c565a) ) - ROM_REGION( 0x10000, "altrevs", 0 ) + ROM_REGION( 0x200000, "msm6376", 0 ) + ROM_LOAD( "mdmexcalibsnd.p1", 0x000000, 0x080000, CRC(8ea73366) SHA1(3ee45ad98e03177eeef97521df7b3d1945242076) ) + ROM_LOAD( "mdmexcalibsnd.p2", 0x080000, 0x080000, CRC(0fca6ca2) SHA1(2029d15e3b51069f5847ab3846bf6c064f0a3381) ) + ROM_LOAD( "mdmexcalibsnd.p3", 0x100000, 0x080000, CRC(43be816a) SHA1(a95f702ec1bb20f3e0f18984948963b56769f5ba) ) + ROM_LOAD( "mdmexcalibsnd.p4", 0x180000, 0x080000, CRC(ef8a718c) SHA1(093a5fff5bab61fc9276a7f9f3c5b728a50603b3) ) +ROM_END + +ROM_START( m4excamd ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "ex1_0d.bin", 0x0000, 0x010000, CRC(490c510e) SHA1(21a03d8e2dd4d2c7760acbff5705f925fe9f31be) ) ROM_REGION( 0x200000, "msm6376", 0 ) @@ -370,7 +378,6 @@ ROM_START( m4excam ) ROM_LOAD( "mdmexcalibsnd.p4", 0x180000, 0x080000, CRC(ef8a718c) SHA1(093a5fff5bab61fc9276a7f9f3c5b728a50603b3) ) ROM_END - ROM_START( m4front ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "ff2_1.bin", 0x0000, 0x010000, CRC(3519cba1) SHA1(d83a5370ee82e258024d20ffacec7050950b1326) ) @@ -449,7 +456,8 @@ GAME(199?, m4smshgba,m4smshgb, mod4oki, mpu4, mpu4_state, init_m4default, ROT0, GAME(199?, m4smshgbb,m4smshgb, mod4oki, mpu4, mpu4_state, init_m4default, ROT0, "Mdm","Smash 'n' Grab (Mdm) (MPU4, set 3)", GAME_FLAGS|MACHINE_NO_SOUND ) GAME(199?, m4smshgbc,m4smshgb, mod4oki, mpu4, mpu4_state, init_m4default, ROT0, "Mdm","Smash 'n' Grab (Mdm) (MPU4, set 4)", GAME_FLAGS|MACHINE_NO_SOUND ) GAME(199?, m4snklad, 0, mod2 ,mpu4, mpu4_state, init_m4default, ROT0, "Mdm","Snakes & Ladders (Mdm) (MPU4)", GAME_FLAGS|MACHINE_NO_SOUND ) -GAME(199?, m4excam, 0, mod4oki ,mpu4, mpu4_state, init_m4default, ROT0, "Mdm","Excalibur (Mdm) (MPU4)", GAME_FLAGS|MACHINE_NO_SOUND ) +GAME(199?, m4excam, 0, mod4oki ,mpu4, mpu4_state, init_m4default, ROT0, "Mdm","Excalibur (Mdm) (MPU4, V1.4)", GAME_FLAGS|MACHINE_NO_SOUND ) +GAME(199?, m4excamd,m4excam, mod4oki ,mpu4, mpu4_state, init_m4default, ROT0, "Mdm","Excalibur (Mdm) (MPU4, V1.0D)", GAME_FLAGS|MACHINE_NO_SOUND ) GAME(199?, m4front, 0, mod4oki ,mpu4, mpu4_state, init_m4default, ROT0, "Mdm","Final Frontier (Mdm) (MPU4)", GAME_FLAGS|MACHINE_NO_SOUND ) GAME(199?, m4safar, 0, mod4oki ,mpu4, mpu4_state, init_m4default, ROT0, "Mdm","Safari Club (Mdm) (MPU4)", GAME_FLAGS|MACHINE_NO_SOUND ) GAME(199?, m4snowbl, 0, mod2 ,mpu4, mpu4_state, init_m4default, ROT0, "Mdm","Snowball Bingo (Mdm) (MPU4)", GAME_FLAGS|MACHINE_NO_SOUND ) diff --git a/src/mame/drivers/mpu4misc.cpp b/src/mame/drivers/mpu4misc.cpp index 96e077ae51f..8012bb37952 100644 --- a/src/mame/drivers/mpu4misc.cpp +++ b/src/mame/drivers/mpu4misc.cpp @@ -144,7 +144,6 @@ ROM_END #define M4DCRLS_EXTRA_ROMS \ ROM_REGION( 0x200000, "msm6376", ROMREGION_ERASE00 ) \ - ROM_LOAD( "dcr_sounds.bin", 0x0000, 0x09664e, CRC(431cecbc) SHA1(b564ae8d083fef84328526192626a220e979d5ad) ) /* intelhex */ \ ROM_LOAD( "71000110.bin", 0x0000, 0x080000, CRC(0373a197) SHA1(b32bf521e36b5a53170d3a6ec545ce8db3a5094d) ) #undef GAME_CUSTOM @@ -180,8 +179,6 @@ GAME_CUSTOM( 199?, m4dcrls__r, m4dcrls, "dcr_data_340.bin", #define M4JUNGJK_EXTRA_ROMS \ ROM_REGION( 0x200000, "msm6376", ROMREGION_ERASE00 ) \ - ROM_LOAD( "71000080.lo.hex", 0x0000, 0x134084, CRC(f3866082) SHA1(f33f6d7e078d7072cc7c67672b3afa3e90e1f805) ) \ - ROM_LOAD( "71000080.hi.hex", 0x0000, 0x12680f, CRC(2a9db1df) SHA1(73823c3db5c68068dadf6d9b4c93b47c0cf13bd3) ) \ ROM_LOAD( "71000080.p1", 0x000000, 0x080000, CRC(b39d5e03) SHA1(94c9208601ea230463b460f5b6ea668363d239f4) ) \ ROM_LOAD( "71000080.p2", 0x080000, 0x080000, CRC(ad6da9af) SHA1(9ec8c8fd7b9bcd1d4c6ed93726fafe9a50a15894) ) @@ -207,8 +204,7 @@ GAME_CUSTOM( 199?, m4jungjk__e, m4jungjk, "jungle.p1", 0 #define M4RHNOTE_EXTRA_ROMS \ ROM_REGION( 0x200000, "msm6376", ROMREGION_ERASE00 ) \ - ROM_LOAD( "71000120.hex", 0x0000, 0x112961, CRC(5eb5245e) SHA1(449b02baf56e5798f656d9aee497b88d34f562cc) ) \ - ROM_LOAD( "rhnsnd.bin", 0x0000, 0x080000, CRC(e03eaa43) SHA1(69117021adc1a8968d50703336147a7344c62100) ) + ROM_LOAD( "rhnsnd.bin", 0x0000, 0x080000, CRC(e03eaa43) SHA1(69117021adc1a8968d50703336147a7344c62100) ) // = 70000120.hex #undef GAME_CUSTOM #define GAME_CUSTOM(year, setname,parent,name,offset,length,hash,company,title) \ @@ -246,9 +242,9 @@ GAME_CUSTOM( 199?, m4rhnote__x, m4rhnote, "rhn_std_110.bin", 0 GAME_CUSTOM( 199?, m4rhnote__y, m4rhnote, "rhn_std_110_lv.bin", 0x0000, 0x040000, CRC(922b8196) SHA1(6fdbf301aaadacaeabf29ad11c67b22122954051), "Qps","Red Hot Notes (Qps) (MPU4) (set 26)" ) #define M4RHROCK_EXTRA_ROMS \ - ROM_REGION( 0x200000, "msm6376", ROMREGION_ERASE00 ) /* intelhex, needs converting */ \ - ROM_LOAD( "71000200.hi.hex", 0x0000, 0x0ff0f8, CRC(998e28ea) SHA1(f54a69af16e05119df2697bc01e548ac51ed3e11) ) \ - ROM_LOAD( "71000200.lo.hex", 0x0000, 0x134084, CRC(ccd0b35f) SHA1(6d3ef65577a46c68f8628675d146f829c9a99659) ) + ROM_REGION( 0x200000, "msm6376", ROMREGION_ERASE00 ) /* 71000200.hi padded with 0xff as original IntelHex was undersize */ \ + ROM_LOAD( "71000200.hi", 0x0000, 0x80000, CRC(3054ff83) SHA1(241ab9b634c83d5b388eff2d598e7897aa7dd703) ) \ + ROM_LOAD( "71000200.lo", 0x0000, 0x80000, CRC(b426e83f) SHA1(c30b3868f2c6a4f84a678e2c5151861619b27905) ) #undef GAME_CUSTOM #define GAME_CUSTOM(year, setname,parent,name,offset,length,hash,company,title) \ @@ -264,13 +260,12 @@ GAME_CUSTOM( 199?, m4rhrock, 0, "rhr_v200_1625_da8c_nlv.bin", 0x0 GAME_CUSTOM( 199?, m4rhrock__a, m4rhrock, "rhr_v300_1216_ce52_nlv.bin", 0x0000, 0x040000, CRC(86b0d683) SHA1(c6553bf65c055c4f911c215ba112eaa672357290), "Qps","Red Hot Rocks (Qps) (MPU4) (set 2)" ) - +// 71000180.lo.hex and 71000180.hi.hex converted #define M4RHWHL_EXTRA_ROMS \ ROM_REGION( 0x200000, "msm6376", ROMREGION_ERASE00 ) \ - ROM_LOAD( "71000180.hi.hex", 0x0000, 0x04da98, CRC(0ffa11a5) SHA1(a3f8eb00b6771cb49965a717e27d0b544c6b2f4f) ) \ - ROM_LOAD( "71000180.lo.hex", 0x0000, 0x134084, CRC(6dfc7474) SHA1(806b4b8ca5fa868581b4bf33080b9c486ce71bb6) ) \ ROM_LOAD( "redhotwheelssnd.p1", 0x0000, 0x080000, CRC(7b274a71) SHA1(38ba69084819133253b41f2eb1d784104e5f10f7) ) \ ROM_LOAD( "redhotwheelssnd.p2", 0x0000, 0x080000, CRC(e36e19e2) SHA1(204554622c9020479b095acd4fbab1f21f829137) ) + #undef GAME_CUSTOM #define GAME_CUSTOM(year, setname,parent,name,offset,length,hash,company,title) \ ROM_START( setname ) \ @@ -315,6 +310,7 @@ GAME_CUSTOM( 199?, m4rdeal__i, m4rdeal, "70001745.bin", 0x0000, 0x080000, CR ROM_LOAD( "snrsnd.p1", 0x000000, 0x080000, CRC(985c7c8c) SHA1(d2740ff6192c21af3a8a8a9a92b6fd604b40e9d1) ) \ ROM_LOAD( "snrsnd.p2", 0x080000, 0x080000, CRC(6a3a57ce) SHA1(3aaa0a761e17a2a14196cb023b10a49b44ba1046) ) \ ROM_LOAD( "shock.s2", 0x080000, 0x080000, CRC(10e9912f) SHA1(833d2b125bf30bdb8de71f6c9d8a9fe92701f741) ) /* alt snd2 */ + #undef GAME_CUSTOM #define GAME_CUSTOM(year, setname,parent,name,offset,length,hash,company,title) \ ROM_START( setname ) \ @@ -329,12 +325,12 @@ GAME_CUSTOM( 199?, m4shoknr__a, m4shoknr, "snr_v300_1221_c8ff_nlv.bin", 0 GAME_CUSTOM( 199?, m4shoknr__b, m4shoknr, "snr_v200_1145_047f_lv.bin", 0x0000, 0x040000, CRC(73ef1e1a) SHA1(6ccaf64daa5acacfba4df576281bb5478f2fbd29), "Qps","Shock 'n' Roll (Qps) (MPU4) (set 3)" ) GAME_CUSTOM( 199?, m4shoknr__c, m4shoknr, "snr_v200_1655_5a69_nlv.bin", 0x0000, 0x040000, CRC(50ba0c6b) SHA1(767fd59858fc55ae95f096f00c54bd619369a56c), "Qps","Shock 'n' Roll (Qps) (MPU4) (set 4)" ) +// 71000300.lo.hex and 71000300.hi.hex converted #define M4TORNAD_EXTRA_ROMS \ ROM_REGION( 0x200000, "msm6376", ROMREGION_ERASE00 ) \ - ROM_LOAD( "71000300.hi.hex", 0x0000, 0x0be342, CRC(f9021a32) SHA1(4bd7d7306385ef37dd9cbb5085dbc104657abc0e) ) \ - ROM_LOAD( "71000300.lo.hex", 0x0000, 0x134084, CRC(af34658d) SHA1(63a6db1f5ed00fa6208c63e0a2211ba2afe0e9a1) ) \ - ROM_LOAD( "tornadosnd.p1", 0x0000, 0x080000, CRC(cac88f25) SHA1(6ccbf372d983a47a49caedb8a526fc7703b31ed4) ) \ - ROM_LOAD( "tornadosnd.p2", 0x080000, 0x080000, CRC(ef4f563d) SHA1(1268061edd93474296e3454e0a2e706b90c0621c) ) + ROM_LOAD( "tornadosnd.p1", 0x000000, 0x080000, CRC(cac88f25) SHA1(6ccbf372d983a47a49caedb8a526fc7703b31ed4) ) \ + ROM_LOAD( "tornadosnd.p2", 0x080000, 0x080000, CRC(ef4f563d) SHA1(1268061edd93474296e3454e0a2e706b90c0621c) ) + #undef GAME_CUSTOM #define GAME_CUSTOM(year, setname,parent,name,offset,length,hash,company,title) \ ROM_START( setname ) \ @@ -353,13 +349,12 @@ GAME_CUSTOM( 199?, m4tornad__e, m4tornad, "torn_v200_1617_ece9_lv.bin", GAME_CUSTOM( 199?, m4tornad__f, m4tornad, "tornsp_v200_1623_eee3_nlv.bin", 0x0000, 0x040000, CRC(6b4f8baf) SHA1(fea21f43b3bbc1c969a7426ca956898e3680823f), "Qps","Tornado (Qps) (MPU4) (set 7)" ) GAME_CUSTOM( 199?, m4tornad__g, m4tornad, "tornsp_v200_1626_ec93_lv.bin", 0x0000, 0x040000, CRC(9e18327f) SHA1(7682cd172903cd5c26873306e70394c154e66c30), "Qps","Tornado (Qps) (MPU4) (set 8)" ) - +//=71000250.lo.hex and hi.hex converted #define M4SHKWAV_EXTRA_ROMS \ ROM_REGION( 0x200000, "msm6376", ROMREGION_ERASE00 ) \ - ROM_LOAD( "71000250.hi.hex", 0x0000, 0x0c852b, CRC(e3a857c7) SHA1(66619b7926ae7df970045fffd7e20763abfe14a4) ) \ - ROM_LOAD( "71000250.lo.hex", 0x0000, 0x134084, CRC(46758bc5) SHA1(18d02960580646b276e7a6aabdeb4ca449ec5ea0) ) \ ROM_LOAD( "shocksnd.p1", 0x000000, 0x080000, CRC(54bf0ddb) SHA1(693b855367972b5a45e9d2d6152849ab2cde38a7) ) \ - ROM_LOAD( "shocksnd.p2", 0x080000, 0x080000, CRC(facebc55) SHA1(75367473646cfc735f4d1267e13a9c92ea19c4e3) ) + ROM_LOAD( "shocksnd.p2", 0x080000, 0x080000, CRC(facebc55) SHA1(75367473646cfc735f4d1267e13a9c92ea19c4e3) ) + #undef GAME_CUSTOM #define GAME_CUSTOM(year, setname,parent,name,offset,length,hash,company,title) \ ROM_START( setname ) \ @@ -386,10 +381,9 @@ GAME_CUSTOM( 199?, m4shkwav__g, m4shkwav, "swsp_v300_1606_ded8_lv.bin", #define M4CLAB_EXTRA_ROMS \ ROM_REGION( 0x200000, "msm6376", ROMREGION_ERASE00 ) \ - ROM_LOAD( "71000010.lo", 0x0000, 0x134084, CRC(c39bbae4) SHA1(eee333376612a96a4c344729a96cc60c217bfde3) ) \ - ROM_LOAD( "71000010.hi", 0x0000, 0x091c0b, CRC(d0d3cb4f) SHA1(eaacf9ed3a6b6dcda8e1a3edbc3a9a2a51ffcbd8) ) \ - ROM_LOAD( "clab_snd1_c8a6.bin", 0x0000, 0x080000, CRC(cf9de981) SHA1(e5c73e9b9db9ac512602c2dd586ca5cf65f98bc1) ) \ - ROM_LOAD( "clab_snd2_517a.bin", 0x080000, 0x080000, CRC(d4eb949e) SHA1(0ebbd1b5e3c86da94f35c69d9d60e36844cc4d7e) ) + ROM_LOAD( "clab_snd1_c8a6.bin", 0x000000, 0x080000, CRC(cf9de981) SHA1(e5c73e9b9db9ac512602c2dd586ca5cf65f98bc1) ) \ + ROM_LOAD( "clab_snd2_517a.bin", 0x080000, 0x080000, CRC(d4eb949e) SHA1(0ebbd1b5e3c86da94f35c69d9d60e36844cc4d7e) ) //71000010 + #undef GAME_CUSTOM #define GAME_CUSTOM(year, setname,parent,name,offset,length,hash,company,title) \ ROM_START( setname ) \ diff --git a/src/mame/drivers/mpu4vid.cpp b/src/mame/drivers/mpu4vid.cpp index 653f95e7070..4c0e041edeb 100644 --- a/src/mame/drivers/mpu4vid.cpp +++ b/src/mame/drivers/mpu4vid.cpp @@ -1780,9 +1780,15 @@ ROM_START( v4psi ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("in220mpu4.p1", 0x00000, 0x04000, CRC(75ff4b1f) SHA1(a3adaad9a91c30fe6ff42dc2003c34a199b28807) ) - ROM_REGION( 0x10000, "altrevs", 0 ) - ROM_LOAD( "in14d.p1", 0x0000, 0x004000, CRC(cb9a093a) SHA1(225ca4f191f64f6ca3ed6bc7b58819a893fdd36a) ) - ROM_LOAD( "in20d.p1", 0x0000, 0x004000, CRC(e86e62a0) SHA1(97b0d41fa688cdd86bd6a1ef65cf143a34e23fac) ) + ROM_REGION( 0x800000, "video", 0 ) + ROM_LOAD16_BYTE( "in2-20p1.1", 0x000000, 0x10000, CRC(f34d9001) SHA1(2bae06f4a5a5510b15b918261ecb0de9e34a6b53) ) + ROM_LOAD16_BYTE( "in2-20p1.2", 0x000001, 0x10000, CRC(1dc931b4) SHA1(c46626183edd52c7938c5edee2395aacb49e0730) ) + ROM_LOAD16_BYTE( "in2-20p1.3", 0x020000, 0x10000, CRC(107aa448) SHA1(7b3d4053aaae3b97136cddefbc9edd5e61713ff7) ) + ROM_LOAD16_BYTE( "in2-20p1.4", 0x020001, 0x10000, CRC(04933278) SHA1(97462aef782f7fe82b60f4bddcad0e6a6b50f3df) ) +ROM_END + +ROM_START( v4psi214 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "in214.p1", 0x0000, 0x004000, CRC(4fb02448) SHA1(c2f2413a460012e3aadf7effbf8a33b40bc02df1) ) ROM_REGION( 0x800000, "video", 0 ) @@ -1792,6 +1798,29 @@ ROM_START( v4psi ) ROM_LOAD16_BYTE( "in2-20p1.4", 0x020001, 0x10000, CRC(04933278) SHA1(97462aef782f7fe82b60f4bddcad0e6a6b50f3df) ) ROM_END +ROM_START( v4psi20d ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "in20d.p1", 0x0000, 0x004000, CRC(e86e62a0) SHA1(97b0d41fa688cdd86bd6a1ef65cf143a34e23fac) ) + + ROM_REGION( 0x800000, "video", 0 ) + ROM_LOAD16_BYTE( "in2-20p1.1", 0x000000, 0x10000, CRC(f34d9001) SHA1(2bae06f4a5a5510b15b918261ecb0de9e34a6b53) ) + ROM_LOAD16_BYTE( "in2-20p1.2", 0x000001, 0x10000, CRC(1dc931b4) SHA1(c46626183edd52c7938c5edee2395aacb49e0730) ) + ROM_LOAD16_BYTE( "in2-20p1.3", 0x020000, 0x10000, CRC(107aa448) SHA1(7b3d4053aaae3b97136cddefbc9edd5e61713ff7) ) + ROM_LOAD16_BYTE( "in2-20p1.4", 0x020001, 0x10000, CRC(04933278) SHA1(97462aef782f7fe82b60f4bddcad0e6a6b50f3df) ) +ROM_END + +ROM_START( v4psi14d ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "in14d.p1", 0x0000, 0x004000, CRC(cb9a093a) SHA1(225ca4f191f64f6ca3ed6bc7b58819a893fdd36a) ) + + ROM_REGION( 0x800000, "video", 0 ) + ROM_LOAD16_BYTE( "in2-20p1.1", 0x000000, 0x10000, CRC(f34d9001) SHA1(2bae06f4a5a5510b15b918261ecb0de9e34a6b53) ) + ROM_LOAD16_BYTE( "in2-20p1.2", 0x000001, 0x10000, CRC(1dc931b4) SHA1(c46626183edd52c7938c5edee2395aacb49e0730) ) + ROM_LOAD16_BYTE( "in2-20p1.3", 0x020000, 0x10000, CRC(107aa448) SHA1(7b3d4053aaae3b97136cddefbc9edd5e61713ff7) ) + ROM_LOAD16_BYTE( "in2-20p1.4", 0x020001, 0x10000, CRC(04933278) SHA1(97462aef782f7fe82b60f4bddcad0e6a6b50f3df) ) +ROM_END + + ROM_START( v4psia ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("psi12m.p1", 0x00000, 0x04000, CRC(560b2085) SHA1(5dccede70e228d896ff11ff861c9f32b895e807d) ) @@ -1845,9 +1874,18 @@ ROM_START( v4tetrs ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("tetris22.p0", 0x00000, 0x04000, CRC(b711c7ae) SHA1(767b17ddf9021fdf79ff6c52f04a5d8ea60cf30e) ) - ROM_REGION( 0x10000, "altrevs", 0 ) - ROM_LOAD( "tetv1int", 0x0000, 0x004000, CRC(98de975d) SHA1(5b4fc06aa8008d3967c68f364c47f8377a1ba9df) ) + ROM_REGION( 0x800000, "video", 0 ) + ROM_LOAD16_BYTE( "tetris22.p1", 0x000000, 0x10000, CRC(e81dd182) SHA1(28b460224abf6fe24b637542ccd1c84040674555) ) + ROM_LOAD16_BYTE( "tetris22.p2", 0x000001, 0x10000, CRC(68aa4f15) SHA1(4e4511a64391fc64e5f5b7ccb46a78fd2e1d94d6) ) + ROM_LOAD16_BYTE( "tetris22.p3", 0x020000, 0x10000, CRC(b38b4763) SHA1(d28e77fdd6869cb5b5ec40ed1f300a2a947e0482) ) + ROM_LOAD16_BYTE( "tetris22.p4", 0x020001, 0x10000, CRC(1649f604) SHA1(ca4ac303391a0969d41c8f988b8e81cfcee1a21c) ) + ROM_LOAD16_BYTE( "tetris22.p5", 0x040001, 0x10000, CRC(02859676) SHA1(5293c767021a6b5253eecab0b0568aa082ea7084) ) + ROM_LOAD16_BYTE( "tetris22.p6", 0x040001, 0x10000, CRC(40d24c82) SHA1(7ac3cf148af84ad93eaf11ce3420abbe45d986e2) ) +ROM_END +ROM_START( v4tetrs1 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "tetv1int", 0x0000, 0x004000, CRC(98de975d) SHA1(5b4fc06aa8008d3967c68f364c47f8377a1ba9df) ) ROM_REGION( 0x800000, "video", 0 ) ROM_LOAD16_BYTE( "tetris22.p1", 0x000000, 0x10000, CRC(e81dd182) SHA1(28b460224abf6fe24b637542ccd1c84040674555) ) @@ -3659,7 +3697,11 @@ GAME( 1991, v4opt3d, v4opt3, mpu4_vid, mpu4, mpu4vid_state, init_v4o GAME( 199?, v4vgpok, 0, bwbvid, mpu4, mpu4vid_state, empty_init, ROT0, "BwB","Vegas Poker (prototype, release 2) (MPU4 Video)",GAME_FLAGS ) GAME( 199?, v4psi, 0, bwbvid, mpu4, mpu4vid_state, init_prizeinv, ROT0, "BwB","Prize Space Invaders (v1.1) (MPU4 Video)",GAME_FLAGS ) GAME( 199?, v4psia, 0, bwbvid, mpu4, mpu4vid_state, init_prizeinv, ROT0, "BwB","Prize Space Invaders (v1.2) (MPU4 Video)",GAME_FLAGS ) -GAME( 199?, v4psib, 0, bwbvid, mpu4, mpu4vid_state, init_prizeinv, ROT0, "BwB","Prize Space Invaders (v2.0?) (MPU4 Video)",GAME_FLAGS ) // bad dump +GAME( 199?, v4psib, 0, bwbvid, mpu4, mpu4vid_state, init_prizeinv, ROT0, "BwB","Prize Space Invaders (v2.0?) (MPU4 Video)",GAME_FLAGS ) +GAME( 199?, v4psi14d, 0, bwbvid, mpu4, mpu4vid_state, init_prizeinv, ROT0, "BwB","Prize Space Invaders (v1.4D?) (MPU4 Video)",GAME_FLAGS ) +GAME( 199?, v4psi20d, 0, bwbvid, mpu4, mpu4vid_state, init_prizeinv, ROT0, "BwB","Prize Space Invaders (v2.0D?) (MPU4 Video)",GAME_FLAGS ) +GAME( 199?, v4psi214, 0, bwbvid, mpu4, mpu4vid_state, init_prizeinv, ROT0, "BwB","Prize Space Invaders (v2.14?) (MPU4 Video)",GAME_FLAGS ) +// bad dump GAME( 199?, v4blox, 0, bwbvid, mpu4, mpu4vid_state, empty_init, ROT0, "BwB","Blox (v2.0) (MPU4 Video)",GAME_FLAGS ) GAME( 199?, v4bloxd, v4blox, bwbvid, mpu4, mpu4vid_state, empty_init, ROT0, "BwB","Blox (v2.0, Datapak) (MPU4 Video)",GAME_FLAGS ) GAME( 1996, v4reno, 0, bwbvid5, mpu4, mpu4vid_state, init_prizeinv, ROT0, "BwB","Reno Reels (20p/10GBP Cash, release A) (MPU4 Video)",GAME_FLAGS ) @@ -3672,6 +3714,7 @@ GAME( 199?, v4shpwnd, 0, bwbvid, mpu4, mpu4vid_state, empty_in GAME( 199?, v4redhtp, 0, bwbvid, mpu4, mpu4vid_state, empty_init, ROT0, "BwB","Red Hot Poker (20p/10GBP Cash, release 3) (MPU4 Video)",GAME_FLAGS ) GAME( 199?, v4tetrs, 0, bwbvid, mpu4, mpu4vid_state, empty_init, ROT0, "BwB","BwB Tetris v 2.2 (MPU4 Video)",GAME_FLAGS ) +GAME( 199?, v4tetrs1, 0, bwbvid, mpu4, mpu4vid_state, empty_init, ROT0, "BwB","BwB Tetris v 1.0? (MPU4 Video)",GAME_FLAGS ) GAME( 199?, v4big40, 0, bwbvid, mpu4, mpu4vid_state, empty_init, ROT0, "BwB","Big 40 Poker (Bwb) (MPU4 Video)",GAME_FLAGS ) GAME( 199?, v4bulblx, 0, bwbvid, mpu4, mpu4vid_state, empty_init, ROT0, "BwB","Bullion Blox (Bwb) (MPU4 Video)",GAME_FLAGS ) // is this the same game as v4blox? diff --git a/src/mame/drivers/ms32.cpp b/src/mame/drivers/ms32.cpp index 8c4ab52e604..e42f1d03e13 100644 --- a/src/mame/drivers/ms32.cpp +++ b/src/mame/drivers/ms32.cpp @@ -2634,4 +2634,4 @@ GAME( 1997, bnstars, bnstars1, ms32, suchie2, ms32_state, init_bnstars, RO GAME( 1996, wpksocv2, 0, ms32, wpksocv2, ms32_state, init_ss92046_01, ROT0, "Jaleco", "World PK Soccer V2 (ver 1.1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) /* these boot and show something */ -GAME( 1994, f1superb, 0, f1superb, f1superb, ms32_state, init_f1superb, ROT0, "Jaleco", "F1 Super Battle", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 1994, f1superb, 0, f1superb, f1superb, ms32_state, init_f1superb, ROT0, "Jaleco", "F-1 Super Battle", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/ms6102.cpp b/src/mame/drivers/ms6102.cpp index 5ac1f1c6778..622a52318f1 100644 --- a/src/mame/drivers/ms6102.cpp +++ b/src/mame/drivers/ms6102.cpp @@ -135,8 +135,7 @@ void ms6102_state::ms6102_mem(address_map &map) void ms6102_state::ms6102_io(address_map &map) { map.unmap_value_high(); - map(0x00, 0x00).rw(m_i8251, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x01, 0x01).rw(m_i8251, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x00, 0x01).rw(m_i8251, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x10, 0x18).rw(m_dma8257, FUNC(i8257_device::read), FUNC(i8257_device::write)); map(0x20, 0x23).rw("pit8253", FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0x30, 0x30).mirror(0x0f).rw("589wa1", FUNC(ay31015_device::receive), FUNC(ay31015_device::transmit)); diff --git a/src/mame/drivers/msx.cpp b/src/mame/drivers/msx.cpp index d9b2a5f5fdb..bdb82f4578c 100644 --- a/src/mame/drivers/msx.cpp +++ b/src/mame/drivers/msx.cpp @@ -546,15 +546,6 @@ void msx_state::msx_memory_map(address_map &map) } -WRITE8_MEMBER(msx_state::msx_ay8910_w) -{ - if ( offset & 1 ) - m_ay8910->data_w( space, offset, data ); - else - m_ay8910->address_w( space, offset, data ); -} - - void msx_state::msx_io_map(address_map &map) { map.unmap_value_high(); @@ -563,7 +554,7 @@ void msx_state::msx_io_map(address_map &map) map(0x90, 0x90).r("cent_status_in", FUNC(input_buffer_device::bus_r)); map(0x90, 0x90).w("cent_ctrl_out", FUNC(output_latch_device::bus_w)); map(0x91, 0x91).w("cent_data_out", FUNC(output_latch_device::bus_w)); - map(0xa0, 0xa7).r(m_ay8910, FUNC(ay8910_device::data_r)).w(FUNC(msx_state::msx_ay8910_w)); + map(0xa0, 0xa7).rw(m_ay8910, FUNC(ay8910_device::data_r), FUNC(ay8910_device::address_data_w)); map(0xa8, 0xab).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x98, 0x98).rw("tms9928a", FUNC(tms9928a_device::vram_r), FUNC(tms9928a_device::vram_w)); map(0x99, 0x99).rw("tms9928a", FUNC(tms9928a_device::register_r), FUNC(tms9928a_device::register_w)); @@ -572,40 +563,40 @@ void msx_state::msx_io_map(address_map &map) } -void msx_state::msx2_io_map(address_map &map) +void msx2_state::msx2_io_map(address_map &map) { map.unmap_value_high(); map.global_mask(0xff); - map(0x40, 0x4f).rw(FUNC(msx_state::msx_switched_r), FUNC(msx_state::msx_switched_w)); + map(0x40, 0x4f).rw(FUNC(msx2_state::msx_switched_r), FUNC(msx2_state::msx_switched_w)); // 0x7c - 0x7d : MSX-MUSIC/FM-PAC write port. Handlers will be installed if MSX-MUSIC is present in a system map(0x90, 0x90).r("cent_status_in", FUNC(input_buffer_device::bus_r)); map(0x90, 0x90).w("cent_ctrl_out", FUNC(output_latch_device::bus_w)); map(0x91, 0x91).w("cent_data_out", FUNC(output_latch_device::bus_w)); - map(0xa0, 0xa7).r(m_ay8910, FUNC(ay8910_device::data_r)).w(FUNC(msx_state::msx_ay8910_w)); + map(0xa0, 0xa7).rw(m_ay8910, FUNC(ay8910_device::data_r), FUNC(ay8910_device::address_data_w)); map(0xa8, 0xab).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x98, 0x9b).rw(m_v9938, FUNC(v9938_device::read), FUNC(v9938_device::write)); - map(0xb4, 0xb4).w(FUNC(msx_state::msx_rtc_latch_w)); - map(0xb5, 0xb5).rw(FUNC(msx_state::msx_rtc_reg_r), FUNC(msx_state::msx_rtc_reg_w)); - map(0xd8, 0xd9).rw(FUNC(msx_state::msx_kanji_r), FUNC(msx_state::msx_kanji_w)); + map(0xb4, 0xb4).w(FUNC(msx2_state::msx_rtc_latch_w)); + map(0xb5, 0xb5).rw(FUNC(msx2_state::msx_rtc_reg_r), FUNC(msx2_state::msx_rtc_reg_w)); + map(0xd8, 0xd9).rw(FUNC(msx2_state::msx_kanji_r), FUNC(msx2_state::msx_kanji_w)); // 0xfc - 0xff : Memory mapper I/O ports. I/O handlers will be installed if a memory mapper is present in a system } -void msx_state::msx2p_io_map(address_map &map) +void msx2_state::msx2p_io_map(address_map &map) { map.unmap_value_high(); map.global_mask(0xff); - map(0x40, 0x4f).rw(FUNC(msx_state::msx_switched_r), FUNC(msx_state::msx_switched_w)); + map(0x40, 0x4f).rw(FUNC(msx2_state::msx_switched_r), FUNC(msx2_state::msx_switched_w)); // 0x7c - 0x7d : MSX-MUSIC/FM-PAC write port. Handlers will be installed if MSX-MUSIC is present in a system map(0x90, 0x90).r("cent_status_in", FUNC(input_buffer_device::bus_r)); map(0x90, 0x90).w("cent_ctrl_out", FUNC(output_latch_device::bus_w)); map(0x91, 0x91).w("cent_data_out", FUNC(output_latch_device::bus_w)); - map(0xa0, 0xa7).r(m_ay8910, FUNC(ay8910_device::data_r)).w(FUNC(msx_state::msx_ay8910_w)); + map(0xa0, 0xa7).rw(m_ay8910, FUNC(ay8910_device::data_r), FUNC(ay8910_device::address_data_w)); map(0xa8, 0xab).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x98, 0x9b).rw(m_v9958, FUNC(v9958_device::read), FUNC(v9958_device::write)); - map(0xb4, 0xb4).w(FUNC(msx_state::msx_rtc_latch_w)); - map(0xb5, 0xb5).rw(FUNC(msx_state::msx_rtc_reg_r), FUNC(msx_state::msx_rtc_reg_w)); - map(0xd8, 0xd9).rw(FUNC(msx_state::msx_kanji_r), FUNC(msx_state::msx_kanji_w)); + map(0xb4, 0xb4).w(FUNC(msx2_state::msx_rtc_latch_w)); + map(0xb5, 0xb5).rw(FUNC(msx2_state::msx_rtc_reg_r), FUNC(msx2_state::msx_rtc_reg_w)); + map(0xd8, 0xd9).rw(FUNC(msx2_state::msx_kanji_r), FUNC(msx2_state::msx_kanji_w)); // 0xfc - 0xff : Memory mapper I/O ports. I/O handlers will be installed if a memory mapper is present in a system } @@ -1230,7 +1221,7 @@ INPUT_PORTS_END // Some MSX2+ can switch the z80 clock between 3.5 and 5.3 MHz -WRITE_LINE_MEMBER(msx_state::turbo_w) +WRITE_LINE_MEMBER(msx2_state::turbo_w) { // 0 - 5.369317 MHz // 1 - 3.579545 MHz @@ -1254,23 +1245,23 @@ MACHINE_CONFIG_START(msx_state::msx1_floplist) MCFG_SOFTWARE_LIST_ADD("flop_list", "msx1_flop") MACHINE_CONFIG_END -MACHINE_CONFIG_START(msx_state::msx2_cartlist) +MACHINE_CONFIG_START(msx2_state::msx2_cartlist) MCFG_SOFTWARE_LIST_ADD("cart_list", "msx2_cart") MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("msx1_crt_l", "msx1_cart") MACHINE_CONFIG_END -MACHINE_CONFIG_START(msx_state::msx2_floplist) +MACHINE_CONFIG_START(msx2_state::msx2_floplist) MCFG_SOFTWARE_LIST_ADD("flop_list", "msx2_flop") MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("msx1_flp_l", "msx1_flop") MACHINE_CONFIG_END -MACHINE_CONFIG_START(msx_state::msx2p_floplist) +MACHINE_CONFIG_START(msx2_state::msx2p_floplist) MCFG_SOFTWARE_LIST_ADD("flop_list", "msx2p_flop") MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("msx2_flp_l", "msx2_flop") MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("msx1_flp_l", "msx1_flop") // maybe not? MACHINE_CONFIG_END -MACHINE_CONFIG_START(msx_state::msxr_floplist) +MACHINE_CONFIG_START(msx2_state::msxr_floplist) MCFG_SOFTWARE_LIST_ADD("flop_list", "msxr_flop") MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("msx2p_flp_l", "msx2p_flop") MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("msx2_flp_l", "msx2_flop") // maybe not? @@ -1317,9 +1308,10 @@ void msx_state::msx_mb8877a(machine_config & config) fdc.set_force_ready(true); } -MACHINE_CONFIG_START(msx_state::msx_tc8566af) - MCFG_TC8566AF_ADD("fdc") -MACHINE_CONFIG_END +void msx_state::msx_tc8566af(machine_config &config) +{ + TC8566AF(config, "fdc"); +} void msx_state::msx_microsol(machine_config &config) { @@ -1340,12 +1332,12 @@ MACHINE_CONFIG_START(msx_state::msx_2_35_dd_drive) MCFG_FLOPPY_DRIVE_ADD("fdc:1", msx_floppies, "35dd", msx_state::floppy_formats) MACHINE_CONFIG_END -MACHINE_CONFIG_START(msx_state::msx_ym2413) +MACHINE_CONFIG_START(msx2_state::msx_ym2413) MCFG_DEVICE_ADD("ym2413", YM2413, 21.477272_MHz_XTAL / 6) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.4) MACHINE_CONFIG_END -MACHINE_CONFIG_START(msx_state::msx2_64kb_vram) +MACHINE_CONFIG_START(msx2_state::msx2_64kb_vram) MCFG_DEVICE_MODIFY("v9938") downcast<v99x8_device &>(*device).set_vram_size(0x10000); MACHINE_CONFIG_END @@ -1412,7 +1404,7 @@ void msx_state::msx1(VDPType &vdp_type, machine_config &config) } -MACHINE_CONFIG_START(msx_state::msx2) +MACHINE_CONFIG_START(msx2_state::msx2) /* basic machine hardware */ MCFG_DEVICE_ADD("maincpu", Z80, 21.477272_MHz_XTAL / 6) /* 3.579545 MHz */ MCFG_DEVICE_PROGRAM_MAP(msx_memory_map) @@ -1420,15 +1412,15 @@ MACHINE_CONFIG_START(msx_state::msx2) MCFG_QUANTUM_TIME(attotime::from_hz(60)) i8255_device &ppi(I8255(config, "ppi8255")); - ppi.out_pa_callback().set(FUNC(msx_state::msx_ppi_port_a_w)); - ppi.in_pb_callback().set(FUNC(msx_state::msx_ppi_port_b_r)); - ppi.out_pc_callback().set(FUNC(msx_state::msx_ppi_port_c_w)); + ppi.out_pa_callback().set(FUNC(msx2_state::msx_ppi_port_a_w)); + ppi.in_pb_callback().set(FUNC(msx2_state::msx_ppi_port_b_r)); + ppi.out_pc_callback().set(FUNC(msx2_state::msx_ppi_port_c_w)); /* video hardware */ V9938(config, m_v9938, 21.477272_MHz_XTAL); m_v9938->set_screen_ntsc("screen"); m_v9938->set_vram_size(0x20000); - m_v9938->int_cb().set(FUNC(msx_state::msx_irq_source0)); + m_v9938->int_cb().set(FUNC(msx2_state::msx_irq_source0)); SCREEN(config, "screen", SCREEN_TYPE_RASTER); /* sound hardware */ @@ -1440,10 +1432,10 @@ MACHINE_CONFIG_START(msx_state::msx2) WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "speaker", 0.25); MCFG_DEVICE_ADD("ay8910", AY8910, 21.477272_MHz_XTAL / 6 / 2) MCFG_AY8910_OUTPUT_TYPE(AY8910_SINGLE_OUTPUT) - MCFG_AY8910_PORT_A_READ_CB(READ8(*this, msx_state, msx_psg_port_a_r)) - MCFG_AY8910_PORT_B_READ_CB(READ8(*this, msx_state, msx_psg_port_b_r)) - MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(*this, msx_state, msx_psg_port_a_w)) - MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(*this, msx_state, msx_psg_port_b_w)) + MCFG_AY8910_PORT_A_READ_CB(READ8(*this, msx2_state, msx_psg_port_a_r)) + MCFG_AY8910_PORT_B_READ_CB(READ8(*this, msx2_state, msx_psg_port_b_r)) + MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(*this, msx2_state, msx_psg_port_a_w)) + MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(*this, msx2_state, msx_psg_port_b_w)) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.3) /* printer */ @@ -1471,7 +1463,7 @@ MACHINE_CONFIG_START(msx_state::msx2) MACHINE_CONFIG_END -MACHINE_CONFIG_START(msx_state::msx2p) +MACHINE_CONFIG_START(msx2_state::msx2p) /* basic machine hardware */ MCFG_DEVICE_ADD("maincpu", Z80, 21.477272_MHz_XTAL / 6) /* 3.579545 MHz */ MCFG_DEVICE_PROGRAM_MAP(msx_memory_map) @@ -1479,15 +1471,15 @@ MACHINE_CONFIG_START(msx_state::msx2p) MCFG_QUANTUM_TIME(attotime::from_hz(60)) i8255_device &ppi(I8255(config, "ppi8255")); - ppi.out_pa_callback().set(FUNC(msx_state::msx_ppi_port_a_w)); - ppi.in_pb_callback().set(FUNC(msx_state::msx_ppi_port_b_r)); - ppi.out_pc_callback().set(FUNC(msx_state::msx_ppi_port_c_w)); + ppi.out_pa_callback().set(FUNC(msx2_state::msx_ppi_port_a_w)); + ppi.in_pb_callback().set(FUNC(msx2_state::msx_ppi_port_b_r)); + ppi.out_pc_callback().set(FUNC(msx2_state::msx_ppi_port_c_w)); /* video hardware */ V9958(config, m_v9958, 21.477272_MHz_XTAL); m_v9958->set_screen_ntsc("screen"); m_v9958->set_vram_size(0x20000); - m_v9958->int_cb().set(FUNC(msx_state::msx_irq_source0)); + m_v9958->int_cb().set(FUNC(msx2_state::msx_irq_source0)); SCREEN(config, "screen", SCREEN_TYPE_RASTER); /* sound hardware */ @@ -1499,10 +1491,10 @@ MACHINE_CONFIG_START(msx_state::msx2p) WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "speaker", 0.25); MCFG_DEVICE_ADD("ay8910", AY8910, 21.477272_MHz_XTAL / 6 / 2) MCFG_AY8910_OUTPUT_TYPE(AY8910_SINGLE_OUTPUT) - MCFG_AY8910_PORT_A_READ_CB(READ8(*this, msx_state, msx_psg_port_a_r)) - MCFG_AY8910_PORT_B_READ_CB(READ8(*this, msx_state, msx_psg_port_b_r)) - MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(*this, msx_state, msx_psg_port_a_w)) - MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(*this, msx_state, msx_psg_port_b_w)) + MCFG_AY8910_PORT_A_READ_CB(READ8(*this, msx2_state, msx_psg_port_a_r)) + MCFG_AY8910_PORT_B_READ_CB(READ8(*this, msx2_state, msx_psg_port_b_r)) + MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(*this, msx2_state, msx_psg_port_a_w)) + MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(*this, msx2_state, msx_psg_port_b_w)) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.3) /* printer */ @@ -1530,7 +1522,7 @@ MACHINE_CONFIG_START(msx_state::msx2p) MACHINE_CONFIG_END -void msx_state::msx2_pal(machine_config &config) +void msx2_state::msx2_pal(machine_config &config) { msx2(config); m_v9938->set_screen_pal("screen"); @@ -4550,7 +4542,7 @@ ROM_START (ax350) ROM_LOAD ("ax350disk.rom", 0x2c000, 0x4000, CRC(1e7d6512) SHA1(78cd7f847e77fd8cd51a647efb2725ba93f4c471)) ROM_END -MACHINE_CONFIG_START(msx_state::ax350) +MACHINE_CONFIG_START(msx2_state::ax350) msx2_pal(config); // AY8910/YM2149? // FDC: wd2793/tc8566af?, 1 3.5" DSDD drive @@ -4586,7 +4578,7 @@ ROM_START (ax370) ROM_LOAD ("ax370disk.rom", 0x2c000, 0x4000, CRC(60f8baba) SHA1(95de8809d2758fc0a743390ea5085b602e59e101)) ROM_END -MACHINE_CONFIG_START(msx_state::ax370) +MACHINE_CONFIG_START(msx2_state::ax370) msx2_pal(config); // AY8910/YM2149? // FDC: tc8566af, 1 3.5" DSDD drive @@ -4618,7 +4610,7 @@ ROM_START (canonv25) ROM_LOAD ("v25ext.rom", 0x8000, 0x4000, CRC(4a48779c) SHA1(b8e30d604d319d511cbfbc61e5d8c38fbb9c5a33)) ROM_END -MACHINE_CONFIG_START(msx_state::canonv25) +MACHINE_CONFIG_START(msx2_state::canonv25) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: None, 0 drives @@ -4648,7 +4640,7 @@ ROM_START (canonv30) ROM_LOAD ("v30disk.rom", 0xc000, 0x4000, CRC(54c73ad6) SHA1(12f2cc79b3d09723840bae774be48c0d721ec1c6)) ROM_END -MACHINE_CONFIG_START(msx_state::canonv30) +MACHINE_CONFIG_START(msx2_state::canonv30) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: ??, 2 3.5" DSDD drive @@ -4680,7 +4672,7 @@ ROM_START (canonv30f) ROM_LOAD ("v30fdisk.rom", 0xc000, 0x4000, CRC(54c73ad6) SHA1(12f2cc79b3d09723840bae774be48c0d721ec1c6)) ROM_END -MACHINE_CONFIG_START(msx_state::canonv30f) +MACHINE_CONFIG_START(msx2_state::canonv30f) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: ??, 2 3.5" DSDD drive @@ -4712,7 +4704,7 @@ ROM_START (cpc300) ROM_LOAD ("300han.rom", 0x10000, 0x8000, CRC(e78cd87f) SHA1(47a9d9a24e4fc6f9467c6e7d61a02d45f5a753ef)) ROM_END -MACHINE_CONFIG_START(msx_state::cpc300) +MACHINE_CONFIG_START(msx2_state::cpc300) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: None, 0 drives @@ -4742,7 +4734,7 @@ ROM_START (cpc300e) ROM_LOAD ("300ehan.rom", 0x10000, 0x4000, BAD_DUMP CRC(5afea78d) SHA1(f08c91f8c78d681e1f02eaaaaafb87ad81112b60)) ROM_END -MACHINE_CONFIG_START(msx_state::cpc300e) +MACHINE_CONFIG_START(msx2_state::cpc300e) msx2(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -4770,7 +4762,7 @@ ROM_START (cpc330k) ROM_LOAD ("330khan.rom", 0x10000, 0x4000, CRC(3d6dd335) SHA1(d2b058989a700ca772b9591f42c01ed0f45f74d6)) ROM_END -MACHINE_CONFIG_START(msx_state::cpc330k) +MACHINE_CONFIG_START(msx2_state::cpc330k) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: None, 0 drives @@ -4804,7 +4796,7 @@ ROM_START (cpc400) ROM_LOAD ("400kfn.rom", 0, 0x20000, CRC(b663c605) SHA1(965f4982790f1817bcbabbb38c8777183b231a55)) ROM_END -MACHINE_CONFIG_START(msx_state::cpc400) +MACHINE_CONFIG_START(msx2_state::cpc400) msx2(config); // AY8910/YM2149? // FDC: mb8877a, 1 3.5" DS?DD drive @@ -4839,7 +4831,7 @@ ROM_START (cpc400s) ROM_LOAD ("400skfn.rom", 0, 0x20000, CRC(fa85368c) SHA1(30fff22e3e3d464993707488442721a5e56a9707)) ROM_END -MACHINE_CONFIG_START(msx_state::cpc400s) +MACHINE_CONFIG_START(msx2_state::cpc400s) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: mb8877a, 1 3.5" DS?DD drive @@ -4875,7 +4867,7 @@ ROM_START (cpc61) ROM_LOAD ("61kfn.rom", 0x00000, 0x40000, CRC(9a3cf67c) SHA1(22d5f4e522250dc5eb17e15b68f4a51bb752cba1)) ROM_END -MACHINE_CONFIG_START(msx_state::cpc61) +MACHINE_CONFIG_START(msx2_state::cpc61) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: None, 0 drives @@ -4908,7 +4900,7 @@ ROM_START (cpg120) ROM_LOAD ("cpg120kfn.rom", 0x0000, 0x40000, CRC(9a3cf67c) SHA1(22d5f4e522250dc5eb17e15b68f4a51bb752cba1)) ROM_END -MACHINE_CONFIG_START(msx_state::cpg120) +MACHINE_CONFIG_START(msx2_state::cpg120) msx2(config); // YM2149 (in S1985) // FDC: None, 0 drives @@ -4946,7 +4938,7 @@ ROM_START (fpc900) ROM_LOAD ("fpc900disk.rom", 0xc000, 0x4000, CRC(ca3307d3) SHA1(c3efedda7ab947a06d9345f7b8261076fa7ceeef)) ROM_END -MACHINE_CONFIG_START(msx_state::fpc900) +MACHINE_CONFIG_START(msx2_state::fpc900) msx2_pal(config); // YM2149 (in S-3527 MSX Engine) // FDC: WD2793?, 1 3.5" DSDD drive @@ -4978,7 +4970,7 @@ ROM_START (expert20) ROM_LOAD ("microsoldisk.rom", 0x10000, 0x4000, CRC(6704ef81) SHA1(a3028515ed829e900cc8deb403e17b09a38bf9b0)) ROM_END -MACHINE_CONFIG_START(msx_state::expert20) +MACHINE_CONFIG_START(msx2_state::expert20) msx2_pal(config); // AY8910/YM2149? // FDC: microsol, 1? 3.5"? DS?DD drive @@ -5013,7 +5005,7 @@ ROM_START (mbh70) ROM_LOAD ("mbh70kfn.rom", 0x0000, 0x20000, CRC(d23d4d2d) SHA1(db03211b7db46899df41db2b1dfbec972109a967)) ROM_END -MACHINE_CONFIG_START(msx_state::mbh70) +MACHINE_CONFIG_START(msx2_state::mbh70) msx2(config); // YM2149 (in S-1985) // FDC: WD2793?, 1? 3.5" DSDD drive @@ -5050,7 +5042,7 @@ ROM_START (kmc5000) ROM_LOAD ("kmc5000kfn.rom", 0, 0x20000, CRC(c61ddc5d) SHA1(5e872d5853698731a0ed22fb72dbcdfd59cd19c3)) ROM_END -MACHINE_CONFIG_START(msx_state::kmc5000) +MACHINE_CONFIG_START(msx2_state::kmc5000) msx2(config); // YM2149 (in S-1985) // FDC: TC8566AF?, 1? 3.5" DSDD drive @@ -5083,7 +5075,7 @@ ROM_START (mlg1) ROM_LOAD ("mlg1paint.rom", 0xc000, 0x8000, CRC(64df1750) SHA1(5cf0abca6dbcf940bc33c433ecb4e4ada02fbfe6)) ROM_END -MACHINE_CONFIG_START(msx_state::mlg1) +MACHINE_CONFIG_START(msx2_state::mlg1) msx2_pal(config); // YM2149 (in S-1985) // FDC: None, 0 drives @@ -5112,7 +5104,7 @@ ROM_START (mlg3) ROM_LOAD ("mlg3rs232c.rom", 0x10000, 0x4000, CRC(90b8a114) SHA1(dc50f2c9db233e505b0981c244ff3de553ac9d68)) ROM_END -MACHINE_CONFIG_START(msx_state::mlg3) +MACHINE_CONFIG_START(msx2_state::mlg3) msx2_pal(config); // YM2149 (in S-1985) // FDC: wd2793?, 1 3.5" DSDD drive @@ -5147,7 +5139,7 @@ ROM_START (mlg10) ROM_LOAD ("mlg10kfn.rom", 0, 0x20000, CRC(d23d4d2d) SHA1(db03211b7db46899df41db2b1dfbec972109a967)) ROM_END -MACHINE_CONFIG_START(msx_state::mlg10) +MACHINE_CONFIG_START(msx2_state::mlg10) msx2(config); // YM2149 (in S-1985) // FDC: None, 0 drives @@ -5177,7 +5169,7 @@ ROM_START (mlg30) ROM_LOAD ("g30kfn.rom", 0x0000, 0x20000, CRC(d23d4d2d) SHA1(db03211b7db46899df41db2b1dfbec972109a967)) ROM_END -MACHINE_CONFIG_START(msx_state::mlg30) +MACHINE_CONFIG_START(msx2_state::mlg30) msx2(config); // AY8910/YM2149? // FDC: wd2793/tc8566af?, 1 or 2? 3.5" DSDD drives @@ -5219,7 +5211,7 @@ ROM_START (fs4500) ROM_LOAD ("4500budi.rom", 0, 0x20000, CRC(f94590f8) SHA1(1ebb06062428fcdc66808a03761818db2bba3c73)) ROM_END -MACHINE_CONFIG_START(msx_state::fs4500) +MACHINE_CONFIG_START(msx2_state::fs4500) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: None, 0 drives @@ -5267,7 +5259,7 @@ ROM_START (fs4600) ROM_LOAD ("4600kf12.rom", 0, 0x20000, CRC(340d1ef7) SHA1(a7a23dc01314e88381eee88b4878b39931ab4818)) ROM_END -MACHINE_CONFIG_START(msx_state::fs4600) +MACHINE_CONFIG_START(msx2_state::fs4600) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: mb8877a, 1 3.5" DSDD drive @@ -5318,7 +5310,7 @@ ROM_START (fs4700) ROM_LOAD ("4700budi.rom", 0, 0x20000, CRC(f94590f8) SHA1(1ebb06062428fcdc66808a03761818db2bba3c73)) ROM_END -MACHINE_CONFIG_START(msx_state::fs4700) +MACHINE_CONFIG_START(msx2_state::fs4700) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: mb8877a, 1 3.5" DSDD drive @@ -5366,7 +5358,7 @@ ROM_START (fs5000) ROM_LOAD ("5000kfn.rom", 0, 0x20000, CRC(c61ddc5d) SHA1(5e872d5853698731a0ed22fb72dbcdfd59cd19c3)) ROM_END -MACHINE_CONFIG_START(msx_state::fs5000) +MACHINE_CONFIG_START(msx2_state::fs5000) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: wd2793, 2 3.5" DSDD drives @@ -5413,7 +5405,7 @@ ROM_START (fs5500f1) ROM_LOAD ("5500kfn.rom", 0, 0x20000, CRC(956dc96d) SHA1(9ed3ab6d893632b9246e91b412cd5db519e7586b)) ROM_END -MACHINE_CONFIG_START(msx_state::fs5500f1) +MACHINE_CONFIG_START(msx2_state::fs5500f1) msx2(config); // YM2149 in (S-1985 MSX Engine) // FDC: mb8877a, 1 3.5" DSDD drive @@ -5462,7 +5454,7 @@ ROM_START (fs5500f2) ROM_LOAD ("5500kfn.rom", 0, 0x20000, CRC(956dc96d) SHA1(9ed3ab6d893632b9246e91b412cd5db519e7586b)) ROM_END -MACHINE_CONFIG_START(msx_state::fs5500f2) +MACHINE_CONFIG_START(msx2_state::fs5500f2) msx2(config); // YM2149 in (S-1985 MSX Engine) // FDC: mb8877a, 2 3.5" DSDD drive @@ -5503,7 +5495,7 @@ ROM_START (fsa1) ROM_LOAD ("a1desk2.rom", 0x18000, 0x8000, CRC(7f6f4aa1) SHA1(7f5b76605e3d898cc4b5aacf1d7682b82fe84353)) ROM_END -MACHINE_CONFIG_START(msx_state::fsa1) +MACHINE_CONFIG_START(msx2_state::fsa1) msx2(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -5530,7 +5522,7 @@ ROM_START (fsa1a) ROM_LOAD ("a1desk2.rom", 0x14000, 0x8000, CRC(7f6f4aa1) SHA1(7f5b76605e3d898cc4b5aacf1d7682b82fe84353)) ROM_END -MACHINE_CONFIG_START(msx_state::fsa1a) +MACHINE_CONFIG_START(msx2_state::fsa1a) msx2(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -5561,7 +5553,7 @@ ROM_START (fsa1f) ROM_LOAD ("a1fkfn.rom", 0, 0x20000, CRC(c61ddc5d) SHA1(5e872d5853698731a0ed22fb72dbcdfd59cd19c3)) ROM_END -MACHINE_CONFIG_START(msx_state::fsa1f) +MACHINE_CONFIG_START(msx2_state::fsa1f) msx2(config); // AY8910/YM2149? // FDC: tc8566af, 1 3.5" DSDD drive @@ -5601,7 +5593,7 @@ ROM_START (fsa1fm) ROM_LOAD ("a1fmkf12.rom", 0, 0x20000, CRC(340d1ef7) SHA1(a7a23dc01314e88381eee88b4878b39931ab4818)) ROM_END -MACHINE_CONFIG_START(msx_state::fsa1fm) +MACHINE_CONFIG_START(msx2_state::fsa1fm) msx2(config); // AY8910/YM2149? // FDC: tc8566af, 1 3.5" DSDD drive @@ -5636,7 +5628,7 @@ ROM_START (fsa1mk2) ROM_LOAD ("a1mkcoc3.rom", 0x18000, 0x8000, CRC(c1945676) SHA1(a3f4e2e4934074925d775afe30ac72f150ede543)) ROM_END -MACHINE_CONFIG_START(msx_state::fsa1mk2) +MACHINE_CONFIG_START(msx2_state::fsa1mk2) msx2(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -5664,7 +5656,7 @@ ROM_START (nms8220) ROM_LOAD ("8220pen.rom.u13", 0xc000, 0x4000, CRC(3d38c53e) SHA1(cb754aed85b3e97a7d3c5894310df7ca18f89f41)) ROM_END -MACHINE_CONFIG_START(msx_state::nms8220) +MACHINE_CONFIG_START(msx2_state::nms8220) msx2_pal(config); // YM2149 (in S-3527 MSX Engine) // FDC: None, 0 drives @@ -5691,7 +5683,7 @@ ROM_START (nms8220a) ROM_LOAD ("8220pena.rom.u13", 0xc000, 0x4000, CRC(17817b5a) SHA1(5df95d033ae70b107697b69470126ce1b7ae9eb5)) ROM_END -MACHINE_CONFIG_START(msx_state::nms8220a) +MACHINE_CONFIG_START(msx2_state::nms8220a) msx2_pal(config); // YM2149 (in S-3527 MSX Engine) // FDC: None, 0 drives @@ -5719,7 +5711,7 @@ ROM_START (nms8245) ROM_LOAD ("nms8245.u7", 0x0000, 0x20000, BAD_DUMP CRC(0c827d5f) SHA1(064e706cb1f12b99b329944ceeedc0efc3b2d9be)) ROM_END -MACHINE_CONFIG_START(msx_state::nms8245) +MACHINE_CONFIG_START(msx2_state::nms8245) msx2_pal(config); // YM2149 (in S-3527 MSX Engine) // FDC: wd2793, 1 3.5" DSDD drive @@ -5749,7 +5741,7 @@ ROM_START (nms8245f) ROM_LOAD ("nms8245.u7", 0x0000, 0x20000, BAD_DUMP CRC(0c827d5f) SHA1(064e706cb1f12b99b329944ceeedc0efc3b2d9be)) ROM_END -MACHINE_CONFIG_START(msx_state::nms8245f) +MACHINE_CONFIG_START(msx2_state::nms8245f) msx2_pal(config); // YM2149 (in S-3527 MSX Engine) // FDC: wd2793, 1 3.5" DSDD drive @@ -5781,7 +5773,7 @@ ROM_START (nms8250) ROM_LOAD ("jq00014.ic117", 0xc000, 0x4000, CRC(ca3307d3) SHA1(c3efedda7ab947a06d9345f7b8261076fa7ceeef)) ROM_END -MACHINE_CONFIG_START(msx_state::nms8250) +MACHINE_CONFIG_START(msx2_state::nms8250) msx2_pal(config); // YM2149 (in S-3527 MSX Engine) // FDC: wd2793, 1 3.5" DSDD drive @@ -5812,7 +5804,7 @@ ROM_START (nms8250f) ROM_LOAD ("nms8250fdisk.rom", 0xc000, 0x4000, CRC(13b60725) SHA1(58ba1887e8fd21c912b6859cae6514bd874ffcca)) ROM_END -MACHINE_CONFIG_START(msx_state::nms8250f) +MACHINE_CONFIG_START(msx2_state::nms8250f) msx2_pal(config); // YM2149 (in S-3527 MSX Engine) // FDC: wd2793, 1 3.5" DSDD drive @@ -5846,7 +5838,7 @@ ROM_START (nms8250j) ROM_LOAD ("8250jkfn.rom", 0x00000, 0x20000, CRC(5a59926e) SHA1(6acaf2eeb57f65f7408235d5e07b7563229de799)) ROM_END -MACHINE_CONFIG_START(msx_state::nms8250j) +MACHINE_CONFIG_START(msx2_state::nms8250j) msx2(config); // AY8910/YM2149? // FDC: wd2793?, 1 3.5" DSDD drive @@ -5875,7 +5867,7 @@ ROM_START (nms8255) ROM_LOAD ("8255disk.rom.ic117", 0xc000, 0x4000, CRC(ca3307d3) SHA1(c3efedda7ab947a06d9345f7b8261076fa7ceeef)) ROM_END -MACHINE_CONFIG_START(msx_state::nms8255) +MACHINE_CONFIG_START(msx2_state::nms8255) msx2_pal(config); // YM2149 (in S-3527 MSX Engine) // FDC: wd2793, 2 3.5" DSDD drives @@ -5906,7 +5898,7 @@ ROM_START (nms8255f) ROM_LOAD ("nms8255fdisk.rom", 0xc000, 0x4000, CRC(13b60725) SHA1(58ba1887e8fd21c912b6859cae6514bd874ffcca)) ROM_END -MACHINE_CONFIG_START(msx_state::nms8255f) +MACHINE_CONFIG_START(msx2_state::nms8255f) msx2_pal(config); // YM2149 (in S-3527 MSX Engine) // FDC: wd2793, 2 3.5" DSDD drives @@ -5939,7 +5931,7 @@ ROM_START (nms8260) ROM_LOAD ("nms8260hdd.rom", 0x10000, 0x4000, CRC(0051afc3) SHA1(77f9fe964f6d8cb8c4af3b5fe63ce6591d5288e6)) ROM_END -MACHINE_CONFIG_START(msx_state::nms8260) +MACHINE_CONFIG_START(msx2_state::nms8260) msx2_pal(config); // YM2149 (in S-3527 MSX Engine) // FDC: wd2793, 1 3.5" DSDD drives @@ -5973,7 +5965,7 @@ ROM_START (nms8280) ROM_LOAD ("8280disk.rom.ic117", 0xc000, 0x4000, CRC(ca3307d3) SHA1(c3efedda7ab947a06d9345f7b8261076fa7ceeef)) ROM_END -MACHINE_CONFIG_START(msx_state::nms8280) +MACHINE_CONFIG_START(msx2_state::nms8280) msx2_pal(config); // AY8910/YM2149? // FDC: wd2793, 2 3.5" DSDD drives @@ -6003,7 +5995,7 @@ ROM_START (nms8280f) ROM_LOAD ("8280fdisk.rom", 0xc000, 0x4000, CRC(13b60725) SHA1(58ba1887e8fd21c912b6859cae6514bd874ffcca)) ROM_END -MACHINE_CONFIG_START(msx_state::nms8280f) +MACHINE_CONFIG_START(msx2_state::nms8280f) msx2_pal(config); // AY8910/YM2149? // FDC: wd2793, 2 3.5" DSDD drives @@ -6033,7 +6025,7 @@ ROM_START (nms8280g) ROM_LOAD ("8280gdisk.rom.ic117", 0xc000, 0x4000, CRC(d0beebb8) SHA1(d1001f93c87ff7fb389e418e33bf7bc81bdbb65f)) ROM_END -MACHINE_CONFIG_START(msx_state::nms8280g) +MACHINE_CONFIG_START(msx2_state::nms8280g) msx2_pal(config); // AY8910/YM2149? // FDC: wd2793, 2 3.5" DSDD drives @@ -6063,7 +6055,7 @@ ROM_START (vg8230) ROM_LOAD ("8230disk.rom.u13", 0xc000, 0x4000, CRC(77c4e5bc) SHA1(849f93867ff7846b27f84d0be418569faf058ac2)) ROM_END -MACHINE_CONFIG_START(msx_state::vg8230) +MACHINE_CONFIG_START(msx2_state::vg8230) msx2_pal(config); // YM2149 (in S-3527 MSX Engine) // FDC: wd2793, 1 3.5" SSDD drive @@ -6097,7 +6089,7 @@ ROM_START (vg8230j) ROM_LOAD ("8230jkfn.rom", 0x00000, 0x20000, CRC(5a59926e) SHA1(6acaf2eeb57f65f7408235d5e07b7563229de799)) ROM_END -MACHINE_CONFIG_START(msx_state::vg8230j) +MACHINE_CONFIG_START(msx2_state::vg8230j) msx2(config); // AY8910/YM2149? // FDC: wd2793?, 1 3.5" SSDD drive? @@ -6126,7 +6118,7 @@ ROM_START (vg8235) ROM_LOAD ("8235disk.rom.u50", 0xc000, 0x4000, CRC(51daeb25) SHA1(8954e59aa79310c7b719ecf0cde1e82fb731dcd1)) ROM_END -MACHINE_CONFIG_START(msx_state::vg8235) +MACHINE_CONFIG_START(msx2_state::vg8235) msx2_pal(config); // YM2149 (in S-3527 MSX Engine) // FDC: wd2793, 1 3.5" SSDD drive @@ -6157,7 +6149,7 @@ ROM_START (vg8235f) ROM_LOAD ("8235fdisk.rom.u50", 0xc000, 0x4000, CRC(77c4e5bc) SHA1(849f93867ff7846b27f84d0be418569faf058ac2)) ROM_END -MACHINE_CONFIG_START(msx_state::vg8235f) +MACHINE_CONFIG_START(msx2_state::vg8235f) msx2_pal(config); // YM2149 (in S-3527 MSX Engine) // FDC: wd2793, 1 3.5" SSDD drive @@ -6188,7 +6180,7 @@ ROM_START (vg8240) ROM_LOAD ("8240disk.rom", 0xc000, 0x4000, CRC(ca3307d3) SHA1(c3efedda7ab947a06d9345f7b8261076fa7ceeef)) ROM_END -MACHINE_CONFIG_START(msx_state::vg8240) +MACHINE_CONFIG_START(msx2_state::vg8240) msx2_pal(config); // AY8910/YM2149? // FDC: wd2793, 1 3.5" DSDD drive @@ -6217,7 +6209,7 @@ ROM_START (mpc2300) ROM_LOAD ("2300ext.rom", 0x8000, 0x4000, CRC(3d7dc718) SHA1(e1f834b28c3ee7c9f79fe6fbf2b23c8a0617892b)) ROM_END -MACHINE_CONFIG_START(msx_state::mpc2300) +MACHINE_CONFIG_START(msx2_state::mpc2300) msx2(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -6241,7 +6233,7 @@ ROM_START (mpc2500f) ROM_LOAD ("mpc2500fddisk.rom", 0xc000, 0x4000, CRC(38454059) SHA1(58ac78bba29a06645ca8d6a94ef2ac68b743ad32)) ROM_END -MACHINE_CONFIG_START(msx_state::mpc2500f) +MACHINE_CONFIG_START(msx2_state::mpc2500f) msx2(config); // YM2149 // FDC: wd2793?, 1? 3.5" DSDD drive? @@ -6271,7 +6263,7 @@ ROM_START (mpc25fd) ROM_LOAD ("25fddisk.rom", 0xc000, 0x4000, CRC(38454059) SHA1(58ac78bba29a06645ca8d6a94ef2ac68b743ad32)) ROM_END -MACHINE_CONFIG_START(msx_state::mpc25fd) +MACHINE_CONFIG_START(msx2_state::mpc25fd) msx2(config); // YM2149 (in S-3527 MSX Engine) // FDC: wd2793, 1 drive @@ -6302,7 +6294,7 @@ ROM_START (mpc27) ROM_RELOAD (0x12000, 0x2000) ROM_END -MACHINE_CONFIG_START(msx_state::mpc27) +MACHINE_CONFIG_START(msx2_state::mpc27) msx2(config); // YM2149 (in S-3527 MSX Engine) // FDC: wd2793?, 1 drive @@ -6332,7 +6324,7 @@ ROM_START (phc23) ROM_LOAD ("23ext.rom", 0x8000, 0x4000, CRC(90ca25b5) SHA1(fd9fa78bac25aa3c0792425b21d14e364cf7eea4)) ROM_END -MACHINE_CONFIG_START(msx_state::phc23) +MACHINE_CONFIG_START(msx2_state::phc23) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: None, 0 drives @@ -6359,7 +6351,7 @@ ROM_START (phc55fd2) ROM_LOAD ("phc55fd2disk.rom", 0xc000, 0x4000, CRC(38454059) SHA1(58ac78bba29a06645ca8d6a94ef2ac68b743ad32)) ROM_END -MACHINE_CONFIG_START(msx_state::phc55fd2) +MACHINE_CONFIG_START(msx2_state::phc55fd2) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: wd2793?, 2 3.5" DSDD drives @@ -6395,7 +6387,7 @@ ROM_START (phc77) ROM_LOAD ("phc77kfn.rom", 0x0000, 0x20000, CRC(3b8fdf44) SHA1(fc71561a64f73da0e0043d256f67fd18d7fc3a7f)) ROM_END -MACHINE_CONFIG_START(msx_state::phc77) +MACHINE_CONFIG_START(msx2_state::phc77) msx2(config); // YM2149 (in S-1985 MSX Engine) // FDC: wd2793?, 1 drive @@ -6430,7 +6422,7 @@ ROM_START (hotbit20) ROM_LOAD ("microsoldisk.rom", 0x10000, 0x4000, CRC(6704ef81) SHA1(a3028515ed829e900cc8deb403e17b09a38bf9b0)) ROM_END -MACHINE_CONFIG_START(msx_state::hotbit20) +MACHINE_CONFIG_START(msx2_state::hotbit20) msx2_pal(config); // AY8910/YM2149? // FDC: microsol, 1 or 2 drives? @@ -6463,7 +6455,7 @@ ROM_START (hbf1) ROM_LOAD ("f1note3.rom", 0x18000, 0x8000, CRC(73eb9329) SHA1(58accf41a90693874b86ce98d8d43c27beb8b6dc)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf1) +MACHINE_CONFIG_START(msx2_state::hbf1) msx2(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -6492,7 +6484,7 @@ ROM_START (hbf12) ROM_LOAD ("f12note3.rom", 0x18000, 0x8000, CRC(44a10e6a) SHA1(917d1c079e03c4a44de864f123d03c4e32c8daae)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf12) +MACHINE_CONFIG_START(msx2_state::hbf12) msx2(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -6520,7 +6512,7 @@ ROM_START (hbf1xd) ROM_LOAD ("f1xddisk.rom.ic27", 0xc000, 0x4000, BAD_DUMP CRC(54c73ad6) SHA1(12f2cc79b3d09723840bae774be48c0d721ec1c6)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf1xd) +MACHINE_CONFIG_START(msx2_state::hbf1xd) msx2(config); // YM2149 (in S-1895 MSX Engine) // FDC: wd2793, 1 3.5" DSDD drive @@ -6553,7 +6545,7 @@ ROM_START (hbf1xdm2) ROM_LOAD ("f1m2disk.rom.ic27", 0xc000, 0x4000, BAD_DUMP CRC(54c73ad6) SHA1(12f2cc79b3d09723840bae774be48c0d721ec1c6)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf1xdm2) +MACHINE_CONFIG_START(msx2_state::hbf1xdm2) msx2(config); // AY8910/YM2149? // FDC: wd2793, 1 3.5" DSDD drive @@ -6583,7 +6575,7 @@ ROM_START (hbf5) ROM_LOAD ("hbf5note.rom", 0xc000, 0x4000, CRC(0cdc0777) SHA1(06ba91d6732ee8a2ecd5dcc38b0ce42403d86708)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf5) +MACHINE_CONFIG_START(msx2_state::hbf5) msx2_pal(config); // YM2149 // FDC: None, 0 drives @@ -6611,7 +6603,7 @@ ROM_START (hbf500) ROM_LOAD ("f500kfn.rom", 0, 0x20000, CRC(5a59926e) SHA1(6acaf2eeb57f65f7408235d5e07b7563229de799)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf500) +MACHINE_CONFIG_START(msx2_state::hbf500) msx2(config); // AY8910/YM2149? // FDC: wd2793, 1 3.5" DSDD drive @@ -6641,7 +6633,7 @@ ROM_START (hbf500f) ROM_LOAD ("hbf500fdisk.rom", 0xc000, 0x4000, CRC(6e718f5c) SHA1(0e081572f84555dc13bdb0c7044a19d6c164d985)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf500f) +MACHINE_CONFIG_START(msx2_state::hbf500f) msx2_pal(config); // AY8910/YM2149? // FDC: wd2793, 1 3.5" DSDD drive @@ -6671,7 +6663,7 @@ ROM_START (hbf500p) ROM_FILL (0x10000, 0xc000, 0xFF) ROM_END -MACHINE_CONFIG_START(msx_state::hbf500p) +MACHINE_CONFIG_START(msx2_state::hbf500p) msx2_pal(config); // AY8910/YM2149? // FDC: wd2793, 1 3.5" DSDD drive @@ -6701,7 +6693,7 @@ ROM_START (hbf700d) ROM_LOAD ("700dext.ic6", 0x8000, 0x8000, CRC(100cf756) SHA1(317722fa36c2ed31c07c5218b43490fd5badf1f8)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf700d) +MACHINE_CONFIG_START(msx2_state::hbf700d) msx2_pal(config); // YM2149 (in S-1985 MSX Engine) // FDC: wd2793, 1 3.5" DSDD drive @@ -6733,7 +6725,7 @@ ROM_START (hbf700f) ROM_LOAD ("700fext.ic6", 0x8000, 0x8000, CRC(7c8b07b1) SHA1(ecacb20ba0a9bbd25e8c0f128d64dd66f8cd8bee)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf700f) +MACHINE_CONFIG_START(msx2_state::hbf700f) msx2_pal(config); // AY8910/YM2149? // FDC: wd2793, 1 3.5" DSDD drive @@ -6762,7 +6754,7 @@ ROM_START (hbf700p) ROM_LOAD ("700pext.ic6", 0x8000, 0x8000, CRC(63e1bffc) SHA1(496698a60432490dc1306c8cc1d4a6ded275261a)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf700p) +MACHINE_CONFIG_START(msx2_state::hbf700p) msx2_pal(config); // YM2149 (in S-1985 MSX Engine) // FDC: wd2793, 1 3.5" DSDD drive @@ -6794,7 +6786,7 @@ ROM_START (hbf700s) ROM_LOAD ("700sext.ic6", 0x8000, 0x8000, CRC(28d1badf) SHA1(ae3ed88a2d7034178e08f7bdf5409f462bf67fc9)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf700s) +MACHINE_CONFIG_START(msx2_state::hbf700s) msx2_pal(config); // AY8910/YM2149? // FDC: wd2793, 1 3.5" DSDD drive @@ -6828,7 +6820,7 @@ ROM_START (hbf900) ROM_LOAD ("f900kfn.rom", 0, 0x20000, CRC(5a59926e) SHA1(6acaf2eeb57f65f7408235d5e07b7563229de799)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf900) +MACHINE_CONFIG_START(msx2_state::hbf900) msx2(config); // AY8910/YM2149? // FDC: wd2793, 2 3.5" DSDD drives @@ -6863,7 +6855,7 @@ ROM_START (hbf900a) ROM_LOAD ("f900kfn.rom", 0, 0x20000, CRC(5a59926e) SHA1(6acaf2eeb57f65f7408235d5e07b7563229de799)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf900a) +MACHINE_CONFIG_START(msx2_state::hbf900a) msx2(config); // AY8910/YM2149? // FDC: wd2793, 2 3.5" DSDD drives @@ -6894,7 +6886,7 @@ ROM_START (hbf9p) ROM_LOAD ("f9pfirm2.rom.ic13", 0x10000, 0x8000, CRC(ea97069f) SHA1(2d1880d1f5a6944fcb1b198b997a3d90ecd1903d)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf9p) +MACHINE_CONFIG_START(msx2_state::hbf9p) msx2_pal(config); // YM2149 (in S-1985 MSX Engine) // FDC: None, 0 drives @@ -6922,7 +6914,7 @@ ROM_START (hbf9pr) ROM_LOAD ("f9prext.rom", 0x8000, 0x4000, CRC(8b966f50) SHA1(65253cb38ab11084f355a2d4ad78fa6c64cbe660)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf9pr) +MACHINE_CONFIG_START(msx2_state::hbf9pr) msx2_pal(config); // YM2149 (in S-1985 MSX Engine) // FDC: None, 0 drives @@ -6949,7 +6941,7 @@ ROM_START (hbf9s) ROM_LOAD ("f9sfirm2.ic13", 0x10000, 0x8000, CRC(ea97069f) SHA1(2d1880d1f5a6944fcb1b198b997a3d90ecd1903d)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf9s) +MACHINE_CONFIG_START(msx2_state::hbf9s) msx2_pal(config); // YM2149 (in S-1985 MSX Engine) // FDC: None, 0 drives @@ -6986,7 +6978,7 @@ ROM_START (hbg900ap) ROM_LOAD ("g900util.rom", 0x14000, 0x4000, CRC(d0417c20) SHA1(8779b004e7605a3c419825f0373a5d8fa84e1d5b)) ROM_END -MACHINE_CONFIG_START(msx_state::hbg900ap) +MACHINE_CONFIG_START(msx2_state::hbg900ap) msx2_pal(config); // AY8910/YM2149? // FDC: wd2793, 1 3.5" DSDD drive @@ -7020,7 +7012,7 @@ ROM_START (hbg900p) ROM_LOAD ("g900util.rom", 0x14000, 0x4000, CRC(d0417c20) SHA1(8779b004e7605a3c419825f0373a5d8fa84e1d5b)) ROM_END -MACHINE_CONFIG_START(msx_state::hbg900p) +MACHINE_CONFIG_START(msx2_state::hbg900p) msx2_pal(config); // AY8910/YM2149? // FDC: wd2793, 1 3.5" DSDD drive @@ -7053,7 +7045,7 @@ ROM_START (tpc310) ROM_LOAD ("tpc310acc.rom", 0x14000, 0x8000, CRC(4fb8fab3) SHA1(cdeb0ed8adecaaadb78d5a5364fd603238591685)) ROM_END -MACHINE_CONFIG_START(msx_state::tpc310) +MACHINE_CONFIG_START(msx2_state::tpc310) msx2_pal(config); // YM2149 (in S-1985 MSX Engine) // FDC: mb8877a?, 1 3.5" DSDD drive @@ -7087,7 +7079,7 @@ ROM_START (tpp311) ROM_LOAD ("311logo.rom", 0xc000, 0x8000, CRC(0e6ecb9f) SHA1(e45ddc5bf1a1e63756d11fb43fc50276ca35cab0)) ROM_END -MACHINE_CONFIG_START(msx_state::tpp311) +MACHINE_CONFIG_START(msx2_state::tpp311) msx2_pal(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -7112,7 +7104,7 @@ ROM_START (tps312) ROM_LOAD ("312write.rom", 0x14000, 0x4000, CRC(63c6992f) SHA1(93682f5baba7697c40088e26f99ee065c78e83b8)) ROM_END -MACHINE_CONFIG_START(msx_state::tps312) +MACHINE_CONFIG_START(msx2_state::tps312) msx2_pal(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -7142,7 +7134,7 @@ ROM_START (hx23) ROM_LOAD ("hx23word.rom", 0xc000, 0x8000, CRC(39b3e1c0) SHA1(9f7cfa932bd7dfd0d9ecaadc51655fb557c2e125)) ROM_END -MACHINE_CONFIG_START(msx_state::hx23) +MACHINE_CONFIG_START(msx2_state::hx23) msx2_pal(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -7171,7 +7163,7 @@ ROM_START (hx23f) ROM_LOAD ("hx23fword.rom", 0xc000, 0x8000, CRC(39b3e1c0) SHA1(9f7cfa932bd7dfd0d9ecaadc51655fb557c2e125)) ROM_END -MACHINE_CONFIG_START(msx_state::hx23f) +MACHINE_CONFIG_START(msx2_state::hx23f) msx2_pal(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -7197,7 +7189,7 @@ ROM_START (hx23i) ROM_LOAD ("hx23iword.rom", 0xc000, 0x8000, CRC(d50db5b4) SHA1(64cf27a6be1393b1da9f8d5d43df617c9f22fbd2)) ROM_END -MACHINE_CONFIG_START(msx_state::hx23i) +MACHINE_CONFIG_START(msx2_state::hx23i) msx2_pal(config); // YM2149 (in S-1985) // FDC: None, 0 drives @@ -7228,7 +7220,7 @@ ROM_START (hx33) ROM_LOAD ("hx33kfn.rom", 0x0000, 0x20000, CRC(d23d4d2d) SHA1(db03211b7db46899df41db2b1dfbec972109a967)) ROM_END -MACHINE_CONFIG_START(msx_state::hx33) +MACHINE_CONFIG_START(msx2_state::hx33) msx2(config); // YM2149 (in S-1985) // FDC: None, 0, drives @@ -7264,7 +7256,7 @@ ROM_REGION (0x18000, "maincpu", 0) ROM_LOAD ("hx34kfn.rom", 0x0000, 0x20000, CRC(d23d4d2d) SHA1(db03211b7db46899df41db2b1dfbec972109a967)) ROM_END -MACHINE_CONFIG_START(msx_state::hx34) +MACHINE_CONFIG_START(msx2_state::hx34) msx2(config); // YM2149 (in S-1985) // FDC: wd2793??, 1 3.5" DSDD drive @@ -7300,7 +7292,7 @@ ROM_START (hx34i) ROM_LOAD ("hx34ifirm.rom", 0x10000, 0x8000, CRC(f9e29c66) SHA1(3289336b2c12161fd926a7e5ce865770ae7038af)) ROM_END -MACHINE_CONFIG_START(msx_state::hx34i) +MACHINE_CONFIG_START(msx2_state::hx34i) msx2_pal(config); // YM2149 (in S-1985) // FDC: wd2793??, 1 3.5" DSDD drive @@ -7335,7 +7327,7 @@ ROM_START (fstm1) ROM_LOAD ("fstm1desk2.rom", 0x14000, 0x8000, CRC(304820ea) SHA1(ff6e07d3976b0874164fae680ae028d598752049)) ROM_END -MACHINE_CONFIG_START(msx_state::fstm1) +MACHINE_CONFIG_START(msx2_state::fstm1) msx2_pal(config); // YM2149 (in S-1985) // FDC: None, 0 drives @@ -7368,7 +7360,7 @@ ROM_START (victhc90) ROM_LOAD ("hc90kfn.rom", 0x0000, 0x20000, CRC(d23d4d2d) SHA1(db03211b7db46899df41db2b1dfbec972109a967)) ROM_END -MACHINE_CONFIG_START(msx_state::victhc90) +MACHINE_CONFIG_START(msx2_state::victhc90) msx2(config); // YM2149 (in S-1985) // FDC: wd2793?, 1 3.5" DSDD drive @@ -7406,7 +7398,7 @@ ROM_START (victhc95) ROM_LOAD ("hc95kfn.rom", 0x0000, 0x20000, CRC(d23d4d2d) SHA1(db03211b7db46899df41db2b1dfbec972109a967)) ROM_END -MACHINE_CONFIG_START(msx_state::victhc95) +MACHINE_CONFIG_START(msx2_state::victhc95) msx2(config); // YM2149 (in S-1985) // FDC: wd2793?, 2 3.5" DSDD drive @@ -7444,7 +7436,7 @@ ROM_START (victhc95a) ROM_LOAD ("hc95akfn.rom", 0x0000, 0x20000, CRC(d23d4d2d) SHA1(db03211b7db46899df41db2b1dfbec972109a967)) ROM_END -MACHINE_CONFIG_START(msx_state::victhc95a) +MACHINE_CONFIG_START(msx2_state::victhc95a) msx2(config); // YM2149 (in S-1985) // FDC: wd2793?, 2 3.5" DSDD drive @@ -7478,7 +7470,7 @@ ROM_START (cx7m) ROM_LOAD ("cx7mext.rom", 0x8000, 0x4000, CRC(66237ecf) SHA1(5c1f9c7fb655e43d38e5dd1fcc6b942b2ff68b02)) ROM_END -MACHINE_CONFIG_START(msx_state::cx7m) +MACHINE_CONFIG_START(msx2_state::cx7m) msx2_pal(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -7504,7 +7496,7 @@ ROM_START (cx7m128) ROM_LOAD ("yrm502.rom", 0xc000, 0x4000, CRC(51f7ddd1) SHA1(2a4b4a4657e3077df8a88f98210b76883d3702b1)) ROM_END -MACHINE_CONFIG_START(msx_state::cx7m128) +MACHINE_CONFIG_START(msx2_state::cx7m128) msx2_pal(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -7532,7 +7524,7 @@ ROM_START (y503iiir) ROM_LOAD ("yis503iiirnet.rom", 0x10000, 33121, CRC(b10fb61c) SHA1(af2b7004a8888d7a72eee937783fccaca0f38621)) // Very odd size for a rom... ROM_END -MACHINE_CONFIG_START(msx_state::y503iiir) +MACHINE_CONFIG_START(msx2_state::y503iiir) msx2_pal(config); // YM2149 (in S-3527) // FDC: wd2793?, 1 3.5" DSDD drive @@ -7565,7 +7557,7 @@ ROM_START (y503iiire) ROM_LOAD ("yis503iiirenet.rom", 0x10000, 33121, CRC(b10fb61c) SHA1(af2b7004a8888d7a72eee937783fccaca0f38621)) // Very odd size for a rom... ROM_END -MACHINE_CONFIG_START(msx_state::y503iiire) +MACHINE_CONFIG_START(msx2_state::y503iiire) msx2_pal(config); // YM2149 (in S-3527) // FDC: wd2793?, 1 3.5" DSDD drive @@ -7599,7 +7591,7 @@ ROM_START (yis60464) ROM_LOAD ("yis604kfn.rom", 0x0000, 0x20000, CRC(5a59926e) SHA1(6acaf2eeb57f65f7408235d5e07b7563229de799)) ROM_END -MACHINE_CONFIG_START(msx_state::yis60464) +MACHINE_CONFIG_START(msx2_state::yis60464) msx2(config); // YM2149 (in S-3527) // FDC: None, 0 drives @@ -7628,7 +7620,7 @@ ROM_START (yis604) ROM_LOAD ("yis604kfn.rom", 0x0000, 0x20000, CRC(5a59926e) SHA1(6acaf2eeb57f65f7408235d5e07b7563229de799)) ROM_END -MACHINE_CONFIG_START(msx_state::yis604) +MACHINE_CONFIG_START(msx2_state::yis604) msx2(config); // YM2149 (in S-3527) // FDC: None, 0 drives @@ -7659,7 +7651,7 @@ ROM_START (y805128) ROM_LOAD ("yis805128kfn.rom", 0x0000, 0x20000, CRC(5a59926e) SHA1(6acaf2eeb57f65f7408235d5e07b7563229de799)) ROM_END -MACHINE_CONFIG_START(msx_state::y805128) +MACHINE_CONFIG_START(msx2_state::y805128) msx2(config); // YM2149 (in S-3527) // FDC: wd2793?, 1 3.5" DSDD drive @@ -7693,7 +7685,7 @@ ROM_START (y805128r2) ROM_LOAD ("yis805128r2paint.rom", 0x18000, 0x10000, CRC(1bda68a3) SHA1(7fd2a28c4fdaeb140f3c8c8fb90271b1472c97b9)) ROM_END -MACHINE_CONFIG_START(msx_state::y805128r2) +MACHINE_CONFIG_START(msx2_state::y805128r2) msx2_pal(config); // YM2149 (in S-3527) // FDC: wd2793?, 1 3.5" DSDD drive @@ -7728,7 +7720,7 @@ ROM_START (y805128r2e) ROM_LOAD ("yis805128r2epaint.rom", 0x18000, 0x10000, CRC(1bda68a3) SHA1(7fd2a28c4fdaeb140f3c8c8fb90271b1472c97b9)) ROM_END -MACHINE_CONFIG_START(msx_state::y805128r2e) +MACHINE_CONFIG_START(msx2_state::y805128r2e) msx2_pal(config); // YM2149 (in S-3527) // FDC: wd2793?, 1 3.5" DSDD drive @@ -7765,7 +7757,7 @@ ROM_START (y805256) ROM_LOAD ("yis805256kfn.rom", 0x0000, 0x20000, CRC(5a59926e) SHA1(6acaf2eeb57f65f7408235d5e07b7563229de799)) ROM_END -MACHINE_CONFIG_START(msx_state::y805256) +MACHINE_CONFIG_START(msx2_state::y805256) msx2(config); // YM2149 (in S-3527) // FDC: wd2793?, 1 3.5" DSDD drive @@ -7801,7 +7793,7 @@ ROM_START (expert3i ) ROM_LOAD ("ide240a.rom", 0x14000, 0x10000, CRC(7adf857f) SHA1(8a919dbeed92db8c06a611279efaed8552810239)) ROM_END -MACHINE_CONFIG_START(msx_state::expert3i) +MACHINE_CONFIG_START(msx2_state::expert3i) msx2p(config); // AY8910/YM2149? // FDC: wd2793, 1 or 2? drives @@ -7837,7 +7829,7 @@ ROM_START (expert3t ) ROM_LOAD ("turbo.rom", 0x14000, 0x4000, CRC(ab528416) SHA1(d468604269ae7664ac739ea9f922a05e14ffa3d1)) ROM_END -MACHINE_CONFIG_START(msx_state::expert3t) +MACHINE_CONFIG_START(msx2_state::expert3t) msx2p(config); // AY8910 // FDC: wd2793?, 1 or 2? drives @@ -7873,7 +7865,7 @@ ROM_START (expertac) ROM_LOAD ("xbasic2.rom", 0x14000, 0x4000, CRC(2825b1a0) SHA1(47370bec7ca1f0615a54eda548b07fbc0c7ef398)) ROM_END -MACHINE_CONFIG_START(msx_state::expertac) +MACHINE_CONFIG_START(msx2_state::expertac) msx2p(config); // AY8910/YM2149? // FDC: wd2793?, 1 or 2? drives @@ -7906,7 +7898,7 @@ ROM_START (expertdx) ROM_LOAD ("kanji.rom", 0x14000, 0x8000, CRC(b4fc574d) SHA1(dcc3a67732aa01c4f2ee8d1ad886444a4dbafe06)) ROM_END -MACHINE_CONFIG_START(msx_state::expertdx) +MACHINE_CONFIG_START(msx2_state::expertdx) msx2p(config); // AY8910/YM2149? // FDC: tc8566af, 1 3.5" DSDD drive? @@ -7942,7 +7934,7 @@ ROM_START (fsa1fx) ROM_LOAD ("a1fxkfn.rom", 0, 0x20000, CRC(b244f6cf) SHA1(e0e99cd91e88ce2676445663f832c835d74d6fd4)) ROM_END -MACHINE_CONFIG_START(msx_state::fsa1fx) +MACHINE_CONFIG_START(msx2_state::fsa1fx) msx2p(config); // AY8910/YM2149? // FDC: tc8566af, 1 3.5" DSDD drive @@ -7959,7 +7951,7 @@ MACHINE_CONFIG_START(msx_state::fsa1fx) MCFG_MSX_LAYOUT_ROM("cock", 3, 3, 1, 2, "maincpu", 0x18000) MCFG_MSX_MATSUSHITA_ADD( "matsushita" ) - MCFG_MSX_MATSUSHITA_TURBO_CB(WRITELINE(*this, msx_state, turbo_w)) + MCFG_MSX_MATSUSHITA_TURBO_CB(WRITELINE(*this, msx2_state, turbo_w)) MCFG_MSX_SYSTEMFLAGS_ADD("sysflags", 0xff) @@ -7985,7 +7977,7 @@ ROM_START (fsa1wsx) ROM_LOAD ("a1wskfn.rom", 0, 0x40000, CRC(1f6406fb) SHA1(5aff2d9b6efc723bc395b0f96f0adfa83cc54a49)) ROM_END -MACHINE_CONFIG_START(msx_state::fsa1wsx) +MACHINE_CONFIG_START(msx2_state::fsa1wsx) msx2p(config); // AY8910/YM2149? // FDC: tc8566af, 1 3.5" DSDD drive @@ -8005,7 +7997,7 @@ MACHINE_CONFIG_START(msx_state::fsa1wsx) MCFG_MSX_LAYOUT_PANASONIC08("firm", 3, 3, 0, 4, "maincpu", 0x1c000) MCFG_MSX_MATSUSHITA_ADD( "matsushita" ) - MCFG_MSX_MATSUSHITA_TURBO_CB(WRITELINE(*this, msx_state, turbo_w)) + MCFG_MSX_MATSUSHITA_TURBO_CB(WRITELINE(*this, msx2_state, turbo_w)) MCFG_MSX_SYSTEMFLAGS_ADD("sysflags", 0xff) @@ -8033,7 +8025,7 @@ ROM_START (fsa1wx) ROM_LOAD ("a1wxkfn.rom", 0, 0x40000, CRC(1f6406fb) SHA1(5aff2d9b6efc723bc395b0f96f0adfa83cc54a49)) ROM_END -MACHINE_CONFIG_START(msx_state::fsa1wx) +MACHINE_CONFIG_START(msx2_state::fsa1wx) msx2p(config); // AY8910/YM2149? // FDC: tc8566af, 1 3.5" DSDD drive @@ -8053,7 +8045,7 @@ MACHINE_CONFIG_START(msx_state::fsa1wx) MCFG_MSX_LAYOUT_PANASONIC08("firm", 3, 3, 0, 4, "maincpu", 0x1c000) MCFG_MSX_MATSUSHITA_ADD( "matsushita" ) - MCFG_MSX_MATSUSHITA_TURBO_CB(WRITELINE(*this, msx_state, turbo_w)) + MCFG_MSX_MATSUSHITA_TURBO_CB(WRITELINE(*this, msx2_state, turbo_w)) MCFG_MSX_SYSTEMFLAGS_ADD("sysflags", 0xff) @@ -8080,7 +8072,7 @@ ROM_START (fsa1wxa) ROM_LOAD ("a1wxkfn.rom", 0, 0x40000, CRC(1f6406fb) SHA1(5aff2d9b6efc723bc395b0f96f0adfa83cc54a49)) ROM_END -MACHINE_CONFIG_START(msx_state::fsa1wxa) +MACHINE_CONFIG_START(msx2_state::fsa1wxa) msx2p(config); // AY8910/YM2149? // FDC: tc8566af, 1 3.5" DSDD drive @@ -8099,7 +8091,7 @@ MACHINE_CONFIG_START(msx_state::fsa1wxa) MCFG_MSX_LAYOUT_PANASONIC08("firm", 3, 3, 0, 4, "maincpu", 0x1c000) MCFG_MSX_MATSUSHITA_ADD( "matsushita" ) - MCFG_MSX_MATSUSHITA_TURBO_CB(WRITELINE(*this, msx_state, turbo_w)) + MCFG_MSX_MATSUSHITA_TURBO_CB(WRITELINE(*this, msx2_state, turbo_w)) MCFG_MSX_SYSTEMFLAGS_ADD("sysflags", 0xff) @@ -8124,7 +8116,7 @@ ROM_START (phc35j) ROM_LOAD ("35jkfn.rom", 0, 0x20000, CRC(c9651b32) SHA1(84a645becec0a25d3ab7a909cde1b242699a8662)) ROM_END -MACHINE_CONFIG_START(msx_state::phc35j) +MACHINE_CONFIG_START(msx2_state::phc35j) msx2p(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -8158,7 +8150,7 @@ ROM_START (phc70fd) ROM_LOAD ("70fdkfn.rom", 0, 0x20000, CRC(c9651b32) SHA1(84a645becec0a25d3ab7a909cde1b242699a8662)) ROM_END -MACHINE_CONFIG_START(msx_state::phc70fd) +MACHINE_CONFIG_START(msx2_state::phc70fd) msx2p(config); // AY8910/YM2149? // FDC: tc8566af, 1 3.5" DSDD drive @@ -8201,7 +8193,7 @@ ROM_START (phc70fd2) ROM_LOAD ("70f2kfn.rom", 0, 0x40000, CRC(9a850db9) SHA1(bcdb4dae303dfe5234f372d70a5e0271d3202c36)) ROM_END -MACHINE_CONFIG_START(msx_state::phc70fd2) +MACHINE_CONFIG_START(msx2_state::phc70fd2) msx2p(config); // AY8910/YM2149? // FDC: tc8566af, 2 3.5" DSDD drives @@ -8245,7 +8237,7 @@ ROM_START (hbf1xdj) ROM_LOAD ("f1xjkfn.rom", 0, 0x40000, CRC(7016dfd0) SHA1(218d91eb6df2823c924d3774a9f455492a10aecb)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf1xdj) +MACHINE_CONFIG_START(msx2_state::hbf1xdj) msx2p(config); // YM2149 (in S-1985 MSX Engine) // FDC: wd2793, 1 3.5" DSDD drive @@ -8292,7 +8284,7 @@ ROM_START (hbf1xv) ROM_LOAD ("f1xvkfn.rom", 0, 0x40000, CRC(7016dfd0) SHA1(218d91eb6df2823c924d3774a9f455492a10aecb)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf1xv) +MACHINE_CONFIG_START(msx2_state::hbf1xv) msx2p(config); // YM2149 (in S-1985 MSX Engine) // FDC: wd2793, 1 3.5" DSDD drives @@ -8334,7 +8326,7 @@ ROM_START (hbf9sp) ROM_LOAD ("f9spfrm2.rom", 0x10000, 0x8000, CRC(ea97069f) SHA1(2d1880d1f5a6944fcb1b198b997a3d90ecd1903d)) ROM_END -MACHINE_CONFIG_START(msx_state::hbf9sp) +MACHINE_CONFIG_START(msx2_state::hbf9sp) msx2p(config); // AY8910/YM2149? // FDC: None, 0 drives @@ -8367,7 +8359,7 @@ ROM_START (fsa1gt) ROM_LOAD ("a1gtfirm.rom", 0x6c000, 0x400000, CRC(feefeadc) SHA1(e779c338eb91a7dea3ff75f3fde76b8af22c4a3a)) ROM_END -MACHINE_CONFIG_START(msx_state::fsa1gt) +MACHINE_CONFIG_START(msx2_state::fsa1gt) msx2(config); // AY8910/YM2149? // FDC: tc8566af, 1 3.5" DSDD drive @@ -8411,7 +8403,7 @@ ROM_START (fsa1st) ROM_LOAD ("a1stfirm.rom", 0x6c000, 0x400000, CRC(139ac99c) SHA1(c212b11fda13f83dafed688c54d098e7e47ab225)) ROM_END -MACHINE_CONFIG_START(msx_state::fsa1st) +MACHINE_CONFIG_START(msx2_state::fsa1st) msx2(config); // AY8910/YM2149? // FDC: tc8566af, 1 3.5" DSDD drive @@ -8577,123 +8569,123 @@ COMP(1984, yc64, 0, 0, yc64, msx, msx_state, empty_i COMP(1984, mx64, 0, 0, mx64, msxkr, msx_state, empty_init, "Yeno", "MX64 (MSX1)", 0) /* MSX2 */ -COMP(1986, ax350, 0, 0, ax350, msx2, msx_state, empty_init, "Al Alamiah", "AX-350 (Arabic) (MSX2)", 0) -COMP(1986, ax370, 0, 0, ax370, msx2, msx_state, empty_init, "Al Alamiah", "AX-370 (Arabic) (MSX2)", 0) -COMP(1985, canonv25, 0, 0, canonv25, msx2, msx_state, empty_init, "Canon", "V-25 (MSX2)", 0) -COMP(1985, canonv30, 0, 0, canonv30, msx2, msx_state, empty_init, "Canon", "V-30 (MSX2)", 0) -COMP(1985, canonv30f, canonv30, 0, canonv30f, msx2, msx_state, empty_init, "Canon", "V-30F (MSX2)", 0) -COMP(1986, cpc300, 0, 0, cpc300, msx2kr, msx_state, empty_init, "Daewoo", "IQ-2000 CPC-300 (Korea) (MSX2)", 0) -COMP(1986, cpc300e, 0, 0, cpc300e, msx2kr, msx_state, empty_init, "Daewoo", "IQ-2000 CPC-300E (Korea) (MSX2)", 0) -COMP(1985, cpc330k, 0, 0, cpc330k, msx2kr, msx_state, empty_init, "Daewoo", "CPC-330K KOBO (Korea) (MSX2)", 0) -COMP(1988, cpc400, 0, 0, cpc400, msx2kr, msx_state, empty_init, "Daewoo", "X-II CPC-400 (Korea) (MSX2)", 0) -COMP(1988, cpc400s, 0, 0, cpc400s, msx2kr, msx_state, empty_init, "Daewoo", "X-II CPC-400S (Korea) (MSX2)", 0) -COMP(1990, cpc61, 0, 0, cpc61, msx2kr, msx_state, empty_init, "Daewoo", "Zemmix CPC-61 (Korea) (MSX2)", 0) -COMP(1991, cpg120, 0, 0, cpg120, msx2kr, msx_state, empty_init, "Daewoo", "Zemmix CPG-120 Normal (Korea) (MSX2)", MACHINE_NOT_WORKING) // v9958 not added -COMP(198?, fpc900, 0, 0, fpc900, msx2, msx_state, empty_init, "Fenner", "FPC-900 (MSX2)", 0) -COMP(1986, expert20, 0, 0, expert20, msx2, msx_state, empty_init, "Gradiente", "Expert 2.0 (Brazil) (MSX2)", 0) -COMP(198?, mbh70, 0, 0, mbh70, msx2jp, msx_state, empty_init, "Hitachi", "MB-H70 (MSX2)", MACHINE_NOT_WORKING) // Firmware not working -COMP(1987, kmc5000, 0, 0, kmc5000, msx2jp, msx_state, empty_init, "Kawai", "KMC-5000 (MSX2)", 0) -COMP(1985, mlg1, 0, 0, mlg1, msx2, msx_state, empty_init, "Mitsubishi", "ML-G1 (MSX2)", 0) -COMP(198?, mlg3, 0, 0, mlg3, msx2, msx_state, empty_init, "Mitsubishi", "ML-G3 (MSX2)", 0) -COMP(1985, mlg10, 0, 0, mlg10, msx2jp, msx_state, empty_init, "Mitsubishi", "ML-G10 (MSX2)", 0) -COMP(1983, mlg30, 0, 0, mlg30, msx2, msx_state, empty_init, "Mitsubishi", "ML-G30 (MSX2)", 0) -COMP(1985, fs5500f1, fs5500f2, 0, fs5500f1, msx2jp, msx_state, empty_init, "National / Matsushita", "FS-5500F1 (Japan) (MSX2)", 0) -COMP(1985, fs5500f2, 0, 0, fs5500f2, msx2jp, msx_state, empty_init, "National / Matsushita", "FS-5500F2 (Japan) (MSX2)", 0) -COMP(1986, fs4500, 0, 0, fs4500, msx2jp, msx_state, empty_init, "National / Matsushita", "FS-4500 (Japan) (MSX2)", 0) -COMP(1986, fs4700, 0, 0, fs4700, msx2jp, msx_state, empty_init, "National / Matsushita", "FS-4700 (Japan) (MSX2)", 0) -COMP(1986, fs5000, 0, 0, fs5000, msx2jp, msx_state, empty_init, "National / Matsushita", "FS-5000F2 (Japan) (MSX2)", 0) -COMP(1986, fs4600, 0, 0, fs4600, msx2jp, msx_state, empty_init, "National / Matsushita", "FS-4600 (Japan) (MSX2)", 0) -COMP(1986, fsa1, fsa1a, 0, fsa1, msx2jp, msx_state, empty_init, "Panasonic / Matsushita", "FS-A1 / 1st released version (Japan) (MSX2)", 0) -COMP(1986, fsa1a, 0, 0, fsa1a, msx2jp, msx_state, empty_init, "Panasonic / Matsushita", "FS-A1 / 2nd released version (Japan) (MSX2)", 0) -COMP(1987, fsa1mk2, 0, 0, fsa1mk2, msx2jp, msx_state, empty_init, "Panasonic / Matsushita", "FS-A1MK2 (Japan) (MSX2)", 0) -COMP(1987, fsa1f, 0, 0, fsa1f, msx2jp, msx_state, empty_init, "Panasonic / Matsushita", "FS-A1F (Japan) (MSX2)", 0) -COMP(1987, fsa1fm, 0, 0, fsa1fm, msx2jp, msx_state, empty_init, "Panasonic / Matsushita", "FS-A1FM (Japan) (MSX2)", 0) -COMP(1986, nms8220, nms8220a, 0, nms8220, msx2, msx_state, empty_init, "Philips", "NMS-8220 (12-jun-1986) (MSX2)", 0) -COMP(1986, nms8220a, 0, 0, nms8220a, msx2, msx_state, empty_init, "Philips", "NMS-8220 (13-aug-1986) (MSX2)", 0) -COMP(1986, vg8230, 0, 0, vg8230, msx2, msx_state, empty_init, "Philips", "VG-8230 (MSX2)", 0) -COMP(19??, vg8230j, vg8230, 0, vg8230j, msx2jp, msx_state, empty_init, "Philips", "VG-8230J (MSX2)", MACHINE_NOT_WORKING) // Screen flashes a few times before going into basic -COMP(1986, vg8235, 0, 0, vg8235, msx2, msx_state, empty_init, "Philips", "VG-8235 (MSX2)", 0) -COMP(1986, vg8235f, vg8235, 0, vg8235f, msx2, msx_state, empty_init, "Philips", "VG-8235F (MSX2)", 0) -COMP(1986, vg8240, 0, 0, vg8240, msx2, msx_state, empty_init, "Philips", "VG-8240 (MSX2)", 0) -COMP(1986, nms8245, 0, 0, nms8245, msx2, msx_state, empty_init, "Philips", "NMS-8245 (MSX2)", 0) -COMP(1986, nms8245f, nms8245, 0, nms8245f, msx2, msx_state, empty_init, "Philips", "NMS-8245F (MSX2)", 0) -COMP(1986, nms8250, nms8255, 0, nms8250, msx2, msx_state, empty_init, "Philips", "NMS-8250 (MSX2)", 0) -COMP(1986, nms8250f, nms8255, 0, nms8250f, msx2, msx_state, empty_init, "Philips", "NMS-8250F (MSX2)", 0) // French keyboard -COMP(19??, nms8250j, nms8255, 0, nms8250j, msx2jp, msx_state, empty_init, "Philips", "NMS-8250J (MSX2)", 0) -COMP(1986, nms8255, 0, 0, nms8255, msx2, msx_state, empty_init, "Philips", "NMS-8255 (MSX2)", 0) -COMP(1986, nms8255f, nms8255, 0, nms8255f, msx2, msx_state, empty_init, "Philips", "NMS-8255F (MSX2)", 0) // French keyboard -COMP(1986, nms8260, 0, 0, nms8260, msx2, msx_state, empty_init, "Philips", "NMS-8260 (Prototype) (MSX2)", MACHINE_NOT_WORKING) -COMP(1986, nms8280, 0, 0, nms8280, msx2, msx_state, empty_init, "Philips", "NMS-8280 (MSX2)", 0) -COMP(1986, nms8280f, nms8280, 0, nms8280f, msx2, msx_state, empty_init, "Philips", "NMS-8280F (MSX2)", 0) // French keyboard -COMP(1986, nms8280g, nms8280, 0, nms8280g, msx2, msx_state, empty_init, "Philips", "NMS-8280G (MSX2)", 0) -COMP(19??, mpc2300, 0, 0, mpc2300, msx2, msx_state, empty_init, "Sanyo", "MPC-2300 (MSX2)", MACHINE_NOT_WORKING) // Keyboard responds differently -COMP(198?, mpc2500f, 0, 0, mpc2500f, msx2, msx_state, empty_init, "Sanyo", "MPC-2500FD (MSX2)", MACHINE_NOT_WORKING) // Russian keyboard? -COMP(19??, mpc25fd, 0, 0, mpc25fd, msx2, msx_state, empty_init, "Sanyo", "Wavy MPC-25FD (MSX2)", 0) -COMP(198?, mpc27, 0, 0, mpc27, msx2jp, msx_state, empty_init, "Sanyo", "Wavy MPC-27 (MSX2)", MACHINE_NOT_WORKING) // Light pen not emulated -COMP(1988, phc23, 0, 0, phc23, msx2jp, msx_state, empty_init, "Sanyo", "Wavy PHC-23 (Japan) (MSX2)", 0) -COMP(198?, phc55fd2, 0, 0, phc55fd2, msx2jp, msx_state, empty_init, "Sanyo", "Wavy PHC-55FD2 (MSX2)", 0) -COMP(198?, phc77, 0, 0, phc77, msx2jp, msx_state, empty_init, "Sanyo", "Wavy PHC-77 (MSX2)", MACHINE_NOT_WORKING) // Firmware not emulated -COMP(1986, hbf1, 0, 0, hbf1, msx2jp, msx_state, empty_init, "Sony", "HB-F1 (Japan) (MSX2)", MACHINE_NOT_WORKING ) // Screen stays a single color after a while -COMP(1987, hbf12, 0, 0, hbf12, msx2jp, msx_state, empty_init, "Sony", "HB-F1II (Japan) (MSX2)", MACHINE_NOT_WORKING ) // Screen stays a single color after a while -COMP(1987, hbf1xd, 0, 0, hbf1xd, msx2jp, msx_state, empty_init, "Sony", "HB-F1XD (Japan) (MSX2)", 0) -COMP(1988, hbf1xdm2, 0, 0, hbf1xdm2, msx2jp, msx_state, empty_init, "Sony", "HB-F1XDMK2 (Japan) (MSX2)", 0) -COMP(19??, hbf5, 0, 0, hbf5, msx2, msx_state, empty_init, "Sony", "HB-F5 (MSX2)", 0) -COMP(1985, hbf9p, 0, 0, hbf9p, msx2, msx_state, empty_init, "Sony", "HB-F9P (MSX2)", 0) -COMP(19??, hbf9pr, hbf9p, 0, hbf9pr, msx2, msx_state, empty_init, "Sony", "HB-F9P Russion (MSX2)", MACHINE_NOT_WORKING) // Keyboard responds differently -COMP(1985, hbf9s, hbf9p, 0, hbf9s, msx2, msx_state, empty_init, "Sony", "HB-F9S (MSX2)", 0) -COMP(1986, hbf500, hbf500p, 0, hbf500, msx2jp, msx_state, empty_init, "Sony", "HB-F500 (Japan) (MSX2)", 0) -COMP(198?, hbf500f, hbf500p, 0, hbf500f, msx2, msx_state, empty_init, "Sony", "HB-F500F (MSX2)", 0) // French keyboard? -COMP(1985, hbf500p, 0, 0, hbf500p, msx2, msx_state, empty_init, "Sony", "HB-F500P (MSX2)", 0) -COMP(1985, hbf700d, hbf700p, 0, hbf700d, msx2, msx_state, empty_init, "Sony", "HB-F700D (Germany) (MSX2)", 0) -COMP(1985, hbf700f, hbf700p, 0, hbf700f, msx2, msx_state, empty_init, "Sony", "HB-F700F (MSX2)", 0) -COMP(1985, hbf700p, 0, 0, hbf700p, msx2, msx_state, empty_init, "Sony", "HB-F700P (MSX2)", 0) -COMP(1985, hbf700s, hbf700p, 0, hbf700s, msx2, msx_state, empty_init, "Sony", "HB-F700S (Spain) (MSX2)", 0) -COMP(1986, hbf900, hbf900a, 0, hbf900, msx2jp, msx_state, empty_init, "Sony", "HB-F900 / 1st released version (Japan) (MSX2)", 0) -COMP(1986, hbf900a, 0, 0, hbf900a, msx2jp, msx_state, empty_init, "Sony", "HB-F900 / 2nd released version (Japan) (MSX2)", 0) -COMP(1986, hbg900ap, hbg900p, 0, hbg900ap, msx2, msx_state, empty_init, "Sony", "HB-G900AP (MSX2)", 0 ) -COMP(1986, hbg900p, 0, 0, hbg900p, msx2, msx_state, empty_init, "Sony", "HB-G900P (MSX2)", 0 ) -COMP(1986, hotbit20, 0, 0, hotbit20, msx2, msx_state, empty_init, "Sharp / Epcom", "HB-8000 Hotbit 2.0 (MSX2)", 0) // Black screen -COMP(1986, tpc310, 0, 0, tpc310, msx2, msx_state, empty_init, "Talent", "TPC-310 (MSX2)", 0) -COMP(19??, tpp311, 0, 0, tpp311, msx2, msx_state, empty_init, "Talent", "TPP-311 (MSX2)", 0) -COMP(19??, tps312, 0, 0, tps312, msx2, msx_state, empty_init, "Talent", "TPS-312 (MSX2)", 0) -COMP(1986, hx23, hx23i, 0, hx23, msx2, msx_state, empty_init, "Toshiba", "HX-23 (MSX2)", 0) -COMP(1986, hx23f, hx23i, 0, hx23f, msx2, msx_state, empty_init, "Toshiba", "HX-23F (MSX2)", 0) -COMP(19??, hx23i, 0, 0, hx23i, msx2, msx_state, empty_init, "Toshiba", "HX-23I (MSX2)", 0) -COMP(1985, hx33, 0, 0, hx33, msx2jp, msx_state, empty_init, "Toshiba", "HX-33 (MSX2)", 0) -COMP(1985, hx34, hx34i, 0, hx34, msx2jp, msx_state, empty_init, "Toshiba", "HX-34 (MSX2)", 0) -COMP(1985, hx34i, 0, 0, hx34i, msx, msx_state, empty_init, "Toshiba", "HX-34I (MSX2)", 0) -COMP(1985, fstm1, 0, 0, fstm1, msx, msx_state, empty_init, "Toshiba", "FS-TM1 (MSX2)", 0) -COMP(198?, victhc90, victhc95, 0, victhc90, msxjp, msx_state, empty_init, "Victor", "HC-90 (MSX2)", MACHINE_NOT_WORKING) // 2nd cpu/turbo not emulated, firmware won't start -COMP(1986, victhc95, 0, 0, victhc95, msxjp, msx_state, empty_init, "Victor", "HC-95 (MSX2)", MACHINE_NOT_WORKING) // 2nd cpu/turbo not emulated, firmware won't start -COMP(1986, victhc95a, victhc95, 0, victhc95a, msxjp, msx_state, empty_init, "Victor", "HC-95A (MSX2)", MACHINE_NOT_WORKING) // 2nd cpu/turbo not emulated, firmware won't start -COMP(1986, cx7m, cx7m128, 0, cx7m, msx2, msx_state, empty_init, "Yamaha", "CX7M (MSX2)", 0) -COMP(1986, cx7m128, 0, 0, cx7m128, msx2, msx_state, empty_init, "Yamaha", "CX7M/128 (MSX2)", 0) -COMP(198?, y503iiir, 0, 0, y503iiir, msx2, msx_state, empty_init, "Yamaha", "YIS-503 III R (Russian) (MSX2)", MACHINE_NOT_WORKING) // Russian keyboard, floppy support broken -COMP(198?, y503iiire, y503iiir, 0, y503iiire, msx2, msx_state, empty_init, "Yamaha", "YIS-503 III R (Estonian) (MSX2)", MACHINE_NOT_WORKING) // Russian/Estonian keyboard, floppy support broken -COMP(1985, yis60464, yis604, 0, yis60464, msx2jp, msx_state, empty_init, "Yamaha", "YIS604 (64KB) (MSX2)", 0) -COMP(1985, yis604, 0, 0, yis604, msx2jp, msx_state, empty_init, "Yamaha", "YIS604 (128KB) (MSX2)", 0) -COMP(198?, y805128, y805256, 0, y805128, msx2jp, msx_state, empty_init, "Yamaha", "YIS805/128 (Russian) (MSX2)", MACHINE_NOT_WORKING) // Floppy support broken -COMP(198?, y805128r2, y805256, 0, y805128r2, msx2jp, msx_state, empty_init, "Yamaha", "YIS805R2/128 (Russian) (MSX2)", MACHINE_NOT_WORKING) // Floppy support broken -COMP(198?, y805128r2e, y805256, 0, y805128r2e, msx2jp, msx_state, empty_init, "Yamaha", "YIS805R2/128 (Estonian) (MSX2)", MACHINE_NOT_WORKING) // Floppy support broken -COMP(198?, y805256, 0, 0, y805256, msx2jp, msx_state, empty_init, "Yamaha", "YIS805/256 (Russian) (MSX2)", MACHINE_NOT_WORKING) // Floppy support broken +COMP(1986, ax350, 0, 0, ax350, msx2, msx2_state, empty_init, "Al Alamiah", "AX-350 (Arabic) (MSX2)", 0) +COMP(1986, ax370, 0, 0, ax370, msx2, msx2_state, empty_init, "Al Alamiah", "AX-370 (Arabic) (MSX2)", 0) +COMP(1985, canonv25, 0, 0, canonv25, msx2, msx2_state, empty_init, "Canon", "V-25 (MSX2)", 0) +COMP(1985, canonv30, 0, 0, canonv30, msx2, msx2_state, empty_init, "Canon", "V-30 (MSX2)", 0) +COMP(1985, canonv30f, canonv30, 0, canonv30f, msx2, msx2_state, empty_init, "Canon", "V-30F (MSX2)", 0) +COMP(1986, cpc300, 0, 0, cpc300, msx2kr, msx2_state, empty_init, "Daewoo", "IQ-2000 CPC-300 (Korea) (MSX2)", 0) +COMP(1986, cpc300e, 0, 0, cpc300e, msx2kr, msx2_state, empty_init, "Daewoo", "IQ-2000 CPC-300E (Korea) (MSX2)", 0) +COMP(1985, cpc330k, 0, 0, cpc330k, msx2kr, msx2_state, empty_init, "Daewoo", "CPC-330K KOBO (Korea) (MSX2)", 0) +COMP(1988, cpc400, 0, 0, cpc400, msx2kr, msx2_state, empty_init, "Daewoo", "X-II CPC-400 (Korea) (MSX2)", 0) +COMP(1988, cpc400s, 0, 0, cpc400s, msx2kr, msx2_state, empty_init, "Daewoo", "X-II CPC-400S (Korea) (MSX2)", 0) +COMP(1990, cpc61, 0, 0, cpc61, msx2kr, msx2_state, empty_init, "Daewoo", "Zemmix CPC-61 (Korea) (MSX2)", 0) +COMP(1991, cpg120, 0, 0, cpg120, msx2kr, msx2_state, empty_init, "Daewoo", "Zemmix CPG-120 Normal (Korea) (MSX2)", MACHINE_NOT_WORKING) // v9958 not added +COMP(198?, fpc900, 0, 0, fpc900, msx2, msx2_state, empty_init, "Fenner", "FPC-900 (MSX2)", 0) +COMP(1986, expert20, 0, 0, expert20, msx2, msx2_state, empty_init, "Gradiente", "Expert 2.0 (Brazil) (MSX2)", 0) +COMP(198?, mbh70, 0, 0, mbh70, msx2jp, msx2_state, empty_init, "Hitachi", "MB-H70 (MSX2)", MACHINE_NOT_WORKING) // Firmware not working +COMP(1987, kmc5000, 0, 0, kmc5000, msx2jp, msx2_state, empty_init, "Kawai", "KMC-5000 (MSX2)", 0) +COMP(1985, mlg1, 0, 0, mlg1, msx2, msx2_state, empty_init, "Mitsubishi", "ML-G1 (MSX2)", 0) +COMP(198?, mlg3, 0, 0, mlg3, msx2, msx2_state, empty_init, "Mitsubishi", "ML-G3 (MSX2)", 0) +COMP(1985, mlg10, 0, 0, mlg10, msx2jp, msx2_state, empty_init, "Mitsubishi", "ML-G10 (MSX2)", 0) +COMP(1983, mlg30, 0, 0, mlg30, msx2, msx2_state, empty_init, "Mitsubishi", "ML-G30 (MSX2)", 0) +COMP(1985, fs5500f1, fs5500f2, 0, fs5500f1, msx2jp, msx2_state, empty_init, "National / Matsushita", "FS-5500F1 (Japan) (MSX2)", 0) +COMP(1985, fs5500f2, 0, 0, fs5500f2, msx2jp, msx2_state, empty_init, "National / Matsushita", "FS-5500F2 (Japan) (MSX2)", 0) +COMP(1986, fs4500, 0, 0, fs4500, msx2jp, msx2_state, empty_init, "National / Matsushita", "FS-4500 (Japan) (MSX2)", 0) +COMP(1986, fs4700, 0, 0, fs4700, msx2jp, msx2_state, empty_init, "National / Matsushita", "FS-4700 (Japan) (MSX2)", 0) +COMP(1986, fs5000, 0, 0, fs5000, msx2jp, msx2_state, empty_init, "National / Matsushita", "FS-5000F2 (Japan) (MSX2)", 0) +COMP(1986, fs4600, 0, 0, fs4600, msx2jp, msx2_state, empty_init, "National / Matsushita", "FS-4600 (Japan) (MSX2)", 0) +COMP(1986, fsa1, fsa1a, 0, fsa1, msx2jp, msx2_state, empty_init, "Panasonic / Matsushita", "FS-A1 / 1st released version (Japan) (MSX2)", 0) +COMP(1986, fsa1a, 0, 0, fsa1a, msx2jp, msx2_state, empty_init, "Panasonic / Matsushita", "FS-A1 / 2nd released version (Japan) (MSX2)", 0) +COMP(1987, fsa1mk2, 0, 0, fsa1mk2, msx2jp, msx2_state, empty_init, "Panasonic / Matsushita", "FS-A1MK2 (Japan) (MSX2)", 0) +COMP(1987, fsa1f, 0, 0, fsa1f, msx2jp, msx2_state, empty_init, "Panasonic / Matsushita", "FS-A1F (Japan) (MSX2)", 0) +COMP(1987, fsa1fm, 0, 0, fsa1fm, msx2jp, msx2_state, empty_init, "Panasonic / Matsushita", "FS-A1FM (Japan) (MSX2)", 0) +COMP(1986, nms8220, nms8220a, 0, nms8220, msx2, msx2_state, empty_init, "Philips", "NMS-8220 (12-jun-1986) (MSX2)", 0) +COMP(1986, nms8220a, 0, 0, nms8220a, msx2, msx2_state, empty_init, "Philips", "NMS-8220 (13-aug-1986) (MSX2)", 0) +COMP(1986, vg8230, 0, 0, vg8230, msx2, msx2_state, empty_init, "Philips", "VG-8230 (MSX2)", 0) +COMP(19??, vg8230j, vg8230, 0, vg8230j, msx2jp, msx2_state, empty_init, "Philips", "VG-8230J (MSX2)", MACHINE_NOT_WORKING) // Screen flashes a few times before going into basic +COMP(1986, vg8235, 0, 0, vg8235, msx2, msx2_state, empty_init, "Philips", "VG-8235 (MSX2)", 0) +COMP(1986, vg8235f, vg8235, 0, vg8235f, msx2, msx2_state, empty_init, "Philips", "VG-8235F (MSX2)", 0) +COMP(1986, vg8240, 0, 0, vg8240, msx2, msx2_state, empty_init, "Philips", "VG-8240 (MSX2)", 0) +COMP(1986, nms8245, 0, 0, nms8245, msx2, msx2_state, empty_init, "Philips", "NMS-8245 (MSX2)", 0) +COMP(1986, nms8245f, nms8245, 0, nms8245f, msx2, msx2_state, empty_init, "Philips", "NMS-8245F (MSX2)", 0) +COMP(1986, nms8250, nms8255, 0, nms8250, msx2, msx2_state, empty_init, "Philips", "NMS-8250 (MSX2)", 0) +COMP(1986, nms8250f, nms8255, 0, nms8250f, msx2, msx2_state, empty_init, "Philips", "NMS-8250F (MSX2)", 0) // French keyboard +COMP(19??, nms8250j, nms8255, 0, nms8250j, msx2jp, msx2_state, empty_init, "Philips", "NMS-8250J (MSX2)", 0) +COMP(1986, nms8255, 0, 0, nms8255, msx2, msx2_state, empty_init, "Philips", "NMS-8255 (MSX2)", 0) +COMP(1986, nms8255f, nms8255, 0, nms8255f, msx2, msx2_state, empty_init, "Philips", "NMS-8255F (MSX2)", 0) // French keyboard +COMP(1986, nms8260, 0, 0, nms8260, msx2, msx2_state, empty_init, "Philips", "NMS-8260 (Prototype) (MSX2)", MACHINE_NOT_WORKING) +COMP(1986, nms8280, 0, 0, nms8280, msx2, msx2_state, empty_init, "Philips", "NMS-8280 (MSX2)", 0) +COMP(1986, nms8280f, nms8280, 0, nms8280f, msx2, msx2_state, empty_init, "Philips", "NMS-8280F (MSX2)", 0) // French keyboard +COMP(1986, nms8280g, nms8280, 0, nms8280g, msx2, msx2_state, empty_init, "Philips", "NMS-8280G (MSX2)", 0) +COMP(19??, mpc2300, 0, 0, mpc2300, msx2, msx2_state, empty_init, "Sanyo", "MPC-2300 (MSX2)", MACHINE_NOT_WORKING) // Keyboard responds differently +COMP(198?, mpc2500f, 0, 0, mpc2500f, msx2, msx2_state, empty_init, "Sanyo", "MPC-2500FD (MSX2)", MACHINE_NOT_WORKING) // Russian keyboard? +COMP(19??, mpc25fd, 0, 0, mpc25fd, msx2, msx2_state, empty_init, "Sanyo", "Wavy MPC-25FD (MSX2)", 0) +COMP(198?, mpc27, 0, 0, mpc27, msx2jp, msx2_state, empty_init, "Sanyo", "Wavy MPC-27 (MSX2)", MACHINE_NOT_WORKING) // Light pen not emulated +COMP(1988, phc23, 0, 0, phc23, msx2jp, msx2_state, empty_init, "Sanyo", "Wavy PHC-23 (Japan) (MSX2)", 0) +COMP(198?, phc55fd2, 0, 0, phc55fd2, msx2jp, msx2_state, empty_init, "Sanyo", "Wavy PHC-55FD2 (MSX2)", 0) +COMP(198?, phc77, 0, 0, phc77, msx2jp, msx2_state, empty_init, "Sanyo", "Wavy PHC-77 (MSX2)", MACHINE_NOT_WORKING) // Firmware not emulated +COMP(1986, hbf1, 0, 0, hbf1, msx2jp, msx2_state, empty_init, "Sony", "HB-F1 (Japan) (MSX2)", MACHINE_NOT_WORKING ) // Screen stays a single color after a while +COMP(1987, hbf12, 0, 0, hbf12, msx2jp, msx2_state, empty_init, "Sony", "HB-F1II (Japan) (MSX2)", MACHINE_NOT_WORKING ) // Screen stays a single color after a while +COMP(1987, hbf1xd, 0, 0, hbf1xd, msx2jp, msx2_state, empty_init, "Sony", "HB-F1XD (Japan) (MSX2)", 0) +COMP(1988, hbf1xdm2, 0, 0, hbf1xdm2, msx2jp, msx2_state, empty_init, "Sony", "HB-F1XDMK2 (Japan) (MSX2)", 0) +COMP(19??, hbf5, 0, 0, hbf5, msx2, msx2_state, empty_init, "Sony", "HB-F5 (MSX2)", 0) +COMP(1985, hbf9p, 0, 0, hbf9p, msx2, msx2_state, empty_init, "Sony", "HB-F9P (MSX2)", 0) +COMP(19??, hbf9pr, hbf9p, 0, hbf9pr, msx2, msx2_state, empty_init, "Sony", "HB-F9P Russion (MSX2)", MACHINE_NOT_WORKING) // Keyboard responds differently +COMP(1985, hbf9s, hbf9p, 0, hbf9s, msx2, msx2_state, empty_init, "Sony", "HB-F9S (MSX2)", 0) +COMP(1986, hbf500, hbf500p, 0, hbf500, msx2jp, msx2_state, empty_init, "Sony", "HB-F500 (Japan) (MSX2)", 0) +COMP(198?, hbf500f, hbf500p, 0, hbf500f, msx2, msx2_state, empty_init, "Sony", "HB-F500F (MSX2)", 0) // French keyboard? +COMP(1985, hbf500p, 0, 0, hbf500p, msx2, msx2_state, empty_init, "Sony", "HB-F500P (MSX2)", 0) +COMP(1985, hbf700d, hbf700p, 0, hbf700d, msx2, msx2_state, empty_init, "Sony", "HB-F700D (Germany) (MSX2)", 0) +COMP(1985, hbf700f, hbf700p, 0, hbf700f, msx2, msx2_state, empty_init, "Sony", "HB-F700F (MSX2)", 0) +COMP(1985, hbf700p, 0, 0, hbf700p, msx2, msx2_state, empty_init, "Sony", "HB-F700P (MSX2)", 0) +COMP(1985, hbf700s, hbf700p, 0, hbf700s, msx2, msx2_state, empty_init, "Sony", "HB-F700S (Spain) (MSX2)", 0) +COMP(1986, hbf900, hbf900a, 0, hbf900, msx2jp, msx2_state, empty_init, "Sony", "HB-F900 / 1st released version (Japan) (MSX2)", 0) +COMP(1986, hbf900a, 0, 0, hbf900a, msx2jp, msx2_state, empty_init, "Sony", "HB-F900 / 2nd released version (Japan) (MSX2)", 0) +COMP(1986, hbg900ap, hbg900p, 0, hbg900ap, msx2, msx2_state, empty_init, "Sony", "HB-G900AP (MSX2)", 0 ) +COMP(1986, hbg900p, 0, 0, hbg900p, msx2, msx2_state, empty_init, "Sony", "HB-G900P (MSX2)", 0 ) +COMP(1986, hotbit20, 0, 0, hotbit20, msx2, msx2_state, empty_init, "Sharp / Epcom", "HB-8000 Hotbit 2.0 (MSX2)", 0) // Black screen +COMP(1986, tpc310, 0, 0, tpc310, msx2, msx2_state, empty_init, "Talent", "TPC-310 (MSX2)", 0) +COMP(19??, tpp311, 0, 0, tpp311, msx2, msx2_state, empty_init, "Talent", "TPP-311 (MSX2)", 0) +COMP(19??, tps312, 0, 0, tps312, msx2, msx2_state, empty_init, "Talent", "TPS-312 (MSX2)", 0) +COMP(1986, hx23, hx23i, 0, hx23, msx2, msx2_state, empty_init, "Toshiba", "HX-23 (MSX2)", 0) +COMP(1986, hx23f, hx23i, 0, hx23f, msx2, msx2_state, empty_init, "Toshiba", "HX-23F (MSX2)", 0) +COMP(19??, hx23i, 0, 0, hx23i, msx2, msx2_state, empty_init, "Toshiba", "HX-23I (MSX2)", 0) +COMP(1985, hx33, 0, 0, hx33, msx2jp, msx2_state, empty_init, "Toshiba", "HX-33 (MSX2)", 0) +COMP(1985, hx34, hx34i, 0, hx34, msx2jp, msx2_state, empty_init, "Toshiba", "HX-34 (MSX2)", 0) +COMP(1985, hx34i, 0, 0, hx34i, msx, msx2_state, empty_init, "Toshiba", "HX-34I (MSX2)", 0) +COMP(1985, fstm1, 0, 0, fstm1, msx, msx2_state, empty_init, "Toshiba", "FS-TM1 (MSX2)", 0) +COMP(198?, victhc90, victhc95, 0, victhc90, msxjp, msx2_state, empty_init, "Victor", "HC-90 (MSX2)", MACHINE_NOT_WORKING) // 2nd cpu/turbo not emulated, firmware won't start +COMP(1986, victhc95, 0, 0, victhc95, msxjp, msx2_state, empty_init, "Victor", "HC-95 (MSX2)", MACHINE_NOT_WORKING) // 2nd cpu/turbo not emulated, firmware won't start +COMP(1986, victhc95a, victhc95, 0, victhc95a, msxjp, msx2_state, empty_init, "Victor", "HC-95A (MSX2)", MACHINE_NOT_WORKING) // 2nd cpu/turbo not emulated, firmware won't start +COMP(1986, cx7m, cx7m128, 0, cx7m, msx2, msx2_state, empty_init, "Yamaha", "CX7M (MSX2)", 0) +COMP(1986, cx7m128, 0, 0, cx7m128, msx2, msx2_state, empty_init, "Yamaha", "CX7M/128 (MSX2)", 0) +COMP(198?, y503iiir, 0, 0, y503iiir, msx2, msx2_state, empty_init, "Yamaha", "YIS-503 III R (Russian) (MSX2)", MACHINE_NOT_WORKING) // Russian keyboard, floppy support broken +COMP(198?, y503iiire, y503iiir, 0, y503iiire, msx2, msx2_state, empty_init, "Yamaha", "YIS-503 III R (Estonian) (MSX2)", MACHINE_NOT_WORKING) // Russian/Estonian keyboard, floppy support broken +COMP(1985, yis60464, yis604, 0, yis60464, msx2jp, msx2_state, empty_init, "Yamaha", "YIS604 (64KB) (MSX2)", 0) +COMP(1985, yis604, 0, 0, yis604, msx2jp, msx2_state, empty_init, "Yamaha", "YIS604 (128KB) (MSX2)", 0) +COMP(198?, y805128, y805256, 0, y805128, msx2jp, msx2_state, empty_init, "Yamaha", "YIS805/128 (Russian) (MSX2)", MACHINE_NOT_WORKING) // Floppy support broken +COMP(198?, y805128r2, y805256, 0, y805128r2, msx2jp, msx2_state, empty_init, "Yamaha", "YIS805R2/128 (Russian) (MSX2)", MACHINE_NOT_WORKING) // Floppy support broken +COMP(198?, y805128r2e, y805256, 0, y805128r2e, msx2jp, msx2_state, empty_init, "Yamaha", "YIS805R2/128 (Estonian) (MSX2)", MACHINE_NOT_WORKING) // Floppy support broken +COMP(198?, y805256, 0, 0, y805256, msx2jp, msx2_state, empty_init, "Yamaha", "YIS805/256 (Russian) (MSX2)", MACHINE_NOT_WORKING) // Floppy support broken /* MSX2+ */ -COMP(19??, expert3i, 0, 0, expert3i, msx2, msx_state, empty_init, "Ciel", "Expert 3 IDE (MSX2+)", MACHINE_NOT_WORKING ) // Some hardware not emulated -COMP(1996, expert3t, 0, 0, expert3t, msx2, msx_state, empty_init, "Ciel", "Expert 3 Turbo (MSX2+)", MACHINE_NOT_WORKING ) // Some hardware not emulated -COMP(19??, expertac, 0, 0, expertac, msx2, msx_state, empty_init, "Gradiente", "Expert AC88+ (MSX2+)", MACHINE_NOT_WORKING ) // Some hardware not emulated -COMP(19??, expertdx, 0, 0, expertdx, msx2, msx_state, empty_init, "Gradiente", "Expert DDX+ (MSX2+)", MACHINE_NOT_WORKING ) // Some hardware not emulated -COMP(1988, fsa1fx, 0, 0, fsa1fx, msx2jp, msx_state, empty_init, "Panasonic / Matsushita", "FS-A1FX (Japan) (MSX2+)", 0 ) -COMP(1988, fsa1wx, fsa1wxa, 0, fsa1wx, msx2jp, msx_state, empty_init, "Panasonic / Matsushita", "FS-A1WX / 1st released version (Japan) (MSX2+)", 0 ) -COMP(1988, fsa1wxa, 0, 0, fsa1wxa, msx2jp, msx_state, empty_init, "Panasonic / Matsushita", "FS-A1WX / 2nd released version (Japan) (MSX2+)", 0 ) -COMP(1989, fsa1wsx, 0, 0, fsa1wsx, msx2jp, msx_state, empty_init, "Panasonic / Matsushita", "FS-A1WSX (Japan) (MSX2+)", 0 ) -COMP(1988, hbf1xdj, 0, 0, hbf1xdj, msx2jp, msx_state, empty_init, "Sony", "HB-F1XDJ (Japan) (MSX2+)", 0 ) -COMP(1989, hbf1xv, 0, 0, hbf1xv, msx2jp, msx_state, empty_init, "Sony", "HB-F1XV (Japan) (MSX2+)", 0 ) -COMP(1988, phc70fd, phc70fd2, 0, phc70fd, msx2jp, msx_state, empty_init, "Sanyo", "WAVY PHC-70FD (Japan) (MSX2+)", 0 ) -COMP(1988, phc70fd2, 0, 0, phc70fd2, msx2jp, msx_state, empty_init, "Sanyo", "WAVY PHC-70FD2 (Japan) (MSX2+)", 0 ) -COMP(1989, phc35j, 0, 0, phc35j, msx2jp, msx_state, empty_init, "Sanyo", "WAVY PHC-35J (Japan) (MSX2+)", 0) -COMP(19??, hbf9sp, 0, 0, hbf9sp, msx2jp, msx_state, empty_init, "Sony", "HB-F9S+ (MSX2+)", 0) +COMP(19??, expert3i, 0, 0, expert3i, msx2, msx2_state, empty_init, "Ciel", "Expert 3 IDE (MSX2+)", MACHINE_NOT_WORKING ) // Some hardware not emulated +COMP(1996, expert3t, 0, 0, expert3t, msx2, msx2_state, empty_init, "Ciel", "Expert 3 Turbo (MSX2+)", MACHINE_NOT_WORKING ) // Some hardware not emulated +COMP(19??, expertac, 0, 0, expertac, msx2, msx2_state, empty_init, "Gradiente", "Expert AC88+ (MSX2+)", MACHINE_NOT_WORKING ) // Some hardware not emulated +COMP(19??, expertdx, 0, 0, expertdx, msx2, msx2_state, empty_init, "Gradiente", "Expert DDX+ (MSX2+)", MACHINE_NOT_WORKING ) // Some hardware not emulated +COMP(1988, fsa1fx, 0, 0, fsa1fx, msx2jp, msx2_state, empty_init, "Panasonic / Matsushita", "FS-A1FX (Japan) (MSX2+)", 0 ) +COMP(1988, fsa1wx, fsa1wxa, 0, fsa1wx, msx2jp, msx2_state, empty_init, "Panasonic / Matsushita", "FS-A1WX / 1st released version (Japan) (MSX2+)", 0 ) +COMP(1988, fsa1wxa, 0, 0, fsa1wxa, msx2jp, msx2_state, empty_init, "Panasonic / Matsushita", "FS-A1WX / 2nd released version (Japan) (MSX2+)", 0 ) +COMP(1989, fsa1wsx, 0, 0, fsa1wsx, msx2jp, msx2_state, empty_init, "Panasonic / Matsushita", "FS-A1WSX (Japan) (MSX2+)", 0 ) +COMP(1988, hbf1xdj, 0, 0, hbf1xdj, msx2jp, msx2_state, empty_init, "Sony", "HB-F1XDJ (Japan) (MSX2+)", 0 ) +COMP(1989, hbf1xv, 0, 0, hbf1xv, msx2jp, msx2_state, empty_init, "Sony", "HB-F1XV (Japan) (MSX2+)", 0 ) +COMP(1988, phc70fd, phc70fd2, 0, phc70fd, msx2jp, msx2_state, empty_init, "Sanyo", "WAVY PHC-70FD (Japan) (MSX2+)", 0 ) +COMP(1988, phc70fd2, 0, 0, phc70fd2, msx2jp, msx2_state, empty_init, "Sanyo", "WAVY PHC-70FD2 (Japan) (MSX2+)", 0 ) +COMP(1989, phc35j, 0, 0, phc35j, msx2jp, msx2_state, empty_init, "Sanyo", "WAVY PHC-35J (Japan) (MSX2+)", 0) +COMP(19??, hbf9sp, 0, 0, hbf9sp, msx2jp, msx2_state, empty_init, "Sony", "HB-F9S+ (MSX2+)", 0) /* MSX Turbo-R */ /* Temporary placeholders, Turbo-R hardware is not supported yet */ -COMP(19??, fsa1gt, 0, 0, fsa1gt, msx2jp, msx_state, empty_init, "Panasonic", "FS-A1GT (MSX Turbo-R)", MACHINE_NOT_WORKING) -COMP(19??, fsa1st, 0, 0, fsa1st, msx2jp, msx_state, empty_init, "Panasonic", "FS-A1ST (MSX Turbo-R)", MACHINE_NOT_WORKING) +COMP(19??, fsa1gt, 0, 0, fsa1gt, msx2jp, msx2_state, empty_init, "Panasonic", "FS-A1GT (MSX Turbo-R)", MACHINE_NOT_WORKING) +COMP(19??, fsa1st, 0, 0, fsa1st, msx2jp, msx2_state, empty_init, "Panasonic", "FS-A1ST (MSX Turbo-R)", MACHINE_NOT_WORKING) diff --git a/src/mame/drivers/multi8.cpp b/src/mame/drivers/multi8.cpp index 466d08e9f04..5d78a6e795e 100644 --- a/src/mame/drivers/multi8.cpp +++ b/src/mame/drivers/multi8.cpp @@ -310,8 +310,7 @@ void multi8_state::multi8_io(address_map &map) map(0x1a, 0x1a).r(FUNC(multi8_state::ay8912_1_r)); map(0x1c, 0x1c).rw(m_crtc, FUNC(mc6845_device::status_r), FUNC(mc6845_device::address_w)); map(0x1d, 0x1d).rw(m_crtc, FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); - map(0x20, 0x20).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x21, 0x21).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); //cmt + map(0x20, 0x21).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); //cmt map(0x24, 0x27).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)); //pit map(0x28, 0x2b).rw(m_ppi, FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x2c, 0x2d).rw("pic", FUNC(pic8259_device::read), FUNC(pic8259_device::write)); //i8259 @@ -613,7 +612,7 @@ MACHINE_CONFIG_START(multi8_state::multi8) MCFG_DEVICE_ADD("pit", PIT8253, 0) MCFG_DEVICE_ADD("pic", PIC8259, 0) - //MCFG_UPD765A_ADD("fdc", false, true) + //UPD765A(config, "fdc", false, true); //MCFG_FLOPPY_DRIVE_ADD("fdc:0", multi8_floppies, "525hd", floppy_image_device::default_floppy_formats) MACHINE_CONFIG_END diff --git a/src/mame/drivers/mwarr.cpp b/src/mame/drivers/mwarr.cpp index e86f4c97f15..7cacdddc10a 100644 --- a/src/mame/drivers/mwarr.cpp +++ b/src/mame/drivers/mwarr.cpp @@ -46,7 +46,7 @@ Notes: #include "emupal.h" #include "screen.h" #include "speaker.h" - +#include "video/edevices.h" #define MASTER_CLOCK XTAL(12'000'000) #define SOUND_CLOCK XTAL(45'000'000) @@ -55,160 +55,50 @@ Notes: class mwarr_state : public driver_device { public: - mwarr_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_bg_videoram(*this, "bg_videoram"), - m_mlow_videoram(*this, "mlow_videoram"), - m_mhigh_videoram(*this, "mhigh_videoram"), - m_tx_videoram(*this, "tx_videoram"), - m_bg_scrollram(*this, "bg_scrollram"), - m_mlow_scrollram(*this, "mlow_scrollram"), - m_mhigh_scrollram(*this, "mhigh_scrollram"), - m_vidattrram(*this, "vidattrram"), - m_spriteram(*this, "spriteram"), + mwarr_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), m_mwarr_ram(*this, "mwarr_ram"), m_okibank(*this, "okibank"), m_maincpu(*this, "maincpu"), + m_video(*this, "edevices_vid"), m_gfxdecode(*this, "gfxdecode"), - m_palette(*this, "palette") { } + m_palette(*this, "palette") + { } void mwarr(machine_config &config); private: /* memory pointers */ - required_shared_ptr<uint16_t> m_bg_videoram; - required_shared_ptr<uint16_t> m_mlow_videoram; - required_shared_ptr<uint16_t> m_mhigh_videoram; - required_shared_ptr<uint16_t> m_tx_videoram; - required_shared_ptr<uint16_t> m_bg_scrollram; - required_shared_ptr<uint16_t> m_mlow_scrollram; - required_shared_ptr<uint16_t> m_mhigh_scrollram; - required_shared_ptr<uint16_t> m_vidattrram; - required_shared_ptr<uint16_t> m_spriteram; required_shared_ptr<uint16_t> m_mwarr_ram; required_memory_bank m_okibank; - /* video-related */ - tilemap_t *m_bg_tilemap; - tilemap_t *m_mlow_tilemap; - tilemap_t *m_mhigh_tilemap; - tilemap_t *m_tx_tilemap; - - /* misc */ - int m_which; - - uint16_t m_sprites_buffer[0x800]; - DECLARE_WRITE16_MEMBER(bg_videoram_w); - DECLARE_WRITE16_MEMBER(mlow_videoram_w); - DECLARE_WRITE16_MEMBER(mhigh_videoram_w); - DECLARE_WRITE16_MEMBER(tx_videoram_w); - DECLARE_WRITE16_MEMBER(sprites_commands_w); DECLARE_WRITE16_MEMBER(mwarr_brightness_w); + DECLARE_WRITE16_MEMBER(oki1_bank_w); - TILE_GET_INFO_MEMBER(get_bg_tile_info); - TILE_GET_INFO_MEMBER(get_mlow_tile_info); - TILE_GET_INFO_MEMBER(get_mhigh_tile_info); - TILE_GET_INFO_MEMBER(get_tx_tile_info); + virtual void machine_start() override; virtual void machine_reset() override; - virtual void video_start() override; uint32_t screen_update_mwarr(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - void draw_sprites( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect ); required_device<cpu_device> m_maincpu; + required_device<edevices_device> m_video; required_device<gfxdecode_device> m_gfxdecode; required_device<palette_device> m_palette; void mwarr_map(address_map &map); void oki2_map(address_map &map); }; - /************************************* * * Memory handlers * *************************************/ -WRITE16_MEMBER(mwarr_state::bg_videoram_w) -{ - COMBINE_DATA(&m_bg_videoram[offset]); - m_bg_tilemap->mark_tile_dirty(offset); -} - -WRITE16_MEMBER(mwarr_state::mlow_videoram_w) -{ - COMBINE_DATA(&m_mlow_videoram[offset]); - m_mlow_tilemap->mark_tile_dirty(offset); -} - -WRITE16_MEMBER(mwarr_state::mhigh_videoram_w) -{ - COMBINE_DATA(&m_mhigh_videoram[offset]); - m_mhigh_tilemap->mark_tile_dirty(offset); -} - -WRITE16_MEMBER(mwarr_state::tx_videoram_w) -{ - COMBINE_DATA(&m_tx_videoram[offset]); - m_tx_tilemap->mark_tile_dirty(offset); -} - WRITE16_MEMBER(mwarr_state::oki1_bank_w) { m_okibank->set_entry(data & 3); } -WRITE16_MEMBER(mwarr_state::sprites_commands_w) -{ - if (m_which) - { - int i; - - switch (data) - { - case 0: - /* clear sprites on screen */ - for (i = 0; i < 0x800; i++) - { - m_sprites_buffer[i] = 0; - } - m_which = 0; - break; - - default: - logerror("used unknown sprites command %02X\n",data); - case 0xf: - /* refresh sprites on screen */ - for (i = 0; i < 0x800; i++) - { - m_sprites_buffer[i] = m_spriteram[i]; - } - break; - - case 0xd: - /* keep sprites on screen */ - break; - } - } - - m_which ^= 1; -} - -WRITE16_MEMBER(mwarr_state::mwarr_brightness_w) -{ - int i; - double brightness; - - COMBINE_DATA(&m_mwarr_ram[0x14 / 2]); - - brightness = (double)(data & 0xff); - for (i = 0; i < 0x800; i++) - { - m_palette->set_pen_contrast(i, brightness/255); - } -} - - /************************************* * * Address maps @@ -218,23 +108,24 @@ WRITE16_MEMBER(mwarr_state::mwarr_brightness_w) void mwarr_state::mwarr_map(address_map &map) { map(0x000000, 0x0fffff).rom(); - map(0x100000, 0x1007ff).ram().w(FUNC(mwarr_state::bg_videoram_w)).share("bg_videoram"); - map(0x100800, 0x100fff).ram().w(FUNC(mwarr_state::mlow_videoram_w)).share("mlow_videoram"); - map(0x101000, 0x1017ff).ram().w(FUNC(mwarr_state::mhigh_videoram_w)).share("mhigh_videoram"); - map(0x101800, 0x1027ff).ram().w(FUNC(mwarr_state::tx_videoram_w)).share("tx_videoram"); + map(0x100000, 0x1007ff).ram().w(m_video, FUNC(edevices_device::bg_videoram_w)).share("bg_videoram"); + map(0x100800, 0x100fff).ram().w(m_video, FUNC(edevices_device::mlow_videoram_w)).share("mlow_videoram"); + map(0x101000, 0x1017ff).ram().w(m_video, FUNC(edevices_device::mhigh_videoram_w)).share("mhigh_videoram"); + map(0x101800, 0x1027ff).ram().w(m_video, FUNC(edevices_device::tx_videoram_w)).share("tx_videoram"); map(0x103000, 0x1033ff).ram().share("bg_scrollram"); map(0x103400, 0x1037ff).ram().share("mlow_scrollram"); map(0x103800, 0x103bff).ram().share("mhigh_scrollram"); map(0x103c00, 0x103fff).ram().share("vidattrram"); map(0x104000, 0x104fff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0x108000, 0x108fff).ram().share("spriteram"); + map(0x108000, 0x1087ff).ram().share("spriteram"); + map(0x108800, 0x108fff).ram(); map(0x110000, 0x11ffff).ram().share("mwarr_ram"); map(0x110000, 0x110001).portr("P1_P2"); map(0x110002, 0x110003).portr("SYSTEM"); map(0x110004, 0x110005).portr("DSW"); map(0x110010, 0x110011).w(FUNC(mwarr_state::oki1_bank_w)); map(0x110014, 0x110015).w(FUNC(mwarr_state::mwarr_brightness_w)); - map(0x110016, 0x110017).w(FUNC(mwarr_state::sprites_commands_w)); + map(0x110016, 0x110017).w(m_video, FUNC(edevices_device::sprites_commands_w)); map(0x180001, 0x180001).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write)); map(0x190001, 0x190001).rw("oki2", FUNC(okim6295_device::read), FUNC(okim6295_device::write)); } @@ -247,7 +138,6 @@ void mwarr_state::oki2_map(address_map &map) map(0x20000, 0x3ffff).bankr("okibank"); } - /************************************* * * Input ports @@ -277,7 +167,7 @@ static INPUT_PORTS_START( mwarr ) PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen") - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_CUSTOM ) // otherwise it doesn't boot + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_CUSTOM ) // otherwise it doesn't boot (is service switch on stlforce) PORT_BIT( 0xfff0, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("DSW") @@ -381,175 +271,24 @@ GFXDECODE_END * Video emulation * *************************************/ - -TILE_GET_INFO_MEMBER(mwarr_state::get_bg_tile_info) -{ - int tileno = m_bg_videoram[tile_index] & 0x1fff; - int colour = (m_bg_videoram[tile_index] & 0xe000) >> 13; - - SET_TILE_INFO_MEMBER(4, tileno, colour, 0); -} - -TILE_GET_INFO_MEMBER(mwarr_state::get_mlow_tile_info) -{ - int tileno = m_mlow_videoram[tile_index] & 0x1fff; - int colour = (m_mlow_videoram[tile_index] & 0xe000) >> 13; - - SET_TILE_INFO_MEMBER(3, tileno, colour, 0); -} - -TILE_GET_INFO_MEMBER(mwarr_state::get_mhigh_tile_info) -{ - int tileno = m_mhigh_videoram[tile_index] & 0x1fff; - int colour = (m_mhigh_videoram[tile_index] & 0xe000) >> 13; - - SET_TILE_INFO_MEMBER(2, tileno, colour, 0); -} - -TILE_GET_INFO_MEMBER(mwarr_state::get_tx_tile_info) -{ - int tileno = m_tx_videoram[tile_index] & 0x1fff; - int colour = (m_tx_videoram[tile_index] & 0xe000) >> 13; - - SET_TILE_INFO_MEMBER(1, tileno, colour, 0); -} - -void mwarr_state::video_start() -{ - m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(mwarr_state::get_bg_tile_info),this), TILEMAP_SCAN_COLS, 16, 16, 64, 16); - m_mlow_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(mwarr_state::get_mlow_tile_info),this), TILEMAP_SCAN_COLS, 16, 16, 64, 16); - m_mhigh_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(mwarr_state::get_mhigh_tile_info),this), TILEMAP_SCAN_COLS, 16, 16, 64, 16); - m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(mwarr_state::get_tx_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); - - m_mlow_tilemap->set_transparent_pen(0); - m_mhigh_tilemap->set_transparent_pen(0); - m_tx_tilemap->set_transparent_pen(0); - - m_bg_tilemap->set_scroll_rows(256); - m_mlow_tilemap->set_scroll_rows(256); - m_mhigh_tilemap->set_scroll_rows(256); - - save_item(NAME(m_sprites_buffer)); -} - -void mwarr_state::draw_sprites( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect ) + +uint32_t mwarr_state::screen_update_mwarr(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - const uint16_t *source = m_sprites_buffer + 0x800 - 4; - const uint16_t *finish = m_sprites_buffer; - gfx_element *gfx = m_gfxdecode->gfx(0); - int x, y, color, flipx, dy, pri, pri_mask, i; - - while (source >= finish) - { - /* draw sprite */ - if (source[0] & 0x0800) - { - y = 512 - (source[0] & 0x01ff); - x = (source[3] & 0x3ff) - 9; - - color = source[1] & 0x000f; - flipx = source[1] & 0x0200; - - dy = (source[0] & 0xf000) >> 12; - - pri = ((source[1] & 0x3c00) >> 10); // Priority (1 = Low) - pri_mask = ~((1 << (pri + 1)) - 1); // Above the first "pri" levels - - for (i = 0; i <= dy; i++) - { - gfx->prio_transpen(bitmap, - cliprect, - source[2]+i, - color, - flipx,0, - x,y+i*16, - screen.priority(),pri_mask,0 ); - - /* wrap around x */ - gfx->prio_transpen(bitmap, - cliprect, - source[2]+i, - color, - flipx,0, - x-1024,y+i*16, - screen.priority(),pri_mask,0 ); - - /* wrap around y */ - gfx->prio_transpen(bitmap, - cliprect, - source[2]+i, - color, - flipx,0, - x,y-512+i*16, - screen.priority(),pri_mask,0 ); - - /* wrap around x & y */ - gfx->prio_transpen(bitmap, - cliprect, - source[2]+i, - color, - flipx,0, - x-1024,y-512+i*16, - screen.priority(),pri_mask,0 ); - } - } - - source -= 0x4; - } + return m_video->draw(screen, bitmap, cliprect); } -uint32_t mwarr_state::screen_update_mwarr(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +WRITE16_MEMBER(mwarr_state::mwarr_brightness_w) { int i; + double brightness; - screen.priority().fill(0, cliprect); - - if (BIT(m_vidattrram[6], 0)) - { - for (i = 0; i < 256; i++) - m_bg_tilemap->set_scrollx(i, m_bg_scrollram[i] + 20); - } - else - { - for (i = 0; i < 256; i++) - m_bg_tilemap->set_scrollx(i, m_bg_scrollram[0] + 19); - } - - if (BIT(m_vidattrram[6], 2)) - { - for (i = 0; i < 256; i++) - m_mlow_tilemap->set_scrollx(i, m_mlow_scrollram[i] + 19); - } - else - { - for (i = 0; i < 256; i++) - m_mlow_tilemap->set_scrollx(i, m_mlow_scrollram[0] + 19); - } + COMBINE_DATA(&m_mwarr_ram[0x14 / 2]); - if (BIT(m_vidattrram[6], 4)) - { - for (i = 0; i < 256; i++) - m_mhigh_tilemap->set_scrollx(i, m_mhigh_scrollram[i] + 19); - } - else + brightness = (double)(data & 0xff); + for (i = 0; i < 0x800; i++) { - for (i = 0; i < 256; i++) - m_mhigh_tilemap->set_scrollx(i, m_mhigh_scrollram[0] + 19); + m_palette->set_pen_contrast(i, brightness/255); } - - m_bg_tilemap->set_scrolly(0, m_vidattrram[1] + 1); - m_mlow_tilemap->set_scrolly(0, m_vidattrram[2] + 1); - m_mhigh_tilemap->set_scrolly(0, m_vidattrram[3] + 1); - - m_tx_tilemap->set_scrollx(0, m_vidattrram[0] + 16); - m_tx_tilemap->set_scrolly(0, m_vidattrram[4] + 1); - - m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0x01); - m_mlow_tilemap->draw(screen, bitmap, cliprect, 0, 0x02); - m_mhigh_tilemap->draw(screen, bitmap, cliprect, 0, 0x04); - m_tx_tilemap->draw(screen, bitmap, cliprect, 0, 0x10); - draw_sprites(screen, bitmap, cliprect); - return 0; } /************************************* @@ -561,23 +300,18 @@ uint32_t mwarr_state::screen_update_mwarr(screen_device &screen, bitmap_ind16 &b void mwarr_state::machine_start() { m_okibank->configure_entries(0, 4, memregion("oki2")->base(), 0x20000); - - save_item(NAME(m_which)); } void mwarr_state::machine_reset() { - m_which = 0; } MACHINE_CONFIG_START(mwarr_state::mwarr) - /* basic machine hardware */ MCFG_DEVICE_ADD("maincpu", M68000, MASTER_CLOCK) MCFG_DEVICE_PROGRAM_MAP(mwarr_map) MCFG_DEVICE_VBLANK_INT_DRIVER("screen", mwarr_state, irq4_line_hold) - /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(54) @@ -591,6 +325,19 @@ MACHINE_CONFIG_START(mwarr_state::mwarr) MCFG_PALETTE_ADD("palette", 0x800) MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR) + EDEVICES_VID(config, m_video, 0); + m_video->set_bg_videoram_tag("bg_videoram"); + m_video->set_mlow_videoram_tag("mlow_videoram"); + m_video->set_mhigh_videoram_tag("mhigh_videoram"); + m_video->set_tx_videoram_tag("tx_videoram"); + m_video->set_bg_scrollram_tag("bg_scrollram"); + m_video->set_mlow_scrollram_tag("mlow_scrollram"); + m_video->set_mhigh_scrollram_tag("mhigh_scrollram"); + m_video->set_vidattrram_tag("vidattrram"); + m_video->set_spriteram_tag("spriteram"); + m_video->set_gfxdecode_tag("gfxdecode"); + m_video->set_palette_tag("palette"); + /* sound hardware */ SPEAKER(config, "mono").front_center(); @@ -609,52 +356,54 @@ MACHINE_CONFIG_END * *************************************/ +// all roms had a handwritten date, possible prototype? newest date is the program roms, 24th January ROM_START( mwarr ) ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ - ROM_LOAD16_BYTE( "prg_ev", 0x00000, 0x80000, CRC(d1d5e0a6) SHA1(f47955459d41c904b96de000b32cae156ee3bcba) ) - ROM_LOAD16_BYTE( "prg_od", 0x00001, 0x80000, CRC(e5217d91) SHA1(6a5d282e8e5b98628f98530e3c47b9b398e9334e) ) + ROM_LOAD16_BYTE( "prg_ev", 0x00000, 0x80000, CRC(d1d5e0a6) SHA1(f47955459d41c904b96de000b32cae156ee3bcba) ) // date 24/1 + ROM_LOAD16_BYTE( "prg_od", 0x00001, 0x80000, CRC(e5217d91) SHA1(6a5d282e8e5b98628f98530e3c47b9b398e9334e) ) // date 24/1 ROM_REGION( 0x900000, "gfx1", 0 ) - ROM_LOAD( "obm-0", 0x000000, 0x80000, CRC(b4707ba1) SHA1(35330a31e9837e5f848a21fa6f589412b35a04a0) ) - ROM_LOAD( "obm-6", 0x080000, 0x80000, CRC(f9675acc) SHA1(06e0c0c0928ace331ebd08cfeeaa2c8b5603457f) ) - ROM_LOAD( "obm-12", 0x100000, 0x80000, CRC(6239c4dd) SHA1(128040e9517151faf15c75dc1f2d79c5a66b9e1c) ) - ROM_LOAD( "obm-1", 0x180000, 0x80000, CRC(817dcead) SHA1(697b4b3e18e022e0635a3b02cbce1e4d2959a732) ) - ROM_LOAD( "obm-7", 0x200000, 0x80000, CRC(3a93c499) SHA1(9ecd72c5ef4f0edbdc19946bd33aa4e74690756d) ) - ROM_LOAD( "obm-13", 0x280000, 0x80000, CRC(bac42f06) SHA1(6998e605db732e6be9d8213e96bfb04a258eae8f) ) - ROM_LOAD( "obm-2", 0x300000, 0x80000, CRC(68cd29b0) SHA1(02f7bf463cd15eaf4713d33494f19c4fcd199e87) ) - ROM_LOAD( "obm-8", 0x380000, 0x80000, CRC(f9482638) SHA1(ea6256136362a12a40d6b168157c28a14236fcc1) ) - ROM_LOAD( "obm-14", 0x400000, 0x80000, CRC(79ed46b8) SHA1(93b503b58a316be312a74f2da7df3dbcd275884b) ) - ROM_LOAD( "obm-3", 0x480000, 0x80000, CRC(6e924cb8) SHA1(3c56dfcd042108b1cd16395bcdda0fd92a6ab0f7) ) - ROM_LOAD( "obm-9", 0x500000, 0x80000, CRC(be1fb64e) SHA1(4141b6b78fa9830cf5dc4f4f0b29e87e57f70ccb) ) - ROM_LOAD( "obm-15", 0x580000, 0x80000, CRC(5e0efb71) SHA1(d556ed9307a9a9f59f5235981b4b091a88399c98) ) - ROM_LOAD( "obm-4", 0x600000, 0x80000, CRC(f34b67bd) SHA1(91d6553144e45ea1b96bf59403b3e26224b79a7d) ) - ROM_LOAD( "obm-10", 0x680000, 0x80000, CRC(00c68a23) SHA1(a4984932ac3fae368700f77ad16b35b0138dbc21) ) - ROM_LOAD( "obm-16", 0x700000, 0x80000, CRC(e9516379) SHA1(8d9aaa2ee1331dd3eb8951a1008811703dd9f41d) ) - ROM_LOAD( "obm-5", 0x780000, 0x80000, CRC(b2b976f3) SHA1(77dee06ac1187c8a1c4188951bd7b0a62ec84350) ) - ROM_LOAD( "obm-11", 0x800000, 0x80000, CRC(7bf1e4da) SHA1(4aeef3b7c23303580a851dc793e9671a2a0f421f) ) - ROM_LOAD( "obm-17", 0x880000, 0x80000, CRC(47bd56e8) SHA1(e10569e89083165a7efe29f84167a1c15171ccaf) ) + ROM_LOAD( "obm-0", 0x000000, 0x80000, CRC(b4707ba1) SHA1(35330a31e9837e5f848a21fa6f589412b35a04a0) ) // 7/11 + ROM_LOAD( "obm-6", 0x080000, 0x80000, CRC(f9675acc) SHA1(06e0c0c0928ace331ebd08cfeeaa2c8b5603457f) ) // 7/11 + ROM_LOAD( "obm-12", 0x100000, 0x80000, CRC(6239c4dd) SHA1(128040e9517151faf15c75dc1f2d79c5a66b9e1c) ) // 22/11 + ROM_LOAD( "obm-1", 0x180000, 0x80000, CRC(817dcead) SHA1(697b4b3e18e022e0635a3b02cbce1e4d2959a732) ) // 7/11 + ROM_LOAD( "obm-7", 0x200000, 0x80000, CRC(3a93c499) SHA1(9ecd72c5ef4f0edbdc19946bd33aa4e74690756d) ) // 7/11 + ROM_LOAD( "obm-13", 0x280000, 0x80000, CRC(bac42f06) SHA1(6998e605db732e6be9d8213e96bfb04a258eae8f) ) // 22/11 + ROM_LOAD( "obm-2", 0x300000, 0x80000, CRC(68cd29b0) SHA1(02f7bf463cd15eaf4713d33494f19c4fcd199e87) ) // 7/11 + ROM_LOAD( "obm-8", 0x380000, 0x80000, CRC(f9482638) SHA1(ea6256136362a12a40d6b168157c28a14236fcc1) ) // 7/11 + ROM_LOAD( "obm-14", 0x400000, 0x80000, CRC(79ed46b8) SHA1(93b503b58a316be312a74f2da7df3dbcd275884b) ) // 22/11 + + ROM_LOAD( "obm-3", 0x480000, 0x80000, CRC(6e924cb8) SHA1(3c56dfcd042108b1cd16395bcdda0fd92a6ab0f7) ) // 7/11 + ROM_LOAD( "obm-9", 0x500000, 0x80000, CRC(be1fb64e) SHA1(4141b6b78fa9830cf5dc4f4f0b29e87e57f70ccb) ) // 7/11 + ROM_LOAD( "obm-15", 0x580000, 0x80000, CRC(5e0efb71) SHA1(d556ed9307a9a9f59f5235981b4b091a88399c98) ) // 22/11 + ROM_LOAD( "obm-4", 0x600000, 0x80000, CRC(f34b67bd) SHA1(91d6553144e45ea1b96bf59403b3e26224b79a7d) ) // 7/11 + ROM_LOAD( "obm-10", 0x680000, 0x80000, CRC(00c68a23) SHA1(a4984932ac3fae368700f77ad16b35b0138dbc21) ) // 7/11 + ROM_LOAD( "obm-16", 0x700000, 0x80000, CRC(e9516379) SHA1(8d9aaa2ee1331dd3eb8951a1008811703dd9f41d) ) // 22/11 + ROM_LOAD( "obm-5", 0x780000, 0x80000, CRC(b2b976f3) SHA1(77dee06ac1187c8a1c4188951bd7b0a62ec84350) ) // 7/11 + ROM_LOAD( "obm-11", 0x800000, 0x80000, CRC(7bf1e4da) SHA1(4aeef3b7c23303580a851dc793e9671a2a0f421f) ) // 7/11 + ROM_LOAD( "obm-17", 0x880000, 0x80000, CRC(47bd56e8) SHA1(e10569e89083165a7efe29f84167a1c15171ccaf) ) // 22/11 ROM_REGION( 0x100000, "gfx2", 0 ) - ROM_LOAD( "sf4-0", 0x000000, 0x80000, CRC(25938b2d) SHA1(6336e41eee58cab9a524b9bca08965786cc133d3) ) - ROM_LOAD( "sf4-1", 0x080000, 0x80000, CRC(2269ce5c) SHA1(4c6169acf17bba94dc5684f5db60d5bcf73ad068) ) + ROM_LOAD( "sf4-0", 0x000000, 0x80000, CRC(25938b2d) SHA1(6336e41eee58cab9a524b9bca08965786cc133d3) ) // 7/11 + ROM_LOAD( "sf4-1", 0x080000, 0x80000, CRC(2269ce5c) SHA1(4c6169acf17bba94dc5684f5db60d5bcf73ad068) ) // 7/11 ROM_REGION( 0x100000, "gfx3", 0 ) - ROM_LOAD( "sf3-0", 0x000000, 0x80000, CRC(86cd162c) SHA1(95d5f300e3671ebe29b2331325f4d80b96988619) ) - ROM_LOAD( "sf3-1", 0x080000, 0x80000, CRC(2e755e54) SHA1(74b1e099358a07848f7c22c71fbe2661e1ebb417) ) + ROM_LOAD( "sf3-0", 0x000000, 0x80000, CRC(86cd162c) SHA1(95d5f300e3671ebe29b2331325f4d80b96988619) ) // 7/11 + ROM_LOAD( "sf3-1", 0x080000, 0x80000, CRC(2e755e54) SHA1(74b1e099358a07848f7c22c71fbe2661e1ebb417) ) // 7/11 ROM_REGION( 0x100000, "gfx4", 0 ) - ROM_LOAD( "sf2-0", 0x000000, 0x80000, CRC(622a1816) SHA1(b7b88a90ff69e8f2e291e1f9299708ec97ef9b77) ) - ROM_LOAD( "sf2-1", 0x080000, 0x80000, CRC(545f89e9) SHA1(e7d52dc2da3770d7310698af47da9ff7ec32388c) ) + ROM_LOAD( "sf2-0", 0x000000, 0x80000, CRC(622a1816) SHA1(b7b88a90ff69e8f2e291e1f9299708ec97ef9b77) ) // 7/11 + ROM_LOAD( "sf2-1", 0x080000, 0x80000, CRC(545f89e9) SHA1(e7d52dc2da3770d7310698af47da9ff7ec32388c) ) // 7/11 ROM_REGION( 0x100000, "gfx5", 0 ) - ROM_LOAD( "dw-0", 0x000000, 0x80000, CRC(b9b18d00) SHA1(4f38502c75eae88916bc58bfd5d255bac59d0813) ) - ROM_LOAD( "dw-1", 0x080000, 0x80000, CRC(7aea0b12) SHA1(07cbcd6ddcd9ead068b0f5763829e8474b699085) ) + ROM_LOAD( "dw-0", 0x000000, 0x80000, CRC(b9b18d00) SHA1(4f38502c75eae88916bc58bfd5d255bac59d0813) ) // 22/11 + ROM_LOAD( "dw-1", 0x080000, 0x80000, CRC(7aea0b12) SHA1(07cbcd6ddcd9ead068b0f5763829e8474b699085) ) // 22/11 ROM_REGION( 0x40000, "oki1", 0 ) /* Samples */ - ROM_LOAD( "oki0", 0x000000, 0x40000, CRC(005811ce) SHA1(9149bc8e9cc16ce3db4e22f8cb7ea8a57a66980e) ) + ROM_LOAD( "oki0", 0x000000, 0x40000, CRC(005811ce) SHA1(9149bc8e9cc16ce3db4e22f8cb7ea8a57a66980e) ) // no date ROM_REGION( 0x80000, "oki2", 0 ) /* Samples */ - ROM_LOAD( "oki1", 0x000000, 0x80000, CRC(bcde2330) SHA1(452d871360fa907d2e4ebad93c3fba9a3fa32fa7) ) + ROM_LOAD( "oki1", 0x000000, 0x80000, CRC(bcde2330) SHA1(452d871360fa907d2e4ebad93c3fba9a3fa32fa7) ) // no date ROM_END /************************************* @@ -663,4 +412,4 @@ ROM_END * *************************************/ -GAME( 199?, mwarr, 0, mwarr, mwarr, mwarr_state, empty_init, ROT0, "Elettronica Video-Games S.R.L.", "Mighty Warriors", MACHINE_SUPPORTS_SAVE ) +GAME( 199?, mwarr, 0, mwarr, mwarr, mwarr_state, empty_init, ROT0, "Elettronica Video-Games S.R.L.", "Mighty Warriors (24/1)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/mz3500.cpp b/src/mame/drivers/mz3500.cpp index 083ca202a13..595773cf421 100644 --- a/src/mame/drivers/mz3500.cpp +++ b/src/mame/drivers/mz3500.cpp @@ -826,8 +826,8 @@ MACHINE_CONFIG_START(mz3500_state::mz3500) ppi.out_pb_callback().set(FUNC(mz3500_state::mz3500_pb_w)); ppi.out_pc_callback().set(FUNC(mz3500_state::mz3500_pc_w)); - MCFG_UPD765A_ADD("upd765a", true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE("master", INPUT_LINE_IRQ0)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_master, INPUT_LINE_IRQ0); MCFG_FLOPPY_DRIVE_ADD("upd765a:0", mz3500_floppies, "525ssdd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765a:1", mz3500_floppies, "525ssdd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765a:2", mz3500_floppies, "525ssdd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/mz6500.cpp b/src/mame/drivers/mz6500.cpp index 814a19fcb4a..831472fe85f 100644 --- a/src/mame/drivers/mz6500.cpp +++ b/src/mame/drivers/mz6500.cpp @@ -169,7 +169,7 @@ MACHINE_CONFIG_START(mz6500_state::mz6500) MCFG_DEVICE_ADDRESS_MAP(0, upd7220_map) MCFG_UPD7220_DISPLAY_PIXELS_CALLBACK_OWNER(mz6500_state, hgdc_display_pixels) - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765:0", mz6500_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", mz6500_floppies, "525hd", floppy_image_device::default_floppy_formats) MACHINE_CONFIG_END diff --git a/src/mame/drivers/namcofl.cpp b/src/mame/drivers/namcofl.cpp index 0c9218efd46..426bf6f4602 100644 --- a/src/mame/drivers/namcofl.cpp +++ b/src/mame/drivers/namcofl.cpp @@ -483,34 +483,8 @@ static const gfx_layout obj_layout = 16*128 }; -static const gfx_layout tile_layout = -{ - 8,8, - RGN_FRAC(1,1), - 8, - { 0,1,2,3,4,5,6,7 }, - { 0*8,1*8,2*8,3*8,4*8,5*8,6*8,7*8 }, - { 0*64,1*64,2*64,3*64,4*64,5*64,6*64,7*64 }, - 8*64 -}; - -static const gfx_layout roz_layout = -{ - 16,16, - RGN_FRAC(1,1), - 8, - { 0,1,2,3,4,5,6,7 }, - { 0*8,1*8,2*8,3*8,4*8,5*8,6*8,7*8,8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8 }, - { - 0*128,1*128,2*128,3*128,4*128,5*128,6*128,7*128,8*128,9*128,10*128,11*128,12*128,13*128,14*128,15*128 - }, - 16*128 -}; - static GFXDECODE_START( gfx_namcofl ) - GFXDECODE_ENTRY( NAMCOFL_TILEGFXREGION, 0, tile_layout, 0x1000, 0x08 ) - GFXDECODE_ENTRY( NAMCOFL_SPRITEGFXREGION, 0, obj_layout, 0x0000, 0x10 ) - GFXDECODE_ENTRY( NAMCOFL_ROTGFXREGION, 0, roz_layout, 0x1800, 0x08 ) + GFXDECODE_ENTRY( "sprite", 0, obj_layout, 0x0000, 0x10 ) GFXDECODE_END @@ -580,10 +554,10 @@ MACHINE_RESET_MEMBER(namcofl_state,namcofl) MACHINE_CONFIG_START(namcofl_state::namcofl) - MCFG_DEVICE_ADD("maincpu", I960, 20000000) // i80960KA-20 == 20 MHz part + MCFG_DEVICE_ADD("maincpu", I960, 80_MHz_XTAL/4) // i80960KA-20 == 20 MHz part MCFG_DEVICE_PROGRAM_MAP(namcofl_mem) - MCFG_DEVICE_ADD("mcu", NAMCO_C75, 48384000/3) + MCFG_DEVICE_ADD("mcu", NAMCO_C75, 48.384_MHz_XTAL/3) MCFG_DEVICE_PROGRAM_MAP(namcoc75_am) MCFG_DEVICE_IO_MAP(namcoc75_io) /* TODO: irq generation for these */ @@ -600,22 +574,19 @@ MACHINE_CONFIG_START(namcofl_state::namcofl) MCFG_SCREEN_SIZE(NAMCOFL_HTOTAL, NAMCOFL_VTOTAL) MCFG_SCREEN_VISIBLE_AREA(0, NAMCOFL_HBSTART-1, 0, NAMCOFL_VBSTART-1) MCFG_SCREEN_UPDATE_DRIVER(namcofl_state, screen_update_namcofl) - MCFG_SCREEN_PALETTE("palette") - - MCFG_PALETTE_ADD("palette", 8192) + MCFG_SCREEN_PALETTE(m_c116) - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcofl) + MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, m_c116, gfx_namcofl) NAMCO_C169ROZ(config, m_c169roz, 0); - m_c169roz->set_gfxdecode_tag("gfxdecode"); + m_c169roz->set_palette(m_c116); m_c169roz->set_is_namcofl(true); m_c169roz->set_ram_words(0x20000/2); m_c169roz->set_tile_callback(namco_c169roz_device::c169_tilemap_delegate(&namcofl_state::RozCB, this)); - m_c169roz->set_maskregion_tag(NAMCOFL_ROTMASKREGION); - m_c169roz->set_gfxregion(NAMCOFL_ROTGFX); + m_c169roz->set_color_base(0x1800); NAMCO_C355SPR(config, m_c355spr, 0); - m_c355spr->set_palette_tag("palette"); + m_c355spr->set_screen(m_screen); m_c355spr->set_gfxdecode_tag("gfxdecode"); m_c355spr->set_is_namcofl(true); m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate(&namcofl_state::FLobjcode2tile, this)); @@ -623,19 +594,17 @@ MACHINE_CONFIG_START(namcofl_state::namcofl) m_c355spr->set_gfxregion(NAMCOFL_SPRITEGFX); NAMCO_C123TMAP(config, m_c123tmap, 0); - m_c123tmap->set_gfxdecode_tag("gfxdecode"); + m_c123tmap->set_palette(m_c116); m_c123tmap->set_tile_callback(namco_c123tmap_device::c123_tilemap_delegate(&namcofl_state::TilemapCB, this)); - m_c123tmap->set_maskregion_tag(NAMCOFL_TILEMASKREGION); - m_c123tmap->set_gfxregion(NAMCOFL_TILEGFX); - + m_c123tmap->set_color_base(0x1000); + NAMCO_C116(config, m_c116, 0); - m_c116->set_palette(m_palette); MCFG_VIDEO_START_OVERRIDE(namcofl_state,namcofl) SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - MCFG_DEVICE_ADD("c352", C352, 48384000/2, 288) + MCFG_DEVICE_ADD("c352", C352, 48.384_MHz_XTAL/2, 288) MCFG_SOUND_ROUTE(0, "lspeaker", 1.00) MCFG_SOUND_ROUTE(1, "rspeaker", 1.00) //MCFG_SOUND_ROUTE(2, "lspeaker", 1.00) // Second DAC not present. @@ -656,26 +625,26 @@ ROM_START( speedrcr ) ROM_REGION16_LE( 0x80000, "c75data", 0 ) // C75 data ROM_LOAD("se1_spr.21l", 0x000000, 0x80000, CRC(850a27ac) SHA1(7d5db840ec67659a1f2e69a62cdb03ce6ee0b47b) ) - ROM_REGION( 0x200000, NAMCOFL_ROTGFXREGION, 0 ) // "RCHAR" (roz characters) + ROM_REGION( 0x200000, "c169roz", 0 ) // "RCHAR" (roz characters) ROM_LOAD("se1_rch0.19j", 0x000000, 0x100000, CRC(a0827288) SHA1(13691ef4d402a6dc91851de4f82cfbdf96d417cb) ) ROM_LOAD("se1_rch1.18j", 0x100000, 0x100000, CRC(af7609ad) SHA1(b16041f0eb47d7566011d9d762a3083411dc422e) ) - ROM_REGION( 0x400000, NAMCOFL_TILEGFXREGION, 0 ) // "SCHAR" (regular BG characters) + ROM_REGION( 0x400000, "c123tmap", 0 ) // "SCHAR" (regular BG characters) ROM_LOAD("se1_sch0.21p", 0x000000, 0x100000, CRC(7b5cfad0) SHA1(5a0355e37eb191bc0cf8b6b7c3d0274560b9bbd5) ) ROM_LOAD("se1_sch1.20p", 0x100000, 0x100000, CRC(5086e0d3) SHA1(0aa7d11f4f9a75117e69cc77f1b73a68d9007aef) ) ROM_LOAD("se1_sch2.19p", 0x200000, 0x100000, CRC(e59a731e) SHA1(3fed72e9bb485d4d689ab51490360c4c6f1dc5cb) ) ROM_LOAD("se1_sch3.18p", 0x300000, 0x100000, CRC(f817027a) SHA1(71745476f496c60d89c8563b3e46bc85eebc79ce) ) - ROM_REGION( 0x800000, NAMCOFL_SPRITEGFXREGION, 0 ) // OBJ + ROM_REGION( 0x800000, "sprite", 0 ) // OBJ ROM_LOAD16_BYTE("se1obj0l.ic1", 0x000001, 0x200000, CRC(17585218) SHA1(3332afa9bd194ac37b8d6f352507c523a0f2e2b3) ) ROM_LOAD16_BYTE("se1obj0u.ic2", 0x000000, 0x200000, CRC(d14b1236) SHA1(e5447732ef3acec88fb7a00e0deca3e71a40ae65) ) ROM_LOAD16_BYTE("se1obj1l.ic3", 0x400001, 0x200000, CRC(c4809fd5) SHA1(e0b80fccc17c83fb9d08f7f1cf2cd2f0f3a510b4) ) ROM_LOAD16_BYTE("se1obj1u.ic4", 0x400000, 0x200000, CRC(0beefa56) SHA1(012fb7b330dbf851ab2217da0a0e7136ddc3d23f) ) - ROM_REGION( 0x100000, NAMCOFL_ROTMASKREGION, 0 ) // "RSHAPE" (roz mask like NB-1?) + ROM_REGION( 0x100000, "c169roz:mask", 0 ) // "RSHAPE" (roz mask like NB-1?) ROM_LOAD("se1_rsh.14k", 0x000000, 0x100000, CRC(7aa5a962) SHA1(ff936dfcfcc4ee1f5f2232df62def76ff99e671e) ) - ROM_REGION( 0x100000, NAMCOFL_TILEMASKREGION, 0 ) // "SSHAPE" (mask for other tiles?) + ROM_REGION( 0x100000, "c123tmap:mask", 0 ) // "SSHAPE" (mask for other tiles?) ROM_LOAD("se1_ssh.18u", 0x000000, 0x100000, CRC(7a8e0bda) SHA1(f6a508d90274d0205fec0c46f5f783a2715c0c6e) ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples @@ -705,26 +674,26 @@ ROM_START( finalapr ) ROM_REGION16_LE( 0x80000, "c75data", 0 ) // C75 data ROM_LOAD("flr1spr.21l", 0x000000, 0x20000, CRC(69bb0f5e) SHA1(6831d618de42a165e508ad37db594d3aa290c530) ) - ROM_REGION( 0x200000, NAMCOFL_ROTGFXREGION, 0 ) // "RCHAR" (roz characters) + ROM_REGION( 0x200000, "c169roz", 0 ) // "RCHAR" (roz characters) ROM_LOAD("flr1rch0.19j", 0x000000, 0x100000, CRC(f413f50d) SHA1(cdd8073dda4feaea78e3b94520cf20a9799fd04d) ) ROM_LOAD("flr1rch1.18j", 0x100000, 0x100000, CRC(4654d519) SHA1(f8bb473013cdca48dd98df0de2f78c300c156e91) ) - ROM_REGION( 0x400000, NAMCOFL_TILEGFXREGION, 0 ) // "SCHAR" (regular BG characters) + ROM_REGION( 0x400000, "c123tmap", 0 ) // "SCHAR" (regular BG characters) ROM_LOAD("flr1sch0.21p", 0x000000, 0x100000, CRC(7169efca) SHA1(66c7aa1b50b236b4700b07be0dca7aebdabedb8c) ) ROM_LOAD("flr1sch1.20p", 0x100000, 0x100000, CRC(aa233a02) SHA1(0011329f585658d90f820daf0ba08ce2735bddfc) ) ROM_LOAD("flr1sch2.19p", 0x200000, 0x100000, CRC(9b6b7abd) SHA1(5cdec70db1b46bc5d0866ca155b520157fef3adf) ) ROM_LOAD("flr1sch3.18p", 0x300000, 0x100000, CRC(50a14f54) SHA1(ab9c2f2e11f006a9dc7e5aedd5788d7d67166d36) ) - ROM_REGION( 0x800000, NAMCOFL_SPRITEGFXREGION, 0 ) // OBJ + ROM_REGION( 0x800000, "sprite", 0 ) // OBJ ROM_LOAD16_BYTE("flr1obj0l.ic1", 0x000001, 0x200000, CRC(364a902c) SHA1(4a1ea48eee86d410e36096cc100b4c9a5a645034) ) ROM_LOAD16_BYTE("flr1obj0u.ic2", 0x000000, 0x200000, CRC(a5c7b80e) SHA1(4e0e863cfdd8c051c3c4594bb21e11fb93c28f0c) ) ROM_LOAD16_BYTE("flr1obj1l.ic3", 0x400001, 0x200000, CRC(51fd8de7) SHA1(b1571c45e8c33d746716fd790c704a3361d02bdc) ) ROM_LOAD16_BYTE("flr1obj1u.ic4", 0x400000, 0x200000, CRC(1737aa3c) SHA1(8eaf0dc5d60a270d2c1626f54f5edbddbb0a59c8) ) - ROM_REGION( 0x80000, NAMCOFL_ROTMASKREGION, 0 ) // "RSHAPE" (roz mask like NB-1?) + ROM_REGION( 0x80000, "c169roz:mask", 0 ) // "RSHAPE" (roz mask like NB-1?) ROM_LOAD("flr1rsh.14k", 0x000000, 0x080000, CRC(037c0983) SHA1(c48574a8ad125cedfaf2538c5ff824e121204629) ) - ROM_REGION( 0x80000, NAMCOFL_TILEMASKREGION, 0 ) // "SSHAPE" (mask for other tiles?) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) // "SSHAPE" (mask for other tiles?) ROM_LOAD("flr1ssh.18u", 0x000000, 0x080000, CRC(f70cb2bf) SHA1(dbddda822287783a43415172b81d0382a8ac43d8) ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples @@ -744,26 +713,26 @@ ROM_START( finalapro ) ROM_REGION16_LE( 0x80000, "c75data", 0 ) // C75 data ROM_LOAD("flr1spr.21l", 0x000000, 0x20000, CRC(69bb0f5e) SHA1(6831d618de42a165e508ad37db594d3aa290c530) ) - ROM_REGION( 0x200000, NAMCOFL_ROTGFXREGION, 0 ) // "RCHAR" (roz characters) + ROM_REGION( 0x200000, "c169roz", 0 ) // "RCHAR" (roz characters) ROM_LOAD("flr1rch0.19j", 0x000000, 0x100000, CRC(f413f50d) SHA1(cdd8073dda4feaea78e3b94520cf20a9799fd04d) ) ROM_LOAD("flr1rch1.18j", 0x100000, 0x100000, CRC(4654d519) SHA1(f8bb473013cdca48dd98df0de2f78c300c156e91) ) - ROM_REGION( 0x400000, NAMCOFL_TILEGFXREGION, 0 ) // "SCHAR" (regular BG characters) + ROM_REGION( 0x400000, "c123tmap", 0 ) // "SCHAR" (regular BG characters) ROM_LOAD("flr1sch0.21p", 0x000000, 0x100000, CRC(7169efca) SHA1(66c7aa1b50b236b4700b07be0dca7aebdabedb8c) ) ROM_LOAD("flr1sch1.20p", 0x100000, 0x100000, CRC(aa233a02) SHA1(0011329f585658d90f820daf0ba08ce2735bddfc) ) ROM_LOAD("flr1sch2.19p", 0x200000, 0x100000, CRC(9b6b7abd) SHA1(5cdec70db1b46bc5d0866ca155b520157fef3adf) ) ROM_LOAD("flr1sch3.18p", 0x300000, 0x100000, CRC(50a14f54) SHA1(ab9c2f2e11f006a9dc7e5aedd5788d7d67166d36) ) - ROM_REGION( 0x800000, NAMCOFL_SPRITEGFXREGION, 0 ) // OBJ + ROM_REGION( 0x800000, "sprite", 0 ) // OBJ ROM_LOAD16_BYTE("flr1obj0l.ic1", 0x000001, 0x200000, CRC(364a902c) SHA1(4a1ea48eee86d410e36096cc100b4c9a5a645034) ) ROM_LOAD16_BYTE("flr1obj0u.ic2", 0x000000, 0x200000, CRC(a5c7b80e) SHA1(4e0e863cfdd8c051c3c4594bb21e11fb93c28f0c) ) ROM_LOAD16_BYTE("flr1obj1l.ic3", 0x400001, 0x200000, CRC(51fd8de7) SHA1(b1571c45e8c33d746716fd790c704a3361d02bdc) ) ROM_LOAD16_BYTE("flr1obj1u.ic4", 0x400000, 0x200000, CRC(1737aa3c) SHA1(8eaf0dc5d60a270d2c1626f54f5edbddbb0a59c8) ) - ROM_REGION( 0x80000, NAMCOFL_ROTMASKREGION, 0 ) // "RSHAPE" (roz mask like NB-1?) + ROM_REGION( 0x80000, "c169roz:mask", 0 ) // "RSHAPE" (roz mask like NB-1?) ROM_LOAD("flr1rsh.14k", 0x000000, 0x080000, CRC(037c0983) SHA1(c48574a8ad125cedfaf2538c5ff824e121204629) ) - ROM_REGION( 0x80000, NAMCOFL_TILEMASKREGION, 0 ) // "SSHAPE" (mask for other tiles?) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) // "SSHAPE" (mask for other tiles?) ROM_LOAD("flr1ssh.18u", 0x000000, 0x080000, CRC(f70cb2bf) SHA1(dbddda822287783a43415172b81d0382a8ac43d8) ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples @@ -784,26 +753,26 @@ ROM_START( finalaprj ) ROM_REGION16_LE( 0x80000, "c75data", 0 ) // C75 data ROM_LOAD("flr1spr.21l", 0x000000, 0x20000, CRC(69bb0f5e) SHA1(6831d618de42a165e508ad37db594d3aa290c530) ) - ROM_REGION( 0x200000, NAMCOFL_ROTGFXREGION, 0 ) // "RCHAR" (roz characters) + ROM_REGION( 0x200000, "c169roz", 0 ) // "RCHAR" (roz characters) ROM_LOAD("flr1rch0.19j", 0x000000, 0x100000, CRC(f413f50d) SHA1(cdd8073dda4feaea78e3b94520cf20a9799fd04d) ) ROM_LOAD("flr1rch1.18j", 0x100000, 0x100000, CRC(4654d519) SHA1(f8bb473013cdca48dd98df0de2f78c300c156e91) ) - ROM_REGION( 0x400000, NAMCOFL_TILEGFXREGION, 0 ) // "SCHAR" (regular BG characters) + ROM_REGION( 0x400000, "c123tmap", 0 ) // "SCHAR" (regular BG characters) ROM_LOAD("flr1sch0.21p", 0x000000, 0x100000, CRC(7169efca) SHA1(66c7aa1b50b236b4700b07be0dca7aebdabedb8c) ) ROM_LOAD("flr1sch1.20p", 0x100000, 0x100000, CRC(aa233a02) SHA1(0011329f585658d90f820daf0ba08ce2735bddfc) ) ROM_LOAD("flr1sch2.19p", 0x200000, 0x100000, CRC(9b6b7abd) SHA1(5cdec70db1b46bc5d0866ca155b520157fef3adf) ) ROM_LOAD("flr1sch3.18p", 0x300000, 0x100000, CRC(50a14f54) SHA1(ab9c2f2e11f006a9dc7e5aedd5788d7d67166d36) ) - ROM_REGION( 0x800000, NAMCOFL_SPRITEGFXREGION, 0 ) // OBJ + ROM_REGION( 0x800000, "sprite", 0 ) // OBJ ROM_LOAD16_BYTE("flr1obj0l.ic1", 0x000001, 0x200000, CRC(364a902c) SHA1(4a1ea48eee86d410e36096cc100b4c9a5a645034) ) ROM_LOAD16_BYTE("flr1obj0u.ic2", 0x000000, 0x200000, CRC(a5c7b80e) SHA1(4e0e863cfdd8c051c3c4594bb21e11fb93c28f0c) ) ROM_LOAD16_BYTE("flr1obj1l.ic3", 0x400001, 0x200000, CRC(51fd8de7) SHA1(b1571c45e8c33d746716fd790c704a3361d02bdc) ) ROM_LOAD16_BYTE("flr1obj1u.ic4", 0x400000, 0x200000, CRC(1737aa3c) SHA1(8eaf0dc5d60a270d2c1626f54f5edbddbb0a59c8) ) - ROM_REGION( 0x80000, NAMCOFL_ROTMASKREGION, 0 ) // "RSHAPE" (roz mask like NB-1?) + ROM_REGION( 0x80000, "c169roz:mask", 0 ) // "RSHAPE" (roz mask like NB-1?) ROM_LOAD("flr1rsh.14k", 0x000000, 0x080000, CRC(037c0983) SHA1(c48574a8ad125cedfaf2538c5ff824e121204629) ) - ROM_REGION( 0x80000, NAMCOFL_TILEMASKREGION, 0 ) // "SSHAPE" (mask for other tiles?) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) // "SSHAPE" (mask for other tiles?) ROM_LOAD("flr1ssh.18u", 0x000000, 0x080000, CRC(f70cb2bf) SHA1(dbddda822287783a43415172b81d0382a8ac43d8) ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples diff --git a/src/mame/drivers/namconb1.cpp b/src/mame/drivers/namconb1.cpp index 0c67eb74324..ad2d59dc0ba 100644 --- a/src/mame/drivers/namconb1.cpp +++ b/src/mame/drivers/namconb1.cpp @@ -301,7 +301,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(namconb1_state::scantimer) int scanline = param; // Handle VBLANK - if (scanline == NAMCONB1_VBSTART) + if (scanline == 224) { if (m_vbl_irq_level != 0) m_maincpu->set_input_line(m_vbl_irq_level, ASSERT_LINE); @@ -1019,40 +1019,9 @@ static const gfx_layout obj_layout = 16*128 }; /* obj_layout */ -static const gfx_layout tile_layout = -{ - 8,8, - RGN_FRAC(1,1), - 8, - { 0,1,2,3,4,5,6,7 }, - { 0*8,1*8,2*8,3*8,4*8,5*8,6*8,7*8 }, - { 0*64,1*64,2*64,3*64,4*64,5*64,6*64,7*64 }, - 8*64 -}; /* tile_layout */ - -static const gfx_layout roz_layout = -{ - 16,16, - RGN_FRAC(1,1), - 8, - { 0,1,2,3,4,5,6,7 }, - { 0*8,1*8,2*8,3*8,4*8,5*8,6*8,7*8,8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8 }, - { - 0*128,1*128,2*128,3*128,4*128,5*128,6*128,7*128,8*128,9*128,10*128,11*128,12*128,13*128,14*128,15*128 - }, - 16*128 -}; /* roz_layout */ - static GFXDECODE_START( gfx_namconb1 ) - GFXDECODE_ENTRY( NAMCONB1_TILEGFXREGION, 0, tile_layout, 0x1000, 0x10 ) - GFXDECODE_ENTRY( NAMCONB1_SPRITEGFXREGION, 0, obj_layout, 0x0000, 0x10 ) -GFXDECODE_END /* gfxdecodeinfo */ - -static GFXDECODE_START( gfx_namconb2 ) - GFXDECODE_ENTRY( NAMCONB1_TILEGFXREGION, 0, tile_layout, 0x1000, 0x08 ) - GFXDECODE_ENTRY( NAMCONB1_SPRITEGFXREGION, 0, obj_layout, 0x0000, 0x10 ) - GFXDECODE_ENTRY( NAMCONB1_ROTGFXREGION, 0, roz_layout, 0x1800, 0x08 ) -GFXDECODE_END /* gfxdecodeinfo2 */ + GFXDECODE_ENTRY( "sprite", 0, obj_layout, 0x0000, 0x10 ) +GFXDECODE_END /* gfx_namconb1 */ /***************************************************************/ @@ -1084,33 +1053,30 @@ MACHINE_CONFIG_START(namconb1_state::namconb1) MCFG_TIMER_DRIVER_ADD_PERIODIC("mcu_irq2", namconb1_state, mcu_irq2_cb, attotime::from_hz(60)) MCFG_TIMER_DRIVER_ADD_PERIODIC("mcu_adc", namconb1_state, mcu_adc_cb, attotime::from_hz(60)) - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(59.7) - MCFG_SCREEN_SIZE(NAMCONB1_HTOTAL, NAMCONB1_VTOTAL) - MCFG_SCREEN_VISIBLE_AREA(0, NAMCONB1_HBSTART-1, 0, NAMCONB1_VBSTART-1) - MCFG_SCREEN_UPDATE_DRIVER(namconb1_state, screen_update_namconb1) - MCFG_SCREEN_PALETTE("palette") + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_raw(MASTER_CLOCK/8, 384, 0, 288, 264, 0, 224); + m_screen->set_screen_update(FUNC(namconb1_state::screen_update_namconb1)); + m_screen->screen_vblank().set(m_c355spr, FUNC(namco_c355spr_device::vblank)); + m_screen->set_palette(m_c116); - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namconb1) - MCFG_PALETTE_ADD("palette", 0x2000) - MCFG_PALETTE_ENABLE_SHADOWS() + MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, m_c116, gfx_namconb1) NAMCO_C355SPR(config, m_c355spr, 0); - m_c355spr->set_palette_tag("palette"); + m_c355spr->set_screen(m_screen); m_c355spr->set_gfxdecode_tag("gfxdecode"); m_c355spr->set_is_namcofl(false); m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate(&namconb1_state::NB1objcode2tile, this)); m_c355spr->set_palxor(0x0); + m_c355spr->set_buffer(2); // triple buffered m_c355spr->set_gfxregion(NAMCONB1_SPRITEGFX); NAMCO_C123TMAP(config, m_c123tmap, 0); - m_c123tmap->set_gfxdecode_tag("gfxdecode"); + m_c123tmap->set_palette(m_c116); m_c123tmap->set_tile_callback(namco_c123tmap_device::c123_tilemap_delegate(&namconb1_state::NB1TilemapCB, this)); - m_c123tmap->set_maskregion_tag(NAMCONB1_TILEMASKREGION); - m_c123tmap->set_gfxregion(NAMCONB1_TILEGFX); + m_c123tmap->set_color_base(0x1000); NAMCO_C116(config, m_c116, 0); - m_c116->set_palette(m_palette); + m_c116->enable_shadows(); MCFG_VIDEO_START_OVERRIDE(namconb1_state,namconb1) @@ -1128,17 +1094,13 @@ MACHINE_CONFIG_START(namconb1_state::namconb2) MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_PROGRAM_MAP(namconb2_am) - MCFG_SCREEN_MODIFY("screen") - MCFG_SCREEN_UPDATE_DRIVER(namconb1_state, screen_update_namconb2) - - MCFG_DEVICE_REPLACE("gfxdecode", GFXDECODE, "palette", gfx_namconb2) + m_screen->set_screen_update(FUNC(namconb1_state::screen_update_namconb2)); NAMCO_C169ROZ(config, m_c169roz, 0); - m_c169roz->set_gfxdecode_tag("gfxdecode"); + m_c169roz->set_palette(m_c116); m_c169roz->set_is_namcofl(false); m_c169roz->set_ram_words(0x20000/2); - m_c169roz->set_maskregion_tag(NAMCONB1_ROTMASKREGION); - m_c169roz->set_gfxregion(NAMCONB1_ROTGFX); + m_c169roz->set_color_base(0x1800); MACHINE_CONFIG_END @@ -1181,19 +1143,19 @@ ROM_START( ptblank ) /* World set using 4Mb sound data rom (verified) */ ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "gn1-voi0.5j", 0, 0x200000, CRC(05477eb7) SHA1(f2eaacb5dbac06c37c56b9b131230c9cf6602221) ) - ROM_REGION( 0x800000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x800000, "sprite", 0 ) ROM_LOAD16_BYTE( "gn1obj0l.ic1", 0x000001, 0x200000, CRC(06722dc8) SHA1(56fee4e17ed707fa6dbc6bad0d0281fc8cdf72d1) ) /* These four located on MEMEXT OBJ8 PCB daughter-card */ ROM_LOAD16_BYTE( "gn1obj0u.ic2", 0x000000, 0x200000, CRC(fcefc909) SHA1(48c19b6032096dd80777aa6d5eb5f90463095cbe) ) ROM_LOAD16_BYTE( "gn1obj1l.ic3", 0x400001, 0x200000, CRC(48468df7) SHA1(c5fb9082c84ac2ffceb6f5f4cbc1d40047c55e3d) ) ROM_LOAD16_BYTE( "gn1obj1u.ic4", 0x400000, 0x200000, CRC(3109a071) SHA1(4bb16df5a3aecdf37baf843edfc82952d46f5227) ) - ROM_REGION( 0x400000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x400000, "c123tmap", 0 ) ROM_LOAD( "gn1-chr0.8j", 0x000000, 0x100000, CRC(a5c61246) SHA1(d1d9f286b93b5b9880160029c53384d13c08dd8a) ) ROM_LOAD( "gn1-chr1.9j", 0x100000, 0x100000, CRC(c8c59772) SHA1(91de633a300e3b25a919579eaada5549640ab6f0) ) ROM_LOAD( "gn1-chr2.10j", 0x200000, 0x100000, CRC(dc96d999) SHA1(d006a401762b57fef6716f56eb3a7edcb3d3c00e) ) ROM_LOAD( "gn1-chr3.11j", 0x300000, 0x100000, CRC(4352c308) SHA1(785c13df219dceac2f940519141665b630a29f86) ) - ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) ROM_LOAD( "gn1-sha0.5m", 0, 0x80000, CRC(86d4ff85) SHA1(a71056b2bcbba50c834fe28269ebda9719df354a) ) ROM_REGION( 0x0800, "eeprom", 0 ) // default gun calibration and settings @@ -1212,19 +1174,19 @@ ROM_START( ptblanka ) /* World set using non standard ROM labels (NR is Namco's ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "nr4_spr0.5j", 0, 0x200000, CRC(05477eb7) SHA1(f2eaacb5dbac06c37c56b9b131230c9cf6602221) ) // == gn1-voi0.5j - ROM_REGION( 0x800000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x800000, "sprite", 0 ) ROM_LOAD16_BYTE( "gn1obj0l.ic1", 0x000001, 0x200000, CRC(06722dc8) SHA1(56fee4e17ed707fa6dbc6bad0d0281fc8cdf72d1) ) /* These four located on MEMEXT OBJ8 PCB daughter-card */ ROM_LOAD16_BYTE( "gn1obj0u.ic2", 0x000000, 0x200000, CRC(fcefc909) SHA1(48c19b6032096dd80777aa6d5eb5f90463095cbe) ) ROM_LOAD16_BYTE( "gn1obj1l.ic3", 0x400001, 0x200000, CRC(48468df7) SHA1(c5fb9082c84ac2ffceb6f5f4cbc1d40047c55e3d) ) ROM_LOAD16_BYTE( "gn1obj1u.ic4", 0x400000, 0x200000, CRC(3109a071) SHA1(4bb16df5a3aecdf37baf843edfc82952d46f5227) ) - ROM_REGION( 0x400000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x400000, "c123tmap", 0 ) ROM_LOAD( "nr5_spr0.8j", 0x000000, 0x100000, CRC(a5c61246) SHA1(d1d9f286b93b5b9880160029c53384d13c08dd8a) ) // == gn1_chr0.8j ROM_LOAD( "nr6_spr0.9j", 0x100000, 0x100000, CRC(c8c59772) SHA1(91de633a300e3b25a919579eaada5549640ab6f0) ) // == gn1_chr1.8j ROM_LOAD( "nr7_spr0.10j", 0x200000, 0x100000, CRC(dc96d999) SHA1(d006a401762b57fef6716f56eb3a7edcb3d3c00e) ) // == gn1_chr2.10j ROM_LOAD( "nr8_spr0.11j", 0x300000, 0x100000, CRC(4352c308) SHA1(785c13df219dceac2f940519141665b630a29f86) ) // == gn1_chr3.11j - ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) ROM_LOAD( "nr9_spr0.5m", 0, 0x80000, CRC(86d4ff85) SHA1(a71056b2bcbba50c834fe28269ebda9719df354a) ) // == gn1-sha0.5m ROM_REGION( 0x0800, "eeprom", 0 ) // default gun calibration and settings @@ -1243,19 +1205,19 @@ ROM_START( gunbuletw ) /* World set using 4Mb sound data rom (verified) */ ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "gn1-voi0.5j", 0, 0x200000, CRC(05477eb7) SHA1(f2eaacb5dbac06c37c56b9b131230c9cf6602221) ) - ROM_REGION( 0x800000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x800000, "sprite", 0 ) ROM_LOAD16_BYTE( "gn1obj0l.ic1", 0x000001, 0x200000, CRC(06722dc8) SHA1(56fee4e17ed707fa6dbc6bad0d0281fc8cdf72d1) ) /* These four located on MEMEXT OBJ8 PCB daughter-card */ ROM_LOAD16_BYTE( "gn1obj0u.ic2", 0x000000, 0x200000, CRC(fcefc909) SHA1(48c19b6032096dd80777aa6d5eb5f90463095cbe) ) ROM_LOAD16_BYTE( "gn1obj1l.ic3", 0x400001, 0x200000, CRC(48468df7) SHA1(c5fb9082c84ac2ffceb6f5f4cbc1d40047c55e3d) ) ROM_LOAD16_BYTE( "gn1obj1u.ic4", 0x400000, 0x200000, CRC(3109a071) SHA1(4bb16df5a3aecdf37baf843edfc82952d46f5227) ) - ROM_REGION( 0x400000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x400000, "c123tmap", 0 ) ROM_LOAD( "gn1-chr0.8j", 0x000000, 0x100000, CRC(a5c61246) SHA1(d1d9f286b93b5b9880160029c53384d13c08dd8a) ) ROM_LOAD( "gn1-chr1.9j", 0x100000, 0x100000, CRC(c8c59772) SHA1(91de633a300e3b25a919579eaada5549640ab6f0) ) ROM_LOAD( "gn1-chr2.10j", 0x200000, 0x100000, CRC(dc96d999) SHA1(d006a401762b57fef6716f56eb3a7edcb3d3c00e) ) ROM_LOAD( "gn1-chr3.11j", 0x300000, 0x100000, CRC(4352c308) SHA1(785c13df219dceac2f940519141665b630a29f86) ) - ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) ROM_LOAD( "gn1-sha0.5m", 0, 0x80000, CRC(86d4ff85) SHA1(a71056b2bcbba50c834fe28269ebda9719df354a) ) ROM_REGION( 0x0800, "eeprom", 0 ) // default gun calibration and settings @@ -1274,19 +1236,19 @@ ROM_START( gunbuletj ) /* Japanese set using 1Mb sound data rom (verified) */ ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "gn1-voi0.5j", 0, 0x200000, CRC(05477eb7) SHA1(f2eaacb5dbac06c37c56b9b131230c9cf6602221) ) - ROM_REGION( 0x800000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x800000, "sprite", 0 ) ROM_LOAD16_BYTE( "gn1obj0l.ic1", 0x000001, 0x200000, CRC(06722dc8) SHA1(56fee4e17ed707fa6dbc6bad0d0281fc8cdf72d1) ) /* These four located on MEMEXT OBJ8 PCB daughter-card */ ROM_LOAD16_BYTE( "gn1obj0u.ic2", 0x000000, 0x200000, CRC(fcefc909) SHA1(48c19b6032096dd80777aa6d5eb5f90463095cbe) ) ROM_LOAD16_BYTE( "gn1obj1l.ic3", 0x400001, 0x200000, CRC(48468df7) SHA1(c5fb9082c84ac2ffceb6f5f4cbc1d40047c55e3d) ) ROM_LOAD16_BYTE( "gn1obj1u.ic4", 0x400000, 0x200000, CRC(3109a071) SHA1(4bb16df5a3aecdf37baf843edfc82952d46f5227) ) - ROM_REGION( 0x400000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x400000, "c123tmap", 0 ) ROM_LOAD( "gn1-chr0.8j", 0x000000, 0x100000, CRC(a5c61246) SHA1(d1d9f286b93b5b9880160029c53384d13c08dd8a) ) ROM_LOAD( "gn1-chr1.9j", 0x100000, 0x100000, CRC(c8c59772) SHA1(91de633a300e3b25a919579eaada5549640ab6f0) ) ROM_LOAD( "gn1-chr2.10j", 0x200000, 0x100000, CRC(dc96d999) SHA1(d006a401762b57fef6716f56eb3a7edcb3d3c00e) ) ROM_LOAD( "gn1-chr3.11j", 0x300000, 0x100000, CRC(4352c308) SHA1(785c13df219dceac2f940519141665b630a29f86) ) - ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) ROM_LOAD( "gn1-sha0.5m", 0, 0x80000, CRC(86d4ff85) SHA1(a71056b2bcbba50c834fe28269ebda9719df354a) ) ROM_REGION( 0x0800, "eeprom", 0 ) // default gun calibration and settings @@ -1304,7 +1266,7 @@ ROM_START( nebulray ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "nr1-voi0", 0, 0x200000, CRC(332d5e26) SHA1(9daddac3fbe0709e25ed8e0b456bac15bfae20d7) ) - ROM_REGION( 0x1000000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x1000000, "sprite", 0 ) ROM_LOAD16_BYTE( "nr1obj0u", 0x000000, 0x200000, CRC(fb82a881) SHA1(c9fa0728a37376a5c85bff1f6e8400c13ce15769) ) ROM_LOAD16_BYTE( "nr1obj0l", 0x000001, 0x200000, CRC(0e99ef46) SHA1(450fe61e448270b633f312361bd5ca89bb9684dd) ) ROM_LOAD16_BYTE( "nr1obj1u", 0x400000, 0x200000, CRC(49d9dbd7) SHA1(2dbd842c192d65888f931cdb5c9387127b1ab632) ) @@ -1314,13 +1276,13 @@ ROM_START( nebulray ) ROM_LOAD16_BYTE( "nr1obj3u", 0xc00000, 0x200000, CRC(d5918c9e) SHA1(530781fb44d7bbf01669bb265b658cb60e27bcd7) ) ROM_LOAD16_BYTE( "nr1obj3l", 0xc00001, 0x200000, CRC(c90d13ae) SHA1(675f7b8b3325aac91b2bae1cbebe274a65aedc43) ) - ROM_REGION( 0x400000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x400000, "c123tmap", 0 ) ROM_LOAD( "nr1-chr0", 0x000000, 0x100000,CRC(8d5b54ea) SHA1(616d5729f474da91da19a8246066280652da998c) ) ROM_LOAD( "nr1-chr1", 0x100000, 0x100000,CRC(cd21630c) SHA1(9974c0eb1051ca52f001e6631264a1936bb50620) ) ROM_LOAD( "nr1-chr2", 0x200000, 0x100000,CRC(70a11023) SHA1(bead486a86bd96c6fdfd2ea4d4d37c38bbe9bfbb) ) ROM_LOAD( "nr1-chr3", 0x300000, 0x100000,CRC(8f4b1d51) SHA1(b48fb2c8ccd9105a5b48be44dd3fe4309769efa4) ) - ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) ROM_LOAD( "nr1-sha0", 0, 0x80000,CRC(ca667e13) SHA1(685032603224cb81bcb85361921477caec570d5e) ) ROM_REGION( 0x20, "proms", 0 ) /* custom key data? */ @@ -1338,7 +1300,7 @@ ROM_START( nebulrayj ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "nr1-voi0", 0, 0x200000, CRC(332d5e26) SHA1(9daddac3fbe0709e25ed8e0b456bac15bfae20d7) ) - ROM_REGION( 0x1000000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x1000000, "sprite", 0 ) ROM_LOAD16_BYTE( "nr1obj0u", 0x000000, 0x200000, CRC(fb82a881) SHA1(c9fa0728a37376a5c85bff1f6e8400c13ce15769) ) ROM_LOAD16_BYTE( "nr1obj0l", 0x000001, 0x200000, CRC(0e99ef46) SHA1(450fe61e448270b633f312361bd5ca89bb9684dd) ) ROM_LOAD16_BYTE( "nr1obj1u", 0x400000, 0x200000, CRC(49d9dbd7) SHA1(2dbd842c192d65888f931cdb5c9387127b1ab632) ) @@ -1348,13 +1310,13 @@ ROM_START( nebulrayj ) ROM_LOAD16_BYTE( "nr1obj3u", 0xc00000, 0x200000, CRC(d5918c9e) SHA1(530781fb44d7bbf01669bb265b658cb60e27bcd7) ) ROM_LOAD16_BYTE( "nr1obj3l", 0xc00001, 0x200000, CRC(c90d13ae) SHA1(675f7b8b3325aac91b2bae1cbebe274a65aedc43) ) - ROM_REGION( 0x400000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x400000, "c123tmap", 0 ) ROM_LOAD( "nr1-chr0", 0x000000, 0x100000,CRC(8d5b54ea) SHA1(616d5729f474da91da19a8246066280652da998c) ) ROM_LOAD( "nr1-chr1", 0x100000, 0x100000,CRC(cd21630c) SHA1(9974c0eb1051ca52f001e6631264a1936bb50620) ) ROM_LOAD( "nr1-chr2", 0x200000, 0x100000,CRC(70a11023) SHA1(bead486a86bd96c6fdfd2ea4d4d37c38bbe9bfbb) ) ROM_LOAD( "nr1-chr3", 0x300000, 0x100000,CRC(8f4b1d51) SHA1(b48fb2c8ccd9105a5b48be44dd3fe4309769efa4) ) - ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) ROM_LOAD( "nr1-sha0", 0, 0x80000,CRC(ca667e13) SHA1(685032603224cb81bcb85361921477caec570d5e) ) ROM_REGION( 0x20, "proms", 0 ) /* custom key data? */ @@ -1372,17 +1334,17 @@ ROM_START( gslgr94u ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "gse-voi0.bin", 0, 0x200000, CRC(d3480574) SHA1(0c468ed060769b36b7e41cf4919cb6d8691d64f6) ) - ROM_REGION( 0x400000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x400000, "sprite", 0 ) ROM_LOAD16_BYTE( "gseobj0l.bin", 0x000001, 0x200000, CRC(531520ca) SHA1(2a1a5282549c6f7a37d5fb8c0b342edb9dc45315) ) ROM_LOAD16_BYTE( "gseobj0u.bin", 0x000000, 0x200000, CRC(fcc1283c) SHA1(fb44ed742f362e6737412cabf3f67d9506456a9e) ) - ROM_REGION( 0x400000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x400000, "c123tmap", 0 ) ROM_LOAD( "gse-chr0.bin", 0x000000, 0x100000, CRC(9314085d) SHA1(150e8ea908861337f9be2749aa7f9e1d52570586) ) ROM_LOAD( "gse-chr1.bin", 0x100000, 0x100000, CRC(c128a887) SHA1(4faf78064dd48ec50684a7dc8d120f8c5985bf2a) ) ROM_LOAD( "gse-chr2.bin", 0x200000, 0x100000, CRC(48f0a311) SHA1(e39adcce835542e64ca87f6019d4a85fcbe388c2) ) ROM_LOAD( "gse-chr3.bin", 0x300000, 0x100000, CRC(adbd1f88) SHA1(3c7bb1a9a398412bd3c98cadf8ce63a16e2bfed5) ) - ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) ROM_LOAD( "gse-sha0.bin", 0, 0x80000, CRC(6b2beabb) SHA1(815f7aef44735584edd4a9ca7e672471d07f225e) ) ROM_END @@ -1397,19 +1359,19 @@ ROM_START( gslgr94j ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "gs4voi0.5j", 0, 0x200000, CRC(c3053a90) SHA1(e76799b33b2457421255b03786bc24266d59c7dd) ) - ROM_REGION( 0x800000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x800000, "sprite", 0 ) ROM_LOAD16_BYTE( "gs4obj0l.bin", 0x000001, 0x200000, CRC(3b499da0) SHA1(91ad5f68dbda64dd07e1133eb09ee69da3da3103) ) ROM_LOAD16_BYTE( "gs4obj0u.bin", 0x000000, 0x200000, CRC(80016b50) SHA1(9f7604c196835d31894ba4db1de43d7d2614da84) ) ROM_LOAD16_BYTE( "gs4obj1l.bin", 0x400001, 0x200000, CRC(1f4847a7) SHA1(908e419e42fa8bd786cc3bc96d5ccb3a47c8e2dc) ) ROM_LOAD16_BYTE( "gs4obj1u.bin", 0x400000, 0x200000, CRC(49bc48cd) SHA1(6bcc41546f3bd609e3aa962e5ce3bf5bc6b9229a) ) - ROM_REGION( 0x400000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x400000, "c123tmap", 0 ) ROM_LOAD( "gs4chr0.8j", 0x000000, 0x100000, CRC(8c6c682e) SHA1(ecf21035d5af28299c9cdb98d5d811b4d52857b8) ) ROM_LOAD( "gs4chr1.9j", 0x100000, 0x100000, CRC(523989f7) SHA1(fae0e2f58e9a8d0ddc7297b567579849e24e0a40) ) ROM_LOAD( "gs4chr2.10j", 0x200000, 0x100000, CRC(37569559) SHA1(ce31673f51c6302f4fb4e4c377e6693a40874f81) ) ROM_LOAD( "gs4chr3.11j", 0x300000, 0x100000, CRC(73ca58f6) SHA1(44bdc943fb10dc53279662cd528169a27d57e478) ) - ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) ROM_LOAD( "gs4sha0.5m", 0, 0x80000, CRC(40e7e6a5) SHA1(70af76b6034e0d6e1b96bf54c973ab411e5907ab) ) ROM_END @@ -1549,17 +1511,17 @@ ROM_START( gslugrsj ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "gs1voi-0.5j", 0, 0x200000, CRC(6f8262aa) SHA1(beea98d9f8b927a572eb0bfcf678e9d6e40fc68d) ) - ROM_REGION( 0x400000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x400000, "sprite", 0 ) ROM_LOAD16_BYTE( "gs1obj-0.ic1", 0x000001, 0x200000, CRC(9a55238f) SHA1(fc3fd4b8b6322bbe343edbcad7815b597562266b) ) ROM_LOAD16_BYTE( "gs1obj-1.ic2", 0x000000, 0x200000, CRC(31c66f76) SHA1(8903e6586dff6f34a6ffca2d7c75343c0a5bff56) ) - ROM_REGION( 0x400000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x400000, "c123tmap", 0 ) ROM_LOAD( "gs1chr-0.8j", 0x000000, 0x100000, CRC(e7ced86a) SHA1(de90c2e3870b317431d3910f581660681b46ff9d) ) ROM_LOAD( "gs1chr-1.9j", 0x100000, 0x100000, CRC(1fe46749) SHA1(f4c0ea666d52cb1c8b1da93e7486ade5eae336cc) ) ROM_LOAD( "gs1chr-2.10j", 0x200000, 0x100000, CRC(f53afa20) SHA1(5c317e276ca2355e9737c1e8114dccbb5e11058a) ) ROM_LOAD( "gs1chr-3.11j", 0x300000, 0x100000, CRC(b149d7da) SHA1(d50c6258db0ccdd69b563e880d1711aae811fbe3) ) - ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) ROM_LOAD( "gs1sha-0.5m", 0, 0x80000, CRC(8a2832fe) SHA1(a1f54754fb01bbbc87274b1a0a4127fa9296ad1a) ) ROM_END @@ -1575,17 +1537,17 @@ ROM_START( sws95 ) ROM_LOAD( "ss51voi0.bin", 0, 0x200000, CRC(2740ec72) SHA1(9694a7378ea72771d2b1d43db6d74ed347ba27d3) ) - ROM_REGION( 0x400000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x400000, "sprite", 0 ) ROM_LOAD16_BYTE( "ss51ob0l.bin", 0x000001, 0x200000, CRC(e0395694) SHA1(e52045a7af4c4b0f9935695cfc5ff729bf9bd7c1) ) ROM_LOAD16_BYTE( "ss51ob0u.bin", 0x000000, 0x200000, CRC(b0745ca0) SHA1(579ea7fd7b9a181fd9d08c50c6c5941264aa0b6d) ) - ROM_REGION( 0x400000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x400000, "c123tmap", 0 ) ROM_LOAD( "ss51chr0.bin", 0x000000, 0x100000, CRC(86dd3280) SHA1(07ba6d3edc5c38bf82ddaf8f6de7ef0f5d0788b2) ) ROM_LOAD( "ss51chr1.bin", 0x100000, 0x100000, CRC(2ba0fb9e) SHA1(39ceddad7bc0073b361eb776762002a9fc61b337) ) ROM_LOAD( "ss51chr2.bin", 0x200000, 0x100000, CRC(ca0e6c1a) SHA1(1221cd30894e97e2f7d456509c7b6732ec3d06a5) ) ROM_LOAD( "ss51chr3.bin", 0x300000, 0x100000, CRC(73ca58f6) SHA1(44bdc943fb10dc53279662cd528169a27d57e478) ) - ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) ROM_LOAD( "ss51sha0.bin", 0, 0x80000, CRC(3bf4d081) SHA1(7b07b86f753ea6bcd90eb7d152c12884a6fe785a) ) ROM_END @@ -1600,17 +1562,17 @@ ROM_START( sws96 ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "ss61voi0.bin", 0, 0x200000, CRC(2740ec72) SHA1(9694a7378ea72771d2b1d43db6d74ed347ba27d3) ) - ROM_REGION( 0x400000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x400000, "sprite", 0 ) ROM_LOAD16_BYTE( "ss61ob0l.bin", 0x000001, 0x200000, CRC(579b19d4) SHA1(7f18097c683d2b1c532f54ee514dd499f5965165) ) ROM_LOAD16_BYTE( "ss61ob0u.bin", 0x000000, 0x200000, CRC(a69bbd9e) SHA1(8f4c44e2caa31d25433a04c19c51904ec9461e2f) ) - ROM_REGION( 0x400000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x400000, "c123tmap", 0 ) ROM_LOAD( "ss61chr0.bin", 0x000000, 0x100000, CRC(9d2ae07b) SHA1(7d268f6c7d8145c913f80049369ae3106d69e939) ) ROM_LOAD( "ss61chr1.bin", 0x100000, 0x100000, CRC(4dc75da6) SHA1(a29932b4fb39648e2c02df668f46cafb80c53619) ) ROM_LOAD( "ss61chr2.bin", 0x200000, 0x100000, CRC(1240704b) SHA1(a24281681053cc6649f00ec5a31c7249101eaee1) ) ROM_LOAD( "ss61chr3.bin", 0x300000, 0x100000, CRC(066581d4) SHA1(999cd478d9da452bb57793cd276c6c0d87e2825e) ) - ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) ROM_LOAD( "ss61sha0.bin", 0, 0x80000, CRC(fceaa19c) SHA1(c9303a755ac7af19c4804a264d1a09d987f39e74) ) ROM_END @@ -1625,17 +1587,17 @@ ROM_START( sws97 ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "ss71voi0.bin", 0, 0x200000, CRC(2740ec72) SHA1(9694a7378ea72771d2b1d43db6d74ed347ba27d3) ) - ROM_REGION( 0x400000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x400000, "sprite", 0 ) ROM_LOAD16_BYTE( "ss71ob0l.bin", 0x000001, 0x200000, CRC(9559ad44) SHA1(fd56a8620f6958cc090f783d74cb38bba46d2423) ) ROM_LOAD16_BYTE( "ss71ob0u.bin", 0x000000, 0x200000, CRC(4df4a722) SHA1(07eb94628ceeb7cbce2d39d479f33c37583a346a) ) - ROM_REGION( 0x400000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x400000, "c123tmap", 0 ) ROM_LOAD( "ss71chr0.bin", 0x000000, 0x100000, CRC(bd606356) SHA1(a62c55600e46f8821db0b84d79fc2588742ad7ad) ) ROM_LOAD( "ss71chr1.bin", 0x100000, 0x100000, CRC(4dc75da6) SHA1(a29932b4fb39648e2c02df668f46cafb80c53619) ) ROM_LOAD( "ss71chr2.bin", 0x200000, 0x100000, CRC(1240704b) SHA1(a24281681053cc6649f00ec5a31c7249101eaee1) ) ROM_LOAD( "ss71chr3.bin", 0x300000, 0x100000, CRC(066581d4) SHA1(999cd478d9da452bb57793cd276c6c0d87e2825e) ) - ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) ROM_LOAD( "ss71sha0.bin", 0, 0x80000, CRC(be8c2758) SHA1(0a1b6c03cdaec6103ae8483b67faf3840234f825) ) ROM_END @@ -1650,19 +1612,19 @@ ROM_START( vshoot ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "vsjvoi-0.5j", 0, 0x200000, CRC(0528c9ed) SHA1(52b67978fdeb97b77065575774a7ddeb49fe1d81) ) - ROM_REGION( 0x800000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x800000, "sprite", 0 ) ROM_LOAD16_BYTE( "vsjobj0l.ic1", 0x000001, 0x200000, CRC(e134faa7) SHA1(a844c8a5bd6d8907f9e5c7ba9e2ee8e9a886cd1e) ) /* These four located on MEMEXT OBJ8 PCB daughter-card */ ROM_LOAD16_BYTE( "vsjobj0u.ic2", 0x000000, 0x200000, CRC(974d0714) SHA1(976050eaf82d4b66e13c1c579e5521eb867527fb) ) ROM_LOAD16_BYTE( "vsjobj1l.ic3", 0x400001, 0x200000, CRC(ba46f967) SHA1(ddfb0ac7fba7369869e4df9a66d465a662eba2e6) ) ROM_LOAD16_BYTE( "vsjobj1u.ic4", 0x400000, 0x200000, CRC(09da7e9c) SHA1(e98e07a886a4fe369748fc97f3cee6a4bb668385) ) - ROM_REGION( 0x400000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x400000, "c123tmap", 0 ) ROM_LOAD( "vsjchr-0.8j", 0x000000, 0x100000, CRC(2af8ba7c) SHA1(74f5a382425974a9b2167bb01672dd13dea882f5) ) ROM_LOAD( "vsjchr-1.9j", 0x100000, 0x100000, CRC(b789d53e) SHA1(48b4cf956f9025e3c2b6f59b317596dfe0b6b142) ) ROM_LOAD( "vsjchr-2.10j", 0x200000, 0x100000, CRC(7ef80758) SHA1(c7e6d14f0823607dfd8a13ea6f164ffa85b5563e) ) ROM_LOAD( "vsjchr-3.11j", 0x300000, 0x100000, CRC(73ca58f6) SHA1(44bdc943fb10dc53279662cd528169a27d57e478) ) - ROM_REGION( 0x80000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x80000, "c123tmap:mask", 0 ) ROM_LOAD( "vsjsha-0.5m", 0, 0x80000, CRC(78335ea4) SHA1(d4b9f179b1b456a866354ea308664c036de6414d) ) ROM_END @@ -1835,13 +1797,13 @@ ROM_START( outfxies ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "ou1voi0.6n", 0, 0x200000, CRC(2d8fb271) SHA1(bde9d45979728f5a2cd8ec89f5f81bf16b694cc2) ) - ROM_REGION( 0x200000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x200000, "c123tmap:mask", 0 ) ROM_LOAD( "ou1shas.12s", 0, 0x200000,CRC(9bcb0397) SHA1(54a32b6394d0e6f51bfd281f8a4bafce6ddf6246) ) - ROM_REGION( 0x200000, NAMCONB1_ROTMASKREGION, 0 ) + ROM_REGION( 0x200000, "c169roz:mask", 0 ) ROM_LOAD( "ou1shar.18s", 0, 0x200000, CRC(fbb48194) SHA1(2d3ec5bc519fad2b755018f83fadfe0cba13c292) ) - ROM_REGION( 0x2000000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x2000000, "sprite", 0 ) ROM_LOAD16_BYTE( "ou1obj0l.4c", 0x0000001, 0x200000, CRC(1b4f7184) SHA1(a05d67842fce92f321d1fdd3bd30aa3427775a0c) ) ROM_LOAD16_BYTE( "ou1obj0u.8c", 0x0000000, 0x200000, CRC(d0a69794) SHA1(07d449e54e9971abeb9cd5bb7b372270fafa8bac) ) ROM_LOAD16_BYTE( "ou1obj1l.4b", 0x0400001, 0x200000, CRC(48a93e84) SHA1(6935ec161a12237d4cec732d42070f381c23b47c) ) @@ -1853,12 +1815,12 @@ ROM_START( outfxies ) ROM_LOAD16_BYTE( "ou1obj4l.6b", 0x1000001, 0x200000, CRC(99a5f9d7) SHA1(b0f46f4ac357918137031a19c36a56a47b7aefd6) ) ROM_LOAD16_BYTE( "ou1obj4u.9b", 0x1000000, 0x200000, CRC(70ecaabb) SHA1(521c6849526fb271e6447f6c4f5bfa081f96b91e) ) - ROM_REGION( 0x600000, NAMCONB1_ROTGFXREGION, 0 ) + ROM_REGION( 0x600000, "c169roz", 0 ) ROM_LOAD( "ou1-rot0.3d", 0x000000, 0x200000, CRC(a50c67c8) SHA1(432b8451eb9eaa3078134fce1e5e2d58a8b64be3) ) ROM_LOAD( "ou1-rot1.3c", 0x200000, 0x200000, CRC(14866780) SHA1(4a54151fada4dfba7232e53e40623e5697eeb7db) ) ROM_LOAD( "ou1-rot2.3b", 0x400000, 0x200000, CRC(55ccf3af) SHA1(d98489aaa840cbffb21c47609961c1163b0336f3) ) - ROM_REGION( 0x200000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x200000, "c123tmap", 0 ) ROM_LOAD( "ou1-scr0.1d", 0x000000, 0x200000, CRC(b3b3f2e9) SHA1(541bd7e9ba12aff4ec4033bd9c6bb19476acb3c4) ) ROM_REGION32_BE( 0x100000, "data", 0 ) @@ -1877,13 +1839,13 @@ ROM_START( outfxiesj ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "ou1voi0.6n", 0, 0x200000, CRC(2d8fb271) SHA1(bde9d45979728f5a2cd8ec89f5f81bf16b694cc2) ) - ROM_REGION( 0x200000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x200000, "c123tmap:mask", 0 ) ROM_LOAD( "ou1shas.12s", 0, 0x200000,CRC(9bcb0397) SHA1(54a32b6394d0e6f51bfd281f8a4bafce6ddf6246) ) - ROM_REGION( 0x200000, NAMCONB1_ROTMASKREGION, 0 ) + ROM_REGION( 0x200000, "c169roz:mask", 0 ) ROM_LOAD( "ou1shar.18s", 0, 0x200000, CRC(fbb48194) SHA1(2d3ec5bc519fad2b755018f83fadfe0cba13c292) ) - ROM_REGION( 0x2000000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x2000000, "sprite", 0 ) ROM_LOAD16_BYTE( "ou1obj0l.4c", 0x0000001, 0x200000, CRC(1b4f7184) SHA1(a05d67842fce92f321d1fdd3bd30aa3427775a0c) ) ROM_LOAD16_BYTE( "ou1obj0u.8c", 0x0000000, 0x200000, CRC(d0a69794) SHA1(07d449e54e9971abeb9cd5bb7b372270fafa8bac) ) ROM_LOAD16_BYTE( "ou1obj1l.4b", 0x0400001, 0x200000, CRC(48a93e84) SHA1(6935ec161a12237d4cec732d42070f381c23b47c) ) @@ -1895,12 +1857,12 @@ ROM_START( outfxiesj ) ROM_LOAD16_BYTE( "ou1obj4l.6b", 0x1000001, 0x200000, CRC(99a5f9d7) SHA1(b0f46f4ac357918137031a19c36a56a47b7aefd6) ) ROM_LOAD16_BYTE( "ou1obj4u.9b", 0x1000000, 0x200000, CRC(70ecaabb) SHA1(521c6849526fb271e6447f6c4f5bfa081f96b91e) ) - ROM_REGION( 0x600000, NAMCONB1_ROTGFXREGION, 0 ) + ROM_REGION( 0x600000, "c169roz", 0 ) ROM_LOAD( "ou1-rot0.3d", 0x000000, 0x200000, CRC(a50c67c8) SHA1(432b8451eb9eaa3078134fce1e5e2d58a8b64be3) ) ROM_LOAD( "ou1-rot1.3c", 0x200000, 0x200000, CRC(14866780) SHA1(4a54151fada4dfba7232e53e40623e5697eeb7db) ) ROM_LOAD( "ou1-rot2.3b", 0x400000, 0x200000, CRC(55ccf3af) SHA1(d98489aaa840cbffb21c47609961c1163b0336f3) ) - ROM_REGION( 0x200000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x200000, "c123tmap", 0 ) ROM_LOAD( "ou1-scr0.1d", 0x000000, 0x200000, CRC(b3b3f2e9) SHA1(541bd7e9ba12aff4ec4033bd9c6bb19476acb3c4) ) ROM_REGION32_BE( 0x100000, "data", 0 ) @@ -1923,13 +1885,13 @@ ROM_START( machbrkr ) /* Defaults to Asia / 4 Player cabinet */ ROM_LOAD( "mb1_voi1.6p", 0x800000, 0x200000, CRC(7e1c2603) SHA1(533098a54fb897931f1d75be9e69a5c047e4c446) ) ROM_RELOAD( 0xc00000, 0x200000) - ROM_REGION( 0x200000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x200000, "c123tmap:mask", 0 ) ROM_LOAD( "mb1_shas.12s", 0, 0x100000, CRC(c51c614b) SHA1(519ecad2e4543c05ec35a727f4c875ab006291af) ) - ROM_REGION( 0x200000, NAMCONB1_ROTMASKREGION, 0 ) + ROM_REGION( 0x200000, "c169roz:mask", 0 ) ROM_LOAD( "mb1_shar.18s", 0, 0x080000, CRC(d9329b10) SHA1(149c8804c07350f47af36bc7902371f1dfbed272) ) - ROM_REGION( 0x2000000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x2000000, "sprite", 0 ) ROM_LOAD16_BYTE( "mb1obj0l.4c", 0x0000001, 0x200000, CRC(056e6b1c) SHA1(44e49de80c925c8fbe04bf9328a77a50a305a5a7) ) ROM_LOAD16_BYTE( "mb1obj0u.8c", 0x0000000, 0x200000, CRC(e19b1714) SHA1(ff43bf3c8e8698934c4057c7b4c72db73929e2af) ) ROM_LOAD16_BYTE( "mb1obj1l.4b", 0x0400001, 0x200000, CRC(af69f7f1) SHA1(414544ec1a9aaffb751beaf63d937ce78d0cf9c6) ) @@ -1941,11 +1903,11 @@ ROM_START( machbrkr ) /* Defaults to Asia / 4 Player cabinet */ ROM_LOAD16_BYTE( "mb1obj4l.6b", 0x1000001, 0x200000, CRC(a650b05e) SHA1(b247699433c7bf4b6ae990fc06255cfd48a248dd) ) ROM_LOAD16_BYTE( "mb1obj4u.9b", 0x1000000, 0x200000, CRC(6d0c37e9) SHA1(3a3feb74b890e0a933dcc791e5eee1fb4bdcbb69) ) - ROM_REGION( 0x400000, NAMCONB1_ROTGFXREGION, 0 ) + ROM_REGION( 0x400000, "c169roz", 0 ) ROM_LOAD( "mb1_rot0.3d", 0x000000, 0x200000, CRC(bc353630) SHA1(2bbddda632298899716394ddcfe51412576ca74a) ) ROM_LOAD( "mb1_rot1.3c", 0x200000, 0x200000, CRC(cf7688cb) SHA1(29a040ce2c4e3bf671cff1a7a1ade06103db236a) ) - ROM_REGION( 0x600000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x600000, "c123tmap", 0 ) ROM_LOAD( "mb1_scr0.1d", 0x000000, 0x200000, CRC(c678d5f3) SHA1(98d1523bef50d444be9485c4e7f6932cccbea191) ) ROM_LOAD( "mb1_scr1.1c", 0x200000, 0x200000, CRC(fb2b1939) SHA1(bf9d7b93205e7012aa86693f3d2ba8f4d729bc97) ) ROM_LOAD( "mb1_scr2.1b", 0x400000, 0x200000, CRC(0e6097a5) SHA1(b6c64b3e34ba913138b6b7c3d99d2be4f3ceda08) ) @@ -1969,13 +1931,13 @@ ROM_START( machbrkrj ) ROM_LOAD( "mb1_voi1.6p", 0x800000, 0x200000, CRC(7e1c2603) SHA1(533098a54fb897931f1d75be9e69a5c047e4c446) ) ROM_RELOAD( 0xc00000, 0x200000) - ROM_REGION( 0x200000, NAMCONB1_TILEMASKREGION, 0 ) + ROM_REGION( 0x200000, "c123tmap:mask", 0 ) ROM_LOAD( "mb1_shas.12s", 0, 0x100000, CRC(c51c614b) SHA1(519ecad2e4543c05ec35a727f4c875ab006291af) ) - ROM_REGION( 0x200000, NAMCONB1_ROTMASKREGION, 0 ) + ROM_REGION( 0x200000, "c169roz:mask", 0 ) ROM_LOAD( "mb1_shar.18s", 0, 0x080000, CRC(d9329b10) SHA1(149c8804c07350f47af36bc7902371f1dfbed272) ) - ROM_REGION( 0x2000000, NAMCONB1_SPRITEGFXREGION, 0 ) + ROM_REGION( 0x2000000, "sprite", 0 ) ROM_LOAD16_BYTE( "mb1obj0l.4c", 0x0000001, 0x200000, CRC(056e6b1c) SHA1(44e49de80c925c8fbe04bf9328a77a50a305a5a7) ) ROM_LOAD16_BYTE( "mb1obj0u.8c", 0x0000000, 0x200000, CRC(e19b1714) SHA1(ff43bf3c8e8698934c4057c7b4c72db73929e2af) ) ROM_LOAD16_BYTE( "mb1obj1l.4b", 0x0400001, 0x200000, CRC(af69f7f1) SHA1(414544ec1a9aaffb751beaf63d937ce78d0cf9c6) ) @@ -1987,11 +1949,11 @@ ROM_START( machbrkrj ) ROM_LOAD16_BYTE( "mb1obj4l.6b", 0x1000001, 0x200000, CRC(a650b05e) SHA1(b247699433c7bf4b6ae990fc06255cfd48a248dd) ) ROM_LOAD16_BYTE( "mb1obj4u.9b", 0x1000000, 0x200000, CRC(6d0c37e9) SHA1(3a3feb74b890e0a933dcc791e5eee1fb4bdcbb69) ) - ROM_REGION( 0x400000, NAMCONB1_ROTGFXREGION, 0 ) + ROM_REGION( 0x400000, "c169roz", 0 ) ROM_LOAD( "mb1_rot0.3d", 0x000000, 0x200000, CRC(bc353630) SHA1(2bbddda632298899716394ddcfe51412576ca74a) ) ROM_LOAD( "mb1_rot1.3c", 0x200000, 0x200000, CRC(cf7688cb) SHA1(29a040ce2c4e3bf671cff1a7a1ade06103db236a) ) - ROM_REGION( 0x600000, NAMCONB1_TILEGFXREGION, 0 ) + ROM_REGION( 0x600000, "c123tmap", 0 ) ROM_LOAD( "mb1_scr0.1d", 0x000000, 0x200000, CRC(c678d5f3) SHA1(98d1523bef50d444be9485c4e7f6932cccbea191) ) ROM_LOAD( "mb1_scr1.1c", 0x200000, 0x200000, CRC(fb2b1939) SHA1(bf9d7b93205e7012aa86693f3d2ba8f4d729bc97) ) ROM_LOAD( "mb1_scr2.1b", 0x400000, 0x200000, CRC(0e6097a5) SHA1(b6c64b3e34ba913138b6b7c3d99d2be4f3ceda08) ) diff --git a/src/mame/drivers/namcond1.cpp b/src/mame/drivers/namcond1.cpp index 35080d4ef00..4c55d5e3f25 100644 --- a/src/mame/drivers/namcond1.cpp +++ b/src/mame/drivers/namcond1.cpp @@ -10,9 +10,14 @@ Walter Fath abcheck TODOs: - - YGV608 brokenness + - GFX rom banking is a mystery (bad ROMs? Encryption?) - Where is the extra data ROM mapped? + gynotai TODOs: + - printer (disable it in service mode); + - ball sensors aren't understood; + - Seems to dislike our YGV608 row/colscroll handling; + To make abcheck run when the EEPROM is clear: - F2 to enter service mode - Player 3 A/B to navigate to GAME OPTIONS @@ -264,6 +269,20 @@ static INPUT_PORTS_START( namcond1 ) PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED ) INPUT_PORTS_END +static INPUT_PORTS_START( gynotai ) + PORT_INCLUDE( namcond1 ) + + PORT_MODIFY("P1_P2") + // TODO: these are presumably ball sensors + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Left 1") + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Left 2") + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Center 1") + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Center 2") + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Right 1") + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Right 2") + PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNUSED ) +INPUT_PORTS_END + static INPUT_PORTS_START( abcheck ) PORT_INCLUDE( namcond1 ) @@ -404,93 +423,125 @@ MACHINE_CONFIG_START(namcond1_state::abcheck) MACHINE_CONFIG_END ROM_START( ncv1 ) - ROM_REGION( 0x100000,"maincpu", 0 ) /* 16MB for Main CPU */ + ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */ ROM_LOAD16_WORD( "nc2main0.14d", 0x00000, 0x80000, CRC(4ffc530b) SHA1(23d622d0261a3584236a77b2cefa522a0f46490e) ) ROM_LOAD16_WORD( "nc2main1.13d", 0x80000, 0x80000, CRC(26499a4e) SHA1(4af0c365713b4a51da684a3423b07cbb70d9599b) ) - ROM_REGION( 0x80000,"mcu", 0 ) /* sub CPU */ + ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */ ROM_LOAD( "nc1sub.1c", 0x00000, 0x80000, CRC(48ea0de2) SHA1(33e57c8d084a960ccbda462d18e355de44ec7ad9) ) - ROM_REGION( 0x200000,"ygv608", 0 ) /* 2MB character generator */ + ROM_REGION( 0x800000, "ygv608", 0 ) /* 2MB character generator */ ROM_LOAD( "nc1cg0.10c", 0x000000, 0x200000, CRC(355e7f29) SHA1(47d92c4e28c3610a620d3c9b3be558199477f6d8) ) + ROM_RELOAD( 0x200000, 0x200000 ) + ROM_RELOAD( 0x400000, 0x200000 ) + ROM_RELOAD( 0x600000, 0x200000 ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x200000, "c352", 0 ) // Samples ROM_LOAD( "nc1voice.7b", 0x000000, 0x200000, CRC(91c85bd6) SHA1(c2af8b1518b2b601f2b14c3f327e7e3eae9e29fc) ) ROM_END ROM_START( ncv1j ) - ROM_REGION( 0x100000,"maincpu", 0 ) /* 16MB for Main CPU */ + ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */ ROM_LOAD16_WORD( "nc1main0.14d", 0x00000, 0x80000, CRC(48ce0b2b) SHA1(07dfca8ba935ee0151211f9eb4d453f2da1d4bd7) ) ROM_LOAD16_WORD( "nc1main1.13d", 0x80000, 0x80000, CRC(49f99235) SHA1(97afde7f7dddd8538de78a74325d0038cb1217f7) ) - ROM_REGION( 0x80000,"mcu", 0 ) /* sub CPU */ + ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */ ROM_LOAD( "nc1sub.1c", 0x00000, 0x80000, CRC(48ea0de2) SHA1(33e57c8d084a960ccbda462d18e355de44ec7ad9) ) - ROM_REGION( 0x200000,"ygv608", 0 ) /* 2MB character generator */ + ROM_REGION( 0x800000, "ygv608", 0 ) /* 2MB character generator */ ROM_LOAD( "nc1cg0.10c", 0x000000, 0x200000, CRC(355e7f29) SHA1(47d92c4e28c3610a620d3c9b3be558199477f6d8) ) + ROM_RELOAD( 0x200000, 0x200000 ) + ROM_RELOAD( 0x400000, 0x200000 ) + ROM_RELOAD( 0x600000, 0x200000 ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x200000, "c352", 0 ) // Samples ROM_LOAD( "nc1voice.7b", 0x000000, 0x200000, CRC(91c85bd6) SHA1(c2af8b1518b2b601f2b14c3f327e7e3eae9e29fc) ) ROM_END ROM_START( ncv1j2 ) - ROM_REGION( 0x100000,"maincpu", 0 ) /* 16MB for Main CPU */ + ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */ ROM_LOAD16_WORD( "nc1main0b.14d", 0x00000, 0x80000, CRC(7207469d) SHA1(73faf1973a57c1bc2163e9ee3fe2febd3b8763a4) ) ROM_LOAD16_WORD( "nc1main1b.13d", 0x80000, 0x80000, CRC(52401b17) SHA1(60c9f20831d0101c02dafbc0bd15422f71f3ad81) ) - ROM_REGION( 0x80000,"mcu", 0 ) /* sub CPU */ + ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */ ROM_LOAD( "nc1sub.1c", 0x00000, 0x80000, CRC(48ea0de2) SHA1(33e57c8d084a960ccbda462d18e355de44ec7ad9) ) - ROM_REGION( 0x200000,"ygv608", 0 ) /* 2MB character generator */ + ROM_REGION( 0x800000, "ygv608", 0 ) /* 2MB character generator */ ROM_LOAD( "nc1cg0.10c", 0x000000, 0x200000, CRC(355e7f29) SHA1(47d92c4e28c3610a620d3c9b3be558199477f6d8) ) + ROM_RELOAD( 0x200000, 0x200000 ) + ROM_RELOAD( 0x400000, 0x200000 ) + ROM_RELOAD( 0x600000, 0x200000 ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x200000, "c352", 0 ) // Samples ROM_LOAD( "nc1voice.7b", 0x000000, 0x200000, CRC(91c85bd6) SHA1(c2af8b1518b2b601f2b14c3f327e7e3eae9e29fc) ) ROM_END ROM_START( ncv2 ) - ROM_REGION( 0x100000,"maincpu", 0 ) /* 16MB for Main CPU */ + ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */ ROM_LOAD16_WORD( "ncs2main0.14e", 0x00000, 0x80000, CRC(fb8a4123) SHA1(47acdfe9b5441d0e3649aaa9780e676f760c4e42) ) ROM_LOAD16_WORD( "ncs2main1.13e", 0x80000, 0x80000, CRC(7a5ef23b) SHA1(0408742424a6abad512b5baff63409fe44353e10) ) - ROM_REGION( 0x80000,"mcu", 0 ) /* sub CPU */ + ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */ ROM_LOAD( "ncs1sub.1d", 0x00000, 0x80000, CRC(365cadbf) SHA1(7263220e1630239e3e88b828c00389d02628bd7d) ) - ROM_REGION( 0x400000,"ygv608", 0 ) /* 4MB character generator */ + ROM_REGION( 0x800000, "ygv608", 0 ) /* 4MB character generator */ ROM_LOAD( "ncs1cg0.10e", 0x000000, 0x200000, CRC(fdd24dbe) SHA1(4dceaae3d853075f58a7408be879afc91d80292e) ) - ROM_LOAD( "ncs1cg1.10e", 0x200000, 0x200000, CRC(007b19de) SHA1(d3c093543511ec1dd2f8be6db45f33820123cabc) ) + ROM_RELOAD( 0x200000, 0x200000 ) + ROM_LOAD( "ncs1cg1.10f", 0x400000, 0x200000, CRC(007b19de) SHA1(d3c093543511ec1dd2f8be6db45f33820123cabc) ) + ROM_RELOAD( 0x600000, 0x200000 ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x200000, "c352", 0 ) // Samples ROM_LOAD( "ncs1voic.7c", 0x000000, 0x200000, CRC(ed05fd88) SHA1(ad88632c89a9946708fc6b4c9247e1bae9b2944b) ) ROM_END ROM_START( ncv2j ) - ROM_REGION( 0x100000,"maincpu", 0 ) /* 16MB for Main CPU */ + ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */ ROM_LOAD16_WORD( "ncs1main0.14e", 0x00000, 0x80000, CRC(99991192) SHA1(e0b0e15ae23560b77119b3d3e4b2d2bb9d8b36c9) ) ROM_LOAD16_WORD( "ncs1main1.13e", 0x80000, 0x80000, CRC(af4ba4f6) SHA1(ff5adfdd462cfd3f17fbe2401dfc88ff8c71b6f8) ) - ROM_REGION( 0x80000,"mcu", 0 ) /* sub CPU */ + ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */ ROM_LOAD("ncs1sub.1d", 0x00000, 0x80000, CRC(365cadbf) SHA1(7263220e1630239e3e88b828c00389d02628bd7d) ) - ROM_REGION( 0x400000,"ygv608", 0 ) /* 4MB character generator */ + ROM_REGION( 0x800000, "ygv608", 0 ) /* 4MB character generator */ ROM_LOAD( "ncs1cg0.10e", 0x000000, 0x200000, CRC(fdd24dbe) SHA1(4dceaae3d853075f58a7408be879afc91d80292e) ) - ROM_LOAD( "ncs1cg1.10e", 0x200000, 0x200000, CRC(007b19de) SHA1(d3c093543511ec1dd2f8be6db45f33820123cabc) ) + ROM_RELOAD( 0x200000, 0x200000 ) + ROM_LOAD( "ncs1cg1.10f", 0x400000, 0x200000, CRC(007b19de) SHA1(d3c093543511ec1dd2f8be6db45f33820123cabc) ) + ROM_RELOAD( 0x600000, 0x200000 ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "ncs1voic.7c", 0x000000, 0x200000, CRC(ed05fd88) SHA1(ad88632c89a9946708fc6b4c9247e1bae9b2944b) ) ROM_END +ROM_START( gynotai ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */ + ROM_LOAD( "gy1main0.14e", 0x000000, 0x080000, CRC(1421dbf5) SHA1(7e4322cddc3317c9ed82a97c0fe387ce1364cf9b) ) + ROM_LOAD( "gy1main1.13e", 0x080000, 0x080000, CRC(dc10a4a7) SHA1(01a6b5aae8599de9015d6e332f5bd286bc84c807) ) + + ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */ + ROM_LOAD( "gy1sub0.1d", 0x000000, 0x080000, CRC(fd31e963) SHA1(b658921dd29cfad0c366465ae37a356c3d2fb4d3) ) + + ROM_REGION( 0x800000, "ygv608", 0 ) /* 8MB character generator */ + ROM_LOAD( "gy1cg0.10e", 0x000000, 0x400000, CRC(938c7912) SHA1(36278a945a00e1549ae55ec65a9b4001537023b0) ) + ROM_LOAD( "gy1cg1.10f", 0x400000, 0x400000, CRC(5a518733) SHA1(b6ea91629bc6ddf67c47c4189084aa947f4e31ed) ) + + ROM_REGION( 0x200000, "c352", 0 ) // Samples + ROM_LOAD( "gy1voic.7c", 0x000000, 0x200000, CRC(f135e79b) SHA1(01ce3e3b366d0b9045ad8599b60ca33c6d21f150) ) +ROM_END + ROM_START( abcheck ) - ROM_REGION( 0x100000,"maincpu", 0 ) /* 16MB for Main CPU */ + ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */ ROM_LOAD( "an1main0b.14e", 0x000000, 0x080000, CRC(f1b9777d) SHA1(b28f4106e1e145dc1aaa5af455b6f991d2b04c59) ) ROM_LOAD( "an1main1b.13e", 0x080000, 0x080000, CRC(d40ccdcc) SHA1(05f864d84bf34a1722c598378ed8d27fba00f575) ) - ROM_REGION( 0x80000,"mcu", 0 ) /* sub CPU */ + ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */ ROM_LOAD( "an1sub.1d", 0x000000, 0x080000, CRC(50de9130) SHA1(470b3977f4bf12ca65bc42631ccdf81753ef56fd) ) - ROM_REGION( 0x400000,"ygv608", 0 ) /* 4MB character generator */ - ROM_LOAD( "an1cg0.10e", 0x000000, 0x200000, CRC(6dae0531) SHA1(2f4a4a22d461eb9a5bb88bdfccc3aff44cd3faee) ) - ROM_LOAD( "an1cg1.10f", 0x200000, 0x200000, CRC(8485607a) SHA1(1b9a1950c6db61a2b546fe2f5e56333593e93fb4) ) + ROM_REGION( 0x800000, "ygv608", 0 ) /* 4MB character generator */ + // TODO: gynotai proves these might be underdumped, please check. + ROM_LOAD( "an1cg0.10e", 0x000000, 0x200000, BAD_DUMP CRC(6dae0531) SHA1(2f4a4a22d461eb9a5bb88bdfccc3aff44cd3faee) ) + ROM_RELOAD( 0x200000, 0x200000 ) + ROM_LOAD( "an1cg1.10f", 0x400000, 0x200000, BAD_DUMP CRC(8485607a) SHA1(1b9a1950c6db61a2b546fe2f5e56333593e93fb4) ) + ROM_RELOAD( 0x600000, 0x200000 ) ROM_REGION( 0x1000000, "c352", 0 ) // Samples ROM_LOAD( "an1voice.7c", 0x000000, 0x200000, CRC(d2bfa453) SHA1(6b7d6bb4d65290d8fd3df5d12b41ae7dce5f3f1c) ) @@ -512,9 +563,12 @@ ROM_START( abcheck ) ROM_LOAD( "npg1624lc.u4", 0x020000, 0x200000, CRC(7e00254f) SHA1(b0fa8f979e8322d71f842de5358ae2a2e36386f7) ) ROM_END -GAME( 1995, ncv1, 0, namcond1, namcond1, namcond1_state, empty_init, ROT90, "Namco", "Namco Classic Collection Vol.1", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) + +// fwiw it looks like version numbering at POST is for the ND1 framework build the games are based on. +GAME( 1995, ncv1, 0, namcond1, namcond1, namcond1_state, empty_init, ROT90, "Namco", "Namco Classic Collection Vol.1", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) // 1.00 GAME( 1995, ncv1j, ncv1, namcond1, namcond1, namcond1_state, empty_init, ROT90, "Namco", "Namco Classic Collection Vol.1 (Japan, v1.00)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1995, ncv1j2, ncv1, namcond1, namcond1, namcond1_state, empty_init, ROT90, "Namco", "Namco Classic Collection Vol.1 (Japan, v1.03)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1996, ncv2, 0, namcond1, namcond1, namcond1_state, empty_init, ROT90, "Namco", "Namco Classic Collection Vol.2", MACHINE_IMPERFECT_GRAPHICS | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE ) +GAME( 1995, ncv1j2, ncv1, namcond1, namcond1, namcond1_state, empty_init, ROT90, "Namco", "Namco Classic Collection Vol.1 (Japan, v1.03)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) // 1.03 +GAME( 1996, gynotai, 0, namcond1, gynotai, namcond1_state, empty_init, ROT0, "Namco", "Gynotai (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING | MACHINE_NODEVICE_PRINTER | MACHINE_MECHANICAL | MACHINE_SUPPORTS_SAVE ) // 1.04 +GAME( 1996, ncv2, 0, namcond1, namcond1, namcond1_state, empty_init, ROT90, "Namco", "Namco Classic Collection Vol.2", MACHINE_IMPERFECT_GRAPHICS | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE ) // 1.10 GAME( 1996, ncv2j, ncv2, namcond1, namcond1, namcond1_state, empty_init, ROT90, "Namco", "Namco Classic Collection Vol.2 (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE ) -GAME( 1996, abcheck, 0, abcheck, abcheck, namcond1_state, empty_init, ROT0, "Namco", "Abnormal Check", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS | MACHINE_UNEMULATED_PROTECTION | MACHINE_NODEVICE_PRINTER | MACHINE_SUPPORTS_SAVE ) +GAME( 1996, abcheck, 0, abcheck, abcheck, namcond1_state, empty_init, ROT0, "Namco", "Abnormal Check", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS | MACHINE_UNEMULATED_PROTECTION | MACHINE_NODEVICE_PRINTER | MACHINE_SUPPORTS_SAVE ) // 1.20EM diff --git a/src/mame/drivers/namcos1.cpp b/src/mame/drivers/namcos1.cpp index 7af3d0a242a..84350e620fe 100644 --- a/src/mame/drivers/namcos1.cpp +++ b/src/mame/drivers/namcos1.cpp @@ -1065,15 +1065,12 @@ MACHINE_CONFIG_START(namcos1_state::ns1) MCFG_SCREEN_RAW_PARAMS(XTAL(49'152'000)/8, 384, 9+8*8, 9+44*8, 264, 2*8, 30*8) MCFG_SCREEN_UPDATE_DRIVER(namcos1_state, screen_update) MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, namcos1_state, screen_vblank)) - MCFG_SCREEN_PALETTE("palette") + MCFG_SCREEN_PALETTE(m_c116) - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos1) - - MCFG_PALETTE_ADD("palette", 0x2000) - MCFG_PALETTE_ENABLE_SHADOWS() + MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, m_c116, gfx_namcos1) NAMCO_C116(config, m_c116, 0); - m_c116->set_palette(m_palette); + m_c116->enable_shadows(); /* sound hardware */ SPEAKER(config, "lspeaker").front_left(); @@ -1148,7 +1145,7 @@ ROM_START( shadowld ) ROM_LOAD( "yd_voi-1.bin", 0x20000, 0x20000, CRC(7809035c) SHA1(d1d12db8f1d2c25545ccb92c0a2f2af2d0267161) ) // yd1.v1 + yd1.v4 ROM_LOAD( "yd_voi-2.bin", 0x40000, 0x20000, CRC(73bffc16) SHA1(a927e503bf8650e6b638d5c357cb48586cfa025b) ) // yd1.v2 + yd1.v5 - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "yd_chr-8.bin", 0x00000, 0x20000, CRC(0c8e69d0) SHA1(cedf12db2d9b14396cc8a15ccb025b96c92e190d) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1194,7 +1191,7 @@ ROM_START( youkaidk2 ) ROM_LOAD( "yd_voi-1.bin", 0x20000, 0x20000, CRC(7809035c) SHA1(d1d12db8f1d2c25545ccb92c0a2f2af2d0267161) ) // yd1.v1 + yd1.v4 ROM_LOAD( "yd_voi-2.bin", 0x40000, 0x20000, CRC(73bffc16) SHA1(a927e503bf8650e6b638d5c357cb48586cfa025b) ) // yd1.v2 + yd1.v5 - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "yd_chr-8.bin", 0x00000, 0x20000, CRC(0c8e69d0) SHA1(cedf12db2d9b14396cc8a15ccb025b96c92e190d) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1239,7 +1236,7 @@ ROM_START( youkaidk1 ) ROM_LOAD( "yd_voi-1.bin", 0x20000, 0x20000, CRC(7809035c) SHA1(d1d12db8f1d2c25545ccb92c0a2f2af2d0267161) ) // yd1.v1 + yd1.v4 ROM_LOAD( "yd_voi-2.bin", 0x40000, 0x20000, CRC(73bffc16) SHA1(a927e503bf8650e6b638d5c357cb48586cfa025b) ) // yd1.v2 + yd1.v5 - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "yd_chr-8.bin", 0x00000, 0x20000, CRC(0c8e69d0) SHA1(cedf12db2d9b14396cc8a15ccb025b96c92e190d) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1286,7 +1283,7 @@ ROM_START( dspirit ) ROM_LOAD( "ds_voi-3.bin", 0x60000, 0x20000, CRC(13e84c7e) SHA1(6ad0eb50eb3312f614a891ae8d66faca6b48d204) ) ROM_LOAD( "ds_voi-4.bin", 0x80000, 0x20000, CRC(34fbb8cd) SHA1(3f56f136e9d54d45924802f7149bfbc319e0933a) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "ds_chr-8.bin", 0x00000, 0x20000, CRC(946eb242) SHA1(6964fff430fe306c575ff07e4c054c70aa7d96ca) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1333,7 +1330,7 @@ ROM_START( dspirit2 ) ROM_LOAD( "ds_voi-3.bin", 0x60000, 0x20000, CRC(13e84c7e) SHA1(6ad0eb50eb3312f614a891ae8d66faca6b48d204) ) ROM_LOAD( "ds_voi-4.bin", 0x80000, 0x20000, CRC(34fbb8cd) SHA1(3f56f136e9d54d45924802f7149bfbc319e0933a) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "ds_chr-8.bin", 0x00000, 0x20000, CRC(946eb242) SHA1(6964fff430fe306c575ff07e4c054c70aa7d96ca) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1380,7 +1377,7 @@ ROM_START( dspirit1 ) ROM_LOAD( "ds_voi-3.bin", 0x60000, 0x20000, CRC(13e84c7e) SHA1(6ad0eb50eb3312f614a891ae8d66faca6b48d204) ) ROM_LOAD( "ds_voi-4.bin", 0x80000, 0x20000, CRC(34fbb8cd) SHA1(3f56f136e9d54d45924802f7149bfbc319e0933a) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "ds_chr-8.bin", 0x00000, 0x20000, CRC(946eb242) SHA1(6964fff430fe306c575ff07e4c054c70aa7d96ca) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1426,7 +1423,7 @@ ROM_START( blazer ) ROM_LOAD( "bz_voi-3.bin", 0x60000, 0x20000, CRC(26cfc510) SHA1(749680eaf3072db5331cc76a21cd022c50f95647) ) ROM_LOAD( "bz_voi-4.bin", 0x80000, 0x20000, CRC(d206b1bd) SHA1(32702fa67339ab337a2a70946e3861420a07b11b) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "bz_chr-8.bin", 0x00000, 0x20000, CRC(db28bfca) SHA1(510dd204da389db7eb5d9ce34dc0daf60bad1219) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1468,7 +1465,7 @@ ROM_START( quester ) ROM_REGION( 0xc0000, "voice", 0 ) /* MCU external ROM */ ROM_LOAD_HS( "qs1_v0.bin", 0x00000, 0x10000, CRC(6a2f3038) SHA1(00870da9b7f65536ff052c32da2d553f8c6b994b) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "qs1_c8.bin", 0x00000, 0x10000, CRC(06730d54) SHA1(53d79c27e2f1b192b1de781b6b5024eb1e8126ad) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1501,7 +1498,7 @@ ROM_START( questers ) ROM_REGION( 0xc0000, "voice", 0 ) /* MCU external ROM */ ROM_LOAD_HS( "qs1_v0.bin", 0x00000, 0x10000, CRC(6a2f3038) SHA1(00870da9b7f65536ff052c32da2d553f8c6b994b) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "qs1_c8.bin", 0x00000, 0x10000, CRC(06730d54) SHA1(53d79c27e2f1b192b1de781b6b5024eb1e8126ad) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1535,7 +1532,7 @@ ROM_START( pacmania ) ROM_REGION( 0xc0000, "voice", 0 ) /* MCU external ROM */ ROM_LOAD_HS( "pn2_v0.bin", 0x00000, 0x10000, CRC(1ad5788f) SHA1(f6b1ccdcc3db11c0ab83e3ff24e772cd2b491468) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "pn2_c8.bin", 0x00000, 0x10000, CRC(f3afd65d) SHA1(51daefd8685b49c464130b9e7d93e31cfdda724e) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1571,7 +1568,7 @@ ROM_START( pacmaniao ) ROM_REGION( 0xc0000, "voice", 0 ) /* MCU external ROM */ ROM_LOAD_HS( "pac-mania_111187.voice0", 0x00000, 0x10000, CRC(1ad5788f) SHA1(f6b1ccdcc3db11c0ab83e3ff24e772cd2b491468) ) // identical to world version - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "pn1_c8.bin", 0x00000, 0x10000, CRC(f3afd65d) SHA1(51daefd8685b49c464130b9e7d93e31cfdda724e) ) // same as the Japanese version ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1607,7 +1604,7 @@ ROM_START( pacmaniaj ) ROM_REGION( 0xc0000, "voice", 0 ) /* MCU external ROM */ ROM_LOAD_HS( "pn1_v0.bin", 0x00000, 0x10000, CRC(e2689f79) SHA1(b88e3435f2932901cc0a3b379b31a764bb9b2e2b) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "pn1_c8.bin", 0x00000, 0x10000, CRC(f3afd65d) SHA1(51daefd8685b49c464130b9e7d93e31cfdda724e) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1648,7 +1645,7 @@ ROM_START( galaga88 ) ROM_LOAD_HS( "g81_v4.bin", 0x80000, 0x10000, CRC(ac0279a7) SHA1(8d25292eec9953516fc5d25a94e30acc8159b360) ) ROM_LOAD_HS( "g81_v5.bin", 0xa0000, 0x10000, CRC(014ddba1) SHA1(26590b77a0c386dc076a8f8eccf6244c7e5a1e10) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "g8_chr-8.bin", 0x00000, 0x20000, CRC(3862ed0a) SHA1(4cae42bbfa434c7dce63fdceaa569fcb28768420) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1693,7 +1690,7 @@ ROM_START( galaga88j ) ROM_LOAD_HS( "g81_v4.bin", 0x80000, 0x10000, CRC(ac0279a7) SHA1(8d25292eec9953516fc5d25a94e30acc8159b360) ) ROM_LOAD_HS( "g81_v5.bin", 0xa0000, 0x10000, CRC(014ddba1) SHA1(26590b77a0c386dc076a8f8eccf6244c7e5a1e10) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "g8_chr-8.bin", 0x00000, 0x20000, CRC(3862ed0a) SHA1(4cae42bbfa434c7dce63fdceaa569fcb28768420) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1738,7 +1735,7 @@ ROM_START( galaga88a ) ROM_LOAD_HS( "g81_v4.bin", 0x80000, 0x10000, CRC(ac0279a7) SHA1(8d25292eec9953516fc5d25a94e30acc8159b360) ) // 12-11-87 ROM_LOAD_HS( "g81_v5.bin", 0xa0000, 0x10000, CRC(014ddba1) SHA1(26590b77a0c386dc076a8f8eccf6244c7e5a1e10) ) // 12-11-87 - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "g8_chr-8.bin", 0x00000, 0x20000, CRC(3862ed0a) SHA1(4cae42bbfa434c7dce63fdceaa569fcb28768420) ) // 12-11-87 ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1746,7 +1743,7 @@ ROM_START( galaga88a ) ROM_LOAD( "g8_chr-1.bin", 0x20000, 0x20000, CRC(3dc0f93f) SHA1(0db9f37cf6e06013b402df23e615b0ab0d32b9ee) ) // 12-11-87 ROM_LOAD( "g8_chr-2.bin", 0x40000, 0x20000, CRC(dbf26f1f) SHA1(e52723647a8fe6db0b9c5e11c02486b20a549506) ) // 12-11-87 ROM_LOAD( "g8_chr-3.bin", 0x60000, 0x20000, CRC(f5d6cac5) SHA1(3d098b8219de4a7729ec95547eebff17c9b505b9) ) // 12-11-87 - ROM_LOAD( "g8chr-7.m8", 0xe0000, 0x20000, CRC(5f655016) SHA1(f6f1fa26dad363f1b50995fd1c52db0671365d83) ) // 10-27-87 (present, but not used by this version? possibly leftover from earlier development) + ROM_LOAD( "g8chr-7.m8", 0xe0000, 0x20000, CRC(5f655016) SHA1(f6f1fa26dad363f1b50995fd1c52db0671365d83) ) // 10-27-87 (present, but not used by this version? possibly leftover from earlier development) ROM_REGION( 0x100000, "gfx3", 0 ) /* sprites */ ROM_LOAD( "g8_obj-0.bin", 0x00000, 0x20000, CRC(d7112e3f) SHA1(476f9e1b636b257e517fc789508dac923d05ef67) ) // 12-11-87 @@ -1781,7 +1778,7 @@ ROM_START( ws ) ROM_LOAD_HS( "ws1_voi0.bin", 0x00000, 0x10000, CRC(f6949199) SHA1(ef596b02060f8e58eac37765663dd16377244391) ) ROM_LOAD( "ws_voi-1.bin", 0x20000, 0x20000, CRC(210e2af9) SHA1(f8a1f8c6b9fbb8a9b3f298674600c1fbb9c5840e) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "ws_chr-8.bin", 0x00000, 0x20000, CRC(d1897b9b) SHA1(29906614b879e5623b49bc925e80006aee3997b9) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1822,7 +1819,7 @@ ROM_START( berabohm ) ROM_LOAD( "bm_voi-1.bin", 0x20000, 0x20000, CRC(be9ce0a8) SHA1(a211216125615cb14e515317f56976c4ebe13f5f) ) ROM_LOAD_HS( "bm1_v2.bin", 0x40000, 0x10000, CRC(41225d04) SHA1(a670c5ce63ff1d2ed94aa5ea17cb2c91eb768f14) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "bm_chr-8.bin", 0x00000, 0x20000, CRC(92860e95) SHA1(d8c8d5aed956c876809f287700f33bc70a1b58a3) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1866,7 +1863,7 @@ ROM_START( berabohmb ) ROM_LOAD( "bm_voi-1.bin", 0x20000, 0x20000, CRC(be9ce0a8) SHA1(a211216125615cb14e515317f56976c4ebe13f5f) ) ROM_LOAD_HS( "bm1_v2.bin", 0x40000, 0x10000, CRC(41225d04) SHA1(a670c5ce63ff1d2ed94aa5ea17cb2c91eb768f14) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "bm_chr-8.bin", 0x00000, 0x20000, CRC(92860e95) SHA1(d8c8d5aed956c876809f287700f33bc70a1b58a3) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1911,7 +1908,7 @@ ROM_START( mmaze ) ROM_LOAD( "mm_voi-0.bin", 0x00000, 0x20000, CRC(ee974cff) SHA1(f211c461a36dae9ce5ee614aaaabf92556181a85) ) ROM_LOAD( "mm_voi-1.bin", 0x20000, 0x20000, CRC(d09b5830) SHA1(954be797e30f7d126b4fc2b04f190bfd7dc23bff) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "mm_chr-8.bin", 0x00000, 0x20000, CRC(a3784dfe) SHA1(7bcd71e0c675cd16587b61c23b470abb8ba434d3) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1954,7 +1951,7 @@ ROM_START( mmaze2 ) ROM_LOAD( "mm_voi-0.bin", 0x00000, 0x20000, CRC(ee974cff) SHA1(f211c461a36dae9ce5ee614aaaabf92556181a85) ) ROM_LOAD( "mm_voi-1.bin", 0x20000, 0x20000, CRC(d09b5830) SHA1(954be797e30f7d126b4fc2b04f190bfd7dc23bff) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "mm_chr-8.bin", 0x00000, 0x20000, CRC(a3784dfe) SHA1(7bcd71e0c675cd16587b61c23b470abb8ba434d3) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -1996,7 +1993,7 @@ ROM_START( bakutotu ) ROM_REGION( 0xc0000, "voice", 0 ) /* MCU external ROM */ ROM_LOAD_HS( "bk1_v0.bin", 0x00000, 0x10000, CRC(008e290e) SHA1(87ac7291088f0d6a7179b1a5f3567a72dc92177c) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "bk_chr-8.bin", 0x00000, 0x20000, CRC(6c8d4029) SHA1(2eb6fd89ffaecfa53f9adcdebbe8f550199d067f) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2041,7 +2038,7 @@ ROM_START( wldcourt ) ROM_LOAD_HS( "wc1_voi0.bin", 0x00000, 0x10000, CRC(b57919f7) SHA1(5305c479513943a5d92988a63ad1671744e944b5) ) ROM_LOAD( "wc1_voi1.bin", 0x20000, 0x20000, CRC(97974b4b) SHA1(1e4d10ce28cabc01f1f233a0edc05e20874e0285) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "wc1_chr8.bin", 0x00000, 0x20000, CRC(23e1c399) SHA1(2d22da5c68c0924767f18fb19576cb76a016ae8e) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2204,7 +2201,7 @@ ROM_START( splatter ) ROM_LOAD( "sh_voi-2.bin", 0x40000, 0x20000, CRC(25ea75b6) SHA1(aafebbdddf4a2924d9e5a850ffb6861cb5c4a769) ) ROM_LOAD( "sh_voi-3.bin", 0x60000, 0x20000, CRC(5eebcdb4) SHA1(973e95a49cb1dda14e4c61580501c997fc7bc015) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "sh_chr-8.bin", 0x00000, 0x20000, CRC(321f483b) SHA1(84d75367d2e3ae210ecd17c163b336f609628a91) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2250,7 +2247,7 @@ ROM_START( splatter2 ) ROM_LOAD( "sh_voi-2.bin", 0x40000, 0x20000, CRC(25ea75b6) SHA1(aafebbdddf4a2924d9e5a850ffb6861cb5c4a769) ) ROM_LOAD( "sh_voi-3.bin", 0x60000, 0x20000, CRC(5eebcdb4) SHA1(973e95a49cb1dda14e4c61580501c997fc7bc015) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "sh_chr-8.bin", 0x00000, 0x20000, CRC(321f483b) SHA1(84d75367d2e3ae210ecd17c163b336f609628a91) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2296,7 +2293,7 @@ ROM_START( splatterj ) ROM_LOAD( "sh_voi-2.bin", 0x40000, 0x20000, CRC(25ea75b6) SHA1(aafebbdddf4a2924d9e5a850ffb6861cb5c4a769) ) ROM_LOAD( "sh_voi-3.bin", 0x60000, 0x20000, CRC(5eebcdb4) SHA1(973e95a49cb1dda14e4c61580501c997fc7bc015) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "sh_chr-8.bin", 0x00000, 0x20000, CRC(321f483b) SHA1(84d75367d2e3ae210ecd17c163b336f609628a91) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2340,7 +2337,7 @@ ROM_START( faceoff ) ROM_LOAD_HS( "fo1_v0.bin", 0x00000, 0x10000, CRC(e6edf63e) SHA1(095f7fa93233e4b4f25e728868c212170be48550) ) ROM_LOAD_HS( "fo1_v1.bin", 0x20000, 0x10000, CRC(132a5d90) SHA1(d5ceae68d7aea7cdde43600453f9724f35834519) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "fo1_c8.bin", 0x00000, 0x10000, CRC(d397216c) SHA1(baa3747bf3e12246e2629eaf0abdb3df05e423bd) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2378,7 +2375,7 @@ ROM_START( rompers ) ROM_REGION( 0xc0000, "voice", 0 ) /* MCU external ROM */ ROM_LOAD( "rp_voi-0.bin", 0x00000, 0x20000, CRC(11caef7e) SHA1(c6470cbbc6402872794e0a4e822a5d08ca2448ef) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "rp1_chr8.bin", 0x00000, 0x10000, CRC(69cfe46a) SHA1(01c5af1b7fc337ec06a5afabd87b9a6a7dcf3503) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2418,7 +2415,7 @@ ROM_START( romperso ) ROM_REGION( 0xc0000, "voice", 0 ) /* MCU external ROM */ ROM_LOAD( "rp_voi-0.bin", 0x00000, 0x20000, CRC(11caef7e) SHA1(c6470cbbc6402872794e0a4e822a5d08ca2448ef) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "rp1_chr8.bin", 0x00000, 0x10000, CRC(69cfe46a) SHA1(01c5af1b7fc337ec06a5afabd87b9a6a7dcf3503) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2461,7 +2458,7 @@ ROM_START( blastoff ) ROM_LOAD( "bo_voi-1.bin", 0x20000, 0x20000, CRC(0308b18e) SHA1(7196abdf36d660089d739e3f3a362648768a6127) ) ROM_LOAD( "bo_voi-2.bin", 0x40000, 0x20000, CRC(88cab230) SHA1(659c4efeb8aa24f8b32509ee563407ed1e17d564) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "bo_chr-8.bin", 0x00000, 0x20000, CRC(e8b5f2d4) SHA1(70dd2898dcfed5f43f6c50f852660f24a9d7ec9d) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2504,7 +2501,7 @@ ROM_START( ws89 ) ROM_LOAD_HS( "ws1_voi0.bin", 0x00000, 0x10000, CRC(f6949199) SHA1(ef596b02060f8e58eac37765663dd16377244391) ) ROM_LOAD( "ws_voi-1.bin", 0x20000, 0x20000, CRC(210e2af9) SHA1(f8a1f8c6b9fbb8a9b3f298674600c1fbb9c5840e) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "ws_chr-8.bin", 0x00000, 0x20000, CRC(d1897b9b) SHA1(29906614b879e5623b49bc925e80006aee3997b9) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2543,7 +2540,7 @@ ROM_START( dangseed ) ROM_REGION( 0xc0000, "voice", 0 ) /* MCU external ROM */ ROM_LOAD( "dr_voi-0.bin", 0x00000, 0x20000, CRC(de4fdc0e) SHA1(b5e952aaf5a81a2b4ff1c7cae141d50360545770) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "dr_chr-8.bin", 0x00000, 0x20000, CRC(0fbaa10e) SHA1(18ea77544678d889aded927a96a11bc04ad42fa6) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2584,7 +2581,7 @@ ROM_START( ws90 ) ROM_LOAD_HS( "ws1_voi0.bin", 0x00000, 0x10000, CRC(f6949199) SHA1(ef596b02060f8e58eac37765663dd16377244391) ) ROM_LOAD( "ws_voi-1.bin", 0x20000, 0x20000, CRC(210e2af9) SHA1(f8a1f8c6b9fbb8a9b3f298674600c1fbb9c5840e) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "ws_chr-8.bin", 0x00000, 0x20000, CRC(d1897b9b) SHA1(29906614b879e5623b49bc925e80006aee3997b9) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2625,7 +2622,7 @@ ROM_START( pistoldm ) ROM_LOAD( "pd_voi-1.bin", 0x20000, 0x20000, CRC(2871c494) SHA1(9ac0dc559c22ac5083025c32f28e353b04348155) ) ROM_LOAD( "pd_voi-2.bin", 0x40000, 0x20000, CRC(e783f0c4) SHA1(6a43f22226d1637d507c8194244058e8d96f8692) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "pd_chr-8.bin", 0x00000, 0x20000, CRC(a5f516db) SHA1(262c3a99cfa3061b58331d8ed254b49a06bfdd9f) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2666,7 +2663,7 @@ ROM_START( boxyboy ) ROM_REGION( 0xc0000, "voice", 0 ) /* MCU external ROM */ ROM_LOAD_HS( "sb1_voi0.bin", 0x00000, 0x10000, CRC(63d9cedf) SHA1(117767c6b25325bf3005756d74196da56008498c) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "sb1_chr8.bin", 0x00000, 0x10000, CRC(5692b297) SHA1(ed20a0f4ce80674d01cd2a30571ffeff9f9066fd) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2699,7 +2696,7 @@ ROM_START( soukobdx ) ROM_REGION( 0xc0000, "voice", 0 ) /* MCU external ROM */ ROM_LOAD_HS( "sb1_voi0.bin", 0x00000, 0x10000, CRC(63d9cedf) SHA1(117767c6b25325bf3005756d74196da56008498c) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "sb1_chr8.bin", 0x00000, 0x10000, CRC(5692b297) SHA1(ed20a0f4ce80674d01cd2a30571ffeff9f9066fd) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2732,7 +2729,7 @@ ROM_START( puzlclub ) ROM_REGION( 0xc0000, "voice", ROMREGION_ERASEFF ) /* MCU external ROM */ /* no voices */ - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "pc1-c8.bin", 0x00000, 0x20000, CRC(4e196bcd) SHA1(2e27538bbbebeda32353c0c02f98d52f0d1994f9) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2772,7 +2769,7 @@ ROM_START( tankfrce ) ROM_LOAD( "tf1_voi0.bin", 0x00000, 0x20000, CRC(f542676a) SHA1(38d54db0807c58152bd120c393bf63b68754e8ff) ) ROM_LOAD( "tf1_voi1.bin", 0x20000, 0x20000, CRC(615d09cd) SHA1(0aecf7ca6b65ddfcdcf74f8d412169ec800ba3a3) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "tf1_chr8.bin", 0x00000, 0x20000, CRC(7d53b31e) SHA1(7e4b5fc92f7956477392f1e14c6edfc0cada2be0) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2810,7 +2807,7 @@ ROM_START( tankfrce4 ) ROM_LOAD( "tf1_voi0.bin", 0x00000, 0x20000, CRC(f542676a) SHA1(38d54db0807c58152bd120c393bf63b68754e8ff) ) ROM_LOAD( "tf1_voi1.bin", 0x20000, 0x20000, CRC(615d09cd) SHA1(0aecf7ca6b65ddfcdcf74f8d412169ec800ba3a3) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "tf1_chr8.bin", 0x00000, 0x20000, CRC(7d53b31e) SHA1(7e4b5fc92f7956477392f1e14c6edfc0cada2be0) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ @@ -2848,7 +2845,7 @@ ROM_START( tankfrcej ) ROM_LOAD( "tf1_voi0.bin", 0x00000, 0x20000, CRC(f542676a) SHA1(38d54db0807c58152bd120c393bf63b68754e8ff) ) ROM_LOAD( "tf1_voi1.bin", 0x20000, 0x20000, CRC(615d09cd) SHA1(0aecf7ca6b65ddfcdcf74f8d412169ec800ba3a3) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* character mask */ + ROM_REGION( 0x20000, "tmap_mask", 0 ) /* character mask */ ROM_LOAD( "tf1_chr8.bin", 0x00000, 0x20000, CRC(7d53b31e) SHA1(7e4b5fc92f7956477392f1e14c6edfc0cada2be0) ) ROM_REGION( 0x100000, "gfx2", 0 ) /* characters */ diff --git a/src/mame/drivers/namcos2.cpp b/src/mame/drivers/namcos2.cpp index c5566895f14..aacadc4a2c2 100644 --- a/src/mame/drivers/namcos2.cpp +++ b/src/mame/drivers/namcos2.cpp @@ -457,7 +457,7 @@ Custom Chips: Final Lap Assault LuckyWld System21 C45 Land Generator * * C65 I/O Controller (older) * * C67 TMS320C25 (DSP int rom) - C68 I/O Controller (newer) * * + C68 I/O Controller (newer) * * C70 * C95 * * C102 ROZ:Memory Access Control * @@ -710,8 +710,8 @@ void namcos2_state::master_default_am(address_map &map) { common_default_am(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).bankrw(NAMCOS2_68K_MASTER_RAM); - map(0x180000, 0x183fff).rw(FUNC(namcos2_state::namcos2_68k_eeprom_r), FUNC(namcos2_state::namcos2_68k_eeprom_w)).umask16(0x00ff); + map(0x100000, 0x10ffff).ram(); + map(0x180000, 0x183fff).rw(FUNC(namcos2_state::eeprom_r), FUNC(namcos2_state::eeprom_w)).umask16(0x00ff); map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); } @@ -719,7 +719,7 @@ void namcos2_state::slave_default_am(address_map &map) { common_default_am(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x13ffff).bankrw(NAMCOS2_68K_SLAVE_RAM); + map(0x100000, 0x13ffff).ram(); map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); } @@ -740,8 +740,8 @@ void namcos2_state::master_finallap_am(address_map &map) { common_finallap_am(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).bankrw(NAMCOS2_68K_MASTER_RAM); - map(0x180000, 0x183fff).rw(FUNC(namcos2_state::namcos2_68k_eeprom_r), FUNC(namcos2_state::namcos2_68k_eeprom_w)).umask16(0x00ff); + map(0x100000, 0x10ffff).ram(); + map(0x180000, 0x183fff).rw(FUNC(namcos2_state::eeprom_r), FUNC(namcos2_state::eeprom_w)).umask16(0x00ff); map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); } @@ -749,7 +749,7 @@ void namcos2_state::slave_finallap_am(address_map &map) { common_finallap_am(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x13ffff).bankrw(NAMCOS2_68K_SLAVE_RAM); + map(0x100000, 0x13ffff).ram(); map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); } @@ -767,8 +767,8 @@ void namcos2_state::master_sgunner_am(address_map &map) { common_sgunner_am(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).bankrw(NAMCOS2_68K_MASTER_RAM); - map(0x180000, 0x183fff).rw(FUNC(namcos2_state::namcos2_68k_eeprom_r), FUNC(namcos2_state::namcos2_68k_eeprom_w)).umask16(0x00ff); + map(0x100000, 0x10ffff).ram(); + map(0x180000, 0x183fff).rw(FUNC(namcos2_state::eeprom_r), FUNC(namcos2_state::eeprom_w)).umask16(0x00ff); map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); } @@ -776,7 +776,7 @@ void namcos2_state::slave_sgunner_am(address_map &map) { common_sgunner_am(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x13ffff).bankrw(NAMCOS2_68K_SLAVE_RAM); + map(0x100000, 0x13ffff).ram(); map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); } @@ -795,8 +795,8 @@ void namcos2_state::master_metlhawk_am(address_map &map) { common_metlhawk_am(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).bankrw(NAMCOS2_68K_MASTER_RAM); - map(0x180000, 0x183fff).rw(FUNC(namcos2_state::namcos2_68k_eeprom_r), FUNC(namcos2_state::namcos2_68k_eeprom_w)).umask16(0x00ff); + map(0x100000, 0x10ffff).ram(); + map(0x180000, 0x183fff).rw(FUNC(namcos2_state::eeprom_r), FUNC(namcos2_state::eeprom_w)).umask16(0x00ff); map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); } @@ -804,7 +804,7 @@ void namcos2_state::slave_metlhawk_am(address_map &map) { common_metlhawk_am(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x13ffff).bankrw(NAMCOS2_68K_SLAVE_RAM); + map(0x100000, 0x13ffff).ram(); map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); } @@ -827,8 +827,8 @@ void namcos2_state::master_suzuka8h_am(address_map &map) { common_suzuka8h_am(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).bankrw(NAMCOS2_68K_MASTER_RAM); - map(0x180000, 0x183fff).rw(FUNC(namcos2_state::namcos2_68k_eeprom_r), FUNC(namcos2_state::namcos2_68k_eeprom_w)).umask16(0x00ff); + map(0x100000, 0x10ffff).ram(); + map(0x180000, 0x183fff).rw(FUNC(namcos2_state::eeprom_r), FUNC(namcos2_state::eeprom_w)).umask16(0x00ff); map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); map(0xc00000, 0xc0ffff).ram(); // is roz hardware populated? map(0xd00000, 0xd0001f).ram(); // is roz hardware populated? @@ -838,7 +838,7 @@ void namcos2_state::slave_suzuka8h_am(address_map &map) { common_suzuka8h_am(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x13ffff).bankrw(NAMCOS2_68K_SLAVE_RAM); + map(0x100000, 0x13ffff).ram(); map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); map(0xc00000, 0xc0ffff).ram(); // is roz hardware populated? map(0xd00000, 0xd0001f).ram(); // is roz hardware populated? @@ -848,8 +848,8 @@ void namcos2_state::master_luckywld_am(address_map &map) { common_suzuka8h_am(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).bankrw(NAMCOS2_68K_MASTER_RAM); - map(0x180000, 0x183fff).rw(FUNC(namcos2_state::namcos2_68k_eeprom_r), FUNC(namcos2_state::namcos2_68k_eeprom_w)).umask16(0x00ff); + map(0x100000, 0x10ffff).ram(); + map(0x180000, 0x183fff).rw(FUNC(namcos2_state::eeprom_r), FUNC(namcos2_state::eeprom_w)).umask16(0x00ff); map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); map(0xc00000, 0xc0ffff).rw(m_c169roz, FUNC(namco_c169roz_device::videoram_r), FUNC(namco_c169roz_device::videoram_w)); map(0xd00000, 0xd0001f).rw(m_c169roz, FUNC(namco_c169roz_device::control_r), FUNC(namco_c169roz_device::control_w)); @@ -859,7 +859,7 @@ void namcos2_state::slave_luckywld_am(address_map &map) { common_suzuka8h_am(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x13ffff).bankrw(NAMCOS2_68K_SLAVE_RAM); + map(0x100000, 0x13ffff).ram(); map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); map(0xc00000, 0xc0ffff).rw(m_c169roz, FUNC(namco_c169roz_device::videoram_r), FUNC(namco_c169roz_device::videoram_w)); map(0xd00000, 0xd0001f).rw(m_c169roz, FUNC(namco_c169roz_device::control_r), FUNC(namco_c169roz_device::control_w)); @@ -878,7 +878,7 @@ void namcos2_state::sound_default_am(address_map &map) map(0x7800, 0x7fff).rw(FUNC(namcos2_state::dpram_byte_r), FUNC(namcos2_state::dpram_byte_w)); /* mirror */ map(0x8000, 0x9fff).ram(); map(0xa000, 0xbfff).nopw(); /* Amplifier enable on 1st write */ - map(0xc000, 0xc001).w(FUNC(namcos2_state::namcos2_sound_bankselect_w)); + map(0xc000, 0xc001).w(FUNC(namcos2_state::sound_bankselect_w)); map(0xd001, 0xd001).nopw(); /* Watchdog */ map(0xe000, 0xe000).nopw(); map(0xd000, 0xffff).rom().region("audiocpu", 0x01000); @@ -1586,17 +1586,7 @@ static const gfx_layout obj_layout = { 0x800 /* sprite offset */ }; -static const gfx_layout chr_layout = { - 8,8, - RGN_FRAC(1,1), - 8, - { STEP8(0,1) }, - { STEP8(0,8) }, - { STEP8(0,8*8) }, - 8*64 -}; - -static const gfx_layout luckywld_sprite_layout = /* same as Namco System21 */ +static const gfx_layout c355_sprite_layout = /* same as Namco System21 */ { 16,16, RGN_FRAC(1,4), /* number of tiles */ @@ -1619,17 +1609,6 @@ static const gfx_layout luckywld_sprite_layout = /* same as Namco System21 */ 8*64 /* sprite offset */ }; -static const gfx_layout luckywld_roz_layout = -{ - 16,16, - RGN_FRAC(1,1), - 8, - { STEP8(0,1) }, - { STEP16(0,8) }, - { STEP16(0,8*16) }, - 16*128 -}; - static const gfx_layout metlhawk_sprite_layout = { 32,32, RGN_FRAC(1,1), /* number of sprites */ @@ -1651,35 +1630,17 @@ static const gfx_layout metlhawk_sprite_layout_swapped = { }; static GFXDECODE_START( gfx_metlhawk ) - GFXDECODE_ENTRY( "gfx1", 0x000000, metlhawk_sprite_layout, 0*256, 16 ) - GFXDECODE_ENTRY( "gfx3", 0x000000, luckywld_roz_layout, 0*256, 16 ) - GFXDECODE_ENTRY( "gfx2", 0x000000, chr_layout, 16*256, 16 ) - GFXDECODE_ENTRY( "gfx1", 0x000000, metlhawk_sprite_layout_swapped, 0*256, 16 ) + GFXDECODE_ENTRY( "sprite", 0x000000, metlhawk_sprite_layout, 0, 16 ) + GFXDECODE_ENTRY( "sprite", 0x000000, metlhawk_sprite_layout_swapped, 0, 16 ) GFXDECODE_END static GFXDECODE_START( gfx_namcos2 ) - GFXDECODE_ENTRY( "gfx1", 0x000000, obj_layout, 0*256, 16 ) - GFXDECODE_ENTRY( "gfx1", 0x200000, obj_layout, 0*256, 16 ) - GFXDECODE_ENTRY( "gfx2", 0x000000, chr_layout, 16*256, 16 ) - GFXDECODE_ENTRY( "gfx3", 0x000000, chr_layout, 0*256, 16 ) -GFXDECODE_END - -static GFXDECODE_START( gfx_finallap ) - GFXDECODE_ENTRY( "gfx1", 0x000000, obj_layout, 0*256, 16 ) - GFXDECODE_ENTRY( "gfx1", 0x200000, obj_layout, 0*256, 16 ) - GFXDECODE_ENTRY( "gfx2", 0x000000, chr_layout, 16*256, 16 ) -GFXDECODE_END - -static GFXDECODE_START( gfx_sgunner ) - GFXDECODE_ENTRY( "gfx1", 0x000000, luckywld_sprite_layout, 0*256, 16 ) - GFXDECODE_ENTRY( "gfx3", 0x000000, luckywld_roz_layout, 0*256, 16 ) - GFXDECODE_ENTRY( "gfx2", 0x000000, chr_layout, 16*256, 16 ) + GFXDECODE_ENTRY( "sprite", 0x000000, obj_layout, 0, 16 ) + GFXDECODE_ENTRY( "sprite", 0x200000, obj_layout, 0, 16 ) GFXDECODE_END -static GFXDECODE_START( gfx_luckywld ) - GFXDECODE_ENTRY( "gfx1", 0x000000, luckywld_sprite_layout, 0*256, 16 ) - GFXDECODE_ENTRY( "gfx3", 0x000000, luckywld_roz_layout, 0*256, 16 ) - GFXDECODE_ENTRY( "gfx2", 0x000000, chr_layout, 16*256, 16 ) +static GFXDECODE_START( gfx_c355 ) + GFXDECODE_ENTRY( "sprite", 0x000000, c355_sprite_layout, 0, 16 ) GFXDECODE_END /* end */ @@ -1716,11 +1677,8 @@ via software as INT1 void namcos2_state::configure_c116_standard(machine_config &config) { - PALETTE(config, m_palette, 0x2000); - m_palette->enable_shadows(); - NAMCO_C116(config, m_c116, 0); - m_c116->set_palette(m_palette); + m_c116->enable_shadows(); } void namcos2_state::configure_c148_standard(machine_config &config) @@ -1814,10 +1772,9 @@ TIMER_DEVICE_CALLBACK_MEMBER(namcos2_state::screen_scanline) void namcos2_state::configure_c123tmap_standard(machine_config &config) { NAMCO_C123TMAP(config, m_c123tmap, 0); - m_c123tmap->set_gfxdecode_tag("gfxdecode"); + m_c123tmap->set_palette(m_c116); m_c123tmap->set_tile_callback(namco_c123tmap_device::c123_tilemap_delegate(&namcos2_state::TilemapCB, this)); - m_c123tmap->set_maskregion_tag("gfx4"); - m_c123tmap->set_gfxregion(2); + m_c123tmap->set_color_base(16*256); } MACHINE_CONFIG_START(namcos2_state::base_noio) @@ -1835,36 +1792,30 @@ MACHINE_CONFIG_START(namcos2_state::base_noio) MCFG_QUANTUM_TIME(attotime::from_hz(12000)) /* CPU slices per frame */ - MCFG_MACHINE_START_OVERRIDE(namcos2_state,namcos2) - MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); configure_c148_standard(config); NAMCO_C139(config, m_sci, 0); MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) ) - MCFG_SCREEN_SIZE(384, 264) - MCFG_SCREEN_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1) + MCFG_SCREEN_RAW_PARAMS(MAIN_OSC_CLOCK/8, 384, 0*8, 36*8, 264, 0*8, 28*8) MCFG_SCREEN_UPDATE_DRIVER(namcos2_state, screen_update) - MCFG_SCREEN_PALETTE("palette") + MCFG_SCREEN_PALETTE(m_c116) configure_c123tmap_standard(config); NAMCOS2_SPRITE(config, m_ns2sprite, 0); - m_ns2sprite->set_palette_tag("palette"); m_ns2sprite->set_gfxdecode_tag("gfxdecode"); m_ns2sprite->set_spriteram_tag("spriteram"); NAMCOS2_ROZ(config, m_ns2roz, 0); - m_ns2roz->set_palette_tag("palette"); - m_ns2roz->set_gfxdecode_tag("gfxdecode"); + m_ns2roz->set_palette(m_c116); m_ns2roz->set_rozram_tag("rozram"); m_ns2roz->set_rozctrl_tag("rozctrl"); configure_c116_standard(config); - MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, "palette", gfx_namcos2) + MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, m_c116, gfx_namcos2) SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); @@ -1935,32 +1886,26 @@ MACHINE_CONFIG_START(namcos2_state::gollygho) MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* CPU slices per frame */ - MCFG_MACHINE_START_OVERRIDE(namcos2_state,namcos2) - MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); configure_c148_standard(config); NAMCO_C139(config, m_sci, 0); MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) ) - MCFG_SCREEN_SIZE(384, 264) - MCFG_SCREEN_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1) + MCFG_SCREEN_RAW_PARAMS(MAIN_OSC_CLOCK/8, 384, 0*8, 36*8, 264, 0*8, 28*8) MCFG_SCREEN_UPDATE_DRIVER(namcos2_state, screen_update) - MCFG_SCREEN_PALETTE("palette") + MCFG_SCREEN_PALETTE(m_c116) - MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, "palette", gfx_namcos2) + MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, m_c116, gfx_namcos2) configure_c123tmap_standard(config); NAMCOS2_SPRITE(config, m_ns2sprite, 0); - m_ns2sprite->set_palette_tag("palette"); m_ns2sprite->set_gfxdecode_tag("gfxdecode"); m_ns2sprite->set_spriteram_tag("spriteram"); NAMCOS2_ROZ(config, m_ns2roz, 0); - m_ns2roz->set_palette_tag("palette"); - m_ns2roz->set_gfxdecode_tag("gfxdecode"); + m_ns2roz->set_palette(m_c116); m_ns2roz->set_rozram_tag("rozram"); m_ns2roz->set_rozctrl_tag("rozctrl"); @@ -1980,7 +1925,6 @@ MACHINE_CONFIG_START(namcos2_state::gollygho) MACHINE_CONFIG_END - MACHINE_CONFIG_START(namcos2_state::finallap_noio) MCFG_DEVICE_ADD("maincpu", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */ MCFG_DEVICE_PROGRAM_MAP(master_finallap_am) @@ -1996,35 +1940,28 @@ MACHINE_CONFIG_START(namcos2_state::finallap_noio) MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* CPU slices per frame */ - MCFG_MACHINE_START_OVERRIDE(namcos2_state,namcos2) - MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); configure_c148_standard(config); NAMCO_C139(config, m_sci, 0); MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) ) - MCFG_SCREEN_SIZE(384, 264) - MCFG_SCREEN_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1) + MCFG_SCREEN_RAW_PARAMS(MAIN_OSC_CLOCK/8, 384, 0*8, 36*8, 264, 0*8, 28*8) MCFG_SCREEN_UPDATE_DRIVER(namcos2_state, screen_update_finallap) - MCFG_SCREEN_PALETTE("palette") + MCFG_SCREEN_PALETTE(m_c116) - MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, "palette", gfx_finallap) + MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, m_c116, gfx_namcos2) configure_c123tmap_standard(config); NAMCOS2_SPRITE(config, m_ns2sprite, 0); - m_ns2sprite->set_palette_tag("palette"); m_ns2sprite->set_gfxdecode_tag("gfxdecode"); m_ns2sprite->set_spriteram_tag("spriteram"); configure_c116_standard(config); - MCFG_VIDEO_START_OVERRIDE(namcos2_state, finallap) - NAMCO_C45_ROAD(config, m_c45_road, 0); - m_c45_road->set_palette(m_palette); + m_c45_road->set_palette(m_c116); SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); @@ -2055,16 +1992,12 @@ MACHINE_CONFIG_START(namcos2_state::finalap2) finallap(config); m_c123tmap->set_tile_callback(namco_c123tmap_device::c123_tilemap_delegate(&namcos2_state::TilemapCB_finalap2, this)); - - MCFG_VIDEO_START_OVERRIDE(namcos2_state, finalap2) MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos2_state::finalap3) finallap_c68(config); m_c123tmap->set_tile_callback(namco_c123tmap_device::c123_tilemap_delegate(&namcos2_state::TilemapCB_finalap2, this)); - - MCFG_VIDEO_START_OVERRIDE(namcos2_state, finalap2) MACHINE_CONFIG_END @@ -2085,24 +2018,20 @@ MACHINE_CONFIG_START(namcos2_state::sgunner) MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* CPU slices per frame */ - MCFG_MACHINE_START_OVERRIDE(namcos2_state,namcos2) - MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); configure_c148_standard(config); NAMCO_C139(config, m_sci, 0); MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) ) - MCFG_SCREEN_SIZE(384, 264) - MCFG_SCREEN_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1) + MCFG_SCREEN_RAW_PARAMS(MAIN_OSC_CLOCK/8, 384, 0*8, 36*8, 264, 0*8, 28*8) MCFG_SCREEN_UPDATE_DRIVER(namcos2_state, screen_update_sgunner) - MCFG_SCREEN_PALETTE("palette") + MCFG_SCREEN_PALETTE(m_c116) - MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, "palette", gfx_sgunner) + MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, m_c116, gfx_c355) NAMCO_C355SPR(config, m_c355spr, 0); - m_c355spr->set_palette_tag("palette"); + m_c355spr->set_screen(m_screen); m_c355spr->set_gfxdecode_tag("gfxdecode"); m_c355spr->set_is_namcofl(false); m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); @@ -2145,24 +2074,20 @@ MACHINE_CONFIG_START(namcos2_state::sgunner2) MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* CPU slices per frame */ - MCFG_MACHINE_START_OVERRIDE(namcos2_state,namcos2) - MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); configure_c148_standard(config); NAMCO_C139(config, m_sci, 0); MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) ) - MCFG_SCREEN_SIZE(384, 264) - MCFG_SCREEN_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1) + MCFG_SCREEN_RAW_PARAMS(MAIN_OSC_CLOCK/8, 384, 0*8, 36*8, 264, 0*8, 28*8) MCFG_SCREEN_UPDATE_DRIVER(namcos2_state, screen_update_sgunner) - MCFG_SCREEN_PALETTE("palette") + MCFG_SCREEN_PALETTE(m_c116) - MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, "palette", gfx_sgunner) + MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, m_c116, gfx_c355) NAMCO_C355SPR(config, m_c355spr, 0); - m_c355spr->set_palette_tag("palette"); + m_c355spr->set_screen(m_screen); m_c355spr->set_gfxdecode_tag("gfxdecode"); m_c355spr->set_is_namcofl(false); m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); @@ -2205,24 +2130,20 @@ MACHINE_CONFIG_START(namcos2_state::suzuka8h) MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* CPU slices per frame */ - MCFG_MACHINE_START_OVERRIDE(namcos2_state,namcos2) - MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); configure_c148_standard(config); NAMCO_C139(config, m_sci, 0); MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) ) - MCFG_SCREEN_SIZE(384, 264) - MCFG_SCREEN_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1) + MCFG_SCREEN_RAW_PARAMS(MAIN_OSC_CLOCK/8, 384, 0*8, 36*8, 264, 0*8, 28*8) MCFG_SCREEN_UPDATE_DRIVER(namcos2_state, screen_update_luckywld) - MCFG_SCREEN_PALETTE("palette") + MCFG_SCREEN_PALETTE(m_c116) - MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, "palette", gfx_luckywld) + MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, m_c116, gfx_c355) NAMCO_C355SPR(config, m_c355spr, 0); - m_c355spr->set_palette_tag("palette"); + m_c355spr->set_screen(m_screen); m_c355spr->set_gfxdecode_tag("gfxdecode"); m_c355spr->set_is_namcofl(false); m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); @@ -2236,7 +2157,7 @@ MACHINE_CONFIG_START(namcos2_state::suzuka8h) MCFG_VIDEO_START_OVERRIDE(namcos2_state, luckywld) NAMCO_C45_ROAD(config, m_c45_road, 0); - m_c45_road->set_palette(m_palette); + m_c45_road->set_palette(m_c116); SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); @@ -2260,14 +2181,12 @@ MACHINE_CONFIG_START(namcos2_state::luckywld) MCFG_DEVICE_MODIFY("slave") MCFG_DEVICE_PROGRAM_MAP(slave_luckywld_am) - NAMCO_C169ROZ(config, m_c169roz, 0); - m_c169roz->set_gfxdecode_tag("gfxdecode"); + m_c169roz->set_palette(m_c116); m_c169roz->set_is_namcofl(false); m_c169roz->set_ram_words(0x10000/2); m_c169roz->set_tile_callback(namco_c169roz_device::c169_tilemap_delegate(&namcos2_state::RozCB_luckywld, this)); - m_c169roz->set_maskregion_tag("gfx5"); - m_c169roz->set_gfxregion(1); + m_c169roz->set_color_base(0*256); MACHINE_CONFIG_END @@ -2288,34 +2207,28 @@ MACHINE_CONFIG_START(namcos2_state::metlhawk) MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* CPU slices per frame */ - MCFG_MACHINE_START_OVERRIDE(namcos2_state,namcos2) - MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); configure_c148_standard(config); NAMCO_C139(config, m_sci, 0); MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) ) - MCFG_SCREEN_SIZE(384, 264) - MCFG_SCREEN_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1) + MCFG_SCREEN_RAW_PARAMS(MAIN_OSC_CLOCK/8, 384, 0*8, 36*8, 264, 0*8, 28*8) MCFG_SCREEN_UPDATE_DRIVER(namcos2_state, screen_update_metlhawk) - MCFG_SCREEN_PALETTE("palette") + MCFG_SCREEN_PALETTE(m_c116) - MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, "palette", gfx_metlhawk) + MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, m_c116, gfx_metlhawk) NAMCO_C169ROZ(config, m_c169roz, 0); - m_c169roz->set_gfxdecode_tag("gfxdecode"); + m_c169roz->set_palette(m_c116); m_c169roz->set_is_namcofl(false); m_c169roz->set_ram_words(0x10000/2); m_c169roz->set_tile_callback(namco_c169roz_device::c169_tilemap_delegate(&namcos2_state::RozCB_metlhawk, this)); - m_c169roz->set_maskregion_tag("gfx5"); - m_c169roz->set_gfxregion(1); + m_c169roz->set_color_base(0*256); configure_c123tmap_standard(config); NAMCOS2_SPRITE(config, m_ns2sprite, 0); - m_ns2sprite->set_palette_tag("palette"); m_ns2sprite->set_gfxdecode_tag("gfxdecode"); m_ns2sprite->set_spriteram_tag("spriteram"); @@ -2395,7 +2308,7 @@ ROM_START( assault ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65b.bin", 0x000000, 0x008000, CRC(e9f2922a) SHA1(5767d2f85e1eb3de19192e73b02221f28b1fbb83) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ NAMCOS2_GFXROM_LOAD_128K( "atobj0.bin", 0x000000, CRC(22240076) SHA1(916fc0e6b338a6dda84399df910c3c9463e6b915) ) NAMCOS2_GFXROM_LOAD_128K( "atobj1.bin", 0x080000, CRC(2284a8e8) SHA1(80f9143e08f9f8ff3e937312a8ce76855a1929ad) ) NAMCOS2_GFXROM_LOAD_128K( "atobj2.bin", 0x100000, CRC(51425476) SHA1(12a2fb1b61adfa4c21a5af4f206ffe48a045a953) ) @@ -2405,11 +2318,11 @@ ROM_START( assault ) NAMCOS2_GFXROM_LOAD_128K( "atobj6.bin", 0x300000, CRC(12f6a569) SHA1(e3051de0961f34e15b8642fa769deac3cb0c8305) ) NAMCOS2_GFXROM_LOAD_128K( "atobj7.bin", 0x380000, CRC(06a929f2) SHA1(65308972a27ab4a649fd08414a89e6f97a09240e) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "atchr0.bin", 0x000000, CRC(6f8e968a) SHA1(b771359a3b08c1aeeb248eff325b19238bb88bf8) ) NAMCOS2_GFXROM_LOAD_128K( "atchr1.bin", 0x080000, CRC(88cf7cbe) SHA1(df7565cb36658311b784d5406dc6f83141af58a9) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "atroz0.bin", 0x000000, CRC(8c247a97) SHA1(e06dc0b46fa06f41d2017ec8113baf5c4ba832ab) ) NAMCOS2_GFXROM_LOAD_128K( "atroz1.bin", 0x080000, CRC(e44c475b) SHA1(64768692a8d38377fa1109cd9f7c86b31c01e13c) ) NAMCOS2_GFXROM_LOAD_128K( "atroz2.bin", 0x100000, CRC(770f377f) SHA1(3a7d4f4b9eb01d4366119f34b0d7d7db2f5a2471) ) @@ -2419,7 +2332,7 @@ ROM_START( assault ) NAMCOS2_GFXROM_LOAD_128K( "atroz6.bin", 0x300000, CRC(9089e477) SHA1(929d7d81c05aa148212e22969d147296811d433c) ) NAMCOS2_GFXROM_LOAD_128K( "atroz7.bin", 0x380000, CRC(62b2783a) SHA1(d1ba043a2ec9390c2f281f53de6e59bd936ea6f6) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "atshape.bin", 0x000000, CRC(dfcad82b) SHA1(9c3826b8dc36fa0d71c0de7f8be3479d9a025803) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -2446,7 +2359,7 @@ ROM_START( assaultj ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65b.bin", 0x000000, 0x008000, CRC(e9f2922a) SHA1(5767d2f85e1eb3de19192e73b02221f28b1fbb83) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ NAMCOS2_GFXROM_LOAD_128K( "atobj0.bin", 0x000000, CRC(22240076) SHA1(916fc0e6b338a6dda84399df910c3c9463e6b915) ) NAMCOS2_GFXROM_LOAD_128K( "atobj1.bin", 0x080000, CRC(2284a8e8) SHA1(80f9143e08f9f8ff3e937312a8ce76855a1929ad) ) NAMCOS2_GFXROM_LOAD_128K( "atobj2.bin", 0x100000, CRC(51425476) SHA1(12a2fb1b61adfa4c21a5af4f206ffe48a045a953) ) @@ -2456,11 +2369,11 @@ ROM_START( assaultj ) NAMCOS2_GFXROM_LOAD_128K( "atobj6.bin", 0x300000, CRC(12f6a569) SHA1(e3051de0961f34e15b8642fa769deac3cb0c8305) ) NAMCOS2_GFXROM_LOAD_128K( "atobj7.bin", 0x380000, CRC(06a929f2) SHA1(65308972a27ab4a649fd08414a89e6f97a09240e) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "atchr0.bin", 0x000000, CRC(6f8e968a) SHA1(b771359a3b08c1aeeb248eff325b19238bb88bf8) ) NAMCOS2_GFXROM_LOAD_128K( "atchr1.bin", 0x080000, CRC(88cf7cbe) SHA1(df7565cb36658311b784d5406dc6f83141af58a9) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "atroz0.bin", 0x000000, CRC(8c247a97) SHA1(e06dc0b46fa06f41d2017ec8113baf5c4ba832ab) ) NAMCOS2_GFXROM_LOAD_128K( "atroz1.bin", 0x080000, CRC(e44c475b) SHA1(64768692a8d38377fa1109cd9f7c86b31c01e13c) ) NAMCOS2_GFXROM_LOAD_128K( "atroz2.bin", 0x100000, CRC(770f377f) SHA1(3a7d4f4b9eb01d4366119f34b0d7d7db2f5a2471) ) @@ -2470,7 +2383,7 @@ ROM_START( assaultj ) NAMCOS2_GFXROM_LOAD_128K( "atroz6.bin", 0x300000, CRC(9089e477) SHA1(929d7d81c05aa148212e22969d147296811d433c) ) NAMCOS2_GFXROM_LOAD_128K( "atroz7.bin", 0x380000, CRC(62b2783a) SHA1(d1ba043a2ec9390c2f281f53de6e59bd936ea6f6) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "atshape.bin", 0x000000, CRC(dfcad82b) SHA1(9c3826b8dc36fa0d71c0de7f8be3479d9a025803) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -2497,7 +2410,7 @@ ROM_START( assaultp ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65b.bin", 0x000000, 0x008000, CRC(e9f2922a) SHA1(5767d2f85e1eb3de19192e73b02221f28b1fbb83) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ NAMCOS2_GFXROM_LOAD_128K( "atobj0.bin", 0x000000, CRC(22240076) SHA1(916fc0e6b338a6dda84399df910c3c9463e6b915) ) NAMCOS2_GFXROM_LOAD_128K( "atobj1.bin", 0x080000, CRC(2284a8e8) SHA1(80f9143e08f9f8ff3e937312a8ce76855a1929ad) ) NAMCOS2_GFXROM_LOAD_128K( "atobj2.bin", 0x100000, CRC(51425476) SHA1(12a2fb1b61adfa4c21a5af4f206ffe48a045a953) ) @@ -2507,11 +2420,11 @@ ROM_START( assaultp ) NAMCOS2_GFXROM_LOAD_128K( "atobj6.bin", 0x300000, CRC(12f6a569) SHA1(e3051de0961f34e15b8642fa769deac3cb0c8305) ) NAMCOS2_GFXROM_LOAD_128K( "atobj7.bin", 0x380000, CRC(06a929f2) SHA1(65308972a27ab4a649fd08414a89e6f97a09240e) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "atchr0.bin", 0x000000, CRC(6f8e968a) SHA1(b771359a3b08c1aeeb248eff325b19238bb88bf8) ) NAMCOS2_GFXROM_LOAD_128K( "atchr1.bin", 0x080000, CRC(88cf7cbe) SHA1(df7565cb36658311b784d5406dc6f83141af58a9) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "atroz0.bin", 0x000000, CRC(8c247a97) SHA1(e06dc0b46fa06f41d2017ec8113baf5c4ba832ab) ) NAMCOS2_GFXROM_LOAD_128K( "atroz1.bin", 0x080000, CRC(e44c475b) SHA1(64768692a8d38377fa1109cd9f7c86b31c01e13c) ) NAMCOS2_GFXROM_LOAD_128K( "atroz2.bin", 0x100000, CRC(770f377f) SHA1(3a7d4f4b9eb01d4366119f34b0d7d7db2f5a2471) ) @@ -2521,7 +2434,7 @@ ROM_START( assaultp ) NAMCOS2_GFXROM_LOAD_128K( "atroz6.bin", 0x300000, CRC(9089e477) SHA1(929d7d81c05aa148212e22969d147296811d433c) ) NAMCOS2_GFXROM_LOAD_128K( "atroz7.bin", 0x380000, CRC(62b2783a) SHA1(d1ba043a2ec9390c2f281f53de6e59bd936ea6f6) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "atshape.bin", 0x000000, CRC(dfcad82b) SHA1(9c3826b8dc36fa0d71c0de7f8be3479d9a025803) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -2548,13 +2461,13 @@ ROM_START( burnforc ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "bu_obj-0.bin", 0x000000, 0x80000, CRC(24c919a1) SHA1(ddf5bfbf1bbe2a10d6708b618b77f1d6d7862372) ) ROM_LOAD( "bu_obj-1.bin", 0x080000, 0x80000, CRC(5bcb519b) SHA1(1d2979a4bed7e952ec77d3a5891a6412044d5f49) ) ROM_LOAD( "bu_obj-2.bin", 0x100000, 0x80000, CRC(509dd5d0) SHA1(68a9054fcde7b677f529ef4db6a8b29750649a2a) ) ROM_LOAD( "bu_obj-3.bin", 0x180000, 0x80000, CRC(270a161e) SHA1(e26092b6950e2adba34f0c5c08179b83fcd86949) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "bu_chr-0.bin", 0x000000, CRC(c2109f73) SHA1(5f09aa9afb027850f21175614c24071db8c754b5) ) NAMCOS2_GFXROM_LOAD_128K( "bu_chr-1.bin", 0x080000, CRC(67d6aa67) SHA1(ac7791e4984c6e736ab12e538d856e4fc63383b4) ) NAMCOS2_GFXROM_LOAD_128K( "bu_chr-2.bin", 0x100000, CRC(52846eff) SHA1(f925512f382a51040401d5833015cce17b8eb1fd) ) @@ -2562,7 +2475,7 @@ ROM_START( burnforc ) NAMCOS2_GFXROM_LOAD_128K( "bu_chr-4.bin", 0x200000, CRC(81a66286) SHA1(650273269cba96f223413ec04928408378170f62) ) NAMCOS2_GFXROM_LOAD_128K( "bu_chr-5.bin", 0x280000, CRC(629aa67f) SHA1(f626b2faf8a1eed1a59124e74fbc05cd99dfb1d9) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "bu_roz-0.bin", 0x000000, CRC(65fefc83) SHA1(cf11e62476ca41f76b685011f94234769e37bf5f) ) NAMCOS2_GFXROM_LOAD_128K( "bu_roz-1.bin", 0x080000, CRC(979580c2) SHA1(cac8342fd4c41084ce6f578206a9c20d399babde) ) NAMCOS2_GFXROM_LOAD_128K( "bu_roz-2.bin", 0x100000, CRC(548b6ad8) SHA1(170113dc6f61ad737f72f58a29ea61347f819ddb) ) @@ -2571,7 +2484,7 @@ ROM_START( burnforc ) NAMCOS2_GFXROM_LOAD_128K( "bu_roz-5.bin", 0x280000, CRC(4b864b0e) SHA1(a0b23f49fc85d39bc9dc950ac763fe12454dcdb1) ) NAMCOS2_GFXROM_LOAD_128K( "bu_roz-6.bin", 0x300000, CRC(38bd25ba) SHA1(8eb6ba969660ab62102ded2f0c39837fd90f3f7d) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "bu_shape.bin", 0x000000,CRC(80a6b722) SHA1(2c24327a890310c5e8086dc6821627108a88c62e) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -2597,13 +2510,13 @@ ROM_START( burnforco ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "bu_obj-0.bin", 0x000000, 0x80000, CRC(24c919a1) SHA1(ddf5bfbf1bbe2a10d6708b618b77f1d6d7862372) ) ROM_LOAD( "bu_obj-1.bin", 0x080000, 0x80000, CRC(5bcb519b) SHA1(1d2979a4bed7e952ec77d3a5891a6412044d5f49) ) ROM_LOAD( "bu_obj-2.bin", 0x100000, 0x80000, CRC(509dd5d0) SHA1(68a9054fcde7b677f529ef4db6a8b29750649a2a) ) ROM_LOAD( "bu_obj-3.bin", 0x180000, 0x80000, CRC(270a161e) SHA1(e26092b6950e2adba34f0c5c08179b83fcd86949) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "bu_chr-0.bin", 0x000000, CRC(c2109f73) SHA1(5f09aa9afb027850f21175614c24071db8c754b5) ) NAMCOS2_GFXROM_LOAD_128K( "bu_chr-1.bin", 0x080000, CRC(67d6aa67) SHA1(ac7791e4984c6e736ab12e538d856e4fc63383b4) ) NAMCOS2_GFXROM_LOAD_128K( "bu_chr-2.bin", 0x100000, CRC(52846eff) SHA1(f925512f382a51040401d5833015cce17b8eb1fd) ) @@ -2611,7 +2524,7 @@ ROM_START( burnforco ) NAMCOS2_GFXROM_LOAD_128K( "bu_chr-4.bin", 0x200000, CRC(81a66286) SHA1(650273269cba96f223413ec04928408378170f62) ) NAMCOS2_GFXROM_LOAD_128K( "bu_chr-5.bin", 0x280000, CRC(629aa67f) SHA1(f626b2faf8a1eed1a59124e74fbc05cd99dfb1d9) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "bu_roz-0.bin", 0x000000, CRC(65fefc83) SHA1(cf11e62476ca41f76b685011f94234769e37bf5f) ) NAMCOS2_GFXROM_LOAD_128K( "bu_roz-1.bin", 0x080000, CRC(979580c2) SHA1(cac8342fd4c41084ce6f578206a9c20d399babde) ) NAMCOS2_GFXROM_LOAD_128K( "bu_roz-2.bin", 0x100000, CRC(548b6ad8) SHA1(170113dc6f61ad737f72f58a29ea61347f819ddb) ) @@ -2620,7 +2533,7 @@ ROM_START( burnforco ) NAMCOS2_GFXROM_LOAD_128K( "bu_roz-5.bin", 0x280000, CRC(4b864b0e) SHA1(a0b23f49fc85d39bc9dc950ac763fe12454dcdb1) ) NAMCOS2_GFXROM_LOAD_128K( "bu_roz-6.bin", 0x300000, CRC(38bd25ba) SHA1(8eb6ba969660ab62102ded2f0c39837fd90f3f7d) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "bu_shape.bin", 0x000000,CRC(80a6b722) SHA1(2c24327a890310c5e8086dc6821627108a88c62e) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -2647,22 +2560,22 @@ ROM_START( cosmogng ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "co1obj0.bin", 0x000000, 0x80000, CRC(5df8ce0c) SHA1(afb9fb6e048af5aed8976192b847c0674c5e5ce1) ) ROM_LOAD( "co1obj1.bin", 0x080000, 0x80000, CRC(3d152497) SHA1(70c6725cacf86ba4d4b9dbeed7a1e04df9301228) ) ROM_LOAD( "co1obj2.bin", 0x100000, 0x80000, CRC(4e50b6ee) SHA1(0fd4c19fa77ba6774237c760ac1096d4806248dd) ) ROM_LOAD( "co1obj3.bin", 0x180000, 0x80000, CRC(7beed669) SHA1(92e5eb2a8de3ff71c002807f31581a79a5db5422) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "co1chr0.bin", 0x000000, 0x80000, CRC(ee375b3e) SHA1(e7cc3a137450a79c6068c3bf2c15149f6f6dd18a) ) ROM_LOAD( "co1chr1.bin", 0x080000, 0x80000, CRC(0149de65) SHA1(36d42e56251c850e26ee2253cebf62682ac7516f) ) ROM_LOAD( "co1chr2.bin", 0x100000, 0x80000, CRC(93d565a0) SHA1(c6e993dc77c5a30daee5de4363454e2ccf3bd02d) ) ROM_LOAD( "co1chr3.bin", 0x180000, 0x80000, CRC(4d971364) SHA1(579f7e37bfa37b8b152ac44cdfe712c2ec2cda8b) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ ROM_LOAD( "co1roz0.bin", 0x000000, 0x80000, CRC(2bea6951) SHA1(273e3e8ccb042ec794b1709d6626603c8a39a73a) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "co1sha0.bin", 0x000000, 0x80000, CRC(063a70cc) SHA1(c3179d55d57c47d3fef49d45e45b88c4d8250548) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -2690,22 +2603,22 @@ ROM_START( cosmogngj ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "co1obj0.bin", 0x000000, 0x80000, CRC(5df8ce0c) SHA1(afb9fb6e048af5aed8976192b847c0674c5e5ce1) ) ROM_LOAD( "co1obj1.bin", 0x080000, 0x80000, CRC(3d152497) SHA1(70c6725cacf86ba4d4b9dbeed7a1e04df9301228) ) ROM_LOAD( "co1obj2.bin", 0x100000, 0x80000, CRC(4e50b6ee) SHA1(0fd4c19fa77ba6774237c760ac1096d4806248dd) ) ROM_LOAD( "co1obj3.bin", 0x180000, 0x80000, CRC(7beed669) SHA1(92e5eb2a8de3ff71c002807f31581a79a5db5422) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "co1chr0.bin", 0x000000, 0x80000, CRC(ee375b3e) SHA1(e7cc3a137450a79c6068c3bf2c15149f6f6dd18a) ) ROM_LOAD( "co1chr1.bin", 0x080000, 0x80000, CRC(0149de65) SHA1(36d42e56251c850e26ee2253cebf62682ac7516f) ) ROM_LOAD( "co1chr2.bin", 0x100000, 0x80000, CRC(93d565a0) SHA1(c6e993dc77c5a30daee5de4363454e2ccf3bd02d) ) ROM_LOAD( "co1chr3.bin", 0x180000, 0x80000, CRC(4d971364) SHA1(579f7e37bfa37b8b152ac44cdfe712c2ec2cda8b) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ ROM_LOAD( "co1roz0.bin", 0x000000, 0x80000, CRC(2bea6951) SHA1(273e3e8ccb042ec794b1709d6626603c8a39a73a) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "co1sha0.bin", 0x000000, 0x80000, CRC(063a70cc) SHA1(c3179d55d57c47d3fef49d45e45b88c4d8250548) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -2733,19 +2646,19 @@ ROM_START( dirtfoxj ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "df1_obj0.bin", 0x000000, 0x80000, CRC(b6bd1a68) SHA1(38677b54cd257411db499ba03b9176422797bf64) ) ROM_LOAD( "df1_obj1.bin", 0x080000, 0x80000, CRC(05421dc1) SHA1(d538bb33b1ec1a3ad0feaa75d69a7a327c7dc6fa) ) ROM_LOAD( "df1_obj2.bin", 0x100000, 0x80000, CRC(9390633e) SHA1(91d1a7f2c981c893e4c5d0c6c7199646b86bd1e0) ) ROM_LOAD( "df1_obj3.bin", 0x180000, 0x80000, CRC(c8447b33) SHA1(1f62af3a8b16915adf993ed675cba368f13d4acf) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "df1_chr0.bin", 0x000000, CRC(4b10e4ed) SHA1(b3c56f712b05837590d25dfa7535b0f63cbd61c5) ) NAMCOS2_GFXROM_LOAD_128K( "df1_chr1.bin", 0x080000, CRC(8f63f3d6) SHA1(4432b611550e6890bc351a0db7a90deabe489824) ) NAMCOS2_GFXROM_LOAD_128K( "df1_chr2.bin", 0x100000, CRC(5a1b852a) SHA1(84cbfc04614ed85fdf0efe5ab10d1b6e86bea028) ) NAMCOS2_GFXROM_LOAD_128K( "df1_chr3.bin", 0x180000, CRC(28570676) SHA1(2a0c90839fda6153f6fe42a759d51293998034e2) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_256K( "df1_roz0.bin", 0x000000, CRC(a6129f94) SHA1(5c6f36dce703d985704676948999c81374ac1856) ) NAMCOS2_GFXROM_LOAD_256K( "df1_roz1.bin", 0x080000, CRC(c8e7ce73) SHA1(7e113a56c6c115c251bf8b17d763c8955757edd2) ) NAMCOS2_GFXROM_LOAD_256K( "df1_roz2.bin", 0x100000, CRC(c598e923) SHA1(67b8d74c7a44a896d842271842bb5d2b26d565be) ) @@ -2755,7 +2668,7 @@ ROM_START( dirtfoxj ) NAMCOS2_GFXROM_LOAD_256K( "df1_roz6.bin", 0x300000, CRC(7f3a1ed9) SHA1(df62bc3a236046b73b296cb396f6e7ee6861de09) ) NAMCOS2_GFXROM_LOAD_256K( "df1_roz7.bin", 0x380000, CRC(dd546ae8) SHA1(a5b50b4e8027027ec272ed5c71c7bff4b03e9f92) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "df1_sha.bin", 0x000000, CRC(9a7c9a9b) SHA1(06221ae8d3f6bebbb5a7ab2eaaf35b9922389115) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -2786,20 +2699,20 @@ ROM_START( dsaber ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "do obj-0a.obj0", 0x000000, 0x80000, CRC(f08c6648) SHA1(ac5221ba159f2390060cbbb7d9cd8148c7bb4a02) ) ROM_LOAD( "do obj-1a.obj1", 0x080000, 0x80000, CRC(34e0810d) SHA1(679d9b82879cff5197a5098e5dc724c85373b9dc) ) ROM_LOAD( "do obj-2a.obj2", 0x100000, 0x80000, CRC(bccdabf3) SHA1(d079d89083ac6e71ac8926792d0d7cdcebc848a9) ) ROM_LOAD( "do obj-3a.obj3", 0x180000, 0x80000, CRC(2a60a4b8) SHA1(5923e08121ad27629bd917d890e037e888e6d356) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "do chr-0a.chr0", 0x000000, 0x80000, CRC(c6058df6) SHA1(13bacad6d593aa5533161e410e22f351c77f29c4) ) ROM_LOAD( "do chr-1a.chr1", 0x080000, 0x80000, CRC(67aaab36) SHA1(3abb7e226badcfe016325d42c40f06ee020124e3) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ ROM_LOAD( "roz0.bin", 0x000000, 0x80000, CRC(32aab758) SHA1(a3220c2a02b9d8bdd95004d36d2aa5ddf57adfbb) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "shape.bin", 0x000000, 0x80000, CRC(698e7a3e) SHA1(4d41bf0242626ca1448d1f650c84b5987a7f6597) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -2834,20 +2747,20 @@ ROM_START( dsabera ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "do obj-0a.obj0", 0x000000, 0x80000, CRC(f08c6648) SHA1(ac5221ba159f2390060cbbb7d9cd8148c7bb4a02) ) ROM_LOAD( "do obj-1a.obj1", 0x080000, 0x80000, CRC(34e0810d) SHA1(679d9b82879cff5197a5098e5dc724c85373b9dc) ) ROM_LOAD( "do obj-2a.obj2", 0x100000, 0x80000, CRC(bccdabf3) SHA1(d079d89083ac6e71ac8926792d0d7cdcebc848a9) ) ROM_LOAD( "do obj-3a.obj3", 0x180000, 0x80000, CRC(2a60a4b8) SHA1(5923e08121ad27629bd917d890e037e888e6d356) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "do chr-0a.chr0", 0x000000, 0x80000, CRC(c6058df6) SHA1(13bacad6d593aa5533161e410e22f351c77f29c4) ) ROM_LOAD( "do chr-1a.chr1", 0x080000, 0x80000, CRC(67aaab36) SHA1(3abb7e226badcfe016325d42c40f06ee020124e3) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ ROM_LOAD( "roz0.bin", 0x000000, 0x80000, CRC(32aab758) SHA1(a3220c2a02b9d8bdd95004d36d2aa5ddf57adfbb) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "shape.bin", 0x000000, 0x80000, CRC(698e7a3e) SHA1(4d41bf0242626ca1448d1f650c84b5987a7f6597) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -2881,20 +2794,20 @@ ROM_START( dsaberj ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "do obj-0a.obj0", 0x000000, 0x80000, CRC(f08c6648) SHA1(ac5221ba159f2390060cbbb7d9cd8148c7bb4a02) ) ROM_LOAD( "do obj-1a.obj1", 0x080000, 0x80000, CRC(34e0810d) SHA1(679d9b82879cff5197a5098e5dc724c85373b9dc) ) ROM_LOAD( "do obj-2a.obj2", 0x100000, 0x80000, CRC(bccdabf3) SHA1(d079d89083ac6e71ac8926792d0d7cdcebc848a9) ) ROM_LOAD( "do obj-3a.obj3", 0x180000, 0x80000, CRC(2a60a4b8) SHA1(5923e08121ad27629bd917d890e037e888e6d356) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "do chr-0a.chr0", 0x000000, 0x80000, CRC(c6058df6) SHA1(13bacad6d593aa5533161e410e22f351c77f29c4) ) ROM_LOAD( "do chr-1a.chr1", 0x080000, 0x80000, CRC(67aaab36) SHA1(3abb7e226badcfe016325d42c40f06ee020124e3) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ ROM_LOAD( "roz0.bin", 0x000000, 0x80000, CRC(32aab758) SHA1(a3220c2a02b9d8bdd95004d36d2aa5ddf57adfbb) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "shape.bin", 0x000000, 0x80000, CRC(698e7a3e) SHA1(4d41bf0242626ca1448d1f650c84b5987a7f6597) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -2927,14 +2840,14 @@ ROM_START( finallap ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ /* no external MCU ROM? previously loaded type C, but the game predates it */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_FILL( 0, 0x200000, 0xff ) ROM_LOAD( "obj-0b", 0x200000, 0x80000, CRC(c6986523) SHA1(1a4b0e95ade6314850b6e44f2debda0ab6e91397) ) ROM_LOAD( "obj-1b", 0x280000, 0x80000, CRC(6af7d284) SHA1(c74f975c301ff15040be1b38359624ec9c83ac76) ) ROM_LOAD( "obj-2b", 0x300000, 0x80000, CRC(de45ca8d) SHA1(f476ff1719f60d721d55fd1e40e465f48e7ed019) ) ROM_LOAD( "obj-3b", 0x380000, 0x80000, CRC(dba830a2) SHA1(5bd899b39458978dd419bf01082782a02b2d9c20) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "fl1-c0", 0x000000, CRC(cd9d2966) SHA1(39671f846542ba6ae47764674509127cf73e3d71) ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c1", 0x080000, CRC(b0efec87) SHA1(6d042f35942c2bdbf5aeb31358d3837ee9c8e5fa) ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c2", 0x100000, CRC(263b8e31) SHA1(e2665edd89f7bb8c699e61df6de6a2e8e0698092) ) @@ -2943,7 +2856,7 @@ ROM_START( finallap ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c5", 0x280000, CRC(ab89da77) SHA1(5cbead4289269a832c0d44d0ded79b58fcc4cc17) ) NAMCOS2_GFXROM_LOAD_128K( "fl2-c6", 0x300000, CRC(239bd9a0) SHA1(729abe89bea31b4e21161c69579df775b1cba6fe) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "fl2-sha", 0x000000, CRC(5fda0b6d) SHA1(92c0410e159977ea73a8e8c0cb1321c3056f6c2f) ) ROM_REGION16_BE( 0x200000, "data_rom", ROMREGION_ERASEFF ) /* Shared data roms */ @@ -2979,14 +2892,14 @@ ROM_START( finallapd ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ /* no external MCU ROM? previously loaded type C, but the game predates it */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_FILL( 0, 0x200000, 0xff ) ROM_LOAD( "obj-0b", 0x200000, 0x80000, CRC(c6986523) SHA1(1a4b0e95ade6314850b6e44f2debda0ab6e91397) ) ROM_LOAD( "obj-1b", 0x280000, 0x80000, CRC(6af7d284) SHA1(c74f975c301ff15040be1b38359624ec9c83ac76) ) ROM_LOAD( "obj-2b", 0x300000, 0x80000, CRC(de45ca8d) SHA1(f476ff1719f60d721d55fd1e40e465f48e7ed019) ) ROM_LOAD( "obj-3b", 0x380000, 0x80000, CRC(dba830a2) SHA1(5bd899b39458978dd419bf01082782a02b2d9c20) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "fl1-c0", 0x000000, CRC(cd9d2966) SHA1(39671f846542ba6ae47764674509127cf73e3d71) ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c1", 0x080000, CRC(b0efec87) SHA1(6d042f35942c2bdbf5aeb31358d3837ee9c8e5fa) ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c2", 0x100000, CRC(263b8e31) SHA1(e2665edd89f7bb8c699e61df6de6a2e8e0698092) ) @@ -2995,7 +2908,7 @@ ROM_START( finallapd ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c5", 0x280000, CRC(ab89da77) SHA1(5cbead4289269a832c0d44d0ded79b58fcc4cc17) ) NAMCOS2_GFXROM_LOAD_128K( "fl2-c6", 0x300000, CRC(239bd9a0) SHA1(729abe89bea31b4e21161c69579df775b1cba6fe) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "fl2-sha", 0x000000, CRC(5fda0b6d) SHA1(92c0410e159977ea73a8e8c0cb1321c3056f6c2f) ) ROM_REGION16_BE( 0x200000, "data_rom", ROMREGION_ERASEFF ) /* Shared data roms */ @@ -3031,14 +2944,14 @@ ROM_START( finallapc ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ /* no external MCU ROM? previously loaded type C, but the game predates it */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_FILL( 0, 0x200000, 0xff ) ROM_LOAD( "obj-0b", 0x200000, 0x80000, CRC(c6986523) SHA1(1a4b0e95ade6314850b6e44f2debda0ab6e91397) ) ROM_LOAD( "obj-1b", 0x280000, 0x80000, CRC(6af7d284) SHA1(c74f975c301ff15040be1b38359624ec9c83ac76) ) ROM_LOAD( "obj-2b", 0x300000, 0x80000, CRC(de45ca8d) SHA1(f476ff1719f60d721d55fd1e40e465f48e7ed019) ) ROM_LOAD( "obj-3b", 0x380000, 0x80000, CRC(dba830a2) SHA1(5bd899b39458978dd419bf01082782a02b2d9c20) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "fl1-c0", 0x000000, CRC(cd9d2966) SHA1(39671f846542ba6ae47764674509127cf73e3d71) ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c1", 0x080000, CRC(b0efec87) SHA1(6d042f35942c2bdbf5aeb31358d3837ee9c8e5fa) ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c2", 0x100000, CRC(263b8e31) SHA1(e2665edd89f7bb8c699e61df6de6a2e8e0698092) ) @@ -3047,7 +2960,7 @@ ROM_START( finallapc ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c5", 0x280000, CRC(ab89da77) SHA1(5cbead4289269a832c0d44d0ded79b58fcc4cc17) ) NAMCOS2_GFXROM_LOAD_128K( "fl2-c6", 0x300000, CRC(239bd9a0) SHA1(729abe89bea31b4e21161c69579df775b1cba6fe) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "fl2-sha", 0x000000, CRC(5fda0b6d) SHA1(92c0410e159977ea73a8e8c0cb1321c3056f6c2f) ) ROM_REGION16_BE( 0x200000, "data_rom", ROMREGION_ERASEFF ) /* Shared data roms */ @@ -3083,14 +2996,14 @@ ROM_START( finallapjc ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ /* no external MCU ROM? previously loaded type C, but the game predates it */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_FILL( 0, 0x200000, 0xff ) ROM_LOAD( "obj-0b", 0x200000, 0x80000, CRC(c6986523) SHA1(1a4b0e95ade6314850b6e44f2debda0ab6e91397) ) ROM_LOAD( "obj-1b", 0x280000, 0x80000, CRC(6af7d284) SHA1(c74f975c301ff15040be1b38359624ec9c83ac76) ) ROM_LOAD( "obj-2b", 0x300000, 0x80000, CRC(de45ca8d) SHA1(f476ff1719f60d721d55fd1e40e465f48e7ed019) ) ROM_LOAD( "obj-3b", 0x380000, 0x80000, CRC(dba830a2) SHA1(5bd899b39458978dd419bf01082782a02b2d9c20) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "fl1-c0", 0x000000, CRC(cd9d2966) SHA1(39671f846542ba6ae47764674509127cf73e3d71) ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c1", 0x080000, CRC(b0efec87) SHA1(6d042f35942c2bdbf5aeb31358d3837ee9c8e5fa) ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c2", 0x100000, CRC(263b8e31) SHA1(e2665edd89f7bb8c699e61df6de6a2e8e0698092) ) @@ -3099,7 +3012,7 @@ ROM_START( finallapjc ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c5", 0x280000, CRC(ab89da77) SHA1(5cbead4289269a832c0d44d0ded79b58fcc4cc17) ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c6", 0x300000, CRC(8e78a3c3) SHA1(d1cd7fad038d52430f933b3ee2440554d2aeade9) ) // Japan specific (was labeled fl2 - seems like fl1 is correct, fl2 is the english version?) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "fl1_sha.bin", 0x000000, CRC(b7e1c7a3) SHA1(b82f9b340d95b80a12286647adba8c139b4d081a) ) ROM_REGION16_BE( 0x200000, "data_rom", ROMREGION_ERASEFF ) /* Shared data roms */ @@ -3135,14 +3048,14 @@ ROM_START( finallapjb ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ /* no external MCU ROM? previously loaded type C, but the game predates it */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_FILL( 0, 0x200000, 0xff ) ROM_LOAD( "obj-0b", 0x200000, 0x80000, CRC(c6986523) SHA1(1a4b0e95ade6314850b6e44f2debda0ab6e91397) ) ROM_LOAD( "obj-1b", 0x280000, 0x80000, CRC(6af7d284) SHA1(c74f975c301ff15040be1b38359624ec9c83ac76) ) ROM_LOAD( "obj-2b", 0x300000, 0x80000, CRC(de45ca8d) SHA1(f476ff1719f60d721d55fd1e40e465f48e7ed019) ) ROM_LOAD( "obj-3b", 0x380000, 0x80000, CRC(dba830a2) SHA1(5bd899b39458978dd419bf01082782a02b2d9c20) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "fl1-c0", 0x000000, CRC(cd9d2966) SHA1(39671f846542ba6ae47764674509127cf73e3d71) ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c1", 0x080000, CRC(b0efec87) SHA1(6d042f35942c2bdbf5aeb31358d3837ee9c8e5fa) ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c2", 0x100000, CRC(263b8e31) SHA1(e2665edd89f7bb8c699e61df6de6a2e8e0698092) ) @@ -3151,7 +3064,7 @@ ROM_START( finallapjb ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c5", 0x280000, CRC(ab89da77) SHA1(5cbead4289269a832c0d44d0ded79b58fcc4cc17) ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c6", 0x300000, CRC(8e78a3c3) SHA1(d1cd7fad038d52430f933b3ee2440554d2aeade9) ) // Japan specific (was labeled fl2 - seems like fl1 is correct, fl2 is the english version?) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "fl1_sha.bin", 0x000000, CRC(b7e1c7a3) SHA1(b82f9b340d95b80a12286647adba8c139b4d081a) ) ROM_REGION16_BE( 0x200000, "data_rom", ROMREGION_ERASEFF ) /* Shared data roms */ @@ -3186,7 +3099,7 @@ ROM_START( finalap2 ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "fl2obj0", 0x000000, 0x80000, CRC(3657dd7a) SHA1(8f286ec0642b09ff42bf0dbd784ae257d4ab278a) ) ROM_LOAD( "fl2obj2", 0x080000, 0x80000, CRC(8ac933fd) SHA1(b158df2ec55f49ec05861075c8d7bd265361dab0) ) ROM_LOAD( "fl2obj4", 0x100000, 0x80000, CRC(e7b989e6) SHA1(485e8148510edd1645f5b4fbbc9a53e8bf1c3e5f) ) @@ -3196,7 +3109,7 @@ ROM_START( finalap2 ) ROM_LOAD( "fl2obj5", 0x300000, 0x80000, CRC(d74ae0d3) SHA1(96c9798378da7bdc127ed7d02a4dd14dfd142550) ) ROM_LOAD( "fl2obj7", 0x380000, 0x80000, CRC(5ca68c93) SHA1(fa326992338843ccfa458a5b85ba58537da666d0) ) - ROM_REGION( 0x200000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x200000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "fls2chr0", 0x000000, 0x40000, CRC(7bbda499) SHA1(cf6ff072a40063cbe41eae1f60b29447a0020926) ) ROM_LOAD( "fls2chr1", 0x040000, 0x40000, CRC(ac8940e5) SHA1(449687d38cf830445df713ed4d675ed94ca5b375) ) ROM_LOAD( "fls2chr2", 0x080000, 0x40000, CRC(1756173d) SHA1(c912163979098387aea9a0580e9ca55c1f7275f3) ) @@ -3206,7 +3119,7 @@ ROM_START( finalap2 ) ROM_LOAD( "fls2chr6", 0x180000, 0x40000, CRC(1ef4bdde) SHA1(ceb36c021450efa4cb0fee278fa0b9d65f7d1f05) ) ROM_LOAD( "fls2chr7", 0x1c0000, 0x40000, CRC(53dafcde) SHA1(f9d9460349b34bda95b8c206af7ce2347c951214) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_256K( "fls2sha", 0x000000, CRC(f7b40a85) SHA1(a458a1cc0dae757fe8a15cb5f5ae46d3c033df00) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -3240,7 +3153,7 @@ ROM_START( finalap2j ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "fl2obj0", 0x000000, 0x80000, CRC(3657dd7a) SHA1(8f286ec0642b09ff42bf0dbd784ae257d4ab278a) ) ROM_LOAD( "fl2obj2", 0x080000, 0x80000, CRC(8ac933fd) SHA1(b158df2ec55f49ec05861075c8d7bd265361dab0) ) ROM_LOAD( "fl2obj4", 0x100000, 0x80000, CRC(e7b989e6) SHA1(485e8148510edd1645f5b4fbbc9a53e8bf1c3e5f) ) @@ -3251,7 +3164,7 @@ ROM_START( finalap2j ) ROM_LOAD( "fl2obj7", 0x380000, 0x80000, CRC(5ca68c93) SHA1(fa326992338843ccfa458a5b85ba58537da666d0) ) // The Japanese version should not be using the same ROMs as the World version here, causes corrupt text in attract mode should probably be fls1 - ROM_REGION( 0x200000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x200000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "fls2chr0", 0x000000, 0x40000, BAD_DUMP CRC(7bbda499) SHA1(cf6ff072a40063cbe41eae1f60b29447a0020926) ) ROM_LOAD( "fls2chr1", 0x040000, 0x40000, BAD_DUMP CRC(ac8940e5) SHA1(449687d38cf830445df713ed4d675ed94ca5b375) ) ROM_LOAD( "fls2chr2", 0x080000, 0x40000, BAD_DUMP CRC(1756173d) SHA1(c912163979098387aea9a0580e9ca55c1f7275f3) ) @@ -3261,7 +3174,7 @@ ROM_START( finalap2j ) ROM_LOAD( "fls2chr6", 0x180000, 0x40000, BAD_DUMP CRC(1ef4bdde) SHA1(ceb36c021450efa4cb0fee278fa0b9d65f7d1f05) ) ROM_LOAD( "fls2chr7", 0x1c0000, 0x40000, BAD_DUMP CRC(53dafcde) SHA1(f9d9460349b34bda95b8c206af7ce2347c951214) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_256K( "fls2sha", 0x000000, BAD_DUMP CRC(f7b40a85) SHA1(a458a1cc0dae757fe8a15cb5f5ae46d3c033df00) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -3295,7 +3208,7 @@ ROM_START( finalap3 ) // this set displays MOTION (Ver. 3) in the test mode menu ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "flt_obj-0.4c", 0x000000, 0x80000, CRC(eab19ec6) SHA1(2859e88b94aa873f3b6ba22790f2211f3e172dd1) ) ROM_LOAD( "flt_obj-2.4a", 0x080000, 0x80000, CRC(2a3b7ded) SHA1(455d9d6cf7d497687f93af899fc20bbff6129391) ) ROM_LOAD( "flt_obj-4.8c", 0x100000, 0x80000, CRC(84aa500c) SHA1(087c0089478a270154f50f3b0f001428e80d74c7) ) @@ -3305,7 +3218,7 @@ ROM_START( finalap3 ) // this set displays MOTION (Ver. 3) in the test mode menu ROM_LOAD( "flt_obj-5.5c", 0x300000, 0x80000, CRC(6a53e603) SHA1(6087c694e0e30a98c84227991d9c2e9c39c3e9ca) ) ROM_LOAD( "flt_obj-7.6a", 0x380000, 0x80000, CRC(b52a85e2) SHA1(1eea10eb20ae56309397238a52e9ea0756912412) ) - ROM_REGION( 0x200000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x200000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "flt2_chr-0.11n", 0x000000, 0x40000, CRC(5954f270) SHA1(6f26365d89f38d4ab477908f32823e06f1a84e09) ) ROM_LOAD( "fltchr-1.11p", 0x040000, 0x40000, CRC(2e68d13c) SHA1(46bb0628da1f97e0f6865f37e53a01d2e8391255) ) ROM_LOAD( "flt2_chr-2.11r", 0x080000, 0x40000, CRC(98f3b190) SHA1(4858dab070c0c46d37148312664c6a616765c240) ) @@ -3315,7 +3228,7 @@ ROM_START( finalap3 ) // this set displays MOTION (Ver. 3) in the test mode menu ROM_LOAD( "fltchr-6.9r", 0x180000, 0x40000, CRC(4b0baea2) SHA1(a75ba5294f06ddbe170988073b8f4a74a7cbcee1) ) ROM_LOAD( "fltchr-7.9s", 0x1c0000, 0x40000, CRC(85db9e94) SHA1(918f414c1dd51f7451a9a491ba1d60f5f9a38c3e) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_256K( "flt2_sha.7n", 0x000000, CRC(6986565b) SHA1(df95f2ad5d1e938551d33153f2dcc4711ffd0eba) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data ROMs */ @@ -3353,7 +3266,7 @@ ROM_START( finalap3a ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "flt_obj-0.4c", 0x000000, 0x80000, CRC(eab19ec6) SHA1(2859e88b94aa873f3b6ba22790f2211f3e172dd1) ) ROM_LOAD( "flt_obj-2.4a", 0x080000, 0x80000, CRC(2a3b7ded) SHA1(455d9d6cf7d497687f93af899fc20bbff6129391) ) ROM_LOAD( "flt_obj-4.8c", 0x100000, 0x80000, CRC(84aa500c) SHA1(087c0089478a270154f50f3b0f001428e80d74c7) ) @@ -3363,7 +3276,7 @@ ROM_START( finalap3a ) ROM_LOAD( "flt_obj-5.5c", 0x300000, 0x80000, CRC(6a53e603) SHA1(6087c694e0e30a98c84227991d9c2e9c39c3e9ca) ) ROM_LOAD( "flt_obj-7.6a", 0x380000, 0x80000, CRC(b52a85e2) SHA1(1eea10eb20ae56309397238a52e9ea0756912412) ) - ROM_REGION( 0x200000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x200000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "flt2_chr-0.11n", 0x000000, 0x40000, CRC(5954f270) SHA1(6f26365d89f38d4ab477908f32823e06f1a84e09) ) ROM_LOAD( "fltchr-1.11p", 0x040000, 0x40000, CRC(2e68d13c) SHA1(46bb0628da1f97e0f6865f37e53a01d2e8391255) ) ROM_LOAD( "flt2_chr-2.11r", 0x080000, 0x40000, CRC(98f3b190) SHA1(4858dab070c0c46d37148312664c6a616765c240) ) @@ -3373,7 +3286,7 @@ ROM_START( finalap3a ) ROM_LOAD( "fltchr-6.9r", 0x180000, 0x40000, CRC(4b0baea2) SHA1(a75ba5294f06ddbe170988073b8f4a74a7cbcee1) ) ROM_LOAD( "fltchr-7.9s", 0x1c0000, 0x40000, CRC(85db9e94) SHA1(918f414c1dd51f7451a9a491ba1d60f5f9a38c3e) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_256K( "flt2_sha.7n", 0x000000, CRC(6986565b) SHA1(df95f2ad5d1e938551d33153f2dcc4711ffd0eba) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data ROMs */ @@ -3414,7 +3327,7 @@ ROM_START( finalap3j ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "flt_obj-0.4c", 0x000000, 0x80000, CRC(eab19ec6) SHA1(2859e88b94aa873f3b6ba22790f2211f3e172dd1) ) ROM_LOAD( "flt_obj-2.4a", 0x080000, 0x80000, CRC(2a3b7ded) SHA1(455d9d6cf7d497687f93af899fc20bbff6129391) ) ROM_LOAD( "flt_obj-4.8c", 0x100000, 0x80000, CRC(84aa500c) SHA1(087c0089478a270154f50f3b0f001428e80d74c7) ) @@ -3424,7 +3337,7 @@ ROM_START( finalap3j ) ROM_LOAD( "flt_obj-5.5c", 0x300000, 0x80000, CRC(6a53e603) SHA1(6087c694e0e30a98c84227991d9c2e9c39c3e9ca) ) ROM_LOAD( "flt_obj-7.6a", 0x380000, 0x80000, CRC(b52a85e2) SHA1(1eea10eb20ae56309397238a52e9ea0756912412) ) - ROM_REGION( 0x200000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x200000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "fltchr-0.11n", 0x000000, 0x40000, CRC(97ed5b62) SHA1(ce076ae71c6b2950be2a303829072d59732315df) ) ROM_LOAD( "fltchr-1.11p", 0x040000, 0x40000, CRC(2e68d13c) SHA1(46bb0628da1f97e0f6865f37e53a01d2e8391255) ) ROM_LOAD( "fltchr-2.11r", 0x080000, 0x40000, CRC(43c3abf8) SHA1(de66bcdb3e419725b7e7d9ae0c95e13ee99ec5c9) ) @@ -3434,7 +3347,7 @@ ROM_START( finalap3j ) ROM_LOAD( "fltchr-6.9r", 0x180000, 0x40000, CRC(4b0baea2) SHA1(a75ba5294f06ddbe170988073b8f4a74a7cbcee1) ) ROM_LOAD( "fltchr-7.9s", 0x1c0000, 0x40000, CRC(85db9e94) SHA1(918f414c1dd51f7451a9a491ba1d60f5f9a38c3e) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_256K( "flt_sha.7n", 0x000000, CRC(211bbd83) SHA1(17502830d1af1e2cfbc17e2f3bb303f2a0c27e68) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data ROMs */ @@ -3471,7 +3384,7 @@ ROM_START( finalap3jc ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "flt_obj-0.4c", 0x000000, 0x80000, CRC(eab19ec6) SHA1(2859e88b94aa873f3b6ba22790f2211f3e172dd1) ) ROM_LOAD( "flt_obj-2.4a", 0x080000, 0x80000, CRC(2a3b7ded) SHA1(455d9d6cf7d497687f93af899fc20bbff6129391) ) ROM_LOAD( "flt_obj-4.8c", 0x100000, 0x80000, CRC(84aa500c) SHA1(087c0089478a270154f50f3b0f001428e80d74c7) ) @@ -3481,7 +3394,7 @@ ROM_START( finalap3jc ) ROM_LOAD( "flt_obj-5.5c", 0x300000, 0x80000, CRC(6a53e603) SHA1(6087c694e0e30a98c84227991d9c2e9c39c3e9ca) ) ROM_LOAD( "flt_obj-7.6a", 0x380000, 0x80000, CRC(b52a85e2) SHA1(1eea10eb20ae56309397238a52e9ea0756912412) ) - ROM_REGION( 0x200000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x200000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "flt_chr-0.11n", 0x000000, 0x40000, CRC(97ed5b62) SHA1(ce076ae71c6b2950be2a303829072d59732315df) ) ROM_LOAD( "flt_chr-1.11p", 0x040000, 0x40000, CRC(2e68d13c) SHA1(46bb0628da1f97e0f6865f37e53a01d2e8391255) ) ROM_LOAD( "flt_chr-2.11r", 0x080000, 0x40000, CRC(43c3abf8) SHA1(de66bcdb3e419725b7e7d9ae0c95e13ee99ec5c9) ) @@ -3491,7 +3404,7 @@ ROM_START( finalap3jc ) ROM_LOAD( "flt_chr-6.9r", 0x180000, 0x40000, CRC(4b0baea2) SHA1(a75ba5294f06ddbe170988073b8f4a74a7cbcee1) ) ROM_LOAD( "flt_chr-7.9s", 0x1c0000, 0x40000, CRC(85db9e94) SHA1(918f414c1dd51f7451a9a491ba1d60f5f9a38c3e) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_256K( "flt_sha.7n", 0x000000, CRC(211bbd83) SHA1(17502830d1af1e2cfbc17e2f3bb303f2a0c27e68) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data ROMs */ @@ -3527,7 +3440,7 @@ ROM_START( finalap3bl ) // bootleg set ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "fltobj0", 0x000000, 0x80000, CRC(eab19ec6) SHA1(2859e88b94aa873f3b6ba22790f2211f3e172dd1) ) ROM_LOAD( "fltobj2", 0x080000, 0x80000, CRC(2a3b7ded) SHA1(455d9d6cf7d497687f93af899fc20bbff6129391) ) ROM_LOAD( "fltobj4", 0x100000, 0x80000, CRC(84aa500c) SHA1(087c0089478a270154f50f3b0f001428e80d74c7) ) @@ -3537,7 +3450,7 @@ ROM_START( finalap3bl ) // bootleg set ROM_LOAD( "fltobj5", 0x300000, 0x80000, CRC(6a53e603) SHA1(6087c694e0e30a98c84227991d9c2e9c39c3e9ca) ) ROM_LOAD( "fltobj7", 0x380000, 0x80000, CRC(b52a85e2) SHA1(1eea10eb20ae56309397238a52e9ea0756912412) ) - ROM_REGION( 0x200000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x200000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "flt2_chr-0.bin", 0x000000, 0x40000, CRC(5954f270) SHA1(6f26365d89f38d4ab477908f32823e06f1a84e09) ) ROM_LOAD( "fltchr-1.11p", 0x040000, 0x40000, CRC(2e68d13c) SHA1(46bb0628da1f97e0f6865f37e53a01d2e8391255) ) ROM_LOAD( "flt2_chr-2.bin", 0x080000, 0x40000, CRC(98f3b190) SHA1(4858dab070c0c46d37148312664c6a616765c240) ) @@ -3547,7 +3460,7 @@ ROM_START( finalap3bl ) // bootleg set ROM_LOAD( "fltchr-6.9r", 0x180000, 0x40000, CRC(4b0baea2) SHA1(a75ba5294f06ddbe170988073b8f4a74a7cbcee1) ) ROM_LOAD( "fltchr-7.9s", 0x1c0000, 0x40000, CRC(85db9e94) SHA1(918f414c1dd51f7451a9a491ba1d60f5f9a38c3e) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_256K( "flt2_sha.bin", 0x000000, CRC(6986565b) SHA1(df95f2ad5d1e938551d33153f2dcc4711ffd0eba) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -3584,13 +3497,13 @@ ROM_START( finehour ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "fh1_ob0.bin", 0x000000, 0x80000, CRC(b1fd86f1) SHA1(5504ca1a83c329a19d5632b9ac40cfa7e8ced304) ) ROM_LOAD( "fh1_ob1.bin", 0x080000, 0x80000, CRC(519c44ce) SHA1(f4b033d1caac1944a870d94a06a40aad332a75db) ) ROM_LOAD( "fh1_ob2.bin", 0x100000, 0x80000, CRC(9c5de4fa) SHA1(ead6e53d3fd7adc6f1cb4971a0858ff0098e9897) ) ROM_LOAD( "fh1_ob3.bin", 0x180000, 0x80000, CRC(54d4edce) SHA1(1cf090b215f62528d13a8de6936be96bfe7d343a) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_256K( "fh1_ch0.bin", 0x000000, CRC(516900d1) SHA1(f3d95fa4c060a37164a6e3a87b056d032f3d1f6c) ) NAMCOS2_GFXROM_LOAD_256K( "fh1_ch1.bin", 0x080000, CRC(964d06bd) SHA1(bd9a30bde66f680fdc45cb8823fac9672075a7bb) ) NAMCOS2_GFXROM_LOAD_256K( "fh1_ch2.bin", 0x100000, CRC(fbb9449e) SHA1(291d4678e9972fd3ad2822bef90c57548d284482) ) @@ -3598,7 +3511,7 @@ ROM_START( finehour ) NAMCOS2_GFXROM_LOAD_256K( "fh1_ch4.bin", 0x200000, CRC(80dd188a) SHA1(6d4f029983e98acee612c0f394675f7dd41208c7) ) NAMCOS2_GFXROM_LOAD_256K( "fh1_ch5.bin", 0x280000, CRC(40969876) SHA1(6f444e7fc658ce557d0f54498614a2c05e14f280) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "fh1_rz0.bin", 0x000000, CRC(6c96c5c1) SHA1(a69321ccb17497671352ab5f4d8f331668f982d2) ) NAMCOS2_GFXROM_LOAD_128K( "fh1_rz1.bin", 0x080000, CRC(44699eb9) SHA1(9f289fccfd56692e0dda5331160a21b6ed824d7d) ) NAMCOS2_GFXROM_LOAD_128K( "fh1_rz2.bin", 0x100000, CRC(5ec14abf) SHA1(088b4da0f20286e72c7e02a6708ce46823f40237) ) @@ -3606,7 +3519,7 @@ ROM_START( finehour ) NAMCOS2_GFXROM_LOAD_128K( "fh1_rz4.bin", 0x200000, CRC(0b4379e6) SHA1(3455211a9a3c8412609fdbb98aa8911db3a47e09) ) NAMCOS2_GFXROM_LOAD_128K( "fh1_rz5.bin", 0x280000, CRC(e034e560) SHA1(3b5ccdd93e2729875305a7016b3b9de237526358) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_256K( "fh1_sha.bin", 0x000000, CRC(15875eb0) SHA1(9225df6b01897938488461ebf0717e6d7b81d562) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -3795,7 +3708,7 @@ ROM_START( fourtrax ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "fx_obj-0.4c", 0x000000, 0x040000, CRC(1aa60ffa) SHA1(1fa625a52c763b8db718af14e9f3cc3e076ff83b) ) ROM_LOAD( "fx_obj-1.3c", 0x040000, 0x040000, CRC(7509bc09) SHA1(823d8d884afc685dda26c1256c2d241c7f626f9e) ) ROM_LOAD( "fx_obj-4.4a", 0x080000, 0x040000, CRC(30add52a) SHA1(ff782d9dca96967233e435c3dd7d69ffde45db43) ) @@ -3804,29 +3717,26 @@ ROM_START( fourtrax ) ROM_LOAD( "fx_obj-9.7c", 0x140000, 0x040000, CRC(90f0735b) SHA1(2adbe72c6547075c0cc0386789cc1b8c1a0bc84f) ) ROM_LOAD( "fx_obj-12.8a", 0x180000, 0x040000, CRC(f5e23b78) SHA1(99896bd7c6663e3f57cb5d206964b81b5d64c8b6) ) ROM_LOAD( "fx_obj-13.7a", 0x1c0000, 0x040000, CRC(04a25007) SHA1(0c33450b0d6907754dbf1914849d1630baa824bd) ) - ROM_LOAD( "fx_obj2.2c", 0x200000, 0x040000, CRC(243affc7) SHA1(738d62960e79b95079b2208ec48fa0f3738c7611) ) + ROM_LOAD( "fx_obj-2.2c", 0x200000, 0x040000, CRC(243affc7) SHA1(738d62960e79b95079b2208ec48fa0f3738c7611) ) ROM_LOAD( "fx_obj-3.1c", 0x240000, 0x040000, CRC(b7e5d17d) SHA1(3d8ea7cbf33b595ddf739024e8d0fccd5f9e073b) ) - ROM_LOAD( "fx_obj6.2a", 0x280000, 0x040000, CRC(a2d5ce4a) SHA1(bbe9df3914632a573a95fcba76442404d149fb9d) ) - ROM_LOAD( "fx_obj7.1a", 0x2c0000, 0x040000, CRC(4d91c929) SHA1(97470a4ad7b28df83c632bfc8c309b24701275fe) ) - ROM_LOAD( "fx_obj10.6c", 0x300000, 0x040000, CRC(7a01e86f) SHA1(5fde10e53cb192df0f3873cd6d59c725430948f5) ) + ROM_LOAD( "fx_obj-6.2a", 0x280000, 0x040000, CRC(a2d5ce4a) SHA1(bbe9df3914632a573a95fcba76442404d149fb9d) ) + ROM_LOAD( "fx_obj-7.1a", 0x2c0000, 0x040000, CRC(4d91c929) SHA1(97470a4ad7b28df83c632bfc8c309b24701275fe) ) + ROM_LOAD( "fx_obj-10.6c", 0x300000, 0x040000, CRC(7a01e86f) SHA1(5fde10e53cb192df0f3873cd6d59c725430948f5) ) ROM_LOAD( "fx_obj-11.5c", 0x340000, 0x040000, CRC(514b3fe5) SHA1(19562ba2ac04a16d335bdc81b34d929f7ff9161c) ) ROM_LOAD( "fx_obj-14.6a", 0x380000, 0x040000, CRC(c1658c77) SHA1(ec689d0e5cf95085c193aa8949c6ec6e7243338b) ) - ROM_LOAD( "fx_obj15.5a", 0x3c0000, 0x040000, CRC(2bc909b3) SHA1(29c668d6d12ccdee25e97373bc4786894858d463) ) - - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-0.11n", 0x000000, CRC(6658c1c3) SHA1(64b5466e0f94cf5f3cb92915a26331748f67041a) ) - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-1.11p", 0x080000, CRC(3a888943) SHA1(6540b417003045dfa1401a1ff04ac55b86cc177f) ) - NAMCOS2_GFXROM_LOAD_128K( "fx2_ch2.11r", 0x100000, CRC(fdf1e86b) SHA1(91a61c10a9e92f8bbc26ffc9cb72deb31378a843) ) - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-3.11s", 0x180000, CRC(47fa7e61) SHA1(cc2eed81ddb4f942dd7a07e474760e4608eb4da0) ) - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-4.9n", 0x200000, CRC(c720c5f5) SHA1(f68f369bbefe01c770314ea597dd88587638c62a) ) - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-5.9p", 0x280000, CRC(9eacdbc8) SHA1(ca4061afc9e61eeb543f2a3740812abf6a1049bc) ) - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-6.9r", 0x300000, CRC(c3dba42e) SHA1(2b5a8fabec11ccd44156ecfccf86fc713845d262) ) - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-7.9s", 0x380000, CRC(c009f3ae) SHA1(394beed29bda97f4f5ba532bc0bd22177154746b) ) - - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASEFF ) /* ROZ Tiles */ - /* No ROZ files in zip */ - - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_LOAD( "fx_obj-15.5a", 0x3c0000, 0x040000, CRC(2bc909b3) SHA1(29c668d6d12ccdee25e97373bc4786894858d463) ) + + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-0.11n", 0x000000, CRC(6658c1c3) SHA1(64b5466e0f94cf5f3cb92915a26331748f67041a) ) + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-1.11p", 0x080000, CRC(3a888943) SHA1(6540b417003045dfa1401a1ff04ac55b86cc177f) ) + NAMCOS2_GFXROM_LOAD_128K( "fx2_chr-2.11r", 0x100000, CRC(fdf1e86b) SHA1(91a61c10a9e92f8bbc26ffc9cb72deb31378a843) ) + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-3.11s", 0x180000, CRC(47fa7e61) SHA1(cc2eed81ddb4f942dd7a07e474760e4608eb4da0) ) + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-4.9n", 0x200000, CRC(c720c5f5) SHA1(f68f369bbefe01c770314ea597dd88587638c62a) ) + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-5.9p", 0x280000, CRC(9eacdbc8) SHA1(ca4061afc9e61eeb543f2a3740812abf6a1049bc) ) + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-6.9r", 0x300000, CRC(c3dba42e) SHA1(2b5a8fabec11ccd44156ecfccf86fc713845d262) ) + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-7.9s", 0x380000, CRC(c009f3ae) SHA1(394beed29bda97f4f5ba532bc0bd22177154746b) ) + + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "fx_sha.7n", 0x000000, CRC(f7aa4af7) SHA1(b18ffda9e35beb0f072825e2899691be370f33b1) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -3857,7 +3767,7 @@ ROM_START( fourtraxj ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "fx_obj-0.4c", 0x000000, 0x040000, CRC(1aa60ffa) SHA1(1fa625a52c763b8db718af14e9f3cc3e076ff83b) ) ROM_LOAD( "fx_obj-1.3c", 0x040000, 0x040000, CRC(7509bc09) SHA1(823d8d884afc685dda26c1256c2d241c7f626f9e) ) ROM_LOAD( "fx_obj-4.4a", 0x080000, 0x040000, CRC(30add52a) SHA1(ff782d9dca96967233e435c3dd7d69ffde45db43) ) @@ -3866,29 +3776,26 @@ ROM_START( fourtraxj ) ROM_LOAD( "fx_obj-9.7c", 0x140000, 0x040000, CRC(90f0735b) SHA1(2adbe72c6547075c0cc0386789cc1b8c1a0bc84f) ) ROM_LOAD( "fx_obj-12.8a", 0x180000, 0x040000, CRC(f5e23b78) SHA1(99896bd7c6663e3f57cb5d206964b81b5d64c8b6) ) ROM_LOAD( "fx_obj-13.7a", 0x1c0000, 0x040000, CRC(04a25007) SHA1(0c33450b0d6907754dbf1914849d1630baa824bd) ) - ROM_LOAD( "fx_obj2.2c", 0x200000, 0x040000, CRC(243affc7) SHA1(738d62960e79b95079b2208ec48fa0f3738c7611) ) + ROM_LOAD( "fx_obj-2.2c", 0x200000, 0x040000, CRC(243affc7) SHA1(738d62960e79b95079b2208ec48fa0f3738c7611) ) ROM_LOAD( "fx_obj-3.1c", 0x240000, 0x040000, CRC(b7e5d17d) SHA1(3d8ea7cbf33b595ddf739024e8d0fccd5f9e073b) ) - ROM_LOAD( "fx_obj6.2a", 0x280000, 0x040000, CRC(a2d5ce4a) SHA1(bbe9df3914632a573a95fcba76442404d149fb9d) ) - ROM_LOAD( "fx_obj7.1a", 0x2c0000, 0x040000, CRC(4d91c929) SHA1(97470a4ad7b28df83c632bfc8c309b24701275fe) ) - ROM_LOAD( "fx_obj10.6c", 0x300000, 0x040000, CRC(7a01e86f) SHA1(5fde10e53cb192df0f3873cd6d59c725430948f5) ) + ROM_LOAD( "fx_obj-6.2a", 0x280000, 0x040000, CRC(a2d5ce4a) SHA1(bbe9df3914632a573a95fcba76442404d149fb9d) ) + ROM_LOAD( "fx_obj-7.1a", 0x2c0000, 0x040000, CRC(4d91c929) SHA1(97470a4ad7b28df83c632bfc8c309b24701275fe) ) + ROM_LOAD( "fx_obj-10.6c", 0x300000, 0x040000, CRC(7a01e86f) SHA1(5fde10e53cb192df0f3873cd6d59c725430948f5) ) ROM_LOAD( "fx_obj-11.5c", 0x340000, 0x040000, CRC(514b3fe5) SHA1(19562ba2ac04a16d335bdc81b34d929f7ff9161c) ) ROM_LOAD( "fx_obj-14.6a", 0x380000, 0x040000, CRC(c1658c77) SHA1(ec689d0e5cf95085c193aa8949c6ec6e7243338b) ) - ROM_LOAD( "fx_obj15.5a", 0x3c0000, 0x040000, CRC(2bc909b3) SHA1(29c668d6d12ccdee25e97373bc4786894858d463) ) + ROM_LOAD( "fx_obj-15.5a", 0x3c0000, 0x040000, CRC(2bc909b3) SHA1(29c668d6d12ccdee25e97373bc4786894858d463) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "fx_chr-0.11n", 0x000000, CRC(6658c1c3) SHA1(64b5466e0f94cf5f3cb92915a26331748f67041a) ) NAMCOS2_GFXROM_LOAD_128K( "fx_chr-1.11p", 0x080000, CRC(3a888943) SHA1(6540b417003045dfa1401a1ff04ac55b86cc177f) ) - NAMCOS2_GFXROM_LOAD_128K( "fx2_ch2.11r", 0x100000, CRC(fdf1e86b) SHA1(91a61c10a9e92f8bbc26ffc9cb72deb31378a843) ) // should this be the same, fx2 is the world set label, needs checking + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-2.11r", 0x100000, CRC(179e4ec6) SHA1(2936ef847c5a9e527f7198f65a21eee7ac36891c) ) NAMCOS2_GFXROM_LOAD_128K( "fx_chr-3.11s", 0x180000, CRC(47fa7e61) SHA1(cc2eed81ddb4f942dd7a07e474760e4608eb4da0) ) NAMCOS2_GFXROM_LOAD_128K( "fx_chr-4.9n", 0x200000, CRC(c720c5f5) SHA1(f68f369bbefe01c770314ea597dd88587638c62a) ) NAMCOS2_GFXROM_LOAD_128K( "fx_chr-5.9p", 0x280000, CRC(9eacdbc8) SHA1(ca4061afc9e61eeb543f2a3740812abf6a1049bc) ) NAMCOS2_GFXROM_LOAD_128K( "fx_chr-6.9r", 0x300000, CRC(c3dba42e) SHA1(2b5a8fabec11ccd44156ecfccf86fc713845d262) ) NAMCOS2_GFXROM_LOAD_128K( "fx_chr-7.9s", 0x380000, CRC(c009f3ae) SHA1(394beed29bda97f4f5ba532bc0bd22177154746b) ) - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASEFF ) /* ROZ Tiles */ - /* No ROZ files in zip */ - - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "fx_sha.7n", 0x000000, CRC(f7aa4af7) SHA1(b18ffda9e35beb0f072825e2899691be370f33b1) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -3908,7 +3815,7 @@ ROM_END Changes seem to be related to the trackside advertising banners. This was around the same time Super Monaco GP was forced to remove 'real' advertising banners, so could be related. - + The changed graphic ROM has tiles for an additional 'awaiting entry' screen, but it is unclear where they are used, the same tiles in the fx2 set are blank, assuming that one isn't a bad dump. @@ -3917,8 +3824,8 @@ ROM_END ROM_START( fourtraxa ) ROM_REGION( 0x040000, "maincpu", 0 ) /* Master CPU */ - ROM_LOAD16_BYTE( "fx4_mp0a.11d", 0x000000, 0x020000, CRC(f147cd6b) SHA1(7cdadd68d55dd8fa9b19cbee1434d9266ae1f4b9) ) // == fx2_mp0.11d - ROM_LOAD16_BYTE( "fx4_mp1a.13d", 0x000001, 0x020000, CRC(d1138c85) SHA1(32bf68ae36f72b84f3c3df28425147b6aaac1edf) ) + ROM_LOAD16_BYTE( "fx4_mpr-0a.11d", 0x000000, 0x020000, CRC(f147cd6b) SHA1(7cdadd68d55dd8fa9b19cbee1434d9266ae1f4b9) ) // == fx2_mp0.11d + ROM_LOAD16_BYTE( "fx4_mpr-1a.13d", 0x000001, 0x020000, CRC(d1138c85) SHA1(32bf68ae36f72b84f3c3df28425147b6aaac1edf) ) ROM_REGION( 0x040000, "slave", 0 ) /* Slave CPU */ ROM_LOAD16_BYTE( "fx1_sp0.11k", 0x000000, 0x020000, CRC(48548e78) SHA1(b3a9de8682fe63c1c3ecab3e3f9380a884efd4af) ) // same content as fx2 set, different label @@ -3930,7 +3837,7 @@ ROM_START( fourtraxa ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "fx_obj-0.4c", 0x000000, 0x040000, CRC(1aa60ffa) SHA1(1fa625a52c763b8db718af14e9f3cc3e076ff83b) ) ROM_LOAD( "fx_obj-1.3c", 0x040000, 0x040000, CRC(7509bc09) SHA1(823d8d884afc685dda26c1256c2d241c7f626f9e) ) ROM_LOAD( "fx_obj-4.4a", 0x080000, 0x040000, CRC(30add52a) SHA1(ff782d9dca96967233e435c3dd7d69ffde45db43) ) @@ -3939,29 +3846,26 @@ ROM_START( fourtraxa ) ROM_LOAD( "fx_obj-9.7c", 0x140000, 0x040000, CRC(90f0735b) SHA1(2adbe72c6547075c0cc0386789cc1b8c1a0bc84f) ) ROM_LOAD( "fx_obj-12.8a", 0x180000, 0x040000, CRC(f5e23b78) SHA1(99896bd7c6663e3f57cb5d206964b81b5d64c8b6) ) ROM_LOAD( "fx_obj-13.7a", 0x1c0000, 0x040000, CRC(04a25007) SHA1(0c33450b0d6907754dbf1914849d1630baa824bd) ) - ROM_LOAD( "fx_obj2.2c", 0x200000, 0x040000, CRC(243affc7) SHA1(738d62960e79b95079b2208ec48fa0f3738c7611) ) + ROM_LOAD( "fx_obj-2.2c", 0x200000, 0x040000, CRC(243affc7) SHA1(738d62960e79b95079b2208ec48fa0f3738c7611) ) ROM_LOAD( "fx_obj-3.1c", 0x240000, 0x040000, CRC(b7e5d17d) SHA1(3d8ea7cbf33b595ddf739024e8d0fccd5f9e073b) ) - ROM_LOAD( "fx_obj6.2a", 0x280000, 0x040000, CRC(a2d5ce4a) SHA1(bbe9df3914632a573a95fcba76442404d149fb9d) ) - ROM_LOAD( "fx_obj7.1a", 0x2c0000, 0x040000, CRC(4d91c929) SHA1(97470a4ad7b28df83c632bfc8c309b24701275fe) ) - ROM_LOAD( "fx_obj10.6c", 0x300000, 0x040000, CRC(7a01e86f) SHA1(5fde10e53cb192df0f3873cd6d59c725430948f5) ) + ROM_LOAD( "fx_obj-6.2a", 0x280000, 0x040000, CRC(a2d5ce4a) SHA1(bbe9df3914632a573a95fcba76442404d149fb9d) ) + ROM_LOAD( "fx_obj-7.1a", 0x2c0000, 0x040000, CRC(4d91c929) SHA1(97470a4ad7b28df83c632bfc8c309b24701275fe) ) + ROM_LOAD( "fx_obj-10.6c", 0x300000, 0x040000, CRC(7a01e86f) SHA1(5fde10e53cb192df0f3873cd6d59c725430948f5) ) ROM_LOAD( "fx_obj-11.5c", 0x340000, 0x040000, CRC(514b3fe5) SHA1(19562ba2ac04a16d335bdc81b34d929f7ff9161c) ) ROM_LOAD( "fx_obj-14.6a", 0x380000, 0x040000, CRC(c1658c77) SHA1(ec689d0e5cf95085c193aa8949c6ec6e7243338b) ) - ROM_LOAD( "fx_obj15.5a", 0x3c0000, 0x040000, CRC(2bc909b3) SHA1(29c668d6d12ccdee25e97373bc4786894858d463) ) - - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-0.11n", 0x000000, CRC(6658c1c3) SHA1(64b5466e0f94cf5f3cb92915a26331748f67041a) ) - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-1.11p", 0x080000, CRC(3a888943) SHA1(6540b417003045dfa1401a1ff04ac55b86cc177f) ) - NAMCOS2_GFXROM_LOAD_128K( "fx4_ch-2a.11r",0x100000, CRC(a5d1ab10) SHA1(8624ef0911c57155b46e184d10cb122d4a41a2de) ) // unique to this set, mask ROM intentionally replaced - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-3.11s", 0x180000, CRC(47fa7e61) SHA1(cc2eed81ddb4f942dd7a07e474760e4608eb4da0) ) - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-4.9n", 0x200000, CRC(c720c5f5) SHA1(f68f369bbefe01c770314ea597dd88587638c62a) ) - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-5.9p", 0x280000, CRC(9eacdbc8) SHA1(ca4061afc9e61eeb543f2a3740812abf6a1049bc) ) - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-6.9r", 0x300000, CRC(c3dba42e) SHA1(2b5a8fabec11ccd44156ecfccf86fc713845d262) ) - NAMCOS2_GFXROM_LOAD_128K( "fx_chr-7.9s", 0x380000, CRC(c009f3ae) SHA1(394beed29bda97f4f5ba532bc0bd22177154746b) ) - - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASEFF ) /* ROZ Tiles */ - /* No ROZ files in zip */ - - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_LOAD( "fx_obj-15.5a", 0x3c0000, 0x040000, CRC(2bc909b3) SHA1(29c668d6d12ccdee25e97373bc4786894858d463) ) + + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-0.11n", 0x000000, CRC(6658c1c3) SHA1(64b5466e0f94cf5f3cb92915a26331748f67041a) ) + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-1.11p", 0x080000, CRC(3a888943) SHA1(6540b417003045dfa1401a1ff04ac55b86cc177f) ) + NAMCOS2_GFXROM_LOAD_128K( "fx4_chr-2a.11r", 0x100000, CRC(a5d1ab10) SHA1(8624ef0911c57155b46e184d10cb122d4a41a2de) ) // unique to this set, mask ROM intentionally replaced + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-3.11s", 0x180000, CRC(47fa7e61) SHA1(cc2eed81ddb4f942dd7a07e474760e4608eb4da0) ) + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-4.9n", 0x200000, CRC(c720c5f5) SHA1(f68f369bbefe01c770314ea597dd88587638c62a) ) + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-5.9p", 0x280000, CRC(9eacdbc8) SHA1(ca4061afc9e61eeb543f2a3740812abf6a1049bc) ) + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-6.9r", 0x300000, CRC(c3dba42e) SHA1(2b5a8fabec11ccd44156ecfccf86fc713845d262) ) + NAMCOS2_GFXROM_LOAD_128K( "fx_chr-7.9s", 0x380000, CRC(c009f3ae) SHA1(394beed29bda97f4f5ba532bc0bd22177154746b) ) + + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "fx_sha.7n", 0x000000, CRC(f7aa4af7) SHA1(b18ffda9e35beb0f072825e2899691be370f33b1) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -3994,26 +3898,26 @@ ROM_START( marvland ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ NAMCOS2_GFXROM_LOAD_256K( "mv1-obj0.bin", 0x000000, CRC(73a29361) SHA1(fc8ac9a063c1f18ae619ddca3062491774c86040) ) NAMCOS2_GFXROM_LOAD_256K( "mv1-obj1.bin", 0x080000, CRC(abbe4a99) SHA1(7f8df4b40236b97a0dce984698308647d5803244) ) NAMCOS2_GFXROM_LOAD_256K( "mv1-obj2.bin", 0x100000, CRC(753659e0) SHA1(2662acf7bec528c7ac4181f62154581e304eea82) ) NAMCOS2_GFXROM_LOAD_256K( "mv1-obj3.bin", 0x180000, CRC(d1ce7339) SHA1(a89a0ef39b6ac3fdaf6a2b3c04fd048827fcdb13) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_256K( "mv1-chr0.bin", 0x000000, CRC(1c7e8b4f) SHA1(b9d61895d9c9302c5cb5f7bb7f045b2014c12317) ) NAMCOS2_GFXROM_LOAD_256K( "mv1-chr1.bin", 0x080000, CRC(01e4cafd) SHA1(27c911d6d4501233094826cf1b4b809b832d6d9f) ) NAMCOS2_GFXROM_LOAD_256K( "mv1-chr2.bin", 0x100000, CRC(198fcc6f) SHA1(b28f97d58fb2365843bbc3764cb59bfb9d5dfd92) ) NAMCOS2_GFXROM_LOAD_256K( "mv1-chr3.bin", 0x180000, CRC(ed6f22a5) SHA1(62ab2a2746abbbed533a5b519bbb0d603030cdca) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "mv1-roz0.bin", 0x000000, CRC(7381a5a9) SHA1(0515630f124725adfd21575b390209833bb6a6ef) ) NAMCOS2_GFXROM_LOAD_128K( "mv1-roz1.bin", 0x080000, CRC(e899482e) SHA1(caa511baba1805c485503353efdade9e218f2ba5) ) NAMCOS2_GFXROM_LOAD_128K( "mv1-roz2.bin", 0x100000, CRC(de141290) SHA1(c1daa6c01ba592138cffef02edfa0928f2232079) ) NAMCOS2_GFXROM_LOAD_128K( "mv1-roz3.bin", 0x180000, CRC(e310324d) SHA1(936c7aeace677ed51a720e4ae96cdac0f4984a9b) ) NAMCOS2_GFXROM_LOAD_128K( "mv1-roz4.bin", 0x200000, CRC(48ddc5a9) SHA1(c524b18d7b4526227d5b99d7e4a4582ce2ecd373) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_256K( "mv1-sha.bin", 0x000000, CRC(a47db5d3) SHA1(110e26412aa84f229773049112709be457b7a6ff) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4042,26 +3946,26 @@ ROM_START( marvlandj ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ NAMCOS2_GFXROM_LOAD_256K( "mv1-obj0.bin", 0x000000, CRC(73a29361) SHA1(fc8ac9a063c1f18ae619ddca3062491774c86040) ) NAMCOS2_GFXROM_LOAD_256K( "mv1-obj1.bin", 0x080000, CRC(abbe4a99) SHA1(7f8df4b40236b97a0dce984698308647d5803244) ) NAMCOS2_GFXROM_LOAD_256K( "mv1-obj2.bin", 0x100000, CRC(753659e0) SHA1(2662acf7bec528c7ac4181f62154581e304eea82) ) NAMCOS2_GFXROM_LOAD_256K( "mv1-obj3.bin", 0x180000, CRC(d1ce7339) SHA1(a89a0ef39b6ac3fdaf6a2b3c04fd048827fcdb13) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_256K( "mv1-chr0.bin", 0x000000, CRC(1c7e8b4f) SHA1(b9d61895d9c9302c5cb5f7bb7f045b2014c12317) ) NAMCOS2_GFXROM_LOAD_256K( "mv1-chr1.bin", 0x080000, CRC(01e4cafd) SHA1(27c911d6d4501233094826cf1b4b809b832d6d9f) ) NAMCOS2_GFXROM_LOAD_256K( "mv1-chr2.bin", 0x100000, CRC(198fcc6f) SHA1(b28f97d58fb2365843bbc3764cb59bfb9d5dfd92) ) NAMCOS2_GFXROM_LOAD_256K( "mv1-chr3.bin", 0x180000, CRC(ed6f22a5) SHA1(62ab2a2746abbbed533a5b519bbb0d603030cdca) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "mv1-roz0.bin", 0x000000, CRC(7381a5a9) SHA1(0515630f124725adfd21575b390209833bb6a6ef) ) NAMCOS2_GFXROM_LOAD_128K( "mv1-roz1.bin", 0x080000, CRC(e899482e) SHA1(caa511baba1805c485503353efdade9e218f2ba5) ) NAMCOS2_GFXROM_LOAD_128K( "mv1-roz2.bin", 0x100000, CRC(de141290) SHA1(c1daa6c01ba592138cffef02edfa0928f2232079) ) NAMCOS2_GFXROM_LOAD_128K( "mv1-roz3.bin", 0x180000, CRC(e310324d) SHA1(936c7aeace677ed51a720e4ae96cdac0f4984a9b) ) NAMCOS2_GFXROM_LOAD_128K( "mv1-roz4.bin", 0x200000, CRC(48ddc5a9) SHA1(c524b18d7b4526227d5b99d7e4a4582ce2ecd373) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_256K( "mv1-sha.bin", 0x000000, CRC(a47db5d3) SHA1(110e26412aa84f229773049112709be457b7a6ff) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4088,7 +3992,7 @@ ROM_START( metlhawk ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x200000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x200000, "sprite", 0 ) /* Sprites */ ROM_LOAD32_BYTE( "mhobj-4.5c", 0x000000, 0x40000, CRC(e3590e1a) SHA1(9afffa54a63e676f5d78a01c76ca50cd795dd6e9) ) ROM_LOAD32_BYTE( "mhobj-5.5a", 0x000001, 0x40000, CRC(b85c0d07) SHA1(e1ae542c0e884ef454ba57ecdfd007b85f2dc59d) ) ROM_LOAD32_BYTE( "mhobj-6.6c", 0x000002, 0x40000, CRC(90c4523d) SHA1(c6f84da3187ebb747445b1b7499acf5adc0f39d8) ) @@ -4098,13 +4002,13 @@ ROM_START( metlhawk ) ROM_LOAD32_BYTE( "mhobj-2.6d", 0x100002, 0x40000, CRC(6221b927) SHA1(caa106a47bc9e24fb90752175dc5156f7249d12a) ) ROM_LOAD32_BYTE( "mhobj-3.6b", 0x100003, 0x40000, CRC(fd09f2f1) SHA1(4ef5aef0fab89699cb6007103c286c54bd91b66e) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "mhchr-0.11n", 0x000000, CRC(e2da1b14) SHA1(95adcd7814fc77ad8b6c208c8da86b1557c5ec22) ) NAMCOS2_GFXROM_LOAD_128K( "mhchr-1.11p", 0x080000, CRC(023c78f9) SHA1(d11fa58c2429fa1db2081e7d653a01577d0850ac) ) NAMCOS2_GFXROM_LOAD_128K( "mhchr-2.11r", 0x100000, CRC(ece47e91) SHA1(a07e056f85a9207d6cc8e844a1afe6622bfe5f9b) ) NAMCOS2_GFXROM_LOAD_128K( "mh1c3.11s", 0x180000, CRC(9303aa7f) SHA1(1c7ed8d16a706f47bbd2970afd36b467ce19e9ee) ) - ROM_REGION( 0x200000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x200000, "c169roz", 0 ) /* ROZ Tiles */ ROM_LOAD( "mhr0z-0.2d", 0x000000, 0x40000, CRC(30ade98f) SHA1(6bf3d2f729e9f5e2c3f1a69845afbbfcafbf2d56) ) ROM_LOAD( "mhr0z-1.2c", 0x040000, 0x40000, CRC(a7fff42a) SHA1(5e13a11b8277842f6e1ae3a7f772f51ab07d0bfe) ) ROM_LOAD( "mhr0z-2.2b", 0x080000, 0x40000, CRC(6abec820) SHA1(bcacda96f6e69046dc59125374f169753ddda683) ) @@ -4114,10 +4018,10 @@ ROM_START( metlhawk ) ROM_LOAD( "mhr0z-6.3b", 0x180000, 0x40000, CRC(6c74977e) SHA1(ccdc1922a3e759eec0b68d1a7fde271dde54d9b2) ) ROM_LOAD( "mhr0z-7.3a", 0x1c0000, 0x40000, CRC(68a19cbd) SHA1(99759f7a670e41d92aba36c68fd66d74250445a3) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape (tiles) */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape (tiles) */ NAMCOS2_GFXROM_LOAD_128K( "mh1sha.7n", 0x000000, CRC(6ac22294) SHA1(6b2cd7589691e6d01f16b162db7c928767750bd3) ) - ROM_REGION( 0x80000, "gfx5", 0 ) /* Mask shape (ROZ) */ + ROM_REGION( 0x80000, "c169roz:mask", 0 ) /* Mask shape (ROZ) */ ROM_LOAD( "mh-rzsh.bin", 0x000000, 0x40000, CRC(5090b1cf) SHA1(b814f8309a6133c6ece5f20161ebd02a981da66f) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4156,7 +4060,7 @@ ROM_START( metlhawkj ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x200000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x200000, "sprite", 0 ) /* Sprites */ ROM_LOAD32_BYTE( "mhobj-4.5c", 0x000000, 0x40000, CRC(e3590e1a) SHA1(9afffa54a63e676f5d78a01c76ca50cd795dd6e9) ) ROM_LOAD32_BYTE( "mhobj-5.5a", 0x000001, 0x40000, CRC(b85c0d07) SHA1(e1ae542c0e884ef454ba57ecdfd007b85f2dc59d) ) ROM_LOAD32_BYTE( "mhobj-6.6c", 0x000002, 0x40000, CRC(90c4523d) SHA1(c6f84da3187ebb747445b1b7499acf5adc0f39d8) ) @@ -4166,13 +4070,13 @@ ROM_START( metlhawkj ) ROM_LOAD32_BYTE( "mhobj-2.6d", 0x100002, 0x40000, CRC(6221b927) SHA1(caa106a47bc9e24fb90752175dc5156f7249d12a) ) ROM_LOAD32_BYTE( "mhobj-3.6b", 0x100003, 0x40000, CRC(fd09f2f1) SHA1(4ef5aef0fab89699cb6007103c286c54bd91b66e) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "mhchr-0.11n", 0x000000, CRC(e2da1b14) SHA1(95adcd7814fc77ad8b6c208c8da86b1557c5ec22) ) NAMCOS2_GFXROM_LOAD_128K( "mhchr-1.11p", 0x080000, CRC(023c78f9) SHA1(d11fa58c2429fa1db2081e7d653a01577d0850ac) ) NAMCOS2_GFXROM_LOAD_128K( "mhchr-2.11r", 0x100000, CRC(ece47e91) SHA1(a07e056f85a9207d6cc8e844a1afe6622bfe5f9b) ) NAMCOS2_GFXROM_LOAD_128K( "mh1c3.11s", 0x180000, CRC(9303aa7f) SHA1(1c7ed8d16a706f47bbd2970afd36b467ce19e9ee) ) - ROM_REGION( 0x200000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x200000, "c169roz", 0 ) /* ROZ Tiles */ ROM_LOAD( "mhr0z-0.2d", 0x000000, 0x40000, CRC(30ade98f) SHA1(6bf3d2f729e9f5e2c3f1a69845afbbfcafbf2d56) ) ROM_LOAD( "mhr0z-1.2c", 0x040000, 0x40000, CRC(a7fff42a) SHA1(5e13a11b8277842f6e1ae3a7f772f51ab07d0bfe) ) ROM_LOAD( "mhr0z-2.2b", 0x080000, 0x40000, CRC(6abec820) SHA1(bcacda96f6e69046dc59125374f169753ddda683) ) @@ -4182,10 +4086,10 @@ ROM_START( metlhawkj ) ROM_LOAD( "mhr0z-6.3b", 0x180000, 0x40000, CRC(6c74977e) SHA1(ccdc1922a3e759eec0b68d1a7fde271dde54d9b2) ) ROM_LOAD( "mhr0z-7.3a", 0x1c0000, 0x40000, CRC(68a19cbd) SHA1(99759f7a670e41d92aba36c68fd66d74250445a3) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape (tiles) */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape (tiles) */ NAMCOS2_GFXROM_LOAD_128K( "mh1sha.7n", 0x000000, CRC(6ac22294) SHA1(6b2cd7589691e6d01f16b162db7c928767750bd3) ) - ROM_REGION( 0x80000, "gfx5", 0 ) /* Mask shape (ROZ) */ + ROM_REGION( 0x80000, "c169roz:mask", 0 ) /* Mask shape (ROZ) */ ROM_LOAD( "mh-rzsh.bin", 0x000000, 0x40000, CRC(5090b1cf) SHA1(b814f8309a6133c6ece5f20161ebd02a981da66f) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4224,7 +4128,7 @@ ROM_START( mirninja ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65b.bin", 0x000000, 0x008000, CRC(e9f2922a) SHA1(5767d2f85e1eb3de19192e73b02221f28b1fbb83) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ NAMCOS2_GFXROM_LOAD_128K( "mn_obj0.bin", 0x000000, CRC(6bd1e290) SHA1(11e5f7adef0d7a519246c6d88f9371e49a6b49e9) ) NAMCOS2_GFXROM_LOAD_128K( "mn_obj1.bin", 0x080000, CRC(5e8503be) SHA1(e03e13e70932b65e1bd560f685eda107f00a8bb6) ) NAMCOS2_GFXROM_LOAD_128K( "mn_obj2.bin", 0x100000, CRC(a96d9b45) SHA1(5ad32ef08c38bff368590e0549c4b4552af5c2c8) ) @@ -4234,7 +4138,7 @@ ROM_START( mirninja ) NAMCOS2_GFXROM_LOAD_128K( "mn_obj6.bin", 0x300000, CRC(a052c582) SHA1(eadf07df0e7e13c6e51672860aad4c22b5dcc853) ) NAMCOS2_GFXROM_LOAD_128K( "mn_obj7.bin", 0x380000, CRC(1854c6f5) SHA1(f49d18655d05ea9abf1dded17abc61855dba61ef) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "mn_chr0.bin", 0x000000, CRC(4f66df26) SHA1(7ca1215cb33b9c0898fc17721618a3129d751722) ) NAMCOS2_GFXROM_LOAD_128K( "mn_chr1.bin", 0x080000, CRC(f5de5ea7) SHA1(58ba4a5cca631e53b685db342697625c9c9ea50c) ) NAMCOS2_GFXROM_LOAD_128K( "mn_chr2.bin", 0x100000, CRC(9ff61924) SHA1(27537743b2df32eb492ec933faabd149e3283256) ) @@ -4244,11 +4148,11 @@ ROM_START( mirninja ) NAMCOS2_GFXROM_LOAD_128K( "mn_chr6.bin", 0x300000, CRC(114aca76) SHA1(d2c6bdfdd0e42cd0c6f99517321c2105e5fc780d) ) NAMCOS2_GFXROM_LOAD_128K( "mn_chr7.bin", 0x380000, CRC(2d5705d3) SHA1(690a50b3950a1cf9c27461aa3722c3f1f6a90c87) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "mn_roz0.bin", 0x000000, CRC(677a4f25) SHA1(8ca64833189c75c3f4efd022dbddc54dc2632ec1) ) NAMCOS2_GFXROM_LOAD_128K( "mn_roz1.bin", 0x080000, CRC(f00ae572) SHA1(cd7f28b2ba03a0bb4d5702ffa36b1140560c9541) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "mn_sha.bin", 0x000000, CRC(c28af90f) SHA1(8b7f95375eb32c3e30c2a55b7f543235f56d3a13) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4276,7 +4180,7 @@ ROM_START( ordyne ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2_c65b.3f", 0x000000, 0x008000, CRC(e9f2922a) SHA1(5767d2f85e1eb3de19192e73b02221f28b1fbb83) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ NAMCOS2_GFXROM_LOAD_128K( "or_obj-0.obj0", 0x000000, CRC(67b2b9e4) SHA1(4e589c28ed23224e40d3c68055ada0136cbf94cb) ) NAMCOS2_GFXROM_LOAD_128K( "or_obj-1.obj1", 0x080000, CRC(8a54fa5e) SHA1(8f71a79dc3bdf8ea4f11cfc31338836ab0c695a5) ) NAMCOS2_GFXROM_LOAD_128K( "or_obj-2.obj2", 0x100000, CRC(a2c1cca0) SHA1(f2e8b1b09751695c18bbfbdbe1765e3802833850) ) @@ -4286,7 +4190,7 @@ ROM_START( ordyne ) NAMCOS2_GFXROM_LOAD_128K( "or_obj-6.obj6", 0x300000, CRC(e284c30c) SHA1(f77a3cd81ac1d0fb06317db51b576f1aaa9bbec7) ) NAMCOS2_GFXROM_LOAD_128K( "or_obj-7.obj7", 0x380000, CRC(262b7112) SHA1(1f275eeb621d28a2efb3be9dad76606eeba78e8b) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "or_chr-0.chr0", 0x000000, CRC(e7c47934) SHA1(c86791ea11a72cd2b59293dca74fa08ec86edc80) ) NAMCOS2_GFXROM_LOAD_128K( "or_chr-1.chr1", 0x080000, CRC(874b332d) SHA1(307ce6ad8013dbd0528a8c5d736bff21a34c4318) ) NAMCOS2_GFXROM_LOAD_128K( "or_chr-3.chr3", 0x180000, CRC(5471a834) SHA1(91bd76eb6e03d6fdf636381a5ce1123291bd49ba) ) @@ -4294,14 +4198,14 @@ ROM_START( ordyne ) NAMCOS2_GFXROM_LOAD_128K( "or_chr-6.chr6", 0x300000, CRC(3adc09c8) SHA1(5302796c7a7f3621e2a068b5a3932f0020785836) ) NAMCOS2_GFXROM_LOAD_128K( "or2_chr7.chr7", 0x380000, CRC(8c0d2ab7) SHA1(5e0e61623fcbaac261763fbb42079f32d1ac963c) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "or_roz-0.roz0", 0x000000, CRC(c88a9e6b) SHA1(58d73615d6d3446407dd192b7ae36dcdc1dced24) ) NAMCOS2_GFXROM_LOAD_128K( "or_roz-1.roz1", 0x080000, CRC(c20cc749) SHA1(93142454f428ec3386bc94f1b8f7300f8e0414bc) ) NAMCOS2_GFXROM_LOAD_128K( "or_roz-2.roz2", 0x100000, CRC(148c9866) SHA1(e2cf7f76a6e0adc22e8b0c347cf5bb9d913b6b0c) ) NAMCOS2_GFXROM_LOAD_128K( "or_roz-3.roz3", 0x180000, CRC(4e727b7e) SHA1(272ffb137bdfabef83d6180c8667ec7e08265ea6) ) NAMCOS2_GFXROM_LOAD_128K( "or_roz-4.roz4", 0x200000, CRC(17b04396) SHA1(410dd04538f5d9d147dfefc658b0640a771e1032) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "or_shape.shape", 0x000000, CRC(7aec9dee) SHA1(2e774e4cff69173b4524d6b25a6a449ba5498a6a) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4332,7 +4236,7 @@ ROM_START( ordyneje ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2_c65b.3f", 0x000000, 0x008000, CRC(e9f2922a) SHA1(5767d2f85e1eb3de19192e73b02221f28b1fbb83) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ NAMCOS2_GFXROM_LOAD_128K( "or_obj-0.obj0", 0x000000, CRC(67b2b9e4) SHA1(4e589c28ed23224e40d3c68055ada0136cbf94cb) ) NAMCOS2_GFXROM_LOAD_128K( "or_obj-1.obj1", 0x080000, CRC(8a54fa5e) SHA1(8f71a79dc3bdf8ea4f11cfc31338836ab0c695a5) ) NAMCOS2_GFXROM_LOAD_128K( "or_obj-2.obj2", 0x100000, CRC(a2c1cca0) SHA1(f2e8b1b09751695c18bbfbdbe1765e3802833850) ) @@ -4342,7 +4246,7 @@ ROM_START( ordyneje ) NAMCOS2_GFXROM_LOAD_128K( "or_obj-6.obj6", 0x300000, CRC(e284c30c) SHA1(f77a3cd81ac1d0fb06317db51b576f1aaa9bbec7) ) NAMCOS2_GFXROM_LOAD_128K( "or_obj-7.obj7", 0x380000, CRC(262b7112) SHA1(1f275eeb621d28a2efb3be9dad76606eeba78e8b) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "or_chr-0.chr0", 0x000000, CRC(e7c47934) SHA1(c86791ea11a72cd2b59293dca74fa08ec86edc80) ) NAMCOS2_GFXROM_LOAD_128K( "or_chr-1.chr1", 0x080000, CRC(874b332d) SHA1(307ce6ad8013dbd0528a8c5d736bff21a34c4318) ) NAMCOS2_GFXROM_LOAD_128K( "or_chr-3.chr3", 0x180000, CRC(5471a834) SHA1(91bd76eb6e03d6fdf636381a5ce1123291bd49ba) ) @@ -4350,14 +4254,14 @@ ROM_START( ordyneje ) NAMCOS2_GFXROM_LOAD_128K( "or_chr-6.chr6", 0x300000, CRC(3adc09c8) SHA1(5302796c7a7f3621e2a068b5a3932f0020785836) ) NAMCOS2_GFXROM_LOAD_128K( "or1_ch7e.chr7", 0x380000, CRC(8c0d2ab7) SHA1(5e0e61623fcbaac261763fbb42079f32d1ac963c) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "or_roz-0.roz0", 0x000000, CRC(c88a9e6b) SHA1(58d73615d6d3446407dd192b7ae36dcdc1dced24) ) NAMCOS2_GFXROM_LOAD_128K( "or_roz-1.roz1", 0x080000, CRC(c20cc749) SHA1(93142454f428ec3386bc94f1b8f7300f8e0414bc) ) NAMCOS2_GFXROM_LOAD_128K( "or_roz-2.roz2", 0x100000, CRC(148c9866) SHA1(e2cf7f76a6e0adc22e8b0c347cf5bb9d913b6b0c) ) NAMCOS2_GFXROM_LOAD_128K( "or_roz-3.roz3", 0x180000, CRC(4e727b7e) SHA1(272ffb137bdfabef83d6180c8667ec7e08265ea6) ) NAMCOS2_GFXROM_LOAD_128K( "or_roz-4.roz4", 0x200000, CRC(17b04396) SHA1(410dd04538f5d9d147dfefc658b0640a771e1032) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "or_shape.shape", 0x000000, CRC(7aec9dee) SHA1(2e774e4cff69173b4524d6b25a6a449ba5498a6a) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4388,7 +4292,7 @@ ROM_START( ordynej ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2_c65b.3f", 0x000000, 0x008000, CRC(e9f2922a) SHA1(5767d2f85e1eb3de19192e73b02221f28b1fbb83) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ NAMCOS2_GFXROM_LOAD_128K( "or_obj-0.obj0", 0x000000, CRC(67b2b9e4) SHA1(4e589c28ed23224e40d3c68055ada0136cbf94cb) ) NAMCOS2_GFXROM_LOAD_128K( "or_obj-1.obj1", 0x080000, CRC(8a54fa5e) SHA1(8f71a79dc3bdf8ea4f11cfc31338836ab0c695a5) ) NAMCOS2_GFXROM_LOAD_128K( "or_obj-2.obj2", 0x100000, CRC(a2c1cca0) SHA1(f2e8b1b09751695c18bbfbdbe1765e3802833850) ) @@ -4398,7 +4302,7 @@ ROM_START( ordynej ) NAMCOS2_GFXROM_LOAD_128K( "or_obj-6.obj6", 0x300000, CRC(e284c30c) SHA1(f77a3cd81ac1d0fb06317db51b576f1aaa9bbec7) ) NAMCOS2_GFXROM_LOAD_128K( "or_obj-7.obj7", 0x380000, CRC(262b7112) SHA1(1f275eeb621d28a2efb3be9dad76606eeba78e8b) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "or_chr-0.chr0", 0x000000, CRC(e7c47934) SHA1(c86791ea11a72cd2b59293dca74fa08ec86edc80) ) NAMCOS2_GFXROM_LOAD_128K( "or_chr-1.chr1", 0x080000, CRC(874b332d) SHA1(307ce6ad8013dbd0528a8c5d736bff21a34c4318) ) NAMCOS2_GFXROM_LOAD_128K( "or_chr-3.chr3", 0x180000, CRC(5471a834) SHA1(91bd76eb6e03d6fdf636381a5ce1123291bd49ba) ) @@ -4406,14 +4310,14 @@ ROM_START( ordynej ) NAMCOS2_GFXROM_LOAD_128K( "or_chr-6.chr6", 0x300000, CRC(3adc09c8) SHA1(5302796c7a7f3621e2a068b5a3932f0020785836) ) NAMCOS2_GFXROM_LOAD_128K( "or_chr-7.chr7", 0x380000, CRC(f050a152) SHA1(e8d868c15f6319a4d4434ba889f1dfd160056c23) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "or_roz-0.roz0", 0x000000, CRC(c88a9e6b) SHA1(58d73615d6d3446407dd192b7ae36dcdc1dced24) ) NAMCOS2_GFXROM_LOAD_128K( "or_roz-1.roz1", 0x080000, CRC(c20cc749) SHA1(93142454f428ec3386bc94f1b8f7300f8e0414bc) ) NAMCOS2_GFXROM_LOAD_128K( "or_roz-2.roz2", 0x100000, CRC(148c9866) SHA1(e2cf7f76a6e0adc22e8b0c347cf5bb9d913b6b0c) ) NAMCOS2_GFXROM_LOAD_128K( "or_roz-3.roz3", 0x180000, CRC(4e727b7e) SHA1(272ffb137bdfabef83d6180c8667ec7e08265ea6) ) NAMCOS2_GFXROM_LOAD_128K( "or_roz-4.roz4", 0x200000, CRC(17b04396) SHA1(410dd04538f5d9d147dfefc658b0640a771e1032) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "or_shape.shape", 0x000000, CRC(7aec9dee) SHA1(2e774e4cff69173b4524d6b25a6a449ba5498a6a) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4444,7 +4348,7 @@ ROM_START( phelios ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2_c65c.3f", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ NAMCOS2_GFXROM_LOAD_256K( "ps_obj-0.obj0", 0x000000, CRC(f323db2b) SHA1(fa3c42c618da06af161ad3f8aa1283e9c4bd63c0) ) NAMCOS2_GFXROM_LOAD_256K( "ps_obj-1.obj1", 0x080000, CRC(faf7c2f5) SHA1(d0d33eddaf5de2b639717db83a85f441d81a5924) ) NAMCOS2_GFXROM_LOAD_256K( "ps_obj-2.obj2", 0x100000, CRC(828178ba) SHA1(d35ab8020ebaad0b4c0b24fa9edc2886b713a8ed) ) @@ -4454,7 +4358,7 @@ ROM_START( phelios ) NAMCOS2_GFXROM_LOAD_256K( "ps_obj-6.obj6", 0x300000, CRC(032ea497) SHA1(89f4deed8fa076683abc1f2e961ceb920ab9848d) ) NAMCOS2_GFXROM_LOAD_256K( "ps_obj-7.obj7", 0x380000, CRC(f6183b36) SHA1(d1fec216e88f6a07f03d1e458a105548d0376ef3) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "ps_chr-0.chr0", 0x000000, CRC(668b6670) SHA1(35bdac5478cee37b82a8a5367a2a08c70014131d) ) NAMCOS2_GFXROM_LOAD_128K( "ps_chr-1.chr1", 0x080000, CRC(80c30742) SHA1(e9307b6a4a6a749a97f76355fb3785945e303289) ) NAMCOS2_GFXROM_LOAD_128K( "ps_chr-2.chr2", 0x100000, CRC(f4e11bf7) SHA1(4506fdc83956d7e58bee1a6661da9fe12f1317a9) ) @@ -4463,7 +4367,7 @@ ROM_START( phelios ) NAMCOS2_GFXROM_LOAD_128K( "ps_chr-5.chr5", 0x280000, CRC(8ca72d35) SHA1(e3af2d3772468bd26b552a3f15c8a9dd562b1361) ) NAMCOS2_GFXROM_LOAD_128K( "ps_chr-6.chr6", 0x300000, CRC(da3543a9) SHA1(085ac3a7e71db8cc60fc343d3a6b009a81f751ee) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "ps_roz-0.roz0", 0x000000, CRC(68043d7e) SHA1(ee81e0f3fc1cd0aa903ad670aa7832c972613a80) ) NAMCOS2_GFXROM_LOAD_128K( "ps_roz-1.roz1", 0x080000, CRC(029802b4) SHA1(b9966d13f80faa5befa43cfa9628afd6a4ff783e) ) NAMCOS2_GFXROM_LOAD_128K( "ps_roz-2.roz2", 0x100000, CRC(bf0b76dc) SHA1(28f01dc16ee8818291f89cfc03b126c6cd7ced72) ) @@ -4472,7 +4376,7 @@ ROM_START( phelios ) NAMCOS2_GFXROM_LOAD_128K( "ps_roz-5.roz5", 0x280000, CRC(fc5a99d0) SHA1(e61d45347ec0ee6db27edd6da797e810052803a2) ) NAMCOS2_GFXROM_LOAD_128K( "ps_roz-6.roz6", 0x300000, CRC(a2a17587) SHA1(44a58735e6efdfa815576ed134a1295db49430fb) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "ps_shape.shape", 0x000000, CRC(58e26fcf) SHA1(9edc3b54964f923ed07ee878520ccf3f188f04ad) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4499,7 +4403,7 @@ ROM_START( pheliosj ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2_c65c.3f", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ NAMCOS2_GFXROM_LOAD_256K( "ps_obj-0.obj0", 0x000000, CRC(f323db2b) SHA1(fa3c42c618da06af161ad3f8aa1283e9c4bd63c0) ) NAMCOS2_GFXROM_LOAD_256K( "ps_obj-1.obj1", 0x080000, CRC(faf7c2f5) SHA1(d0d33eddaf5de2b639717db83a85f441d81a5924) ) NAMCOS2_GFXROM_LOAD_256K( "ps_obj-2.obj2", 0x100000, CRC(828178ba) SHA1(d35ab8020ebaad0b4c0b24fa9edc2886b713a8ed) ) @@ -4509,7 +4413,7 @@ ROM_START( pheliosj ) NAMCOS2_GFXROM_LOAD_256K( "ps_obj-6.obj6", 0x300000, CRC(032ea497) SHA1(89f4deed8fa076683abc1f2e961ceb920ab9848d) ) NAMCOS2_GFXROM_LOAD_256K( "ps_obj-7.obj7", 0x380000, CRC(f6183b36) SHA1(d1fec216e88f6a07f03d1e458a105548d0376ef3) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "ps_chr-0.chr0", 0x000000, CRC(668b6670) SHA1(35bdac5478cee37b82a8a5367a2a08c70014131d) ) NAMCOS2_GFXROM_LOAD_128K( "ps_chr-1.chr1", 0x080000, CRC(80c30742) SHA1(e9307b6a4a6a749a97f76355fb3785945e303289) ) NAMCOS2_GFXROM_LOAD_128K( "ps_chr-2.chr2", 0x100000, CRC(f4e11bf7) SHA1(4506fdc83956d7e58bee1a6661da9fe12f1317a9) ) @@ -4518,7 +4422,7 @@ ROM_START( pheliosj ) NAMCOS2_GFXROM_LOAD_128K( "ps_chr-5.chr5", 0x280000, CRC(8ca72d35) SHA1(e3af2d3772468bd26b552a3f15c8a9dd562b1361) ) NAMCOS2_GFXROM_LOAD_128K( "ps_chr-6.chr6", 0x300000, CRC(da3543a9) SHA1(085ac3a7e71db8cc60fc343d3a6b009a81f751ee) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "ps_roz-0.roz0", 0x000000, CRC(68043d7e) SHA1(ee81e0f3fc1cd0aa903ad670aa7832c972613a80) ) NAMCOS2_GFXROM_LOAD_128K( "ps_roz-1.roz1", 0x080000, CRC(029802b4) SHA1(b9966d13f80faa5befa43cfa9628afd6a4ff783e) ) NAMCOS2_GFXROM_LOAD_128K( "ps_roz-2.roz2", 0x100000, CRC(bf0b76dc) SHA1(28f01dc16ee8818291f89cfc03b126c6cd7ced72) ) @@ -4527,7 +4431,7 @@ ROM_START( pheliosj ) NAMCOS2_GFXROM_LOAD_128K( "ps_roz-5.roz5", 0x280000, CRC(fc5a99d0) SHA1(e61d45347ec0ee6db27edd6da797e810052803a2) ) NAMCOS2_GFXROM_LOAD_128K( "ps_roz-6.roz6", 0x300000, CRC(a2a17587) SHA1(44a58735e6efdfa815576ed134a1295db49430fb) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "ps_shape.shape", 0x000000, CRC(58e26fcf) SHA1(9edc3b54964f923ed07ee878520ccf3f188f04ad) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4555,20 +4459,20 @@ ROM_START( rthun2 ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "rst1_obj0.bin", 0x000000, 0x80000, CRC(e5cb82c1) SHA1(2dc1922ecfd9e52af8c4a1edac1df343be64b499) ) ROM_LOAD( "rst1_obj1.bin", 0x080000, 0x80000, CRC(19ebe9fd) SHA1(6d7991a52a707f710c809eb44f1dfa4873369c17) ) ROM_LOAD( "rst1_obj2.bin", 0x100000, 0x80000, CRC(455c4a2f) SHA1(9d7944b41e98f990423d315365106890e2c5ae77) ) ROM_LOAD( "rst1_obj3.bin", 0x180000, 0x80000, CRC(fdcae8a9) SHA1(a1e1057b3263ee9af9e2d861cf8879f51265805e) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "rst1_chr0.bin", 0x000000, 0x80000, CRC(6f0e9a68) SHA1(873296778104eff11b828273abf7f6ca461c055a) ) ROM_LOAD( "rst1_chr1.bin", 0x080000, 0x80000, CRC(15e44adc) SHA1(fead0b2d693f9b6267895d8339bb250f5c77fb4d) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ ROM_LOAD( "rst1_roz0.bin", 0x000000, 0x80000, CRC(482d0554) SHA1(95b99d1db5851b83b2af4deda2b61635a0562604) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "shape.bin", 0x000000, 0x80000, CRC(cf58fbbe) SHA1(fbe3b2f0c3267b298993d6238d97b119e13e07f6) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4598,20 +4502,20 @@ ROM_START( rthun2j ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "rst1_obj0.bin", 0x000000, 0x80000, CRC(e5cb82c1) SHA1(2dc1922ecfd9e52af8c4a1edac1df343be64b499) ) ROM_LOAD( "rst1_obj1.bin", 0x080000, 0x80000, CRC(19ebe9fd) SHA1(6d7991a52a707f710c809eb44f1dfa4873369c17) ) ROM_LOAD( "rst1_obj2.bin", 0x100000, 0x80000, CRC(455c4a2f) SHA1(9d7944b41e98f990423d315365106890e2c5ae77) ) ROM_LOAD( "rst1_obj3.bin", 0x180000, 0x80000, CRC(fdcae8a9) SHA1(a1e1057b3263ee9af9e2d861cf8879f51265805e) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "rst1_chr0.bin", 0x000000, 0x80000, CRC(6f0e9a68) SHA1(873296778104eff11b828273abf7f6ca461c055a) ) ROM_LOAD( "rst1_chr1.bin", 0x080000, 0x80000, CRC(15e44adc) SHA1(fead0b2d693f9b6267895d8339bb250f5c77fb4d) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ ROM_LOAD( "rst1_roz0.bin", 0x000000, 0x80000, CRC(482d0554) SHA1(95b99d1db5851b83b2af4deda2b61635a0562604) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "shape.bin", 0x000000, 0x80000, CRC(cf58fbbe) SHA1(fbe3b2f0c3267b298993d6238d97b119e13e07f6) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4648,7 +4552,7 @@ ROM_START( sgunner ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "sn_obj0.8c", 0x000000, 0x80000, CRC(bbae38f7) SHA1(7a40ade13307791f5c5d300882f9a38e18c411d6) ) ROM_LOAD( "sn_obj1.12c", 0x100000, 0x80000, CRC(4dfacb51) SHA1(1b5ae37f7ee12b791ce80422bd7472aa38c41ddd) ) ROM_LOAD( "sn_obj2.10c", 0x200000, 0x80000, CRC(313a308f) SHA1(0773a567cf649394cd6fcdd6fba0c4575220a582) ) @@ -4658,14 +4562,14 @@ ROM_START( sgunner ) ROM_LOAD( "sn_obj6.11c", 0x280000, 0x80000, CRC(9c6504f7) SHA1(0dc2960ec5b5ce75e06d0f84917286f360e98316) ) ROM_LOAD( "sn_obj7.15c", 0x380000, 0x80000, CRC(cd1356c0) SHA1(7a21f315442857716eac813adc29cc4f7e28bee8) ) - ROM_REGION( 0x200000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x200000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "sn_chr0.11n", 0x000000, 0x80000, CRC(b433c37b) SHA1(514dcffd0f20faae0f5297b68d8946cfbc54e493) ) ROM_LOAD( "sn_chr1.11p", 0x080000, 0x80000, CRC(b7dd41f9) SHA1(2119bca16cdb55df2416222b66272f681abd0359) ) - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASEFF ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", ROMREGION_ERASEFF ) /* ROZ Tiles */ /* NO ROZ ROMS PRESENT */ - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "sn_sha0.8n", 0x000000, 0x80000, CRC(01e20999) SHA1(5f925b5b43aa8889e077f7854a89d0731052605d) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4696,7 +4600,7 @@ ROM_START( sgunnerj ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "sn_obj0.8c", 0x000000, 0x80000, CRC(bbae38f7) SHA1(7a40ade13307791f5c5d300882f9a38e18c411d6) ) ROM_LOAD( "sn_obj1.12c", 0x100000, 0x80000, CRC(4dfacb51) SHA1(1b5ae37f7ee12b791ce80422bd7472aa38c41ddd) ) ROM_LOAD( "sn_obj2.10c", 0x200000, 0x80000, CRC(313a308f) SHA1(0773a567cf649394cd6fcdd6fba0c4575220a582) ) @@ -4706,14 +4610,14 @@ ROM_START( sgunnerj ) ROM_LOAD( "sn_obj6.11c", 0x280000, 0x80000, CRC(9c6504f7) SHA1(0dc2960ec5b5ce75e06d0f84917286f360e98316) ) ROM_LOAD( "sn_obj7.15c", 0x380000, 0x80000, CRC(cd1356c0) SHA1(7a21f315442857716eac813adc29cc4f7e28bee8) ) - ROM_REGION( 0x200000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x200000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "sn_chr0.11n", 0x000000, 0x80000, CRC(b433c37b) SHA1(514dcffd0f20faae0f5297b68d8946cfbc54e493) ) ROM_LOAD( "sn_chr1.11p", 0x080000, 0x80000, CRC(b7dd41f9) SHA1(2119bca16cdb55df2416222b66272f681abd0359) ) - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASEFF ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", ROMREGION_ERASEFF ) /* ROZ Tiles */ /* NO ROZ ROMS PRESENT */ - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "sn_sha0.8n", 0x000000, 0x80000, CRC(01e20999) SHA1(5f925b5b43aa8889e077f7854a89d0731052605d) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4744,7 +4648,7 @@ ROM_START( sgunner2 ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "sns_obj0.bin", 0x000000, 0x80000, CRC(c762445c) SHA1(108170c9a5c82c23c1ac09f91195137ca05989f4) ) ROM_LOAD( "sns_obj1.bin", 0x100000, 0x80000, CRC(e9e379d8) SHA1(01b5f5946e746a5265d230273c99a41910fd9e6f) ) ROM_LOAD( "sns_obj2.bin", 0x200000, 0x80000, CRC(0d076f6c) SHA1(247da0514c3809350ce308334e601f1689a7449f) ) @@ -4754,16 +4658,16 @@ ROM_START( sgunner2 ) ROM_LOAD( "sns_obj6.bin", 0x280000, 0x80000, CRC(c2e94ed2) SHA1(213f57e1a4c8e8ba3c8cbd212431ff7a44d0ffc1) ) ROM_LOAD( "sns_obj7.bin", 0x380000, 0x80000, CRC(fc1f26af) SHA1(1f0c36587bc9f80a39b49b6fd43d1773b2f49361) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "sns_chr0.bin", 0x000000, 0x80000, CRC(cdc42b61) SHA1(20cdd5a81ce4612f9eecd8f057d2e22e5baeb216) ) ROM_LOAD( "sns_chr1.bin", 0x080000, 0x80000, CRC(42d4cbb7) SHA1(2ba52987b59f2ae327b341c696fb4a4bbdccb093) ) ROM_LOAD( "sns_chr2.bin", 0x100000, 0x80000, CRC(7dbaa14e) SHA1(6df4fbe85560d2c1624ac2d6c80d6f7827954775) ) ROM_LOAD( "sns_chr3.bin", 0x180000, 0x80000, CRC(b562ff72) SHA1(6b74bca0555e51d7b15fc5d8fe865900646acbc6) ) - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASEFF ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", ROMREGION_ERASEFF ) /* ROZ Tiles */ /* NO ROZ ROMS PRESENT IN ZIP */ - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "sns_sha0.bin", 0x000000, 0x80000, CRC(0374fd67) SHA1(2f09536ef4f8e1aa719108e73642feb376d6efff) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4796,7 +4700,7 @@ ROM_START( sgunner2j ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "sns_obj0.bin", 0x000000, 0x80000, CRC(c762445c) SHA1(108170c9a5c82c23c1ac09f91195137ca05989f4) ) ROM_LOAD( "sns_obj1.bin", 0x100000, 0x80000, CRC(e9e379d8) SHA1(01b5f5946e746a5265d230273c99a41910fd9e6f) ) ROM_LOAD( "sns_obj2.bin", 0x200000, 0x80000, CRC(0d076f6c) SHA1(247da0514c3809350ce308334e601f1689a7449f) ) @@ -4806,16 +4710,16 @@ ROM_START( sgunner2j ) ROM_LOAD( "sns_obj6.bin", 0x280000, 0x80000, CRC(c2e94ed2) SHA1(213f57e1a4c8e8ba3c8cbd212431ff7a44d0ffc1) ) ROM_LOAD( "sns_obj7.bin", 0x380000, 0x80000, CRC(fc1f26af) SHA1(1f0c36587bc9f80a39b49b6fd43d1773b2f49361) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "sns_chr0.bin", 0x000000, 0x80000, CRC(cdc42b61) SHA1(20cdd5a81ce4612f9eecd8f057d2e22e5baeb216) ) ROM_LOAD( "sns_chr1.bin", 0x080000, 0x80000, CRC(42d4cbb7) SHA1(2ba52987b59f2ae327b341c696fb4a4bbdccb093) ) ROM_LOAD( "sns_chr2.bin", 0x100000, 0x80000, CRC(7dbaa14e) SHA1(6df4fbe85560d2c1624ac2d6c80d6f7827954775) ) ROM_LOAD( "sns_chr3.bin", 0x180000, 0x80000, CRC(b562ff72) SHA1(6b74bca0555e51d7b15fc5d8fe865900646acbc6) ) - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASEFF ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", ROMREGION_ERASEFF ) /* ROZ Tiles */ /* NO ROZ ROMS PRESENT IN ZIP */ - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "sns_sha0.bin", 0x000000, 0x80000, CRC(0374fd67) SHA1(2f09536ef4f8e1aa719108e73642feb376d6efff) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4848,21 +4752,21 @@ ROM_START( sws ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "ss1_obj0.5b", 0x000000, 0x80000, CRC(9bd6add1) SHA1(34595987670d7f64ba18a840e98667b96ae5e4bf) ) ROM_LOAD( "ss1_obj1.4b", 0x080000, 0x80000, CRC(a9db3d02) SHA1(63ff1ebc3fe27cd58fda0133bade9ca177ad2d89) ) ROM_LOAD( "ss1_obj2.5d", 0x100000, 0x80000, CRC(b4a73ced) SHA1(9d8476fb3db7fd2fce124dab09094f0ce0057116) ) ROM_LOAD( "ss1_obj3.4d", 0x180000, 0x80000, CRC(0a832b36) SHA1(56879a208e106105b8c0add3c7f7a69ce1ecbd9a) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "ss1_chr0.11n", 0x000000, 0x80000, CRC(ab0141de) SHA1(b63f5a1ca23a56f8da71741f64d410a323ff277f) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ ROM_LOAD( "ss_roz0.bin", 0x000000, 0x80000, CRC(40ce9a58) SHA1(240433e4fe31d333bcc8890c0a8e9ac84086fb07) ) ROM_LOAD( "ss_roz1.bin", 0x080000, 0x80000, CRC(c98902ff) SHA1(fef954e90552a09fa4c9a8e4acc18c1e0e762900) ) ROM_LOAD( "ss1_roz2.1c", 0x100000, 0x80000, CRC(b603e1a1) SHA1(bfe7ec0425c390390b3e3d17a9a57bca69346f98) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "ss1_sha0.7n", 0x000000, 0x80000, CRC(fea6952c) SHA1(3bf27ee1e7e4c5ee0d53f28d49ef063b3f8064ba) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4889,23 +4793,23 @@ ROM_START( sws92 ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "sss_obj0.bin", 0x000000, 0x80000, CRC(375e8f1f) SHA1(b737bcceb498a66593d06ef102958bea90032106) ) ROM_LOAD( "sss_obj1.bin", 0x080000, 0x80000, CRC(675c1014) SHA1(b960a1f72cddc5e369ab7063678e5548b508e376) ) ROM_LOAD( "sss_obj2.bin", 0x100000, 0x80000, CRC(bdc55f1c) SHA1(fa4f454406eb7e21daed16fedba2adcdb0fb6247) ) ROM_LOAD( "sss_obj3.bin", 0x180000, 0x80000, CRC(e32ac432) SHA1(a8572adb38e72cb72b5d4ba8968a300c675465ba) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "sss_chr0.bin", 0x000000, 0x80000, CRC(1d2876f2) SHA1(00b3113ea3e4f316f5bf2d3164cfe98d326f66bd) ) ROM_LOAD( "sss_chr6.bin", 0x300000, 0x80000, CRC(354f0ed2) SHA1(ea6370a460ef4319b6425dc0c8de687a9edbccdb) ) ROM_LOAD( "sss_chr7.bin", 0x380000, 0x80000, CRC(4032f4c1) SHA1(4d6e3391e03864abfa16002bb883b636b0f3e574) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ ROM_LOAD( "ss_roz0.bin", 0x000000, 0x80000, CRC(40ce9a58) SHA1(240433e4fe31d333bcc8890c0a8e9ac84086fb07) ) ROM_LOAD( "ss_roz1.bin", 0x080000, 0x80000, CRC(c98902ff) SHA1(fef954e90552a09fa4c9a8e4acc18c1e0e762900) ) ROM_LOAD( "sss_roz2.bin", 0x100000, 0x80000, CRC(c9855c10) SHA1(40a3fe1204f20b8295e790bc7cb6706fb46d4d51) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "sss_sha0.bin", 0x000000, 0x80000, CRC(b71a731a) SHA1(29eab0ad5618f54e6c790d20f7dc895afae6c709) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4932,23 +4836,23 @@ ROM_START( sws92g ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "sss_obj0.bin", 0x000000, 0x80000, CRC(375e8f1f) SHA1(b737bcceb498a66593d06ef102958bea90032106) ) ROM_LOAD( "sss_obj1.bin", 0x080000, 0x80000, CRC(675c1014) SHA1(b960a1f72cddc5e369ab7063678e5548b508e376) ) ROM_LOAD( "sss_obj2.bin", 0x100000, 0x80000, CRC(bdc55f1c) SHA1(fa4f454406eb7e21daed16fedba2adcdb0fb6247) ) ROM_LOAD( "sss_obj3.bin", 0x180000, 0x80000, CRC(e32ac432) SHA1(a8572adb38e72cb72b5d4ba8968a300c675465ba) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "sss_chr0.bin", 0x000000, 0x80000, CRC(1d2876f2) SHA1(00b3113ea3e4f316f5bf2d3164cfe98d326f66bd) ) ROM_LOAD( "sss_chr6.bin", 0x300000, 0x80000, CRC(354f0ed2) SHA1(ea6370a460ef4319b6425dc0c8de687a9edbccdb) ) ROM_LOAD( "sss_chr7.bin", 0x380000, 0x80000, CRC(4032f4c1) SHA1(4d6e3391e03864abfa16002bb883b636b0f3e574) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ ROM_LOAD( "ss_roz0.bin", 0x000000, 0x80000, CRC(40ce9a58) SHA1(240433e4fe31d333bcc8890c0a8e9ac84086fb07) ) ROM_LOAD( "ss_roz1.bin", 0x080000, 0x80000, CRC(c98902ff) SHA1(fef954e90552a09fa4c9a8e4acc18c1e0e762900) ) ROM_LOAD( "sss_roz2.bin", 0x100000, 0x80000, CRC(c9855c10) SHA1(40a3fe1204f20b8295e790bc7cb6706fb46d4d51) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "sss_sha0.bin", 0x000000, 0x80000, CRC(b71a731a) SHA1(29eab0ad5618f54e6c790d20f7dc895afae6c709) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -4977,23 +4881,23 @@ ROM_START( sws93 ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "sst_obj0.bin", 0x000000, 0x80000, CRC(4089dfd7) SHA1(d37fb08d03a4d3f87b10a8e73bbb1817543396ff) ) ROM_LOAD( "sst_obj1.bin", 0x080000, 0x80000, CRC(cfbc25c7) SHA1(7b6459bda373d1025db6bc8df671d73d6c0963b9) ) ROM_LOAD( "sst_obj2.bin", 0x100000, 0x80000, CRC(61ed3558) SHA1(af1785e909f61db4ad1b250a7064ad07d886edd5) ) ROM_LOAD( "sst_obj3.bin", 0x180000, 0x80000, CRC(0e3bc05d) SHA1(9b7dd60074a17d75633c9e804d62e9a7a94e0698) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "sst_chr0.bin", 0x000000, 0x80000, CRC(3397850d) SHA1(2c06810bc3769b7d7d8d02a8f9aa27b0cbb06b6b) ) ROM_LOAD( "sss_chr6.bin", 0x300000, 0x80000, CRC(354f0ed2) SHA1(ea6370a460ef4319b6425dc0c8de687a9edbccdb) ) ROM_LOAD( "sst_chr7.bin", 0x380000, 0x80000, CRC(e0abb763) SHA1(6c60a4986562bad0da6b7009a5f5165a81f801d7) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ ROM_LOAD( "ss_roz0.bin", 0x000000, 0x80000, CRC(40ce9a58) SHA1(240433e4fe31d333bcc8890c0a8e9ac84086fb07) ) ROM_LOAD( "ss_roz1.bin", 0x080000, 0x80000, CRC(c98902ff) SHA1(fef954e90552a09fa4c9a8e4acc18c1e0e762900) ) ROM_LOAD( "sss_roz2.bin", 0x100000, 0x80000, CRC(c9855c10) SHA1(40a3fe1204f20b8295e790bc7cb6706fb46d4d51) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "sst_sha0.bin", 0x000000, 0x80000, CRC(4f64d4bd) SHA1(0eb5311448cfd91b1e139b64b2f35b5179237e58) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -5020,7 +4924,7 @@ ROM_START( suzuka8h ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "eh1-obj0.bin", 0x000000, 0x80000, CRC(864b6816) SHA1(72d831b631afb2848578bd49cd7d3e12a78644b4) ) ROM_LOAD( "eh1-obj1.bin", 0x100000, 0x80000, CRC(d4921c35) SHA1(fe1b3997c3298e58919fa5602b94bd121439d5bc) ) ROM_LOAD( "eh1-obj2.bin", 0x200000, 0x80000, CRC(966d3f19) SHA1(997669cce56350cd7ed02eec0a88696469435490) ) @@ -5030,14 +4934,12 @@ ROM_START( suzuka8h ) ROM_LOAD( "eh1-obj6.bin", 0x280000, 0x80000, CRC(6019fc8c) SHA1(f3eb74fe0df2efbfeeaf4f8b43c93f104009da0b) ) ROM_LOAD( "eh1-obj7.bin", 0x380000, 0x80000, CRC(0bd966b8) SHA1(70d6b12139b2563a646da7d11c554f2f6ffb3559) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "eh2-chr0.bin", 0x000000, 0x80000, CRC(b2450fd2) SHA1(4aafb2c96b15e01364eb61ad0a71929c730e30a4) ) ROM_LOAD( "eh2-chr1.bin", 0x080000, 0x80000, CRC(57204651) SHA1(72cd7bd761a2b0fd12b3c3214098439d85438db8) ) ROM_LOAD( "eh1-chr2.bin", 0x100000, 0x80000, CRC(8150f644) SHA1(bf41d43938dbae6fd3162caebe8ffd4ec4bbd169) ) - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASE00 ) /* 16x16 Tiles */ - - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "eh2-sha0.bin", 0x000000, 0x80000, CRC(7f24619c) SHA1(0d19ab621cb42c5315be9a6b56f6711fc46ffff7) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -5069,7 +4971,7 @@ ROM_START( suzuka8hj ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "eh1-obj0.bin", 0x000000, 0x80000, CRC(864b6816) SHA1(72d831b631afb2848578bd49cd7d3e12a78644b4) ) ROM_LOAD( "eh1-obj1.bin", 0x100000, 0x80000, CRC(d4921c35) SHA1(fe1b3997c3298e58919fa5602b94bd121439d5bc) ) ROM_LOAD( "eh1-obj2.bin", 0x200000, 0x80000, CRC(966d3f19) SHA1(997669cce56350cd7ed02eec0a88696469435490) ) @@ -5079,14 +4981,12 @@ ROM_START( suzuka8hj ) ROM_LOAD( "eh1-obj6.bin", 0x280000, 0x80000, CRC(6019fc8c) SHA1(f3eb74fe0df2efbfeeaf4f8b43c93f104009da0b) ) ROM_LOAD( "eh1-obj7.bin", 0x380000, 0x80000, CRC(0bd966b8) SHA1(70d6b12139b2563a646da7d11c554f2f6ffb3559) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "eh1-chr0.bin", 0x000000, 0x80000, CRC(bc90ebef) SHA1(592ca134cc018e87214f72a97979cbf9425cfffd) ) ROM_LOAD( "eh1-chr1.bin", 0x080000, 0x80000, CRC(61395018) SHA1(4ffb8323b5671f99bb420881f84be58de7d79d07) ) ROM_LOAD( "eh1-chr2.bin", 0x100000, 0x80000, CRC(8150f644) SHA1(bf41d43938dbae6fd3162caebe8ffd4ec4bbd169) ) - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASE00 ) /* 16x16 Tiles */ - - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "eh1-sha0.bin", 0x000000, 0x80000, CRC(39585cf9) SHA1(8cc18b5745ab2cf50d4df0a17fc1a57771db28ab) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -5118,7 +5018,7 @@ ROM_START( suzuk8h2 ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "ehs1-obj0.3p", 0x000000, 0x80000, CRC(a0acf307) SHA1(6d79d2dd00da4f8f0462245f42a9d88b6ad632b1) ) ROM_LOAD( "ehs1-obj1.3w", 0x100000, 0x80000, CRC(ca780b44) SHA1(d16263851c165f5958b0a2ad1ba199058a8d56d5) ) ROM_LOAD( "ehs1-obj2.3t", 0x200000, 0x80000, CRC(83b45afe) SHA1(10a4b88b36f8d037cbb611cb273613b1d45e8eb5) ) @@ -5128,7 +5028,7 @@ ROM_START( suzuk8h2 ) ROM_LOAD( "ehs1-obj6.3j", 0x280000, 0x80000, CRC(f5fc8b23) SHA1(d7cd4596cd6991db72c371d835051cc8001f30b3) ) ROM_LOAD( "ehs1-obj7.3z", 0x380000, 0x80000, CRC(da6bf51b) SHA1(b9b49b983f76989067c4763fd88bfa11bbf5d064) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "ehs1-chr0.11n", 0x000000, 0x80000, CRC(844efe0d) SHA1(032a2d268bbab60706d911ab42206b5329e1abba) ) ROM_LOAD( "ehs1-chr1.11p", 0x080000, 0x80000, CRC(e8480a6d) SHA1(247a7ab2f5270a87c6a05b12f01b884fb05dabd2) ) ROM_LOAD( "ehs1-chr2.11r", 0x100000, 0x80000, CRC(ace2d871) SHA1(1a10f571268d83c70fe00fad2f1ce2b48fb764b1) ) @@ -5138,10 +5038,7 @@ ROM_START( suzuk8h2 ) ROM_LOAD( "ehs1-chr6.9r", 0x300000, 0x80000, CRC(2d1c01ad) SHA1(1ed79e22b964fe648d22e43b78c1c3b5a7d5f8c8) ) ROM_LOAD( "ehs1-chr7.9s", 0x380000, 0x80000, CRC(18dd8676) SHA1(59b9a07f4a980fd920a29b8a90ef54c8c3b53e97) ) - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASEFF ) /* ROZ Tiles */ - /* No ROZ hardware on PCB */ - - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "ehs1-sha0.7n", 0x000000, 0x80000, CRC(0f0e2dbf) SHA1(a4575fbdc868ba959d23204be7d659d40d8db4c2) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -5174,7 +5071,7 @@ ROM_START( suzuk8h2j ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "ehs1-obj0.3p", 0x000000, 0x80000, CRC(a0acf307) SHA1(6d79d2dd00da4f8f0462245f42a9d88b6ad632b1) ) ROM_LOAD( "ehs1-obj1.3w", 0x100000, 0x80000, CRC(ca780b44) SHA1(d16263851c165f5958b0a2ad1ba199058a8d56d5) ) ROM_LOAD( "ehs1-obj2.3t", 0x200000, 0x80000, CRC(83b45afe) SHA1(10a4b88b36f8d037cbb611cb273613b1d45e8eb5) ) @@ -5184,7 +5081,7 @@ ROM_START( suzuk8h2j ) ROM_LOAD( "ehs1-obj6.3j", 0x280000, 0x80000, CRC(f5fc8b23) SHA1(d7cd4596cd6991db72c371d835051cc8001f30b3) ) ROM_LOAD( "ehs1-obj7.3z", 0x380000, 0x80000, CRC(da6bf51b) SHA1(b9b49b983f76989067c4763fd88bfa11bbf5d064) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "ehs1-chr0.11n", 0x000000, 0x80000, CRC(844efe0d) SHA1(032a2d268bbab60706d911ab42206b5329e1abba) ) ROM_LOAD( "ehs1-chr1.11p", 0x080000, 0x80000, CRC(e8480a6d) SHA1(247a7ab2f5270a87c6a05b12f01b884fb05dabd2) ) ROM_LOAD( "ehs1-chr2.11r", 0x100000, 0x80000, CRC(ace2d871) SHA1(1a10f571268d83c70fe00fad2f1ce2b48fb764b1) ) @@ -5194,10 +5091,7 @@ ROM_START( suzuk8h2j ) ROM_LOAD( "ehs1-chr6.9r", 0x300000, 0x80000, CRC(2d1c01ad) SHA1(1ed79e22b964fe648d22e43b78c1c3b5a7d5f8c8) ) ROM_LOAD( "ehs1-chr7.9s", 0x380000, 0x80000, CRC(18dd8676) SHA1(59b9a07f4a980fd920a29b8a90ef54c8c3b53e97) ) - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASEFF ) /* ROZ Tiles */ - /* No ROZ hardware on PCB */ - - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "ehs1-sha0.7n", 0x000000, 0x80000, CRC(0f0e2dbf) SHA1(a4575fbdc868ba959d23204be7d659d40d8db4c2) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -5230,7 +5124,7 @@ ROM_START( valkyrie ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ NAMCOS2_GFXROM_LOAD_256K( "wdobj0.bin", 0x000000, CRC(e8089451) SHA1(f4d05df0015de01ec570f5f89ea11592204e4fe2) ) NAMCOS2_GFXROM_LOAD_256K( "wdobj1.bin", 0x080000, CRC(7ca65666) SHA1(39d792abf5a1a5f3906cb6ab4626f4a5b20cb081) ) NAMCOS2_GFXROM_LOAD_256K( "wdobj2.bin", 0x100000, CRC(7c159407) SHA1(ed5472eb9df7990b8d80ff5a587e41d138f48db8) ) @@ -5240,7 +5134,7 @@ ROM_START( valkyrie ) NAMCOS2_GFXROM_LOAD_256K( "wdobj6.bin", 0x300000, CRC(9fa2ea21) SHA1(89cefc286cf4de7f6e32dc6dc689835a21bea2ed) ) NAMCOS2_GFXROM_LOAD_256K( "wdobj7.bin", 0x380000, CRC(66e07a36) SHA1(2f84128bbdc9dcfd783d3a85cb47a92087e71272) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "wdchr0.bin", 0x000000, CRC(debb0116) SHA1(ba4a9a166e22cf4930574eeadd127520ff7192b4) ) NAMCOS2_GFXROM_LOAD_128K( "wdchr1.bin", 0x080000, CRC(8a1431e8) SHA1(ef3c81ea92f2541387760c24395ddf7a02f907f2) ) NAMCOS2_GFXROM_LOAD_128K( "wdchr2.bin", 0x100000, CRC(62f75f69) SHA1(bcfd34c3c450cd05eb6a080307dc962687ccc799) ) @@ -5248,13 +5142,13 @@ ROM_START( valkyrie ) NAMCOS2_GFXROM_LOAD_128K( "wdchr4.bin", 0x200000, CRC(2f73d05e) SHA1(76341fd8c5e4216430eb09ded38ac554b5777ee5) ) NAMCOS2_GFXROM_LOAD_128K( "wdchr5.bin", 0x280000, CRC(b632b2ec) SHA1(914cb9a0dd42067b93e47c8cf847d588f361854f) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "wdroz0.bin", 0x000000, CRC(f776bf66) SHA1(2b134d5f9ede1205260a2109fdcd0d5c47b397ba) ) NAMCOS2_GFXROM_LOAD_128K( "wdroz1.bin", 0x080000, CRC(c1a345c3) SHA1(3d8c2ab457b81485014a83b4d9e8a80fe487ddef) ) NAMCOS2_GFXROM_LOAD_128K( "wdroz2.bin", 0x100000, CRC(28ffb44a) SHA1(207343e76dd02cbfe7575edd9b18074f68bb6768) ) NAMCOS2_GFXROM_LOAD_128K( "wdroz3.bin", 0x180000, CRC(7e77b46d) SHA1(db0ba244fb878120a4f06af4666ddc4cc430c97a) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "wdshape.bin", 0x000000, CRC(3b5e0249) SHA1(259bbabf57a8ad739c646c56aad6d0b92e10adcd) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -5286,25 +5180,25 @@ ROM_START( kyukaidk ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "ky1_o0.bin", 0x000000, 0x80000, CRC(ebec5132) SHA1(8d2dec3f1cd27c203899bb715a9983fff7ab820d) ) ROM_LOAD( "ky1_o1.bin", 0x080000, 0x80000, CRC(fde7e5ae) SHA1(e17822f885977e10b6d1524a3d97fa9640472f8a) ) ROM_LOAD( "ky1_o2.bin", 0x100000, 0x80000, CRC(2a181698) SHA1(bad62c6c59b4362d6815749b5622e321b6051ea4) ) ROM_LOAD( "ky1_o3.bin", 0x180000, 0x80000, CRC(71fcd3a6) SHA1(8f2ba9c1d4fabbac07d1c80dfc3580cc67594071) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "ky1_c0.bin", 0x000000, CRC(7bd69a2d) SHA1(21402395eaacd4c25e5f023ea48a206b818b9c25) ) NAMCOS2_GFXROM_LOAD_128K( "ky1_c1.bin", 0x080000, CRC(66a623fe) SHA1(35404b3aa05263dda6be7c1903ea77677e3c58cb) ) NAMCOS2_GFXROM_LOAD_128K( "ky1_c2.bin", 0x100000, CRC(e84b3dfd) SHA1(742c88c187c14301afaabd0d2d8eba11185aaef1) ) NAMCOS2_GFXROM_LOAD_128K( "ky1_c3.bin", 0x180000, CRC(69e67c86) SHA1(c835ad3e6908acd96b299826c2caa61255958f8c) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_256K( "ky1_r0.bin", 0x000000, CRC(9213e8c4) SHA1(178ea4db500adbc945bab0b6f1a014e89c077d77) ) NAMCOS2_GFXROM_LOAD_256K( "ky1_r1.bin", 0x080000, CRC(97d1a641) SHA1(d1708dcc668ad126ee34f7f84cbac9a56a617d7b) ) NAMCOS2_GFXROM_LOAD_256K( "ky1_r2.bin", 0x100000, CRC(39b58792) SHA1(1c30a04a370f56d2b548bf19c551acc95316693b) ) NAMCOS2_GFXROM_LOAD_256K( "ky1_r3.bin", 0x180000, CRC(90c60d92) SHA1(b581d5f4d6c353604e0c9bcb27252a44b1b4e91c) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "ky1_sha.bin", 0x000000, CRC(380a20d7) SHA1(9627d2e0192779d50bfb25d5c19976275818c310) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -5333,25 +5227,25 @@ ROM_START( kyukaidko ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "ky1_o0.bin", 0x000000, 0x80000, CRC(ebec5132) SHA1(8d2dec3f1cd27c203899bb715a9983fff7ab820d) ) ROM_LOAD( "ky1_o1.bin", 0x080000, 0x80000, CRC(fde7e5ae) SHA1(e17822f885977e10b6d1524a3d97fa9640472f8a) ) ROM_LOAD( "ky1_o2.bin", 0x100000, 0x80000, CRC(2a181698) SHA1(bad62c6c59b4362d6815749b5622e321b6051ea4) ) ROM_LOAD( "ky1_o3.bin", 0x180000, 0x80000, CRC(71fcd3a6) SHA1(8f2ba9c1d4fabbac07d1c80dfc3580cc67594071) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* Tiles */ NAMCOS2_GFXROM_LOAD_128K( "ky1_c0.bin", 0x000000, CRC(7bd69a2d) SHA1(21402395eaacd4c25e5f023ea48a206b818b9c25) ) NAMCOS2_GFXROM_LOAD_128K( "ky1_c1.bin", 0x080000, CRC(66a623fe) SHA1(35404b3aa05263dda6be7c1903ea77677e3c58cb) ) NAMCOS2_GFXROM_LOAD_128K( "ky1_c2.bin", 0x100000, CRC(e84b3dfd) SHA1(742c88c187c14301afaabd0d2d8eba11185aaef1) ) NAMCOS2_GFXROM_LOAD_128K( "ky1_c3.bin", 0x180000, CRC(69e67c86) SHA1(c835ad3e6908acd96b299826c2caa61255958f8c) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_256K( "ky1_r0.bin", 0x000000, CRC(9213e8c4) SHA1(178ea4db500adbc945bab0b6f1a014e89c077d77) ) NAMCOS2_GFXROM_LOAD_256K( "ky1_r1.bin", 0x080000, CRC(97d1a641) SHA1(d1708dcc668ad126ee34f7f84cbac9a56a617d7b) ) NAMCOS2_GFXROM_LOAD_256K( "ky1_r2.bin", 0x100000, CRC(39b58792) SHA1(1c30a04a370f56d2b548bf19c551acc95316693b) ) NAMCOS2_GFXROM_LOAD_256K( "ky1_r3.bin", 0x180000, CRC(90c60d92) SHA1(b581d5f4d6c353604e0c9bcb27252a44b1b4e91c) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "ky1_sha.bin", 0x000000, CRC(380a20d7) SHA1(9627d2e0192779d50bfb25d5c19976275818c310) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -5380,21 +5274,21 @@ ROM_START( gollygho ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "gl1edr0c.ic7", 0x0000, 0x8000, CRC(db60886f) SHA1(a1183c058c0470a4ef8b0f69a3637b1640c5b5a4) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "gl1obj0.5b", 0x000000, 0x40000, CRC(6809d267) SHA1(8a0f636067974e51659bd05a3c17819c630d70e3) ) ROM_LOAD( "gl1obj1.4b", 0x080000, 0x40000, CRC(ae4304d4) SHA1(e3db507acf2ab9392060fc603bb95492d0251adc) ) ROM_LOAD( "gl1obj2.5d", 0x100000, 0x40000, CRC(9f2e9eb0) SHA1(d3b001286a5ede58860505bb2f48a755cc661f1f) ) ROM_LOAD( "gl1obj3.4d", 0x180000, 0x40000, CRC(3a85f3c2) SHA1(013148cc0174d39bb16a71cce01c0dc7044d2f42) ) - ROM_REGION( 0x60000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x60000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "gl1chr0.11n", 0x00000, 0x20000, CRC(1a7c8abd) SHA1(59ddc278c46e545bbc3d66e84810c40aaf703d9a) ) ROM_LOAD( "gl1chr1.11p", 0x20000, 0x20000, CRC(36aa0fbc) SHA1(47dc10e689843962b51097c6ca27e00a221d2b48) ) ROM_LOAD( "gl1chr2.11r", 0x40000, 0x10000, CRC(6c1964ba) SHA1(1aec2ce598751f4f0ba575f4a944647e831f6a87) ) - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASEFF ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", ROMREGION_ERASEFF ) /* ROZ Tiles */ /* All ROZ ROM sockets unpopulated on PCB */ - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "gl1sha0.7n", 0x000000, CRC(8886f6f5) SHA1(3b311c5061449e1bbde1a1006fd967a6154326b8) ) ROM_REGION16_BE( 0x200000, "data_rom", ROMREGION_ERASEFF ) /* Shared data roms */ @@ -5426,20 +5320,20 @@ ROM_START( bubbletr ) /* All labels were hand written and included the rom size, ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "bt1edr0a.ic7", 0x0000, 0x8000, CRC(155b02fc) SHA1(191683c19f756ac150b8e037f46a6daca1a082fa) ) /* dated 4/24 */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "bt1-obj0.5b", 0x000000, 0x80000, CRC(16b5dc04) SHA1(57cc4b7907442f922102fbd61e470c149f0379ac) ) /* dated 4/24 */ ROM_LOAD( "bt1-obj1.4b", 0x080000, 0x80000, CRC(ae37a969) SHA1(524a8ef68a62f9168d356e6cd37a72a888ced202) ) /* dated 4/24 */ ROM_LOAD( "bt1-obj2.5d", 0x100000, 0x80000, CRC(75f74871) SHA1(75c47a2132e21a2d82000bca137929bffecc96ef) ) /* dated 4/24 */ ROM_LOAD( "bt1-obj3.4d", 0x180000, 0x80000, CRC(7fb23c05) SHA1(da97c595a3338021c1bc46f9668e1ec6c7985cea) ) /* dated 4/24 */ - ROM_REGION( 0x200000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x200000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "bt1-chr0.11n", 0x00000, 0x80000, CRC(11574c30) SHA1(6e85dd1448961b89a13e8cf905b24a69d182edd8) ) /* dated 4/24 */ /* no chr1, chr2 missing or just not needed? probably just not needed as I see no tile glitches */ - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASEFF ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", ROMREGION_ERASEFF ) /* ROZ Tiles */ /* All ROZ ROM sockets unpopulated on PCB */ - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "bt1-sha0.7n", 0x000000, 0x80000, CRC(dc4664df) SHA1(59818b14e74ee9b15a66e850658e4697d78b28d9) ) /* dated 4/24 */ ROM_REGION16_BE( 0x200000, "data_rom", ROMREGION_ERASEFF ) /* Shared data roms */ @@ -5472,20 +5366,20 @@ ROM_START( bubbletrj ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "bt1edr0a.ic7", 0x0000, 0x8000, CRC(155b02fc) SHA1(191683c19f756ac150b8e037f46a6daca1a082fa) ) - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "bt1-obj0.5b", 0x000000, 0x80000, CRC(16b5dc04) SHA1(57cc4b7907442f922102fbd61e470c149f0379ac) ) ROM_LOAD( "bt1-obj1.4b", 0x080000, 0x80000, CRC(ae37a969) SHA1(524a8ef68a62f9168d356e6cd37a72a888ced202) ) ROM_LOAD( "bt1-obj2.5d", 0x100000, 0x80000, CRC(75f74871) SHA1(75c47a2132e21a2d82000bca137929bffecc96ef) ) ROM_LOAD( "bt1-obj3.4d", 0x180000, 0x80000, CRC(7fb23c05) SHA1(da97c595a3338021c1bc46f9668e1ec6c7985cea) ) - ROM_REGION( 0x200000, "gfx2", 0 ) /* Tiles */ + ROM_REGION( 0x200000, "c123tmap", 0 ) /* Tiles */ ROM_LOAD( "bt1-chr0.11n", 0x00000, 0x80000, CRC(11574c30) SHA1(6e85dd1448961b89a13e8cf905b24a69d182edd8) ) /* no chr1, chr2 missing or just not needed? probably just not needed as I see no tile glitches */ - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASEFF ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "s2roz", ROMREGION_ERASEFF ) /* ROZ Tiles */ /* All ROZ ROM sockets unpopulated on PCB */ - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* Mask shape */ ROM_LOAD( "bt1-sha0.7n", 0x000000, 0x80000, CRC(dc4664df) SHA1(59818b14e74ee9b15a66e850658e4697d78b28d9) ) ROM_REGION16_BE( 0x200000, "data_rom", ROMREGION_ERASEFF ) /* Shared data roms */ @@ -5626,7 +5520,7 @@ ROM_START( luckywld ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "lw1obj0.3p", 0x000000, 0x80000, CRC(21485830) SHA1(e55a1f6df90c17b9c49e2b08c423b9be86996659) ) ROM_LOAD( "lw1obj1.3w", 0x100000, 0x80000, CRC(d6437a82) SHA1(0aad3242828ed7dce65db75cad196c44ddd55ba8) ) ROM_LOAD( "lw1obj2.3t", 0x200000, 0x80000, CRC(ceb6f516) SHA1(943dfe3bcf71a4885ce0ff33aaf81b2a49cf0b70) ) @@ -5637,7 +5531,7 @@ ROM_START( luckywld ) ROM_LOAD( "lw1obj6.3u", 0x280000, 0x80000, CRC(29740c88) SHA1(4078a5084256653a9c8ff72a7e2c652b0fbca425) ) ROM_LOAD( "lw1obj7.3z", 0x380000, 0x80000, CRC(8cbd62b4) SHA1(c6605ae2629b34f036e440573b2bb68e26aced9b) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* 8x8 Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* 8x8 Tiles */ ROM_LOAD( "lw1chr0.11n", 0x000000, 0x80000, CRC(a0da15fd) SHA1(d772f712f0c150fdeb5aafb84f27a1495ad3492c) ) ROM_LOAD( "lw1chr1.11p", 0x080000, 0x80000, CRC(89102445) SHA1(74d4e51a3540f72cc90fad04c7f0622930e0f854) ) ROM_LOAD( "lw1chr2.11r", 0x100000, 0x80000, CRC(c749b778) SHA1(f1e30f5269eced00a09af40717634ec65e64f06b) ) @@ -5645,15 +5539,15 @@ ROM_START( luckywld ) ROM_LOAD( "lw1chr4.9n", 0x200000, 0x80000, CRC(2f8ab45e) SHA1(2c7e5597ebf020aa88349c6d5a419ba0eee2db90) ) ROM_LOAD( "lw1chr5.9p", 0x280000, 0x80000, CRC(c9acbe61) SHA1(3a42ec1fcdf994bd9a309fdb48da01af4afb0a3f) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* 16x16 Tiles */ + ROM_REGION( 0x400000, "c169roz", 0 ) /* 16x16 Tiles */ ROM_LOAD( "lw1roz1.23c", 0x080000, 0x80000, CRC(74e98793) SHA1(973dce838d9fbdf112429ab20edcdfbf07c3a9dc) ) ROM_LOAD( "lw1roz2.23e", 0x000000, 0x80000, CRC(1ef46d82) SHA1(2234585875bccdff74fa3f66d2d25d4b419c3bfe) ) ROM_LOAD( "lw1roz0.23b", 0x1c0000, 0x80000, CRC(a14079c9) SHA1(631f9b63488fd3194ebb41c9c7ec39d576b098d7) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* 8x8 shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* 8x8 shape */ ROM_LOAD( "lw1sha0.7n", 0x000000, 0x80000, CRC(e3a65196) SHA1(c983a6d16dc10f0acd5f4ef5e148271f46ffbf28) ) - ROM_REGION( 0x80000, "gfx5", 0 ) /* 16x16 shape */ + ROM_REGION( 0x80000, "c169roz:mask", 0 ) /* 16x16 shape */ ROM_LOAD( "lw1rzs0.20z", 0x000000, 0x80000, CRC(a1071537) SHA1(bb8a97b82066d7838471e258d1c3c716ede7572c) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -5689,7 +5583,7 @@ ROM_START( luckywldj ) ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ /* external ROM not populated, unclear how it would map */ - ROM_REGION( 0x400000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x400000, "sprite", 0 ) /* Sprites */ ROM_LOAD( "lw1obj0.3p", 0x000000, 0x80000, CRC(21485830) SHA1(e55a1f6df90c17b9c49e2b08c423b9be86996659) ) ROM_LOAD( "lw1obj1.3w", 0x100000, 0x80000, CRC(d6437a82) SHA1(0aad3242828ed7dce65db75cad196c44ddd55ba8) ) ROM_LOAD( "lw1obj2.3t", 0x200000, 0x80000, CRC(ceb6f516) SHA1(943dfe3bcf71a4885ce0ff33aaf81b2a49cf0b70) ) @@ -5700,7 +5594,7 @@ ROM_START( luckywldj ) ROM_LOAD( "lw1obj6.3u", 0x280000, 0x80000, CRC(29740c88) SHA1(4078a5084256653a9c8ff72a7e2c652b0fbca425) ) ROM_LOAD( "lw1obj7.3z", 0x380000, 0x80000, CRC(8cbd62b4) SHA1(c6605ae2629b34f036e440573b2bb68e26aced9b) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* 8x8 Tiles */ + ROM_REGION( 0x400000, "c123tmap", 0 ) /* 8x8 Tiles */ ROM_LOAD( "lw1chr0.11n", 0x000000, 0x80000, CRC(a0da15fd) SHA1(d772f712f0c150fdeb5aafb84f27a1495ad3492c) ) ROM_LOAD( "lw1chr1.11p", 0x080000, 0x80000, CRC(89102445) SHA1(74d4e51a3540f72cc90fad04c7f0622930e0f854) ) ROM_LOAD( "lw1chr2.11r", 0x100000, 0x80000, CRC(c749b778) SHA1(f1e30f5269eced00a09af40717634ec65e64f06b) ) @@ -5708,15 +5602,15 @@ ROM_START( luckywldj ) ROM_LOAD( "lw1chr4.9n", 0x200000, 0x80000, CRC(2f8ab45e) SHA1(2c7e5597ebf020aa88349c6d5a419ba0eee2db90) ) ROM_LOAD( "lw1chr5.9p", 0x280000, 0x80000, CRC(c9acbe61) SHA1(3a42ec1fcdf994bd9a309fdb48da01af4afb0a3f) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* 16x16 Tiles */ + ROM_REGION( 0x400000, "c169roz", 0 ) /* 16x16 Tiles */ ROM_LOAD( "lw1roz1.23c", 0x080000, 0x80000, CRC(74e98793) SHA1(973dce838d9fbdf112429ab20edcdfbf07c3a9dc) ) ROM_LOAD( "lw1roz2.23e", 0x000000, 0x80000, CRC(1ef46d82) SHA1(2234585875bccdff74fa3f66d2d25d4b419c3bfe) ) ROM_LOAD( "lw1roz0.23b", 0x1c0000, 0x80000, CRC(a14079c9) SHA1(631f9b63488fd3194ebb41c9c7ec39d576b098d7) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* 8x8 shape */ + ROM_REGION( 0x080000, "c123tmap:mask", 0 ) /* 8x8 shape */ ROM_LOAD( "lw1sha0.7n", 0x000000, 0x80000, CRC(e3a65196) SHA1(c983a6d16dc10f0acd5f4ef5e148271f46ffbf28) ) - ROM_REGION( 0x80000, "gfx5", 0 ) /* 16x16 shape */ + ROM_REGION( 0x80000, "c169roz:mask", 0 ) /* 16x16 shape */ ROM_LOAD( "lw1rzs0.20z", 0x000000, 0x80000, CRC(a1071537) SHA1(bb8a97b82066d7838471e258d1c3c716ede7572c) ) ROM_REGION16_BE( 0x200000, "data_rom", 0 ) /* Shared data roms */ @@ -5820,8 +5714,8 @@ void namcos2_state::init_marvland() void namcos2_state::init_metlhawk() { /* unscramble sprites */ - uint8_t *data = memregion("gfx1")->base(); - int size = memregion("gfx1")->bytes(); + uint8_t *data = memregion("sprite")->base(); + int size = memregion("sprite")->bytes(); for (int i=0; i<size; i+=32*32) { for (int j=0; j<32*32; j+=32*4) @@ -5945,7 +5839,7 @@ void namcos2_state::init_bubbletr() void namcos2_state::init_luckywld() { - uint8_t *pData = (uint8_t *)memregion( "gfx5" )->base(); + uint8_t *pData = (uint8_t *)memregion( "c169roz:mask" )->base(); int i; for( i=0; i<32*0x4000; i++ ) { /* unscramble gfx mask */ diff --git a/src/mame/drivers/namcos21.cpp b/src/mame/drivers/namcos21.cpp index 88610cbc8dd..5b716da7488 100644 --- a/src/mame/drivers/namcos21.cpp +++ b/src/mame/drivers/namcos21.cpp @@ -1,42 +1,21 @@ // license:BSD-3-Clause // copyright-holders:Phil Stroffolino /** -2008/06/11, by Naibo(translated to English by Mameplus team): -Driver's Eyes works, - -the communication work between CPU and 3D DSP should be limited to the master M68000, - if the address mapping is done in the shared memory, master CPU would be disturbed by the slave one. - - -DIP Switches - DIP3 ON for Screen on the left - DIP4 ON for Screen on the right - should not toggle on both - - -The left, center and right screens have separate programs and boards, each would work independently. - About projection angles of left and right screen, the angle is correct on "DRIVER'S EYES" title screen, however in the tracks of demo mode it doesn't seem correct. - - -On demo screen, should fog effects be turned off? - - -The game also features a pretty nice 2D sprite layer, which still doesn't show up yet. - it is known that the CPU does constantly feed the 2D video memory some meaningful and logical data. - Namco System 21 -Winning Run - polygon glitches/flicker - posirq effects for bitmap layer not working - -Driver's Eyes - not yet working + | Winning Run(1)|Driver's Eyes(2) | Cyber Sled, Star Blade etc.(3) +--------------------------+---------------+-----------------+-------------------------- +GPU+bitmap layer | yes | no | no +Namco System NB1 Sprites | no | yes | yes +Number of DSPs | 1x TMS320C25 | 1x TMS320C25 | 1x Master C67 (TMS320C25) + | | | 4x Slave C67 - Questions? pstroffo@yahoo.com (Phil Stroffolino) +(1) namcos21.cpp (this driver) +(2) namcos21_de.cpp +(3) namcos21_c67.cpp - There are at least four hardware variations, all of which are based on Namco System2: +Galaxian 3 (gal3.cpp) uses the same DSP PCB as Cyber Sled, Star Blade etc. (2x, 1 for each screen) - | Winning Run | Driver's Eyes | Starblade | Cyber Sled ---------------------------+-------------+---------------+-----------+------------ -GPU+bitmap layer | yes | no | no | no -Namco System NB1 Sprites | no | yes | yes | yes -Number of DSPs | 1 | 1 | 5 | 1x Ma, 4x Sl The main 68k CPUs populate a chunk of shared RAM with an display list describing a scene to be rendered. The main CPUs also specify attributes for a master camera which provides additional global transformations. @@ -53,12 +32,16 @@ Each quad has a reference color (shared across vertices), and for each vertex th The z-code scalar accounts for depth bias. A zbuffer is used while rendering quads, and depth cueing is used to shade pixels according to their depth. ---------------------------------------------------------------------------- +------------------- + -STATUS: - Solvaou: - Air Combat: - no polys - why? + +Winning Run + polygon glitches/flicker + posirq effects for bitmap layer not working + + + NOTES: Winning Run Winning Run 91 @@ -66,235 +49,6 @@ STATUS: - some minor polygon glitches - posirq handling broken - Driver's Eyes - Left and Right screen - -TODO: (*) Extract DSP BIOS - -TODO: namcoic.c: in StarBlade, the sprite list is stored at a different location during startup tests. - What register controls this? - -TODO: Map lamps/vibration outputs as used by StarBlade (and possibly other titles). - These likely involve the MCU. - ---------------------------------------------------------------------------- - -DSP RAM is shared with the 68000 CPUs and master DSP. -The memory map below reflects DSP RAM as seen by the 68000 CPUs. - - 0x200000: ROM: - 0x200010: RAM: - 0x200020: PTR: - 0x200024: <checksum> - 0x200028: <checksum> - 0x200030: SMU: // "NO RESPONS" (DSP) - 0x200040: IDC: // "NO RESPONS" (DSP) - 0x200050: CPU: BOOTING..COMPLETE - 0x200060: DSP: - 0x200070: CRC: OK from cpu - 0x200080: CRC: from dsp - 0x200090: ID: - 0x2000a0: B-M: - 0x2000b0: P-M: - 0x2000c0: S-M: - 0x200100 status: 2=upload needed, 4=error (abort) - 0x200102 status - 0x200104 0x0002 - 0x200106 addr written by main cpu - 0x20010a point rom checksum (starblade expects 0xed53) - 0x20010c point rom checksum (starblade expects 0xd5df) - 0x20010e 1 : upload-code-to-dsp request trigger - 0x200110 status - 0x200112 status - 0x200114 master dsp code size - 0x200116 slave dsp code size - 0x200120 upload source1 addr hi - 0x200122 upload source1 addr lo - 0x200124 upload source2 addr hi - 0x200126 upload source2 addr lo - 0x200200 enable - 0x200202 status - 0x200206 work page select - 0x200208 0xa2c2 (air combat) - 0x208000..0x2080ff camera attributes for page#0 - 0x208200..0x208fff 3d object attribute display list for page#0 - 0x20c000..0x20c0ff camera attributes for page#1 - 0x20c200..0x20cfff 3d object attribute display list for page#1 - - Starblade Cybersled AirCombat22 Solvalou -[400]:= 00 0000 00 0000 00 0000 00 0000 -[402]:= 00 0011 00 0011 00 0011 00 0011 -[404]:= 00 0000 00 0000 00 0000 00 0000 -[406]:= 00 0000 00 0000 00 0000 00 0000 -[408]:= 10 1002 10 1000 10 1000 10 1000 -[40a]:= 02 0000 00 0000 00 0000 00 ffff -[40c]:= 00 1040 00 023a 00 1000 ff ffff -[40e]:= 00 0000 00 0000 00 0000 ff ffff -[410]:= 10 1034 02 0258 10 1000 ff ffff -[412]:= 40 0000 3a 0000 00 0000 ff ffff -[414]:= 00 1030 00 027a 00 1000 ff ffff -[416]:= 00 0000 00 0000 00 0000 ff ffff -[418]:= 10 1030 02 02a2 10 1000 ff ffff -[41a]:= 34 0000 58 0000 00 0000 ff ffff -[41c]:= 00 1030 00 02c2 00 1000 ff ffff -[41e]:= 00 0000 00 0000 00 0000 ff ffff -[420]:= 10 1030 02 02e6 10 1000 ff ffff - ---------------------------------------------------------------------------- - -Thanks to Aaron Giles for originally making sense of the Point ROM data. - -Point data in ROMS (signed 24 bit words) encodes the 3d primitives. - -The first part of the Point ROMs is an address table. - -Given an object index, this table provides an address into the second part of -the ROM. - -The second part of the ROM is a series of display lists. -This is a sequence of pointers to actual polygon data. There may be -more than one, and the list is terminated by $ffffff. - -The remainder of the ROM is a series of polygon data. The first word of each -entry is the length of the entry (in words, not counting the length word). - -The rest of the data in each entry is organized as follows: - -length (1 word) -quad index (1 word) - this increments with each entry -vertex count (1 word) - the number of vertices encoded -unknown value (1 word) - almost always 0; depth bias -vertex list (n x 3 words) -quad count (1 word) - the number of quads to draw -quad primitives (n x 5 words) - color code and four vertex indices - ------------------------------------------------------------------------ -Board 1 : DSP Board - 1st PCB. (Uppermost) -DSP Type 1 : 1 x Master TMS320C25 (C67) 4 x Slave TMS320C25 (C67) each connected to a Namco Custom chip 342 -DSP Type 2 : 5 x TMS320C20 (Starblade) (verify this information) -OSC: 40.000MHz -RAM: HM62832 x 2, M5M5189 x 4, ISSI IS61C68 x 16 -ROMS: TMS27C040 -Custom Chips: -4 x Namco Custom 327 (24 pin NDIP), each one located next to a chip 67. -4 x Namco Custom chip 342 (160 pin PQFP), there are 3 leds (red/green/yellow) connected to each 342 chip. (12 leds total) -2 x Namco Custom 197 (28 pin NDIP) -Namco Custom chip 317 IDC (180 pin PQFP) -Namco Custom chip 195 (160 pin PQFP) ------------------------------------------------------------------------ -Board 2 : Unknown Board - 2nd PCB (no roms) -OSC: 20.000MHz -RAM: HM62256 x 10, 84256 x 4, CY7C128 x 5, M5M5178 x 4 -OTHER Chips: -MB8422-90LP -L7A0565 316 (111) x 1 (100 PIN PQFP) -150 (64 PIN PQFP) -167 (128 PIN PQFP) -L7A0564 x 2 (100 PIN PQFP) -157 x 16 (24 PIN NDIP) ------------------------------------------------------------------------ -Board 3 : CPU Board - 3rd PCB (looks very similar to Namco System 2 CPU PCB) -CPU: MC68000P12 x 2 @ 12 MHz (16-bit) -Sound CPU: MC68B09EP (3 MHz) -Sound Chips: C140 24-channel PCM (Sound Effects), YM2151 (Music), YM3012 (?) -XTAL: 3.579545 MHz -OSC: 49.152 MHz -RAM: MB8464 x 2, MCM2018 x 2, HM65256 x 4, HM62256 x 2 - -Other Chips: -Sharp PC900 - Opto-isolator -Sharp PC910 - Opto-isolator -HN58C65P (EEPROM) -MB3771 -MB87077-SK x 2 (24 pin NDIP, located in sound section) -LB1760 (16 pin DIP, located next to SYS87B-2B) -CY7C132 (48 PIN DIP) - -Namco Custom: -148 x 2 (64 pin PQFP) -C68 (64 pin PQFP) -139 (64 pin PQFP) -137 (28 pin NDIP) -149 (28 pin NDIP, near C68) ------------------------------------------------------------------------ -Board 4 : 4th PCB (bottom-most) -OSC: 38.76922 MHz -There is a 6 wire plug joining this PCB with the CPU PCB. It appears to be video cable (RGB, Sync etc..) -Jumpers: -JP7 INTERLACE = SHORTED (Other setting is NON-INTERLACE) -JP8 68000 = SHORTED (Other setting is 68020) -Namco Custom Chips: -C355 (160 pin PQFP) -187 (120 pin PQFP) -138 (64 pin PQFP) -165 (28 pin NDIP) ------------------------------------------------------------------------ - -There is a newer 2 board stack known as the SYSTEM21B which combines -the functions of 2 boards into a single board twice the size. - ------------------------------------------------------------------------ - -------------------- -Air Combat by NAMCO -------------------- -malcor - - -Location Device File ID Checksum -------------------------------------------------- -CPU68 1J 27C4001 MPR-L.AC1 9859 [ main program ] [ rev AC1 ] -CPU68 3J 27C4001 MPR-U.AC1 97F1 [ main program ] [ rev AC1 ] -CPU68 1J 27C4001 MPR-L.AC2 C778 [ main program ] [ rev AC2 ] -CPU68 3J 27C4001 MPR-U.AC2 6DD9 [ main program ] [ rev AC2 ] -CPU68 1C MB834000 EDATA1-L.AC1 7F77 [ data ] -CPU68 3C MB834000 EDATA1-U.AC1 FA2F [ data ] -CPU68 3A MB834000 EDATA-U.AC1 20F2 [ data ] -CPU68 1A MB834000 EDATA-L.AC1 9E8A [ data ] -CPU68 8J 27C010 SND0.AC1 71A8 [ sound prog ] -CPU68 12B MB834000 VOI0.AC1 08CF [ voice 0 ] -CPU68 12C MB834000 VOI1.AC1 925D [ voice 1 ] -CPU68 12D MB834000 VOI2.AC1 C498 [ voice 2 ] -CPU68 12E MB834000 VOI3.AC1 DE9F [ voice 3 ] -CPU68 4C 27C010 SPR-L.AC1 473B [ slave prog L ] [ rev AC1 ] -CPU68 6C 27C010 SPR-U.AC1 CA33 [ slave prog U ] [ rev AC1 ] -CPU68 4C 27C010 SPR-L.AC2 08CE [ slave prog L ] [ rev AC2 ] -CPU68 6C 27C010 SPR-U.AC2 A3F1 [ slave prog U ] [ rev AC2 ] -OBJ(B) 5S HN62344 OBJ0.AC1 CB72 [ object data ] -OBJ(B) 5X HN62344 OBJ1.AC1 85E2 [ object data ] -OBJ(B) 3S HN62344 OBJ2.AC1 89DC [ object data ] -OBJ(B) 3X HN62344 OBJ3.AC1 58FF [ object data ] -OBJ(B) 4S HN62344 OBJ4.AC1 46D6 [ object data ] -OBJ(B) 4X HN62344 OBJ5.AC1 7B91 [ object data ] -OBJ(B) 2S HN62344 OBJ6.AC1 5736 [ object data ] -OBJ(B) 2X HN62344 OBJ7.AC1 6D45 [ object data ] -OBJ(B) 17N PLHS18P8 3P0BJ3 4342 -OBJ(B) 17N PLHS18P8 3POBJ4 1143 -DSP 2N HN62344 AC1-POIL.L 8AAF [ DSP data ] -DSP 2K HN62344 AC1-POIL.L CF90 [ DSP data ] -DSP 2E HN62344 AC1-POIH 4D02 [ DSP data ] -DSP 17D GAL16V8A 3PDSP5 6C00 - -NOTE: CPU68 - CPU board 2252961002 (2252971002) - OBJ(B) - Object board 8623961803 (8623963803) - DSP - DSP board 8623961703 (8623963703) - PGN(C) - PGN board 2252961300 (8623963600) - - Namco System 21 Hardware - - ROMs that have the same locations are different revisions - of the same ROMs (AC1 or AC2). - -Jumper settings: - -Location Position set alt. setting ----------------------------------------- - -CPU68 PCB: - - JP2 /D-ST /VBL - JP3 - ***************************** Winning Run / Winning Run Suzuka GP/ Winning Run 91 @@ -518,980 +272,284 @@ Filter Board **************************** */ -#include "emu.h" -#include "includes/namcos21.h" +#include "emu.h" +#include "screen.h" +#include "emupal.h" +#include "speaker.h" #include "cpu/m68000/m68000.h" #include "cpu/m6805/m6805.h" #include "cpu/m6809/m6809.h" #include "cpu/tms32025/tms32025.h" -#include "sound/ym2151.h" +#include "machine/timer.h" #include "machine/nvram.h" -#include "speaker.h" +#include "machine/namco65.h" +#include "machine/namcos21_dsp.h" +#include "machine/namco_c139.h" +#include "machine/namco_c148.h" +#include "video/namcos21_3d.h" +#include "sound/c140.h" +#include "sound/ym2151.h" -#define PTRAM_SIZE 0x20000 // TODO: basic parameters to get 60.606060 Hz, x2 is for interlace #define MCFG_SCREEN_RAW_PARAMS_NAMCO480I \ MCFG_SCREEN_RAW_PARAMS(12288000*2, 768, 0, 496, 264*2,0,480) #define ENABLE_LOGGING 0 +#define NAMCOS21_NUM_COLORS 0x8000 + +class namcos21_state : public driver_device +{ +public: + namcos21_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_audiocpu(*this, "audiocpu"), + m_slave(*this, "slave"), + m_c65(*this, "c65mcu"), + m_sci(*this, "sci"), + m_master_intc(*this, "master_intc"), + m_slave_intc(*this, "slave_intc"), + m_c140(*this, "c140"), + m_palette(*this, "palette"), + m_screen(*this, "screen"), + m_audiobank(*this, "audiobank"), + m_dpram(*this, "dpram"), + m_gpu_intc(*this, "gpu_intc"), + m_namcos21_3d(*this, "namcos21_3d"), + m_namcos21_dsp(*this, "namcos21dsp") + { } + + void configure_c148_standard(machine_config &config); + void winrun(machine_config &config); + + void init_winrun(); + +private: + required_device<cpu_device> m_maincpu; + required_device<cpu_device> m_audiocpu; + required_device<cpu_device> m_slave; + required_device<namcoc65_device> m_c65; + required_device<namco_c139_device> m_sci; + required_device<namco_c148_device> m_master_intc; + required_device<namco_c148_device> m_slave_intc; + required_device<c140_device> m_c140; + required_device<palette_device> m_palette; + required_device<screen_device> m_screen; + required_memory_bank m_audiobank; + required_shared_ptr<uint8_t> m_dpram; + required_device<namco_c148_device> m_gpu_intc; + required_device<namcos21_3d_device> m_namcos21_3d; + required_device<namcos21_dsp_device> m_namcos21_dsp; + + std::unique_ptr<uint8_t[]> m_gpu_videoram; + std::unique_ptr<uint8_t[]> m_gpu_maskram; + + uint16_t m_video_enable; + + uint16_t m_winrun_color; + uint16_t m_winrun_gpu_register[0x10/2]; + DECLARE_READ16_MEMBER(video_enable_r); + DECLARE_WRITE16_MEMBER(video_enable_w); + + DECLARE_READ16_MEMBER(dpram_word_r); + DECLARE_WRITE16_MEMBER(dpram_word_w); + DECLARE_READ8_MEMBER(dpram_byte_r); + DECLARE_WRITE8_MEMBER(dpram_byte_w); + + DECLARE_READ16_MEMBER(winrun_gpu_color_r); + DECLARE_WRITE16_MEMBER(winrun_gpu_color_w); + DECLARE_READ16_MEMBER(winrun_gpu_register_r); + DECLARE_WRITE16_MEMBER(winrun_gpu_register_w); + DECLARE_WRITE16_MEMBER(winrun_gpu_videoram_w); + DECLARE_READ16_MEMBER(winrun_gpu_videoram_r); + + DECLARE_WRITE8_MEMBER(eeprom_w); + DECLARE_READ8_MEMBER(eeprom_r); + + DECLARE_WRITE8_MEMBER(sound_bankselect_w); + + DECLARE_WRITE8_MEMBER(sound_reset_w); + DECLARE_WRITE8_MEMBER(system_reset_w); + void reset_all_subcpus(int state); + + std::unique_ptr<uint8_t[]> m_eeprom; + + TIMER_DEVICE_CALLBACK_MEMBER(screen_scanline); + + virtual void machine_start() override; + virtual void machine_reset() override; + + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + void winrun_bitmap_draw(bitmap_ind16 &bitmap, const rectangle &cliprect); + + void configure_c65_namcos21(machine_config &config); + + void winrun_master_map(address_map &map); + void winrun_slave_map(address_map &map); + void winrun_gpu_map(address_map &map); + + void sound_map(address_map &map); +}; -int32_t namcos21_state::read_pointrom_data(unsigned offset) -{ - return m_ptrom24[offset]; -} - -READ16_MEMBER(namcos21_state::namcos21_video_enable_r) -{ - return m_video_enable; -} - -WRITE16_MEMBER(namcos21_state::namcos21_video_enable_w) -{ - COMBINE_DATA( &m_video_enable ); /* 0x40 = enable */ - if( m_video_enable!=0 && m_video_enable!=0x40 ) - { - logerror( "unexpected namcos21_video_enable_w=0x%x\n", m_video_enable ); - } -} - - -/***********************************************************/ -WRITE16_MEMBER(namcos21_state::dspcuskey_w) -{ /* TODO: proper cuskey emulation */ -} - -READ16_MEMBER(namcos21_state::dspcuskey_r) -{ - uint16_t result = 0; - if( m_gametype == NAMCOS21_SOLVALOU ) - { - switch( m_dspmaster->pc() ) - { - case 0x805e: result = 0x0000; break; - case 0x805f: result = 0xfeba; break; - case 0x8067: result = 0xffff; break; - case 0x806e: result = 0x0145; break; - default: - logerror( "unk cuskey_r; pc=0x%x\n", m_dspmaster->pc() ); - break; - } - } - else if( m_gametype == NAMCOS21_CYBERSLED ) - { - switch( m_dspmaster->pc() ) - { - case 0x8061: result = 0xfe95; break; - case 0x8069: result = 0xffff; break; - case 0x8070: result = 0x016A; break; - default: - break; - } - } - else if( m_gametype == NAMCOS21_AIRCOMBAT ) - { - switch( m_dspmaster->pc() ) - { - case 0x8062: result = 0xfeb9; break; - case 0x806a: result = 0xffff; break; - case 0x8071: result = 0x0146; break; - default: - break; - } - } - return result; -} - -void namcos21_state::transmit_word_to_slave(uint16_t data) -{ - unsigned offs = m_mpDspState->slaveInputStart+m_mpDspState->slaveBytesAvailable++; - m_mpDspState->slaveInputBuffer[offs%DSP_BUF_MAX] = data; - if (ENABLE_LOGGING) logerror( "+%04x(#%04x)\n", data, m_mpDspState->slaveBytesAvailable ); - m_mpDspState->slaveActive = 1; - if( m_mpDspState->slaveBytesAvailable >= DSP_BUF_MAX ) - { - fatalerror( "IDC overflow\n" ); - } -} - -void namcos21_state::transfer_dsp_data() -{ - uint16_t addr = m_mpDspState->masterSourceAddr; - int mode = addr&0x8000; - addr&=0x7fff; - if( addr ) - { - for(;;) - { - int i; - uint16_t old = addr; - uint16_t code = m_dspram16[addr++]; - if( code == 0xffff ) - { - if( mode ) - { - addr = m_dspram16[addr]; - m_mpDspState->masterSourceAddr = addr; - if (ENABLE_LOGGING) logerror( "LOOP:0x%04x\n", addr ); - addr&=0x7fff; - if( old==addr ) - { - return; - } - } - else - { - m_mpDspState->masterSourceAddr = 0; - return; - } - } - else if( mode==0 ) - { /* direct data transfer */ - if (ENABLE_LOGGING) logerror( "DATA TFR(0x%x)\n", code ); - transmit_word_to_slave(code); - for( i=0; i<code; i++ ) - { - uint16_t data = m_dspram16[addr++]; - transmit_word_to_slave(data); - } - } - else if( code==0x18 || code==0x1a ) - { - if (ENABLE_LOGGING) logerror( "HEADER TFR(0x%x)\n", code ); - transmit_word_to_slave(code+1); - for( i=0; i<code; i++ ) - { - uint16_t data = m_dspram16[addr++]; - transmit_word_to_slave(data); - } - } - else - { - int32_t masterAddr = read_pointrom_data(code); - if (ENABLE_LOGGING) logerror( "OBJ TFR(0x%x)\n", code ); - { - uint16_t len = m_dspram16[addr++]; - for(;;) - { - int subAddr = read_pointrom_data(masterAddr++); - if( subAddr==0xffffff ) - { - break; - } - else - { - int primWords = (uint16_t)read_pointrom_data(subAddr++); - // TODO: this function causes an IDC overflow in Solvalou, something else failed prior to that? - // In Header TFR when bad parameters happens there's a suspicious 0x000f 0x0003 as first two words, - // maybe it's supposed to have a different length there ... - // cfr: object code 0x17 in service mode - if( primWords>2 ) - { - transmit_word_to_slave(0); /* pad1 */ - transmit_word_to_slave(len+1); - for( i=0; i<len; i++ ) - { /* transform */ - transmit_word_to_slave(m_dspram16[addr+i]); - } - transmit_word_to_slave(0); /* pad2 */ - transmit_word_to_slave(primWords+1); - for( i=0; i<primWords; i++ ) - { - transmit_word_to_slave((uint16_t)read_pointrom_data(subAddr+i)); - } - } - else - { - if (ENABLE_LOGGING) logerror( "TFR NOP?\n" ); - } - } - } /* for(;;) */ - addr+=len; - } - } - } /* for(;;) */ - } -} - - - -void namcos21_kickstart(running_machine &machine, int internal) -{ - namcos21_state *state = machine.driver_data<namcos21_state>(); - - /* patch dsp watchdog */ - switch (state->m_gametype) - { - case namcos21_state::NAMCOS21_AIRCOMBAT: - state->m_master_dsp_code[0x008e] = 0x808f; - break; - case namcos21_state::NAMCOS21_SOLVALOU: - state->m_master_dsp_code[0x008b] = 0x808c; - break; - default: - break; - } - if (internal) - { - if (state->m_mbNeedsKickstart == 0) return; - state->m_mbNeedsKickstart--; - if (state->m_mbNeedsKickstart) return; - } - - state->clear_poly_framebuffer(); - state->m_mpDspState->masterSourceAddr = 0; - state->m_mpDspState->slaveOutputSize = 0; - state->m_mpDspState->masterFinished = 0; - state->m_mpDspState->slaveActive = 0; - state->m_dspmaster->set_input_line(0, HOLD_LINE); - state->m_dspslave->pulse_input_line(INPUT_LINE_RESET, attotime::zero); -} - -uint16_t namcos21_state::read_word_from_slave_input() -{ - uint16_t data = 0; - if( m_mpDspState->slaveBytesAvailable>0 ) - { - data = m_mpDspState->slaveInputBuffer[m_mpDspState->slaveInputStart++]; - m_mpDspState->slaveInputStart %= DSP_BUF_MAX; - m_mpDspState->slaveBytesAvailable--; - if( m_mpDspState->slaveBytesAdvertised>0 ) - { - m_mpDspState->slaveBytesAdvertised--; - } - if (ENABLE_LOGGING) logerror( "%s:-%04x(0x%04x)\n", machine().describe_context(), data, m_mpDspState->slaveBytesAvailable ); - } - return data; -} - -uint16_t namcos21_state::get_input_bytes_advertised_for_slave() -{ - if( m_mpDspState->slaveBytesAdvertised < m_mpDspState->slaveBytesAvailable ) - { - m_mpDspState->slaveBytesAdvertised++; - } - else if( m_mpDspState->slaveActive && m_mpDspState->masterFinished && m_mpDspState->masterSourceAddr ) - { - namcos21_kickstart(machine(), 0); - } - return m_mpDspState->slaveBytesAdvertised; -} - -READ16_MEMBER(namcos21_state::dspram16_r) -{ - return m_dspram16[offset]; -} - -template<bool maincpu> WRITE16_MEMBER(namcos21_state::dspram16_w) -{ - COMBINE_DATA( &m_dspram16[offset] ); - - if( m_gametype != NAMCOS21_WINRUN91 ) - { - if( m_mpDspState->masterSourceAddr && - offset == 1+(m_mpDspState->masterSourceAddr&0x7fff) ) - { - if (ENABLE_LOGGING) logerror( "IDC-CONTINUE\n" ); - transfer_dsp_data(); - } - else if (m_gametype == NAMCOS21_SOLVALOU && - offset == 0x103 && - maincpu) - { /* hack; synchronization for solvalou */ - m_maincpu->yield(); - } - } -} - -/************************************************************************************/ - -int namcos21_state::init_dsp() -{ - // TODO: what actually tests this? - uint16_t *pMem = (uint16_t *)memregion("dspmaster")->base(); - /** - * DSP BIOS tests "CPU ID" on startup - * "JAPAN (C)1990 NAMCO LTD. by H.F " - */ - memcpy( &pMem[0xbff0], &pMem[0x0008], 0x20 ); - pMem[0x8000] = 0xFF80; - pMem[0x8001] = 0x0000; - - m_mpDspState = make_unique_clear<dsp_state>(); - - return 0; -} - -/***********************************************************/ - - - -READ16_MEMBER(namcos21_state::dsp_port0_r) +READ16_MEMBER(namcos21_state::winrun_gpu_color_r) { - int32_t data = read_pointrom_data(m_pointrom_idx++); - m_mPointRomMSB = (uint8_t)(data>>16); - m_mbPointRomDataAvailable = 1; - return (uint16_t)data; -} - -WRITE16_MEMBER(namcos21_state::dsp_port0_w) -{ /* unused? */ - if (ENABLE_LOGGING) logerror( "PTRAM_LO(0x%04x)\n", data ); + return m_winrun_color; } -READ16_MEMBER(namcos21_state::dsp_port1_r) +WRITE16_MEMBER(namcos21_state::winrun_gpu_color_w) { - if( m_mbPointRomDataAvailable ) - { - m_mbPointRomDataAvailable = 0; - return m_mPointRomMSB; - } - return 0x8000; /* IDC ack? */ + COMBINE_DATA( &m_winrun_color ); } -WRITE16_MEMBER(namcos21_state::dsp_port1_w) -{ /* unused? */ - if (ENABLE_LOGGING) logerror( "PTRAM_HI(0x%04x)\n", data ); -} - -READ16_MEMBER(namcos21_state::dsp_port2_r) -{ /* IDC TRANSMIT ENABLE? */ - return 0; -} - -WRITE16_MEMBER(namcos21_state::dsp_port2_w) +READ16_MEMBER(namcos21_state::winrun_gpu_register_r) { - if (ENABLE_LOGGING) logerror( "IDC ADDR INIT(0x%04x)\n", data ); - m_mpDspState->masterSourceAddr = data; - transfer_dsp_data(); + return m_winrun_gpu_register[offset]; } -READ16_MEMBER(namcos21_state::dsp_port3_idc_rcv_enable_r) -{ /* IDC RECEIVE ENABLE? */ - return 0; -} - -WRITE16_MEMBER(namcos21_state::dsp_port3_w) +WRITE16_MEMBER(namcos21_state::winrun_gpu_register_w) { - m_pointrom_idx<<=16; - m_pointrom_idx|=data; -} - -WRITE16_MEMBER(namcos21_state::dsp_port4_w) -{ /* receives $0B<<4 prior to IDC setup */ -} - -READ16_MEMBER(namcos21_state::dsp_port8_r) -{ /* SMU status */ - return 1; + COMBINE_DATA( &m_winrun_gpu_register[offset] ); + m_screen->update_partial(m_screen->vpos()); } - -WRITE16_MEMBER(namcos21_state::dsp_port8_w) +WRITE16_MEMBER(namcos21_state::winrun_gpu_videoram_w) { - if (ENABLE_LOGGING) logerror( "port8_w(%d)\n", data ); - if( data ) + int color = data>>8; + int mask = data&0xff; + int i; + for( i=0; i<8; i++ ) { - m_mpDspState->masterFinished = 1; - } - m_irq_enable = data; -} - -READ16_MEMBER(namcos21_state::dsp_port9_r) -{ /* render-device-busy; used for direct-draw */ - return 0; -} - -READ16_MEMBER(namcos21_state::dsp_porta_r) -{ /* config */ - return 0; -} - -WRITE16_MEMBER(namcos21_state::dsp_porta_w) -{ - /* boot: 1 */ - /* IRQ0 end: 0 */ - /* INT2 begin: 1 */ - /* direct-draw begin: 0 */ - /* INT1 begin: 1 */ -// if (ENABLE_LOGGING) logerror( "dsp_porta_w(0x%04x)\n", data ); -} - -READ16_MEMBER(namcos21_state::dsp_portb_r) -{ /* config */ - return 1; -} - -WRITE16_MEMBER(namcos21_state::dsp_portb_w) -{ - if( data==0 ) - { /* only 0->1 transition triggers */ - return; - } - if( m_mpDspState->masterDirectDrawSize == 13 ) - { - int i; - int sx[4], sy[4], zcode[4]; - int color = m_mpDspState->masterDirectDrawBuffer[0]; - for( i=0; i<4; i++ ) - { - sx[i] = NAMCOS21_POLY_FRAME_WIDTH/2 + (int16_t)m_mpDspState->masterDirectDrawBuffer[i*3+1]; - sy[i] = NAMCOS21_POLY_FRAME_HEIGHT/2 + (int16_t)m_mpDspState->masterDirectDrawBuffer[i*3+2]; - zcode[i] = m_mpDspState->masterDirectDrawBuffer[i*3+3]; - } - if( color&0x8000 ) - { - draw_quad(sx, sy, zcode, color); - } - else + if( mask&(0x01<<i) ) { - logerror( "indirection used w/ direct draw?\n" ); + m_gpu_videoram[(offset+i)&0x7ffff] = color; + m_gpu_maskram[(offset+i)&0x7ffff] = mask; } } - else if( m_mpDspState->masterDirectDrawSize ) - { - logerror( "unexpected masterDirectDrawSize=%d!\n",m_mpDspState->masterDirectDrawSize ); - } - m_mpDspState->masterDirectDrawSize = 0; } -WRITE16_MEMBER(namcos21_state::dsp_portc_w) +READ16_MEMBER(namcos21_state::winrun_gpu_videoram_r) { - if( m_mpDspState->masterDirectDrawSize < DSP_BUF_MAX ) - { - m_mpDspState->masterDirectDrawBuffer[m_mpDspState->masterDirectDrawSize++] = data; - } - else - { - logerror( "portc overflow\n" ); - } -} - -READ16_MEMBER(namcos21_state::dsp_portf_r) -{ /* informs BIOS that this is Master DSP */ - return 0; -} - -WRITE16_MEMBER(namcos21_state::dsp_xf_w) -{ - if (ENABLE_LOGGING) logerror("xf(%d)\n",data); + return (m_gpu_videoram[offset]<<8) | m_gpu_maskram[offset]; } -void namcos21_state::master_dsp_program(address_map &map) -{ - map(0x0000, 0x0fff).rom(); /* BIOS */ - map(0x8000, 0xbfff).ram().share("master_dsp_code"); -} - -void namcos21_state::master_dsp_data(address_map &map) -{ - map(0x2000, 0x200f).rw(FUNC(namcos21_state::dspcuskey_r), FUNC(namcos21_state::dspcuskey_w)); - map(0x8000, 0xffff).rw(FUNC(namcos21_state::dspram16_r), FUNC(namcos21_state::dspram16_w<false>)); /* 0x8000 words */ -} - -void namcos21_state::master_dsp_io(address_map &map) -{ - map(0x00, 0x00).rw(FUNC(namcos21_state::dsp_port0_r), FUNC(namcos21_state::dsp_port0_w)); - map(0x01, 0x01).rw(FUNC(namcos21_state::dsp_port1_r), FUNC(namcos21_state::dsp_port1_w)); - map(0x02, 0x02).rw(FUNC(namcos21_state::dsp_port2_r), FUNC(namcos21_state::dsp_port2_w)); - map(0x03, 0x03).rw(FUNC(namcos21_state::dsp_port3_idc_rcv_enable_r), FUNC(namcos21_state::dsp_port3_w)); - map(0x04, 0x04).w(FUNC(namcos21_state::dsp_port4_w)); - map(0x08, 0x08).rw(FUNC(namcos21_state::dsp_port8_r), FUNC(namcos21_state::dsp_port8_w)); - map(0x09, 0x09).r(FUNC(namcos21_state::dsp_port9_r)); - map(0x0a, 0x0a).rw(FUNC(namcos21_state::dsp_porta_r), FUNC(namcos21_state::dsp_porta_w)); - map(0x0b, 0x0b).rw(FUNC(namcos21_state::dsp_portb_r), FUNC(namcos21_state::dsp_portb_w)); - map(0x0c, 0x0c).w(FUNC(namcos21_state::dsp_portc_w)); - map(0x0f, 0x0f).r(FUNC(namcos21_state::dsp_portf_r)); -} - -/************************************************************************************/ - -void namcos21_state::render_slave_output(uint16_t data) +void namcos21_state::winrun_bitmap_draw(bitmap_ind16 &bitmap, const rectangle &cliprect) { - if( m_mpDspState->slaveOutputSize >= 4096 ) - { - fatalerror( "SLAVE OVERFLOW (0x%x)\n",m_mpDspState->slaveOutputBuffer[0] ); - } - - /* append word to slave output buffer */ - m_mpDspState->slaveOutputBuffer[m_mpDspState->slaveOutputSize++] = data; + uint8_t *videoram = m_gpu_videoram.get(); + //printf("%d %d (%d %d) - %04x %04x %04x|%04x %04x\n",cliprect.top(),cliprect.bottom(),m_screen->vpos(),m_gpu_intc->get_posirq_line(),m_winrun_gpu_register[0],m_winrun_gpu_register[2/2],m_winrun_gpu_register[4/2],m_winrun_gpu_register[0xa/2],m_winrun_gpu_register[0xc/2]); + int yscroll = -cliprect.top()+(int16_t)m_winrun_gpu_register[0x2/2]; + int xscroll = 0;//m_winrun_gpu_register[0xc/2] >> 7; + int base = 0x1000+0x100*(m_winrun_color&0xf); + int sx,sy; + for( sy=cliprect.top(); sy<=cliprect.bottom(); sy++ ) { - uint16_t *pSource = m_mpDspState->slaveOutputBuffer; - uint16_t count = *pSource++; - if( count && m_mpDspState->slaveOutputSize > count ) + const uint8_t *pSource = &videoram[((yscroll+sy)&0x3ff)*0x200]; + uint16_t *pDest = &bitmap.pix16(sy); + for( sx=cliprect.left(); sx<=cliprect.right(); sx++ ) { - uint16_t color = *pSource++; - int sx[4], sy[4],zcode[4]; - int j; - if( color&0x8000 ) + int pen = pSource[(sx+xscroll) & 0x1ff]; + switch( pen ) { - if( count!=13 ) logerror( "?!direct-draw(%d)\n", count ); - for( j=0; j<4; j++ ) - { - sx[j] = NAMCOS21_POLY_FRAME_WIDTH/2 + (int16_t)pSource[3*j+0]; - sy[j] = NAMCOS21_POLY_FRAME_HEIGHT/2 + (int16_t)pSource[3*j+1]; - zcode[j] = pSource[3*j+2]; - } - draw_quad(sx, sy, zcode, color&0x7fff); + case 0xff: + break; + // TODO: additive blending? winrun car select uses register [0xc] for a xscroll value + case 0x00: + pDest[sx] = (pDest[sx]&0x1fff)+0x4000; + break; + case 0x01: + pDest[sx] = (pDest[sx]&0x1fff)+0x6000; + break; + default: + pDest[sx] = base|pen; + break; } - else - { - int quad_idx = color*6; - for(;;) - { - uint8_t code = m_pointram[quad_idx++]; - color = m_pointram[quad_idx++]|(code<<8); - for( j=0; j<4; j++ ) - { - uint8_t vi = m_pointram[quad_idx++]; - sx[j] = NAMCOS21_POLY_FRAME_WIDTH/2 + (int16_t)pSource[vi*3+0]; - sy[j] = NAMCOS21_POLY_FRAME_HEIGHT/2 + (int16_t)pSource[vi*3+1]; - zcode[j] = pSource[vi*3+2]; - } - draw_quad(sx, sy, zcode, color&0x7fff); - if( code&0x80 ) - { /* end-of-quadlist marker */ - break; - } - } - } - m_mpDspState->slaveOutputSize = 0; - } - else if( count==0 ) - { - fatalerror( "RenderSlaveOutput\n" ); } } } -READ16_MEMBER(namcos21_state::slave_port0_r) -{ - return read_word_from_slave_input(); -} -WRITE16_MEMBER(namcos21_state::slave_port0_w) +uint32_t namcos21_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - render_slave_output(data); -} + bitmap.fill(0xff, cliprect ); -READ16_MEMBER(namcos21_state::slave_port2_r) -{ - return get_input_bytes_advertised_for_slave(); -} - -READ16_MEMBER(namcos21_state::slave_port3_r) -{ /* render-device queue size */ - /* up to 0x1fe bytes? - * slave blocks until free &space exists - */ - return 0; -} - -WRITE16_MEMBER(namcos21_state::slave_port3_w) -{ /* 0=busy, 1=ready? */ -} + m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe); + m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf); + winrun_bitmap_draw(bitmap,cliprect); -WRITE16_MEMBER(namcos21_state::slave_XF_output_w) -{ - if (ENABLE_LOGGING) logerror( "%s :slaveXF(%d)\n", machine().describe_context(), data ); -} - -READ16_MEMBER(namcos21_state::slave_portf_r) -{ /* informs BIOS that this is Slave DSP */ - return 1; -} + //popmessage("%04x %04x %04x|%04x %04x",m_winrun_gpu_register[0],m_winrun_gpu_register[2/2],m_winrun_gpu_register[4/2],m_winrun_gpu_register[0xa/2],m_winrun_gpu_register[0xc/2]); -void namcos21_state::slave_dsp_program(address_map &map) -{ - map(0x0000, 0x0fff).rom(); /* BIOS */ - map(0x8000, 0x8fff).ram(); + return 0; } -void namcos21_state::slave_dsp_data(address_map &map) -{ - /* no external data memory */ -} -void namcos21_state::slave_dsp_io(address_map &map) -{ - map(0x00, 0x00).rw(FUNC(namcos21_state::slave_port0_r), FUNC(namcos21_state::slave_port0_w)); - map(0x02, 0x02).r(FUNC(namcos21_state::slave_port2_r)); - map(0x03, 0x03).rw(FUNC(namcos21_state::slave_port3_r), FUNC(namcos21_state::slave_port3_w)); - map(0x0f, 0x0f).r(FUNC(namcos21_state::slave_portf_r)); -} -/************************************************************************************/ - -/** - * 801f->800f : prepare for master access to point ram - * 801f : done - * - * #bits data line - * 8 1a0 4 - * 7 0f8 4 - * 7 0ff 4 - * 1 001 4 - * 7 00a 2 - * a 0fe 8 - * - * line #bits data - * 0003 000A 000004FE - * 0001 0007 0000000A - * 0002 001A 03FFF1A0 - */ -WRITE16_MEMBER(namcos21_state::pointram_control_w) +READ16_MEMBER(namcos21_state::video_enable_r) { -// uint16_t prev = m_pointram_control; - COMBINE_DATA( &m_pointram_control ); - - /* m_pointram_control&0x20 : bank for depthcue data */ -#if 0 - logerror( "%s dsp_control_w:[%x]:=%04x ", - machine().describe_context(), - offset, - m_pointram_control ); - - uint16_t delta = (prev^m_pointram_control)&m_pointram_control; - if( delta&0x10 ) - { - logerror( " [reset]" ); - } - if( delta&2 ) - { - logerror( " send(A)%x", m_pointram_control&1 ); - } - if( delta&4 ) - { - logerror( " send(B)%x", m_pointram_control&1 ); - } - if( delta&8 ) - { - logerror( " send(C)%x", m_pointram_control&1 ); - } - logerror( "\n" ); -#endif - m_pointram_idx = 0; /* HACK */ -} - -READ16_MEMBER(namcos21_state::pointram_data_r) -{ - return m_pointram[m_pointram_idx]; + return m_video_enable; } -WRITE16_MEMBER(namcos21_state::pointram_data_w) +WRITE16_MEMBER(namcos21_state::video_enable_w) { - if( ACCESSING_BITS_0_7 ) + COMBINE_DATA( &m_video_enable ); /* 0x40 = enable */ + if( m_video_enable!=0 && m_video_enable!=0x40 ) { -// if( (m_pointram_idx%6)==0 ) logerror("\n" ); -// logerror( " %02x", data ); - m_pointram[m_pointram_idx++] = data; - m_pointram_idx &= (PTRAM_SIZE-1); + logerror( "unexpected video_enable_w=0x%x\n", m_video_enable ); } } - -READ16_MEMBER(namcos21_state::namcos21_depthcue_r) -{ - int bank = (m_pointram_control&0x20)?1:0; - return m_depthcue[bank][offset]; -} -WRITE16_MEMBER(namcos21_state::namcos21_depthcue_w) -{ - if( ACCESSING_BITS_0_7 ) - { - int bank = (m_pointram_control&0x20)?1:0; - m_depthcue[bank][offset] = data; -// if( (offset&0xf)==0 ) logerror( "\n depthcue: " ); -// logerror( " %02x", data ); - } -} +/***********************************************************/ /* dual port ram memory handlers */ -READ16_MEMBER(namcos21_state::namcos2_68k_dualportram_word_r) +READ16_MEMBER(namcos21_state::dpram_word_r) { - return m_mpDualPortRAM[offset]; + return m_dpram[offset]; } -WRITE16_MEMBER(namcos21_state::namcos2_68k_dualportram_word_w) +WRITE16_MEMBER(namcos21_state::dpram_word_w) { if( ACCESSING_BITS_0_7 ) { - m_mpDualPortRAM[offset] = data&0xff; + m_dpram[offset] = data&0xff; } } -READ8_MEMBER(namcos21_state::namcos2_dualportram_byte_r) +READ8_MEMBER(namcos21_state::dpram_byte_r) { - return m_mpDualPortRAM[offset]; + return m_dpram[offset]; } -WRITE8_MEMBER(namcos21_state::namcos2_dualportram_byte_w) +WRITE8_MEMBER(namcos21_state::dpram_byte_w) { - m_mpDualPortRAM[offset] = data; + m_dpram[offset] = data; } /******************************************************************************/ -/*************************************************************/ -/* MASTER 68000 CPU Memory declarations */ -/*************************************************************/ - -void namcos21_state::common_map(address_map &map) -{ - map(0x280000, 0x280001).nopw(); /* written once on startup */ - map(0x400000, 0x400001).w(FUNC(namcos21_state::pointram_control_w)); - map(0x440000, 0x440001).rw(FUNC(namcos21_state::pointram_data_r), FUNC(namcos21_state::pointram_data_w)); - map(0x440002, 0x47ffff).nopw(); /* (?) Air Combat */ - map(0x480000, 0x4807ff).rw(FUNC(namcos21_state::namcos21_depthcue_r), FUNC(namcos21_state::namcos21_depthcue_w)); /* Air Combat */ - map(0x700000, 0x71ffff).rw(m_c355spr, FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)); - map(0x720000, 0x720007).rw(m_c355spr, FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); - map(0x740000, 0x74ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0x750000, 0x75ffff).ram().w(m_palette, FUNC(palette_device::write16_ext)).share("palette_ext"); - map(0x760000, 0x760001).rw(FUNC(namcos21_state::namcos21_video_enable_r), FUNC(namcos21_state::namcos21_video_enable_w)); - map(0x800000, 0x8fffff).rom().region("data", 0); - map(0x900000, 0x90ffff).ram().share("sharedram"); - map(0xa00000, 0xa00fff).rw(FUNC(namcos21_state::namcos2_68k_dualportram_word_r), FUNC(namcos21_state::namcos2_68k_dualportram_word_w)); - map(0xb00000, 0xb03fff).rw(m_sci, FUNC(namco_c139_device::ram_r), FUNC(namco_c139_device::ram_w)); - map(0xb80000, 0xb8000f).m(m_sci, FUNC(namco_c139_device::regs_map)); - map(0xc00000, 0xcfffff).rom().mirror(0x100000).region("edata", 0); -} - -void namcos21_state::master_map(address_map &map) -{ - common_map(map); - map(0x000000, 0x0fffff).rom(); - map(0x100000, 0x10ffff).ram(); /* private work RAM */ - map(0x180000, 0x183fff).rw(FUNC(namcos21_state::namcos2_68k_eeprom_r), FUNC(namcos21_state::namcos2_68k_eeprom_w)).umask16(0x00ff); - map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); - map(0x200000, 0x20ffff).rw(FUNC(namcos21_state::dspram16_r), FUNC(namcos21_state::dspram16_w<true>)).share("dspram16"); -} - -void namcos21_state::slave_map(address_map &map) -{ - common_map(map); - map(0x000000, 0x07ffff).rom(); - map(0x100000, 0x13ffff).ram(); /* private work RAM */ - map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); - map(0x200000, 0x20ffff).rw(FUNC(namcos21_state::dspram16_r), FUNC(namcos21_state::dspram16_w<false>)).share("dspram16"); -} - - -/************************************************************* - * Winning Run is prototype "System21" hardware. - *************************************************************/ -READ16_MEMBER(namcos21_state::winrun_dspcomram_r) -{ - int bank = 1-(m_winrun_dspcomram_control[0x4/2]&1); - uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; - return mem[offset]; -} -WRITE16_MEMBER(namcos21_state::winrun_dspcomram_w) -{ - int bank = 1-(m_winrun_dspcomram_control[0x4/2]&1); - uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; - COMBINE_DATA( &mem[offset] ); -} - -READ16_MEMBER(namcos21_state::winrun_cuskey_r) -{ - int pc = m_dsp->pc(); - switch( pc ) - { - case 0x0064: /* winrun91 */ - return 0xFEBB; - case 0x006c: /* winrun91 */ - return 0xFFFF; - case 0x0073: /* winrun91 */ - return 0x0144; - - case 0x0075: /* winrun */ - return 0x24; - - default: - break; - } - return 0; -} - -WRITE16_MEMBER(namcos21_state::winrun_cuskey_w) -{ -} - -void namcos21_state::winrun_flush_poly() -{ - if( m_winrun_poly_index>0 ) - { - const uint16_t *pSource = m_winrun_poly_buf; - uint16_t color; - int sx[4], sy[4], zcode[4]; - int j; - color = *pSource++; - if( color&0x8000 ) - { /* direct-draw */ - for( j=0; j<4; j++ ) - { - sx[j] = NAMCOS21_POLY_FRAME_WIDTH/2 + (int16_t)*pSource++; - sy[j] = NAMCOS21_POLY_FRAME_HEIGHT/2 + (int16_t)*pSource++; - zcode[j] = *pSource++; - } - draw_quad(sx, sy, zcode, color&0x7fff); - } - else - { - int quad_idx = color*6; - for(;;) - { - uint8_t code = m_pointram[quad_idx++]; - color = m_pointram[quad_idx++]; - for( j=0; j<4; j++ ) - { - uint8_t vi = m_pointram[quad_idx++]; - sx[j] = NAMCOS21_POLY_FRAME_WIDTH/2 + (int16_t)pSource[vi*3+0]; - sy[j] = NAMCOS21_POLY_FRAME_HEIGHT/2 + (int16_t)pSource[vi*3+1]; - zcode[j] = pSource[vi*3+2]; - } - draw_quad(sx, sy, zcode, color&0x7fff); - if( code&0x80 ) - { /* end-of-quadlist marker */ - break; - } - } - } - m_winrun_poly_index = 0; - } -} /* winrun_flushpoly */ - -READ16_MEMBER(namcos21_state::winrun_poly_reset_r) -{ - winrun_flush_poly(); - return 0; -} - -WRITE16_MEMBER(namcos21_state::winrun_dsp_render_w) -{ - if( m_winrun_poly_index<WINRUN_MAX_POLY_PARAM ) - { - m_winrun_poly_buf[m_winrun_poly_index++] = data; - } - else - { - logerror( "WINRUN_POLY_OVERFLOW\n" ); - } -} - -WRITE16_MEMBER(namcos21_state::winrun_dsp_pointrom_addr_w) -{ - if( offset==0 ) - { /* port 8 */ - m_winrun_pointrom_addr = data; - } - else - { /* port 9 */ - m_winrun_pointrom_addr |= (data<<16); - } -} - -READ16_MEMBER(namcos21_state::winrun_dsp_pointrom_data_r) -{ - return m_ptrom16[m_winrun_pointrom_addr++]; -} - -WRITE16_MEMBER(namcos21_state::winrun_dsp_complete_w) -{ - if( data ) - { - winrun_flush_poly(); - m_dsp->pulse_input_line(INPUT_LINE_RESET, attotime::zero); - clear_poly_framebuffer(); - } -} - -READ16_MEMBER(namcos21_state::winrun_table_r) -{ - return m_winrun_polydata[offset]; -} - -void namcos21_state::winrun_dsp_program(address_map &map) -{ - map(0x0000, 0x0fff).rom(); -} - -void namcos21_state::winrun_dsp_data(address_map &map) -{ - map(0x2000, 0x200f).rw(FUNC(namcos21_state::winrun_cuskey_r), FUNC(namcos21_state::winrun_cuskey_w)); - map(0x4000, 0x4fff).rw(FUNC(namcos21_state::winrun_dspcomram_r), FUNC(namcos21_state::winrun_dspcomram_w)); - map(0x8000, 0xffff).r(FUNC(namcos21_state::winrun_table_r)); -} - -void namcos21_state::winrun_dsp_io(address_map &map) -{ - map(0x08, 0x09).rw(FUNC(namcos21_state::winrun_dsp_pointrom_data_r), FUNC(namcos21_state::winrun_dsp_pointrom_addr_w)); - map(0x0a, 0x0a).w(FUNC(namcos21_state::winrun_dsp_render_w)); - map(0x0b, 0x0b).nopw(); - map(0x0c, 0x0c).w(FUNC(namcos21_state::winrun_dsp_complete_w)); -} - -WRITE16_MEMBER(namcos21_state::winrun_dspbios_w) -{ - COMBINE_DATA( &m_winrun_dspbios[offset] ); - if( offset==0xfff ) - { - uint16_t *mem = (uint16_t *)memregion("dsp")->base(); - memcpy( mem, m_winrun_dspbios, 0x2000 ); - m_winrun_dsp_alive = 1; - } -} - -//380000 : read : dsp status? 1 = busy -//380000 : write(0x01) - done before dsp comram init -//380004 : dspcomram bank, as seen by 68k -//380008 : read : state? - -READ16_MEMBER(namcos21_state::winrun_68k_dspcomram_r) -{ - int bank = m_winrun_dspcomram_control[0x4/2]&1; - uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; - return mem[offset]; -} - -WRITE16_MEMBER(namcos21_state::winrun_68k_dspcomram_w) -{ - int bank = m_winrun_dspcomram_control[0x4/2]&1; - uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; - COMBINE_DATA( &mem[offset] ); -} - -READ16_MEMBER(namcos21_state::winrun_dspcomram_control_r) -{ - return m_winrun_dspcomram_control[offset]; -} - -WRITE16_MEMBER(namcos21_state::winrun_dspcomram_control_w) -{ - COMBINE_DATA( &m_winrun_dspcomram_control[offset] ); -} - void namcos21_state::winrun_master_map(address_map &map) { map(0x000000, 0x03ffff).rom(); map(0x100000, 0x10ffff).ram(); /* work RAM */ - map(0x180000, 0x183fff).rw(FUNC(namcos21_state::namcos2_68k_eeprom_r), FUNC(namcos21_state::namcos2_68k_eeprom_w)).umask16(0x00ff); + map(0x180000, 0x183fff).rw(FUNC(namcos21_state::eeprom_r), FUNC(namcos21_state::eeprom_w)).umask16(0x00ff); map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); - map(0x250000, 0x25ffff).ram().share("winrun_polydata"); + + // DSP Related + map(0x250000, 0x25ffff).ram().share("namcos21dsp:winrun_polydata"); map(0x260000, 0x26ffff).ram(); /* unused? */ - map(0x280000, 0x281fff).w(FUNC(namcos21_state::winrun_dspbios_w)).share("winrun_dspbios"); - map(0x380000, 0x38000f).rw(FUNC(namcos21_state::winrun_dspcomram_control_r), FUNC(namcos21_state::winrun_dspcomram_control_w)); - map(0x3c0000, 0x3c1fff).rw(FUNC(namcos21_state::winrun_68k_dspcomram_r), FUNC(namcos21_state::winrun_68k_dspcomram_w)); - map(0x400000, 0x400001).w(FUNC(namcos21_state::pointram_control_w)); - map(0x440000, 0x440001).rw(FUNC(namcos21_state::pointram_data_r), FUNC(namcos21_state::pointram_data_w)); + map(0x280000, 0x281fff).w(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_dspbios_w)); + map(0x380000, 0x38000f).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_dspcomram_control_r), FUNC(namcos21_dsp_device::winrun_dspcomram_control_w)); + map(0x3c0000, 0x3c1fff).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_68k_dspcomram_r), FUNC(namcos21_dsp_device::winrun_68k_dspcomram_w)); + map(0x400000, 0x400001).w(m_namcos21_dsp, FUNC(namcos21_dsp_device::pointram_control_w)); + map(0x440000, 0x440001).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::pointram_data_r), FUNC(namcos21_dsp_device::pointram_data_w)); + map(0x600000, 0x60ffff).ram().share("gpu_comram"); map(0x800000, 0x87ffff).rom().region("data", 0); map(0x900000, 0x90ffff).ram().share("sharedram"); - map(0xa00000, 0xa00fff).rw(FUNC(namcos21_state::namcos2_68k_dualportram_word_r), FUNC(namcos21_state::namcos2_68k_dualportram_word_w)); + map(0xa00000, 0xa00fff).rw(FUNC(namcos21_state::dpram_word_r), FUNC(namcos21_state::dpram_word_w)); map(0xb00000, 0xb03fff).rw(m_sci, FUNC(namco_c139_device::ram_r), FUNC(namco_c139_device::ram_w)); map(0xb80000, 0xb8000f).m(m_sci, FUNC(namco_c139_device::regs_map)); } @@ -1504,7 +562,7 @@ void namcos21_state::winrun_slave_map(address_map &map) map(0x600000, 0x60ffff).ram().share("gpu_comram"); map(0x800000, 0x87ffff).rom().region("data", 0); map(0x900000, 0x90ffff).ram().share("sharedram"); - map(0xa00000, 0xa00fff).rw(FUNC(namcos21_state::namcos2_68k_dualportram_word_r), FUNC(namcos21_state::namcos2_68k_dualportram_word_w)); + map(0xa00000, 0xa00fff).rw(FUNC(namcos21_state::dpram_word_r), FUNC(namcos21_state::dpram_word_w)); map(0xb00000, 0xb03fff).rw(m_sci, FUNC(namco_c139_device::ram_r), FUNC(namco_c139_device::ram_w)); map(0xb80000, 0xb8000f).m(m_sci, FUNC(namco_c139_device::regs_map)); } @@ -1536,12 +594,12 @@ void namcos21_state::sound_map(address_map &map) map(0x3000, 0x3003).nopw(); /* ? */ map(0x4000, 0x4001).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)); map(0x5000, 0x6fff).rw(m_c140, FUNC(c140_device::c140_r), FUNC(c140_device::c140_w)); - map(0x7000, 0x77ff).rw(FUNC(namcos21_state::namcos2_dualportram_byte_r), FUNC(namcos21_state::namcos2_dualportram_byte_w)).share("mpdualportram"); - map(0x7800, 0x7fff).rw(FUNC(namcos21_state::namcos2_dualportram_byte_r), FUNC(namcos21_state::namcos2_dualportram_byte_w)); /* mirror */ + map(0x7000, 0x77ff).rw(FUNC(namcos21_state::dpram_byte_r), FUNC(namcos21_state::dpram_byte_w)).share("dpram"); + map(0x7800, 0x7fff).rw(FUNC(namcos21_state::dpram_byte_r), FUNC(namcos21_state::dpram_byte_w)); /* mirror */ map(0x8000, 0x9fff).ram(); map(0xa000, 0xbfff).nopw(); /* amplifier enable on 1st write */ map(0xc000, 0xffff).nopw(); /* avoid debug log noise; games write frequently to 0xe000 */ - map(0xc000, 0xc001).w(FUNC(namcos21_state::namcos2_sound_bankselect_w)); + map(0xc000, 0xc001).w(FUNC(namcos21_state::sound_bankselect_w)); map(0xd001, 0xd001).nopw(); /* watchdog */ map(0xd000, 0xffff).rom().region("audiocpu", 0x01000); } @@ -1570,73 +628,8 @@ void namcos21_state::configure_c65_namcos21(machine_config &config) m_c65->an5_in_cb().set_ioport("AN5"); m_c65->an6_in_cb().set_ioport("AN6"); m_c65->an7_in_cb().set_ioport("AN7"); - m_c65->dp_in_callback().set(FUNC(namcos21_state::namcos2_dualportram_byte_r)); - m_c65->dp_out_callback().set(FUNC(namcos21_state::namcos2_dualportram_byte_w)); -} - -void namcos21_state::configure_c68_namcos21(machine_config &config) -{ - NAMCOC68(config, m_c68, 8000000); - m_c68->in_pb_callback().set_ioport("MCUB"); - m_c68->in_pc_callback().set_ioport("MCUC"); - m_c68->in_ph_callback().set_ioport("MCUH"); - m_c68->in_pdsw_callback().set_ioport("DSW"); - m_c68->di0_in_cb().set_ioport("MCUDI0"); - m_c68->di1_in_cb().set_ioport("MCUDI1"); - m_c68->di2_in_cb().set_ioport("MCUDI2"); - m_c68->di3_in_cb().set_ioport("MCUDI3"); - m_c68->an0_in_cb().set_ioport("AN0"); - m_c68->an1_in_cb().set_ioport("AN1"); - m_c68->an2_in_cb().set_ioport("AN2"); - m_c68->an3_in_cb().set_ioport("AN3"); - m_c68->an4_in_cb().set_ioport("AN4"); - m_c68->an5_in_cb().set_ioport("AN5"); - m_c68->an6_in_cb().set_ioport("AN6"); - m_c68->an7_in_cb().set_ioport("AN7"); - m_c68->dp_in_callback().set(FUNC(namcos21_state::namcos2_dualportram_byte_r)); - m_c68->dp_out_callback().set(FUNC(namcos21_state::namcos2_dualportram_byte_w)); -} - -/*************************************************************/ -/* Driver's Eyes Memory declarations overrides */ -/*************************************************************/ - - -void namcos21_state::driveyes_common_map(address_map &map) -{ - map(0x700000, 0x71ffff).rw(m_c355spr, FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)); - map(0x720000, 0x720007).rw(m_c355spr, FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); - map(0x740000, 0x74ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0x750000, 0x75ffff).ram().w(m_palette, FUNC(palette_device::write16_ext)).share("palette_ext"); - map(0x760000, 0x760001).rw(FUNC(namcos21_state::namcos21_video_enable_r), FUNC(namcos21_state::namcos21_video_enable_w)); - map(0x800000, 0x8fffff).rom().region("data", 0); - map(0x900000, 0x90ffff).ram().share("sharedram"); - map(0xa00000, 0xa00fff).rw(FUNC(namcos21_state::namcos2_68k_dualportram_word_r), FUNC(namcos21_state::namcos2_68k_dualportram_word_w)); - map(0xb00000, 0xb03fff).rw(m_sci, FUNC(namco_c139_device::ram_r), FUNC(namco_c139_device::ram_w)); - map(0xb80000, 0xb8000f).m(m_sci, FUNC(namco_c139_device::regs_map)); -} - -void namcos21_state::driveyes_master_map(address_map &map) -{ - driveyes_common_map(map); - map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).ram(); /* private work RAM */ - map(0x180000, 0x183fff).rw(FUNC(namcos21_state::namcos2_68k_eeprom_r), FUNC(namcos21_state::namcos2_68k_eeprom_w)).umask16(0x00ff); - map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); - map(0x250000, 0x25ffff).ram().share("winrun_polydata"); - map(0x280000, 0x281fff).w(FUNC(namcos21_state::winrun_dspbios_w)).share("winrun_dspbios"); - map(0x380000, 0x38000f).rw(FUNC(namcos21_state::winrun_dspcomram_control_r), FUNC(namcos21_state::winrun_dspcomram_control_w)); - map(0x3c0000, 0x3c1fff).rw(FUNC(namcos21_state::winrun_68k_dspcomram_r), FUNC(namcos21_state::winrun_68k_dspcomram_w)); - map(0x400000, 0x400001).w(FUNC(namcos21_state::pointram_control_w)); - map(0x440000, 0x440001).rw(FUNC(namcos21_state::pointram_data_r), FUNC(namcos21_state::pointram_data_w)); -} - -void namcos21_state::driveyes_slave_map(address_map &map) -{ - driveyes_common_map(map); - map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).ram(); /* private work RAM */ - map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); + m_c65->dp_in_callback().set(FUNC(namcos21_state::dpram_byte_r)); + m_c65->dp_out_callback().set(FUNC(namcos21_state::dpram_byte_w)); } /*************************************************************/ @@ -1769,149 +762,11 @@ static INPUT_PORTS_START( winrungp ) PORT_DIPSETTING( 0x00, "4M" ) INPUT_PORTS_END -static INPUT_PORTS_START( driveyes ) - PORT_INCLUDE(winrungp) - - PORT_MODIFY("MCUB") - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("gearbox", namcoio_gearbox_device, clutch_r ) - PORT_BIT( 0x37, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_MODIFY("MCUDI0") - PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER("gearbox", namcoio_gearbox_device, in_r, nullptr ) - PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_MODIFY("MCUH") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Red Button") - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Green Button") - PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_MODIFY("DSW") - PORT_DIPNAME( 0x0c, 0x0c, "Screen") - PORT_DIPSETTING( 0x0c, "Center" ) - // these will show 'receive error' because they want comms from the main screen - PORT_DIPSETTING( 0x08, "Left" ) - PORT_DIPSETTING( 0x04, "Right" ) - PORT_DIPSETTING( 0x00, "Right (duplicate)" ) -INPUT_PORTS_END - -// the default inc/dec analog keys have been chosen to map 'tank' style inputs found on Assault. -// this makes the game easier to use with the keyboard, providing a familiar left/right stick mapping -// ports are limited to 10/ef because otherwise, even when calibrated, the game will act as if the -// inputs wrap around when they hit the maximum, causing undesired movement -static INPUT_PORTS_START( cybsled ) - PORT_INCLUDE(s21default) - - PORT_MODIFY("AN0") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */ - PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_I) PORT_CODE_INC(KEYCODE_K) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: vertical */ - PORT_MODIFY("AN1") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ - PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_E) PORT_CODE_INC(KEYCODE_D) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: vertical */ - PORT_MODIFY("AN2") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ - PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_J) PORT_CODE_INC(KEYCODE_L) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: horizontal */ - PORT_MODIFY("AN3") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */ - PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_S) PORT_CODE_INC(KEYCODE_F) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: horizontal */ - PORT_MODIFY("AN4") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN5") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN6") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN7") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_MODIFY("MCUH") /* 63B05Z0 - PORT H */ - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Viewport Change Button") - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Missile Button") - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Gun Button") - PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) -INPUT_PORTS_END - -static INPUT_PORTS_START( starblad ) - PORT_INCLUDE(s21default) - - PORT_MODIFY("AN1") /* IN#3: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) - PORT_MODIFY("AN2") /* IN#4: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(20) PORT_KEYDELTA(10) -INPUT_PORTS_END - -static INPUT_PORTS_START( aircomb ) - PORT_INCLUDE(s21default) - - PORT_MODIFY("AN0") /* IN#2: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN1") /* IN#3: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) - PORT_MODIFY("AN2") /* IN#4: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) - PORT_MODIFY("AN3") /* IN#5: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */ - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_REVERSE - PORT_MODIFY("AN4") /* IN#6: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN5") /* IN#7: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN6") /* IN#8: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN7") /* IN#9: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_MODIFY("DSW") /* 63B05Z0 - $2000 DIP SW */ - PORT_DIPNAME( 0x01, 0x01, "DSW1") // not test mode on this game - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - - PORT_MODIFY("MCUH") /* IN#10: 63B05Z0 - PORT H */ - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON6 ) ///??? - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) // prev color - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) // ???next color - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) - PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) -INPUT_PORTS_END - - -static const gfx_layout tile_layout = -{ - 16,16, - RGN_FRAC(1,4), /* number of tiles */ - 8, /* bits per pixel */ - { /* plane offsets */ - 0,1,2,3,4,5,6,7 - }, - { /* x offsets */ - 0*8,RGN_FRAC(1,4)+0*8,RGN_FRAC(2,4)+0*8,RGN_FRAC(3,4)+0*8, - 1*8,RGN_FRAC(1,4)+1*8,RGN_FRAC(2,4)+1*8,RGN_FRAC(3,4)+1*8, - 2*8,RGN_FRAC(1,4)+2*8,RGN_FRAC(2,4)+2*8,RGN_FRAC(3,4)+2*8, - 3*8,RGN_FRAC(1,4)+3*8,RGN_FRAC(2,4)+3*8,RGN_FRAC(3,4)+3*8 - }, - { /* y offsets */ - 0*32,1*32,2*32,3*32, - 4*32,5*32,6*32,7*32, - 8*32,9*32,10*32,11*32, - 12*32,13*32,14*32,15*32 - }, - 8*64 /* sprite offset */ -}; - -static GFXDECODE_START( gfx_namcos21 ) - GFXDECODE_ENTRY( "gfx1", 0x000000, tile_layout, 0x1000, 0x10 ) -GFXDECODE_END - - -WRITE8_MEMBER( namcos21_state::namcos2_sound_bankselect_w ) +WRITE8_MEMBER( namcos21_state::sound_bankselect_w ) { m_audiobank->set_entry(data>>4); } -void (*namcos2_kickstart)(running_machine &machine, int internal); - WRITE8_MEMBER(namcos21_state::sound_reset_w) { if (data & 0x01) @@ -1925,15 +780,6 @@ WRITE8_MEMBER(namcos21_state::sound_reset_w) /* Suspend execution */ m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); } - - if (namcos2_kickstart != nullptr) - { - //printf( "dspkick=0x%x\n", data ); - if (data & 0x04) - { - (*namcos2_kickstart)(machine(), 1); - } - } } WRITE8_MEMBER(namcos21_state::system_reset_w) @@ -1947,71 +793,23 @@ WRITE8_MEMBER(namcos21_state::system_reset_w) void namcos21_state::reset_all_subcpus(int state) { m_slave->set_input_line(INPUT_LINE_RESET, state); - if (m_c68) - { - m_c68->ext_reset(state); - } - else if (m_c65) - { - m_c65->ext_reset(state); - } - else - { - logerror("no MCU to reset?\n"); - } - - switch (m_gametype) - { - case namcos21_state::NAMCOS21_SOLVALOU: - case namcos21_state::NAMCOS21_STARBLADE: - case namcos21_state::NAMCOS21_AIRCOMBAT: - case namcos21_state::NAMCOS21_CYBERSLED: - m_dspmaster->set_input_line(INPUT_LINE_RESET, state); - m_dspslave->set_input_line(INPUT_LINE_RESET, state); - break; - - //case namcos21_state::NAMCOS21_WINRUN91: - //case namcos21_state::NAMCOS21_DRIVERS_EYES: - default: - break; - } + m_c65->ext_reset(state); } - -bool namcos21_state::is_system21() -{ - switch (m_gametype) - { - case namcos21_state::NAMCOS21_AIRCOMBAT: - case namcos21_state::NAMCOS21_STARBLADE: - case namcos21_state::NAMCOS21_CYBERSLED: - case namcos21_state::NAMCOS21_SOLVALOU: - case namcos21_state::NAMCOS21_WINRUN91: - case namcos21_state::NAMCOS21_DRIVERS_EYES: - return 1; - default: - return 0; - } -} - - -WRITE8_MEMBER(namcos21_state::namcos2_68k_eeprom_w) +WRITE8_MEMBER(namcos21_state::eeprom_w) { m_eeprom[offset] = data; } -READ8_MEMBER(namcos21_state::namcos2_68k_eeprom_r) +READ8_MEMBER(namcos21_state::eeprom_r) { return m_eeprom[offset]; } -MACHINE_RESET_MEMBER(namcos21_state, namcos21) +void namcos21_state::machine_reset() { -// address_space &space = m_maincpu->space(AS_PROGRAM); - address_space &audio_space = m_audiocpu->space(AS_PROGRAM); - /* Initialise the bank select in the sound CPU */ - namcos2_sound_bankselect_w(audio_space, 0, 0); /* Page in bank 0 */ + m_audiobank->set_entry(0); /* Page in bank 0 */ m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE ); @@ -2021,49 +819,32 @@ MACHINE_RESET_MEMBER(namcos21_state, namcos21) -MACHINE_START_MEMBER(namcos21_state,namcos21) +void namcos21_state::machine_start() { - namcos2_kickstart = nullptr; m_eeprom = std::make_unique<uint8_t[]>(0x2000); subdevice<nvram_device>("nvram")->set_base(m_eeprom.get(), 0x2000); - if (m_audiobank) - { - uint32_t max = memregion("audiocpu")->bytes() / 0x4000; - for (int i = 0; i < 0x10; i++) - m_audiobank->configure_entry(i, memregion("audiocpu")->base() + (i % max) * 0x4000); - - m_audiobank->set_entry(0); - } + uint32_t max = memregion("audiocpu")->bytes() / 0x4000; + for (int i = 0; i < 0x10; i++) + m_audiobank->configure_entry(i, memregion("audiocpu")->base() + (i % max) * 0x4000); - namcos2_kickstart = namcos21_kickstart; } TIMER_DEVICE_CALLBACK_MEMBER(namcos21_state::screen_scanline) { int scanline = param; -// int cur_posirq = get_posirq_scanline()*2; + // int cur_posirq = get_posirq_scanline()*2; - if(scanline == 240*2) + if (scanline == 240 * 2) { m_master_intc->vblank_irq_trigger(); m_slave_intc->vblank_irq_trigger(); - if(m_gpu_intc) - m_gpu_intc->vblank_irq_trigger(); - - if (m_c65) - m_c65->ext_interrupt(HOLD_LINE); - - if (m_c68) - m_c68->ext_interrupt(ASSERT_LINE); - + m_gpu_intc->vblank_irq_trigger(); + m_c65->ext_interrupt(HOLD_LINE); } - if(m_gpu_intc != nullptr) - { - if(scanline == (0xff-m_gpu_intc->get_posirq_line())*2) - m_gpu_intc->pos_irq_trigger(); - } + if (scanline == (0xff - m_gpu_intc->get_posirq_line()) * 2) + m_gpu_intc->pos_irq_trigger(); } void namcos21_state::configure_c148_standard(machine_config &config) @@ -2093,14 +874,8 @@ MACHINE_CONFIG_START(namcos21_state::winrun) configure_c65_namcos21(config); - tms32025_device& dsp(TMS32025(config, m_dsp, 24000000)); /* 24 MHz? overclocked */ - dsp.set_addrmap(AS_PROGRAM, &namcos21_state::winrun_dsp_program); - dsp.set_addrmap(AS_DATA, &namcos21_state::winrun_dsp_data); - dsp.set_addrmap(AS_IO, &namcos21_state::winrun_dsp_io); - dsp.bio_in_cb().set(FUNC(namcos21_state::winrun_poly_reset_r)); - dsp.hold_in_cb().set_constant(0); - dsp.hold_ack_out_cb().set_nop(); - dsp.xf_out_cb().set_nop(); + NAMCOS21_DSP(config, m_namcos21_dsp, 0); + m_namcos21_dsp->set_renderer_tag("namcos21_3d"); MCFG_DEVICE_ADD("gpu", M68000,12288000) /* graphics coprocessor */ MCFG_DEVICE_PROGRAM_MAP(winrun_gpu_map) @@ -2111,19 +886,21 @@ MACHINE_CONFIG_START(namcos21_state::winrun) MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame */ - MCFG_MACHINE_START_OVERRIDE(namcos21_state,namcos21) - MCFG_MACHINE_RESET_OVERRIDE(namcos21_state,namcos21) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_RAW_PARAMS_NAMCO480I - MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_winrun) + MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update) MCFG_SCREEN_PALETTE("palette") MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS) MCFG_PALETTE_FORMAT(XBRG) - MCFG_VIDEO_START_OVERRIDE(namcos21_state,namcos21) + NAMCOS21_3D(config, m_namcos21_3d, 0); + m_namcos21_3d->set_fixed_palbase(0x4000); + m_namcos21_3d->set_zz_shift_mult(10, 0x100); + m_namcos21_3d->set_depth_reverse(true); + m_namcos21_3d->set_framebuffer_size(496,480); SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); @@ -2139,152 +916,6 @@ MACHINE_CONFIG_START(namcos21_state::winrun) MACHINE_CONFIG_END -// driveyes only -MACHINE_CONFIG_START(namcos21_state::driveyes) - MCFG_DEVICE_ADD("maincpu", M68000,12288000) /* Master */ - MCFG_DEVICE_PROGRAM_MAP(driveyes_master_map) - MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_state, screen_scanline, "screen", 0, 1) - - MCFG_DEVICE_ADD("slave", M68000,12288000) /* Slave */ - MCFG_DEVICE_PROGRAM_MAP(driveyes_slave_map) - - MCFG_DEVICE_ADD("audiocpu", MC6809E, 3072000) /* Sound */ - MCFG_DEVICE_PROGRAM_MAP(sound_map) - MCFG_DEVICE_PERIODIC_INT_DRIVER(namcos21_state, irq0_line_hold, 2*60) - MCFG_DEVICE_PERIODIC_INT_DRIVER(namcos21_state, irq1_line_hold, 120) - - configure_c68_namcos21(config); - - tms32025_device& dsp(TMS32025(config, m_dsp, 24000000*2)); /* 24 MHz? overclocked */ - dsp.set_addrmap(AS_PROGRAM, &namcos21_state::winrun_dsp_program); - dsp.set_addrmap(AS_DATA, &namcos21_state::winrun_dsp_data); - dsp.set_addrmap(AS_IO, &namcos21_state::winrun_dsp_io); - dsp.bio_in_cb().set(FUNC(namcos21_state::winrun_poly_reset_r)); - dsp.hold_in_cb().set_constant(0); - dsp.hold_ack_out_cb().set_nop(); - dsp.xf_out_cb().set_nop(); - - MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame */ - - MCFG_MACHINE_START_OVERRIDE(namcos21_state,namcos21) - MCFG_MACHINE_RESET_OVERRIDE(namcos21_state,namcos21) - NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); - - MCFG_DEVICE_ADD("gearbox", NAMCOIO_GEARBOX, 0) - - configure_c148_standard(config); - NAMCO_C139(config, m_sci, 0); - - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_RAW_PARAMS_NAMCO480I - MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_driveyes) - MCFG_SCREEN_PALETTE("palette") - - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos21) - MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS) - MCFG_PALETTE_FORMAT(XBRG) - - NAMCO_C355SPR(config, m_c355spr, 0); - m_c355spr->set_palette_tag("palette"); - m_c355spr->set_gfxdecode_tag("gfxdecode"); - m_c355spr->set_is_namcofl(false); - m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); - m_c355spr->set_palxor(0xf); // reverse mapping - m_c355spr->set_gfxregion(0); - - MCFG_VIDEO_START_OVERRIDE(namcos21_state,namcos21) - - SPEAKER(config, "lspeaker").front_left(); - SPEAKER(config, "rspeaker").front_right(); - - C140(config, m_c140, 8000000/374); - m_c140->set_bank_type(c140_device::C140_TYPE::SYSTEM21); - m_c140->add_route(0, "lspeaker", 0.50); - m_c140->add_route(1, "rspeaker", 0.50); - - MCFG_DEVICE_ADD("ymsnd", YM2151, 3579580) - MCFG_SOUND_ROUTE(0, "lspeaker", 0.30) - MCFG_SOUND_ROUTE(1, "rspeaker", 0.30) -MACHINE_CONFIG_END - -// starblad, solvalou, aircomb, cybsled -MACHINE_CONFIG_START(namcos21_state::namcos21) - MCFG_DEVICE_ADD("maincpu", M68000,12288000) /* Master */ - MCFG_DEVICE_PROGRAM_MAP(master_map) - MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_state, screen_scanline, "screen", 0, 1) - - MCFG_DEVICE_ADD("slave", M68000,12288000) /* Slave */ - MCFG_DEVICE_PROGRAM_MAP(slave_map) - - MCFG_DEVICE_ADD("audiocpu", MC6809E, 3072000) /* Sound */ - MCFG_DEVICE_PROGRAM_MAP(sound_map) - MCFG_DEVICE_PERIODIC_INT_DRIVER(namcos21_state, irq0_line_hold, 2*60) - MCFG_DEVICE_PERIODIC_INT_DRIVER(namcos21_state, irq1_line_hold, 120) - - configure_c68_namcos21(config); - - tms32025_device& dspmaster(TMS32025(config, m_dspmaster, 24000000)); /* 24 MHz? overclocked */ - dspmaster.set_addrmap(AS_PROGRAM, &namcos21_state::master_dsp_program); - dspmaster.set_addrmap(AS_DATA, &namcos21_state::master_dsp_data); - dspmaster.set_addrmap(AS_IO, &namcos21_state::master_dsp_io); - dspmaster.hold_in_cb().set_constant(0); - dspmaster.hold_ack_out_cb().set_nop(); - dspmaster.xf_out_cb().set(FUNC(namcos21_state::dsp_xf_w)); - - tms32025_device& dspslave(TMS32025(config, m_dspslave, 24000000*4)); /* 24 MHz? overclocked */ - dspslave.set_addrmap(AS_PROGRAM, &namcos21_state::slave_dsp_program); - dspslave.set_addrmap(AS_DATA, &namcos21_state::slave_dsp_data); - dspslave.set_addrmap(AS_IO, &namcos21_state::slave_dsp_io); - dspslave.hold_in_cb().set_constant(0); - dspslave.hold_ack_out_cb().set_nop(); - dspslave.xf_out_cb().set(FUNC(namcos21_state::slave_XF_output_w)); - - MCFG_QUANTUM_TIME(attotime::from_hz(12000)) - - MCFG_MACHINE_START_OVERRIDE(namcos21_state,namcos21) - MCFG_MACHINE_RESET_OVERRIDE(namcos21_state,namcos21) - NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); - - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_RAW_PARAMS_NAMCO480I - MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_namcos21) - MCFG_SCREEN_PALETTE("palette") - - configure_c148_standard(config); - NAMCO_C139(config, m_sci, 0); - - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos21) - MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS) - MCFG_PALETTE_FORMAT(XBRG) - - NAMCO_C355SPR(config, m_c355spr, 0); - m_c355spr->set_palette_tag("palette"); - m_c355spr->set_gfxdecode_tag("gfxdecode"); - m_c355spr->set_is_namcofl(false); - m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); - m_c355spr->set_palxor(0xf); // reverse mapping - m_c355spr->set_gfxregion(0); - - MCFG_VIDEO_START_OVERRIDE(namcos21_state,namcos21) - - SPEAKER(config, "lspeaker").front_left(); - SPEAKER(config, "rspeaker").front_right(); - - C140(config, m_c140, 8000000/374); - m_c140->set_bank_type(c140_device::C140_TYPE::SYSTEM21); - m_c140->add_route(0, "lspeaker", 0.50); - m_c140->add_route(1, "rspeaker", 0.50); - - MCFG_DEVICE_ADD("ymsnd", YM2151, 3579580) - MCFG_SOUND_ROUTE(0, "lspeaker", 0.30) - MCFG_SOUND_ROUTE(1, "rspeaker", 0.30) -MACHINE_CONFIG_END - - - - - - ROM_START( winrun ) ROM_REGION( 0x40000, "maincpu", 0 ) /* 68k code */ ROM_LOAD16_BYTE( "wr2-mpub.3k", 0x000000, 0x20000, CRC(3bb0ea17) SHA1(201cedf5865224c1c4a0c9b017982e36ec9b8243) ) @@ -2300,8 +931,6 @@ ROM_START( winrun ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x20000, "dsp", ROMREGION_ERASEFF ) /* DSP */ - ROM_REGION( 0x80000, "gpu", 0 ) /* 68k code */ ROM_LOAD16_BYTE( "wr1-gp0u.1k", 0x00000, 0x20000, CRC(c66a43be) SHA1(88ec02c5c18c8bb91a95934c14e9ae530ae09880) ) ROM_LOAD16_BYTE( "wr1-gp0l.3k", 0x00001, 0x20000, CRC(91a70e6f) SHA1(e613e2544f63cd386588445a2a199ae6b84d741e) ) @@ -2318,7 +947,7 @@ ROM_START( winrun ) ROM_LOAD16_BYTE( "wr1-gd0u-2.1p", 0x00000, 0x40000, CRC(9752eef5) SHA1(d6df0faf9c2696247bdf463f53c1e474ec595dd0) ) ROM_LOAD16_BYTE( "wr1-gd0l-2.3p", 0x00001, 0x40000, CRC(349c95cc) SHA1(8898eecf5918485ec683900520f123483077df28) ) - ROM_REGION16_BE( 0x80000, "point16", 0 ) /* 3d objects */ + ROM_REGION16_BE( 0x80000, "namcos21dsp:point16", 0 ) /* 3d objects */ ROM_LOAD16_BYTE( "wr1-pt0u.8j", 0x00000, 0x20000, CRC(7ec4cf6b) SHA1(92ec92567b9f7321efb4a3724cbcdba216eb22f9) ) ROM_LOAD16_BYTE( "wr1-pt0l.8d", 0x00001, 0x20000, CRC(58c14b73) SHA1(e34a26866cd870743e166669f7fa5915a82104e9) ) @@ -2366,8 +995,6 @@ ROM_START( winrungp ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x20000, "dsp", ROMREGION_ERASEFF ) /* DSP */ - ROM_REGION( 0x80000, "gpu", 0 ) /* 68k code */ ROM_LOAD16_BYTE( "sg1-gp0-u.1j", 0x00000, 0x20000, CRC(475da78a) SHA1(6e69bcc6caf2e3cd28fed75796c8992e754f9323) ) ROM_LOAD16_BYTE( "sg1-gp0-l.3j", 0x00001, 0x20000, CRC(580479bf) SHA1(ba682190cba0d3cdc49aa4937c898ba7ed2a25f5) ) @@ -2386,7 +1013,7 @@ ROM_START( winrungp ) ROM_LOAD16_BYTE( "sg1-gd1-u.1s", 0x80000, 0x40000, CRC(271db29b) SHA1(8b35fcf273b9aec28d4c606c41c0626dded697e1) ) ROM_LOAD16_BYTE( "sg1-gd1-l.3s", 0x80001, 0x40000, CRC(a6c4da96) SHA1(377dbf21a1bede01de16708c96c112abab4417ce) ) - ROM_REGION16_BE( 0x80000, "point16", 0 ) /* 3d objects */ + ROM_REGION16_BE( 0x80000, "namcos21dsp:point16", 0 ) /* 3d objects */ ROM_LOAD16_BYTE( "sg1-pt0-u.8j", 0x00000, 0x20000, CRC(160c3634) SHA1(485d20d6cc459f17d77682201dee07bdf76bf343) ) ROM_LOAD16_BYTE( "sg1-pt0-l.8d", 0x00001, 0x20000, CRC(b5a665bf) SHA1(5af6ec492f31395c0492e14590b025b120067b8d) ) ROM_LOAD16_BYTE( "sg1-pt1-u.8l", 0x40000, 0x20000, CRC(b63d3006) SHA1(78e78619766b0fd91b1e830cfb066495d6773981) ) @@ -2415,8 +1042,6 @@ ROM_START( winrun91 ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x20000, "dsp", ROMREGION_ERASEFF ) /* DSP */ - ROM_REGION( 0x80000, "gpu", 0 ) /* 68k code */ ROM_LOAD16_BYTE( "r911-gp0u.1j", 0x00000, 0x20000, CRC(f5469a29) SHA1(38b6ea1fbe482b69fbb0e2f44f44a0ca2a49f6bc) ) ROM_LOAD16_BYTE( "r911-gp0l.3j", 0x00001, 0x20000, CRC(5c18f596) SHA1(215cbda62254e31b4ff6431623384df1639bfdb7) ) @@ -2435,7 +1060,7 @@ ROM_START( winrun91 ) ROM_LOAD16_BYTE( "r911-gd1u.1s", 0x80000, 0x40000, CRC(17e5a61c) SHA1(272ebd7daa56847f1887809535362331b5465dec) ) ROM_LOAD16_BYTE( "r911-gd1l.3s", 0x80001, 0x40000, CRC(64df59a2) SHA1(1e9d0945b94780bb0be16803e767466d2cda07e8) ) - ROM_REGION16_BE( 0x80000, "point16", 0 ) /* winrun91 - 3d objects */ + ROM_REGION16_BE( 0x80000, "namcos21dsp:point16", 0 ) /* winrun91 - 3d objects */ ROM_LOAD16_BYTE( "r911-pt0u.8j", 0x00000, 0x20000, CRC(abf512a6) SHA1(e86288039d6c4dedfa95b11cb7e4b87637f90c09) ) /* Version on SYSTEM21B CPU only has R911 PTU @ 8W */ ROM_LOAD16_BYTE( "r911-pt0l.8d", 0x00001, 0x20000, CRC(ac8d468c) SHA1(d1b457a19a5d3259d0caf933f42b3a02b485867b) ) /* and R911 PTL @ 12W with rom type 27C020 */ ROM_LOAD16_BYTE( "r911-pt1u.8l", 0x40000, 0x20000, CRC(7e5dab74) SHA1(5bde219d5b4305d38d17b494b2e759f05d05329f) ) @@ -2449,509 +1074,10 @@ ROM_START( winrun91 ) ROM_LOAD( "nvram", 0x0000, 0x2000, CRC(75bcbc22) SHA1(1e7e785735d27aa8cd8393b16b589a46ecd7956a) ) ROM_END - - -ROM_START( driveyes ) - ROM_REGION( 0x40000, "maincpu", 0 ) /* C68C - 68k code */ - ROM_LOAD16_BYTE( "de2-mp-ub.3j", 0x000000, 0x20000, CRC(f9c86fb5) SHA1(b48d16e8f26e7a2cfecb30285b517c42e5585ac7) ) - ROM_LOAD16_BYTE( "de2-mp-lb.1j", 0x000001, 0x20000, CRC(11d8587a) SHA1(ecb1e8fe2ba56b6f6a71a5552d5663b597165786) ) - - ROM_REGION( 0x40000, "slave", 0 ) /* C68 - 68k code */ - ROM_LOAD16_BYTE( "de1-sp-ub.6c", 0x000000, 0x20000, CRC(231b144f) SHA1(42518614cb083455dc5fec71e699403907ca784b) ) - ROM_LOAD16_BYTE( "de1-sp-lb.4c", 0x000001, 0x20000, CRC(50cb9f59) SHA1(aec7fa080854f0297d9e90e3aaeb0f332fd579bd) ) - - ROM_REGION( 0x20000, "audiocpu", 0 ) /* Sound */ -/* -There are 3 separate complete boards used for this 3 screen version.... -"Set2" (center screen board?) has de1_snd0 while the other 2 sets have de1_snd0r (rear speakers??) -Only "Set2" has voice roms present/dumped? -We load the "r" set, then load set2's sound CPU code over it to keep the "r" rom in the set -*/ - ROM_LOAD( "de1-snd0r.8j", 0x000000, 0x020000, CRC(7bbeda42) SHA1(fe840cc9069758928492bbeec79acded18daafd9) ) /* Sets 1 & 3 */ - ROM_LOAD( "de1-snd0.8j", 0x000000, 0x020000, CRC(5474f203) SHA1(e0ae2f6978deb0c934d9311a334a6e36bb402aee) ) /* Set 2 */ - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dsp", ROMREGION_ERASEFF ) /* DSP (no internal ROM?) */ - - ROM_REGION( 0x200000, "gfx1", 0 ) /* sprites */ - ROM_LOAD( "de1-obj0.5s", 0x000000, 0x40000, CRC(7438bd53) SHA1(7619c4b56d5c466e845eb45e6157dcaf2a03ad94) ) - ROM_LOAD( "de1-obj4.4s", 0x040000, 0x40000, CRC(335f0ea4) SHA1(9ec065d99ad0874b262b372334179a7e7612558e) ) - ROM_LOAD( "de1-obj1.5x", 0x080000, 0x40000, CRC(45f2334e) SHA1(95f277a4e43d6662ae44d6b69a57f65c72978319) ) - ROM_LOAD( "de1-obj5.4x", 0x0c0000, 0x40000, CRC(9e22999c) SHA1(02624186c359b5e2c96cd3f0e2cb1598ea36dff7) ) - ROM_LOAD( "de1-obj2.3s", 0x100000, 0x40000, CRC(8f1a542c) SHA1(2cb59713607d8929815a9b28bf2a384b6a6c9db8) ) - ROM_LOAD( "de1-obj6.2s", 0x140000, 0x40000, CRC(346df4d5) SHA1(edbadb9db93b7f5a3b064c7f6acb77001cdacce2) ) - ROM_LOAD( "de1-obj3.3x", 0x180000, 0x40000, CRC(fc94544c) SHA1(6297445c64784ee253716f6438d98e5fcd4e7520) ) - ROM_LOAD( "de1-obj7.2x", 0x1c0000, 0x40000, CRC(9ce325d7) SHA1(de4d788bec14842507ed405244974b4fd4f07515) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) /* 68k */ - ROM_LOAD16_BYTE( "de1-data-u.3a", 0x00000, 0x80000, CRC(fe65d2ab) SHA1(dbe962dda7efa60357fa3a684a265aaad49df5b5) ) - ROM_LOAD16_BYTE( "de1-data-l.1a", 0x00001, 0x80000, CRC(9bb37aca) SHA1(7f5dffc95cadcf12f53ff7944920afc25ed3cf68) ) - - ROM_REGION16_BE( 0xc0000, "point16", 0 ) /* 3d objects */ - ROM_LOAD16_BYTE( "de1-pt0-ub.8j", 0x00000, 0x20000, CRC(3b6b746d) SHA1(40c992ef4cf5187b30aba42c5fe7ce0f8f02bee0) ) - ROM_LOAD16_BYTE( "de1-pt0-lb.8d", 0x00001, 0x20000, CRC(9c5c477e) SHA1(c8ae8a663227d636d35bd5f432d23f05d6695942) ) - ROM_LOAD16_BYTE( "de1-pt1-u.8l", 0x40000, 0x20000, CRC(23bc72a1) SHA1(083e2955ae2f88d1ad461517b47054d64375b46e) ) - ROM_LOAD16_BYTE( "de1-pt1-l.8e", 0x40001, 0x20000, CRC(a05ee081) SHA1(1be4c61ad716abb809856e04d4bb450943706a55) ) - ROM_LOAD16_BYTE( "de1-pt2-u.5n", 0x80000, 0x20000, CRC(10e83d81) SHA1(446fedc3b1e258a39fb9467e5327c9f9a9f1ac3f) ) - ROM_LOAD16_BYTE( "de1-pt2-l.7n", 0x80001, 0x20000, CRC(3339a976) SHA1(c9eb9c04f7b3f2a85e5ab64ffb2fe4fcfb6c494b) ) - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("de1-voi0.12b", 0x040000, 0x40000, CRC(fc44adbd) SHA1(4268bb1f025e47a94212351d1c1cfd0e5029221f) ) - ROM_LOAD("de1-voi1.12c", 0x0c0000, 0x40000, CRC(a71dc55a) SHA1(5e746184db9144ab4e3a97b20195b92b0f56c8cc) ) - ROM_LOAD("de1-voi2.12d", 0x140000, 0x40000, CRC(4d32879a) SHA1(eae65f4b98cee9efe4e5dad7298c3717cfb1e6bf) ) - ROM_LOAD("de1-voi3.12e", 0x1c0000, 0x40000, CRC(e4832d18) SHA1(0460c79d3942aab89a765b0bd8bbddaf19a6d682) ) - - ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ - ROM_LOAD( "nvram", 0x0000, 0x2000, CRC(fa6623e9) SHA1(8c313f136724eb6c829261b223a2ac1fc08d00c2) ) -ROM_END - - - -ROM_START( starblad ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "st2_mpu.mpru", 0x000000, 0x80000, CRC(35bc9e4a) SHA1(03401fb846c1b2aee775071a554654e49fe5c47c) ) - ROM_LOAD16_BYTE( "st2_mpl.mprl", 0x000001, 0x80000, CRC(193e641b) SHA1(fed803167c5b0bba5b8381c26c909b7380d57efd) ) - - ROM_REGION( 0x080000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "st1-sp-u.bin", 0x000000, 0x40000, CRC(9f9a55db) SHA1(72bf5d6908cc57cc490fa2292b4993d796b2974d) ) - ROM_LOAD16_BYTE( "st1-sp-l.bin", 0x000001, 0x40000, CRC(acbe39c7) SHA1(ca48b7ea619b1caaf590eed33001826ce7ef36d8) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "st1-snd0.bin", 0x000000, 0x020000, CRC(c0e934a3) SHA1(678ed6705c6f494d7ecb801a4ef1b123b80979a5) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x200000, "gfx1", 0 ) /* sprites */ - ROM_LOAD( "st1-obj0.bin", 0x000000, 0x80000, CRC(5d42c71e) SHA1(f1aa2bb31bbbcdcac8e94334b1c78238cac1a0e7) ) - ROM_LOAD( "st1-obj1.bin", 0x080000, 0x80000, CRC(c98011ad) SHA1(bc34c21428e0ef5887051c0eb0fdef5397823a82) ) - ROM_LOAD( "st1-obj2.bin", 0x100000, 0x80000, CRC(6cf5b608) SHA1(c8537fbe97677c4c8a365b1cf86c4645db7a7d6b) ) - ROM_LOAD( "st1-obj3.bin", 0x180000, 0x80000, CRC(cdc195bb) SHA1(91443917a6982c286b6f15381d441d061aefb138) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) - ROM_LOAD16_BYTE( "st1-data-u.bin", 0x000000, 0x20000, CRC(2433e911) SHA1(95f5f00d3bacda4996e055a443311fb9f9a5fe2f) ) - ROM_LOAD16_BYTE( "st1-data-l.bin", 0x000001, 0x20000, CRC(4a2cc252) SHA1(d9da9992bac878f8a1f5e84cc3c6d457b4705e8f) ) - - ROM_REGION16_BE( 0x100000, "edata", ROMREGION_ERASEFF ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "st1-pt0-h.bin", 0x000001, 0x80000, CRC(84eb355f) SHA1(89a248b8be2e0afcee29ba4c4c9cca65d5fb246a) ) - ROM_LOAD32_BYTE( "st1-pt0-u.bin", 0x000002, 0x80000, CRC(1956cd0a) SHA1(7d21b3a59f742694de472c545a1f30c3d92e3390) ) - ROM_LOAD32_BYTE( "st1-pt0-l.bin", 0x000003, 0x80000, CRC(ff577049) SHA1(1e1595174094e88d5788753d05ce296c1f7eca75) ) - ROM_LOAD32_BYTE( "st1-pt1-h.bin", 0x200001, 0x80000, CRC(96b1bd7d) SHA1(55da7896dda2aa4c35501a55c8605a065b02aa17) ) - ROM_LOAD32_BYTE( "st1-pt1-u.bin", 0x200002, 0x80000, CRC(ecf21047) SHA1(ddb13f5a2e7d192f0662fa420b49f89e1e991e66) ) - ROM_LOAD32_BYTE( "st1-pt1-l.bin", 0x200003, 0x80000, CRC(01cb0407) SHA1(4b58860bbc353de8b4b8e83d12b919d9386846e8) ) - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("st1-voi0.bin", 0x000000, 0x80000,CRC(5b3d43a9) SHA1(cdc04f19dc91dca9fa88ba0c2fca72aa195a3694) ) - ROM_LOAD("st1-voi1.bin", 0x080000, 0x80000,CRC(413e6181) SHA1(e827ec11f5755606affd2635718512aeac9354da) ) - ROM_LOAD("st1-voi2.bin", 0x100000, 0x80000,CRC(067d0720) SHA1(a853b2d43027a46c5e707fc677afdaae00f450c7) ) - ROM_LOAD("st1-voi3.bin", 0x180000, 0x80000,CRC(8b5aa45f) SHA1(e1214e639200758ad2045bde0368a2d500c1b84a) ) - - ROM_REGION( 0x2000, "nvram", ROMREGION_ERASE00) - // starblad needs default NVRAM to be all 0 -ROM_END - -ROM_START( starbladj ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "st1_mpu.mpru", 0x000000, 0x80000, CRC(483a311c) SHA1(dd9416b8d4b0f8b361630e312eac71c113064eae) ) - ROM_LOAD16_BYTE( "st1_mpl.mprl", 0x000001, 0x80000, CRC(0a4dd661) SHA1(fc2b71a255a8613693c4d1c79ddd57a6d396165a) ) - - ROM_REGION( 0x080000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "st1-sp-u.bin", 0x000000, 0x40000, CRC(9f9a55db) SHA1(72bf5d6908cc57cc490fa2292b4993d796b2974d) ) - ROM_LOAD16_BYTE( "st1-sp-l.bin", 0x000001, 0x40000, CRC(acbe39c7) SHA1(ca48b7ea619b1caaf590eed33001826ce7ef36d8) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "st1-snd0.bin", 0x000000, 0x020000, CRC(c0e934a3) SHA1(678ed6705c6f494d7ecb801a4ef1b123b80979a5) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x200000, "gfx1", 0 ) /* sprites */ - ROM_LOAD( "st1-obj0.bin", 0x000000, 0x80000, CRC(5d42c71e) SHA1(f1aa2bb31bbbcdcac8e94334b1c78238cac1a0e7) ) - ROM_LOAD( "st1-obj1.bin", 0x080000, 0x80000, CRC(c98011ad) SHA1(bc34c21428e0ef5887051c0eb0fdef5397823a82) ) - ROM_LOAD( "st1-obj2.bin", 0x100000, 0x80000, CRC(6cf5b608) SHA1(c8537fbe97677c4c8a365b1cf86c4645db7a7d6b) ) - ROM_LOAD( "st1-obj3.bin", 0x180000, 0x80000, CRC(cdc195bb) SHA1(91443917a6982c286b6f15381d441d061aefb138) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) - ROM_LOAD16_BYTE( "st1-data-u.bin", 0x000000, 0x20000, CRC(2433e911) SHA1(95f5f00d3bacda4996e055a443311fb9f9a5fe2f) ) - ROM_LOAD16_BYTE( "st1-data-l.bin", 0x000001, 0x20000, CRC(4a2cc252) SHA1(d9da9992bac878f8a1f5e84cc3c6d457b4705e8f) ) - - ROM_REGION16_BE( 0x100000, "edata", ROMREGION_ERASEFF ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "st1-pt0-h.bin", 0x000001, 0x80000, CRC(84eb355f) SHA1(89a248b8be2e0afcee29ba4c4c9cca65d5fb246a) ) - ROM_LOAD32_BYTE( "st1-pt0-u.bin", 0x000002, 0x80000, CRC(1956cd0a) SHA1(7d21b3a59f742694de472c545a1f30c3d92e3390) ) - ROM_LOAD32_BYTE( "st1-pt0-l.bin", 0x000003, 0x80000, CRC(ff577049) SHA1(1e1595174094e88d5788753d05ce296c1f7eca75) ) - ROM_LOAD32_BYTE( "st1-pt1-h.bin", 0x200001, 0x80000, CRC(96b1bd7d) SHA1(55da7896dda2aa4c35501a55c8605a065b02aa17) ) - ROM_LOAD32_BYTE( "st1-pt1-u.bin", 0x200002, 0x80000, CRC(ecf21047) SHA1(ddb13f5a2e7d192f0662fa420b49f89e1e991e66) ) - ROM_LOAD32_BYTE( "st1-pt1-l.bin", 0x200003, 0x80000, CRC(01cb0407) SHA1(4b58860bbc353de8b4b8e83d12b919d9386846e8) ) - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("st1-voi0.bin", 0x000000, 0x80000,CRC(5b3d43a9) SHA1(cdc04f19dc91dca9fa88ba0c2fca72aa195a3694) ) - ROM_LOAD("st1-voi1.bin", 0x080000, 0x80000,CRC(413e6181) SHA1(e827ec11f5755606affd2635718512aeac9354da) ) - ROM_LOAD("st1-voi2.bin", 0x100000, 0x80000,CRC(067d0720) SHA1(a853b2d43027a46c5e707fc677afdaae00f450c7) ) - ROM_LOAD("st1-voi3.bin", 0x180000, 0x80000,CRC(8b5aa45f) SHA1(e1214e639200758ad2045bde0368a2d500c1b84a) ) - - ROM_REGION( 0x2000, "nvram", ROMREGION_ERASE00) - // starblad needs default NVRAM to be all 0 -ROM_END - -ROM_START( solvalou ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "sv1-mp-u.bin", 0x000000, 0x20000, CRC(b6f92762) SHA1(d177328b3da2ab0580e101478142bc8c373d6140) ) - ROM_LOAD16_BYTE( "sv1-mp-l.bin", 0x000001, 0x20000, CRC(28c54c42) SHA1(32fcca2eb4bb8ba8c2587b03d3cf59f072f7fac5) ) - - ROM_REGION( 0x80000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "sv1-sp-u.bin", 0x000000, 0x20000, CRC(ebd4bf82) SHA1(67946360d680a675abcb3c131bac0502b2455573) ) - ROM_LOAD16_BYTE( "sv1-sp-l.bin", 0x000001, 0x20000, CRC(7acab679) SHA1(764297c9601be99dbbffb75bbc6fe4a40ea38529) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "sv1-snd0.bin", 0x000000, 0x020000, CRC(5e007864) SHA1(94da2d51544c6127056beaa251353038646da15f) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x400000, "gfx1", 0 ) - ROM_LOAD( "sv1-obj0.bin", 0x000000, 0x80000, CRC(773798bb) SHA1(51ab76c95030bab834f1a74ae677b2f0afc18c52) ) - ROM_LOAD( "sv1-obj4.bin", 0x080000, 0x80000, CRC(33a008a7) SHA1(4959a0ac24ad64f1367e2d8d63d39a0273c60f3e) ) - ROM_LOAD( "sv1-obj1.bin", 0x100000, 0x80000, CRC(a36d9e79) SHA1(928d9995e97ee7509e23e6cc64f5e7bfb5c02d42) ) - ROM_LOAD( "sv1-obj5.bin", 0x180000, 0x80000, CRC(31551245) SHA1(385452ea4830c466263ad5241313ac850dfef756) ) - ROM_LOAD( "sv1-obj2.bin", 0x200000, 0x80000, CRC(c8672b8a) SHA1(8da037b27d2c2b178aab202781f162371458f788) ) - ROM_LOAD( "sv1-obj6.bin", 0x280000, 0x80000, CRC(fe319530) SHA1(8f7e46c8f0b86c7515f6d763b795ce07d11c77bc) ) - ROM_LOAD( "sv1-obj3.bin", 0x300000, 0x80000, CRC(293ef1c5) SHA1(f677883bfec16bbaeb0a01ac565d0e6cac679174) ) - ROM_LOAD( "sv1-obj7.bin", 0x380000, 0x80000, CRC(95ed6dcb) SHA1(931706ce3fea630823ce0c79febec5eec0cc623d) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) - ROM_LOAD16_BYTE( "sv1-data-u.bin", 0x000000, 0x80000, CRC(2e561996) SHA1(982158481e5649f21d5c2816fdc80cb725ed1419) ) - ROM_LOAD16_BYTE( "sv1-data-l.bin", 0x000001, 0x80000, CRC(495fb8dd) SHA1(813d1da4109652008d72b3bdb03032efc5c0c2d5) ) - - ROM_REGION16_BE( 0x100000, "edata", ROMREGION_ERASEFF ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "sv1-pt0-h.bin", 0x000001, 0x80000, CRC(3be21115) SHA1(c9f30353c1216f64199f87cd34e787efd728e739) ) /* most significant */ - ROM_LOAD32_BYTE( "sv1-pt0-u.bin", 0x000002, 0x80000, CRC(4aacfc42) SHA1(f0e179e057183b41744ca429764f44306f0ce9bf) ) - ROM_LOAD32_BYTE( "sv1-pt0-l.bin", 0x000003, 0x80000, CRC(6a4dddff) SHA1(9ed182d21d328c6a684ee6658a9dfcf3f3dd8646) ) /* least significant */ - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("sv1-voi0.bin", 0x000000, 0x80000,CRC(7f61bbcf) SHA1(b3b7e66e24d9cb16ebd139237c1e51f5d60c1585) ) - ROM_LOAD("sv1-voi1.bin", 0x080000, 0x80000,CRC(c732e66c) SHA1(14e75dd9bea4055f85eb2bcbf69cf6695a3f7ec4) ) - ROM_LOAD("sv1-voi2.bin", 0x100000, 0x80000,CRC(51076298) SHA1(ec52c9ae3029118f3ea3732948d6de28f5fba561) ) - ROM_LOAD("sv1-voi3.bin", 0x180000, 0x80000,CRC(33085ff3) SHA1(0a30b91618c250a5e7bd896a8ceeb3d16da178a9) ) -ROM_END - - -ROM_START( aircomb ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "ac2-mpr-u.3j", 0x000000, 0x80000, CRC(a7133f85) SHA1(9f1c99dd503f1fc81096170fd272e33ae8a7de2f) ) - ROM_LOAD16_BYTE( "ac2-mpr-l.1j", 0x000001, 0x80000, CRC(520a52e6) SHA1(74306e02abfe08aa1afbf325b74dbc0840c3ad3a) ) - - ROM_REGION( 0x80000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "ac2-spr-u.6c", 0x000000, 0x20000, CRC(42aca956) SHA1(10ea2400bb4d5b2d805e2de43ca0e0f54597f660) ) - ROM_LOAD16_BYTE( "ac2-spr-l.4c", 0x000001, 0x20000, CRC(3e15fa19) SHA1(65dbb33ab6b3c06c793613348ebb7b110b8bba0d) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "ac1-snd0.8j", 0x000000, 0x020000, CRC(5c1fb84b) SHA1(20e4d81289dbe58ffcfc947251a6ff1cc1e36436) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x400000, "gfx1", 0 ) - ROM_LOAD( "ac2-obj0.5s", 0x000000, 0x80000, CRC(8327ff22) SHA1(16f6022dedb7a74590898bc8ed3e8a97993c4635) ) - ROM_LOAD( "ac2-obj4.4s", 0x080000, 0x80000, CRC(e433e344) SHA1(98ade550cf066fcb5c09fa905f441a1464d4d625) ) - ROM_LOAD( "ac2-obj1.5x", 0x100000, 0x80000, CRC(43af566d) SHA1(99f0d9f005e28040f5cc10de2198893946a31d09) ) - ROM_LOAD( "ac2-obj5.4x", 0x180000, 0x80000, CRC(ecb19199) SHA1(8e0aa1bc1141c4b09576ab08970d0c7629560643) ) - ROM_LOAD( "ac2-obj2.3s", 0x200000, 0x80000, CRC(dafbf489) SHA1(c53ccb3e1b4a6a660bd28c8abe52ccc3f85d111f) ) - ROM_LOAD( "ac2-obj6.2s", 0x280000, 0x80000, CRC(24cc3f36) SHA1(e50af176eb3034c9cab7613ca614f5cc2c62f95e) ) - ROM_LOAD( "ac2-obj3.3x", 0x300000, 0x80000, CRC(bd555a1d) SHA1(96e432b30da6f5f7ccb768c516b1f7186bc0d4c9) ) - ROM_LOAD( "ac2-obj7.2x", 0x380000, 0x80000, CRC(d561fbe3) SHA1(a23976e10bddf74d4a6b292f044dfd0affbab101) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) /* collision */ - ROM_LOAD16_BYTE( "ac1-data-u.3a", 0x000000, 0x80000, CRC(82320c71) SHA1(2be98d46853febb46e1cc728af2735c0e00ce303) ) - ROM_LOAD16_BYTE( "ac1-data-l.1a", 0x000001, 0x80000, CRC(fd7947d3) SHA1(2696eeae37de6d256e626cc3f3cea7b0f6eff60e) ) - - ROM_REGION16_BE( 0x100000, "edata", 0 ) - ROM_LOAD16_BYTE( "ac1-edata1-u.3c", 0x000000, 0x80000, CRC(a9547509) SHA1(1bc663cec03b60ad968896bbc2546f02efda135e) ) - ROM_LOAD16_BYTE( "ac1-edata1-l.1c", 0x000001, 0x80000, CRC(a87087dd) SHA1(cd9b83a8f07886ab44e4ded68002b44338777e8c) ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "ac1-poi-h.2f", 0x000001, 0x80000, CRC(573bbc3b) SHA1(371be12b915db6872049f18980c1b55544cfc445) ) /* most significant */ - ROM_LOAD32_BYTE( "ac1-poi-lu.2k", 0x000002, 0x80000, CRC(d99084b9) SHA1(c604d60a2162af7610e5ff7c1aa4195f7df82efe) ) - ROM_LOAD32_BYTE( "ac1-poi-ll.2n", 0x000003, 0x80000, CRC(abb32307) SHA1(8e936ba99479215dd33a951d81ec2b04020dfd62) ) /* least significant */ - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("ac1-voi0.12b", 0x000000, 0x80000,CRC(f427b119) SHA1(bd45bbe41c8be26d6c997fcdc226d080b416a2cf) ) - ROM_LOAD("ac1-voi1.12c", 0x080000, 0x80000,CRC(c9490667) SHA1(4b6fbe635c32469870a8e6f82742be6a9d4918c9) ) - ROM_LOAD("ac1-voi2.12d", 0x100000, 0x80000,CRC(1fcb51ba) SHA1(80fc815e5fad76d20c3795ab1d89b57d9abc3efd) ) - ROM_LOAD("ac1-voi3.12e", 0x180000, 0x80000,CRC(cd202e06) SHA1(72a18f5ba402caefef14b8d1304f337eaaa3eb1d) ) - - ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "gal16v8a-3pdsp5.17d", 0x0000, 0x0117, CRC(799c1f26) SHA1(d28ed1b9fa78180c5a0b01a7198a2870137c7349) ) - ROM_LOAD( "plhs18p8-3pobj3.17n", 0x0200, 0x0149, CRC(9625f469) SHA1(29158a3d37485fb0714d0a60bcd07abd26a3f56e) ) - ROM_LOAD( "plhs18p8-3pobj4.17n", 0x0400, 0x0149, CRC(1b7c90c1) SHA1(ae65aab7a191cdf1af488e144af22b9d8669c903) ) - - ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ - ROM_LOAD( "aircomb.nv", 0x0000, 0x2000, CRC(a97ea3e0) SHA1(95684bb7369c1cb1e2fa53c743d4f94b0080c6f5) ) -ROM_END - -ROM_START( aircombj ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "ac1-mpr-u.3j", 0x000000, 0x80000, CRC(a4dec813) SHA1(2ee8b3492d30db4c841f695151880925a5e205e0) ) - ROM_LOAD16_BYTE( "ac1-mpr-l.1j", 0x000001, 0x80000, CRC(8577b6a2) SHA1(32194e392fbd051754be88eb8c90688c65c65d85) ) - - ROM_REGION( 0x080000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "ac1-spr-u.6c", 0x000000, 0x20000, CRC(5810e219) SHA1(c312ffd8324670897871b12d521779570dc0f580) ) - ROM_LOAD16_BYTE( "ac1-spr-l.4c", 0x000001, 0x20000, CRC(175a7d6c) SHA1(9e31dde6646cd9b6dcdbdb3f2326177508559e56) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "ac1-snd0.8j", 0x000000, 0x020000, CRC(5c1fb84b) SHA1(20e4d81289dbe58ffcfc947251a6ff1cc1e36436) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x400000, "gfx1", 0 ) - ROM_LOAD( "ac1-obj0.5s", 0x000000, 0x80000, CRC(d2310c6a) SHA1(9bb8fdfc2c232574777248f4959975f9a20e3105) ) - ROM_LOAD( "ac1-obj4.4s", 0x080000, 0x80000, CRC(0c93b478) SHA1(a92ffbcf04b64e0eee5bcf37008e247700641b25) ) - ROM_LOAD( "ac1-obj1.5x", 0x100000, 0x80000, CRC(f5783a77) SHA1(0be1815ceb4ce4fa7ab75ba588e090f20ee0cac9) ) - ROM_LOAD( "ac1-obj5.4x", 0x180000, 0x80000, CRC(476aed15) SHA1(0e53fdf02e8ffe7852a1fa8bd2f64d0e58f3dc09) ) - ROM_LOAD( "ac1-obj2.3s", 0x200000, 0x80000, CRC(01343d5c) SHA1(64171fed1d1f8682b3d70d3233ea017719f4cc63) ) - ROM_LOAD( "ac1-obj6.2s", 0x280000, 0x80000, CRC(c67607b1) SHA1(df64ea7920cf64271fe742d3d0a57f842ee61e8d) ) - ROM_LOAD( "ac1-obj3.3x", 0x300000, 0x80000, CRC(7717f52e) SHA1(be1df3f4d0fdcaa5d3c81a724e5eb9d14136c6f5) ) - ROM_LOAD( "ac1-obj7.2x", 0x380000, 0x80000, CRC(cfa9fe5f) SHA1(0da25663b89d653c87ed32d15f7c82f3035702ab) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) - ROM_LOAD16_BYTE( "ac1-data-u.3a", 0x000000, 0x80000, CRC(82320c71) SHA1(2be98d46853febb46e1cc728af2735c0e00ce303) ) - ROM_LOAD16_BYTE( "ac1-data-l.1a", 0x000001, 0x80000, CRC(fd7947d3) SHA1(2696eeae37de6d256e626cc3f3cea7b0f6eff60e) ) - - ROM_REGION16_BE( 0x100000, "edata", 0 ) - ROM_LOAD16_BYTE( "ac1-edata1-u.3c", 0x000000, 0x80000, CRC(a9547509) SHA1(1bc663cec03b60ad968896bbc2546f02efda135e) ) - ROM_LOAD16_BYTE( "ac1-edata1-l.1c", 0x000001, 0x80000, CRC(a87087dd) SHA1(cd9b83a8f07886ab44e4ded68002b44338777e8c) ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "ac1-poi-h.2f", 0x000001, 0x80000, CRC(573bbc3b) SHA1(371be12b915db6872049f18980c1b55544cfc445) ) /* most significant */ - ROM_LOAD32_BYTE( "ac1-poi-lu.2k", 0x000002, 0x80000, CRC(d99084b9) SHA1(c604d60a2162af7610e5ff7c1aa4195f7df82efe) ) - ROM_LOAD32_BYTE( "ac1-poi-ll.2n", 0x000003, 0x80000, CRC(abb32307) SHA1(8e936ba99479215dd33a951d81ec2b04020dfd62) ) /* least significant */ - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("ac1-voi0.12b", 0x000000, 0x80000,CRC(f427b119) SHA1(bd45bbe41c8be26d6c997fcdc226d080b416a2cf) ) - ROM_LOAD("ac1-voi1.12c", 0x080000, 0x80000,CRC(c9490667) SHA1(4b6fbe635c32469870a8e6f82742be6a9d4918c9) ) - ROM_LOAD("ac1-voi2.12d", 0x100000, 0x80000,CRC(1fcb51ba) SHA1(80fc815e5fad76d20c3795ab1d89b57d9abc3efd) ) - ROM_LOAD("ac1-voi3.12e", 0x180000, 0x80000,CRC(cd202e06) SHA1(72a18f5ba402caefef14b8d1304f337eaaa3eb1d) ) - - ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "gal16v8a-3pdsp5.17d", 0x0000, 0x0117, CRC(799c1f26) SHA1(d28ed1b9fa78180c5a0b01a7198a2870137c7349) ) - ROM_LOAD( "plhs18p8-3pobj3.17n", 0x0200, 0x0149, CRC(9625f469) SHA1(29158a3d37485fb0714d0a60bcd07abd26a3f56e) ) - ROM_LOAD( "plhs18p8-3pobj4.17n", 0x0400, 0x0149, CRC(1b7c90c1) SHA1(ae65aab7a191cdf1af488e144af22b9d8669c903) ) - - ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ - ROM_LOAD( "aircombj.nv", 0x0000, 0x2000, CRC(56c71c83) SHA1(83dfcf4e3232f78e3807e9d3e862aa5446444165) ) -ROM_END - -ROM_START( cybsled ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "cy2-mpr-u.3j", 0x000000, 0x80000, CRC(b35a72bc) SHA1(d9bc5b8f0bc30510fca8fc57eeb67e5ca0e4c67f) ) - ROM_LOAD16_BYTE( "cy2-mpr-l.1j", 0x000001, 0x80000, CRC(c4a25919) SHA1(52f6947102001376e37730ace16283141b13fee7) ) - - ROM_REGION( 0x100000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "cy2-spr-u.6c", 0x000000, 0x80000, CRC(575a422d) SHA1(cad97742da1e2baf47ac110fadef5544b3a30cc7) ) - ROM_LOAD16_BYTE( "cy2-spr-l.4c", 0x000001, 0x80000, CRC(4066291a) SHA1(6ebbc11a68f66ec1e6d2e6ee857e8c599691e289) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "cy1-snd0.8j", 0x000000, 0x020000, CRC(3dddf83b) SHA1(e16119cbef176b6f8f8ace773fcbc201e987823f) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x400000, "gfx1", 0 ) - ROM_LOAD( "cy1-obj0.5s", 0x000000, 0x80000, CRC(5ae542d5) SHA1(99b1a3ed476da4a97cb864538909d7b831f0fd3b) ) - ROM_LOAD( "cy1-obj4.4s", 0x080000, 0x80000, CRC(57904076) SHA1(b1dc0d99543bc4b9584b37ffc12c6ebc59e30e3b) ) - ROM_LOAD( "cy1-obj1.5x", 0x100000, 0x80000, CRC(4aae3eff) SHA1(c80240bd2f4228a0261a14adb6b10560b31b5aa0) ) - ROM_LOAD( "cy1-obj5.4x", 0x180000, 0x80000, CRC(0e11ca47) SHA1(076a9a4cfddbee2d8aaa06110333090d8fdbefeb) ) - ROM_LOAD( "cy1-obj2.3s", 0x200000, 0x80000, CRC(d64ec4c3) SHA1(0bed1cafc21ed8cef3850fb81e30076977086eb0) ) - ROM_LOAD( "cy1-obj6.2s", 0x280000, 0x80000, CRC(7748b485) SHA1(adb4da419a6cdbefd0fef182d866a3479be379af) ) - ROM_LOAD( "cy1-obj3.3x", 0x300000, 0x80000, CRC(3d1f7168) SHA1(392dddcc79fe61dcc6514a91ac27b5e36825d8b7) ) - ROM_LOAD( "cy1-obj7.2x", 0x380000, 0x80000, CRC(b6eb6ad2) SHA1(85a660c5e44012491be7d4e783cce6ba12c135cb) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) - ROM_LOAD16_BYTE( "cy1-data-u.3a", 0x000000, 0x80000, CRC(570da15d) SHA1(9ebe756f10756c079a92fb522332e9e52ff715c3) ) - ROM_LOAD16_BYTE( "cy1-data-l.1a", 0x000001, 0x80000, CRC(9cf96f9e) SHA1(91783f48b93e03c778c6641ca8fb419c13b0d3c5) ) - - ROM_REGION16_BE( 0x100000, "edata", 0 ) - ROM_LOAD16_BYTE( "cy1-edata0-u.3b", 0x000000, 0x80000, CRC(77452533) SHA1(48fc199bcc1beb23c714eebd9b09b153c980170b) ) - ROM_LOAD16_BYTE( "cy1-edata0-l.1b", 0x000001, 0x80000, CRC(e812e290) SHA1(719e0a026ae8ef63d0d0269b67669ea9b4d950dd) ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "cy1-poi-h1.2f", 0x000001, 0x80000, CRC(eaf8bac3) SHA1(7a2caf6672af158b4a23ce4626342d1f17d1a4e4) ) /* most significant */ - ROM_LOAD32_BYTE( "cy1-poi-lu1.2k", 0x000002, 0x80000, CRC(c544a8dc) SHA1(4cce5f2ab3519b4aa7edbdd15b2d79a7fdcade3c) ) - ROM_LOAD32_BYTE( "cy1-poi-ll1.2n", 0x000003, 0x80000, CRC(30acb99b) SHA1(a28dcb3e5405f166644f6353a903c1143ee268f1) ) /* least significant */ - ROM_LOAD32_BYTE( "cy1-poi-h2.2j", 0x200001, 0x80000, CRC(4079f342) SHA1(fa36aed1abbda54a42f29b183007474580870319) ) - ROM_LOAD32_BYTE( "cy1-poi-lu2.2l", 0x200002, 0x80000, CRC(61d816d4) SHA1(7991957b910d32530151abc7f469fcf1de62d8f3) ) - ROM_LOAD32_BYTE( "cy1-poi-ll2.2p", 0x200003, 0x80000, CRC(faf09158) SHA1(b56ebed6012362b1d599c396a43e90a1e4d9dc38) ) - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("cy1-voi0.12b", 0x000000, 0x80000,CRC(99d7ce46) SHA1(b75f4055c3ce847daabfacda22df14e3f80c4fb9) ) - ROM_LOAD("cy1-voi1.12c", 0x080000, 0x80000,CRC(2b335f06) SHA1(2b2cd407c34388b56496f84a414daa153780b098) ) - ROM_LOAD("cy1-voi2.12d", 0x100000, 0x80000,CRC(10cd15f0) SHA1(9b721654ed97a13287373c1b2854ac9aeddc271f) ) - ROM_LOAD("cy1-voi3.12e", 0x180000, 0x80000,CRC(c902b4a4) SHA1(816357ec1a02a7ebf817ac1182e9c50ce5ca71f6) ) - - ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ - ROM_LOAD( "cybsled.nv", 0x0000, 0x2000, CRC(aa18bf9e) SHA1(3712d4d20e5f5f1c920e3f1f6a00101e874662d0) ) -ROM_END - -ROM_START( cybsledj ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "cy1-mpr-u.3j", 0x000000, 0x80000, CRC(cc5a2e83) SHA1(b794051b2c351e9ca43351603845e4e563f6740f) ) - ROM_LOAD16_BYTE( "cy1-mpr-l.1j", 0x000001, 0x80000, CRC(f7ee8b48) SHA1(6d36eb3dba9cf7f5f5e1a26c156e77a2dad3f257) ) - - ROM_REGION( 0x100000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "cy1-spr-u.6c", 0x000000, 0x80000, CRC(28dd707b) SHA1(11297ceae4fe78d170785a5cf9ad77833bbe7fff) ) - ROM_LOAD16_BYTE( "cy1-spr-l.4c", 0x000001, 0x80000, CRC(437029de) SHA1(3d275a2b0ce6909e77e657c371bd22597ea9d398) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "cy1-snd0.8j", 0x000000, 0x020000, CRC(3dddf83b) SHA1(e16119cbef176b6f8f8ace773fcbc201e987823f) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x400000, "gfx1", 0 ) - ROM_LOAD( "cy1-obj0.5s", 0x000000, 0x80000, CRC(5ae542d5) SHA1(99b1a3ed476da4a97cb864538909d7b831f0fd3b) ) - ROM_LOAD( "cy1-obj4.4s", 0x080000, 0x80000, CRC(57904076) SHA1(b1dc0d99543bc4b9584b37ffc12c6ebc59e30e3b) ) - ROM_LOAD( "cy1-obj1.5x", 0x100000, 0x80000, CRC(4aae3eff) SHA1(c80240bd2f4228a0261a14adb6b10560b31b5aa0) ) - ROM_LOAD( "cy1-obj5.4x", 0x180000, 0x80000, CRC(0e11ca47) SHA1(076a9a4cfddbee2d8aaa06110333090d8fdbefeb) ) - ROM_LOAD( "cy1-obj2.3s", 0x200000, 0x80000, CRC(d64ec4c3) SHA1(0bed1cafc21ed8cef3850fb81e30076977086eb0) ) - ROM_LOAD( "cy1-obj6.2s", 0x280000, 0x80000, CRC(7748b485) SHA1(adb4da419a6cdbefd0fef182d866a3479be379af) ) - ROM_LOAD( "cy1-obj3.3x", 0x300000, 0x80000, CRC(3d1f7168) SHA1(392dddcc79fe61dcc6514a91ac27b5e36825d8b7) ) - ROM_LOAD( "cy1-obj7.2x", 0x380000, 0x80000, CRC(b6eb6ad2) SHA1(85a660c5e44012491be7d4e783cce6ba12c135cb) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) - ROM_LOAD16_BYTE( "cy1-data-u.3a", 0x000000, 0x80000, CRC(570da15d) SHA1(9ebe756f10756c079a92fb522332e9e52ff715c3) ) - ROM_LOAD16_BYTE( "cy1-data-l.1a", 0x000001, 0x80000, CRC(9cf96f9e) SHA1(91783f48b93e03c778c6641ca8fb419c13b0d3c5) ) - - ROM_REGION16_BE( 0x100000, "edata", 0 ) - ROM_LOAD16_BYTE( "cy1-edata0-u.3b", 0x000000, 0x80000, CRC(77452533) SHA1(48fc199bcc1beb23c714eebd9b09b153c980170b) ) - ROM_LOAD16_BYTE( "cy1-edata0-l.1b", 0x000001, 0x80000, CRC(e812e290) SHA1(719e0a026ae8ef63d0d0269b67669ea9b4d950dd) ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "cy1-poi-h1.2f", 0x000001, 0x80000, CRC(eaf8bac3) SHA1(7a2caf6672af158b4a23ce4626342d1f17d1a4e4) ) /* most significant */ - ROM_LOAD32_BYTE( "cy1-poi-lu1.2k", 0x000002, 0x80000, CRC(c544a8dc) SHA1(4cce5f2ab3519b4aa7edbdd15b2d79a7fdcade3c) ) - ROM_LOAD32_BYTE( "cy1-poi-ll1.2n", 0x000003, 0x80000, CRC(30acb99b) SHA1(a28dcb3e5405f166644f6353a903c1143ee268f1) ) /* least significant */ - ROM_LOAD32_BYTE( "cy1-poi-h2.2j", 0x200001, 0x80000, CRC(4079f342) SHA1(fa36aed1abbda54a42f29b183007474580870319) ) - ROM_LOAD32_BYTE( "cy1-poi-lu2.2l", 0x200002, 0x80000, CRC(61d816d4) SHA1(7991957b910d32530151abc7f469fcf1de62d8f3) ) - ROM_LOAD32_BYTE( "cy1-poi-ll2.2p", 0x200003, 0x80000, CRC(faf09158) SHA1(b56ebed6012362b1d599c396a43e90a1e4d9dc38) ) - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("cy1-voi0.12b", 0x000000, 0x80000,CRC(99d7ce46) SHA1(b75f4055c3ce847daabfacda22df14e3f80c4fb9) ) - ROM_LOAD("cy1-voi1.12c", 0x080000, 0x80000,CRC(2b335f06) SHA1(2b2cd407c34388b56496f84a414daa153780b098) ) - ROM_LOAD("cy1-voi2.12d", 0x100000, 0x80000,CRC(10cd15f0) SHA1(9b721654ed97a13287373c1b2854ac9aeddc271f) ) - ROM_LOAD("cy1-voi3.12e", 0x180000, 0x80000,CRC(c902b4a4) SHA1(816357ec1a02a7ebf817ac1182e9c50ce5ca71f6) ) - - ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ - ROM_LOAD( "cybsledj.nv", 0x0000, 0x2000, CRC(a73bb03e) SHA1(e074bfeae14178c867070e06f6690ed13115f5fa) ) -ROM_END - - -void namcos21_state::init(int game_type) -{ - m_gametype = game_type; - m_pointram = std::make_unique<uint8_t[]>(PTRAM_SIZE); - init_dsp(); - m_mbNeedsKickstart = 20; - if( game_type==NAMCOS21_CYBERSLED ) - { - m_mbNeedsKickstart = 200; - } -} - void namcos21_state::init_winrun() { - uint16_t *pMem = (uint16_t *)memregion("dsp")->base(); - int pc = 0; - pMem[pc++] = 0xff80; /* b */ - pMem[pc++] = 0; - - m_winrun_dspcomram = std::make_unique<uint16_t[]>(0x1000*2); - - m_gametype = NAMCOS21_WINRUN91; - m_pointram = std::make_unique<uint8_t[]>(PTRAM_SIZE); - m_pointram_idx = 0; - m_mbNeedsKickstart = 0; -} - -void namcos21_state::init_aircomb() -{ - init(NAMCOS21_AIRCOMBAT); -} - -void namcos21_state::init_starblad() -{ - init(NAMCOS21_STARBLADE); -} - - -void namcos21_state::init_cybsled() -{ - init(NAMCOS21_CYBERSLED); -} - -void namcos21_state::init_solvalou() -{ - uint16_t *mem = (uint16_t *)memregion("maincpu")->base(); - mem[0x20ce4/2+1] = 0x0000; // $200128 - mem[0x20cf4/2+0] = 0x4e71; // 2nd ptr_booting - mem[0x20cf4/2+1] = 0x4e71; - mem[0x20cf4/2+2] = 0x4e71; - - init(NAMCOS21_SOLVALOU ); -} - -void namcos21_state::init_driveyes() -{ - uint16_t *pMem = (uint16_t *)memregion("dsp")->base(); - int pc = 0; - pMem[pc++] = 0xff80; /* b */ - pMem[pc++] = 0; - m_winrun_dspcomram = std::make_unique<uint16_t[]>(0x1000*2); - m_gametype = NAMCOS21_DRIVERS_EYES; - m_pointram = std::make_unique<uint8_t[]>(PTRAM_SIZE); - m_pointram_idx = 0; - m_mbNeedsKickstart = 0; + m_gpu_videoram = std::make_unique<uint8_t[]>(0x80000); + m_gpu_maskram = std::make_unique<uint8_t[]>(0x80000); } /* YEAR NAME PARENT MACHINE INPUT CLASS INIT MONITOR COMPANY FULLNAME FLAGS */ @@ -2961,17 +1087,3 @@ GAME( 1988, winrun, 0, winrun, winrun, namcos21_state, init_winr GAME( 1989, winrungp, 0, winrun, winrungp, namcos21_state, init_winrun, ROT0, "Namco", "Winning Run Suzuka Grand Prix (Japan) (89/12/03, Ver.02)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // Sub Ver.02, 1989, Graphic Ver.02 89/12/03, Sound Ver.0000 // Available on a size/cost reduced 2 PCB set with 'Namco System 21B' printed on each board, still C65 I/O MCU, appears to be functionally identical to original NS21 GAME( 1991, winrun91, 0, winrun, winrungp, namcos21_state, init_winrun, ROT0, "Namco", "Winning Run '91 (Japan) (1991/03/05, Main Ver 1.0, Sub Ver 1.0)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) - -// 3 PCB stacks in a single cage (3x 4 PCBs) linked for 3 screen panorama, boards look similar to original Namco System 21 (not 21B) including TMS320C25 DSP, but use C68 I/O MCU and sprite chip instead of "68000 'GPU'" ? -GAME( 1992, driveyes, 0, driveyes, driveyes, namcos21_state, init_driveyes, ROT0, "Namco", "Driver's Eyes (Japan) (1992/01/10, Main Ver 2.1, Sub Ver 1.1)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN) - -// revised hardware, much more DSP power, similar to below but apparently uses TMS320C20 (no Namco part #?) instead of TMS320C25 (C67)? (verify this isn't just a miscommunication, it seems out of place) -GAME( 1991, starblad, 0, namcos21, starblad, namcos21_state, init_starblad, ROT0, "Namco", "Starblade (World)", MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1991, starbladj, starblad, namcos21, starblad, namcos21_state, init_starblad, ROT0, "Namco", "Starblade (Japan)", MACHINE_IMPERFECT_GRAPHICS ) - -// uses 5x TMS320C25 (C67, has internal ROM - dumped) but otherwise same as above? -GAME( 1991, solvalou, 0, namcos21, s21default, namcos21_state, init_solvalou, ROT0, "Namco", "Solvalou (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1992, aircomb, 0, namcos21, aircomb, namcos21_state, init_aircomb, ROT0, "Namco", "Air Combat (US)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // There's code for a SCI, is it even possible to play multiplayer? -GAME( 1992, aircombj, aircomb, namcos21, aircomb, namcos21_state, init_aircomb, ROT0, "Namco", "Air Combat (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1993, cybsled, 0, namcos21, cybsled, namcos21_state, init_cybsled, ROT0, "Namco", "Cyber Sled (World)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN | MACHINE_NOT_WORKING ) -GAME( 1993, cybsledj, cybsled, namcos21, cybsled, namcos21_state, init_cybsled, ROT0, "Namco", "Cyber Sled (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN | MACHINE_NOT_WORKING ) diff --git a/src/mame/drivers/namcos21_c67.cpp b/src/mame/drivers/namcos21_c67.cpp new file mode 100644 index 00000000000..49eaf55274e --- /dev/null +++ b/src/mame/drivers/namcos21_c67.cpp @@ -0,0 +1,1260 @@ +// license:BSD-3-Clause +// copyright-holders:Phil Stroffolino +/* + NOTES: + + Air Combat: + priority issues + +TODO: namcoic.c: in StarBlade, the sprite list is stored at a different location during startup tests. + What register controls this? + +TODO: Map lamps/vibration outputs as used by StarBlade (and possibly other titles). + These likely involve the MCU. + +--------------------------------------------------------------------------- + +DSP RAM is shared with the 68000 CPUs and master DSP. +The memory map below reflects DSP RAM as seen by the 68000 CPUs. + + 0x200000: ROM: + 0x200010: RAM: + 0x200020: PTR: + 0x200024: <checksum> + 0x200028: <checksum> + 0x200030: SMU: // "NO RESPONS" (DSP) + 0x200040: IDC: // "NO RESPONS" (DSP) + 0x200050: CPU: BOOTING..COMPLETE + 0x200060: DSP: + 0x200070: CRC: OK from cpu + 0x200080: CRC: from dsp + 0x200090: ID: + 0x2000a0: B-M: + 0x2000b0: P-M: + 0x2000c0: S-M: + 0x200100 status: 2=upload needed, 4=error (abort) + 0x200102 status + 0x200104 0x0002 + 0x200106 addr written by main cpu + 0x20010a point rom checksum (starblade expects 0xed53) + 0x20010c point rom checksum (starblade expects 0xd5df) + 0x20010e 1 : upload-code-to-dsp request trigger + 0x200110 status + 0x200112 status + 0x200114 master dsp code size + 0x200116 slave dsp code size + 0x200120 upload source1 addr hi + 0x200122 upload source1 addr lo + 0x200124 upload source2 addr hi + 0x200126 upload source2 addr lo + 0x200200 enable + 0x200202 status + 0x200206 work page select + 0x200208 0xa2c2 (air combat) + 0x208000..0x2080ff camera attributes for page#0 + 0x208200..0x208fff 3d object attribute display list for page#0 + 0x20c000..0x20c0ff camera attributes for page#1 + 0x20c200..0x20cfff 3d object attribute display list for page#1 + + Starblade Cybersled AirCombat22 Solvalou +[400]:= 00 0000 00 0000 00 0000 00 0000 +[402]:= 00 0011 00 0011 00 0011 00 0011 +[404]:= 00 0000 00 0000 00 0000 00 0000 +[406]:= 00 0000 00 0000 00 0000 00 0000 +[408]:= 10 1002 10 1000 10 1000 10 1000 +[40a]:= 02 0000 00 0000 00 0000 00 ffff +[40c]:= 00 1040 00 023a 00 1000 ff ffff +[40e]:= 00 0000 00 0000 00 0000 ff ffff +[410]:= 10 1034 02 0258 10 1000 ff ffff +[412]:= 40 0000 3a 0000 00 0000 ff ffff +[414]:= 00 1030 00 027a 00 1000 ff ffff +[416]:= 00 0000 00 0000 00 0000 ff ffff +[418]:= 10 1030 02 02a2 10 1000 ff ffff +[41a]:= 34 0000 58 0000 00 0000 ff ffff +[41c]:= 00 1030 00 02c2 00 1000 ff ffff +[41e]:= 00 0000 00 0000 00 0000 ff ffff +[420]:= 10 1030 02 02e6 10 1000 ff ffff + +--------------------------------------------------------------------------- + +Thanks to Aaron Giles for originally making sense of the Point ROM data. + +Point data in ROMS (signed 24 bit words) encodes the 3d primitives. + +The first part of the Point ROMs is an address table. + +Given an object index, this table provides an address into the second part of +the ROM. + +The second part of the ROM is a series of display lists. +This is a sequence of pointers to actual polygon data. There may be +more than one, and the list is terminated by $ffffff. + +The remainder of the ROM is a series of polygon data. The first word of each +entry is the length of the entry (in words, not counting the length word). + +The rest of the data in each entry is organized as follows: + +length (1 word) +quad index (1 word) - this increments with each entry +vertex count (1 word) - the number of vertices encoded +unknown value (1 word) - almost always 0; depth bias +vertex list (n x 3 words) +quad count (1 word) - the number of quads to draw +quad primitives (n x 5 words) - color code and four vertex indices + +----------------------------------------------------------------------- +Board 1 : DSP Board - 1st PCB. (Uppermost) +DSP : 1 x Master TMS320C25 (C67) 4 x Slave TMS320C25 (C67) each connected to a Namco Custom chip 342 +OSC: 40.000MHz +RAM: HM62832 x 2, M5M5189 x 4, ISSI IS61C68 x 16 +ROMS: TMS27C040 +Custom Chips: +4 x Namco Custom 327 (24 pin NDIP), each one located next to a chip 67. +4 x Namco Custom chip 342 (160 pin PQFP), there are 3 leds (red/green/yellow) connected to each 342 chip. (12 leds total) +2 x Namco Custom 197 (28 pin NDIP) +Namco Custom chip 317 IDC (180 pin PQFP) +Namco Custom chip 195 (160 pin PQFP) +----------------------------------------------------------------------- +Board 2 : Unknown Board - 2nd PCB (no roms) +OSC: 20.000MHz +RAM: HM62256 x 10, 84256 x 4, CY7C128 x 5, M5M5178 x 4 +OTHER Chips: +MB8422-90LP +L7A0565 316 (111) x 1 (100 PIN PQFP) +150 (64 PIN PQFP) +167 (128 PIN PQFP) +L7A0564 x 2 (100 PIN PQFP) +157 x 16 (24 PIN NDIP) +----------------------------------------------------------------------- +Board 3 : CPU Board - 3rd PCB (looks very similar to Namco System 2 CPU PCB) +CPU: MC68000P12 x 2 @ 12 MHz (16-bit) +Sound CPU: MC68B09EP (3 MHz) +Sound Chips: C140 24-channel PCM (Sound Effects), YM2151 (Music), YM3012 (?) +XTAL: 3.579545 MHz +OSC: 49.152 MHz +RAM: MB8464 x 2, MCM2018 x 2, HM65256 x 4, HM62256 x 2 + +Other Chips: +Sharp PC900 - Opto-isolator +Sharp PC910 - Opto-isolator +HN58C65P (EEPROM) +MB3771 +MB87077-SK x 2 (24 pin NDIP, located in sound section) +LB1760 (16 pin DIP, located next to SYS87B-2B) +CY7C132 (48 PIN DIP) + +Namco Custom: +148 x 2 (64 pin PQFP) +C68 (64 pin PQFP) +139 (64 pin PQFP) +137 (28 pin NDIP) +149 (28 pin NDIP, near C68) +----------------------------------------------------------------------- +Board 4 : 4th PCB (bottom-most) +OSC: 38.76922 MHz +There is a 6 wire plug joining this PCB with the CPU PCB. It appears to be video cable (RGB, Sync etc..) +Jumpers: +JP7 INTERLACE = SHORTED (Other setting is NON-INTERLACE) +JP8 68000 = SHORTED (Other setting is 68020) +Namco Custom Chips: +C355 (160 pin PQFP) +187 (120 pin PQFP) +138 (64 pin PQFP) +165 (28 pin NDIP) +----------------------------------------------------------------------- + +------------------- +Air Combat by NAMCO +------------------- +malcor + + +Location Device File ID Checksum +------------------------------------------------- +CPU68 1J 27C4001 MPR-L.AC1 9859 [ main program ] [ rev AC1 ] +CPU68 3J 27C4001 MPR-U.AC1 97F1 [ main program ] [ rev AC1 ] +CPU68 1J 27C4001 MPR-L.AC2 C778 [ main program ] [ rev AC2 ] +CPU68 3J 27C4001 MPR-U.AC2 6DD9 [ main program ] [ rev AC2 ] +CPU68 1C MB834000 EDATA1-L.AC1 7F77 [ data ] +CPU68 3C MB834000 EDATA1-U.AC1 FA2F [ data ] +CPU68 3A MB834000 EDATA-U.AC1 20F2 [ data ] +CPU68 1A MB834000 EDATA-L.AC1 9E8A [ data ] +CPU68 8J 27C010 SND0.AC1 71A8 [ sound prog ] +CPU68 12B MB834000 VOI0.AC1 08CF [ voice 0 ] +CPU68 12C MB834000 VOI1.AC1 925D [ voice 1 ] +CPU68 12D MB834000 VOI2.AC1 C498 [ voice 2 ] +CPU68 12E MB834000 VOI3.AC1 DE9F [ voice 3 ] +CPU68 4C 27C010 SPR-L.AC1 473B [ slave prog L ] [ rev AC1 ] +CPU68 6C 27C010 SPR-U.AC1 CA33 [ slave prog U ] [ rev AC1 ] +CPU68 4C 27C010 SPR-L.AC2 08CE [ slave prog L ] [ rev AC2 ] +CPU68 6C 27C010 SPR-U.AC2 A3F1 [ slave prog U ] [ rev AC2 ] +OBJ(B) 5S HN62344 OBJ0.AC1 CB72 [ object data ] +OBJ(B) 5X HN62344 OBJ1.AC1 85E2 [ object data ] +OBJ(B) 3S HN62344 OBJ2.AC1 89DC [ object data ] +OBJ(B) 3X HN62344 OBJ3.AC1 58FF [ object data ] +OBJ(B) 4S HN62344 OBJ4.AC1 46D6 [ object data ] +OBJ(B) 4X HN62344 OBJ5.AC1 7B91 [ object data ] +OBJ(B) 2S HN62344 OBJ6.AC1 5736 [ object data ] +OBJ(B) 2X HN62344 OBJ7.AC1 6D45 [ object data ] +OBJ(B) 17N PLHS18P8 3P0BJ3 4342 +OBJ(B) 17N PLHS18P8 3POBJ4 1143 +DSP 2N HN62344 AC1-POIL.L 8AAF [ DSP data ] +DSP 2K HN62344 AC1-POIL.L CF90 [ DSP data ] +DSP 2E HN62344 AC1-POIH 4D02 [ DSP data ] +DSP 17D GAL16V8A 3PDSP5 6C00 + +NOTE: CPU68 - CPU board 2252961002 (2252971002) + OBJ(B) - Object board 8623961803 (8623963803) + DSP - DSP board 8623961703 (8623963703) + PGN(C) - PGN board 2252961300 (8623963600) + + Namco System 21 Hardware + + ROMs that have the same locations are different revisions + of the same ROMs (AC1 or AC2). + +Jumper settings: + +Location Position set alt. setting +---------------------------------------- + +CPU68 PCB: + + JP2 /D-ST /VBL + JP3 + +***************************** + +Namco System 21 Video Hardware + +- sprite hardware is identical to Namco System NB1 +- there are no tilemaps +- 3d graphics are managed by DSP processors + + Palette: + 0x0000..0x1fff sprite palettes (0x10 sets of 0x100 colors) + + 0x2000..0x3fff polygon palette bank0 (0x10 sets of 0x200 colors) + (in starblade, some palette animation effects are performed here) + + 0x4000..0x5fff polygon palette bank1 (0x10 sets of 0x200 colors) + + 0x6000..0x7fff polygon palette bank2 (0x10 sets of 0x200 colors) + + The polygon-dedicated color sets within a bank typically increase in + intensity from very dark to full intensity. + + Probably the selected palette is determined by most significant bits of z-code. + This is not yet hooked up. + +*/ + +#include "emu.h" +#include "screen.h" +#include "emupal.h" +#include "speaker.h" +#include "cpu/m68000/m68000.h" +#include "cpu/m6805/m6805.h" +#include "cpu/m6809/m6809.h" +#include "machine/nvram.h" +#include "machine/namcoio_gearbox.h" +#include "machine/timer.h" +#include "machine/namco_c139.h" +#include "machine/namco_c148.h" +#include "machine/namco68.h" +#include "machine/namco_c67.h" +#include "machine/namcos21_dsp_c67.h" +#include "video/namco_c355spr.h" +#include "video/namcos21_3d.h" +#include "sound/c140.h" +#include "sound/ym2151.h" +#include "emupal.h" + +// TODO: basic parameters to get 60.606060 Hz, x2 is for interlace +#define MCFG_SCREEN_RAW_PARAMS_NAMCO480I \ + MCFG_SCREEN_RAW_PARAMS(12288000*2, 768, 0, 496, 264*2,0,480) + +#define ENABLE_LOGGING 0 + +#define NAMCOS21_NUM_COLORS 0x8000 + +class namcos21_c67_state : public driver_device +{ +public: + namcos21_c67_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_audiocpu(*this, "audiocpu"), + m_slave(*this, "slave"), + m_c68(*this, "c68mcu"), + m_sci(*this, "sci"), + m_master_intc(*this, "master_intc"), + m_slave_intc(*this, "slave_intc"), + m_c140(*this, "c140"), + m_c355spr(*this, "c355spr"), + m_palette(*this, "palette"), + m_screen(*this, "screen"), + m_audiobank(*this, "audiobank"), + m_dpram(*this, "dpram"), + m_namcos21_3d(*this, "namcos21_3d"), + m_namcos21_dsp_c67(*this, "namcos21dsp_c67") + { } + + void configure_c148_standard(machine_config &config); + void namcos21(machine_config &config); + void cybsled(machine_config &config); + void solvalou(machine_config &config); + void aircomb(machine_config &config); + void starblad(machine_config &config); + + void init_solvalou(); + +private: + required_device<cpu_device> m_maincpu; + required_device<cpu_device> m_audiocpu; + required_device<cpu_device> m_slave; + required_device<namcoc68_device> m_c68; + required_device<namco_c139_device> m_sci; + required_device<namco_c148_device> m_master_intc; + required_device<namco_c148_device> m_slave_intc; + required_device<c140_device> m_c140; + required_device<namco_c355spr_device> m_c355spr; + required_device<palette_device> m_palette; + required_device<screen_device> m_screen; + required_memory_bank m_audiobank; + required_shared_ptr<uint8_t> m_dpram; + required_device<namcos21_3d_device> m_namcos21_3d; + required_device<namcos21_dsp_c67_device> m_namcos21_dsp_c67; + + uint16_t m_video_enable; + + DECLARE_READ16_MEMBER(video_enable_r); + DECLARE_WRITE16_MEMBER(video_enable_w); + + DECLARE_READ16_MEMBER(dpram_word_r); + DECLARE_WRITE16_MEMBER(dpram_word_w); + DECLARE_READ8_MEMBER(dpram_byte_r); + DECLARE_WRITE8_MEMBER(dpram_byte_w); + + DECLARE_WRITE8_MEMBER(eeprom_w); + DECLARE_READ8_MEMBER(eeprom_r); + + DECLARE_WRITE8_MEMBER(sound_bankselect_w); + + DECLARE_WRITE8_MEMBER(sound_reset_w); + DECLARE_WRITE8_MEMBER(system_reset_w); + void reset_all_subcpus(int state); + + std::unique_ptr<uint8_t[]> m_eeprom; + + TIMER_DEVICE_CALLBACK_MEMBER(screen_scanline); + + DECLARE_WRITE_LINE_MEMBER(yield_hack); + + virtual void machine_start() override; + virtual void machine_reset() override; + + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + void configure_c68_namcos21(machine_config &config); + + void common_map(address_map &map); + void master_map(address_map &map); + void slave_map(address_map &map); + + void sound_map(address_map &map); +}; + + +uint32_t namcos21_c67_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + //uint8_t *videoram = m_gpu_videoram.get(); + int pivot = 3; + int pri; + bitmap.fill(0xff, cliprect ); + + m_c355spr->draw(screen, bitmap, cliprect, 2 ); + + m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe); + + m_c355spr->draw(screen, bitmap, cliprect, 0 ); + m_c355spr->draw(screen, bitmap, cliprect, 1 ); + + m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf); + + /* draw high priority 2d sprites */ + for( pri=pivot; pri<8; pri++ ) + { + m_c355spr->draw(screen, bitmap, cliprect, pri ); + } + return 0; +} + +READ16_MEMBER(namcos21_c67_state::video_enable_r) +{ + return m_video_enable; +} + +WRITE16_MEMBER(namcos21_c67_state::video_enable_w) +{ + COMBINE_DATA( &m_video_enable ); /* 0x40 = enable */ + if( m_video_enable!=0 && m_video_enable!=0x40 ) + { + logerror( "unexpected video_enable_w=0x%x\n", m_video_enable ); + } +} + +/***********************************************************/ + +/* dual port ram memory handlers */ + +READ16_MEMBER(namcos21_c67_state::dpram_word_r) +{ + return m_dpram[offset]; +} + +WRITE16_MEMBER(namcos21_c67_state::dpram_word_w) +{ + if( ACCESSING_BITS_0_7 ) + { + m_dpram[offset] = data&0xff; + } +} + +READ8_MEMBER(namcos21_c67_state::dpram_byte_r) +{ + return m_dpram[offset]; +} + +WRITE8_MEMBER(namcos21_c67_state::dpram_byte_w) +{ + m_dpram[offset] = data; +} + +/******************************************************************************/ + +/*************************************************************/ +/* MASTER 68000 CPU Memory declarations */ +/*************************************************************/ + +void namcos21_c67_state::common_map(address_map &map) +{ + map(0x280000, 0x280001).nopw(); /* written once on startup */ + map(0x400000, 0x400001).w(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::pointram_control_w)); + map(0x440000, 0x440001).rw(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::pointram_data_r), FUNC(namcos21_dsp_c67_device::pointram_data_w)); + map(0x440002, 0x47ffff).nopw(); /* (?) Air Combat */ + map(0x480000, 0x4807ff).rw(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::namcos21_depthcue_r), FUNC(namcos21_dsp_c67_device::namcos21_depthcue_w)); /* Air Combat */ + map(0x700000, 0x71ffff).rw(m_c355spr, FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)); + map(0x720000, 0x720007).rw(m_c355spr, FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); + map(0x740000, 0x74ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); + map(0x750000, 0x75ffff).ram().w(m_palette, FUNC(palette_device::write16_ext)).share("palette_ext"); + map(0x760000, 0x760001).rw(FUNC(namcos21_c67_state::video_enable_r), FUNC(namcos21_c67_state::video_enable_w)); + map(0x800000, 0x8fffff).rom().region("data", 0); + map(0x900000, 0x90ffff).ram().share("sharedram"); + map(0xa00000, 0xa00fff).rw(FUNC(namcos21_c67_state::dpram_word_r), FUNC(namcos21_c67_state::dpram_word_w)); + map(0xb00000, 0xb03fff).rw(m_sci, FUNC(namco_c139_device::ram_r), FUNC(namco_c139_device::ram_w)); + map(0xb80000, 0xb8000f).m(m_sci, FUNC(namco_c139_device::regs_map)); + map(0xc00000, 0xcfffff).rom().mirror(0x100000).region("edata", 0); +} + +void namcos21_c67_state::master_map(address_map &map) +{ + common_map(map); + map(0x000000, 0x0fffff).rom(); + map(0x100000, 0x10ffff).ram(); /* private work RAM */ + map(0x180000, 0x183fff).rw(FUNC(namcos21_c67_state::eeprom_r), FUNC(namcos21_c67_state::eeprom_w)).umask16(0x00ff); + map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); + map(0x200000, 0x20ffff).rw(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_hack_w)); +} + +void namcos21_c67_state::slave_map(address_map &map) +{ + common_map(map); + map(0x000000, 0x07ffff).rom(); + map(0x100000, 0x13ffff).ram(); /* private work RAM */ + map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); + map(0x200000, 0x20ffff).rw(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_w)); +} + +/*************************************************************/ +/* SOUND 6809 CPU Memory declarations */ +/*************************************************************/ + +void namcos21_c67_state::sound_map(address_map &map) +{ + map(0x0000, 0x3fff).bankr("audiobank"); /* banked */ + map(0x3000, 0x3003).nopw(); /* ? */ + map(0x4000, 0x4001).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)); + map(0x5000, 0x6fff).rw(m_c140, FUNC(c140_device::c140_r), FUNC(c140_device::c140_w)); + map(0x7000, 0x77ff).rw(FUNC(namcos21_c67_state::dpram_byte_r), FUNC(namcos21_c67_state::dpram_byte_w)).share("dpram"); + map(0x7800, 0x7fff).rw(FUNC(namcos21_c67_state::dpram_byte_r), FUNC(namcos21_c67_state::dpram_byte_w)); /* mirror */ + map(0x8000, 0x9fff).ram(); + map(0xa000, 0xbfff).nopw(); /* amplifier enable on 1st write */ + map(0xc000, 0xffff).nopw(); /* avoid debug log noise; games write frequently to 0xe000 */ + map(0xc000, 0xc001).w(FUNC(namcos21_c67_state::sound_bankselect_w)); + map(0xd001, 0xd001).nopw(); /* watchdog */ + map(0xd000, 0xffff).rom().region("audiocpu", 0x01000); +} + +/*************************************************************/ +/* I/O HD63705 MCU Memory declarations */ +/*************************************************************/ + +void namcos21_c67_state::configure_c68_namcos21(machine_config &config) +{ + NAMCOC68(config, m_c68, 8000000); + m_c68->in_pb_callback().set_ioport("MCUB"); + m_c68->in_pc_callback().set_ioport("MCUC"); + m_c68->in_ph_callback().set_ioport("MCUH"); + m_c68->in_pdsw_callback().set_ioport("DSW"); + m_c68->di0_in_cb().set_ioport("MCUDI0"); + m_c68->di1_in_cb().set_ioport("MCUDI1"); + m_c68->di2_in_cb().set_ioport("MCUDI2"); + m_c68->di3_in_cb().set_ioport("MCUDI3"); + m_c68->an0_in_cb().set_ioport("AN0"); + m_c68->an1_in_cb().set_ioport("AN1"); + m_c68->an2_in_cb().set_ioport("AN2"); + m_c68->an3_in_cb().set_ioport("AN3"); + m_c68->an4_in_cb().set_ioport("AN4"); + m_c68->an5_in_cb().set_ioport("AN5"); + m_c68->an6_in_cb().set_ioport("AN6"); + m_c68->an7_in_cb().set_ioport("AN7"); + m_c68->dp_in_callback().set(FUNC(namcos21_c67_state::dpram_byte_r)); + m_c68->dp_out_callback().set(FUNC(namcos21_c67_state::dpram_byte_w)); +} + +/*************************************************************/ +/* */ +/* NAMCO SYSTEM 21 INPUT PORTS */ +/* */ +/*************************************************************/ + +static INPUT_PORTS_START( s21default ) + PORT_START("MCUB") /* 63B05Z0 - PORT B */ + PORT_BIT( 0x3f, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 ) + + PORT_START("MCUC") /* 63B05Z0 - PORT C & SCI */ + PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service Button") PORT_CODE(KEYCODE_0) PORT_TOGGLE // alt test mode switch + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) + + PORT_START("AN0") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("AN1") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x60,0x9f) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) + PORT_START("AN2") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x60,0x9f) PORT_SENSITIVITY(20) PORT_KEYDELTA(10) + PORT_START("AN3") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("AN4") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("AN5") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("AN6") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("AN7") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("MCUH") /* 63B05Z0 - PORT H */ + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) + PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("DSW") /* 63B05Z0 - $2000 DIP SW */ + PORT_SERVICE( 0x01, IP_ACTIVE_LOW ) + PORT_DIPNAME( 0x02, 0x02, "DSW2") + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, "DSW3") + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, "DSW4") + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x10, 0x10, "DSW5") + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x00, "PCM ROM") + PORT_DIPSETTING( 0x20, "2M" ) + PORT_DIPSETTING( 0x00, "4M" ) + PORT_DIPNAME( 0x40, 0x40, "DSW7") + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, "Screen Stop") + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("MCUDI0") /* 63B05Z0 - $3000 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("MCUDI1") /* 63B05Z0 - $3001 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("MCUDI2") /* 63B05Z0 - $3002 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("MCUDI3") /* 63B05Z0 - $3003 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) +INPUT_PORTS_END + +// the default inc/dec analog keys have been chosen to map 'tank' style inputs found on Assault. +// this makes the game easier to use with the keyboard, providing a familiar left/right stick mapping +// ports are limited to 10/ef because otherwise, even when calibrated, the game will act as if the +// inputs wrap around when they hit the maximum, causing undesired movement +static INPUT_PORTS_START( cybsled ) + PORT_INCLUDE(s21default) + + PORT_MODIFY("AN0") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */ + PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_I) PORT_CODE_INC(KEYCODE_K) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: vertical */ + PORT_MODIFY("AN1") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ + PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_E) PORT_CODE_INC(KEYCODE_D) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: vertical */ + PORT_MODIFY("AN2") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ + PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_J) PORT_CODE_INC(KEYCODE_L) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: horizontal */ + PORT_MODIFY("AN3") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */ + PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_S) PORT_CODE_INC(KEYCODE_F) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: horizontal */ + PORT_MODIFY("AN4") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN5") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN6") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN7") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_MODIFY("MCUH") /* 63B05Z0 - PORT H */ + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Viewport Change Button") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Missile Button") + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Gun Button") + PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) +INPUT_PORTS_END + +static INPUT_PORTS_START( starblad ) + PORT_INCLUDE(s21default) + + PORT_MODIFY("AN1") /* IN#3: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) + PORT_MODIFY("AN2") /* IN#4: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(20) PORT_KEYDELTA(10) +INPUT_PORTS_END + +static INPUT_PORTS_START( aircomb ) + PORT_INCLUDE(s21default) + + PORT_MODIFY("AN0") /* IN#2: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN1") /* IN#3: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) + PORT_MODIFY("AN2") /* IN#4: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) + PORT_MODIFY("AN3") /* IN#5: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_REVERSE + PORT_MODIFY("AN4") /* IN#6: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN5") /* IN#7: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN6") /* IN#8: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN7") /* IN#9: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_MODIFY("DSW") /* 63B05Z0 - $2000 DIP SW */ + PORT_DIPNAME( 0x01, 0x01, "DSW1") // not test mode on this game + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_MODIFY("MCUH") /* IN#10: 63B05Z0 - PORT H */ + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON6 ) ///??? + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) // prev color + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) // ???next color + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) + PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) +INPUT_PORTS_END + + +static const gfx_layout tile_layout = +{ + 16,16, + RGN_FRAC(1,4), /* number of tiles */ + 8, /* bits per pixel */ + { /* plane offsets */ + 0,1,2,3,4,5,6,7 + }, + { /* x offsets */ + 0*8,RGN_FRAC(1,4)+0*8,RGN_FRAC(2,4)+0*8,RGN_FRAC(3,4)+0*8, + 1*8,RGN_FRAC(1,4)+1*8,RGN_FRAC(2,4)+1*8,RGN_FRAC(3,4)+1*8, + 2*8,RGN_FRAC(1,4)+2*8,RGN_FRAC(2,4)+2*8,RGN_FRAC(3,4)+2*8, + 3*8,RGN_FRAC(1,4)+3*8,RGN_FRAC(2,4)+3*8,RGN_FRAC(3,4)+3*8 + }, + { /* y offsets */ + 0*32,1*32,2*32,3*32, + 4*32,5*32,6*32,7*32, + 8*32,9*32,10*32,11*32, + 12*32,13*32,14*32,15*32 + }, + 8*64 /* sprite offset */ +}; + +static GFXDECODE_START( gfx_namcos21 ) + GFXDECODE_ENTRY( "gfx1", 0x000000, tile_layout, 0x1000, 0x10 ) +GFXDECODE_END + + +WRITE8_MEMBER( namcos21_c67_state::sound_bankselect_w ) +{ + m_audiobank->set_entry(data>>4); +} + + +WRITE8_MEMBER(namcos21_c67_state::sound_reset_w) +{ + if (data & 0x01) + { + /* Resume execution */ + m_audiocpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); + m_maincpu->yield(); + } + else + { + /* Suspend execution */ + m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); + } + + if (data & 0x04) + { + m_namcos21_dsp_c67->reset_kickstart(); + } +} + +WRITE8_MEMBER(namcos21_c67_state::system_reset_w) +{ + reset_all_subcpus(data & 1 ? CLEAR_LINE : ASSERT_LINE); + + if (data & 0x01) + m_maincpu->yield(); +} + +void namcos21_c67_state::reset_all_subcpus(int state) +{ + m_slave->set_input_line(INPUT_LINE_RESET, state); + m_c68->ext_reset(state); + m_namcos21_dsp_c67->reset_dsps(state); +} + +WRITE8_MEMBER(namcos21_c67_state::eeprom_w) +{ + m_eeprom[offset] = data; +} + +READ8_MEMBER(namcos21_c67_state::eeprom_r) +{ + return m_eeprom[offset]; +} + +void namcos21_c67_state::machine_reset() +{ + /* Initialise the bank select in the sound CPU */ + m_audiobank->set_entry(0); /* Page in bank 0 */ + + m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE ); + + /* Place CPU2 & CPU3 into the reset condition */ + reset_all_subcpus(ASSERT_LINE); +} + + + +void namcos21_c67_state::machine_start() +{ + m_eeprom = std::make_unique<uint8_t[]>(0x2000); + subdevice<nvram_device>("nvram")->set_base(m_eeprom.get(), 0x2000); + + uint32_t max = memregion("audiocpu")->bytes() / 0x4000; + for (int i = 0; i < 0x10; i++) + m_audiobank->configure_entry(i, memregion("audiocpu")->base() + (i % max) * 0x4000); + +} + +TIMER_DEVICE_CALLBACK_MEMBER(namcos21_c67_state::screen_scanline) +{ + int scanline = param; +// int cur_posirq = get_posirq_scanline()*2; + + if(scanline == 240*2) + { + m_master_intc->vblank_irq_trigger(); + m_slave_intc->vblank_irq_trigger(); + m_c68->ext_interrupt(ASSERT_LINE); + } +} + +void namcos21_c67_state::configure_c148_standard(machine_config &config) +{ + NAMCO_C148(config, m_master_intc, 0, m_maincpu, true); + m_master_intc->link_c148_device(m_slave_intc); + m_master_intc->out_ext1_callback().set(FUNC(namcos21_c67_state::sound_reset_w)); + m_master_intc->out_ext2_callback().set(FUNC(namcos21_c67_state::system_reset_w)); + + NAMCO_C148(config, m_slave_intc, 0, m_slave, false); + m_slave_intc->link_c148_device(m_master_intc); +} + +// starblad, solvalou, aircomb, cybsled base state +MACHINE_CONFIG_START(namcos21_c67_state::namcos21) + MCFG_DEVICE_ADD("maincpu", M68000,12288000) /* Master */ + MCFG_DEVICE_PROGRAM_MAP(master_map) + MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_c67_state, screen_scanline, "screen", 0, 1) + + MCFG_DEVICE_ADD("slave", M68000,12288000) /* Slave */ + MCFG_DEVICE_PROGRAM_MAP(slave_map) + + MCFG_DEVICE_ADD("audiocpu", MC6809E, 3072000) /* Sound */ + MCFG_DEVICE_PROGRAM_MAP(sound_map) + MCFG_DEVICE_PERIODIC_INT_DRIVER(namcos21_c67_state, irq0_line_hold, 2*60) + MCFG_DEVICE_PERIODIC_INT_DRIVER(namcos21_c67_state, irq1_line_hold, 120) + + configure_c68_namcos21(config); + + NAMCOS21_DSP_C67(config, m_namcos21_dsp_c67, 0); + m_namcos21_dsp_c67->set_renderer_tag("namcos21_3d"); + + MCFG_QUANTUM_TIME(attotime::from_hz(12000)) + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); + + MCFG_SCREEN_ADD("screen", RASTER) + MCFG_SCREEN_RAW_PARAMS_NAMCO480I + MCFG_SCREEN_UPDATE_DRIVER(namcos21_c67_state, screen_update) + MCFG_SCREEN_PALETTE("palette") + + NAMCOS21_3D(config, m_namcos21_3d, 0); + m_namcos21_3d->set_zz_shift_mult(11, 0x200); + m_namcos21_3d->set_depth_reverse(false); + m_namcos21_3d->set_framebuffer_size(496,480); + + configure_c148_standard(config); + NAMCO_C139(config, m_sci, 0); + + MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos21) + MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS) + MCFG_PALETTE_FORMAT(XBRG) + + NAMCO_C355SPR(config, m_c355spr, 0); + m_c355spr->set_screen(m_screen); + m_c355spr->set_gfxdecode_tag("gfxdecode"); + m_c355spr->set_is_namcofl(false); + m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); + m_c355spr->set_palxor(0xf); // reverse mapping + m_c355spr->set_gfxregion(0); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + C140(config, m_c140, 8000000/374); + m_c140->set_bank_type(c140_device::C140_TYPE::SYSTEM21); + m_c140->add_route(0, "lspeaker", 0.50); + m_c140->add_route(1, "rspeaker", 0.50); + + MCFG_DEVICE_ADD("ymsnd", YM2151, 3579580) + MCFG_SOUND_ROUTE(0, "lspeaker", 0.30) + MCFG_SOUND_ROUTE(1, "rspeaker", 0.30) +MACHINE_CONFIG_END + +MACHINE_CONFIG_START(namcos21_c67_state::aircomb) + namcos21(config); + m_namcos21_dsp_c67->set_gametype(namcos21_dsp_c67_device::NAMCOS21_AIRCOMBAT); +MACHINE_CONFIG_END + +MACHINE_CONFIG_START(namcos21_c67_state::starblad) + namcos21(config); + m_namcos21_dsp_c67->set_gametype(namcos21_dsp_c67_device::NAMCOS21_STARBLADE); +MACHINE_CONFIG_END + +MACHINE_CONFIG_START(namcos21_c67_state::cybsled) + namcos21(config); + m_namcos21_dsp_c67->set_gametype(namcos21_dsp_c67_device::NAMCOS21_CYBERSLED); +MACHINE_CONFIG_END + +WRITE_LINE_MEMBER(namcos21_c67_state::yield_hack) +{ + m_maincpu->yield(); +} + +MACHINE_CONFIG_START(namcos21_c67_state::solvalou) + namcos21(config); + m_namcos21_dsp_c67->set_gametype(namcos21_dsp_c67_device::NAMCOS21_SOLVALOU); + m_namcos21_dsp_c67->yield_hack_callback().set(FUNC(namcos21_c67_state::yield_hack)); // VCK function +MACHINE_CONFIG_END + + +ROM_START( starblad ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "st2_mpu.mpru", 0x000000, 0x80000, CRC(35bc9e4a) SHA1(03401fb846c1b2aee775071a554654e49fe5c47c) ) + ROM_LOAD16_BYTE( "st2_mpl.mprl", 0x000001, 0x80000, CRC(193e641b) SHA1(fed803167c5b0bba5b8381c26c909b7380d57efd) ) + + ROM_REGION( 0x080000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "st1-sp-u.bin", 0x000000, 0x40000, CRC(9f9a55db) SHA1(72bf5d6908cc57cc490fa2292b4993d796b2974d) ) + ROM_LOAD16_BYTE( "st1-sp-l.bin", 0x000001, 0x40000, CRC(acbe39c7) SHA1(ca48b7ea619b1caaf590eed33001826ce7ef36d8) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "st1-snd0.bin", 0x000000, 0x020000, CRC(c0e934a3) SHA1(678ed6705c6f494d7ecb801a4ef1b123b80979a5) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x200000, "gfx1", 0 ) /* sprites */ + ROM_LOAD( "st1-obj0.bin", 0x000000, 0x80000, CRC(5d42c71e) SHA1(f1aa2bb31bbbcdcac8e94334b1c78238cac1a0e7) ) + ROM_LOAD( "st1-obj1.bin", 0x080000, 0x80000, CRC(c98011ad) SHA1(bc34c21428e0ef5887051c0eb0fdef5397823a82) ) + ROM_LOAD( "st1-obj2.bin", 0x100000, 0x80000, CRC(6cf5b608) SHA1(c8537fbe97677c4c8a365b1cf86c4645db7a7d6b) ) + ROM_LOAD( "st1-obj3.bin", 0x180000, 0x80000, CRC(cdc195bb) SHA1(91443917a6982c286b6f15381d441d061aefb138) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) + ROM_LOAD16_BYTE( "st1-data-u.bin", 0x000000, 0x20000, CRC(2433e911) SHA1(95f5f00d3bacda4996e055a443311fb9f9a5fe2f) ) + ROM_LOAD16_BYTE( "st1-data-l.bin", 0x000001, 0x20000, CRC(4a2cc252) SHA1(d9da9992bac878f8a1f5e84cc3c6d457b4705e8f) ) + + ROM_REGION16_BE( 0x100000, "edata", ROMREGION_ERASEFF ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "st1-pt0-h.bin", 0x000001, 0x80000, CRC(84eb355f) SHA1(89a248b8be2e0afcee29ba4c4c9cca65d5fb246a) ) + ROM_LOAD32_BYTE( "st1-pt0-u.bin", 0x000002, 0x80000, CRC(1956cd0a) SHA1(7d21b3a59f742694de472c545a1f30c3d92e3390) ) + ROM_LOAD32_BYTE( "st1-pt0-l.bin", 0x000003, 0x80000, CRC(ff577049) SHA1(1e1595174094e88d5788753d05ce296c1f7eca75) ) + ROM_LOAD32_BYTE( "st1-pt1-h.bin", 0x200001, 0x80000, CRC(96b1bd7d) SHA1(55da7896dda2aa4c35501a55c8605a065b02aa17) ) + ROM_LOAD32_BYTE( "st1-pt1-u.bin", 0x200002, 0x80000, CRC(ecf21047) SHA1(ddb13f5a2e7d192f0662fa420b49f89e1e991e66) ) + ROM_LOAD32_BYTE( "st1-pt1-l.bin", 0x200003, 0x80000, CRC(01cb0407) SHA1(4b58860bbc353de8b4b8e83d12b919d9386846e8) ) + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("st1-voi0.bin", 0x000000, 0x80000,CRC(5b3d43a9) SHA1(cdc04f19dc91dca9fa88ba0c2fca72aa195a3694) ) + ROM_LOAD("st1-voi1.bin", 0x080000, 0x80000,CRC(413e6181) SHA1(e827ec11f5755606affd2635718512aeac9354da) ) + ROM_LOAD("st1-voi2.bin", 0x100000, 0x80000,CRC(067d0720) SHA1(a853b2d43027a46c5e707fc677afdaae00f450c7) ) + ROM_LOAD("st1-voi3.bin", 0x180000, 0x80000,CRC(8b5aa45f) SHA1(e1214e639200758ad2045bde0368a2d500c1b84a) ) + + ROM_REGION( 0x2000, "nvram", ROMREGION_ERASE00) + // starblad needs default NVRAM to be all 0 +ROM_END + +ROM_START( starbladj ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "st1_mpu.mpru", 0x000000, 0x80000, CRC(483a311c) SHA1(dd9416b8d4b0f8b361630e312eac71c113064eae) ) + ROM_LOAD16_BYTE( "st1_mpl.mprl", 0x000001, 0x80000, CRC(0a4dd661) SHA1(fc2b71a255a8613693c4d1c79ddd57a6d396165a) ) + + ROM_REGION( 0x080000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "st1-sp-u.bin", 0x000000, 0x40000, CRC(9f9a55db) SHA1(72bf5d6908cc57cc490fa2292b4993d796b2974d) ) + ROM_LOAD16_BYTE( "st1-sp-l.bin", 0x000001, 0x40000, CRC(acbe39c7) SHA1(ca48b7ea619b1caaf590eed33001826ce7ef36d8) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "st1-snd0.bin", 0x000000, 0x020000, CRC(c0e934a3) SHA1(678ed6705c6f494d7ecb801a4ef1b123b80979a5) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x200000, "gfx1", 0 ) /* sprites */ + ROM_LOAD( "st1-obj0.bin", 0x000000, 0x80000, CRC(5d42c71e) SHA1(f1aa2bb31bbbcdcac8e94334b1c78238cac1a0e7) ) + ROM_LOAD( "st1-obj1.bin", 0x080000, 0x80000, CRC(c98011ad) SHA1(bc34c21428e0ef5887051c0eb0fdef5397823a82) ) + ROM_LOAD( "st1-obj2.bin", 0x100000, 0x80000, CRC(6cf5b608) SHA1(c8537fbe97677c4c8a365b1cf86c4645db7a7d6b) ) + ROM_LOAD( "st1-obj3.bin", 0x180000, 0x80000, CRC(cdc195bb) SHA1(91443917a6982c286b6f15381d441d061aefb138) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) + ROM_LOAD16_BYTE( "st1-data-u.bin", 0x000000, 0x20000, CRC(2433e911) SHA1(95f5f00d3bacda4996e055a443311fb9f9a5fe2f) ) + ROM_LOAD16_BYTE( "st1-data-l.bin", 0x000001, 0x20000, CRC(4a2cc252) SHA1(d9da9992bac878f8a1f5e84cc3c6d457b4705e8f) ) + + ROM_REGION16_BE( 0x100000, "edata", ROMREGION_ERASEFF ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "st1-pt0-h.bin", 0x000001, 0x80000, CRC(84eb355f) SHA1(89a248b8be2e0afcee29ba4c4c9cca65d5fb246a) ) + ROM_LOAD32_BYTE( "st1-pt0-u.bin", 0x000002, 0x80000, CRC(1956cd0a) SHA1(7d21b3a59f742694de472c545a1f30c3d92e3390) ) + ROM_LOAD32_BYTE( "st1-pt0-l.bin", 0x000003, 0x80000, CRC(ff577049) SHA1(1e1595174094e88d5788753d05ce296c1f7eca75) ) + ROM_LOAD32_BYTE( "st1-pt1-h.bin", 0x200001, 0x80000, CRC(96b1bd7d) SHA1(55da7896dda2aa4c35501a55c8605a065b02aa17) ) + ROM_LOAD32_BYTE( "st1-pt1-u.bin", 0x200002, 0x80000, CRC(ecf21047) SHA1(ddb13f5a2e7d192f0662fa420b49f89e1e991e66) ) + ROM_LOAD32_BYTE( "st1-pt1-l.bin", 0x200003, 0x80000, CRC(01cb0407) SHA1(4b58860bbc353de8b4b8e83d12b919d9386846e8) ) + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("st1-voi0.bin", 0x000000, 0x80000,CRC(5b3d43a9) SHA1(cdc04f19dc91dca9fa88ba0c2fca72aa195a3694) ) + ROM_LOAD("st1-voi1.bin", 0x080000, 0x80000,CRC(413e6181) SHA1(e827ec11f5755606affd2635718512aeac9354da) ) + ROM_LOAD("st1-voi2.bin", 0x100000, 0x80000,CRC(067d0720) SHA1(a853b2d43027a46c5e707fc677afdaae00f450c7) ) + ROM_LOAD("st1-voi3.bin", 0x180000, 0x80000,CRC(8b5aa45f) SHA1(e1214e639200758ad2045bde0368a2d500c1b84a) ) + + ROM_REGION( 0x2000, "nvram", ROMREGION_ERASE00) + // starblad needs default NVRAM to be all 0 +ROM_END + +ROM_START( solvalou ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "sv1-mp-u.bin", 0x000000, 0x20000, CRC(b6f92762) SHA1(d177328b3da2ab0580e101478142bc8c373d6140) ) + ROM_LOAD16_BYTE( "sv1-mp-l.bin", 0x000001, 0x20000, CRC(28c54c42) SHA1(32fcca2eb4bb8ba8c2587b03d3cf59f072f7fac5) ) + + ROM_REGION( 0x80000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "sv1-sp-u.bin", 0x000000, 0x20000, CRC(ebd4bf82) SHA1(67946360d680a675abcb3c131bac0502b2455573) ) + ROM_LOAD16_BYTE( "sv1-sp-l.bin", 0x000001, 0x20000, CRC(7acab679) SHA1(764297c9601be99dbbffb75bbc6fe4a40ea38529) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "sv1-snd0.bin", 0x000000, 0x020000, CRC(5e007864) SHA1(94da2d51544c6127056beaa251353038646da15f) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x400000, "gfx1", 0 ) + ROM_LOAD( "sv1-obj0.bin", 0x000000, 0x80000, CRC(773798bb) SHA1(51ab76c95030bab834f1a74ae677b2f0afc18c52) ) + ROM_LOAD( "sv1-obj4.bin", 0x080000, 0x80000, CRC(33a008a7) SHA1(4959a0ac24ad64f1367e2d8d63d39a0273c60f3e) ) + ROM_LOAD( "sv1-obj1.bin", 0x100000, 0x80000, CRC(a36d9e79) SHA1(928d9995e97ee7509e23e6cc64f5e7bfb5c02d42) ) + ROM_LOAD( "sv1-obj5.bin", 0x180000, 0x80000, CRC(31551245) SHA1(385452ea4830c466263ad5241313ac850dfef756) ) + ROM_LOAD( "sv1-obj2.bin", 0x200000, 0x80000, CRC(c8672b8a) SHA1(8da037b27d2c2b178aab202781f162371458f788) ) + ROM_LOAD( "sv1-obj6.bin", 0x280000, 0x80000, CRC(fe319530) SHA1(8f7e46c8f0b86c7515f6d763b795ce07d11c77bc) ) + ROM_LOAD( "sv1-obj3.bin", 0x300000, 0x80000, CRC(293ef1c5) SHA1(f677883bfec16bbaeb0a01ac565d0e6cac679174) ) + ROM_LOAD( "sv1-obj7.bin", 0x380000, 0x80000, CRC(95ed6dcb) SHA1(931706ce3fea630823ce0c79febec5eec0cc623d) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) + ROM_LOAD16_BYTE( "sv1-data-u.bin", 0x000000, 0x80000, CRC(2e561996) SHA1(982158481e5649f21d5c2816fdc80cb725ed1419) ) + ROM_LOAD16_BYTE( "sv1-data-l.bin", 0x000001, 0x80000, CRC(495fb8dd) SHA1(813d1da4109652008d72b3bdb03032efc5c0c2d5) ) + + ROM_REGION16_BE( 0x100000, "edata", ROMREGION_ERASEFF ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "sv1-pt0-h.bin", 0x000001, 0x80000, CRC(3be21115) SHA1(c9f30353c1216f64199f87cd34e787efd728e739) ) /* most significant */ + ROM_LOAD32_BYTE( "sv1-pt0-u.bin", 0x000002, 0x80000, CRC(4aacfc42) SHA1(f0e179e057183b41744ca429764f44306f0ce9bf) ) + ROM_LOAD32_BYTE( "sv1-pt0-l.bin", 0x000003, 0x80000, CRC(6a4dddff) SHA1(9ed182d21d328c6a684ee6658a9dfcf3f3dd8646) ) /* least significant */ + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("sv1-voi0.bin", 0x000000, 0x80000,CRC(7f61bbcf) SHA1(b3b7e66e24d9cb16ebd139237c1e51f5d60c1585) ) + ROM_LOAD("sv1-voi1.bin", 0x080000, 0x80000,CRC(c732e66c) SHA1(14e75dd9bea4055f85eb2bcbf69cf6695a3f7ec4) ) + ROM_LOAD("sv1-voi2.bin", 0x100000, 0x80000,CRC(51076298) SHA1(ec52c9ae3029118f3ea3732948d6de28f5fba561) ) + ROM_LOAD("sv1-voi3.bin", 0x180000, 0x80000,CRC(33085ff3) SHA1(0a30b91618c250a5e7bd896a8ceeb3d16da178a9) ) +ROM_END + + +ROM_START( aircomb ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "ac2-mpr-u.3j", 0x000000, 0x80000, CRC(a7133f85) SHA1(9f1c99dd503f1fc81096170fd272e33ae8a7de2f) ) + ROM_LOAD16_BYTE( "ac2-mpr-l.1j", 0x000001, 0x80000, CRC(520a52e6) SHA1(74306e02abfe08aa1afbf325b74dbc0840c3ad3a) ) + + ROM_REGION( 0x80000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "ac2-spr-u.6c", 0x000000, 0x20000, CRC(42aca956) SHA1(10ea2400bb4d5b2d805e2de43ca0e0f54597f660) ) + ROM_LOAD16_BYTE( "ac2-spr-l.4c", 0x000001, 0x20000, CRC(3e15fa19) SHA1(65dbb33ab6b3c06c793613348ebb7b110b8bba0d) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "ac1-snd0.8j", 0x000000, 0x020000, CRC(5c1fb84b) SHA1(20e4d81289dbe58ffcfc947251a6ff1cc1e36436) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x400000, "gfx1", 0 ) + ROM_LOAD( "ac2-obj0.5s", 0x000000, 0x80000, CRC(8327ff22) SHA1(16f6022dedb7a74590898bc8ed3e8a97993c4635) ) + ROM_LOAD( "ac2-obj4.4s", 0x080000, 0x80000, CRC(e433e344) SHA1(98ade550cf066fcb5c09fa905f441a1464d4d625) ) + ROM_LOAD( "ac2-obj1.5x", 0x100000, 0x80000, CRC(43af566d) SHA1(99f0d9f005e28040f5cc10de2198893946a31d09) ) + ROM_LOAD( "ac2-obj5.4x", 0x180000, 0x80000, CRC(ecb19199) SHA1(8e0aa1bc1141c4b09576ab08970d0c7629560643) ) + ROM_LOAD( "ac2-obj2.3s", 0x200000, 0x80000, CRC(dafbf489) SHA1(c53ccb3e1b4a6a660bd28c8abe52ccc3f85d111f) ) + ROM_LOAD( "ac2-obj6.2s", 0x280000, 0x80000, CRC(24cc3f36) SHA1(e50af176eb3034c9cab7613ca614f5cc2c62f95e) ) + ROM_LOAD( "ac2-obj3.3x", 0x300000, 0x80000, CRC(bd555a1d) SHA1(96e432b30da6f5f7ccb768c516b1f7186bc0d4c9) ) + ROM_LOAD( "ac2-obj7.2x", 0x380000, 0x80000, CRC(d561fbe3) SHA1(a23976e10bddf74d4a6b292f044dfd0affbab101) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) /* collision */ + ROM_LOAD16_BYTE( "ac1-data-u.3a", 0x000000, 0x80000, CRC(82320c71) SHA1(2be98d46853febb46e1cc728af2735c0e00ce303) ) + ROM_LOAD16_BYTE( "ac1-data-l.1a", 0x000001, 0x80000, CRC(fd7947d3) SHA1(2696eeae37de6d256e626cc3f3cea7b0f6eff60e) ) + + ROM_REGION16_BE( 0x100000, "edata", 0 ) + ROM_LOAD16_BYTE( "ac1-edata1-u.3c", 0x000000, 0x80000, CRC(a9547509) SHA1(1bc663cec03b60ad968896bbc2546f02efda135e) ) + ROM_LOAD16_BYTE( "ac1-edata1-l.1c", 0x000001, 0x80000, CRC(a87087dd) SHA1(cd9b83a8f07886ab44e4ded68002b44338777e8c) ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "ac1-poi-h.2f", 0x000001, 0x80000, CRC(573bbc3b) SHA1(371be12b915db6872049f18980c1b55544cfc445) ) /* most significant */ + ROM_LOAD32_BYTE( "ac1-poi-lu.2k", 0x000002, 0x80000, CRC(d99084b9) SHA1(c604d60a2162af7610e5ff7c1aa4195f7df82efe) ) + ROM_LOAD32_BYTE( "ac1-poi-ll.2n", 0x000003, 0x80000, CRC(abb32307) SHA1(8e936ba99479215dd33a951d81ec2b04020dfd62) ) /* least significant */ + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("ac1-voi0.12b", 0x000000, 0x80000,CRC(f427b119) SHA1(bd45bbe41c8be26d6c997fcdc226d080b416a2cf) ) + ROM_LOAD("ac1-voi1.12c", 0x080000, 0x80000,CRC(c9490667) SHA1(4b6fbe635c32469870a8e6f82742be6a9d4918c9) ) + ROM_LOAD("ac1-voi2.12d", 0x100000, 0x80000,CRC(1fcb51ba) SHA1(80fc815e5fad76d20c3795ab1d89b57d9abc3efd) ) + ROM_LOAD("ac1-voi3.12e", 0x180000, 0x80000,CRC(cd202e06) SHA1(72a18f5ba402caefef14b8d1304f337eaaa3eb1d) ) + + ROM_REGION( 0x0600, "plds", 0 ) + ROM_LOAD( "gal16v8a-3pdsp5.17d", 0x0000, 0x0117, CRC(799c1f26) SHA1(d28ed1b9fa78180c5a0b01a7198a2870137c7349) ) + ROM_LOAD( "plhs18p8-3pobj3.17n", 0x0200, 0x0149, CRC(9625f469) SHA1(29158a3d37485fb0714d0a60bcd07abd26a3f56e) ) + ROM_LOAD( "plhs18p8-3pobj4.17n", 0x0400, 0x0149, CRC(1b7c90c1) SHA1(ae65aab7a191cdf1af488e144af22b9d8669c903) ) + + ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "aircomb.nv", 0x0000, 0x2000, CRC(a97ea3e0) SHA1(95684bb7369c1cb1e2fa53c743d4f94b0080c6f5) ) +ROM_END + +ROM_START( aircombj ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "ac1-mpr-u.3j", 0x000000, 0x80000, CRC(a4dec813) SHA1(2ee8b3492d30db4c841f695151880925a5e205e0) ) + ROM_LOAD16_BYTE( "ac1-mpr-l.1j", 0x000001, 0x80000, CRC(8577b6a2) SHA1(32194e392fbd051754be88eb8c90688c65c65d85) ) + + ROM_REGION( 0x080000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "ac1-spr-u.6c", 0x000000, 0x20000, CRC(5810e219) SHA1(c312ffd8324670897871b12d521779570dc0f580) ) + ROM_LOAD16_BYTE( "ac1-spr-l.4c", 0x000001, 0x20000, CRC(175a7d6c) SHA1(9e31dde6646cd9b6dcdbdb3f2326177508559e56) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "ac1-snd0.8j", 0x000000, 0x020000, CRC(5c1fb84b) SHA1(20e4d81289dbe58ffcfc947251a6ff1cc1e36436) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x400000, "gfx1", 0 ) + ROM_LOAD( "ac1-obj0.5s", 0x000000, 0x80000, CRC(d2310c6a) SHA1(9bb8fdfc2c232574777248f4959975f9a20e3105) ) + ROM_LOAD( "ac1-obj4.4s", 0x080000, 0x80000, CRC(0c93b478) SHA1(a92ffbcf04b64e0eee5bcf37008e247700641b25) ) + ROM_LOAD( "ac1-obj1.5x", 0x100000, 0x80000, CRC(f5783a77) SHA1(0be1815ceb4ce4fa7ab75ba588e090f20ee0cac9) ) + ROM_LOAD( "ac1-obj5.4x", 0x180000, 0x80000, CRC(476aed15) SHA1(0e53fdf02e8ffe7852a1fa8bd2f64d0e58f3dc09) ) + ROM_LOAD( "ac1-obj2.3s", 0x200000, 0x80000, CRC(01343d5c) SHA1(64171fed1d1f8682b3d70d3233ea017719f4cc63) ) + ROM_LOAD( "ac1-obj6.2s", 0x280000, 0x80000, CRC(c67607b1) SHA1(df64ea7920cf64271fe742d3d0a57f842ee61e8d) ) + ROM_LOAD( "ac1-obj3.3x", 0x300000, 0x80000, CRC(7717f52e) SHA1(be1df3f4d0fdcaa5d3c81a724e5eb9d14136c6f5) ) + ROM_LOAD( "ac1-obj7.2x", 0x380000, 0x80000, CRC(cfa9fe5f) SHA1(0da25663b89d653c87ed32d15f7c82f3035702ab) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) + ROM_LOAD16_BYTE( "ac1-data-u.3a", 0x000000, 0x80000, CRC(82320c71) SHA1(2be98d46853febb46e1cc728af2735c0e00ce303) ) + ROM_LOAD16_BYTE( "ac1-data-l.1a", 0x000001, 0x80000, CRC(fd7947d3) SHA1(2696eeae37de6d256e626cc3f3cea7b0f6eff60e) ) + + ROM_REGION16_BE( 0x100000, "edata", 0 ) + ROM_LOAD16_BYTE( "ac1-edata1-u.3c", 0x000000, 0x80000, CRC(a9547509) SHA1(1bc663cec03b60ad968896bbc2546f02efda135e) ) + ROM_LOAD16_BYTE( "ac1-edata1-l.1c", 0x000001, 0x80000, CRC(a87087dd) SHA1(cd9b83a8f07886ab44e4ded68002b44338777e8c) ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "ac1-poi-h.2f", 0x000001, 0x80000, CRC(573bbc3b) SHA1(371be12b915db6872049f18980c1b55544cfc445) ) /* most significant */ + ROM_LOAD32_BYTE( "ac1-poi-lu.2k", 0x000002, 0x80000, CRC(d99084b9) SHA1(c604d60a2162af7610e5ff7c1aa4195f7df82efe) ) + ROM_LOAD32_BYTE( "ac1-poi-ll.2n", 0x000003, 0x80000, CRC(abb32307) SHA1(8e936ba99479215dd33a951d81ec2b04020dfd62) ) /* least significant */ + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("ac1-voi0.12b", 0x000000, 0x80000,CRC(f427b119) SHA1(bd45bbe41c8be26d6c997fcdc226d080b416a2cf) ) + ROM_LOAD("ac1-voi1.12c", 0x080000, 0x80000,CRC(c9490667) SHA1(4b6fbe635c32469870a8e6f82742be6a9d4918c9) ) + ROM_LOAD("ac1-voi2.12d", 0x100000, 0x80000,CRC(1fcb51ba) SHA1(80fc815e5fad76d20c3795ab1d89b57d9abc3efd) ) + ROM_LOAD("ac1-voi3.12e", 0x180000, 0x80000,CRC(cd202e06) SHA1(72a18f5ba402caefef14b8d1304f337eaaa3eb1d) ) + + ROM_REGION( 0x0600, "plds", 0 ) + ROM_LOAD( "gal16v8a-3pdsp5.17d", 0x0000, 0x0117, CRC(799c1f26) SHA1(d28ed1b9fa78180c5a0b01a7198a2870137c7349) ) + ROM_LOAD( "plhs18p8-3pobj3.17n", 0x0200, 0x0149, CRC(9625f469) SHA1(29158a3d37485fb0714d0a60bcd07abd26a3f56e) ) + ROM_LOAD( "plhs18p8-3pobj4.17n", 0x0400, 0x0149, CRC(1b7c90c1) SHA1(ae65aab7a191cdf1af488e144af22b9d8669c903) ) + + ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "aircombj.nv", 0x0000, 0x2000, CRC(56c71c83) SHA1(83dfcf4e3232f78e3807e9d3e862aa5446444165) ) +ROM_END + +ROM_START( cybsled ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "cy2-mpr-u.3j", 0x000000, 0x80000, CRC(b35a72bc) SHA1(d9bc5b8f0bc30510fca8fc57eeb67e5ca0e4c67f) ) + ROM_LOAD16_BYTE( "cy2-mpr-l.1j", 0x000001, 0x80000, CRC(c4a25919) SHA1(52f6947102001376e37730ace16283141b13fee7) ) + + ROM_REGION( 0x100000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "cy2-spr-u.6c", 0x000000, 0x80000, CRC(575a422d) SHA1(cad97742da1e2baf47ac110fadef5544b3a30cc7) ) + ROM_LOAD16_BYTE( "cy2-spr-l.4c", 0x000001, 0x80000, CRC(4066291a) SHA1(6ebbc11a68f66ec1e6d2e6ee857e8c599691e289) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "cy1-snd0.8j", 0x000000, 0x020000, CRC(3dddf83b) SHA1(e16119cbef176b6f8f8ace773fcbc201e987823f) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x400000, "gfx1", 0 ) + ROM_LOAD( "cy1-obj0.5s", 0x000000, 0x80000, CRC(5ae542d5) SHA1(99b1a3ed476da4a97cb864538909d7b831f0fd3b) ) + ROM_LOAD( "cy1-obj4.4s", 0x080000, 0x80000, CRC(57904076) SHA1(b1dc0d99543bc4b9584b37ffc12c6ebc59e30e3b) ) + ROM_LOAD( "cy1-obj1.5x", 0x100000, 0x80000, CRC(4aae3eff) SHA1(c80240bd2f4228a0261a14adb6b10560b31b5aa0) ) + ROM_LOAD( "cy1-obj5.4x", 0x180000, 0x80000, CRC(0e11ca47) SHA1(076a9a4cfddbee2d8aaa06110333090d8fdbefeb) ) + ROM_LOAD( "cy1-obj2.3s", 0x200000, 0x80000, CRC(d64ec4c3) SHA1(0bed1cafc21ed8cef3850fb81e30076977086eb0) ) + ROM_LOAD( "cy1-obj6.2s", 0x280000, 0x80000, CRC(7748b485) SHA1(adb4da419a6cdbefd0fef182d866a3479be379af) ) + ROM_LOAD( "cy1-obj3.3x", 0x300000, 0x80000, CRC(3d1f7168) SHA1(392dddcc79fe61dcc6514a91ac27b5e36825d8b7) ) + ROM_LOAD( "cy1-obj7.2x", 0x380000, 0x80000, CRC(b6eb6ad2) SHA1(85a660c5e44012491be7d4e783cce6ba12c135cb) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) + ROM_LOAD16_BYTE( "cy1-data-u.3a", 0x000000, 0x80000, CRC(570da15d) SHA1(9ebe756f10756c079a92fb522332e9e52ff715c3) ) + ROM_LOAD16_BYTE( "cy1-data-l.1a", 0x000001, 0x80000, CRC(9cf96f9e) SHA1(91783f48b93e03c778c6641ca8fb419c13b0d3c5) ) + + ROM_REGION16_BE( 0x100000, "edata", 0 ) + ROM_LOAD16_BYTE( "cy1-edata0-u.3b", 0x000000, 0x80000, CRC(77452533) SHA1(48fc199bcc1beb23c714eebd9b09b153c980170b) ) + ROM_LOAD16_BYTE( "cy1-edata0-l.1b", 0x000001, 0x80000, CRC(e812e290) SHA1(719e0a026ae8ef63d0d0269b67669ea9b4d950dd) ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "cy1-poi-h1.2f", 0x000001, 0x80000, CRC(eaf8bac3) SHA1(7a2caf6672af158b4a23ce4626342d1f17d1a4e4) ) /* most significant */ + ROM_LOAD32_BYTE( "cy1-poi-lu1.2k", 0x000002, 0x80000, CRC(c544a8dc) SHA1(4cce5f2ab3519b4aa7edbdd15b2d79a7fdcade3c) ) + ROM_LOAD32_BYTE( "cy1-poi-ll1.2n", 0x000003, 0x80000, CRC(30acb99b) SHA1(a28dcb3e5405f166644f6353a903c1143ee268f1) ) /* least significant */ + ROM_LOAD32_BYTE( "cy1-poi-h2.2j", 0x200001, 0x80000, CRC(4079f342) SHA1(fa36aed1abbda54a42f29b183007474580870319) ) + ROM_LOAD32_BYTE( "cy1-poi-lu2.2l", 0x200002, 0x80000, CRC(61d816d4) SHA1(7991957b910d32530151abc7f469fcf1de62d8f3) ) + ROM_LOAD32_BYTE( "cy1-poi-ll2.2p", 0x200003, 0x80000, CRC(faf09158) SHA1(b56ebed6012362b1d599c396a43e90a1e4d9dc38) ) + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("cy1-voi0.12b", 0x000000, 0x80000,CRC(99d7ce46) SHA1(b75f4055c3ce847daabfacda22df14e3f80c4fb9) ) + ROM_LOAD("cy1-voi1.12c", 0x080000, 0x80000,CRC(2b335f06) SHA1(2b2cd407c34388b56496f84a414daa153780b098) ) + ROM_LOAD("cy1-voi2.12d", 0x100000, 0x80000,CRC(10cd15f0) SHA1(9b721654ed97a13287373c1b2854ac9aeddc271f) ) + ROM_LOAD("cy1-voi3.12e", 0x180000, 0x80000,CRC(c902b4a4) SHA1(816357ec1a02a7ebf817ac1182e9c50ce5ca71f6) ) + + ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "cybsled.nv", 0x0000, 0x2000, CRC(aa18bf9e) SHA1(3712d4d20e5f5f1c920e3f1f6a00101e874662d0) ) +ROM_END + +ROM_START( cybsleda ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "cy1-mpr-u.3j", 0x000000, 0x80000, CRC(cc5a2e83) SHA1(b794051b2c351e9ca43351603845e4e563f6740f) ) + ROM_LOAD16_BYTE( "cy1-mpr-l.1j", 0x000001, 0x80000, CRC(f7ee8b48) SHA1(6d36eb3dba9cf7f5f5e1a26c156e77a2dad3f257) ) + + ROM_REGION( 0x100000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "cy1-spr-u.6c", 0x000000, 0x80000, CRC(28dd707b) SHA1(11297ceae4fe78d170785a5cf9ad77833bbe7fff) ) + ROM_LOAD16_BYTE( "cy1-spr-l.4c", 0x000001, 0x80000, CRC(437029de) SHA1(3d275a2b0ce6909e77e657c371bd22597ea9d398) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "cy1-snd0.8j", 0x000000, 0x020000, CRC(3dddf83b) SHA1(e16119cbef176b6f8f8ace773fcbc201e987823f) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x400000, "gfx1", 0 ) + ROM_LOAD( "cy1-obj0.5s", 0x000000, 0x80000, CRC(5ae542d5) SHA1(99b1a3ed476da4a97cb864538909d7b831f0fd3b) ) + ROM_LOAD( "cy1-obj4.4s", 0x080000, 0x80000, CRC(57904076) SHA1(b1dc0d99543bc4b9584b37ffc12c6ebc59e30e3b) ) + ROM_LOAD( "cy1-obj1.5x", 0x100000, 0x80000, CRC(4aae3eff) SHA1(c80240bd2f4228a0261a14adb6b10560b31b5aa0) ) + ROM_LOAD( "cy1-obj5.4x", 0x180000, 0x80000, CRC(0e11ca47) SHA1(076a9a4cfddbee2d8aaa06110333090d8fdbefeb) ) + ROM_LOAD( "cy1-obj2.3s", 0x200000, 0x80000, CRC(d64ec4c3) SHA1(0bed1cafc21ed8cef3850fb81e30076977086eb0) ) + ROM_LOAD( "cy1-obj6.2s", 0x280000, 0x80000, CRC(7748b485) SHA1(adb4da419a6cdbefd0fef182d866a3479be379af) ) + ROM_LOAD( "cy1-obj3.3x", 0x300000, 0x80000, CRC(3d1f7168) SHA1(392dddcc79fe61dcc6514a91ac27b5e36825d8b7) ) + ROM_LOAD( "cy1-obj7.2x", 0x380000, 0x80000, CRC(b6eb6ad2) SHA1(85a660c5e44012491be7d4e783cce6ba12c135cb) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) + ROM_LOAD16_BYTE( "cy1-data-u.3a", 0x000000, 0x80000, CRC(570da15d) SHA1(9ebe756f10756c079a92fb522332e9e52ff715c3) ) + ROM_LOAD16_BYTE( "cy1-data-l.1a", 0x000001, 0x80000, CRC(9cf96f9e) SHA1(91783f48b93e03c778c6641ca8fb419c13b0d3c5) ) + + ROM_REGION16_BE( 0x100000, "edata", 0 ) + ROM_LOAD16_BYTE( "cy1-edata0-u.3b", 0x000000, 0x80000, CRC(77452533) SHA1(48fc199bcc1beb23c714eebd9b09b153c980170b) ) + ROM_LOAD16_BYTE( "cy1-edata0-l.1b", 0x000001, 0x80000, CRC(e812e290) SHA1(719e0a026ae8ef63d0d0269b67669ea9b4d950dd) ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "cy1-poi-h1.2f", 0x000001, 0x80000, CRC(eaf8bac3) SHA1(7a2caf6672af158b4a23ce4626342d1f17d1a4e4) ) /* most significant */ + ROM_LOAD32_BYTE( "cy1-poi-lu1.2k", 0x000002, 0x80000, CRC(c544a8dc) SHA1(4cce5f2ab3519b4aa7edbdd15b2d79a7fdcade3c) ) + ROM_LOAD32_BYTE( "cy1-poi-ll1.2n", 0x000003, 0x80000, CRC(30acb99b) SHA1(a28dcb3e5405f166644f6353a903c1143ee268f1) ) /* least significant */ + ROM_LOAD32_BYTE( "cy1-poi-h2.2j", 0x200001, 0x80000, CRC(4079f342) SHA1(fa36aed1abbda54a42f29b183007474580870319) ) + ROM_LOAD32_BYTE( "cy1-poi-lu2.2l", 0x200002, 0x80000, CRC(61d816d4) SHA1(7991957b910d32530151abc7f469fcf1de62d8f3) ) + ROM_LOAD32_BYTE( "cy1-poi-ll2.2p", 0x200003, 0x80000, CRC(faf09158) SHA1(b56ebed6012362b1d599c396a43e90a1e4d9dc38) ) + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("cy1-voi0.12b", 0x000000, 0x80000,CRC(99d7ce46) SHA1(b75f4055c3ce847daabfacda22df14e3f80c4fb9) ) + ROM_LOAD("cy1-voi1.12c", 0x080000, 0x80000,CRC(2b335f06) SHA1(2b2cd407c34388b56496f84a414daa153780b098) ) + ROM_LOAD("cy1-voi2.12d", 0x100000, 0x80000,CRC(10cd15f0) SHA1(9b721654ed97a13287373c1b2854ac9aeddc271f) ) + ROM_LOAD("cy1-voi3.12e", 0x180000, 0x80000,CRC(c902b4a4) SHA1(816357ec1a02a7ebf817ac1182e9c50ce5ca71f6) ) + + ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "cybsleda.nv", 0x0000, 0x2000, CRC(a73bb03e) SHA1(e074bfeae14178c867070e06f6690ed13115f5fa) ) +ROM_END + +void namcos21_c67_state::init_solvalou() +{ + uint16_t *mem = (uint16_t *)memregion("maincpu")->base(); + mem[0x20ce4/2+1] = 0x0000; // $200128 + mem[0x20cf4/2+0] = 0x4e71; // 2nd ptr_booting + mem[0x20cf4/2+1] = 0x4e71; + mem[0x20cf4/2+2] = 0x4e71; +} + +/* YEAR NAME PARENT MACHINE INPUT CLASS INIT MONITOR COMPANY FULLNAME FLAGS */ + +// uses 5x TMS320C25 (C67, has internal ROM - dumped) +GAME( 1991, starblad, 0, starblad, starblad, namcos21_c67_state, empty_init, ROT0, "Namco", "Starblade (ST2, World)", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1991, starbladj, starblad, starblad, starblad, namcos21_c67_state, empty_init, ROT0, "Namco", "Starblade (ST1, Japan)", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1991, solvalou, 0, solvalou, s21default, namcos21_c67_state, init_solvalou, ROT0, "Namco", "Solvalou (SV1, Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +GAME( 1992, aircomb, 0, aircomb, aircomb, namcos21_c67_state, empty_init, ROT0, "Namco", "Air Combat (AC2, US)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // There's code for a SCI, is it even possible to play multiplayer? +GAME( 1992, aircombj, aircomb, aircomb, aircomb, namcos21_c67_state, empty_init, ROT0, "Namco", "Air Combat (AC1, Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1993, cybsled, 0, cybsled, cybsled, namcos21_c67_state, empty_init, ROT0, "Namco", "Cyber Sled (CY2, World)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN | MACHINE_NOT_WORKING ) +GAME( 1993, cybsleda, cybsled, cybsled, cybsled, namcos21_c67_state, empty_init, ROT0, "Namco", "Cyber Sled (CY1, World?)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN | MACHINE_NOT_WORKING ) // usually an 'xx1' set would be Japan, but this shows neither a warning nor Japanese text, verify on hardware diff --git a/src/mame/drivers/namcos21_de.cpp b/src/mame/drivers/namcos21_de.cpp new file mode 100644 index 00000000000..a25b87a67c4 --- /dev/null +++ b/src/mame/drivers/namcos21_de.cpp @@ -0,0 +1,856 @@ +// license:BSD-3-Clause +// copyright-holders:Phil Stroffolino, Naibo, David Haywood +/** + +see http://www.tvspels-nostalgi.com/driverseye.htm for details about setup + +2008/06/11, by Naibo(translated to English by Mameplus team): +Driver's Eyes works, + -the communication work between CPU and 3D DSP should be limited to the master M68000, + if the address mapping is done in the shared memory, master CPU would be disturbed by the slave one. + + -The left, center and right screens have separate programs and boards, each would work independently. + About projection angles of left and right screen, the angle is correct on "DRIVER'S EYES" title screen, however in the tracks of demo mode it doesn't seem correct. + (probably wants angle sent by main board?) + + -On demo screen, should fog effects be turned off? + + NOTES: + + Driver's Eyes + not yet working + + TODO: + + Driver's Eyes + add communications for Left and Right screen (linked C139 or something else?) + +*/ + +#include "emu.h" +#include "machine/namcoio_gearbox.h" +#include "screen.h" +#include "emupal.h" +#include "speaker.h" +#include "cpu/m68000/m68000.h" +#include "cpu/m6805/m6805.h" +#include "cpu/m6809/m6809.h" +#include "cpu/tms32025/tms32025.h" +#include "machine/nvram.h" +#include "machine/timer.h" +#include "machine/namco_c139.h" +#include "machine/namco_c148.h" +#include "machine/namco68.h" +#include "machine/namcos21_dsp.h" +#include "video/namco_c355spr.h" +#include "video/namcos21_3d.h" +#include "sound/ym2151.h" +#include "sound/c140.h" +#include "emupal.h" + +// TODO: basic parameters to get 60.606060 Hz, x2 is for interlace +#define MCFG_SCREEN_RAW_PARAMS_NAMCO480I \ + MCFG_SCREEN_RAW_PARAMS(12288000*2, 768, 0, 496, 264*2,0,480) + +#define ENABLE_LOGGING 0 + +#define NAMCOS21_NUM_COLORS 0x8000 + +DECLARE_DEVICE_TYPE(NAMCO_DE_PCB, namco_de_pcbstack_device) + + +class namco_de_pcbstack_device : public device_t +{ +public: + // construction/destruction + namco_de_pcbstack_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + void configure_c148_standard(machine_config &config); + +protected: + virtual void device_add_mconfig(machine_config &config) override; + virtual void device_start() override; + virtual void device_reset() override; + +private: + + INTERRUPT_GEN_MEMBER( irq0_line_hold ); + INTERRUPT_GEN_MEMBER( irq1_line_hold ); + + required_device<cpu_device> m_maincpu; + required_device<cpu_device> m_audiocpu; + required_device<cpu_device> m_slave; + required_device<namcoc68_device> m_c68; + required_device<namco_c139_device> m_sci; + required_device<namco_c148_device> m_master_intc; + required_device<namco_c148_device> m_slave_intc; + required_device<c140_device> m_c140; + required_device<namco_c355spr_device> m_c355spr; + required_device<palette_device> m_palette; + required_device<screen_device> m_screen; + required_memory_bank m_audiobank; + required_shared_ptr<uint8_t> m_dpram; + required_device<namcos21_3d_device> m_namcos21_3d; + required_device<namcos21_dsp_device> m_namcos21_dsp; + + uint16_t m_video_enable; + + DECLARE_READ16_MEMBER(video_enable_r); + DECLARE_WRITE16_MEMBER(video_enable_w); + + DECLARE_READ16_MEMBER(dpram_word_r); + DECLARE_WRITE16_MEMBER(dpram_word_w); + DECLARE_READ8_MEMBER(dpram_byte_r); + DECLARE_WRITE8_MEMBER(dpram_byte_w); + + DECLARE_WRITE8_MEMBER(eeprom_w); + DECLARE_READ8_MEMBER(eeprom_r); + + DECLARE_WRITE8_MEMBER(sound_bankselect_w); + + DECLARE_WRITE8_MEMBER(sound_reset_w); + DECLARE_WRITE8_MEMBER(system_reset_w); + void reset_all_subcpus(int state); + + std::unique_ptr<uint8_t[]> m_eeprom; + + TIMER_DEVICE_CALLBACK_MEMBER(screen_scanline); + + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + void configure_c68_namcos21(machine_config &config); + + void driveyes_common_map(address_map &map); + void driveyes_master_map(address_map &map); + void driveyes_slave_map(address_map &map); + + void sound_map(address_map &map); +}; + + +DEFINE_DEVICE_TYPE(NAMCO_DE_PCB, namco_de_pcbstack_device, "namco_de_pcb", "Namco Driver's Eyes PCB stack") + + +namco_de_pcbstack_device::namco_de_pcbstack_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, NAMCO_DE_PCB, tag, owner, clock), + m_maincpu(*this, "maincpu"), + m_audiocpu(*this, "audiocpu"), + m_slave(*this, "slave"), + m_c68(*this, "c68mcu"), + m_sci(*this, "sci"), + m_master_intc(*this, "master_intc"), + m_slave_intc(*this, "slave_intc"), + m_c140(*this, "c140"), + m_c355spr(*this, "c355spr"), + m_palette(*this, "palette"), + m_screen(*this, "screen"), + m_audiobank(*this, "audiobank"), + m_dpram(*this, "dpram"), + m_namcos21_3d(*this, "namcos21_3d"), + m_namcos21_dsp(*this, "namcos21dsp") +{} + +INTERRUPT_GEN_MEMBER( namco_de_pcbstack_device::irq0_line_hold ) { device.execute().set_input_line(0, HOLD_LINE); } +INTERRUPT_GEN_MEMBER( namco_de_pcbstack_device::irq1_line_hold ) { device.execute().set_input_line(1, HOLD_LINE); } + + +static const gfx_layout tile_layout = +{ + 16,16, + RGN_FRAC(1,4), /* number of tiles */ + 8, /* bits per pixel */ + { /* plane offsets */ + 0,1,2,3,4,5,6,7 + }, + { /* x offsets */ + 0*8,RGN_FRAC(1,4)+0*8,RGN_FRAC(2,4)+0*8,RGN_FRAC(3,4)+0*8, + 1*8,RGN_FRAC(1,4)+1*8,RGN_FRAC(2,4)+1*8,RGN_FRAC(3,4)+1*8, + 2*8,RGN_FRAC(1,4)+2*8,RGN_FRAC(2,4)+2*8,RGN_FRAC(3,4)+2*8, + 3*8,RGN_FRAC(1,4)+3*8,RGN_FRAC(2,4)+3*8,RGN_FRAC(3,4)+3*8 + }, + { /* y offsets */ + 0*32,1*32,2*32,3*32, + 4*32,5*32,6*32,7*32, + 8*32,9*32,10*32,11*32, + 12*32,13*32,14*32,15*32 + }, + 8*64 /* sprite offset */ +}; + +static GFXDECODE_START( gfx_namcos21 ) + GFXDECODE_ENTRY( "gfx1", 0x000000, tile_layout, 0x1000, 0x10 ) +GFXDECODE_END + + +MACHINE_CONFIG_START(namco_de_pcbstack_device::device_add_mconfig) + MCFG_DEVICE_ADD("maincpu", M68000,12288000) /* Master */ + MCFG_DEVICE_PROGRAM_MAP(driveyes_master_map) + MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namco_de_pcbstack_device, screen_scanline, "screen", 0, 1) + + MCFG_DEVICE_ADD("slave", M68000,12288000) /* Slave */ + MCFG_DEVICE_PROGRAM_MAP(driveyes_slave_map) + + MCFG_DEVICE_ADD("audiocpu", MC6809E, 3072000) /* Sound */ + MCFG_DEVICE_PROGRAM_MAP(sound_map) + MCFG_DEVICE_PERIODIC_INT_DRIVER(namco_de_pcbstack_device, irq0_line_hold, 2*60) + MCFG_DEVICE_PERIODIC_INT_DRIVER(namco_de_pcbstack_device, irq1_line_hold, 120) + + configure_c68_namcos21(config); + + NAMCOS21_DSP(config, m_namcos21_dsp, 0); + m_namcos21_dsp->set_renderer_tag("namcos21_3d"); + + MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame */ + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); + + configure_c148_standard(config); + NAMCO_C139(config, m_sci, 0); + + MCFG_SCREEN_ADD("screen", RASTER) + MCFG_SCREEN_RAW_PARAMS_NAMCO480I + MCFG_SCREEN_UPDATE_DRIVER(namco_de_pcbstack_device, screen_update) + MCFG_SCREEN_PALETTE("palette") + + MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos21) + MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS) + MCFG_PALETTE_FORMAT(XBRG) + + NAMCOS21_3D(config, m_namcos21_3d, 0); + m_namcos21_3d->set_fixed_palbase(0x3f00); + m_namcos21_3d->set_zz_shift_mult(10, 0x100); + m_namcos21_3d->set_depth_reverse(false); + m_namcos21_3d->set_framebuffer_size(496,480); + + NAMCO_C355SPR(config, m_c355spr, 0); + m_c355spr->set_screen(m_screen); + m_c355spr->set_gfxdecode_tag("gfxdecode"); + m_c355spr->set_is_namcofl(false); + m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); + m_c355spr->set_palxor(0xf); // reverse mapping + m_c355spr->set_gfxregion(0); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + C140(config, m_c140, 8000000/374); + m_c140->set_bank_type(c140_device::C140_TYPE::SYSTEM21); + m_c140->add_route(0, "lspeaker", 0.50); + m_c140->add_route(1, "rspeaker", 0.50); + + MCFG_DEVICE_ADD("ymsnd", YM2151, 3579580) + MCFG_SOUND_ROUTE(0, "lspeaker", 0.30) + MCFG_SOUND_ROUTE(1, "rspeaker", 0.30) +MACHINE_CONFIG_END + + +uint32_t namco_de_pcbstack_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + //uint8_t *videoram = m_gpu_videoram.get(); + int pivot = 3; + int pri; + bitmap.fill(0xff, cliprect ); + + m_c355spr->draw(screen, bitmap, cliprect, 2 ); + m_c355spr->draw(screen, bitmap, cliprect, 14 ); //driver's eyes + + m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe); + + m_c355spr->draw(screen, bitmap, cliprect, 0 ); + m_c355spr->draw(screen, bitmap, cliprect, 1 ); + + m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf); + + for (pri = pivot; pri < 8; pri++) + { + m_c355spr->draw(screen, bitmap, cliprect, pri); + } + + m_c355spr->draw(screen, bitmap, cliprect, 15 ); //driver's eyes + + return 0; + +} + +READ16_MEMBER(namco_de_pcbstack_device::video_enable_r) +{ + return m_video_enable; +} + +WRITE16_MEMBER(namco_de_pcbstack_device::video_enable_w) +{ + COMBINE_DATA( &m_video_enable ); /* 0x40 = enable */ + if( m_video_enable!=0 && m_video_enable!=0x40 ) + { + logerror( "unexpected video_enable_w=0x%x\n", m_video_enable ); + } +} + +/***********************************************************/ + +/* dual port ram memory handlers */ + +READ16_MEMBER(namco_de_pcbstack_device::dpram_word_r) +{ + return m_dpram[offset]; +} + +WRITE16_MEMBER(namco_de_pcbstack_device::dpram_word_w) +{ + if( ACCESSING_BITS_0_7 ) + { + m_dpram[offset] = data&0xff; + } +} + +READ8_MEMBER(namco_de_pcbstack_device::dpram_byte_r) +{ + return m_dpram[offset]; +} + +WRITE8_MEMBER(namco_de_pcbstack_device::dpram_byte_w) +{ + m_dpram[offset] = data; +} + +/*************************************************************/ +/* SOUND 6809 CPU Memory declarations */ +/*************************************************************/ + +void namco_de_pcbstack_device::sound_map(address_map &map) +{ + map(0x0000, 0x3fff).bankr("audiobank"); /* banked */ + map(0x3000, 0x3003).nopw(); /* ? */ + map(0x4000, 0x4001).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)); + map(0x5000, 0x6fff).rw(m_c140, FUNC(c140_device::c140_r), FUNC(c140_device::c140_w)); + map(0x7000, 0x77ff).rw(FUNC(namco_de_pcbstack_device::dpram_byte_r), FUNC(namco_de_pcbstack_device::dpram_byte_w)).share("dpram"); + map(0x7800, 0x7fff).rw(FUNC(namco_de_pcbstack_device::dpram_byte_r), FUNC(namco_de_pcbstack_device::dpram_byte_w)); /* mirror */ + map(0x8000, 0x9fff).ram(); + map(0xa000, 0xbfff).nopw(); /* amplifier enable on 1st write */ + map(0xc000, 0xffff).nopw(); /* avoid debug log noise; games write frequently to 0xe000 */ + map(0xc000, 0xc001).w(FUNC(namco_de_pcbstack_device::sound_bankselect_w)); + map(0xd001, 0xd001).nopw(); /* watchdog */ + map(0xd000, 0xffff).rom().region("audiocpu", 0x01000); +} + +/*************************************************************/ +/* I/O HD63705 MCU Memory declarations */ +/*************************************************************/ + +void namco_de_pcbstack_device::configure_c68_namcos21(machine_config &config) +{ + NAMCOC68(config, m_c68, 8000000); + m_c68->in_pb_callback().set_ioport("MCUB"); + m_c68->in_pc_callback().set_ioport("MCUC"); + m_c68->in_ph_callback().set_ioport("MCUH"); + m_c68->in_pdsw_callback().set_ioport("DSW"); + m_c68->di0_in_cb().set_ioport("MCUDI0"); + m_c68->di1_in_cb().set_ioport("MCUDI1"); + m_c68->di2_in_cb().set_ioport("MCUDI2"); + m_c68->di3_in_cb().set_ioport("MCUDI3"); + m_c68->an0_in_cb().set_ioport("AN0"); + m_c68->an1_in_cb().set_ioport("AN1"); + m_c68->an2_in_cb().set_ioport("AN2"); + m_c68->an3_in_cb().set_ioport("AN3"); + m_c68->an4_in_cb().set_ioport("AN4"); + m_c68->an5_in_cb().set_ioport("AN5"); + m_c68->an6_in_cb().set_ioport("AN6"); + m_c68->an7_in_cb().set_ioport("AN7"); + m_c68->dp_in_callback().set(FUNC(namco_de_pcbstack_device::dpram_byte_r)); + m_c68->dp_out_callback().set(FUNC(namco_de_pcbstack_device::dpram_byte_w)); +} + +/*************************************************************/ +/* Driver's Eyes Memory declarations overrides */ +/*************************************************************/ + + +void namco_de_pcbstack_device::driveyes_common_map(address_map &map) +{ + map(0x700000, 0x71ffff).rw(m_c355spr, FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)); + map(0x720000, 0x720007).rw(m_c355spr, FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); + map(0x740000, 0x74ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); + map(0x750000, 0x75ffff).ram().w(m_palette, FUNC(palette_device::write16_ext)).share("palette_ext"); + map(0x760000, 0x760001).rw(FUNC(namco_de_pcbstack_device::video_enable_r), FUNC(namco_de_pcbstack_device::video_enable_w)); + map(0x800000, 0x8fffff).rom().region("data", 0); + map(0x900000, 0x90ffff).ram().share("sharedram"); + map(0xa00000, 0xa00fff).rw(FUNC(namco_de_pcbstack_device::dpram_word_r), FUNC(namco_de_pcbstack_device::dpram_word_w)); + map(0xb00000, 0xb03fff).rw(m_sci, FUNC(namco_c139_device::ram_r), FUNC(namco_c139_device::ram_w)); + map(0xb80000, 0xb8000f).m(m_sci, FUNC(namco_c139_device::regs_map)); +} + +void namco_de_pcbstack_device::driveyes_master_map(address_map &map) +{ + driveyes_common_map(map); + map(0x000000, 0x03ffff).rom(); + map(0x100000, 0x10ffff).ram(); /* private work RAM */ + map(0x180000, 0x183fff).rw(FUNC(namco_de_pcbstack_device::eeprom_r), FUNC(namco_de_pcbstack_device::eeprom_w)).umask16(0x00ff); + map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); + + // DSP related + map(0x250000, 0x25ffff).ram().share("namcos21dsp:winrun_polydata"); + map(0x280000, 0x281fff).w(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_dspbios_w)); + map(0x380000, 0x38000f).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_dspcomram_control_r), FUNC(namcos21_dsp_device::winrun_dspcomram_control_w)); + map(0x3c0000, 0x3c1fff).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_68k_dspcomram_r), FUNC(namcos21_dsp_device::winrun_68k_dspcomram_w)); + map(0x400000, 0x400001).w(m_namcos21_dsp, FUNC(namcos21_dsp_device::pointram_control_w)); + map(0x440000, 0x440001).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::pointram_data_r), FUNC(namcos21_dsp_device::pointram_data_w)); +} + +void namco_de_pcbstack_device::driveyes_slave_map(address_map &map) +{ + driveyes_common_map(map); + map(0x000000, 0x03ffff).rom(); + map(0x100000, 0x10ffff).ram(); /* private work RAM */ + map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); +} + +WRITE8_MEMBER( namco_de_pcbstack_device::sound_bankselect_w ) +{ + m_audiobank->set_entry(data>>4); +} + +WRITE8_MEMBER(namco_de_pcbstack_device::sound_reset_w) +{ + if (data & 0x01) + { + /* Resume execution */ + m_audiocpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); + m_maincpu->yield(); + } + else + { + /* Suspend execution */ + m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); + } +} + +WRITE8_MEMBER(namco_de_pcbstack_device::system_reset_w) +{ + reset_all_subcpus(data & 1 ? CLEAR_LINE : ASSERT_LINE); + + if (data & 0x01) + m_maincpu->yield(); +} + +void namco_de_pcbstack_device::reset_all_subcpus(int state) +{ + m_slave->set_input_line(INPUT_LINE_RESET, state); + m_c68->ext_reset(state); +} + +WRITE8_MEMBER(namco_de_pcbstack_device::eeprom_w) +{ + m_eeprom[offset] = data; +} + +READ8_MEMBER(namco_de_pcbstack_device::eeprom_r) +{ + return m_eeprom[offset]; +} + + +TIMER_DEVICE_CALLBACK_MEMBER(namco_de_pcbstack_device::screen_scanline) +{ + int scanline = param; +// int cur_posirq = get_posirq_scanline()*2; + + if(scanline == 240*2) + { + m_master_intc->vblank_irq_trigger(); + m_slave_intc->vblank_irq_trigger(); + m_c68->ext_interrupt(ASSERT_LINE); + } +} + +void namco_de_pcbstack_device::configure_c148_standard(machine_config &config) +{ + NAMCO_C148(config, m_master_intc, 0, m_maincpu, true); + m_master_intc->link_c148_device(m_slave_intc); + m_master_intc->out_ext1_callback().set(FUNC(namco_de_pcbstack_device::sound_reset_w)); + m_master_intc->out_ext2_callback().set(FUNC(namco_de_pcbstack_device::system_reset_w)); + + NAMCO_C148(config, m_slave_intc, 0, m_slave, false); + m_slave_intc->link_c148_device(m_master_intc); +} + +void namco_de_pcbstack_device::device_start() +{ + m_eeprom = std::make_unique<uint8_t[]>(0x2000); + subdevice<nvram_device>("nvram")->set_base(m_eeprom.get(), 0x2000); + + uint32_t max = memregion("audiocpu")->bytes() / 0x4000; + for (int i = 0; i < 0x10; i++) + m_audiobank->configure_entry(i, memregion("audiocpu")->base() + (i % max) * 0x4000); + +} + +void namco_de_pcbstack_device::device_reset() +{ + /* Initialise the bank select in the sound CPU */ + m_audiobank->set_entry(0); /* Page in bank 0 */ + + m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE ); + + /* Place CPU2 & CPU3 into the reset condition */ + reset_all_subcpus(ASSERT_LINE); +} + + +class namcos21_de_state : public driver_device +{ +public: + namcos21_de_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_pcb(*this, "pcb_%u", 0U), + m_io_gearbox(*this, "gearbox") + { } + + void driveyes(machine_config &config); + +private: + required_device_array<namco_de_pcbstack_device, 3> m_pcb; + required_device<namcoio_gearbox_device> m_io_gearbox; +}; + +// driveyes only +MACHINE_CONFIG_START(namcos21_de_state::driveyes) + MCFG_DEVICE_ADD("pcb_0", NAMCO_DE_PCB,0) + MCFG_DEVICE_ADD("pcb_1", NAMCO_DE_PCB,0) + MCFG_DEVICE_ADD("pcb_2", NAMCO_DE_PCB,0) + + MCFG_DEVICE_ADD("gearbox", NAMCOIO_GEARBOX, 0) +MACHINE_CONFIG_END + +// stacks with the DSWs set to left or right screen will show 'receive error' because they want comms from the main screen + +static INPUT_PORTS_START( driveyes ) + PORT_START("pcb_1:MCUC") + PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service Button") PORT_CODE(KEYCODE_0) PORT_TOGGLE // alt test mode switch + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) + + PORT_START("pcb_1:MCUB") + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("gearbox", namcoio_gearbox_device, clutch_r ) + PORT_BIT( 0x37, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* ? */ + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) /* ? */ + + PORT_START("pcb_1:MCUH") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Red Button") + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Green Button") + PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("pcb_1:DSW") + PORT_SERVICE( 0x01, IP_ACTIVE_LOW ) + PORT_DIPNAME( 0x02, 0x02, "DSW2") + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x0c, 0x0c, "Screen (DON'T CHANGE)") + PORT_DIPSETTING( 0x0c, "Center (correct)" ) + PORT_DIPSETTING( 0x08, "Left (invalid)" ) + PORT_DIPSETTING( 0x04, "Right (invalid)" ) + PORT_DIPSETTING( 0x00, "Right (invalid) (duplicate)" ) + PORT_DIPNAME( 0x10, 0x10, "DSW5") + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x00, "PCM ROM") + PORT_DIPSETTING( 0x20, "2M" ) + PORT_DIPSETTING( 0x00, "4M" ) + PORT_DIPNAME( 0x40, 0x40, "DSW7") + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, "Screen Stop") + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("pcb_1:AN0") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_1:AN1") + PORT_BIT( 0xff, 0x80, IPT_PEDAL ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) PORT_NAME("Gas Pedal") + PORT_START("pcb_1:AN2") + PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) PORT_NAME("Steering Wheel") + PORT_START("pcb_1:AN3") + PORT_BIT( 0xff, 0x80, IPT_PEDAL2 ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) PORT_NAME("Brake Pedal") + PORT_START("pcb_1:AN4") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_1:AN5") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_1:AN6") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_1:AN7") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("pcb_1:MCUDI0") + PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER("gearbox", namcoio_gearbox_device, in_r, nullptr ) + PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("pcb_1:MCUDI1") /* 63B05Z0 - $3001 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_1:MCUDI2") /* 63B05Z0 - $3002 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_1:MCUDI3") /* 63B05Z0 - $3003 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + // the side view screens do still read inputs, but it's more likely that the main screen should be transfering them + // somehow rather than the controls being directly split + PORT_START("pcb_0:DSW") + PORT_SERVICE( 0x01, IP_ACTIVE_LOW ) + PORT_DIPNAME( 0x02, 0x02, "DSW2") + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x0c, 0x08, "Screen (DON'T CHANGE)") + PORT_DIPSETTING( 0x0c, "Center (invalid)" ) + PORT_DIPSETTING( 0x08, "Left (correct)" ) + PORT_DIPSETTING( 0x04, "Right (invalid)" ) + PORT_DIPSETTING( 0x00, "Right (invalid) (duplicate)" ) + PORT_DIPNAME( 0x10, 0x10, "DSW5") + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x00, "PCM ROM") + PORT_DIPSETTING( 0x20, "2M" ) + PORT_DIPSETTING( 0x00, "4M" ) + PORT_DIPNAME( 0x40, 0x40, "DSW7") + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, "Screen Stop") + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_START("pcb_0:MCUC") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:MCUB") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:MCUH") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN0") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN1") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN2") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN3") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN4") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN5") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN6") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN7") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:MCUDI0") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:MCUDI1") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:MCUDI2") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:MCUDI3") + + PORT_START("pcb_2:DSW") + PORT_SERVICE( 0x01, IP_ACTIVE_LOW ) + PORT_DIPNAME( 0x02, 0x02, "DSW2") + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x0c, 0x04, "Screen (DON'T CHANGE)") + PORT_DIPSETTING( 0x0c, "Center (invalid)" ) + PORT_DIPSETTING( 0x08, "Left (invalid)" ) + PORT_DIPSETTING( 0x04, "Right (correct)" ) + PORT_DIPSETTING( 0x00, "Right (invalid) (duplicate)" ) + PORT_DIPNAME( 0x10, 0x10, "DSW5") + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x00, "PCM ROM") + PORT_DIPSETTING( 0x20, "2M" ) + PORT_DIPSETTING( 0x00, "4M" ) + PORT_DIPNAME( 0x40, 0x40, "DSW7") + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, "Screen Stop") + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_START("pcb_2:MCUC") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:MCUB") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:MCUH") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN0") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN1") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN2") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN3") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN4") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN5") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN6") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN7") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:MCUDI0") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:MCUDI1") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:MCUDI2") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:MCUDI3") +INPUT_PORTS_END + +/* + Note, only the main screen PCB stack has voice roms populated + the sound program also differs on the side screen sets + + pcb_0 = left + pcb_1 = center + pcb_2 = right +*/ + +ROM_START( driveyes ) + // pcb_1 - center + ROM_REGION( 0x40000, "pcb_1:maincpu", 0 ) /* C68C - 68k code */ + ROM_LOAD16_BYTE( "de2-mp-ub.3j", 0x000000, 0x20000, CRC(f9c86fb5) SHA1(b48d16e8f26e7a2cfecb30285b517c42e5585ac7) ) + ROM_LOAD16_BYTE( "de2-mp-lb.1j", 0x000001, 0x20000, CRC(11d8587a) SHA1(ecb1e8fe2ba56b6f6a71a5552d5663b597165786) ) + + ROM_REGION( 0x40000, "pcb_1:slave", 0 ) /* C68 - 68k code */ + ROM_LOAD16_BYTE( "de1-sp-ub.6c", 0x000000, 0x20000, CRC(231b144f) SHA1(42518614cb083455dc5fec71e699403907ca784b) ) + ROM_LOAD16_BYTE( "de1-sp-lb.4c", 0x000001, 0x20000, CRC(50cb9f59) SHA1(aec7fa080854f0297d9e90e3aaeb0f332fd579bd) ) + + ROM_REGION( 0x20000, "pcb_1:audiocpu", 0 ) /* Sound */ + ROM_LOAD( "de1-snd0.8j", 0x000000, 0x020000, CRC(5474f203) SHA1(e0ae2f6978deb0c934d9311a334a6e36bb402aee) ) /* correct for center view */ + + ROM_REGION( 0x200000, "pcb_1:c140", 0 ) /* sound samples - populated for center view only */ + ROM_LOAD("de1-voi0.12b", 0x040000, 0x40000, CRC(fc44adbd) SHA1(4268bb1f025e47a94212351d1c1cfd0e5029221f) ) + ROM_LOAD("de1-voi1.12c", 0x0c0000, 0x40000, CRC(a71dc55a) SHA1(5e746184db9144ab4e3a97b20195b92b0f56c8cc) ) + ROM_LOAD("de1-voi2.12d", 0x140000, 0x40000, CRC(4d32879a) SHA1(eae65f4b98cee9efe4e5dad7298c3717cfb1e6bf) ) + ROM_LOAD("de1-voi3.12e", 0x1c0000, 0x40000, CRC(e4832d18) SHA1(0460c79d3942aab89a765b0bd8bbddaf19a6d682) ) + + ROM_REGION( 0x8000, "pcb_1:c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x200000, "pcb_1:gfx1", 0 ) /* sprites */ + ROM_LOAD( "de1-obj0.5s", 0x000000, 0x40000, CRC(7438bd53) SHA1(7619c4b56d5c466e845eb45e6157dcaf2a03ad94) ) + ROM_LOAD( "de1-obj4.4s", 0x040000, 0x40000, CRC(335f0ea4) SHA1(9ec065d99ad0874b262b372334179a7e7612558e) ) + ROM_LOAD( "de1-obj1.5x", 0x080000, 0x40000, CRC(45f2334e) SHA1(95f277a4e43d6662ae44d6b69a57f65c72978319) ) + ROM_LOAD( "de1-obj5.4x", 0x0c0000, 0x40000, CRC(9e22999c) SHA1(02624186c359b5e2c96cd3f0e2cb1598ea36dff7) ) + ROM_LOAD( "de1-obj2.3s", 0x100000, 0x40000, CRC(8f1a542c) SHA1(2cb59713607d8929815a9b28bf2a384b6a6c9db8) ) + ROM_LOAD( "de1-obj6.2s", 0x140000, 0x40000, CRC(346df4d5) SHA1(edbadb9db93b7f5a3b064c7f6acb77001cdacce2) ) + ROM_LOAD( "de1-obj3.3x", 0x180000, 0x40000, CRC(fc94544c) SHA1(6297445c64784ee253716f6438d98e5fcd4e7520) ) + ROM_LOAD( "de1-obj7.2x", 0x1c0000, 0x40000, CRC(9ce325d7) SHA1(de4d788bec14842507ed405244974b4fd4f07515) ) + + ROM_REGION16_BE( 0x100000, "pcb_1:data", 0 ) /* 68k */ + ROM_LOAD16_BYTE( "de1-data-u.3a", 0x00000, 0x80000, CRC(fe65d2ab) SHA1(dbe962dda7efa60357fa3a684a265aaad49df5b5) ) + ROM_LOAD16_BYTE( "de1-data-l.1a", 0x00001, 0x80000, CRC(9bb37aca) SHA1(7f5dffc95cadcf12f53ff7944920afc25ed3cf68) ) + + ROM_REGION16_BE( 0xc0000, "pcb_1:namcos21dsp:point16", 0 ) /* 3d objects */ + ROM_LOAD16_BYTE( "de1-pt0-ub.8j", 0x00000, 0x20000, CRC(3b6b746d) SHA1(40c992ef4cf5187b30aba42c5fe7ce0f8f02bee0) ) + ROM_LOAD16_BYTE( "de1-pt0-lb.8d", 0x00001, 0x20000, CRC(9c5c477e) SHA1(c8ae8a663227d636d35bd5f432d23f05d6695942) ) + ROM_LOAD16_BYTE( "de1-pt1-u.8l", 0x40000, 0x20000, CRC(23bc72a1) SHA1(083e2955ae2f88d1ad461517b47054d64375b46e) ) + ROM_LOAD16_BYTE( "de1-pt1-l.8e", 0x40001, 0x20000, CRC(a05ee081) SHA1(1be4c61ad716abb809856e04d4bb450943706a55) ) + ROM_LOAD16_BYTE( "de1-pt2-u.5n", 0x80000, 0x20000, CRC(10e83d81) SHA1(446fedc3b1e258a39fb9467e5327c9f9a9f1ac3f) ) + ROM_LOAD16_BYTE( "de1-pt2-l.7n", 0x80001, 0x20000, CRC(3339a976) SHA1(c9eb9c04f7b3f2a85e5ab64ffb2fe4fcfb6c494b) ) + + ROM_REGION( 0x2000, "pcb_1:nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "nvram", 0x0000, 0x2000, CRC(fa6623e9) SHA1(8c313f136724eb6c829261b223a2ac1fc08d00c2) ) + + // pcb_0 - left + ROM_REGION( 0x40000, "pcb_0:maincpu", 0 ) /* C68C - 68k code */ + ROM_LOAD16_BYTE( "de2-mp-ub.3j", 0x000000, 0x20000, CRC(f9c86fb5) SHA1(b48d16e8f26e7a2cfecb30285b517c42e5585ac7) ) + ROM_LOAD16_BYTE( "de2-mp-lb.1j", 0x000001, 0x20000, CRC(11d8587a) SHA1(ecb1e8fe2ba56b6f6a71a5552d5663b597165786) ) + + ROM_REGION( 0x40000, "pcb_0:slave", 0 ) /* C68 - 68k code */ + ROM_LOAD16_BYTE( "de1-sp-ub.6c", 0x000000, 0x20000, CRC(231b144f) SHA1(42518614cb083455dc5fec71e699403907ca784b) ) + ROM_LOAD16_BYTE( "de1-sp-lb.4c", 0x000001, 0x20000, CRC(50cb9f59) SHA1(aec7fa080854f0297d9e90e3aaeb0f332fd579bd) ) + + ROM_REGION( 0x20000, "pcb_0:audiocpu", 0 ) /* Sound */ + ROM_LOAD( "de1-snd0r.8j", 0x000000, 0x020000, CRC(7bbeda42) SHA1(fe840cc9069758928492bbeec79acded18daafd9) ) // correct for left & right views + + ROM_REGION( 0x200000, "pcb_0:c140", ROMREGION_ERASE00 ) /* sound samples */ + /* unpopulated for left / right views */ + + ROM_REGION( 0x8000, "pcb_0:c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x200000, "pcb_0:gfx1", 0 ) /* sprites */ + ROM_LOAD( "de1-obj0.5s", 0x000000, 0x40000, CRC(7438bd53) SHA1(7619c4b56d5c466e845eb45e6157dcaf2a03ad94) ) + ROM_LOAD( "de1-obj4.4s", 0x040000, 0x40000, CRC(335f0ea4) SHA1(9ec065d99ad0874b262b372334179a7e7612558e) ) + ROM_LOAD( "de1-obj1.5x", 0x080000, 0x40000, CRC(45f2334e) SHA1(95f277a4e43d6662ae44d6b69a57f65c72978319) ) + ROM_LOAD( "de1-obj5.4x", 0x0c0000, 0x40000, CRC(9e22999c) SHA1(02624186c359b5e2c96cd3f0e2cb1598ea36dff7) ) + ROM_LOAD( "de1-obj2.3s", 0x100000, 0x40000, CRC(8f1a542c) SHA1(2cb59713607d8929815a9b28bf2a384b6a6c9db8) ) + ROM_LOAD( "de1-obj6.2s", 0x140000, 0x40000, CRC(346df4d5) SHA1(edbadb9db93b7f5a3b064c7f6acb77001cdacce2) ) + ROM_LOAD( "de1-obj3.3x", 0x180000, 0x40000, CRC(fc94544c) SHA1(6297445c64784ee253716f6438d98e5fcd4e7520) ) + ROM_LOAD( "de1-obj7.2x", 0x1c0000, 0x40000, CRC(9ce325d7) SHA1(de4d788bec14842507ed405244974b4fd4f07515) ) + + ROM_REGION16_BE( 0x100000, "pcb_0:data", 0 ) /* 68k */ + ROM_LOAD16_BYTE( "de1-data-u.3a", 0x00000, 0x80000, CRC(fe65d2ab) SHA1(dbe962dda7efa60357fa3a684a265aaad49df5b5) ) + ROM_LOAD16_BYTE( "de1-data-l.1a", 0x00001, 0x80000, CRC(9bb37aca) SHA1(7f5dffc95cadcf12f53ff7944920afc25ed3cf68) ) + + ROM_REGION16_BE( 0xc0000, "pcb_0:namcos21dsp:point16", 0 ) /* 3d objects */ + ROM_LOAD16_BYTE( "de1-pt0-ub.8j", 0x00000, 0x20000, CRC(3b6b746d) SHA1(40c992ef4cf5187b30aba42c5fe7ce0f8f02bee0) ) + ROM_LOAD16_BYTE( "de1-pt0-lb.8d", 0x00001, 0x20000, CRC(9c5c477e) SHA1(c8ae8a663227d636d35bd5f432d23f05d6695942) ) + ROM_LOAD16_BYTE( "de1-pt1-u.8l", 0x40000, 0x20000, CRC(23bc72a1) SHA1(083e2955ae2f88d1ad461517b47054d64375b46e) ) + ROM_LOAD16_BYTE( "de1-pt1-l.8e", 0x40001, 0x20000, CRC(a05ee081) SHA1(1be4c61ad716abb809856e04d4bb450943706a55) ) + ROM_LOAD16_BYTE( "de1-pt2-u.5n", 0x80000, 0x20000, CRC(10e83d81) SHA1(446fedc3b1e258a39fb9467e5327c9f9a9f1ac3f) ) + ROM_LOAD16_BYTE( "de1-pt2-l.7n", 0x80001, 0x20000, CRC(3339a976) SHA1(c9eb9c04f7b3f2a85e5ab64ffb2fe4fcfb6c494b) ) + + ROM_REGION( 0x2000, "pcb_0:nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "nvram", 0x0000, 0x2000, CRC(fa6623e9) SHA1(8c313f136724eb6c829261b223a2ac1fc08d00c2) ) + + // pcb_2 - right + ROM_REGION( 0x40000, "pcb_2:maincpu", 0 ) /* C68C - 68k code */ + ROM_LOAD16_BYTE( "de2-mp-ub.3j", 0x000000, 0x20000, CRC(f9c86fb5) SHA1(b48d16e8f26e7a2cfecb30285b517c42e5585ac7) ) + ROM_LOAD16_BYTE( "de2-mp-lb.1j", 0x000001, 0x20000, CRC(11d8587a) SHA1(ecb1e8fe2ba56b6f6a71a5552d5663b597165786) ) + + ROM_REGION( 0x40000, "pcb_2:slave", 0 ) /* C68 - 68k code */ + ROM_LOAD16_BYTE( "de1-sp-ub.6c", 0x000000, 0x20000, CRC(231b144f) SHA1(42518614cb083455dc5fec71e699403907ca784b) ) + ROM_LOAD16_BYTE( "de1-sp-lb.4c", 0x000001, 0x20000, CRC(50cb9f59) SHA1(aec7fa080854f0297d9e90e3aaeb0f332fd579bd) ) + + ROM_REGION( 0x20000, "pcb_2:audiocpu", 0 ) /* Sound */ + ROM_LOAD( "de1-snd0r.8j", 0x000000, 0x020000, CRC(7bbeda42) SHA1(fe840cc9069758928492bbeec79acded18daafd9) ) // correct for left & right views + + ROM_REGION( 0x200000, "pcb_2:c140", ROMREGION_ERASE00 ) /* sound samples */ + /* unpopulated for left / right views */ + + ROM_REGION( 0x8000, "pcb_2:c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x200000, "pcb_2:gfx1", 0 ) /* sprites */ + ROM_LOAD( "de1-obj0.5s", 0x000000, 0x40000, CRC(7438bd53) SHA1(7619c4b56d5c466e845eb45e6157dcaf2a03ad94) ) + ROM_LOAD( "de1-obj4.4s", 0x040000, 0x40000, CRC(335f0ea4) SHA1(9ec065d99ad0874b262b372334179a7e7612558e) ) + ROM_LOAD( "de1-obj1.5x", 0x080000, 0x40000, CRC(45f2334e) SHA1(95f277a4e43d6662ae44d6b69a57f65c72978319) ) + ROM_LOAD( "de1-obj5.4x", 0x0c0000, 0x40000, CRC(9e22999c) SHA1(02624186c359b5e2c96cd3f0e2cb1598ea36dff7) ) + ROM_LOAD( "de1-obj2.3s", 0x100000, 0x40000, CRC(8f1a542c) SHA1(2cb59713607d8929815a9b28bf2a384b6a6c9db8) ) + ROM_LOAD( "de1-obj6.2s", 0x140000, 0x40000, CRC(346df4d5) SHA1(edbadb9db93b7f5a3b064c7f6acb77001cdacce2) ) + ROM_LOAD( "de1-obj3.3x", 0x180000, 0x40000, CRC(fc94544c) SHA1(6297445c64784ee253716f6438d98e5fcd4e7520) ) + ROM_LOAD( "de1-obj7.2x", 0x1c0000, 0x40000, CRC(9ce325d7) SHA1(de4d788bec14842507ed405244974b4fd4f07515) ) + + ROM_REGION16_BE( 0x100000, "pcb_2:data", 0 ) /* 68k */ + ROM_LOAD16_BYTE( "de1-data-u.3a", 0x00000, 0x80000, CRC(fe65d2ab) SHA1(dbe962dda7efa60357fa3a684a265aaad49df5b5) ) + ROM_LOAD16_BYTE( "de1-data-l.1a", 0x00001, 0x80000, CRC(9bb37aca) SHA1(7f5dffc95cadcf12f53ff7944920afc25ed3cf68) ) + + ROM_REGION16_BE( 0xc0000, "pcb_2:namcos21dsp:point16", 0 ) /* 3d objects */ + ROM_LOAD16_BYTE( "de1-pt0-ub.8j", 0x00000, 0x20000, CRC(3b6b746d) SHA1(40c992ef4cf5187b30aba42c5fe7ce0f8f02bee0) ) + ROM_LOAD16_BYTE( "de1-pt0-lb.8d", 0x00001, 0x20000, CRC(9c5c477e) SHA1(c8ae8a663227d636d35bd5f432d23f05d6695942) ) + ROM_LOAD16_BYTE( "de1-pt1-u.8l", 0x40000, 0x20000, CRC(23bc72a1) SHA1(083e2955ae2f88d1ad461517b47054d64375b46e) ) + ROM_LOAD16_BYTE( "de1-pt1-l.8e", 0x40001, 0x20000, CRC(a05ee081) SHA1(1be4c61ad716abb809856e04d4bb450943706a55) ) + ROM_LOAD16_BYTE( "de1-pt2-u.5n", 0x80000, 0x20000, CRC(10e83d81) SHA1(446fedc3b1e258a39fb9467e5327c9f9a9f1ac3f) ) + ROM_LOAD16_BYTE( "de1-pt2-l.7n", 0x80001, 0x20000, CRC(3339a976) SHA1(c9eb9c04f7b3f2a85e5ab64ffb2fe4fcfb6c494b) ) + + + ROM_REGION( 0x2000, "pcb_2:nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "nvram", 0x0000, 0x2000, CRC(fa6623e9) SHA1(8c313f136724eb6c829261b223a2ac1fc08d00c2) ) +ROM_END + + +/* YEAR NAME PARENT MACHINE INPUT CLASS INIT MONITOR COMPANY FULLNAME FLAGS */ + +// 3 PCB stacks in a single cage (3x 4 PCBs) linked for 3 screen panorama, boards look similar to original Namco System 21 (not 21B) including TMS320C25 DSP, but use C68 I/O MCU and sprite chip instead of "68000 'GPU'" ? +GAME( 1992, driveyes, 0, driveyes, driveyes, namcos21_de_state, empty_init, ROT0, "Namco", "Driver's Eyes (Japan) (1992/01/10, Main Ver 2.1, Sub Ver 1.1)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN) + diff --git a/src/mame/drivers/namcos22.cpp b/src/mame/drivers/namcos22.cpp index a2aeb4bbdbd..642aa45001d 100644 --- a/src/mame/drivers/namcos22.cpp +++ b/src/mame/drivers/namcos22.cpp @@ -1,7 +1,7 @@ // license:BSD-3-Clause // copyright-holders:Phil Stroffolino, hap, R. Belmont /** - * This driver describes Namco's System22 and Super System 22 hardware. + * This driver describes Namco's System22 and System Super22 hardware. * * driver provided with thanks to: * - hap @@ -10,6 +10,43 @@ * - trackmaster@gmx.net (Bjorn Sunder) * - team vivanonno * + * TODO: + * - finish slave DSP emulation + * - emulate System22 I/O board C74 + * - tokyowar tanks are not shootable, same for timecris helicopter, there's still a very small hitbox but almost impossible to hit. + * - alpinesa doesn't work, protection related? + * - C139 for linked cabinets, as well as in RR fullscale + * - confirm DSP and MCU clocks and their IRQ timing + * - EEPROM write timing should be around 5ms, it doesn't do any data/rdy polling + * - texture u/v mapping is often 1 pixel off, resulting in many glitch lines/gaps between textures. The glitch may be in MAME core: + * it used to be much worse with the legacy_poly_manager + * - find out how/where vics num_sprites is determined exactly, currently a workaround is needed for airco22b and dirtdash + * - improve ss22 lighting: + * + mountains in alpinr2b selection screen + * + ridgerac waving flag shadowing + * + cybrcomm enemies should flash white when you shoot them, probably lighting related + * - improve ss22 spot: + * + dirtdash record time message creates a 'gap' in the spotlight when entering the jungle level + * + how is it enabled exactly? the enable bit in spotram is set in tokyowar too(which doesn't use spot) + * + what is the high bit in spot_factor for? darkness instead of brightness? not used anywhere + * - support for text layer video partial updates after posirq, alpinesa does raster effects on it + * - alpha blended sprite/poly with priority over alpha blended text doesn't work right (see dirtdash countdown when you start at jungle level) + * - cybrcomm arrows(black part) should be below textlayer when a messagebox pops up + * - cybrcycc speed dial needle is missing + * - window clipping is wrong in acedrvrw, victlapw (see rear-view mirrors), and alpinr2b character selection screen + * - global offset is wrong in non-super22 servicemode video test, and above that, it flickers in acedrvrw, victlapw + * - dirtdash polys are broken at the start section of the mountain level, maybe bad rom? + * - ridgerac fogging isn't applied to the upper/side part of the sky (best seen when driving down a hill), it's fine in ridgera2 + * czram contents is rather odd here and partly cleared (probably the cause?): + * $0000-$0d7f - gradual increase from $00-$7c + * $0d80-$0fff - $73, huh, why lower? + * $1000-$19ff - $00, huh!? (it's specifically cleared, memsetting czram at boot does not fix the issue) + * $1a00-$0dff - $77 + * $1e00-$1fff - $78 + * + * - lots of smaller issues + * + ********************************************************************************************************** * Input * - input ports require manual calibration through built-in diagnostics (or canned EEPROM) * @@ -18,12 +55,6 @@ * - lamps/LEDs on some cabinets * - time crisis has force feedback for the guns * - * Link - * - SCI (link) feature is not yet hooked up - * - * CPU Emulation issues - * - slave DSP is not yet used in-game - * * Notes: * The "dipswitch" settings are ignored in many games - this isn't a bug. For example, Prop Cycle software * explicitly clears the chunk of work RAM used to cache the 8 bit dipswitch value immediately after @@ -86,7 +117,7 @@ * - some (typically racing) games may be linked together * - serial controller is C139 SCI (same as System21). * - * "Super" System22 + * System Super22 * - different memory map * - different CPU controller register layout * - sound CPU uses external ROM (i.e. pr1data.8k) instead of internal BIOS (C74) @@ -1165,24 +1196,24 @@ #include "sound/c352.h" #include "speaker.h" +// 51.2MHz XTAL on video board, pixel clock of 12.8MHz (doubled in MAME because of unemulated interlacing) +// HSync - 15.7248 kHz -> htotal = 814.001 +// VSync - 59.9042 Hz -> vtotal = 524.998 (262+263) +#define PIXEL_CLOCK (51.2_MHz_XTAL/4*2) -#define SS22_MASTER_CLOCK (XTAL(49'152'000)) /* info from Guru */ - -#define PIXEL_CLOCK (SS22_MASTER_CLOCK/2) - -// VSync - 59.9042 Hz -// HSync - 15.7248 kHz (may be inaccurate) -#define HTOTAL (800) +#define HTOTAL (814) #define HBEND (0) #define HBSTART (640) -#define VTOTAL (512) +#define VTOTAL (525) #define VBEND (0) #define VBSTART (480) -#define MCU_SPEEDUP 1 /* mcu idle skipping */ - +#define MCU_SPEEDUP 1 /* mcu idle skipping */ +#define SERIAL_IO_PERIOD (100) /* lower DSP serial I/O period */ +// actual dsp serial freq is unknown, should be much higher than 100Hz of course +// serial comms doesn't work yet anyway /*********************************************************************************************/ @@ -1201,10 +1232,8 @@ READ32_MEMBER(namcos22_state::namcos22_sci_r) } } -#if 0 WRITE32_MEMBER(namcos22_state::namcos22_sci_w) { - COMBINE_DATA(&m_sci_regs[offset]); /* 20020000 2 R/W RX Status 0x01 : Frame Error @@ -1232,22 +1261,98 @@ WRITE32_MEMBER(namcos22_state::namcos22_sci_w) 2002000e 2 W TX FIFO Pointer (0x0000 - 0x1fff) */ } -#endif -/* system controller (super system22) +// System Controller + +void namcos22_state::syscon_irqlevel(offs_t offset, u8 data) +{ + int line = 1 << offset; + int oldlevel = m_syscontrol[offset] & 7; + int newlevel = data & 7; + + m_irq_enabled &= ~line; + if (m_is_ss22) + m_irq_enabled |= (newlevel != 0) ? line : 0; + else + m_irq_enabled |= (data & 0x10) ? line : 0; // always sets 0x30 to enable + + // change active state + if (m_irq_state & line) + { + if (!(m_irq_enabled & line)) + { + syscon_irqack(offset, 0); + } + else if (oldlevel != newlevel) + { + m_maincpu->set_input_line(oldlevel, CLEAR_LINE); + m_maincpu->set_input_line(newlevel, ASSERT_LINE); + } + } +} + +void namcos22_state::syscon_irqack(offs_t offset, u8 data) +{ + int line = 1 << offset; + int level = m_syscontrol[offset] & 7; + + m_irq_state &= ~line; + m_maincpu->set_input_line(level, CLEAR_LINE); +} + +void namcos22_state::syscon_dspcontrol(offs_t offset, u8 data) +{ + if (data == m_syscontrol[offset]) + return; + + if (data == 0) + { + // disable DSPs + master_enable(false); + slave_enable(false); + m_dsp_irq_enabled = false; + } + else if (data == 1) + { + // enable dsp and rendering subsystem + master_enable(true); + slave_enable(true); + m_dsp_irq_enabled = true; + } + else if (data == 0xff) + { + // used to upload game-specific code to master/slave dsps + master_enable(true); + m_dsp_irq_enabled = false; + } +} + +void namcos22_state::syscon_mcucontrol(offs_t offset, u8 data) +{ + // enable/disable mcu + m_mcu->set_input_line(INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE); +} + +READ8_MEMBER(namcos22_state::syscon_r) +{ + return m_syscontrol[offset]; +} + + +/* System Controller (System Super22) 0x00: vblank irq level 0x01: hblank irq level 0x02: sci irq level -0x03: unk irq level (unused?) +0x03: unknown irq level (unused?) 0x04: vblank irq ack 0x05: hblank irq ack 0x06: sci irq ack -0x07: unk irq ack +0x07: unknown irq ack -0x08: unknown +0x08: ? 0x09: 0x62 or 0x61 0x0a: 0x62 0x0b: 0x57 @@ -1274,7 +1379,7 @@ WRITE32_MEMBER(namcos22_state::namcos22_sci_w) 0x1c: dsp control */ -WRITE8_MEMBER(namcos22_state::namcos22s_system_controller_w) +WRITE8_MEMBER(namcos22_state::ss22_syscon_w) { switch (offset) { @@ -1283,68 +1388,29 @@ WRITE8_MEMBER(namcos22_state::namcos22s_system_controller_w) case 0x01: // hblank case 0x02: // SCI case 0x03: // unknown - { - int line = 1 << offset; - int oldlevel = m_syscontrol[offset] & 7; - int newlevel = data & 7; - if (m_irq_state & line && oldlevel != newlevel) - { - m_maincpu->set_input_line(oldlevel, CLEAR_LINE); - if (newlevel) - m_maincpu->set_input_line(newlevel, ASSERT_LINE); - else - m_irq_state &= ~line; - } + syscon_irqlevel(offset, data); break; - } // acknowledge irqs case 0x04: // vblank case 0x05: // hblank case 0x06: // SCI case 0x07: // unknown - { - int line = 1 << (offset-4); - m_irq_state &= ~line; - m_maincpu->set_input_line(m_syscontrol[offset-4] & 7, CLEAR_LINE); + syscon_irqack(offset-4, data); break; - } // watchdog case 0x14: break; - // reset mcu + // mcu reset case 0x16: - m_mcu->set_input_line(INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE); + syscon_mcucontrol(offset, data); break; // dsp control case 0x1c: - if (data != m_syscontrol[0x1c]) - { - if (data == 0) - { - /* disable DSPs */ - m_master->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - m_slave->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - enable_slave_simulation(false); - m_dsp_irq_enabled = false; - } - else if (data == 1) - { - /* enable dsp and rendering subsystem */ - m_master->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); - enable_slave_simulation(true); - m_dsp_irq_enabled = true; - } - else if (data == 0xff) - { - /* used to upload game-specific code to master/slave dsps */ - m_master->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); - m_dsp_irq_enabled = false; - } - } + syscon_dspcontrol(offset, data); break; // other regs: unknown @@ -1353,8 +1419,19 @@ WRITE8_MEMBER(namcos22_state::namcos22s_system_controller_w) } m_syscontrol[offset] = data; -} + return; + + std::string msg; + for (int i=0;i<0x20;i++) + { + if (i==0x10) msg+="\n"; + char h[4]; + sprintf(h, "%02X ",m_syscontrol[i]); + msg += h; + } + popmessage("%s",msg); +} /* 000064: 0000 8C9A (1) @@ -1370,30 +1447,30 @@ WRITE8_MEMBER(namcos22_state::namcos22s_system_controller_w) */ INTERRUPT_GEN_MEMBER(namcos22_state::namcos22s_interrupt) { - if (m_syscontrol[0x00] & 7) + // vblank irq + int line = 1 << 0; + if (m_irq_enabled & line) { - // vblank irq - m_irq_state |= (1 << 0x00); - device.execute().set_input_line(m_syscontrol[0x00] & 7, ASSERT_LINE); + m_irq_state |= line; + device.execute().set_input_line(m_syscontrol[0] & 7, ASSERT_LINE); } } +/* System Controller (System22) -/* system controller (system22) - -0x00: IRQ (unknown) +0x00: hblank irq level 0x01: ? -0x02: SCI IRQ level -0x03: IRQ (unknown) +0x02: sci irq level +0x03: unknown irq level -0x04: VSYNC IRQ level -0x05: IRQ (unknown) acknowledge +0x04: vblank irq level +0x05: hblank irq ack 0x06: ? -0x07: SCI IRQ acknowledge +0x07: sci irq ack -0x08: IRQ (unknown) acknowledge -0x09: VSYNC IRQ acknowledge +0x08: unknown irq ack +0x09: vblank irq ack 0x0a: ? 0x0b: ? @@ -1417,79 +1494,40 @@ INTERRUPT_GEN_MEMBER(namcos22_state::namcos22s_interrupt) 0x1a: 0 or 1 or 0xff -> DSP control 0x1b: ? */ -WRITE8_MEMBER(namcos22_state::namcos22_system_controller_w) +WRITE8_MEMBER(namcos22_state::s22_syscon_w) { switch (offset) { // irq level / enable irqs - case 0x00: // unknown + case 0x00: // hblank case 0x01: // ? case 0x02: // SCI case 0x03: // unknown case 0x04: // vblank - { - int line = 1 << offset; - int oldlevel = m_syscontrol[offset] & 7; - int newlevel = data & 7; - if (m_irq_state & line && oldlevel != newlevel) - { - m_maincpu->set_input_line(oldlevel, CLEAR_LINE); - if (newlevel) - m_maincpu->set_input_line(newlevel, ASSERT_LINE); - else - m_irq_state &= ~line; - } + syscon_irqlevel(offset, data); break; - } // acknowledge irqs - case 0x05: // unknown + case 0x05: // hblank case 0x06: // ? case 0x07: // SCI case 0x08: // unknown case 0x09: // vblank - { - int line = 1 << (offset-5); - m_irq_state &= ~line; - m_maincpu->set_input_line(m_syscontrol[offset-5] & 7, CLEAR_LINE); + syscon_irqack(offset-5, data); break; - } // watchdog case 0x16: break; - // reset mcu + // mcu reset case 0x18: - m_mcu->set_input_line(INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE); + syscon_mcucontrol(offset, data); break; // dsp control case 0x1a: - if (data != m_syscontrol[0x1a]) - { - if (data == 0) - { - /* disable DSPs */ - m_master->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - m_slave->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - enable_slave_simulation(false); - m_dsp_irq_enabled = false; - } - else if (data == 1) - { - /* enable dsp and rendering subsystem */ - m_master->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); - enable_slave_simulation(true); - m_dsp_irq_enabled = true; - } - else if (data == 0xff) - { - /* used to upload game-specific code to master/slave dsps */ - m_master->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); - m_dsp_irq_enabled = false; - } - } + syscon_dspcontrol(offset, data); break; // other regs: unknown @@ -1564,17 +1602,24 @@ INTERRUPT_GEN_MEMBER(namcos22_state::namcos22_interrupt) break; } - if (m_syscontrol[0x04] & 7) + // vblank irq + int line = 1 << 4; + if (m_irq_enabled & line) { - // vblank irq - m_irq_state |= (1 << 0x04); - device.execute().set_input_line(m_syscontrol[0x04] & 7, ASSERT_LINE); + m_irq_state |= line; + device.execute().set_input_line(m_syscontrol[4] & 7, ASSERT_LINE); } } -READ8_MEMBER(namcos22_state::namcos22_system_controller_r) + +READ16_MEMBER(namcos22_state::namcos22_shared_r) { - return m_syscontrol[offset]; + return m_shareram[offset]; +} + +WRITE16_MEMBER(namcos22_state::namcos22_shared_w) +{ + COMBINE_DATA(&m_shareram[offset]); } @@ -1651,7 +1696,7 @@ READ16_MEMBER(namcos22_state::namcos22_keycus_r) } // pick a random number, but don't pick the same twice in a row - uint16_t old_rng = m_keycus_rng; + u16 old_rng = m_keycus_rng; do { m_keycus_rng = machine().rand() & 0xffff; @@ -1682,7 +1727,7 @@ WRITE16_MEMBER(namcos22_state::namcos22_keycus_w) */ READ16_MEMBER(namcos22_state::namcos22_portbit_r) { - uint16_t ret = m_portbits[offset] & 1; + u16 ret = m_portbits[offset] & 1; m_portbits[offset] = m_portbits[offset] >> 1 | 0x8000; return ret; } @@ -1700,8 +1745,8 @@ READ16_MEMBER(namcos22_state::namcos22_dipswitch_r) WRITE16_MEMBER(namcos22_state::namcos22_cpuleds_w) { // 8 leds on cpu board, 0=on 1=off - // on system 22: two rows of 4 red leds - // on super system 22: GYRGYRGY green/yellow/red + // on System22: two rows of 4 red leds + // on SS22: GYRGYRGY green/yellow/red for (int i = 0; i < 8; i++) m_cpuled[i] = (~data << i & 0x80) ? 0 : 1; } @@ -1723,7 +1768,7 @@ WRITE32_MEMBER(namcos22_state::namcos22s_chipselect_w) } -// System 22 +// System22 void namcos22_state::namcos22_am(address_map &map) { /** @@ -1792,21 +1837,21 @@ void namcos22_state::namcos22_am(address_map &map) * 2002000c 2 R/W RX FIFO Pointer (0x0000 - 0x0fff) * 2002000e 2 W TX FIFO Pointer (0x0000 - 0x1fff) */ - map(0x20020000, 0x2002000f).r(FUNC(namcos22_state::namcos22_sci_r)).writeonly(); + map(0x20020000, 0x2002000f).rw(FUNC(namcos22_state::namcos22_sci_r), FUNC(namcos22_state::namcos22_sci_w)); /** * System Controller: Interrupt Control, Peripheral Control * */ - map(0x40000000, 0x4000001f).rw(FUNC(namcos22_state::namcos22_system_controller_r), FUNC(namcos22_state::namcos22_system_controller_w)); + map(0x40000000, 0x4000001f).rw(FUNC(namcos22_state::syscon_r), FUNC(namcos22_state::s22_syscon_w)); /** * Unknown Device (optional for diagnostics?) * * zero means not-connected. - * may be related to device at 0x94000000 + * may be related to device at 0x90040000 */ - map(0x48000000, 0x4800003f).nopr().nopw(); + map(0x48000000, 0x4800003f).noprw(); /** * DIPSW @@ -1863,7 +1908,7 @@ void namcos22_state::namcos22_am(address_map &map) * +0x0300 - 0x03ff? Song Title (put messages here from Sound CPU) */ map(0x60000000, 0x60003fff).nopw(); - map(0x60004000, 0x6000bfff).ram().share("shareram"); + map(0x60004000, 0x6000bfff).rw(FUNC(namcos22_state::namcos22_shared_r), FUNC(namcos22_state::namcos22_shared_w)); /** * C71 (TI TMS320C25 DSP) Shared RAM (0x70000000 - 0x70020000) @@ -1878,7 +1923,7 @@ void namcos22_state::namcos22_am(address_map &map) /** * LED on PCB(?) */ - map(0x90000000, 0x90000003).ram(); + map(0x90000000, 0x90000003).nopw(); /** * Depth-cueing Look-up Table (fog density between near to far) @@ -1902,9 +1947,9 @@ void namcos22_state::namcos22_am(address_map &map) /** * unknown (option) - * Note: This device may be optional. This may relate to device at 0x40000000 + * Note: This device may be optional. This may relate to device at 0x48000000 */ - map(0x90040000, 0x9007ffff).ram(); /* diagnostic ROM? */ + map(0x90040000, 0x9007ffff).nopr(); /* diagnostic ROM? */ /** * Tilemap PCG Memory @@ -1923,46 +1968,48 @@ void namcos22_state::namcos22_am(address_map &map) * Tilemap Register * Mounted position: unknown */ - map(0x900a0000, 0x900a000f).rw(FUNC(namcos22_state::namcos22_tilemapattr_r), FUNC(namcos22_state::namcos22_tilemapattr_w)).share("tilemapattr"); + map(0x900a0000, 0x900a000f).rw(FUNC(namcos22_state::namcos22_tilemapattr_r), FUNC(namcos22_state::namcos22_tilemapattr_w)); } -// Super System 22 +// System Super22 void namcos22_state::namcos22s_am(address_map &map) { map(0x000000, 0x3fffff).rom(); map(0x400000, 0x40001f).rw(FUNC(namcos22_state::namcos22_keycus_r), FUNC(namcos22_state::namcos22_keycus_w)); - map(0x410000, 0x413fff).ram(); /* C139 SCI buffer */ - map(0x420000, 0x42000f).r(FUNC(namcos22_state::namcos22_sci_r)).writeonly(); /* C139 SCI registers */ - map(0x440000, 0x440003).rw(FUNC(namcos22_state::namcos22_dipswitch_r), FUNC(namcos22_state::namcos22_cpuleds_w)); + map(0x410000, 0x413fff).ram(); // C139 SCI buffer + map(0x420000, 0x42000f).rw(FUNC(namcos22_state::namcos22_sci_r), FUNC(namcos22_state::namcos22_sci_w)); // C139 SCI registers + map(0x430000, 0x430003).w(FUNC(namcos22_state::namcos22_cpuleds_w)); + map(0x440000, 0x440003).r(FUNC(namcos22_state::namcos22_dipswitch_r)); map(0x450008, 0x45000b).rw(FUNC(namcos22_state::namcos22_portbit_r), FUNC(namcos22_state::namcos22_portbit_w)); map(0x460000, 0x463fff).rw(m_eeprom, FUNC(eeprom_parallel_28xx_device::read), FUNC(eeprom_parallel_28xx_device::write)).umask32(0xff00ff00); - map(0x700000, 0x70001f).rw(FUNC(namcos22_state::namcos22_system_controller_r), FUNC(namcos22_state::namcos22s_system_controller_w)); + map(0x700000, 0x70001f).rw(FUNC(namcos22_state::syscon_r), FUNC(namcos22_state::ss22_syscon_w)); map(0x800000, 0x800003).w(FUNC(namcos22_state::namcos22s_chipselect_w)); - map(0x810000, 0x81000f).ram().share("czattr"); + map(0x810000, 0x81000f).rw(FUNC(namcos22_state::namcos22s_czattr_r), FUNC(namcos22_state::namcos22s_czattr_w)); map(0x810200, 0x8103ff).rw(FUNC(namcos22_state::namcos22s_czram_r), FUNC(namcos22_state::namcos22s_czram_w)); - map(0x820000, 0x8202ff).nopw(); /* leftover of old (non-super) video mixer device */ + map(0x820000, 0x8202ff).nopw(); // leftover of old (non-super) video mixer device map(0x824000, 0x8243ff).ram().share("video_mixer"); map(0x828000, 0x83ffff).ram().w(FUNC(namcos22_state::namcos22_paletteram_w)).share("paletteram"); - map(0x860000, 0x860007).rw(FUNC(namcos22_state::namcos22s_spotram_r), FUNC(namcos22_state::namcos22s_spotram_w)); + map(0x860000, 0x860007).rw(FUNC(namcos22_state::spotram_r), FUNC(namcos22_state::spotram_w)); map(0x880000, 0x89dfff).ram().w(FUNC(namcos22_state::namcos22_cgram_w)).share("cgram"); map(0x89e000, 0x89ffff).ram().w(FUNC(namcos22_state::namcos22_textram_w)).share("textram"); - map(0x8a0000, 0x8a000f).rw(FUNC(namcos22_state::namcos22_tilemapattr_r), FUNC(namcos22_state::namcos22_tilemapattr_w)).share("tilemapattr"); + map(0x8a0000, 0x8a000f).rw(FUNC(namcos22_state::namcos22_tilemapattr_r), FUNC(namcos22_state::namcos22_tilemapattr_w)); map(0x900000, 0x90ffff).ram().share("vics_data"); map(0x940000, 0x94007f).rw(FUNC(namcos22_state::namcos22s_vics_control_r), FUNC(namcos22_state::namcos22s_vics_control_w)).share("vics_control"); - map(0x980000, 0x9affff).ram().share("spriteram"); /* C374 */ - map(0xa04000, 0xa0bfff).ram().share("shareram"); /* COM RAM */ + map(0x980000, 0x9affff).ram().share("spriteram"); // C374 + map(0xa04000, 0xa0bfff).rw(FUNC(namcos22_state::namcos22_shared_r), FUNC(namcos22_state::namcos22_shared_w)); // COM RAM map(0xc00000, 0xc1ffff).rw(FUNC(namcos22_state::namcos22_dspram_r), FUNC(namcos22_state::namcos22_dspram_w)).share("polygonram"); - map(0xe00000, 0xe3ffff).ram(); /* workram */ + map(0xe00000, 0xe3ffff).ram(); // workram } // Time Crisis gun READ32_MEMBER(namcos22_state::namcos22_gun_r) { - uint16_t xpos = ioport("LIGHTX")->read(); - uint16_t ypos = ioport("LIGHTY")->read(); + int xpos = ioport("LIGHTX")->read(); + int ypos = ioport("LIGHTY")->read(); // ypos is not completely understood yet, there should be a difference between case 1 and 2 + // game determines real y = 430004 + 430008 switch (offset) { @@ -2025,27 +2072,21 @@ void namcos22_state::alpinesa_am(address_map &map) // DSPs -void namcos22_state::enable_slave_simulation(bool enable) +void namcos22_state::master_enable(bool enable) { - m_slave_simulation_active = enable; + m_master->set_input_line(INPUT_LINE_RESET, enable ? CLEAR_LINE : ASSERT_LINE); } -void namcos22_state::slave_halt() +void namcos22_state::slave_enable(bool enable) { - m_slave->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - enable_slave_simulation(false); -} - -void namcos22_state::slave_enable() -{ -// m_slave->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); - enable_slave_simulation(true); + m_slave->set_input_line(INPUT_LINE_RESET, enable ? CLEAR_LINE : ASSERT_LINE); + m_slave_simulation_active = enable; } READ16_MEMBER(namcos22_state::namcos22_dspram16_r) { - uint32_t value = m_polygonram[offset]; + u32 value = m_polygonram[offset]; switch (m_dspram_bank) { @@ -2066,14 +2107,14 @@ READ16_MEMBER(namcos22_state::namcos22_dspram16_r) break; } - return (uint16_t)value; + return value; } WRITE16_MEMBER(namcos22_state::namcos22_dspram16_w) { - uint32_t value = m_polygonram[offset]; - uint16_t lo = value & 0xffff; - uint16_t hi = value >> 16; + u32 value = m_polygonram[offset]; + u16 lo = value & 0xffff; + u16 hi = value >> 16; switch (m_dspram_bank) { @@ -2103,7 +2144,7 @@ WRITE16_MEMBER(namcos22_state::namcos22_dspram16_bank_w) } -void namcos22_state::point_write(offs_t offs, uint32_t data) +void namcos22_state::point_write(offs_t offs, u32 data) { offs &= 0x00ffffff; /* 24 bit addressing */ if (m_is_ss22) @@ -2118,28 +2159,19 @@ void namcos22_state::point_write(offs_t offs, uint32_t data) } } -int32_t namcos22_state::point_read(int32_t addr) +s32 namcos22_state::pointram_read(offs_t offs) // called from point_read { - if (addr < 0) - return -1; - - // point rom - else if (addr < m_pointrom_size) - return m_pointrom[addr]; - - // point ram, only used in ram test? - int32_t result = 0; + // point ram, only used in ram test and ridgerac flag? + s32 result = -1; if (m_is_ss22) { - if (addr >= 0xf80000 && addr < 0xfa0000) - result = m_pointram[addr - 0xf80000]; - else return -1; + if (offs >= 0xf80000 && offs < 0xfa0000) + result = m_pointram[offs - 0xf80000]; } else { - if (addr >= 0xf00000 && addr < 0xf20000) - result = m_pointram[addr - 0xf00000]; - else return -1; + if (offs >= 0xf00000 && offs < 0xf20000) + result = m_pointram[offs - 0xf00000]; } // sign extend or crop @@ -2166,12 +2198,13 @@ WRITE16_MEMBER(namcos22_state::point_hiword_w) READ16_MEMBER(namcos22_state::point_loword_r) { - return point_read(m_point_address & 0x00ffffff) & 0xffff; + return point_read(m_point_address) & 0xffff; } READ16_MEMBER(namcos22_state::point_hiword_ir) { - return point_read(m_point_address++ & 0x00ffffff) >> 16 & 0xffff; + // high bit is unknown busy signal (ridgerac, ridgera2, raveracw, cybrcomm) + return 0x8000 | (point_read(m_point_address++) >> 16 & 0x00ff); } @@ -2180,145 +2213,141 @@ READ16_MEMBER(namcos22_state::pdp_status_r) return m_dsp_master_bioz; } -uint32_t namcos22_state::pdp_polygonram_read(offs_t offs) +READ16_MEMBER(namcos22_state::pdp_begin_r) { - return m_polygonram[offs & 0x7fff]; -} + if (machine().side_effects_disabled()) + return 0; -void namcos22_state::pdp_polygonram_write(offs_t offs, uint32_t data) -{ - m_polygonram[offs & 0x7fff] = data; -} + /** + * This presumably kickstarts the PDP(polygon display parser/processor?) + * It parses through the displaylist and sends commands to the 3D render device. + * In MAME, this main task is done in simulate_slavedsp instead. Ideally, we'd make the PDP a device with execute_run + * SS22 supports more than just "goto" and render commands, they are handled here. + */ + m_pdp_frame = m_screen->frame_number(); + if (m_screen->vblank()) + m_pdp_frame++; + m_pdp_render_done = true; -READ16_MEMBER(namcos22_state::pdp_begin_r) -{ - /* this feature appears to be only used on Super System22 hardware */ - if (m_is_ss22) + m_dsp_master_bioz = 1; + u16 offs = (m_is_ss22) ? pdp_polygonram_read(0x7fff) : m_pdp_base; + + if (!m_is_ss22) + return 0; + + for (;;) { - uint16_t offs = pdp_polygonram_read(0x7fff); - m_dsp_master_bioz = 1; - for (;;) + offs &= 0x7fff; + u16 start = offs; + u16 cmd = pdp_polygonram_read(offs++); + u32 srcAddr; + u32 dstAddr; + u32 numWords; + u32 data; + switch (cmd) { - uint16_t start = offs; - uint16_t cmd = pdp_polygonram_read(offs++); - uint32_t srcAddr; - uint32_t dstAddr; - uint32_t numWords; - uint32_t data; - switch (cmd) - { - case 0xfff0: - /* NOP? used in 'PDP LOOP TEST' */ - break; - - case 0xfff5: - /* write to point ram */ - dstAddr = pdp_polygonram_read(offs++); /* 32 bit PointRAM address */ - data = pdp_polygonram_read(offs++); /* 24 bit data */ - point_write(dstAddr, data); - break; + case 0xfff0: + // NOP? used in 'PDP LOOP TEST' + break; - case 0xfff6: - /* read word from point ram */ - srcAddr = pdp_polygonram_read(offs++); /* 32 bit PointRAM address */ - dstAddr = pdp_polygonram_read(offs++); /* CommRAM address; receives 24 bit PointRAM data */ - data = point_read(srcAddr & 0x00ffffff); - pdp_polygonram_write(dstAddr, data); - break; + case 0xfff5: + // write to point ram + dstAddr = pdp_polygonram_read(offs++); // 32 bit PointRAM address + data = pdp_polygonram_read(offs++); // 24 bit data + point_write(dstAddr, data); + break; - case 0xfff7: - /* block move (CommRAM to CommRAM) */ - srcAddr = pdp_polygonram_read(offs++); - dstAddr = pdp_polygonram_read(offs++); - numWords = pdp_polygonram_read(offs++); - while (numWords--) - { - data = pdp_polygonram_read(srcAddr++); - pdp_polygonram_write(dstAddr++, data); - } - break; + case 0xfff6: + /* read word from point ram */ + srcAddr = pdp_polygonram_read(offs++); // 32 bit PointRAM address + dstAddr = pdp_polygonram_read(offs++); // CommRAM address; receives 24 bit PointRAM data + data = point_read(srcAddr); + pdp_polygonram_write(dstAddr, data); + break; - case 0xfffa: - /* read block from point ram */ - srcAddr = pdp_polygonram_read(offs++); /* 32 bit PointRAM address */ - dstAddr = pdp_polygonram_read(offs++); /* CommRAM address; receives data */ - numWords = pdp_polygonram_read(offs++); /* block size */ - while (numWords--) - { - data = point_read(srcAddr++ & 0x00ffffff); - pdp_polygonram_write(dstAddr++, data); - } - break; + case 0xfff7: + // block move (CommRAM to CommRAM) + srcAddr = pdp_polygonram_read(offs++); + dstAddr = pdp_polygonram_read(offs++); + numWords = pdp_polygonram_read(offs++); + while (numWords--) + { + data = pdp_polygonram_read(srcAddr++); + pdp_polygonram_write(dstAddr++, data); + } + break; - case 0xfffb: - /* write block to point ram */ - dstAddr = pdp_polygonram_read(offs++); /* 32 bit PointRAM address */ - numWords = pdp_polygonram_read(offs++); /* block size */ - while (numWords--) - { - data = pdp_polygonram_read(offs++); /* 24 bit source data */ - point_write(dstAddr++, data); - } - break; + case 0xfffa: + // read block from point ram + srcAddr = pdp_polygonram_read(offs++); // 32 bit PointRAM address + dstAddr = pdp_polygonram_read(offs++); // CommRAM address; receives data + numWords = pdp_polygonram_read(offs++); // block size + while (numWords--) + { + data = point_read(srcAddr++); + pdp_polygonram_write(dstAddr++, data); + } + break; - case 0xfffc: - /* point ram to point ram */ - srcAddr = pdp_polygonram_read(offs++); - dstAddr = pdp_polygonram_read(offs++); - numWords = pdp_polygonram_read(offs++); - while (numWords--) - { - data = point_read(srcAddr++ & 0x00ffffff); - point_write(dstAddr++, data); - } - break; + case 0xfffb: + // write block to point ram + dstAddr = pdp_polygonram_read(offs++); // 32 bit PointRAM address + numWords = pdp_polygonram_read(offs++); // block size + while (numWords--) + { + data = pdp_polygonram_read(offs++); // 24 bit source data + point_write(dstAddr++, data); + } + break; - case 0xfffd: - /* direct command to render device */ - // len -> command (eg. BB0003) -> data - numWords = pdp_polygonram_read(offs++); - while (numWords--) - { - data = pdp_polygonram_read(offs++); - //namcos22_WriteDataToRenderDevice(data); - } - break; + case 0xfffc: + // point ram to point ram + srcAddr = pdp_polygonram_read(offs++); + dstAddr = pdp_polygonram_read(offs++); + numWords = pdp_polygonram_read(offs++); + while (numWords--) + { + data = point_read(srcAddr++); + point_write(dstAddr++, data); + } + break; - case 0xfffe: - /* unknown */ - data = pdp_polygonram_read(offs++); /* ??? (usually 0x400 or 0) */ - break; + case 0xfffd: + // direct command to render device + // len -> command (eg. BB0003) -> data + numWords = pdp_polygonram_read(offs++); + while (numWords--) + { + data = pdp_polygonram_read(offs++); + //namcos22_WriteDataToRenderDevice(data); + } + break; - case 0xffff: - /* "goto" command */ - offs = pdp_polygonram_read(offs); - if (offs == start) - { - /* most commands end with a "goto self" */ - return 0; - } - break; + case 0xfffe: + // unknown + data = pdp_polygonram_read(offs++); // ??? (usually 0x400 or 0) + break; - default: - logerror("unknown PDP cmd = 0x%04x!\n", cmd); + case 0xffff: + // "goto" command + offs = pdp_polygonram_read(offs) & 0x7fff; + if (offs == start) + { + // MAME will get stuck with a "goto self", so bail out + // in reality, the cpu can overwrite this address or retrigger pdp_begin return 0; - } + } + break; + + default: + logerror("unknown PDP cmd = 0x%04x!\n", cmd); + return 0; } } return 0; } -READ16_MEMBER(namcos22_state::slave_external_ram_r) -{ - return m_pSlaveExternalRAM[offset]; -} - -WRITE16_MEMBER(namcos22_state::slave_external_ram_w) -{ - COMBINE_DATA(&m_pSlaveExternalRAM[offset]); -} - READ16_MEMBER(namcos22_state::dsp_hold_signal_r) { /* STUB */ @@ -2344,6 +2373,7 @@ WRITE16_MEMBER(namcos22_state::dsp_unk2_w) * Prop Cycle doesn't use this; instead it writes this * addr to the uppermost word of CommRAM. */ + m_pdp_base = data; } READ16_MEMBER(namcos22_state::dsp_unk_port3_r) @@ -2363,7 +2393,7 @@ WRITE16_MEMBER(namcos22_state::upload_code_to_slave_dsp_w) switch (data) { case 0x00: - slave_halt(); + slave_enable(false); break; case 0x01: @@ -2375,7 +2405,7 @@ WRITE16_MEMBER(namcos22_state::upload_code_to_slave_dsp_w) break; case 0x03: - slave_enable(); + slave_enable(true); break; case 0x04: @@ -2383,7 +2413,7 @@ WRITE16_MEMBER(namcos22_state::upload_code_to_slave_dsp_w) case 0x10: /* serial i/o related? */ - slave_enable(); + slave_enable(true); break; default: @@ -2398,7 +2428,7 @@ WRITE16_MEMBER(namcos22_state::upload_code_to_slave_dsp_w) break; case NAMCOS22_DSP_UPLOAD_DATA: - m_pSlaveExternalRAM[m_UploadDestIdx & 0x1fff] = data; + m_slave_extram[m_UploadDestIdx & 0x1fff] = data; m_UploadDestIdx++; break; @@ -2425,16 +2455,6 @@ READ16_MEMBER(namcos22_state::dsp_upload_status_r) return 0x0000; } -READ16_MEMBER(namcos22_state::master_external_ram_r) -{ - return m_pMasterExternalRAM[offset]; -} - -WRITE16_MEMBER(namcos22_state::master_external_ram_w) -{ - COMBINE_DATA(&m_pMasterExternalRAM[offset]); -} - WRITE16_MEMBER(namcos22_state::slave_serial_io_w) { m_SerialDataSlaveToMasterNext = data; @@ -2447,37 +2467,22 @@ READ16_MEMBER(namcos22_state::master_serial_io_r) return m_SerialDataSlaveToMasterCurrent; } -TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::dsp_master_serial_irq) +INTERRUPT_GEN_MEMBER(namcos22_state::dsp_vblank_irq) { - int scanline = param; - if (m_dsp_irq_enabled) - { - m_SerialDataSlaveToMasterCurrent = m_SerialDataSlaveToMasterNext; - - if (scanline == 480) - { - m_master->set_input_line(TMS32025_INT0, HOLD_LINE); - } - else if ((scanline % 2) == 0) - { - m_master->set_input_line(TMS32025_RINT, HOLD_LINE); - m_master->set_input_line(TMS32025_XINT, HOLD_LINE); - } - } + device.execute().set_input_line(TMS32025_INT0, HOLD_LINE); } -TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::dsp_slave_serial_irq) +TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::dsp_serial_pulse) { - int scanline = param; - if (m_dsp_irq_enabled) { - if ((scanline % 2) == 0) - { - m_slave->set_input_line(TMS32025_RINT, HOLD_LINE); - m_slave->set_input_line(TMS32025_XINT, HOLD_LINE); - } + m_SerialDataSlaveToMasterCurrent = m_SerialDataSlaveToMasterNext; + + m_master->set_input_line(TMS32025_RINT, HOLD_LINE); + m_master->set_input_line(TMS32025_XINT, HOLD_LINE); + m_slave->set_input_line(TMS32025_RINT, HOLD_LINE); + m_slave->set_input_line(TMS32025_XINT, HOLD_LINE); } } @@ -2529,6 +2534,7 @@ WRITE16_MEMBER(namcos22_state::dsp_led_w) WRITE16_MEMBER(namcos22_state::dsp_unk8_w) { m_RenderBufSize = 0; + m_render_refresh = true; // this one is more likely controlled by slavedsp somewhere } WRITE16_MEMBER(namcos22_state::master_render_device_w) @@ -2546,14 +2552,14 @@ WRITE16_MEMBER(namcos22_state::master_render_device_w) void namcos22_state::master_dsp_program(address_map &map) { map(0x0000, 0x0fff).rom(); /* internal ROM (4k words) */ - map(0x4000, 0x7fff).rom().share("masterextram"); + map(0x4000, 0x7fff).ram().share("masterextram").nopw(); } void namcos22_state::master_dsp_data(address_map &map) { map(0x1000, 0x3fff).ram(); - map(0x4000, 0x7fff).r(FUNC(namcos22_state::master_external_ram_r)).w(FUNC(namcos22_state::master_external_ram_w)); - map(0x8000, 0xffff).r(FUNC(namcos22_state::namcos22_dspram16_r)).w(FUNC(namcos22_state::namcos22_dspram16_w)); + map(0x4000, 0x7fff).ram().share("masterextram"); + map(0x8000, 0xffff).rw(FUNC(namcos22_state::namcos22_dspram16_r), FUNC(namcos22_state::namcos22_dspram16_w)); } void namcos22_state::master_dsp_io(address_map &map) @@ -2575,7 +2581,7 @@ void namcos22_state::master_dsp_io(address_map &map) } -READ16_MEMBER(namcos22_state::dsp_bioz_r) +READ16_MEMBER(namcos22_state::dsp_slave_bioz_r) { /* STUB */ return 1; @@ -2635,12 +2641,12 @@ WRITE16_MEMBER(namcos22_state::dsp_slave_portb_w) void namcos22_state::slave_dsp_program(address_map &map) { map(0x0000, 0x0fff).rom(); /* internal ROM */ - map(0x8000, 0x9fff).rom().share("slaveextram"); + map(0x8000, 0x9fff).ram().share("slaveextram").nopw(); } void namcos22_state::slave_dsp_data(address_map &map) { - map(0x8000, 0x9fff).rw(FUNC(namcos22_state::slave_external_ram_r), FUNC(namcos22_state::slave_external_ram_w)); + map(0x8000, 0x9fff).ram().share("slaveextram"); } void namcos22_state::slave_dsp_io(address_map &map) @@ -2670,7 +2676,7 @@ void namcos22_state::slave_dsp_io(address_map &map) 000000-00027f: internal MCU registers and RAM 002000-002fff: C352 PCM chip 004000-00bfff: shared RAM with host CPU - 00c000-00ffff: BIOS ROM (internal on System 22, external on Super) + 00c000-00ffff: BIOS ROM (internal on System22, external on Super) 200000-27ffff: data ROM 301000-301001: watchdog? 308000-308003: unknown (I/O?) @@ -2689,19 +2695,7 @@ void namcos22_state::slave_dsp_io(address_map &map) */ -// System 22 37702 - -READ16_MEMBER(namcos22_state::s22mcu_shared_r) -{ - uint16_t *share16 = (uint16_t *)m_shareram.target(); - return share16[BYTE_XOR_BE(offset)]; -} - -WRITE16_MEMBER(namcos22_state::s22mcu_shared_w) -{ - uint16_t *share16 = (uint16_t *)m_shareram.target(); - COMBINE_DATA(&share16[BYTE_XOR_BE(offset)]); -} +// System22 37702 READ8_MEMBER(namcos22_state::mcu_port4_s22_r) { @@ -2718,12 +2712,8 @@ READ8_MEMBER(namcos22_state::iomcu_port4_s22_r) void namcos22_state::mcu_s22_program(address_map &map) { map(0x002000, 0x002fff).rw("c352", FUNC(c352_device::read), FUNC(c352_device::write)); - map(0x004000, 0x00bfff).rw(FUNC(namcos22_state::s22mcu_shared_r), FUNC(namcos22_state::s22mcu_shared_w)); - map(0x080000, 0x0fffff).rom().region("mcu", 0); + map(0x004000, 0x00bfff).ram().share("shareram"); map(0x200000, 0x27ffff).rom().region("mcu", 0); - map(0x280000, 0x2fffff).rom().region("mcu", 0); - map(0x301000, 0x301001).noprw(); // watchdog? LEDs? - map(0x308000, 0x308003).noprw(); // volume control IC? } void namcos22_state::iomcu_s22_program(address_map &map) @@ -2743,7 +2733,7 @@ void namcos22_state::iomcu_s22_io(address_map &map) } -// Super System 22 M37710 +// System Super22 M37710 TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::mcu_irq) { @@ -2752,9 +2742,9 @@ TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::mcu_irq) /* TODO: real sources of these */ if (scanline == 480) m_mcu->set_input_line(M37710_LINE_IRQ0, HOLD_LINE); - else if (scanline == 500) - m_mcu->set_input_line(M37710_LINE_ADC, HOLD_LINE); else if (scanline == 0) + m_mcu->set_input_line(M37710_LINE_ADC, HOLD_LINE); + else if (scanline == 240) m_mcu->set_input_line(M37710_LINE_IRQ2, HOLD_LINE); } @@ -2804,20 +2794,19 @@ READ8_MEMBER(namcos22_state::mcu_port7_r) READ8_MEMBER(namcos22_state::namcos22s_mcu_adc_r) { - uint16_t adc = m_adc_ports[offset >> 1 & 7].read_safe(0) << 2; + u16 adc = m_adc_ports[offset >> 1 & 7].read_safe(0) << 2; return (offset & 1) ? adc >> 8 : adc; } void namcos22_state::mcu_program(address_map &map) { map(0x002000, 0x002fff).rw("c352", FUNC(c352_device::read), FUNC(c352_device::write)); - map(0x004000, 0x00bfff).rw(FUNC(namcos22_state::s22mcu_shared_r), FUNC(namcos22_state::s22mcu_shared_w)); + map(0x004000, 0x00bfff).ram().share("shareram"); map(0x00c000, 0x00ffff).rom().region("mcu", 0xc000); - map(0x080000, 0x0fffff).rom().region("mcu", 0); map(0x200000, 0x27ffff).rom().region("mcu", 0); - map(0x280000, 0x2fffff).rom().region("mcu", 0); - map(0x301000, 0x301001).noprw(); // watchdog? LEDs? - map(0x308000, 0x308003).noprw(); // volume control IC? + map(0x300000, 0x300001).nopr(); // ? (cybrcycc, alpinesa) + map(0x301000, 0x301001).nopw(); // watchdog? LEDs? + map(0x308000, 0x308003).nopw(); // volume control IC? } void namcos22_state::mcu_io(address_map &map) @@ -2834,30 +2823,18 @@ void namcos22_state::mcu_io(address_map &map) // custom input handling /* TODO: REMOVE (THIS IS HANDLED BY "IOMCU") */ -void namcos22_state::handle_coinage(int slots, int address_is_odd) +void namcos22_state::handle_coinage(u16 flags) { - uint16_t *share16 = (uint16_t *)m_shareram.target(); - - uint32_t coin_state = ioport("INPUTS")->read() & 0x1200; + int coin_state = (flags & 0x1000) >> 12 | (flags & 0x0200) >> 8; - if (!(coin_state & 0x1000) && (m_old_coin_state & 0x1000)) - { + if (!(coin_state & 1) && (m_old_coin_state & 1)) m_credits1++; - } - if (!(coin_state & 0x0200) && (m_old_coin_state & 0x0200)) - { + if (!(coin_state & 2) && (m_old_coin_state & 2)) m_credits2++; - } m_old_coin_state = coin_state; - - share16[BYTE_XOR_LE(0x38/2)] = m_credits1 << (address_is_odd*8); - - if (slots == 2) - { - share16[BYTE_XOR_LE(0x3e/2)] = m_credits2 << (address_is_odd*8); - } + m_shareram[0x3a/2] = m_credits1 << 8 | m_credits2; } /* TODO: REMOVE (THIS IS HANDLED BY "IOMCU") */ @@ -2865,12 +2842,10 @@ void namcos22_state::handle_driving_io() { if (m_syscontrol[0x18] != 0) { - uint16_t flags = ioport("INPUTS")->read(); - uint16_t coinram_address_is_odd = 0; - - uint16_t gas = ioport("GAS")->read(); - uint16_t brake = ioport("BRAKE")->read(); - uint16_t steer = ioport("STEER")->read(); + u16 flags = ioport("INPUTS")->read(); + u16 gas = ioport("GAS")->read(); + u16 brake = ioport("BRAKE")->read(); + u16 steer = ioport("STEER")->read(); switch (m_gametype) { @@ -2894,8 +2869,6 @@ void namcos22_state::handle_driving_io() break; case NAMCOS22_VICTORY_LAP: - coinram_address_is_odd = 1; - // (fall through) case NAMCOS22_ACE_DRIVER: gas <<= 3; gas += 992; @@ -2912,10 +2885,11 @@ void namcos22_state::handle_driving_io() break; } - handle_coinage(2, coinram_address_is_odd); - m_shareram[0x000/4] = 0x10 << 16; /* SUB CPU ready */ - m_shareram[0x030/4] = (flags << 16) | steer; - m_shareram[0x034/4] = (gas << 16) | brake; + m_shareram[0x030/2] = flags; + m_shareram[0x032/2] = steer; + m_shareram[0x034/2] = gas; + m_shareram[0x036/2] = brake; + handle_coinage(flags); } } @@ -2924,18 +2898,18 @@ void namcos22_state::handle_cybrcomm_io() { if (m_syscontrol[0x18] != 0) { - uint16_t flags = ioport("INPUTS")->read(); - - uint16_t volume0 = ioport("STICKY1")->read() * 0x10; - uint16_t volume1 = ioport("STICKY2")->read() * 0x10; - uint16_t volume2 = ioport("STICKX1")->read() * 0x10; - uint16_t volume3 = ioport("STICKX2")->read() * 0x10; - - m_shareram[0x030/4] = (flags << 16) | volume0; - m_shareram[0x034/4] = (volume1 << 16) | volume2; - m_shareram[0x038/4] = volume3 << 16; - - handle_coinage(1, 0); + u16 flags = ioport("INPUTS")->read(); + u16 volume0 = ioport("STICKY1")->read() * 0x10; + u16 volume1 = ioport("STICKY2")->read() * 0x10; + u16 volume2 = ioport("STICKX1")->read() * 0x10; + u16 volume3 = ioport("STICKX2")->read() * 0x10; + + m_shareram[0x030/2] = flags; + m_shareram[0x032/2] = volume0; + m_shareram[0x034/2] = volume1; + m_shareram[0x036/2] = volume2; + m_shareram[0x038/2] = volume3; + handle_coinage(flags); } } @@ -3002,19 +2976,19 @@ TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::propcycl_pedal_interrupt) TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::propcycl_pedal_update) { // arbitrary timer for reading optical pedal - uint8_t i = ioport("PEDAL")->read(); + u8 i = ioport("PEDAL")->read(); if (i != 0) { - // the pedal has a simple 1-bit "light interrupted" sensor. the faster you pedal, + // the pedal has a simple 1-bit "light interrupted" sensor. the faster you pedal, // the faster it pulses. this is connected to the clock input for timer A3, // and timer A3 is configured by the MCU program to cause an interrupt each time - // it's clocked. by counting the number of interrupts in a frame, we can determine + // it's clocked. by counting the number of interrupts in a frame, we can determine // how fast the user is pedaling. // these values(in usec) may need tweaking: - const int base = 1000; - const int range = 10000; + const int base = 750; + const int range = 100000; attotime freq = attotime::from_usec(base + range * (1.0 / (double)i)); m_pc_pedal_interrupt->adjust(std::min(freq, m_pc_pedal_interrupt->time_left()), 0, freq); @@ -3037,8 +3011,8 @@ TIMER_CALLBACK_MEMBER(namcos22_state::adillor_trackball_interrupt) TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::adillor_trackball_update) { // arbitrary timer for reading optical trackball - uint8_t ix = ioport("TRACKX")->read(); - uint8_t iy = ioport("TRACKY")->read(); + u8 ix = ioport("TRACKX")->read(); + u8 iy = ioport("TRACKY")->read(); if (ix != 0x80 || iy < 0x80) { @@ -3061,9 +3035,9 @@ TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::adillor_trackball_update) a = M_PI / 2.0; // tied to mcu A2/A3 timer (speed determines frequency) - // these values(in usec) may need tweaking: - const int base = 1000; - const int range = 5000; + // these values(in hz) may need tweaking: + const double base = 20; + const double range = 1250; double t[2]; t[0] = v*sin(a); // y -> A2 @@ -3071,9 +3045,9 @@ TIMER_DEVICE_CALLBACK_MEMBER(namcos22_state::adillor_trackball_update) for (int axis = 0; axis < 2; axis++) { - if (t[axis] > (1.0 / (double)(range))) + if (t[axis] > (1.0 / range)) { - attotime freq = attotime::from_usec((base + range) - ((double)(range) * t[axis])); + attotime freq = attotime::from_hz(base + range * t[axis]); m_ar_tb_interrupt[axis]->adjust(std::min(freq, m_ar_tb_interrupt[axis]->remaining()), axis, freq); } else @@ -3197,7 +3171,6 @@ static INPUT_PORTS_START( raveracw ) PORT_MODIFY("INPUTS") PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("View Change") - PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no coin2 PORT_CONFNAME( 0x2100, 0x2000, DEF_STR( Cabinet ) ) // @ JAMMA pins PORT_CONFSETTING( 0x0000, "50 Inch" ) @@ -3232,13 +3205,13 @@ static INPUT_PORTS_START( cybrcomm ) end up needing to change again too Default key arrangement is based on dual-joystick 'Tank' arrangement found in Assault and CyberSled */ - PORT_START("STICKY1") /* VOLUME 0 */ + PORT_START("STICKY1") /* VOLUME 1 */ PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x47,0xb7) /* range based on test mode */ PORT_CODE_DEC(KEYCODE_I) PORT_CODE_INC(KEYCODE_K) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: vertical */ - PORT_START("STICKY2") /* VOLUME 0 */ - PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x47,0xb7) /* range based on test mode */ PORT_CODE_DEC(KEYCODE_E) PORT_CODE_INC(KEYCODE_D) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: vertical */ - PORT_START("STICKX1") /* VOLUME 0 */ + PORT_START("STICKX1") /* VOLUME 2 */ PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x47,0xb7) /* range based on test mode */ PORT_CODE_DEC(KEYCODE_J) PORT_CODE_INC(KEYCODE_L) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: horizontal */ - PORT_START("STICKX2") /* VOLUME 0 */ + PORT_START("STICKY2") /* VOLUME 3 */ + PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x47,0xb7) /* range based on test mode */ PORT_CODE_DEC(KEYCODE_E) PORT_CODE_INC(KEYCODE_D) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: vertical */ + PORT_START("STICKX2") /* VOLUME 4 */ PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x47,0xb7) /* range based on test mode */ PORT_CODE_DEC(KEYCODE_S) PORT_CODE_INC(KEYCODE_F) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: horizontal */ PORT_START("DSW0") @@ -3364,7 +3337,7 @@ static INPUT_PORTS_START( alpiner ) PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_NAME("Steps Swing") PORT_START("ADC.1") - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_NAME("Steps Edge") + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_PLAYER(2) PORT_NAME("Steps Edge") INPUT_PORTS_END static INPUT_PORTS_START( airco22 ) @@ -3384,22 +3357,22 @@ static INPUT_PORTS_START( airco22 ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_SERVICE( 0x08, IP_ACTIVE_LOW ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) /* Missile */ - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) /* Gun */ - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Missile Button") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Gun Trigger") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 ) // also view-change function PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("MCUP5B") PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("ADC.0") - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x40, 0xc0) PORT_SENSITIVITY(100) PORT_KEYDELTA(3) PORT_START("ADC.1") - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x40, 0xc0) PORT_SENSITIVITY(100) PORT_KEYDELTA(3) - PORT_START("ADC.2") - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x00, 0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_REVERSE + PORT_START("ADC.2") // throttle stick auto-centers + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x40, 0xc0) PORT_SENSITIVITY(100) PORT_KEYDELTA(3) PORT_NAME("Throttle Stick") INPUT_PORTS_END static INPUT_PORTS_START( cybrcycc ) @@ -3664,7 +3637,7 @@ INPUT_PORTS_END /*********************************************************************************************/ -/* Super System22 supports a sprite layer. +/* System Super22 supports a sprite layer. * Sprites are rendered as part of the polygon draw list, based on a per-sprite Z attribute. * Each sprite has explicit placement/color/zoom controls. */ @@ -3722,12 +3695,12 @@ static const gfx_layout namcos22_cg_layout = #undef XOR static GFXDECODE_START( gfx_namcos22 ) - GFXDECODE_ENTRY( nullptr, 0, namcos22_cg_layout, 0, 0x800 ) + GFXDECODE_ENTRY( nullptr, 0, namcos22_cg_layout, 0, 0x800 ) GFXDECODE_ENTRY( "textile", 0, texture_tile_layout, 0, 0x80 ) GFXDECODE_END static GFXDECODE_START( gfx_super ) - GFXDECODE_ENTRY( nullptr, 0, namcos22_cg_layout, 0, 0x800 ) + GFXDECODE_ENTRY( nullptr, 0, namcos22_cg_layout, 0, 0x800 ) GFXDECODE_ENTRY( "textile", 0, texture_tile_layout, 0, 0x80 ) GFXDECODE_ENTRY( "sprite", 0, sprite_layout, 0, 0x80 ) GFXDECODE_END @@ -3735,31 +3708,121 @@ GFXDECODE_END void namcos22_state::machine_reset() { - m_master->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - m_slave->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); + master_enable(false); + slave_enable(false); + m_dsp_irq_enabled = false; + if (!m_is_ss22) m_iomcu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); m_mcu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); +} - m_poly->reset(); +void namcos22_state::device_post_load() +{ + m_gfxdecode->gfx(0)->mark_all_dirty(); } +// allow save_item on a non-fundamental type +ALLOW_SAVE_TYPE(namcos22_dsp_upload_state); + void namcos22_state::machine_start() { m_led.resolve(); m_cpuled.resolve(); - m_slave_simulation_active = false; m_portbits[0] = 0xffff; m_portbits[1] = 0xffff; -} -// System 22 + m_keycus_rng = 0; + m_su_82 = 0; + m_irq_state = 0; + m_p4 = 0; + m_old_coin_state = 0; + m_credits1 = m_credits2 = 0; + + // register for savestates, stuff that isn't done in video_start() + // note: namcos22_renderer class doesn't need saving, it is refreshed every frame + save_item(NAME(m_poly_translucency)); + save_item(NAME(m_mixer_flags)); + save_item(NAME(m_fog_r)); + save_item(NAME(m_fog_g)); + save_item(NAME(m_fog_b)); + save_item(NAME(m_fog_colormask)); + save_item(NAME(m_screen_fade_r)); + save_item(NAME(m_screen_fade_g)); + save_item(NAME(m_screen_fade_b)); + save_item(NAME(m_screen_fade_factor)); + save_item(NAME(m_poly_fade_r)); + save_item(NAME(m_poly_fade_g)); + save_item(NAME(m_poly_fade_b)); + save_item(NAME(m_poly_fade_enabled)); + + save_item(NAME(m_syscontrol)); + save_item(NAME(m_dsp_irq_enabled)); + save_item(NAME(m_dsp_master_bioz)); + save_item(NAME(m_old_coin_state)); + save_item(NAME(m_credits1)); + save_item(NAME(m_credits2)); + save_item(NAME(m_point_address)); + save_item(NAME(m_point_data)); + save_item(NAME(m_SerialDataSlaveToMasterNext)); + save_item(NAME(m_SerialDataSlaveToMasterCurrent)); + save_item(NAME(m_RenderBufSize)); + save_item(NAME(m_RenderBufData)); + save_item(NAME(m_portbits)); + save_item(NAME(m_irq_state)); + save_item(NAME(m_irq_enabled)); + save_item(NAME(m_dsp_upload_state)); + save_item(NAME(m_UploadDestIdx)); + save_item(NAME(m_alpinesa_protection)); + save_item(NAME(m_motor_status)); + save_item(NAME(m_p4)); + save_item(NAME(m_su_82)); + save_item(NAME(m_keycus_id)); + save_item(NAME(m_keycus_rng)); + save_item(NAME(m_chipselect)); + save_item(NAME(m_spotram_enable)); + save_item(NAME(m_spotram_address)); + save_item(NAME(m_cz_adjust)); + save_item(NAME(m_dspram_bank)); + save_item(NAME(m_dspram16_latch)); + save_item(NAME(m_slave_simulation_active)); + save_item(NAME(m_absolute_priority)); + save_item(NAME(m_objectshift)); + save_item(NAME(m_viewmatrix)); + save_item(NAME(m_LitSurfaceInfo)); + save_item(NAME(m_SurfaceNormalFormat)); + save_item(NAME(m_LitSurfaceCount)); + save_item(NAME(m_LitSurfaceIndex)); + save_item(NAME(m_tilemapattr)); + save_item(NAME(m_spot_factor)); + save_item(NAME(m_text_palbase)); + save_item(NAME(m_bg_palbase)); + save_item(NAME(m_camera_zoom)); + save_item(NAME(m_camera_vx)); + save_item(NAME(m_camera_vy)); + save_item(NAME(m_camera_vw)); + save_item(NAME(m_camera_vh)); + save_item(NAME(m_camera_lx)); + save_item(NAME(m_camera_ly)); + save_item(NAME(m_camera_lz)); + save_item(NAME(m_camera_ambient)); + save_item(NAME(m_camera_power)); + save_item(NAME(m_reflection)); + save_item(NAME(m_cullflip)); + save_item(NAME(m_skipped_this_frame)); + save_item(NAME(m_pdp_render_done)); + save_item(NAME(m_render_refresh)); + save_item(NAME(m_pdp_frame)); + save_item(NAME(m_pdp_base)); +} + +// System22 MACHINE_CONFIG_START(namcos22_state::namcos22) /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", M68020,SS22_MASTER_CLOCK/2) /* 25 MHz? */ + MCFG_DEVICE_ADD("maincpu", M68020, 49.152_MHz_XTAL/2) // MC68020RP25E MCFG_DEVICE_PROGRAM_MAP(namcos22_am) MCFG_DEVICE_VBLANK_INT_DRIVER("screen", namcos22_state, namcos22_interrupt) - tms32025_device& master(TMS32025(config, m_master, SS22_MASTER_CLOCK)); /* ? */ + tms32025_device& master(TMS32025(config, m_master, 40_MHz_XTAL)); master.set_addrmap(AS_PROGRAM, &namcos22_state::master_dsp_program); master.set_addrmap(AS_DATA, &namcos22_state::master_dsp_data); master.set_addrmap(AS_IO, &namcos22_state::master_dsp_io); @@ -3768,36 +3831,35 @@ MACHINE_CONFIG_START(namcos22_state::namcos22) master.hold_ack_out_cb().set(FUNC(namcos22_state::dsp_hold_ack_w)); master.xf_out_cb().set(FUNC(namcos22_state::dsp_xf_output_w)); master.dr_in_cb().set(FUNC(namcos22_state::master_serial_io_r)); + master.set_vblank_int("screen", FUNC(namcos22_state::dsp_vblank_irq)); + MCFG_TIMER_DRIVER_ADD_PERIODIC("dsp_serial", namcos22_state, dsp_serial_pulse, attotime::from_hz(SERIAL_IO_PERIOD)) - MCFG_TIMER_DRIVER_ADD_SCANLINE("master_st", namcos22_state, dsp_master_serial_irq, "screen", 0, 1) - - tms32025_device& slave(TMS32025(config, m_slave, SS22_MASTER_CLOCK)); /* ? */ + tms32025_device& slave(TMS32025(config, m_slave, 40_MHz_XTAL)); slave.set_addrmap(AS_PROGRAM, &namcos22_state::slave_dsp_program); slave.set_addrmap(AS_DATA, &namcos22_state::slave_dsp_data); slave.set_addrmap(AS_IO, &namcos22_state::slave_dsp_io); - slave.bio_in_cb().set(FUNC(namcos22_state::dsp_bioz_r)); + slave.bio_in_cb().set(FUNC(namcos22_state::dsp_slave_bioz_r)); slave.hold_in_cb().set(FUNC(namcos22_state::dsp_hold_signal_r)); slave.hold_ack_out_cb().set(FUNC(namcos22_state::dsp_hold_ack_w)); slave.xf_out_cb().set(FUNC(namcos22_state::dsp_xf_output_w)); slave.dx_out_cb().set(FUNC(namcos22_state::slave_serial_io_w)); - MCFG_TIMER_DRIVER_ADD_SCANLINE("slave_st", namcos22_state, dsp_slave_serial_irq, "screen", 0, 1) - - MCFG_DEVICE_ADD("mcu", NAMCO_C74, SS22_MASTER_CLOCK/3) // C74 on the CPU board has no periodic interrupts, it runs entirely off Timer A0 - MCFG_DEVICE_PROGRAM_MAP( mcu_s22_program) - MCFG_DEVICE_IO_MAP( mcu_s22_io) + MCFG_DEVICE_ADD("mcu", NAMCO_C74, 49.152_MHz_XTAL/3) // C74 on the CPU board has no periodic interrupts, it runs entirely off Timer A0 + MCFG_DEVICE_PROGRAM_MAP(mcu_s22_program) + MCFG_DEVICE_IO_MAP(mcu_s22_io) - MCFG_DEVICE_ADD("iomcu", NAMCO_C74, XTAL(6'144'000)) // 6.144MHz XTAL on I/O board, not sure if it has a divider - MCFG_DEVICE_PROGRAM_MAP( iomcu_s22_program) - MCFG_DEVICE_IO_MAP( iomcu_s22_io) + MCFG_DEVICE_ADD("iomcu", NAMCO_C74, 6.144_MHz_XTAL) + MCFG_DEVICE_PROGRAM_MAP(iomcu_s22_program) + MCFG_DEVICE_IO_MAP(iomcu_s22_io) - EEPROM_2864(config, "eeprom"); + EEPROM_2864(config, "eeprom").write_time(attotime::from_nsec(10)); /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) -// MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE) + //MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE) MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART) MCFG_SCREEN_UPDATE_DRIVER(namcos22_state, screen_update_namcos22) + MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, namcos22_state, screen_vblank)) MCFG_PALETTE_ADD("palette", 0x8000) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos22) @@ -3806,7 +3868,7 @@ MACHINE_CONFIG_START(namcos22_state::namcos22) SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - MCFG_DEVICE_ADD("c352", C352, SS22_MASTER_CLOCK/2, 288) + MCFG_DEVICE_ADD("c352", C352, 49.152_MHz_XTAL/2, 288) MCFG_SOUND_ROUTE(0, "lspeaker", 1.00) MCFG_SOUND_ROUTE(1, "rspeaker", 1.00) MACHINE_CONFIG_END @@ -3814,86 +3876,50 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::cybrcomm) namcos22(config); - SPEAKER(config, "rear_left", -0.2, 0.0, -0.5); - SPEAKER(config, "rear_right", 0.2, 0.0, -0.5); + SPEAKER(config, "rear_left").rear_left(); + SPEAKER(config, "rear_right").rear_right(); MCFG_DEVICE_MODIFY("c352") MCFG_SOUND_ROUTE(2, "rear_left", 1.00) MCFG_SOUND_ROUTE(3, "rear_right", 1.00) MACHINE_CONFIG_END -// Super System 22 +// System Super22 MACHINE_CONFIG_START(namcos22_state::namcos22s) + namcos22(config); /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", M68EC020,SS22_MASTER_CLOCK/2) + MCFG_DEVICE_REPLACE("maincpu", M68EC020, 49.152_MHz_XTAL/2) // MC68EC020FG25 MCFG_DEVICE_PROGRAM_MAP(namcos22s_am) MCFG_DEVICE_VBLANK_INT_DRIVER("screen", namcos22_state, namcos22s_interrupt) - tms32025_device& master(TMS32025(config, m_master, SS22_MASTER_CLOCK)); - master.set_addrmap(AS_PROGRAM, &namcos22_state::master_dsp_program); - master.set_addrmap(AS_DATA, &namcos22_state::master_dsp_data); - master.set_addrmap(AS_IO, &namcos22_state::master_dsp_io); - master.bio_in_cb().set(FUNC(namcos22_state::pdp_status_r)); - master.hold_in_cb().set(FUNC(namcos22_state::dsp_hold_signal_r)); - master.hold_ack_out_cb().set(FUNC(namcos22_state::dsp_hold_ack_w)); - master.xf_out_cb().set(FUNC(namcos22_state::dsp_xf_output_w)); - master.dr_in_cb().set(FUNC(namcos22_state::master_serial_io_r)); - - MCFG_TIMER_DRIVER_ADD_SCANLINE("master_st", namcos22_state, dsp_master_serial_irq, "screen", 0, 1) - - tms32025_device& slave(TMS32025(config, m_slave, SS22_MASTER_CLOCK)); - slave.set_addrmap(AS_PROGRAM, &namcos22_state::slave_dsp_program); - slave.set_addrmap(AS_DATA, &namcos22_state::slave_dsp_data); - slave.set_addrmap(AS_IO, &namcos22_state::slave_dsp_io); - slave.bio_in_cb().set(FUNC(namcos22_state::dsp_bioz_r)); - slave.hold_in_cb().set(FUNC(namcos22_state::dsp_hold_signal_r)); - slave.hold_ack_out_cb().set(FUNC(namcos22_state::dsp_hold_ack_w)); - slave.xf_out_cb().set(FUNC(namcos22_state::dsp_xf_output_w)); - slave.dx_out_cb().set(FUNC(namcos22_state::slave_serial_io_w)); - - MCFG_TIMER_DRIVER_ADD_SCANLINE("slave_st", namcos22_state, dsp_slave_serial_irq, "screen", 0, 1) - - MCFG_DEVICE_ADD("mcu", M37710S4, SS22_MASTER_CLOCK/3) + MCFG_DEVICE_REPLACE("mcu", M37710S4, 49.152_MHz_XTAL/3) MCFG_DEVICE_PROGRAM_MAP(mcu_program) MCFG_DEVICE_IO_MAP(mcu_io) - MCFG_TIMER_DRIVER_ADD_SCANLINE("mcu_st", namcos22_state, mcu_irq, "screen", 0, 1) + MCFG_TIMER_DRIVER_ADD_SCANLINE("mcu_irq", namcos22_state, mcu_irq, "screen", 0, 240) + MCFG_QUANTUM_TIME(attotime::from_hz(6000)) // erratic inputs otherwise, probably mcu vs maincpu shareram - MCFG_QUANTUM_TIME(attotime::from_hz(6000)) -// MCFG_QUANTUM_PERFECT_CPU("maincpu") - EEPROM_2864(config, "eeprom"); + MCFG_DEVICE_REMOVE("iomcu") /* video hardware */ - MCFG_SCREEN_ADD("screen", RASTER) -// MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE) - MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART) + MCFG_SCREEN_MODIFY("screen") MCFG_SCREEN_UPDATE_DRIVER(namcos22_state, screen_update_namcos22s) - MCFG_PALETTE_ADD("palette", 0x8000) - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_super) - - /* sound hardware */ - SPEAKER(config, "lspeaker").front_left(); - SPEAKER(config, "rspeaker").front_right(); - - MCFG_DEVICE_ADD("c352", C352, SS22_MASTER_CLOCK/2, 288) - MCFG_SOUND_ROUTE(0, "lspeaker", 1.00) - MCFG_SOUND_ROUTE(1, "rspeaker", 1.00) + MCFG_DEVICE_REPLACE("gfxdecode", GFXDECODE, "palette", gfx_super) MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::airco22b) namcos22s(config); - SPEAKER(config, "bodysonic").front_center(); + SPEAKER(config, "bodysonic").subwoofer(); MCFG_DEVICE_MODIFY("c352") - MCFG_SOUND_ROUTE(2, "bodysonic", 0.50) + MCFG_SOUND_ROUTE(2, "bodysonic", 0.50) // to subwoofer MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::alpine) namcos22s(config); - /* basic machine hardware */ MCFG_DEVICE_MODIFY("mcu") MCFG_DEVICE_IO_MAP(alpine_io_map) @@ -3903,7 +3929,6 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::alpinesa) alpine(config); - /* basic machine hardware */ MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_PROGRAM_MAP(alpinesa_am) MACHINE_CONFIG_END @@ -3911,7 +3936,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::cybrcycc) namcos22s(config); - SPEAKER(config, "tank").front_center(); + SPEAKER(config, "tank", 0.0, 0.0, 0.0); MCFG_DEVICE_MODIFY("c352") MCFG_SOUND_ROUTE(2, "tank", 1.00) @@ -3920,18 +3945,15 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::dirtdash) namcos22s(config); - SPEAKER(config, "road").front_center(); - SPEAKER(config, "under").front_center(); + SPEAKER(config, "road", 0.0, 0.0, 0.0); MCFG_DEVICE_MODIFY("c352") - MCFG_SOUND_ROUTE(2, "road", 1.00) - MCFG_SOUND_ROUTE(3, "under", 0.50) // from sound test + MCFG_SOUND_ROUTE(3, "road", 1.00) MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::timecris) namcos22s(config); - /* basic machine hardware */ MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_PROGRAM_MAP(timecris_am) MACHINE_CONFIG_END @@ -3939,18 +3961,17 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::tokyowar) namcos22s(config); - SPEAKER(config, "seat", 0.0, 0.0, 0.0); - SPEAKER(config, "vibration", 0.0, 0.0, 0.0); + SPEAKER(config, "vibration").subwoofer(); + SPEAKER(config, "seat").rear_center(); MCFG_DEVICE_MODIFY("c352") + MCFG_SOUND_ROUTE(2, "vibration", 0.50) // to "bass shaker" MCFG_SOUND_ROUTE(3, "seat", 1.00) - MCFG_SOUND_ROUTE(2, "vibration", 0.50) MACHINE_CONFIG_END MACHINE_CONFIG_START(namcos22_state::propcycl) namcos22s(config); - /* basic machine hardware */ MCFG_DEVICE_MODIFY("mcu") MCFG_DEVICE_IO_MAP(propcycl_io_map) @@ -3969,9 +3990,7 @@ MACHINE_START_MEMBER(namcos22_state,adillor) MACHINE_CONFIG_START(namcos22_state::adillor) namcos22s(config); - /* basic machine hardware */ MCFG_TIMER_DRIVER_ADD_PERIODIC("ar_tb_upd", namcos22_state, adillor_trackball_update, attotime::from_msec(20)) - MCFG_MACHINE_START_OVERRIDE(namcos22_state,adillor) MACHINE_CONFIG_END @@ -3996,14 +4015,14 @@ ROM_START( ridgerac ) ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) ) ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) )//,CRC(d1b0eec6) SHA1(f66922c324dfc3ff408db7556c587ef90ca64c3b) ) - ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) )//,CRC(bb695d89) SHA1(557bac9d2718519c1f69e374d0ef9a86a43fe86c) ) - ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) )//,CRC(8f374c0a) SHA1(94ff8581de11a03ef86525155f8433bf5858b980) ) - ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) )//,CRC(072a5c47) SHA1(86b8e973ae6b78197d685fe6d14722d8e2d0dfec) ) + ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) )//,CRC(c15cb257) SHA1(0cb8f231c62ea37955be5d452a436a6e815af8e8) ) - ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) )//,CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ ROM_LOAD( "rr1potl0.5b", 0x80000*0, 0x80000,CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) @@ -4042,14 +4061,14 @@ ROM_START( ridgeracb ) ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) ) ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) )//,CRC(d1b0eec6) SHA1(f66922c324dfc3ff408db7556c587ef90ca64c3b) ) - ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) )//,CRC(bb695d89) SHA1(557bac9d2718519c1f69e374d0ef9a86a43fe86c) ) - ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) )//,CRC(8f374c0a) SHA1(94ff8581de11a03ef86525155f8433bf5858b980) ) - ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) )//,CRC(072a5c47) SHA1(86b8e973ae6b78197d685fe6d14722d8e2d0dfec) ) + ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) )//,CRC(c15cb257) SHA1(0cb8f231c62ea37955be5d452a436a6e815af8e8) ) - ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) )//,CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ ROM_LOAD( "rr1potl0.5b", 0x80000*0, 0x80000,CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) @@ -4088,14 +4107,14 @@ ROM_START( ridgeracj ) ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) ) ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) )//,CRC(d1b0eec6) SHA1(f66922c324dfc3ff408db7556c587ef90ca64c3b) ) - ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) )//,CRC(bb695d89) SHA1(557bac9d2718519c1f69e374d0ef9a86a43fe86c) ) - ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) )//,CRC(8f374c0a) SHA1(94ff8581de11a03ef86525155f8433bf5858b980) ) - ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) )//,CRC(072a5c47) SHA1(86b8e973ae6b78197d685fe6d14722d8e2d0dfec) ) + ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) )//,CRC(c15cb257) SHA1(0cb8f231c62ea37955be5d452a436a6e815af8e8) ) - ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) )//,CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ ROM_LOAD( "rr1potl0.5b", 0x80000*0, 0x80000,CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) @@ -4134,14 +4153,14 @@ ROM_START( ridgerac3 ) ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) ) ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) )//,CRC(d1b0eec6) SHA1(f66922c324dfc3ff408db7556c587ef90ca64c3b) ) - ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) )//,CRC(bb695d89) SHA1(557bac9d2718519c1f69e374d0ef9a86a43fe86c) ) - ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) )//,CRC(8f374c0a) SHA1(94ff8581de11a03ef86525155f8433bf5858b980) ) - ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) )//,CRC(072a5c47) SHA1(86b8e973ae6b78197d685fe6d14722d8e2d0dfec) ) + ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) )//,CRC(c15cb257) SHA1(0cb8f231c62ea37955be5d452a436a6e815af8e8) ) - ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) )//,CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ ROM_LOAD( "rr1potl0.5b", 0x80000*0, 0x80000,CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) @@ -4688,6 +4707,59 @@ ROM_START( victlapw ) ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END +ROM_START( victlapj ) + ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_LOAD32_BYTE( "adv1_prgllc.4d", 0x00003, 0x80000, CRC(1c630018) SHA1(c4cddeb18c6b81c768e25489f1d5af0e9c0bbfa5) ) + ROM_LOAD32_BYTE( "adv1_prglmc.2d", 0x00002, 0x80000, CRC(78413604) SHA1(08245cc1f8d97a166b6c0022fc03c423d92a3653) ) + ROM_LOAD32_BYTE( "adv1_prgumc.8d", 0x00001, 0x80000, CRC(464388d9) SHA1(afad780532aff175b0a547392e80c9f01efbf9d9) ) + ROM_LOAD32_BYTE( "adv1_prguuc.6d", 0x00000, 0x80000, CRC(ad3cb5f9) SHA1(9a62043f60de4d4c82c5bec169ec975add271367) ) + + ROM_REGION( 0x10000*2, "master", 0 ) /* Master DSP */ + ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) ) + + ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */ + ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) ) + + ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_LOAD( "adv1data.6r", 0, 0x080000, CRC(10eecdb4) SHA1(aaedeed166614e6670e765e0d7e4e9eb5f38ad10) ) + + ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ + ROM_LOAD( "adv1cg0.2a", 0x200000*0x0, 0x200000,CRC(13353848) SHA1(c6c7693e3cb086919daf9fcaf6bf602142213073) ) + ROM_LOAD( "adv1cg1.1c", 0x200000*0x1, 0x200000,CRC(1542066c) SHA1(20a053e919b7a81da2a17d31dc7482832a4d4ffe) ) + ROM_LOAD( "adv1cg2.2d", 0x200000*0x2, 0x200000,CRC(111f371c) SHA1(29d8062daae51b3c1712bd30baa9813a2b5b374d) ) + ROM_LOAD( "adv1cg3.1e", 0x200000*0x3, 0x200000,CRC(a077831f) SHA1(71bb95199b368e48bc474123ca84d19213f73137) ) + ROM_LOAD( "adv1cg4.2f", 0x200000*0x4, 0x200000,CRC(71abdacf) SHA1(64409e6aa40dd9e5a6dd1dc306860fbbf6ee7c3e) ) + ROM_LOAD( "adv1cg5.1j", 0x200000*0x5, 0x200000,CRC(cd6cd798) SHA1(51070997a457c0ace078174569cd548ac2226b2d) ) + ROM_LOAD( "adv1cg6.2k", 0x200000*0x6, 0x200000,CRC(94bdafba) SHA1(41e64fa99b342edd8b0ed95ae9869c23e03399e6) ) + ROM_LOAD( "adv1cg7.1n", 0x200000*0x7, 0x200000,CRC(18823475) SHA1(a3244d665b59c352593de21f5cb8d55ddf8cee5c) ) + + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ + ROM_LOAD( "adv1ccrl.5a", 0x000000, 0x200000,CRC(dd2b96ae) SHA1(6337ce17e617234c27ebad578ba82451649aad9c) ) /* ident to adv1ccrl.5l */ + ROM_LOAD( "adv1ccrh.5c", 0x200000, 0x080000,CRC(5719844a) SHA1(a17d7bc239235e9f566931ba4fee1d6ad7964d83) ) /* ident to adv1ccrh.5j */ + + ROM_REGION( 0x80000*9, "pointrom", 0 ) /* 3d model data */ + ROM_LOAD( "adv1pot.l0", 0x80000*0, 0x80000,CRC(3b85b2a4) SHA1(84c92ed0105618d4aa5508af344b4b6cfa772567) ) + ROM_LOAD( "adv1pot.l1", 0x80000*1, 0x80000,CRC(601d6488) SHA1(c7932103ba6070e17deb3cc06060eed7789f938e) ) + ROM_LOAD( "adv1pot.l2", 0x80000*2, 0x80000,CRC(a0323a84) SHA1(deadf9a47461df7b137759d6886e676137b39fd2) ) + ROM_LOAD( "adv1pot.m0", 0x80000*3, 0x80000,CRC(20951aa2) SHA1(3de55bded443a5b78699cec4845470b53b22301a) ) + ROM_LOAD( "adv1pot.m1", 0x80000*4, 0x80000,CRC(5aed6fbf) SHA1(8cee781d8a12e00635b9a1e5cc8d82e64b17e8f1) ) + ROM_LOAD( "adv1pot.m2", 0x80000*5, 0x80000,CRC(00cbff92) SHA1(09a11ba064aafc921a7ca0add5898d91b773f10a) ) + ROM_LOAD( "adv1pot.u0", 0x80000*6, 0x80000,CRC(6b73dd2a) SHA1(e3654ab2b62e4f3314558209e37c5636f871a6c7) ) + ROM_LOAD( "adv1pot.u1", 0x80000*7, 0x80000,CRC(c8788f74) SHA1(606e10b05146e3db824aa608745de80584420d12) ) + ROM_LOAD( "adv1pot.u2", 0x80000*8, 0x80000,CRC(e67f29c5) SHA1(16222afb4f1f494711dd00ebb347c824db333bae) ) + + ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_LOAD( "adv1wav0.10r", 0x000000, 0x100000, CRC(f07b2d9d) SHA1(fd46c23b336d5e9a748f7f8d825c19737125d2fb) ) + ROM_LOAD( "adv1wav1.10p", 0x200000, 0x100000, CRC(737f3c7a) SHA1(4737994f146c0076e7270785f41f3a85c53c7c5f) ) + ROM_LOAD( "adv1wav2.10n", 0x100000, 0x100000, CRC(c1a5ca5e) SHA1(27e6f9256d5fe5966e91d6be1e6e80900a764af1) ) + ROM_LOAD( "adv1wav3.10l", 0x300000, 0x100000, CRC(fc6b8004) SHA1(5c9e0805895931ec2b6a43376059bdbf5777222f) ) + + ROM_REGION( 0x300, "gamma_proms", 0 ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) +ROM_END + /*********************************************************************************************/ ROM_START( propcycl ) @@ -5543,13 +5615,6 @@ void namcos22_state::install_141_speedup() void namcos22_state::namcos22_init(int game_type) { m_gametype = game_type; - - m_keycus_rng = 0; - m_su_82 = 0; - m_irq_state = 0; - m_p4 = 0; - m_old_coin_state = 0; - m_credits1 = m_credits2 = 0; } void namcos22_state::init_ridgeraj() @@ -5621,7 +5686,7 @@ void namcos22_state::init_airco22() void namcos22_state::init_propcycl() { - uint32_t *ROM = (uint32_t *)memregion("maincpu")->base(); + u32 *ROM = (u32 *)memregion("maincpu")->base(); // patch out strange routine (uninitialized-eeprom related?) // maybe needs more accurate 28C64 eeprom device emulation @@ -5636,8 +5701,8 @@ void namcos22_state::init_propcycl() * * DIP5: real time display of "INST_CUNT, MODE_NUM, MODE_CUNT" */ -// ROM[0x22296/4] &= 0xffff0000; -// ROM[0x22296/4] |= 0x00004e75; + //ROM[0x22296/4] &= 0xffff0000; + //ROM[0x22296/4] |= 0x00004e75; namcos22_init(NAMCOS22_PROP_CYCLE); install_141_speedup(); @@ -5684,34 +5749,35 @@ void namcos22_state::init_dirtdash() /*********************************************************************************************/ /* YEAR, NAME, PARENT, MACHINE, INPUT, CLASS, INIT, MNTR, COMPANY, FULLNAME, FLAGS */ -/* System22 games */ -GAME( 1993, ridgerac, 0, namcos22, ridgera, namcos22_state, init_ridgeraj, ROT0, "Namco", "Ridge Racer (Rev. RR3, World)" , MACHINE_IMPERFECT_GRAPHICS ) // 1994-01-17 -GAME( 1993, ridgerac3, ridgerac, namcos22, ridgera, namcos22_state, init_ridgeraj, ROT0, "Namco", "Ridge Racer (Rev. RR2 Ver.B, World, 3-screen?)", MACHINE_IMPERFECT_GRAPHICS ) // 1993-10-28, no indication that this really is a 3-screen version. -GAME( 1993, ridgeracb, ridgerac, namcos22, ridgera, namcos22_state, init_ridgeraj, ROT0, "Namco", "Ridge Racer (Rev. RR2, World)" , MACHINE_IMPERFECT_GRAPHICS ) // 1993-10-07 -GAME( 1993, ridgeracj, ridgerac, namcos22, ridgera, namcos22_state, init_ridgeraj, ROT0, "Namco", "Ridge Racer (Rev. RR1, Japan)" , MACHINE_IMPERFECT_GRAPHICS ) // 1993-10-07 -GAME( 1993, ridgeracf, ridgerac, namcos22, ridgeracf, namcos22_state, init_ridgeraj, ROT0, "Namco", "Ridge Racer Full Scale (World)" , MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) // 1993-12-13, very different version, incomplete dump. -GAME( 1994, ridgera2, 0, namcos22, ridgera2, namcos22_state, init_ridger2j, ROT0, "Namco", "Ridge Racer 2 (Rev. RRS2, World)" , MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 1994-06-21 -GAME( 1994, ridgera2j, ridgera2, namcos22, ridgera2, namcos22_state, init_ridger2j, ROT0, "Namco", "Ridge Racer 2 (Rev. RRS1 Ver.B, Japan)" , MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 1994-06-21 -GAME( 1994, ridgera2ja,ridgera2, namcos22, ridgera2, namcos22_state, init_ridger2j, ROT0, "Namco", "Ridge Racer 2 (Rev. RRS1, Japan)" , MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 1994-06-13 -GAME( 1994, cybrcomm, 0, cybrcomm, cybrcomm, namcos22_state, init_cybrcomm, ROT0, "Namco", "Cyber Commando (Rev. CY1, Japan)" , MACHINE_IMPERFECT_GRAPHICS ) // 10/14/94 -GAME( 1995, raveracw, 0, namcos22, raveracw, namcos22_state, init_raveracw, ROT0, "Namco", "Rave Racer (Rev. RV2, World)" , MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 07/16/95 -GAME( 1995, raveracj, raveracw, namcos22, raveracw, namcos22_state, init_raveracw, ROT0, "Namco", "Rave Racer (Rev. RV1 Ver.B, Japan)" , MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 07/16/95 -GAME( 1995, raveracja, raveracw, namcos22, raveracw, namcos22_state, init_raveracw, ROT0, "Namco", "Rave Racer (Rev. RV1, Japan)" , MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 06/29/95 -GAME( 1994, acedrvrw, 0, namcos22, acedrvr, namcos22_state, init_acedrvr, ROT0, "Namco", "Ace Driver: Racing Evolution (Rev. AD2, World)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 94/10/20 16:22:25 -GAME( 1996, victlapw, 0, namcos22, victlap, namcos22_state, init_victlap, ROT0, "Namco", "Ace Driver: Victory Lap (Rev. ADV2, World)" , MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 96/02/13 17:50:06 - -/* Super System22 games */ -GAME( 1994, alpinerd, 0, alpine, alpiner, namcos22_state, init_alpiner, ROT0, "Namco", "Alpine Racer (Rev. AR2 Ver.D, World)" , MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1994, alpinerc, alpinerd, alpine, alpiner, namcos22_state, init_alpiner, ROT0, "Namco", "Alpine Racer (Rev. AR2 Ver.C, World)" , MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1995, airco22b, 0, airco22b, airco22, namcos22_state, init_airco22, ROT0, "Namco", "Air Combat 22 (Rev. ACS1 Ver.B, Japan)" , MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) // various problems -GAME( 1995, cybrcycc, 0, cybrcycc, cybrcycc, namcos22_state, init_cybrcyc, ROT0, "Namco", "Cyber Cycles (Rev. CB2 Ver.C, World)" , MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 95/04/04 -GAME( 1995, dirtdash, 0, dirtdash, dirtdash, namcos22_state, init_dirtdash, ROT0, "Namco", "Dirt Dash (Rev. DT2 Ver.A, World)" , MACHINE_IMPERFECT_GRAPHICS ) // 95/12/20 20:01:56 -GAME( 1995, timecris, 0, timecris, timecris, namcos22_state, init_timecris, ROT0, "Namco", "Time Crisis (Rev. TS2 Ver.B, World)" , MACHINE_IMPERFECT_GRAPHICS ) // 96/04/02 18:48:00 -GAME( 1995, timecrisa,timecris, timecris, timecris, namcos22_state, init_timecris, ROT0, "Namco", "Time Crisis (Rev. TS2 Ver.A, World)" , MACHINE_IMPERFECT_GRAPHICS ) // 96/01/08 18:56:09 -GAME( 1996, propcycl, 0, propcycl, propcycl, namcos22_state, init_propcycl, ROT0, "Namco", "Prop Cycle (Rev. PR2 Ver.A, World)" , MACHINE_IMPERFECT_GRAPHICS ) // 96/06/18 21:22:13 -GAME( 1996, alpinesa, 0, alpinesa, alpiner, namcos22_state, init_alpinesa, ROT0, "Namco", "Alpine Surfer (Rev. AF2 Ver.A, World)" , MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) // 96/07/01 15:19:23. major gfx problems, slave dsp? -GAME( 1996, tokyowar, 0, tokyowar, tokyowar, namcos22_state, init_tokyowar, ROT0, "Namco", "Tokyo Wars (Rev. TW2 Ver.A, World)" , MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN | MACHINE_NOT_WORKING ) // 96/09/03 14:08:47. near-invincible tanks, maybe related to timecris helicopter bug? -GAME( 1996, aquajet, 0, cybrcycc, aquajet, namcos22_state, init_aquajet, ROT0, "Namco", "Aqua Jet (Rev. AJ2 Ver.B, World)" , MACHINE_IMPERFECT_GRAPHICS ) // 96/09/20 14:28:30 -GAME( 1996, alpinr2b, 0, alpine, alpiner, namcos22_state, init_alpiner2, ROT0, "Namco", "Alpine Racer 2 (Rev. ARS2 Ver.B, World)" , MACHINE_IMPERFECT_GRAPHICS ) // 97/01/10 17:10:59 -GAME( 1996, alpinr2a, alpinr2b, alpine, alpiner, namcos22_state, init_alpiner2, ROT0, "Namco", "Alpine Racer 2 (Rev. ARS2 Ver.A, World)" , MACHINE_IMPERFECT_GRAPHICS ) // 96/12/06 13:45:05 -GAME( 1996, adillor, 0, adillor, adillor, namcos22_state, init_adillor, ROT0, "Namco", "Armadillo Racing (Rev. AM1 Ver.A, Japan)" , MACHINE_IMPERFECT_GRAPHICS ) // 97/04/07 19:19:41 +// System22 games +GAME( 1993, ridgerac, 0, namcos22, ridgera, namcos22_state, init_ridgeraj, ROT0, "Namco", "Ridge Racer (Rev. RR3, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 1994-01-17 +GAME( 1993, ridgerac3, ridgerac, namcos22, ridgera, namcos22_state, init_ridgeraj, ROT0, "Namco", "Ridge Racer (Rev. RR2 Ver.B, World, 3-screen?)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 1993-10-28, no indication that this really is a 3-screen version. +GAME( 1993, ridgeracb, ridgerac, namcos22, ridgera, namcos22_state, init_ridgeraj, ROT0, "Namco", "Ridge Racer (Rev. RR2, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 1993-10-07 +GAME( 1993, ridgeracj, ridgerac, namcos22, ridgera, namcos22_state, init_ridgeraj, ROT0, "Namco", "Ridge Racer (Rev. RR1, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 1993-10-07 +GAME( 1993, ridgeracf, ridgerac, namcos22, ridgeracf, namcos22_state, init_ridgeraj, ROT0, "Namco", "Ridge Racer Full Scale (World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) // 1993-12-13, very different version, incomplete dump. +GAME( 1994, ridgera2, 0, namcos22, ridgera2, namcos22_state, init_ridger2j, ROT0, "Namco", "Ridge Racer 2 (Rev. RRS2, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 1994-06-21 +GAME( 1994, ridgera2j, ridgera2, namcos22, ridgera2, namcos22_state, init_ridger2j, ROT0, "Namco", "Ridge Racer 2 (Rev. RRS1 Ver.B, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 1994-06-21 +GAME( 1994, ridgera2ja,ridgera2, namcos22, ridgera2, namcos22_state, init_ridger2j, ROT0, "Namco", "Ridge Racer 2 (Rev. RRS1, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 1994-06-13 +GAME( 1994, cybrcomm, 0, cybrcomm, cybrcomm, namcos22_state, init_cybrcomm, ROT0, "Namco", "Cyber Commando (Rev. CY1, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 10/14/94 +GAME( 1995, raveracw, 0, namcos22, raveracw, namcos22_state, init_raveracw, ROT0, "Namco", "Rave Racer (Rev. RV2, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 07/16/95 +GAME( 1995, raveracj, raveracw, namcos22, raveracw, namcos22_state, init_raveracw, ROT0, "Namco", "Rave Racer (Rev. RV1 Ver.B, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 07/16/95 +GAME( 1995, raveracja, raveracw, namcos22, raveracw, namcos22_state, init_raveracw, ROT0, "Namco", "Rave Racer (Rev. RV1, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 06/29/95 +GAME( 1994, acedrvrw, 0, namcos22, acedrvr, namcos22_state, init_acedrvr, ROT0, "Namco", "Ace Driver: Racing Evolution (Rev. AD2, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 94/10/20 16:22:25 +GAME( 1996, victlapw, 0, namcos22, victlap, namcos22_state, init_victlap, ROT0, "Namco", "Ace Driver: Victory Lap (Rev. ADV2, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 96/02/13 17:50:06 +GAME( 1996, victlapj, victlapw, namcos22, victlap, namcos22_state, init_victlap, ROT0, "Namco", "Ace Driver: Victory Lap (Rev. ADV1, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 96/02/13 17:29:10 + +// System Super22 games +GAME( 1994, alpinerd, 0, alpine, alpiner, namcos22_state, init_alpiner, ROT0, "Namco", "Alpine Racer (Rev. AR2 Ver.D, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1994, alpinerc, alpinerd, alpine, alpiner, namcos22_state, init_alpiner, ROT0, "Namco", "Alpine Racer (Rev. AR2 Ver.C, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1995, airco22b, 0, airco22b, airco22, namcos22_state, init_airco22, ROT0, "Namco", "Air Combat 22 (Rev. ACS1 Ver.B, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1995, cybrcycc, 0, cybrcycc, cybrcycc, namcos22_state, init_cybrcyc, ROT0, "Namco", "Cyber Cycles (Rev. CB2 Ver.C, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 95/04/04 +GAME( 1995, dirtdash, 0, dirtdash, dirtdash, namcos22_state, init_dirtdash, ROT0, "Namco", "Dirt Dash (Rev. DT2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 95/12/20 20:01:56 +GAME( 1995, timecris, 0, timecris, timecris, namcos22_state, init_timecris, ROT0, "Namco", "Time Crisis (Rev. TS2 Ver.B, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/04/02 18:48:00 +GAME( 1995, timecrisa,timecris, timecris, timecris, namcos22_state, init_timecris, ROT0, "Namco", "Time Crisis (Rev. TS2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/01/08 18:56:09 +GAME( 1996, propcycl, 0, propcycl, propcycl, namcos22_state, init_propcycl, ROT0, "Namco", "Prop Cycle (Rev. PR2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/06/18 21:22:13 +GAME( 1996, alpinesa, 0, alpinesa, alpiner, namcos22_state, init_alpinesa, ROT0, "Namco", "Alpine Surfer (Rev. AF2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) // 96/07/01 15:19:23. major problems, protection? +GAME( 1996, tokyowar, 0, tokyowar, tokyowar, namcos22_state, init_tokyowar, ROT0, "Namco", "Tokyo Wars (Rev. TW2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN | MACHINE_NOT_WORKING ) // 96/09/03 14:08:47. near-invincible tanks, maybe related to timecris helicopter bug? +GAME( 1996, aquajet, 0, cybrcycc, aquajet, namcos22_state, init_aquajet, ROT0, "Namco", "Aqua Jet (Rev. AJ2 Ver.B, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/09/20 14:28:30 +GAME( 1996, alpinr2b, 0, alpine, alpiner, namcos22_state, init_alpiner2, ROT0, "Namco", "Alpine Racer 2 (Rev. ARS2 Ver.B, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 97/01/10 17:10:59 +GAME( 1996, alpinr2a, alpinr2b, alpine, alpiner, namcos22_state, init_alpiner2, ROT0, "Namco", "Alpine Racer 2 (Rev. ARS2 Ver.A, World)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 96/12/06 13:45:05 +GAME( 1997, adillor, 0, adillor, adillor, namcos22_state, init_adillor, ROT0, "Namco", "Armadillo Racing (Rev. AM1 Ver.A, Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 97/04/07 19:19:41 diff --git a/src/mame/drivers/namcos23.cpp b/src/mame/drivers/namcos23.cpp index 36f8b7d1e19..46e6ecf4d5d 100644 --- a/src/mame/drivers/namcos23.cpp +++ b/src/mame/drivers/namcos23.cpp @@ -1598,7 +1598,8 @@ private: uint32_t m_c435_size; const uint32_t *m_ptrom; uint32_t m_ptrom_limit; - + uint8_t m_mcu_unk; + int m_vblank_count; // It may only be 128 @@ -2527,6 +2528,7 @@ READ16_MEMBER(namcos23_state::c417_r) case 6: if(m_c417.pointrom_adr >= m_ptrom_limit) return 0xffff; + // TODO: rapid river wants auto-inc in some way here (NGs point ROM self test otherwise) return m_ptrom[m_c417.pointrom_adr]; } @@ -2883,19 +2885,37 @@ WRITE16_MEMBER(namcos23_state::mcuen_w) } - // C?? (unknown comms) // while getting the subcpu to be ready, panicprk sits in a tight loop waiting for this AND 0002 to be non-zero (at PC=BFC02F00) // timecrs2 locks up in a similar way as panicprk, at the beginning of the 2nd level, by reading/writing to this register a couple of times READ16_MEMBER(namcos23_state::sub_comm_r) { - return 2; + // status register + if (offset == 0) + { + // bit 1 tx fifo empty + // bit 0 rx fifo ready + // bit 4-6: error (reads data port and discards it) (PC=0xbfc03698) + // data ready is signalled thru MIPS irq 4 + // 3f0fa8 (phys address) is where data pops up in TC2 & PP + // PC=0xbfc03838 bit 7 high => fail (data loaded must be parsed somehow) + return 1 | 2; + } + + m_maincpu->set_input_line(MIPS3_IRQ4, CLEAR_LINE); + // data rx, TBD + return m_mcu_unk; //machine().rand(); } WRITE16_MEMBER(namcos23_state::sub_comm_w) { - ; + if( offset == 1 ) + { + // data tx + m_mcu_unk = data & 0xff; + m_maincpu->set_input_line(MIPS3_IRQ4, ASSERT_LINE); + } } @@ -2984,7 +3004,7 @@ void namcos23_state::gmen_mips_map(address_map &map) // SH2 memmap -/* TODO: of course, I believe that area 0x008***** is actually a bank of some sort ... */ +// TODO: of course, I believe that area 0x008***** is actually a bank of some sort ... void namcos23_state::gmen_sh2_map(address_map &map) { map(0x00000000, 0x0000ffff).ram().share("gmen_sh2_shared"); diff --git a/src/mame/drivers/nanos.cpp b/src/mame/drivers/nanos.cpp index decc7342ede..38c2a6db01a 100644 --- a/src/mame/drivers/nanos.cpp +++ b/src/mame/drivers/nanos.cpp @@ -515,7 +515,7 @@ MACHINE_CONFIG_START(nanos_state::nanos) m_pio->out_pb_callback().set(FUNC(nanos_state::port_b_w)); /* UPD765 */ - MCFG_UPD765A_ADD(m_fdc, false, true) + UPD765A(config, m_fdc, false, true); MCFG_FLOPPY_DRIVE_ADD(m_floppy, nanos_floppies, "525hd", nanos_state::floppy_formats) /* internal ram */ diff --git a/src/mame/drivers/naomi.cpp b/src/mame/drivers/naomi.cpp index 5811b51e213..9139f79c01e 100644 --- a/src/mame/drivers/naomi.cpp +++ b/src/mame/drivers/naomi.cpp @@ -327,6 +327,7 @@ Crazy Taxi 840-0002C ? 13 (64Mb) ? Ferrari F355 Challenge (twin/deluxe, preview) no cart 22848P* 21 (64Mb) present 315-6206 317-0267-COM * other ROM board we've seen had 2x flashroms PCB instead of IC22 EEPROM, contents is the same. /Ferrari F355 Challenge 2 - International \Course Edition (twin/deluxe, prototype) no cart 23399 21 (64Mb) present 315-6206 317-0287-COM content is the same as regular 171-7919A cart +Mushiking (2K3 2ND ?, prototype) no cart none 11 (64Mb) present 315-6206 not present PCB have label 840-0150B-FLS, not dumped. Inu No Osanpo / Dog Walking (Rev A) 840-0073C 22294A 16 (64Mb) present 315-6206 317-0316-JPN requires 837-13844 JVS IO with DIPSW 1 ON Samba de Amigo (prototype) no cart * 21*(64Mb) present 315-6206 317-0270-COM * only first 14 flash roms contain game data, instead of EPROM have tiny PCB with 2 flashroms on it Shootout Pool Prize Ver.B -P 840-0136C ** 21*(64Mb) present 317-6206 not present * only first 4 flash roms contain game data, ** instead of EPROM have tiny PCB with 2 flashroms on it diff --git a/src/mame/drivers/nc.cpp b/src/mame/drivers/nc.cpp index 9591e98f3a5..9e3ad119c76 100644 --- a/src/mame/drivers/nc.cpp +++ b/src/mame/drivers/nc.cpp @@ -855,8 +855,7 @@ void nc100_state::nc100_io(address_map &map) map(0x91, 0x9f).r(FUNC(nc100_state::nc_irq_status_r)); map(0xa0, 0xaf).r(FUNC(nc100_state::nc100_card_battery_status_r)); map(0xb0, 0xb9).r(FUNC(nc100_state::nc_key_data_in_r)); - map(0xc0, 0xc0).rw(m_uart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xc1, 0xc1).rw(m_uart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xc0, 0xc1).rw(m_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xd0, 0xdf).rw("rtc", FUNC(tc8521_device::read), FUNC(tc8521_device::write)); } @@ -1259,10 +1258,9 @@ void nc200_state::nc200_io(address_map &map) map(0x90, 0x90).rw(FUNC(nc200_state::nc_irq_status_r), FUNC(nc200_state::nc200_irq_status_w)); map(0xa0, 0xa0).r(FUNC(nc200_state::nc200_card_battery_status_r)); map(0xb0, 0xb9).r(FUNC(nc200_state::nc_key_data_in_r)); - map(0xc0, 0xc0).rw(m_uart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xc1, 0xc1).rw(m_uart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xc0, 0xc1).rw(m_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xd0, 0xd1).rw("mc", FUNC(mc146818_device::read), FUNC(mc146818_device::write)); - map(0xe0, 0xe1).m("upd765", FUNC(upd765a_device::map)); + map(0xe0, 0xe1).m(m_fdc, FUNC(upd765a_device::map)); } static INPUT_PORTS_START(nc200) @@ -1484,8 +1482,8 @@ MACHINE_CONFIG_START(nc200_state::nc200) m_uart->rxrdy_handler().set(FUNC(nc200_state::nc200_rxrdy_callback)); m_uart->txrdy_handler().set(FUNC(nc200_state::nc200_txrdy_callback)); - MCFG_UPD765A_ADD("upd765", true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, nc200_state, nc200_fdc_interrupt)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(FUNC(nc200_state::nc200_fdc_interrupt)); MCFG_FLOPPY_DRIVE_ADD("upd765:0", ibmpc_floppies, "525dd", ibmpc_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", ibmpc_floppies, "525dd", ibmpc_floppy_formats) diff --git a/src/mame/drivers/neogeo.cpp b/src/mame/drivers/neogeo.cpp index bec0233cf24..f607b266cb5 100644 --- a/src/mame/drivers/neogeo.cpp +++ b/src/mame/drivers/neogeo.cpp @@ -560,30 +560,7 @@ #include "neogeo.lh" -#define VERBOSE (0) - - #define LOG_VIDEO_SYSTEM (0) -#define LOG_MAIN_CPU_BANKING (0) -#define LOG_AUDIO_CPU_BANKING (0) - - -/************************************* - * - * Main CPU interrupt generation - * - *************************************/ - - - -// The display counter is automatically reloaded with the load register contents on scanline 224, -// 1146 mclks from the rising edge of /HSYNC. -#define NEOGEO_VBLANK_RELOAD_HTIM (attotime::from_ticks(1146, NEOGEO_MASTER_CLOCK)) - -#define IRQ2CTRL_ENABLE (0x10) -#define IRQ2CTRL_LOAD_RELATIVE (0x20) -#define IRQ2CTRL_AUTOLOAD_VBLANK (0x40) -#define IRQ2CTRL_AUTOLOAD_REPEAT (0x80) class mvs_state : public ngarcade_base_state @@ -604,7 +581,7 @@ public: protected: virtual void machine_start() override; - virtual void neogeo_postload() override; + virtual void device_post_load() override; virtual void output_strobe(uint8_t bits, uint8_t data) { } virtual void set_outputs() { } @@ -751,12 +728,28 @@ public: protected: virtual void machine_start() override; - virtual void neogeo_postload() override; + virtual void device_post_load() override; void aes_main_map(address_map &map); }; + +/************************************* + * + * Main CPU interrupt generation + * + *************************************/ + +// The display counter is automatically reloaded with the load register contents on scanline 224, +// 1146 mclks from the rising edge of /HSYNC. +#define NEOGEO_VBLANK_RELOAD_HTIM (attotime::from_ticks(1146, NEOGEO_MASTER_CLOCK)) + +#define IRQ2CTRL_ENABLE (0x10) +#define IRQ2CTRL_LOAD_RELATIVE (0x20) +#define IRQ2CTRL_AUTOLOAD_VBLANK (0x40) +#define IRQ2CTRL_AUTOLOAD_REPEAT (0x80) + void neogeo_base_state::adjust_display_position_interrupt_timer() { attotime period = attotime::from_ticks((uint64_t)m_display_counter + 1, NEOGEO_PIXEL_CLOCK); @@ -1351,38 +1344,22 @@ void neogeo_base_state::init_audio() void neogeo_base_state::init_ym() { - uint8_t *ROM; - uint32_t len; - // Resetting a sound device causes the core to update() it and generate samples if it's not up to date. - // Thus we preemptively reset it here while the old pointers are still valid so it's up to date and - // doesn't generate samples below when we reset it for the new pointers. m_ym->reset(); - // all these region_free / region_alloc machinery is needed because current YM emulation does not allow - // to pass a ROM pointer different from a "ymsnd" / "ymsnd.deltat" region, and therefore we need to copy - // the ROM(s) from the cart to the corresponding region(s) with appropriate names... + address_space &adpcm_a_space = m_ym->space(0); + adpcm_a_space.unmap_readwrite(0x000000, 0xffffff); + if (m_slots[m_curr_slot] && m_slots[m_curr_slot]->get_ym_size()) - { - ROM = m_slots[m_curr_slot]->get_ym_base(); - len = m_slots[m_curr_slot]->get_ym_size(); - if (memregion(":ymsnd")) - machine().memory().region_free(":ymsnd"); - machine().memory().region_alloc(":ymsnd", len, 1, ENDIANNESS_LITTLE); - memcpy(memregion(":ymsnd")->base(), ROM, len); - } + adpcm_a_space.install_rom(0, m_slots[m_curr_slot]->get_ym_size() - 1, m_slots[m_curr_slot]->get_ym_base()); - if (memregion(":ymsnd.deltat")) - machine().memory().region_free(":ymsnd.deltat"); - if (m_slots[m_curr_slot] && m_slots[m_curr_slot]->get_ymdelta_size()) - { - ROM = m_slots[m_curr_slot]->get_ymdelta_base(); - len = m_slots[m_curr_slot]->get_ymdelta_size(); - machine().memory().region_alloc(":ymsnd.deltat", len, 1, ENDIANNESS_LITTLE); - memcpy(memregion(":ymsnd.deltat")->base(), ROM, len); - } + address_space &adpcm_b_space = m_ym->space(1); + adpcm_b_space.unmap_readwrite(0x000000, 0xffffff); - m_ym->reset(); // reset it again to get the new pointers + if (m_slots[m_curr_slot] && m_slots[m_curr_slot]->get_ymdelta_size()) + adpcm_b_space.install_rom(0, m_slots[m_curr_slot]->get_ymdelta_size() - 1, m_slots[m_curr_slot]->get_ymdelta_base()); + else if (m_slots[m_curr_slot] && m_slots[m_curr_slot]->get_ym_size()) + adpcm_b_space.install_rom(0, m_slots[m_curr_slot]->get_ym_size() - 1, m_slots[m_curr_slot]->get_ym_base()); } void neogeo_base_state::init_sprites() @@ -1575,8 +1552,6 @@ void neogeo_base_state::machine_start() save_item(NAME(m_bank_base)); save_item(NAME(m_use_cart_vectors)); save_item(NAME(m_use_cart_audio)); - - machine().save().register_postload(save_prepost_delegate(FUNC(neogeo_base_state::neogeo_postload), this)); } void ngarcade_base_state::machine_start() @@ -1645,14 +1620,15 @@ void mvs_led_el_state::machine_start() } -void neogeo_base_state::neogeo_postload() +void neogeo_base_state::device_post_load() { m_bank_audio_main->set_entry(m_use_cart_audio); + set_pens(); } -void mvs_state::neogeo_postload() +void mvs_state::device_post_load() { - ngarcade_base_state::neogeo_postload(); + ngarcade_base_state::device_post_load(); set_outputs(); if (m_slots[m_curr_slot] && m_slots[m_curr_slot]->get_rom_size() > 0) @@ -1935,11 +1911,11 @@ INPUT_CHANGED_MEMBER(aes_base_state::aes_jp1) MACHINE_CONFIG_START(neogeo_base_state::neogeo_base) /* basic machine hardware */ - MCFG_DEVICE_ADD(m_maincpu, M68000, NEOGEO_MAIN_CPU_CLOCK) + M68000(config, m_maincpu, NEOGEO_MAIN_CPU_CLOCK); - MCFG_DEVICE_ADD(m_audiocpu, Z80, NEOGEO_AUDIO_CPU_CLOCK) - MCFG_DEVICE_PROGRAM_MAP(audio_map) - MCFG_DEVICE_IO_MAP(audio_io_map) + Z80(config, m_audiocpu, NEOGEO_AUDIO_CPU_CLOCK); + m_audiocpu->set_addrmap(AS_PROGRAM, &neogeo_base_state::audio_map); + m_audiocpu->set_addrmap(AS_IO, &neogeo_base_state::audio_io_map); HC259(config, m_systemlatch); m_systemlatch->q_out_cb<0>().set(FUNC(neogeo_base_state::set_screen_shadow)); @@ -1954,7 +1930,7 @@ MACHINE_CONFIG_START(neogeo_base_state::neogeo_base) MCFG_SCREEN_ADD(m_screen, RASTER) MCFG_SCREEN_RAW_PARAMS(NEOGEO_PIXEL_CLOCK, NEOGEO_HTOTAL, NEOGEO_HBEND, NEOGEO_HBSTART, NEOGEO_VTOTAL, NEOGEO_VBEND, NEOGEO_VBSTART) - MCFG_SCREEN_UPDATE_DRIVER(neogeo_base_state, screen_update_neogeo) + MCFG_SCREEN_UPDATE_DRIVER(neogeo_base_state, screen_update) /* 4096 colors * two banks * normal and shadow */ MCFG_PALETTE_ADD_INIT_BLACK(m_palette, 4096*2*2) @@ -1980,38 +1956,36 @@ MACHINE_CONFIG_START(neogeo_base_state::neogeo_stereo) SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - MCFG_DEVICE_MODIFY("ymsnd") - MCFG_SOUND_ROUTE(0, "lspeaker", 0.28) - MCFG_SOUND_ROUTE(0, "rspeaker", 0.28) - MCFG_SOUND_ROUTE(1, "lspeaker", 0.98) - MCFG_SOUND_ROUTE(2, "rspeaker", 0.98) + m_ym->add_route(0, "lspeaker", 0.28); + m_ym->add_route(0, "rspeaker", 0.28); + m_ym->add_route(1, "lspeaker", 0.98); + m_ym->add_route(2, "rspeaker", 0.98); MACHINE_CONFIG_END -MACHINE_CONFIG_START(ngarcade_base_state::neogeo_arcade) +void ngarcade_base_state::neogeo_arcade(machine_config &config) +{ neogeo_base(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(neogeo_main_map) + m_maincpu->set_addrmap(AS_PROGRAM, &ngarcade_base_state::neogeo_main_map); m_systemlatch->q_out_cb<5>().set(FUNC(ngarcade_base_state::set_use_cart_audio)); m_systemlatch->q_out_cb<6>().set(FUNC(ngarcade_base_state::set_save_ram_unlock)); WATCHDOG_TIMER(config, "watchdog").set_time(attotime::from_ticks(3244030, NEOGEO_MASTER_CLOCK)); - MCFG_UPD4990A_ADD("upd4990a", XTAL(32'768), NOOP, NOOP) + UPD4990A(config, m_upd4990a); NVRAM(config, "saveram", nvram_device::DEFAULT_ALL_0); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(ngarcade_base_state::neogeo_mono) SPEAKER(config, "speaker").front_center(); - MCFG_DEVICE_MODIFY("ymsnd") - MCFG_SOUND_ROUTE(0, "speaker", 0.28) - MCFG_SOUND_ROUTE(1, "speaker", 0.49) - MCFG_SOUND_ROUTE(2, "speaker", 0.49) + m_ym->add_route(0, "speaker", 0.28); + m_ym->add_route(1, "speaker", 0.49); + m_ym->add_route(2, "speaker", 0.49); MACHINE_CONFIG_END @@ -2156,9 +2130,9 @@ void aes_state::machine_start() m_sprgen->neogeo_set_fixed_layer_source(1); } -void aes_state::neogeo_postload() +void aes_state::device_post_load() { - aes_base_state::neogeo_postload(); + aes_base_state::device_post_load(); if (m_slots[m_curr_slot] && m_slots[m_curr_slot]->get_rom_size() > 0) m_bank_cartridge->set_base((uint8_t *)m_slots[m_curr_slot]->get_rom_base() + m_bank_base); @@ -2169,8 +2143,7 @@ MACHINE_CONFIG_START(aes_state::aes) neogeo_base(config); neogeo_stereo(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(aes_main_map) + m_maincpu->set_addrmap(AS_PROGRAM, &aes_state::aes_main_map); NG_MEMCARD(config, m_memcard, 0); @@ -2314,8 +2287,7 @@ MACHINE_CONFIG_END ROM_LOAD( "sm1.sm1", 0x00000, 0x20000, CRC(94416d67) SHA1(42f9d7ddd6c0931fd64226a60dc73602b2819dcf) ) \ ROM_REGION( 0x20000, "cslot1:audiocpu", 0 ) \ ROM_LOAD( name, 0x00000, 0x10000, hash ) \ - ROM_RELOAD( 0x10000, 0x10000 ) \ - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) + ROM_RELOAD( 0x10000, 0x10000 ) #define NEO_BIOS_AUDIO_128K(name, hash) \ NEOGEO_BIOS \ @@ -2323,8 +2295,7 @@ MACHINE_CONFIG_END ROM_LOAD( "sm1.sm1", 0x00000, 0x20000, CRC(94416d67) SHA1(42f9d7ddd6c0931fd64226a60dc73602b2819dcf) ) \ ROM_REGION( 0x30000, "cslot1:audiocpu", 0 ) \ ROM_LOAD( name, 0x00000, 0x20000, hash ) \ - ROM_RELOAD( 0x10000, 0x20000 ) \ - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) + ROM_RELOAD( 0x10000, 0x20000 ) #define NEO_BIOS_AUDIO_256K(name, hash) \ NEOGEO_BIOS \ @@ -2332,8 +2303,7 @@ MACHINE_CONFIG_END ROM_LOAD( "sm1.sm1", 0x00000, 0x20000, CRC(94416d67) SHA1(42f9d7ddd6c0931fd64226a60dc73602b2819dcf) ) \ ROM_REGION( 0x50000, "cslot1:audiocpu", 0 ) \ ROM_LOAD( name, 0x00000, 0x40000, hash ) \ - ROM_RELOAD( 0x10000, 0x40000 ) \ - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) + ROM_RELOAD( 0x10000, 0x40000 ) #define NEO_BIOS_AUDIO_512K(name, hash) \ NEOGEO_BIOS \ @@ -2341,9 +2311,7 @@ MACHINE_CONFIG_END ROM_LOAD( "sm1.sm1", 0x00000, 0x20000, CRC(94416d67) SHA1(42f9d7ddd6c0931fd64226a60dc73602b2819dcf) ) \ ROM_REGION( 0x90000, "cslot1:audiocpu", 0 ) \ ROM_LOAD( name, 0x00000, 0x80000, hash ) \ - ROM_RELOAD( 0x10000, 0x80000 ) \ - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) - + ROM_RELOAD( 0x10000, 0x80000 ) #define NEO_BIOS_AUDIO_ENCRYPTED_128K(name, hash) \ NEOGEO_BIOS \ @@ -2351,24 +2319,23 @@ MACHINE_CONFIG_END ROM_LOAD( "sm1.sm1", 0x00000, 0x20000, CRC(94416d67) SHA1(42f9d7ddd6c0931fd64226a60dc73602b2819dcf) ) \ ROM_REGION( 0x90000, "cslot1:audiocpu", ROMREGION_ERASEFF ) \ ROM_REGION( 0x80000, "cslot1:audiocrypt", 0 ) \ - ROM_LOAD( name, 0x00000, 0x20000, hash ) \ - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) + ROM_LOAD( name, 0x00000, 0x20000, hash ) + #define NEO_BIOS_AUDIO_ENCRYPTED_256K(name, hash) \ NEOGEO_BIOS \ ROM_REGION( 0x20000, "audiobios", 0 ) \ ROM_LOAD( "sm1.sm1", 0x00000, 0x20000, CRC(94416d67) SHA1(42f9d7ddd6c0931fd64226a60dc73602b2819dcf) ) \ ROM_REGION( 0x90000, "cslot1:audiocpu", ROMREGION_ERASEFF ) \ ROM_REGION( 0x80000, "cslot1:audiocrypt", 0 ) \ - ROM_LOAD( name, 0x00000, 0x40000, hash ) \ - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) + ROM_LOAD( name, 0x00000, 0x40000, hash ) + #define NEO_BIOS_AUDIO_ENCRYPTED_512K(name, hash) \ NEOGEO_BIOS \ ROM_REGION( 0x20000, "audiobios", 0 ) \ ROM_LOAD( "sm1.sm1", 0x00000, 0x20000, CRC(94416d67) SHA1(42f9d7ddd6c0931fd64226a60dc73602b2819dcf) ) \ ROM_REGION( 0x90000, "cslot1:audiocpu", ROMREGION_ERASEFF ) \ ROM_REGION( 0x80000, "cslot1:audiocrypt", 0 ) \ - ROM_LOAD( name, 0x00000, 0x80000, hash ) \ - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) + ROM_LOAD( name, 0x00000, 0x80000, hash ) @@ -2411,8 +2378,6 @@ ROM_START( neogeo ) ROM_REGION( 0x20000, "fixedbios", 0 ) ROM_LOAD( "sfix.sfix", 0x000000, 0x20000, CRC(c2ea0cfd) SHA1(fd4a618cdcdbf849374f0a50dd8efe9dbab706c3) ) - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) - ROM_REGION( 0x100000, "sprites", ROMREGION_ERASEFF ) ROM_END @@ -2441,10 +2406,6 @@ ROM_START( aes ) ROM_REGION( 0x20000, "fixed", ROMREGION_ERASEFF ) - ROM_REGION( 0x1000000, "ymsnd", ROMREGION_ERASEFF ) - - ROM_REGION( 0x1000000, "ymsnd.deltat", ROMREGION_ERASEFF ) - ROM_REGION( 0x900000, "sprites", ROMREGION_ERASEFF ) ROM_END @@ -6473,7 +6434,6 @@ ROM_START( dragonsh ) ROM_REGION( 0x30000, "cslot1:audiocpu", ROMREGION_ERASEFF ) // not present - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) ROM_REGION( 0x200000, "cslot1:ymsnd", ROMREGION_ERASE00 ) ROM_LOAD( "sram.v1", 0x000000, 0x200000, NO_DUMP ) // was a dead AXS2000PC 2MB sram card, battery dead, data lost. @@ -6742,6 +6702,41 @@ ROM_START( mslug ) ROM_END /**************************************** + Nazca development cartridge, purpose unknown + + MVS-TEMP (Program ROMs, also a HD64180SCP10, no S1 ROM) + TENP0 SND (tiny board with only M1 ROM) +****************************************/ + +ROM_START( mvstemp ) + ROM_REGION( 0x200000, "cslot1:maincpu", ROMREGION_BE|ROMREGION_16BIT ) + ROM_LOAD16_BYTE( "mvs-ph", 0x00000, 0x10000, CRC(c461c209) SHA1(baeb27b0c4cc05d0a692325687208d47933ae841)) + ROM_LOAD16_BYTE( "mvs-pl", 0x00001, 0x10000, CRC(f82c3595) SHA1(5af628377d445e1494e695bbb45795d65f3a42e7) ) + + ROM_REGION( 0x20000, "cslot1:fixed", ROMREGION_ERASE00 ) + // No S1 data (no position for it) + + ROM_REGION( 0x20000, "fixedbios", 0 ) + ROM_LOAD( "sfix.sfix", 0x000000, 0x20000, CRC(c2ea0cfd) SHA1(fd4a618cdcdbf849374f0a50dd8efe9dbab706c3) ) // BIOS + ROM_Y_ZOOM + + NEO_BIOS_AUDIO_64K( "s-800h", CRC(307fffb2) SHA1(0a7a21c2f1a1f245de59d588f20b5ffea522a949) ) + + ROM_REGION( 0x200000, "cslot1:hd64180", 0 ) // HD64180SCP10 program, not hooked up + ROM_LOAD( "mvs64p", 0x000000, 0x10000, CRC(42a1d73a) SHA1(cb82a73f087ed6ca936dbe36a0a85451e63c9c8c) ) + + ROM_REGION( 0x117, "cslot1:pld", 0 ) + ROM_LOAD( "ic6.bin", 0x000, 0x117, CRC(7e3da063) SHA1(2778932f8d4c48101c728e2f1906e54f8d73ff90) ) + ROM_LOAD( "ic12.bin", 0x000, 0x117, CRC(b4f3c5ae) SHA1(61a1cda077c6998f0427922b1d229ef05e65e6ee) ) + + ROM_REGION( 0x800000, "cslot1:ymsnd", ROMREGION_ERASE00 ) + // No V data (no positions for it) + + ROM_REGION( 0x1000000, "cslot1:sprites", ROMREGION_ERASE00 ) + // No C data (no positions for it) +ROM_END + +/**************************************** ID-0202 . ??M-202 NEO-MVS PROG 4096 / NEO-MVS CHA 42G-2 @@ -7099,7 +7094,6 @@ ROM_START( kizuna4p ) /* same cartridge as kizuna - 4-player mode is enabled by ROM_LOAD16_WORD_SWAP_BIOS( 0, "sp-45.sp1",0x00000, 0x080000, CRC(03cc9f6a) SHA1(cdf1f49e3ff2bac528c21ed28449cf35b7957dc1) ) ROM_SYSTEM_BIOS( 1, "japan", "Japan MVS (J3)" ) ROM_LOAD16_WORD_SWAP_BIOS( 1, "japan-j3.bin",0x00000, 0x020000, CRC(dff6d41f) SHA1(e92910e20092577a4523a6b39d578a71d4de7085) ) - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) ROM_REGION( 0x30000, "cslot1:audiocpu", 0 ) ROM_LOAD( "216-m1.m1", 0x00000, 0x20000, CRC(1b096820) SHA1(72852e78c620038f8dafde5e54e02e418c31be9c) ) /* mask rom TC531001 */ @@ -7796,7 +7790,6 @@ ROM_START( irrmaze ) /* MVS ONLY RELEASE */ ROM_REGION16_BE( 0x20000, "mainbios", 0 ) /* special BIOS with trackball support, we only have one Irritating Maze bios and thats asia */ ROM_LOAD16_WORD_SWAP("236-bios.sp1", 0x00000, 0x020000, CRC(853e6b96) SHA1(de369cb4a7df147b55168fa7aaf0b98c753b735e) ) - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) ROM_REGION( 0x30000, "cslot1:audiocpu", 0 ) ROM_LOAD( "236-m1.m1", 0x00000, 0x20000, CRC(880a1abd) SHA1(905afa157aba700e798243b842792e50729b19a0) ) /* TC531001 */ @@ -10944,7 +10937,6 @@ ROM_START( svcboot ) ROM_REGION( 0x20000, "audiobios", 0 ) ROM_LOAD( "sm1.sm1", 0x00000, 0x20000, CRC(94416d67) SHA1(42f9d7ddd6c0931fd64226a60dc73602b2819dcf) ) - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) ROM_REGION( 0x50000, "cslot1:audiocpu", 0 ) ROM_LOAD( "svc-m1.bin", 0x20000, 0x10000, CRC(804328c3) SHA1(f931636c563b0789d4812033a77b47bf663db43f) ) @@ -10982,7 +10974,6 @@ ROM_START( svcplus ) ROM_REGION( 0x20000, "audiobios", 0 ) ROM_LOAD( "sm1.sm1", 0x00000, 0x20000, CRC(94416d67) SHA1(42f9d7ddd6c0931fd64226a60dc73602b2819dcf) ) - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) ROM_REGION( 0x50000, "cslot1:audiocpu", 0 ) ROM_LOAD( "svc-m1.bin", 0x20000, 0x10000, CRC(804328c3) SHA1(f931636c563b0789d4812033a77b47bf663db43f) ) @@ -11021,7 +11012,6 @@ ROM_START( svcplusa ) ROM_REGION( 0x20000, "audiobios", 0 ) ROM_LOAD( "sm1.sm1", 0x00000, 0x20000, CRC(94416d67) SHA1(42f9d7ddd6c0931fd64226a60dc73602b2819dcf) ) - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) ROM_REGION( 0x50000, "cslot1:audiocpu", 0 ) ROM_LOAD( "svc-m1.bin", 0x20000, 0x10000, CRC(804328c3) SHA1(f931636c563b0789d4812033a77b47bf663db43f) ) @@ -11058,7 +11048,6 @@ ROM_START( svcsplus ) ROM_REGION( 0x20000, "audiobios", 0 ) ROM_LOAD( "sm1.sm1", 0x00000, 0x20000, CRC(94416d67) SHA1(42f9d7ddd6c0931fd64226a60dc73602b2819dcf) ) - ROM_REGION( 0x10000, "ymsnd", ROMREGION_ERASEFF ) ROM_REGION( 0x50000, "cslot1:audiocpu", 0 ) ROM_LOAD( "svc-m1.bin", 0x20000, 0x10000, CRC(804328c3) SHA1(f931636c563b0789d4812033a77b47bf663db43f) ) @@ -11858,6 +11847,7 @@ GAME( 1991, bakatono, neogeo, neogeo_mj, neogeo_mj, mvs_led_state, empty_ini // Nazca (later acquired by SNK) GAME( 1996, turfmast, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Nazca", "Neo Turf Masters / Big Tournament Golf", MACHINE_SUPPORTS_SAVE ) GAME( 1996, mslug, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Nazca", "Metal Slug - Super Vehicle-001", MACHINE_SUPPORTS_SAVE ) +GAME( 1995?,mvstemp, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Nazca", "MVS-TEMP 'SubSystem Ver1.4' (Nazca development board)", MACHINE_NOT_WORKING ) // NMK GAME( 1994, zedblade, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "NMK", "Zed Blade / Operation Ragnarok", MACHINE_SUPPORTS_SAVE ) @@ -11887,7 +11877,7 @@ GAME( 1996, wakuwak7, neogeo, neobase, neogeo, mvs_led_state, empty_ini // Taito GAME( 1994, pbobblen, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Taito", "Puzzle Bobble / Bust-A-Move (Neo-Geo, NGM-083)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, pbobblenb, pbobblen, neobase, neogeo, mvs_led_state, empty_init, ROT0, "bootleg", "Puzzle Bobble / Bust-A-Move (Neo-Geo, bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1999, pbobbl2n, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Taito (SNK license)", "Puzzle Bobble 2 / Bust-A-Move Again (Neo-Geo)", MACHINE_SUPPORTS_SAVE ) +GAME( 1999, pbobbl2n, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Taito (SNK license)", "Puzzle Bobble 2 / Bust-A-Move Again (Neo-Geo)", MACHINE_SUPPORTS_SAVE ) // ported to Neo-Geo by SNK, original version is on Taito F3 GAME( 2003, pnyaa, neogeo, pnyaa, neogeo, mvs_led_state, empty_init, ROT0, "Aiky / Taito", "Pochi and Nyaa (Ver 2.02)", MACHINE_SUPPORTS_SAVE ) // this version does not show the web address on the title screen GAME( 2003, pnyaaa, pnyaa, pnyaa, neogeo, mvs_led_state, empty_init, ROT0, "Aiky / Taito", "Pochi and Nyaa (Ver 2.00)", MACHINE_SUPPORTS_SAVE ) @@ -11915,12 +11905,12 @@ GAME( 1995, froman2b, neogeo, neobase, neogeo, mvs_led_state, empty_ini // Visco GAME( 1992, androdun, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Andro Dunos (NGM-049 ~ NGH-049)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, puzzledp, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Taito (Visco license)", "Puzzle De Pon!", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, neomrdo, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Neo Mr. Do!", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, puzzledp, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Puzzle De Pon!", MACHINE_SUPPORTS_SAVE ) // game concept licensed from Taito +GAME( 1996, neomrdo, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Neo Mr. Do!", MACHINE_SUPPORTS_SAVE ) // game concept licensed from Universal GAME( 1995, goalx3, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Goal! Goal! Goal!", MACHINE_SUPPORTS_SAVE ) GAME( 1996, neodrift, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Neo Drift Out - New Technology", MACHINE_SUPPORTS_SAVE ) GAME( 1996, breakers, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Breakers", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, puzzldpr, puzzledp, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Taito (Visco license)", "Puzzle De Pon! R!", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, puzzldpr, puzzledp, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Puzzle De Pon! R!", MACHINE_SUPPORTS_SAVE ) // game concept licensed from Taito GAME( 1998, breakrev, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Breakers Revenge", MACHINE_SUPPORTS_SAVE ) GAME( 1998, flipshot, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Battle Flip Shot", MACHINE_SUPPORTS_SAVE ) GAME( 1999, ctomaday, neogeo, neobase, neogeo, mvs_led_state, empty_init, ROT0, "Visco", "Captain Tomaday", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/neogeocd.cpp b/src/mame/drivers/neogeocd.cpp index 5a55a0125d2..6ab22f18da7 100644 --- a/src/mame/drivers/neogeocd.cpp +++ b/src/mame/drivers/neogeocd.cpp @@ -33,14 +33,6 @@ #include "softlist.h" -/* Stubs for various functions called by the FBA code, replace with MAME specifics later */ - -uint8_t *NeoSpriteRAM, *NeoTextRAM; -//uint8_t* NeoSpriteROM; -//uint8_t* NeoTextROM; -uint8_t* YM2610ADPCMAROM; -uint8_t* NeoZ80ROMActive; - // was it actually released in eu / asia? #define NEOCD_REGION_ASIA 3 // IronClad runs with a darkened screen (MVS has the same issue) #define NEOCD_REGION_EUROPE 2 // ^ @@ -56,17 +48,19 @@ class ngcd_state : public aes_base_state public: ngcd_state(const machine_config &mconfig, device_type type, const char *tag) : aes_base_state(mconfig, type, tag) - , m_tempcdc(*this,"tempcdc") + , m_tempcdc(*this, "tempcdc") + , m_z80_ram(*this, "z80_ram") + , m_adpcm_ram(*this, "adpcm_ram") { - NeoCDDMAAddress1 = 0; - NeoCDDMAAddress2 = 0; - NeoCDDMAValue1 = 0; - NeoCDDMAValue2 = 0; - NeoCDDMACount = 0; - NeoCDDMAMode = 0; - nIRQAcknowledge = ~0; - nNeoCDIRQVectorAck = 0; - nNeoCDIRQVector = 0; + m_dma_address1 = 0; + m_dma_address2 = 0; + m_dma_value1 = 0; + m_dma_value2 = 0; + m_dma_count = 0; + m_dma_mode = 0; + m_irq_ack = ~0; + m_irq_vector_ack = 0; + m_irq_vector = 0; m_has_sprite_bus = true; m_has_text_bus = true; m_has_ymrom_bus = true; @@ -74,66 +68,71 @@ public: } optional_device<lc89510_temp_device> m_tempcdc; + required_shared_ptr<uint8_t> m_z80_ram; + required_shared_ptr<uint8_t> m_adpcm_ram; + void do_dma(address_space& curr_space); + void set_dma_regs(int offset, uint16_t wordValue); - void NeoCDDoDMA(address_space& curr_space); - void set_DMA_regs(int offset, uint16_t wordValue); - - DECLARE_READ16_MEMBER(neocd_memcard_r); - DECLARE_WRITE16_MEMBER(neocd_memcard_w); - DECLARE_READ16_MEMBER(neocd_control_r); - DECLARE_WRITE16_MEMBER(neocd_control_w); - DECLARE_READ8_MEMBER(neocd_transfer_r); - DECLARE_WRITE8_MEMBER(neocd_transfer_w); + DECLARE_READ16_MEMBER(memcard_r); + DECLARE_WRITE16_MEMBER(memcard_w); + DECLARE_READ16_MEMBER(control_r); + DECLARE_WRITE16_MEMBER(control_w); + DECLARE_READ8_MEMBER(transfer_r); + DECLARE_WRITE8_MEMBER(transfer_w); DECLARE_INPUT_CHANGED_MEMBER(aes_jp1); // neoCD - int32_t nActiveTransferArea; - int32_t nSpriteTransferBank; - int32_t nADPCMTransferBank; - int32_t NeoCDDMAAddress1; - int32_t NeoCDDMAAddress2; - int32_t NeoCDDMAValue1; - int32_t NeoCDDMAValue2; - int32_t NeoCDDMACount; - int32_t NeoCDDMAMode; - int32_t nIRQAcknowledge; - int nNeoCDIRQVectorAck; - int nNeoCDIRQVector; + int32_t m_active_transfer_area; + int32_t m_sprite_transfer_bank; + int32_t m_adpcm_transfer_bank; + int32_t m_dma_address1; + int32_t m_dma_address2; + int32_t m_dma_value1; + int32_t m_dma_value2; + int32_t m_dma_count; + int32_t m_dma_mode; + int32_t m_irq_ack; + int m_irq_vector_ack; + int m_irq_vector; bool m_has_sprite_bus; bool m_has_text_bus; bool m_has_ymrom_bus; bool m_has_z80_bus; - int get_nNeoCDIRQVectorAck(void) { return nNeoCDIRQVectorAck; } - void set_nNeoCDIRQVectorAck(int val) { nNeoCDIRQVectorAck = val; } - int get_nNeoCDIRQVector(void) { return nNeoCDIRQVector; } - void NeoCDIRQUpdate(uint8_t byteValue); + int get_irq_vector_ack(void) { return m_irq_vector_ack; } + void set_irq_vector_ack(int val) { m_irq_vector_ack = val; } + int get_irq_vector(void) { return m_irq_vector; } + void irq_update(uint8_t byteValue); // from the CDC void interrupt_callback_type1(void); void interrupt_callback_type2(void); void interrupt_callback_type3(void); - uint8_t nTransferWriteEnable; + uint8_t m_transfer_write_enable; bool prohibit_cdc_irq; // hack? - uint32_t screen_update_neocd(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); void init_neocdz(); void init_neocdzj(); - IRQ_CALLBACK_MEMBER(neocd_int_callback); + IRQ_CALLBACK_MEMBER(int_callback); std::unique_ptr<uint8_t[]> m_meminternal_data; + std::unique_ptr<uint8_t[]> m_sprite_ram; + std::unique_ptr<uint8_t[]> m_fix_ram; + void neocd(machine_config &config); void neocd_audio_io_map(address_map &map); void neocd_audio_map(address_map &map); void neocd_main_map(address_map &map); + void neocd_ym_map(address_map &map); protected: virtual void machine_start() override; @@ -154,13 +153,13 @@ protected: /* The NeoCD has an 8kB internal memory card, instead of memcard slots like the MVS and AES */ -READ16_MEMBER(ngcd_state::neocd_memcard_r) +READ16_MEMBER(ngcd_state::memcard_r) { return m_meminternal_data[offset] | 0xff00; } -WRITE16_MEMBER(ngcd_state::neocd_memcard_w) +WRITE16_MEMBER(ngcd_state::memcard_w) { if (ACCESSING_BITS_0_7) { @@ -175,7 +174,7 @@ WRITE16_MEMBER(ngcd_state::neocd_memcard_w) * *************************************/ -READ16_MEMBER(ngcd_state::neocd_control_r) +READ16_MEMBER(ngcd_state::control_r) { uint32_t sekAddress = 0xff0000+ (offset*2); @@ -204,7 +203,7 @@ READ16_MEMBER(ngcd_state::neocd_control_r) } -WRITE16_MEMBER(ngcd_state::neocd_control_w) +WRITE16_MEMBER(ngcd_state::control_w) { uint32_t sekAddress = 0xff0000+ (offset*2); uint16_t wordValue = data; @@ -220,7 +219,7 @@ WRITE16_MEMBER(ngcd_state::neocd_control_w) break; case 0x000E: - NeoCDIRQUpdate(wordValue); // irqack + irq_update(wordValue); // irqack break; case 0x0016: @@ -230,7 +229,7 @@ WRITE16_MEMBER(ngcd_state::neocd_control_w) // DMA controller case 0x0060: if (byteValue & 0x40) { - NeoCDDoDMA(space); + do_dma(space); } break; @@ -243,7 +242,7 @@ WRITE16_MEMBER(ngcd_state::neocd_control_w) case 0x0070: case 0x0072: case 0x007E: - set_DMA_regs(sekAddress & 0xFFFE, wordValue); + set_dma_regs(sekAddress & 0xFFFE, wordValue); break; // upload DMA controller program @@ -271,7 +270,7 @@ WRITE16_MEMBER(ngcd_state::neocd_control_w) // bprintf(PRINT_NORMAL, _T(" - NGCD 0xE00000 area -> 0x%02X (PC: 0x%06X)\n"), byteValue, SekGetPC(-1)); if (ACCESSING_BITS_0_7) { - nActiveTransferArea = byteValue; + m_active_transfer_area = byteValue; } break; @@ -343,7 +342,7 @@ WRITE16_MEMBER(ngcd_state::neocd_control_w) case 0x016e: // bprintf(PRINT_IMPORTANT, _T(" - NGCD 0xE00000 area write access %s (0x%02X, PC: 0x%06X)\n"), byteValue ? _T("enabled") : _T("disabled"), byteValue, SekGetPC(-1)); - nTransferWriteEnable = byteValue; + m_transfer_write_enable = byteValue; break; case 0x0180: { @@ -380,10 +379,10 @@ WRITE16_MEMBER(ngcd_state::neocd_control_w) break; } case 0x01A0: - nSpriteTransferBank = (byteValue & 3) << 20; + m_sprite_transfer_bank = (byteValue & 3) << 20; break; case 0x01A2: - nADPCMTransferBank = (byteValue & 1) << 19; + m_adpcm_transfer_bank = (byteValue & 1) << 19; break; @@ -403,61 +402,61 @@ WRITE16_MEMBER(ngcd_state::neocd_control_w) */ -READ8_MEMBER(ngcd_state::neocd_transfer_r) +READ8_MEMBER(ngcd_state::transfer_r) { uint32_t sekAddress = 0xe00000+ (offset); int address; sekAddress ^= 1; - switch (nActiveTransferArea) { + switch (m_active_transfer_area) { case 0: // Sprites - address = (nSpriteTransferBank + (sekAddress & 0x0FFFFF)); + address = (m_sprite_transfer_bank + (sekAddress & 0x0FFFFF)); // address is swizzled a bit due to out sprite decoding - if ((address&3)==0) return NeoSpriteRAM[address]; - if ((address&3)==1) return NeoSpriteRAM[address^3]; - if ((address&3)==2) return NeoSpriteRAM[address^3]; - if ((address&3)==3) return NeoSpriteRAM[address]; + if ((address&3)==0) return m_sprite_ram[address]; + if ((address&3)==1) return m_sprite_ram[address^3]; + if ((address&3)==2) return m_sprite_ram[address^3]; + if ((address&3)==3) return m_sprite_ram[address]; - return NeoSpriteRAM[nSpriteTransferBank + (sekAddress & 0x0FFFFF)]; + return m_sprite_ram[m_sprite_transfer_bank + (sekAddress & 0x0FFFFF)]; case 1: // ADPCM - return YM2610ADPCMAROM[nADPCMTransferBank + ((sekAddress & 0x0FFFFF) >> 1)]; + return m_adpcm_ram[m_adpcm_transfer_bank + ((sekAddress & 0x0FFFFF) >> 1)]; case 4: // Z80 if ((sekAddress & 0xfffff) >= 0x20000) return ~0; - return NeoZ80ROMActive[(sekAddress & 0x1FFFF) >> 1]; + return m_z80_ram[(sekAddress & 0x1FFFF) >> 1]; case 5: // Text - return NeoTextRAM[(sekAddress & 0x3FFFF) >> 1]; + return m_fix_ram[(sekAddress & 0x3FFFF) >> 1]; } return ~0; } -WRITE8_MEMBER(ngcd_state::neocd_transfer_w) +WRITE8_MEMBER(ngcd_state::transfer_w) { uint8_t byteValue = data; uint32_t sekAddress = 0xe00000+ (offset); - if (!nTransferWriteEnable) { + if (!m_transfer_write_enable) { // return; } int address; sekAddress ^= 1; - switch (nActiveTransferArea) { + switch (m_active_transfer_area) { case 0: // Sprites - address = (nSpriteTransferBank + (sekAddress & 0x0FFFFF)); + address = (m_sprite_transfer_bank + (sekAddress & 0x0FFFFF)); // address is swizzled a bit due to out sprite decoding - if ((address&3)==0) NeoSpriteRAM[address] = byteValue; - if ((address&3)==1) NeoSpriteRAM[address^3] = byteValue; - if ((address&3)==2) NeoSpriteRAM[address^3] = byteValue; - if ((address&3)==3) NeoSpriteRAM[address] = byteValue; + if ((address&3)==0) m_sprite_ram[address] = byteValue; + if ((address&3)==1) m_sprite_ram[address^3] = byteValue; + if ((address&3)==2) m_sprite_ram[address^3] = byteValue; + if ((address&3)==3) m_sprite_ram[address] = byteValue; break; case 1: // ADPCM - YM2610ADPCMAROM[nADPCMTransferBank + ((sekAddress & 0x0FFFFF) >> 1)] = byteValue; + m_adpcm_ram[m_adpcm_transfer_bank + ((sekAddress & 0x0FFFFF) >> 1)] = byteValue; break; case 4: // Z80 @@ -467,60 +466,60 @@ WRITE8_MEMBER(ngcd_state::neocd_transfer_w) // transfer area without the bus? - this should really be checked on hw if (m_has_z80_bus) { - YM2610ADPCMAROM[nADPCMTransferBank + ((sekAddress & 0x0FFFFF) >> 1)] = byteValue; + m_adpcm_ram[m_adpcm_transfer_bank + ((sekAddress & 0x0FFFFF) >> 1)] = byteValue; } else { // printf("sekAddress %08x %02x\n", sekAddress, data); if ((sekAddress & 0xfffff) >= 0x20000) break; - NeoZ80ROMActive[(sekAddress & 0x1FFFF) >> 1] = byteValue; + m_z80_ram[(sekAddress & 0x1FFFF) >> 1] = byteValue; } break; case 5: // Text - NeoTextRAM[(sekAddress & 0x3FFFF) >> 1] = byteValue; + m_fix_ram[(sekAddress & 0x3FFFF) >> 1] = byteValue; break; } } -void ngcd_state::set_DMA_regs(int offset, uint16_t wordValue) +void ngcd_state::set_dma_regs(int offset, uint16_t wordValue) { switch (offset) { case 0x0064: - NeoCDDMAAddress1 &= 0x0000FFFF; - NeoCDDMAAddress1 |= wordValue << 16; + m_dma_address1 &= 0x0000FFFF; + m_dma_address1 |= wordValue << 16; break; case 0x0066: - NeoCDDMAAddress1 &= 0xFFFF0000; - NeoCDDMAAddress1 |= wordValue; + m_dma_address1 &= 0xFFFF0000; + m_dma_address1 |= wordValue; break; case 0x0068: - NeoCDDMAAddress2 &= 0x0000FFFF; - NeoCDDMAAddress2 |= wordValue << 16; + m_dma_address2 &= 0x0000FFFF; + m_dma_address2 |= wordValue << 16; break; case 0x006A: - NeoCDDMAAddress2 &= 0xFFFF0000; - NeoCDDMAAddress2 |= wordValue; + m_dma_address2 &= 0xFFFF0000; + m_dma_address2 |= wordValue; break; case 0x006C: - NeoCDDMAValue1 = wordValue; + m_dma_value1 = wordValue; break; case 0x006E: - NeoCDDMAValue2 = wordValue; + m_dma_value2 = wordValue; break; case 0x0070: - NeoCDDMACount &= 0x0000FFFF; - NeoCDDMACount |= wordValue << 16; + m_dma_count &= 0x0000FFFF; + m_dma_count |= wordValue << 16; break; case 0x0072: - NeoCDDMACount &= 0xFFFF0000; - NeoCDDMACount |= wordValue; + m_dma_count &= 0xFFFF0000; + m_dma_count |= wordValue; break; case 0x007E: - NeoCDDMAMode = wordValue; + m_dma_mode = wordValue; // bprintf(PRINT_NORMAL, _T(" - DMA controller 0x%2X -> 0x%04X (PC: 0x%06X)\n"), sekAddress & 0xFF, wordValue, SekGetPC(-1)); break; @@ -582,7 +581,7 @@ int32_t ngcd_state::SekIdle(int32_t nCycles) */ -void ngcd_state::NeoCDDoDMA(address_space& curr_space) +void ngcd_state::do_dma(address_space& curr_space) { // The LC8953 chip has a programmable DMA controller, which is not properly emulated. // Since the software only uses it in a limited way, we can apply a simple heuristic @@ -594,9 +593,9 @@ void ngcd_state::NeoCDDoDMA(address_space& curr_space) // bprintf(PRINT_IMPORTANT, _T(" - DMA controller transfer started (PC: 0x%06X)\n"), SekGetPC(-1)); - switch (NeoCDDMAMode) { + switch (m_dma_mode) { case 0xCFFD: { -// bprintf(PRINT_NORMAL, _T(" adr : 0x%08X - 0x%08X <- address, skip odd bytes\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 8); +// bprintf(PRINT_NORMAL, _T(" adr : 0x%08X - 0x%08X <- address, skip odd bytes\n"), m_dma_address1, m_dma_address1 + m_dma_count * 8); // - DMA controller 0x7E -> 0xCFFD (PC: 0xC07CE2) // - DMA controller program[00] -> 0xFCF5 (PC: 0xC07CE8) @@ -608,21 +607,21 @@ void ngcd_state::NeoCDDoDMA(address_space& curr_space) // - DMA controller program[12] -> 0x2E02 (PC: 0xC07D0C) // - DMA controller program[14] -> 0xFDFF (PC: 0xC07D12) - SekIdle(NeoCDDMACount * 4); + SekIdle(m_dma_count * 4); - while (NeoCDDMACount--) { - curr_space.write_word(NeoCDDMAAddress1 + 0, NeoCDDMAAddress1 >> 24); - curr_space.write_word(NeoCDDMAAddress1 + 2, NeoCDDMAAddress1 >> 16); - curr_space.write_word(NeoCDDMAAddress1 + 4, NeoCDDMAAddress1 >> 8); - curr_space.write_word(NeoCDDMAAddress1 + 6, NeoCDDMAAddress1 >> 0); - NeoCDDMAAddress1 += 8; + while (m_dma_count--) { + curr_space.write_word(m_dma_address1 + 0, m_dma_address1 >> 24); + curr_space.write_word(m_dma_address1 + 2, m_dma_address1 >> 16); + curr_space.write_word(m_dma_address1 + 4, m_dma_address1 >> 8); + curr_space.write_word(m_dma_address1 + 6, m_dma_address1 >> 0); + m_dma_address1 += 8; } break; } case 0xE2DD: { -// bprintf(PRINT_NORMAL, _T(" copy: 0x%08X - 0x%08X <- 0x%08X - 0x%08X, skip odd bytes\n"), NeoCDDMAAddress2, NeoCDDMAAddress2 + NeoCDDMACount * 2, NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 4); +// bprintf(PRINT_NORMAL, _T(" copy: 0x%08X - 0x%08X <- 0x%08X - 0x%08X, skip odd bytes\n"), m_dma_address2, m_dma_address2 + m_dma_count * 2, m_dma_address1, m_dma_address1 + m_dma_count * 4); // - DMA controller 0x7E -> 0xE2DD (PC: 0xC0A190) // - DMA controller program[00] -> 0xFCF5 (PC: 0xC0A192) @@ -634,20 +633,20 @@ void ngcd_state::NeoCDDoDMA(address_space& curr_space) // - DMA controller program[12] -> 0x02FD (PC: 0xC0A19E) // - DMA controller program[14] -> 0xFFFF (PC: 0xC0A1A0) - SekIdle(NeoCDDMACount * 1); + SekIdle(m_dma_count * 1); - while (NeoCDDMACount--) { - curr_space.write_word(NeoCDDMAAddress2 + 0, curr_space.read_byte(NeoCDDMAAddress1 + 0)); - curr_space.write_word(NeoCDDMAAddress2 + 2, curr_space.read_byte(NeoCDDMAAddress1 + 1)); - NeoCDDMAAddress1 += 2; - NeoCDDMAAddress2 += 4; + while (m_dma_count--) { + curr_space.write_word(m_dma_address2 + 0, curr_space.read_byte(m_dma_address1 + 0)); + curr_space.write_word(m_dma_address2 + 2, curr_space.read_byte(m_dma_address1 + 1)); + m_dma_address1 += 2; + m_dma_address2 += 4; } break; } case 0xFC2D: { -// bprintf(PRINT_NORMAL, _T(" copy: 0x%08X - 0x%08X <- LC8951 external buffer, skip odd bytes\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 4); +// bprintf(PRINT_NORMAL, _T(" copy: 0x%08X - 0x%08X <- LC8951 external buffer, skip odd bytes\n"), m_dma_address1, m_dma_address1 + m_dma_count * 4); // - DMA controller 0x7E -> 0xFC2D (PC: 0xC0A190) // - DMA controller program[00] -> 0xFCF5 (PC: 0xC0A192) @@ -659,17 +658,17 @@ void ngcd_state::NeoCDDoDMA(address_space& curr_space) // - DMA controller program[12] -> 0x48E7 (PC: 0xC0A19E) // - DMA controller program[14] -> 0xFFFE (PC: 0xC0A1A0) - char* data = m_tempcdc->LC8915InitTransfer(NeoCDDMACount); + char* data = m_tempcdc->LC8915InitTransfer(m_dma_count); if (data == nullptr) { break; } - SekIdle(NeoCDDMACount * 4); + SekIdle(m_dma_count * 4); - while (NeoCDDMACount--) { - curr_space.write_byte(NeoCDDMAAddress1 + 0, data[0]); - curr_space.write_byte(NeoCDDMAAddress1 + 2, data[1]); - NeoCDDMAAddress1 += 4; + while (m_dma_count--) { + curr_space.write_byte(m_dma_address1 + 0, data[0]); + curr_space.write_byte(m_dma_address1 + 2, data[1]); + m_dma_address1 += 4; data += 2; } @@ -691,7 +690,7 @@ void ngcd_state::NeoCDDoDMA(address_space& curr_space) // - DMA controller program[14] -> 0xFCF5 (PC: 0xC0A1A0) case 0xFE6D: { -// bprintf(PRINT_NORMAL, _T(" copy: 0x%08X - 0x%08X <- 0x%08X - 0x%08X\n"), NeoCDDMAAddress2, NeoCDDMAAddress2 + NeoCDDMACount * 2, NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 2); +// bprintf(PRINT_NORMAL, _T(" copy: 0x%08X - 0x%08X <- 0x%08X - 0x%08X\n"), m_dma_address2, m_dma_address2 + m_dma_count * 2, m_dma_address1, m_dma_address1 + m_dma_count * 2); // - DMA controller 0x7E -> 0xFE6D (PC: 0xC0FD7A) // - DMA controller program[00] -> 0xFCF5 (PC: 0xC0FD7C) @@ -703,15 +702,15 @@ void ngcd_state::NeoCDDoDMA(address_space& curr_space) // - DMA controller program[12] -> 0xC515 (PC: 0xC0FD88) // - DMA controller program[14] -> 0xFCF5 (PC: 0xC0FD8A) - SekIdle(NeoCDDMACount * 1); + SekIdle(m_dma_count * 1); - while (NeoCDDMACount--) { - curr_space.write_word(NeoCDDMAAddress2, curr_space.read_word(NeoCDDMAAddress1)); - NeoCDDMAAddress1 += 2; - NeoCDDMAAddress2 += 2; + while (m_dma_count--) { + curr_space.write_word(m_dma_address2, curr_space.read_word(m_dma_address1)); + m_dma_address1 += 2; + m_dma_address2 += 2; } -if (NeoCDDMAAddress2 == 0x0800) { +if (m_dma_address2 == 0x0800) { // MapVectorTable(false); // bprintf(PRINT_ERROR, _T(" RAM vectors mapped (PC = 0x%08X\n"), SekGetPC(0)); // extern int32_t bRunPause; @@ -721,7 +720,7 @@ if (NeoCDDMAAddress2 == 0x0800) { } case 0xFEF5: { -// bprintf(PRINT_NORMAL, _T(" adr : 0x%08X - 0x%08X <- address\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 4); +// bprintf(PRINT_NORMAL, _T(" adr : 0x%08X - 0x%08X <- address\n"), m_dma_address1, m_dma_address1 + m_dma_count * 4); // - DMA controller 0x7E -> 0xFEF5 (PC: 0xC07CE2) // - DMA controller program[00] -> 0xFCF5 (PC: 0xC07CE8) @@ -733,19 +732,19 @@ if (NeoCDDMAAddress2 == 0x0800) { // - DMA controller program[12] -> 0xFC3D (PC: 0xC07D0C) // - DMA controller program[14] -> 0xFCF5 (PC: 0xC07D12) - SekIdle(NeoCDDMACount * 2); + SekIdle(m_dma_count * 2); - while (NeoCDDMACount--) { - curr_space.write_word(NeoCDDMAAddress1 + 0, NeoCDDMAAddress1 >> 16); - curr_space.write_word(NeoCDDMAAddress1 + 2, NeoCDDMAAddress1 >> 0); - NeoCDDMAAddress1 += 4; + while (m_dma_count--) { + curr_space.write_word(m_dma_address1 + 0, m_dma_address1 >> 16); + curr_space.write_word(m_dma_address1 + 2, m_dma_address1 >> 0); + m_dma_address1 += 4; } break; } case 0xFFC5: { -// bprintf(PRINT_NORMAL, _T(" copy: 0x%08X - 0x%08X <- LC8951 external buffer\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 2); +// bprintf(PRINT_NORMAL, _T(" copy: 0x%08X - 0x%08X <- LC8951 external buffer\n"), m_dma_address1, m_dma_address1 + m_dma_count * 2); // - DMA controller 0x7E -> 0xFFC5 (PC: 0xC0A190) // - DMA controller program[00] -> 0xFCF5 (PC: 0xC0A192) @@ -757,17 +756,17 @@ if (NeoCDDMAAddress2 == 0x0800) { // - DMA controller program[12] -> 0x8492 (PC: 0xC0A19E) // - DMA controller program[14] -> 0xDA92 (PC: 0xC0A1A0) - char* data = m_tempcdc->LC8915InitTransfer(NeoCDDMACount); + char* data = m_tempcdc->LC8915InitTransfer(m_dma_count); if (data == nullptr) { break; } - SekIdle(NeoCDDMACount * 4); + SekIdle(m_dma_count * 4); - while (NeoCDDMACount--) { - curr_space.write_byte(NeoCDDMAAddress1 + 0, data[0]); - curr_space.write_byte(NeoCDDMAAddress1 + 1, data[1]); - NeoCDDMAAddress1 += 2; + while (m_dma_count--) { + curr_space.write_byte(m_dma_address1 + 0, data[0]); + curr_space.write_byte(m_dma_address1 + 1, data[1]); + m_dma_address1 += 2; data += 2; } @@ -789,7 +788,7 @@ if (NeoCDDMAAddress2 == 0x0800) { // - DMA controller program[14] -> 0x13FC (PC: 0xC0A1A0) case 0xFFDD: { -// bprintf(PRINT_NORMAL, _T(" Fill: 0x%08X - 0x%08X <- 0x%04X\n"), NeoCDDMAAddress1, NeoCDDMAAddress1 + NeoCDDMACount * 2, NeoCDDMAValue1); +// bprintf(PRINT_NORMAL, _T(" Fill: 0x%08X - 0x%08X <- 0x%04X\n"), m_dma_address1, m_dma_address1 + m_dma_count * 2, m_dma_value1); // - DMA controller 0x7E -> 0xFFDD (PC: 0xC07CE2) // - DMA controller program[00] -> 0xFCF5 (PC: 0xC07CE8) @@ -801,18 +800,18 @@ if (NeoCDDMAAddress2 == 0x0800) { // - DMA controller program[12] -> 0x8AF0 (PC: 0xC07D0C) // - DMA controller program[14] -> 0x1609 (PC: 0xC07D12) - SekIdle(NeoCDDMACount * 1); + SekIdle(m_dma_count * 1); - while (NeoCDDMACount--) { - curr_space.write_word(NeoCDDMAAddress1, NeoCDDMAValue1); - NeoCDDMAAddress1 += 2; + while (m_dma_count--) { + curr_space.write_word(m_dma_address1, m_dma_value1); + m_dma_address1 += 2; } break; } default: { - //bprintf(PRINT_ERROR, _T(" Unknown transfer type 0x%04X (PC: 0x%06X)\n"), NeoCDDMAMode, SekGetPC(-1)); - //bprintf(PRINT_NORMAL, _T(" ??? : 0x%08X 0x%08X 0x%04X 0x%04X 0x%08X\n"), NeoCDDMAAddress1, NeoCDDMAAddress2, NeoCDDMAValue1, NeoCDDMAValue2, NeoCDDMACount); + //bprintf(PRINT_ERROR, _T(" Unknown transfer type 0x%04X (PC: 0x%06X)\n"), m_dma_mode, SekGetPC(-1)); + //bprintf(PRINT_NORMAL, _T(" ??? : 0x%08X 0x%08X 0x%04X 0x%04X 0x%08X\n"), m_dma_address1, m_dma_address2, m_dma_value1, m_dma_value2, m_dma_count); //extern int32_t bRunPause; //bRunPause = 1; @@ -836,8 +835,13 @@ void ngcd_state::machine_start() m_curr_slot = 0; // initialize sprite to point to memory regions - m_sprgen->set_sprite_region(m_region_sprites->base(), m_region_sprites->bytes()); - m_sprgen->set_fixed_regions(m_region_fixed->base(), m_region_fixed->bytes(), m_region_fixedbios); + m_sprite_ram = make_unique_clear<uint8_t[]>(0x400000); + m_fix_ram = make_unique_clear<uint8_t[]>(0x20000); + save_pointer(NAME(m_sprite_ram), 0x400000); + save_pointer(NAME(m_fix_ram), 0x20000); + + m_sprgen->set_sprite_region(m_sprite_ram.get(), 0x400000); + m_sprgen->set_fixed_regions(m_fix_ram.get(), 0x20000, nullptr); m_sprgen->neogeo_set_fixed_layer_source(1); // irq levels for NEOCD (swapped compared to MVS / AES) @@ -864,17 +868,12 @@ void ngcd_state::machine_reset() { aes_base_state::machine_reset(); - NeoSpriteRAM = memregion("sprites")->base(); - YM2610ADPCMAROM = memregion("ymsnd")->base(); - NeoZ80ROMActive = memregion("audiocpu")->base(); - NeoTextRAM = memregion("fixed")->base(); - m_tempcdc->NeoCDCommsReset(); m_audiocpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - nTransferWriteEnable = 0; + m_transfer_write_enable = 0; } @@ -891,12 +890,12 @@ void ngcd_state::neocd_main_map(address_map &map) map(0x000000, 0x1fffff).ram().region("maincpu", 0x00000); map(0x000000, 0x00007f).r(FUNC(ngcd_state::banked_vectors_r)); // writes will fall through to area above - map(0x800000, 0x803fff).rw(FUNC(ngcd_state::neocd_memcard_r), FUNC(ngcd_state::neocd_memcard_w)); + map(0x800000, 0x803fff).rw(FUNC(ngcd_state::memcard_r), FUNC(ngcd_state::memcard_w)); map(0xc00000, 0xc7ffff).mirror(0x080000).rom().region("mainbios", 0); map(0xd00000, 0xdfffff).r(FUNC(ngcd_state::unmapped_r)); - map(0xe00000, 0xefffff).rw(FUNC(ngcd_state::neocd_transfer_r), FUNC(ngcd_state::neocd_transfer_w)); + map(0xe00000, 0xefffff).rw(FUNC(ngcd_state::transfer_r), FUNC(ngcd_state::transfer_w)); map(0xf00000, 0xfeffff).r(FUNC(ngcd_state::unmapped_r)); - map(0xff0000, 0xff01ff).rw(FUNC(ngcd_state::neocd_control_r), FUNC(ngcd_state::neocd_control_w)); // CDROM / DMA + map(0xff0000, 0xff01ff).rw(FUNC(ngcd_state::control_r), FUNC(ngcd_state::control_w)); // CDROM / DMA map(0xff0200, 0xffffff).r(FUNC(ngcd_state::unmapped_r)); } @@ -910,7 +909,7 @@ void ngcd_state::neocd_main_map(address_map &map) void ngcd_state::neocd_audio_map(address_map &map) { - map(0x0000, 0xffff).ram().region("audiocpu", 0x00000); + map(0x0000, 0xffff).ram().share("z80_ram"); } @@ -929,6 +928,11 @@ void ngcd_state::neocd_audio_io_map(address_map &map) map(0xc1, 0xc1).mirror(0xff00).nopw(); } +void ngcd_state::neocd_ym_map(address_map &map) +{ + map(0x000000, 0x0fffff).ram().share("adpcm_ram"); +} + /************************************* * @@ -954,13 +958,13 @@ INPUT_PORTS_END /* NeoCD uses custom vectors on IRQ4 to handle various events from the CDC */ -IRQ_CALLBACK_MEMBER(ngcd_state::neocd_int_callback) +IRQ_CALLBACK_MEMBER(ngcd_state::int_callback) { if (irqline==4) { - if (get_nNeoCDIRQVectorAck()) { - set_nNeoCDIRQVectorAck(0); - return get_nNeoCDIRQVector(); + if (get_irq_vector_ack()) { + set_irq_vector_ack(0); + return get_irq_vector(); } } @@ -969,46 +973,46 @@ IRQ_CALLBACK_MEMBER(ngcd_state::neocd_int_callback) void ngcd_state::interrupt_callback_type1(void) { - nIRQAcknowledge &= ~0x20; - NeoCDIRQUpdate(0); + m_irq_ack &= ~0x20; + irq_update(0); } void ngcd_state::interrupt_callback_type2(void) { - nIRQAcknowledge &= ~0x10; - NeoCDIRQUpdate(0); + m_irq_ack &= ~0x10; + irq_update(0); } void ngcd_state::interrupt_callback_type3(void) { - nIRQAcknowledge &= ~0x08; - NeoCDIRQUpdate(0); + m_irq_ack &= ~0x08; + irq_update(0); } -void ngcd_state::NeoCDIRQUpdate(uint8_t byteValue) +void ngcd_state::irq_update(uint8_t byteValue) { // do we also need to check the regular interrupts like FBA? - nIRQAcknowledge |= (byteValue & 0x38); + m_irq_ack |= (byteValue & 0x38); if (!prohibit_cdc_irq) { - if ((nIRQAcknowledge & 0x08) == 0) { - nNeoCDIRQVector = 0x17; - nNeoCDIRQVectorAck = 1; + if ((m_irq_ack & 0x08) == 0) { + m_irq_vector = 0x17; + m_irq_vector_ack = 1; m_maincpu->set_input_line(4, HOLD_LINE); return; } - if ((nIRQAcknowledge & 0x10) == 0) { - nNeoCDIRQVector = 0x16; - nNeoCDIRQVectorAck = 1; + if ((m_irq_ack & 0x10) == 0) { + m_irq_vector = 0x16; + m_irq_vector_ack = 1; m_maincpu->set_input_line(4, HOLD_LINE); return; } - if ((nIRQAcknowledge & 0x20) == 0) { - nNeoCDIRQVector = 0x15; - nNeoCDIRQVectorAck = 1; + if ((m_irq_ack & 0x20) == 0) { + m_irq_vector = 0x15; + m_irq_vector_ack = 1; m_maincpu->set_input_line(4, HOLD_LINE); return; } @@ -1016,7 +1020,7 @@ void ngcd_state::NeoCDIRQUpdate(uint8_t byteValue) } -uint32_t ngcd_state::screen_update_neocd(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +uint32_t ngcd_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { // fill with background color first bitmap.fill(*m_bg_pen, cliprect); @@ -1033,18 +1037,16 @@ MACHINE_CONFIG_START(ngcd_state::neocd) neogeo_base(config); neogeo_stereo(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(neocd_main_map) - MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(ngcd_state,neocd_int_callback) + m_maincpu->set_addrmap(AS_PROGRAM, &ngcd_state::neocd_main_map); + m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(ngcd_state::int_callback), this)); - MCFG_DEVICE_MODIFY("audiocpu") - MCFG_DEVICE_PROGRAM_MAP(neocd_audio_map) - MCFG_DEVICE_IO_MAP(neocd_audio_io_map) + m_audiocpu->set_addrmap(AS_PROGRAM, &ngcd_state::neocd_audio_map); + m_audiocpu->set_addrmap(AS_IO, &ngcd_state::neocd_audio_io_map); subdevice<hc259_device>("systemlatch")->q_out_cb<1>().set_log("NeoCD: write to regular vector change address?"); // what IS going on with "neocdz doubledr" and why do games write here if it's hooked up to nothing? MCFG_SCREEN_MODIFY("screen") - MCFG_SCREEN_UPDATE_DRIVER(ngcd_state, screen_update_neocd) + MCFG_SCREEN_UPDATE_DRIVER(ngcd_state, screen_update) // temporary until things are cleaned up MCFG_DEVICE_ADD("tempcdc", LC89510_TEMP, 0) // cd controller @@ -1061,6 +1063,8 @@ MACHINE_CONFIG_START(ngcd_state::neocd) MCFG_CDROM_ADD( "cdrom" ) MCFG_CDROM_INTERFACE("neocd_cdrom") MCFG_SOFTWARE_LIST_ADD("cd_list","neocd") + + m_ym->set_addrmap(0, &ngcd_state::neocd_ym_map); MACHINE_CONFIG_END @@ -1080,21 +1084,9 @@ ROM_START( neocd ) ROM_SYSTEM_BIOS( 2, "unibios32", "Universe Bios (Hack, Ver. 3.2)" ) ROMX_LOAD("uni-bioscd.rom", 0x00000, 0x80000, CRC(0ffb3127) SHA1(5158b728e62b391fb69493743dcf7abbc62abc82), ROM_GROUPWORD | ROM_REVERSE | ROM_BIOS(2)) - ROM_REGION( 0x100000, "ymsnd", ROMREGION_ERASEFF ) - /* 1MB of Sound RAM */ - - ROM_REGION( 0x90000, "audiocpu", ROMREGION_ERASEFF ) - /* 64KB of Z80 RAM */ - ROM_REGION( 0x200000, "maincpu", ROMREGION_ERASE00 ) /* 2MB of 68K RAM */ - ROM_REGION( 0x400000, "sprites", ROMREGION_ERASEFF ) - /* 4MB of Sprite Tile RAM */ - - ROM_REGION( 0x20000, "fixed", ROMREGION_ERASEFF ) - /* 128KB of Text Tile RAM */ - ROM_REGION( 0x20000, "zoomy", 0 ) ROM_LOAD( "000-lo.lo", 0x00000, 0x20000, CRC(5a86cff2) SHA1(5992277debadeb64d1c1c64b0a92d9293eaf7e4a) ) ROM_END @@ -1106,21 +1098,9 @@ ROM_START( neocdz ) ROM_SYSTEM_BIOS( 1, "unibios32", "Universe Bios (Hack, Ver. 3.2)" ) ROMX_LOAD("uni-bioscd.rom", 0x00000, 0x80000, CRC(0ffb3127) SHA1(5158b728e62b391fb69493743dcf7abbc62abc82), ROM_GROUPWORD | ROM_REVERSE | ROM_BIOS(1)) - ROM_REGION( 0x100000, "ymsnd", ROMREGION_ERASEFF ) - /* 1MB of Sound RAM */ - - ROM_REGION( 0x90000, "audiocpu", ROMREGION_ERASEFF ) - /* 64KB of Z80 RAM */ - ROM_REGION( 0x200000, "maincpu", ROMREGION_ERASE00 ) /* 2MB of 68K RAM */ - ROM_REGION( 0x400000, "sprites", ROMREGION_ERASEFF ) - /* 4MB of Sprite Tile RAM */ - - ROM_REGION( 0x20000, "fixed", ROMREGION_ERASEFF ) - /* 128KB of Text Tile RAM */ - ROM_REGION( 0x20000, "zoomy", 0 ) ROM_LOAD( "000-lo.lo", 0x00000, 0x20000, CRC(5a86cff2) SHA1(5992277debadeb64d1c1c64b0a92d9293eaf7e4a) ) ROM_END diff --git a/src/mame/drivers/neopcb.cpp b/src/mame/drivers/neopcb.cpp index 680ac2f41c7..18c0ed85e85 100644 --- a/src/mame/drivers/neopcb.cpp +++ b/src/mame/drivers/neopcb.cpp @@ -34,13 +34,12 @@ protected: // device overrides virtual void machine_start() override; - virtual void neogeo_postload() override; + virtual void device_post_load() override; DECLARE_WRITE16_MEMBER(write_bankpvc); void install_common(); void install_banked_bios(); - void neopcb_postload(); // non-carts void svcpcb_gfx_decrypt(); @@ -63,9 +62,9 @@ void neopcb_state::machine_start() m_sprgen->set_screen(m_screen); } -void neopcb_state::neogeo_postload() +void neopcb_state::device_post_load() { - ngarcade_base_state::neogeo_postload(); + ngarcade_base_state::device_post_load(); membank("cpu_bank")->set_base(m_region_maincpu->base() + m_bank_base); } diff --git a/src/mame/drivers/neoprint.cpp b/src/mame/drivers/neoprint.cpp index 3f9559bd9b2..2b915d80eca 100644 --- a/src/mame/drivers/neoprint.cpp +++ b/src/mame/drivers/neoprint.cpp @@ -509,7 +509,7 @@ MACHINE_CONFIG_START(neoprint_state::neoprint) MCFG_DEVICE_PROGRAM_MAP(neoprint_audio_map) MCFG_DEVICE_IO_MAP(neoprint_audio_io_map) - MCFG_UPD4990A_ADD("upd4990a", XTAL(32'768), NOOP, NOOP) + UPD4990A(config, m_upd4990a); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_neoprint) @@ -553,7 +553,7 @@ MACHINE_CONFIG_START(neoprint_state::nprsp) MCFG_DEVICE_PROGRAM_MAP(neoprint_audio_map) MCFG_DEVICE_IO_MAP(neoprint_audio_io_map) - MCFG_UPD4990A_ADD("upd4990a", XTAL(32'768), NOOP, NOOP) + UPD4990A(config, m_upd4990a); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_neoprint) diff --git a/src/mame/drivers/next.cpp b/src/mame/drivers/next.cpp index d4c134c9f3a..bc962a26910 100644 --- a/src/mame/drivers/next.cpp +++ b/src/mame/drivers/next.cpp @@ -258,19 +258,19 @@ void next_state::irq_check() } } -const char *next_state::dma_targets[0x20] = { +char const *const next_state::dma_targets[0x20] = { nullptr, "scsi", nullptr, nullptr, "soundout", "disk", nullptr, nullptr, "soundin", "printer", nullptr, nullptr, "scc", "dsp", nullptr, nullptr, "s-enetx", "enetx", nullptr, nullptr, "s-enetr", "enetr", nullptr, nullptr, "video", nullptr, nullptr, nullptr, "r2m", "m2r", nullptr, nullptr }; -const int next_state::dma_irqs[0x20] = { +int const next_state::dma_irqs[0x20] = { -1, 26, -1, -1, 23, 25, -1, -1, 22, 24, -1, -1, 21, 20, -1, -1, -1, 28, -1, -1, -1, 27, -1, -1, 5, -1, -1, -1, 18, 19, -1, -1 }; -const bool next_state::dma_has_saved[0x20] = { +bool const next_state::dma_has_saved[0x20] = { false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, true, false, false, @@ -557,7 +557,7 @@ void next_state::dma_do_ctrl_w(int slot, uint8_t data) } } -const int next_state::scsi_clocks[4] = { 10000000, 12000000, 20000000, 16000000 }; +int const next_state::scsi_clocks[4] = { 10000000, 12000000, 20000000, 16000000 }; READ32_MEMBER( next_state::scsictrl_r ) { @@ -1055,9 +1055,9 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(next_state::next_fdc_base) next_base(config); - MCFG_N82077AA_ADD("fdc", n82077aa_device::MODE_PS2) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, next_state, fdc_irq)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, next_state, fdc_drq)) + N82077AA(config, fdc, n82077aa_device::MODE_PS2); + fdc->intrq_wr_callback().set(FUNC(next_state::fdc_irq)); + fdc->drq_wr_callback().set(FUNC(next_state::fdc_drq)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", next_floppies, "35ed", next_state::floppy_formats) // software list diff --git a/src/mame/drivers/nforcepc.cpp b/src/mame/drivers/nforcepc.cpp new file mode 100644 index 00000000000..a0b161964b9 --- /dev/null +++ b/src/mame/drivers/nforcepc.cpp @@ -0,0 +1,200 @@ +// license:BSD-3-Clause +// copyright-holders: Samuele Zannoli + +/* + Computer based on a motherboard utilizing the nForce chipset (also known as CRUSH11 or CRUSH12) + + Start with the following compoents: + - An Asus A7N266-C motherboard using: + - nForce 415-D northbridge + - nForce MCP-D southbridge (with integrated APU) + - ITE IT8703F-A SuperIO + - Asus AS99127F chip + - An AMD Athlon XP processor + - An IDE hard disk + - A floppy disk drive + - A keyboard + Later add: + - A Nvidia NV25 based AGP video card + +*/ + + +#include "emu.h" +#include "cpu/i386/i386.h" +#include "machine/pci.h" +#include "machine/pci-ide.h" +#include "includes/nforcepc.h" + +/* + Pci devices +*/ + +DEFINE_DEVICE_TYPE(CRUSH11, crush11_host_device, "crush11", "NVIDIA Corporation nForce CPU bridge") + +void crush11_host_device::config_map(address_map &map) +{ + pci_host_device::config_map(map); + map(0x50, 0x50).rw(FUNC(crush11_host_device::test_r), FUNC(crush11_host_device::test_w)); +} + +crush11_host_device::crush11_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : pci_host_device(mconfig, CRUSH11, tag, owner, clock) + , cpu(*this, finder_base::DUMMY_TAG) +{ +} + +void crush11_host_device::set_ram_size(int ram_size) +{ + ddr_ram_size = ram_size; +} + +void crush11_host_device::device_start() +{ + pci_host_device::device_start(); + memory_space = &cpu->space(AS_PROGRAM); + io_space = &cpu->space(AS_IO); + + memory_window_start = 0; + memory_window_end = 0xffffffff; + memory_offset = 0; + io_window_start = 0; + io_window_end = 0xffff; + io_offset = 0; + status = 0x0010; + + ram.resize(ddr_ram_size / 4); +} + +void crush11_host_device::reset_all_mappings() +{ + pci_host_device::reset_all_mappings(); +} + +void crush11_host_device::device_reset() +{ + pci_host_device::device_reset(); +} + +void crush11_host_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) +{ + io_space->install_device(0, 0xffff, *static_cast<pci_host_device *>(this), &pci_host_device::io_configuration_access_map); + + memory_space->install_ram(0x00000000, 0x0009ffff, &ram[0x00000000 / 4]); + memory_space->install_ram(0x00100000, ddr_ram_size - 1, &ram[0x00100000 / 4]); + uint32_t mask = m_region->bytes() - 1; + memory_space->install_rom(0x000c0000, 0x000fffff, m_region->base() + (0x000c0000 & mask)); + memory_space->install_rom(0xfffc0000, 0xffffffff, m_region->base() + (0x000c0000 & mask)); +} + +READ8_MEMBER(crush11_host_device::test_r) +{ + return 0; +} + +WRITE8_MEMBER(crush11_host_device::test_w) +{ + logerror("test = %02x\n", data); +} + +/* + Machine state +*/ + +class nforcepc_state : public driver_device +{ +public: + struct boot_state_info { + uint8_t val; + const char *const message; + }; + + static const boot_state_info boot_state_infos_award[]; + + void nforcepc(machine_config &config); + + nforcepc_state(const machine_config &mconfig, device_type type, const char *tag); + +private: + void nforce_map(address_map &map); + void nforce_map_io(address_map &map); + DECLARE_WRITE8_MEMBER(boot_state_award_w); + + virtual void machine_start() override; + virtual void machine_reset() override; +}; + +nforcepc_state::nforcepc_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) +{ +} + +void nforcepc_state::machine_start() +{ +} + +void nforcepc_state::machine_reset() +{ +} + +const nforcepc_state::boot_state_info nforcepc_state::boot_state_infos_award[] = { + { 0, nullptr } +}; + +WRITE8_MEMBER(nforcepc_state::boot_state_award_w) +{ + const char *desc = ""; + for(int i=0; boot_state_infos_award[i].message; i++) + if(boot_state_infos_award[i].val == data) { + desc = boot_state_infos_award[i].message; + break; + } + logerror("Boot state %02x - %s\n", data, desc); + +} + +void nforcepc_state::nforce_map(address_map &map) +{ + map.unmap_value_high(); +} + +void nforcepc_state::nforce_map_io(address_map &map) +{ + map.unmap_value_high(); +} + +/* + Machine configuration +*/ + +MACHINE_CONFIG_START(nforcepc_state::nforcepc) + MCFG_DEVICE_ADD("maincpu", ATHLONXP, 90000000) + MCFG_DEVICE_PROGRAM_MAP(nforce_map) + MCFG_DEVICE_IO_MAP(nforce_map_io) + MCFG_DEVICE_ADD(":pci", PCI_ROOT, 0) + MCFG_DEVICE_ADD(":pci:00.0", CRUSH11, 0, "maincpu", 2 * 1024 * 1024) + /* MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE("pci:07.0:pic8259_master", pic8259_device, inta_cb) + MCFG_I386_SMIACT(WRITELINE("pci:00.0", i82439hx_host_device, smi_act_w)) + + i82371sb_isa_device &isa(I82371SB_ISA(config, ":pci:07.0", 0)); + isa.boot_state_hook().set(FUNC(nforcepc_state::boot_state_phoenix_ver40_rev6_w)); + isa.smi().set_inputline(":maincpu", INPUT_LINE_SMI); + + i82371sb_ide_device &ide(I82371SB_IDE(config, ":pci:07.1", 0)); + ide.irq_pri().set(":pci:07.0", FUNC(i82371sb_isa_device::pc_irq14_w)); + ide.irq_sec().set(":pci:07.0", FUNC(i82371sb_isa_device::pc_irq15_w));*/ +MACHINE_CONFIG_END + +ROM_START(nforcepc) + ROM_REGION32_LE(0x40000, ":pci:00.0", 0) /* PC bios */ + ROM_SYSTEM_BIOS(0, "a7n266c", "a7n266c") // Motherboard dump. Chip: SST49LF020 Package: PLCC32 Label had 3 lines of text: "A7NC3" "1001.D" "GSQ98" + ROMX_LOAD("a7n266c.bin", 0, 0x40000, CRC(F4F0E4FC), ROM_BIOS(0)) + ROM_SYSTEM_BIOS(1, "a7n266c1001d", "a7n266c1001d") // bios version 1001.D dwonloaded from Asus website + ROMX_LOAD("a7nc101d.awd", 0, 0x40000, CRC(EAD1147C), ROM_BIOS(1)) +ROM_END + +static INPUT_PORTS_START(nforcepc) + //PORT_INCLUDE(at_keyboard) +INPUT_PORTS_END + +COMP(2002, nforcepc, 0, 0, nforcepc, nforcepc, nforcepc_state, empty_init, "Nvidia", "Nvidia nForce PC (CRUSH11/12)", MACHINE_IS_SKELETON) diff --git a/src/mame/drivers/ngen.cpp b/src/mame/drivers/ngen.cpp index 9d7e2e0bbda..07b8a9001ab 100644 --- a/src/mame/drivers/ngen.cpp +++ b/src/mame/drivers/ngen.cpp @@ -320,18 +320,18 @@ WRITE16_MEMBER(ngen_state::peripheral_w) break; case 0x10c: if(ACCESSING_BITS_0_7) - m_pic->write(space,0,data & 0xff); + m_pic->write(0,data & 0xff); break; case 0x10d: if(ACCESSING_BITS_0_7) - m_pic->write(space,1,data & 0xff); + m_pic->write(1,data & 0xff); break; case 0x110: case 0x111: case 0x112: case 0x113: if(ACCESSING_BITS_0_7) - m_pit->write(space,offset-0x110,data & 0xff); + m_pit->write(offset-0x110,data & 0xff); break; case 0x141: // bit 1 enables speaker? @@ -346,12 +346,9 @@ WRITE16_MEMBER(ngen_state::peripheral_w) m_crtc->register_w(space,0,data & 0xff); break; case 0x146: - if(ACCESSING_BITS_0_7) - m_viduart->data_w(space,0,data & 0xff); - break; case 0x147: if(ACCESSING_BITS_0_7) - m_viduart->control_w(space,0,data & 0xff); + m_viduart->write(offset & 1, data & 0xff); break; case 0x1a0: // serial? logerror("Serial(?) 0x1a0 write offset %04x data %04x mask %04x\n",offset,data,mem_mask); @@ -395,18 +392,18 @@ READ16_MEMBER(ngen_state::peripheral_r) break; case 0x10c: if(ACCESSING_BITS_0_7) - ret = m_pic->read(space,0); + ret = m_pic->read(0); break; case 0x10d: if(ACCESSING_BITS_0_7) - ret = m_pic->read(space,1); + ret = m_pic->read(1); break; case 0x110: case 0x111: case 0x112: case 0x113: if(ACCESSING_BITS_0_7) - ret = m_pit->read(space,offset-0x110); + ret = m_pit->read(offset-0x110); break; case 0x141: ret = m_periph141; @@ -420,13 +417,10 @@ READ16_MEMBER(ngen_state::peripheral_r) ret = m_crtc->register_r(space,0); break; case 0x146: - if(ACCESSING_BITS_0_7) - ret = m_viduart->data_r(space,0); - break; case 0x147: // keyboard UART - // expects bit 0 to be set (UART transmit ready) + // status expects bit 0 to be set (UART transmit ready) if(ACCESSING_BITS_0_7) - ret = m_viduart->status_r(space,0); + ret = m_viduart->read(offset & 1); break; case 0x1a0: // I/O control register? ret = m_control; // end of DMA transfer? (maybe a per-channel EOP?) Bit 6 is set during a transfer? @@ -528,7 +522,7 @@ WRITE16_MEMBER(ngen_state::hfd_w) case 0x0a: case 0x0b: if(ACCESSING_BITS_0_7) - m_fdc_timer->write(space,offset-0x08,data & 0xff); + m_fdc_timer->write(offset-0x08,data & 0xff); break; case 0x10: case 0x11: @@ -547,7 +541,7 @@ WRITE16_MEMBER(ngen_state::hfd_w) case 0x1a: case 0x1b: if(ACCESSING_BITS_0_7) - m_hdc_timer->write(space,offset-0x18,data & 0xff); + m_hdc_timer->write(offset-0x18,data & 0xff); break; } } @@ -577,7 +571,7 @@ READ16_MEMBER(ngen_state::hfd_r) case 0x0a: case 0x0b: if(ACCESSING_BITS_0_7) - ret = m_fdc_timer->read(space,offset-0x08); + ret = m_fdc_timer->read(offset-0x08); break; case 0x10: case 0x11: @@ -596,7 +590,7 @@ READ16_MEMBER(ngen_state::hfd_r) case 0x1a: case 0x1b: if(ACCESSING_BITS_0_7) - ret = m_hdc_timer->read(space,offset-0x18); + ret = m_hdc_timer->read(offset-0x18); break; } @@ -791,13 +785,10 @@ READ16_MEMBER( ngen_state::b38_keyboard_r ) switch(offset) { case 0: - if(ACCESSING_BITS_0_7) - ret = m_viduart->data_r(space,0); - break; case 1: // keyboard UART - // expects bit 0 to be set (UART transmit ready) + // status expects bit 0 to be set (UART transmit ready) if(ACCESSING_BITS_0_7) - ret = m_viduart->status_r(space,0); + ret = m_viduart->read(offset & 1); break; } return ret; @@ -808,12 +799,9 @@ WRITE16_MEMBER( ngen_state::b38_keyboard_w ) switch(offset) { case 0: - if(ACCESSING_BITS_0_7) - m_viduart->data_w(space,0,data & 0xff); - break; case 1: if(ACCESSING_BITS_0_7) - m_viduart->control_w(space,0,data & 0xff); + m_viduart->write(offset & 1, data & 0xff); break; } } @@ -829,7 +817,7 @@ READ16_MEMBER( ngen_state::b38_crtc_r ) break; case 1: if(ACCESSING_BITS_0_7) - ret = m_viduart->data_r(space,0); + ret = m_viduart->data_r(); break; } return ret; diff --git a/src/mame/drivers/nibble.cpp b/src/mame/drivers/nibble.cpp index 4dcdfe06813..dcd06dfaaa8 100644 --- a/src/mame/drivers/nibble.cpp +++ b/src/mame/drivers/nibble.cpp @@ -40,19 +40,20 @@ Tech notes... About the unknown ICs: - DIP64 (U101) CPU with Xtal tied to pins 30 % 31. --> TMS9900? (ROM 9) + DIP64 (U101) CPU with Xtal tied to pins 30 % 31. --> NEC uPD78C11? (ROM 9) DIP40 (U64) CPU or sound IC driving 128k (ROM 10) data? (pin 20 tied to GND) *************************************************************************/ #include "emu.h" -#include "cpu/tms9900/tms9980a.h" -//#include "cpu/tms9900/tms9900.h" +#include "cpu/upd7810/upd7811.h" #include "sound/ay8910.h" #include "video/mc6845.h" +#include "video/ramdac.h" #include "emupal.h" #include "screen.h" +#include "speaker.h" #define MASTER_CLOCK XTAL(12'000'000) @@ -70,9 +71,9 @@ public: void nibble(machine_config &config); private: - required_shared_ptr<uint16_t> m_videoram; + required_shared_ptr<uint8_t> m_videoram; tilemap_t *m_bg_tilemap; - DECLARE_WRITE16_MEMBER(nibble_videoram_w); + DECLARE_WRITE8_MEMBER(nibble_videoram_w); TILE_GET_INFO_MEMBER(get_bg_tile_info); virtual void machine_start() override; @@ -83,8 +84,9 @@ private: INTERRUPT_GEN_MEMBER(nibble_interrupt); required_device<cpu_device> m_maincpu; required_device<gfxdecode_device> m_gfxdecode; - void nibble_cru_map(address_map &map); void nibble_map(address_map &map); + void ramdac1_map(address_map &map); + void ramdac2_map(address_map &map); }; @@ -92,7 +94,7 @@ private: * Video Hardware * *************************/ -WRITE16_MEMBER(nibble_state::nibble_videoram_w) +WRITE8_MEMBER(nibble_state::nibble_videoram_w) { COMBINE_DATA(m_videoram+offset); m_bg_tilemap->mark_tile_dirty(offset*2); @@ -108,7 +110,7 @@ TILE_GET_INFO_MEMBER(nibble_state::get_bg_tile_info) ---- ---- color code. ---- ---- seems unused. */ - uint8_t code = m_videoram[tile_index/2] >> (tile_index & 1 ? 0 : 8); + uint8_t code = m_videoram[tile_index]; SET_TILE_INFO_MEMBER(0 /* bank */, code, 0 /* color */, 0); } @@ -157,16 +159,33 @@ void nibble_state::machine_reset() void nibble_state::nibble_map(address_map &map) { -// ADDRESS_MAP_GLOBAL_MASK(0x3fff) map(0x0000, 0xbfff).rom(); - map(0xc000, 0xc3ff).w(FUNC(nibble_state::nibble_videoram_w)).share("videoram"); // placeholder -// AM_RANGE(0xff00, 0xff01) AM_DEVWRITE("crtc", mc6845_device, address_w) -// AM_RANGE(0xff02, 0xff03) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w) + map(0xc000, 0xcbff).ram(); + map(0xd000, 0xdbff).ram(); + map(0xdc00, 0xdfff).ram().w(FUNC(nibble_state::nibble_videoram_w)).share("videoram"); + map(0xe000, 0xebff).ram(); + map(0xec00, 0xec00).rw("ramdac1", FUNC(ramdac_device::index_r), FUNC(ramdac_device::index_w)); + map(0xec01, 0xec01).rw("ramdac1", FUNC(ramdac_device::pal_r), FUNC(ramdac_device::pal_w)); + map(0xec02, 0xec02).rw("ramdac1", FUNC(ramdac_device::mask_r), FUNC(ramdac_device::mask_w)); + map(0xec40, 0xec40).rw("ramdac2", FUNC(ramdac_device::index_r), FUNC(ramdac_device::index_w)); + map(0xec41, 0xec41).rw("ramdac2", FUNC(ramdac_device::pal_r), FUNC(ramdac_device::pal_w)); + map(0xec42, 0xec42).rw("ramdac2", FUNC(ramdac_device::mask_r), FUNC(ramdac_device::mask_w)); + map(0xec88, 0xec89).w("aysnd", FUNC(ay8910_device::address_data_w)); + map(0xecc8, 0xecc8).w("crtc", FUNC(mc6845_device::address_w)); + map(0xecc9, 0xecc9).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); + map(0xf000, 0xfbff).ram(); } -void nibble_state::nibble_cru_map(address_map &map) +void nibble_state::ramdac1_map(address_map &map) { + map(0x000, 0x3ff).rw("ramdac1", FUNC(ramdac_device::ramdac_pal_r), FUNC(ramdac_device::ramdac_rgb666_w)); +} + + +void nibble_state::ramdac2_map(address_map &map) +{ + map(0x000, 0x3ff).rw("ramdac2", FUNC(ramdac_device::ramdac_pal_r), FUNC(ramdac_device::ramdac_rgb666_w)); } @@ -311,10 +330,9 @@ GFXDECODE_END MACHINE_CONFIG_START(nibble_state::nibble) - TMS9900(config, m_maincpu, MASTER_CLOCK/4); + UPD7811(config, m_maincpu, MASTER_CLOCK / 3); // type guessed; clock not verified m_maincpu->set_addrmap(AS_PROGRAM, &nibble_state::nibble_map); - m_maincpu->set_addrmap(AS_IO, &nibble_state::nibble_cru_map); - m_maincpu->set_vblank_int("screen", FUNC(nibble_state::nibble_interrupt)); + //m_maincpu->set_vblank_int("screen", FUNC(nibble_state::nibble_interrupt)); /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) @@ -327,13 +345,23 @@ MACHINE_CONFIG_START(nibble_state::nibble) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_nibble) - MCFG_PALETTE_ADD("palette", 256) - MCFG_PALETTE_INIT_OWNER(nibble_state, nibble) + ramdac_device &ramdac1(RAMDAC(config, "ramdac1", 0, "palette")); + ramdac1.set_addrmap(0, &nibble_state::ramdac1_map); + ramdac1.set_color_base(0); + + ramdac_device &ramdac2(RAMDAC(config, "ramdac2", 0, "palette")); + ramdac2.set_addrmap(0, &nibble_state::ramdac2_map); + ramdac2.set_color_base(0x100); + + MCFG_PALETTE_ADD("palette", 0x200) MCFG_MC6845_ADD("crtc", MC6845, "screen", MASTER_CLOCK/8) /* guess */ MCFG_MC6845_SHOW_BORDER_AREA(false) MCFG_MC6845_CHAR_WIDTH(8) + SPEAKER(config, "mono").front_center(); + MCFG_DEVICE_ADD("aysnd", AY8910, MASTER_CLOCK/8) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50) MACHINE_CONFIG_END @@ -343,7 +371,11 @@ MACHINE_CONFIG_END ROM_START( l9nibble ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "09.u123", 0x00000, 0x10000, CRC(dfef685d) SHA1(0aeb4257e408e8549df629a0cdb5f2b6790e32de) ) // tms9900 code? + ROM_LOAD( "u101", 0x00000, 0x01000, NO_DUMP ) // first 4K of code likely contained in undumped internal ROM + ROM_LOAD( "09.u123", 0x00000, 0x10000, CRC(dfef685d) SHA1(0aeb4257e408e8549df629a0cdb5f2b6790e32de) ) // 0000-0FFF matches 3090-408F + ROM_FILL( 0x00000, 1, 0x54 ) // JMP to likely entrypoint + ROM_FILL( 0x00001, 1, 0x3c ) + ROM_FILL( 0x00002, 1, 0x10 ) ROM_REGION( 0x80000, "gfx", 0 ) ROM_LOAD( "01.u139", 0x00000, 0x10000, CRC(aba06e58) SHA1(5841beec122613eed2ba9f48cb1d51bfa0ff450c) ) diff --git a/src/mame/drivers/nmk16.cpp b/src/mame/drivers/nmk16.cpp index ae1d003d50b..2d31874c21d 100644 --- a/src/mame/drivers/nmk16.cpp +++ b/src/mame/drivers/nmk16.cpp @@ -6207,6 +6207,43 @@ ROM_END ROM_START( strahl ) ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "strahl-02.ic82", 0x00000, 0x20000, CRC(e6709a0d) SHA1(ec5741f6a708ac2a6831fb65198d81dc7e6c5aea) ) + ROM_LOAD16_BYTE( "strahl-01.ic83", 0x00001, 0x20000, CRC(bfd021cf) SHA1(fcf252c42a58e2f7e9982869931447ee8aa5baaa) ) + + ROM_REGION( 0x20000, "fgtile", 0 ) + ROM_LOAD( "strahl-3.73", 0x000000, 0x10000, CRC(2273b33e) SHA1(fa53e91b80dfea3f8b2c1f0ce66e5c6920c4960f) ) /* Characters */ + + ROM_REGION( 0x40000, "bgtile", 0 ) + ROM_LOAD( "str7b2r0.275", 0x000000, 0x40000, CRC(5769e3e1) SHA1(7d7a16b11027d0a7618df1ec1e3484224b772e90) ) /* Tiles */ + + ROM_REGION( 0x180000, "sprites", 0 ) + ROM_LOAD( "strl3-01.32", 0x000000, 0x80000, CRC(d8337f15) SHA1(4df23fff2506b66a94dae4e0cf7d25499936b942) ) /* Sprites */ + ROM_LOAD( "strl4-02.57", 0x080000, 0x80000, CRC(2a38552b) SHA1(82335fc6aa3de9145dd84952e5ed423493bf7141) ) + ROM_LOAD( "strl5-03.58", 0x100000, 0x80000, CRC(a0e7d210) SHA1(96a762a3a1cdeaa91bde50429e0ac665fb81190b) ) + + ROM_REGION( 0x80000, "gfx4", 0 ) + ROM_LOAD( "str6b1w1.776", 0x000000, 0x80000, CRC(bb1bb155) SHA1(83a02e89180e15f0e7817e0e92b4bf4e209bb69a) ) /* Tiles */ + + ROM_REGION( 0x10000, "audiocpu", 0 ) + ROM_LOAD( "strahl-4.66", 0x00000, 0x10000, CRC(60a799c4) SHA1(8ade3cf827a389f7cb4080957dc4d67077ea4166) ) + + ROM_REGION( 0xa0000, "oki1", 0 ) /* Oki sample data */ + ROM_LOAD( "str8pmw1.540", 0x00000, 0x20000, CRC(01d6bb6a) SHA1(b157f6f921483ed8067a7e13e370f73fdb60d136) ) + /* this is a mess */ + ROM_CONTINUE( 0x60000, 0x20000 ) /* banked */ + ROM_CONTINUE( 0x40000, 0x20000 ) /* banked */ + ROM_CONTINUE( 0x20000, 0x20000 ) /* banked */ + + ROM_REGION( 0xa0000, "oki2", 0 ) /* Oki sample data */ + ROM_LOAD( "str9pew1.639", 0x00000, 0x20000, CRC(6bb3eb9f) SHA1(9c1394df4f8a08f9098c85eb3d38fb862d6eabbb) ) + /* this is a mess */ + ROM_CONTINUE( 0x60000, 0x20000 ) /* banked */ + ROM_CONTINUE( 0x40000, 0x20000 ) /* banked */ + ROM_CONTINUE( 0x20000, 0x20000 ) /* banked */ +ROM_END + +ROM_START( strahlj ) + ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD16_BYTE( "strahl-2.82", 0x00000, 0x20000, CRC(c9d008ae) SHA1(e9218a3143d5887e702df051354a9083a806c69c) ) ROM_LOAD16_BYTE( "strahl-1.83", 0x00001, 0x20000, CRC(afc3c4d6) SHA1(ab3dd7db692eb01e3a87f4216d322a702f3beaad) ) @@ -6242,7 +6279,7 @@ ROM_START( strahl ) ROM_CONTINUE( 0x20000, 0x20000 ) /* banked */ ROM_END -ROM_START( strahla ) +ROM_START( strahlja ) ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD16_BYTE( "rom2", 0x00000, 0x20000, CRC(f80a22ef) SHA1(22099eb0bbb445702e0276713c3e48d60de60c30) ) ROM_LOAD16_BYTE( "rom1", 0x00001, 0x20000, CRC(802ecbfc) SHA1(cc776023c7bd6b6d6af9659a0c822a2887e50199) ) @@ -6779,6 +6816,38 @@ ROM_END ROM_START( raphero ) ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */ + ROM_LOAD16_WORD_SWAP( "3", 0x00000, 0x80000, CRC(3257bfbd) SHA1(12ba7bbbf811c9a574a7751979edaaf1f33b0764) ) + + ROM_REGION( 0x20000, "audiocpu", 0 ) /* tmp90c841 */ + ROM_LOAD( "rhp94099.2", 0x00000, 0x20000, CRC(fe01ece1) SHA1(c469fb79f2774089848c814f92ddd3c9e384050f) ) + + ROM_REGION( 0x020000, "fgtile", 0 ) + ROM_LOAD( "rhp94099.1", 0x000000, 0x020000, CRC(55a7a011) SHA1(87ded56bfdd38cbf8d3bd8b3789831f768550a12) ) /* 8x8 tiles */ + + ROM_REGION( 0x200000, "bgtile", 0 ) + ROM_LOAD( "rhp94099.4", 0x000000, 0x200000, CRC(076eee7b) SHA1(7c315fe33d0fcd92e0ce2f274996c8059228b005) ) /* 16x16 tiles */ + + ROM_REGION( 0x600000, "sprites", 0 ) /* sprites */ + ROM_LOAD16_WORD_SWAP( "rhp94099.8", 0x000000, 0x200000, CRC(49892f07) SHA1(2f5d20cd193cffcba9041aa11d6665adebeffffa) ) /* 16x16 tiles */ + ROM_LOAD16_WORD_SWAP( "rhp94099.9", 0x200000, 0x200000, CRC(ea2e47f0) SHA1(97dfa8f95f27b36deb5ce1c80e3d727bad24e52b) ) /* 16x16 tiles */ + ROM_LOAD16_WORD_SWAP( "rhp94099.10",0x400000, 0x200000, CRC(512cb839) SHA1(4a2c5ac88e4bf8a6f07c703277c4d33e649fd192) ) /* 16x16 tiles */ + + ROM_REGION( 0x440000, "oki1", 0 ) /* OKIM6295 samples */ + ROM_LOAD( "rhp94099.6", 0x040000, 0x200000, CRC(f1a80e5a) SHA1(218bd7b0c3d8b283bf96b95bf888228810699370) ) /* all banked */ + ROM_LOAD( "rhp94099.7", 0x240000, 0x200000, CRC(0d99547e) SHA1(2d9630bd55d27010f9d1d2dbdbd07ac265e8ebe6) ) /* all banked */ + + ROM_REGION( 0x440000, "oki2", 0 ) /* OKIM6295 samples */ + ROM_LOAD( "rhp94099.5", 0x040000, 0x200000, CRC(515eba93) SHA1(c35cb5f31f4bc7327be5777624af168f9fb364a5) ) /* all banked */ + ROM_LOAD( "rhp94099.6", 0x240000, 0x200000, CRC(f1a80e5a) SHA1(218bd7b0c3d8b283bf96b95bf888228810699370) ) /* all banked */ + + ROM_REGION( 0x0300, "proms", 0 ) + ROM_LOAD( "prom1.u19", 0x0000, 0x0100, CRC(4299776e) SHA1(683d14d2ace14965f0fcfe0f0540c1b77d2cece5) ) /* unknown */ + ROM_LOAD( "prom2.u53", 0x0100, 0x0100, CRC(e6ead349) SHA1(6d81b1c0233580aa48f9718bade42d640e5ef3dd) ) /* unknown */ + ROM_LOAD( "prom3.u60", 0x0200, 0x0100, CRC(304f98c6) SHA1(8dfd9bf719087ec30c83efe95c4561666c7d1801) ) /* unknown */ +ROM_END + +ROM_START( rapheroa ) + ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */ ROM_LOAD16_WORD_SWAP( "rhp94099.3", 0x00000, 0x80000, CRC(ec9b4f05) SHA1(e5bd797620dc449fd78b41d87e9ba5a764eb8b44) ) ROM_REGION( 0x20000, "audiocpu", 0 ) /* tmp90c841 */ @@ -8182,8 +8251,9 @@ GAME( 1991, blkheartj, blkheart, blkheart, blkheart, nmk16_state, empty GAME( 1991, acrobatm, 0, acrobatm, acrobatm, nmk16_state, empty_init, ROT270, "UPL (Taito license)", "Acrobat Mission", 0 ) -GAME( 1992, strahl, 0, strahl, strahl, nmk16_state, empty_init, ROT0, "UPL", "Koutetsu Yousai Strahl (Japan set 1)", 0 ) -GAME( 1992, strahla, strahl, strahl, strahl, nmk16_state, empty_init, ROT0, "UPL", "Koutetsu Yousai Strahl (Japan set 2)", 0 ) +GAME( 1992, strahl, 0, strahl, strahl, nmk16_state, empty_init, ROT0, "UPL", "Koutetsu Yousai Strahl (World)", 0 ) +GAME( 1992, strahlj, strahl, strahl, strahl, nmk16_state, empty_init, ROT0, "UPL", "Koutetsu Yousai Strahl (Japan set 1)", 0 ) +GAME( 1992, strahlja, strahl, strahl, strahl, nmk16_state, empty_init, ROT0, "UPL", "Koutetsu Yousai Strahl (Japan set 2)", 0 ) GAME( 1991, tdragon, 0, tdragon, tdragon, nmk16_state, empty_init, ROT270, "NMK (Tecmo license)", "Thunder Dragon (8th Jan. 1992, unprotected)", 0 ) GAME( 1991, tdragon1, tdragon, tdragon_prot, tdragon_prot, nmk16_state, init_tdragon_prot, ROT270, "NMK (Tecmo license)", "Thunder Dragon (4th Jun. 1991, protected)", MACHINE_UNEMULATED_PROTECTION | MACHINE_NO_SOUND ) @@ -8206,9 +8276,9 @@ GAME( 1993, tdragon2a, tdragon2, tdragon2, tdragon2, nmk16_state, init_ GAME( 1993, bigbang, tdragon2, tdragon2, tdragon2, nmk16_state, init_banked_audiocpu, ROT270, "NMK", "Big Bang (9th Nov. 1993)", MACHINE_NO_COCKTAIL ) GAME( 1996, tdragon3h, tdragon2, tdragon3h, tdragon2, nmk16_state, init_banked_audiocpu, ROT270, "bootleg (Conny Co Ltd.)", "Thunder Dragon 3 (bootleg of Thunder Dragon 2)", MACHINE_IMPERFECT_SOUND | MACHINE_NO_COCKTAIL ) // based on 1st Oct. 1993 set, Sound system isn't hooked up correctly for this set -/* arcadia was a name conflict to the Emerson Arcadia 2001 in mess */ GAME( 1994, arcadian, 0, raphero, raphero, nmk16_state, init_banked_audiocpu, ROT270, "NMK", "Arcadia (NMK)", 0 ) // 23rd July 1993 in test mode, (c)1994 on title screen -GAME( 1994, raphero, arcadian, raphero, raphero, nmk16_state, init_banked_audiocpu, ROT270, "NMK (Media Trading license)", "Rapid Hero", 0 ) // ^^ +GAME( 1994, raphero, arcadian, raphero, raphero, nmk16_state, init_banked_audiocpu, ROT270, "NMK", "Rapid Hero (NMK)", 0 ) // ^^ +GAME( 1994, rapheroa, arcadian, raphero, raphero, nmk16_state, init_banked_audiocpu, ROT270, "NMK (Media Trading license)", "Rapid Hero (Media Trading)", 0 ) // ^^ - note that all romsets have Media Trading(aka Media Shoji) in the tile graphics, but this is the only set that shows it on the titlescreen /* both sets of both these games show a date of 9th Mar 1992 in the test mode, they look like different revisions so I doubt this is accurate */ GAME( 1992, sabotenb, 0, bjtwin, sabotenb, nmk16_state, init_nmk, ROT0, "NMK / Tecmo", "Saboten Bombers (set 1)", MACHINE_NO_COCKTAIL ) diff --git a/src/mame/drivers/norautp.cpp b/src/mame/drivers/norautp.cpp index 7a299a1cdef..58ac1ba8862 100644 --- a/src/mame/drivers/norautp.cpp +++ b/src/mame/drivers/norautp.cpp @@ -732,8 +732,8 @@ TIMER_CALLBACK_MEMBER(norautp_state::ppi2_ack) m_ppi8255[2]->pc6_w(param); if (param == 0) { - uint8_t const np_addr = m_ppi8255[2]->read_pb(); - uint8_t const vram_data = m_ppi8255[2]->read_pa(); + uint8_t const np_addr = m_ppi8255[2]->pb_r(); + uint8_t const vram_data = m_ppi8255[2]->pa_r(); m_np_vram[np_addr] = vram_data; } } @@ -3670,7 +3670,7 @@ GAME( 1983, gtipoker, 0, dphl, norautp, norautp_state, empty_init, RO GAME( 1983, gtipokra, 0, dphla, norautp, norautp_state, empty_init, ROT0, "GTI Inc", "GTI Poker? (SMS hardware)", MACHINE_NOT_WORKING ) GAME( 1983, smshilo, 0, dphla, norautp, norautp_state, empty_init, ROT0, "SMS Manufacturing Corp.", "HI-LO Double Up Joker Poker", MACHINE_NOT_WORKING ) GAME( 1986, drhl, 0, drhl, norautp, norautp_state, empty_init, ROT0, "Drews Inc.", "Drews Revenge (v.2.89, set 1)", MACHINE_NOT_WORKING ) -GAME( 1986, drhla, 0, drhl, norautp, norautp_state, empty_init, ROT0, "Drews Inc.", "Drews Revenge (v.2.89, set 2)", MACHINE_NOT_WORKING ) +GAME( 1986, drhla, drhl, drhl, norautp, norautp_state, empty_init, ROT0, "Drews Inc.", "Drews Revenge (v.2.89, set 2)", MACHINE_NOT_WORKING ) GAME( 1982, ssjkrpkr, 0, ssjkrpkr, norautp, norautp_state, init_ssa, ROT0, "Southern Systems & Assembly", "Southern Systems Joker Poker", MACHINE_NOT_WORKING ) /* The following one also has a custom 68705 MCU */ diff --git a/src/mame/drivers/octopus.cpp b/src/mame/drivers/octopus.cpp index 7f1a2da06a3..85b40554c79 100644 --- a/src/mame/drivers/octopus.cpp +++ b/src/mame/drivers/octopus.cpp @@ -305,8 +305,7 @@ void octopus_state::octopus_io(address_map &map) map(0x20, 0x20).portr("DSWA"); map(0x21, 0x2f).rw(FUNC(octopus_state::system_r), FUNC(octopus_state::system_w)); map(0x31, 0x33).rw(FUNC(octopus_state::bank_sel_r), FUNC(octopus_state::bank_sel_w)); - map(0x50, 0x50).rw(m_kb_uart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x51, 0x51).rw(m_kb_uart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x50, 0x51).rw(m_kb_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)); // 0x70-73: HD controller map(0x80, 0x83).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0xa0, 0xa0).rw(m_serial, FUNC(z80sio_device::da_r), FUNC(z80sio_device::da_w)); diff --git a/src/mame/drivers/odyssey2.cpp b/src/mame/drivers/odyssey2.cpp index d5530db733b..1d0efddb345 100644 --- a/src/mame/drivers/odyssey2.cpp +++ b/src/mame/drivers/odyssey2.cpp @@ -113,7 +113,10 @@ private: DECLARE_WRITE8_MEMBER(p2_write); DECLARE_READ8_MEMBER(io_read); DECLARE_WRITE8_MEMBER(io_write); - DECLARE_WRITE8_MEMBER(i8243_port_w); + void i8243_p4_w(uint8_t data); + void i8243_p5_w(uint8_t data); + void i8243_p6_w(uint8_t data); + void i8243_p7_w(uint8_t data); DECLARE_WRITE16_MEMBER(scanline_postprocess); void g7400_io(address_map &map); @@ -555,7 +558,7 @@ WRITE8_MEMBER(odyssey2_state::p2_write) WRITE8_MEMBER(g7400_state::p2_write) { m_p2 = data; - m_i8243->p2_w( space, 0, m_p2 & 0x0f ); + m_i8243->p2_w(m_p2 & 0x0f); } @@ -587,43 +590,47 @@ WRITE8_MEMBER(odyssey2_state::bus_write) i8243 in the g7400 */ -WRITE8_MEMBER(g7400_state::i8243_port_w) +void g7400_state::i8243_p4_w(uint8_t data) { - switch ( offset & 3 ) - { - case 0: // "port 4" -logerror("setting ef-port4 to %02x\n", data); - m_ic674_decode[4] = BIT(data,0); - m_ic674_decode[5] = BIT(data,1); - m_ic674_decode[6] = BIT(data,2); - m_ic674_decode[7] = BIT(data,3); - break; - - case 1: // "port 5" -logerror("setting ef-port5 to %02x\n", data); - m_ic674_decode[0] = BIT(data,0); - m_ic674_decode[1] = BIT(data,1); - m_ic674_decode[2] = BIT(data,2); - m_ic674_decode[3] = BIT(data,3); - break; - - case 2: // "port 6" -logerror("setting vdc-port6 to %02x\n", data); - m_ic678_decode[4] = BIT(data,0); - m_ic678_decode[5] = BIT(data,1); - m_ic678_decode[6] = BIT(data,2); - m_ic678_decode[7] = BIT(data,3); - break; - - case 3: // "port 7" -logerror("setting vdc-port7 to %02x\n", data); - m_ic678_decode[0] = BIT(data,0); - m_ic678_decode[1] = BIT(data,1); - m_ic678_decode[2] = BIT(data,2); - m_ic678_decode[3] = BIT(data,3); - break; + // "port 4" + logerror("setting ef-port4 to %02x\n", data); + m_ic674_decode[4] = BIT(data,0); + m_ic674_decode[5] = BIT(data,1); + m_ic674_decode[6] = BIT(data,2); + m_ic674_decode[7] = BIT(data,3); +} - } + +void g7400_state::i8243_p5_w(uint8_t data) +{ + // "port 5" + logerror("setting ef-port5 to %02x\n", data); + m_ic674_decode[0] = BIT(data,0); + m_ic674_decode[1] = BIT(data,1); + m_ic674_decode[2] = BIT(data,2); + m_ic674_decode[3] = BIT(data,3); +} + + +void g7400_state::i8243_p6_w(uint8_t data) +{ + // "port 6" + logerror("setting vdc-port6 to %02x\n", data); + m_ic678_decode[4] = BIT(data,0); + m_ic678_decode[5] = BIT(data,1); + m_ic678_decode[6] = BIT(data,2); + m_ic678_decode[7] = BIT(data,3); +} + + +void g7400_state::i8243_p7_w(uint8_t data) +{ + // "port 7" + logerror("setting vdc-port7 to %02x\n", data); + m_ic678_decode[0] = BIT(data,0); + m_ic678_decode[1] = BIT(data,1); + m_ic678_decode[2] = BIT(data,2); + m_ic678_decode[3] = BIT(data,3); } @@ -767,8 +774,10 @@ MACHINE_CONFIG_START(g7400_state::g7400) MCFG_PALETTE_INIT_OWNER(g7400_state, g7400) I8243(config, m_i8243); - m_i8243->read_handler().set_constant(0); - m_i8243->write_handler().set(FUNC(g7400_state::i8243_port_w)); + m_i8243->p4_out_cb().set(FUNC(g7400_state::i8243_p4_w)); + m_i8243->p5_out_cb().set(FUNC(g7400_state::i8243_p5_w)); + m_i8243->p6_out_cb().set(FUNC(g7400_state::i8243_p6_w)); + m_i8243->p7_out_cb().set(FUNC(g7400_state::i8243_p7_w)); MCFG_EF9340_1_ADD("ef9340_1", 3540000, "screen") @@ -810,8 +819,10 @@ MACHINE_CONFIG_START(g7400_state::odyssey3) MCFG_PALETTE_INIT_OWNER(g7400_state, g7400) I8243(config, m_i8243); - m_i8243->read_handler().set_constant(0); - m_i8243->write_handler().set(FUNC(g7400_state::i8243_port_w)); + m_i8243->p4_out_cb().set(FUNC(g7400_state::i8243_p4_w)); + m_i8243->p5_out_cb().set(FUNC(g7400_state::i8243_p5_w)); + m_i8243->p6_out_cb().set(FUNC(g7400_state::i8243_p6_w)); + m_i8243->p7_out_cb().set(FUNC(g7400_state::i8243_p7_w)); MCFG_EF9340_1_ADD("ef9340_1", 3540000, "screen") diff --git a/src/mame/drivers/okean240.cpp b/src/mame/drivers/okean240.cpp index 7114a44014e..5bcc07378c7 100644 --- a/src/mame/drivers/okean240.cpp +++ b/src/mame/drivers/okean240.cpp @@ -255,8 +255,7 @@ void okean240_state::okean240a_io(address_map &map) map(0x60, 0x63).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0x80, 0x81).rw("pic", FUNC(pic8259_device::read), FUNC(pic8259_device::write)); map(0x80, 0x80).r(FUNC(okean240_state::okean240a_kbd_status_r)); - map(0xa0, 0xa0).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xa1, 0xa1).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xa0, 0xa1).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xc0, 0xc3).rw("ppic", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0xe0, 0xe3).rw("ppie", FUNC(i8255_device::read), FUNC(i8255_device::write)); // AM_RANGE(0x00, 0x1f)=ppa00.data @@ -279,8 +278,7 @@ void okean240_state::okean240t_io(address_map &map) map(0x60, 0x63).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0x80, 0x81).rw("pic", FUNC(pic8259_device::read), FUNC(pic8259_device::write)); map(0x80, 0x80).r(FUNC(okean240_state::okean240_kbd_status_r)); - map(0xa0, 0xa0).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xa1, 0xa1).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xa0, 0xa1).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xc0, 0xc3).rw("ppic", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0xe0, 0xe3).rw("ppie", FUNC(i8255_device::read), FUNC(i8255_device::write)); } diff --git a/src/mame/drivers/olyboss.cpp b/src/mame/drivers/olyboss.cpp index 45499d83768..f1bdbc88b33 100644 --- a/src/mame/drivers/olyboss.cpp +++ b/src/mame/drivers/olyboss.cpp @@ -514,9 +514,9 @@ MACHINE_CONFIG_START( olyboss_state::bossb85 ) MCFG_DEVICE_ADD("pic", PIC8259, 0) MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0)) - MCFG_UPD765A_ADD("fdc", true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE("maincpu", I8085_RST65_LINE)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(m_dma, i8257_device, dreq0_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_maincpu, I8085_RST65_LINE); + m_fdc->drq_wr_callback().set(m_dma, FUNC(i8257_device::dreq0_w)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", bossb_floppies, "525dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_SOUND(true) MCFG_FLOPPY_DRIVE_ADD("fdc:1", bossb_floppies, "525dd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/opwolf.cpp b/src/mame/drivers/opwolf.cpp index 9a97b534e9e..6c2e351021a 100644 --- a/src/mame/drivers/opwolf.cpp +++ b/src/mame/drivers/opwolf.cpp @@ -258,7 +258,10 @@ TODO There are a few unmapped writes for the sound Z80 in the log. -Unknown writes to the MSM5205 control addresses +Unknown writes to the MSM5205 control addresses (RUN/RES implementation is wrong) + +Sound volume filtering is imperfect. Notably the coin insert sound: +MSM1 rings it at volume 0xa8, MSM2 echos it at volume 0x84 but should be more muffled. Raine source has standard Asuka/Mofflot sprite/tile priority: 0x2000 in sprite_ctrl puts all sprites under top bg layer. But @@ -304,7 +307,9 @@ public: m_cchip_irq_clear(*this, "cchip_irq_clear"), m_pc080sn(*this, "pc080sn"), m_pc090oj(*this, "pc090oj"), - m_msm(*this, "msm%u", 0) + m_msm(*this, "msm%u", 0), + m_lspeaker(*this, "lspeaker"), + m_rspeaker(*this, "rspeaker") { } void opwolf(machine_config &config); @@ -371,6 +376,8 @@ private: required_device<pc080sn_device> m_pc080sn; required_device<pc090oj_device> m_pc090oj; required_device_array<msm5205_device, 2> m_msm; + required_device<speaker_device> m_lspeaker; + required_device<speaker_device> m_rspeaker; }; @@ -747,15 +754,15 @@ WRITE8_MEMBER(opwolf_state::sound_bankswitch_w) membank("z80bank")->set_entry(data & 0x03); } -//static uint8_t adpcm_d[0x08]; //0 - start ROM offset LSB //1 - start ROM offset MSB //2 - end ROM offset LSB //3 - end ROM offset MSB //start & end need to be multiplied by 16 to get a proper _byte_ address in adpcm ROM -//4 - always zero write (start trigger ?) -//5 - different values -//6 - different values +//4 - RUN, always zero write (start trigger ?) +//5 - VOL, sample volume +//6 - RES +//7 - N/C template<int N> WRITE_LINE_MEMBER(opwolf_state::msm5205_vck_w) @@ -794,6 +801,7 @@ WRITE8_MEMBER(opwolf_state::opwolf_adpcm_b_w) m_adpcm_pos[0] = start; m_adpcm_end[0] = end; m_msm[0]->reset_w(0); + m_msm[0]->set_output_gain(0, m_adpcm_b[5] / 255.0); //logerror("TRIGGER MSM1\n"); } @@ -816,6 +824,7 @@ WRITE8_MEMBER(opwolf_state::opwolf_adpcm_c_w) m_adpcm_pos[1] = start; m_adpcm_end[1] = end; m_msm[1]->reset_w(0); + m_msm[1]->set_output_gain(0, m_adpcm_c[5] / 255.0); //logerror("TRIGGER MSM2\n"); } @@ -824,12 +833,16 @@ WRITE8_MEMBER(opwolf_state::opwolf_adpcm_c_w) WRITE8_MEMBER(opwolf_state::opwolf_adpcm_d_w) { -// logerror("CPU #1 d00%i-data=%2x pc=%4x\n",offset,data,m_audiocpu->pc() ); + // total volume (speaker 1) + for (int i = 0; i <= 2; i++) + m_lspeaker->set_input_gain(i, data / 255.0); } WRITE8_MEMBER(opwolf_state::opwolf_adpcm_e_w) { -// logerror("CPU #1 e00%i-data=%2x pc=%4x\n",offset,data,m_audiocpu->pc() ); + // total volume (speaker 2) + for (int i = 0; i <= 2; i++) + m_rspeaker->set_input_gain(i, data / 255.0); } @@ -975,14 +988,14 @@ MACHINE_CONFIG_START(opwolf_state::opwolf) MCFG_DEVICE_ADD("msm0", MSM5205, 384000) MCFG_MSM5205_VCLK_CB(WRITELINE(*this, opwolf_state, msm5205_vck_w<0>)) MCFG_MSM5205_PRESCALER_SELECTOR(S48_4B) /* 8 kHz */ - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.60) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.60) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.85) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.85) MCFG_DEVICE_ADD("msm1", MSM5205, 384000) MCFG_MSM5205_VCLK_CB(WRITELINE(*this, opwolf_state, msm5205_vck_w<1>)) MCFG_MSM5205_PRESCALER_SELECTOR(S48_4B) /* 8 kHz */ - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.60) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.60) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.85) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.85) MCFG_DEVICE_ADD("ciu", PC060HA, 0) MCFG_PC060HA_MASTER_CPU("maincpu") @@ -1050,14 +1063,14 @@ MACHINE_CONFIG_START(opwolf_state::opwolfb) /* OSC clocks unknown for the bootle MCFG_DEVICE_ADD("msm0", MSM5205, 384000) MCFG_MSM5205_VCLK_CB(WRITELINE(*this, opwolf_state, msm5205_vck_w<0>)) MCFG_MSM5205_PRESCALER_SELECTOR(S48_4B) /* 8 kHz */ - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.60) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.60) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.85) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.85) MCFG_DEVICE_ADD("msm1", MSM5205, 384000) MCFG_MSM5205_VCLK_CB(WRITELINE(*this, opwolf_state, msm5205_vck_w<1>)) MCFG_MSM5205_PRESCALER_SELECTOR(S48_4B) /* 8 kHz */ - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.60) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.60) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.85) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.85) MCFG_DEVICE_ADD("ciu", PC060HA, 0) MCFG_PC060HA_MASTER_CPU("maincpu") @@ -1268,8 +1281,6 @@ ROM_END // Regular rom set includes the string '11 Sep 1987' // C-Chip includes the string 'By_TAITO_Copration_On_OSAKA_BUNSHITU._01.Sep.1987_Toshiaki.Kato_Tsutomuawa_4 -// MACHINE_IMPERFECT_SOUND is present because the credit sound appears to double trigger. All other sounds seem correct. - // year rom parent machine inp state init GAME( 1987, opwolf, 0, opwolf, opwolf, opwolf_state, init_opwolf, ROT0, "Taito Corporation Japan", "Operation Wolf (World, set 1)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 1987, opwolfa, opwolf, opwolf, opwolf, opwolf_state, init_opwolf, ROT0, "Taito Corporation Japan", "Operation Wolf (World, set 2)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/othello.cpp b/src/mame/drivers/othello.cpp index 21b4dd7a93d..9d0439c2d17 100644 --- a/src/mame/drivers/othello.cpp +++ b/src/mame/drivers/othello.cpp @@ -117,7 +117,8 @@ private: DECLARE_READ8_MEMBER(n7751_rom_r); DECLARE_READ8_MEMBER(n7751_command_r); DECLARE_WRITE8_MEMBER(n7751_p2_w); - DECLARE_WRITE8_MEMBER(n7751_rom_control_w); + template<int Shift> void n7751_rom_addr_w(uint8_t data); + void n7751_rom_select_w(uint8_t data); DECLARE_PALETTE_INIT(othello); MC6845_UPDATE_ROW(crtc_update_row); @@ -280,36 +281,24 @@ void othello_state::audio_portmap(address_map &map) map(0x08, 0x08).w(FUNC(othello_state::ay_select_w)); } -WRITE8_MEMBER(othello_state::n7751_rom_control_w) +template<int Shift> +void othello_state::n7751_rom_addr_w(uint8_t data) { - /* P4 - address lines 0-3 */ - /* P5 - address lines 4-7 */ - /* P6 - address lines 8-11 */ - /* P7 - ROM selects */ - switch (offset) - { - case 0: - m_sound_addr = (m_sound_addr & ~0x00f) | ((data & 0x0f) << 0); - break; - - case 1: - m_sound_addr = (m_sound_addr & ~0x0f0) | ((data & 0x0f) << 4); - break; - - case 2: - m_sound_addr = (m_sound_addr & ~0xf00) | ((data & 0x0f) << 8); - break; - - case 3: - m_sound_addr &= 0xfff; - { - if (!BIT(data, 0)) m_sound_addr |= 0x0000; - if (!BIT(data, 1)) m_sound_addr |= 0x1000; - if (!BIT(data, 2)) m_sound_addr |= 0x2000; - if (!BIT(data, 3)) m_sound_addr |= 0x3000; - } - break; - } + // P4 - address lines 0-3 + // P5 - address lines 4-7 + // P6 - address lines 8-11 + m_sound_addr = (m_sound_addr & ~(0x00f << Shift)) | ((data & 0x0f) << Shift); +} + +void othello_state::n7751_rom_select_w(uint8_t data) +{ + // P7 - ROM selects + m_sound_addr &= 0xfff; + + if (!BIT(data, 0)) m_sound_addr |= 0x0000; + if (!BIT(data, 1)) m_sound_addr |= 0x1000; + if (!BIT(data, 2)) m_sound_addr |= 0x2000; + if (!BIT(data, 3)) m_sound_addr |= 0x3000; } READ8_MEMBER(othello_state::n7751_rom_r) @@ -325,7 +314,7 @@ READ8_MEMBER(othello_state::n7751_command_r) WRITE8_MEMBER(othello_state::n7751_p2_w) { /* write to P2; low 4 bits go to 8243 */ - m_i8243->p2_w(space, offset, data & 0x0f); + m_i8243->p2_w(data & 0x0f); /* output of bit $80 indicates we are ready (1) or busy (0) */ /* no other outputs are used */ @@ -419,8 +408,10 @@ MACHINE_CONFIG_START(othello_state::othello) MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(m_i8243, i8243_device, prog_w)) I8243(config, m_i8243); - m_i8243->read_handler().set_constant(0); - m_i8243->write_handler().set(FUNC(othello_state::n7751_rom_control_w)); + m_i8243->p4_out_cb().set(FUNC(othello_state::n7751_rom_addr_w<0>)); + m_i8243->p5_out_cb().set(FUNC(othello_state::n7751_rom_addr_w<4>)); + m_i8243->p6_out_cb().set(FUNC(othello_state::n7751_rom_addr_w<8>)); + m_i8243->p7_out_cb().set(FUNC(othello_state::n7751_rom_select_w)); /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) diff --git a/src/mame/drivers/p8k.cpp b/src/mame/drivers/p8k.cpp index 24b4c33c7eb..47d836d0b44 100644 --- a/src/mame/drivers/p8k.cpp +++ b/src/mame/drivers/p8k.cpp @@ -472,8 +472,8 @@ MACHINE_CONFIG_START(p8k_state::p8k) m_pio2->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); m_pio2->in_pa_callback().set_ioport("DSW"); - MCFG_I8272A_ADD("i8272", true) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dma", z80dma_device, rdy_w)) + I8272A(config, m_i8272, true); + m_i8272->drq_wr_callback().set("dma", FUNC(z80dma_device::rdy_w)); MCFG_FLOPPY_DRIVE_ADD("i8272:0", p8k_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("i8272:1", p8k_floppies, "525hd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/pacland.cpp b/src/mame/drivers/pacland.cpp index dae2cf7b411..9df31c47c09 100644 --- a/src/mame/drivers/pacland.cpp +++ b/src/mame/drivers/pacland.cpp @@ -331,7 +331,7 @@ static INPUT_PORTS_START( pacland ) PORT_START("DSWB") PORT_DIPNAME( 0xe0, 0xe0, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:3,2,1") - PORT_DIPSETTING( 0xe0, "30K 80K 130K 300K 500K 1M" ) // "A" + PORT_DIPSETTING( 0xe0, "30K 80K 150K 300K 500K 1M" ) // "A" PORT_DIPSETTING( 0x80, "30K 80K every 100K" ) // "D" PORT_DIPSETTING( 0x40, "30K 80K 150K" ) // "F" PORT_DIPSETTING( 0xc0, "30K 100K 200K 400K 600K 1M" ) // "B" diff --git a/src/mame/drivers/pacman.cpp b/src/mame/drivers/pacman.cpp index a0bbb38938d..5e0c7b45682 100644 --- a/src/mame/drivers/pacman.cpp +++ b/src/mame/drivers/pacman.cpp @@ -4614,6 +4614,36 @@ ROM_START( crockman ) ROM_LOAD( "82s126.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */ ROM_END +/* Bootleg from Marti Colls (Falgas) of Crock-Man. + It's mainly a hack to remove Rene Pierre logo, but it was on an original Marti Colls bootleg hardware */ +ROM_START( crockmnf ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "crockmc_01.bin", 0x0000, 0x0800, CRC(2c0fa0ab) SHA1(37680e4502771ae69d51d07ce43f65b9b2dd2a49) ) + ROM_LOAD( "crockmc_05.bin", 0x0800, 0x0800, CRC(afeca2f1) SHA1(1e6d6c75eeb3a354ce2dc88da62caf9e7d53d0cb) ) + ROM_LOAD( "crockmc_02.bin", 0x1000, 0x0800, CRC(7d177853) SHA1(9b5ddaaa8b564654f97af193dbcc29f81f230a25) ) + ROM_LOAD( "crockmc_06.bin", 0x1800, 0x0800, CRC(d3e8914c) SHA1(c2f00e1773c6864435f29c8b7f44f2ef85d227d3) ) + ROM_LOAD( "crockmc_03.bin", 0x2000, 0x0800, CRC(9045a44c) SHA1(a97d7016effbd2ace9a7d92ceb04a6ce18fb42f9) ) + ROM_LOAD( "crockmc_07.bin", 0x2800, 0x0800, CRC(93f344c5) SHA1(987c7fa18a774a47c045fa1dc7dff37457cb8983) ) + ROM_LOAD( "crockmc_04.bin", 0x3000, 0x0800, CRC(bed4a077) SHA1(39ac1d4d2acf4752ff7f9839f8f0d1974e023fab) ) + ROM_LOAD( "crockmc_08.bin", 0x3800, 0x0800, CRC(800be41e) SHA1(6f40e741d95c2cfe1b217f1061da3497b4c2a153) ) + + ROM_REGION( 0x2000, "gfx1", 0 ) + ROM_LOAD( "crockmc_09.bin", 0x0000, 0x0800, CRC(581d0c11) SHA1(82f39459bab2547d7bb70fd08e74da5c23590dfc) ) + ROM_LOAD( "crockmc_11.bin", 0x0800, 0x0800, CRC(3591b89d) SHA1(79bb456be6c39c1ccd7d077fbe181523131fb300) ) + ROM_LOAD( "crockmc_10.bin", 0x1000, 0x0800, CRC(9e39323a) SHA1(be933e691df4dbe7d12123913c3b7b7b585b7a35) ) + ROM_LOAD( "crockmc_12.bin", 0x1800, 0x0800, CRC(1b1d9096) SHA1(53771c573051db43e7185b1d188533056290a620) ) + + /* Undumped on the Marti Colls PCB, taken from the parent set */ + ROM_REGION( 0x0120, "proms", 0 ) + ROM_LOAD( "82s123.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) ) + ROM_LOAD( "82s126.4a", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) ) + + /* Undumped on the Marti Colls PCB, taken from the parent set */ + ROM_REGION( 0x0200, "namco", 0 ) /* sound PROMs */ + ROM_LOAD( "82s126.1m", 0x0000, 0x0100, CRC(a9cc86bf) SHA1(bbcec0570aeceb582ff8238a4bc8546a23430081) ) + ROM_LOAD( "82s126.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */ +ROM_END + ROM_START( puckmanh ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "pm01.6e", 0x0000, 0x1000, CRC(5fe8610a) SHA1(d63eaebd85e10aa6c27bb7f47642dd403eeb6934) ) @@ -4863,6 +4893,36 @@ ROM_START( titanpac ) /* GDP-01 main PCB with GDP-02 auxiliary card (same as Pir ROM_LOAD( "82s126.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */ ROM_END +/* Bootleg from Spanish company "FAMARE S.A.". Board labeled "FAMARESA 560-002" + It's mainly a hack to remove Namco logo, but it was on an original Famaresa bootleg hardware */ +ROM_START( pacmanfm ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "pacfama_01.bin", 0x0000, 0x0800, CRC(f36e88ab) SHA1(813cecf44bf5464b1aed64b36f5047e4c79ba176) ) + ROM_LOAD( "pacfama_05.bin", 0x0800, 0x0800, CRC(618bd9b3) SHA1(b9ca52b63a49ddece768378d331deebbe34fe177) ) + ROM_LOAD( "pacfama_02.bin", 0x1000, 0x0800, CRC(7d177853) SHA1(9b5ddaaa8b564654f97af193dbcc29f81f230a25) ) + ROM_LOAD( "pacfama_06.bin", 0x1800, 0x0800, CRC(d3e8914c) SHA1(c2f00e1773c6864435f29c8b7f44f2ef85d227d3) ) + ROM_LOAD( "pacfama_03.bin", 0x2000, 0x0800, CRC(6bf4f625) SHA1(afe72fdfec66c145b53ed865f98734686b26e921) ) + ROM_LOAD( "pacfama_07.bin", 0x2800, 0x0800, CRC(a948ce83) SHA1(08759833f7e0690b2ccae573c929e2a48e5bde7f) ) + ROM_LOAD( "pacfama_04.bin", 0x3000, 0x0800, CRC(b6289b26) SHA1(d249fa9cdde774d5fee7258147cd25fa3f4dc2b3) ) + ROM_LOAD( "pacfama_08.bin", 0x3800, 0x0800, CRC(17a88c13) SHA1(eb462de79f49b7aa8adb0cc6d31535b10550c0ce) ) + + ROM_REGION( 0x2000, "gfx1", 0 ) + ROM_LOAD( "pacfama_09.bin", 0x0000, 0x0800, CRC(7a7b48b3) SHA1(a12f08d76f9aee3c1fc8401d0aa087d2187c1803) ) + ROM_LOAD( "pacfama_11.bin", 0x0800, 0x0800, CRC(3591b89d) SHA1(79bb456be6c39c1ccd7d077fbe181523131fb300) ) + ROM_LOAD( "pacfama_10.bin", 0x1000, 0x0800, CRC(9e39323a) SHA1(be933e691df4dbe7d12123913c3b7b7b585b7a35) ) + ROM_LOAD( "pacfama_12.bin", 0x1800, 0x0800, CRC(1b1d9096) SHA1(53771c573051db43e7185b1d188533056290a620) ) + + /* Undumped on the Famaresa PCB, taken from the parent set */ + ROM_REGION( 0x0120, "proms", 0 ) + ROM_LOAD( "pm1-1.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) ) // 82s123 + ROM_LOAD( "pm1-4.4a", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) ) // 82s126 + + /* Undumped on the Famaresa PCB, taken from the parent set */ + ROM_REGION( 0x0200, "namco", 0 ) /* sound PROMs */ + ROM_LOAD( "pm1-3.1m", 0x0000, 0x0100, CRC(a9cc86bf) SHA1(bbcec0570aeceb582ff8238a4bc8546a23430081) ) // 82s126 + ROM_LOAD( "pm1-2.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) // 82s126 - timing - not used +ROM_END + ROM_START( piranha ) /* GDP-01 main PCB with GDP-02 auxiliary card */ ROM_REGION( 0x10000, "maincpu",0 ) ROM_LOAD( "pir1.7e", 0x0000, 0x0800, CRC(69a3e6ea) SHA1(c54e5d039a03d3cbee7a5e21bf1e23f4fd913ea6) ) @@ -5152,6 +5212,31 @@ ROM_START( mspacmbe ) ROM_LOAD( "82s126.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */ ROM_END +/** Marti Colls (Falgas) bootleg. */ +ROM_START( mspacmbmc ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "misspacmanfalgas_0.bin", 0x0000, 0x1000, CRC(d16b31b7) SHA1(bc2247ec946b639dd1f00bfc603fa157d0baaa97) ) + ROM_LOAD( "misspacmanfalgas_1.bin", 0x1000, 0x1000, CRC(0d32de5e) SHA1(13ea0c343de072508908be885e6a2a217bbb3047) ) + ROM_LOAD( "misspacmanfalgas_2.bin", 0x2000, 0x1000, CRC(1821ee0b) SHA1(5ea4d907dbb2690698db72c4e0b5be4d3e9a7786) ) + ROM_LOAD( "misspacmanfalgas_3.bin", 0x3000, 0x1000, CRC(e086219d) SHA1(6802cf425be878f442716d792946a85fc13e7413) ) + ROM_LOAD( "misspacmanfalgas_4.bin", 0x8000, 0x1000, CRC(8c3e6de6) SHA1(fed6e9a2b210b07e7189a18574f6b8c4ec5bb49b) ) + ROM_LOAD( "misspacmanfalgas_5.bin", 0x9000, 0x1000, CRC(206a9623) SHA1(20006f945c1b7b0e3c0415eecc0b148e5a6a1dfa) ) + + /* Undumped on the Marti Colls PCB, taken from the parent set */ + ROM_REGION( 0x2000, "gfx1", 0 ) + ROM_LOAD( "5e", 0x0000, 0x1000, CRC(5c281d01) SHA1(5e8b472b615f12efca3fe792410c23619f067845) ) + ROM_LOAD( "5f", 0x1000, 0x1000, CRC(615af909) SHA1(fd6a1dde780b39aea76bf1c4befa5882573c2ef4) ) + + /* Undumped on the Marti Colls PCB, taken from the parent set */ + ROM_REGION( 0x0120, "proms", 0 ) + ROM_LOAD( "82s123.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) ) + ROM_LOAD( "82s126.4a", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) ) + + /* Undumped on the Marti Colls PCB, taken from the parent set */ + ROM_REGION( 0x0200, "namco", 0 ) /* sound PROMs */ + ROM_LOAD( "82s126.1m", 0x0000, 0x0100, CRC(a9cc86bf) SHA1(bbcec0570aeceb582ff8238a4bc8546a23430081) ) + ROM_LOAD( "82s126.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) /* timing - not used */ +ROM_END ROM_START( mspacii ) ROM_REGION( 0x10000, "maincpu", 0 ) @@ -7361,6 +7446,7 @@ GAME( 1981, hangly3, puckman, pacman, pacman, pacman_state, empty_init, GAME( 1981, popeyeman,puckman, pacman, pacman, pacman_state, empty_init, ROT90, "hack", "Popeye-Man", MACHINE_SUPPORTS_SAVE ) GAME( 1980, pacuman, puckman, pacman, pacuman, pacman_state, empty_init, ROT90, "bootleg (Recreativos Franco S.A.)", "Pacu-Man (Spanish bootleg of Puck Man)", MACHINE_SUPPORTS_SAVE ) // common bootleg in Spain, code is shifted a bit compared to the Puck Man sets. Title & Manufacturer info from cabinet/PCB, not displayed ingame GAME( 1980, crockman, puckman, pacman, pacman, pacman_state, empty_init, ROT90, "bootleg (Rene Pierre)", "Crock-Man", MACHINE_SUPPORTS_SAVE ) +GAME( 1980, crockmnf, puckman, pacman, pacman, pacman_state, empty_init, ROT90, "bootleg (Marti Colls)", "Crock-Man (Marti Colls bootleg of Rene Pierre Crock-Man)", MACHINE_SUPPORTS_SAVE ) GAME( 1982, joyman, puckman, pacman, pacman, pacman_state, empty_init, ROT90, "hack", "Joyman", MACHINE_SUPPORTS_SAVE ) GAME( 1982, ctrpllrp, puckman, pacman, pacman, pacman_state, empty_init, ROT90, "hack", "Caterpillar Pacman Hack", MACHINE_SUPPORTS_SAVE ) GAME( 1981, piranha, puckman, piranha, mspacman, pacman_state, init_eyes, ROT90, "GL (US Billiards license)", "Piranha", MACHINE_SUPPORTS_SAVE ) @@ -7368,6 +7454,7 @@ GAME( 1981, piranhao, puckman, piranha, mspacman, pacman_state, init_eyes, GAME( 1981, abscam, puckman, piranha, mspacman, pacman_state, init_eyes, ROT90, "GL (US Billiards license)", "Abscam", MACHINE_SUPPORTS_SAVE ) GAME( 1981, piranhah, puckman, pacman, mspacman, pacman_state, empty_init, ROT90, "hack", "Piranha (hack)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, titanpac, puckman, piranha, mspacman, pacman_state, init_eyes, ROT90, "hack", "Titan (Pac-Man hack)", MACHINE_SUPPORTS_SAVE ) +GAME( 1980, pacmanfm, puckman, pacman, pacman, pacman_state, empty_init, ROT90, "bootleg (FAMARE S.A.)", "Pac Man (FAMARE S.A. bootleg of Puck Man)", MACHINE_SUPPORTS_SAVE ) GAME( 1982, pacplus, 0, pacman, pacman, pacman_state, init_pacplus, ROT90, "Namco (Midway license)", "Pac-Man Plus", MACHINE_SUPPORTS_SAVE ) @@ -7380,6 +7467,7 @@ GAME( 1981, mspacmancr,mspacman,mspacman, mspacman, pacman_state, init_mspacman GAME( 1981, mspacmab, mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "bootleg", "Ms. Pac-Man (bootleg, set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, mspacmab2,mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "bootleg", "Ms. Pac-Man (bootleg, set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, mspacmbe, mspacman, woodpek, mspacman, pacman_state, init_mspacmbe, ROT90, "bootleg", "Ms. Pac-Man (bootleg, encrypted)", MACHINE_SUPPORTS_SAVE ) +GAME( 1982, mspacmbmc,mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "bootleg (Marti Colls)", "Ms. Pac-Man (Marti Colls bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, mspacii, mspacman, woodpek, mspacman, pacman_state, init_mspacii, ROT90, "bootleg (Orca)", "Ms. Pac-Man II (Orca bootleg set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, mspacii2, mspacman, woodpek, mspacman, pacman_state, init_mspacii, ROT90, "bootleg (Orca)", "Ms. Pac-Man II (Orca bootleg set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, pacgal, mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "hack", "Pac-Gal (set 1)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/paradise.cpp b/src/mame/drivers/paradise.cpp index 63d42960463..78ffc541953 100644 --- a/src/mame/drivers/paradise.cpp +++ b/src/mame/drivers/paradise.cpp @@ -549,51 +549,51 @@ INPUT_PORTS_END static INPUT_PORTS_START( madball ) PORT_START("DSW1") /* port $2020 */ - PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) + PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2") PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) ) PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) ) PORT_DIPSETTING( 0x01, DEF_STR( 1C_3C ) ) - PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Lives ) ) + PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:3,4") PORT_DIPSETTING( 0x0c, "3" ) PORT_DIPSETTING( 0x08, "4" ) PORT_DIPSETTING( 0x04, "5" ) PORT_DIPSETTING( 0x00, "6" ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:5") PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, "Control?" ) - PORT_DIPSETTING( 0x20, "Disable / Spinner?" ) + PORT_DIPNAME( 0x20, 0x00, DEF_STR( Controls ) ) PORT_DIPLOCATION("SW1:6") /* Spinner controls currently NOT hooked up */ + PORT_DIPSETTING( 0x20, "Spinner" ) PORT_DIPSETTING( 0x00, DEF_STR( Joystick ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Demo_Sounds ) ) + PORT_DIPNAME( 0x40, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7") PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "Slide Show" ) /* Use P1 button to advance */ + PORT_DIPNAME( 0x80, 0x80, "Slide Show" ) PORT_DIPLOCATION("SW1:8") /* Use P1 button to advance */ PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_START("DSW2") /* port $2021 */ - PORT_DIPNAME( 0x03, 0x02, DEF_STR( Difficulty ) ) + PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2") PORT_DIPSETTING( 0x02, DEF_STR( Easy ) ) PORT_DIPSETTING( 0x03, DEF_STR( Normal ) ) PORT_DIPSETTING( 0x01, DEF_STR( Hard ) ) PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3") PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4") PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5") PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6") PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:7") PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8") PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -1327,7 +1327,6 @@ RAM 4 Hyundai HY62256ALP-70 6 UMC UM6116K-3 DSW 2 8-switch DIP - P.u1 Intel i27C010A - Program (next to Z80A) s.u28 ST M27C4001 - Sound (next to AD-65) @@ -1340,6 +1339,20 @@ s.u28 ST M27C4001 - Sound (next to AD-65) All roms read with manufacturer's IDs and routines +NOTE: A version of Mad Ball has been seen with a YS-1302 daughtercard that plugs in through the Z80 processor: + +YS-1302 Spinner Daughtercard ++--------------------------+ +| [Connector to Main] | +| CN1 R Z8400B | +| CN2 S GAL16V8 74LS669 | +| CD4584 74LS374 74LS669 | +| 74LS669 74LS374 74LS669 | ++--------------------------+ + +CN1 & CN2 are 4 pin headers for spinner controls +RS is a 4.7K 5 pin resistor pack + */ ROM_START( madball ) /* Models in swimsuits only, no nudity */ diff --git a/src/mame/drivers/pasopia7.cpp b/src/mame/drivers/pasopia7.cpp index d66dd5232d7..78f5673da9d 100644 --- a/src/mame/drivers/pasopia7.cpp +++ b/src/mame/drivers/pasopia7.cpp @@ -614,10 +614,10 @@ READ8_MEMBER( pasopia7_state::pasopia7_io_r ) io_port = offset & 0xff; //trim down to 8-bit bus if(io_port >= 0x08 && io_port <= 0x0b) - return m_ppi0->read(space, io_port & 3); + return m_ppi0->read(io_port & 3); else if(io_port >= 0x0c && io_port <= 0x0f) - return m_ppi1->read(space, io_port & 3); + return m_ppi1->read(io_port & 3); // else if(io_port == 0x10 || io_port == 0x11) { M6845 read } else if(io_port >= 0x18 && io_port <= 0x1b) @@ -626,7 +626,7 @@ READ8_MEMBER( pasopia7_state::pasopia7_io_r ) if(io_port >= 0x20 && io_port <= 0x23) { pasopia_nmi_trap(); - return m_ppi2->read(space, io_port & 3); + return m_ppi2->read(io_port & 3); } else if(io_port >= 0x28 && io_port <= 0x2b) @@ -663,10 +663,10 @@ WRITE8_MEMBER( pasopia7_state::pasopia7_io_w ) io_port = offset & 0xff; //trim down to 8-bit bus if(io_port >= 0x08 && io_port <= 0x0b) - m_ppi0->write(space, io_port & 3, data); + m_ppi0->write(io_port & 3, data); else if(io_port >= 0x0c && io_port <= 0x0f) - m_ppi1->write(space, io_port & 3, data); + m_ppi1->write(io_port & 3, data); else if(io_port >= 0x10 && io_port <= 0x11) pasopia7_6845_w(space, io_port-0x10, data); @@ -676,7 +676,7 @@ WRITE8_MEMBER( pasopia7_state::pasopia7_io_w ) else if(io_port >= 0x20 && io_port <= 0x23) { - m_ppi2->write(space, io_port & 3, data); + m_ppi2->write(io_port & 3, data); pasopia_nmi_trap(); } else @@ -966,7 +966,7 @@ MACHINE_CONFIG_START(pasopia7_state::p7_base) m_ppi2->in_pc_callback().set(FUNC(pasopia7_state::nmi_reg_r)); m_ppi2->out_pc_callback().set(FUNC(pasopia7_state::nmi_reg_w)); - MCFG_UPD765A_ADD("fdc", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("fdc:0", pasopia7_floppies, "525hd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:1", pasopia7_floppies, "525hd", floppy_image_device::default_floppy_formats) MACHINE_CONFIG_END diff --git a/src/mame/drivers/pbaction.cpp b/src/mame/drivers/pbaction.cpp index 1edca6bc038..889b803c16a 100644 --- a/src/mame/drivers/pbaction.cpp +++ b/src/mame/drivers/pbaction.cpp @@ -323,15 +323,15 @@ static const z80_daisy_config daisy_chain[] = MACHINE_CONFIG_START(pbaction_state::pbaction) /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", Z80, 4000000) /* 4 MHz? */ + MCFG_DEVICE_ADD("maincpu", Z80, 4_MHz_XTAL) MCFG_DEVICE_PROGRAM_MAP(pbaction_map) - Z80(config, m_audiocpu, 3072000); + Z80(config, m_audiocpu, 12_MHz_XTAL/4); m_audiocpu->set_addrmap(AS_PROGRAM, &pbaction_state::pbaction_sound_map); m_audiocpu->set_addrmap(AS_IO, &pbaction_state::pbaction_sound_io_map); m_audiocpu->set_daisy_config(daisy_chain); - Z80CTC(config, m_ctc, 3072000); + Z80CTC(config, m_ctc, 12_MHz_XTAL/4); m_ctc->intr_callback().set_inputline(m_audiocpu, 0); /* video hardware */ @@ -353,13 +353,13 @@ MACHINE_CONFIG_START(pbaction_state::pbaction) MCFG_GENERIC_LATCH_8_ADD("soundlatch") - MCFG_DEVICE_ADD("ay1", AY8910, 1500000) + MCFG_DEVICE_ADD("ay1", AY8910, 12_MHz_XTAL/8) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) - MCFG_DEVICE_ADD("ay2", AY8910, 1500000) + MCFG_DEVICE_ADD("ay2", AY8910, 12_MHz_XTAL/8) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) - MCFG_DEVICE_ADD("ay3", AY8910, 1500000) + MCFG_DEVICE_ADD("ay3", AY8910, 12_MHz_XTAL/8) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) MACHINE_CONFIG_END @@ -372,7 +372,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(pbaction_state::pbactionx) pbaction2(config); - MCFG_DEVICE_REPLACE("maincpu", SEGA_CPU_PBACTIO4, 4000000) /* 4 MHz? */ + MCFG_DEVICE_REPLACE("maincpu", SEGA_315_5128, 4_MHz_XTAL) MCFG_DEVICE_PROGRAM_MAP(pbaction_map) MCFG_DEVICE_OPCODES_MAP(decrypted_opcodes_map) MCFG_SEGACRPT_SET_DECRYPTED_TAG(":decrypted_opcodes") @@ -548,8 +548,7 @@ void pbaction_state::init_pbactio3() } - - +// some of these are probably bootlegs GAME( 1985, pbaction, 0, pbaction, pbaction, pbaction_state, empty_init, ROT90, "Tehkan", "Pinball Action (set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, pbaction2, pbaction, pbaction2, pbaction, pbaction_state, empty_init, ROT90, "Tehkan", "Pinball Action (set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, pbaction3, pbaction, pbactionx, pbaction, pbaction_state, init_pbactio3, ROT90, "Tehkan", "Pinball Action (set 3, encrypted)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/pc.cpp b/src/mame/drivers/pc.cpp index bc1db9a5efc..9f82b9e2cb9 100644 --- a/src/mame/drivers/pc.cpp +++ b/src/mame/drivers/pc.cpp @@ -454,8 +454,7 @@ void pc_state::epc_io(address_map &map) { map.unmap_value_high(); map(0x0000, 0x00ff).m("mb", FUNC(ibm5160_mb_device::map)); - map(0x0070, 0x0070).rw("i8251", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x0071, 0x0071).rw("i8251", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x0070, 0x0071).rw("i8251", FUNC(i8251_device::read), FUNC(i8251_device::write)); } INPUT_CHANGED_MEMBER(pc_state::pc_turbo_callback) diff --git a/src/mame/drivers/pc100.cpp b/src/mame/drivers/pc100.cpp index b92eaee0d04..24cf154d520 100644 --- a/src/mame/drivers/pc100.cpp +++ b/src/mame/drivers/pc100.cpp @@ -347,8 +347,7 @@ void pc100_state::pc100_io(address_map &map) map(0x20, 0x23).r(FUNC(pc100_state::pc100_key_r)).umask16(0x00ff); //i/o, keyboard, mouse map(0x22, 0x22).w(FUNC(pc100_state::pc100_output_w)); //i/o, keyboard, mouse map(0x24, 0x24).w(FUNC(pc100_state::pc100_tc_w)); //i/o, keyboard, mouse - map(0x28, 0x28).rw("uart8251", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x2a, 0x2a).rw("uart8251", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x28, 0x2b).rw("uart8251", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0x30, 0x30).rw(FUNC(pc100_state::pc100_shift_r), FUNC(pc100_state::pc100_shift_w)); // crtc shift map(0x38, 0x38).w(FUNC(pc100_state::pc100_crtc_addr_w)); //crtc address reg map(0x3a, 0x3a).w(FUNC(pc100_state::pc100_crtc_data_w)); //crtc data reg @@ -668,9 +667,9 @@ MACHINE_CONFIG_START(pc100_state::pc100) //i8251.rts_handler().set("rs232", FUNC(rs232_port_device::write_rts)); i8251.rxrdy_handler().set("pic8259", FUNC(pic8259_device::ir1_w)); - MCFG_UPD765A_ADD("upd765", true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pc100_state, irqnmi_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, pc100_state, drqnmi_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(FUNC(pc100_state::irqnmi_w)); + m_fdc->drq_wr_callback().set(FUNC(pc100_state::drqnmi_w)); MCFG_DEVICE_ADD("rtc", MSM58321, XTAL(32'768)) MCFG_MSM58321_D0_HANDLER(WRITELINE(*this, pc100_state, rtc_portc_0_w)) diff --git a/src/mame/drivers/pc1500.cpp b/src/mame/drivers/pc1500.cpp index 52ba566fe6d..cd00ea495f4 100644 --- a/src/mame/drivers/pc1500.cpp +++ b/src/mame/drivers/pc1500.cpp @@ -295,7 +295,7 @@ MACHINE_CONFIG_START(pc1500_state::pc1500) ioports.portc_w().set(FUNC(pc1500_state::port_c_w)); ioports.out_int().set_inputline("maincpu", LH5801_LINE_MI); - MCFG_UPD1990A_ADD("upd1990a", XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); MACHINE_CONFIG_END diff --git a/src/mame/drivers/pc1512.cpp b/src/mame/drivers/pc1512.cpp index 9d7286daa8d..1a7140bb8ce 100644 --- a/src/mame/drivers/pc1512.cpp +++ b/src/mame/drivers/pc1512.cpp @@ -559,8 +559,8 @@ READ8_MEMBER( pc1640_state::io_r ) bool decoded = false; if ( addr <= 0x00f) { data = m_dmac->read(space, offset & 0x0f); decoded = true; } - else if (addr >= 0x020 && addr <= 0x021) { data = m_pic->read(space, offset & 0x01); decoded = true; } - else if (addr >= 0x040 && addr <= 0x043) { data = m_pit->read(space, offset & 0x03); decoded = true; } + else if (addr >= 0x020 && addr <= 0x021) { data = m_pic->read(offset & 0x01); decoded = true; } + else if (addr >= 0x040 && addr <= 0x043) { data = m_pit->read(offset & 0x03); decoded = true; } else if (addr >= 0x060 && addr <= 0x06f) { data = system_r(space, offset & 0x0f); decoded = true; } else if (addr >= 0x070 && addr <= 0x073) { data = m_rtc->read(space, offset & 0x01); decoded = true; } else if (addr >= 0x078 && addr <= 0x07f) { data = mouse_r(space, offset & 0x07); decoded = true; } @@ -1230,12 +1230,12 @@ MACHINE_CONFIG_START(pc1512_state::pc1512) MCFG_CENTRONICS_FAULT_HANDLER(WRITELINE(*this, pc1512_state, write_centronics_fault)) MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", CENTRONICS_TAG) - MCFG_DEVICE_ADD(RS232_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(m_uart, ins8250_uart_device, rx_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(m_uart, ins8250_uart_device, dcd_w)) - MCFG_RS232_DSR_HANDLER(WRITELINE(m_uart, ins8250_uart_device, dsr_w)) - MCFG_RS232_RI_HANDLER(WRITELINE(m_uart, ins8250_uart_device, ri_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(m_uart, ins8250_uart_device, cts_w)) + rs232_port_device &rs232(RS232_PORT(config, RS232_TAG, default_rs232_devices, nullptr)); + rs232.rxd_handler().set(m_uart, FUNC(ins8250_uart_device::rx_w)); + rs232.dcd_handler().set(m_uart, FUNC(ins8250_uart_device::dcd_w)); + rs232.dsr_handler().set(m_uart, FUNC(ins8250_uart_device::dsr_w)); + rs232.ri_handler().set(m_uart, FUNC(ins8250_uart_device::ri_w)); + rs232.cts_handler().set(m_uart, FUNC(ins8250_uart_device::cts_w)); // ISA8 bus MCFG_DEVICE_ADD(ISA_BUS_TAG, ISA8, 0) @@ -1361,12 +1361,12 @@ MACHINE_CONFIG_START(pc1640_state::pc1640) MCFG_CENTRONICS_FAULT_HANDLER(WRITELINE(*this, pc1512_base_state, write_centronics_fault)) MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", CENTRONICS_TAG) - MCFG_DEVICE_ADD(RS232_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(INS8250_TAG, ins8250_uart_device, rx_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(INS8250_TAG, ins8250_uart_device, dcd_w)) - MCFG_RS232_DSR_HANDLER(WRITELINE(INS8250_TAG, ins8250_uart_device, dsr_w)) - MCFG_RS232_RI_HANDLER(WRITELINE(INS8250_TAG, ins8250_uart_device, ri_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(INS8250_TAG, ins8250_uart_device, cts_w)) + rs232_port_device &rs232(RS232_PORT(config, RS232_TAG, default_rs232_devices, nullptr)); + rs232.rxd_handler().set(m_uart, FUNC(ins8250_uart_device::rx_w)); + rs232.dcd_handler().set(m_uart, FUNC(ins8250_uart_device::dcd_w)); + rs232.dsr_handler().set(m_uart, FUNC(ins8250_uart_device::dsr_w)); + rs232.ri_handler().set(m_uart, FUNC(ins8250_uart_device::ri_w)); + rs232.cts_handler().set(m_uart, FUNC(ins8250_uart_device::cts_w)); // ISA8 bus MCFG_DEVICE_ADD(ISA_BUS_TAG, ISA8, 0) diff --git a/src/mame/drivers/pc6001.cpp b/src/mame/drivers/pc6001.cpp index 3396f9e1736..83ace5d1679 100644 --- a/src/mame/drivers/pc6001.cpp +++ b/src/mame/drivers/pc6001.cpp @@ -208,7 +208,7 @@ READ8_MEMBER(pc6001_state::nec_ppi8255_r) return res; } - return m_ppi->read(space, offset); + return m_ppi->read(offset); } WRITE8_MEMBER(pc6001_state::nec_ppi8255_w) @@ -224,7 +224,7 @@ WRITE8_MEMBER(pc6001_state::nec_ppi8255_w) m_bank1->set_base(m_region_gfx1->base()); } - m_ppi->write(space,offset,data); + m_ppi->write(offset,data); } void pc6001_state::pc6001_map(address_map &map) @@ -240,8 +240,7 @@ void pc6001_state::pc6001_io(address_map &map) { map.unmap_value_high(); map.global_mask(0xff); - map(0x80, 0x80).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x81, 0x81).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x80, 0x81).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x90, 0x93).mirror(0x0c).rw(FUNC(pc6001_state::nec_ppi8255_r), FUNC(pc6001_state::nec_ppi8255_w)); map(0xa0, 0xa0).mirror(0x0c).w("ay8910", FUNC(ay8910_device::address_w)); map(0xa1, 0xa1).mirror(0x0c).w("ay8910", FUNC(ay8910_device::data_w)); @@ -567,7 +566,7 @@ WRITE8_MEMBER(pc6001mk2_state::necmk2_ppi8255_w) } } - m_ppi->write(space,offset,data); + m_ppi->write(offset,data); } void pc6001mk2_state::vram_bank_change(uint8_t vram_bank) @@ -696,8 +695,7 @@ void pc6001mk2_state::pc6001mk2_io(address_map &map) { map.unmap_value_high(); map.global_mask(0xff); - map(0x80, 0x80).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x81, 0x81).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x80, 0x81).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x90, 0x93).mirror(0x0c).rw(FUNC(pc6001mk2_state::nec_ppi8255_r), FUNC(pc6001mk2_state::necmk2_ppi8255_w)); @@ -904,7 +902,7 @@ WRITE8_MEMBER(pc6001sr_state::necsr_ppi8255_w) } } - m_ppi->write(space,offset,data); + m_ppi->write(offset,data); } READ8_MEMBER(pc6001sr_state::hw_rev_r) @@ -933,8 +931,7 @@ void pc6001sr_state::pc6001sr_io(address_map &map) // 0x40-0x43 palette indexes map(0x60, 0x67).rw(FUNC(pc6001sr_state::sr_bank_rn_r), FUNC(pc6001sr_state::sr_bank_rn_w)); map(0x68, 0x6f).rw(FUNC(pc6001sr_state::sr_bank_wn_r), FUNC(pc6001sr_state::sr_bank_wn_w)); - map(0x80, 0x80).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x81, 0x81).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x80, 0x81).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x90, 0x93).mirror(0x0c).rw(FUNC(pc6001sr_state::nec_ppi8255_r), FUNC(pc6001sr_state::necsr_ppi8255_w)); diff --git a/src/mame/drivers/pc8001.cpp b/src/mame/drivers/pc8001.cpp index 4b15d2a3f6e..acbdbed71b0 100644 --- a/src/mame/drivers/pc8001.cpp +++ b/src/mame/drivers/pc8001.cpp @@ -188,8 +188,7 @@ void pc8001_state::pc8001_io(address_map &map) map(0x08, 0x08).portr("Y8"); map(0x09, 0x09).portr("Y9"); map(0x10, 0x10).mirror(0x0f).w(FUNC(pc8001_state::port10_w)); - map(0x20, 0x20).mirror(0x0e).rw(I8251_TAG, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x21, 0x21).mirror(0x0e).rw(I8251_TAG, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x20, 0x21).mirror(0x0e).rw(I8251_TAG, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x30, 0x30).mirror(0x0f).w(FUNC(pc8001_state::port30_w)); map(0x40, 0x40).mirror(0x0f).rw(FUNC(pc8001_state::port40_r), FUNC(pc8001_state::port40_w)); map(0x50, 0x51).rw(m_crtc, FUNC(upd3301_device::read), FUNC(upd3301_device::write)); @@ -508,7 +507,7 @@ MACHINE_CONFIG_START(pc8001_state::pc8001) m_dma->in_memr_cb().set(FUNC(pc8001_state::dma_mem_r)); m_dma->out_iow_cb<2>().set(UPD3301_TAG, FUNC(upd3301_device::dack_w)); - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, XTAL(14'318'181)) MCFG_UPD3301_CHARACTER_WIDTH(8) @@ -556,7 +555,7 @@ MACHINE_CONFIG_START(pc8001mk2_state::pc8001mk2) m_dma->in_memr_cb().set(FUNC(pc8001_state::dma_mem_r)); m_dma->out_iow_cb<2>().set(UPD3301_TAG, FUNC(upd3301_device::dack_w)); - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, XTAL(14'318'181)) MCFG_UPD3301_CHARACTER_WIDTH(8) diff --git a/src/mame/drivers/pc8401a.cpp b/src/mame/drivers/pc8401a.cpp index c70d2d835dc..e6492f1cb5d 100644 --- a/src/mame/drivers/pc8401a.cpp +++ b/src/mame/drivers/pc8401a.cpp @@ -361,8 +361,7 @@ void pc8401a_state::pc8500_io(address_map &map) map(0x08, 0x08).portr("Y.8"); map(0x09, 0x09).portr("Y.9"); map(0x10, 0x10).w(FUNC(pc8401a_state::rtc_cmd_w)); - map(0x20, 0x20).rw(I8251_TAG, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x21, 0x21).rw(I8251_TAG, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x20, 0x21).rw(I8251_TAG, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x30, 0x30).rw(FUNC(pc8401a_state::mmr_r), FUNC(pc8401a_state::mmr_w)); // AM_RANGE(0x31, 0x31) map(0x40, 0x40).rw(FUNC(pc8401a_state::rtc_r), FUNC(pc8401a_state::rtc_ctrl_w)); @@ -581,7 +580,7 @@ MACHINE_CONFIG_START(pc8401a_state::pc8401a) MCFG_TIMER_DRIVER_ADD_PERIODIC("keyboard", pc8401a_state, pc8401a_keyboard_tick, attotime::from_hz(64)) /* devices */ - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); i8255_device &ppi(I8255A(config, I8255A_TAG)); ppi.in_pc_callback().set(FUNC(pc8401a_state::ppi_pc_r)); @@ -621,7 +620,7 @@ MACHINE_CONFIG_START(pc8500_state::pc8500) MCFG_TIMER_DRIVER_ADD_PERIODIC("keyboard", pc8401a_state, pc8401a_keyboard_tick, attotime::from_hz(64)) /* devices */ - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); i8255_device &ppi(I8255A(config, I8255A_TAG)); ppi.in_pc_callback().set(FUNC(pc8401a_state::ppi_pc_r)); diff --git a/src/mame/drivers/pc8801.cpp b/src/mame/drivers/pc8801.cpp index b75c37bce6a..f404fc5bbff 100644 --- a/src/mame/drivers/pc8801.cpp +++ b/src/mame/drivers/pc8801.cpp @@ -1553,8 +1553,7 @@ void pc8801_state::pc8801_io(address_map &map) map(0x0f, 0x0f).portr("KEY15"); map(0x00, 0x02).w(FUNC(pc8801_state::pc8801_pcg8100_w)); map(0x10, 0x10).w(FUNC(pc8801_state::pc8801_rtc_w)); - map(0x20, 0x20).mirror(0x0e).rw(I8251_TAG, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); /* RS-232C and CMT */ - map(0x21, 0x21).mirror(0x0e).rw(I8251_TAG, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x20, 0x21).mirror(0x0e).rw(I8251_TAG, FUNC(i8251_device::read), FUNC(i8251_device::write)); /* RS-232C and CMT */ map(0x30, 0x30).portr("DSW1").w(FUNC(pc8801_state::pc8801_txt_cmt_ctrl_w)); map(0x31, 0x31).portr("DSW2").w(FUNC(pc8801_state::pc8801_gfx_ctrl_w)); map(0x32, 0x32).rw(FUNC(pc8801_state::pc8801_misc_ctrl_r), FUNC(pc8801_state::pc8801_misc_ctrl_w)); @@ -1686,7 +1685,7 @@ void pc8801_state::pc8801fdc_io(address_map &map) map(0xf4, 0xf4).w(FUNC(pc8801_state::fdc_drive_mode_w)); // Drive mode, 2d, 2dd, 2hd map(0xf7, 0xf7).nopw(); // printer port output map(0xf8, 0xf8).rw(FUNC(pc8801_state::upd765_tc_r), FUNC(pc8801_state::upd765_mc_w)); // (R) Terminal Count Port (W) Motor Control Port - map(0xfa, 0xfb).m("upd765", FUNC(upd765a_device::map)); + map(0xfa, 0xfb).m(m_fdc, FUNC(upd765a_device::map)); map(0xfc, 0xff).rw("d8255_slave", FUNC(i8255_device::read), FUNC(i8255_device::write)); } @@ -2352,7 +2351,7 @@ MACHINE_CONFIG_START(pc8801_state::pc8801) MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(pc8801_state,pc8801_irq_callback) /* sub CPU(5 inch floppy drive) */ - MCFG_DEVICE_ADD("fdccpu", Z80, MASTER_CLOCK) /* 4 MHz */ + MCFG_DEVICE_ADD(m_fdccpu, Z80, MASTER_CLOCK) /* 4 MHz */ MCFG_DEVICE_PROGRAM_MAP(pc8801fdc_mem) MCFG_DEVICE_IO_MAP(pc8801fdc_io) @@ -2371,13 +2370,13 @@ MACHINE_CONFIG_START(pc8801_state::pc8801) d8255_slave.in_pc_callback().set(FUNC(pc8801_state::fdc_8255_c_r)); d8255_slave.out_pc_callback().set(FUNC(pc8801_state::fdc_8255_c_w)); - MCFG_UPD765A_ADD("upd765", true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE("fdccpu", INPUT_LINE_IRQ0)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_fdccpu, INPUT_LINE_IRQ0); #if USE_PROPER_I8214 I8214(config, I8214_TAG, MASTER_CLOCK); #endif - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); //MCFG_CENTRONICS_ADD("centronics", centronics_devices, "printer") MCFG_CASSETTE_ADD("cassette") MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_MOTOR_ENABLED | CASSETTE_SPEAKER_MUTED) diff --git a/src/mame/drivers/pc88va.cpp b/src/mame/drivers/pc88va.cpp index 00cd0c6c959..6753c89381d 100644 --- a/src/mame/drivers/pc88va.cpp +++ b/src/mame/drivers/pc88va.cpp @@ -1648,9 +1648,9 @@ MACHINE_CONFIG_START(pc88va_state::pc88va) m_dmac->in_memr_callback().set(FUNC(pc88va_state::dma_memr_cb)); m_dmac->out_memw_callback().set(FUNC(pc88va_state::dma_memw_cb)); - MCFG_UPD765A_ADD("upd765", false, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pc88va_state, fdc_irq)) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pc88va_state, fdc_drq)) + UPD765A(config, m_fdc, false, true); + m_fdc->intrq_wr_callback().set(FUNC(pc88va_state::fdc_irq)); + m_fdc->drq_wr_callback().set(FUNC(pc88va_state::fdc_drq)); FLOPPY_CONNECTOR(config, m_fdd[0], pc88va_floppies, "525hd", pc88va_state::floppy_formats); FLOPPY_CONNECTOR(config, m_fdd[1], pc88va_floppies, "525hd", pc88va_state::floppy_formats); MCFG_SOFTWARE_LIST_ADD("disk_list","pc88va") diff --git a/src/mame/drivers/pc9801.cpp b/src/mame/drivers/pc9801.cpp index f57ddeeb266..640a0338eed 100644 --- a/src/mame/drivers/pc9801.cpp +++ b/src/mame/drivers/pc9801.cpp @@ -675,8 +675,7 @@ void pc9801_state::pc9801_common_io(address_map &map) map(0x0090, 0x0090).r(m_fdc_2hd, FUNC(upd765a_device::msr_r)); map(0x0092, 0x0092).rw(m_fdc_2hd, FUNC(upd765a_device::fifo_r), FUNC(upd765a_device::fifo_w)); map(0x0094, 0x0094).rw(FUNC(pc9801_state::fdc_2hd_ctrl_r), FUNC(pc9801_state::fdc_2hd_ctrl_w)); - map(0x0091, 0x0091).rw(m_sio, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x0093, 0x0093).rw(m_sio, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x0090, 0x0093).rw(m_sio, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0xff00); map(0x7fd8, 0x7fdf).rw("ppi8255_mouse", FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0xff00); } @@ -785,8 +784,8 @@ WRITE8_MEMBER(pc9801_state::a20_ctrl_w) uint8_t por; /* reset POR bit */ // TODO: is there any other way that doesn't involve direct r/w of ppi address? - por = m_ppi_sys->read(space, 2) & ~0x20; - m_ppi_sys->write(space, 2, por); + por = m_ppi_sys->read(2) & ~0x20; + m_ppi_sys->write(2, por); m_maincpu->set_input_line(INPUT_LINE_A20, CLEAR_LINE); m_maincpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero); m_gate_a20 = 0; @@ -1027,12 +1026,12 @@ READ8_MEMBER( pc9801_state::midi_r ) READ8_MEMBER(pc9801_state::pic_r) { - return ((offset >= 4) ? m_pic2 : m_pic1)->read(space, offset & 3); + return ((offset >= 4) ? m_pic2 : m_pic1)->read(offset & 3); } WRITE8_MEMBER(pc9801_state::pic_w) { - ((offset >= 4) ? m_pic2 : m_pic1)->write(space, offset & 3, data); + ((offset >= 4) ? m_pic2 : m_pic1)->write(offset & 3, data); } READ16_MEMBER(pc9801_state::grcg_gvram_r) @@ -2408,7 +2407,7 @@ MACHINE_CONFIG_START(pc9801_state::pc9801) FLOPPY_CONNECTOR(config, "upd765_2dd:1", pc9801_floppies, "525dd", pc9801_state::floppy_formats); pc9801_sasi(config); - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); m_dmac->in_ior_callback<3>().set(m_fdc_2dd, FUNC(upd765a_device::mdma_r)); m_dmac->out_iow_callback<3>().set(m_fdc_2dd, FUNC(upd765a_device::mdma_w)); @@ -2435,7 +2434,7 @@ MACHINE_CONFIG_START(pc9801_state::pc9801rs) MCFG_DEVICE_CLOCK(MAIN_CLOCK_X1*8); // unknown clock pc9801_ide(config); - MCFG_UPD4990A_ADD("upd1990a", XTAL(32'768), NOOP, NOOP) + UPD4990A(config, m_rtc); RAM(config, m_ram).set_default_size("1664K").set_extra_options("640K,3712K,7808K,14M"); diff --git a/src/mame/drivers/pcat_dyn.cpp b/src/mame/drivers/pcat_dyn.cpp index 6aa0d303c17..72ff59519f0 100644 --- a/src/mame/drivers/pcat_dyn.cpp +++ b/src/mame/drivers/pcat_dyn.cpp @@ -33,8 +33,8 @@ If the output isn't satisfactory, it prints "I/O BOARD FAILURE". #include "bus/isa/isa.h" #include "bus/isa/sblaster.h" #include "bus/isa/trident.h" +#include "bus/rs232/hlemouse.h" #include "bus/rs232/rs232.h" -#include "bus/rs232/ser_mouse.h" #include "screen.h" @@ -145,7 +145,7 @@ INPUT_PORTS_END static void pcat_dyn_com(device_slot_interface &device) { - device.option_add("msmouse", MSYSTEM_SERIAL_MOUSE); + device.option_add("msmouse", MSYSTEMS_HLE_SERIAL_MOUSE); } static void pcat_dyn_isa8_cards(device_slot_interface &device) diff --git a/src/mame/drivers/pcipc.cpp b/src/mame/drivers/pcipc.cpp index 32e17547c61..08669a9b8dd 100644 --- a/src/mame/drivers/pcipc.cpp +++ b/src/mame/drivers/pcipc.cpp @@ -26,10 +26,11 @@ #include "machine/i82371sb.h" #include "video/mga2064w.h" #include "bus/isa/isa_cards.h" +#include "bus/rs232/hlemouse.h" +#include "bus/rs232/null_modem.h" #include "bus/rs232/rs232.h" -#include "bus/rs232/ser_mouse.h" +#include "bus/rs232/sun_kbd.h" #include "bus/rs232/terminal.h" -#include "bus/rs232/null_modem.h" #include "machine/fdc37c93x.h" class pcipc_state : public driver_device @@ -50,6 +51,8 @@ public: pcipc_state(const machine_config &mconfig, device_type type, const char *tag); private: + void pcipc_map(address_map &map); + void pcipc_map_io(address_map &map); DECLARE_WRITE8_MEMBER(boot_state_phoenix_w); DECLARE_WRITE8_MEMBER(boot_state_phoenix_ver40_rev6_w); DECLARE_WRITE8_MEMBER(boot_state_award_w); @@ -479,10 +482,14 @@ static void isa_internal_devices(device_slot_interface &device) static void isa_com(device_slot_interface &device) { - device.option_add("microsoft_mouse", MSFT_SERIAL_MOUSE); - device.option_add("msystems_mouse", MSYSTEM_SERIAL_MOUSE); + device.option_add("microsoft_mouse", MSFT_HLE_SERIAL_MOUSE); + device.option_add("logitech_mouse", LOGITECH_HLE_SERIAL_MOUSE); + device.option_add("wheel_mouse", WHEEL_HLE_SERIAL_MOUSE); + device.option_add("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE); + device.option_add("rotatable_mouse", ROTATABLE_HLE_SERIAL_MOUSE); device.option_add("terminal", SERIAL_TERMINAL); device.option_add("null_modem", NULL_MODEM); + device.option_add("sun_kbd", SUN_KBD_ADAPTOR); } void pcipc_state::superio_config(device_t *device) @@ -501,8 +508,20 @@ void pcipc_state::superio_config(device_t *device) fdc.nrts2().set(":serport1", FUNC(rs232_port_device::write_rts)); } +void pcipc_state::pcipc_map(address_map &map) +{ + map.unmap_value_high(); +} + +void pcipc_state::pcipc_map_io(address_map &map) +{ + map.unmap_value_high(); +} + MACHINE_CONFIG_START(pcipc_state::pcipc) MCFG_DEVICE_ADD("maincpu", PENTIUM, 90000000) + MCFG_DEVICE_PROGRAM_MAP(pcipc_map) + MCFG_DEVICE_IO_MAP(pcipc_map_io) MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE("pci:07.0:pic8259_master", pic8259_device, inta_cb) MCFG_I386_SMIACT(WRITELINE("pci:00.0", i82439hx_host_device, smi_act_w)) @@ -525,7 +544,7 @@ MACHINE_CONFIG_START(pcipc_state::pcipc) MCFG_DEVICE_ADD("isa3", ISA16_SLOT, 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false) MCFG_DEVICE_ADD("isa4", ISA16_SLOT, 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false) MCFG_DEVICE_ADD("isa5", ISA16_SLOT, 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false) - MCFG_DEVICE_ADD("serport0", RS232_PORT, isa_com, "microsoft_mouse") + MCFG_DEVICE_ADD("serport0", RS232_PORT, isa_com, "logitech_mouse") MCFG_RS232_RXD_HANDLER(WRITELINE("board4:fdc37c93x", fdc37c93x_device, rxd1_w)) MCFG_RS232_DCD_HANDLER(WRITELINE("board4:fdc37c93x", fdc37c93x_device, ndcd1_w)) MCFG_RS232_DSR_HANDLER(WRITELINE("board4:fdc37c93x", fdc37c93x_device, ndsr1_w)) diff --git a/src/mame/drivers/pcw.cpp b/src/mame/drivers/pcw.cpp index a718faf0373..d0c55c7a763 100644 --- a/src/mame/drivers/pcw.cpp +++ b/src/mame/drivers/pcw.cpp @@ -1263,8 +1263,8 @@ MACHINE_CONFIG_START(pcw_state::pcw) MCFG_DEVICE_ADD("beeper", BEEP, 3750) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00) - MCFG_UPD765A_ADD("upd765", true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pcw_state, pcw_fdc_interrupt)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set(FUNC(pcw_state::pcw_fdc_interrupt)); MCFG_FLOPPY_DRIVE_ADD("upd765:0", pcw_floppies, "3dsdd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", pcw_floppies, "3dsdd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/pcw16.cpp b/src/mame/drivers/pcw16.cpp index 822c9dfb5e6..a74a4f76048 100644 --- a/src/mame/drivers/pcw16.cpp +++ b/src/mame/drivers/pcw16.cpp @@ -91,8 +91,8 @@ TODO: #include "emu.h" #include "includes/pcw16.h" +#include "bus/rs232/hlemouse.h" #include "bus/rs232/rs232.h" -#include "bus/rs232/ser_mouse.h" #include "screen.h" #include "softlist.h" #include "speaker.h" @@ -1007,7 +1007,7 @@ INPUT_PORTS_END static void pcw16_com(device_slot_interface &device) { - device.option_add("msystems_mouse", MSYSTEM_SERIAL_MOUSE); + device.option_add("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE); } MACHINE_CONFIG_START(pcw16_state::pcw16) @@ -1023,12 +1023,12 @@ MACHINE_CONFIG_START(pcw16_state::pcw16) uart1.out_rts_callback().set("serport1", FUNC(rs232_port_device::write_rts)); uart1.out_int_callback().set(FUNC(pcw16_state::pcw16_com_interrupt_1)); - MCFG_DEVICE_ADD( "serport1", RS232_PORT, pcw16_com, "msystems_mouse" ) - MCFG_RS232_RXD_HANDLER(WRITELINE(uart1, ins8250_uart_device, rx_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(uart1, ins8250_uart_device, dcd_w)) - MCFG_RS232_DSR_HANDLER(WRITELINE(uart1, ins8250_uart_device, dsr_w)) - MCFG_RS232_RI_HANDLER(WRITELINE(uart1, ins8250_uart_device, ri_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(uart1, ins8250_uart_device, cts_w)) + rs232_port_device &serport1(RS232_PORT(config, "serport1", pcw16_com, "msystems_mouse")); + serport1.rxd_handler().set(uart1, FUNC(ins8250_uart_device::rx_w)); + serport1.dcd_handler().set(uart1, FUNC(ins8250_uart_device::dcd_w)); + serport1.dsr_handler().set(uart1, FUNC(ins8250_uart_device::dsr_w)); + serport1.ri_handler().set(uart1, FUNC(ins8250_uart_device::ri_w)); + serport1.cts_handler().set(uart1, FUNC(ins8250_uart_device::cts_w)); NS16550(config, m_uart2, XTAL(1'843'200)); /* TODO: Verify uart model */ m_uart2->out_tx_callback().set("serport2", FUNC(rs232_port_device::write_txd)); @@ -1036,11 +1036,11 @@ MACHINE_CONFIG_START(pcw16_state::pcw16) m_uart2->out_rts_callback().set("serport2", FUNC(rs232_port_device::write_rts)); m_uart2->out_int_callback().set(FUNC(pcw16_state::pcw16_com_interrupt_2)); - MCFG_DEVICE_ADD( "serport2", RS232_PORT, pcw16_com, nullptr ) - MCFG_RS232_RXD_HANDLER(WRITELINE(m_uart2, ins8250_uart_device, rx_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(m_uart2, ins8250_uart_device, dcd_w)) - MCFG_RS232_DSR_HANDLER(WRITELINE(m_uart2, ins8250_uart_device, dsr_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(m_uart2, ins8250_uart_device, cts_w)) + rs232_port_device &serport2(RS232_PORT(config, "serport2", pcw16_com, nullptr)); + serport2.rxd_handler().set(m_uart2, FUNC(ins8250_uart_device::rx_w)); + serport2.dcd_handler().set(m_uart2, FUNC(ins8250_uart_device::dcd_w)); + serport2.dsr_handler().set(m_uart2, FUNC(ins8250_uart_device::dsr_w)); + serport2.cts_handler().set(m_uart2, FUNC(ins8250_uart_device::cts_w)); /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) @@ -1060,11 +1060,11 @@ MACHINE_CONFIG_START(pcw16_state::pcw16) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00) /* printer */ - MCFG_DEVICE_ADD("lpt", PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(INPUTLINE("maincpu", 0)) + pc_lpt_device &lpt(PC_LPT(config, "lpt")); + lpt.irq_handler().set_inputline(m_maincpu, 0); - MCFG_PC_FDC_SUPERIO_ADD("fdc") - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pcw16_state, fdc_interrupt)) + PC_FDC_SUPERIO(config, m_fdc); + m_fdc->intrq_wr_callback().set(FUNC(pcw16_state::fdc_interrupt)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", pcw16_floppies, "35hd", pcw16_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:1", pcw16_floppies, "35hd", pcw16_state::floppy_formats) diff --git a/src/mame/drivers/peoplepc.cpp b/src/mame/drivers/peoplepc.cpp index 9d45727b24e..153c78fdfd4 100644 --- a/src/mame/drivers/peoplepc.cpp +++ b/src/mame/drivers/peoplepc.cpp @@ -212,10 +212,8 @@ void peoplepc_state::peoplepc_io(address_map &map) map(0x0020, 0x0031).rw(m_dmac, FUNC(i8257_device::read), FUNC(i8257_device::write)).umask16(0x00ff); map(0x0040, 0x0047).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0x00ff); map(0x0048, 0x004f).rw("pit8253", FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff); - map(0x0054, 0x0054).rw(m_8251key, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x0056, 0x0056).rw(m_8251key, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x005c, 0x005c).rw(m_8251ser, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x005e, 0x005e).rw(m_8251ser, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x0054, 0x0057).rw(m_8251key, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); + map(0x005c, 0x005f).rw(m_8251ser, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0x0064, 0x0067).m(m_fdc, FUNC(upd765a_device::map)).umask16(0x00ff); map(0x006c, 0x006c).w("h46505", FUNC(mc6845_device::address_w)); map(0x006e, 0x006e).rw("h46505", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); @@ -290,9 +288,9 @@ MACHINE_CONFIG_START(peoplepc_state::olypeopl) m_dmac->in_ior_cb<0>().set("upd765", FUNC(upd765a_device::mdma_r)); m_dmac->out_iow_cb<0>().set("upd765", FUNC(upd765a_device::mdma_w)); - MCFG_UPD765A_ADD("upd765", true, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE("pic8259_0", pic8259_device, ir2_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(m_dmac, i8257_device, dreq0_w)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set("pic8259_0", FUNC(pic8259_device::ir2_w)); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(i8257_device::dreq0_w)); MCFG_FLOPPY_DRIVE_ADD("upd765:0", peoplepc_floppies, "525qd", peoplepc_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", peoplepc_floppies, "525qd", peoplepc_state::floppy_formats) diff --git a/src/mame/drivers/peyper.cpp b/src/mame/drivers/peyper.cpp index 8e0b3cbd7e9..969c993cce9 100644 --- a/src/mame/drivers/peyper.cpp +++ b/src/mame/drivers/peyper.cpp @@ -626,10 +626,10 @@ MACHINE_CONFIG_START(peyper_state::peyper) /* Devices */ i8279_device &kbdc(I8279(config, "i8279", 2500000)); - kbdc.out_sl_callback().set(FUNC(peyper_state::col_w)); // scan SL lines - kbdc.out_disp_callback().set(FUNC(peyper_state::disp_w)); // display A&B - kbdc.in_rl_callback().set(FUNC(peyper_state::sw_r)); // kbd RL lines - kbdc.in_shift_callback().set_constant(1); // Shift key + kbdc.out_sl_callback().set(FUNC(peyper_state::col_w)); // scan SL lines + kbdc.out_disp_callback().set(FUNC(peyper_state::disp_w)); // display A&B + kbdc.in_rl_callback().set(FUNC(peyper_state::sw_r)); // kbd RL lines + kbdc.in_shift_callback().set_constant(1); // Shift key kbdc.in_ctrl_callback().set_constant(1); MACHINE_CONFIG_END diff --git a/src/mame/drivers/pg685.cpp b/src/mame/drivers/pg685.cpp index 60a6f89e2ad..177fadb2ca4 100644 --- a/src/mame/drivers/pg685.cpp +++ b/src/mame/drivers/pg685.cpp @@ -167,14 +167,12 @@ void pg685_state::pg675_mem(address_map &map) map(0xf9f03, 0xf9f03).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); map(0xf9f04, 0xf9f04).rw(FUNC(pg685_state::f9f04_r), FUNC(pg685_state::f9f04_w)); map(0xf9f06, 0xf9f07).rw("mainpic", FUNC(pic8259_device::read), FUNC(pic8259_device::write)); - map(0xf9f08, 0xf9f08).rw("mainuart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf9f09, 0xf9f09).rw("mainuart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xf9f08, 0xf9f09).rw("mainuart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xf9f20, 0xf9f23).rw(m_fdc, FUNC(fd1797_device::read), FUNC(fd1797_device::write)); map(0xf9f24, 0xf9f24).rw(FUNC(pg685_state::f9f24_r), FUNC(pg685_state::f9f24_w)); map(0xf9f28, 0xf9f2b).rw("modppi1", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0xf9f2c, 0xf9f2f).rw("modppi2", FUNC(i8255_device::read), FUNC(i8255_device::write)); - map(0xf9f30, 0xf9f30).rw("moduart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf9f31, 0xf9f31).rw("moduart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xf9f30, 0xf9f31).rw("moduart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xf9f32, 0xf9f32).w(FUNC(pg685_state::f9f32_w)); map(0xf9f33, 0xf9f33).r(FUNC(pg685_state::f9f33_r)); map(0xf9f40, 0xf9f5f).rw("rtc", FUNC(mm58167_device::read), FUNC(mm58167_device::write)); @@ -205,14 +203,12 @@ void pg685_state::pg685oua12_mem(address_map &map) map(0xf9f00, 0xf9f01).rw("kbdc", FUNC(i8279_device::read), FUNC(i8279_device::write)); map(0xf9f04, 0xf9f04).rw(FUNC(pg685_state::f9f04_r), FUNC(pg685_state::f9f04_w)); map(0xf9f06, 0xf9f07).rw("mainpic", FUNC(pic8259_device::read), FUNC(pic8259_device::write)); - map(0xf9f08, 0xf9f08).rw("mainuart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf9f09, 0xf9f09).rw("mainuart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xf9f08, 0xf9f09).rw("mainuart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xf9f20, 0xf9f23).rw(m_fdc, FUNC(fd1797_device::read), FUNC(fd1797_device::write)); map(0xf9f24, 0xf9f24).rw(FUNC(pg685_state::f9f24_r), FUNC(pg685_state::f9f24_w)); map(0xf9f28, 0xf9f2b).rw("modppi1", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0xf9f2c, 0xf9f2f).rw("modppi2", FUNC(i8255_device::read), FUNC(i8255_device::write)); - map(0xf9f30, 0xf9f30).rw("moduart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf9f31, 0xf9f31).rw("moduart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xf9f30, 0xf9f31).rw("moduart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xf9f32, 0xf9f32).w(FUNC(pg685_state::f9f32_w)); map(0xf9f33, 0xf9f33).r(FUNC(pg685_state::f9f33_r)); map(0xf9f34, 0xf9f37).rw("bppit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)); diff --git a/src/mame/drivers/phoenix.cpp b/src/mame/drivers/phoenix.cpp index 1ab376031f0..4cd06659071 100644 --- a/src/mame/drivers/phoenix.cpp +++ b/src/mame/drivers/phoenix.cpp @@ -868,7 +868,31 @@ ROM_START( phoenixc4 ) // verified main and ROMs PCBs and 2 PROMs ROM_RELOAD( 0x0000, 0x0100 ) /* the dump had 2 identical proms with different names */ ROM_END -ROM_START( phoenixha ) // verified 2 PROMs, numer of boards unknown (probably 2) +ROM_START( phoenixgu ) // verified 2 PCBs, 2 PROMs + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "phoenix.45", 0x0000, 0x0800, CRC(5b8c55a8) SHA1(839c1ca9766f730ec3accd48db70f6429a9c3362) ) + ROM_LOAD( "phoenix.46", 0x0800, 0x0800, CRC(dbc942fa) SHA1(9fe224e6ced407289dfa571468259a021d942b7d) ) + ROM_LOAD( "phoenix.47", 0x1000, 0x0800, CRC(cbbb8839) SHA1(b7f449374cac111081559e39646f973e7e99fd64) ) + ROM_LOAD( "48.bin", 0x1800, 0x0800, CRC(75623a06) SHA1(f12cf24287cd8e78218b0fb2862e9d6f84797fbc) ) + ROM_LOAD( "phoenixc.49", 0x2000, 0x0800, CRC(1a1ce0d0) SHA1(c2825eef5d461e16ca2172daff94b3751be2f4dc) ) + ROM_LOAD( "h6-ic50.6a", 0x2800, 0x0800, CRC(ac5e9ec1) SHA1(0402e5241d99759d804291998efd43f37ce99917) ) + ROM_LOAD( "h7-ic51.7a", 0x3000, 0x0800, CRC(2eab35b4) SHA1(849bf8273317cc869bdd67e50c68399ee8ece81d) ) + ROM_LOAD( "phoenixc.52", 0x3800, 0x0800, CRC(8424d7c4) SHA1(1b5fa7d8be9e8750a4148dfefc17e96c86ed084d) ) + + ROM_REGION( 0x1000, "bgtiles", 0 ) + ROM_LOAD( "ic23.3d", 0x0000, 0x0800, CRC(3c7e623f) SHA1(e7ff5fc371664af44785c079e92eeb2d8530187b) ) + ROM_LOAD( "ic24.4d", 0x0800, 0x0800, CRC(59916d3b) SHA1(71aec70a8e096ed1f0c2297b3ae7dca1b8ecc38d) ) + + ROM_REGION( 0x1000, "fgtiles", 0 ) + ROM_LOAD( "phoenixc.39", 0x0000, 0x0800, CRC(bb0525ed) SHA1(86db1c7584fb3846bfd47535e1585eeb7fbbb1fe) ) + ROM_LOAD( "phoenixc.40", 0x0800, 0x0800, CRC(4178aa4f) SHA1(5350f8f62cc7c223c38008bc83140b7a19147d81) ) + + ROM_REGION( 0x0200, "proms", 0 ) + ROM_LOAD( "mmi6301.ic40", 0x0000, 0x0100, CRC(79350b25) SHA1(57411be4c1d89677f7919ae295446da90612c8a8) ) /* palette low bits */ + ROM_LOAD( "mmi6301.ic41", 0x0100, 0x0100, CRC(e176b768) SHA1(e2184dd495ed579f10b6da0b78379e02d7a6229f) ) /* palette high bits */ +ROM_END + +ROM_START( phoenixha ) // verified 2 PROMs, number of boards unknown (probably 2) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "ic45", 0x0000, 0x0800, CRC(5b8c55a8) SHA1(839c1ca9766f730ec3accd48db70f6429a9c3362) ) // sldh ROM_LOAD( "ic46", 0x0800, 0x0800, CRC(dbc942fa) SHA1(9fe224e6ced407289dfa571468259a021d942b7d) ) // sldh @@ -915,6 +939,30 @@ ROM_START( phoenixi ) // verified single PCB, single PROM ROM_LOAD( "sn74s471n.bin", 0x0100, 0x0100, CRC(c68a49bc) SHA1(1a015b89ac0622e73bcebd76cf5132830fe0bfc1) ) ROM_END +ROM_START( fenixn ) // Fenix, bootleg from the Spanish company Niemer + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "2201.bin", 0x0000, 0x0800, CRC(2afa8e2c) SHA1(e9cd02b730912365aae4172da881bddb7c7b16aa) ) + ROM_LOAD( "1202.bin", 0x0800, 0x0800, CRC(6527395e) SHA1(13799da4b5c4118b3fafe7b6145b0ebca89b9f00) ) + ROM_LOAD( "1203.bin", 0x1000, 0x0800, CRC(868e69ba) SHA1(bef3173f1c978a9b9d1597439d272186b466e069) ) + ROM_LOAD( "1204.bin", 0x1800, 0x0800, CRC(85d96d7c) SHA1(19bb1d0a6764b6982d3cb29e2681dee8648d5fda) ) + ROM_LOAD( "1205.bin", 0x2000, 0x0800, CRC(a105e4e7) SHA1(b35142a91b6b7fdf7535202671793393c9f4685f) ) + ROM_LOAD( "1206.bin", 0x2800, 0x0800, CRC(249a6f21) SHA1(1c83d9883120796cf3bf775ab6620c4850f52d3c) ) + ROM_LOAD( "1207.bin", 0x3000, 0x0800, CRC(2eab35b4) SHA1(849bf8273317cc869bdd67e50c68399ee8ece81d) ) + ROM_LOAD( "1208.bin", 0x3800, 0x0800, CRC(b90efc28) SHA1(61956880f64ae50c4796d4cf60a49c44a81aaa31) ) + + ROM_REGION( 0x1000, "bgtiles", 0 ) + ROM_LOAD( "1211.bin", 0x0000, 0x0800, CRC(3c7e623f) SHA1(e7ff5fc371664af44785c079e92eeb2d8530187b) ) + ROM_LOAD( "1212.bin", 0x0800, 0x0800, CRC(59916d3b) SHA1(71aec70a8e096ed1f0c2297b3ae7dca1b8ecc38d) ) + + ROM_REGION( 0x1000, "fgtiles", 0 ) + ROM_LOAD( "1209.bin", 0x0000, 0x0800, CRC(bb0525ed) SHA1(86db1c7584fb3846bfd47535e1585eeb7fbbb1fe) ) + ROM_LOAD( "1210.bin", 0x0800, 0x0800, CRC(0be2ba91) SHA1(af9243ee23377b632b9b7d0b84d341d06bf22480) ) + + ROM_REGION( 0x0200, "proms", 0 ) + ROM_LOAD( "prom1.bin", 0x0000, 0x0100, CRC(79350b25) SHA1(57411be4c1d89677f7919ae295446da90612c8a8) ) /* palette low bits */ + ROM_LOAD( "prom2.bin", 0x0100, 0x0100, CRC(e176b768) SHA1(e2184dd495ed579f10b6da0b78379e02d7a6229f) ) /* palette high bits */ +ROM_END + ROM_START( condor ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "cond01c.bin", 0x0000, 0x0800, CRC(c0f73929) SHA1(3cecf8341a5674165d2cae9b22ea5db26a9597de) ) @@ -1582,7 +1630,9 @@ GAME( 1981, phoenixc, phoenix, phoenix, phoenixt, phoenix_state, empty_init, GAME( 1981, phoenixc2, phoenix, phoenix, phoenixt, phoenix_state, empty_init, ROT90, "bootleg? (Irecsa / G.G.I Corp)", "Phoenix (Irecsa / G.G.I Corp, set 2)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 1981, phoenixc3, phoenix, phoenix, phoenixt, phoenix_state, empty_init, ROT90, "bootleg? (Irecsa / G.G.I Corp)", "Phoenix (Irecsa / G.G.I Corp, set 3)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, phoenixc4, phoenix, phoenix, phoenixt, phoenix_state, empty_init, ROT90, "bootleg? (Irecsa / G.G.I Corp)", "Phoenix (Irecsa / G.G.I Corp, set 4)", MACHINE_SUPPORTS_SAVE ) +GAME( 1981, phoenixgu, phoenix, phoenix, phoenixt, phoenix_state, empty_init, ROT90, "bootleg? (G. Universal Video)", "Phoenix (G. Universal Video bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, phoenixi, phoenix, condor, condor, phoenix_state, init_oneprom_coindsw, ROT90, "bootleg (IDI)", "Phoenix (IDI bootleg)", MACHINE_WRONG_COLORS | MACHINE_SUPPORTS_SAVE ) // Needs correct color PROM decode +GAME( 1980, fenixn, phoenix, phoenix, phoenix, phoenix_state, empty_init, ROT90, "bootleg (Niemer)", "Fenix (Niemer bootleg of Phoenix)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, condor, phoenix, condor, condor, phoenix_state, init_coindsw, ROT90, "bootleg (Sidam)", "Condor (Sidam bootleg of Phoenix)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, condorn, phoenix, condor, condor, phoenix_state, init_oneprom_coindsw, ROT90, "bootleg (S C Novar)", "Condor (S C Novar bootleg of Phoenix)", MACHINE_SUPPORTS_SAVE ) // the following 2 were common bootlegs in England & France respectively @@ -1595,8 +1645,8 @@ GAME( 1980, vautourza, phoenix, condor , phoenixt, phoenix_state, init_oneprom // German bootlegs GAME( 1981, phoenixha, phoenix, phoenix, phoenixt, phoenix_state, empty_init, ROT90, "bootleg (Hellomat Automaten)", "Phoenix (Hellomat Automaten bootleg)", MACHINE_SUPPORTS_SAVE ) -// fenix is an Italian bootleg based on vautourz -GAME( 1980, fenix, phoenix, condor, condor, phoenix_state, init_oneprom_coindsw, ROT90, "bootleg (Orio)", "Fenix (bootleg of Phoenix)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) +// fenix is an Italian bootleg based on vautourz (also an unrelated Spanish bootleg from Niemer) +GAME( 1980, fenix, phoenix, condor, condor, phoenix_state, init_oneprom_coindsw, ROT90, "bootleg (Orio)", "Fenix (Orio bootleg of Phoenix)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) GAME( 1980, griffon, phoenix, condor, condor, phoenix_state, init_oneprom_coindsw, ROT90, "bootleg (Videotron)", "Griffon (Videotron bootleg of Phoenix)", MACHINE_SUPPORTS_SAVE ) GAME( 1980, griffono, phoenix, condor, condor, phoenix_state, init_oneprom_coindsw, ROT90, "bootleg (Olympia)", "Griffon (Olympia bootleg of Phoenix)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // nextfase is a Spanish bootleg diff --git a/src/mame/drivers/pimps.cpp b/src/mame/drivers/pimps.cpp index b93bacbd965..e7d2cbf5918 100644 --- a/src/mame/drivers/pimps.cpp +++ b/src/mame/drivers/pimps.cpp @@ -103,10 +103,8 @@ void pimps_state::mem_map(address_map &map) void pimps_state::io_map(address_map &map) { map.unmap_value_high(); - map(0xf0, 0xf0).rw("uart1", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf1, 0xf1).rw("uart1", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xf2, 0xf2).rw("uart2", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf3, 0xf3).rw("uart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xf0, 0xf1).rw("uart1", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0xf2, 0xf3).rw("uart2", FUNC(i8251_device::read), FUNC(i8251_device::write)); } /* Input ports */ diff --git a/src/mame/drivers/pinball2k.cpp b/src/mame/drivers/pinball2k.cpp index a4b8db29fd8..cfda2c12e4b 100644 --- a/src/mame/drivers/pinball2k.cpp +++ b/src/mame/drivers/pinball2k.cpp @@ -618,7 +618,8 @@ MACHINE_CONFIG_START(pinball2k_state::mediagx) ide_controller_device &ide(IDE_CONTROLLER(config, "ide").options(ata_devices, "hdd", nullptr, true)); ide.irq_handler().set("pic8259_2", FUNC(pic8259_device::ir6_w)); - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + RAMDAC(config, m_ramdac, 0, m_palette); + m_ramdac->set_addrmap(0, &pinball2k_state::ramdac_map); /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) diff --git a/src/mame/drivers/pktgaldx.cpp b/src/mame/drivers/pktgaldx.cpp index 164fdece3ab..e36ccf4977a 100644 --- a/src/mame/drivers/pktgaldx.cpp +++ b/src/mame/drivers/pktgaldx.cpp @@ -41,6 +41,8 @@ Notes: Driver by David Haywood and Bryan McPhail +NOTE: Hold down both Player1 & Player2 Start buttons during boot up to see version & region + */ /* @@ -339,7 +341,7 @@ void pktgaldx_state::machine_start() MACHINE_CONFIG_START(pktgaldx_state::pktgaldx) /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", M68000, 14000000) + MCFG_DEVICE_ADD("maincpu", M68000, 28_MHz_XTAL / 2) // The clock input is 14.000MHz on pin 6 MCFG_DEVICE_PROGRAM_MAP(pktgaldx_map) MCFG_DEVICE_OPCODES_MAP(decrypted_opcodes_map) @@ -388,11 +390,11 @@ MACHINE_CONFIG_START(pktgaldx_state::pktgaldx) SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); - MCFG_DEVICE_ADD("oki1", OKIM6295, 32220000/32, okim6295_device::PIN7_HIGH) + MCFG_DEVICE_ADD("oki1", OKIM6295, 32.22_MHz_XTAL / 32, okim6295_device::PIN7_HIGH) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.75) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.75) - MCFG_DEVICE_ADD("oki2", OKIM6295, 32220000/16, okim6295_device::PIN7_HIGH) + MCFG_DEVICE_ADD("oki2", OKIM6295, 32.22_MHz_XTAL / 16, okim6295_device::PIN7_HIGH) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.60) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.60) MACHINE_CONFIG_END @@ -435,38 +437,56 @@ MACHINE_CONFIG_END ROM_START( pktgaldx ) ROM_REGION( 0x80000, "maincpu", 0 ) /* DE102 code (encrypted) */ - ROM_LOAD16_WORD_SWAP( "ke00-2.12a", 0x00000, 0x80000, CRC(b04baf3a) SHA1(680d1b4ab4b6edef36cd96a60539fb7c2dac9637) ) + ROM_LOAD16_WORD_SWAP( "ke00-2.12a", 0x00000, 0x80000, CRC(b04baf3a) SHA1(680d1b4ab4b6edef36cd96a60539fb7c2dac9637) ) /* Version 3.00 Euro */ ROM_REGION( 0x100000, "gfx1", 0 ) - ROM_LOAD( "maz-02.2h", 0x00000, 0x100000, CRC(c9d35a59) SHA1(07b44c7d7d76b668b4d6ca5672bd1c2910228e68) ) + ROM_LOAD( "maz-02.2h", 0x00000, 0x100000, CRC(c9d35a59) SHA1(07b44c7d7d76b668b4d6ca5672bd1c2910228e68) ) ROM_REGION( 0x100000, "gfx2", 0 ) - ROM_LOAD16_BYTE( "maz-00.1b", 0x000000, 0x080000, CRC(fa3071f4) SHA1(72e7d920e9ca94f8cb166007a9e9e5426a201af8) ) - ROM_LOAD16_BYTE( "maz-01.3b", 0x000001, 0x080000, CRC(4934fe21) SHA1(b852249f59906d69d32160ebaf9b4781193227e4) ) + ROM_LOAD16_BYTE( "maz-00.1b", 0x000000, 0x080000, CRC(fa3071f4) SHA1(72e7d920e9ca94f8cb166007a9e9e5426a201af8) ) + ROM_LOAD16_BYTE( "maz-01.3b", 0x000001, 0x080000, CRC(4934fe21) SHA1(b852249f59906d69d32160ebaf9b4781193227e4) ) ROM_REGION( 0x40000, "oki1", 0 ) /* Oki samples */ - ROM_LOAD( "ke01.14f", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) + ROM_LOAD( "ke01.14f", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) ROM_REGION( 0x100000, "oki2", 0 ) /* Oki samples (banked?) */ - ROM_LOAD( "maz-03.13f", 0x00000, 0x100000, CRC(a313c964) SHA1(4a3664c4e2c44a017a0ab6a6d4361799cbda57b5) ) + ROM_LOAD( "maz-03.13f", 0x00000, 0x100000, CRC(a313c964) SHA1(4a3664c4e2c44a017a0ab6a6d4361799cbda57b5) ) ROM_END ROM_START( pktgaldxj ) ROM_REGION( 0x80000, "maincpu", 0 ) /* DE102 code (encrypted) */ - ROM_LOAD16_WORD_SWAP( "kg00-2.12a", 0x00000, 0x80000, CRC(62dc4137) SHA1(23887dc3f6e7c4cdcb1bf4f4c87fe3cbe8cdbe69) ) + ROM_LOAD16_WORD_SWAP( "kg00-2.12a", 0x00000, 0x80000, CRC(62dc4137) SHA1(23887dc3f6e7c4cdcb1bf4f4c87fe3cbe8cdbe69) ) /* Version 3.00 Japan */ + + ROM_REGION( 0x100000, "gfx1", 0 ) + ROM_LOAD( "maz-02.2h", 0x00000, 0x100000, CRC(c9d35a59) SHA1(07b44c7d7d76b668b4d6ca5672bd1c2910228e68) ) + + ROM_REGION( 0x100000, "gfx2", 0 ) + ROM_LOAD16_BYTE( "maz-00.1b", 0x000000, 0x080000, CRC(fa3071f4) SHA1(72e7d920e9ca94f8cb166007a9e9e5426a201af8) ) + ROM_LOAD16_BYTE( "maz-01.3b", 0x000001, 0x080000, CRC(4934fe21) SHA1(b852249f59906d69d32160ebaf9b4781193227e4) ) + + ROM_REGION( 0x40000, "oki1", 0 ) /* Oki samples */ + ROM_LOAD( "ke01.14f", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) + + ROM_REGION( 0x100000, "oki2", 0 ) /* Oki samples (banked?) */ + ROM_LOAD( "maz-03.13f", 0x00000, 0x100000, CRC(a313c964) SHA1(4a3664c4e2c44a017a0ab6a6d4361799cbda57b5) ) +ROM_END + +ROM_START( pktgaldxa ) + ROM_REGION( 0x80000, "maincpu", 0 ) /* DE102 code (encrypted) */ + ROM_LOAD16_WORD_SWAP( "rom.12a", 0x00000, 0x80000, CRC(c4c7cc68) SHA1(d3841459096a37ffd96fbf9017d3176893034c01) ) /* Version 3.00 Asia - Need to verify label */ ROM_REGION( 0x100000, "gfx1", 0 ) - ROM_LOAD( "maz-02.2h", 0x00000, 0x100000, CRC(c9d35a59) SHA1(07b44c7d7d76b668b4d6ca5672bd1c2910228e68) ) + ROM_LOAD( "maz-02.2h", 0x00000, 0x100000, CRC(c9d35a59) SHA1(07b44c7d7d76b668b4d6ca5672bd1c2910228e68) ) ROM_REGION( 0x100000, "gfx2", 0 ) - ROM_LOAD16_BYTE( "maz-00.1b", 0x000000, 0x080000, CRC(fa3071f4) SHA1(72e7d920e9ca94f8cb166007a9e9e5426a201af8) ) - ROM_LOAD16_BYTE( "maz-01.3b", 0x000001, 0x080000, CRC(4934fe21) SHA1(b852249f59906d69d32160ebaf9b4781193227e4) ) + ROM_LOAD16_BYTE( "maz-00.1b", 0x000000, 0x080000, CRC(fa3071f4) SHA1(72e7d920e9ca94f8cb166007a9e9e5426a201af8) ) + ROM_LOAD16_BYTE( "maz-01.3b", 0x000001, 0x080000, CRC(4934fe21) SHA1(b852249f59906d69d32160ebaf9b4781193227e4) ) ROM_REGION( 0x40000, "oki1", 0 ) /* Oki samples */ - ROM_LOAD( "ke01.14f", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) + ROM_LOAD( "ke01.14f", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) ROM_REGION( 0x100000, "oki2", 0 ) /* Oki samples (banked?) */ - ROM_LOAD( "maz-03.13f", 0x00000, 0x100000, CRC(a313c964) SHA1(4a3664c4e2c44a017a0ab6a6d4361799cbda57b5) ) + ROM_LOAD( "maz-03.13f", 0x00000, 0x100000, CRC(a313c964) SHA1(4a3664c4e2c44a017a0ab6a6d4361799cbda57b5) ) ROM_END ROM_START( pktgaldxb ) @@ -475,19 +495,19 @@ ROM_START( pktgaldxb ) ROM_LOAD16_BYTE( "5.bin", 0x00001, 0x80000, CRC(64cb4c33) SHA1(02f988f558113dd9a77079dee59e23583394fa98) ) ROM_REGION( 0x400000, "gfx1", 0 ) - ROM_LOAD16_BYTE( "11.bin", 0x000000, 0x80000, CRC(a8c8f1fd) SHA1(9fd5fa500967a1bd692abdbeef89ce195c8aecd4) ) - ROM_LOAD16_BYTE( "6.bin", 0x000001, 0x80000, CRC(0e3335a1) SHA1(2d6899336302d222e8404dde159e64911a8f94e6) ) - ROM_LOAD16_BYTE( "10.bin", 0x100000, 0x80000, CRC(9dd743a9) SHA1(dbc3e2bd044dbf21b04c174bd860969ee53b4050) ) - ROM_LOAD16_BYTE( "7.bin", 0x100001, 0x80000, CRC(0ebf12b5) SHA1(17b6c2ce21de3671d75d89a41317efddf5b49339) ) - ROM_LOAD16_BYTE( "9.bin", 0x200001, 0x80000, CRC(078f371c) SHA1(5b510a0f7f50c55cce1ffcc8f2e9c3432b23e352) ) - ROM_LOAD16_BYTE( "8.bin", 0x200000, 0x80000, CRC(40f5a032) SHA1(c2ad585ddbc3ef40c6214cb30b4d78a2cd0a9446) ) + ROM_LOAD16_BYTE( "11.bin", 0x000000, 0x80000, CRC(a8c8f1fd) SHA1(9fd5fa500967a1bd692abdbeef89ce195c8aecd4) ) + ROM_LOAD16_BYTE( "6.bin", 0x000001, 0x80000, CRC(0e3335a1) SHA1(2d6899336302d222e8404dde159e64911a8f94e6) ) + ROM_LOAD16_BYTE( "10.bin", 0x100000, 0x80000, CRC(9dd743a9) SHA1(dbc3e2bd044dbf21b04c174bd860969ee53b4050) ) + ROM_LOAD16_BYTE( "7.bin", 0x100001, 0x80000, CRC(0ebf12b5) SHA1(17b6c2ce21de3671d75d89a41317efddf5b49339) ) + ROM_LOAD16_BYTE( "9.bin", 0x200001, 0x80000, CRC(078f371c) SHA1(5b510a0f7f50c55cce1ffcc8f2e9c3432b23e352) ) + ROM_LOAD16_BYTE( "8.bin", 0x200000, 0x80000, CRC(40f5a032) SHA1(c2ad585ddbc3ef40c6214cb30b4d78a2cd0a9446) ) ROM_REGION( 0x40000, "oki1", 0 ) /* Oki samples */ - ROM_LOAD( "kg01.14f", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) // 1.bin on the bootleg + ROM_LOAD( "1.bin", 0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) ROM_REGION( 0x100000, "oki2", 0 ) /* Oki samples (banked?) */ - ROM_LOAD( "3.bin", 0x00000, 0x80000, CRC(4638747b) SHA1(56d79cd8d4d7b41b71f1e942b5a5bf1bafc5c6e7) ) - ROM_LOAD( "2.bin", 0x80000, 0x80000, CRC(f841d995) SHA1(0ef2f8fd9be62b979862c3688e7aad34c7b0404d) ) + ROM_LOAD( "3.bin", 0x00000, 0x80000, CRC(4638747b) SHA1(56d79cd8d4d7b41b71f1e942b5a5bf1bafc5c6e7) ) + ROM_LOAD( "2.bin", 0x80000, 0x80000, CRC(f841d995) SHA1(0ef2f8fd9be62b979862c3688e7aad34c7b0404d) ) ROM_END @@ -498,6 +518,7 @@ void pktgaldx_state::init_pktgaldx() deco102_decrypt_cpu((uint16_t *)memregion("maincpu")->base(), m_decrypted_opcodes, 0x80000, 0x42ba, 0x00, 0x00); } -GAME( 1992, pktgaldx, 0, pktgaldx, pktgaldx, pktgaldx_state, init_pktgaldx, ROT0, "Data East Corporation", "Pocket Gal Deluxe (Euro v3.00)", MACHINE_SUPPORTS_SAVE ) +GAME( 1992, pktgaldx, 0, pktgaldx, pktgaldx, pktgaldx_state, init_pktgaldx, ROT0, "Data East Corporation", "Pocket Gal Deluxe (Euro v3.00)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, pktgaldxj, pktgaldx, pktgaldx, pktgaldx, pktgaldx_state, init_pktgaldx, ROT0, "Data East Corporation (Nihon System license)", "Pocket Gal Deluxe (Japan v3.00)", MACHINE_SUPPORTS_SAVE ) -GAME( 1992, pktgaldxb, pktgaldx, pktgaldb, pktgaldx, pktgaldx_state, empty_init, ROT0, "bootleg", "Pocket Gal Deluxe (Euro v3.00, bootleg)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1992, pktgaldxa, pktgaldx, pktgaldx, pktgaldx, pktgaldx_state, init_pktgaldx, ROT0, "Data East Corporation", "Pocket Gal Deluxe (Asia v3.00)", MACHINE_SUPPORTS_SAVE ) +GAME( 1992, pktgaldxb, pktgaldx, pktgaldb, pktgaldx, pktgaldx_state, empty_init, ROT0, "bootleg", "Pocket Gal Deluxe (Euro v3.00, bootleg)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/pofo.cpp b/src/mame/drivers/pofo.cpp index 10116af98d6..6d61735c124 100644 --- a/src/mame/drivers/pofo.cpp +++ b/src/mame/drivers/pofo.cpp @@ -939,8 +939,7 @@ PALETTE_INIT_MEMBER(portfolio_state, portfolio) READ8_MEMBER( portfolio_state::hd61830_rd_r ) { - // TODO with real ROM: offs_t address = ((offset & 0xff) << 4) | ((offset >> 12) & 0x0f); - uint16_t address = ((offset & 0xff) << 3) | ((offset >> 12) & 0x07); + offs_t address = ((offset & 0xff) << 4) | ((offset >> 12) & 0x0f); uint8_t data = m_char_rom[address]; return data; @@ -1081,11 +1080,11 @@ MACHINE_CONFIG_END ROM_START( pofo ) ROM_REGION( 0x40000, M80C88A_TAG, 0 ) ROM_SYSTEM_BIOS( 0, "dip1072", "DIP DOS 1.072" ) - ROMX_LOAD( "rom b.u4", 0x00000, 0x20000, BAD_DUMP CRC(c9852766) SHA1(c74430281bc717bd36fd9b5baec1cc0f4489fe82), ROM_BIOS(0) ) // dumped with debug.com - ROMX_LOAD( "rom a.u3", 0x20000, 0x20000, BAD_DUMP CRC(b8fb730d) SHA1(1b9d82b824cab830256d34912a643a7d048cd401), ROM_BIOS(0) ) // dumped with debug.com + ROMX_LOAD( "c101782-007.u4", 0x00000, 0x20000, CRC(c9852766) SHA1(c74430281bc717bd36fd9b5baec1cc0f4489fe82), ROM_BIOS(0) ) + ROMX_LOAD( "c101781-007.u3", 0x20000, 0x20000, CRC(b8fb730d) SHA1(1b9d82b824cab830256d34912a643a7d048cd401), ROM_BIOS(0) ) ROM_REGION( 0x8000, HD61830_TAG, 0 ) - ROM_LOAD( "hd61830 external character generator", 0x000, 0x800, BAD_DUMP CRC(747a1db3) SHA1(a4b29678fdb43791a8ce4c1ec778f3231bb422c5) ) // typed in from manual + ROM_LOAD( "c101783-001a-01.u3", 0x0000, 0x8000, CRC(61fdaff1) SHA1(5eb99e7a19af7b8d77ea8a2f1f554e6e3d382fa2) ) ROM_END diff --git a/src/mame/drivers/poisk1.cpp b/src/mame/drivers/poisk1.cpp index da2b386f184..9b2894fad13 100644 --- a/src/mame/drivers/poisk1.cpp +++ b/src/mame/drivers/poisk1.cpp @@ -553,17 +553,17 @@ READ8_MEMBER(p1_state::p1_ppi_r) switch (offset) { case 0: - return m_ppi8255n1->read(space, 0); + return m_ppi8255n1->read(0); case 9: case 10: case 11: - return m_ppi8255n1->read(space, offset - 8); + return m_ppi8255n1->read(offset - 8); case 8: - return m_ppi8255n2->read(space, 0); + return m_ppi8255n2->read(0); case 1: case 2: case 3: - return m_ppi8255n2->read(space, offset); + return m_ppi8255n2->read(offset); default: DBG_LOG(1, "p1ppi", ("R %.2x (unimp)\n", 0x60 + offset)); return 0xff; @@ -575,17 +575,17 @@ WRITE8_MEMBER(p1_state::p1_ppi_w) switch (offset) { case 0: - return m_ppi8255n1->write(space, 0, data); + return m_ppi8255n1->write(0, data); case 9: case 10: case 11: - return m_ppi8255n1->write(space, offset - 8, data); + return m_ppi8255n1->write(offset - 8, data); case 8: - return m_ppi8255n2->write(space, 0, data); + return m_ppi8255n2->write(0, data); case 1: case 2: case 3: - return m_ppi8255n2->write(space, offset, data); + return m_ppi8255n2->write(offset, data); default: DBG_LOG(1, "p1ppi", ("W %.2x $%02x (unimp)\n", 0x60 + offset, data)); return; diff --git a/src/mame/drivers/poly88.cpp b/src/mame/drivers/poly88.cpp index 218b727a0e9..c6177449de5 100644 --- a/src/mame/drivers/poly88.cpp +++ b/src/mame/drivers/poly88.cpp @@ -65,8 +65,7 @@ void poly88_state::poly88_io(address_map &map) { map.unmap_value_high(); map.global_mask(0xff); - map(0x00, 0x00).rw(m_uart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x01, 0x01).rw(m_uart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x00, 0x01).rw(m_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x04, 0x04).w(FUNC(poly88_state::poly88_baud_rate_w)); map(0x08, 0x08).w(FUNC(poly88_state::poly88_intr_w)); map(0xf8, 0xf8).r(FUNC(poly88_state::poly88_keyboard_r)); diff --git a/src/mame/drivers/pp01.cpp b/src/mame/drivers/pp01.cpp index 1e0a6460d8b..3263cf7f740 100644 --- a/src/mame/drivers/pp01.cpp +++ b/src/mame/drivers/pp01.cpp @@ -40,8 +40,7 @@ void pp01_state::pp01_io(address_map &map) { map(0xc0, 0xc3).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)); // system //AM_RANGE(0xc4, 0xc7) AM_DEVREADWRITE("ppi8255", i8255_device, read, write) // user - map(0xc8, 0xc8).mirror(2).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xc9, 0xc9).mirror(2).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xc8, 0xc9).mirror(2).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xcc, 0xcf).w(FUNC(pp01_state::pp01_video_write_mode_w)); map(0xd0, 0xd3).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0xe0, 0xef).mirror(0x10).rw(FUNC(pp01_state::pp01_mem_block_r), FUNC(pp01_state::pp01_mem_block_w)); diff --git a/src/mame/drivers/prof180x.cpp b/src/mame/drivers/prof180x.cpp index c4e7fe5c1bf..0ba1d386377 100644 --- a/src/mame/drivers/prof180x.cpp +++ b/src/mame/drivers/prof180x.cpp @@ -252,7 +252,7 @@ MACHINE_CONFIG_START(prof180x_state::prof180x) MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1) /* devices */ - MCFG_UPD765A_ADD(FDC9268_TAG, false, true) + UPD765A(config, FDC9268_TAG, false, true); MCFG_FLOPPY_DRIVE_ADD(FDC9268_TAG ":0", prof180x_floppies, "35dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(FDC9268_TAG ":1", prof180x_floppies, "35dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(FDC9268_TAG ":2", prof180x_floppies, "35dd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/prof80.cpp b/src/mame/drivers/prof80.cpp index 9ae0f6d292c..11a596e0774 100644 --- a/src/mame/drivers/prof80.cpp +++ b/src/mame/drivers/prof80.cpp @@ -460,10 +460,10 @@ MACHINE_CONFIG_START(prof80_state::prof80) MCFG_PROF80_MMU_ADD(m_mmu, prof80_mmu) // RTC - MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP) + UPD1990A(config, m_rtc); // FDC - MCFG_UPD765A_ADD(UPD765_TAG, true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", prof80_floppies, "525qd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", prof80_floppies, "525qd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":2", prof80_floppies, nullptr, floppy_image_device::default_floppy_formats) @@ -471,12 +471,12 @@ MACHINE_CONFIG_START(prof80_state::prof80) // DEMUX latches LS259(config, m_flra); - m_flra->q_out_cb<0>().set(UPD1990A_TAG, FUNC(upd1990a_device::data_in_w)); // TDI - m_flra->q_out_cb<0>().append(UPD1990A_TAG, FUNC(upd1990a_device::c0_w)); // C0 - m_flra->q_out_cb<1>().set(UPD1990A_TAG, FUNC(upd1990a_device::c1_w)); // C1 - m_flra->q_out_cb<2>().set(UPD1990A_TAG, FUNC(upd1990a_device::c2_w)); // C2 + m_flra->q_out_cb<0>().set(m_rtc, FUNC(upd1990a_device::data_in_w)); // TDI + m_flra->q_out_cb<0>().append(m_rtc, FUNC(upd1990a_device::c0_w)); // C0 + m_flra->q_out_cb<1>().set(m_rtc, FUNC(upd1990a_device::c1_w)); // C1 + m_flra->q_out_cb<2>().set(m_rtc, FUNC(upd1990a_device::c2_w)); // C2 m_flra->q_out_cb<3>().set(FUNC(prof80_state::ready_w)); // READY - m_flra->q_out_cb<4>().set(UPD1990A_TAG, FUNC(upd1990a_device::clk_w)); // TCK + m_flra->q_out_cb<4>().set(m_rtc, FUNC(upd1990a_device::clk_w)); // TCK m_flra->q_out_cb<5>().set(FUNC(prof80_state::inuse_w)); // IN USE m_flra->q_out_cb<6>().set(FUNC(prof80_state::motor_w)); // _MOTOR m_flra->q_out_cb<7>().set(FUNC(prof80_state::select_w)); // SELECT @@ -487,7 +487,7 @@ MACHINE_CONFIG_START(prof80_state::prof80) m_flrb->q_out_cb<3>().set(m_rs232a, FUNC(rs232_port_device::write_txd)); // TX m_flrb->q_out_cb<4>().set(FUNC(prof80_state::mstop_w)); // _MSTOP m_flrb->q_out_cb<5>().set(m_rs232b, FUNC(rs232_port_device::write_txd)); // TXP - m_flrb->q_out_cb<6>().set(UPD1990A_TAG, FUNC(upd1990a_device::stb_w)); // TSTB + m_flrb->q_out_cb<6>().set(m_rtc, FUNC(upd1990a_device::stb_w)); // TSTB m_flrb->q_out_cb<7>().set(m_mmu, FUNC(prof80_mmu_device::mme_w)); // MME // ECB bus diff --git a/src/mame/drivers/ps2sony.cpp b/src/mame/drivers/ps2sony.cpp index dd137f097fb..1708f52cc57 100644 --- a/src/mame/drivers/ps2sony.cpp +++ b/src/mame/drivers/ps2sony.cpp @@ -400,7 +400,7 @@ WRITE32_MEMBER(ps2sony_state::ipu_w) break; case 0x03: /* VDEC */ { - static const char *vlc[4] = + static char const *const vlc[4] = { "Macroblock Address Increment", "Macroblock Type", diff --git a/src/mame/drivers/psx.cpp b/src/mame/drivers/psx.cpp index 1d4260396d8..15f9e6f6adf 100644 --- a/src/mame/drivers/psx.cpp +++ b/src/mame/drivers/psx.cpp @@ -519,8 +519,8 @@ void psx1_state::subcpu_map(address_map &map) MACHINE_CONFIG_START(psx1_state::psj) /* basic machine hardware */ - MCFG_DEVICE_ADD( "maincpu", CXD8530CQ, XTAL(67'737'600) ) - MCFG_DEVICE_PROGRAM_MAP( psx_map ) + CXD8530CQ(config, m_maincpu, XTAL(67'737'600)); + m_maincpu->set_addrmap(AS_PROGRAM, &psx1_state::psx_map); subdevice<ram_device>("maincpu:ram")->set_default_size("2M"); @@ -530,10 +530,10 @@ MACHINE_CONFIG_START(psx1_state::psj) MCFG_PSX_CTRL_PORT_ADD("port1", psx_controllers, "digital_pad") MCFG_PSX_CTRL_PORT_ADD("port2", psx_controllers, "digital_pad") - MCFG_DEVICE_MODIFY("maincpu:sio0") - MCFG_PSX_SIO_DTR_HANDLER(WRITELINE("controllers", psxcontrollerports_device, write_dtr)) - MCFG_PSX_SIO_SCK_HANDLER(WRITELINE("controllers", psxcontrollerports_device, write_sck)) - MCFG_PSX_SIO_TXD_HANDLER(WRITELINE("controllers", psxcontrollerports_device, write_txd)) + auto &sio0(*m_maincpu->subdevice<psxsio0_device>("sio0")); + sio0.dtr_handler().set("controllers", FUNC(psxcontrollerports_device::write_dtr)); + sio0.sck_handler().set("controllers", FUNC(psxcontrollerports_device::write_sck)); + sio0.txd_handler().set("controllers", FUNC(psxcontrollerports_device::write_txd)); /* video hardware */ MCFG_PSXGPU_ADD( "maincpu", "gpu", CXD8561Q, 0x100000, XTAL(53'693'175) ) @@ -572,8 +572,8 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(psx1_state::pse) /* basic machine hardware */ - MCFG_DEVICE_ADD( "maincpu", CXD8530AQ, XTAL(67'737'600) ) - MCFG_DEVICE_PROGRAM_MAP( psx_map) + CXD8530AQ(config, m_maincpu, XTAL(67'737'600)); + m_maincpu->set_addrmap(AS_PROGRAM, &psx1_state::psx_map); subdevice<ram_device>("maincpu:ram")->set_default_size("2M"); @@ -583,10 +583,10 @@ MACHINE_CONFIG_START(psx1_state::pse) MCFG_PSX_CTRL_PORT_ADD("port1", psx_controllers, "digital_pad") MCFG_PSX_CTRL_PORT_ADD("port2", psx_controllers, "digital_pad") - MCFG_DEVICE_MODIFY("maincpu:sio0") - MCFG_PSX_SIO_DTR_HANDLER(WRITELINE("controllers", psxcontrollerports_device, write_dtr)) - MCFG_PSX_SIO_SCK_HANDLER(WRITELINE("controllers", psxcontrollerports_device, write_sck)) - MCFG_PSX_SIO_TXD_HANDLER(WRITELINE("controllers", psxcontrollerports_device, write_txd)) + auto &sio0(*m_maincpu->subdevice<psxsio0_device>("sio0")); + sio0.dtr_handler().set("controllers", FUNC(psxcontrollerports_device::write_dtr)); + sio0.sck_handler().set("controllers", FUNC(psxcontrollerports_device::write_sck)); + sio0.txd_handler().set("controllers", FUNC(psxcontrollerports_device::write_txd)); /* video hardware */ /* TODO: visible area and refresh rate */ diff --git a/src/mame/drivers/pwrview.cpp b/src/mame/drivers/pwrview.cpp index 98b580297d6..4a8cb3ebe54 100644 --- a/src/mame/drivers/pwrview.cpp +++ b/src/mame/drivers/pwrview.cpp @@ -392,8 +392,7 @@ void pwrview_state::pwrview_io(address_map &map) map(0xc280, 0xc287).rw(FUNC(pwrview_state::unk3_r), FUNC(pwrview_state::unk3_w)).umask16(0x00ff); map(0xc288, 0xc28f).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff); map(0xc2a0, 0xc2a7).rw("sio", FUNC(z80sio2_device::cd_ba_r), FUNC(z80sio2_device::cd_ba_w)).umask16(0x00ff); - map(0xc2c0, 0xc2c0).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xc2c2, 0xc2c2).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xc2c0, 0xc2c3).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0xc2e0, 0xc2e3).m("fdc", FUNC(upd765a_device::map)).umask16(0x00ff); map(0xc2e4, 0xc2e5).ram(); map(0xc2e6, 0xc2e6).r(FUNC(pwrview_state::pitclock_r)); @@ -420,9 +419,9 @@ MACHINE_CONFIG_START(pwrview_state::pwrview) MCFG_PIT8253_CLK2(XTAL(16'000'000)/16) // floppy disk controller - MCFG_UPD765A_ADD("fdc", true, true) // Rockwell R7675P - //MCFG_UPD765_INTRQ_CALLBACK(WRITELINE("pic1", pic8259_device, ir6_w)) - //MCFG_UPD765_DRQ_CALLBACK(WRITELINE("maincpu", i80186_cpu_device, drq1_w)) + UPD765A(config, "fdc", true, true); // Rockwell R7675P + //fdc.intrq_wr_callback().set("pic1", FUNC(pic8259_device::ir6_w)); + //fdc.drq_wr_callback().set(m_maincpu, FUNC(i80186_cpu_device::drq1_w)); MCFG_FLOPPY_DRIVE_ADD("fdc:0", pwrview_floppies, "525dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("fdc:1", pwrview_floppies, "525dd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/px8.cpp b/src/mame/drivers/px8.cpp index 4f13ddcefec..af96e8c3c7a 100644 --- a/src/mame/drivers/px8.cpp +++ b/src/mame/drivers/px8.cpp @@ -527,8 +527,7 @@ void px8_state::px8_io(address_map &map) map.unmap_value_high(); map.global_mask(0x0f); map(0x00, 0x07).rw(FUNC(px8_state::gah40m_r), FUNC(px8_state::gah40m_w)); - map(0x0c, 0x0c).rw(I8251_TAG, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x0d, 0x0d).rw(I8251_TAG, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x0c, 0x0d).rw(I8251_TAG, FUNC(i8251_device::read), FUNC(i8251_device::write)); // AM_RANGE(0x0e, 0x0e) AM_DEVREADWRITE(SED1320_TAG, sed1330_device, status_r, data_w) // AM_RANGE(0x0f, 0x0f) AM_DEVREADWRITE(SED1320_TAG, sed1330_device, data_r, command_w) } diff --git a/src/mame/drivers/pyl601.cpp b/src/mame/drivers/pyl601.cpp index e9a0102fa51..87c70ad0b2b 100644 --- a/src/mame/drivers/pyl601.cpp +++ b/src/mame/drivers/pyl601.cpp @@ -569,7 +569,7 @@ MACHINE_CONFIG_START(pyl601_state::pyl601) MCFG_MC6845_CHAR_WIDTH(8) /* ? */ MCFG_MC6845_UPDATE_ROW_CB(pyl601_state, pyl601_update_row) - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_fdc, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765:0", pyl601_floppies, "525hd", pyl601_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", pyl601_floppies, "525hd", pyl601_state::floppy_formats) MCFG_SOFTWARE_LIST_ADD("flop_list","pyl601") diff --git a/src/mame/drivers/qtsbc.cpp b/src/mame/drivers/qtsbc.cpp index 7bdc8061e12..04b6ef94c76 100644 --- a/src/mame/drivers/qtsbc.cpp +++ b/src/mame/drivers/qtsbc.cpp @@ -142,7 +142,7 @@ READ8_MEMBER(qtsbc_state::io_r) case 2: case 3: default: - return m_pit->read(space, offset & 3); + return m_pit->read(offset & 3); case 4: case 5: @@ -150,10 +150,8 @@ READ8_MEMBER(qtsbc_state::io_r) return 0xff; case 6: - return m_usart->data_r(space, 0); - case 7: - return m_usart->status_r(space, 0); + return m_usart->read(offset & 1); } } else @@ -183,7 +181,7 @@ WRITE8_MEMBER(qtsbc_state::io_w) case 2: case 3: default: - m_pit->write(space, offset & 3, data); + m_pit->write(offset & 3, data); break; case 4: @@ -192,11 +190,8 @@ WRITE8_MEMBER(qtsbc_state::io_w) break; case 6: - m_usart->data_w(space, 0, data); - break; - case 7: - m_usart->control_w(space, 0, data); + m_usart->write(offset & 1, data); break; } } diff --git a/src/mame/drivers/qvt103.cpp b/src/mame/drivers/qvt103.cpp index 9c33b8ffaac..ea26bd660bb 100644 --- a/src/mame/drivers/qvt103.cpp +++ b/src/mame/drivers/qvt103.cpp @@ -9,10 +9,10 @@ Skeleton driver for Qume QVT-103 video display terminal. #include "emu.h" #include "cpu/z80/z80.h" #include "cpu/mcs48/mcs48.h" -//#include "machine/nvram.h" +#include "machine/nvram.h" #include "machine/z80ctc.h" #include "machine/z80dart.h" -//#include "video/crt9007.h" +#include "video/crt9007.h" #include "screen.h" class qvt103_state : public driver_device @@ -45,8 +45,8 @@ void qvt103_state::mem_map(address_map &map) { map(0x0000, 0x5fff).rom().region("maincpu", 0); map(0x6000, 0x6001).rw("kbdmcu", FUNC(i8741_device::upi41_master_r), FUNC(i8741_device::upi41_master_w)); - map(0x8000, 0x87ff).ram(); - //AM_RANGE(0xa000, 0xa03f) AM_DEVREADWRITE("vpac", crt9007_device, read, write) + map(0x8000, 0x87ff).ram().share("nvram"); + map(0xa000, 0xa03f).rw("vpac", FUNC(crt9007_device::read), FUNC(crt9007_device::write)); map(0xc000, 0xffff).ram(); // not entirely contiguous? } @@ -69,23 +69,29 @@ static const z80_daisy_config daisy_chain[] = void qvt103_state::qvt103(machine_config &config) { - Z80(config, m_maincpu, XTAL(29'376'000) / 9); // divider guessed + Z80(config, m_maincpu, 29.376_MHz_XTAL / 9); // divider guessed m_maincpu->set_addrmap(AS_PROGRAM, &qvt103_state::mem_map); m_maincpu->set_addrmap(AS_IO, &qvt103_state::io_map); m_maincpu->set_daisy_config(daisy_chain); - z80ctc_device& ctc(Z80CTC(config, "ctc", XTAL(29'376'000) / 9)); + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // TC5516APL + battery + + z80ctc_device &ctc(Z80CTC(config, "ctc", 29.376_MHz_XTAL / 9)); ctc.intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); - z80dart_device& dart(Z80DART(config, "dart", XTAL(29'376'000) / 9)); + z80dart_device &dart(Z80DART(config, "dart", 29.376_MHz_XTAL / 9)); dart.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_raw(XTAL(29'376'000) * 2 / 3, 102 * 10, 0, 80 * 10, 320, 0, 300); - //screen.set_raw(XTAL(29'376'000), 170 * 9, 0, 132 * 9, 320, 0, 300); + screen.set_raw(29.376_MHz_XTAL * 2 / 3, 102 * 10, 0, 80 * 10, 320, 0, 300); + //screen.set_raw(29.376_MHz_XTAL, 170 * 9, 0, 132 * 9, 320, 0, 300); screen.set_screen_update(FUNC(qvt103_state::screen_update)); - I8741(config, "kbdmcu", XTAL(6'000'000)); + crt9007_device &vpac(CRT9007(config, "vpac", 29.376_MHz_XTAL / 15)); + vpac.set_character_width(10); + vpac.int_callback().set("ctc", FUNC(z80ctc_device::trg3)); + + I8741(config, "kbdmcu", 6_MHz_XTAL); } /************************************************************************************************************** diff --git a/src/mame/drivers/rainbow.cpp b/src/mame/drivers/rainbow.cpp index 83918c57854..37bcfef0172 100644 --- a/src/mame/drivers/rainbow.cpp +++ b/src/mame/drivers/rainbow.cpp @@ -356,8 +356,8 @@ W17 pulls J1 serial port pin 1 to GND when set (chassis to logical GND). #include "bus/rs232/rs232.h" #include "imagedev/bitbngr.h" #include "machine/com8116.h" +#include "bus/rs232/hlemouse.h" #include "bus/rs232/terminal.h" -#include "bus/rs232/ser_mouse.h" #include "machine/i8251.h" #include "machine/dec_lk201.h" @@ -957,8 +957,7 @@ void rainbow_state::rainbow8088_io(address_map &map) map(0x0e, 0x0e).w(FUNC(rainbow_state::printer_bitrate_w)); - map(0x10, 0x10).rw(m_kbd8251, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x11, 0x11).rw(m_kbd8251, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x10, 0x11).rw(m_kbd8251, FUNC(i8251_device::read), FUNC(i8251_device::write)); // =========================================================== // There are 4 select lines for Option Select 1 to 4 @@ -3327,9 +3326,10 @@ MACHINE_CONFIG_START(rainbow_state::rainbow) MCFG_RS232_DCD_HANDLER(WRITELINE(m_mpsc, upd7201_new_device, ctsb_w)) // actually DTR MCFG_DEVICE_MODIFY("comm") - MCFG_SLOT_OPTION_ADD("microsoft_mouse", MSFT_SERIAL_MOUSE) - MCFG_SLOT_OPTION_ADD("mouse_systems_mouse", MSYSTEM_SERIAL_MOUSE) - MCFG_SLOT_DEFAULT_OPTION("microsoft_mouse") + MCFG_SLOT_OPTION_ADD("microsoft_mouse", MSFT_HLE_SERIAL_MOUSE) + MCFG_SLOT_OPTION_ADD("logitech_mouse", LOGITECH_HLE_SERIAL_MOUSE) + MCFG_SLOT_OPTION_ADD("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE) + MCFG_SLOT_DEFAULT_OPTION("logitech_mouse") MCFG_DEVICE_MODIFY("printer") MCFG_SLOT_DEFAULT_OPTION("printer") diff --git a/src/mame/drivers/rc702.cpp b/src/mame/drivers/rc702.cpp index dd8bdc00eb3..0b1d4912a5f 100644 --- a/src/mame/drivers/rc702.cpp +++ b/src/mame/drivers/rc702.cpp @@ -77,6 +77,7 @@ private: DECLARE_WRITE_LINE_MEMBER(qbar_w); DECLARE_WRITE_LINE_MEMBER(dack1_w); I8275_DRAW_CHARACTER_MEMBER(display_pixels); + DECLARE_PALETTE_INIT(rc702); void kbd_put(u8 data); void rc702_io(address_map &map); @@ -241,10 +242,11 @@ WRITE8_MEMBER( rc702_state::port1c_w ) } // monitor is orange even when powered off -static const rgb_t our_palette[2] = { - rgb_t(0xc0, 0x60, 0x00), // off - rgb_t(0xff, 0xb4, 0x00), // on -}; +PALETTE_INIT_MEMBER(rc702_state, rc702) +{ + palette.set_pen_color(0, rgb_t(0xc0, 0x60, 0x00)); + palette.set_pen_color(1, rgb_t(0xff, 0xb4, 0x00)); +} void rc702_state::init_rc702() { @@ -253,7 +255,6 @@ void rc702_state::init_rc702() membank("bankr0")->configure_entry(1, &main[0x0000]); membank("bankr0")->configure_entry(0, &main[0x10000]); membank("bankw0")->configure_entry(0, &main[0x0000]); - m_palette->set_pen_colors(0, our_palette, ARRAY_LENGTH(our_palette)); } I8275_DRAW_CHARACTER_MEMBER( rc702_state::display_pixels ) @@ -388,6 +389,7 @@ MACHINE_CONFIG_START(rc702_state::rc702) crtc.irq_wr_callback().append(m_ctc1, FUNC(z80ctc_device::trg2)); crtc.drq_wr_callback().set(FUNC(rc702_state::crtc_drq_w)); MCFG_PALETTE_ADD("palette", 2) + MCFG_PALETTE_INIT_OWNER(rc702_state, rc702) /* sound hardware */ SPEAKER(config, "mono").front_center(); diff --git a/src/mame/drivers/rltennis.cpp b/src/mame/drivers/rltennis.cpp index 88980fa6275..7f120374402 100644 --- a/src/mame/drivers/rltennis.cpp +++ b/src/mame/drivers/rltennis.cpp @@ -198,8 +198,9 @@ MACHINE_CONFIG_START(rltennis_state::rltennis) EEPROM_2864(config, "eeprom"); - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") - MCFG_RAMDAC_SPLIT_READ(1) + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, "palette")); + ramdac.set_addrmap(0, &rltennis_state::ramdac_map); + ramdac.set_split_read(1); SPEAKER(config, "speaker").front_center(); diff --git a/src/mame/drivers/route16.cpp b/src/mame/drivers/route16.cpp index 60c17d4653e..17b04f1c5ad 100644 --- a/src/mame/drivers/route16.cpp +++ b/src/mame/drivers/route16.cpp @@ -1043,7 +1043,7 @@ ROM_START( jongpute ) ROM_REGION( 0x10000, "cpu2", 0 ) ROM_LOAD( "j6", 0x0000, 0x1000, CRC(54b349b0) SHA1(e5620b85a24a35d995860c7121f1ddf16f7ea168) ) - /* maybe used for pseudo sampling voice, "reach", that is not emulated yet */ + /* maybe used for pseudo sampling voice, "reach", that is not emulated yet */ ROM_REGION( 0x1000, "unknown", 0 ) ROM_LOAD( "j1", 0x0000, 0x1000, CRC(6d6ba272) SHA1(a4efd8daddbbf595ee46484578f544d7ed84e090) ) @@ -1107,5 +1107,5 @@ GAME( 1980, spacecho, speakres, spacecho, spacecho, route16_state, empty_init, GAME( 1980, spacecho2,speakres, spacecho, spacecho, route16_state, empty_init, ROT270, "bootleg (Gayton Games)", "Space Echo (set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1980, speakhlp, speakres, spacecho, spacecho, route16_state, empty_init, ROT270, "bootleg", "Speak & Help", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_SOUND ) -GAME( 1981, jongpute, 0, jongpute, jongpute, route16_state, empty_init, ROT0, "Alpha Denshi Co.", "Jongputer", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_SOUND ) // sampling voice is not emulated +GAME( 1981, jongpute, 0, jongpute, jongpute, route16_state, empty_init, ROT0, "Alpha Denshi Co.", "Jongputer", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_COLORS | MACHINE_NOT_WORKING ) // sampling voice is not emulated, bug with colors makes tile recognition difficult GAME( 1981, ttmahjng, jongpute, jongpute, jongpute, route16_state, empty_init, ROT0, "Alpha Denshi Co. (Taito license)", "T.T Mahjong", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/rz1.cpp b/src/mame/drivers/rz1.cpp index f835d43dbe8..0a2b445ebb6 100644 --- a/src/mame/drivers/rz1.cpp +++ b/src/mame/drivers/rz1.cpp @@ -52,6 +52,9 @@ public: m_pg{ {*this, "upd934g_c"}, {*this, "upd934g_b"} }, m_samples{ {*this, "samples_a"}, {*this, "samples_b"} }, m_keys(*this, "kc%u", 0), + m_led_song(*this, "led_song"), + m_led_pattern(*this, "led_pattern"), + m_led_startstop(*this, "led_startstop"), m_port_a(0), m_port_b(0xff) { } @@ -72,6 +75,10 @@ private: required_memory_region m_samples[2]; required_ioport_array<8> m_keys; + output_finder<> m_led_song; + output_finder<> m_led_pattern; + output_finder<> m_led_startstop; + void map(address_map &map); DECLARE_READ8_MEMBER(port_a_r); @@ -307,13 +314,18 @@ READ8_MEMBER( rz1_state::key_r ) WRITE8_MEMBER( rz1_state::leds_w ) { - output().set_value("led_song", BIT(data, 0) == 0 ? 1 : BIT(data, 1) == 0 ? 2 : 0); - output().set_value("led_pattern", BIT(data, 2) == 0 ? 1 : BIT(data, 3) == 0 ? 2 : 0); - output().set_value("led_startstop", BIT(data, 4) == 0 ? 1 : 0); + m_led_song = BIT(data, 0) == 0 ? 1 : BIT(data, 1) == 0 ? 2 : 0; + m_led_pattern = BIT(data, 2) == 0 ? 1 : BIT(data, 3) == 0 ? 2 : 0; + m_led_startstop = BIT(data, 4) == 0 ? 1 : 0; } void rz1_state::machine_start() { + // resolve output finders + m_led_song.resolve(); + m_led_pattern.resolve(); + m_led_startstop.resolve(); + // register for save states save_item(NAME(m_port_a)); save_item(NAME(m_port_b)); diff --git a/src/mame/drivers/s11c.cpp b/src/mame/drivers/s11c.cpp index 27e6eae10a8..fb4c3f12cde 100644 --- a/src/mame/drivers/s11c.cpp +++ b/src/mame/drivers/s11c.cpp @@ -298,6 +298,16 @@ ROM_START(diner_l1) ROM_LOAD("dinr_u20.l1", 0x30000, 0x10000, CRC(511fb260) SHA1(e6e25b464c5c38f3c0492436f1e8aa2be33dd278)) ROM_END +ROM_START(diner_p0) + ROM_REGION(0x10000, "maincpu", 0) + ROM_LOAD("dinr_u26.pa0", 0x4000, 0x4000, CRC(dbf5de09) SHA1(55ca30bdf6e6e482f3ce5891b866103492fa3754)) + ROM_LOAD("dinr_u27.pa0", 0x8000, 0x8000, CRC(9875d16e) SHA1(fbbab61cc9e8e3f7a1bf1428ad50ad3c13f0f120)) + ROM_REGION(0x50000, "bgcpu", ROMREGION_ERASEFF) + ROM_LOAD("dinr_u4.l1", 0x10000, 0x10000, CRC(3bd28368) SHA1(41eec2f5f863039deaabfae8aece4b1cf15e4b78)) + ROM_LOAD("dinr_u19.l1", 0x20000, 0x10000, CRC(278b9a30) SHA1(41e59adb8b6c08caee46c3dd73256480b4041619)) + ROM_LOAD("dinr_u20.l1", 0x30000, 0x10000, CRC(511fb260) SHA1(e6e25b464c5c38f3c0492436f1e8aa2be33dd278)) +ROM_END + /*-------------------- / Dr. Dude 11/90 /--------------------*/ @@ -594,6 +604,7 @@ GAME(1990, diner_l3, diner_l4, s11c, s11c, s11c_state, init_s11c, ROT0, GAME(1990, diner_l2, diner_l4, s11c, s11c, s11c_state, init_s11c, ROT0, "Williams", "Diner (LU-2) Europe", MACHINE_IS_SKELETON_MECHANICAL) GAME(1990, diner_f2, diner_l4, s11c, s11c, s11c_state, init_s11c, ROT0, "Williams", "Diner (LF-2) French", MACHINE_IS_SKELETON_MECHANICAL) GAME(1990, diner_l1, diner_l4, s11c, s11c, s11c_state, init_s11c, ROT0, "Williams", "Diner (LU-1) Europe", MACHINE_IS_SKELETON_MECHANICAL) +GAME(1990, diner_p0, diner_l4, s11c, s11c, s11c_state, init_s11c, ROT0, "Williams", "Diner (PA-0 prototype)", MACHINE_IS_SKELETON_MECHANICAL) GAME(1990, dd_l2, 0, s11c, s11c, s11c_state, init_s11c, ROT0, "Bally", "Dr. Dude (LA-2)", MACHINE_IS_SKELETON_MECHANICAL) GAME(1990, dd_p6, dd_l2, s11c, s11c, s11c_state, init_s11c, ROT0, "Bally", "Dr. Dude (PA-6)", MACHINE_IS_SKELETON_MECHANICAL) GAME(1990, pool_l7, 0, s11c, s11c, s11c_state, init_s11c, ROT0, "Bally", "Pool Sharks (LA-7)", MACHINE_IS_SKELETON_MECHANICAL) diff --git a/src/mame/drivers/sage2.cpp b/src/mame/drivers/sage2.cpp index 02962af2659..66a8cdb0334 100644 --- a/src/mame/drivers/sage2.cpp +++ b/src/mame/drivers/sage2.cpp @@ -42,13 +42,11 @@ void sage2_state::sage2_mem(address_map &map) map(0xffc000, 0xffc007).rw(I8253_1_TAG, FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff); map(0xffc010, 0xffc01f).noprw(); //AM_DEVREADWRITE8(TMS9914_TAG, tms9914_device, read, write, 0x00ff) map(0xffc020, 0xffc027).rw(I8255A_0_TAG, FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0x00ff); // i8255, DIPs + Floppy ctrl port - map(0xffc031, 0xffc031).rw(m_usart1, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xffc033, 0xffc033).rw(m_usart1, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xffc030, 0xffc033).rw(m_usart1, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0xffc040, 0xffc043).rw(m_pic, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff); map(0xffc050, 0xffc053).m(m_fdc, FUNC(upd765a_device::map)).umask16(0x00ff); map(0xffc060, 0xffc067).rw(I8255A_1_TAG, FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0x00ff); // i8255, Printer - map(0xffc071, 0xffc071).rw(m_usart0, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xffc073, 0xffc073).rw(m_usart0, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xffc070, 0xffc073).rw(m_usart0, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0xffc080, 0xffc087).mirror(0x78).rw(I8253_0_TAG, FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff); // AM_RANGE(0xffc400, 0xffc407) AM_DEVREADWRITE8(S2651_0_TAG, s2651_device, read, write, 0x00ff) // AM_RANGE(0xffc440, 0xffc447) AM_DEVREADWRITE8(S2651_1_TAG, s2651_device, read, write, 0x00ff) @@ -469,8 +467,8 @@ MACHINE_CONFIG_START(sage2_state::sage2) MCFG_RS232_RXD_HANDLER(WRITELINE(m_usart1, i8251_device, write_rxd)) MCFG_RS232_DSR_HANDLER(WRITELINE(m_usart1, i8251_device, write_dsr)) - MCFG_UPD765A_ADD(UPD765_TAG, false, false) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, sage2_state, fdc_irq)) + UPD765A(config, m_fdc, false, false); + m_fdc->intrq_wr_callback().set(FUNC(sage2_state::fdc_irq)); MCFG_DEVICE_ADD(m_centronics, CENTRONICS, centronics_devices, "printer") MCFG_CENTRONICS_ACK_HANDLER(WRITELINE(*this, sage2_state, write_centronics_ack)) diff --git a/src/mame/drivers/sbrain.cpp b/src/mame/drivers/sbrain.cpp index fc1b7caa0ff..fc143eb1af5 100644 --- a/src/mame/drivers/sbrain.cpp +++ b/src/mame/drivers/sbrain.cpp @@ -8,10 +8,12 @@ Intertec SuperBrain Intertec Compustar terminal appears to have identical hardware. Need roms for it. -Chips: 2x Z80; FD1791; 2x 8251; 8255; BR1941; CRT8002; KR3600; DP8350 +Chips: 2x Z80; FD1791; 2x 8251; 8255; BR1941; CRT8002-003; KR3600-056; DP8350; MM5035 Xtals: 16.0, 10.92, 5.0688 +RAM: 32K or 64K dynamic (TMS4116-20NL); 1K static disk buffer (MM2114) Disk parameters: 512 bytes x 10 sectors x 35 tracks. 1 and 2-sided disks supported. Sound: Beeper +Expansion bus: 40 pins, nearly identical to TRS-80 The boot prom is shared between both cpus. This feat is accomplished by holding the sub cpu in reset, until the main cpu has prepared a few memory locations. The first thing in the rom @@ -26,30 +28,29 @@ When booted, the time (corrupted) is displayed at top right. You need to run TIM The schematic in parts is difficult to read. Some assumptions have been made. To Do: -- Without a disk in, it should display a message to insert a disk. Doesn't happen. May - attempt to execute empty memory instead. (-bios 1, -bios 2) - Improve keyboard. -- Video chips need to be emulated (CRT8002 and DP8350), attributes etc. +- Row buffering DMA (DP8350, MM5035) and line-by-line rendering. +- Proper character generator emulation (CRT8002). +- Add expansion bus slot. - Probably lots of other stuff. -- PC0 when high will swap out lower 16k of RAM for the DP8350 device. The value of HL (the - "memory" address) is the data (cursor location, top of screen, etc). The byte "written" - to this address (d0,d1) is the command for the CRTC. *************************************************************************************************************/ #include "emu.h" #include "cpu/z80/z80.h" +#include "bus/rs232/rs232.h" #include "machine/com8116.h" #include "machine/i8251.h" #include "machine/i8255.h" #include "machine/wd_fdc.h" +#include "machine/ram.h" #include "machine/timer.h" #include "sound/beep.h" -//#include "video/dp8350.h" -#include "emupal.h" +#include "video/dp8350.h" #include "screen.h" #include "speaker.h" +#include <algorithm> class sbrain_state : public driver_device @@ -59,42 +60,56 @@ public: : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") , m_subcpu(*this, "subcpu") - , m_p_videoram(*this, "videoram") , m_p_chargen(*this, "chargen") , m_beep(*this, "beeper") - , m_u0(*this, "uart0") - , m_u1(*this, "uart1") + , m_crtc(*this, "crtc") + , m_usart(*this, "usart%u", 0U) + , m_mainport(*this, "mainport") , m_ppi(*this, "ppi") - , m_fdc (*this, "fdc") - , m_floppy0(*this, "fdc:0") - , m_floppy1(*this, "fdc:1") - , m_vs(*this, "VS") - , m_bankr0(*this, "bankr0") - , m_bankw0(*this, "bankw0") - , m_bank2(*this, "bank2") + , m_fdc(*this, "fdc") + , m_floppy(*this, "fdc:%u", 0U) + , m_ram(*this, RAM_TAG) + , m_boot_prom(*this, "subcpu") + , m_disk_buffer(*this, "buffer") , m_keyboard(*this, "X%u", 0) + , m_modifiers(*this, "MODIFIERS") + , m_serial_sw(*this, "BAUDCLOCK") { } void sbrain(machine_config &config); - void init_sbrain(); +protected: + virtual void machine_start() override; + virtual void machine_reset() override; private: - DECLARE_MACHINE_RESET(sbrain); - DECLARE_READ8_MEMBER(ppi_pa_r); - DECLARE_WRITE8_MEMBER(ppi_pa_w); - DECLARE_READ8_MEMBER(ppi_pb_r); - DECLARE_WRITE8_MEMBER(ppi_pb_w); - DECLARE_READ8_MEMBER(ppi_pc_r); - DECLARE_WRITE8_MEMBER(ppi_pc_w); - DECLARE_READ8_MEMBER(port48_r); - DECLARE_READ8_MEMBER(port50_r); - DECLARE_READ8_MEMBER(port10_r); - DECLARE_WRITE8_MEMBER(port10_w); - u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + u8 mem_r(offs_t offset); + void mem_w(offs_t offset, u8 data); + + u8 ppi_pa_r(); + void ppi_pa_w(u8 data); + u8 ppi_pb_r(); + void ppi_pb_w(u8 data); + u8 ppi_pc_r(); + void ppi_pc_w(u8 data); + u8 char_int_ack_r(); + void char_int_ack_w(u8 data); + u8 keyboard_r(); + + void disk_select_w(u8 data); + + u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); TIMER_DEVICE_CALLBACK_MEMBER(kbd_scan); + DECLARE_WRITE_LINE_MEMBER(crtc_lrc_w); + DECLARE_WRITE_LINE_MEMBER(crtc_vblank_w); + DECLARE_WRITE_LINE_MEMBER(crtc_vsync_w); + + DECLARE_WRITE_LINE_MEMBER(external_txc_w); + DECLARE_WRITE_LINE_MEMBER(external_rxc_w); + DECLARE_WRITE_LINE_MEMBER(internal_txc_rxc_w); + void sbrain_io(address_map &map); void sbrain_mem(address_map &map); void sbrain_subio(address_map &map); @@ -106,80 +121,135 @@ private: u8 m_portb; u8 m_portc; u8 m_port10; - u8 m_term_data; + u8 m_key_data; u8 m_framecnt; + required_device<cpu_device> m_maincpu; required_device<cpu_device> m_subcpu; - required_shared_ptr<u8> m_p_videoram; required_region_ptr<u8> m_p_chargen; required_device<beep_device> m_beep; - required_device<i8251_device> m_u0; - required_device<i8251_device> m_u1; + required_device<dp8350_device> m_crtc; + required_device_array<i8251_device, 2> m_usart; + required_device<rs232_port_device> m_mainport; required_device<i8255_device> m_ppi; required_device<fd1791_device> m_fdc; - required_device<floppy_connector> m_floppy0; - required_device<floppy_connector> m_floppy1; - required_ioport m_vs; - required_memory_bank m_bankr0; - required_memory_bank m_bankw0; - required_memory_bank m_bank2; + required_device_array<floppy_connector, 4> m_floppy; + required_device<ram_device> m_ram; + required_region_ptr<u8> m_boot_prom; + required_shared_ptr<u8> m_disk_buffer; + required_ioport_array<10> m_keyboard; + required_ioport m_modifiers; + required_ioport m_serial_sw; }; void sbrain_state::sbrain_mem(address_map &map) { - map(0x0000, 0x3fff).bankr("bankr0").bankw("bankw0"); - map(0x4000, 0x7fff).ram(); - map(0x8000, 0xbfff).bankrw("bank2"); - map(0xc000, 0xf7ff).ram(); - map(0xf800, 0xffff).ram().share("videoram"); + map(0x0000, 0xffff).rw(FUNC(sbrain_state::mem_r), FUNC(sbrain_state::mem_w)); } void sbrain_state::sbrain_io(address_map &map) { map.global_mask(0xff); - map(0x40, 0x40).mirror(6).rw(m_u0, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x41, 0x41).mirror(6).rw(m_u0, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x48, 0x4f).r(FUNC(sbrain_state::port48_r)); //chr_int_latch - map(0x50, 0x57).r(FUNC(sbrain_state::port50_r)); - map(0x58, 0x58).mirror(6).rw(m_u1, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x59, 0x59).mirror(6).rw(m_u1, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x40, 0x41).mirror(6).rw(m_usart[0], FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x48, 0x48).mirror(7).rw(FUNC(sbrain_state::char_int_ack_r), FUNC(sbrain_state::char_int_ack_w)); //chr_int_latch + map(0x50, 0x50).mirror(7).r(FUNC(sbrain_state::keyboard_r)); + map(0x58, 0x59).mirror(6).rw(m_usart[1], FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x60, 0x60).mirror(7).w("brg", FUNC(com8116_device::stt_str_w)); map(0x68, 0x6b).mirror(4).rw(m_ppi, FUNC(i8255_device::read), FUNC(i8255_device::write)); } void sbrain_state::sbrain_submem(address_map &map) { - map(0x0000, 0x07ff).rom(); - map(0x8800, 0x8bff).ram().region("subcpu", 0x8800); + map(0x0000, 0x07ff).mirror(0xf000).rom().region("subcpu", 0); + map(0x8800, 0x8bff).mirror(0x7400).ram().share("buffer"); } void sbrain_state::sbrain_subio(address_map &map) { - map.global_mask(0xff); - map(0x08, 0x0b).rw(m_fdc, FUNC(fd1791_device::read), FUNC(fd1791_device::write)); - map(0x10, 0x10).rw(FUNC(sbrain_state::port10_r), FUNC(sbrain_state::port10_w)); + map.global_mask(0x1f); + map(0x08, 0x0b).mirror(4).rw(m_fdc, FUNC(fd1791_device::read), FUNC(fd1791_device::write)); + map(0x10, 0x10).mirror(7).w(FUNC(sbrain_state::disk_select_w)); } -READ8_MEMBER( sbrain_state::port48_r ) +u8 sbrain_state::mem_r(offs_t offset) { - m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE); + switch (offset & 0xc000) + { + case 0x0000: + // PPIC-2 set selects boot PROM + if (BIT(m_portc, 2)) + return m_boot_prom[offset & 0x7ff]; + + // lowest 16K of RAM is disabled when PPIC-0 is set + if (BIT(m_portc, 0)) + return 0xff; + break; + + case 0x8000: + // resetting PPIC-4 selects disk buffer RAM + if (!BIT(m_portc, 4)) + return m_disk_buffer[offset & 0x3ff]; + + break; + } + + return m_ram->read(offset); +} + +void sbrain_state::mem_w(offs_t offset, u8 data) +{ + // any memory write affects CRTC when PPIC-0 is set + if (BIT(m_portc, 0)) + m_crtc->register_load(bitswap<2>(data, 0, 1), offset & 0xfff); + + switch (offset & 0xc000) + { + case 0x0000: + // can't write to boot PROM + if (BIT(m_portc, 2)) + return; + + // RAS is disabled for bank 0 when PPIC-0 is set + if (BIT(m_portc, 0)) + return; + + break; + + case 0x8000: + // resetting PPIC-4 selects disk buffer RAM + if (!BIT(m_portc, 4)) + { + m_disk_buffer[offset & 0x3ff] = data; + break; + } + + break; + } + + m_ram->write(offset, data); +} + +u8 sbrain_state::char_int_ack_r() +{ + if (!machine().side_effects_disabled()) + m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE); return 0xff; } -READ8_MEMBER( sbrain_state::port50_r ) +void sbrain_state::char_int_ack_w(u8 data) { - return m_term_data; + m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE); } -READ8_MEMBER( sbrain_state::port10_r ) +u8 sbrain_state::keyboard_r() { - return m_port10; + return m_key_data; } /* Misc disk functions -d0 : ? +d0 : busy signal to master CPU d1 : SEL A (drive 0?) d2 : SEL B (drive 1?) d3 : SEL C @@ -187,24 +257,26 @@ d4 : SEL D d5 : side select d6,7 : not used */ -WRITE8_MEMBER( sbrain_state::port10_w ) +void sbrain_state::disk_select_w(u8 data) { m_port10 = data | 0xc0; floppy_image_device *floppy = nullptr; - if (BIT(m_port10, 1)) floppy = m_floppy0->get_device(); - if (BIT(m_port10, 2)) floppy = m_floppy1->get_device(); + for (int d = 0; d < 4; d++) + if (BIT(m_port10, d + 1)) + { + floppy = m_floppy[d]->get_device(); + if (floppy) + break; + } m_fdc->set_floppy(floppy); if (floppy) floppy->ss_w(BIT(m_port10, 5)); - - m_floppy0->get_device()->mon_w(0); // motors run all the time - m_floppy1->get_device()->mon_w(0); } -READ8_MEMBER( sbrain_state::ppi_pa_r ) +u8 sbrain_state::ppi_pa_r() { return m_porta; } @@ -217,8 +289,10 @@ d5 : strike through d6 : 1=60hz 0=50hz d7 : reverse video */ -WRITE8_MEMBER( sbrain_state::ppi_pa_w ) +void sbrain_state::ppi_pa_w(u8 data) { + m_crtc->refresh_control(BIT(data, 6)); + m_porta = data; } @@ -228,25 +302,26 @@ d1 : key held down d2 : Vert Blank d3 : not used d4 : /capslock -d5 : ? +d5 : disk status: 1 = busy, 0 = ready d6 : Ring Indicator line from main rs232 port, 1=normal, 0=set d7 : cpu2 /busak line */ -READ8_MEMBER( sbrain_state::ppi_pb_r ) +u8 sbrain_state::ppi_pb_r() { - u8 vertsync = m_vs->read(); // bit 2 - u8 capslock = BIT(ioport("MODIFIERS")->read(), 0) << 4; // bit 4, capslock + u8 vertsync = m_crtc->vblank_r() << 2; + u8 capslock = BIT(m_modifiers->read(), 0) << 4; // bit 4, capslock u8 p10d0 = BIT(m_port10, 0) << 5; // bit 5 + u8 ri = m_mainport->ri_r() << 6; u8 busak = m_busak ? 128 : 0; // bit 7 - return busak | p10d0 | capslock | vertsync | m_keydown; + return busak | ri | p10d0 | capslock | vertsync | m_keydown; } -WRITE8_MEMBER( sbrain_state::ppi_pb_w ) +void sbrain_state::ppi_pb_w(u8 data) { m_portb = data & 8; } -READ8_MEMBER( sbrain_state::ppi_pc_r ) +u8 sbrain_state::ppi_pc_r() { return m_portc; } @@ -261,20 +336,45 @@ d5 : cpu2 /busreq line d6 : beeper d7 : keyboard, 1=enable comms, 0=reset */ -WRITE8_MEMBER( sbrain_state::ppi_pc_w ) +void sbrain_state::ppi_pc_w(u8 data) { m_portc = data; m_beep->set_state(BIT(data, 6)); - m_bankr0->set_entry(BIT(data, 2)); - m_bank2->set_entry(BIT(data, 4)); if (!BIT(data, 7)) m_keydown &= 2; // ack DR m_subcpu->set_input_line(INPUT_LINE_RESET, BIT(data, 3) ? ASSERT_LINE : CLEAR_LINE); + if (BIT(data, 3)) + { + m_fdc->soft_reset(); + disk_select_w(0); + } m_subcpu->set_input_line(Z80_INPUT_LINE_BUSRQ, BIT(data, 5) ? ASSERT_LINE : CLEAR_LINE); // ignored in z80.cpp m_busak = BIT(data, 5); } +WRITE_LINE_MEMBER(sbrain_state::external_txc_w) +{ + if (!BIT(m_serial_sw->read(), 0)) + m_usart[1]->write_txc(state); +} + +WRITE_LINE_MEMBER(sbrain_state::external_rxc_w) +{ + if (!BIT(m_serial_sw->read(), 2)) + m_usart[1]->write_rxc(state); +} + +WRITE_LINE_MEMBER(sbrain_state::internal_txc_rxc_w) +{ + if (!BIT(m_serial_sw->read(), 1)) + m_usart[1]->write_txc(state); + if (!BIT(m_serial_sw->read(), 3)) + m_usart[1]->write_rxc(state); + if (!BIT(m_serial_sw->read(), 4)) + m_mainport->write_etc(state); +} + u8 translate_table[3][10][8] = { // unshifted { @@ -417,16 +517,23 @@ static INPUT_PORTS_START( sbrain ) PORT_BIT(0x02,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1) PORT_BIT(0x04,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_SHIFT_2) - /* vblank */ - PORT_START("VS") - PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_VBLANK("screen") + PORT_START("BAUDCLOCK") + PORT_DIPNAME(0x03, 0x01, "Main TX Clock") PORT_DIPLOCATION("SW:1,3") + PORT_DIPSETTING(0x01, "Internal") + PORT_DIPSETTING(0x02, "External") + PORT_DIPNAME(0x0c, 0x04, "Main RX Clock") PORT_DIPLOCATION("SW:2,4") + PORT_DIPSETTING(0x04, "Internal") + PORT_DIPSETTING(0x08, "External") + PORT_DIPNAME(0x10, 0x10, "Internal Baud Clock to Main Port") PORT_DIPLOCATION("SW:5") + PORT_DIPSETTING(0x10, DEF_STR(Off)) + PORT_DIPSETTING(0x00, DEF_STR(On)) INPUT_PORTS_END TIMER_DEVICE_CALLBACK_MEMBER(sbrain_state::kbd_scan) { // m_keydown: d0 = 1 after key pressed, and is reset by pc7; d1 = 1 while a key is down. m_keydown &= 1; - u8 i, j, keyin, mods = ioport("MODIFIERS")->read() & 6; + u8 i, j, keyin, mods = m_modifiers->read() & 6; u8 translate_set = 0; if (BIT(mods, 1)) translate_set = 1; @@ -444,26 +551,41 @@ TIMER_DEVICE_CALLBACK_MEMBER(sbrain_state::kbd_scan) if (BIT(keyin, j)) { u8 pressed = translate_table[translate_set][i][j]; - m_keydown = (m_term_data == pressed) ? (m_keydown | 2) : 3; - m_term_data = pressed; + m_keydown = (m_key_data == pressed) ? (m_keydown | 2) : 3; + m_key_data = pressed; return; } } } } - m_term_data = 0xff; + m_key_data = 0xff; +} + +WRITE_LINE_MEMBER(sbrain_state::crtc_lrc_w) +{ + // TODO: actually triggered by BUSACK and taken after DMA burst finishes + if (state && !m_crtc->lbre_r() && !m_crtc->vblank_r()) + m_maincpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE); +} + +WRITE_LINE_MEMBER(sbrain_state::crtc_vblank_w) +{ + if (state) + m_maincpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE); +} + +WRITE_LINE_MEMBER(sbrain_state::crtc_vsync_w) +{ + // TODO: internal to the CRT8002 + if (!state) + m_framecnt++; } -void sbrain_state::init_sbrain() +void sbrain_state::machine_start() { - u8 *main = memregion("maincpu")->base(); - u8 *sub = memregion("subcpu")->base(); - - m_bankr0->configure_entry(0, &main[0x0000]); - m_bankr0->configure_entry(1, &sub[0x0000]); - m_bankw0->configure_entry(0, &main[0x0000]); - m_bank2->configure_entry(0, &sub[0x8000]); - m_bank2->configure_entry(1, &main[0x8000]); + std::fill_n(m_ram->pointer(), m_ram->size(), 0x00); + + m_usart[0]->write_cts(0); } static void sbrain_floppies(device_slot_interface &device) @@ -471,20 +593,31 @@ static void sbrain_floppies(device_slot_interface &device) device.option_add("525dd", FLOPPY_525_DD); } -MACHINE_RESET_MEMBER( sbrain_state, sbrain ) +void sbrain_state::machine_reset() { m_keydown = 0; - m_bankr0->set_entry(1); // point at rom - m_bankw0->set_entry(0); // always write to ram - m_bank2->set_entry(1); // point at maincpu bank - m_subcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // hold subcpu in reset + + for (auto &floppy : m_floppy) + { + floppy_image_device *device = floppy->get_device(); + if (device != nullptr) + device->mon_w(0); // motors run all the time + } + + // PPI resets to input mode, which causes PPIC-3 to be pulled up to +5V, resetting disk CPU } -u32 sbrain_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 sbrain_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { + // PPIC-3 blanks entire display + if (BIT(m_portc, 3)) + { + bitmap.fill(rgb_t::black(), cliprect); + return 0; + } + u8 y,ra,chr,gfx; - uint16_t sy=0,ma=0,x; - m_framecnt++; + uint16_t sy=0,x; // Where attributes come from: // - Most systems use ram for character-based attributes, but this one uses strictly hardware which would seem cumbersome @@ -495,40 +628,45 @@ u32 sbrain_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, con // - d5 blank from PC1 (scan-line based) // - d6 flash from bit 7 of each character + uint16_t ma = m_crtc->top_of_page(); + uint16_t cr = m_crtc->cursor_address(); + uint8_t *videoram = &m_ram->pointer()[m_ram->size() - 0x800]; for (y = 0; y < 24; y++) { for (ra = 0; ra < 10; ra++) { - uint16_t *p = &bitmap.pix16(sy++); + uint32_t *p = &bitmap.pix32(sy++); for (x = 0; x < 80; x++) { gfx = 0; - if (ra < 9) + if (ra > 0) { - chr = m_p_videoram[x+ma]; + chr = videoram[(x + ma) & 0x7ff]; if (!BIT(chr, 7) || BIT(m_framecnt, 5)) { chr &= 0x7f; if (chr) - gfx = m_p_chargen[(chr<<4) | ra ]; + gfx = m_p_chargen[(chr<<4) | (ra - 1)]; // ra hacked for incorrect character generator } } + if (((x + ma) & 0xfff) == cr) + gfx ^= 0x7f; + /* Display a scanline of a character */ - *p++ = BIT(gfx, 7); - *p++ = BIT(gfx, 6); - *p++ = BIT(gfx, 5); - *p++ = BIT(gfx, 4); - *p++ = BIT(gfx, 3); - *p++ = BIT(gfx, 2); - *p++ = BIT(gfx, 1); - *p++ = BIT(gfx, 0); + *p++ = BIT(gfx, 6) ? rgb_t::white() : rgb_t::black(); + *p++ = BIT(gfx, 5) ? rgb_t::white() : rgb_t::black(); + *p++ = BIT(gfx, 4) ? rgb_t::white() : rgb_t::black(); + *p++ = BIT(gfx, 3) ? rgb_t::white() : rgb_t::black(); + *p++ = BIT(gfx, 2) ? rgb_t::white() : rgb_t::black(); + *p++ = BIT(gfx, 1) ? rgb_t::white() : rgb_t::black(); + *p++ = BIT(gfx, 0) ? rgb_t::white() : rgb_t::black(); } } - ma+=80; + ma = (ma + 80) & 0xfff; } return 0; } @@ -538,31 +676,26 @@ MACHINE_CONFIG_START(sbrain_state::sbrain) MCFG_DEVICE_ADD("maincpu", Z80, 16_MHz_XTAL / 4) MCFG_DEVICE_PROGRAM_MAP(sbrain_mem) MCFG_DEVICE_IO_MAP(sbrain_io) - MCFG_DEVICE_VBLANK_INT_DRIVER("screen", sbrain_state, irq0_line_hold) MCFG_DEVICE_ADD("subcpu", Z80, 16_MHz_XTAL / 4) MCFG_DEVICE_PROGRAM_MAP(sbrain_submem) MCFG_DEVICE_IO_MAP(sbrain_subio) - MCFG_MACHINE_RESET_OVERRIDE(sbrain_state, sbrain) + RAM(config, m_ram).set_default_size("64K").set_extra_options("32K"); /* video hardware */ MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::amber()) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ MCFG_SCREEN_UPDATE_DRIVER(sbrain_state, screen_update) - MCFG_SCREEN_SIZE(640, 240) - MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 239) - MCFG_SCREEN_PALETTE("palette") - MCFG_PALETTE_ADD_MONOCHROME("palette") - - //MCFG_DEVICE_ADD("crtc", DP8350, 10.92_MHz_XTAL) + DP8350(config, m_crtc, 10.92_MHz_XTAL).set_screen("screen"); // XTAL not directly connected + m_crtc->character_generator_program(1); + m_crtc->lrc_callback().set(FUNC(sbrain_state::crtc_lrc_w)); + m_crtc->vblank_callback().set(FUNC(sbrain_state::crtc_vblank_w)); + m_crtc->vsync_callback().set(FUNC(sbrain_state::crtc_vsync_w)); /* sound hardware */ SPEAKER(config, "mono").front_center(); - MCFG_DEVICE_ADD("beeper", BEEP, 800) - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00) + BEEP(config, m_beep, 800).add_route(ALL_OUTPUTS, "mono", 1.00); /* Devices */ I8255(config, m_ppi); @@ -573,29 +706,46 @@ MACHINE_CONFIG_START(sbrain_state::sbrain) m_ppi->in_pc_callback().set(FUNC(sbrain_state::ppi_pc_r)); m_ppi->out_pc_callback().set(FUNC(sbrain_state::ppi_pc_w)); - I8251(config, m_u0, 0); + I8251(config, m_usart[0], 16_MHz_XTAL / 8); + m_usart[0]->txd_handler().set("auxport", FUNC(rs232_port_device::write_txd)); + + I8251(config, m_usart[1], 16_MHz_XTAL / 8); + m_usart[1]->txd_handler().set(m_mainport, FUNC(rs232_port_device::write_txd)); + m_usart[1]->rts_handler().set(m_mainport, FUNC(rs232_port_device::write_rts)); + m_usart[1]->dtr_handler().set(m_mainport, FUNC(rs232_port_device::write_dtr)); - I8251(config, m_u1, 0); + RS232_PORT(config, m_mainport, default_rs232_devices, nullptr); + m_mainport->rxd_handler().set(m_usart[1], FUNC(i8251_device::write_rxd)); + m_mainport->cts_handler().set(m_usart[1], FUNC(i8251_device::write_cts)); + m_mainport->dsr_handler().set(m_usart[1], FUNC(i8251_device::write_dsr)); + m_mainport->txc_handler().set(FUNC(sbrain_state::external_txc_w)); + m_mainport->rxc_handler().set(FUNC(sbrain_state::external_rxc_w)); + + rs232_port_device &auxport(RS232_PORT(config, "auxport", default_rs232_devices, nullptr)); + auxport.rxd_handler().set(m_usart[0], FUNC(i8251_device::write_rxd)); + auxport.dsr_handler().set(m_usart[0], FUNC(i8251_device::write_dsr)); com8116_device &brg(COM8116(config, "brg", 5.0688_MHz_XTAL)); // BR1941L - brg.fr_handler().set(m_u0, FUNC(i8251_device::write_txc)); - brg.fr_handler().append(m_u0, FUNC(i8251_device::write_rxc)); - brg.ft_handler().set(m_u1, FUNC(i8251_device::write_txc)); - brg.ft_handler().append(m_u1, FUNC(i8251_device::write_rxc)); + brg.fr_handler().set(m_usart[0], FUNC(i8251_device::write_txc)); + brg.fr_handler().append(m_usart[0], FUNC(i8251_device::write_rxc)); + brg.ft_handler().set(FUNC(sbrain_state::internal_txc_rxc_w)); FD1791(config, m_fdc, 16_MHz_XTAL / 16); + m_fdc->set_force_ready(true); MCFG_FLOPPY_DRIVE_ADD("fdc:0", sbrain_floppies, "525dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_SOUND(true) MCFG_FLOPPY_DRIVE_ADD("fdc:1", sbrain_floppies, "525dd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_SOUND(true) + MCFG_FLOPPY_DRIVE_ADD("fdc:2", sbrain_floppies, nullptr, floppy_image_device::default_floppy_formats) + MCFG_FLOPPY_DRIVE_SOUND(true) + MCFG_FLOPPY_DRIVE_ADD("fdc:3", sbrain_floppies, nullptr, floppy_image_device::default_floppy_formats) + MCFG_FLOPPY_DRIVE_SOUND(true) MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_a", sbrain_state, kbd_scan, attotime::from_hz(15)) MACHINE_CONFIG_END ROM_START( sbrain ) - ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) - - ROM_REGION( 0x10000, "subcpu", ROMREGION_ERASEFF ) + ROM_REGION( 0x0800, "subcpu", ROMREGION_ERASEFF ) // only the second CPU has its own ROM ROM_SYSTEM_BIOS( 0, "4_003", "4.003" ) ROMX_LOAD("4_003_vc8001.z69", 0x0000, 0x0800, CRC(3ce3cd53) SHA1(fb6ade6bd67de3d9f911a1a48481ca619bda65ae), ROM_BIOS(0)) ROM_SYSTEM_BIOS( 1, "3_1", "3.1" ) @@ -607,4 +757,4 @@ ROM_START( sbrain ) ROM_LOAD("c10_char.bin", 0x0000, 0x2000, BAD_DUMP CRC(cb530b6f) SHA1(95590bbb433db9c4317f535723b29516b9b9fcbf)) ROM_END -COMP( 1981, sbrain, 0, 0, sbrain, sbrain, sbrain_state, init_sbrain, "Intertec", "Superbrain", MACHINE_NOT_WORKING ) +COMP( 1981, sbrain, 0, 0, sbrain, sbrain, sbrain_state, empty_init, "Intertec Data Systems", "SuperBrain Video Computer System", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/drivers/scobra.cpp b/src/mame/drivers/scobra.cpp index 7091f8bb6d2..6fa9db7ff87 100644 --- a/src/mame/drivers/scobra.cpp +++ b/src/mame/drivers/scobra.cpp @@ -131,15 +131,15 @@ static GFXDECODE_START( gfx_scobra ) GFXDECODE_END -READ8_MEMBER(scobra_state::scobra_type2_ppi8255_0_r){ return m_ppi8255_0->read(space, offset >> 2); } -READ8_MEMBER(scobra_state::scobra_type2_ppi8255_1_r){ return m_ppi8255_1->read(space, offset >> 2); } -WRITE8_MEMBER(scobra_state::scobra_type2_ppi8255_0_w){ m_ppi8255_0->write(space, offset >> 2, data); } -WRITE8_MEMBER(scobra_state::scobra_type2_ppi8255_1_w){ m_ppi8255_1->write(space, offset >> 2, data); } +READ8_MEMBER(scobra_state::scobra_type2_ppi8255_0_r){ return m_ppi8255_0->read(offset >> 2); } +READ8_MEMBER(scobra_state::scobra_type2_ppi8255_1_r){ return m_ppi8255_1->read(offset >> 2); } +WRITE8_MEMBER(scobra_state::scobra_type2_ppi8255_0_w){ m_ppi8255_0->write(offset >> 2, data); } +WRITE8_MEMBER(scobra_state::scobra_type2_ppi8255_1_w){ m_ppi8255_1->write(offset >> 2, data); } -READ8_MEMBER(scobra_state::hustler_ppi8255_0_r){ return m_ppi8255_0->read(space, offset >> 3); } -READ8_MEMBER(scobra_state::hustler_ppi8255_1_r){ return m_ppi8255_1->read(space, offset >> 3); } -WRITE8_MEMBER(scobra_state::hustler_ppi8255_0_w){ m_ppi8255_0->write(space, offset >> 3, data); } -WRITE8_MEMBER(scobra_state::hustler_ppi8255_1_w){ m_ppi8255_1->write(space, offset >> 3, data); } +READ8_MEMBER(scobra_state::hustler_ppi8255_0_r){ return m_ppi8255_0->read(offset >> 3); } +READ8_MEMBER(scobra_state::hustler_ppi8255_1_r){ return m_ppi8255_1->read(offset >> 3); } +WRITE8_MEMBER(scobra_state::hustler_ppi8255_0_w){ m_ppi8255_0->write(offset >> 3, data); } +WRITE8_MEMBER(scobra_state::hustler_ppi8255_1_w){ m_ppi8255_1->write(offset >> 3, data); } void scobra_state::type1_map(address_map &map) { @@ -1265,6 +1265,30 @@ ROM_START( tazmani3 ) ROM_LOAD( "colr6f.cpu", 0x0000, 0x0020, CRC(6a0c7d87) SHA1(140335d85c67c75b65689d4e76d29863c209cf32) ) // sldh ROM_END +ROM_START( tazmaniet ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "13200.bin", 0x0000, 0x1000, CRC(cea9df87) SHA1(e4ecaee74134580978c0fbb209a704151ea013b2) ) + ROM_LOAD( "13201.bin", 0x1000, 0x1000, CRC(21cfe0b3) SHA1(fb5a8b239c06c93483112558a0e1f6269a5d14b2) ) + ROM_LOAD( "13202.bin", 0x2000, 0x1000, CRC(d204732e) SHA1(069dc57e35a653fec65d1fdc19f716e7adea9911) ) + ROM_LOAD( "13203.bin", 0x3000, 0x1000, CRC(5d0651bd) SHA1(436f5f00619a2a05db1b33ba0775367af0c637b3) ) + ROM_LOAD( "13204.bin", 0x4000, 0x1000, CRC(9082ac06) SHA1(cfedfac8a1172ffc2c44e8a87aa527148d24befc) ) + ROM_LOAD( "13205.bin", 0x5000, 0x1000, CRC(9c2a08a2) SHA1(65cbea5db287863ced20c75b3133647ed4b83894) ) + + ROM_REGION( 0x10000, "audiocpu", 0 ) + ROM_LOAD( "13208.bin", 0x0000, 0x0800, CRC(b8d741f1) SHA1(a1bb8a1e0d6b34111f05c539c8e92fffacf5aa5c) ) + + ROM_REGION( 0x1000, "gfx1", 0 ) + ROM_LOAD( "13206.bin", 0x0000, 0x0800, CRC(2c5b612b) SHA1(32e3a41a9a4a8b1285b6a195213ff0d98012360a) ) + ROM_LOAD( "13207.bin", 0x0800, 0x0800, CRC(3f5ff3ac) SHA1(bc70eef54a45b52c14e35464e5f06b5eec554eb6) ) + + ROM_REGION( 0x0020, "proms", 0 ) + ROM_LOAD( "prom.bin", 0x0000, 0x0020, CRC(aa1f7f5e) SHA1(311dd17aa11490a1173c76223e4ccccf8ea29850) ) // same as hustler?! Gives wrong colors + + ROM_REGION( 0x200, "unused_proms", 0) // TODO: are these the correct color PROMs? + ROM_LOAD( "13209.prom", 0x0000, 0x0100, CRC(da1708c9) SHA1(b2633eba050866c6f555ed0fd9be369d69f13683) ) + ROM_LOAD( "13210.prom", 0x0100, 0x0100, CRC(e54d042a) SHA1(e3259b5c178fc5ab43eda27f07107b65555512d3) ) +ROM_END + /* Rescue @@ -1749,6 +1773,7 @@ GAME( 1982, darkplnt, 0, darkplnt, darkplnt, scobra_state, init_darkp GAME( 1982, tazmani2, tazmania, type2, tazmani2, scobra_state, init_tazmani2, ROT90, "Stern Electronics", "Tazz-Mania (set 2, alt hardware)", MACHINE_SUPPORTS_SAVE ) GAME( 1982, tazmani3, tazmania, tazmani3, tazmani3, scobra_state, empty_init, ROT90, "bootleg (Arfyc / Rodmar)", "Tazz-Mania (Arfyc / Rodmar bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1982, tazmaniet, tazmania, tazmani3, tazmani3, scobra_state, init_tazmaniet,ROT90, "bootleg (U.R.V. BBCPE)", "Tazz-Mania - El Trompa (U.R.V. BBCPE bootleg)", MACHINE_WRONG_COLORS | MACHINE_SUPPORTS_SAVE ) GAME( 1982, rescue, 0, rescue, rescue, scobra_state, init_rescue, ROT90, "Stern Electronics", "Rescue", MACHINE_SUPPORTS_SAVE ) GAME( 1982, rescueb, rescue, rescueb, rescue, scobra_state, init_rescue, ROT90, "bootleg (Videl Games)", "Tuono Blu (bootleg of Rescue)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/scopus.cpp b/src/mame/drivers/scopus.cpp index 8f0d45ed5ea..1228aa52d88 100644 --- a/src/mame/drivers/scopus.cpp +++ b/src/mame/drivers/scopus.cpp @@ -133,8 +133,7 @@ void sagitta180_state::maincpu_map(address_map &map) void sagitta180_state::maincpu_io_map(address_map &map) { map(0x00, 0x00).portr("DSW"); - map(0x20, 0x20).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x21, 0x21).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x20, 0x21).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x30, 0x31).rw(m_crtc, FUNC(i8275_device::read), FUNC(i8275_device::write)); map(0x40, 0x48).rw(m_dma8257, FUNC(i8257_device::read), FUNC(i8257_device::write)); } diff --git a/src/mame/drivers/scramble.cpp b/src/mame/drivers/scramble.cpp index b71a4a7de38..1a0b4086d90 100644 --- a/src/mame/drivers/scramble.cpp +++ b/src/mame/drivers/scramble.cpp @@ -111,22 +111,22 @@ void scramble_state::ckongs_map(address_map &map) READ8_MEMBER(scramble_state::mars_ppi8255_0_r) { - return m_ppi8255_0->read(space, ((offset >> 2) & 0x02) | ((offset >> 1) & 0x01)); + return m_ppi8255_0->read(((offset >> 2) & 0x02) | ((offset >> 1) & 0x01)); } READ8_MEMBER(scramble_state::mars_ppi8255_1_r) { - return m_ppi8255_1->read(space, ((offset >> 2) & 0x02) | ((offset >> 1) & 0x01)); + return m_ppi8255_1->read(((offset >> 2) & 0x02) | ((offset >> 1) & 0x01)); } WRITE8_MEMBER(scramble_state::mars_ppi8255_0_w) { - m_ppi8255_0->write(space, ((offset >> 2) & 0x02) | ((offset >> 1) & 0x01), data); + m_ppi8255_0->write(((offset >> 2) & 0x02) | ((offset >> 1) & 0x01), data); } WRITE8_MEMBER(scramble_state::mars_ppi8255_1_w) { - m_ppi8255_1->write(space, ((offset >> 2) & 0x02) | ((offset >> 1) & 0x01), data); + m_ppi8255_1->write(((offset >> 2) & 0x02) | ((offset >> 1) & 0x01), data); } void scramble_state::mars_map(address_map &map) @@ -2293,7 +2293,7 @@ GAME( 1981, mariner, 0, mariner, scramble, scramble_state, init_mariner GAME( 1981, 800fath, mariner, mariner, 800fath, scramble_state, init_mariner, ROT90, "Amenip (US Billiards Inc. license)", "800 Fathoms", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_SOUND ) GAME( 1981, 800fatha, mariner, mariner, 800fath, scramble_state, init_mariner, ROT90, "Amenip (US Billiards Inc. license)", "800 Fathoms (older)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_SOUND ) -GAME( 1981, ckongs, ckong, ckongs, ckongs, scramble_state, init_ckongs, ROT90, "bootleg", "Crazy Kong (Scramble hardware)", MACHINE_SUPPORTS_SAVE ) +GAME( 1981, ckongs, ckong, ckongs, ckongs, scramble_state, empty_init, ROT90, "bootleg", "Crazy Kong (Scramble hardware)", MACHINE_SUPPORTS_SAVE ) GAME( 1981, mars, 0, mars, mars, scramble_state, init_mars, ROT90, "Artic", "Mars", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/sderby.cpp b/src/mame/drivers/sderby.cpp index 05050f26ffb..1c28ae4a10f 100644 --- a/src/mame/drivers/sderby.cpp +++ b/src/mame/drivers/sderby.cpp @@ -1042,8 +1042,8 @@ ROM_END ******************************/ // YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS LAYOUT -GAMEL( 1996, sderby, 0, sderby, sderby, sderby_state, empty_init, ROT0, "Playmark", "Super Derby (v.07.03)", 0, layout_sderby ) -GAMEL( 1996, sderbya, sderby, sderbya, sderbya, sderby_state, empty_init, ROT0, "Playmark", "Super Derby (v.10.04)", 0, layout_sderby ) +GAMEL( 1996, sderby, 0, sderby, sderby, sderby_state, empty_init, ROT0, "Playmark", "Super Derby (Playmark, v.07.03)", 0, layout_sderby ) +GAMEL( 1996, sderbya, sderby, sderbya, sderbya, sderby_state, empty_init, ROT0, "Playmark", "Super Derby (Playmark, v.10.04)", 0, layout_sderby ) GAMEL( 1996, spacewin, 0, spacewin, spacewin, sderby_state, empty_init, ROT0, "Playmark", "Scacco Matto / Space Win", 0, layout_spacewin ) GAME( 1996, shinygld, 0, shinygld, shinygld, sderby_state, empty_init, ROT0, "Playmark", "Shiny Golds", 0 ) GAMEL( 1997, croupier, 0, pmroulet, pmroulet, sderby_state, empty_init, ROT0, "Playmark", "Croupier (Playmark Roulette v.20.05)", MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING, layout_pmroulet ) diff --git a/src/mame/drivers/sdk51.cpp b/src/mame/drivers/sdk51.cpp new file mode 100644 index 00000000000..a00dbef6757 --- /dev/null +++ b/src/mame/drivers/sdk51.cpp @@ -0,0 +1,321 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/******************************************************************************* + + Skeleton driver for Intel MCS-51 System Design Kit (SDK-51). + +*******************************************************************************/ + +#include "emu.h" +#include "bus/rs232/rs232.h" +#include "cpu/mcs51/mcs51.h" +#include "cpu/mcs48/mcs48.h" +//#include "imagedev/cassette.h" +#include "machine/bankdev.h" +#include "machine/i8155.h" +#include "machine/i8243.h" +#include "machine/i8251.h" + +class sdk51_state : public driver_device +{ +public: + sdk51_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_progmem(*this, "progmem") + , m_datamem(*this, "datamem") + , m_mem0(*this, "mem0") + , m_upi(*this, "upi") + , m_usart(*this, "usart") + , m_cycles(*this, "cycles") + , m_kb(*this, "KB%u", 0U) + { + } + + void sdk51(machine_config &config); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + +private: + void psen_map(address_map &map); + void movx_map(address_map &map); + void progmem_map(address_map &map); + void datamem_map(address_map &map); + void mem0_map(address_map &map); + + DECLARE_READ8_MEMBER(psen_r); + DECLARE_READ8_MEMBER(datamem_r); + DECLARE_WRITE8_MEMBER(datamem_w); + + u8 brkmem_r(offs_t offset); + void brkmem_w(offs_t offset, u8 data); + + u8 upibus_r(); + void upibus_w(u8 data); + DECLARE_WRITE_LINE_MEMBER(display_clock_w); + DECLARE_WRITE_LINE_MEMBER(upiobf_w); + void serial_control_w(u8 data); + + required_device<mcs51_cpu_device> m_maincpu; + required_device<address_map_bank_device> m_progmem; + required_device<address_map_bank_device> m_datamem; + required_device<address_map_bank_device> m_mem0; + required_device<upi41_cpu_device> m_upi; + required_device<i8251_device> m_usart; + required_region_ptr<u8> m_cycles; + required_ioport_array<7> m_kb; + + bool m_upiobf; + u8 m_serial_control; + u32 m_kdtime; + bool m_display_clock; +}; + +READ8_MEMBER(sdk51_state::psen_r) +{ + return m_progmem->read8(space, offset); +} + +READ8_MEMBER(sdk51_state::datamem_r) +{ + return m_datamem->read8(space, offset); +} + +WRITE8_MEMBER(sdk51_state::datamem_w) +{ + m_datamem->write8(space, offset, data); +} + +u8 sdk51_state::brkmem_r(offs_t offset) +{ + return 1 | (m_upiobf ? 2 : 0); +} + +void sdk51_state::brkmem_w(offs_t offset, u8 data) +{ + m_mem0->set_bank(0); +} + +u8 sdk51_state::upibus_r() +{ + u8 result = 0xff; + + if (!BIT(m_serial_control, 0)) + result &= m_usart->read(BIT(m_serial_control, 2)); + + if (!BIT(m_upi->p2_r(), 6)) + for (int n = 0; n < 7; n++) + if (BIT(m_kdtime, n)) + result &= m_kb[n]->read(); + + return result; +} + +void sdk51_state::upibus_w(u8 data) +{ + if (!BIT(m_serial_control, 1)) + m_usart->write(BIT(m_serial_control, 2), data); +} + +void sdk51_state::serial_control_w(u8 data) +{ + m_serial_control = data; +} + +WRITE_LINE_MEMBER(sdk51_state::display_clock_w) +{ + if (!m_display_clock && state) + m_kdtime = ((m_kdtime << 1) & 0xfffffe) | BIT(m_upi->p1_r(), 6); + + m_display_clock = state; +} + +WRITE_LINE_MEMBER(sdk51_state::upiobf_w) +{ + if (m_upiobf != bool(state)) + { + m_upiobf = state; + m_maincpu->set_input_line(MCS51_INT0_LINE, state ? ASSERT_LINE : CLEAR_LINE); + } +} + +void sdk51_state::psen_map(address_map &map) +{ + map(0x0000, 0xffff).r(FUNC(sdk51_state::psen_r)); +} + +void sdk51_state::movx_map(address_map &map) +{ + map(0x0000, 0xffff).rw(FUNC(sdk51_state::datamem_r), FUNC(sdk51_state::datamem_w)); +} + +void sdk51_state::progmem_map(address_map &map) +{ + map(0x0000, 0x1fff).m(m_mem0, FUNC(address_map_bank_device::amap8)); + map(0x2000, 0x3fff).ram(); + map(0xe000, 0xffff).rom().region("monitor", 0); +} + +void sdk51_state::datamem_map(address_map &map) +{ + progmem_map(map); + map(0xa000, 0xa001).mirror(0xffe).rw(m_upi, FUNC(upi41_cpu_device::upi41_master_r), FUNC(upi41_cpu_device::upi41_master_w)); + map(0xb000, 0xb0ff).mirror(0x700).rw("io", FUNC(i8155_device::memory_r), FUNC(i8155_device::memory_w)); + map(0xb800, 0xb807).mirror(0x7f8).rw("io", FUNC(i8155_device::io_r), FUNC(i8155_device::io_w)); + map(0xc000, 0xdfff).rw(FUNC(sdk51_state::brkmem_r), FUNC(sdk51_state::brkmem_w)); +} + +void sdk51_state::mem0_map(address_map &map) +{ + map(0x0000, 0x1fff).ram(); + map(0x2000, 0x2fff).mirror(0x1000).rom().region("monitor", 0); +} + +static INPUT_PORTS_START(sdk51) + PORT_START("KB0") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Shift") PORT_CHAR(UCHAR_SHIFT_1) PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Control") PORT_CODE(KEYCODE_LCONTROL) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(0x09) PORT_CODE(KEYCODE_TAB) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(0x1b) PORT_CODE(KEYCODE_ESC) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Rubout") PORT_CHAR(0x7f) PORT_CODE(KEYCODE_BACKSPACE) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(' ') PORT_CODE(KEYCODE_SPACE) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('@') PORT_CODE(KEYCODE_OPENBRACE) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Return") PORT_CHAR(0x0d) PORT_CODE(KEYCODE_ENTER) + + PORT_START("KB1") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('0') PORT_CHAR('\\') PORT_CODE(KEYCODE_0) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('1') PORT_CHAR('!') PORT_CODE(KEYCODE_1) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('2') PORT_CHAR('"') PORT_CODE(KEYCODE_2) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('3') PORT_CHAR('#') PORT_CODE(KEYCODE_3) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('4') PORT_CHAR('$') PORT_CODE(KEYCODE_4) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('5') PORT_CHAR('%') PORT_CODE(KEYCODE_5) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('6') PORT_CHAR('&') PORT_CODE(KEYCODE_6) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('7') PORT_CHAR('\'') PORT_CODE(KEYCODE_7) + + PORT_START("KB2") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('8') PORT_CHAR('(') PORT_CODE(KEYCODE_8) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('9') PORT_CHAR(')') PORT_CODE(KEYCODE_9) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('-') PORT_CHAR('=') PORT_CODE(KEYCODE_MINUS) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(';') PORT_CHAR('+') PORT_CODE(KEYCODE_COLON) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(':') PORT_CHAR('*') PORT_CODE(KEYCODE_QUOTE) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('/') PORT_CHAR('?') PORT_CODE(KEYCODE_SLASH) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('.') PORT_CHAR(']') PORT_CODE(KEYCODE_STOP) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(',') PORT_CHAR('[') PORT_CODE(KEYCODE_COMMA) + + PORT_START("KB3") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('A') PORT_CODE(KEYCODE_A) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('B') PORT_CODE(KEYCODE_B) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('C') PORT_CODE(KEYCODE_C) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('D') PORT_CODE(KEYCODE_D) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('E') PORT_CODE(KEYCODE_E) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('F') PORT_CODE(KEYCODE_F) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('G') PORT_CODE(KEYCODE_G) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('H') PORT_CODE(KEYCODE_H) + + PORT_START("KB4") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('I') PORT_CODE(KEYCODE_I) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('J') PORT_CODE(KEYCODE_J) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('K') PORT_CODE(KEYCODE_K) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('L') PORT_CODE(KEYCODE_L) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('M') PORT_CODE(KEYCODE_M) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('N') PORT_CODE(KEYCODE_N) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('O') PORT_CODE(KEYCODE_O) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('P') PORT_CODE(KEYCODE_P) + + PORT_START("KB5") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('Q') PORT_CODE(KEYCODE_Q) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('R') PORT_CODE(KEYCODE_R) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('S') PORT_CODE(KEYCODE_S) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('T') PORT_CODE(KEYCODE_T) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('U') PORT_CODE(KEYCODE_U) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('V') PORT_CODE(KEYCODE_V) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('W') PORT_CODE(KEYCODE_W) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('X') PORT_CODE(KEYCODE_X) + + PORT_START("KB6") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('Y') PORT_CODE(KEYCODE_Y) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('Z') PORT_CODE(KEYCODE_Z) + PORT_BIT(0xfc, IP_ACTIVE_LOW, IPT_UNUSED) +INPUT_PORTS_END + +void sdk51_state::machine_start() +{ + m_upiobf = false; + m_serial_control = 0x0f; + m_display_clock = true; + + save_item(NAME(m_upiobf)); + save_item(NAME(m_serial_control)); + save_item(NAME(m_kdtime)); + save_item(NAME(m_display_clock)); +} + +void sdk51_state::machine_reset() +{ + m_mem0->set_bank(1); + m_kdtime = 0; +} + +void sdk51_state::sdk51(machine_config &config) +{ + I8031(config, m_maincpu, 12_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &sdk51_state::psen_map); + m_maincpu->set_addrmap(AS_IO, &sdk51_state::movx_map); + + ADDRESS_MAP_BANK(config, m_progmem); + m_progmem->set_addrmap(0, &sdk51_state::progmem_map); + m_progmem->set_data_width(8); + m_progmem->set_addr_width(16); + + ADDRESS_MAP_BANK(config, m_datamem); + m_datamem->set_addrmap(0, &sdk51_state::datamem_map); + m_datamem->set_data_width(8); + m_datamem->set_addr_width(16); + + ADDRESS_MAP_BANK(config, m_mem0); + m_mem0->set_addrmap(0, &sdk51_state::mem0_map); + m_mem0->set_data_width(8); + m_mem0->set_addr_width(14); + m_mem0->set_stride(0x2000); + + I8041(config, m_upi, 6_MHz_XTAL); + m_upi->p1_in_cb().set(FUNC(sdk51_state::upibus_r)); + m_upi->p1_out_cb().set(FUNC(sdk51_state::upibus_w)); + m_upi->p2_in_cb().set("upiexp", FUNC(i8243_device::p2_r)); + m_upi->p2_out_cb().set(FUNC(sdk51_state::display_clock_w)).bit(7); + m_upi->p2_out_cb().append(FUNC(sdk51_state::upiobf_w)).bit(4); + m_upi->p2_out_cb().append("upiexp", FUNC(i8243_device::p2_w)).mask(0x0f); + m_upi->prog_out_cb().set("upiexp", FUNC(i8243_device::prog_w)); + m_upi->t1_in_cb().set(m_usart, FUNC(i8251_device::txrdy_r)); + + i8243_device &upiexp(I8243(config, "upiexp")); + upiexp.p4_out_cb().set(FUNC(sdk51_state::serial_control_w)); + + i8155_device &io(I8155(config, "io", 6_MHz_XTAL / 3)); + io.out_to_callback().set(m_usart, FUNC(i8251_device::write_txc)); + io.out_to_callback().append(m_usart, FUNC(i8251_device::write_txc)); + + I8251(config, m_usart, 6_MHz_XTAL / 3); + m_usart->txd_handler().set("rs232", FUNC(rs232_port_device::write_txd)); + m_usart->rts_handler().set("rs232", FUNC(rs232_port_device::write_rts)); + + rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, nullptr)); + rs232.rxd_handler().set(m_usart, FUNC(i8251_device::write_rxd)); + rs232.cts_handler().set(m_usart, FUNC(i8251_device::write_cts)); +} + +ROM_START(sdk51) + ROM_REGION(0x2000, "monitor", 0) // "SDK-51 MONITOR VER. 1.03" + ROM_LOAD("u59-e000.bin", 0x0000, 0x1000, CRC(cc6c7b05) SHA1(ead75920347ff19487e730e90e1e1f7207d44601)) + ROM_LOAD("u60-f000.bin", 0x1000, 0x1000, CRC(da6e664d) SHA1(18416106307f37dba6dbb789f3d39fe6d5294755)) + + ROM_REGION(0x0400, "upi", 0) + ROM_LOAD("u41-8041a.bin", 0x000, 0x400, CRC(02f38b69) SHA1(ab2ac73b69b3297572583242ed5bd717eb116c37)) + + ROM_REGION(0x0200, "cycles", 0) + ROM_LOAD("u63-3622a.bin", 0x000, 0x200, CRC(85cbd498) SHA1(f0214b6d02d6d153b5fafd9adf5a23013373c9c4)) // pin 9 output stuck high but not used +ROM_END + +COMP(1981, sdk51, 0, 0, sdk51, sdk51, sdk51_state, empty_init, "Intel", "MCS-51 System Design Kit", MACHINE_IS_SKELETON) diff --git a/src/mame/drivers/sdk80.cpp b/src/mame/drivers/sdk80.cpp index ebdc7cd6a2d..1a3be1c2c6f 100644 --- a/src/mame/drivers/sdk80.cpp +++ b/src/mame/drivers/sdk80.cpp @@ -83,8 +83,7 @@ void sdk80_state::sdk80_io(address_map &map) map.global_mask(0xff); map(0xec, 0xef).rw(m_ppi_1, FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0xf4, 0xf7).rw(m_ppi_0, FUNC(i8255_device::read), FUNC(i8255_device::write)); - map(0xfa, 0xfa).rw(m_usart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xfb, 0xfb).rw(m_usart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xfa, 0xfb).rw(m_usart, FUNC(i8251_device::read), FUNC(i8251_device::write)); } static INPUT_PORTS_START( sdk80 ) diff --git a/src/mame/drivers/sdk85.cpp b/src/mame/drivers/sdk85.cpp index 8115b0b9a42..1989ead5fc6 100644 --- a/src/mame/drivers/sdk85.cpp +++ b/src/mame/drivers/sdk85.cpp @@ -167,12 +167,12 @@ MACHINE_CONFIG_START(sdk85_state::sdk85) config.set_default_layout(layout_sdk85); /* Devices */ - i8279_device &kdc(I8279(config, "kdc", 6.144_MHz_XTAL / 2)); // Keyboard/Display Controller (A13) - kdc.out_irq_callback().set_inputline("maincpu", I8085_RST55_LINE); // irq - kdc.out_sl_callback().set(FUNC(sdk85_state::scanlines_w)); // scan SL lines - kdc.out_disp_callback().set(FUNC(sdk85_state::digit_w)); // display A&B - kdc.in_rl_callback().set(FUNC(sdk85_state::kbd_r)); // kbd RL lines - kdc.in_shift_callback().set_constant(1); // Shift key + i8279_device &kdc(I8279(config, "kdc", 6.144_MHz_XTAL / 2)); // Keyboard/Display Controller (A13) + kdc.out_irq_callback().set_inputline("maincpu", I8085_RST55_LINE); // irq + kdc.out_sl_callback().set(FUNC(sdk85_state::scanlines_w)); // scan SL lines + kdc.out_disp_callback().set(FUNC(sdk85_state::digit_w)); // display A&B + kdc.in_rl_callback().set(FUNC(sdk85_state::kbd_r)); // kbd RL lines + kdc.in_shift_callback().set_constant(1); // Shift key kdc.in_ctrl_callback().set_constant(1); MACHINE_CONFIG_END diff --git a/src/mame/drivers/sdk86.cpp b/src/mame/drivers/sdk86.cpp index 7bec26e7c31..62232115d66 100644 --- a/src/mame/drivers/sdk86.cpp +++ b/src/mame/drivers/sdk86.cpp @@ -73,8 +73,7 @@ void sdk86_state::sdk86_mem(address_map &map) void sdk86_state::sdk86_io(address_map &map) { map.unmap_value_high(); - map(0xfff0, 0xfff0).mirror(4).rw(I8251_TAG, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xfff2, 0xfff2).mirror(4).rw(I8251_TAG, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xfff0, 0xfff3).mirror(4).rw(I8251_TAG, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0xffe8, 0xffeb).mirror(4).rw("i8279", FUNC(i8279_device::read), FUNC(i8279_device::write)).umask16(0x00ff); map(0xfff8, 0xffff).rw("port1", FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0xff00); map(0xfff8, 0xffff).rw("port2", FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0x00ff); @@ -170,11 +169,11 @@ MACHINE_CONFIG_START(sdk86_state::sdk86) usart_clock.signal_handler().set(I8251_TAG, FUNC(i8251_device::write_txc)); usart_clock.signal_handler().append(I8251_TAG, FUNC(i8251_device::write_rxc)); - i8279_device &kbdc(I8279(config, "i8279", 2500000)); // based on divider - kbdc.out_sl_callback().set(FUNC(sdk86_state::scanlines_w)); // scan SL lines - kbdc.out_disp_callback().set(FUNC(sdk86_state::digit_w)); // display A&B - kbdc.in_rl_callback().set(FUNC(sdk86_state::kbd_r)); // kbd RL lines - kbdc.in_shift_callback().set_constant(0); // Shift key + i8279_device &kbdc(I8279(config, "i8279", 2500000)); // based on divider + kbdc.out_sl_callback().set(FUNC(sdk86_state::scanlines_w)); // scan SL lines + kbdc.out_disp_callback().set(FUNC(sdk86_state::digit_w)); // display A&B + kbdc.in_rl_callback().set(FUNC(sdk86_state::kbd_r)); // kbd RL lines + kbdc.in_shift_callback().set_constant(0); // Shift key kbdc.in_ctrl_callback().set_constant(0); MCFG_DEVICE_ADD("port1", I8255A, 0) diff --git a/src/mame/drivers/seattlecmp.cpp b/src/mame/drivers/seattlecmp.cpp index 0d9a1745a07..eaedcf1ab3f 100644 --- a/src/mame/drivers/seattlecmp.cpp +++ b/src/mame/drivers/seattlecmp.cpp @@ -83,8 +83,7 @@ void seattle_comp_state::io_map(address_map &map) map(0xf0, 0xf1).rw("pic1", FUNC(pic8259_device::read), FUNC(pic8259_device::write)); map(0xf2, 0xf3).rw("pic2", FUNC(pic8259_device::read), FUNC(pic8259_device::write)); map(0xf4, 0xf5).rw("stc", FUNC(am9513_device::read8), FUNC(am9513_device::write8)); - map(0xf6, 0xf6).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xf7, 0xf7).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xf6, 0xf7).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); //AM_RANGE(0xfc, 0xfd) Parallel data, status, serial DCD //AM_RANGE(0xfe, 0xff) Eprom disable bit, read sense switches (bank of 8 dipswitches) } diff --git a/src/mame/drivers/segae.cpp b/src/mame/drivers/segae.cpp index 099ccd3bf1e..0bdaa32e98c 100644 --- a/src/mame/drivers/segae.cpp +++ b/src/mame/drivers/segae.cpp @@ -363,7 +363,7 @@ private: required_device<cpu_device> m_maincpu; required_device<sega315_5124_device> m_vdp1; required_device<sega315_5124_device> m_vdp2; - required_device<i8255_device> m_ppi; + required_device<i8255_device> m_ppi; optional_shared_ptr<uint8_t> m_decrypted_opcodes; required_memory_region m_maincpu_region; @@ -928,11 +928,12 @@ void systeme_state::hangonjr(machine_config &config) m_ppi->out_pc_callback().set(FUNC(systeme_state::hangonjr_port_fa_write)); // CD4051 selector input } -MACHINE_CONFIG_START(systeme_state::ridleofp) +void systeme_state::ridleofp(machine_config &config) +{ systeme(config); - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) // on 834-6193 I/O sub board - MCFG_UPD4701_PORTX("PAD1") - MCFG_UPD4701_PORTY("PAD2") + upd4701_device &upd4701(UPD4701A(config, "upd4701")); // on 834-6193 I/O sub board + upd4701.set_portx_tag("PAD1"); + upd4701.set_porty_tag("PAD2"); i8255_device &ppi(*subdevice<i8255_device>("ppi")); ppi.in_pa_callback().set("upd4701", FUNC(upd4701_device::d_r)); @@ -941,7 +942,7 @@ MACHINE_CONFIG_START(systeme_state::ridleofp) ppi.out_pc_callback().append("upd4701", FUNC(upd4701_device::ul_w)).bit(2); ppi.out_pc_callback().append("upd4701", FUNC(upd4701_device::resetx_w)).bit(1); // or possibly bit 0 ppi.out_pc_callback().append("upd4701", FUNC(upd4701_device::resety_w)).bit(0); // or possibly bit 1 -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(systeme_state::systemex) systeme(config); diff --git a/src/mame/drivers/segahang.cpp b/src/mame/drivers/segahang.cpp index 97915c88bba..271b1b68bc6 100644 --- a/src/mame/drivers/segahang.cpp +++ b/src/mame/drivers/segahang.cpp @@ -167,7 +167,7 @@ READ16_MEMBER( segahang_state::hangon_io_r ) switch (offset & 0x3020/2) { case 0x0000/2: // PPI @ 4B - return m_i8255_1->read(space, offset & 3); + return m_i8255_1->read(offset & 3); case 0x1000/2: // Input ports and DIP switches { @@ -176,7 +176,7 @@ READ16_MEMBER( segahang_state::hangon_io_r ) } case 0x3000/2: // PPI @ 4C - return m_i8255_2->read(space, offset & 3); + return m_i8255_2->read(offset & 3); case 0x3020/2: // ADC0804 data output return m_adc_ports[m_adc_select].read_safe(0); @@ -203,7 +203,7 @@ WRITE16_MEMBER( segahang_state::hangon_io_w ) return; case 0x3000/2: // PPI @ 4C - m_i8255_2->write(space, offset & 3, data & 0xff); + m_i8255_2->write(offset & 3, data & 0xff); return; case 0x3020/2: // ADC0804 @@ -224,7 +224,7 @@ READ16_MEMBER( segahang_state::sharrier_io_r ) switch (offset & 0x0030/2) { case 0x0000/2: - return m_i8255_1->read(space, offset & 3); + return m_i8255_1->read(offset & 3); case 0x0010/2: // Input ports and DIP switches { @@ -234,7 +234,7 @@ READ16_MEMBER( segahang_state::sharrier_io_r ) case 0x0020/2: // PPI @ 4C if (offset == 2) return 0; - return m_i8255_2->read(space, offset & 3); + return m_i8255_2->read(offset & 3); case 0x0030/2: // ADC0804 data output return m_adc_ports[m_adc_select].read_safe(0); @@ -262,7 +262,7 @@ WRITE16_MEMBER( segahang_state::sharrier_io_w ) return; case 0x0020/2: // PPI @ 4C - m_i8255_2->write(space, offset & 3, data & 0xff); + m_i8255_2->write(offset & 3, data & 0xff); return; case 0x0030/2: // ADC0804 @@ -362,7 +362,7 @@ void segahang_state::device_timer(emu_timer &timer, device_timer_id id, int para // synchronize writes to the 8255 PPI case TID_PPI_WRITE: - m_i8255_1->write(m_maincpu->space(AS_PROGRAM), param >> 8, param & 0xff); + m_i8255_1->write(param >> 8, param & 0xff); break; } } diff --git a/src/mame/drivers/segajw.cpp b/src/mame/drivers/segajw.cpp index 0663a496d53..42536438fbb 100644 --- a/src/mame/drivers/segajw.cpp +++ b/src/mame/drivers/segajw.cpp @@ -408,7 +408,8 @@ MACHINE_CONFIG_START(segajw_state::segajw) MCFG_SCREEN_PALETTE("palette") MCFG_PALETTE_ADD("palette", 16) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, "palette")); + ramdac.set_addrmap(0, &segajw_state::ramdac_map); MCFG_HD63484_ADD("hd63484", 8000000, segajw_hd63484_map) // unknown clock diff --git a/src/mame/drivers/segam1.cpp b/src/mame/drivers/segam1.cpp index 6894a9183ae..944e974b39d 100644 --- a/src/mame/drivers/segam1.cpp +++ b/src/mame/drivers/segam1.cpp @@ -235,8 +235,7 @@ void segam1_state::segam1_comms_map(address_map &map) map(0x0000, 0x7fff).rom(); map(0x8000, 0x9fff).ram(); map(0xa000, 0xa7ff).rw("dpram", FUNC(mb8421_device::left_r), FUNC(mb8421_device::left_w)); - map(0xc000, 0xc000).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xc001, 0xc001).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xc000, 0xc001).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xe003, 0xe003).nopw(); // ??? } diff --git a/src/mame/drivers/segaorun.cpp b/src/mame/drivers/segaorun.cpp index 11e30d91cfd..aa9363fc9bd 100644 --- a/src/mame/drivers/segaorun.cpp +++ b/src/mame/drivers/segaorun.cpp @@ -642,7 +642,7 @@ READ16_MEMBER( segaorun_state::outrun_custom_io_r ) switch (offset & 0x70/2) { case 0x00/2: - return m_i8255->read(space, offset & 3); + return m_i8255->read(offset & 3); case 0x10/2: { @@ -678,7 +678,7 @@ WRITE16_MEMBER( segaorun_state::outrun_custom_io_w ) { case 0x00/2: if (ACCESSING_BITS_0_7) - m_i8255->write(space, offset & 3, data); + m_i8255->write(offset & 3, data); return; case 0x20/2: diff --git a/src/mame/drivers/segas16a.cpp b/src/mame/drivers/segas16a.cpp index 1f64ffd81e9..df5b3c157d2 100644 --- a/src/mame/drivers/segas16a.cpp +++ b/src/mame/drivers/segas16a.cpp @@ -247,7 +247,7 @@ READ16_MEMBER( segas16a_state::standard_io_r ) switch (offset & (0x3000/2)) { case 0x0000/2: - return m_i8255->read(space, offset & 3); + return m_i8255->read(offset & 3); case 0x1000/2: { @@ -371,14 +371,15 @@ WRITE8_MEMBER( segas16a_state::n7751_control_w ) // n7751_rom_offset_w - post expander callback //------------------------------------------------- -WRITE8_MEMBER( segas16a_state::n7751_rom_offset_w ) +template<int Shift> +void segas16a_state::n7751_rom_offset_w(uint8_t data) { // P4 - address lines 0-3 // P5 - address lines 4-7 // P6 - address lines 8-11 // P7 - address lines 12-13 - int mask = (0xf << (4 * offset)) & 0x3fff; - int newdata = (data << (4 * offset)) & mask; + int mask = (0xf << Shift) & 0x3fff; + int newdata = (data << Shift) & mask; m_n7751_rom_address = (m_n7751_rom_address & ~mask) | newdata; } @@ -405,7 +406,7 @@ READ8_MEMBER( segas16a_state::n7751_p2_r ) { // read from P2 - 8255's PC0-2 connects to 7751's S0-2 (P24-P26 on an 8048) // bit 0x80 is an alternate way to control the sample on/off; doesn't appear to be used - return 0x80 | ((m_n7751_command & 0x07) << 4) | (m_n7751_i8243->p2_r(space, offset) & 0x0f); + return 0x80 | ((m_n7751_command & 0x07) << 4) | (m_n7751_i8243->p2_r() & 0x0f); } @@ -416,7 +417,7 @@ READ8_MEMBER( segas16a_state::n7751_p2_r ) WRITE8_MEMBER( segas16a_state::n7751_p2_w ) { // write to P2; low 4 bits go to 8243 - m_n7751_i8243->p2_w(space, offset, data & 0x0f); + m_n7751_i8243->p2_w(data & 0x0f); // output of bit $80 indicates we are ready (1) or busy (0) // no other outputs are used @@ -627,7 +628,7 @@ void segas16a_state::device_timer(emu_timer &timer, device_timer_id id, int para // synchronize writes to the 8255 PPI case TID_PPI_WRITE: - m_i8255->write(m_maincpu->space(AS_PROGRAM), param >> 8, param & 0xff); + m_i8255->write(param >> 8, param & 0xff); break; } } @@ -1982,8 +1983,10 @@ MACHINE_CONFIG_START(segas16a_state::system16a) MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE("n7751_8243", i8243_device, prog_w)) I8243(config, m_n7751_i8243); - m_n7751_i8243->read_handler().set_constant(0); - m_n7751_i8243->write_handler().set(FUNC(segas16a_state::n7751_rom_offset_w)); + m_n7751_i8243->p4_out_cb().set(FUNC(segas16a_state::n7751_rom_offset_w<0>)); + m_n7751_i8243->p5_out_cb().set(FUNC(segas16a_state::n7751_rom_offset_w<4>)); + m_n7751_i8243->p6_out_cb().set(FUNC(segas16a_state::n7751_rom_offset_w<8>)); + m_n7751_i8243->p7_out_cb().set(FUNC(segas16a_state::n7751_rom_offset_w<12>)); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); diff --git a/src/mame/drivers/segas16b.cpp b/src/mame/drivers/segas16b.cpp index 185727ea2e3..8f7a07316ce 100644 --- a/src/mame/drivers/segas16b.cpp +++ b/src/mame/drivers/segas16b.cpp @@ -3787,16 +3787,17 @@ MACHINE_CONFIG_START(segas16b_state::system16b_fd1094) MCFG_DEVICE_VBLANK_INT_DRIVER("screen", segas16b_state, irq4_line_hold) MACHINE_CONFIG_END -MACHINE_CONFIG_START(segas16b_state::aceattacb_fd1094) +void segas16b_state::aceattacb_fd1094(machine_config &config) +{ system16b_fd1094(config); // 834-6602 I/O board - MCFG_DEVICE_ADD("upd4701a1", UPD4701A, 0) - MCFG_DEVICE_ADD("upd4701a2", UPD4701A, 0) + UPD4701A(config, m_upd4701a[0]); + UPD4701A(config, m_upd4701a[1]); CXD1095(config, m_cxdio, 0); m_cxdio->in_porta_cb().set_ioport("HANDX1"); m_cxdio->in_portb_cb().set_ioport("HANDX2"); -MACHINE_CONFIG_END +} MACHINE_CONFIG_START(segas16b_state::system16b_i8751) diff --git a/src/mame/drivers/segas18.cpp b/src/mame/drivers/segas18.cpp index a18216ca514..80fd2c5c55d 100644 --- a/src/mame/drivers/segas18.cpp +++ b/src/mame/drivers/segas18.cpp @@ -1405,35 +1405,37 @@ void segas18_state::lghost(machine_config &config) m_io->out_pc_callback().set(FUNC(segas18_state::lghost_gun_recoil_w)); } -MACHINE_CONFIG_START(segas18_state::wwally_fd1094) +void segas18_state::wwally_fd1094(machine_config &config) +{ system18_fd1094(config); - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX1") - MCFG_UPD4701_PORTY("TRACKY1") + UPD4701A(config, m_upd4701[0]); + m_upd4701[0]->set_portx_tag("TRACKX1"); + m_upd4701[0]->set_porty_tag("TRACKY1"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX2") - MCFG_UPD4701_PORTY("TRACKY2") + UPD4701A(config, m_upd4701[1]); + m_upd4701[1]->set_portx_tag("TRACKX2"); + m_upd4701[1]->set_porty_tag("TRACKY2"); - MCFG_DEVICE_ADD("upd3", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX3") - MCFG_UPD4701_PORTY("TRACKY3") -MACHINE_CONFIG_END + UPD4701A(config, m_upd4701[2]); + m_upd4701[2]->set_portx_tag("TRACKX3"); + m_upd4701[2]->set_porty_tag("TRACKY3"); +} -MACHINE_CONFIG_START(segas18_state::wwally) +void segas18_state::wwally(machine_config &config) +{ system18(config); - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX1") - MCFG_UPD4701_PORTY("TRACKY1") + UPD4701A(config, m_upd4701[0]); + m_upd4701[0]->set_portx_tag("TRACKX1"); + m_upd4701[0]->set_porty_tag("TRACKY1"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX2") - MCFG_UPD4701_PORTY("TRACKY2") + UPD4701A(config, m_upd4701[1]); + m_upd4701[1]->set_portx_tag("TRACKX2"); + m_upd4701[1]->set_porty_tag("TRACKY2"); - MCFG_DEVICE_ADD("upd3", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX3") - MCFG_UPD4701_PORTY("TRACKY3") -MACHINE_CONFIG_END + UPD4701A(config, m_upd4701[2]); + m_upd4701[2]->set_portx_tag("TRACKX3"); + m_upd4701[2]->set_porty_tag("TRACKY3"); +} MACHINE_CONFIG_START(segas18_state::system18_i8751) system18(config); diff --git a/src/mame/drivers/segas24.cpp b/src/mame/drivers/segas24.cpp index d952187fa00..11d9975a551 100644 --- a/src/mame/drivers/segas24.cpp +++ b/src/mame/drivers/segas24.cpp @@ -376,6 +376,8 @@ enum { void segas24_state::fdc_init() { + m_fdc_track_side = 0; + m_fdc_mode = 0; m_fdc_status = 0; m_fdc_track = 0; m_fdc_sector = 0; @@ -386,6 +388,18 @@ void segas24_state::fdc_init() m_fdc_index_count = 0; } +void segas24_state::device_post_load() +{ + switch(m_fdc_mode) { + case 0x9: + case 0xb: + m_fdc_pt = &m_floppy[m_track_size*(2*m_fdc_phys_track+m_fdc_track_side) + (m_track_size - m_fdc_span)]; + break; + default: + break; + } +} + READ16_MEMBER( segas24_state::fdc_r ) { if(!m_track_size) @@ -445,21 +459,26 @@ WRITE16_MEMBER( segas24_state::fdc_w ) m_fdc_status = m_fdc_track ? 0 : 4; break; case 0x9: - FDC_LOG(("Read multiple [%02x] %d..%d side %d track %d\n", data, m_fdc_sector, m_fdc_sector+m_fdc_data-1, data & 8 ? 1 : 0, m_fdc_phys_track)); - m_fdc_pt = &m_floppy[m_track_size*(2*m_fdc_phys_track+(data & 8 ? 1 : 0))]; + m_fdc_track_side = (data & 8 ? 1 : 0); + m_fdc_mode = 0x9; + FDC_LOG(("Read multiple [%02x] %d..%d side %d track %d\n", data, m_fdc_sector, m_fdc_sector+m_fdc_data-1, m_fdc_track_side, m_fdc_phys_track)); + m_fdc_pt = &m_floppy[m_track_size*(2*m_fdc_phys_track+m_fdc_track_side)]; m_fdc_span = m_track_size; m_fdc_status = 3; m_fdc_drq = true; m_fdc_data = *m_fdc_pt; break; case 0xb: - FDC_LOG(("Write multiple [%02x] %d..%d side %d track %d\n", data, m_fdc_sector, m_fdc_sector+m_fdc_data-1, data & 8 ? 1 : 0, m_fdc_phys_track)); - m_fdc_pt = &m_floppy[m_track_size*(2*m_fdc_phys_track+(data & 8 ? 1 : 0))]; + m_fdc_track_side = (data & 8 ? 1 : 0); + m_fdc_mode = 0xb; + FDC_LOG(("Write multiple [%02x] %d..%d side %d track %d\n", data, m_fdc_sector, m_fdc_sector+m_fdc_data-1, m_fdc_track_side, m_fdc_phys_track)); + m_fdc_pt = &m_floppy[m_track_size*(2*m_fdc_phys_track+m_fdc_track_side)]; m_fdc_span = m_track_size; m_fdc_status = 3; m_fdc_drq = true; break; case 0xd: + m_fdc_mode = 0xd; FDC_LOG(("FDC: Forced interrupt\n")); m_fdc_span = 0; m_fdc_drq = false; @@ -661,22 +680,20 @@ void segas24_state::reset_bank() { if (m_romboard != nullptr) { - membank("bank1")->set_entry(m_curbank & 15); - membank("bank2")->set_entry(m_curbank & 15); + m_rombank[0]->set_entry(m_curbank & 15); + m_rombank[1]->set_entry(m_curbank & 15); } } -READ16_MEMBER( segas24_state::curbank_r ) +READ8_MEMBER( segas24_state::curbank_r ) { return m_curbank; } -WRITE16_MEMBER( segas24_state::curbank_w ) +WRITE8_MEMBER( segas24_state::curbank_w ) { - if(ACCESSING_BITS_0_7) { - m_curbank = data & 0xff; - reset_bank(); - } + m_curbank = data; + reset_bank(); } READ8_MEMBER( segas24_state::frc_mode_r ) @@ -719,33 +736,29 @@ const uint8_t segas24_state::s_quizmeku_mlt[8] = { 0, 3, 2, 4, 6, 1, 7, 5 }; const uint8_t segas24_state::s_dcclub_mlt[8] = { 4, 7, 3, 0, 2, 6, 5, 1 }; -READ16_MEMBER( segas24_state::mlatch_r ) +READ8_MEMBER( segas24_state::mlatch_r ) { return m_mlatch; } -WRITE16_MEMBER( segas24_state::mlatch_w ) +WRITE8_MEMBER( segas24_state::mlatch_w ) { - if(ACCESSING_BITS_0_7) { - int i; - uint8_t mxor = 0; - if(!m_mlatch_table) { - logerror("Protection: magic latch accessed but no table loaded %s\n", machine().describe_context()); - return; - } - - data &= 0xff; + int i; + uint8_t mxor = 0; + if(!m_mlatch_table) { + logerror("Protection: magic latch accessed but no table loaded %s\n", machine().describe_context()); + return; + } - if(data != 0xff) { - for(i=0; i<8; i++) - if(m_mlatch & (1<<i)) - mxor |= 1 << m_mlatch_table[i]; - m_mlatch = data ^ mxor; - logerror("Magic latching %02x ^ %02x as %02x %s\n", data & 0xff, mxor, m_mlatch, machine().describe_context()); - } else { - logerror("Magic latch reset %s\n", machine().describe_context()); - m_mlatch = 0x00; - } + if(data != 0xff) { + for(i=0; i<8; i++) + if(m_mlatch & (1<<i)) + mxor |= 1 << m_mlatch_table[i]; + m_mlatch = data ^ mxor; + logerror("Magic latching %02x ^ %02x as %02x %s\n", data & 0xff, mxor, m_mlatch, machine().describe_context()); + } else { + logerror("Magic latch reset %s\n", machine().describe_context()); + m_mlatch = 0x00; } } @@ -972,16 +985,16 @@ WRITE_LINE_MEMBER(segas24_state::irq_ym) // 315-5242 -READ16_MEMBER( segas24_state::sys16_paletteram_r ) +READ16_MEMBER( segas24_state::paletteram_r ) { - return m_generic_paletteram_16[offset]; + return m_paletteram[offset]; } -WRITE16_MEMBER( segas24_state::sys16_paletteram_w ) +WRITE16_MEMBER( segas24_state::paletteram_w ) { int r, g, b; - COMBINE_DATA (m_generic_paletteram_16 + offset); - data = m_generic_paletteram_16[offset]; + COMBINE_DATA (m_paletteram + offset); + data = m_paletteram[offset]; r = (data & 0x00f) << 4; if(data & 0x1000) @@ -1036,7 +1049,7 @@ fc-ff ramhi /************************************* * - * CPU 1 memory handlers + * Shared memory handlers * *************************************/ @@ -1063,9 +1076,8 @@ fc-ff ramhi */ -void segas24_state::system24_cpu1_map(address_map &map) +void segas24_state::common_map(address_map &map) { - map(0x000000, 0x03ffff).mirror(0x040000).rom().region("maincpu", 0); map(0x080000, 0x0bffff).mirror(0x040000).ram().share("share1"); map(0x100000, 0x13ffff).mirror(0x0c0000).rom().region("maincpu", 0); map(0x200000, 0x20ffff).mirror(0x110000).rw("tile", FUNC(segas24_tile_device::tile_r), FUNC(segas24_tile_device::tile_w)); @@ -1074,7 +1086,7 @@ void segas24_state::system24_cpu1_map(address_map &map) map(0x260000, 0x260001).mirror(0x10fffe).nopw(); /* Frame trigger position (XVOUT) */ map(0x270000, 0x270001).mirror(0x10fffe).nopw(); /* Synchronization mode */ map(0x280000, 0x29ffff).mirror(0x160000).rw("tile", FUNC(segas24_tile_device::char_r), FUNC(segas24_tile_device::char_w)); - map(0x400000, 0x403fff).mirror(0x1f8000).rw(FUNC(segas24_state::sys16_paletteram_r), FUNC(segas24_state::sys16_paletteram_w)).share("paletteram"); + map(0x400000, 0x403fff).mirror(0x1f8000).rw(FUNC(segas24_state::paletteram_r), FUNC(segas24_state::paletteram_w)).share("paletteram"); map(0x404000, 0x40401f).mirror(0x1fbfe0).rw("mixer", FUNC(segas24_mixer_device::read), FUNC(segas24_mixer_device::write)); map(0x600000, 0x63ffff).mirror(0x180000).rw("sprite", FUNC(segas24_sprite_device::read), FUNC(segas24_sprite_device::write)); map(0x800000, 0x80003f).mirror(0x1ffe00).rw("io", FUNC(sega_315_5296_device::read), FUNC(sega_315_5296_device::write)).umask16(0x00ff); @@ -1083,29 +1095,31 @@ void segas24_state::system24_cpu1_map(address_map &map) map(0xa00000, 0xa00007).mirror(0x0ffff8).rw(FUNC(segas24_state::irq_r), FUNC(segas24_state::irq_w)); map(0xb00000, 0xb00007).mirror(0x07fff0).rw(FUNC(segas24_state::fdc_r), FUNC(segas24_state::fdc_w)); map(0xb00008, 0xb0000f).mirror(0x07fff0).rw(FUNC(segas24_state::fdc_status_r), FUNC(segas24_state::fdc_ctrl_w)); - map(0xb80000, 0xbbffff).bankr("bank1"); - map(0xbc0000, 0xbc0001).mirror(0x03fff8).rw(FUNC(segas24_state::curbank_r), FUNC(segas24_state::curbank_w)); map(0xbc0003, 0xbc0003).mirror(0x03fff8).rw(FUNC(segas24_state::frc_mode_r), FUNC(segas24_state::frc_mode_w)); map(0xbc0005, 0xbc0005).mirror(0x03fff8).rw(FUNC(segas24_state::frc_r), FUNC(segas24_state::frc_w)); - map(0xbc0006, 0xbc0007).mirror(0x03fff8).rw(FUNC(segas24_state::mlatch_r), FUNC(segas24_state::mlatch_w)); - map(0xc80000, 0xcbffff).bankr("bank2"); - map(0xcc0000, 0xcc0001).mirror(0x03fff8).rw(FUNC(segas24_state::curbank_r), FUNC(segas24_state::curbank_w)); + map(0xbc0007, 0xbc0007).mirror(0x03fff8).rw(FUNC(segas24_state::mlatch_r), FUNC(segas24_state::mlatch_w)); map(0xcc0003, 0xcc0003).mirror(0x03fff8).rw(FUNC(segas24_state::frc_mode_r), FUNC(segas24_state::frc_mode_w)); map(0xcc0005, 0xcc0005).mirror(0x03fff8).rw(FUNC(segas24_state::frc_r), FUNC(segas24_state::frc_w)); - map(0xcc0006, 0xcc0007).mirror(0x03fff8).rw(FUNC(segas24_state::mlatch_r), FUNC(segas24_state::mlatch_w)); + map(0xcc0007, 0xcc0007).mirror(0x03fff8).rw(FUNC(segas24_state::mlatch_r), FUNC(segas24_state::mlatch_w)); map(0xf00000, 0xf3ffff).mirror(0x040000).ram().share("subcpu"); map(0xf80000, 0xfbffff).mirror(0x040000).ram().share("share1"); } -void segas24_state::roughrac_cpu1_map(address_map &map) +void segas24_state::rombd_common_map(address_map &map) +{ + map(0xb80000, 0xbbffff).bankr("rombank1"); + map(0xbc0001, 0xbc0001).mirror(0x03fff8).rw(FUNC(segas24_state::curbank_r), FUNC(segas24_state::curbank_w)); + map(0xc80000, 0xcbffff).bankr("rombank2"); + map(0xcc0001, 0xcc0001).mirror(0x03fff8).rw(FUNC(segas24_state::curbank_r), FUNC(segas24_state::curbank_w)); +} + +void segas24_state::roughrac_common_map(address_map &map) { - system24_cpu1_map(map); map(0xc00000, 0xc00007).mirror(0x07ffe0).r("upd4701", FUNC(upd4701_device::read_xy)).umask16(0x00ff); } -void segas24_state::hotrod_cpu1_map(address_map &map) +void segas24_state::hotrod_common_map(address_map &map) { - system24_cpu1_map(map); map(0xc00000, 0xc00007).mirror(0x07ffe0).r("upd1", FUNC(upd4701_device::read_xy)).umask16(0x00ff); map(0xc00008, 0xc0000f).mirror(0x07ffe0).r("upd2", FUNC(upd4701_device::read_xy)).umask16(0x00ff); map(0xc00011, 0xc00011).mirror(0x07ffec).rw("adc1", FUNC(msm6253_device::d7_r), FUNC(msm6253_device::select_w)); @@ -1113,6 +1127,36 @@ void segas24_state::hotrod_cpu1_map(address_map &map) } +/************************************* + * + * CPU 1 memory handlers + * + *************************************/ + +void segas24_state::cpu1_map(address_map &map) +{ + common_map(map); + map(0x000000, 0x03ffff).mirror(0x040000).rom().region("maincpu", 0); +} + +void segas24_state::rombd_cpu1_map(address_map &map) +{ + cpu1_map(map); + rombd_common_map(map); +} + +void segas24_state::roughrac_cpu1_map(address_map &map) +{ + cpu1_map(map); + roughrac_common_map(map); +} + +void segas24_state::hotrod_cpu1_map(address_map &map) +{ + cpu1_map(map); + hotrod_common_map(map); +} + /************************************* * @@ -1120,53 +1164,28 @@ void segas24_state::hotrod_cpu1_map(address_map &map) * *************************************/ -void segas24_state::system24_cpu2_map(address_map &map) +void segas24_state::cpu2_map(address_map &map) { + common_map(map); map(0x000000, 0x03ffff).mirror(0x040000).ram().share("subcpu"); - map(0x080000, 0x0bffff).mirror(0x040000).ram().share("share1"); - map(0x100000, 0x13ffff).mirror(0x0c0000).rom().region("maincpu", 0); - map(0x200000, 0x20ffff).mirror(0x110000).rw("tile", FUNC(segas24_tile_device::tile_r), FUNC(segas24_tile_device::tile_w)); - map(0x220000, 0x220001).mirror(0x11fffe).nopw(); /* Horizontal split position (ABSEL) */ - map(0x240000, 0x240001).mirror(0x11fffe).nopw(); /* Scanline trigger position (XHOUT) */ - map(0x260000, 0x260001).mirror(0x10fffe).nopw(); /* Frame trigger position (XVOUT) */ - map(0x270000, 0x270001).mirror(0x10fffe).nopw(); /* Synchronization mode */ - map(0x280000, 0x29ffff).mirror(0x160000).rw("tile", FUNC(segas24_tile_device::char_r), FUNC(segas24_tile_device::char_w)); - map(0x400000, 0x403fff).mirror(0x1f8000).rw(FUNC(segas24_state::sys16_paletteram_r), FUNC(segas24_state::sys16_paletteram_w)).share("paletteram"); - map(0x404000, 0x40401f).mirror(0x1fbfe0).rw("mixer", FUNC(segas24_mixer_device::read), FUNC(segas24_mixer_device::write)); - map(0x600000, 0x63ffff).mirror(0x180000).rw("sprite", FUNC(segas24_sprite_device::read), FUNC(segas24_sprite_device::write)); - map(0x800000, 0x80003f).mirror(0x1ffe00).rw("io", FUNC(sega_315_5296_device::read), FUNC(sega_315_5296_device::write)).umask16(0x00ff); - map(0x800040, 0x80007f).mirror(0x1ffe00).rw(FUNC(segas24_state::iod_r), FUNC(segas24_state::iod_w)); - map(0x800100, 0x800103).mirror(0x1ffe00).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)).umask16(0x00ff); - map(0xa00000, 0xa00007).mirror(0x0ffff8).rw(FUNC(segas24_state::irq_r), FUNC(segas24_state::irq_w)); - map(0xb00000, 0xb00007).mirror(0x07fff0).rw(FUNC(segas24_state::fdc_r), FUNC(segas24_state::fdc_w)); - map(0xb00008, 0xb0000f).mirror(0x07fff0).rw(FUNC(segas24_state::fdc_status_r), FUNC(segas24_state::fdc_ctrl_w)); - map(0xb80000, 0xbbffff).bankr("bank1"); - map(0xbc0000, 0xbc0001).mirror(0x03fff8).rw(FUNC(segas24_state::curbank_r), FUNC(segas24_state::curbank_w)); - map(0xbc0003, 0xbc0003).mirror(0x03fff8).rw(FUNC(segas24_state::frc_mode_r), FUNC(segas24_state::frc_mode_w)); - map(0xbc0005, 0xbc0005).mirror(0x03fff8).rw(FUNC(segas24_state::frc_r), FUNC(segas24_state::frc_w)); - map(0xbc0006, 0xbc0007).mirror(0x03fff8).rw(FUNC(segas24_state::mlatch_r), FUNC(segas24_state::mlatch_w)); - map(0xc80000, 0xcbffff).bankr("bank2"); - map(0xcc0000, 0xcc0001).mirror(0x03fff8).rw(FUNC(segas24_state::curbank_r), FUNC(segas24_state::curbank_w)); - map(0xcc0003, 0xcc0003).mirror(0x03fff8).rw(FUNC(segas24_state::frc_mode_r), FUNC(segas24_state::frc_mode_w)); - map(0xcc0005, 0xcc0005).mirror(0x03fff8).rw(FUNC(segas24_state::frc_r), FUNC(segas24_state::frc_w)); - map(0xcc0006, 0xcc0007).mirror(0x03fff8).rw(FUNC(segas24_state::mlatch_r), FUNC(segas24_state::mlatch_w)); - map(0xf00000, 0xf3ffff).mirror(0x040000).ram().share("subcpu"); - map(0xf80000, 0xfbffff).mirror(0x040000).ram().share("share1"); +} + +void segas24_state::rombd_cpu2_map(address_map &map) +{ + cpu2_map(map); + rombd_common_map(map); } void segas24_state::roughrac_cpu2_map(address_map &map) { - system24_cpu2_map(map); - map(0xc00000, 0xc00007).mirror(0x07ffe0).r("upd4701", FUNC(upd4701_device::read_xy)).umask16(0x00ff); + cpu2_map(map); + roughrac_common_map(map); } void segas24_state::hotrod_cpu2_map(address_map &map) { - system24_cpu2_map(map); - map(0xc00000, 0xc00007).mirror(0x07ffe0).r("upd1", FUNC(upd4701_device::read_xy)).umask16(0x00ff); - map(0xc00008, 0xc0000f).mirror(0x07ffe0).r("upd2", FUNC(upd4701_device::read_xy)).umask16(0x00ff); - map(0xc00011, 0xc00011).mirror(0x07ffec).rw("adc1", FUNC(msm6253_device::d7_r), FUNC(msm6253_device::select_w)); - map(0xc00013, 0xc00013).mirror(0x07ffec).rw("adc2", FUNC(msm6253_device::d7_r), FUNC(msm6253_device::select_w)); + cpu2_map(map); + hotrod_common_map(map); } void segas24_state::decrypted_opcodes_map(address_map &map) @@ -1182,15 +1201,48 @@ void segas24_state::decrypted_opcodes_map(address_map &map) void segas24_state::machine_start() { + if ((m_romboard != nullptr) && (m_rombank[0] != nullptr) && (m_rombank[1] != nullptr)) + { + uint8_t *usr1 = m_romboard->base(); + m_rombank[0]->configure_entries(0, 16, usr1, 0x40000); + m_rombank[1]->configure_entries(0, 16, usr1, 0x40000); + + save_item(NAME(m_curbank)); + } + if (m_track_size) + { subdevice<nvram_device>("floppy_nvram")->set_base(&m_floppy[0], 2*m_track_size); - if (m_romboard != nullptr) - { - uint8_t *usr1 = m_romboard->base(); - membank("bank1")->configure_entries(0, 16, usr1, 0x40000); - membank("bank2")->configure_entries(0, 16, usr1, 0x40000); + save_item(NAME(m_fdc_track_side)); + save_item(NAME(m_fdc_mode)); + save_item(NAME(m_fdc_status)); + save_item(NAME(m_fdc_track)); + save_item(NAME(m_fdc_sector)); + save_item(NAME(m_fdc_data)); + save_item(NAME(m_fdc_phys_track)); + save_item(NAME(m_fdc_irq)); + save_item(NAME(m_fdc_drq)); + save_item(NAME(m_fdc_span)); + save_item(NAME(m_fdc_index_count)); } + + save_item(NAME(m_mlatch)); + + save_item(NAME(m_irq_tdata)); + save_item(NAME(m_irq_tval)); + save_item(NAME(m_irq_tmode)); + save_item(NAME(m_irq_allow0)); + save_item(NAME(m_irq_allow1)); + save_item(NAME(m_irq_timer_pend0)); + save_item(NAME(m_irq_timer_pend1)); + save_item(NAME(m_irq_yms)); + save_item(NAME(m_irq_vblank)); + save_item(NAME(m_irq_sprite)); + + save_item(NAME(m_frc_mode)); + + save_item(NAME(m_cnt1)); } void segas24_state::machine_reset() @@ -1198,12 +1250,15 @@ void segas24_state::machine_reset() m_subcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); m_cnt1 = true; fdc_init(); - m_curbank = 0; - reset_bank(); irq_init(); m_mlatch = 0x00; m_frc_mode = 0; m_frc_cnt_timer->reset(); + if ((m_romboard != nullptr) && (m_rombank[0] != nullptr) && (m_rombank[1] != nullptr)) + { + m_curbank = 0; + reset_bank(); + } } /************************************* @@ -1864,12 +1919,12 @@ INPUT_PORTS_END MACHINE_CONFIG_START(segas24_state::system24) /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", M68000, MASTER_CLOCK/2) - MCFG_DEVICE_PROGRAM_MAP(system24_cpu1_map) + M68000(config, m_maincpu, MASTER_CLOCK/2); + m_maincpu->set_addrmap(AS_PROGRAM, &segas24_state::cpu1_map); MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", segas24_state, irq_vbl, "screen", 0, 1) - MCFG_DEVICE_ADD("subcpu", M68000, MASTER_CLOCK/2) - MCFG_DEVICE_PROGRAM_MAP(system24_cpu2_map) + M68000(config, m_subcpu, MASTER_CLOCK/2); + m_subcpu->set_addrmap(AS_PROGRAM, &segas24_state::cpu2_map); MCFG_QUANTUM_TIME(attotime::from_hz(6000)) @@ -1898,7 +1953,7 @@ MACHINE_CONFIG_START(segas24_state::system24) MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK) MCFG_SCREEN_RAW_PARAMS(VIDEO_CLOCK/2, 656, 0/*+69*/, 496/*+69*/, 424, 0/*+25*/, 384/*+25*/) - MCFG_SCREEN_UPDATE_DRIVER(segas24_state, screen_update_system24) + MCFG_SCREEN_UPDATE_DRIVER(segas24_state, screen_update) MCFG_SCREEN_PALETTE("palette") MCFG_PALETTE_ADD("palette", 8192*2) @@ -1916,9 +1971,16 @@ MACHINE_CONFIG_START(segas24_state::system24) MCFG_SOUND_ROUTE(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac", -1.0, DAC_VREF_NEG_INPUT) MACHINE_CONFIG_END -void segas24_state::mahmajn(machine_config &config) +void segas24_state::system24_rom(machine_config &config) { system24(config); + m_maincpu->set_addrmap(AS_PROGRAM, &segas24_state::rombd_cpu1_map); + m_subcpu->set_addrmap(AS_PROGRAM, &segas24_state::rombd_cpu2_map); +} + +void segas24_state::mahmajn(machine_config &config) +{ + system24_rom(config); sega_315_5296_device &io(*subdevice<sega_315_5296_device>("io")); io.in_pa_callback().set(FUNC(segas24_state::mahmajn_input_line_r)); io.in_pc_callback().set(FUNC(segas24_state::mahmajn_inputs_r)); @@ -1931,20 +1993,25 @@ void segas24_state::system24_floppy(machine_config &config) NVRAM(config, "floppy_nvram", nvram_device::DEFAULT_NONE); } +void segas24_state::system24_floppy_rom(machine_config &config) +{ + system24_floppy(config); + m_maincpu->set_addrmap(AS_PROGRAM, &segas24_state::rombd_cpu1_map); + m_subcpu->set_addrmap(AS_PROGRAM, &segas24_state::rombd_cpu2_map); +} + MACHINE_CONFIG_START(segas24_state::system24_floppy_hotrod) system24_floppy(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(hotrod_cpu1_map) - MCFG_DEVICE_MODIFY("subcpu") - MCFG_DEVICE_PROGRAM_MAP(hotrod_cpu2_map) + m_maincpu->set_addrmap(AS_PROGRAM, &segas24_state::hotrod_cpu1_map); + m_subcpu->set_addrmap(AS_PROGRAM, &segas24_state::hotrod_cpu2_map); - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) // IC4 on 834-6510 I/O board - MCFG_UPD4701_PORTX("DIAL1") - MCFG_UPD4701_PORTY("DIAL2") + upd4701_device &upd1(UPD4701A(config, "upd1")); // IC4 on 834-6510 I/O board + upd1.set_portx_tag("DIAL1"); + upd1.set_porty_tag("DIAL2"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) // IC1 - MCFG_UPD4701_PORTX("DIAL3") - MCFG_UPD4701_PORTY("DIAL4") + upd4701_device &upd2(UPD4701A(config, "upd2")); // IC1 + upd2.set_portx_tag("DIAL3"); + upd2.set_porty_tag("DIAL4"); MCFG_DEVICE_ADD("adc1", MSM6253, 0) // IC5 - 33k/33p R/C clock MCFG_MSM6253_IN0_ANALOG_PORT("PEDAL1") @@ -1955,28 +2022,27 @@ MACHINE_CONFIG_START(segas24_state::system24_floppy_hotrod) MCFG_DEVICE_ADD("adc2", MSM6253, 0) // IC2 - 33k/33p R/C clock MACHINE_CONFIG_END -MACHINE_CONFIG_START(segas24_state::system24_floppy_fd1094) +void segas24_state::system24_floppy_fd1094(machine_config &config) +{ system24_floppy(config); - MCFG_DEVICE_REPLACE("subcpu", FD1094, MASTER_CLOCK/2) - MCFG_DEVICE_PROGRAM_MAP(system24_cpu2_map) - MCFG_DEVICE_OPCODES_MAP(decrypted_opcodes_map) -MACHINE_CONFIG_END + FD1094(config.replace(), m_subcpu, MASTER_CLOCK/2); + m_subcpu->set_addrmap(AS_PROGRAM, &segas24_state::cpu2_map); + m_subcpu->set_addrmap(AS_OPCODES, &segas24_state::decrypted_opcodes_map); +} MACHINE_CONFIG_START(segas24_state::system24_floppy_fd_upd) system24_floppy_fd1094(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(roughrac_cpu1_map) - MCFG_DEVICE_MODIFY("subcpu") - MCFG_DEVICE_PROGRAM_MAP(roughrac_cpu2_map) - - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) // IC4 on 834-6510-01 I/O board - MCFG_UPD4701_PORTX("DIAL1") - MCFG_UPD4701_PORTY("DIAL2") + m_maincpu->set_addrmap(AS_PROGRAM, &segas24_state::roughrac_cpu1_map); + m_subcpu->set_addrmap(AS_PROGRAM, &segas24_state::roughrac_cpu2_map); + + upd4701_device &upd4701(UPD4701A(config, "upd4701")); // IC4 on 834-6510 I/O board + upd4701.set_portx_tag("DIAL1"); + upd4701.set_porty_tag("DIAL2"); MACHINE_CONFIG_END void segas24_state::dcclub(machine_config &config) { - system24(config); + system24_rom(config); sega_315_5296_device &io(*subdevice<sega_315_5296_device>("io")); io.in_pa_callback().set(FUNC(segas24_state::dcclub_p1_r)); io.in_pc_callback().set(FUNC(segas24_state::dcclub_p3_r)); @@ -2368,6 +2434,7 @@ void segas24_state::init_mahmajn() m_mlatch_table = s_mahmajn_mlt; m_track_size = 0; m_cur_input_line = 0; + save_item(NAME(m_cur_input_line)); } void segas24_state::init_mahmajn2() @@ -2375,6 +2442,7 @@ void segas24_state::init_mahmajn2() m_mlatch_table = s_mahmajn2_mlt; m_track_size = 0; m_cur_input_line = 0; + save_item(NAME(m_cur_input_line)); } void segas24_state::init_hotrod() @@ -2484,17 +2552,17 @@ void segas24_state::init_roughrac() /* 05 */GAME( 1989, sgmastc, sgmast, system24_floppy_fd1094, sgmast, segas24_state, init_sgmast, ROT0, "Sega", "Jumbo Ozaki Super Masters Golf (World, Floppy Based, FD1094 317-0058-05c)", MACHINE_IMPERFECT_GRAPHICS ) // some gfx offset / colour probs? /* 05 */GAME( 1989, sgmastj, sgmast, system24_floppy_fd_upd, sgmastj, segas24_state, init_sgmast, ROT0, "Sega", "Jumbo Ozaki Super Masters Golf (Japan, Floppy Based, FD1094 317-0058-05b)", MACHINE_IMPERFECT_GRAPHICS ) // some gfx offset / colour probs? /* 06 */GAME( 1990, roughrac, 0, system24_floppy_fd_upd, roughrac, segas24_state, init_roughrac, ROT0, "Sega", "Rough Racer (Japan, Floppy Based, FD1094 317-0058-06b)", 0 ) -/* 07 */GAME( 1990, bnzabros, 0, system24_floppy, bnzabros, segas24_state, init_bnzabros, ROT0, "Sega", "Bonanza Bros (US, Floppy DS3-5000-07d? Based)", 0 ) -/* 07 */GAME( 1990, bnzabrosj, bnzabros, system24_floppy, bnzabros, segas24_state, init_bnzabros, ROT0, "Sega", "Bonanza Bros (Japan, Floppy DS3-5000-07b Based)", 0 ) +/* 07 */GAME( 1990, bnzabros, 0, system24_floppy_rom, bnzabros, segas24_state, init_bnzabros, ROT0, "Sega", "Bonanza Bros (US, Floppy DS3-5000-07d? Based)", 0 ) +/* 07 */GAME( 1990, bnzabrosj, bnzabros, system24_floppy_rom, bnzabros, segas24_state, init_bnzabros, ROT0, "Sega", "Bonanza Bros (Japan, Floppy DS3-5000-07b Based)", 0 ) /* 08 */GAME( 1991, qsww, 0, system24_floppy_fd1094, qsww, segas24_state, init_qsww, ROT0, "Sega", "Quiz Syukudai wo Wasuremashita (Japan, Floppy Based, FD1094 317-0058-08b)", MACHINE_IMPERFECT_GRAPHICS ) // wrong bg colour on title /* 09 */GAME( 1991, dcclubfd, dcclub, system24_floppy_dcclub, dcclub, segas24_state, init_dcclubfd, ROT0, "Sega", "Dynamic Country Club (US, Floppy Based, FD1094 317-0058-09d)", 0 ) -// YEAR NAME PARENT MACHINE INPUT CLASS INIT MONITOR COMPANY FULLNAME FLAGS +// YEAR NAME PARENT MACHINE INPUT CLASS INIT MONITOR COMPANY FULLNAME FLAGS /* ROM Based */ -GAME( 1991, dcclub, 0, dcclub, dcclub, segas24_state, init_dcclub, ROT0, "Sega", "Dynamic Country Club (World, ROM Based)", 0 ) -GAME( 1991, dcclubj, dcclub, dcclub, dcclub, segas24_state, init_dcclub, ROT0, "Sega", "Dynamic Country Club (Japan, ROM Based)", 0 ) -GAME( 1991, qrouka, 0, system24, qrouka, segas24_state, init_qrouka, ROT0, "Sega", "Quiz Rouka Ni Tattenasai (Japan, ROM Based)", 0 ) -GAME( 1992, quizmeku, 0, system24, quizmeku, segas24_state, init_quizmeku, ROT0, "Sega", "Quiz Mekurumeku Story (Japan, ROM Based)", 0 ) /* Released in 05.1993 */ -GAME( 1992, mahmajn, 0, mahmajn, mahmajn, segas24_state, init_mahmajn, ROT0, "Sega", "Tokoro San no MahMahjan (Japan, ROM Based)", 0 ) -GAME( 1994, qgh, 0, system24, qgh, segas24_state, init_qgh, ROT0, "Sega", "Quiz Ghost Hunter (Japan, ROM Based)", 0 ) -GAME( 1994, mahmajn2, 0, mahmajn, mahmajn, segas24_state, init_mahmajn2, ROT0, "Sega", "Tokoro San no MahMahjan 2 (Japan, ROM Based)", 0 ) +GAME( 1991, dcclub, 0, dcclub, dcclub, segas24_state, init_dcclub, ROT0, "Sega", "Dynamic Country Club (World, ROM Based)", 0 ) +GAME( 1991, dcclubj, dcclub, dcclub, dcclub, segas24_state, init_dcclub, ROT0, "Sega", "Dynamic Country Club (Japan, ROM Based)", 0 ) +GAME( 1991, qrouka, 0, system24_rom, qrouka, segas24_state, init_qrouka, ROT0, "Sega", "Quiz Rouka Ni Tattenasai (Japan, ROM Based)", 0 ) +GAME( 1992, quizmeku, 0, system24_rom, quizmeku, segas24_state, init_quizmeku, ROT0, "Sega", "Quiz Mekurumeku Story (Japan, ROM Based)", 0 ) /* Released in 05.1993 */ +GAME( 1992, mahmajn, 0, mahmajn, mahmajn, segas24_state, init_mahmajn, ROT0, "Sega", "Tokoro San no MahMahjan (Japan, ROM Based)", 0 ) +GAME( 1994, qgh, 0, system24_rom, qgh, segas24_state, init_qgh, ROT0, "Sega", "Quiz Ghost Hunter (Japan, ROM Based)", 0 ) +GAME( 1994, mahmajn2, 0, mahmajn, mahmajn, segas24_state, init_mahmajn2, ROT0, "Sega", "Tokoro San no MahMahjan 2 (Japan, ROM Based)", 0 ) diff --git a/src/mame/drivers/segas32.cpp b/src/mame/drivers/segas32.cpp index d0a659bb374..3631259645f 100644 --- a/src/mame/drivers/segas32.cpp +++ b/src/mame/drivers/segas32.cpp @@ -2326,17 +2326,17 @@ MACHINE_CONFIG_START(segas32_trackball_state::device_add_mconfig) MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_PROGRAM_MAP(system32_trackball_map) - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX1") - MCFG_UPD4701_PORTY("TRACKY1") + upd4701_device &upd1(UPD4701A(config, "upd1")); + upd1.set_portx_tag("TRACKX1"); + upd1.set_porty_tag("TRACKY1"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX2") - MCFG_UPD4701_PORTY("TRACKY2") + upd4701_device &upd2(UPD4701A(config, "upd2")); + upd2.set_portx_tag("TRACKX2"); + upd2.set_porty_tag("TRACKY2"); - MCFG_DEVICE_ADD("upd3", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX3") - MCFG_UPD4701_PORTY("TRACKY3") + upd4701_device &upd3(UPD4701A(config, "upd3")); + upd3.set_portx_tag("TRACKX3"); + upd3.set_porty_tag("TRACKY3"); // 837-8685 I/O board has an unpopulated space for a fourth UPD4701A MACHINE_CONFIG_END diff --git a/src/mame/drivers/seibucats.cpp b/src/mame/drivers/seibucats.cpp index 7e29e907ea1..45d9018dacf 100644 --- a/src/mame/drivers/seibucats.cpp +++ b/src/mame/drivers/seibucats.cpp @@ -184,10 +184,8 @@ void seibucats_state::seibucats_map(address_map &map) map(0x01200000, 0x01200007).rw("ymz", FUNC(ymz280b_device::read), FUNC(ymz280b_device::write)).umask32(0x000000ff); map(0x01200100, 0x01200107).nopw(); // YMF721-S MIDI data map(0x01200104, 0x01200107).nopr(); // YMF721-S MIDI status - map(0x01200200, 0x01200200).rw("usart1", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x01200204, 0x01200204).rw("usart1", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x01200300, 0x01200300).rw("usart2", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x01200304, 0x01200304).rw("usart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x01200200, 0x01200207).rw("usart1", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask32(0x000000ff); + map(0x01200300, 0x01200307).rw("usart2", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask32(0x000000ff); map(0xa0000000, 0xa1ffffff).noprw(); // NVRAM on ROM board map(0xa2000000, 0xa2000001).w(FUNC(seibucats_state::aux_rtc_w)); map(0xffe00000, 0xffffffff).rom().region("ipl", 0); diff --git a/src/mame/drivers/selz80.cpp b/src/mame/drivers/selz80.cpp index ef9388a11e5..86a85115e09 100644 --- a/src/mame/drivers/selz80.cpp +++ b/src/mame/drivers/selz80.cpp @@ -95,8 +95,7 @@ void selz80_state::selz80_io(address_map &map) map.unmap_value_high(); map.global_mask(0xff); map(0x00, 0x01).rw("i8279", FUNC(i8279_device::read), FUNC(i8279_device::write)); - map(0x18, 0x18).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x19, 0x19).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x18, 0x19).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); } /* Input ports */ @@ -243,10 +242,10 @@ MACHINE_CONFIG_START(selz80_state::selz80) MCFG_RS232_CTS_HANDLER(WRITELINE("uart", i8251_device, write_cts)) i8279_device &kbdc(I8279(config, "i8279", 5000000 / 2)); // based on divider - kbdc.out_sl_callback().set(FUNC(selz80_state::scanlines_w)); // scan SL lines - kbdc.out_disp_callback().set(FUNC(selz80_state::digit_w)); // display A&B - kbdc.in_rl_callback().set(FUNC(selz80_state::kbd_r)); // kbd RL lines - kbdc.in_shift_callback().set_constant(1); // Shift key + kbdc.out_sl_callback().set(FUNC(selz80_state::scanlines_w)); // scan SL lines + kbdc.out_disp_callback().set(FUNC(selz80_state::digit_w)); // display A&B + kbdc.in_rl_callback().set(FUNC(selz80_state::kbd_r)); // kbd RL lines + kbdc.in_shift_callback().set_constant(1); // Shift key kbdc.in_ctrl_callback().set_constant(1); MACHINE_CONFIG_END diff --git a/src/mame/drivers/seta.cpp b/src/mame/drivers/seta.cpp index 3fabb929eac..ee2e4bc44e0 100644 --- a/src/mame/drivers/seta.cpp +++ b/src/mame/drivers/seta.cpp @@ -8029,9 +8029,9 @@ MACHINE_CONFIG_START(seta_state::usclssic) MCFG_DEVICE_PROGRAM_MAP(calibr50_sub_map) MCFG_DEVICE_VBLANK_INT_DRIVER("screen", seta_state, irq0_line_assert) - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX") - MCFG_UPD4701_PORTY("TRACKY") + UPD4701A(config, m_upd4701); + m_upd4701->set_portx_tag("TRACKX"); + m_upd4701->set_porty_tag("TRACKY"); HC157(config, m_buttonmux, 0); m_buttonmux->out_callback().set(m_upd4701, FUNC(upd4701_device::middle_w)).bit(0); @@ -8098,9 +8098,9 @@ MACHINE_CONFIG_START(seta_state::calibr50) MCFG_DEVICE_PROGRAM_MAP(calibr50_sub_map) MCFG_DEVICE_PERIODIC_INT_DRIVER(seta_state, irq0_line_assert, 4*60) // IRQ: 4/frame - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) - MCFG_UPD4701_PORTX("ROT1") - MCFG_UPD4701_PORTY("ROT2") + UPD4701A(config, m_upd4701); + m_upd4701->set_portx_tag("ROT1"); + m_upd4701->set_porty_tag("ROT2"); MCFG_MACHINE_RESET_OVERRIDE(seta_state,calibr50) @@ -8569,7 +8569,7 @@ MACHINE_CONFIG_START(setaroul_state::setaroul) NVRAM(config, "nvram", nvram_device::DEFAULT_RANDOM); /* devices */ - MCFG_DEVICE_ADD("rtc", UPD4992, XTAL(32'768)) // ! Actually D4911C ! + UPD4992(config, m_rtc); // ! Actually D4911C ! MCFG_DEVICE_ADD ("acia0", ACIA6850, 0) MCFG_TICKET_DISPENSER_ADD("hopper", attotime::from_msec(150), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW ) @@ -8998,13 +8998,13 @@ MACHINE_CONFIG_START(seta_state::krzybowl) MCFG_DEVICE_PROGRAM_MAP(krzybowl_map) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", seta_state, seta_interrupt_1_and_2, "screen", 0, 1) - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK1_X") - MCFG_UPD4701_PORTY("TRACK1_Y") + upd4701_device &upd1(UPD4701A(config, "upd1")); + upd1.set_portx_tag("TRACK1_X"); + upd1.set_porty_tag("TRACK1_Y"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACK2_X") - MCFG_UPD4701_PORTY("TRACK2_Y") + upd4701_device &upd2(UPD4701A(config, "upd2")); + upd2.set_portx_tag("TRACK2_X"); + upd2.set_porty_tag("TRACK2_Y"); MCFG_DEVICE_ADD("spritegen", SETA001_SPRITE, 0) MCFG_SETA001_SPRITE_GFXDECODE("gfxdecode") @@ -9830,7 +9830,7 @@ MACHINE_CONFIG_START(jockeyc_state::jockeyc) MCFG_MACHINE_START_OVERRIDE(jockeyc_state, jockeyc) /* devices */ - MCFG_DEVICE_ADD("rtc", UPD4992, XTAL(32'768)) // ! Actually D4911C ! + UPD4992(config, m_rtc); // ! Actually D4911C ! MCFG_DEVICE_ADD ("acia0", ACIA6850, 0) MCFG_TICKET_DISPENSER_ADD("hopper1", attotime::from_msec(150), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW ) MCFG_TICKET_DISPENSER_ADD("hopper2", attotime::from_msec(150), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW ) diff --git a/src/mame/drivers/seta2.cpp b/src/mame/drivers/seta2.cpp index d63b6bef5da..80906cf3c07 100644 --- a/src/mame/drivers/seta2.cpp +++ b/src/mame/drivers/seta2.cpp @@ -2734,7 +2734,7 @@ MACHINE_CONFIG_START(staraudi_state::staraudi) MCFG_DEVICE_PROGRAM_MAP(staraudi_map) SHARP_LH28F016S_16BIT(config, "flash"); - MCFG_UPD4992_ADD("rtc") + UPD4992(config, m_rtc); // video hardware MCFG_SCREEN_MODIFY("screen") @@ -3176,13 +3176,14 @@ PCB Number: P-FG01-1 | |DX | 3 50MHz 32MHz* | | |102| 8 | +-+ +---+ M M +---+ | -| D D 4 4 |DX | | +| SW1* D D 4 4 |DX | | | S S |102| | | W W +---+ | | 2 1 | +-----------------------------------------------------------+ U56 is unpopulated 93C45 EEPROM +SW1 is unpopulated Reset push button CN4 - 96 pin connector (3 rows by 32 pins) * Denotes not populated. @@ -3212,6 +3213,7 @@ There is known to exist an undumped version of Guardians on the Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP @ U26) OSC: 50MHz, 32.530MHz Other: 8 Position Dipswitch x 2 + Reset Push Button at SW1 93C46 EEPROM Memory: @@ -3250,7 +3252,7 @@ PCB Number: P0-113A BP49KA | P P | U21* || +-+ C A A M M +---------------+| | N DSW1 L L 3 3 | -| 1 DSW2 | +| 1 DSW2 SW1 | +---------------------------------------------------------------+ U2 is KA2 001 001 EPROM @@ -3339,6 +3341,7 @@ This game runs on Seta/Allumer hardware Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP @ U26) OSC: 50MHz, 32.530MHz Other: 8 Position Dipswitch x 2 + Reset Push Button at SW1 93C46 EEPROM Memory: @@ -3377,7 +3380,7 @@ PCB Number: P0-113A BP49KA | P P |KA-001-006 U21|| +-+ C A A M M +--------------+| | N DSW1 L L 3 3 | -| 1 DSW2 | +| 1 DSW2 SW1 | +--------------------------------------------------------------+ U28 is KA-001-015 mask ROM (silkscreened SOUND ROM) @@ -3456,13 +3459,70 @@ ROM_END Kosodate Quiz My Angel (JPN Ver.) (c)1996 Namco -Board: KE (Namco) ; P0-125A (Seta) + CPU: Toshiba TMP68301AF-16 (100 Pin PQFP) + Video: NEC DX-101 (240 Pin PQFP, @ U10) + NEC DX-102 (52 Pin PQFP x3, @ U28, U30 & U45) + Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP @ U26) + OSC: 50MHz + Other: 8 Position Dipswitch x 2 + Reset Push Button at SW1 + GAL 16V8 at U38 -CPU: TMP68301 (68000 core) -OSC: 50.0000MHz - 32.5304MHz +Memory: +M1 are HM628128LFP-10L at U42 & U43 +M2 is W2465K-70LL at U27 +M3 are LH5168D-10L at U8 & U9 (unpopulated) +M4 are CXK58257AM-10L at U6, U7, U13 & U14 -Sound: X1-010 +PCB Number: namco KE / P0-125A ++-----------------------------------------------------------+ +| +------+ U U CN4* | +| VOL |Seta | M 5 5 +--------------+| +| |X1-010| 2 8 7 +-+ M | KQ1 CG0 U16 || +| +------+ * * | | 1 +--------------+| ++-+ |U| +--------------+| + | +-++-++-++-+ BT1* |3| | KQ1 CG2 U20 || ++-+ | || || || | M |2| M +--------------+| +| |U||U||U||U| M M 4 | | 1 +--------------+| +|J |3||5||2||4| 3 3 +-+ | KQ1 CG1 U15 || +|A | || || || | * * M +--------------+| +|M +-++-++-++-+ 4 +--------------+| +|M C | KQ1 CG3 U19 || +|A N +--------------+| +| 1 +--------------+| +|C * | KQ1 CG4 U18 || +|o +----------+ +--------------+| +|n C +-------+ | | +--------------+| +|n N |Toshiba| | NEC | | KQ1 CG6 U22 || +|e 2 | TMP | | DX-101 | +--------------+| +|c * | 68301 | | | +--------------+| +|t U +-------+ | | | KQ1 CG5 U17 || +|e C 5 +----------+ +--------------+| +|r N 6 +--------------+| +| 3 * | KQ1 CG7 U21 || ++-+ * +---+ +---+ U +--------------+| + | |DX | S |DX | 3 50MHz 32MHz* | + | |102| W |102| 8 | ++-+ +---+ 1 +---+ M M +---+ | +| D D 4 4 |DX | | +| S S |102| | +| W W +---+ | +| 2 1 | ++-----------------------------------------------------------+ + +U2 is KQ1 PRG E EPROM +U3 is KQ1 PRG O EPROM +U4 is KQ1 TBL E EPROM +U5 is KQ1 TBL O EPROM +U32 is KG SND mask ROM (silkscreened SOUND ROM) + +CN1 unpopulated 7 pin header +CN2 unpopulated 5 pin header +CN3 unpopulated 10 pin header +BT1 is unpopulated battery +U56 is unpopulated 93C45 EEPROM +CN4 - 96 pin connector (3 rows by 32 pins) +* Denotes not populated. ***************************************************************************/ @@ -3567,6 +3627,7 @@ ROM_END Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP) OSC: 50MHz & 32.53047MHz Other: 8 Position Dipswitch x 2 + Reset Push Button at SW1 Lattice ispLSI2032 - stamped "KUDEC" PCB Number: P0-142A @@ -3655,6 +3716,7 @@ Penguin Brothers / 轟天雷 (A-Blast) Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP) OSC: 50MHz, 32.53047MHz & 28MHz Other: 8 Position Dipswitch x 2 + Reset Push Button at SW1 Lattice ispLSI2032 PCB Number: P0-142A @@ -3700,8 +3762,9 @@ Notes: pzlbowl PCB with these extra parts: 2x 62256 SRAM 74HC00 -U50* Unpopulated 93LC46BX EEPROM -BAT1* Unpopulated CR2032 3Volt battery +U50 Unpopulated 93LC46BX EEPROM +BAT1 Unpopulated CR2032 3 Volt battery +* Denotes not populated. Ram M1 are NEC D43001GU-70LL Ram M2 are LGS GM76C8128ALLFW70 @@ -3764,11 +3827,11 @@ Reel'N Quake! CPU: Toshiba TMP68301AF-16 (100 Pin PQFP) Video: NEC DX-101 (240 Pin PQFP, @ U10) - NEC DX-102 (52 Pin PQFP x3, @ U28 U30 & U45) + NEC DX-102 (52 Pin PQFP x3, @ U28, U30 & U45) Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP @ U26) OSC: 50MHz & 28MHz Other: 8 Position Dipswitch x 2 - Push Button SW1 + Reset Push Button at SW1 3.6V Battery at BT1 GAL 16V8 - labeled "KF-001" at U38 @@ -3805,9 +3868,9 @@ PCB Number: P-FG-02 |r N 6 | | 3 * U21* | +-+ +---+ +---+ U 50MHz 32MHz* | - | |DX | S |DX | 3 | - | |102| W |102| 8 +---+ 28MHz| -+-+ +---+ 1 +---+ M M |DX | | + | |DX | S |DX | 3 | + | |102| W |102| 8 +---+ 28MHz| ++-+ +---+ 1 +---+ M M |DX | | | D D 4 4 |102| | | S S +---+ | | W W | @@ -3819,7 +3882,8 @@ CN2-1 - 3 Pin connector CN2-2 - 3 Pin connector CN3 - 10 Pin connector (used for extra buttons) -* Denotes not populated. U56 is unpopulated 93C45 EEPROM +U56 is unpopulated 93C45 EEPROM +* Denotes not populated. U3-U5 silkscreened 27C4001 U57-U58 silkscreened 23C8001E @@ -3872,11 +3936,11 @@ Endless Riches CPU: Toshiba TMP68301AF-16 (100 Pin PQFP) Video: NEC DX-101 (240 Pin PQFP, @ U10) - NEC DX-102 (52 Pin PQFP x3, @ U28 U30 & U45) + NEC DX-102 (52 Pin PQFP x3, @ U28, U30 & U45) Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP @ U26) OSC: 50MHz & 28MHz Other: 8 Position Dipswitch x 2 - Push Button SW1 + Reset Push Button at SW1 3.6V Battery at BT1 GAL 16V8 - labeled "KF-001" at U38 @@ -3912,28 +3976,30 @@ PCB Number: P-FG-03 |e C 5 +----------+ +---------------+| |c N 6 | |t 2 * U21* | -|e +---+ +---+ U 50MHz 28MHz | -|r |DX | S |DX | 3 | -| |102| W |102| 8 +---+ OSC2*| -| +---+ 1 +---+ M M |DX | | +|e +---+ +---+ U 50MHz 28MHz | +|r |DX | S |DX | 3 | +| |102| W |102| 8 +---+ OSC2*| +| +---+ 1 +---+ M M |DX | | +-+ D D 4 4 |102| | | S S +---+ | +-+ W W | | 2 1 | +------------------------------------------------------------+ -CN1 - 7 Pin connector -CN2 - 8 Pin connector +CN1 - 7 Pin connector +CN2 - 8 Pin connector +U56 is unpopulated 93C45 EEPROM +DSW2 is unpopulated * Denotes not populated. - U56 is unpopulated 93C45 EEPROM - DSW2 is unpopulated U3-U5 silkscreened 27C4001 U57-U58 silkscreened 23C8001E U15-U22 silkscreened 23C32000 U32 silkscreened 23C32000 +KFP is Program, KFC is Character Graphics and KFS is Sound + Note: 8-Liner version of P-FG-02 (see Reel'N Quake! above) Hitting Service Mode "F2" will show Ver 1.7, but going through the diagnostic "0" @@ -3953,7 +4019,7 @@ ROM_START( endrichs ) ROM_LOAD( "kfc-u17-c00.u17", 0x600000, 0x200000, CRC(34660029) SHA1(cf09b97422497d739f71e6ff8b9974fca0329928) ) ROM_REGION( 0x200000, "x1snd", 0 ) // Samples - ROM_LOAD( "kfs-u32-c00.u32", 0x000000, 0x200000, CRC(e9ffbecf) SHA1(3cc9ab3f4be1a305235603a68ca1e15797fb27cb) ) // Yes, it's actually "KFS" here + ROM_LOAD( "kfs-u32-c00.u32", 0x000000, 0x200000, CRC(e9ffbecf) SHA1(3cc9ab3f4be1a305235603a68ca1e15797fb27cb) ) ROM_REGION( 0x117, "plds", 0 ) ROM_LOAD( "gal16v8_kf-001.u38", 0x000, 0x117, NO_DUMP ) @@ -4196,7 +4262,7 @@ PCB Number: P0-145-1 Differences from PCB B0-003A (or B0-003B): -CN1 is populated - unknown use +CN1 is 8 pin header - unknown use CN3 Female 3 row, 96 pin connection populated on the underside to connect to the P1-115A flash ROM PCB CN5 is labeled pins 1-4 and silkscreened GUN1 CN6 is labeled pins 1-4 and silkscreened GUN2 @@ -4459,21 +4525,77 @@ ROM_END TelePachi Fever Lion (C) 1996 Sunsoft - PCB: Sunsoft 2MP1-E00 (P0-121A, serial 0503), similar to Reel'N Quake. - - CPU: Toshiba TMP68301AF-16 (100 Pin PQFP @ U1) - Video: Allumer X1-020 9426HK003 (@ U9 - Same as DX-101?) + CPU: Toshiba TMP68301AF-16 (100 Pin PQFP) + Video: Allumer X1-020 9426HK003 (@ U9) NEC DX-102 (52 Pin PQFP @ U8) Allumer X1-007 505100 (SDIP42 @ U110 - Feeds RGB DACs) Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP @ U26) Inputs: Allumer X1-004 546100 (SDIP52) - OSC: 50.0000 MHz (@ X1) & 32.5304 MHz (@ X2) - Other: 8 Position Dipswitch x 2 (@ DSW1, DSW2) - Push Button - Battery (@ BT1) + OSC: 50.0000MHz (@ X1), 32.5304MHz (@ X2) & 32.768kHz (@ X3) + Other: 8 Position Dipswitch x 2 + Ricoh RP5C62 RTC (@ U128) + 3.6v Battery (@ BT1) 93C46 EEPROM (@ U101) - Jamma Connector - GALs - labeled "KC-001C", "KC-002C" (@ U51, U52) + SW1 Push Button Reset + +Memory: +M1 are TC551001BFL-70L at U56 & U57 +M2 is W2465K-70LL at U27 +M3 are HM62256BLSP-7 +M4 is LH5168D-80L + +PCB Number: P0-121A / Sunsoft 2MP1-E00 (serial 0503) ++--------------------------------------------------------------+ +| +------+ +---++---+ CN3* | +| VOL |Seta | M | || | +--------------+| +| |X1-010| 2 | U || U | | U19* || +| +------+ | 1 || 1 | +--------------+| ++-+ U52 U51 BT1 | 1 || 1 | +--------------+| + | +-++-+ +-++-+ | 2 || 1 | | U17* || ++-+ | || | | || | +---++---+ M M +--------------+| +| |U||U| M |U||U| M M 32.768kHz 1 1 +--------------+| +|J |3||5| 3 |2||4| 3 4 RP5C62 | MP3 CG-1 U15 || +|A | ||*| | ||*| +--------------+| +|M +-++-+ +-++-+ +--------------+| +|M | U20* || +|A +----------+ +--------------+| +| | | +--------------+| +|C | ALLUMER | | U18* || +|o | X1-020 | +--------------+| +|n +-------+ | | +--------------+| +|n |Toshiba| | 9426HK003| | MP3 CG-0 U16 || +|e | TMP | +----------+ +--------------+| +|c | 68301 | +--------------+| +|t +-------+ | U23* || +|e 93C46 +--------------+| +|r D +--------------+| +| S | U22* || ++-+ X W +---+ 50MHz 32.5304MHz +--------------+| + | 1 2 |DX | +--------------+| + | C | D |102| | MP3 CG-2 U21 || ++-+ N C 0 S +---+ M M +--------------+| +| 7 N 0 W SW1 3 3 | +| 6 4 1 X1-007 R G B | ++--------------------------------------------------------------+ + +U2 ST M27C4001 EPROM MP3prgEVEN U2 V1.0 +U3 ST M27C4001 EPROM MP3 prgODD U3 V1.0 +U4 unpopulated silkscreened 27C4001 TBL EVEN +U5 unpopulated silkscreened 27C4001 TBL ODD +U15 ST M27C160 EPROM MP3 CG-1 U15 V1.0 +U16 ST M27C160 EPROM MP3 CG-0 U16 V1.0 +U21 ST M27C160 EPROM MP3 CG-2 U21 V1.0 +U51 GAL KC-001C +U52 GAL KC-002C +U111 ST M27C4001 EPROM MP3 SOUND0 U111 V1.0 +U112 ST M27C4001 EPROM MP3 SOUND1 U112 V1.0 +U17, U18, U19, U20, U22 & U23 silkscreened 23C16000 +* Denotes not populated. + +R, G & B are resistor packs +CN3 - 96 pin connector (3 rows by 32 pins) +CN6 - Dual row 10 pin header +CN7 - 12 pin header ***************************************************************************/ @@ -4481,14 +4603,12 @@ ROM_START( telpacfl ) ROM_REGION( 0x100000, "maincpu", 0 ) // TMP68301 Code ROM_LOAD16_BYTE( "mp3_prgeven__u2_v1.0.u2", 0x000000, 0x080000, CRC(9ab450c5) SHA1(57d9118df8a444e295cbda453a7c3238bd672ddd) ) ROM_LOAD16_BYTE( "mp3_prgodd__u3_v1.0.u3", 0x000001, 0x080000, CRC(2a324139) SHA1(1812a7a8a2c4e222a1e5c7cb6d39cf7bf7f037db) ) - // Empty sockets: 27C4001 TBL EVEN (@ U4) & 27C4001 TBL ODD (@ U5) ROM_REGION( 0x800000, "sprites", ROMREGION_ERASE00 ) // Sprites ROM_LOAD( "mp3_cg-0__u16_v1.0.u16", 0x000000, 0x200000, CRC(9d8453ba) SHA1(d97240ce68d6e64527930e919710764a7b669cdf) ) ROM_LOAD( "mp3_cg-1__u15_v1.0.u15", 0x200000, 0x200000, CRC(8ab83f38) SHA1(5ebc682b80d0d97025a97824a899946712e7acd4) ) ROM_LOAD( "mp3_cg-2__u21_v1.0.u21", 0x400000, 0x200000, BAD_DUMP CRC(54dc430b) SHA1(a2e55866249d01f6f2f2dd998421baf9fe0c6972) ) // physically damaged eprom ROM_FILL ( 0x400000, 0x200000, 0 ) // wipe out the bad rom - // Empty sockets: 23C16000 (@ U17-20, U22-23) ROM_REGION( 0x100000, "x1snd", 0 ) // Samples ROM_LOAD( "mp3_sound0__u111_v1.0.u111", 0x000000, 0x080000, CRC(711c915e) SHA1(d654a0c158cf54aab5faca913583c5620388aa46) ) diff --git a/src/mame/drivers/sfbonus.cpp b/src/mame/drivers/sfbonus.cpp index 1a72f30a918..f7c17308650 100644 --- a/src/mame/drivers/sfbonus.cpp +++ b/src/mame/drivers/sfbonus.cpp @@ -1398,7 +1398,8 @@ MACHINE_CONFIG_START(sfbonus_state::sfbonus) MCFG_PALETTE_ADD("palette", 0x100*2) // *2 for priority workaraound / custom drawing - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &sfbonus_state::ramdac_map); /* Parrot 3 seems fine at 1 Mhz, but Double Challenge isn't? */ diff --git a/src/mame/drivers/sg1000.cpp b/src/mame/drivers/sg1000.cpp index 5b4b29f1c78..f9cd0d60758 100644 --- a/src/mame/drivers/sg1000.cpp +++ b/src/mame/drivers/sg1000.cpp @@ -228,8 +228,7 @@ void sf7000_state::sf7000_io_map(address_map &map) map(0xdc, 0xdf).rw(FUNC(sf7000_state::peripheral_r), FUNC(sf7000_state::peripheral_w)); map(0xe0, 0xe1).m(m_fdc, FUNC(upd765a_device::map)); map(0xe4, 0xe7).rw(UPD9255_1_TAG, FUNC(i8255_device::read), FUNC(i8255_device::write)); - map(0xe8, 0xe8).rw(UPD8251_TAG, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xe9, 0xe9).rw(UPD8251_TAG, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xe8, 0xe9).rw(UPD8251_TAG, FUNC(i8251_device::read), FUNC(i8251_device::write)); } /*************************************************************************** @@ -650,7 +649,7 @@ MACHINE_CONFIG_START(sf7000_state::sf7000) MCFG_RS232_RXD_HANDLER(WRITELINE(UPD8251_TAG, i8251_device, write_rxd)) MCFG_RS232_DSR_HANDLER(WRITELINE(UPD8251_TAG, i8251_device, write_dsr)) - MCFG_UPD765A_ADD(UPD765_TAG, false, false) + UPD765A(config, m_fdc, false, false); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", sf7000_floppies, "3ssdd", sf7000_state::floppy_formats) MCFG_DEVICE_ADD(m_centronics, CENTRONICS, centronics_devices, "printer") diff --git a/src/mame/drivers/sg1000a.cpp b/src/mame/drivers/sg1000a.cpp index 58bac477532..b85ddcef14f 100644 --- a/src/mame/drivers/sg1000a.cpp +++ b/src/mame/drivers/sg1000a.cpp @@ -286,11 +286,11 @@ public: m_maincpu(*this, "maincpu"), m_decrypted_opcodes(*this, "decrypted_opcodes") { } - void sderby2s(machine_config &config); + void sderbys(machine_config &config); void sg1000ax(machine_config &config); void sg1000a(machine_config &config); - void init_sg1000a(); + void init_sderby(); private: DECLARE_WRITE8_MEMBER(sg1000a_coin_counter_w); @@ -299,7 +299,7 @@ private: void decrypted_opcodes_map(address_map &map); void io_map(address_map &map); void program_map(address_map &map); - void sderby2_io_map(address_map &map); + void sderby_io_map(address_map &map); }; @@ -330,14 +330,14 @@ void sg1000a_state::io_map(address_map &map) map(0xdc, 0xdf).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)); } -void sg1000a_state::sderby2_io_map(address_map &map) +void sg1000a_state::sderby_io_map(address_map &map) { map.global_mask(0xff); - map(0x7f, 0x7f).w("snsnd", FUNC(sn76489a_device::command_w)); - map(0xbe, 0xbe).rw("tms9928a", FUNC(tms9928a_device::vram_r), FUNC(tms9928a_device::vram_w)); - map(0xbf, 0xbf).rw("tms9928a", FUNC(tms9928a_device::register_r), FUNC(tms9928a_device::register_w)); - // AM_RANGE(0xc0, 0xc1) NEC D8251AC UART - map(0xc8, 0xcb).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)); // NEC D8255AC-2 + map(0x40, 0x40).mirror(0x3f).w("snsnd", FUNC(sn76489a_device::command_w)); + map(0x80, 0x80).mirror(0x3e).rw("tms9928a", FUNC(tms9928a_device::vram_r), FUNC(tms9928a_device::vram_w)); + map(0x81, 0x81).mirror(0x3e).rw("tms9928a", FUNC(tms9928a_device::register_r), FUNC(tms9928a_device::register_w)); +// map(0xc0, 0xc1).mirror(0x06) NEC D8251AC UART + map(0xc8, 0xcb).mirror(0x04).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)); // NEC D8255AC-2 } /************************************* @@ -426,7 +426,7 @@ static INPUT_PORTS_START( dokidoki ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) INPUT_PORTS_END -static INPUT_PORTS_START( sderby2s ) +static INPUT_PORTS_START( sderbys ) PORT_INCLUDE( sg1000 ) PORT_MODIFY("DSW") @@ -503,11 +503,11 @@ MACHINE_CONFIG_START(sg1000a_state::sg1000ax) MCFG_SEGACRPT_SET_DECRYPTED_TAG(":decrypted_opcodes") MACHINE_CONFIG_END -MACHINE_CONFIG_START(sg1000a_state::sderby2s) +MACHINE_CONFIG_START(sg1000a_state::sderbys) sg1000a(config); MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_CLOCK(XTAL(10'738'635) / 3) - MCFG_DEVICE_IO_MAP(sderby2_io_map) + MCFG_DEVICE_IO_MAP(sderby_io_map) // Actually uses a Sega 315-5066 chip, which is a TMS9918 and SN76489 in the same package but with RGB output MACHINE_CONFIG_END @@ -520,9 +520,9 @@ MACHINE_CONFIG_END ROM_START( chwrestl ) ROM_REGION( 2*0x10000, "maincpu", 0 ) - ROM_LOAD( "5732", 0x0000, 0x4000, CRC(a4e44370) SHA1(a9dbf60e77327dd2bec6816f3142b42ad9ca4d09) ) /* encrypted */ - ROM_LOAD( "5733", 0x4000, 0x4000, CRC(4f493538) SHA1(467862fe9337497e3cdebb29bf28f6cfe3066ccd) ) /* encrypted */ - ROM_LOAD( "5734", 0x8000, 0x4000, CRC(d99b6301) SHA1(5e762ed45cde08d5223828c6b1d3569b2240462c) ) + ROM_LOAD( "5732", 0x0000, 0x4000, CRC(a4e44370) SHA1(a9dbf60e77327dd2bec6816f3142b42ad9ca4d09) ) /* encrypted */ + ROM_LOAD( "5733", 0x4000, 0x4000, CRC(4f493538) SHA1(467862fe9337497e3cdebb29bf28f6cfe3066ccd) ) /* encrypted */ + ROM_LOAD( "5734", 0x8000, 0x4000, CRC(d99b6301) SHA1(5e762ed45cde08d5223828c6b1d3569b2240462c) ) ROM_END ROM_START( chboxing ) @@ -534,25 +534,39 @@ ROM_END ROM_START( dokidoki ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "epr-7356.ic1", 0x0000, 0x4000, CRC(95658c31) SHA1(f7b5638ab1b8b244b189317d954eb37b51923791) ) - ROM_LOAD( "epr-7357.ic2", 0x4000, 0x4000, CRC(e8dbad85) SHA1(9f13dafacee370d6e4720d8e27cf889053e79eb3) ) - ROM_LOAD( "epr-7358.ic3", 0x8000, 0x4000, CRC(c6f26b0b) SHA1(3753e05b6e77159832dbe88562ba7a818120d1a3) ) + ROM_LOAD( "epr-7356.ic1", 0x0000, 0x4000, CRC(95658c31) SHA1(f7b5638ab1b8b244b189317d954eb37b51923791) ) + ROM_LOAD( "epr-7357.ic2", 0x4000, 0x4000, CRC(e8dbad85) SHA1(9f13dafacee370d6e4720d8e27cf889053e79eb3) ) + ROM_LOAD( "epr-7358.ic3", 0x8000, 0x4000, CRC(c6f26b0b) SHA1(3753e05b6e77159832dbe88562ba7a818120d1a3) ) +ROM_END + +ROM_START( sderbys ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "v1.2.ic10", 0x0000, 0x4000, CRC(cf29b579) SHA1(e695da9c61167d1d30b32bd70d342ac23b29f087) ) ROM_END ROM_START( sderby2s ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "epr-6450d.ic10", 0x0000, 0x4000, CRC(e56986d3) SHA1(a2dbdc95128cc94a1492e080aeea402f2d4b89fe) ) - ROM_LOAD( "epr-6504d.ic11", 0x4000, 0x4000, CRC(7bb364b9) SHA1(9f93572b6d999422d93ad5f7a251b4695565651f) ) + ROM_LOAD( "epr-6450d.ic10", 0x0000, 0x4000, CRC(e56986d3) SHA1(a2dbdc95128cc94a1492e080aeea402f2d4b89fe) ) + ROM_LOAD( "epr-6504d.ic11", 0x4000, 0x4000, CRC(7bb364b9) SHA1(9f93572b6d999422d93ad5f7a251b4695565651f) ) ROM_END + /************************************* * * Driver initialization * *************************************/ -void sg1000a_state::init_sg1000a() +void sg1000a_state::init_sderby() { + // mini daughterboard in ic10 socket, with TI 27C128 rom and unknown ic(label scraped off) + u8 *rom = machine().root_device().memregion("maincpu")->base(); + const u32 len = memregion("maincpu")->bytes(); + + for (int i = 0; i < len; i++) + rom[i] = bitswap<8>(rom[i],3,7,4,6,5,2,1,0); + + // TODO: decryption is unfinished } @@ -563,7 +577,11 @@ void sg1000a_state::init_sg1000a() * *************************************/ -GAME( 1984, chboxing, 0, sg1000a, chboxing, sg1000a_state, init_sg1000a, ROT0, "Sega", "Champion Boxing", 0 ) -GAME( 1985, chwrestl, 0, sg1000ax, chwrestl, sg1000a_state, init_sg1000a, ROT0, "Sega", "Champion Pro Wrestling", 0 ) -GAME( 1985, dokidoki, 0, sg1000a, dokidoki, sg1000a_state, init_sg1000a, ROT0, "Sega", "Doki Doki Penguin Land", 0 ) -GAME( 1985, sderby2s, 0, sderby2s, sderby2s, sg1000a_state, init_sg1000a, ROT0, "Sega", "Super Derby II (Satellite board)", MACHINE_NOT_WORKING ) // inputs aren't hooked up, probably needs to be connected to the main board anyway +GAME( 1984, chboxing, 0, sg1000a, chboxing, sg1000a_state, empty_init, ROT0, "Sega", "Champion Boxing", 0 ) +GAME( 1985, chwrestl, 0, sg1000ax, chwrestl, sg1000a_state, empty_init, ROT0, "Sega", "Champion Pro Wrestling", 0 ) +GAME( 1985, dokidoki, 0, sg1000a, dokidoki, sg1000a_state, empty_init, ROT0, "Sega", "Doki Doki Penguin Land", 0 ) + +// inputs aren't hooked up, probably needs to be connected to the main board anyway +// TODO: move these guys over to sderby2.cpp +GAME( 1984, sderbys, 0, sderbys, sderbys, sg1000a_state, init_sderby, ROT0, "Sega", "Super Derby (satellite board)", MACHINE_NOT_WORKING ) +GAME( 1985, sderby2s, 0, sderbys, sderbys, sg1000a_state, empty_init, ROT0, "Sega", "Super Derby II (satellite board)", MACHINE_NOT_WORKING ) diff --git a/src/mame/drivers/si5500.cpp b/src/mame/drivers/si5500.cpp new file mode 100644 index 00000000000..8b79ce05677 --- /dev/null +++ b/src/mame/drivers/si5500.cpp @@ -0,0 +1,232 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/***************************************************************************************** + + Skeleton driver for Scientific Instruments Model 5500 temperature controller. + +*****************************************************************************************/ + +#include "emu.h" +#include "cpu/tms9900/tms9980a.h" +#include "machine/74259.h" +//#include "machine/icl7104.h" +#include "machine/tms9901.h" +#include "machine/tms9902.h" +#include "machine/tms9914.h" +#include "machine/x2201.h" + +class si5500_state : public driver_device +{ +public: + si5500_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_mainpsi(*this, "mainpsi") + , m_gpibpsi(*this, "gpibpsi") + , m_gpibc(*this, "gpibc") + , m_keyplatch(*this, "keyplatch") + , m_keypad(*this, "KEYPAD%u", 0U) + { + } + + void si5500(machine_config &config); + +protected: + virtual void machine_start() override; + +private: + void mainic_w(offs_t offset, u8 data); + DECLARE_WRITE_LINE_MEMBER(gpib_int_w); + DECLARE_WRITE_LINE_MEMBER(acc_int_w); + u8 gpibpsi_input_r(offs_t offset); + DECLARE_WRITE_LINE_MEMBER(gpibc_we_w); + DECLARE_WRITE_LINE_MEMBER(gpibc_dbin_w); + u8 keypad_r(); + + void mem_map(address_map &map); + void cru_map(address_map &map); + + required_device<cpu_device> m_maincpu; + required_device<tms9901_device> m_mainpsi; + required_device<tms9901_device> m_gpibpsi; + required_device<tms9914_device> m_gpibc; + required_device<ls259_device> m_keyplatch; + required_ioport_array<4> m_keypad; + + u8 m_gpib_data; +}; + +void si5500_state::machine_start() +{ + m_gpib_data = 0; + save_item(NAME(m_gpib_data)); +} + +void si5500_state::mainic_w(offs_t offset, u8 data) +{ + if (data) + m_maincpu->set_input_line(offset & 7, ASSERT_LINE); + else + m_maincpu->set_input_line(INT_9980A_CLEAR, CLEAR_LINE); +} + +WRITE_LINE_MEMBER(si5500_state::gpib_int_w) +{ + m_mainpsi->set_single_int(4, state); +} + +WRITE_LINE_MEMBER(si5500_state::acc_int_w) +{ + m_mainpsi->set_single_int(5, state); +} + +u8 si5500_state::gpibpsi_input_r(offs_t offset) +{ + if (offset == tms9901_device::P0_P7) + return m_gpib_data; + + return 0xff; +} + +WRITE_LINE_MEMBER(si5500_state::gpibc_we_w) +{ + if (!state) + { + u16 pio = m_gpibpsi->pio_outputs(); + m_gpibc->reg8_w(machine().dummy_space(), (pio >> 8) & 7, pio & 0xff); + } +} + +WRITE_LINE_MEMBER(si5500_state::gpibc_dbin_w) +{ + if (state) + { + u16 pio = m_gpibpsi->pio_outputs(); + m_gpib_data = m_gpibc->reg8_r(machine().dummy_space(), (pio >> 8) & 7); + } +} + +u8 si5500_state::keypad_r() +{ + u8 result = 0xff; + + for (int n = 0; n < 4; n++) + if (!BIT(m_keyplatch->output_state(), n)) + result &= m_keypad[n]->read(); + + return result; +} + +void si5500_state::mem_map(address_map &map) +{ + map(0x0000, 0x2fff).rom().region("program", 0); + map(0x3800, 0x3fff).ram(); +} + +void si5500_state::cru_map(address_map &map) +{ + // MAME currently has incompatible addressing for CRU reads and writes + map(0x00, 0x03).r(m_mainpsi, FUNC(tms9901_device::read)); + map(0x08, 0x0b).r("acc", FUNC(tms9902_device::cruread)); + map(0x0c, 0x0f).r("adpsi", FUNC(tms9901_device::read)); + map(0x16, 0x16).nopr(); + map(0x17, 0x17).r(FUNC(si5500_state::keypad_r)); + map(0x40, 0x43).r("nvrpsi", FUNC(tms9901_device::read)); + map(0x44, 0x47).r(m_gpibpsi, FUNC(tms9901_device::read)); + map(0x80, 0xff).r("novram", FUNC(x2201_device::read_byte)); + + map(0x000, 0x01f).w(m_mainpsi, FUNC(tms9901_device::write)); + map(0x040, 0x05f).w("acc", FUNC(tms9902_device::cruwrite)); + map(0x060, 0x07f).w("adpsi", FUNC(tms9901_device::write)); + map(0x080, 0x087).w("outlatch1", FUNC(ls259_device::write_d0)); + map(0x088, 0x08f).w("outlatch2", FUNC(ls259_device::write_d0)); + map(0x090, 0x097).w("outlatch3", FUNC(ls259_device::write_d0)); + map(0x0a0, 0x0a7).w("outlatch4", FUNC(ls259_device::write_d0)); + map(0x0a8, 0x0af).w("outlatch5", FUNC(ls259_device::write_d0)); + map(0x0b0, 0x0bf).w(m_keyplatch, FUNC(ls259_device::write_d0)); + map(0x200, 0x21f).w("nvrpsi", FUNC(tms9901_device::write)); + map(0x220, 0x23f).w(m_gpibpsi, FUNC(tms9901_device::write)); + map(0x400, 0x7ff).w("novram", FUNC(x2201_device::write)); +} + +static INPUT_PORTS_START(si5500) + PORT_START("KEYPAD0") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("7 Edit Prop") PORT_CODE(KEYCODE_7) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("4 Select Heater") PORT_CODE(KEYCODE_4) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("1 Diag Sensor") PORT_CODE(KEYCODE_1) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("0") PORT_CODE(KEYCODE_0) + PORT_BIT(0xf0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KEYPAD1") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("8 Keep Int") PORT_CODE(KEYCODE_8) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("5 Auto Time") PORT_CODE(KEYCODE_5) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("2 Cal Sensor") PORT_CODE(KEYCODE_2) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER) + PORT_BIT(0xf0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KEYPAD2") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("9 Load Der") PORT_CODE(KEYCODE_9) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("6 Print Rate") PORT_CODE(KEYCODE_6) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("3 I/O Set Pt") PORT_CODE(KEYCODE_3) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("# -") PORT_CODE(KEYCODE_MINUS) + PORT_BIT(0xf0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KEYPAD3") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Stop") PORT_CODE(KEYCODE_S) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Man") PORT_CODE(KEYCODE_M) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Run") PORT_CODE(KEYCODE_R) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("*") PORT_CODE(KEYCODE_EQUALS) + PORT_BIT(0xf0, IP_ACTIVE_LOW, IPT_UNUSED) +INPUT_PORTS_END + +void si5500_state::si5500(machine_config &config) +{ + TMS9981(config, m_maincpu, 10_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &si5500_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &si5500_state::cru_map); + + TMS9901(config, m_mainpsi, 10_MHz_XTAL / 4); + m_mainpsi->intlevel_cb().set(FUNC(si5500_state::mainic_w)); + + tms9902_device &acc(TMS9902(config, "acc", 10_MHz_XTAL / 4)); + acc.int_cb().set(FUNC(si5500_state::acc_int_w)); + + TMS9901(config, "adpsi", 10_MHz_XTAL / 4); + + X2201(config, "novram"); + + tms9901_device &nvrpsi(TMS9901(config, "nvrpsi", 10_MHz_XTAL / 4)); + // P0-11 = inputs for DAC? + nvrpsi.p_out_cb(13).set("novram", FUNC(x2201_device::array_recall_w)); + nvrpsi.p_out_cb(14).set("novram", FUNC(x2201_device::store_w)); + nvrpsi.p_out_cb(15).set("novram", FUNC(x2201_device::cs_w)); + + TMS9901(config, m_gpibpsi, 10_MHz_XTAL / 4); + m_gpibpsi->p_out_cb(11).set(FUNC(si5500_state::gpibc_we_w)); + m_gpibpsi->p_out_cb(12).set(FUNC(si5500_state::gpibc_dbin_w)); + m_gpibpsi->read_cb().set(FUNC(si5500_state::gpibpsi_input_r)); + + TMS9914(config, m_gpibc, 10_MHz_XTAL / 4); + m_gpibc->int_write_cb().set(FUNC(si5500_state::gpib_int_w)); + + LS259(config, "outlatch1"); + LS259(config, "outlatch2"); + LS259(config, "outlatch3"); + LS259(config, "outlatch4"); + LS259(config, "outlatch5"); + LS259(config, m_keyplatch); +} + +// Board #1 (power): no digital ICs +// Board #2 (analog): TMS9901NL, ICL7104-16CPL, ICL8052ACPD, AD524AD, LF13509D +// Board #3 (output): X2201AD, 2x TMS9901NL, DAC1222LCN, TMS9914ANL, SN75162BN, DS75160AN +// Board #4: HM6116P-4, 3x TMS2532A-25JL, XTAL (10 MHz), TMS9981JDL, TMS9902ANL, TMS9901NL +// Back of front panel: 6x HD74LS259, HD74LS251 +ROM_START(si5500) + ROM_REGION(0x3000, "program", 0) + ROM_LOAD("m5500dl_7-9-86.u4", 0x0000, 0x1000, CRC(cfcff0fe) SHA1(94173b3b7513954221ce3402ea5b5c36dfa5a8da)) + ROM_LOAD("m5500dl_7-9-86.u5", 0x1000, 0x1000, CRC(a932e85a) SHA1(f7152ae78bad79b457bb739e7ecc4556ca33cbbc)) + ROM_LOAD("m5500dl_7-9-86.u6", 0x2000, 0x1000, CRC(3161347d) SHA1(fab6c228a21ef3ecce255079a48ef1697f2c7ccb)) +ROM_END + +COMP(1986, si5500, 0, 0, si5500, si5500, si5500_state, empty_init, "Scientific Instruments", "Model 5500 Temperature Controller", MACHINE_IS_SKELETON) diff --git a/src/mame/drivers/sitcom.cpp b/src/mame/drivers/sitcom.cpp index 52d8685b9dc..ef26cbdbda6 100644 --- a/src/mame/drivers/sitcom.cpp +++ b/src/mame/drivers/sitcom.cpp @@ -261,7 +261,7 @@ WRITE8_MEMBER( sitcom_timer_state::update_ppi_pa ) WRITE8_MEMBER( sitcom_timer_state::update_ppi_pb ) { if (!m_dac_cs && !BIT(data, 0)) - update_dac(m_ppi->read_pa()); + update_dac(m_ppi->pa_r()); m_dac_wr = BIT(data, 0); m_dac_cs = BIT(data, 1); diff --git a/src/mame/drivers/skylncr.cpp b/src/mame/drivers/skylncr.cpp index 3a8b0529a7c..2594c8fd930 100644 --- a/src/mame/drivers/skylncr.cpp +++ b/src/mame/drivers/skylncr.cpp @@ -1680,11 +1680,13 @@ MACHINE_CONFIG_START(skylncr_state::skylncr) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_skylncr) MCFG_PALETTE_ADD("palette", 0x200) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") - MCFG_RAMDAC_COLOR_BASE(0) + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &skylncr_state::ramdac_map); + ramdac.set_color_base(0); - MCFG_RAMDAC_ADD("ramdac2", ramdac2_map, "palette") - MCFG_RAMDAC_COLOR_BASE(0x100) + ramdac_device &ramdac2(RAMDAC(config, "ramdac2", 0, m_palette)); + ramdac2.set_addrmap(0, &skylncr_state::ramdac2_map); + ramdac2.set_color_base(0x100); /* sound hardware */ SPEAKER(config, "mono").front_center(); diff --git a/src/mame/drivers/sliver.cpp b/src/mame/drivers/sliver.cpp index 547b753d149..aed4fe6acdb 100644 --- a/src/mame/drivers/sliver.cpp +++ b/src/mame/drivers/sliver.cpp @@ -536,8 +536,8 @@ MACHINE_CONFIG_START(sliver_state::sliver) MCFG_SCREEN_UPDATE_DRIVER(sliver_state, screen_update) MCFG_PALETTE_ADD("palette", 0x100) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") - + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, "palette")); + ramdac.set_addrmap(0, &sliver_state::ramdac_map); SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); diff --git a/src/mame/drivers/sm1800.cpp b/src/mame/drivers/sm1800.cpp index b56ae565924..6d8cc7187d6 100644 --- a/src/mame/drivers/sm1800.cpp +++ b/src/mame/drivers/sm1800.cpp @@ -71,8 +71,7 @@ void sm1800_state::sm1800_io(address_map &map) map.global_mask(0xff); map.unmap_value_high(); map(0x3c, 0x3d).rw(m_crtc, FUNC(i8275_device::read), FUNC(i8275_device::write)); - map(0x5c, 0x5c).rw(m_uart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x5d, 0x5d).rw(m_uart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x5c, 0x5d).rw(m_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x6c, 0x6f).rw(m_ppi, FUNC(i8255_device::read), FUNC(i8255_device::write)); //AM_RANGE( 0x74, 0x74 ) AM_DEVREADWRITE("i8279", i8279_device, status_r, cmd_w) //AM_RANGE( 0x75, 0x75 ) AM_DEVREADWRITE("i8279", i8279_device, data_r, data_w) diff --git a/src/mame/drivers/sm7238.cpp b/src/mame/drivers/sm7238.cpp index 42865b42358..1a1c26dafda 100644 --- a/src/mame/drivers/sm7238.cpp +++ b/src/mame/drivers/sm7238.cpp @@ -150,16 +150,13 @@ void sm7238_state::sm7238_io(address_map &map) { map.unmap_value_high(); // AM_RANGE (0x40, 0x4f) AM_RAM // LUT - map(0xa0, 0xa0).rw(m_i8251line, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xa1, 0xa1).rw(m_i8251line, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0xa4, 0xa4).rw(m_i8251kbd, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xa5, 0xa5).rw(m_i8251kbd, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xa0, 0xa1).rw(m_i8251line, FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0xa4, 0xa5).rw(m_i8251kbd, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xa8, 0xab).rw(m_t_color, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0xac, 0xad).rw(m_pic8259, FUNC(pic8259_device::read), FUNC(pic8259_device::write)); map(0xb0, 0xb3).rw(m_t_hblank, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0xb4, 0xb7).rw(m_t_vblank, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); - map(0xb8, 0xb8).rw(m_i8251prn, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xb9, 0xb9).rw(m_i8251prn, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xb8, 0xb9).rw(m_i8251prn, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xbc, 0xbf).rw(m_t_iface, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); } diff --git a/src/mame/drivers/snk68.cpp b/src/mame/drivers/snk68.cpp index c04e419aec1..427afd49ac0 100644 --- a/src/mame/drivers/snk68.cpp +++ b/src/mame/drivers/snk68.cpp @@ -913,13 +913,13 @@ ROM_START( ikari3w ) /* Initial boot shows Ikari III The Rescue, then the title ROM_REGION16_BE( 0x40000, "user1", 0 ) /* Extra code bank */ ROM_LOAD16_BYTE( "ik3-1.c8", 0x000000, 0x10000, CRC(47e4d256) SHA1(7c6921cf2f1b8c3dae867eb1fc14e3da218cc1e0) ) - ROM_LOAD16_BYTE( "ik3-4.c12", 0x000001, 0x10000, CRC(a43af6b5) SHA1(1ad3acadbadd21642932028ecd7c282f7fd02856) ) - - /* stuff below isn't used but loaded because it was on the board .. */ - ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "a_pal20l10a.ic1", 0x0000, 0x00cc, CRC(1cadf26d) SHA1(348a9e4727df0a15247c7b9c5cd5ee935edd9752) ) - ROM_LOAD( "b_pal20l10a.ic3", 0x0200, 0x00cc, CRC(c3d9e729) SHA1(f05f03eecf12b4d0793124ecd3195307be04046b) ) - ROM_LOAD( "c_pal16l8a.ic2", 0x0400, 0x0104, CRC(e258b8d6) SHA1(9d000aa9a09b402208a5c2d98789cc62e23a2eb2) ) + ROM_LOAD16_BYTE( "ik3-4.c12", 0x000001, 0x10000, CRC(a43af6b5) SHA1(1ad3acadbadd21642932028ecd7c282f7fd02856) ) + + /* stuff below isn't used but loaded because it was on the board .. */ + ROM_REGION( 0x0600, "plds", 0 ) + ROM_LOAD( "a_pal20l10a.ic1", 0x0000, 0x00cc, CRC(1cadf26d) SHA1(348a9e4727df0a15247c7b9c5cd5ee935edd9752) ) + ROM_LOAD( "b_pal20l10a.ic3", 0x0200, 0x00cc, CRC(c3d9e729) SHA1(f05f03eecf12b4d0793124ecd3195307be04046b) ) + ROM_LOAD( "c_pal16l8a.ic2", 0x0400, 0x0104, CRC(e258b8d6) SHA1(9d000aa9a09b402208a5c2d98789cc62e23a2eb2) ) ROM_END ROM_START( ikari3u ) diff --git a/src/mame/drivers/softbox.cpp b/src/mame/drivers/softbox.cpp index dcb1c435812..7ec99a421fe 100644 --- a/src/mame/drivers/softbox.cpp +++ b/src/mame/drivers/softbox.cpp @@ -126,8 +126,7 @@ void softbox_state::softbox_mem(address_map &map) void softbox_state::softbox_io(address_map &map) { map.global_mask(0xff); - map(0x08, 0x08).rw(I8251_TAG, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x09, 0x09).rw(I8251_TAG, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x08, 0x09).rw(I8251_TAG, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x0c, 0x0c).w(COM8116_TAG, FUNC(com8116_device::stt_str_w)); map(0x10, 0x13).rw(I8255_0_TAG, FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x14, 0x17).rw(I8255_1_TAG, FUNC(i8255_device::read), FUNC(i8255_device::write)); diff --git a/src/mame/drivers/sorcerer.cpp b/src/mame/drivers/sorcerer.cpp index f2279e5790b..668ffe80a90 100644 --- a/src/mame/drivers/sorcerer.cpp +++ b/src/mame/drivers/sorcerer.cpp @@ -548,6 +548,12 @@ ROM_START(sorcerer2) ROM_SYSTEM_BIOS(2, "dwmon", "DWMON 2.2C") ROMX_LOAD("dwmon.1e", 0xe000, 0x0800, CRC(a22db498) SHA1(ebedbce7454007f5a02fafe449fd09169173d7b3), ROM_BIOS(2) ) ROMX_LOAD("dwmon.2e", 0xe800, 0x0800, CRC(7b22b65a) SHA1(7f23dd308f34b6d795d6df06f2387dfd17f69edd), ROM_BIOS(2) ) + ROM_SYSTEM_BIOS(3, "ddmon", "DDMON 1.3") + ROMX_LOAD("ddmon.1e", 0xe000, 0x0800, CRC(6ce481da) SHA1(c927762b29a281b7c13d59bb17ea56494c64569b), ROM_BIOS(3) ) + ROMX_LOAD("ddmon.2e", 0xe800, 0x0800, CRC(50069b13) SHA1(0808018830fac15cceaed8ff2b19900f77447470), ROM_BIOS(3) ) + ROM_SYSTEM_BIOS(4, "adsmon", "ADSMON") // This requires an unemulated 80-column card. You can type 64 to get 64-columns, but it's mostly off the side. + ROMX_LOAD("adsmon.1e", 0xe000, 0x0800, CRC(460f981a) SHA1(bdae1d87b9e8ae2cae11663acd349b9ed2387094), ROM_BIOS(4) ) + ROMX_LOAD("adsmon.2e", 0xe800, 0x0800, CRC(cb3f1dda) SHA1(3fc14306e83d73b9b9afd9b543566e52ba3e008f), ROM_BIOS(4) ) ROM_END /* YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME */ diff --git a/src/mame/drivers/spbactn.cpp b/src/mame/drivers/spbactn.cpp index f6a0fa0a961..a7d0aa95bc5 100644 --- a/src/mame/drivers/spbactn.cpp +++ b/src/mame/drivers/spbactn.cpp @@ -365,9 +365,9 @@ static const gfx_layout spritelayout = }; static GFXDECODE_START( gfx_spbactn ) - GFXDECODE_ENTRY( "gfx1", 0, fgtilelayout, 0x0200, 16 + 240 ) - GFXDECODE_ENTRY( "gfx2", 0, bgtilelayout, 0x0300, 16 + 128 ) - GFXDECODE_ENTRY( "gfx3", 0, spritelayout, 0x0000, 0x1000 ) + GFXDECODE_ENTRY( "gfx1", 0, fgtilelayout, 0x0200, 16 + 240 ) + GFXDECODE_ENTRY( "gfx2", 0, bgtilelayout, 0x0300, 16 + 128 ) + GFXDECODE_ENTRY( "gfx3", 0, spritelayout, 0x0000, 0x100 ) GFXDECODE_END @@ -437,12 +437,13 @@ MACHINE_CONFIG_START(spbactn_state::spbactn) MCFG_DEVICE_ADD("spritegen", TECMO_SPRITE, 0) MCFG_TECMO_SPRITE_GFX_REGION(2) - MCFG_DEVICE_ADD("mixer", TECMO_MIXER, 0) - MCFG_TECMO_MIXER_SHIFTS(8,10,4) - MCFG_TECMO_MIXER_BLENDCOLS( 0x0000 + 0x300, 0x0000 + 0x200, 0x0000 + 0x100, 0x0000 + 0x000 ) - MCFG_TECMO_MIXER_REGULARCOLS( 0x0800 + 0x300, 0x0800 + 0x200, 0x0800 + 0x100, 0x0800 + 0x000 ) - MCFG_TECMO_MIXER_BLENDSOURCE( 0x1000 + 0x000, 0x1000 + 0x100) - MCFG_TECMO_MIXER_BGPEN(0x800 + 0x300) + + TECMO_MIXER(config, m_mixer, 0); + m_mixer->set_mixer_shifts(8,10,4); + m_mixer->set_blendcols( 0x0000 + 0x300, 0x0000 + 0x200, 0x0000 + 0x100, 0x0000 + 0x000 ); + m_mixer->set_regularcols( 0x0800 + 0x300, 0x0800 + 0x200, 0x0800 + 0x100, 0x0800 + 0x000 ); + m_mixer->set_blendsource( 0x1000 + 0x000, 0x1000 + 0x100); + m_mixer->set_bgpen(0x800 + 0x300, 0x000 + 0x300); /* sound hardware */ SPEAKER(config, "mono").front_center(); @@ -491,12 +492,13 @@ MACHINE_CONFIG_START(spbactn_state::spbactnp) MCFG_DEVICE_ADD("spritegen", TECMO_SPRITE, 0) MCFG_TECMO_SPRITE_GFX_REGION(2) - MCFG_DEVICE_ADD("mixer", TECMO_MIXER, 0) - MCFG_TECMO_MIXER_SHIFTS(12,14,8) - MCFG_TECMO_MIXER_BLENDCOLS( 0x0000 + 0x300, 0x0000 + 0x200, 0x0000 + 0x100, 0x0000 + 0x000 ) - MCFG_TECMO_MIXER_REGULARCOLS( 0x0800 + 0x300, 0x0800 + 0x200, 0x0800 + 0x100, 0x0800 + 0x000 ) - MCFG_TECMO_MIXER_BLENDSOURCE( 0x1000 + 0x000, 0x1000 + 0x100) - MCFG_TECMO_MIXER_BGPEN(0x800 + 0x300) + + TECMO_MIXER(config, m_mixer, 0); + m_mixer->set_mixer_shifts(12,14,8); + m_mixer->set_blendcols( 0x0000 + 0x300, 0x0000 + 0x200, 0x0000 + 0x100, 0x0000 + 0x000 ); + m_mixer->set_regularcols( 0x0800 + 0x300, 0x0800 + 0x200, 0x0800 + 0x100, 0x0800 + 0x000 ); + m_mixer->set_blendsource( 0x1000 + 0x000, 0x1000 + 0x100); + m_mixer->set_bgpen(0x800 + 0x300, 0x000 + 0x300); /* sound hardware - different? */ SPEAKER(config, "mono").front_center(); diff --git a/src/mame/drivers/spc1500.cpp b/src/mame/drivers/spc1500.cpp index 59279757096..03ec48c0495 100644 --- a/src/mame/drivers/spc1500.cpp +++ b/src/mame/drivers/spc1500.cpp @@ -647,7 +647,7 @@ WRITE8_MEMBER( spc1500_state::double_w) if (offset < 0x1800) { pcg_w(space, offset, data); } else if (offset < 0x1900) { crtc_w(space, offset, data); } else if (offset < 0x1a00) {} else - if (offset < 0x1b00) { m_pio->write(space, offset, data);} else + if (offset < 0x1b00) { m_pio->write(offset, data); } else if (offset < 0x1c00) { m_sound->data_w(space, offset, data);} else if (offset < 0x1d00) { m_sound->address_w(space, offset, data);} else if (offset < 0x1e00) { romsel(space, offset, data);} else @@ -674,7 +674,7 @@ READ8_MEMBER( spc1500_state::io_r) if (offset < 0x1800) { return pcg_r(space, offset); } else if (offset < 0x1900) { return crtc_r(space, offset); } else if (offset < 0x1a00) { return keyboard_r(space, offset); } else - if (offset < 0x1b00) { return m_pio->read(space, offset); } else + if (offset < 0x1b00) { return m_pio->read(offset); } else if (offset < 0x1c00) { return m_sound->data_r(space, offset); } else if (offset < 0x2000) {} else if (offset < 0x10000){ diff --git a/src/mame/drivers/spec128.cpp b/src/mame/drivers/spec128.cpp index 964eb7d49b8..cf65b317f4b 100644 --- a/src/mame/drivers/spec128.cpp +++ b/src/mame/drivers/spec128.cpp @@ -250,6 +250,12 @@ void spectrum_state::spectrum_128_mem(address_map &map) map(0xc000, 0xffff).bankrw("bank4"); } +void spectrum_state::init_spec128() +{ + // setup expansion slot + m_exp->set_io_space(&m_maincpu->space(AS_IO)); +} + MACHINE_RESET_MEMBER(spectrum_state,spectrum_128) { uint8_t *messram = m_ram->pointer(); @@ -376,8 +382,8 @@ ROM_START(hc2000) ROMX_LOAD("hc2000.v2", 0x14000,0x4000, CRC(65d90464) SHA1(5e2096e6460ff2120c8ada97579fdf82c1199c09), ROM_BIOS(1)) ROM_END -// YEAR NAME PARENT COMPAT MACHINE CLASS STATE INIT COMPANY FULLNAME FLAGS -COMP( 1986, spec128, 0, 0, spectrum_128, spec128, spectrum_state, empty_init, "Sinclair Research Ltd", "ZX Spectrum 128", 0 ) -COMP( 1986, specpls2, spec128, 0, spectrum_128, spec_plus, spectrum_state, empty_init, "Amstrad plc", "ZX Spectrum +2", 0 ) -COMP( 1991, hc128, spec128, 0, spectrum_128, spec_plus, spectrum_state, empty_init, "ICE-Felix", "HC-128", 0 ) -COMP( 1992, hc2000, spec128, 0, spectrum_128, spec_plus, spectrum_state, empty_init, "ICE-Felix", "HC-2000", MACHINE_NOT_WORKING ) +// YEAR NAME PARENT COMPAT MACHINE CLASS STATE INIT COMPANY FULLNAME FLAGS +COMP( 1986, spec128, 0, 0, spectrum_128, spec128, spectrum_state, init_spec128, "Sinclair Research Ltd", "ZX Spectrum 128", 0 ) +COMP( 1986, specpls2, spec128, 0, spectrum_128, spec_plus, spectrum_state, init_spec128, "Amstrad plc", "ZX Spectrum +2", 0 ) +COMP( 1991, hc128, spec128, 0, spectrum_128, spec_plus, spectrum_state, init_spec128, "ICE-Felix", "HC-128", 0 ) +COMP( 1992, hc2000, spec128, 0, spectrum_128, spec_plus, spectrum_state, init_spec128, "ICE-Felix", "HC-2000", MACHINE_NOT_WORKING ) diff --git a/src/mame/drivers/specpls3.cpp b/src/mame/drivers/specpls3.cpp index 6756d3b16f8..15089e10516 100644 --- a/src/mame/drivers/specpls3.cpp +++ b/src/mame/drivers/specpls3.cpp @@ -341,11 +341,17 @@ MACHINE_RESET_MEMBER(spectrum_state,spectrum_plus3) void spectrum_state::init_plus3() { m_floppy = 1; + + // setup expansion slot + m_exp->set_io_space(&m_maincpu->space(AS_IO)); } void spectrum_state::init_plus2() { m_floppy = 0; + + // setup expansion slot + m_exp->set_io_space(&m_maincpu->space(AS_IO)); } static void specpls3_floppies(device_slot_interface &device) @@ -383,7 +389,7 @@ MACHINE_CONFIG_START(spectrum_state::spectrum_plus3) MCFG_MACHINE_RESET_OVERRIDE(spectrum_state, spectrum_plus3 ) - MCFG_UPD765A_ADD("upd765", true, true) + UPD765A(config, m_upd765, true, true); MCFG_FLOPPY_DRIVE_ADD("upd765:0", specpls3_floppies, "3ssdd", floppy_image_device::default_floppy_formats) MCFG_FLOPPY_DRIVE_ADD("upd765:1", specpls3_floppies, "3ssdd", floppy_image_device::default_floppy_formats) diff --git a/src/mame/drivers/spectrum.cpp b/src/mame/drivers/spectrum.cpp index 6317c1e81f2..1b7c4c2653b 100644 --- a/src/mame/drivers/spectrum.cpp +++ b/src/mame/drivers/spectrum.cpp @@ -435,8 +435,8 @@ void spectrum_state::spectrum_mem(address_map &map) { map(0x0000, 0x3fff).rw(FUNC(spectrum_state::spectrum_rom_r), FUNC(spectrum_state::spectrum_rom_w)); map(0x4000, 0x5aff).ram().share("video_ram"); -// AM_RANGE(0x5b00, 0x7fff) AM_RAM -// AM_RANGE(0x8000, 0xffff) AM_RAM + // AM_RANGE(0x5b00, 0x7fff) AM_RAM + // AM_RANGE(0x8000, 0xffff) AM_RAM } /* ports are not decoded full. @@ -613,10 +613,13 @@ void spectrum_state::init_spectrum() switch (m_ram->size()) { case 48*1024: - space.install_ram(0x8000, 0xffff, nullptr); // Fall through + space.install_ram(0x8000, 0xffff, nullptr); // Fall through case 16*1024: - space.install_ram(0x5b00, 0x7fff, nullptr); + space.install_ram(0x5b00, 0x7fff, nullptr); } + + // setup expansion slot + m_exp->set_io_space(&m_maincpu->space(AS_IO)); } MACHINE_RESET_MEMBER(spectrum_state,spectrum) @@ -668,27 +671,26 @@ INTERRUPT_GEN_MEMBER(spectrum_state::spec_interrupt) MACHINE_CONFIG_START(spectrum_state::spectrum_common) /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", Z80, X1 / 4) /* This is verified only for the ZX Spectrum. Other clones are reported to have different clocks */ - MCFG_DEVICE_PROGRAM_MAP(spectrum_mem) - MCFG_DEVICE_IO_MAP(spectrum_io) - MCFG_DEVICE_VBLANK_INT_DRIVER("screen", spectrum_state, spec_interrupt) - MCFG_QUANTUM_TIME(attotime::from_hz(60)) + Z80(config, m_maincpu, X1 / 4); /* This is verified only for the ZX Spectrum. Other clones are reported to have different clocks */ + m_maincpu->set_addrmap(AS_PROGRAM, &spectrum_state::spectrum_mem); + m_maincpu->set_addrmap(AS_IO, &spectrum_state::spectrum_io); + m_maincpu->set_vblank_int("screen", FUNC(spectrum_state::spec_interrupt)); + + config.m_minimum_quantum = attotime::from_hz(60); MCFG_MACHINE_RESET_OVERRIDE(spectrum_state, spectrum ) /* video hardware */ - MCFG_SCREEN_ADD("screen", RASTER) - - MCFG_SCREEN_RAW_PARAMS(X1 / 2, 448, 0, 352, 312, 0, 296) + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_raw(X1 / 2, 448, 0, 352, 312, 0, 296); + m_screen->set_screen_update(FUNC(spectrum_state::screen_update_spectrum)); + m_screen->screen_vblank().set(FUNC(spectrum_state::screen_vblank_spectrum)); + m_screen->set_palette("palette"); - MCFG_SCREEN_UPDATE_DRIVER(spectrum_state, screen_update_spectrum) - MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, spectrum_state, screen_vblank_spectrum)) - MCFG_SCREEN_PALETTE("palette") + palette_device &palette(PALETTE(config, "palette", 16)); + palette.set_init(palette_init_delegate(FUNC(spectrum_state::palette_init_spectrum), this)); - MCFG_PALETTE_ADD("palette", 16) - MCFG_PALETTE_INIT_OWNER(spectrum_state, spectrum ) - - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_spectrum) + GFXDECODE(config, "gfxdecode", "palette", gfx_spectrum); MCFG_VIDEO_START_OVERRIDE(spectrum_state, spectrum ) /* sound hardware */ @@ -697,17 +699,22 @@ MACHINE_CONFIG_START(spectrum_state::spectrum_common) SPEAKER_SOUND(config, "speaker").add_route(ALL_OUTPUTS, "mono", 0.50); /* expansion port */ - MCFG_SPECTRUM_EXPANSION_SLOT_ADD("exp", spectrum_expansion_devices, "kempjoy") + SPECTRUM_EXPANSION_SLOT(config, m_exp, spectrum_expansion_devices, "kempjoy"); + m_exp->irq_handler().set_inputline(m_maincpu, INPUT_LINE_IRQ0); + m_exp->nmi_handler().set_inputline(m_maincpu, INPUT_LINE_NMI); /* devices */ - MCFG_SNAPSHOT_ADD("snapshot", spectrum_state, spectrum, "ach,frz,plusd,prg,sem,sit,sna,snp,snx,sp,z80,zx", 0) - MCFG_QUICKLOAD_ADD("quickload", spectrum_state, spectrum, "raw,scr", 2) // The delay prevents the screen from being cleared by the RAM test at boot - MCFG_CASSETTE_ADD( "cassette" ) - MCFG_CASSETTE_FORMATS(tzx_cassette_formats) - MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED | CASSETTE_MOTOR_ENABLED) - MCFG_CASSETTE_INTERFACE("spectrum_cass") - - MCFG_SOFTWARE_LIST_ADD("cass_list", "spectrum_cass") + snapshot_image_device &snapshot(SNAPSHOT(config, "snapshot", 0)); + snapshot.set_handler(snapquick_load_delegate(&SNAPSHOT_LOAD_NAME(spectrum_state, spectrum), this), "ach,frz,plusd,prg,sem,sit,sna,snp,snx,sp,z80,zx", 0); + quickload_image_device &quickload(QUICKLOAD(config, "quickload", 0)); + quickload.set_handler(snapquick_load_delegate(&QUICKLOAD_LOAD_NAME(spectrum_state, spectrum), this), "raw,scr", 2); // The delay prevents the screen from being cleared by the RAM test at boot + + CASSETTE(config, m_cassette); + m_cassette->set_formats(tzx_cassette_formats); + m_cassette->set_default_state(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED | CASSETTE_MOTOR_ENABLED); + m_cassette->set_interface("spectrum_cass"); + + SOFTWARE_LIST(config, "cass_list").set_original("spectrum_cass"); MACHINE_CONFIG_END void spectrum_state::spectrum(machine_config &config) diff --git a/src/mame/drivers/sprint8.cpp b/src/mame/drivers/sprint8.cpp index 50ca37bf8ca..3aefa11b504 100644 --- a/src/mame/drivers/sprint8.cpp +++ b/src/mame/drivers/sprint8.cpp @@ -56,6 +56,7 @@ void sprint8_state::machine_start() save_item(NAME(m_collision_reset)); save_item(NAME(m_collision_index)); save_item(NAME(m_dial)); + save_item(NAME(m_team)); } void sprint8_state::machine_reset() diff --git a/src/mame/drivers/sshangha.cpp b/src/mame/drivers/sshangha.cpp index cf97d40a778..0cfc1e26e2d 100644 --- a/src/mame/drivers/sshangha.cpp +++ b/src/mame/drivers/sshangha.cpp @@ -251,7 +251,7 @@ void sshangha_state::sshanghab_map(address_map &map) map(0x381000, 0x383fff).ram(); // unused palette area map(0x3c0000, 0x3c07ff).ram().share(m_spriteram); // bootleg spriteram - map(0x3c0800, 0x3c0fff).ram().share(m_spriteram2); + map(0x3c0800, 0x3c0fff).ram().share(m_spriteram2); map(0xfec000, 0xff3fff).ram(); map(0xff4000, 0xff47ff).ram(); @@ -419,7 +419,7 @@ void sshangha_state::sshangha(machine_config &config) Z80(config, m_audiocpu, 16_MHz_XTAL / 4); m_audiocpu->set_addrmap(AS_PROGRAM, &sshangha_state::sound_map); - + config.m_minimum_quantum = attotime::from_hz(6000); screen_device& screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); diff --git a/src/mame/drivers/ssv.cpp b/src/mame/drivers/ssv.cpp index 4e9d328931b..7300cc1863c 100644 --- a/src/mame/drivers/ssv.cpp +++ b/src/mame/drivers/ssv.cpp @@ -2827,9 +2827,9 @@ MACHINE_CONFIG_START(ssv_state::eaglshot) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) - MCFG_UPD4701_PORTX("TRACKX") - MCFG_UPD4701_PORTY("TRACKY") + UPD4701A(config, m_upd4701); + m_upd4701->set_portx_tag("TRACKX"); + m_upd4701->set_porty_tag("TRACKY"); WATCHDOG_TIMER(config, "watchdog"); diff --git a/src/mame/drivers/ssystem3.cpp b/src/mame/drivers/ssystem3.cpp index b3beb6eef27..ddc5efd84ac 100644 --- a/src/mame/drivers/ssystem3.cpp +++ b/src/mame/drivers/ssystem3.cpp @@ -291,7 +291,7 @@ void ssystem3_state::ssystem3(machine_config &config) /* video hardware */ screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); - screen.set_refresh_hz(LCD_FRAMES_PER_SECOND); + screen.set_refresh_hz(30); screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */ screen.set_size(728, 437); screen.set_visarea(0, 728-1, 0, 437-1); diff --git a/src/mame/drivers/stlforce.cpp b/src/mame/drivers/stlforce.cpp index db02de52c1e..4f4fe0717ff 100644 --- a/src/mame/drivers/stlforce.cpp +++ b/src/mame/drivers/stlforce.cpp @@ -72,10 +72,6 @@ TO DO : #include "emu.h" #include "includes/stlforce.h" -#include "cpu/m68000/m68000.h" -#include "sound/okim6295.h" -#include "screen.h" -#include "speaker.h" WRITE8_MEMBER(stlforce_state::eeprom_w) { @@ -95,10 +91,10 @@ WRITE8_MEMBER(stlforce_state::oki_bank_w) void stlforce_state::stlforce_map(address_map &map) { map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x1007ff).ram().w(FUNC(stlforce_state::bg_videoram_w)).share("bg_videoram"); - map(0x100800, 0x100fff).ram().w(FUNC(stlforce_state::mlow_videoram_w)).share("mlow_videoram"); - map(0x101000, 0x1017ff).ram().w(FUNC(stlforce_state::mhigh_videoram_w)).share("mhigh_videoram"); - map(0x101800, 0x1027ff).ram().w(FUNC(stlforce_state::tx_videoram_w)).share("tx_videoram"); + map(0x100000, 0x1007ff).ram().w(m_video, FUNC(edevices_device::bg_videoram_w)).share("bg_videoram"); + map(0x100800, 0x100fff).ram().w(m_video, FUNC(edevices_device::mlow_videoram_w)).share("mlow_videoram"); + map(0x101000, 0x1017ff).ram().w(m_video, FUNC(edevices_device::mhigh_videoram_w)).share("mhigh_videoram"); + map(0x101800, 0x1027ff).ram().w(m_video, FUNC(edevices_device::tx_videoram_w)).share("tx_videoram"); map(0x102800, 0x102fff).ram(); /* unknown / ram */ map(0x103000, 0x1033ff).ram().share("bg_scrollram"); map(0x103400, 0x1037ff).ram().share("mlow_scrollram"); @@ -106,13 +102,14 @@ void stlforce_state::stlforce_map(address_map &map) map(0x103c00, 0x103fff).ram().share("vidattrram"); map(0x104000, 0x104fff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); map(0x105000, 0x107fff).ram(); /* unknown / ram */ - map(0x108000, 0x108fff).ram().share("spriteram"); + map(0x108000, 0x1087ff).ram().share("spriteram"); + map(0x108800, 0x108fff).ram(); map(0x109000, 0x11ffff).ram(); map(0x400000, 0x400001).portr("INPUT"); map(0x400002, 0x400003).portr("SYSTEM"); map(0x400011, 0x400011).w(FUNC(stlforce_state::eeprom_w)); map(0x400012, 0x400012).w(FUNC(stlforce_state::oki_bank_w)); - map(0x40001e, 0x40001f).nopw(); // sprites buffer commands + map(0x40001e, 0x40001f).w(m_video, FUNC(edevices_device::sprites_commands_w)); map(0x410001, 0x410001).rw("oki", FUNC(okim6295_device::read), FUNC(okim6295_device::write)); } @@ -156,7 +153,7 @@ INPUT_PORTS_END static const gfx_layout stlforce_bglayout = { 16,16, - RGN_FRAC(1,1), + RGN_FRAC(1,4), 4, {0,1,2,3}, {12,8,4,0,28,24,20,16,16*32+12,16*32+8,16*32+4,16*32+0,16*32+28,16*32+24,16*32+20,16*32+16}, @@ -167,7 +164,7 @@ static const gfx_layout stlforce_bglayout = static const gfx_layout stlforce_txlayout = { 8,8, - RGN_FRAC(1,1), + RGN_FRAC(1,4), 4, {0,1,2,3}, {12,8,4,0,28,24,20,16}, @@ -187,11 +184,17 @@ static const gfx_layout stlforce_splayout = }; static GFXDECODE_START( gfx_stlforce ) - GFXDECODE_ENTRY( "gfx1", 0, stlforce_bglayout, 0, 256 ) - GFXDECODE_ENTRY( "gfx1", 0, stlforce_txlayout, 0, 256 ) - GFXDECODE_ENTRY( "gfx2", 0, stlforce_splayout, 0, 256 ) + GFXDECODE_ENTRY( "gfx2", 0, stlforce_splayout, 1024, 16 ) + GFXDECODE_ENTRY( "gfx1", 0x180000, stlforce_txlayout, 384, 8 ) + GFXDECODE_ENTRY( "gfx1", 0x100000, stlforce_bglayout, 256, 8 ) + GFXDECODE_ENTRY( "gfx1", 0x080000, stlforce_bglayout, 128, 8 ) + GFXDECODE_ENTRY( "gfx1", 0x000000, stlforce_bglayout, 0, 8 ) GFXDECODE_END +uint32_t stlforce_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + return m_video->draw(screen, bitmap, cliprect); +} MACHINE_CONFIG_START(stlforce_state::stlforce) @@ -207,7 +210,7 @@ MACHINE_CONFIG_START(stlforce_state::stlforce) MCFG_SCREEN_REFRESH_RATE(58) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) MCFG_SCREEN_SIZE(64*8, 32*8) - MCFG_SCREEN_VISIBLE_AREA(1*8, 47*8-1, 0*8, 30*8-1) + MCFG_SCREEN_VISIBLE_AREA(8, 48*8-1-8-2, 0, 30*8-1) MCFG_SCREEN_UPDATE_DRIVER(stlforce_state, screen_update) MCFG_SCREEN_PALETTE("palette") @@ -215,6 +218,19 @@ MACHINE_CONFIG_START(stlforce_state::stlforce) MCFG_PALETTE_ADD("palette", 0x800) MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR) + EDEVICES_SFORCE_VID(config, m_video, 0); + m_video->set_bg_videoram_tag("bg_videoram"); + m_video->set_mlow_videoram_tag("mlow_videoram"); + m_video->set_mhigh_videoram_tag("mhigh_videoram"); + m_video->set_tx_videoram_tag("tx_videoram"); + m_video->set_bg_scrollram_tag("bg_scrollram"); + m_video->set_mlow_scrollram_tag("mlow_scrollram"); + m_video->set_mhigh_scrollram_tag("mhigh_scrollram"); + m_video->set_vidattrram_tag("vidattrram"); + m_video->set_spriteram_tag("spriteram"); + m_video->set_gfxdecode_tag("gfxdecode"); + m_video->set_palette_tag("palette"); + /* sound hardware */ SPEAKER(config, "mono").front_center(); @@ -230,7 +246,10 @@ MACHINE_CONFIG_START(stlforce_state::twinbrat) MCFG_DEVICE_CLOCK(XTAL(14'745'600)) MCFG_SCREEN_MODIFY("screen") - MCFG_SCREEN_VISIBLE_AREA(3*8, 45*8-1, 0*8, 30*8-1) + MCFG_SCREEN_VISIBLE_AREA(3*8, 44*8-1, 0*8, 30*8-1) + + /* modify m_video */ + m_video->set_spritexoffset(10); MCFG_DEVICE_MODIFY("oki") MCFG_DEVICE_CLOCK(XTAL(30'000'000) / 32) // verified on 2 PCBs @@ -374,21 +393,15 @@ ROM_START( twinbratb ) ROM_LOAD( "eeprom-twinbrat.bin", 0x0000, 0x0080, CRC(9366263d) SHA1(ff5155498ed0b349ecc1ce98a39566b642201cf2) ) ROM_END -void stlforce_state::init_stlforce() -{ - m_sprxoffs = 0; -} - void stlforce_state::init_twinbrat() { - m_sprxoffs = 9; - m_okibank->configure_entries(0, 4, memregion("oki")->base(), 0x20000); m_okibank->set_entry(0); } -GAME( 1994, stlforce, 0, stlforce, stlforce, stlforce_state, init_stlforce, ROT0, "Electronic Devices Italy / Ecogames S.L. Spain", "Steel Force", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, stlforce, 0, stlforce, stlforce, stlforce_state, empty_init, ROT0, "Electronic Devices Italy / Ecogames S.L. Spain", "Steel Force", MACHINE_SUPPORTS_SAVE ) + GAME( 1995, twinbrat, 0, twinbrat, stlforce, stlforce_state, init_twinbrat, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, twinbrata, twinbrat, twinbrat, stlforce, stlforce_state, init_twinbrat, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, twinbratb, twinbrat, twinbrat, stlforce, stlforce_state, init_twinbrat, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 3)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/stratos.cpp b/src/mame/drivers/stratos.cpp index 90d40d42567..1c4cb161ce3 100644 --- a/src/mame/drivers/stratos.cpp +++ b/src/mame/drivers/stratos.cpp @@ -83,7 +83,7 @@ void stratos_state::machine_reset() void stratos_state::show_leds() { - static const char *led_pos[18] = { + static char const *const led_pos[18] = { nullptr, nullptr, "gPawn", "gKnight", "gBishop", "gRook", "gQueen", "gKing", nullptr, nullptr, "rPawn", "rKnight", "rBishop", "rRook", "rQueen", "rKing", nullptr, nullptr }; char str_red[64]; diff --git a/src/mame/drivers/stv.cpp b/src/mame/drivers/stv.cpp index a0eb6832903..2130f052611 100644 --- a/src/mame/drivers/stv.cpp +++ b/src/mame/drivers/stv.cpp @@ -3661,6 +3661,35 @@ ROM_START( sackids ) ROM_REGION32_BE( 0x3000000, "abus", ROMREGION_ERASE00 ) /* SH2 code */ ROM_END +ROM_START( skychal ) + STV_BIOS + + ROM_REGION32_BE( 0x3000000, "cart", ROMREGION_ERASE00 ) /* SH2 code */ + ROM_LOAD16_WORD_SWAP( "ic22.bin", 0x0200000, 0x200000, CRC(a12ccf64) SHA1(eb3ff0cdc10fa17e40af5bddedfa5f758c7a5623) ) + ROM_LOAD16_WORD_SWAP( "ic24.bin", 0x0400000, 0x200000, CRC(9a929dcf) SHA1(892e491fa33cc30cbbd24feb4ea6a63f9a9e1a62) ) + ROM_LOAD16_WORD_SWAP( "ic26.bin", 0x0600000, 0x200000, CRC(ed2183d3) SHA1(7c43171a57e070a295c191408bd1b8ffee053d9b) ) + ROM_LOAD16_WORD_SWAP( "ic28.bin", 0x0800000, 0x200000, CRC(e7401d68) SHA1(02f77439075b6367b46dc9ef7f67023b32a68526) ) + ROM_LOAD16_WORD_SWAP( "ic30.bin", 0x0a00000, 0x200000, CRC(950f7a2f) SHA1(1b4fd7b08eeb2fdf2cdfae7f8aa3240e8dce3b9a) ) + ROM_LOAD16_WORD_SWAP( "ic32.bin", 0x0c00000, 0x200000, CRC(a656212b) SHA1(b2bf325cb4cf67787c836a9ac1bb7231068ffd82) ) + + ROM_REGION16_BE( 0x80, "eeprom", 0 ) // preconfigured to 1 player + ROM_LOAD( "skychal.nv", 0x0000, 0x0080, CRC(a6515237) SHA1(5e50cc93eb60ed67cdca408b23b80d16a398df02) ) +ROM_END + +ROM_START( supgoal ) + STV_BIOS + + ROM_REGION32_BE( 0x3000000, "cart", ROMREGION_ERASE00 ) /* SH2 code */ + ROM_LOAD16_WORD_SWAP( "ic22.bin", 0x0200000, 0x200000, CRC(a686f7a2) SHA1(f4f9b63046d184864cfffe6ef8268a33b73298da) ) + ROM_LOAD16_WORD_SWAP( "ic24.bin", 0x0400000, 0x200000, CRC(56fbbeea) SHA1(2c622ccc20aed0df7c611a00986ce76b84c61d70) ) + ROM_LOAD16_WORD_SWAP( "ic26.bin", 0x0600000, 0x200000, CRC(64701c2b) SHA1(e9a426ce1882660d533b963899a8b1b6f41f85d4) ) + ROM_LOAD16_WORD_SWAP( "ic28.bin", 0x0800000, 0x200000, CRC(d9aebe8c) SHA1(cd19cf1227d151a015c4dc3aed14bc3b2f78ce07) ) + ROM_LOAD16_WORD_SWAP( "ic30.bin", 0x0a00000, 0x200000, CRC(26d4ade5) SHA1(6b958aa4db293c7af88a735323d19f6417d86048) ) + + ROM_REGION16_BE( 0x80, "eeprom", 0 ) // preconfigured to 1 player + ROM_LOAD( "supgoal.nv", 0x0000, 0x0080, CRC(63806aae) SHA1(b82f0995799e9259a1f071ea8b64a719f9e3c9e9) ) +ROM_END + GAME( 1996, stvbios, 0, stv_slot, stv, stv_state, init_stv, ROT0, "Sega", "ST-V Bios", MACHINE_IS_BIOS_ROOT ) @@ -3709,10 +3738,12 @@ GAME( 1998, sss, stvbios, stv_5881, stv, stv_state, init_sss, GAME( 1995, sandor, stvbios, stv, stv, stv_state, init_sandor, ROT0, "Sega", "Puzzle & Action: Sando-R (J 951114 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1997, thunt, sandor, stv, stv, stv_state, init_thunt, ROT0, "Sega", "Puzzle & Action: Treasure Hunt (JUET 970901 V2.00E)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1997, thuntk, sandor, stv, stv, stv_state, init_sandor, ROT0, "Sega / Deniam", "Puzzle & Action: BoMulEul Chajara (JUET 970125 V2.00K)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2000, skychal, stvbios, hopper, patocar, stv_state, init_hopper, ROT0, "Sega", "Sky Challenger (J 000406 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1995, smleague, stvbios, stv, stv, stv_state, init_smleague, ROT0, "Sega", "Super Major League (U 960108 V1.000)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1995, finlarch, smleague,stv, stv, stv_state, init_finlarch, ROT0, "Sega", "Final Arch (J 950714 V1.001)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1996, sokyugrt, stvbios, stv, stv, stv_state, init_sokyugrt, ROT0, "Raizing / Eighting", "Soukyugurentai / Terra Diver (JUET 960821 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1995, suikoenb, stvbios, stv, stv6b, stv_state, init_suikoenb, ROT0, "Data East", "Suiko Enbu / Outlaws of the Lost Dynasty (JUETL 950314 V2.001)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1998, supgoal, stvbios, hopper, patocar, stv_state, init_hopper, ROT0, "Sega", "Nerae! Super Goal (J 981218 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1997, techbowl, stvbios, hopper, patocar, stv_state, init_hopper, ROT0, "Sega", "Technical Bowling (J 971212 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1996, vfkids, stvbios, stv, stv, stv_state, init_stv, ROT0, "Sega", "Virtua Fighter Kids (JUET 960319 V0.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1997, vmahjong, stvbios, stv, vmahjong, stv_state, init_stvmp, ROT0, "Micronet", "Virtual Mahjong (J 961214 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/drivers/subsino.cpp b/src/mame/drivers/subsino.cpp index 939825a3559..d1a87d1d4ac 100644 --- a/src/mame/drivers/subsino.cpp +++ b/src/mame/drivers/subsino.cpp @@ -2914,7 +2914,8 @@ MACHINE_CONFIG_START(subsino_state::stbsub) MCFG_PALETTE_ADD("palette", 0x100) //MCFG_PALETTE_INIT_OWNER(subsino_state, _3proms) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") // HMC HM86171 VGA 256 colour RAMDAC + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); // HMC HM86171 VGA 256 colour RAMDAC + ramdac.set_addrmap(0, &subsino_state::ramdac_map); MCFG_VIDEO_START_OVERRIDE(subsino_state,stbsub) diff --git a/src/mame/drivers/subsino2.cpp b/src/mame/drivers/subsino2.cpp index 7872e83f1b1..232e3e614b1 100644 --- a/src/mame/drivers/subsino2.cpp +++ b/src/mame/drivers/subsino2.cpp @@ -2399,7 +2399,8 @@ MACHINE_CONFIG_START(subsino2_state::bishjan) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_ss9601) MCFG_PALETTE_ADD( "palette", 256 ) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") // HMC HM86171 VGA 256 colour RAMDAC + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); // HMC HM86171 VGA 256 colour RAMDAC + ramdac.set_addrmap(0, &subsino2_state::ramdac_map); MCFG_VIDEO_START_OVERRIDE(subsino2_state, subsino2 ) @@ -2450,7 +2451,8 @@ MACHINE_CONFIG_START(subsino2_state::mtrain) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_ss9601) MCFG_PALETTE_ADD( "palette", 256 ) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") // HMC HM86171 VGA 256 colour RAMDAC + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); // HMC HM86171 VGA 256 colour RAMDAC + ramdac.set_addrmap(0, &subsino2_state::ramdac_map); MCFG_VIDEO_START_OVERRIDE(subsino2_state, subsino2 ) @@ -2484,7 +2486,8 @@ MACHINE_CONFIG_START(subsino2_state::saklove) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_ss9601) MCFG_PALETTE_ADD( "palette", 256 ) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") // HMC HM86171 VGA 256 colour RAMDAC + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); // HMC HM86171 VGA 256 colour RAMDAC + ramdac.set_addrmap(0, &subsino2_state::ramdac_map); MCFG_VIDEO_START_OVERRIDE(subsino2_state, subsino2 ) @@ -2522,7 +2525,8 @@ MACHINE_CONFIG_START(subsino2_state::xplan) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_ss9601) MCFG_PALETTE_ADD( "palette", 256 ) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") // HMC HM86171 VGA 256 colour RAMDAC + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); // HMC HM86171 VGA 256 colour RAMDAC + ramdac.set_addrmap(0, &subsino2_state::ramdac_map); MCFG_VIDEO_START_OVERRIDE(subsino2_state, subsino2 ) diff --git a/src/mame/drivers/sun3.cpp b/src/mame/drivers/sun3.cpp index 76f36d39ee0..0e51c328214 100644 --- a/src/mame/drivers/sun3.cpp +++ b/src/mame/drivers/sun3.cpp @@ -187,9 +187,14 @@ fefc34a - start of mem_size, which queries ECC registers for each memory board #include "machine/timekpr.h" #include "machine/timer.h" #include "machine/z80scc.h" +#include "machine/am79c90.h" +#include "machine/ncr5380n.h" +#include "machine/nscsi_cd.h" +#include "machine/nscsi_hd.h" #include "bus/rs232/rs232.h" #include "bus/sunkbd/sunkbd.h" +#include "bus/sunmouse/sunmouse.h" #include "screen.h" @@ -200,6 +205,7 @@ fefc34a - start of mem_size, which queries ECC registers for each memory board #define RS232A_TAG "rs232a" #define RS232B_TAG "rs232b" #define KEYBOARD_TAG "keyboard" +#define MOUSE_TAG "mouseport" // page table entry constants #define PM_VALID (0x80000000) // page is valid @@ -225,6 +231,8 @@ public: m_maincpu(*this, "maincpu"), m_scc1(*this, SCC1_TAG), m_scc2(*this, SCC2_TAG), + m_scsibus(*this, "scsibus"), + m_scsi(*this, "scsibus:7:ncr5380"), m_p_ram(*this, "p_ram"), m_bw2_vram(*this, "bw2_vram"), m_type0space(*this, "type0"), @@ -233,7 +241,8 @@ public: m_type3space(*this, "type3"), m_rom(*this, "user1"), m_idprom(*this, "idprom"), - m_ram(*this, RAM_TAG) + m_ram(*this, RAM_TAG), + m_lance(*this, "lance") { } void sun3(machine_config &config); @@ -242,10 +251,15 @@ public: void sun3200(machine_config &config); void sun3_50(machine_config &config); + void ncr5380(device_t *device); + private: required_device<m68020_device> m_maincpu; required_device<z80scc_device> m_scc1; required_device<z80scc_device> m_scc2; + required_device<nscsi_bus_device> m_scsibus; + required_device<ncr5380n_device> m_scsi; + virtual void machine_start() override; virtual void machine_reset() override; @@ -254,6 +268,7 @@ private: optional_device<address_map_bank_device> m_type0space, m_type1space, m_type2space, m_type3space; required_memory_region m_rom, m_idprom; required_device<ram_device> m_ram; + required_device<am79c90_device> m_lance; DECLARE_READ32_MEMBER( tl_mmu_r ); DECLARE_WRITE32_MEMBER( tl_mmu_w ); @@ -295,6 +310,27 @@ private: uint32_t m_cache_tags[0x4000], m_cache_data[0x4000]; }; +static void sun_cdrom(device_t *device) +{ + downcast<nscsi_cdrom_device &>(*device).set_block_size(512); +} + +void sun3_state::ncr5380(device_t *device) +{ + devcb_base *devcb; + (void)devcb; + MCFG_DEVICE_CLOCK(10000000) +// MCFG_NCR5380N_DRQ_HANDLER(WRITELINE(*this, sun3_state, drq_w)) +} + +static void scsi_devices(device_slot_interface &device) +{ + device.option_add("cdrom", NSCSI_CDROM); + device.option_add("harddisk", NSCSI_HARDDISK); + device.option_add_internal("ncr5380", NCR5380N); + device.set_option_machine_config("cdrom", sun_cdrom); +} + READ32_MEMBER( sun3_state::ram_r ) { if (m_ecc[0] == 0x10c00000) @@ -750,6 +786,8 @@ void sun3_state::vmetype1space_map(address_map &map) map(0x00080000, 0x0008000f).rw(FUNC(sun3_state::parity_r), FUNC(sun3_state::parity_w)); map(0x000a0000, 0x000a0003).rw(FUNC(sun3_state::irqctrl_r), FUNC(sun3_state::irqctrl_w)); map(0x00100000, 0x0010ffff).rom().region("user1", 0); + map(0x00120000, 0x00120003).rw(m_lance, FUNC(am79c90_device::regs_r), FUNC(am79c90_device::regs_w)); + map(0x00140000, 0x00140007).rw(m_scsi, FUNC(ncr5380n_device::read), FUNC(ncr5380n_device::write)).umask32(0xffffffff); map(0x001e0000, 0x001e00ff).rw(FUNC(sun3_state::ecc_r), FUNC(sun3_state::ecc_w)); } @@ -1001,9 +1039,12 @@ MACHINE_CONFIG_START(sun3_state::sun3) SCC8530N(config, m_scc1, 4.9152_MHz_XTAL); m_scc1->out_txda_callback().set(KEYBOARD_TAG, FUNC(sun_keyboard_port_device::write_txd)); + m_scc1->out_txdb_callback().set(MOUSE_TAG, FUNC(sun_mouse_port_device::write_txd)); SUNKBD_PORT(config, KEYBOARD_TAG, default_sun_keyboard_devices, "type3hle").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxa_w)); + SUNMOUSE_PORT(config, MOUSE_TAG, default_sun_mouse_devices, "hle1200").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxb_w)); + SCC8530N(config, m_scc2, 4.9152_MHz_XTAL); m_scc2->out_txda_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_txd)); m_scc2->out_txdb_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_txd)); @@ -1017,6 +1058,19 @@ MACHINE_CONFIG_START(sun3_state::sun3) MCFG_RS232_RXD_HANDLER(WRITELINE(m_scc2, z80scc_device, rxb_w)) MCFG_RS232_DCD_HANDLER(WRITELINE(m_scc2, z80scc_device, dcdb_w)) MCFG_RS232_CTS_HANDLER(WRITELINE(m_scc2, z80scc_device, ctsb_w)) + + AM79C90(config, m_lance, 10'000'000); // clock is a guess + + MCFG_NSCSI_BUS_ADD("scsibus") + MCFG_NSCSI_ADD("scsibus:0", scsi_devices, nullptr, false) + MCFG_NSCSI_ADD("scsibus:1", scsi_devices, "harddisk", false) + MCFG_NSCSI_ADD("scsibus:2", scsi_devices, nullptr, false) + MCFG_NSCSI_ADD("scsibus:3", scsi_devices, nullptr, false) + MCFG_NSCSI_ADD("scsibus:4", scsi_devices, nullptr, false) + MCFG_NSCSI_ADD("scsibus:5", scsi_devices, nullptr, false) + MCFG_NSCSI_ADD("scsibus:6", scsi_devices, "cdrom", false) + MCFG_NSCSI_ADD("scsibus:7", scsi_devices, "ncr5380", true) + MCFG_SLOT_OPTION_MACHINE_CONFIG("ncr5380", [this] (device_t *device) { ncr5380(device); }) MACHINE_CONFIG_END // Sun 3/60 @@ -1035,6 +1089,7 @@ MACHINE_CONFIG_END // Sun 3/E MACHINE_CONFIG_START(sun3_state::sun3e) sun3(config); + MCFG_DEVICE_REPLACE("maincpu", M68020, 20000000) MCFG_DEVICE_PROGRAM_MAP(sun3_mem) MACHINE_CONFIG_END @@ -1059,6 +1114,8 @@ MACHINE_CONFIG_START(sun3_state::sun3_50) MCFG_DEVICE_ADD("maincpu", M68020, 15700000) MCFG_DEVICE_PROGRAM_MAP(sun3_mem) + AM79C90(config, m_lance, 10'000'000); // clock is a guess + MCFG_SCREEN_ADD("bwtwo", RASTER) MCFG_SCREEN_UPDATE_DRIVER(sun3_state, bw2_350_update) MCFG_SCREEN_SIZE(1600,1100) @@ -1085,9 +1142,12 @@ MACHINE_CONFIG_START(sun3_state::sun3_50) SCC8530N(config, m_scc1, 4.9152_MHz_XTAL); m_scc1->out_txda_callback().set(KEYBOARD_TAG, FUNC(sun_keyboard_port_device::write_txd)); + m_scc1->out_txdb_callback().set(MOUSE_TAG, FUNC(sun_mouse_port_device::write_txd)); SUNKBD_PORT(config, KEYBOARD_TAG, default_sun_keyboard_devices, "type3hle").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxa_w)); + SUNMOUSE_PORT(config, MOUSE_TAG, default_sun_mouse_devices, "hle1200").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxb_w)); + SCC8530N(config, m_scc2, 4.9152_MHz_XTAL); m_scc2->out_txda_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_txd)); m_scc2->out_txdb_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_txd)); @@ -1101,6 +1161,17 @@ MACHINE_CONFIG_START(sun3_state::sun3_50) MCFG_RS232_RXD_HANDLER(WRITELINE(m_scc2, z80scc_device, rxb_w)) MCFG_RS232_DCD_HANDLER(WRITELINE(m_scc2, z80scc_device, dcdb_w)) MCFG_RS232_CTS_HANDLER(WRITELINE(m_scc2, z80scc_device, ctsb_w)) + + MCFG_NSCSI_BUS_ADD("scsibus") + MCFG_NSCSI_ADD("scsibus:0", scsi_devices, nullptr, false) + MCFG_NSCSI_ADD("scsibus:1", scsi_devices, "harddisk", false) + MCFG_NSCSI_ADD("scsibus:2", scsi_devices, nullptr, false) + MCFG_NSCSI_ADD("scsibus:3", scsi_devices, nullptr, false) + MCFG_NSCSI_ADD("scsibus:4", scsi_devices, nullptr, false) + MCFG_NSCSI_ADD("scsibus:5", scsi_devices, nullptr, false) + MCFG_NSCSI_ADD("scsibus:6", scsi_devices, "cdrom", false) + MCFG_NSCSI_ADD("scsibus:7", scsi_devices, "ncr5380", true) + MCFG_SLOT_OPTION_MACHINE_CONFIG("ncr5380", [this] (device_t *device) { ncr5380(device); }) MACHINE_CONFIG_END /* ROM definition */ diff --git a/src/mame/drivers/sun3x.cpp b/src/mame/drivers/sun3x.cpp index 1607affc44a..43010631bd1 100644 --- a/src/mame/drivers/sun3x.cpp +++ b/src/mame/drivers/sun3x.cpp @@ -143,6 +143,7 @@ #include "bus/rs232/rs232.h" #include "bus/sunkbd/sunkbd.h" +#include "bus/sunmouse/sunmouse.h" #include "screen.h" @@ -156,6 +157,7 @@ #define RS232A_TAG "rs232a" #define RS232B_TAG "rs232b" #define KEYBOARD_TAG "keyboard" +#define MOUSE_TAG "mouseport" class sun3x_state : public driver_device { @@ -597,8 +599,10 @@ MACHINE_CONFIG_START(sun3x_state::sun3_80) SCC8530N(config, m_scc1, 4.9152_MHz_XTAL); m_scc1->out_txda_callback().set(KEYBOARD_TAG, FUNC(sun_keyboard_port_device::write_txd)); + m_scc1->out_txdb_callback().set(MOUSE_TAG, FUNC(sun_mouse_port_device::write_txd)); SUNKBD_PORT(config, KEYBOARD_TAG, default_sun_keyboard_devices, "type3hle").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxa_w)); + SUNMOUSE_PORT(config, MOUSE_TAG, default_sun_mouse_devices, "hle1200").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxb_w)); SCC8530N(config, m_scc2, 4.9152_MHz_XTAL); m_scc2->out_txda_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_txd)); @@ -621,7 +625,7 @@ MACHINE_CONFIG_START(sun3x_state::sun3_80) MCFG_DEVICE_ADD(ESP_TAG, NCR539X, 20000000/2) MCFG_LEGACY_SCSI_PORT("scsi") - MCFG_N82077AA_ADD("fdc", n82077aa_device::MODE_PS2) + N82077AA(config, m_fdc, n82077aa_device::MODE_PS2); MCFG_FLOPPY_DRIVE_ADD("fdc:0", sun_floppies, "35hd", sun3x_state::floppy_formats) // the timekeeper has no interrupt output, so 3/80 includes a dedicated timer circuit diff --git a/src/mame/drivers/sun4.cpp b/src/mame/drivers/sun4.cpp index a4eaa3ccc7e..b3866f9442c 100644 --- a/src/mame/drivers/sun4.cpp +++ b/src/mame/drivers/sun4.cpp @@ -413,6 +413,7 @@ #include "bus/rs232/rs232.h" #include "bus/sunkbd/sunkbd.h" +#include "bus/sunmouse/sunmouse.h" #include "bus/sbus/sbus.h" #include "bus/sbus/bwtwo.h" #include "cpu/sparc/sparc.h" @@ -424,6 +425,7 @@ #include "machine/nscsi_hd.h" #include "machine/nvram.h" #include "machine/ram.h" +#include "machine/sun4c_mmu.h" #include "machine/timekpr.h" #include "machine/upd765.h" #include "machine/z80scc.h" @@ -442,28 +444,12 @@ #define SCC1_TAG "scc1" #define SCC2_TAG "scc2" #define KEYBOARD_TAG "keyboard" +#define MOUSE_TAG "mouseport" #define RS232A_TAG "rs232a" #define RS232B_TAG "rs232b" #define FDC_TAG "fdc" #define LANCE_TAG "lance" -#define ENA_NOTBOOT (0x80) -#define ENA_SDVMA (0x20) -#define ENA_CACHE (0x10) -#define ENA_RESET (0x04) -#define ENA_DIAG (0x01) - -// page table entry constants -#define PM_VALID (0x80000000) // page is valid -#define PM_WRITEMASK (0x40000000) // writable? -#define PM_SYSMASK (0x20000000) // system use only? -#define PM_CACHE (0x10000000) // cachable? -#define PM_TYPEMASK (0x0c000000) // type mask -#define PM_ACCESSED (0x02000000) // accessed flag -#define PM_MODIFIED (0x01000000) // modified flag - -#define PAGE_SIZE (0x00000400) - // DMA controller constants #define DMA_DEV_ID (0x80000000) #define DMA_L (0x00008000) // use ILACC @@ -490,6 +476,13 @@ #define DMA_BYTE_COUNT (2) #define DMA_XTAL (25_MHz_XTAL) +#define AUXIO_DENSITY (0x20) +#define AUXIO_DISK_CHG (0x10) +#define AUXIO_DRIVE_SEL (0x08) +#define AUXIO_TC (0x04) +#define AUXIO_EJECT (0x02) +#define AUXIO_LED (0x01) + namespace { const sparc_disassembler::asi_desc_map::value_type sun4_asi_desc[] = { @@ -538,31 +531,36 @@ public: sun4_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") + , m_mmu(*this, "mmu") , m_timekpr(*this, TIMEKEEPER_TAG) , m_scc1(*this, SCC1_TAG) , m_scc2(*this, SCC2_TAG) , m_fdc(*this, FDC_TAG) + , m_floppy(*this, FDC_TAG":0") , m_lance(*this, LANCE_TAG) , m_scsibus(*this, "scsibus") , m_scsi(*this, "scsibus:7:ncr53c90a") , m_sbus(*this, "sbus") + , m_sbus_slot(*this, "slot%u", 1U) , m_type0space(*this, "type0") , m_type1space(*this, "type1") , m_ram(*this, RAM_TAG) , m_rom(*this, "user1") , m_rom_ptr(nullptr) - , m_system_enable(0) { } void sun4c(machine_config &config); + void sun4_20(machine_config &config); void sun4_40(machine_config &config); + void sun4_50(machine_config &config); void sun4_60(machine_config &config); + void sun4_65(machine_config &config); + void sun4_75(machine_config &config); void sun4(machine_config &config); void init_sun4(); void init_sun4c(); - void init_ss2(); private: virtual void machine_reset() override; @@ -573,12 +571,55 @@ private: static const device_timer_id TIMER_1 = 1; static const device_timer_id TIMER_RESET = 2; + enum insn_data_mode + { + USER_INSN, + SUPER_INSN, + USER_DATA, + SUPER_DATA + }; + + enum + { + // system enable constants + ENA_NOTBOOT = 0x80, + ENA_SDVMA = 0x20, + ENA_CACHE = 0x10, + ENA_RESET = 0x04, + ENA_DIAG = 0x01, + + // page table entry constants + PM_VALID = 0x80000000, // page is valid + PM_WRITEMASK = 0x40000000, // writable? + PM_SYSMASK = 0x20000000, // system use only? + PM_CACHE = 0x10000000, // cachable? + PM_TYPEMASK = 0x0c000000, // type mask + PM_ACCESSED = 0x02000000, // accessed flag + PM_MODIFIED = 0x01000000 // modified flag + }; + + DECLARE_READ32_MEMBER( sun4_cache_flush_r ); + DECLARE_WRITE32_MEMBER( sun4_cache_flush_w ); + DECLARE_READ32_MEMBER( sun4_system_r ); + DECLARE_WRITE32_MEMBER( sun4_system_w ); + DECLARE_READ32_MEMBER( sun4_segment_map_r ); + DECLARE_WRITE32_MEMBER( sun4_segment_map_w ); + DECLARE_READ32_MEMBER( sun4_page_map_r ); + DECLARE_WRITE32_MEMBER( sun4_page_map_w ); + template <insn_data_mode MODE> DECLARE_READ32_MEMBER( sun4_insn_data_r ); + DECLARE_WRITE32_MEMBER( sun4_insn_data_w ); + + DECLARE_READ32_MEMBER( sun4c_debugger_r ); + DECLARE_WRITE32_MEMBER( sun4c_debugger_w ); + DECLARE_READ32_MEMBER( sun4_mmu_r ); DECLARE_WRITE32_MEMBER( sun4_mmu_w ); DECLARE_READ32_MEMBER( sun4c_mmu_r ); DECLARE_WRITE32_MEMBER( sun4c_mmu_w ); DECLARE_READ32_MEMBER( ram_r ); DECLARE_WRITE32_MEMBER( ram_w ); + DECLARE_READ32_MEMBER( timeout_r ); + DECLARE_WRITE32_MEMBER( timeout_w ); DECLARE_READ32_MEMBER( ss1_sl0_id ); DECLARE_READ32_MEMBER( timer_r ); DECLARE_WRITE32_MEMBER( timer_w ); @@ -586,6 +627,8 @@ private: DECLARE_WRITE8_MEMBER( irq_w ); DECLARE_READ8_MEMBER( fdc_r ); DECLARE_WRITE8_MEMBER( fdc_w ); + DECLARE_READ8_MEMBER( auxio_r ); + DECLARE_WRITE8_MEMBER( auxio_w ); DECLARE_READ32_MEMBER( dma_r ); DECLARE_WRITE32_MEMBER( dma_w ); DECLARE_READ32_MEMBER( lance_dma_r ); // TODO: Should be 16 bits @@ -598,12 +641,22 @@ private: DECLARE_WRITE_LINE_MEMBER( scc1_int ); DECLARE_WRITE_LINE_MEMBER( scc2_int ); + DECLARE_WRITE_LINE_MEMBER( fdc_irq ); + DECLARE_FLOPPY_FORMATS( floppy_formats ); void ncr53c90a(device_t *device); - void sun4_mem(address_map &map); - void sun4c_mem(address_map &map); + void sun4_system_map(address_map &map); + void sun4_segment_map(address_map &map); + void sun4_page_map(address_map &map); + void sun4_insn_map(address_map &map); + void sun4_supervisor_insn_map(address_map &map); + void sun4_data_map(address_map &map); + void sun4_supervisor_data_map(address_map &map); + + void sun4c_debugger_map(address_map &map); + void type0space_map(address_map &map); void type1space_map(address_map &map); void type1space_sbus_map(address_map &map); @@ -616,414 +669,292 @@ private: }; required_device<mb86901_device> m_maincpu; + required_device<sun4c_mmu_device> m_mmu; required_device<m48t02_device> m_timekpr; required_device<z80scc_device> m_scc1; required_device<z80scc_device> m_scc2; - required_device<n82077aa_device> m_fdc; + required_device<upd765_family_device> m_fdc; + required_device<floppy_connector> m_floppy; required_device<am79c90_device> m_lance; required_device<nscsi_bus_device> m_scsibus; required_device<ncr53c90a_device> m_scsi; optional_device<sbus_device> m_sbus; + optional_device_array<sbus_slot_device, 3> m_sbus_slot; optional_device<address_map_bank_device> m_type0space; optional_device<address_map_bank_device> m_type1space; + memory_access_cache<2, 0, ENDIANNESS_BIG> *m_type1_cache; required_device<ram_device> m_ram; required_memory_region m_rom; + struct page_entry_t + { + uint32_t valid; + uint32_t writable; + uint32_t supervisor; + uint32_t uncached; + uint32_t accessed; + uint32_t modified; + uint32_t page; + uint8_t type; + uint8_t pad[3]; + + uint32_t to_uint() + { + return valid | writable | supervisor | uncached | (type << 26) | accessed | modified | (page >> 11); + } + + void merge_uint(uint32_t data, uint32_t mem_mask) + { + const uint32_t new_value = (to_uint() & ~mem_mask) | (data & mem_mask); + valid = new_value & PM_VALID; + writable = new_value & PM_WRITEMASK; + supervisor = new_value & PM_SYSMASK; + uncached = new_value & PM_CACHE; + type = (new_value & PM_TYPEMASK) >> 26; + accessed = new_value & PM_ACCESSED; + modified = new_value & PM_MODIFIED; + page = (new_value & 0x7ffff) << 11; + } + }; + + uint8_t m_segmap[16][4096]; + page_entry_t m_pagemap[16384]; + uint32_t m_cachetags[16384]; + uint32_t m_cachedata[16384]; + uint32_t *m_rom_ptr; + uint32_t *m_ram_ptr; + uint32_t m_ram_size; + uint32_t m_ram_size_words; uint32_t m_context; + uint32_t m_context_masked; uint8_t m_system_enable; + bool m_fetch_bootrom; uint32_t m_buserr[4]; + + uint32_t m_segmap_masked[16][4096]; + uint8_t *m_curr_segmap; + uint32_t *m_curr_segmap_masked; + bool m_page_valid[16384]; + + uint8_t m_auxio; uint32_t m_counter[4]; uint32_t m_dma[4]; bool m_dma_irq; bool m_dma_tc_read; uint32_t m_dma_pack_register; int m_scsi_irq; + int m_fdc_irq; - uint32_t *m_ram_ptr; - uint8_t m_segmap[16][4096]; - uint32_t m_pagemap[16384]; - uint32_t m_cachetags[0x4000]; - uint32_t m_cachedata[0x4000]; - uint32_t m_ram_size, m_ram_size_words; - uint8_t m_ctx_mask; // SS2 is sun4c but has 16 contexts; most have 8 - uint8_t m_pmeg_mask; // SS2 is sun4c but has 16384 PTEs; most have 8192 uint8_t m_irq_reg; // IRQ control uint8_t m_scc1_int, m_scc2_int; uint8_t m_diag; int m_arch; - emu_timer *m_c0_timer, *m_c1_timer; + attotime m_c0_last_read_time; + attotime m_c1_last_read_time; + emu_timer *m_c0_timer; + emu_timer *m_c1_timer; emu_timer *m_reset_timer; - uint32_t read_insn_data(uint8_t asi, address_space &space, uint32_t offset, uint32_t mem_mask); - void write_insn_data(uint8_t asi, address_space &space, uint32_t offset, uint32_t data, uint32_t mem_mask); - uint32_t read_insn_data_4c(uint8_t asi, address_space &space, uint32_t offset, uint32_t mem_mask); - void write_insn_data_4c(uint8_t asi, address_space &space, uint32_t offset, uint32_t data, uint32_t mem_mask); - void dma_check_interrupts(); void dma_transfer(); void dma_transfer_write(); void dma_transfer_read(); - void start_timer(int num); - void l2p_command(int ref, const std::vector<std::string> ¶ms); void fcodes_command(int ref, const std::vector<std::string> ¶ms); }; -uint32_t sun4_state::read_insn_data_4c(uint8_t asi, address_space &space, uint32_t offset, uint32_t mem_mask) +READ32_MEMBER( sun4_state::sun4_system_r ) { - // it's translation time - uint8_t pmeg = m_segmap[m_context & m_ctx_mask][(offset >> 16) & 0xfff] & m_pmeg_mask; - uint32_t entry = (pmeg << 6) + ((offset >> 10) & 0x3f); - - if (m_pagemap[entry] & PM_VALID) + switch (offset >> 26) { - m_pagemap[entry] |= PM_ACCESSED; + case 3: // context reg + if (mem_mask == 0x00ff0000) return m_context<<16; + return m_context<<24; + + case 4: // system enable reg + return m_system_enable<<24; - uint32_t tmp = (m_pagemap[entry] & 0xffff) << 10; - tmp |= (offset & 0x3ff); + case 6: // bus error register + //printf("sun4: read buserror, PC=%x (mask %08x)\n", m_maincpu->pc(), mem_mask); + return 0; - //printf("sun4: read translated vaddr %08x to phys %08x type %d, PTE %08x, PC=%x\n", offset<<2, tmp<<2, (m_pagemap[entry]>>26) & 3, m_pagemap[entry], m_maincpu->pc()); + case 8: // (d-)cache tags + //logerror("sun4: read dcache tags @ %x, PC = %x\n", offset, m_maincpu->pc()); + return m_cachetags[offset&0xfff]; - switch ((m_pagemap[entry] >> 26) & 3) - { - case 0: // type 0 space - return m_type0space->read32(space, tmp, mem_mask); + case 9: // (d-)cache data + //logerror("sun4: read dcache data @ %x, PC = %x\n", offset, m_maincpu->pc()); + return 0xffffffff; - case 1: // type 1 space - // magic EPROM bypass - if ((tmp >= (0x6000000>>2)) && (tmp <= (0x6ffffff>>2))) + case 0xf: // UART bypass + //printf("read UART bypass @ %x mask %08x (PC=%x)\n", offset<<2, mem_mask, m_maincpu->pc()); + switch (offset & 3) { - return m_rom_ptr[offset & 0x1ffff]; + case 0: if (mem_mask == 0xff000000) return m_scc2->cb_r(offset)<<24; else return m_scc2->db_r(offset)<<8; break; + case 1: if (mem_mask == 0xff000000) return m_scc2->ca_r(offset)<<24; else return m_scc2->da_r(offset)<<8; break; } - //printf("Read type 1 @ VA %08x, phys %08x\n", offset<<2, tmp<<2); - return m_type1space->read32(space, tmp, mem_mask); + return 0xffffffff; + case 0: default: - printf("sun4c: access to memory type not defined in sun4c\n"); - m_maincpu->set_mae(); - m_buserr[0] = 0x20; - m_buserr[1] = offset << 2; + //logerror("sun4: ASI 2 space unhandled read @ %x (PC=%x)\n", offset<<2, m_maincpu->pc()); return 0; - } - } - else - { - if (!machine().side_effects_disabled()) - { - printf("sun4c: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry, m_pagemap[entry], offset <<2, m_maincpu->pc()); - m_maincpu->set_mae(); - m_buserr[0] |= 0x80; // invalid PTE - m_buserr[0] &= ~0x8000; // read - m_buserr[1] = offset<<2; - if (mem_mask != ~0 && mem_mask != 0xffff0000 && mem_mask != 0xff000000) - { - if (mem_mask == 0x0000ffff || mem_mask == 0x0000ff00) - { - m_buserr[1] |= 2; - } - else if (mem_mask == 0x00ff0000) - { - m_buserr[1] |= 1; - } - else if (mem_mask == 0x000000ff) - { - m_buserr[1] |= 3; - } - } - } - return 0; } } -void sun4_state::write_insn_data_4c(uint8_t asi, address_space &space, uint32_t offset, uint32_t data, uint32_t mem_mask) +WRITE32_MEMBER( sun4_state::sun4_system_w ) { - // it's translation time - uint8_t pmeg = m_segmap[m_context & m_ctx_mask][(offset >> 16) & 0xfff] & m_pmeg_mask; - uint32_t entry = (pmeg << 6) + ((offset >> 10) & 0x3f); - - if (m_pagemap[entry] & PM_VALID) + switch (offset >> 26) { - if ((!(m_pagemap[entry] & PM_WRITEMASK)) || ((m_pagemap[entry] & PM_SYSMASK) && !(asi & 1))) - { - printf("sun4c: write protect MMU error (PC=%x)\n", m_maincpu->pc()); - m_buserr[0] |= 0x8040; // write, protection error - m_buserr[1] = offset<<2; - m_maincpu->set_mae(); + case 3: // context reg + //printf("%08x to context, mask %08x, offset %x\n", data, mem_mask, offset); + m_context = data>>24; return; - } - - m_pagemap[entry] |= (PM_ACCESSED | PM_MODIFIED); - uint32_t tmp = (m_pagemap[entry] & 0xffff) << 10; - tmp |= (offset & 0x3ff); + case 4: // system enable reg + m_system_enable = data>>24; - //printf("sun4: write translated vaddr %08x to phys %08x type %d, PTE %08x, ASI %d, PC=%x\n", offset<<2, tmp<<2, (m_pagemap[entry]>>26) & 3, m_pagemap[entry], asi, m_maincpu->pc()); - - switch ((m_pagemap[entry] >> 26) & 3) - { - case 0: // type 0 - m_type0space->write32(space, tmp, data, mem_mask); - return; - - case 1: // type 1 - //printf("write device space @ %x\n", tmp<<1); - m_type1space->write32(space, tmp, data, mem_mask); - return; - default: - printf("sun4c: access to memory type not defined\n"); - m_maincpu->set_mae(); - m_buserr[0] = 0x8020; - m_buserr[1] = offset << 2; - return; - } - } - else - { - printf("sun4c: INVALID PTE entry %d %08x accessed! data=%08x vaddr=%x PC=%x\n", entry, m_pagemap[entry], data, offset <<2, m_maincpu->pc()); - m_maincpu->set_mae(); - m_buserr[0] |= 0x8080; // write cycle, invalid PTE - m_buserr[1] = offset<<2; - if (mem_mask != ~0 && mem_mask != 0xffff0000 && mem_mask != 0xff000000) - { - if (mem_mask == 0x0000ffff || mem_mask == 0x0000ff00) + if (m_system_enable & ENA_RESET) { - m_buserr[1] |= 2; + m_reset_timer->adjust(attotime::from_usec(1), 0); + m_maincpu->set_input_line(SPARC_RESET, ASSERT_LINE); + //logerror("%s: Asserting reset line\n", machine().describe_context()); } - else if (mem_mask == 0x00ff0000) + //printf("%08x to system enable, mask %08x\n", data, mem_mask); + if (m_system_enable & ENA_RESET) { - m_buserr[1] |= 1; + m_system_enable = 0; + m_maincpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); + m_maincpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); } - else if (mem_mask == 0x000000ff) + return; + + case 7: // diag reg + m_diag = data >> 24; + #if 1 + printf("sun4: CPU LEDs to %02x (PC=%x) => ", ((data>>24) & 0xff) ^ 0xff, m_maincpu->pc()); + for (int i = 0; i < 8; i++) { - m_buserr[1] |= 3; + if (m_diag & (1<<i)) + { + printf("."); + } + else + { + printf("*"); + } } - } - } -} + printf("\n"); + #endif + return; + case 8: // cache tags + //logerror("sun4: %08x to cache tags @ %x, PC = %x\n", data, offset, m_maincpu->pc()); + m_cachetags[offset&0xfff] = data; + return; -READ32_MEMBER( sun4_state::sun4c_mmu_r ) -{ - uint8_t asi = m_maincpu->get_asi(); - int page; - uint32_t retval = 0; + case 9: // cache data + //logerror("sun4: %08x to cache data @ %x, PC = %x\n", data, offset, m_maincpu->pc()); + return; - // make debugger fetches emulate supervisor program for best compatibility with boot PROM execution - if (machine().side_effects_disabled()) asi = 9; + case 0xf: // UART bypass + //printf("%08x to UART bypass @ %x, mask %08x\n", data, offset<<2, mem_mask); + switch (offset & 3) + { + case 0: if (mem_mask == 0xff000000) m_scc2->cb_w(offset, data>>24); else m_scc2->db_w(offset, data>>8); break; + case 1: if (mem_mask == 0xff000000) m_scc2->ca_w(offset, data>>24); else { m_scc2->da_w(offset, data>>8); printf("%c", data>>8); } break; + } + return; - // supervisor program fetches in boot state are special - if ((!(m_system_enable & ENA_NOTBOOT)) && (asi == 9)) - { - return m_rom_ptr[offset & 0x1ffff]; + case 0: // IDPROM + default: + //logerror("sun4: ASI 2 space unhandled write %x @ %x (mask %08x, PC=%x)\n", data, offset<<2, mem_mask, m_maincpu->pc()); + return; } +} - switch (asi) - { - case 2: // system space - switch (offset >> 26) - { - case 3: // context reg - if (mem_mask == 0x00ff0000) return m_context<<16; - return m_context<<24; - - case 4: // system enable reg - return m_system_enable<<24; - - case 6: // bus error register - //printf("sun4c: read buserror %08x, PC=%x (mask %08x)\n", 0x60000000 | (offset << 2), m_maincpu->pc(), mem_mask); - retval = m_buserr[offset & 0xf]; - m_buserr[offset & 0xf] = 0; // clear on reading - return retval; - - case 8: // (d-)cache tags - //logerror("sun4: read dcache tags @ %x, PC = %x\n", offset, m_maincpu->pc()); - return m_cachetags[(offset>>3)&0x3fff]; - - case 9: // (d-)cache data - //logerror("sun4c: read dcache data @ %x, PC = %x\n", offset, m_maincpu->pc()); - return m_cachedata[offset&0x3fff]; - - case 0xf: // UART bypass - //printf("read UART bypass @ %x mask %08x\n", offset<<2, mem_mask); - switch (offset & 3) - { - case 0: if (mem_mask == 0xff000000) return m_scc2->cb_r(space, offset)<<24; else return m_scc2->db_r(space, offset)<<8; break; - case 1: if (mem_mask == 0xff000000) return m_scc2->ca_r(space, offset)<<24; else return m_scc2->da_r(space, offset)<<8; break; - } - return 0xffffffff; +READ32_MEMBER( sun4_state::sun4_segment_map_r ) +{ + //printf("sun4: read segment map @ %x (ctx %d entry %d, mem_mask %08x, PC=%x)\n", offset << 2, m_context, (offset>>16) & 0xfff, mem_mask, m_maincpu->pc()); + if (mem_mask == 0xffff0000) + return m_curr_segmap[(offset>>16) & 0xfff]<<16; + else if (mem_mask == 0xff000000) + return m_curr_segmap[(offset>>16) & 0xfff]<<24; + else if (mem_mask == 0xffffffff) + return m_curr_segmap[(offset>>16) & 0xfff]; + else + logerror("sun4: read segment map w/ unknown mask %08x\n", mem_mask); + return 0x0; +} - case 0: // IDPROM - TODO: SPARCstation-1 does not have an ID prom and a timeout should occur. - default: - printf("sun4c: ASI 2 space unhandled read @ %x (PC=%x)\n", offset<<2, m_maincpu->pc()); - return 0; - } - break; - case 3: // segment map - //printf("sun4: read segment map @ %x (ctx %d entry %d, mem_mask %08x, PC=%x)\n", offset << 2, m_context & m_ctx_mask, (offset>>16) & 0xfff, mem_mask, m_maincpu->pc()); - if (mem_mask == 0xffff0000) - { - return m_segmap[m_context & m_ctx_mask][(offset>>16) & 0xfff]<<16; - } - else if (mem_mask == 0xff000000) - { - return m_segmap[m_context & m_ctx_mask][(offset>>16) & 0xfff]<<24; - } - else - { - // printf("sun4: read segment map w/unk mask %08x\n", mem_mask); - } - return 0x0; - - case 4: // page map - page = (m_segmap[m_context & m_ctx_mask][(offset >> 16) & 0xfff] & m_pmeg_mask) << 6; - page += (offset >> 10) & 0x3f; - //printf("sun4: read page map @ %x (entry %d, seg %d, PMEG %d, mem_mask %08x, PC=%x)\n", offset << 2, page, (offset >> 16) & 0xfff, m_segmap[m_context & m_ctx_mask][(offset >> 16) & 0xfff] & m_pmeg_mask, mem_mask, m_maincpu->pc()); - return m_pagemap[page]; - - case 8: - case 9: - case 10: - case 11: - return read_insn_data_4c(asi, space, offset, mem_mask); - - default: - if (!machine().side_effects_disabled()) printf("sun4c: ASI %d unhandled read @ %x (PC=%x)\n", asi, offset<<2, m_maincpu->pc()); - return 0; - } +WRITE32_MEMBER( sun4_state::sun4_segment_map_w ) +{ + uint8_t segdata = 0; + //printf("segment write, mask %08x, PC=%x\n", mem_mask, m_maincpu->pc()); + if (mem_mask == 0xffff0000) segdata = (data >> 16) & 0xff; + else if (mem_mask == 0xff000000) segdata = (data >> 24) & 0xff; + else logerror("sun4: writing segment map with unknown mask %08x, PC=%x\n", mem_mask, m_maincpu->pc()); + + //printf("sun4: %08x to segment map @ %x (ctx %d entry %d, mem_mask %08x, PC=%x)\n", segdata, offset << 2, m_context, (offset>>16) & 0xfff, mem_mask, m_maincpu->pc()); + m_curr_segmap[(offset>>16) & 0xfff] = segdata; + m_curr_segmap_masked[(offset>>16) & 0xfff] = segdata << 5; +} - printf("sun4c: read asi %d byte offset %x, PC = %x\n", asi, offset << 2, m_maincpu->pc()); +READ32_MEMBER( sun4_state::sun4_page_map_r ) +{ + uint32_t page = m_curr_segmap_masked[(offset >> 16) & 0xfff] | ((offset >> 11) & 0x1f); + //printf("sun4: read page map @ %x (entry %d, seg %d, PMEG %d, mem_mask %08x, PC=%x)\n", offset << 2, page, (offset >> 16) & 0xfff, m_segmap[m_context][(offset >> 16) & 0xfff] & m_pmeg_mask, mem_mask, m_maincpu->pc()); + return m_pagemap[page].to_uint(); +} - return 0; +WRITE32_MEMBER( sun4_state::sun4_page_map_w ) +{ + const uint32_t page = m_curr_segmap_masked[(offset >> 16) & 0xfff] | ((offset >> 11) & 0x1f); + //printf("sun4: %08x to page map @ %x (entry %d, mem_mask %08x, PC=%x)\n", data, offset << 2, page, mem_mask, m_maincpu->pc()); + m_pagemap[page].merge_uint(data, mem_mask); + m_page_valid[page] = m_pagemap[page].valid; } -WRITE32_MEMBER( sun4_state::sun4c_mmu_w ) +READ32_MEMBER( sun4_state::sun4c_debugger_r ) { - uint8_t asi = m_maincpu->get_asi(); - int page; + return m_mmu->insn_data_r<sun4c_mmu_device::SUPER_INSN>(offset, mem_mask); +} - //printf("sun4: write %08x to %08x (ASI %d, mem_mask %08x, PC %x)\n", data, offset, asi, mem_mask, m_maincpu->pc()); +WRITE32_MEMBER( sun4_state::sun4c_debugger_w ) +{ + m_mmu->insn_data_w<sun4c_mmu_device::SUPER_INSN>(offset, data, mem_mask); +} - switch (asi) +template <sun4_state::insn_data_mode MODE> +READ32_MEMBER( sun4_state::sun4_insn_data_r ) +{ + // supervisor program fetches in boot state are special + if (m_fetch_bootrom && MODE == SUPER_INSN) { - case 2: - switch (offset >> 26) - { - case 3: // context reg - //printf("%08x to context, mask %08x, offset %x\n", data, mem_mask, offset); - m_context = data>>24; - return; - - case 4: // system enable reg - m_system_enable = data>>24; - - if (m_system_enable & ENA_RESET) - { - m_reset_timer->adjust(attotime::from_usec(1)); - m_maincpu->set_input_line(SPARC_RESET, ASSERT_LINE); - logerror("%s: Asserting reset line\n", machine().describe_context()); - } - //printf("%08x to system enable, mask %08x\n", data, mem_mask); - if (m_system_enable & ENA_RESET) - { - m_system_enable = 0; - m_maincpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - m_maincpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); - } - return; - - case 6: // bus error - printf("%08x to bus error @ %x, mask %08x\n", data, offset, mem_mask); - m_buserr[offset & 0xf] = data; - return; - - case 8: // cache tags - //logerror("sun4: %08x to cache tags @ %x, PC = %x\n", data, offset, m_maincpu->pc()); - m_cachetags[(offset>>3)&0x3fff] = data & 0x03f8fffc; - return; - - case 9: // cache data - //logerror("sun4c: %08x to cache data @ %x, PC = %x\n", data, offset, m_maincpu->pc()); - m_cachedata[offset&0x3fff] = data; - return; - - case 0xf: // UART bypass - //printf("%08x to UART bypass @ %x, mask %08x\n", data, offset<<2, mem_mask); - switch (offset & 3) - { - case 0: if (mem_mask == 0xff000000) m_scc2->cb_w(space, offset, data>>24); else m_scc2->db_w(space, offset, data>>8); break; - case 1: if (mem_mask == 0xff000000) m_scc2->ca_w(space, offset, data>>24); else { m_scc2->da_w(space, offset, data>>8); printf("%c", data>>8); } break; - } - return; - - case 0: // IDPROM - default: - printf("sun4c: ASI 2 space unhandled write %x @ %x (mask %08x, PC=%x, shift %x)\n", data, offset<<2, mem_mask, m_maincpu->pc(), offset>>26); - return; - } - break; - case 3: // segment map - { - uint8_t segdata = 0; - //printf("segment write, mask %08x, PC=%x\n", mem_mask, m_maincpu->pc()); - if (mem_mask == 0xffff0000) segdata = (data >> 16) & 0xff; - else if (mem_mask == 0xff000000) segdata = (data >> 24) & 0xff; - else logerror("sun4c: writing segment map with unknown mask %08x, PC=%x\n", mem_mask, m_maincpu->pc()); - - //printf("sun4c: %08x to segment map @ %x (ctx %d entry %d, mem_mask %08x, PC=%x)\n", segdata, offset << 2, m_context, (offset>>16) & 0xfff, mem_mask, m_maincpu->pc()); - m_segmap[m_context & m_ctx_mask][(offset>>16) & 0xfff] = segdata; // only 7 bits of the segment are necessary - } - return; - - case 4: // page map - page = (m_segmap[m_context & m_ctx_mask][(offset >> 16) & 0xfff] & m_pmeg_mask) << 6; // get the PMEG - page += (offset >> 10) & 0x3f; // add the offset - //printf("sun4c: %08x to page map @ %x (entry %d, mem_mask %08x, PC=%x)\n", data, offset << 2, page, mem_mask, m_maincpu->pc()); - COMBINE_DATA(&m_pagemap[page]); - m_pagemap[page] &= 0xff00ffff; // these 8 bits are cleared when written and tested as such - return; - - case 8: - case 9: - case 10: - case 11: - write_insn_data_4c(asi, space, offset, data, mem_mask); - return; - - case 12: // Flush Cache (Segment) - case 13: // Flush Cache (Page) - case 14: // Flush Cache (Context) - // Ignored - return; + return m_rom_ptr[offset & 0x1ffff]; } - printf("sun4c: %08x to asi %d byte offset %x, PC = %x, mask = %08x\n", data, asi, offset << 2, m_maincpu->pc(), mem_mask); -} - -// ----------------------------------------------------------------- - -uint32_t sun4_state::read_insn_data(uint8_t asi, address_space &space, uint32_t offset, uint32_t mem_mask) -{ // it's translation time - uint8_t pmeg = m_segmap[m_context][(offset >> 16) & 0xfff]; - uint32_t entry = (pmeg << 5) + ((offset >> 11) & 0x1f); + const uint32_t pmeg = m_curr_segmap_masked[(offset >> 16) & 0xfff]; + const uint32_t entry_index = pmeg | ((offset >> 11) & 0x1f); - if (m_pagemap[entry] & PM_VALID) + if (m_page_valid[entry_index]) { - m_pagemap[entry] |= PM_ACCESSED; + page_entry_t &entry = m_pagemap[entry_index]; + entry.accessed = PM_ACCESSED; - uint32_t tmp = (m_pagemap[entry] & 0x7ffff) << 11; - tmp |= (offset & 0x7ff); + const uint32_t tmp = entry.page | (offset & 0x7ff); - //printf("sun4: read translated vaddr %08x to phys %08x type %d, PTE %08x, PC=%x\n", offset<<2, tmp<<2, (m_pagemap[entry]>>26) & 3, m_pagemap[entry], m_maincpu->pc()); + //printf("sun4: read translated vaddr %08x to phys %08x type %d, PTE %08x, PC=%x\n", offset<<2, tmp<<2, entry.type, entry.to_uint(), m_maincpu->pc()); - switch ((m_pagemap[entry] >> 26) & 3) + switch (entry.type) { case 0: // type 0 space return m_type0space->read32(space, tmp, mem_mask); @@ -1038,7 +969,7 @@ uint32_t sun4_state::read_insn_data(uint8_t asi, address_space &space, uint32_t return m_type1space->read32(space, tmp, mem_mask); default: - printf("sun4: access to unhandled memory type\n"); + //logerror("sun4: access to unhandled memory type\n"); return 0; } } @@ -1046,7 +977,7 @@ uint32_t sun4_state::read_insn_data(uint8_t asi, address_space &space, uint32_t { if (!machine().side_effects_disabled()) { - printf("sun4: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry, m_pagemap[entry], offset <<2, m_maincpu->pc()); + //logerror("sun4: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry_index, m_pagemap[entry_index].to_uint(), offset <<2, m_maincpu->pc()); m_maincpu->set_mae(); m_buserr[0] |= 0x80; // invalid PTE m_buserr[0] &= ~0x8000; // read @@ -1071,22 +1002,22 @@ uint32_t sun4_state::read_insn_data(uint8_t asi, address_space &space, uint32_t } } -void sun4_state::write_insn_data(uint8_t asi, address_space &space, uint32_t offset, uint32_t data, uint32_t mem_mask) +WRITE32_MEMBER( sun4_state::sun4_insn_data_w ) { // it's translation time - uint8_t pmeg = m_segmap[m_context][(offset >> 16) & 0xfff]; - uint32_t entry = (pmeg << 5) + ((offset >> 11) & 0x1f); + const uint32_t pmeg = m_curr_segmap_masked[(offset >> 16) & 0xfff]; + const uint32_t entry_index = pmeg | ((offset >> 11) & 0x1f); - if (m_pagemap[entry] & PM_VALID) + if (m_page_valid[entry_index]) { - m_pagemap[entry] |= PM_ACCESSED; + page_entry_t &entry = m_pagemap[entry_index]; + entry.accessed = PM_ACCESSED; - uint32_t tmp = (m_pagemap[entry] & 0x7ffff) << 11; - tmp |= (offset & 0x7ff); + uint32_t tmp = entry.page | (offset & 0x7ff); - //printf("sun4: write translated vaddr %08x to phys %08x type %d, PTE %08x, PC=%x\n", offset<<2, tmp<<2, (m_pagemap[entry]>>26) & 3, m_pagemap[entry], m_maincpu->pc()); + //printf("sun4: write translated vaddr %08x to phys %08x type %d, PTE %08x, PC=%x\n", offset<<2, tmp<<2, entry.type, entry.to_uint(), m_maincpu->pc()); - switch ((m_pagemap[entry] >> 26) & 3) + switch (entry.type) { case 0: // type 0 m_type0space->write32(space, tmp, data, mem_mask); @@ -1098,226 +1029,21 @@ void sun4_state::write_insn_data(uint8_t asi, address_space &space, uint32_t off return; default: - printf("sun4: access to memory type not defined in sun4c\n"); + //logerror("sun4: access to memory type not defined in sun4\n"); return; } } else { - printf("sun4: INVALID PTE entry %d %08x accessed! data=%08x vaddr=%x PC=%x\n", entry, m_pagemap[entry], data, offset <<2, m_maincpu->pc()); + //logerror("sun4: INVALID PTE entry %d %08x accessed! data=%08x vaddr=%x PC=%x\n", entry_index, m_pagemap[entry_index].to_uint(), data, offset <<2, m_maincpu->pc()); //m_maincpu->trap(SPARC_DATA_ACCESS_EXCEPTION); //m_buserr[0] = 0x8; // invalid PTE //m_buserr[1] = offset<<2; } } -READ32_MEMBER( sun4_state::sun4_mmu_r ) -{ - uint8_t asi = m_maincpu->get_asi(); - int page; - - // make debugger fetches emulate supervisor program for best compatibility with boot PROM execution - if (machine().side_effects_disabled()) asi = 9; - - // supervisor program fetches in boot state are special - if ((!(m_system_enable & ENA_NOTBOOT)) && (asi == 9)) - { - return m_rom_ptr[offset & 0x1ffff]; - } - - switch (asi) - { - case 2: // system space - switch (offset >> 26) - { - case 3: // context reg - if (mem_mask == 0x00ff0000) return m_context<<16; - return m_context<<24; - - case 4: // system enable reg - return m_system_enable<<24; - - case 6: // bus error register - //printf("sun4: read buserror, PC=%x (mask %08x)\n", m_maincpu->pc(), mem_mask); - return 0; - - case 8: // (d-)cache tags - //logerror("sun4: read dcache tags @ %x, PC = %x\n", offset, m_maincpu->pc()); - return m_cachetags[offset&0xfff]; - - case 9: // (d-)cache data - logerror("sun4: read dcache data @ %x, PC = %x\n", offset, m_maincpu->pc()); - return 0xffffffff; - - case 0xf: // UART bypass - //printf("read UART bypass @ %x mask %08x (PC=%x)\n", offset<<2, mem_mask, m_maincpu->pc()); - switch (offset & 3) - { - case 0: if (mem_mask == 0xff000000) return m_scc2->cb_r(space, offset)<<24; else return m_scc2->db_r(space, offset)<<8; break; - case 1: if (mem_mask == 0xff000000) return m_scc2->ca_r(space, offset)<<24; else return m_scc2->da_r(space, offset)<<8; break; - } - return 0xffffffff; - - case 0: - default: - printf("sun4: ASI 2 space unhandled read @ %x (PC=%x)\n", offset<<2, m_maincpu->pc()); - return 0; - } - break; - case 3: // segment map - //printf("sun4: read segment map @ %x (ctx %d entry %d, mem_mask %08x, PC=%x)\n", offset << 2, m_context & m_ctx_mask, (offset>>16) & 0xfff, mem_mask, m_maincpu->pc()); - if (mem_mask == 0xffff0000) - { - return m_segmap[m_context][(offset>>16) & 0xfff]<<16; - } - else if (mem_mask == 0xff000000) - { - return m_segmap[m_context][(offset>>16) & 0xfff]<<24; - } - else - { - // printf("sun4: read segment map w/unk mask %08x\n", mem_mask); - } - return 0x0; - - case 4: // page map - page = (m_segmap[m_context][(offset >> 16) & 0xfff]) << 5; - page += (offset >> 11) & 0x1f; - //printf("sun4: read page map @ %x (entry %d, seg %d, PMEG %d, mem_mask %08x, PC=%x)\n", offset << 2, page, (offset >> 16) & 0xfff, m_segmap[m_context & m_ctx_mask][(offset >> 16) & 0xfff] & m_pmeg_mask, mem_mask, m_maincpu->pc()); - return m_pagemap[page]; - - case 6: // region map used in 4/4xx, I don't know anything about this - return 0; - - case 8: - case 9: - case 10: - case 11: - return read_insn_data(asi, space, offset, mem_mask); - - default: - if (!machine().side_effects_disabled()) printf("sun4: ASI %d unhandled read @ %x (PC=%x)\n", asi, offset<<2, m_maincpu->pc()); - return 0; - } - - printf("sun4: read asi %d byte offset %x, PC = %x\n", asi, offset << 2, m_maincpu->pc()); - - return 0; -} - -WRITE32_MEMBER( sun4_state::sun4_mmu_w ) -{ - uint8_t asi = m_maincpu->get_asi(); - int page; - - //printf("sun4: write %08x to %08x (ASI %d, mem_mask %08x, PC %x)\n", data, offset, asi, mem_mask, m_maincpu->pc()); - - switch (asi) - { - case 2: - switch (offset >> 26) - { - case 3: // context reg - //printf("%08x to context, mask %08x, offset %x\n", data, mem_mask, offset); - m_context = data>>24; - return; - - case 4: // system enable reg - m_system_enable = data>>24; - - if (m_system_enable & ENA_RESET) - { - m_reset_timer->adjust(attotime::from_usec(1)); - m_maincpu->set_input_line(SPARC_RESET, ASSERT_LINE); - logerror("%s: Asserting reset line\n", machine().describe_context()); - } - //printf("%08x to system enable, mask %08x\n", data, mem_mask); - if (m_system_enable & ENA_RESET) - { - m_system_enable = 0; - m_maincpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - m_maincpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); - } - return; - - case 7: // diag reg - m_diag = data >> 24; - #if 1 - printf("sun4: CPU LEDs to %02x (PC=%x) => ", ((data>>24) & 0xff) ^ 0xff, m_maincpu->pc()); - for (int i = 0; i < 8; i++) - { - if (m_diag & (1<<i)) - { - printf("."); - } - else - { - printf("*"); - } - } - printf("\n"); - #endif - return; - - case 8: // cache tags - //logerror("sun4: %08x to cache tags @ %x, PC = %x\n", data, offset, m_maincpu->pc()); - m_cachetags[offset&0xfff] = data; - return; - - case 9: // cache data - logerror("sun4: %08x to cache data @ %x, PC = %x\n", data, offset, m_maincpu->pc()); - return; - - case 0xf: // UART bypass - //printf("%08x to UART bypass @ %x, mask %08x\n", data, offset<<2, mem_mask); - switch (offset & 3) - { - case 0: if (mem_mask == 0xff000000) m_scc2->cb_w(space, offset, data>>24); else m_scc2->db_w(space, offset, data>>8); break; - case 1: if (mem_mask == 0xff000000) m_scc2->ca_w(space, offset, data>>24); else { m_scc2->da_w(space, offset, data>>8); printf("%c", data>>8); } break; - } - return; - - case 0: // IDPROM - default: - printf("sun4: ASI 2 space unhandled write %x @ %x (mask %08x, PC=%x)\n", data, offset<<2, mem_mask, m_maincpu->pc()); - return; - } - break; - case 3: // segment map - { - uint8_t segdata = 0; - //printf("segment write, mask %08x, PC=%x\n", mem_mask, m_maincpu->pc()); - if (mem_mask == 0xffff0000) segdata = (data >> 16) & 0xff; - else if (mem_mask == 0xff000000) segdata = (data >> 24) & 0xff; - else logerror("sun4: writing segment map with unknown mask %08x, PC=%x\n", mem_mask, m_maincpu->pc()); - - //printf("sun4: %08x to segment map @ %x (ctx %d entry %d, mem_mask %08x, PC=%x)\n", segdata, offset << 2, m_context, (offset>>16) & 0xfff, mem_mask, m_maincpu->pc()); - m_segmap[m_context][(offset>>16) & 0xfff] = segdata; - } - return; - - case 4: // page map - page = (m_segmap[m_context][(offset >> 16) & 0xfff]) << 5; // get the PMEG - page += (offset >> 11) & 0x1f; // add the offset - //printf("sun4: %08x to page map @ %x (entry %d, mem_mask %08x, PC=%x)\n", data, offset << 2, page, mem_mask, m_maincpu->pc()); - COMBINE_DATA(&m_pagemap[page]); - m_pagemap[page] &= 0xff07ffff; // these bits are cleared when written and tested as such - return; - - case 6: // region map, used in 4/4xx - return; - - case 8: - case 9: - case 10: - case 11: - write_insn_data(asi, space, offset, data, mem_mask); - break; - - } - - printf("sun4: %08x to asi %d byte offset %x, PC = %x, mask = %08x\n", data, asi, offset << 2, m_maincpu->pc(), mem_mask); -} +// make debugger fetches emulate supervisor program for best compatibility with boot PROM execution +//if (machine().side_effects_disabled()) asi = 9; void sun4_state::l2p_command(int ref, const std::vector<std::string> ¶ms) { @@ -1329,30 +1055,24 @@ void sun4_state::l2p_command(int ref, const std::vector<std::string> ¶ms) offset = addr >> 2; uint8_t pmeg = 0; - uint32_t entry = 0, tmp = 0; + uint32_t entry_index = 0, tmp = 0; + uint32_t entry_value = 0; if (m_arch == ARCH_SUN4) { - pmeg = m_segmap[m_context][(offset >> 16) & 0xfff]; - entry = (pmeg << 5) + ((offset >> 11) & 0x1f); - tmp = (m_pagemap[entry] & 0x7ffff) << 11; - tmp |= (offset & 0x7ff); - } - else if (m_arch == ARCH_SUN4C) - { - pmeg = m_segmap[m_context & m_ctx_mask][(offset >> 16) & 0xfff]; - entry = (pmeg << 6) + ((offset >> 10) & 0x3f); - tmp = (m_pagemap[entry] & 0xffff) << 10; - tmp |= (offset & 0x3ff); + pmeg = m_curr_segmap_masked[(offset >> 16) & 0xfff]; + entry_index = pmeg | ((offset >> 11) & 0x1f); + tmp = m_pagemap[entry_index].page | (offset & 0x7ff); + entry_value = m_pagemap[entry_index].to_uint(); } - if (m_pagemap[entry] & PM_VALID) + if (m_page_valid[entry_index]) { - machine().debugger().console().printf("logical %08x => phys %08x, type %d (pmeg %d, entry %d PTE %08x)\n", addr, tmp << 2, (m_pagemap[entry] >> 26) & 3, pmeg, entry, m_pagemap[entry]); + machine().debugger().console().printf("logical %08x => phys %08x, type %d (pmeg %d, entry %d PTE %08x)\n", addr, tmp << 2, m_pagemap[entry_index].type, pmeg, entry_index, entry_value); } else { - machine().debugger().console().printf("logical %08x points to an invalid PTE! (pmeg %d, entry %d PTE %08x)\n", addr, tmp << 2, pmeg, entry, m_pagemap[entry]); + machine().debugger().console().printf("logical %08x points to an invalid PTE! (pmeg %d, entry %d PTE %08x)\n", addr, tmp << 2, pmeg, entry_index, entry_value); } } @@ -1377,14 +1097,79 @@ void sun4_state::fcodes_command(int ref, const std::vector<std::string> ¶ms) #endif } -void sun4_state::sun4_mem(address_map &map) +void sun4_state::sun4_system_map(address_map &map) +{ + map(0x00000000, 0xffffffff).rw(FUNC(sun4_state::sun4_system_r), FUNC(sun4_state::sun4_system_w)); +} + +void sun4_state::sun4_segment_map(address_map &map) +{ + map(0x00000000, 0xffffffff).rw(FUNC(sun4_state::sun4_segment_map_r), FUNC(sun4_state::sun4_segment_map_w)); +} + +void sun4_state::sun4_page_map(address_map &map) +{ + map(0x00000000, 0xffffffff).rw(FUNC(sun4_state::sun4_page_map_r), FUNC(sun4_state::sun4_page_map_w)); +} + +void sun4_state::sun4_supervisor_insn_map(address_map &map) +{ + map(0x00000000, 0xffffffff).rw(FUNC(sun4_state::sun4_insn_data_r<SUPER_INSN>), FUNC(sun4_state::sun4_insn_data_w)); +} + +void sun4_state::sun4_supervisor_data_map(address_map &map) +{ + map(0x00000000, 0xffffffff).rw(FUNC(sun4_state::sun4_insn_data_r<SUPER_DATA>), FUNC(sun4_state::sun4_insn_data_w)); +} + +void sun4_state::sun4_insn_map(address_map &map) +{ + map(0x00000000, 0xffffffff).rw(FUNC(sun4_state::sun4_insn_data_r<USER_INSN>), FUNC(sun4_state::sun4_insn_data_w)); +} + +void sun4_state::sun4_data_map(address_map &map) +{ + map(0x00000000, 0xffffffff).rw(FUNC(sun4_state::sun4_insn_data_r<USER_DATA>), FUNC(sun4_state::sun4_insn_data_w)); +} + +void sun4_state::sun4c_debugger_map(address_map &map) +{ + map(0x00000000, 0xffffffff).rw(FUNC(sun4_state::sun4c_debugger_r), FUNC(sun4_state::sun4c_debugger_w)); +} + +void sun4_state::type0space_map(address_map &map) +{ + map.unmap_value_high(); + map(0x00000000, 0x00ffffff).rw(FUNC(sun4_state::ram_r), FUNC(sun4_state::ram_w)); + map(0x04000000, 0x0fffffff).rw(FUNC(sun4_state::timeout_r), FUNC(sun4_state::timeout_w)); +} + +void sun4_state::type1space_map(address_map &map) +{ + map(0x00000000, 0x0000000f).rw(m_scc1, FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w)).umask32(0xff00ff00); + map(0x01000000, 0x0100000f).rw(m_scc2, FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w)).umask32(0xff00ff00); + map(0x02000000, 0x020007ff).rw(m_timekpr, FUNC(timekeeper_device::read), FUNC(timekeeper_device::write)); + map(0x03000000, 0x0300000f).rw(FUNC(sun4_state::timer_r), FUNC(sun4_state::timer_w)).mirror(0xfffff0); + map(0x05000000, 0x05000003).rw(FUNC(sun4_state::irq_r), FUNC(sun4_state::irq_w)); + map(0x06000000, 0x0607ffff).rom().region("user1", 0); + map(0x07200000, 0x07200007).rw(FUNC(sun4_state::fdc_r), FUNC(sun4_state::fdc_w)); + map(0x07400003, 0x07400003).rw(FUNC(sun4_state::auxio_r), FUNC(sun4_state::auxio_w)); + map(0x08000000, 0x08000003).r(FUNC(sun4_state::ss1_sl0_id)); // slot 0 contains SCSI/DMA/Ethernet + map(0x08400000, 0x0840000f).rw(FUNC(sun4_state::dma_r), FUNC(sun4_state::dma_w)); + map(0x08800000, 0x0880002f).m(m_scsi, FUNC(ncr53c90a_device::map)).umask32(0xff000000); + map(0x08c00000, 0x08c00003).rw(m_lance, FUNC(am79c90_device::regs_r), FUNC(am79c90_device::regs_w)); +} + +void sun4_state::type1space_sbus_map(address_map &map) { - map(0x00000000, 0xffffffff).rw(FUNC(sun4_state::sun4_mmu_r), FUNC(sun4_state::sun4_mmu_w)); + type1space_map(map); + map(0x0a000000, 0x0fffffff).rw(m_sbus, FUNC(sbus_device::read), FUNC(sbus_device::write)); } -void sun4_state::sun4c_mem(address_map &map) +void sun4_state::type1space_s4_map(address_map &map) { - map(0x00000000, 0xffffffff).rw(FUNC(sun4_state::sun4c_mmu_r), FUNC(sun4_state::sun4c_mmu_w)); + map(0x00000000, 0x0000000f).rw(m_scc1, FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w)).umask32(0xff00ff00); + map(0x01000000, 0x0100000f).rw(m_scc2, FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w)).umask32(0xff00ff00); } /* Input ports */ @@ -1393,15 +1178,20 @@ INPUT_PORTS_END void sun4_state::machine_reset() { - m_context = 0; - m_system_enable = 0; + m_auxio = 0xc0; m_irq_reg = 0; m_scc1_int = m_scc2_int = 0; m_scsi_irq = 0; + m_fdc_irq = 0; m_dma_irq = false; m_dma_tc_read = false; m_dma_pack_register = 0; + m_c0_last_read_time = attotime::zero; + m_c1_last_read_time = attotime::zero; + m_counter[0] = 1 << 10; + m_counter[2] = 1 << 10; + memset(m_counter, 0, sizeof(m_counter)); memset(m_dma, 0, sizeof(m_dma)); } @@ -1425,21 +1215,61 @@ void sun4_state::machine_start() // allocate timers for the built-in two channel timer m_c0_timer = timer_alloc(TIMER_0); m_c1_timer = timer_alloc(TIMER_1); - m_c0_timer->adjust(attotime::never); - m_c1_timer->adjust(attotime::never); + m_c0_timer->adjust(attotime::from_usec(1), 0, attotime::from_usec(1)); + m_c1_timer->adjust(attotime::from_usec(1), 0, attotime::from_usec(1)); // allocate timer for system reset m_reset_timer = timer_alloc(TIMER_RESET); m_reset_timer->adjust(attotime::never); + + for (int i = 0; i < 16; i++) + { + save_item(NAME(m_segmap[i]), i); + save_item(NAME(m_segmap_masked[i]), i); + } + + for (int i = 0; i < 16384; i++) + { + save_item(NAME(m_pagemap[i].valid), i); + save_item(NAME(m_pagemap[i].writable), i); + save_item(NAME(m_pagemap[i].supervisor), i); + save_item(NAME(m_pagemap[i].uncached), i); + save_item(NAME(m_pagemap[i].accessed), i); + save_item(NAME(m_pagemap[i].modified), i); + save_item(NAME(m_pagemap[i].page), i); + save_item(NAME(m_pagemap[i].type), i); + } + + save_item(NAME(m_cachetags)); + save_item(NAME(m_cachedata)); + save_item(NAME(m_ram_size)); + save_item(NAME(m_ram_size_words)); + save_item(NAME(m_context)); + save_item(NAME(m_context_masked)); + save_item(NAME(m_system_enable)); + save_item(NAME(m_fetch_bootrom)); + save_item(NAME(m_buserr)); + save_item(NAME(m_page_valid)); + + save_item(NAME(m_auxio)); + save_item(NAME(m_counter)); + save_item(NAME(m_dma)); + save_item(NAME(m_dma_irq)); + save_item(NAME(m_dma_tc_read)); + save_item(NAME(m_dma_pack_register)); + save_item(NAME(m_scsi_irq)); + save_item(NAME(m_fdc_irq)); + + save_item(NAME(m_irq_reg)); + save_item(NAME(m_scc1_int)); + save_item(NAME(m_scc2_int)); + save_item(NAME(m_diag)); + save_item(NAME(m_arch)); } READ32_MEMBER( sun4_state::ram_r ) { - //printf("ram_r: @ %08x (mask %08x)\n", offset<<2, mem_mask); - - if (offset < m_ram_size_words) return m_ram_ptr[offset]; - - return 0xffffffff; + return m_ram_ptr[offset]; } WRITE32_MEMBER( sun4_state::ram_w ) @@ -1501,43 +1331,22 @@ WRITE32_MEMBER( sun4_state::ram_w ) //if ((offset<<2) == 0xfb2000) printf("write %08x to %08x, mask %08x, PC=%x\n", data, offset<<2, mem_mask, m_maincpu->pc()); - if (offset < m_ram_size_words) - { - COMBINE_DATA(&m_ram_ptr[offset]); - return; - } + COMBINE_DATA(&m_ram_ptr[offset]); } -void sun4_state::type0space_map(address_map &map) +READ32_MEMBER( sun4_state::timeout_r ) { - map(0x00000000, 0x03ffffff).rw(FUNC(sun4_state::ram_r), FUNC(sun4_state::ram_w)); -} - -void sun4_state::type1space_map(address_map &map) -{ - map(0x00000000, 0x0000000f).rw(m_scc1, FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w)).umask32(0xff00ff00); - map(0x01000000, 0x0100000f).rw(m_scc2, FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w)).umask32(0xff00ff00); - map(0x02000000, 0x020007ff).rw(m_timekpr, FUNC(timekeeper_device::read), FUNC(timekeeper_device::write)); - map(0x03000000, 0x0300000f).rw(FUNC(sun4_state::timer_r), FUNC(sun4_state::timer_w)).mirror(0xfffff0); - map(0x05000000, 0x05000003).rw(FUNC(sun4_state::irq_r), FUNC(sun4_state::irq_w)); - map(0x06000000, 0x0607ffff).rom().region("user1", 0); - map(0x07200000, 0x07200003).rw(FUNC(sun4_state::fdc_r), FUNC(sun4_state::fdc_w)); - map(0x08000000, 0x08000003).r(FUNC(sun4_state::ss1_sl0_id)); // slot 0 contains SCSI/DMA/Ethernet - map(0x08400000, 0x0840000f).rw(FUNC(sun4_state::dma_r), FUNC(sun4_state::dma_w)); - map(0x08800000, 0x0880002f).m(m_scsi, FUNC(ncr53c90a_device::map)).umask32(0xff000000); - map(0x08c00000, 0x08c00003).rw(m_lance, FUNC(am79c90_device::regs_r), FUNC(am79c90_device::regs_w)); -} - -void sun4_state::type1space_sbus_map(address_map &map) -{ - type1space_map(map); - map(0x0a000000, 0x0fffffff).rw(m_sbus, FUNC(sbus_device::read), FUNC(sbus_device::write)); + m_buserr[0] = 0x20; // read timeout + m_buserr[1] = 0x04000000 + (offset << 2); + m_maincpu->set_mae(); + return 0; } -void sun4_state::type1space_s4_map(address_map &map) +WRITE32_MEMBER( sun4_state::timeout_w ) { - map(0x00000000, 0x0000000f).rw(m_scc1, FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w)).umask32(0xff00ff00); - map(0x01000000, 0x0100000f).rw(m_scc2, FUNC(z80scc_device::ba_cd_inv_r), FUNC(z80scc_device::ba_cd_inv_w)).umask32(0xff00ff00); + m_buserr[0] = 0x8020; // write timeout + m_buserr[1] = 0x04000000 + (offset << 2); + m_maincpu->set_mae(); } READ8_MEMBER( sun4_state::fdc_r ) @@ -1547,13 +1356,21 @@ READ8_MEMBER( sun4_state::fdc_r ) switch(offset) { - case 0: // Main Status (R) + case 0: // Main Status (R, 82072) return m_fdc->msr_r(space, 0, 0xff); - break; - case 1: // FIFO Data Port (R) + case 1: // FIFO Data Port (R, 82072) + case 5: // FIFO Data Port (R, 82077) return m_fdc->fifo_r(space, 0, 0xff); - break; + + case 2: // Digital Output Register (R, 82077) + return m_fdc->dor_r(space, 0, 0xff); + + case 4: // Main Status Register (R, 82077) + return m_fdc->msr_r(space, 0, 0xff); + + case 7:// Digital Input Register (R, 82077) + return m_fdc->dir_r(space, 0, 0xff); default: break; @@ -1566,38 +1383,93 @@ WRITE8_MEMBER( sun4_state::fdc_w ) { switch(offset) { - case 0: // Data Rate Select Register (W) + case 0: // Data Rate Select Register (W, 82072) + case 4: // Data Rate Select Register (W, 82077) m_fdc->dsr_w(space, 0, data, 0xff); break; - case 1: // FIFO Data Port (W) + case 1: // FIFO Data Port (W, 82072) + case 5: // FIFO Data Port (W, 82077) m_fdc->fifo_w(space, 0, data, 0xff); break; + case 7: // Configuration Control REgister (W, 82077) + m_fdc->ccr_w(space, 0, data, 0xff); + break; + default: break; } } +READ8_MEMBER( sun4_state::auxio_r ) +{ + //logerror("%s: auxio_r: %02x\n", machine().describe_context(), m_auxio); + return m_auxio; +} + +WRITE8_MEMBER( sun4_state::auxio_w ) +{ + //logerror("%s: auxio_w: %02x, drive_sel:%d tc:%d eject:%d LED:%d\n", machine().describe_context(), data, BIT(data, 3), BIT(data, 2), BIT(data, 1), BIT(data, 0)); + m_auxio = (m_auxio & 0xf0) | (data & 0x0f); + if (!(m_auxio & AUXIO_DRIVE_SEL)) + { + m_auxio &= ~(AUXIO_DENSITY | AUXIO_DISK_CHG); + } + else + { + m_auxio |= AUXIO_DISK_CHG; // Report no disk inserted + m_fdc->tc_w(data & AUXIO_TC); + } +} + READ8_MEMBER( sun4_state::irq_r ) { + //logerror("%02x from IRQ\n", m_irq_reg); return m_irq_reg; } WRITE8_MEMBER( sun4_state::irq_w ) { - printf("%02x to IRQ\n", data); - + const uint8_t old_irq = m_irq_reg; m_irq_reg = data; + const uint8_t changed = old_irq ^ data; - m_maincpu->set_input_line(SPARC_IRQ12, ((m_scc1_int || m_scc2_int) && (m_irq_reg & 0x01)) ? ASSERT_LINE : CLEAR_LINE); - if (!(m_irq_reg & 0x01)) - m_maincpu->set_input_line(SPARC_NMI, CLEAR_LINE); + //logerror("%02x to IRQ, %02x changed\n", data, changed); + + if (!changed) + return; + + if (BIT(changed, 0)) + { + if (BIT(m_irq_reg, 7) && BIT(m_counter[2] | m_counter[3], 31)) + m_maincpu->set_input_line(SPARC_IRQ14, BIT(data, 0) ? ASSERT_LINE : CLEAR_LINE); + if (BIT(m_irq_reg, 5) && BIT(m_counter[0] | m_counter[1], 31)) + m_maincpu->set_input_line(SPARC_IRQ10, BIT(data, 0) ? ASSERT_LINE : CLEAR_LINE); + if (BIT(m_irq_reg, 3)) + m_maincpu->set_input_line(SPARC_IRQ6, BIT(data, 0) ? ASSERT_LINE : CLEAR_LINE); + if (BIT(m_irq_reg, 2)) + m_maincpu->set_input_line(SPARC_IRQ4, BIT(data, 0) ? ASSERT_LINE : CLEAR_LINE); + if (BIT(m_irq_reg, 1)) + m_maincpu->set_input_line(SPARC_IRQ1, BIT(data, 0) ? ASSERT_LINE : CLEAR_LINE); + } + else if (BIT(m_irq_reg, 0)) + { + if (BIT(changed, 7) && BIT(m_counter[2] | m_counter[3], 31)) + m_maincpu->set_input_line(SPARC_IRQ14, BIT(m_irq_reg, 7) ? ASSERT_LINE : CLEAR_LINE); + if (BIT(changed, 5) && BIT(m_counter[0] | m_counter[1], 31)) + m_maincpu->set_input_line(SPARC_IRQ10, BIT(m_irq_reg, 5) ? ASSERT_LINE : CLEAR_LINE); + if (BIT(changed, 3)) + m_maincpu->set_input_line(SPARC_IRQ6, BIT(m_irq_reg, 3) ? ASSERT_LINE : CLEAR_LINE); + if (BIT(changed, 2)) + m_maincpu->set_input_line(SPARC_IRQ4, BIT(m_irq_reg, 2) ? ASSERT_LINE : CLEAR_LINE); + if (BIT(changed, 1)) + m_maincpu->set_input_line(SPARC_IRQ1, BIT(m_irq_reg, 1) ? ASSERT_LINE : CLEAR_LINE); + } } WRITE_LINE_MEMBER( sun4_state::scc1_int ) { - logerror("scc1\n"); m_scc1_int = state; m_maincpu->set_input_line(SPARC_IRQ12, ((m_scc1_int || m_scc2_int) && (m_irq_reg & 0x01)) ? ASSERT_LINE : CLEAR_LINE); @@ -1605,7 +1477,6 @@ WRITE_LINE_MEMBER( sun4_state::scc1_int ) WRITE_LINE_MEMBER( sun4_state::scc2_int ) { - logerror("scc2\n"); m_scc2_int = state; m_maincpu->set_input_line(SPARC_IRQ12, ((m_scc1_int || m_scc2_int) && (m_irq_reg & 0x01)) ? ASSERT_LINE : CLEAR_LINE); @@ -1616,90 +1487,80 @@ void sun4_state::device_timer(emu_timer &timer, device_timer_id id, int param, v switch (id) { case TIMER_0: - //printf("Timer 0 expired\n"); - m_counter[0] = 0x80000000 | (1 << 10); - m_counter[1] |= 0x80000000; - //m_c0_timer->adjust(attotime::never); - start_timer(0); - if ((m_irq_reg & 0x21) == 0x21) + //logerror("Timer 0 expired\n"); + m_counter[0] += 1 << 10; + if ((m_counter[0] & 0x7fffffff) == (m_counter[1] & 0x7fffffff)) { - logerror("t0\n"); - m_maincpu->set_input_line(SPARC_IRQ10, ASSERT_LINE); - //printf("Taking INT10\n"); + m_counter[0] = 0x80000000 | (1 << 10); + m_counter[1] |= 0x80000000; + if ((m_irq_reg & 0x21) == 0x21) + { + m_maincpu->set_input_line(SPARC_IRQ10, ASSERT_LINE); + //logerror("Taking INT10\n"); + } + else + { + //logerror("Not taking INT10\n"); + } } break; case TIMER_1: - //printf("Timer 1 expired\n"); - m_counter[2] = 0x80000000 | (1 << 10); - m_counter[3] |= 0x80000000; - start_timer(1); - //m_c1_timer->adjust(attotime::never); - if ((m_irq_reg & 0x81) == 0x81) + //logerror("Timer 1 expired\n"); + m_counter[2] += 1 << 10; + if ((m_counter[2] & 0x7fffffff) == (m_counter[3] & 0x7fffffff)) { - logerror("t1\n"); - m_maincpu->set_input_line(SPARC_IRQ14, ASSERT_LINE); - //printf("Taking INT14\n"); + m_counter[2] = 0x80000000 | (1 << 10); + m_counter[3] |= 0x80000000; + if ((m_irq_reg & 0x81) == 0x81) + { + m_maincpu->set_input_line(SPARC_IRQ14, ASSERT_LINE); + //logerror("Taking INT14\n"); + } + else + { + //logerror("Not taking INT14\n"); + } } break; case TIMER_RESET: m_reset_timer->adjust(attotime::never); m_maincpu->set_input_line(SPARC_RESET, CLEAR_LINE); - printf("Clearing reset line\n"); + //printf("Clearing reset line\n"); break; } } READ32_MEMBER( sun4_state::timer_r ) { - uint32_t ret = m_counter[offset]; + const uint32_t ret = m_counter[offset]; // reading limt 0 if (offset == 0) { - //printf("Read timer counter 0 (%08x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask); + //logerror("Read timer counter 0 (%x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask); } - if (offset == 1) + else if (offset == 1) { - //printf("Read timer limit 0 (%08x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask); + //logerror("Read timer limit 0 (%08x) @ %x, mask %08x, clearing IRQ10\n", ret, m_maincpu->pc(), mem_mask); m_counter[0] &= ~0x80000000; m_counter[1] &= ~0x80000000; - logerror("tc0\n"); m_maincpu->set_input_line(SPARC_IRQ10, CLEAR_LINE); } - - if (offset == 2) + else if (offset == 2) { - //printf("Read timer counter 1 (%08x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask); + //logerror("Read timer counter 1 (%x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask); } - if (offset == 3) + else if (offset == 3) { - //printf("Read timer limit 1 (%08x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask); + //logerror("Read timer limit 1 (%08x) @ %x, mask %08x, clearing IRQ14\n", ret, m_maincpu->pc(), mem_mask); m_counter[2] &= ~0x80000000; m_counter[3] &= ~0x80000000; - logerror("tc1\n"); m_maincpu->set_input_line(SPARC_IRQ14, CLEAR_LINE); } - return ret; -} - -void sun4_state::start_timer(int num) -{ - int period = (m_counter[num * 2 + 1] >> 10) & 0x1fffff; - if (period == 0) - period = 0x200000; - //printf("Setting limit %d period to %d us\n", num, period); - - if (num == 0) - { - m_c0_timer->adjust(attotime::from_usec(period)); - } - else - { - m_c1_timer->adjust(attotime::from_usec(period)); - } + return ret; } WRITE32_MEMBER( sun4_state::timer_w ) @@ -1708,26 +1569,26 @@ WRITE32_MEMBER( sun4_state::timer_w ) if (offset == 0) { - printf("%08x to timer counter 0 @ %x, mask %08x\n", data, m_maincpu->pc(), mem_mask); + //logerror("%08x to timer counter 0 @ %x, mask %08x\n", data, m_maincpu->pc(), mem_mask); } // writing limit 0 if (offset == 1) { + //logerror("%08x to timer limit 0 @ %x, mask %08x\n", data, m_maincpu->pc(), mem_mask); m_counter[0] = 1 << 10; - start_timer(0); } if (offset == 2) { - printf("%08x to timer counter 1 @ %x, mask %08x\n", data, m_maincpu->pc(), mem_mask); + //printf("%08x to timer counter 1 @ %x, mask %08x\n", data, m_maincpu->pc(), mem_mask); } // writing limit 1 if (offset == 3) { + //logerror("%08x to timer limit 1 @ %x, mask %08x\n", data, m_maincpu->pc(), mem_mask); m_counter[2] = 1 << 10; - start_timer(1); } } @@ -1747,7 +1608,6 @@ void sun4_state::dma_check_interrupts() if (old_irq != m_dma_irq) { //logerror("m_dma_irq %d because irq_or_err_pending:%d and irq_enabled:%d\n", m_dma_irq ? 1 : 0, irq_or_err_pending, irq_enabled); - logerror("dma\n"); m_maincpu->set_input_line(SPARC_IRQ3, m_dma_irq ? ASSERT_LINE : CLEAR_LINE); } } @@ -1756,8 +1616,6 @@ void sun4_state::dma_transfer_write() { //logerror("DMAing from device to RAM\n"); - address_space &space = m_maincpu->space(AS_PROGRAM); - uint8_t pack_cnt = (m_dma[DMA_CTRL] & DMA_PACK_CNT) >> DMA_PACK_CNT_SHIFT; while (m_dma[DMA_CTRL] & DMA_REQ_PEND) { @@ -1774,13 +1632,9 @@ void sun4_state::dma_transfer_write() { //logerror("Writing pack register %08x to %08x\n", m_dma_pack_register, m_dma[DMA_ADDR]); if (m_arch == ARCH_SUN4C) - { - write_insn_data_4c(11, space, m_dma[DMA_ADDR] >> 2, m_dma_pack_register, ~0); - } - else - { - write_insn_data(11, space, m_dma[DMA_ADDR] >> 2, m_dma_pack_register, ~0); - } + m_mmu->insn_data_w<sun4c_mmu_device::SUPER_DATA>(m_dma[DMA_ADDR] >> 2, m_dma_pack_register, ~0); + //else - TODO + //sun4_insn_data_w(space, m_dma[DMA_ADDR] >> 2, m_dma_pack_register, ~0); pack_cnt = 0; m_dma_pack_register = 0; @@ -1796,8 +1650,6 @@ void sun4_state::dma_transfer_read() { //logerror("DMAing from RAM to device\n"); - address_space &space = m_maincpu->space(AS_PROGRAM); - bool word_cached = false; uint32_t current_word = 0; while (m_dma[DMA_CTRL] & DMA_REQ_PEND) @@ -1805,13 +1657,9 @@ void sun4_state::dma_transfer_read() if (!word_cached) { if (m_arch == ARCH_SUN4C) - { - current_word = read_insn_data_4c(11, space, m_dma[DMA_ADDR] >> 2, ~0); - } - else - { - current_word = read_insn_data(11, space, m_dma[DMA_ADDR] >> 2, ~0); - } + current_word = m_mmu->insn_data_r<sun4c_mmu_device::SUPER_DATA>(m_dma[DMA_ADDR] >> 2, ~0); + //else - TODO + //current_word = sun4_insn_data_r<SUPER_DATA>(space, m_dma[DMA_ADDR] >> 2, ~0); word_cached = true; //logerror("Current word: %08x\n", current_word); } @@ -1833,13 +1681,9 @@ void sun4_state::dma_transfer_read() void sun4_state::dma_transfer() { if (m_dma[DMA_CTRL] & DMA_WRITE) - { dma_transfer_write(); - } else - { dma_transfer_read(); - } if (m_dma[DMA_BYTE_COUNT] == 0 && (m_dma[DMA_CTRL] & DMA_EN_CNT)) { @@ -1892,7 +1736,10 @@ WRITE32_MEMBER( sun4_state::dma_w ) const uint32_t bit_index = (3 - i) * 8; //const uint32_t value = m_dma_pack_register & (0xff << bit_index); //logerror("dma_w: draining %02x to RAM address %08x & %08x\n", value >> bit_index, m_dma[DMA_ADDR], 0xff << (24 - bit_index)); - write_insn_data_4c(11, space, m_dma[DMA_ADDR] >> 2, m_dma_pack_register, 0xff << bit_index); + if (m_arch == ARCH_SUN4C) + m_mmu->insn_data_w<sun4c_mmu_device::SUPER_DATA>(m_dma[DMA_ADDR] >> 2, m_dma_pack_register, 0xff << bit_index); + else + sun4_insn_data_w(space, m_dma[DMA_ADDR] >> 2, m_dma_pack_register, 0xff << bit_index); m_dma[DMA_ADDR]++; } m_dma_pack_register = 0; @@ -1947,20 +1794,31 @@ WRITE_LINE_MEMBER( sun4_state::scsi_drq ) } } +WRITE_LINE_MEMBER( sun4_state::fdc_irq ) +{ + int old_irq = m_fdc_irq; + m_fdc_irq = state; + if (old_irq != m_fdc_irq) + { + logerror("fdc_irq %d\n", state); + m_maincpu->set_input_line(SPARC_IRQ11, state ? ASSERT_LINE : CLEAR_LINE); + } +} + READ32_MEMBER( sun4_state::lance_dma_r ) { if (m_arch == ARCH_SUN4) - return read_insn_data(11, m_maincpu->space(AS_PROGRAM), offset, mem_mask); + return sun4_insn_data_r<SUPER_DATA>(space, offset, mem_mask); else - return read_insn_data_4c(11, m_maincpu->space(AS_PROGRAM), offset, mem_mask); + return m_mmu->insn_data_r<sun4c_mmu_device::SUPER_DATA>(offset, mem_mask); } WRITE32_MEMBER( sun4_state::lance_dma_w ) { if (m_arch == ARCH_SUN4) - write_insn_data(11, m_maincpu->space(AS_PROGRAM), offset, data, mem_mask); + sun4_insn_data_w(space, offset, data, mem_mask); else - write_insn_data_4c(11, m_maincpu->space(AS_PROGRAM), offset, data, mem_mask); + m_mmu->insn_data_w<sun4c_mmu_device::SUPER_DATA>(offset, data, mem_mask); } WRITE32_MEMBER( sun4_state::buserr_w ) @@ -2007,16 +1865,30 @@ void sun4_state::ncr53c90a(device_t *device) MACHINE_CONFIG_START(sun4_state::sun4) /* basic machine hardware */ - MCFG_DEVICE_ADD(m_maincpu, MB86901, 16670000) - MCFG_DEVICE_ADDRESS_MAP(AS_PROGRAM, sun4_mem) + MCFG_DEVICE_ADD(m_maincpu, MB86901, 16'670'000) MCFG_SPARC_ADD_ASI_DESC(sun4_asi_desc) - - RAM(config, RAM_TAG).set_default_size("16M").set_default_value(0x00); + m_maincpu->set_addrmap(0, &sun4_state::sun4c_debugger_map); + + // TODO: MMU for sun4 hardware + SUN4C_MMU(config, m_mmu, 25'000'000, 7, 0x7f); + m_mmu->type1_r().set(m_type1space, FUNC(address_map_bank_device::read32)); + m_mmu->type1_w().set(m_type1space, FUNC(address_map_bank_device::write32)); + m_mmu->set_cpu(m_maincpu); + m_mmu->set_ram(m_ram); + m_mmu->set_rom("user1"); + m_mmu->set_scc(m_scc2); + m_maincpu->set_mmu(m_mmu); + + RAM(config, m_ram); + m_ram->set_default_size("16M"); + m_ram->set_default_value(0x00); M48T02(config, TIMEKEEPER_TAG, 0); - MCFG_N82077AA_ADD(FDC_TAG, n82077aa_device::MODE_PS2) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", sun_floppies, "35hd", sun4_state::floppy_formats) + I82072(config, m_fdc, 24_MHz_XTAL); + m_fdc->set_ready_line_connected(false); + m_fdc->intrq_wr_callback().set(FUNC(sun4_state::fdc_irq)); + FLOPPY_CONNECTOR(config, m_floppy, sun_floppies, "35hd", sun4_state::floppy_formats); // MMU Type 0 device space ADDRESS_MAP_BANK(config, m_type0space).set_map(&sun4_state::type0space_map).set_options(ENDIANNESS_BIG, 32, 32, 0x80000000); @@ -2033,8 +1905,10 @@ MACHINE_CONFIG_START(sun4_state::sun4) SCC8530N(config, m_scc1, 4.9152_MHz_XTAL); m_scc1->out_int_callback().set(FUNC(sun4_state::scc1_int)); m_scc1->out_txda_callback().set(KEYBOARD_TAG, FUNC(sun_keyboard_port_device::write_txd)); + m_scc1->out_txdb_callback().set(MOUSE_TAG, FUNC(sun_mouse_port_device::write_txd)); SUNKBD_PORT(config, KEYBOARD_TAG, default_sun_keyboard_devices, "type4hle").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxa_w)); + SUNMOUSE_PORT(config, MOUSE_TAG, default_sun_mouse_devices, "hle1200").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxb_w)); // RS232 serial ports SCC8530N(config, m_scc2, 4.9152_MHz_XTAL); @@ -2067,22 +1941,34 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(sun4_state::sun4c) /* basic machine hardware */ - MCFG_DEVICE_ADD(m_maincpu, MB86901, 16670000) - MCFG_DEVICE_ADDRESS_MAP(AS_PROGRAM, sun4c_mem) + MCFG_DEVICE_ADD(m_maincpu, MB86901, 20'000'000) MCFG_SPARC_ADD_ASI_DESC(sun4c_asi_desc) + m_maincpu->set_addrmap(0, &sun4_state::sun4c_debugger_map); + + SUN4C_MMU(config, m_mmu, 20'000'000, 7, 0x7f); + m_mmu->type1_r().set(m_type1space, FUNC(address_map_bank_device::read32)); + m_mmu->type1_w().set(m_type1space, FUNC(address_map_bank_device::write32)); + m_mmu->set_cpu(m_maincpu); + m_mmu->set_ram(m_ram); + m_mmu->set_rom("user1"); + m_mmu->set_scc(m_scc2); + m_maincpu->set_mmu(m_mmu); - RAM(config, RAM_TAG).set_default_size("16M").set_default_value(0x00); + RAM(config, m_ram).set_default_size("16M").set_default_value(0x00); + m_ram->set_extra_options("4M,8M,12M,16M,20M,24M,28M,32M,36M,40M,48M,52M,64M"); M48T02(config, TIMEKEEPER_TAG, 0); - MCFG_N82077AA_ADD(FDC_TAG, n82077aa_device::MODE_PS2) - MCFG_FLOPPY_DRIVE_ADD("fdc:0", sun_floppies, "35hd", sun4_state::floppy_formats) + N82077AA(config, m_fdc, 24_MHz_XTAL); + m_fdc->set_ready_line_connected(false); + m_fdc->intrq_wr_callback().set(FUNC(sun4_state::fdc_irq)); + FLOPPY_CONNECTOR(config, m_floppy, sun_floppies, "35hd", sun4_state::floppy_formats); // MMU Type 0 device space ADDRESS_MAP_BANK(config, m_type0space).set_map(&sun4_state::type0space_map).set_options(ENDIANNESS_BIG, 32, 32, 0x80000000); // MMU Type 1 device space - ADDRESS_MAP_BANK(config, m_type1space).set_map(&sun4_state::type1space_map).set_options(ENDIANNESS_BIG, 32, 32, 0x80000000); + ADDRESS_MAP_BANK(config, m_type1space).set_map(&sun4_state::type1space_sbus_map).set_options(ENDIANNESS_BIG, 32, 32, 0x80000000); // Ethernet AM79C90(config, m_lance, 10'000'000); // clock is a guess @@ -2093,8 +1979,10 @@ MACHINE_CONFIG_START(sun4_state::sun4c) SCC8530N(config, m_scc1, 4.9152_MHz_XTAL); m_scc1->out_int_callback().set(FUNC(sun4_state::scc1_int)); m_scc1->out_txda_callback().set(KEYBOARD_TAG, FUNC(sun_keyboard_port_device::write_txd)); + // no mouse TxD connection - replaced with soft power request input SUNKBD_PORT(config, KEYBOARD_TAG, default_sun_keyboard_devices, "type5hle").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxa_w)); + SUNMOUSE_PORT(config, MOUSE_TAG, default_sun_mouse_devices, "hle1200").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxb_w)); // RS232 serial ports SCC8530N(config, m_scc2, 4.9152_MHz_XTAL); @@ -2122,34 +2010,90 @@ MACHINE_CONFIG_START(sun4_state::sun4c) MCFG_NSCSI_ADD("scsibus:6", sun_scsi_devices, nullptr, false) MCFG_NSCSI_ADD("scsibus:7", sun_scsi_devices, "ncr53c90a", true) MCFG_SLOT_OPTION_MACHINE_CONFIG("ncr53c90a", [this] (device_t *device) { ncr53c90a(device); }) + + // SBus + SBUS(config, m_sbus, 20'000'000, "maincpu", "type1"); + SBUS_SLOT(config, m_sbus_slot[0], 20'000'000, m_sbus, sbus_cards, nullptr); + SBUS_SLOT(config, m_sbus_slot[1], 20'000'000, m_sbus, sbus_cards, nullptr); + SBUS_SLOT(config, m_sbus_slot[2], 20'000'000, m_sbus, sbus_cards, nullptr); MACHINE_CONFIG_END -MACHINE_CONFIG_START(sun4_state::sun4_40) +void sun4_state::sun4_20(machine_config &config) +{ sun4c(config); - m_type1space->set_map(&sun4_state::type1space_sbus_map).set_options(ENDIANNESS_BIG, 32, 32, 0x80000000); + m_ram->set_extra_options("4M,8M,12M,16M"); - // SBus - SBUS(config, m_sbus, 16670000, "maincpu", "type1"); - SBUS_SLOT(config, "slot1", 16'670'000, m_sbus, sbus_cards, nullptr); - SBUS_SLOT(config, "slot2", 16'670'000, m_sbus, sbus_cards, nullptr); - SBUS_SLOT(config, "slot3", 16'670'000, m_sbus, sbus_cards, "bwtwo"); -MACHINE_CONFIG_END + m_sbus_slot[0]->set_fixed(true); + m_sbus_slot[1]->set_fixed(true); + m_sbus_slot[2]->set_default_option("bwtwo"); + m_sbus_slot[2]->set_fixed(true); +} -MACHINE_CONFIG_START(sun4_state::sun4_60) +void sun4_state::sun4_40(machine_config &config) +{ sun4c(config); - m_maincpu->set_clock(20'000'000); + m_ram->set_extra_options("4M,8M,12M,16M,20M,24M,32M,36M,48M"); - m_type1space->set_map(&sun4_state::type1space_sbus_map).set_options(ENDIANNESS_BIG, 32, 32, 0x80000000); + m_mmu->set_clock(25'000'000); + m_maincpu->set_clock(25'000'000); - // SBus - SBUS(config, m_sbus, 20'000'000, "maincpu", "type1"); - SBUS_SLOT(config, "slot1", 20'000'000, m_sbus, sbus_cards, nullptr); - SBUS_SLOT(config, "slot2", 20'000'000, m_sbus, sbus_cards, nullptr); - SBUS_SLOT(config, "slot3", 20'000'000, m_sbus, sbus_cards, nullptr); -MACHINE_CONFIG_END + m_sbus->set_clock(25'000'000); + m_sbus_slot[0]->set_clock(25'000'000); + m_sbus_slot[1]->set_clock(25'000'000); + m_sbus_slot[2]->set_clock(25'000'000); + m_sbus_slot[2]->set_default_option("bwtwo"); + m_sbus_slot[2]->set_fixed(true); +} +void sun4_state::sun4_50(machine_config &config) +{ + sun4c(config); + + m_mmu->set_ctx_mask(0xf); + m_mmu->set_pmeg_mask(0xff); + + m_mmu->set_clock(40'000'000); + m_maincpu->set_clock(40'000'000); + + m_sbus->set_clock(20'000'000); + m_sbus_slot[0]->set_clock(20'000'000); + m_sbus_slot[1]->set_clock(20'000'000); + m_sbus_slot[2]->set_clock(20'000'000); + m_sbus_slot[2]->set_default_option("turbogx"); // not accurate, should be gxp, not turbogx + m_sbus_slot[2]->set_fixed(true); +} + +void sun4_state::sun4_60(machine_config &config) +{ + sun4c(config); +} + +void sun4_state::sun4_65(machine_config &config) +{ + sun4c(config); + + m_mmu->set_clock(25'000'000); + m_maincpu->set_clock(25'000'000); + + m_sbus->set_clock(25'000'000); + m_sbus_slot[0]->set_clock(25'000'000); + m_sbus_slot[1]->set_clock(25'000'000); + m_sbus_slot[2]->set_clock(25'000'000); + m_sbus_slot[2]->set_default_option("bwtwo"); +} + +void sun4_state::sun4_75(machine_config &config) +{ + sun4c(config); + + m_mmu->set_ctx_mask(0xf); + m_mmu->set_pmeg_mask(0xff); + + m_mmu->set_clock(40'000'000); + m_maincpu->set_clock(40'000'000); +} /* Boot PROM @@ -2397,15 +2341,6 @@ void sun4_state::init_sun4() void sun4_state::init_sun4c() { - m_ctx_mask = 0x7; - m_pmeg_mask = 0x7f; - m_arch = ARCH_SUN4C; -} - -void sun4_state::init_ss2() -{ - m_ctx_mask = 0xf; - m_pmeg_mask = 0xff; m_arch = ARCH_SUN4C; } @@ -2418,13 +2353,14 @@ COMP( 1987, sun4_300, 0, 0, sun4, sun4, sun4_state, init_sun4, COMP( 198?, sun4_400, 0, 0, sun4, sun4, sun4_state, init_sun4, "Sun Microsystems", "Sun 4/4x0", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // sun4c -COMP( 1990, sun4_40, sun4_300, 0, sun4_40, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation IPC (Sun 4/40)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -COMP( 1991, sun4_50, sun4_300, 0, sun4c, sun4, sun4_state, init_ss2, "Sun Microsystems", "SPARCstation IPX (Sun 4/50)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -COMP( 199?, sun4_20, sun4_300, 0, sun4c, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation SLC (Sun 4/20)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -COMP( 1989, sun4_60, sun4_300, 0, sun4_60, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation 1 (Sun 4/60)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -COMP( 1990, sun4_65, sun4_300, 0, sun4c, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation 1+ (Sun 4/65)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -COMP( 1990, sun4_75, sun4_300, 0, sun4c, sun4, sun4_state, init_ss2, "Sun Microsystems", "SPARCstation 2 (Sun 4/75)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP( 1990, sun4_40, sun4_300, 0, sun4_40, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation IPC (Sun 4/40)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) +COMP( 1991, sun4_50, sun4_300, 0, sun4_50, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation IPX (Sun 4/50)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP( 199?, sun4_20, sun4_300, 0, sun4_20, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation SLC (Sun 4/20)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP( 1989, sun4_60, sun4_300, 0, sun4_60, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation 1 (Sun 4/60)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) +COMP( 1990, sun4_65, sun4_300, 0, sun4_65, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation 1+ (Sun 4/65)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP( 1990, sun4_75, sun4_300, 0, sun4_75, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation 2 (Sun 4/75)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // sun4m (using the SPARC "reference MMU", probably will go to a separate driver) COMP( 1992, sun_s10, sun4_300, 0, sun4c, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation 10 (Sun S10)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) COMP( 1994, sun_s20, sun4_300, 0, sun4c, sun4, sun4_state, init_sun4c, "Sun Microsystems", "SPARCstation 20", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) + diff --git a/src/mame/drivers/suna8.cpp b/src/mame/drivers/suna8.cpp index 68318db6b4e..ab50e99c083 100644 --- a/src/mame/drivers/suna8.cpp +++ b/src/mame/drivers/suna8.cpp @@ -2836,7 +2836,7 @@ ROM_START( hardhea2 ) ROM_LOAD( "hrd-hd13", 0x40000, 0x10000, CRC(3225e7d7) SHA1(2da9d1ce182dab8d9e09772e6899676b84c7458c) ) ROM_REGION( 0x10000, "audiocpu", 0 ) /* Music Z80 Code */ - ROM_LOAD( "hrd-hd14", 0x00000, 0x08000, CRC(79a3be51) SHA1(30bc67cd3a936615c6931f8e15953425dff59611) ) // NO PROGRAM + MUSIC PROGRAM V 2.4 + ROM_LOAD( "hrd-hd14", 0x00000, 0x08000, CRC(79a3be51) SHA1(30bc67cd3a936615c6931f8e15953425dff59611) ) // NO PROGRAM + MUSIC PROGRAM V 2.4 ROM_REGION( 0x10000, "pcm", 0 ) /* PCM Z80 Code */ ROM_LOAD( "hrd-hd15", 0x00000, 0x10000, CRC(bcbd88c3) SHA1(79782d598d9d764de70c54fc07ff9bf0f7d13d62) ) diff --git a/src/mame/drivers/super6.cpp b/src/mame/drivers/super6.cpp index 4ea4fdcadfb..af90622bfde 100644 --- a/src/mame/drivers/super6.cpp +++ b/src/mame/drivers/super6.cpp @@ -443,7 +443,8 @@ void super6_state::machine_reset() // MACHINE_CONFIG( super6 ) //------------------------------------------------- -MACHINE_CONFIG_START(super6_state::super6) +void super6_state::super6(machine_config &config) +{ // basic machine hardware Z80(config, m_maincpu, 24_MHz_XTAL / 4); m_maincpu->set_addrmap(AS_PROGRAM, &super6_state::super6_mem); @@ -474,10 +475,8 @@ MACHINE_CONFIG_START(super6_state::super6) m_fdc->intrq_wr_callback().set(FUNC(super6_state::fdc_intrq_w)); m_fdc->drq_wr_callback().set(FUNC(super6_state::fdc_drq_w)); - MCFG_FLOPPY_DRIVE_ADD(m_floppy0, super6_floppies, "525dd", floppy_image_device::default_floppy_formats) - MCFG_FLOPPY_DRIVE_SOUND(true) - MCFG_FLOPPY_DRIVE_ADD(m_floppy1, super6_floppies, nullptr, floppy_image_device::default_floppy_formats) - MCFG_FLOPPY_DRIVE_SOUND(true) + FLOPPY_CONNECTOR(config, m_floppy0, super6_floppies, "525dd", floppy_image_device::default_floppy_formats).enable_sound(true); + FLOPPY_CONNECTOR(config, m_floppy1, super6_floppies, nullptr, floppy_image_device::default_floppy_formats).enable_sound(true); Z80DART(config, m_dart, 24_MHz_XTAL / 4); m_dart->out_txda_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_txd)); @@ -488,11 +487,11 @@ MACHINE_CONFIG_START(super6_state::super6) m_dart->out_rtsb_callback().set(RS232_B_TAG, FUNC(rs232_port_device::write_rts)); m_dart->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); - MCFG_DEVICE_ADD(RS232_A_TAG, RS232_PORT, default_rs232_devices, "terminal") - MCFG_RS232_RXD_HANDLER(WRITELINE(m_dart, z80dart_device, rxa_w)) + rs232_port_device &rs232a(RS232_PORT(config, RS232_A_TAG, default_rs232_devices, "terminal")); + rs232a.rxd_handler().set(m_dart, FUNC(z80dart_device::rxa_w)); - MCFG_DEVICE_ADD(RS232_B_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(m_dart, z80dart_device, rxb_w)) + rs232_port_device &rs232b(RS232_PORT(config, RS232_B_TAG, default_rs232_devices, nullptr)); + rs232b.rxd_handler().set(m_dart, FUNC(z80dart_device::rxb_w)); COM8116(config, m_brg, 5.0688_MHz_XTAL); m_brg->fr_handler().set(m_dart, FUNC(z80dart_device::txca_w)); @@ -504,8 +503,8 @@ MACHINE_CONFIG_START(super6_state::super6) RAM(config, RAM_TAG).set_default_size("128K"); // software list - MCFG_SOFTWARE_LIST_ADD("flop_list", "super6") -MACHINE_CONFIG_END + SOFTWARE_LIST(config, "flop_list").set_original("super6"); +} diff --git a/src/mame/drivers/superslave.cpp b/src/mame/drivers/superslave.cpp index 64a3b5d985e..57ea3da5a8d 100644 --- a/src/mame/drivers/superslave.cpp +++ b/src/mame/drivers/superslave.cpp @@ -361,7 +361,8 @@ void superslave_state::machine_reset() // MACHINE_CONFIG( superslave ) //------------------------------------------------- -MACHINE_CONFIG_START(superslave_state::superslave) +void superslave_state::superslave(machine_config &config) +{ // basic machine hardware Z80(config, m_maincpu, XTAL(8'000'000)/2); m_maincpu->set_addrmap(AS_PROGRAM, &superslave_state::superslave_mem); @@ -384,16 +385,16 @@ MACHINE_CONFIG_START(superslave_state::superslave) dart0.out_rtsb_callback().set(m_rs232b, FUNC(rs232_port_device::write_rts)); dart0.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); - MCFG_DEVICE_ADD(m_rs232a, RS232_PORT, default_rs232_devices, "terminal") - MCFG_RS232_RXD_HANDLER(WRITELINE(Z80DART_0_TAG, z80dart_device, rxa_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(Z80DART_0_TAG, z80dart_device, dcda_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(Z80DART_0_TAG, z80dart_device, ctsa_w)) - MCFG_SLOT_OPTION_DEVICE_INPUT_DEFAULTS("terminal", terminal) + RS232_PORT(config, m_rs232a, default_rs232_devices, "terminal"); + m_rs232a->rxd_handler().set(Z80DART_0_TAG, FUNC(z80dart_device::rxa_w)); + m_rs232a->dcd_handler().set(Z80DART_0_TAG, FUNC(z80dart_device::dcda_w)); + m_rs232a->cts_handler().set(Z80DART_0_TAG, FUNC(z80dart_device::ctsa_w)); + m_rs232a->set_option_device_input_defaults("terminal", DEVICE_INPUT_DEFAULTS_NAME(terminal)); - MCFG_DEVICE_ADD(m_rs232b, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(Z80DART_0_TAG, z80dart_device, rxb_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(Z80DART_0_TAG, z80dart_device, dcdb_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(Z80DART_0_TAG, z80dart_device, ctsb_w)) + RS232_PORT(config, m_rs232b, default_rs232_devices, nullptr); + m_rs232b->rxd_handler().set(Z80DART_0_TAG, FUNC(z80dart_device::rxb_w)); + m_rs232b->dcd_handler().set(Z80DART_0_TAG, FUNC(z80dart_device::dcdb_w)); + m_rs232b->cts_handler().set(Z80DART_0_TAG, FUNC(z80dart_device::ctsb_w)); z80dart_device& dart1(Z80DART(config, Z80DART_1_TAG, XTAL(8'000'000)/2)); dart1.out_txda_callback().set(m_rs232c, FUNC(rs232_port_device::write_txd)); @@ -404,15 +405,15 @@ MACHINE_CONFIG_START(superslave_state::superslave) dart1.out_rtsb_callback().set(m_rs232d, FUNC(rs232_port_device::write_rts)); dart1.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); - MCFG_DEVICE_ADD(m_rs232c, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(Z80DART_1_TAG, z80dart_device, rxa_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(Z80DART_1_TAG, z80dart_device, dcda_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(Z80DART_1_TAG, z80dart_device, ctsa_w)) + RS232_PORT(config, m_rs232c, default_rs232_devices, nullptr); + m_rs232c->rxd_handler().set(Z80DART_1_TAG, FUNC(z80dart_device::rxa_w)); + m_rs232c->dcd_handler().set(Z80DART_1_TAG, FUNC(z80dart_device::dcda_w)); + m_rs232c->cts_handler().set(Z80DART_1_TAG, FUNC(z80dart_device::ctsa_w)); - MCFG_DEVICE_ADD(m_rs232d, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(Z80DART_1_TAG, z80dart_device, rxb_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(Z80DART_1_TAG, z80dart_device, dcdb_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(Z80DART_1_TAG, z80dart_device, ctsb_w)) + RS232_PORT(config, m_rs232d, default_rs232_devices, nullptr); + m_rs232d->rxd_handler().set(Z80DART_1_TAG, FUNC(z80dart_device::rxb_w)); + m_rs232d->dcd_handler().set(Z80DART_1_TAG, FUNC(z80dart_device::dcdb_w)); + m_rs232d->cts_handler().set(Z80DART_1_TAG, FUNC(z80dart_device::ctsb_w)); COM8116(config, m_dbrg, XTAL(5'068'800)); m_dbrg->fr_handler().set(Z80DART_0_TAG, FUNC(z80dart_device::txca_w)); @@ -424,7 +425,7 @@ MACHINE_CONFIG_START(superslave_state::superslave) // internal ram RAM(config, RAM_TAG).set_default_size("64K").set_extra_options("128K"); -MACHINE_CONFIG_END +} diff --git a/src/mame/drivers/supertnk.cpp b/src/mame/drivers/supertnk.cpp index bf4d63f2767..0493f3c9ca0 100644 --- a/src/mame/drivers/supertnk.cpp +++ b/src/mame/drivers/supertnk.cpp @@ -94,11 +94,15 @@ CRU lines: >b12 Unknown, maybe some special-hardware sound effect or lights blinking (?) >b13 Unknown, maybe some special-hardware sound effect or lights blinking (?) +XTAL (on CPU board) is marked 20.790 on one PCB, 22.118 on another. The +former value is correct according to the parts list in the service manual. + ***************************************************************************/ #include "emu.h" #include "cpu/tms9900/tms9980a.h" +#include "machine/74259.h" #include "machine/watchdog.h" #include "sound/ay8910.h" #include "screen.h" @@ -116,6 +120,7 @@ public: supertnk_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") + , m_watchdog(*this, "watchdog") { } void supertnk(machine_config &config); @@ -123,15 +128,16 @@ public: void init_supertnk(); private: - DECLARE_WRITE8_MEMBER(supertnk_bankswitch_0_w); - DECLARE_WRITE8_MEMBER(supertnk_bankswitch_1_w); - DECLARE_WRITE8_MEMBER(supertnk_interrupt_ack_w); - DECLARE_WRITE8_MEMBER(supertnk_videoram_w); - DECLARE_READ8_MEMBER(supertnk_videoram_r); - DECLARE_WRITE8_MEMBER(supertnk_bitplane_select_0_w); - DECLARE_WRITE8_MEMBER(supertnk_bitplane_select_1_w); - uint32_t screen_update_supertnk(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - INTERRUPT_GEN_MEMBER(supertnk_interrupt); + DECLARE_WRITE_LINE_MEMBER(bankswitch_0_w); + DECLARE_WRITE_LINE_MEMBER(bankswitch_1_w); + DECLARE_WRITE8_MEMBER(interrupt_ack_w); + DECLARE_WRITE_LINE_MEMBER(watchdog_enable_w); + DECLARE_WRITE8_MEMBER(videoram_w); + DECLARE_READ8_MEMBER(videoram_r); + DECLARE_WRITE_LINE_MEMBER(bitplane_select_0_w); + DECLARE_WRITE_LINE_MEMBER(bitplane_select_1_w); + uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + DECLARE_WRITE_LINE_MEMBER(vblank_interrupt); virtual void machine_start() override; virtual void machine_reset() override; @@ -143,7 +149,9 @@ private: uint8_t m_rom_bank; uint8_t m_bitplane_select; pen_t m_pens[NUM_PENS]; + required_device<cpu_device> m_maincpu; + required_device<watchdog_timer_device> m_watchdog; }; @@ -159,16 +167,16 @@ void supertnk_state::machine_start() * *************************************/ -WRITE8_MEMBER(supertnk_state::supertnk_bankswitch_0_w) +WRITE_LINE_MEMBER(supertnk_state::bankswitch_0_w) { - m_rom_bank = (m_rom_bank & 0x02) | ((data << 0) & 0x01); + m_rom_bank = (m_rom_bank & 0x02) | (state ? 0x01 : 0x00); membank("bank1")->set_entry(m_rom_bank); } -WRITE8_MEMBER(supertnk_state::supertnk_bankswitch_1_w) +WRITE_LINE_MEMBER(supertnk_state::bankswitch_1_w) { - m_rom_bank = (m_rom_bank & 0x01) | ((data << 1) & 0x02); + m_rom_bank = (m_rom_bank & 0x01) | (state ? 0x02 : 0x00); membank("bank1")->set_entry(m_rom_bank); } @@ -180,18 +188,24 @@ WRITE8_MEMBER(supertnk_state::supertnk_bankswitch_1_w) * *************************************/ -INTERRUPT_GEN_MEMBER(supertnk_state::supertnk_interrupt) +WRITE_LINE_MEMBER(supertnk_state::vblank_interrupt) { - m_maincpu->set_input_line(INT_9980A_LEVEL4, ASSERT_LINE); + if (state) + m_maincpu->set_input_line(INT_9980A_LEVEL4, ASSERT_LINE); } -WRITE8_MEMBER(supertnk_state::supertnk_interrupt_ack_w) +WRITE8_MEMBER(supertnk_state::interrupt_ack_w) { m_maincpu->set_input_line(INT_9980A_LEVEL4, CLEAR_LINE); } +WRITE_LINE_MEMBER(supertnk_state::watchdog_enable_w) +{ + m_watchdog->watchdog_enable(state); +} + /************************************* * @@ -217,7 +231,7 @@ void supertnk_state::video_start() } -WRITE8_MEMBER(supertnk_state::supertnk_videoram_w) +WRITE8_MEMBER(supertnk_state::videoram_w) { if (m_bitplane_select > 2) { @@ -232,7 +246,7 @@ WRITE8_MEMBER(supertnk_state::supertnk_videoram_w) } -READ8_MEMBER(supertnk_state::supertnk_videoram_r) +READ8_MEMBER(supertnk_state::videoram_r) { uint8_t ret = 0x00; @@ -243,19 +257,19 @@ READ8_MEMBER(supertnk_state::supertnk_videoram_r) } -WRITE8_MEMBER(supertnk_state::supertnk_bitplane_select_0_w) +WRITE_LINE_MEMBER(supertnk_state::bitplane_select_0_w) { - m_bitplane_select = (m_bitplane_select & 0x02) | ((data << 0) & 0x01); + m_bitplane_select = (m_bitplane_select & 0x02) | (state ? 0x01 : 0x00); } -WRITE8_MEMBER(supertnk_state::supertnk_bitplane_select_1_w) +WRITE_LINE_MEMBER(supertnk_state::bitplane_select_1_w) { - m_bitplane_select = (m_bitplane_select & 0x01) | ((data << 1) & 0x02); + m_bitplane_select = (m_bitplane_select & 0x01) | (state ? 0x02 : 0x00); } -uint32_t supertnk_state::screen_update_supertnk(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +uint32_t supertnk_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { offs_t offs; @@ -296,12 +310,6 @@ uint32_t supertnk_state::screen_update_supertnk(screen_device &screen, bitmap_rg void supertnk_state::machine_reset() { - address_space &space = m_maincpu->space(AS_PROGRAM); - supertnk_bankswitch_0_w(space, 0, 0); - supertnk_bankswitch_1_w(space, 0, 0); - - supertnk_bitplane_select_0_w(space, 0, 0); - supertnk_bitplane_select_1_w(space, 0, 0); } @@ -322,7 +330,7 @@ void supertnk_state::supertnk_map(address_map &map) map(0x1efe, 0x1eff).w("aysnd", FUNC(ay8910_device::address_data_w)); map(0x1efe, 0x1efe).portr("DSW"); map(0x1eff, 0x1eff).portr("UNK"); - map(0x2000, 0x3fff).rw(FUNC(supertnk_state::supertnk_videoram_r), FUNC(supertnk_state::supertnk_videoram_w)); + map(0x2000, 0x3fff).rw(FUNC(supertnk_state::videoram_r), FUNC(supertnk_state::videoram_w)); } @@ -336,12 +344,8 @@ void supertnk_state::supertnk_map(address_map &map) void supertnk_state::supertnk_io_map(address_map &map) { map(0x0000, 0x0000).nopw(); - map(0x0400, 0x0400).w(FUNC(supertnk_state::supertnk_bitplane_select_0_w)); - map(0x0401, 0x0401).w(FUNC(supertnk_state::supertnk_bitplane_select_1_w)); - map(0x0402, 0x0402).w(FUNC(supertnk_state::supertnk_bankswitch_0_w)); - map(0x0404, 0x0404).w(FUNC(supertnk_state::supertnk_bankswitch_1_w)); - map(0x0406, 0x0406).w(FUNC(supertnk_state::supertnk_interrupt_ack_w)); - map(0x0407, 0x0407).w("watchdog", FUNC(watchdog_timer_device::reset_w)); + map(0x0400, 0x0407).w("outlatch", FUNC(ls259_device::write_d0)); + map(0x0406, 0x0406).w(FUNC(supertnk_state::interrupt_ack_w)); } @@ -436,12 +440,19 @@ INPUT_PORTS_END MACHINE_CONFIG_START(supertnk_state::supertnk) // CPU TMS9980A; no line connections - TMS9980A(config, m_maincpu, 2598750); + TMS9980A(config, m_maincpu, 20.79_MHz_XTAL / 2); // divider not verified (possibly should be /3) m_maincpu->set_addrmap(AS_PROGRAM, &supertnk_state::supertnk_map); m_maincpu->set_addrmap(AS_IO, &supertnk_state::supertnk_io_map); - m_maincpu->set_vblank_int("screen", FUNC(supertnk_state::supertnk_interrupt)); - WATCHDOG_TIMER(config, "watchdog"); + ls259_device &outlatch(LS259(config, "outlatch")); // on CPU board near 2114 SRAM + outlatch.q_out_cb<0>().set(FUNC(supertnk_state::bitplane_select_0_w)); + outlatch.q_out_cb<1>().set(FUNC(supertnk_state::bitplane_select_1_w)); + outlatch.q_out_cb<2>().set(FUNC(supertnk_state::bankswitch_0_w)); + outlatch.q_out_cb<4>().set(FUNC(supertnk_state::bankswitch_1_w)); + //outlatch.q_out_cb<6>().set(FUNC(supertnk_state::interrupt_enable_w)); + outlatch.q_out_cb<7>().set(FUNC(supertnk_state::watchdog_enable_w)); + + WATCHDOG_TIMER(config, m_watchdog); /* video hardware */ @@ -450,7 +461,8 @@ MACHINE_CONFIG_START(supertnk_state::supertnk) MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 32*8-1) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) - MCFG_SCREEN_UPDATE_DRIVER(supertnk_state, screen_update_supertnk) + MCFG_SCREEN_UPDATE_DRIVER(supertnk_state, screen_update) + MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, supertnk_state, vblank_interrupt)) /* audio hardware */ SPEAKER(config, "mono").front_center(); diff --git a/src/mame/drivers/suprnova.cpp b/src/mame/drivers/suprnova.cpp index f535f7d97e9..30642ef142d 100644 --- a/src/mame/drivers/suprnova.cpp +++ b/src/mame/drivers/suprnova.cpp @@ -1140,7 +1140,35 @@ ROM_START( cyvernj ) ROM_LOAD( "cv300-00.u4", 0x000000, 0x400000, CRC(fbeda465) SHA1(4d5066a22f4589b6b7f85b3e77c348d900ac4bdd) ) ROM_END -ROM_START( galpani4 ) +ROM_START( galpani4 ) // only main CPU and plds dumps were provided + SKNS_EUROPE + + ROM_REGION32_BE( 0x200000, "user1", 0 ) /* SH-2 Code mapped at 0x04000000 */ + ROM_LOAD16_BYTE( "gp4-000-e0.u10", 0x000000, 0x080000, CRC(7464cc28) SHA1(4ea6185b62d3e25efdaafb91397b51bc8f12fdee) ) // Hitachi HN27C4001G-10 + ROM_LOAD16_BYTE( "gp4-001-e0.u8", 0x000001, 0x080000, CRC(8d162069) SHA1(1bd0181a9c9f37c8e8c9d6f75f045d76dffcd903) ) // Hitachi HN27C4001G-10 + + ROM_REGION( 0x400000, "spritegen", 0 ) + ROM_LOAD( "gp4-100-00.u24", 0x000000, 0x200000, CRC(1df61f01) SHA1(a9e95bbb3013e8f2fd01243b1b392ff07b4f7d02) ) + ROM_LOAD( "gp4-101-00.u20", 0x200000, 0x100000, CRC(8e2c9349) SHA1(a58fa9bcc9684ed4558e3395d592b64a1978a902) ) + + ROM_REGION( 0x400000, "gfx2", 0 ) + ROM_LOAD( "gp4-200-00.u16", 0x000000, 0x200000, CRC(f0781376) SHA1(aeab9553a9af922524e528eb2d019cf36b6e2094) ) + ROM_LOAD( "gp4-201-00.u18", 0x200000, 0x200000, CRC(10c4b183) SHA1(80e05f3932495ad4fc9bf928fa66e6d2931bbb06) ) + + ROM_REGION( 0x800000, "gfx3", ROMREGION_ERASE00 ) /* Tiles Plane B */ + /* First 0x040000 bytes (0x03ff Tiles) are RAM Based Tiles */ + /* 0x040000 - 0x3fffff empty? */ + + ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */ + ROM_LOAD( "gp4-300-00.u4", 0x000000, 0x200000, CRC(8374663a) SHA1(095512564f4de25dc3752d9fbd254b9dabd16d1b) ) /* Doesn't seem to use these samples at all */ + ROM_LOAD( "gp4-301-00.u7", 0x200000, 0x200000, NO_DUMP ) /* Different then GP4-301-01 - Changed some samples when compared to U4 rom */ + + ROM_REGION( 0x400, "plds", 0 ) + ROM_LOAD( "skns-r09.u9", 0x000, 0x117, CRC(b02058d9) SHA1(77d07e0f329fb1969aa4543cd124e36ad34b07ba) ) // Atmel ATF16V8B + ROM_LOAD( "skns-r11.u11", 0x200, 0x117, CRC(a9f05af4) SHA1(018684c1f9f7c2e1c86f0cb2db2ec7fb02e35cd8) ) // Atmel ATF16V8B +ROM_END + +ROM_START( galpani4j ) SKNS_JAPAN ROM_REGION32_BE( 0x200000, "user1", 0 ) /* SH-2 Code mapped at 0x04000000 */ @@ -1892,9 +1920,10 @@ ROM_END GAME( 1996, skns, 0, skns, skns, skns_state, empty_init, ROT0, "Kaneko", "Super Kaneko Nova System BIOS", MACHINE_IS_BIOS_ROOT ) -GAME( 1996, galpani4, skns, sknsj, cyvern, skns_state, init_galpani4, ROT0, "Kaneko", "Gals Panic 4 (Japan)", MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1996, galpani4k, galpani4, sknsk, cyvern, skns_state, init_galpani4, ROT0, "Kaneko", "Gals Panic 4 (Korea)", MACHINE_IMPERFECT_GRAPHICS ) -GAME( 2001, galpanidx, galpani4, sknsa, cyvern, skns_state, init_galpani4, ROT0, "Kaneko", "Gals Panic DX (Asia)", MACHINE_IMPERFECT_GRAPHICS ) // copyright 2001, re-release for the Asian market? +GAME( 1996, galpani4, skns, sknse, cyvern, skns_state, init_galpani4, ROT0, "Kaneko", "Gals Panic 4 (Europe)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_SOUND ) // 2nd sound ROM wasn't dumped, it's different than GP4-301-01 +GAME( 1996, galpani4j, galpani4, sknsj, cyvern, skns_state, init_galpani4, ROT0, "Kaneko", "Gals Panic 4 (Japan)", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1996, galpani4k, galpani4, sknsk, cyvern, skns_state, init_galpani4, ROT0, "Kaneko", "Gals Panic 4 (Korea)", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2001, galpanidx, galpani4, sknsa, cyvern, skns_state, init_galpani4, ROT0, "Kaneko", "Gals Panic DX (Asia)", MACHINE_IMPERFECT_GRAPHICS ) // copyright 2001, re-release for the Asian market? // there is a Gals Panic 4 version with 'Gals Panic SU' title as well, seen for sale in Korea (different to the Gals Panic SU clone of galpans2) GAME( 1996, jjparads, skns, sknsj, skns_1p, skns_state, init_jjparads, ROT0, "Electro Design", "Jan Jan Paradise", MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/drivers/sys9002.cpp b/src/mame/drivers/sys9002.cpp index 70c16c2e744..ce93ab675a7 100644 --- a/src/mame/drivers/sys9002.cpp +++ b/src/mame/drivers/sys9002.cpp @@ -66,11 +66,9 @@ void sys9002_state::sys9002_io(address_map &map) map.global_mask(0xff); //AM_RANGE(0x04, 0x04) AM_DEVREADWRITE("crtc", mc6845_device, status_r, address_w) // left commented out as mame freezes after about 2 seconds //AM_RANGE(0x05, 0x05) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w) - map(0x08, 0x08).rw("uart1", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x09, 0x09).rw("uart1", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); // 7 bits even parity, x64 + map(0x08, 0x09).rw("uart1", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x11, 0x11).nopr(); // continuous read - map(0x1c, 0x1c).rw("uart2", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x1d, 0x1d).rw("uart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); // enabled for transmit only, 8 bits odd parity, x64 + map(0x1c, 0x1d).rw("uart2", FUNC(i8251_device::read), FUNC(i8251_device::write)); } /* Input ports */ @@ -151,7 +149,7 @@ MACHINE_CONFIG_START(sys9002_state::sys9002) uart_clock.signal_handler().append("uart2", FUNC(i8251_device::write_txc)); uart_clock.signal_handler().append("uart2", FUNC(i8251_device::write_rxc)); - i8251_device &uart1(I8251(config, "uart1", 0)); + i8251_device &uart1(I8251(config, "uart1", 0)); // 7 bits even parity, x64 uart1.txd_handler().set("rs232a", FUNC(rs232_port_device::write_txd)); uart1.dtr_handler().set("rs232a", FUNC(rs232_port_device::write_dtr)); uart1.rts_handler().set("rs232a", FUNC(rs232_port_device::write_rts)); @@ -162,7 +160,7 @@ MACHINE_CONFIG_START(sys9002_state::sys9002) MCFG_RS232_CTS_HANDLER(WRITELINE("uart1", i8251_device, write_cts)) MCFG_SLOT_OPTION_DEVICE_INPUT_DEFAULTS("terminal", uart1) - i8251_device &uart2(I8251(config, "uart2", 0)); + i8251_device &uart2(I8251(config, "uart2", 0)); // enabled for transmit only, 8 bits odd parity, x64 uart2.txd_handler().set("rs232b", FUNC(rs232_port_device::write_txd)); uart2.dtr_handler().set("rs232b", FUNC(rs232_port_device::write_dtr)); uart2.rts_handler().set("rs232b", FUNC(rs232_port_device::write_rts)); diff --git a/src/mame/drivers/system1.cpp b/src/mame/drivers/system1.cpp index 64f5320419e..da6a08c8d6a 100644 --- a/src/mame/drivers/system1.cpp +++ b/src/mame/drivers/system1.cpp @@ -4524,32 +4524,32 @@ ROM_START( wbdeluxe ) ROM_END -ROM_START( gardia ) - ROM_REGION( 0x20000, "maincpu", 0 ) - ROM_LOAD( "epr10255.1", 0x00000, 0x8000, CRC(89282a6b) SHA1(f19e345e5fae6a518276cc1bd09d1e2083672b25) ) /* encrypted */ - ROM_LOAD( "epr10254.2", 0x10000, 0x8000, CRC(2826b6d8) SHA1(de1faf33cca031b72052bf5244fcb0bd79d85659) ) - ROM_LOAD( "epr10253.3", 0x18000, 0x8000, CRC(7911260f) SHA1(44196f0a6c4c2b22a68609ddfc75be6a7877a69a) ) +ROM_START( gardia ) /* Factory conversion, Sega game ID# 834-6119-04 GARDIA (CVT) */ + ROM_REGION( 0x20000, "maincpu", 0 ) /* These 3 EPROMs located on a Sega 834-5764 daughter card with a 315-5134 PAL? */ + ROM_LOAD( "epr-10255.1", 0x00000, 0x8000, CRC(89282a6b) SHA1(f19e345e5fae6a518276cc1bd09d1e2083672b25) ) /* encrypted */ + ROM_LOAD( "epr-10254.2", 0x10000, 0x8000, CRC(2826b6d8) SHA1(de1faf33cca031b72052bf5244fcb0bd79d85659) ) + ROM_LOAD( "epr-10253.3", 0x18000, 0x8000, CRC(7911260f) SHA1(44196f0a6c4c2b22a68609ddfc75be6a7877a69a) ) ROM_REGION( 0x10000, "soundcpu", 0 ) - ROM_LOAD( "epr10243.120", 0x0000, 0x4000, CRC(87220660) SHA1(3f2bfc03e0f1053a4aa0ec5ebb0d573f2e20964c) ) + ROM_LOAD( "epr-10243.120", 0x0000, 0x4000, CRC(87220660) SHA1(3f2bfc03e0f1053a4aa0ec5ebb0d573f2e20964c) ) ROM_REGION( 0xc000, "tiles", 0 ) - ROM_LOAD( "epr10249.61", 0x0000, 0x4000, CRC(4e0ad0f2) SHA1(b76c155b674f3ad8938278d5dbb0452351c716a5) ) - ROM_LOAD( "epr10248.64", 0x4000, 0x4000, CRC(3515d124) SHA1(39b28a103d8bfe702a376ebd880d6060e3d1ab30) ) - ROM_LOAD( "epr10247.66", 0x8000, 0x4000, CRC(541e1555) SHA1(6660204c74a9f7e63b3ba08d99fb854aa863710e) ) + ROM_LOAD( "epr-10249.61", 0x0000, 0x4000, CRC(4e0ad0f2) SHA1(b76c155b674f3ad8938278d5dbb0452351c716a5) ) + ROM_LOAD( "epr-10248.64", 0x4000, 0x4000, CRC(3515d124) SHA1(39b28a103d8bfe702a376ebd880d6060e3d1ab30) ) + ROM_LOAD( "epr-10247.66", 0x8000, 0x4000, CRC(541e1555) SHA1(6660204c74a9f7e63b3ba08d99fb854aa863710e) ) ROM_REGION( 0x20000, "sprites", 0 ) - ROM_LOAD( "epr10234.117", 0x00000, 0x8000, CRC(8a6aed33) SHA1(044836885ace8294124b1be9b3a4828f772bb9ee) ) - ROM_LOAD( "epr10233.110", 0x08000, 0x8000, CRC(c52784d3) SHA1(b37d7f261be12616dbe11dfa375eaf6878e4a0f3) ) - ROM_LOAD( "epr10236.04", 0x10000, 0x8000, CRC(b35ab227) SHA1(616f6097afddffa9af89fe84d8b6df59c567c1e6) ) - ROM_LOAD( "epr10235.5", 0x18000, 0x8000, CRC(006a3151) SHA1(a575f9d5c026e6b18e990720ec7520b6b5ae94e3) ) + ROM_LOAD( "epr-10234.117", 0x00000, 0x8000, CRC(8a6aed33) SHA1(044836885ace8294124b1be9b3a4828f772bb9ee) ) + ROM_LOAD( "epr-10233.110", 0x08000, 0x8000, CRC(c52784d3) SHA1(b37d7f261be12616dbe11dfa375eaf6878e4a0f3) ) + ROM_LOAD( "epr-10236.04", 0x10000, 0x8000, CRC(b35ab227) SHA1(616f6097afddffa9af89fe84d8b6df59c567c1e6) ) + ROM_LOAD( "epr-10235.5", 0x18000, 0x8000, CRC(006a3151) SHA1(a575f9d5c026e6b18e990720ec7520b6b5ae94e3) ) - ROM_REGION( 0x0300, "palette", 0 ) + ROM_REGION( 0x0300, "palette", 0 ) /* BPROMs located on a Sega 834-5755 daughter card */ ROM_LOAD( "bprom.3", 0x0000, 0x0100, CRC(8eee0f72) SHA1(b5694c120f604a5f7cc95618a71ab16a1a6151ed) ) /* palette red component */ ROM_LOAD( "bprom.2", 0x0100, 0x0100, CRC(3e7babd7) SHA1(d4f8790db4dce75e27156a4c6de2dcef2baf6d76) ) /* palette green component */ ROM_LOAD( "bprom.1", 0x0200, 0x0100, CRC(371c44a6) SHA1(ac37458d1feb6566b09a795b20c21953d4ab109d) ) /* palette blue component */ - ROM_REGION( 0x0100, "proms", 0 ) + ROM_REGION( 0x0100, "proms", 0 ) /* BPROM located on a Sega 834-5755 daughter card */ ROM_LOAD( "pr5317.4", 0x0000, 0x0100, CRC(648350b8) SHA1(c7986aa9127ef5b50b845434cb4e81dff9861cd2) ) ROM_END @@ -5572,9 +5572,9 @@ GAME( 1984, flicky, 0, sys1piox_315_5051, flicky, system1_state, i GAME( 1984, flickya, flicky, sys1piox_315_5051, flicky, system1_state, init_bank00, ROT0, "Sega", "Flicky (128k Version, 315-5051, larger roms)", MACHINE_SUPPORTS_SAVE ) GAME( 1984, flickys2, flicky, sys1pio, flickys2, system1_state, init_bank00, ROT0, "Sega", "Flicky (128k Version, not encrypted)", MACHINE_SUPPORTS_SAVE ) GAME( 1984, thetogyu, bullfgt, sys1piox_315_5065, bullfgt, system1_state, init_bank00, ROT0, "Coreland / Sega", "The Togyu (315-5065, Japan)", MACHINE_SUPPORTS_SAVE ) -GAME( 1984, spatter, 0, sys1piosx_315_spat,spatter, system1_state, init_bank00, ROT0, "Sega", "Spatter (315-xxxx)", MACHINE_SUPPORTS_SAVE ) +GAME( 1984, spatter, 0, sys1piosx_315_spat,spatter, system1_state, init_bank00, ROT0, "Sega", "Spatter (315-5xxx)", MACHINE_SUPPORTS_SAVE ) GAME( 1984, spattera, spatter, sys1piosx_315_5099,spatter, system1_state, init_bank00, ROT0, "Sega", "Spatter (315-5099)", MACHINE_SUPPORTS_SAVE ) -GAME( 1984, ssanchan, spatter, sys1piosx_315_spat,spatter, system1_state, init_bank00, ROT0, "Sega", "Sanrin San Chan (Japan, 315-xxxx)", MACHINE_SUPPORTS_SAVE ) +GAME( 1984, ssanchan, spatter, sys1piosx_315_spat,spatter, system1_state, init_bank00, ROT0, "Sega", "Sanrin San Chan (Japan, 315-5xxx)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, pitfall2, 0, sys1piox_315_5093, pitfall2, system1_state, init_bank00, ROT0, "Sega", "Pitfall II (315-5093)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, pitfall2a, pitfall2, sys1piox_315_5093, pitfall2, system1_state, init_bank00, ROT0, "Sega", "Pitfall II (315-5093, Flicky Conversion)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, pitfall2u, pitfall2, sys1pio, pitfall2u, system1_state, init_bank00, ROT0, "Sega", "Pitfall II (not encrypted)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/system16.cpp b/src/mame/drivers/system16.cpp index c2125212c46..56f4753a7eb 100644 --- a/src/mame/drivers/system16.cpp +++ b/src/mame/drivers/system16.cpp @@ -3196,6 +3196,44 @@ ROM_START( altbeastbl ) ROM_LOAD( "2.bin", 0x10000, 0x10000, CRC(7c653d8b) SHA1(f74355e12322ac3e3da1b5fc14d81908f61d01e6) ) ROM_END +ROM_START( altbeastbl2 ) // mostly same as mutantwarr. Only program ROMs differ, while sprites ROM are double sized but same content + ROM_REGION( 0xc0000, "maincpu", 0 ) // 68000 code + ROM_LOAD16_BYTE( "al-3-4-27c010-a.ic2", 0x020000, 0x10000, CRC(2c41cb49) SHA1(1d666c94f679da93aea07bb8461da3331a1e75c6) ) + ROM_CONTINUE( 0x000000, 0x10000) + ROM_LOAD16_BYTE( "al-5-6-27c010-a.ic5", 0x020001, 0x10000, CRC(fda831c9) SHA1(d8afc89044f9a5661664889bc1052958446f8fd3) ) + ROM_CONTINUE( 0x000001, 0x10000) + + ROM_REGION( 0x60000, "gfx1", ROMREGION_INVERT ) // tiles + ROM_LOAD( "al-15-27512-b.ic54", 0x00000, 0x10000, CRC(a4967d10) SHA1(537b9ea604a38a919c111ece5dd3e55a5070d346) ) + ROM_LOAD( "al-16-27512-b.ic63", 0x10000, 0x10000, CRC(e091ae2c) SHA1(5a129f2445d13c321cb3ad0eff7ab8ea3f6ddf43) ) + ROM_LOAD( "al-17-27512-b.ic72", 0x20000, 0x10000, CRC(1a26cf3f) SHA1(3a488ee485db7b3f27d5ed6c6e7d263d4840bd6a) ) + ROM_LOAD( "al-18-27512-b.ic144", 0x30000, 0x10000, BAD_DUMP CRC(277ef086) SHA1(d7a5e944f5287aa15d14ff940d1aca8d1e649d26) ) // dumped empty, using the mutantwarr one as all the others match + ROM_LOAD( "al-19-27512-b.ic145", 0x40000, 0x10000, CRC(661225af) SHA1(115303efeb5676ab059600a48edf36b8a56f6c15) ) + ROM_LOAD( "al-20-27512-b.ic146", 0x50000, 0x10000, CRC(d7019da7) SHA1(682347a276e03a733608066ad911af1674a00ed9) ) + + ROM_REGION16_BE( 0x100000, "sprites", ROMREGION_ERASEFF ) // sprites + ROM_LOAD16_BYTE( "al-11-27c010-b.ic11", 0x000001, 0x020000, CRC(a01425cd) SHA1(72be5ec29e476601f9bf6aaedef9b73cedeb42f0) ) + ROM_LOAD16_BYTE( "al-7-27c010-b.ic12", 0x000000, 0x020000, CRC(d9e03363) SHA1(995a7c6a8f0c61468b57a3bb407461a2a3ae8adc) ) + ROM_LOAD16_BYTE( "al-12-27c010-b.ic24", 0x040001, 0x020000, CRC(17a9fc53) SHA1(85a9a605742ae5aab86db37189b9ee4d54c70e56) ) + ROM_LOAD16_BYTE( "al-8-27c010-b.ic25", 0x040000, 0x020000, CRC(e3f77c5e) SHA1(6b3cb7918ab0c7c97a51cc5ea19ced3374ff3914) ) + ROM_LOAD16_BYTE( "al-13-27c010-b.ic32", 0x080001, 0x020000, CRC(14dcc245) SHA1(1ca1b6e0f2b7bedad2a8ab70f52da8c54d40d3cf) ) + ROM_LOAD16_BYTE( "al-9-27c010-b.ic33", 0x080000, 0x020000, CRC(f9a60f06) SHA1(0cffcfdb02733feaa869198b7e668c58b47c321a) ) + ROM_LOAD16_BYTE( "al-14-27512-b.ic46", 0x0c0001, 0x010000, CRC(339987f7) SHA1(b5650f8bdbd44510e84686b20daf70bc4a564f28) ) + ROM_LOAD16_BYTE( "al-10-27512-b.ic47", 0x0c0000, 0x010000, CRC(4fe406aa) SHA1(7f068b81f35be4cc4785824ed524d28f201ff0a5) ) + + ROM_REGION( 0x50000, "soundcpu", 0 ) // sound CPU + ROM_LOAD( "al-1-27512-a.ic53", 0x00000, 0x10000, CRC(67e09da3) SHA1(1c57048b428027fb8fae531363930ac5fed961fe) ) + ROM_LOAD( "al-2-27512-a.ic54", 0x10000, 0x10000, CRC(7c653d8b) SHA1(f74355e12322ac3e3da1b5fc14d81908f61d01e6) ) + + ROM_REGION( 0x120, "proms", 0) // currently not used by the emulation + ROM_LOAD( "2-82s129-b.ic142", 0x000, 0x100, CRC(a7c22d96) SHA1(160deae8053b09c09328325246598b3518c7e20b) ) // same as dduxbl, fpointbj and other bootlegs + ROM_LOAD( "3-tbp18s030n-b.ic22", 0x100, 0x020, CRC(58bcf8bd) SHA1(e4d3d179b08c0f3424a6bec0f15058fb1b56f8d8) ) // same as dduxbl, fpointbj and other bootlegs + + ROM_REGION( 0x600, "plds", 0) // currently not used by the emulation + ROM_LOAD( "pal16l8anc.ic51", 0x000, 0x104, CRC(99a637cb) SHA1(ce26f18290b9fe563fd05a743473efbd2db59c39) ) + ROM_LOAD( "pal20l8a2.ic13", 0x200, 0x144, CRC(8563102a) SHA1(e5349a91a3c3e48ad9503259858531caba610d01) ) + ROM_LOAD( "gal16v8.ic10", 0x400, 0x117, CRC(ce1ab1e1) SHA1(dcfc0015d8595ee6cb6bb02c95655161a7f3b017) ) // same as dduxbl and fpointbj +ROM_END ROM_START( mutantwarr ) ROM_REGION( 0xc0000, "maincpu", 0 ) // 68000 code @@ -4051,6 +4089,7 @@ GAME( 1989, goldnaxeb2, goldnaxe, goldnaxeb2, goldnaxe, segas1x_bootleg_sta GAME( 1989, tturfbl, tturf, tturfbl, tturf, segas1x_bootleg_state, init_tturfbl, ROT0, "bootleg (Datsu)", "Tough Turf (Datsu bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1989, dduxbl, ddux, dduxbl, ddux, segas1x_bootleg_state, init_dduxbl, ROT0, "bootleg (Datsu)", "Dynamite Dux (Datsu bootleg)", MACHINE_NOT_WORKING ) GAME( 1988, altbeastbl, altbeast, altbeastbl, tetris, segas1x_bootleg_state, init_altbeastbl, ROT0, "bootleg (Datsu)", "Altered Beast (Datsu bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) +GAME( 1988, altbeastbl2, altbeast, altbeastbl, tetris, segas1x_bootleg_state, init_altbeastbl, ROT0, "bootleg", "Altered Beast (bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // broken sprites GAME( 1988, mutantwarr, altbeast, altbeastbl, tetris, segas1x_bootleg_state, init_altbeastbl, ROT0, "bootleg (Datsu)", "Mutant Warrior (Altered Beast - Datsu bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1989, eswatbl, eswat, eswatbl, eswat, segas1x_bootleg_state, init_eswatbl, ROT0, "bootleg", "E-Swat - Cyber Police (bootleg, set 1)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1989, eswatbl2, eswat, eswatbl2, eswat, segas1x_bootleg_state, init_eswatbl, ROT0, "bootleg", "E-Swat - Cyber Police (bootleg, set 2)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) diff --git a/src/mame/drivers/taito_f3.cpp b/src/mame/drivers/taito_f3.cpp index 85142f48d8e..9b795b12751 100644 --- a/src/mame/drivers/taito_f3.cpp +++ b/src/mame/drivers/taito_f3.cpp @@ -3804,6 +3804,43 @@ Notes: ROM_START( landmakr ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ + ROM_LOAD32_BYTE("e61-19.20", 0x000000, 0x80000, CRC(f92eccd0) SHA1(88e836390be1ca08c578080662d17007a9e0bcc3) ) + ROM_LOAD32_BYTE("e61-18.19", 0x000001, 0x80000, CRC(5a26c9e0) SHA1(e7f09722f6b7a459248c2c8ad0a2695365cc78dc) ) + ROM_LOAD32_BYTE("e61-17.18", 0x000002, 0x80000, CRC(710776a8) SHA1(669aa086e7a5faedd90407e558c01bf5f0869790) ) + ROM_LOAD32_BYTE("e61-16.17", 0x000003, 0x80000, CRC(b073cda9) SHA1(a8b713c3e17e431b5789a70d6f9b0e0a6b02624a) ) + + ROM_REGION(0x800000, "gfx1" , 0) /* Sprites */ + ROM_LOAD16_BYTE("e61-03.12",0x000000, 0x200000, CRC(e8abfc46) SHA1(fbde006f9822af3ed8debec525270d329981ea21) ) + ROM_LOAD16_BYTE("e61-02.08",0x000001, 0x200000, CRC(1dc4a164) SHA1(33b412d9653099aaff8ed5e62d1ba4fc30aa9058) ) + ROM_LOAD ("e61-01.04",0x600000, 0x200000, CRC(6cdd8311) SHA1(7810a5a81f3b5a730d2088c79b12fffd77659b5b) ) + ROM_FILL ( 0x400000, 0x200000, 0x00 ) + + ROM_REGION(0x800000, "gfx2" , 0) /* Tiles */ + ROM_LOAD16_BYTE("e61-09.47", 0x000000, 0x200000, CRC(6ba29987) SHA1(b63c12523e19da66b3ca07c3548ac81bf57b59a1) ) + ROM_LOAD16_BYTE("e61-08.45", 0x000001, 0x200000, CRC(76c98e14) SHA1(c021c325ab4ae410fa54e2eab61d34318867432b) ) + ROM_LOAD ("e61-07.43", 0x600000, 0x200000, CRC(4a57965d) SHA1(8e80788e0f47fb242da9af3aa19077dc0ec829b8) ) + ROM_FILL ( 0x400000, 0x200000, 0x00 ) + + ROM_REGION(0x180000, "taito_en:audiocpu", 0) /* 68000 sound CPU */ + ROM_LOAD16_BYTE("e61-14.32", 0x100000, 0x40000, CRC(18961bbb) SHA1(df054def35a49c0754356c15ec15336cbf28b063) ) + ROM_LOAD16_BYTE("e61-15.33", 0x100001, 0x40000, CRC(2c64557a) SHA1(768007162d5d2cbe650c735bc1af2c10ed13b046) ) + + ROM_REGION16_BE(0x1000000, "ensoniq.0" , ROMREGION_ERASE00 ) // V2: 4 banks + // empty + ROM_LOAD16_BYTE("e61-04.38", 0x400000, 0x200000, CRC(c27aec0c) SHA1(e95da2db07a20a53662ebd45c033966e8a22a15a) ) // C8 C9 CA CB + ROM_LOAD16_BYTE("e61-05.39", 0x800000, 0x200000, CRC(83920d9d) SHA1(019e39ae85d1129f6d3b8460c4b1bd925f868ee2) ) // CC CD CE CF + ROM_LOAD16_BYTE("e61-06.40", 0xc00000, 0x200000, CRC(2e717bfe) SHA1(1be54cd2ec65d8fd49a5c09b5d27791fd7a320d4) ) // D0 D1 D2 D3 + + ROM_REGION( 0x0a00, "plds", 0 ) + ROM_LOAD( "pal16l8a-d77-09.ic14", 0x0000, 0x0104, CRC(b371532b) SHA1(7f875f380e69d14326a036a09d2fda7554b73664) ) + ROM_LOAD( "pal16l8a-d77-10.ic28", 0x0200, 0x0104, CRC(42f59227) SHA1(1f0db7489b49c00603ea51d130c9dfc237545390) ) + ROM_LOAD( "palce16v8q-d77-11.ic37", 0x0400, 0x0117, CRC(eacc294e) SHA1(90679d523d90c1f8d2ecbd7b6fac2861f94cf107) ) + ROM_LOAD( "palce16v8q-d77-12.ic48", 0x0600, 0x0117, CRC(e9920cfe) SHA1(58b73fe65f118d57fdce56d781593fc70c797f1b) ) + ROM_LOAD( "palce16v8q-d77-15.ic21", 0x0800, 0x0117, NO_DUMP ) /* PAL is read protected */ +ROM_END + +ROM_START( landmakrj ) + ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ ROM_LOAD32_BYTE("e61-13.20", 0x000000, 0x80000, CRC(0af756a2) SHA1(2dadac6873f2491ee77703f07f00dde2aa909355) ) ROM_LOAD32_BYTE("e61-12.19", 0x000001, 0x80000, CRC(636b3df9) SHA1(78a5bf4977bb90d710942188ce5016f3df499feb) ) ROM_LOAD32_BYTE("e61-11.18", 0x000002, 0x80000, CRC(279a0ee4) SHA1(08380286737b33db76a79b27d0df5faba17dfb96) ) @@ -3821,25 +3858,30 @@ ROM_START( landmakr ) ROM_LOAD ("e61-07.43", 0x600000, 0x200000, CRC(4a57965d) SHA1(8e80788e0f47fb242da9af3aa19077dc0ec829b8) ) ROM_FILL ( 0x400000, 0x200000, 0x00 ) - - - ROM_REGION(0x140000, "taito_en:audiocpu", 0) /* 68000 sound CPU */ - ROM_LOAD16_BYTE("e61-14.32", 0x100000, 0x20000, CRC(b905f4a7) SHA1(613b954e3e129fd44b4ce64958f16e5636012d6e) ) - ROM_LOAD16_BYTE("e61-15.33", 0x100001, 0x20000, CRC(87909869) SHA1(7b90c23899a673966cac3352d375d17b83e66596) ) + ROM_REGION(0x180000, "taito_en:audiocpu", 0) /* 68000 sound CPU */ + ROM_LOAD16_BYTE("e61-14.32", 0x100000, 0x40000, CRC(18961bbb) SHA1(df054def35a49c0754356c15ec15336cbf28b063) ) + ROM_LOAD16_BYTE("e61-15.33", 0x100001, 0x40000, CRC(2c64557a) SHA1(768007162d5d2cbe650c735bc1af2c10ed13b046) ) ROM_REGION16_BE(0x1000000, "ensoniq.0" , ROMREGION_ERASE00 ) // V2: 4 banks // empty ROM_LOAD16_BYTE("e61-04.38", 0x400000, 0x200000, CRC(c27aec0c) SHA1(e95da2db07a20a53662ebd45c033966e8a22a15a) ) // C8 C9 CA CB ROM_LOAD16_BYTE("e61-05.39", 0x800000, 0x200000, CRC(83920d9d) SHA1(019e39ae85d1129f6d3b8460c4b1bd925f868ee2) ) // CC CD CE CF ROM_LOAD16_BYTE("e61-06.40", 0xc00000, 0x200000, CRC(2e717bfe) SHA1(1be54cd2ec65d8fd49a5c09b5d27791fd7a320d4) ) // D0 D1 D2 D3 + + ROM_REGION( 0x0a00, "plds", 0 ) + ROM_LOAD( "pal16l8a-d77-09.ic14", 0x0000, 0x0104, CRC(b371532b) SHA1(7f875f380e69d14326a036a09d2fda7554b73664) ) + ROM_LOAD( "pal16l8a-d77-10.ic28", 0x0200, 0x0104, CRC(42f59227) SHA1(1f0db7489b49c00603ea51d130c9dfc237545390) ) + ROM_LOAD( "palce16v8q-d77-11.ic37", 0x0400, 0x0117, CRC(eacc294e) SHA1(90679d523d90c1f8d2ecbd7b6fac2861f94cf107) ) + ROM_LOAD( "palce16v8q-d77-12.ic48", 0x0600, 0x0117, CRC(e9920cfe) SHA1(58b73fe65f118d57fdce56d781593fc70c797f1b) ) + ROM_LOAD( "palce16v8q-d77-15.ic21", 0x0800, 0x0117, NO_DUMP ) /* PAL is read protected */ ROM_END -ROM_START( landmakrp ) +ROM_START( landmakrp ) // First 3 roms match parent, mpro-0.63 has bytes 7FFFE & 7FFFF reversed compared to parent. ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ ROM_LOAD32_BYTE("mpro-3.60", 0x000000, 0x80000, CRC(f92eccd0) SHA1(88e836390be1ca08c578080662d17007a9e0bcc3) ) ROM_LOAD32_BYTE("mpro-2.61", 0x000001, 0x80000, CRC(5a26c9e0) SHA1(e7f09722f6b7a459248c2c8ad0a2695365cc78dc) ) ROM_LOAD32_BYTE("mpro-1.62", 0x000002, 0x80000, CRC(710776a8) SHA1(669aa086e7a5faedd90407e558c01bf5f0869790) ) - ROM_LOAD32_BYTE("mpro-0.63", 0x000003, 0x80000, CRC(bc71dd2f) SHA1(ec0d07f9729a53737975547066bd1221f78563c5) ) + ROM_LOAD32_BYTE("mpro-0.63", 0x000003, 0x80000, CRC(bc71dd2f) SHA1(ec0d07f9729a53737975547066bd1221f78563c5) ) // 7FFFE: 03 FF vs 7FFFE: FF 03 in parent ROM_REGION(0x800000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("obj0-0.8", 0x000000, 0x080000, CRC(4b862c1b) SHA1(ef46af27d0657b95f5f3bad13629f9119958fe78) ) @@ -3871,8 +3913,6 @@ ROM_START( landmakrp ) ROM_LOAD16_BYTE("scr1-5.14",0x700001, 0x080000, CRC(24aba128) SHA1(b03804c738d86bfafc1f8fb91f8e77e878d2dc83) ) ROM_FILL ( 0x400000, 0x200000, 0x00 ) - - ROM_REGION(0x180000, "taito_en:audiocpu", 0) /* 68000 sound CPU */ ROM_LOAD16_BYTE("spro-1.66", 0x100000, 0x40000, CRC(18961bbb) SHA1(df054def35a49c0754356c15ec15336cbf28b063) ) ROM_LOAD16_BYTE("spro-0.65", 0x100001, 0x40000, CRC(2c64557a) SHA1(768007162d5d2cbe650c735bc1af2c10ed13b046) ) @@ -4344,5 +4384,6 @@ GAME( 1997, pbobble4u,pbobble4, f3, f3, taito_f3_state, init_pbobble4, ROT0 GAME( 1997, popnpop, 0, f3, f3, taito_f3_state, init_popnpop, ROT0, "Taito Corporation", "Pop'n Pop (Ver 2.07O 1998/02/09)", 0 ) GAME( 1997, popnpopj, popnpop, f3, f3, taito_f3_state, init_popnpop, ROT0, "Taito Corporation", "Pop'n Pop (Ver 2.07J 1998/02/09)", 0 ) GAME( 1997, popnpopu, popnpop, f3, f3, taito_f3_state, init_popnpop, ROT0, "Taito Corporation", "Pop'n Pop (Ver 2.07A 1998/02/09)", 0 ) -GAME( 1998, landmakr, 0, f3, f3, taito_f3_state, init_landmakr, ROT0, "Taito Corporation", "Land Maker (Ver 2.01J 1998/06/01)", 0 ) -GAME( 1998, landmakrp,landmakr, f3, f3, taito_f3_state, init_landmkrp, ROT0, "Taito Corporation", "Land Maker (Ver 2.02O 1998/06/02, prototype)", 0 ) +GAME( 1998, landmakr, 0, f3, f3, taito_f3_state, init_landmakr, ROT0, "Taito Corporation", "Land Maker (Ver 2.02O 1998/06/02)", 0 ) +GAME( 1998, landmakrj,landmakr, f3, f3, taito_f3_state, init_landmakr, ROT0, "Taito Corporation", "Land Maker (Ver 2.01J 1998/06/01)", 0 ) +GAME( 1998, landmakrp,landmakr, f3, f3, taito_f3_state, init_landmkrp, ROT0, "Taito Corporation", "Land Maker (Ver 2.02O 1998/06/02, prototype)", 0 ) // proto or hack/bootleg? diff --git a/src/mame/drivers/taito_z.cpp b/src/mame/drivers/taito_z.cpp index fedcbba4d64..28af9ac056d 100644 --- a/src/mame/drivers/taito_z.cpp +++ b/src/mame/drivers/taito_z.cpp @@ -3230,9 +3230,9 @@ MACHINE_CONFIG_START(taitoz_state::contcirc) MCFG_DEVICE_ADD("tc0110pcr", TC0110PCR, 0, "palette") /* sound hardware */ - SPEAKER(config, "front", 0.0, 0.0, 1.0); - SPEAKER(config, "rear", 0.0, 0.0, -0.5); - SPEAKER(config, "subwoofer", 0.0, 0.0, 1.0); + SPEAKER(config, "front").front_center(); + SPEAKER(config, "rear").rear_center(); + SPEAKER(config, "subwoofer").subwoofer(); MCFG_DEVICE_ADD("ymsnd", YM2610, 16000000/2) MCFG_YM2610_IRQ_HANDLER(INPUTLINE("audiocpu", 0)) @@ -3304,9 +3304,9 @@ MACHINE_CONFIG_START(taitoz_state::chasehq) MCFG_DEVICE_ADD("tc0110pcr", TC0110PCR, 0, "palette") /* sound hardware */ - SPEAKER(config, "front", 0.0, 0.0, 1.0); - SPEAKER(config, "rear", 0.0, 0.0, -0.5); - SPEAKER(config, "subwoofer", 0.0, 0.0, 0.5); + SPEAKER(config, "front").front_center(); + SPEAKER(config, "rear").rear_center(); + SPEAKER(config, "subwoofer").subwoofer(); MCFG_DEVICE_ADD("ymsnd", YM2610, 16000000/2) MCFG_YM2610_IRQ_HANDLER(INPUTLINE("audiocpu", 0)) @@ -3620,9 +3620,9 @@ MACHINE_CONFIG_START(taitoz_state::nightstr) MCFG_DEVICE_ADD("tc0110pcr", TC0110PCR, 0, "palette") /* sound hardware */ - SPEAKER(config, "front", 0.0, 0.0, 1.0); - SPEAKER(config, "rear", 0.0, 0.0, -0.5); - SPEAKER(config, "subwoofer", 0.0, 0.0, 0.5); + SPEAKER(config, "front").front_center(); + SPEAKER(config, "rear").rear_center(); + SPEAKER(config, "subwoofer").subwoofer(); MCFG_DEVICE_ADD("ymsnd", YM2610, 16000000/2) MCFG_YM2610_IRQ_HANDLER(INPUTLINE("audiocpu", 0)) diff --git a/src/mame/drivers/taitogn.cpp b/src/mame/drivers/taitogn.cpp index ac8ce300943..b9077fd8ab0 100644 --- a/src/mame/drivers/taitogn.cpp +++ b/src/mame/drivers/taitogn.cpp @@ -381,11 +381,8 @@ public: void coh3002t_t1(machine_config &config); private: - DECLARE_WRITE_LINE_MEMBER(sio0_sck){ m_cat702[0]->write_clock(state); m_cat702[1]->write_clock(state); m_znmcu->write_clock(state); } - DECLARE_WRITE_LINE_MEMBER(sio0_txd){ m_cat702[0]->write_datain(state); m_cat702[1]->write_datain(state); } - DECLARE_WRITE_LINE_MEMBER(cat702_1_dataout){ m_cat702_dataout[0] = state; update_sio0_rxd(); } - DECLARE_WRITE_LINE_MEMBER(cat702_2_dataout){ m_cat702_dataout[1] = state; update_sio0_rxd(); } - DECLARE_WRITE_LINE_MEMBER(znmcu_dataout){ m_znmcu_dataout = state; update_sio0_rxd(); } + template<int Chip> DECLARE_WRITE_LINE_MEMBER(cat702_dataout) { m_cat702_dataout[Chip] = state; update_sio0_rxd(); } + DECLARE_WRITE_LINE_MEMBER(znmcu_dataout) { m_znmcu_dataout = state; update_sio0_rxd(); } void update_sio0_rxd() { m_sio0->write_rxd(m_cat702_dataout[0] && m_cat702_dataout[1] && m_znmcu_dataout); } DECLARE_READ8_MEMBER(control_r); DECLARE_WRITE8_MEMBER(control_w); @@ -692,27 +689,30 @@ void slot_ataflash(device_slot_interface &device) MACHINE_CONFIG_START(taitogn_state::coh3002t) /* basic machine hardware */ - MCFG_DEVICE_ADD( "maincpu", CXD8661R, XTAL(100'000'000) ) - MCFG_DEVICE_PROGRAM_MAP(taitogn_map) - - subdevice<ram_device>("maincpu:ram")->set_default_size("4M"); - - MCFG_DEVICE_MODIFY("maincpu:sio0") - MCFG_PSX_SIO_SCK_HANDLER(WRITELINE(*this, taitogn_state, sio0_sck)) - MCFG_PSX_SIO_TXD_HANDLER(WRITELINE(*this, taitogn_state, sio0_txd)) - - MCFG_DEVICE_ADD("cat702_1", CAT702, 0) - MCFG_CAT702_DATAOUT_HANDLER(WRITELINE(*this, taitogn_state, cat702_1_dataout)) - - MCFG_DEVICE_ADD("cat702_2", CAT702, 0) - MCFG_CAT702_DATAOUT_HANDLER(WRITELINE(*this, taitogn_state, cat702_2_dataout)) - - MCFG_DEVICE_ADD("znmcu", ZNMCU, 0) - MCFG_ZNMCU_DATAOUT_HANDLER(WRITELINE(*this, taitogn_state, znmcu_dataout)) - MCFG_ZNMCU_DSR_HANDLER(WRITELINE("maincpu:sio0", psxsio0_device, write_dsr)) - MCFG_ZNMCU_DSW_HANDLER(IOPORT("DSW")) - MCFG_ZNMCU_ANALOG1_HANDLER(IOPORT("ANALOG1")) - MCFG_ZNMCU_ANALOG2_HANDLER(IOPORT("ANALOG2")) + CXD8661R(config, m_maincpu, XTAL(100'000'000)); + m_maincpu->set_addrmap(AS_PROGRAM, &taitogn_state::taitogn_map); + + m_maincpu->subdevice<ram_device>("ram")->set_default_size("4M"); + + auto &sio0(*m_maincpu->subdevice<psxsio0_device>("sio0")); + sio0.sck_handler().set(m_cat702[0], FUNC(cat702_device::write_clock)); + sio0.sck_handler().append(m_cat702[1], FUNC(cat702_device::write_clock)); + sio0.sck_handler().append(m_znmcu, FUNC(znmcu_device::write_clock)); + sio0.txd_handler().set(m_cat702[0], FUNC(cat702_device::write_datain)); + sio0.txd_handler().append(m_cat702[1], FUNC(cat702_device::write_datain)); + + CAT702(config, m_cat702[0], 0); + m_cat702[0]->dataout_handler().set(FUNC(taitogn_state::cat702_dataout<0>)); + + CAT702(config, m_cat702[1], 0); + m_cat702[1]->dataout_handler().set(FUNC(taitogn_state::cat702_dataout<1>)); + + ZNMCU(config, m_znmcu, 0); + m_znmcu->dataout_handler().set(FUNC(taitogn_state::znmcu_dataout)); + m_znmcu->dsr_handler().set("maincpu:sio0", FUNC(psxsio0_device::write_dsr)); + m_znmcu->dsw_handler().set_ioport("DSW"); + m_znmcu->analog1_handler().set_ioport("ANALOG1"); + m_znmcu->analog2_handler().set_ioport("ANALOG2"); MCFG_DEVICE_ADD("at28c16", AT28C16, 0) MCFG_DEVICE_ADD("rf5c296", RF5C296, 0) diff --git a/src/mame/drivers/taitojc.cpp b/src/mame/drivers/taitojc.cpp index 5197bc9ef31..bc20523d409 100644 --- a/src/mame/drivers/taitojc.cpp +++ b/src/mame/drivers/taitojc.cpp @@ -1133,9 +1133,9 @@ MACHINE_CONFIG_START(taitojc_state::dendego) MCFG_SCREEN_UPDATE_DRIVER(taitojc_state, screen_update_dendego) /* sound hardware */ - SPEAKER(config, "subwoofer", 0.0, 0.0, 1.0); + SPEAKER(config, "vibration").subwoofer(); MCFG_DEVICE_ADD("oki", OKIM6295, 1056000, okim6295_device::PIN7_HIGH) // clock frequency & pin 7 not verified - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "subwoofer", 0.20) + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "vibration", 0.20) MACHINE_CONFIG_END diff --git a/src/mame/drivers/taitosj.cpp b/src/mame/drivers/taitosj.cpp index 69370b98ab5..16296444801 100644 --- a/src/mame/drivers/taitosj.cpp +++ b/src/mame/drivers/taitosj.cpp @@ -1851,12 +1851,12 @@ MACHINE_CONFIG_START(taitosj_state::mcu) MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_PROGRAM_MAP(taitosj_main_mcu_map) - MCFG_DEVICE_ADD("bmcu", TAITO_SJ_SECURITY_MCU, XTAL(3'000'000)) /* xtal is 3MHz, divided by 4 internally */ - MCFG_TAITO_SJ_SECURITY_MCU_INT_MODE(LATCH) - MCFG_TAITO_SJ_SECURITY_MCU_68READ_CB(READ8(*this, taitosj_state, mcu_mem_r)) - MCFG_TAITO_SJ_SECURITY_MCU_68WRITE_CB(WRITE8(*this, taitosj_state, mcu_mem_w)) - MCFG_TAITO_SJ_SECURITY_MCU_68INTRQ_CB(WRITELINE(*this, taitosj_state, mcu_intrq_w)) - MCFG_TAITO_SJ_SECURITY_MCU_BUSRQ_CB(WRITELINE(*this, taitosj_state, mcu_busrq_w)) + TAITO_SJ_SECURITY_MCU(config, m_mcu, XTAL(3'000'000)); /* xtal is 3MHz, divided by 4 internally */ + m_mcu->set_int_mode(taito_sj_security_mcu_device::int_mode::LATCH); + m_mcu->m68read_cb().set(FUNC(taitosj_state::mcu_mem_r)); + m_mcu->m68write_cb().set(FUNC(taitosj_state::mcu_mem_w)); + m_mcu->m68intrq_cb().set(FUNC(taitosj_state::mcu_intrq_w)); + m_mcu->busrq_cb().set(FUNC(taitosj_state::mcu_busrq_w)); MCFG_QUANTUM_TIME(attotime::from_hz(6000)) MACHINE_CONFIG_END diff --git a/src/mame/drivers/tandy2k.cpp b/src/mame/drivers/tandy2k.cpp index 8f3a0a9d414..1f6c268c532 100644 --- a/src/mame/drivers/tandy2k.cpp +++ b/src/mame/drivers/tandy2k.cpp @@ -321,7 +321,7 @@ void tandy2k_state::tandy2k_io(address_map &map) map(0x00000, 0x00000).mirror(0x8).rw(FUNC(tandy2k_state::enable_r), FUNC(tandy2k_state::enable_w)); map(0x00002, 0x00002).mirror(0x8).w(FUNC(tandy2k_state::dma_mux_w)); map(0x00004, 0x00004).mirror(0x8).rw(FUNC(tandy2k_state::fldtc_r), FUNC(tandy2k_state::fldtc_w)); - map(0x00010, 0x00013).mirror(0xc).rw(m_uart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)).umask16(0x00ff); + map(0x00010, 0x00013).mirror(0xc).rw(m_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0x00030, 0x00033).mirror(0xc).m(m_fdc, FUNC(i8272a_device::map)).umask16(0x00ff); map(0x00040, 0x00047).mirror(0x8).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff); map(0x00050, 0x00057).mirror(0x8).rw(m_i8255a, FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0x00ff); @@ -786,19 +786,19 @@ MACHINE_CONFIG_START(tandy2k_state::tandy2k) MCFG_PALETTE_ADD_MONOCHROME("palette") - MCFG_DEVICE_ADD(CRT9007_TAG, CRT9007, 16_MHz_XTAL * 28 / 20 / 8) - MCFG_DEVICE_ADDRESS_MAP(0, vpac_mem) - MCFG_CRT9007_CHARACTER_WIDTH(8) - MCFG_CRT9007_INT_CALLBACK(WRITELINE(I8259A_1_TAG, pic8259_device, ir1_w)) - MCFG_CRT9007_VS_CALLBACK(WRITELINE(CRT9021B_TAG, crt9021_device, vsync_w)) - MCFG_CRT9007_VLT_CALLBACK(WRITELINE(*this, tandy2k_state, vpac_vlt_w)) - MCFG_CRT9007_CURS_CALLBACK(WRITELINE(CRT9021B_TAG, crt9021_device, cursor_w)) - MCFG_CRT9007_DRB_CALLBACK(WRITELINE(*this, tandy2k_state, vpac_drb_w)) - MCFG_CRT9007_WBEN_CALLBACK(WRITELINE(*this, tandy2k_state, vpac_wben_w)) - MCFG_CRT9007_CBLANK_CALLBACK(WRITELINE(*this, tandy2k_state, vpac_cblank_w)) - MCFG_CRT9007_SLG_CALLBACK(WRITELINE(*this, tandy2k_state, vpac_slg_w)) - MCFG_CRT9007_SLD_CALLBACK(WRITELINE(*this, tandy2k_state, vpac_sld_w)) - MCFG_VIDEO_SET_SCREEN(SCREEN_TAG) + crt9007_device &vpac(CRT9007(config, CRT9007_TAG, 16_MHz_XTAL * 28 / 20 / 8)); + vpac.set_addrmap(0, &tandy2k_state::vpac_mem); + vpac.set_character_width(8); + vpac.int_callback().set(I8259A_1_TAG, FUNC(pic8259_device::ir1_w)); + vpac.vs_callback().set(CRT9021B_TAG, FUNC(crt9021_device::vsync_w)); + vpac.vlt_callback().set(FUNC(tandy2k_state::vpac_vlt_w)); + vpac.curs_callback().set(CRT9021B_TAG, FUNC(crt9021_device::cursor_w)); + vpac.drb_callback().set(FUNC(tandy2k_state::vpac_drb_w)); + vpac.wben_callback().set(FUNC(tandy2k_state::vpac_wben_w)); + vpac.cblank_callback().set(FUNC(tandy2k_state::vpac_cblank_w)); + vpac.slg_callback().set(FUNC(tandy2k_state::vpac_slg_w)); + vpac.sld_callback().set(FUNC(tandy2k_state::vpac_sld_w)); + vpac.set_screen(SCREEN_TAG); MCFG_DEVICE_ADD(CRT9212_0_TAG, CRT9212, 0) MCFG_CRT9212_WEN2_VCC() @@ -851,11 +851,11 @@ MACHINE_CONFIG_START(tandy2k_state::tandy2k) MCFG_DEVICE_ADD(I8259A_1_TAG, PIC8259, 0) MCFG_PIC8259_OUT_INT_CB(WRITELINE(I80186_TAG, i80186_cpu_device, int1_w)) - MCFG_I8272A_ADD(I8272A_TAG, true) - downcast<i8272a_device *>(device)->set_select_lines_connected(true); - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(I8259A_0_TAG, pic8259_device, ir4_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, tandy2k_state, fdc_drq_w)) - MCFG_UPD765_HDL_CALLBACK(WRITELINE(*this, tandy2k_state, fdc_hdl_w)) + I8272A(config, m_fdc, true); + m_fdc->set_select_lines_connected(true); + m_fdc->intrq_wr_callback().set(m_pic0, FUNC(pic8259_device::ir4_w)); + m_fdc->drq_wr_callback().set(FUNC(tandy2k_state::fdc_drq_w)); + m_fdc->hdl_wr_callback().set(FUNC(tandy2k_state::fdc_hdl_w)); MCFG_FLOPPY_DRIVE_ADD(I8272A_TAG ":0", tandy2k_floppies, "525qd", tandy2k_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD(I8272A_TAG ":1", tandy2k_floppies, "525qd", tandy2k_state::floppy_formats) diff --git a/src/mame/drivers/targeth.cpp b/src/mame/drivers/targeth.cpp index 8340003e560..34f8f08818a 100644 --- a/src/mame/drivers/targeth.cpp +++ b/src/mame/drivers/targeth.cpp @@ -6,7 +6,7 @@ Target Hits (c) 1994 Gaelco (Designed & Developed by Zigurat. Produced by Gaelco Driver by Manuel Abadia <emumanu+mame@gmail.com> -** NOTES: Merge with wrally.ccp??? Address map nearly identical & PCB +** NOTES: Merge with wrally.cpp??? Address map nearly identical & PCB is reworked to add connections for light guns and different RAM is the visible area correct? if it's larger than the startup @@ -74,19 +74,19 @@ DS5002FP Box contains: #include "speaker.h" -static const gfx_layout tilelayout16_0x080000 = +static const gfx_layout tilelayout = { 16,16, /* 16x16 tiles */ RGN_FRAC(1,4), /* number of tiles */ 4, /* bitplanes */ { RGN_FRAC(3,4), RGN_FRAC(2,4), RGN_FRAC(1,4), RGN_FRAC(0,4) }, /* plane offsets */ - { 0,1,2,3,4,5,6,7, 16*8+0,16*8+1,16*8+2,16*8+3,16*8+4,16*8+5,16*8+6,16*8+7 }, - { 0*8,1*8,2*8,3*8,4*8,5*8,6*8,7*8, 8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8 }, + { STEP8(0,1), STEP8(16*8,1) }, + { STEP16(0,8) }, 32*8 }; -static GFXDECODE_START( gfx_0x080000 ) - GFXDECODE_ENTRY( "gfx1", 0x000000, tilelayout16_0x080000, 0, 64 ) +static GFXDECODE_START( gfx_targeth ) + GFXDECODE_ENTRY( "gfx1", 0x000000, tilelayout, 0, 64 ) GFXDECODE_END TIMER_CALLBACK_MEMBER(targeth_state::gun1_irq) @@ -103,11 +103,9 @@ TIMER_CALLBACK_MEMBER(targeth_state::gun2_irq) m_gun_irq_timer[1]->adjust( m_screen->time_until_pos(160, 0 ) ); } -WRITE16_MEMBER(targeth_state::OKIM6295_bankswitch_w) +WRITE8_MEMBER(targeth_state::oki_bankswitch_w) { - if (ACCESSING_BITS_0_7){ - membank("okibank")->set_entry(data & 0x0f); - } + m_okibank->set_entry(data & 0x0f); } WRITE16_MEMBER(targeth_state::output_latch_w) @@ -147,7 +145,6 @@ void targeth_state::main_map(address_map &map) { map(0x000000, 0x0fffff).rom(); map(0x100000, 0x103fff).ram().w(FUNC(targeth_state::vram_w)).share("videoram"); /* Video RAM */ - map(0x108000, 0x108007).writeonly().share("vregs"); /* Video Registers */ map(0x108000, 0x108001).portr("GUNX1"); map(0x108002, 0x108003).portr("GUNY1"); map(0x108004, 0x108005).portr("GUNX2"); @@ -161,7 +158,7 @@ void targeth_state::main_map(address_map &map) map(0x700006, 0x700007).portr("SYSTEM"); /* Coins, Start & Fire buttons */ map(0x700008, 0x700009).portr("SERVICE"); /* Service & Guns Reload? */ map(0x70000a, 0x70000b).select(0x000070).w(FUNC(targeth_state::output_latch_w)); - map(0x70000c, 0x70000d).w(FUNC(targeth_state::OKIM6295_bankswitch_w)); /* OKI6295 bankswitch */ + map(0x70000d, 0x70000d).w(FUNC(targeth_state::oki_bankswitch_w)); /* OKI6295 bankswitch */ map(0x70000f, 0x70000f).rw("oki", FUNC(okim6295_device::read), FUNC(okim6295_device::write)); /* OKI6295 status register */ map(0x700010, 0x700011).nopw(); /* ??? Guns reload related? */ map(0xfe0000, 0xfe7fff).ram(); /* Work RAM */ @@ -177,7 +174,7 @@ void targeth_state::oki_map(address_map &map) void targeth_state::machine_start() { - membank("okibank")->configure_entries(0, 16, memregion("oki")->base(), 0x10000); + m_okibank->configure_entries(0, 16, memregion("oki")->base(), 0x10000); m_gun_irq_timer[0] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(targeth_state::gun1_irq), this)); m_gun_irq_timer[1] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(targeth_state::gun2_irq), this)); @@ -294,7 +291,7 @@ MACHINE_CONFIG_START(targeth_state::targeth) MCFG_SCREEN_UPDATE_DRIVER(targeth_state, screen_update) MCFG_SCREEN_PALETTE("palette") - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_0x080000) + MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_targeth) MCFG_PALETTE_ADD("palette", 1024) MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR) diff --git a/src/mame/drivers/tecmo16.cpp b/src/mame/drivers/tecmo16.cpp index 969d7690f33..9e2682cd4b9 100644 --- a/src/mame/drivers/tecmo16.cpp +++ b/src/mame/drivers/tecmo16.cpp @@ -13,7 +13,11 @@ driver by Hau, Nicola Salmoria special thanks to Nekomata, NTD & code-name'Siberia' TODO: -- wrong background in fstarfrc title (Video ref. -> https://www.youtube.com/watch?v=EXBTNk-0ejk) +- wrong background in fstarfrc title + (Video ref. -> + https://www.youtube.com/watch?v=EXBTNk-0ejk, + https://www.youtube.com/watch?v=5iZtgWqUz6c, + https://www.youtube.com/watch?v=cgj81VA7j_Y) - there could be some priorities problems in riot (more noticeable in level 2) @@ -55,6 +59,7 @@ void tecmo16_state::fstarfrc_map(address_map &map) map(0x150030, 0x150031).portr("DSW2").nopw(); /* ??? */ map(0x150040, 0x150041).portr("DSW1"); map(0x150050, 0x150051).portr("P1_P2"); +// map(0x160000, 0x160001).nopr(); /* ??? Read at every scene changes */ map(0x160000, 0x160001).w(FUNC(tecmo16_state::scroll_char_x_w)); map(0x16000c, 0x16000d).w(FUNC(tecmo16_state::scroll_x_w)); map(0x160012, 0x160013).w(FUNC(tecmo16_state::scroll_y_w)); @@ -319,42 +324,29 @@ INPUT_PORTS_END static const gfx_layout charlayout = { 8,8, /* 8*8 characters */ - 4096, /* 4096 characters */ + RGN_FRAC(1,1), /* 4096 characters */ 4, /* 4 bits per pixel */ - { 0, 1, 2, 3 }, /* the bitplanes are packed in one nibble */ - { 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4 }, - { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 }, - 32*8 /* every char takes 32 consecutive bytes */ + { STEP4(0,1) }, /* the bitplanes are packed in one nibble */ + { STEP8(0,4) }, + { STEP8(0,4*8) }, + 4*8*8 /* every char takes 32 consecutive bytes */ }; static const gfx_layout tilelayout = { 16,16, /* 16*16 tiles */ - 8192, /* 8192 tiles */ + RGN_FRAC(1,1), /* 8192 tiles */ 4, /* 4 bits per pixel */ - { 0, 1, 2, 3 }, /* the bitplanes are packed in one nibble */ - { 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4, - 32*8+0*4, 32*8+1*4, 32*8+2*4, 32*8+3*4, 32*8+4*4, 32*8+5*4, 32*8+6*4, 32*8+7*4 }, - { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32, - 16*32, 17*32, 18*32, 19*32, 20*32, 21*32, 22*32, 23*32 }, - 128*8 /* every sprite takes 128 consecutive bytes */ -}; - -static const gfx_layout spritelayout = -{ - 8,8, /* 8*8 sprites */ - 32768, /* 32768 sprites */ - 4, /* 4 bits per pixel */ - { 0, 1, 2, 3 }, /* the bitplanes are packed in one nibble */ - { 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4 }, - { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 }, - 32*8 /* every sprite takes 32 consecutive bytes */ + { STEP4(0,1) }, /* the bitplanes are packed in one nibble */ + { STEP8(0,4), STEP8(4*8*8,4) }, + { STEP8(0,4*8), STEP8(4*8*8*2,4*8) }, + 4*8*8*2*2 /* every tile takes 128 consecutive bytes */ }; static GFXDECODE_START( gfx_tecmo16 ) - GFXDECODE_ENTRY( "gfx1", 0, charlayout, 1*16*16, 16 ) - GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 0x1000 ) - GFXDECODE_ENTRY( "gfx3", 0, spritelayout, 0, 0x1000 ) + GFXDECODE_ENTRY( "gfx1", 0, charlayout, 1*16*16, 16 ) + GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 0x100 ) + GFXDECODE_ENTRY( "gfx3", 0, charlayout, 0, 0x100 ) GFXDECODE_END /******************************************************************************/ @@ -375,12 +367,15 @@ MACHINE_CONFIG_START(tecmo16_state::fstarfrc) MCFG_QUANTUM_TIME(attotime::from_hz(600)) /* video hardware */ + BUFFERED_SPRITERAM16(config, m_spriteram); + MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) MCFG_SCREEN_SIZE(32*8, 32*8) MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1) MCFG_SCREEN_UPDATE_DRIVER(tecmo16_state, screen_update) + MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE("spriteram", buffered_spriteram16_device, vblank_copy_rising)) MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_tecmo16) MCFG_PALETTE_ADD_INIT_BLACK("palette", 4096) @@ -389,13 +384,13 @@ MACHINE_CONFIG_START(tecmo16_state::fstarfrc) MCFG_DEVICE_ADD("spritegen", TECMO_SPRITE, 0) MCFG_TECMO_SPRITE_GFX_REGION(2) - MCFG_DEVICE_ADD("mixer", TECMO_MIXER, 0) - MCFG_TECMO_MIXER_SHIFTS(10,9,4) - MCFG_TECMO_MIXER_BLENDCOLS( 0x0400 + 0x300, 0x0400 + 0x200, 0x0400 + 0x100, 0x0400 + 0x000 ) - MCFG_TECMO_MIXER_REGULARCOLS( 0x0000 + 0x300, 0x0000 + 0x200, 0x0000 + 0x100, 0x0000 + 0x000 ) - MCFG_TECMO_MIXER_BLENDSOURCE( 0x0800 + 0x000, 0x0800 + 0x100) // riot seems to set palettes in 0x800 + 0x200, could be more to this.. - MCFG_TECMO_MIXER_REVSPRITETILE - MCFG_TECMO_MIXER_BGPEN(0x000 + 0x300) + TECMO_MIXER(config, m_mixer, 0); + m_mixer->set_mixer_shifts(10,9,4); + m_mixer->set_blendcols( 0x0400 + 0x300, 0x0400 + 0x200, 0x0400 + 0x100, 0x0400 + 0x000 ); + m_mixer->set_regularcols( 0x0000 + 0x300, 0x0000 + 0x200, 0x0000 + 0x100, 0x0000 + 0x000 ); + m_mixer->set_blendsource( 0x0800 + 0x000, 0x0800 + 0x100); // riot seems to set palettes in 0x800 + 0x200, could be more to this.. + m_mixer->set_revspritetile(); + m_mixer->set_bgpen(0x000 + 0x300, 0x400 + 0x300); /* sound hardware */ SPEAKER(config, "lspeaker").front_left(); diff --git a/src/mame/drivers/tehkanwc.cpp b/src/mame/drivers/tehkanwc.cpp index c6de4959791..b593cb8323c 100644 --- a/src/mame/drivers/tehkanwc.cpp +++ b/src/mame/drivers/tehkanwc.cpp @@ -932,7 +932,7 @@ ROM_START( tehkanwch ) ROM_LOAD( "worldcup_5.bin", 0x0000, 0x4000, CRC(e3112be2) SHA1(7859e51b4312dc5df01c88e1d97cf608abc7ca72) ) // 27128 ROM_REGION( 0x04000, "gfx1", 0 ) /* fg tiles */ - ROM_LOAD( "worldcup_9.bin", 0x00000, 0x4000, CRC(79383e09) SHA1(cefc6483412bee9b01b210b690ed0335617b766c) ) // 27128 + ROM_LOAD( "worldcup_9.bin", 0x00000, 0x4000, CRC(a9e274f8) SHA1(02b46e1b149a856f0be74a23faaeb792935b66c7) ) // 27128 ROM_REGION( 0x10000, "gfx2", 0 ) /* sprites */ ROM_LOAD( "worldcup_7.bin", 0x00000, 0x8000, CRC(055a5264) SHA1(fe294ba57c2c858952e2fab0be1b8859730846cb) ) // 24256 diff --git a/src/mame/drivers/terminal.cpp b/src/mame/drivers/terminal.cpp index 5e5149469ba..e6d424f87c9 100644 --- a/src/mame/drivers/terminal.cpp +++ b/src/mame/drivers/terminal.cpp @@ -74,20 +74,6 @@ ROM_START( alcat7100 ) // Z80 // 256k ram // b&w // looks like it needs a boot ROM_END -ROM_START( facit4440 ) // Z80 (+HD46505SP, 2x Z80ADART // 16k ram // b&w - ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "rom7.bin", 0x0000, 0x4000, CRC(a8da2b11) SHA1(4436ef14c29ae299f7bc338748158771c02d02a9) ) - ROM_LOAD( "rom5.bin", 0xa000, 0x2000, CRC(715d02b6) SHA1(e304718dbdc8867ac01909fd2d027e5014a8c4f9) ) - - ROM_REGION( 0x8000, "chargen", 0 ) // order unknown - ROM_LOAD( "rom2.bin", 0x0000, 0x0800, CRC(9e1a190c) SHA1(fb08ee806f1056bcdfb5b08ea85995e1d3d01298) ) - ROM_LOAD( "rom1.bin", 0x0800, 0x1000, CRC(b503c173) SHA1(209bf59e2e9953179d04c4e768fc41574e039d36) ) - ROM_LOAD( "rom3.bin", 0x1800, 0x1000, CRC(a55a25d9) SHA1(c0d321e65f214adee01bf5f8c495b2518fa31b7b) ) - ROM_LOAD( "rom4.bin", 0x2800, 0x1000, CRC(52004ef8) SHA1(50d6e2eb48f60db3a3c9d206fc40d3294b6adc0e) ) - ROM_LOAD( "rom6.bin", 0x3800, 0x4000, CRC(790b7642) SHA1(688a80cbf011e5c14f501e11fe0e3bf64a85bbd7) ) -ROM_END - - ROM_START( itt9216 ) // MC68008P8, (+beeper, 701188-001, xtal 38.080)// 64k ram // colour ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "174054-007.u52", 0x0000, 0x2000, CRC(be1f85c8) SHA1(8c44ff6166c43b524f41133053fa82f5c48047d8) ) @@ -158,7 +144,6 @@ ROM_END /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ COMP( 1991, alcat258, 0, 0, terminal, terminal, terminal_state, empty_init, "Alcatel", "Terminatel 258", MACHINE_IS_SKELETON ) COMP( 1984, alcat7100, 0, 0, terminal, terminal, terminal_state, empty_init, "Alcatel", "Terminal 7100", MACHINE_IS_SKELETON ) -COMP( 1986, facit4440, 0, 0, terminal, terminal, terminal_state, empty_init, "Facit", "Terminal 4440 (30M-F1)", MACHINE_IS_SKELETON ) COMP( 1986, itt9216, 0, 0, terminal, terminal, terminal_state, empty_init, "ITT", "Courier 9216-X", MACHINE_IS_SKELETON ) COMP( 1992, loewed, 0, 0, terminal, terminal, terminal_state, empty_init, "Loewe", "Multitel D", MACHINE_IS_SKELETON ) COMP( 1988, loewe715, 0, 0, terminal, terminal, terminal_state, empty_init, "Loewe", "Multicom 715L", MACHINE_IS_SKELETON ) diff --git a/src/mame/drivers/ti990_4.cpp b/src/mame/drivers/ti990_4.cpp index f816bd3156c..1592b1ab93a 100644 --- a/src/mame/drivers/ti990_4.cpp +++ b/src/mame/drivers/ti990_4.cpp @@ -180,7 +180,7 @@ WRITE_LINE_MEMBER(ti990_4_state::asrkey_interrupt) WRITE8_MEMBER( ti990_4_state::external_operation ) { - static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; + static char const *const extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; switch (offset) { case IDLE_OP: diff --git a/src/mame/drivers/ti99_4p.cpp b/src/mame/drivers/ti99_4p.cpp index 19d3b1b8d98..00774139e37 100644 --- a/src/mame/drivers/ti99_4p.cpp +++ b/src/mame/drivers/ti99_4p.cpp @@ -940,7 +940,7 @@ READ8_MEMBER( ti99_4p_state::interrupt_level ) WRITE8_MEMBER( ti99_4p_state::external_operation ) { - static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; + static char const *const extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; if (offset != IDLE_OP) logerror("External operation %s not implemented on the SGCPU board\n", extop[offset]); } diff --git a/src/mame/drivers/ti99_4x.cpp b/src/mame/drivers/ti99_4x.cpp index 3de24ce20b4..2e0028ee537 100644 --- a/src/mame/drivers/ti99_4x.cpp +++ b/src/mame/drivers/ti99_4x.cpp @@ -442,7 +442,7 @@ WRITE8_MEMBER( ti99_4x_state::cruwrite ) WRITE8_MEMBER( ti99_4x_state::external_operation ) { - static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; + static char const *const extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; // Some games (e.g. Slymoids) actually use IDLE for synchronization if (offset == IDLE_OP) return; else diff --git a/src/mame/drivers/ti99_8.cpp b/src/mame/drivers/ti99_8.cpp index 7c40a137f28..619d54a3931 100644 --- a/src/mame/drivers/ti99_8.cpp +++ b/src/mame/drivers/ti99_8.cpp @@ -680,7 +680,7 @@ WRITE_LINE_MEMBER( ti99_8_state::notconnected ) WRITE8_MEMBER( ti99_8_state::external_operation ) { - static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; + static char const *const extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; if (offset == IDLE_OP) return; else LOGMASKED(LOG_WARN, "External operation %s not implemented on TI-99/8 board\n", extop[offset]); diff --git a/src/mame/drivers/tim011.cpp b/src/mame/drivers/tim011.cpp index cad70b3cab4..61d70ecccc7 100644 --- a/src/mame/drivers/tim011.cpp +++ b/src/mame/drivers/tim011.cpp @@ -140,8 +140,8 @@ MACHINE_CONFIG_START(tim011_state::tim011) // MCFG_DEVICE_ADD("keyboard",CDP1802, XTAL(1'750'000)) // CDP1802, unknown clock // FDC9266 location U43 XTAL(8'000'000) - MCFG_UPD765A_ADD(FDC9266_TAG, true, true) - MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE("maincpu", INPUT_LINE_IRQ2)) + UPD765A(config, m_fdc, true, true); + m_fdc->intrq_wr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ2); /* floppy drives */ MCFG_FLOPPY_DRIVE_ADD(FDC9266_TAG ":0", tim011_floppies, "35dd", tim011_floppy_formats) diff --git a/src/mame/drivers/tim100.cpp b/src/mame/drivers/tim100.cpp index de2e6397b74..f62678f26c3 100644 --- a/src/mame/drivers/tim100.cpp +++ b/src/mame/drivers/tim100.cpp @@ -59,10 +59,8 @@ void tim100_state::tim100_mem(address_map &map) map.unmap_value_high(); map(0x0000, 0x1fff).rom(); // 2764 at U16 map(0x2000, 0x27ff).ram().share("videoram"); // 2KB static ram CDM6116A at U15 - map(0x6000, 0x6000).rw("uart_u17", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x6001, 0x6001).rw("uart_u17", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x8000, 0x8000).rw("uart_u18", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x8001, 0x8001).rw("uart_u18", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x6000, 0x6001).rw("uart_u17", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x8000, 0x8001).rw("uart_u18", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0xa000, 0xa000).nopw(); // continuously writes 00 here map(0xc000, 0xc001).rw(m_crtc, FUNC(i8276_device::read), FUNC(i8276_device::write)); // i8276 } diff --git a/src/mame/drivers/timex.cpp b/src/mame/drivers/timex.cpp index e539b3cf705..0c962ef5511 100644 --- a/src/mame/drivers/timex.cpp +++ b/src/mame/drivers/timex.cpp @@ -583,6 +583,12 @@ void spectrum_state::tc2048_mem(address_map &map) map(0x4000, 0xffff).bankr("bank1").bankw("bank2"); } +void spectrum_state::init_timex() +{ + // setup expansion slot + m_exp->set_io_space(&m_maincpu->space(AS_IO)); +} + MACHINE_RESET_MEMBER(spectrum_state,tc2048) { uint8_t *messram = m_ram->pointer(); @@ -780,6 +786,6 @@ ROM_START(uk2086) ROM_END // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS -COMP( 1984, tc2048, spectrum, 0, tc2048, spectrum, spectrum_state, empty_init, "Timex of Portugal", "TC-2048" , 0 ) -COMP( 1983, ts2068, spectrum, 0, ts2068, spectrum, spectrum_state, empty_init, "Timex Sinclair", "TS-2068" , 0 ) -COMP( 1986, uk2086, spectrum, 0, uk2086, spectrum, spectrum_state, empty_init, "Unipolbrit", "UK-2086 ver. 1.2" , 0 ) +COMP( 1984, tc2048, spectrum, 0, tc2048, spectrum, spectrum_state, init_timex, "Timex of Portugal", "TC-2048" , 0 ) +COMP( 1983, ts2068, spectrum, 0, ts2068, spectrum, spectrum_state, init_timex, "Timex Sinclair", "TS-2068" , 0 ) +COMP( 1986, uk2086, spectrum, 0, uk2086, spectrum, spectrum_state, init_timex, "Unipolbrit", "UK-2086 ver. 1.2" , 0 ) diff --git a/src/mame/drivers/tk80bs.cpp b/src/mame/drivers/tk80bs.cpp index 578027f3be9..47cf0897071 100644 --- a/src/mame/drivers/tk80bs.cpp +++ b/src/mame/drivers/tk80bs.cpp @@ -88,11 +88,11 @@ READ8_MEMBER( tk80bs_state::ppi_custom_r ) switch(offset) { case 1: - return m_ppi->read(space, 2); + return m_ppi->read(2); case 2: - return m_ppi->read(space, 1); + return m_ppi->read(1); default: - return m_ppi->read(space, offset); + return m_ppi->read(offset); } } @@ -101,13 +101,13 @@ WRITE8_MEMBER( tk80bs_state::ppi_custom_w ) switch(offset) { case 1: - m_ppi->write(space, 2, data); + m_ppi->write(2, data); break; case 2: - m_ppi->write(space, 1, data); + m_ppi->write(1, data); break; default: - m_ppi->write(space, offset, data); + m_ppi->write(offset, data); } } diff --git a/src/mame/drivers/tm990189.cpp b/src/mame/drivers/tm990189.cpp index 8f5e56fa064..9be9ae43432 100644 --- a/src/mame/drivers/tm990189.cpp +++ b/src/mame/drivers/tm990189.cpp @@ -823,7 +823,7 @@ void tm990189_state::tm990_189_cru_map(address_map &map) MACHINE_CONFIG_START(tm990189_state::tm990_189) /* basic machine hardware */ - TMS9980A(config, m_tms9980a, 2000000); + TMS9980A(config, m_tms9980a, 8_MHz_XTAL); // clock divided by 4 internally m_tms9980a->set_addrmap(AS_PROGRAM, &tm990189_state::tm990_189_memmap); m_tms9980a->set_addrmap(AS_IO, &tm990189_state::tm990_189_cru_map); m_tms9980a->extop_cb().set(FUNC(tm990189_state::external_operation)); @@ -841,14 +841,14 @@ MACHINE_CONFIG_START(tm990189_state::tm990_189) /* Devices */ CASSETTE(config, "cassette", 0).add_route(ALL_OUTPUTS, "mono", 0.25); - TMS9901(config, m_tms9901_usr, 2000000); + TMS9901(config, m_tms9901_usr, 8_MHz_XTAL / 4); m_tms9901_usr->p_out_cb(0).set(FUNC(tm990189_state::usr9901_led0_w)); m_tms9901_usr->p_out_cb(1).set(FUNC(tm990189_state::usr9901_led1_w)); m_tms9901_usr->p_out_cb(2).set(FUNC(tm990189_state::usr9901_led2_w)); m_tms9901_usr->p_out_cb(3).set(FUNC(tm990189_state::usr9901_led3_w)); m_tms9901_usr->intlevel_cb().set(FUNC(tm990189_state::usr9901_interrupt_callback)); - TMS9901(config, m_tms9901_sys, 2000000); + TMS9901(config, m_tms9901_sys, 8_MHz_XTAL / 4); m_tms9901_sys->read_cb().set(FUNC(tm990189_state::sys9901_r)); m_tms9901_sys->p_out_cb(0).set(FUNC(tm990189_state::sys9901_digitsel0_w)); m_tms9901_sys->p_out_cb(1).set(FUNC(tm990189_state::sys9901_digitsel1_w)); @@ -868,7 +868,8 @@ MACHINE_CONFIG_START(tm990189_state::tm990_189) m_tms9901_sys->p_out_cb(15).set(FUNC(tm990189_state::sys9901_tapewdata_w)); m_tms9901_sys->intlevel_cb().set(FUNC(tm990189_state::sys9901_interrupt_callback)); - TMS9902(config, m_tms9902, 2000000).xmit_cb().set(FUNC(tm990189_state::xmit_callback)); // called when a character is transmitted + TMS9902(config, m_tms9902, 8_MHz_XTAL / 4); + m_tms9902->xmit_cb().set(FUNC(tm990189_state::xmit_callback)); // called when a character is transmitted TM990_189_RS232(config, "rs232", 0, m_tms9902); MCFG_TIMER_DRIVER_ADD_PERIODIC("display_timer", tm990189_state, display_callback, attotime::from_hz(30)) @@ -879,7 +880,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(tm990189_state::tm990_189_v) /* basic machine hardware */ - TMS9980A(config, m_tms9980a, 2000000); + TMS9980A(config, m_tms9980a, 8_MHz_XTAL); m_tms9980a->set_addrmap(AS_PROGRAM, &tm990189_state::tm990_189_v_memmap); m_tms9980a->set_addrmap(AS_IO, &tm990189_state::tm990_189_cru_map); m_tms9980a->extop_cb().set(FUNC(tm990189_state::external_operation)); @@ -902,14 +903,14 @@ MACHINE_CONFIG_START(tm990189_state::tm990_189_v) /* Devices */ CASSETTE(config, "cassette", 0).add_route(ALL_OUTPUTS, "mono", 0.25); - TMS9901(config, m_tms9901_usr, 2000000); + TMS9901(config, m_tms9901_usr, 8_MHz_XTAL / 4); m_tms9901_usr->p_out_cb(0).set(FUNC(tm990189_state::usr9901_led0_w)); m_tms9901_usr->p_out_cb(1).set(FUNC(tm990189_state::usr9901_led1_w)); m_tms9901_usr->p_out_cb(2).set(FUNC(tm990189_state::usr9901_led2_w)); m_tms9901_usr->p_out_cb(3).set(FUNC(tm990189_state::usr9901_led3_w)); m_tms9901_usr->intlevel_cb().set(FUNC(tm990189_state::usr9901_interrupt_callback)); - TMS9901(config, m_tms9901_sys, 2000000); + TMS9901(config, m_tms9901_sys, 8_MHz_XTAL / 4); m_tms9901_sys->read_cb().set(FUNC(tm990189_state::sys9901_r)); m_tms9901_sys->p_out_cb(0).set(FUNC(tm990189_state::sys9901_digitsel0_w)); m_tms9901_sys->p_out_cb(1).set(FUNC(tm990189_state::sys9901_digitsel1_w)); @@ -929,7 +930,8 @@ MACHINE_CONFIG_START(tm990189_state::tm990_189_v) m_tms9901_sys->p_out_cb(15).set(FUNC(tm990189_state::sys9901_tapewdata_w)); m_tms9901_sys->intlevel_cb().set(FUNC(tm990189_state::sys9901_interrupt_callback)); - TMS9902(config, m_tms9902, 2000000).xmit_cb().set(FUNC(tm990189_state::xmit_callback)); // called when a character is transmitted; + TMS9902(config, m_tms9902, 8_MHz_XTAL / 4); + m_tms9902->xmit_cb().set(FUNC(tm990189_state::xmit_callback)); // called when a character is transmitted; TM990_189_RS232(config, "rs232", 0, m_tms9902); MCFG_TIMER_DRIVER_ADD_PERIODIC("display_timer", tm990189_state, display_callback, attotime::from_hz(30)) diff --git a/src/mame/drivers/tmspoker.cpp b/src/mame/drivers/tmspoker.cpp index 21860f19207..86f777908d1 100644 --- a/src/mame/drivers/tmspoker.cpp +++ b/src/mame/drivers/tmspoker.cpp @@ -563,7 +563,7 @@ GFXDECODE_END MACHINE_CONFIG_START(tmspoker_state::tmspoker) // CPU TMS9980A; no line connections - TMS9980A(config, m_maincpu, MASTER_CLOCK/4); + TMS9980A(config, m_maincpu, MASTER_CLOCK); m_maincpu->set_addrmap(AS_PROGRAM, &tmspoker_state::tmspoker_map); m_maincpu->set_addrmap(AS_IO, &tmspoker_state::tmspoker_cru_map); m_maincpu->set_vblank_int("screen", FUNC(tmspoker_state::tmspoker_interrupt)); @@ -599,7 +599,7 @@ ROM_START( tmspoker ) ROM_LOAD( "0.bin", 0x0800, 0x0800, CRC(a20ae6cb) SHA1(d47780119b4ebb16dc759a50dfc880ddbc6a1112) ) /* Program 1 */ ROM_CONTINUE( 0x0000, 0x0800 ) ROM_LOAD( "8.bin", 0x1800, 0x0800, CRC(0c0a7159) SHA1(92cc3dc32a5bf4a7fa197e72c3931e583c96ef33) ) /* Program 2 */ - ROM_CONTINUE( 0x0800, 0x0800 ) + ROM_CONTINUE( 0x1000, 0x0800 ) ROM_REGION( 0x0800, "gfx1", 0 ) ROM_LOAD( "3.bin", 0x0000, 0x0800, CRC(55458dae) SHA1(bf96d1b287292ff89bc2dbd9451a88a2ab941f3e) ) diff --git a/src/mame/drivers/tnzs.cpp b/src/mame/drivers/tnzs.cpp index 38b8705da99..721e116a340 100644 --- a/src/mame/drivers/tnzs.cpp +++ b/src/mame/drivers/tnzs.cpp @@ -1603,12 +1603,13 @@ MACHINE_CONFIG_START(extrmatn_state::extrmatn) MCFG_PALETTE_INIT_OWNER(tnzs_base_state, prompalette) MACHINE_CONFIG_END -MACHINE_CONFIG_START(extrmatn_state::plumppop) +void extrmatn_state::plumppop(machine_config &config) +{ extrmatn(config); - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) - MCFG_UPD4701_PORTX("AN1") - MCFG_UPD4701_PORTY("AN2") -MACHINE_CONFIG_END + UPD4701A(config, m_upd4701); + m_upd4701->set_portx_tag("AN1"); + m_upd4701->set_porty_tag("AN2"); +} MACHINE_CONFIG_START(arknoid2_state::arknoid2) plumppop(config); @@ -1720,9 +1721,9 @@ MACHINE_CONFIG_START(jpopnics_state::jpopnics) MCFG_DEVICE_MODIFY("sub") MCFG_DEVICE_PROGRAM_MAP(jpopnics_sub_map) - MCFG_DEVICE_ADD("upd4701", UPD4701A, 0) - MCFG_UPD4701_PORTX("AN1") - MCFG_UPD4701_PORTY("AN2") + UPD4701A(config, m_upd4701); + m_upd4701->set_portx_tag("AN1"); + m_upd4701->set_porty_tag("AN2"); /* video hardware */ MCFG_PALETTE_MODIFY("palette") diff --git a/src/mame/drivers/toypop.cpp b/src/mame/drivers/toypop.cpp index 65c9cab4c9c..bb0df1deba2 100644 --- a/src/mame/drivers/toypop.cpp +++ b/src/mame/drivers/toypop.cpp @@ -123,9 +123,9 @@ private: bool m_slave_irq_enable; uint8_t m_pal_bank; - void legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect); - void legacy_fg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect); - void legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &cliprect); + void legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect,int flip); + void legacy_fg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect,int flip); + void legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &cliprect,int flip); }; PALETTE_INIT_MEMBER(namcos16_state, toypop) @@ -177,7 +177,7 @@ PALETTE_INIT_MEMBER(namcos16_state, toypop) } } -void namcos16_state::legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect) +void namcos16_state::legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect,int flip) { int x, y; const uint16_t pal_base = 0x300 + (m_pal_bank << 4); @@ -187,18 +187,32 @@ void namcos16_state::legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &clipre for (y = cliprect.min_y; y <= cliprect.max_y; ++y) { uint16_t *src = &m_bgvram[y * src_pitch + cliprect.min_x + src_base]; - uint16_t *dst = &bitmap.pix16(y, cliprect.min_x); + uint16_t *dst; + if(!flip) + dst = &bitmap.pix16(y, cliprect.min_x); + else + dst = &bitmap.pix16(cliprect.max_y - y, cliprect.max_x); for (x = cliprect.min_x; x <= cliprect.max_x; x += 2) { uint32_t srcpix = *src++; - *dst++ = m_palette->pen(((srcpix >> 8) & 0xf) + pal_base); - *dst++ = m_palette->pen((srcpix & 0xf) + pal_base); + int idx1 = ((srcpix >> 8) & 0xf) + pal_base; + int idx2 = (srcpix & 0xf) + pal_base; + if (!flip) + { + *dst++ = m_palette->pen(idx1); + *dst++ = m_palette->pen(idx2); + } + else + { + *dst-- = m_palette->pen(idx1); + *dst-- = m_palette->pen(idx2); + } } } } -void namcos16_state::legacy_fg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect) +void namcos16_state::legacy_fg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect,int flip) { gfx_element *gfx_0 = m_gfxdecode->gfx(0); int count; @@ -208,31 +222,52 @@ void namcos16_state::legacy_fg_draw(bitmap_ind16 &bitmap,const rectangle &clipre int x;// = (count % 32); int y; //= count / 32; - if(count < 64) - { - x = 34 + (count / 32); - y = (count % 32) - 2; - } - else if(count >= 32*30) + if (!flip) { - x = (count / 32) - 30; - y = (count % 32) - 2; + if(count < 64) + { + x = 34 + (count / 32); + y = (count % 32) - 2; + } + else if(count >= 32*30) + { + x = (count / 32) - 30; + y = (count % 32) - 2; + } + else + { + x = 2 + (count % 32); + y = (count / 32) - 2; + } } else { - x = 2 + (count % 32); - y = (count / 32) - 2; + if(count < 64) + { + x = 1 - (count / 32); + y = 29 - (count % 32); + } + else if(count >= 32*30) + { + x = 65 - (count / 32); + y = 29 - (count % 32); + } + else + { + x = 33 - (count % 32); + y = 29 - (count / 32); + } } uint16_t tile = m_fgvram[count]; uint8_t color = (m_fgattr[count] & 0x3f) + (m_pal_bank<<6); - gfx_0->transpen(bitmap,cliprect,tile,color,0,0,x*8,y*8,0); + gfx_0->transpen(bitmap,cliprect,tile,color,flip,flip,x*8,y*8,0); } } // TODO: this is likely to be a lot more complex, and maybe is per scanline too -void namcos16_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &cliprect) +void namcos16_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &cliprect,int flip) { gfx_element *gfx_1 = m_gfxdecode->gfx(1); int count; @@ -248,6 +283,11 @@ void namcos16_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &clipr if(enabled == false) continue; + static const int gfx_offs[2][2] = + { + { 0, 1 }, + { 2, 3 } + }; uint8_t tile = base_spriteram[count]; uint8_t color = base_spriteram[count+1]; int x = base_spriteram[count+bank1+1] + (base_spriteram[count+bank2+1] << 8); @@ -263,6 +303,12 @@ void namcos16_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &clipr uint8_t width = ((base_spriteram[count+bank2] & 4) >> 2) + 1; uint8_t height = ((base_spriteram[count+bank2] & 8) >> 3) + 1; + if (flip) + { + fx ^= 1; + fy ^= 1; + } + if(height == 2) y -=16; @@ -270,7 +316,7 @@ void namcos16_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &clipr { for(int xi=0;xi<width;xi++) { - uint16_t sprite_offs = tile + (xi ^ ((width - 1) & fx)) + yi * 2; + uint16_t sprite_offs = tile + gfx_offs[yi ^ ((height - 1) * fy)][xi ^ ((width - 1) * fx)]; gfx_1->transmask(bitmap,cliprect,sprite_offs,color,fx,fy,x + xi*16,y + yi *16,m_palette->transpen_mask(*gfx_1, color, 0xff)); } } @@ -279,9 +325,10 @@ void namcos16_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &clipr uint32_t namcos16_state::screen_update( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect ) { - legacy_bg_draw(bitmap,cliprect); - legacy_fg_draw(bitmap,cliprect); - legacy_obj_draw(bitmap,cliprect); + int flip = flip_screen(); + legacy_bg_draw(bitmap,cliprect,flip); + legacy_fg_draw(bitmap,cliprect,flip); + legacy_obj_draw(bitmap,cliprect,flip); return 0; } @@ -560,9 +607,9 @@ static INPUT_PORTS_START( toypop ) PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) ) PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWA:2") - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWA:2") + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_SERVICE_DIPLOC( 0x80, 0x80, "SWA:1" ) PORT_START("DSW2") /* 56XX #1 pins 30-33 and 38-41 */ @@ -782,5 +829,5 @@ ROM_START( toypop ) ROM_LOAD( "tp1-6.3d", 0x0000, 0x0100, CRC(16a9166a) SHA1(847cbaf7c88616576c410177e066ae1d792ac0ba) ) ROM_END -GAME( 1983, liblrabl, 0, liblrabl, liblrabl, namcos16_state, empty_init, ROT0, "Namco", "Libble Rabble", MACHINE_NO_COCKTAIL ) -GAME( 1986, toypop, 0, toypop, toypop, namcos16_state, empty_init, ROT0, "Namco", "Toypop", MACHINE_NO_COCKTAIL ) +GAME( 1983, liblrabl, 0, liblrabl, liblrabl, namcos16_state, empty_init, ROT0, "Namco", "Libble Rabble", 0 ) +GAME( 1986, toypop, 0, toypop, toypop, namcos16_state, empty_init, ROT180, "Namco", "Toypop", 0 ) diff --git a/src/mame/drivers/tr175.cpp b/src/mame/drivers/tr175.cpp index 88429cf2fef..a70aad110ff 100644 --- a/src/mame/drivers/tr175.cpp +++ b/src/mame/drivers/tr175.cpp @@ -106,9 +106,8 @@ void tr175_state::tr175(machine_config &config) duart.irq_cb().set_inputline("maincpu", M68K_IRQ_1); PALETTE(config, "palette", 0x100); - ramdac_device &ramdac(RAMDAC(config, "ramdac", 0)); + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, "palette")); ramdac.set_addrmap(0, &tr175_state::ramdac_map); - ramdac.set_palette("palette"); } diff --git a/src/mame/drivers/trs80.cpp b/src/mame/drivers/trs80.cpp index ad7bf3fae89..adcd9636b6a 100644 --- a/src/mame/drivers/trs80.cpp +++ b/src/mame/drivers/trs80.cpp @@ -264,8 +264,7 @@ void trs80_state::radionic_mem(address_map &map) { m1_mem(map); // Optional external RS232 module with 8251 - //map(0x3400, 0x3400).mirror(0xfe).rw("uart2", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - //map(0x3401, 0x3401).mirror(0xfe).rw("uart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + //map(0x3400, 0x3401).mirror(0xfe).rw("uart2", FUNC(i8251_device::read), FUNC(i8251_device::write)); // Internal colour controls (need details) //map(0x3500, 0x35ff).w(FUNC(trs80_state::colour_w)); // Internal interface to external slots diff --git a/src/mame/drivers/tsispch.cpp b/src/mame/drivers/tsispch.cpp index e6d8fc853bc..a6fe540acc3 100644 --- a/src/mame/drivers/tsispch.cpp +++ b/src/mame/drivers/tsispch.cpp @@ -309,8 +309,7 @@ void tsispch_state::i8086_mem(address_map &map) { map.unmap_value_high(); map(0x00000, 0x02FFF).mirror(0x34000).ram(); // verified; 6264*2 sram, only first 3/4 used - map(0x03000, 0x03000).mirror(0x341FC).rw("i8251a_u15", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x03002, 0x03002).mirror(0x341FC).rw("i8251a_u15", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x03000, 0x03003).mirror(0x341FC).rw("i8251a_u15", FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff); map(0x03200, 0x03203).mirror(0x341FC).rw(m_pic, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff); // AMD P8259 PIC @ U5 (reads as 04 and 7c, upper byte is open bus) map(0x03400, 0x03400).mirror(0x341FE).r(FUNC(tsispch_state::dsw_r)); // verified, read from dipswitch s4 map(0x03401, 0x03401).mirror(0x341FE).w(FUNC(tsispch_state::peripheral_w)); // verified, write to the 4 leds, plus 4 control bits diff --git a/src/mame/drivers/tumbleb.cpp b/src/mame/drivers/tumbleb.cpp index dd25424db1c..952ae90b9a7 100644 --- a/src/mame/drivers/tumbleb.cpp +++ b/src/mame/drivers/tumbleb.cpp @@ -2444,7 +2444,7 @@ ROM_START( tumbleb2 ) ROM_REGION( 0x100000, "sprgfx", 0 ) // in the 0.35 beta cycle this bootleg was added with the same sprite ROMs as the original, but a PCB was found with the following 27c208 ROMs ROM_LOAD16_BYTE( "wj-6", 0x00000, 0x40000, CRC(ee91db18) SHA1(06a2f15228a8233b685506077ed1248cd5fc3bb3) ) // map-01.rom [even] IDENTICAL - ROM_LOAD16_BYTE( "wj-7", 0x00001, 0x40000, CRC(87cffb06) SHA1(db3adbbf33cdbff72b6c5ee1228c760cc4897ad0) ) // map-01.rom [odd] IDENTICAL + ROM_LOAD16_BYTE( "wj-7", 0x00001, 0x40000, CRC(87cffb06) SHA1(db3adbbf33cdbff72b6c5ee1228c760cc4897ad0) ) // map-01.rom [odd] IDENTICAL ROM_LOAD16_BYTE( "wj-4", 0x80000, 0x40000, CRC(79a29725) SHA1(c47366dedaf821f452d8e5394d426f18a79d615e) ) // map-00.rom [even] IDENTICAL ROM_LOAD16_BYTE( "wj-5", 0x80001, 0x40000, CRC(dda8932e) SHA1(bd20806916cc5774a5cc70907d88c7ab4eb7ac14) ) // map-00.rom [odd] IDENTICAL //ROM_LOAD( "map-01.rom", 0x00000, 0x80000, CRC(e81ffa09) SHA1(01ada9557ead91eb76cf00db118d6c432104a398) ) diff --git a/src/mame/drivers/turbo.cpp b/src/mame/drivers/turbo.cpp index 6f63ea927f2..246085669a0 100644 --- a/src/mame/drivers/turbo.cpp +++ b/src/mame/drivers/turbo.cpp @@ -469,7 +469,7 @@ READ8_MEMBER(turbo_state::buckrog_port_3_r) TIMER_CALLBACK_MEMBER(turbo_state::delayed_i8255_w) { - m_i8255_0->write(m_maincpu->space(AS_PROGRAM), param >> 8, param & 0xff); + m_i8255_0->write(param >> 8, param & 0xff); } @@ -870,10 +870,10 @@ MACHINE_CONFIG_START(turbo_state::turbo) m_i8255_3->in_pb_callback().set_ioport("DSW2"); m_i8255_3->out_pc_callback().set(FUNC(turbo_state::turbo_ppi3c_w)); - i8279_device &kbdc(I8279(config, "i8279", MASTER_CLOCK/4)); // unknown clock - kbdc.out_sl_callback().set(FUNC(turbo_state::scanlines_w)); // scan SL lines - kbdc.out_disp_callback().set(FUNC(turbo_state::digit_w)); // display A&B - kbdc.in_rl_callback().set_ioport("DSW1"); // kbd RL lines + i8279_device &kbdc(I8279(config, "i8279", MASTER_CLOCK/4)); // unknown clock + kbdc.out_sl_callback().set(FUNC(turbo_state::scanlines_w)); // scan SL lines + kbdc.out_disp_callback().set(FUNC(turbo_state::digit_w)); // display A&B + kbdc.in_rl_callback().set_ioport("DSW1"); // kbd RL lines ls259_device &outlatch(LS259(config, "outlatch")); // IC125 - outputs passed through CN5 outlatch.q_out_cb<0>().set(FUNC(turbo_state::coin_meter_1_w)); @@ -915,10 +915,10 @@ MACHINE_CONFIG_START(turbo_state::subroc3d) m_i8255_1->out_pb_callback().set(FUNC(turbo_state::subroc3d_sound_b_w)); m_i8255_1->out_pc_callback().set(FUNC(turbo_state::subroc3d_sound_c_w)); - i8279_device &kbdc(I8279(config, "i8279", MASTER_CLOCK/4)); // unknown clock - kbdc.out_sl_callback().set(FUNC(turbo_state::scanlines_w)); // scan SL lines - kbdc.out_disp_callback().set(FUNC(turbo_state::digit_w)); // display A&B - kbdc.in_rl_callback().set_ioport("DSW1"); // kbd RL lines + i8279_device &kbdc(I8279(config, "i8279", MASTER_CLOCK/4)); // unknown clock + kbdc.out_sl_callback().set(FUNC(turbo_state::scanlines_w)); // scan SL lines + kbdc.out_disp_callback().set(FUNC(turbo_state::digit_w)); // display A&B + kbdc.in_rl_callback().set_ioport("DSW1"); // kbd RL lines /* video hardware */ MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_turbo) @@ -963,10 +963,10 @@ MACHINE_CONFIG_START(turbo_state::buckrog) m_i8255_1->out_pb_callback().set(FUNC(turbo_state::buckrog_sound_b_w)); m_i8255_1->out_pc_callback().set(FUNC(turbo_state::buckrog_ppi1c_w)); - i8279_device &kbdc(I8279(config, "i8279", MASTER_CLOCK/4)); // unknown clock - kbdc.out_sl_callback().set(FUNC(turbo_state::scanlines_w)); // scan SL lines - kbdc.out_disp_callback().set(FUNC(turbo_state::digit_w)); // display A&B - kbdc.in_rl_callback().set_ioport("DSW1"); // kbd RL lines + i8279_device &kbdc(I8279(config, "i8279", MASTER_CLOCK/4)); // unknown clock + kbdc.out_sl_callback().set(FUNC(turbo_state::scanlines_w)); // scan SL lines + kbdc.out_disp_callback().set(FUNC(turbo_state::digit_w)); // display A&B + kbdc.in_rl_callback().set_ioport("DSW1"); // kbd RL lines /* video hardware */ MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_turbo) diff --git a/src/mame/drivers/tv912.cpp b/src/mame/drivers/tv912.cpp index 637497d5f1a..6cd3045ef51 100644 --- a/src/mame/drivers/tv912.cpp +++ b/src/mame/drivers/tv912.cpp @@ -272,7 +272,7 @@ u32 tv912_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, cons return 0; } - u8 *dispram = static_cast<u8 *>(m_dispram_bank->base()); + const u8 *dispram = static_cast<u8 *>(m_dispram_bank->base()); ioport_value videoctrl = m_video_control->read(); rectangle curs; diff --git a/src/mame/drivers/tv990.cpp b/src/mame/drivers/tv990.cpp index 98f9b93e127..d6a89515dc4 100644 --- a/src/mame/drivers/tv990.cpp +++ b/src/mame/drivers/tv990.cpp @@ -42,8 +42,6 @@ #include "speaker.h" -#define UART0_TAG "ns16450_0" -#define UART1_TAG "ns16450_1" #define RS232A_TAG "rs232a" #define RS232B_TAG "rs232b" #define LPT_TAG "lpt" @@ -56,8 +54,7 @@ public: m_maincpu(*this, "maincpu"), m_vram(*this, "vram"), m_fontram(*this, "fontram"), - m_uart0(*this, UART0_TAG), - m_uart1(*this, UART1_TAG), + m_uart(*this, "ns16450_%u", 0U), m_screen(*this, "screen"), m_kbdc(*this, "pc_kbdc"), m_palette(*this, "palette"), @@ -73,7 +70,7 @@ private: required_device<m68000_device> m_maincpu; required_shared_ptr<uint16_t> m_vram; required_shared_ptr<uint16_t> m_fontram; - required_device<ns16450_device> m_uart0, m_uart1; + required_device_array<ns16450_device, 2> m_uart; required_device<screen_device> m_screen; required_device<kbdc8042_device> m_kbdc; required_device<palette_device> m_palette; @@ -94,8 +91,8 @@ private: DECLARE_WRITE_LINE_MEMBER(uart0_irq); DECLARE_WRITE_LINE_MEMBER(uart1_irq); DECLARE_WRITE_LINE_MEMBER(lpt_irq); + DECLARE_WRITE_LINE_MEMBER(vblank_irq); - INTERRUPT_GEN_MEMBER(vblank); void tv990_mem(address_map &map); uint16_t tvi1111_regs[(0x100/2)+2]; @@ -103,11 +100,14 @@ private: int m_rowh, m_width, m_height; }; -INTERRUPT_GEN_MEMBER(tv990_state::vblank) +WRITE_LINE_MEMBER(tv990_state::vblank_irq) { - m_rowtimer->adjust(m_screen->time_until_pos(m_rowh)); - m_maincpu->set_input_line(M68K_IRQ_6, ASSERT_LINE); - tvi1111_regs[0x1d] |= 4; + if (state) + { + m_rowtimer->adjust(m_screen->time_until_pos(m_rowh)); + m_maincpu->set_input_line(M68K_IRQ_6, ASSERT_LINE); + tvi1111_regs[0x1d] |= 4; + } } void tv990_state::machine_start() @@ -320,8 +320,8 @@ void tv990_state::tv990_mem(address_map &map) map(0x060000, 0x06ffff).ram().share("vram"); // character/attribute RAM map(0x080000, 0x087fff).ram().share("fontram"); // font RAM map(0x090000, 0x0900ff).rw(FUNC(tv990_state::tvi1111_r), FUNC(tv990_state::tvi1111_w)); - map(0x0a0000, 0x0a000f).rw(m_uart0, FUNC(ns16450_device::ins8250_r), FUNC(ns16450_device::ins8250_w)).umask16(0x00ff); - map(0x0a0010, 0x0a001f).rw(UART1_TAG, FUNC(ns16450_device::ins8250_r), FUNC(ns16450_device::ins8250_w)).umask16(0x00ff); + map(0x0a0000, 0x0a000f).rw(m_uart[0], FUNC(ns16450_device::ins8250_r), FUNC(ns16450_device::ins8250_w)).umask16(0x00ff); + map(0x0a0010, 0x0a001f).rw(m_uart[1], FUNC(ns16450_device::ins8250_r), FUNC(ns16450_device::ins8250_w)).umask16(0x00ff); map(0x0a0028, 0x0a002d).rw(LPT_TAG, FUNC(pc_lpt_device::read), FUNC(pc_lpt_device::write)).umask16(0x00ff); map(0x0b0000, 0x0b0003).rw(FUNC(tv990_state::kbdc_r), FUNC(tv990_state::kbdc_w)).umask16(0x00ff); map(0x0c0000, 0x0c7fff).ram().share("nvram");// work RAM @@ -374,43 +374,47 @@ void tv990_state::device_post_load() m_screen->set_visible_area(0, m_width * 16 - 1, 0, m_height * m_rowh - 1); } -MACHINE_CONFIG_START(tv990_state::tv990) +void tv990_state::tv990(machine_config &config) +{ /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", M68000, 14967500) // verified (59.86992/4) - MCFG_DEVICE_PROGRAM_MAP(tv990_mem) - MCFG_DEVICE_VBLANK_INT_DRIVER("screen", tv990_state, vblank) - - MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::green()) - MCFG_SCREEN_UPDATE_DRIVER(tv990_state, screen_update) - MCFG_SCREEN_SIZE(132*16, 50*16) - MCFG_SCREEN_VISIBLE_AREA(0, (80*16)-1, 0, (50*16)-1) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_PALETTE_ADD_MONOCHROME_HIGHLIGHT("palette") - - NS16450(config, m_uart0, XTAL(3'686'400)); - m_uart0->out_dtr_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_dtr)); - m_uart0->out_rts_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_rts)); - m_uart0->out_tx_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_txd)); - m_uart0->out_int_callback().set(FUNC(tv990_state::uart0_irq)); - - NS16450(config, m_uart1, XTAL(3'686'400)); - m_uart1->out_dtr_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_dtr)); - m_uart1->out_rts_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_rts)); - m_uart1->out_tx_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_txd)); - m_uart1->out_int_callback().set(FUNC(tv990_state::uart1_irq)); - - MCFG_DEVICE_ADD(LPT_TAG, PC_LPT, 0) - MCFG_PC_LPT_IRQ_HANDLER(WRITELINE(*this, tv990_state, lpt_irq)) - - MCFG_DEVICE_ADD(RS232A_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(UART0_TAG, ns16450_device, rx_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(UART0_TAG, ns16450_device, dcd_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(UART0_TAG, ns16450_device, cts_w)) - - MCFG_DEVICE_ADD(RS232B_TAG, RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE(UART1_TAG, ns16450_device, rx_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE(UART1_TAG, ns16450_device, dcd_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE(UART1_TAG, ns16450_device, cts_w)) + M68000(config, m_maincpu, 14967500); // verified (59.86992/4) + m_maincpu->set_addrmap(AS_PROGRAM, &tv990_state::tv990_mem); + + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_color(rgb_t::green()); + m_screen->set_screen_update(FUNC(tv990_state::screen_update)); + m_screen->set_size(132*16, 50*16); + m_screen->set_visarea(0, (80*16)-1, 0, (50*16)-1); + m_screen->set_refresh_hz(60); + m_screen->screen_vblank().set(FUNC(tv990_state::vblank_irq)); + + palette_device &palette(PALETTE(config, "palette", 3)); + palette.set_init("palette", FUNC(palette_device::palette_init_monochrome_highlight)); + + NS16450(config, m_uart[0], 3.6864_MHz_XTAL); + m_uart[0]->out_dtr_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_dtr)); + m_uart[0]->out_rts_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_rts)); + m_uart[0]->out_tx_callback().set(RS232A_TAG, FUNC(rs232_port_device::write_txd)); + m_uart[0]->out_int_callback().set(FUNC(tv990_state::uart0_irq)); + + NS16450(config, m_uart[1], 3.6864_MHz_XTAL); + m_uart[1]->out_dtr_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_dtr)); + m_uart[1]->out_rts_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_rts)); + m_uart[1]->out_tx_callback().set(RS232B_TAG, FUNC(rs232_port_device::write_txd)); + m_uart[1]->out_int_callback().set(FUNC(tv990_state::uart1_irq)); + + pc_lpt_device &lpt(PC_LPT(config, LPT_TAG)); + lpt.irq_handler().set(FUNC(tv990_state::lpt_irq)); + + rs232_port_device &rs232a(RS232_PORT(config, RS232A_TAG, default_rs232_devices, nullptr)); + rs232a.rxd_handler().set(m_uart[0], FUNC(ns16450_device::rx_w)); + rs232a.dcd_handler().set(m_uart[0], FUNC(ns16450_device::dcd_w)); + rs232a.cts_handler().set(m_uart[0], FUNC(ns16450_device::cts_w)); + + rs232_port_device &rs232b(RS232_PORT(config, RS232B_TAG, default_rs232_devices, nullptr)); + rs232b.rxd_handler().set(m_uart[1], FUNC(ns16450_device::rx_w)); + rs232b.dcd_handler().set(m_uart[1], FUNC(ns16450_device::dcd_w)); + rs232b.cts_handler().set(m_uart[1], FUNC(ns16450_device::cts_w)); KBDC8042(config, m_kbdc); m_kbdc->set_keyboard_type(kbdc8042_device::KBDC8042_AT386); @@ -419,9 +423,8 @@ MACHINE_CONFIG_START(tv990_state::tv990) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); SPEAKER(config, "mono").front_center(); - MCFG_DEVICE_ADD("beep", BEEP, 1000); //whats the freq? - MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) -MACHINE_CONFIG_END + BEEP(config, "beep", 1000).add_route(ALL_OUTPUTS, "mono", 1.0); //whats the freq? +} /* ROM definition */ ROM_START( tv990 ) diff --git a/src/mame/drivers/twinkle.cpp b/src/mame/drivers/twinkle.cpp index 042f08abef0..b656674bda5 100644 --- a/src/mame/drivers/twinkle.cpp +++ b/src/mame/drivers/twinkle.cpp @@ -9,6 +9,8 @@ driver by smf and R. Belmont TODO: dvd check for bmiidx, bmiidxa, bmiidxc & bmiidxca + - 1st style (all variants, including club kit) connected over the mini-din8 (CN7) and dvd check requires RTS->CTS + - substream and above switched to standard serial connection (CN5) The first 128k of RF5C400 bank 0 is uploaded by the 68000, the rest is unused. It may be using 16J & 18J emulate dvd player and video mixing 16seg led font @@ -21,21 +23,26 @@ The following games are known to exist on this hardware (there may be more) Video CD Security Game Title Year Program CD 6/7/8 use DVD Dongle HDD label ----------------------------------------------------------------------------------------------------- -beatmania IIDX (English) 1999 GQ863 A01 GQ863 A04 *863 A02 ? -beatmania IIDX (Japanese) 1999 GQ863-JA B01 GQ863 A04 *863 A02 ? -beatmania IIDX + DDR Club Kit 1999 896 JA ABM *? *? ? -beatmania IIDX + DDR Club Kit(newer) 1999 896 JA BBM *? *? ? -beatmania IIDX Substream 1999 *? GC983 A04 *? ? -beatmania IIDX Club Version 2 1999 GE984 A01(BM) *? *984 A02 ? +beatmania IIDX (English) 1999 GQ863 A01 GQ863 A04 *863 A02 863 HDD A01 +beatmania IIDX (Japanese) 1999 GQ863-JA B01 GQ863 A04 *863 A02 863 HDD A01 +beatmania IIDX + DDR Club Kit 1999 896 JA ABM GQ863 A04 *863 A02 863 HDD A01 + + 896 JA A01 +beatmania IIDX + DDR Club Kit(newer) 1999 896 JA BBM GQ863 A04 *863 A02 863 HDD A01 + + 896 JA A01 +beatmania IIDX Substream 1999 GC983 A01 GC983 A04 *983 A02 983 HDD A01 +beatmania IIDX Substream (Asia) 1999 GC983-AA A01 GC983 A04 *983A A02 983 HDD A01 +beatmania IIDX Club Version 2 1999 GE984 A01(BM) GC983 A04 *984 A02 983 HDD A01 + GE984 A01(DDR) -beatmania IIDX 2nd Style 1999 GC985 A01 GC985 A04 *? *985 HDD A01 -beatmania IIDX 3rd Style 2000 GC992-JA A01 GC992-JA A04 *? *992 HDD A01 -beatmania IIDX 3rd Style(newer) 2000 GC992-JA C01 GC992-JA A04 *? *992 HDD A01 +beatmania IIDX 2nd Style 1999 GC985 A01 GC985 A04 *985 985 HDD A01 +beatmania IIDX 3rd Style 2000 GC992-JA A01 GC992-JA A04 *992 992 HDD A01 +beatmania IIDX 3rd Style(newer) 2000 GC992-JA B01 GC992-JA A04 *992 992 HDD A01 +beatmania IIDX 3rd Style(newest) 2000 GC992-JA C01 GC992-JA A04 *992 992 HDD A01 beatmania IIDX 4th Style 2000 A03 JA A01 A03 JA A02 A03 A03 JA A03 -beatmania IIDX 5th Style 2001 A17 JA A01 A17 JA A02 A17 *A17 JA A03 -beatmania IIDX 6th Style 2001 B4U JA A01 B4U JA A02 *? B4U JA A03 -beatmania IIDX 6th Style(newer) 2001 B4U JA B01 B4U JA A02 *? B4U JA A03 -beatmania IIDX 7th Style 2002 B44 JA A01 B44 JA A02 *? B44 JA A03 +beatmania IIDX 5th Style 2001 A17 JA A01 A17 JA A02 A17 A17 JA A03 +beatmania IIDX 6th Style 2001 B4U JA A01 B4U JA A02 *B4U B4U JA A03 +beatmania IIDX 6th Style(newer) 2001 B4U JA B01 B4U JA A02 *B4U B4U JA A03 +beatmania IIDX 7th Style 2002 B44 JA A01 B44 JA A02 *B44 B44 JA A03 +beatmania IIDX 7th Style(newer) 2002 B44 JA B01 B44 JA A02 *B44 B44 JA A03 beatmania IIDX 8th Style 2002 C44 JA A01 C44 JA A02 *C44 C44 JA A03 * = Not dumped. diff --git a/src/mame/drivers/twins.cpp b/src/mame/drivers/twins.cpp index 27f0b3b7e7b..54abeb2a6b6 100644 --- a/src/mame/drivers/twins.cpp +++ b/src/mame/drivers/twins.cpp @@ -8,6 +8,36 @@ Electronic Devices, 1994 PCB Layout ---------- +ECOGAMES Twins +_________________________________________________________ +| LABEL: VIDEOR-191193 | +| ____________________ _____________ | +| | U24 40PIN DEVICE | | IMSG176P-66| ____| +| |__________________| |____________| | +| |___ +| ___________ 74HC574 ___________ 74HC574 ----| +| | D43256AC | | D43256AC | ----| +| |__________| 74LS245 |__________| 74LS245 ----| +| ----| +| 74LS245 74HC573 74LS245 74HC573 ----| +| ____________ ____________ __________________ ----| +| | 84256A-10L| | 84256A-10L| | AY-3-8910A | ----| +| |___________| |___________| |_________________| ----| +| _____________ _____________ ----| +| | 1 27C4001 | | 2 27C4001 | ----| +| |____________| |____________| ___________________ ----| +| |U30 40PIN DEVICE | ----| +| 74LS245 74LS245 74HC573 |_________________| ----| +| ----| +| 74HC573 74HC573 74HC74 ____| +| __________________ | +| |NEC V30 9327N5 | 74HC04 24C2AB1 |___ +| |_________________| XTAL8MHz | +|________________________________________________________| + + +ELECTRONIC DEVICES Twins + This is a very tiny PCB, only about 6 inches square. @@ -23,13 +53,12 @@ only about 6 inches square. | AY3-8910 | | D70116| |-----------------------| + Notes: V30 clock : 8.000MHz (16/2) AY3-8910 clock : 2.000MHz (16/8) VSync : 50Hz - - seems a similar board to Hot Blocks same TPC1020 AFN-084C chip @@ -52,12 +81,12 @@ Spider PCB appears almost identical but uses additional 'blitter' features. It is possible the Twins PCB has them too and doesn't use them. -Twins (set 2) is significantly changed hardware, uses a regular RAMDAC hookup for plaette etc. +Twins (Electronic Devices license, set 2) is significantly changed hardware, uses a regular RAMDAC hookup for plaette etc. + To access Service Mode in Spider you must boot with P1 Left and P1 Right held down, this requires the -joystick_contradictory switch on the commandline. - */ #include "emu.h" @@ -69,7 +98,6 @@ this requires the -joystick_contradictory switch on the commandline. #include "screen.h" #include "speaker.h" - class twins_state : public driver_device { public: @@ -84,8 +112,8 @@ public: { } void spider(machine_config &config); + void twinsed1(machine_config &config); void twins(machine_config &config); - void twinsa(machine_config &config); private: required_device<cpu_device> m_maincpu; @@ -125,9 +153,9 @@ private: void ramdac_map(address_map &map); void spider_io(address_map &map); - void twins_io(address_map &map); + void twinsed1_io(address_map &map); void twins_map(address_map &map); - void twinsa_io(address_map &map); + void twins_io(address_map &map); }; @@ -290,7 +318,7 @@ void twins_state::twins_map(address_map &map) map(0x00000, 0xfffff).rw(FUNC(twins_state::spider_blitter_r), FUNC(twins_state::spider_blitter_w)); } -void twins_state::twins_io(address_map &map) +void twins_state::twinsed1_io(address_map &map) { map(0x0000, 0x0003).w("aysnd", FUNC(ay8910_device::address_data_w)).umask16(0x00ff); map(0x0002, 0x0002).r("aysnd", FUNC(ay8910_device::data_r)); @@ -314,8 +342,6 @@ void twins_state::video_start() } - - uint32_t twins_state::screen_update_twins(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { int y,x,count; @@ -392,11 +418,11 @@ static INPUT_PORTS_START(twins) INPUT_PORTS_END -MACHINE_CONFIG_START(twins_state::twins) +MACHINE_CONFIG_START(twins_state::twinsed1) /* basic machine hardware */ MCFG_DEVICE_ADD("maincpu", V30, 8000000) MCFG_DEVICE_PROGRAM_MAP(twins_map) - MCFG_DEVICE_IO_MAP(twins_io) + MCFG_DEVICE_IO_MAP(twinsed1_io) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) @@ -418,11 +444,11 @@ MACHINE_CONFIG_START(twins_state::twins) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) MACHINE_CONFIG_END -/* The second set has different palette hardware and a different port map */ - +/* The Ecogames set and the Electronic Devices second set has different palette hardware + and a different port map than Electronic Devices first set */ -void twins_state::twinsa_io(address_map &map) +void twins_state::twins_io(address_map &map) { map(0x0000, 0x0000).w("ramdac", FUNC(ramdac_device::index_w)); map(0x0002, 0x0002).w("ramdac", FUNC(ramdac_device::mask_w)); @@ -439,11 +465,11 @@ void twins_state::ramdac_map(address_map &map) } -MACHINE_CONFIG_START(twins_state::twinsa) +MACHINE_CONFIG_START(twins_state::twins) /* basic machine hardware */ MCFG_DEVICE_ADD("maincpu", V30, XTAL(16'000'000)/2) /* verified on pcb */ MCFG_DEVICE_PROGRAM_MAP(twins_map) - MCFG_DEVICE_IO_MAP(twinsa_io) + MCFG_DEVICE_IO_MAP(twins_io) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) @@ -453,8 +479,9 @@ MACHINE_CONFIG_START(twins_state::twinsa) MCFG_SCREEN_VBLANK_CALLBACK(INPUTLINE("maincpu", INPUT_LINE_NMI)) MCFG_PALETTE_ADD("palette", 256) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") - MCFG_RAMDAC_SPLIT_READ(0) + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &twins_state::ramdac_map); + ramdac.set_split_read(0); MCFG_24C02_ADD("i2cmem") @@ -563,9 +590,6 @@ void twins_state::spider_io(address_map &map) } - - - MACHINE_CONFIG_START(twins_state::spider) /* basic machine hardware */ MCFG_DEVICE_ADD("maincpu", V30, 8000000) @@ -594,8 +618,20 @@ MACHINE_CONFIG_START(twins_state::spider) MACHINE_CONFIG_END +/* ECOGAMES Twins */ ROM_START( twins ) ROM_REGION( 0x100000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "2.u8", 0x000000, 0x080000, CRC(1ec942b0) SHA1(627deb739c50f93c4cb61b8baf2a07213f1613b3) ) + ROM_LOAD16_BYTE( "1.u9", 0x000001, 0x080000, CRC(4417ff34) SHA1(be992128fe48556a0a7c018953702b4ce9076526) ) + + /* Unused */ + ROM_REGION( 0x000100, "extra", 0 ) + ROM_LOAD("24c02.u15", 0x000000, 0x000100, CRC(5ba30b14) SHA1(461f701879b76f1784705e067a5b6b31bfda4606) ) +ROM_END + +/** Electronic Devices Twins */ +ROM_START( twinsed1 ) + ROM_REGION( 0x100000, "maincpu", 0 ) ROM_LOAD16_BYTE( "1.bin", 0x000000, 0x080000, CRC(d5ef7b0d) SHA1(7261dca5bb0aef755b4f2b85a159b356e7ac8219) ) ROM_LOAD16_BYTE( "2.bin", 0x000001, 0x080000, CRC(8a5392f4) SHA1(e6a2ecdb775138a87d27aa4ad267bdec33c26baa) ) ROM_END @@ -618,7 +654,7 @@ hmm, we're only emulating 1x ay-3-8910, is the other at port 0 on this? */ -ROM_START( twinsa ) +ROM_START( twinsed2 ) ROM_REGION( 0x100000, "maincpu", 0 ) ROM_LOAD16_BYTE( "lp.bin", 0x000000, 0x080000, CRC(4f07862e) SHA1(fbda1973f79c6938c7f026a4db706e78781c2df8) ) ROM_LOAD16_BYTE( "hp.bin", 0x000001, 0x080000, CRC(aaf74b83) SHA1(09bd76b9fc5cb7ba6ffe1a2581ffd5633fe440b3) ) @@ -630,7 +666,8 @@ ROM_START( spider ) ROM_LOAD16_BYTE( "21.bin", 0x000000, 0x080000, CRC(ff224206) SHA1(d8d45850983542e811facc917d016841fc56a97f) ) ROM_END -GAME( 1994, twins, 0, twins, twins, twins_state, empty_init, ROT0, "Electronic Devices", "Twins (set 1)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, twinsa, twins, twinsa, twins, twins_state, empty_init, ROT0, "Electronic Devices", "Twins (set 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1993, twins, 0, twins, twins, twins_state, empty_init, ROT0, "Ecogames", "Twins", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, twinsed1, twins, twinsed1, twins, twins_state, empty_init, ROT0, "Ecogames (Electronic Devices license)", "Twins (Electronic Devices license, set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, twinsed2, twins, twins, twins, twins_state, empty_init, ROT0, "Ecogames (Electronic Devices license)", "Twins (Electronic Devices license, set 2)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, spider, 0, spider, twins, twins_state, empty_init, ROT0, "Buena Vision", "Spider", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1994, spider, 0, spider, twins, twins_state, empty_init, ROT0, "Buena Vision", "Spider", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/ultrsprt.cpp b/src/mame/drivers/ultrsprt.cpp index 9ee55da84b6..dff66316263 100644 --- a/src/mame/drivers/ultrsprt.cpp +++ b/src/mame/drivers/ultrsprt.cpp @@ -247,13 +247,13 @@ MACHINE_CONFIG_START(ultrsprt_state::ultrsprt) EEPROM_93C46_16BIT(config, "eeprom"); - MCFG_DEVICE_ADD("upd1", UPD4701A, 0) - MCFG_UPD4701_PORTX("P1X") - MCFG_UPD4701_PORTY("P1Y") + UPD4701A(config, m_upd[0]); + m_upd[0]->set_portx_tag("P1X"); + m_upd[0]->set_porty_tag("P1Y"); - MCFG_DEVICE_ADD("upd2", UPD4701A, 0) - MCFG_UPD4701_PORTX("P2X") - MCFG_UPD4701_PORTY("P2Y") + UPD4701A(config, m_upd[1]); + m_upd[1]->set_portx_tag("P2X"); + m_upd[1]->set_porty_tag("P2Y"); /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) diff --git a/src/mame/drivers/unior.cpp b/src/mame/drivers/unior.cpp index ac4c02df4ba..bcfc520f54c 100644 --- a/src/mame/drivers/unior.cpp +++ b/src/mame/drivers/unior.cpp @@ -110,8 +110,7 @@ void unior_state::unior_io(address_map &map) map(0x50, 0x50).w(FUNC(unior_state::scroll_w)); map(0x60, 0x61).rw("crtc", FUNC(i8275_device::read), FUNC(i8275_device::write)); map(0xdc, 0xdf).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); - map(0xec, 0xec).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0xed, 0xed).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0xec, 0xed).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); } /* Input ports */ diff --git a/src/mame/drivers/upscope.cpp b/src/mame/drivers/upscope.cpp index fb2410a2b12..2aa91007875 100644 --- a/src/mame/drivers/upscope.cpp +++ b/src/mame/drivers/upscope.cpp @@ -146,7 +146,7 @@ WRITE8_MEMBER( upscope_state::upscope_cia_1_porta_w ) /* if SEL == 1 && BUSY == 1, we write data to internal registers */ else if ((data & 5) == 5) { - m_ppi->write(space, m_nvram_address_latch & 0x03, m_parallel_data); + m_ppi->write(m_nvram_address_latch & 0x03, m_parallel_data); } /* if SEL == 0 && BUSY == 1, we write data to NVRAM */ @@ -170,7 +170,7 @@ WRITE8_MEMBER( upscope_state::upscope_cia_1_porta_w ) if (data & 4) { if (LOG_IO) logerror("Internal register (%d) read\n", m_nvram_address_latch); - m_nvram_data_latch = m_ppi->read(space, m_nvram_address_latch & 0x03); + m_nvram_data_latch = m_ppi->read(m_nvram_address_latch & 0x03); } /* if SEL == 0, we read NVRAM */ diff --git a/src/mame/drivers/v100.cpp b/src/mame/drivers/v100.cpp index 7f4ba23e410..427f3c82504 100644 --- a/src/mame/drivers/v100.cpp +++ b/src/mame/drivers/v100.cpp @@ -218,10 +218,8 @@ void v100_state::io_map(address_map &map) map.global_mask(0xff); map(0x00, 0x0f).w(m_vtac, FUNC(crt5037_device::write)); map(0x10, 0x10).w("brg1", FUNC(com8116_device::stt_str_w)); - map(0x12, 0x12).rw("usart1", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x13, 0x13).rw("usart1", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x14, 0x14).rw("usart2", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x15, 0x15).rw("usart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x12, 0x13).rw("usart1", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x14, 0x15).rw("usart2", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x16, 0x16).w("brg2", FUNC(com8116_device::stt_str_w)); map(0x20, 0x20).r(FUNC(v100_state::earom_r)); map(0x30, 0x30).w(FUNC(v100_state::port30_w)); @@ -385,7 +383,7 @@ MACHINE_CONFIG_START(v100_state::v100) ppi.out_pc_callback().set(m_earom, FUNC(er1400_device::data_w)).bit(6).invert(); ppi.out_pc_callback().append(m_earom, FUNC(er1400_device::clock_w)).bit(0).invert(); - ER1400(config, m_earom, 0); + ER1400(config, m_earom); MACHINE_CONFIG_END diff --git a/src/mame/drivers/v102.cpp b/src/mame/drivers/v102.cpp index 210c1815ac6..0e62605a348 100644 --- a/src/mame/drivers/v102.cpp +++ b/src/mame/drivers/v102.cpp @@ -15,7 +15,8 @@ Skeleton driver for Visual 102 display terminal. #include "machine/i8255.h" #include "machine/pit8253.h" #include "machine/z80sio.h" -//#include "video/crt9007.h" +//#include "video/crt9006.h" +#include "video/crt9007.h" //#include "video/crt9021.h" #include "screen.h" @@ -60,14 +61,11 @@ void v102_state::mem_map(address_map &map) void v102_state::io_map(address_map &map) { map.global_mask(0xff); - //AM_RANGE(0x00, 0x3f) AM_DEVREADWRITE("vpac", crt9007_device, read, write) - map(0x18, 0x19).nopw(); + map(0x00, 0x3f).rw("vpac", FUNC(crt9007_device::read), FUNC(crt9007_device::write)); map(0x40, 0x43).rw("mpsc", FUNC(upd7201_new_device::ba_cd_r), FUNC(upd7201_new_device::ba_cd_w)); - map(0x60, 0x60).rw("usart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x61, 0x61).rw("usart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x60, 0x61).rw("usart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x80, 0x83).w("pit", FUNC(pit8253_device::write)); map(0xa0, 0xa3).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); - //AM_RANGE(0xbf, 0xbf) ??? } void v102_state::kbd_map(address_map &map) @@ -75,40 +73,41 @@ void v102_state::kbd_map(address_map &map) map(0x000, 0x7ff).rom().region("keyboard", 0); } -static INPUT_PORTS_START( v102 ) +static INPUT_PORTS_START(v102) INPUT_PORTS_END -MACHINE_CONFIG_START(v102_state::v102) - MCFG_DEVICE_ADD("maincpu", Z80, XTAL(18'575'000) / 5) // divider not verified - MCFG_DEVICE_PROGRAM_MAP(mem_map) - MCFG_DEVICE_IO_MAP(io_map) +void v102_state::v102(machine_config &config) +{ + Z80(config, m_maincpu, 18.575_MHz_XTAL / 5); // divider not verified + m_maincpu->set_addrmap(AS_PROGRAM, &v102_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &v102_state::io_map); - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_RAW_PARAMS(XTAL(18'575'000), 970, 0, 800, 319, 0, 300) - //MCFG_SCREEN_RAW_PARAMS(XTAL(18'575'000), 948, 0, 792, 319, 0, 300) - MCFG_SCREEN_UPDATE_DRIVER(v102_state, screen_update) + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(18.575_MHz_XTAL, 970, 0, 800, 319, 0, 300); + //screen.set_raw(18.575_MHz_XTAL, 948, 0, 792, 319, 0, 300); + screen.set_screen_update(FUNC(v102_state::screen_update)); - //MCFG_DEVICE_ADD("vpac", CRT9007, CRTC_CLOCK) - //MCFG_CRT9007_CHARACTER_WIDTH(6 or 10) + crt9007_device &vpac(CRT9007(config, "vpac", 18.575_MHz_XTAL / 10)); + vpac.set_character_width(10); // 6 in 132-column mode + vpac.int_callback().set("mainirq", FUNC(input_merger_device::in_w<2>)); EEPROM_2804(config, "eeprom"); - upd7201_new_device& mpsc(UPD7201_NEW(config, "mpsc", XTAL(18'575'000) / 5)); // divider not verified + upd7201_new_device &mpsc(UPD7201_NEW(config, "mpsc", 18.575_MHz_XTAL / 5)); // divider not verified mpsc.out_int_callback().set("mainirq", FUNC(input_merger_device::in_w<0>)); - i8251_device &usart(I8251(config, "usart", XTAL(18'575'000) / 5)); // divider not verified + i8251_device &usart(I8251(config, "usart", 18.575_MHz_XTAL / 5)); // divider not verified usart.rxrdy_handler().set("mainirq", FUNC(input_merger_device::in_w<1>)); - MCFG_INPUT_MERGER_ANY_HIGH("mainirq") - MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("maincpu", 0)) + INPUT_MERGER_ANY_HIGH(config, "mainirq").output_handler().set_inputline(m_maincpu, INPUT_LINE_IRQ0); - MCFG_DEVICE_ADD("pit", PIT8253, 0) + PIT8253(config, "pit", 0); - MCFG_DEVICE_ADD("ppi", I8255, 0) + I8255(config, "ppi"); - MCFG_DEVICE_ADD("kbdcpu", I8039, 12000000) - MCFG_DEVICE_PROGRAM_MAP(kbd_map) -MACHINE_CONFIG_END + mcs48_cpu_device &kbdcpu(I8039(config, "kbdcpu", 11000000)); + kbdcpu.set_addrmap(AS_PROGRAM, &v102_state::kbd_map); +} /************************************************************************************************************** diff --git a/src/mame/drivers/v1050.cpp b/src/mame/drivers/v1050.cpp index f90de13df63..d6ad0852bc8 100644 --- a/src/mame/drivers/v1050.cpp +++ b/src/mame/drivers/v1050.cpp @@ -336,7 +336,7 @@ READ8_MEMBER( v1050_state::kb_data_r ) READ8_MEMBER( v1050_state::kb_status_r ) { - uint8_t val = m_uart_kb->status_r(space, 0); + uint8_t val = m_uart_kb->status_r(); return val | (m_keyavail ? 0x02 : 0x00); } @@ -481,12 +481,10 @@ void v1050_state::v1050_io(address_map &map) map.unmap_value_high(); map.global_mask(0xff); map(0x84, 0x87).rw(m_ppi_disp, FUNC(i8255_device::read), FUNC(i8255_device::write)); -// AM_RANGE(0x88, 0x88) AM_DEVREADWRITE(I8251A_KB_TAG, i8251_device, data_r, data_w) -// AM_RANGE(0x89, 0x89) AM_DEVREADWRITE(I8251A_KB_TAG, i8251_device, status_r, control_w) +// map(0x88, 0x89).rw(m_uart_kb, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x88, 0x88).r(FUNC(v1050_state::kb_data_r)).w(m_uart_kb, FUNC(i8251_device::data_w)); map(0x89, 0x89).r(FUNC(v1050_state::kb_status_r)).w(m_uart_kb, FUNC(i8251_device::control_w)); - map(0x8c, 0x8c).rw(m_uart_sio, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x8d, 0x8d).rw(m_uart_sio, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x8c, 0x8d).rw(m_uart_sio, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x90, 0x93).rw(I8255A_MISC_TAG, FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x94, 0x97).rw(m_fdc, FUNC(mb8877_device::read), FUNC(mb8877_device::write)); map(0x9c, 0x9f).rw(I8255A_RTC_TAG, FUNC(i8255_device::read), FUNC(i8255_device::write)); diff --git a/src/mame/drivers/v550.cpp b/src/mame/drivers/v550.cpp index eafbd292fbd..c8b9f504978 100644 --- a/src/mame/drivers/v550.cpp +++ b/src/mame/drivers/v550.cpp @@ -70,8 +70,7 @@ void v550_state::io_map(address_map &map) map(0x00, 0x01).rw("gdc", FUNC(upd7220_device::read), FUNC(upd7220_device::write)); map(0x10, 0x10).w("brg1", FUNC(com8116_device::stt_str_w)); map(0x20, 0x23).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); - map(0x30, 0x30).rw(m_usart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x31, 0x31).rw(m_usart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x30, 0x31).rw(m_usart, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x40, 0x40).rw("mpsc", FUNC(upd7201_new_device::da_r), FUNC(upd7201_new_device::da_w)); map(0x41, 0x41).rw("mpsc", FUNC(upd7201_new_device::ca_r), FUNC(upd7201_new_device::ca_w)); map(0x48, 0x48).rw("mpsc", FUNC(upd7201_new_device::db_r), FUNC(upd7201_new_device::db_w)); diff --git a/src/mame/drivers/vector06.cpp b/src/mame/drivers/vector06.cpp index 9a9abc347db..31a70bfdd08 100644 --- a/src/mame/drivers/vector06.cpp +++ b/src/mame/drivers/vector06.cpp @@ -44,10 +44,10 @@ void vector06_state::vector06_io(address_map &map) { map.global_mask(0xff); map.unmap_value_high(); - ; - map(0x00, 0x03).lrw8("ppi8255_rw", [this](address_space &space, offs_t offset, u8 mem_mask) -> u8 { return m_ppi8255->read(space, offset^3, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_ppi8255->write(space, offset^3, data, mem_mask); }); - map(0x04, 0x07).lrw8("ppi8255_2_rw", [this](address_space &space, offs_t offset, u8 mem_mask) -> u8 { return m_ppi8255_2->read(space, offset^3, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_ppi8255_2->write(space, offset^3, data, mem_mask); }); - map(0x08, 0x0b).lrw8("pit8253_rw", [this](address_space &space, offs_t offset, u8 mem_mask) -> u8 { return m_pit8253->read(space, offset^3, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_pit8253->write(space, offset^3, data, mem_mask); }); + + map(0x00, 0x03).lrw8("ppi8255_rw", [this](offs_t offset) -> u8 { return m_ppi8255->read(offset^3); }, [this](offs_t offset, u8 data) { m_ppi8255->write(offset^3, data); }); + map(0x04, 0x07).lrw8("ppi8255_2_rw", [this](offs_t offset) -> u8 { return m_ppi8255_2->read(offset^3); }, [this](offs_t offset, u8 data) { m_ppi8255_2->write(offset^3, data); }); + map(0x08, 0x0b).lrw8("pit8253_rw", [this](offs_t offset) -> u8 { return m_pit8253->read(offset^3); }, [this](offs_t offset, u8 data) { m_pit8253->write(offset^3, data); }); map(0x0c, 0x0c).w(FUNC(vector06_state::vector06_color_set)); map(0x10, 0x10).w(FUNC(vector06_state::vector06_ramdisk_w)); map(0x14, 0x15).rw(m_ay, FUNC(ay8910_device::data_r), FUNC(ay8910_device::data_address_w)); diff --git a/src/mame/drivers/vector4.cpp b/src/mame/drivers/vector4.cpp index e73108e1973..1d338f6b3c6 100644 --- a/src/mame/drivers/vector4.cpp +++ b/src/mame/drivers/vector4.cpp @@ -48,12 +48,9 @@ void vector4_state::vector4_io(address_map &map) { map.unmap_value_high(); map.global_mask(0xff); - map(0x02, 0x02).rw("uart1", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x03, 0x03).rw("uart1", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x04, 0x04).rw("uart2", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x05, 0x05).rw("uart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x06, 0x06).rw("uart3", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x07, 0x07).rw("uart3", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x02, 0x03).rw("uart1", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x04, 0x05).rw("uart2", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x06, 0x07).rw("uart3", FUNC(i8251_device::read), FUNC(i8251_device::write)); } /* Input ports */ diff --git a/src/mame/drivers/vectrix.cpp b/src/mame/drivers/vectrix.cpp index dc1fdead34e..477fbb07386 100644 --- a/src/mame/drivers/vectrix.cpp +++ b/src/mame/drivers/vectrix.cpp @@ -44,8 +44,7 @@ void vectrix_state::mem_map(address_map &map) void vectrix_state::io_map(address_map &map) { - map(0x3000, 0x3000).rw("uart1", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x3001, 0x3001).rw("uart1", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x3000, 0x3001).rw("uart1", FUNC(i8251_device::read), FUNC(i8251_device::write)); } static INPUT_PORTS_START( vectrix ) diff --git a/src/mame/drivers/vega.cpp b/src/mame/drivers/vega.cpp index bd41fd23800..9139b13f7ad 100644 --- a/src/mame/drivers/vega.cpp +++ b/src/mame/drivers/vega.cpp @@ -80,6 +80,7 @@ TODO: #include "machine/i8255.h" #include "machine/ins8154.h" #include "sound/ay8910.h" +#include "video/dp8350.h" #include "emupal.h" #include "screen.h" #include "speaker.h" @@ -110,6 +111,7 @@ public: , m_i8255(*this, "ppi8255") , m_ins8154(*this, "ins8154") , m_ay8910(*this, "ay8910") + , m_crtc(*this, "crtc") , m_gfxdecode(*this, "gfxdecode") , m_palette(*this, "palette") { @@ -124,6 +126,7 @@ private: required_device<i8255_device> m_i8255; required_device<ins8154_device> m_ins8154; required_device<ay8910_device> m_ay8910; + required_device<dp8350_device> m_crtc; required_device<gfxdecode_device> m_gfxdecode; required_device<palette_device> m_palette; @@ -170,7 +173,7 @@ private: virtual void machine_reset() override; DECLARE_PALETTE_INIT(vega); void draw_tilemap(screen_device& screen, bitmap_ind16& bitmap, const rectangle& cliprect); - uint32_t screen_update_vega(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void vega_io_map(address_map &map); void vega_map(address_map &map); }; @@ -184,7 +187,7 @@ WRITE8_MEMBER(vega_state::extern_w) case 0: /* 00-03 */ { /* PPI 8255 /CS */ - m_i8255->write(space, (m_p2_data>>6)&3, data); + m_i8255->write((m_p2_data>>6)&3, data); } break; @@ -313,7 +316,7 @@ READ8_MEMBER(vega_state::extern_r) { case 0: /* PPI 8255 /CS */ { - return m_i8255->read( space, m_p2_data>>6); /* A6,A7 -> A0,A1 */ + return m_i8255->read(m_p2_data>>6); /* A6,A7 -> A0,A1 */ } case 1: /* 04-07 */ @@ -393,7 +396,7 @@ WRITE8_MEMBER(vega_state::rombank_w) void vega_state::vega_map(address_map &map) { map(0x000, 0x7ff).bankr("bank1"); - map(0x800, 0xfff).rom(); + map(0x800, 0xfff).rom().region("mb1", 0); } void vega_state::vega_io_map(address_map &map) @@ -529,7 +532,7 @@ void vega_state::draw_tilemap(screen_device& screen, bitmap_ind16& bitmap, const { //for(int x=0;x<4;++x) { - m_gfxdecode->gfx(1)->transpen(bitmap,cliprect, num, 0, 1,flip?1:0, x*4+x0-offset_x, (flip?(3-y):y)*8+y0-offset_y, 0); + m_gfxdecode->gfx(1)->zoom_transpen(bitmap,cliprect, num, 0, 1,flip?1:0, (x*4+x0-offset_x)*2, (flip?(3-y):y)*8+y0-offset_y, 0x20000, 0x10000, 0); ++num; } } @@ -545,7 +548,7 @@ void vega_state::draw_tilemap(screen_device& screen, bitmap_ind16& bitmap, const } -uint32_t vega_state::screen_update_vega(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +uint32_t vega_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { ++m_frame_counter; @@ -578,7 +581,7 @@ uint32_t vega_state::screen_update_vega(screen_device &screen, bitmap_ind16 &bit // if(color==0) color=0xf; - m_gfxdecode->gfx(0)->transpen(bitmap,cliprect, character, color, 0, 0, x*7, y*10,0); + m_gfxdecode->gfx(0)->zoom_transpen(bitmap,cliprect, character, color, 0, 0, x*14, y*10, 0x20000, 0x10000, 0); ++idx; } @@ -599,7 +602,7 @@ uint32_t vega_state::screen_update_vega(screen_device &screen, bitmap_ind16 &bit { //for(int x=0;x<4;++x) { - m_gfxdecode->gfx(2)->transpen(bitmap,cliprect, num, 0, 1, flip?1:0, x*4+x0, (flip?(3-y):y)*8+y0, 0); + m_gfxdecode->gfx(2)->zoom_transpen(bitmap,cliprect, num, 0, 1, flip?1:0, (x*4+x0)*2, (flip?(3-y):y)*8+y0, 0x20000, 0x10000, 0); ++num; } } @@ -639,7 +642,7 @@ uint32_t vega_state::screen_update_vega(screen_device &screen, bitmap_ind16 &bit for(int y=0;y<4;++y) { - m_gfxdecode->gfx(3)->transpen(bitmap,cliprect, strip_num, 0, !xor_line, 0, x*4+x0, y*8+y0, 0); + m_gfxdecode->gfx(3)->zoom_transpen(bitmap,cliprect, strip_num, 0, !xor_line, 0, (x*4+x0)*2, y*8+y0, 0x20000, 0x10000, 0); ++strip_num; } } @@ -806,7 +809,6 @@ MACHINE_CONFIG_START(vega_state::vega) MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, vega_state, p2_w)) MCFG_MCS48_PORT_T1_IN_CB(READLINE(*this, vega_state, t1_r)) MCFG_MCS48_PORT_PROG_OUT_CB(NOOP) /* prog - inputs CLK */ - MCFG_DEVICE_VBLANK_INT_DRIVER("screen", vega_state, irq0_line_hold) I8255A(config, m_i8255); m_i8255->in_pa_callback().set(FUNC(vega_state::txtram_r)); @@ -823,18 +825,18 @@ MACHINE_CONFIG_START(vega_state::vega) m_ins8154->out_b().set(FUNC(vega_state::ins8154_pb_w)); /* video hardware */ - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) - MCFG_SCREEN_SIZE(512, 256) - MCFG_SCREEN_VISIBLE_AREA(0*8, 280, 0*8, 239) - MCFG_SCREEN_UPDATE_DRIVER(vega_state, screen_update_vega) - MCFG_SCREEN_PALETTE("palette") + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_screen_update(FUNC(vega_state::screen_update)); + screen.set_palette(m_palette); - MCFG_PALETTE_ADD("palette", 0x100) - MCFG_PALETTE_INIT_OWNER(vega_state, vega) + DP8350(config, m_crtc, 10920000); // pins 21/22 connected to XTAL, 3 to GND + m_crtc->set_screen("screen"); + m_crtc->refresh_control(0); + m_crtc->vblank_callback().set_inputline(m_maincpu, MCS48_INPUT_IRQ); // inverse of pin 2? - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_test_decode) + PALETTE(config, m_palette, 0x100).set_init(FUNC(vega_state::palette_init_vega)); + + GFXDECODE(config, "gfxdecode", "palette", gfx_test_decode); /* sound hardware */ @@ -850,9 +852,11 @@ MACHINE_CONFIG_START(vega_state::vega) MACHINE_CONFIG_END ROM_START( vega ) - ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "rom9.bin", 0x0800, 0x0800, CRC(191c73cd) SHA1(17b1c3790f82b276e55d25ea8a38a3c9cf20bf12) ) - ROM_LOAD( "rom10a.bin", 0x1000, 0x1000, CRC(fca9a570) SHA1(598772db11b32518ed6bf5155a19f4f1761a4831) ) + ROM_REGION( 0x01000, "mb0", 0 ) + ROM_LOAD( "rom10a.bin", 0x0000, 0x1000, CRC(fca9a570) SHA1(598772db11b32518ed6bf5155a19f4f1761a4831) ) + + ROM_REGION( 0x00800, "mb1", 0 ) + ROM_LOAD( "rom9.bin", 0x0000, 0x0800, CRC(191c73cd) SHA1(17b1c3790f82b276e55d25ea8a38a3c9cf20bf12) ) ROM_REGION( 0x01000, "gfx1", ROMREGION_INVERT ) ROM_LOAD( "rom8.bin", 0x0000, 0x0800, CRC(ccb8598c) SHA1(8c4a702f0653bb189db7d8ac4c2a06aacecc0de0) ) @@ -885,8 +889,8 @@ ROM_END void vega_state::init_vega() { - uint8_t *ROM = memregion("maincpu")->base(); - membank("bank1")->configure_entries(0, 2, &ROM[0x1000], 0x800); + uint8_t *ROM = memregion("mb0")->base(); + membank("bank1")->configure_entries(0, 2, &ROM[0], 0x800); } GAME( 1982, vega, 0, vega, vega, vega_state, init_vega, ROT270, "Olympia", "Vega", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/drivers/vendetta.cpp b/src/mame/drivers/vendetta.cpp index 8a70c90d8e2..5778bdbc4d6 100644 --- a/src/mame/drivers/vendetta.cpp +++ b/src/mame/drivers/vendetta.cpp @@ -590,6 +590,30 @@ ROM_START( vendettaz ) ROM_LOAD( "vendetta.nv", 0x0000, 0x080, CRC(fbac4e30) SHA1(d3ff3a392550d9b06400b9292a44bdac7ba5c801) ) ROM_END +ROM_START( vendettaun ) + ROM_REGION( 0x40000, "maincpu", 0 ) /* code + banked roms + banked ram */ + ROM_LOAD( "1.17c", 0x00000, 0x40000, CRC(1a7ceb1b) SHA1(c7454e11b7a06d10c94fe44ba6f83208bca4ced9) ) /* World 4 player, program rom found labeled simply as "1" */ + + ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the sound CPU */ + ROM_LOAD( "081b02", 0x000000, 0x10000, CRC(4c604d9b) SHA1(22d979f5dbde7912dd927bf5538fdbfc5b82905e) ) + + ROM_REGION( 0x100000, "k052109", 0 ) /* tiles */ + ROM_LOAD32_WORD( "081a09", 0x000000, 0x080000, CRC(b4c777a9) SHA1(cc2b1dff4404ecd72b604e25d00fffdf7f0f8b52) ) + ROM_LOAD32_WORD( "081a08", 0x000002, 0x080000, CRC(272ac8d9) SHA1(2da12fe4c13921bf0d4ebffec326f8d207ec4fad) ) + + ROM_REGION( 0x400000, "gfx2", 0 ) /* graphics ( don't dispose as the program can read them ) */ + ROM_LOAD64_WORD( "081a04", 0x000000, 0x100000, CRC(464b9aa4) SHA1(28066ff0a07c3e56e7192918a882778c1b316b37) ) /* sprites */ + ROM_LOAD64_WORD( "081a05", 0x000002, 0x100000, CRC(4e173759) SHA1(ce803f2aca7d7dedad00ab30e112443848747bd2) ) /* sprites */ + ROM_LOAD64_WORD( "081a06", 0x000004, 0x100000, CRC(e9fe6d80) SHA1(2b7fc9d7fe43cd85dc8b975fe639c273cb0d9256) ) /* sprites */ + ROM_LOAD64_WORD( "081a07", 0x000006, 0x100000, CRC(8a22b29a) SHA1(be539f21518e13038ab1d4cc2b2a901dd3e621f4) ) /* sprites */ + + ROM_REGION( 0x100000, "k053260", 0 ) /* 053260 samples */ + ROM_LOAD( "081a03", 0x000000, 0x100000, CRC(14b6baea) SHA1(fe15ee57f19f5acaad6c1642d51f390046a7468a) ) + + ROM_REGION( 0x80, "eeprom", 0 ) // default eeprom to prevent game booting upside down with error + ROM_LOAD( "vendetta.nv", 0x0000, 0x080, CRC(fbac4e30) SHA1(d3ff3a392550d9b06400b9292a44bdac7ba5c801) ) +ROM_END + ROM_START( vendetta2pw ) ROM_REGION( 0x40000, "maincpu", 0 ) /* code + banked roms + banked ram */ ROM_LOAD( "081w01.17c", 0x00000, 0x40000, CRC(cee57132) SHA1(8b6413877e127511daa76278910c2ee3247d613a) ) @@ -819,6 +843,7 @@ ROM_END GAME( 1991, vendetta, 0, vendetta, vendet4p, vendetta_state, empty_init, ROT0, "Konami", "Vendetta (World, 4 Players, ver. T)", MACHINE_SUPPORTS_SAVE ) GAME( 1991, vendettar, vendetta, vendetta, vendet4p, vendetta_state, empty_init, ROT0, "Konami", "Vendetta (US, 4 Players, ver. R)", MACHINE_SUPPORTS_SAVE ) GAME( 1991, vendettaz, vendetta, vendetta, vendet4p, vendetta_state, empty_init, ROT0, "Konami", "Vendetta (Asia, 4 Players, ver. Z)", MACHINE_SUPPORTS_SAVE ) +GAME( 1991, vendettaun, vendetta, vendetta, vendet4p, vendetta_state, empty_init, ROT0, "Konami", "Vendetta (World, 4 Players, ver. ?)", MACHINE_SUPPORTS_SAVE ) /* program rom labeled as 1 */ GAME( 1991, vendetta2pw, vendetta, vendetta, vendetta, vendetta_state, empty_init, ROT0, "Konami", "Vendetta (World, 2 Players, ver. W)", MACHINE_SUPPORTS_SAVE ) GAME( 1991, vendetta2peba,vendetta,vendetta, vendetta, vendetta_state, empty_init, ROT0, "Konami", "Vendetta (World, 2 Players, ver. EB-A?)", MACHINE_SUPPORTS_SAVE ) GAME( 1991, vendetta2pun,vendetta, vendetta, vendetta, vendetta_state, empty_init, ROT0, "Konami", "Vendetta (World, 2 Players, ver. ?)", MACHINE_SUPPORTS_SAVE ) /* program rom labeled as 1 */ diff --git a/src/mame/drivers/vgmplay.cpp b/src/mame/drivers/vgmplay.cpp index 977f50768d5..ca168193182 100644 --- a/src/mame/drivers/vgmplay.cpp +++ b/src/mame/drivers/vgmplay.cpp @@ -78,14 +78,61 @@ public: virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; }; +enum vgm_chip +{ + CT_SN76489 = 0, + CT_YM2413, + CT_YM2612, + CT_YM2151, + CT_SEGAPCM, + CT_RF5C68, + CT_YM2203, + CT_YM2608, + CT_YM2610, + CT_YM3812, + CT_YM3526, + CT_Y8950, + CT_YMF262, + CT_YMF278B, + CT_YMF271, + CT_YMZ280B, + CT_RF5C164, + CT_SEGA32X, + CT_AY8910, + CT_GAMEBOY, + CT_NESAPU, + CT_MULTIPCM, + CT_UPD7759, + CT_OKIM6258, + CT_OKIM6295, + CT_K051649, + CT_K054539, + CT_C6280, + CT_C140, + CT_K053260, + CT_POKEY, + CT_QSOUND, + CT_SCSP, + CT_WSWAN, + CT_VSU_VUE, + CT_SAA1099, + CT_ES5503, + CT_ES5505, + CT_X1_010, + CT_C352, + CT_GA20, + + CT_COUNT, +}; + class vgmplay_device : public cpu_device { public: enum io8_t { REG_SIZE = 0xff000000, - A_SN76496_0 = 0x00000000, - A_SN76496_1 = 0x80000000, + A_SN76489_0 = 0x00000000, + A_SN76489_1 = 0x80000000, A_YM2413_0 = 0x01000000, A_YM2413_1 = 0x81000000, A_YM2612_0 = 0x02000000, @@ -190,30 +237,34 @@ public: virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; - template<int Chip> DECLARE_READ8_MEMBER(segapcm_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(ymf278b_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(ymf271_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(ymz280b_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(multipcm_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(upd7759_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(okim6295_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(k054539_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(c140_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(k053260_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(qsound_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(es5505_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(x1_010_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(c352_rom_r); - template<int Chip> DECLARE_READ8_MEMBER(ga20_rom_r); - - template<int Chip> DECLARE_WRITE8_MEMBER(multipcm_bank_hi_w); - template<int Chip> DECLARE_WRITE8_MEMBER(multipcm_bank_lo_w); - - template<int Chip> DECLARE_WRITE8_MEMBER(upd7759_bank_w); - - template<int Chip> DECLARE_WRITE8_MEMBER(okim6295_nmk112_enable_w); - template<int Chip> DECLARE_WRITE8_MEMBER(okim6295_bank_w); - template<int Chip> DECLARE_WRITE8_MEMBER(okim6295_nmk112_bank_w); + template<int Index> DECLARE_READ8_MEMBER(segapcm_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ym2608_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ym2610_adpcm_a_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ym2610_adpcm_b_rom_r); + template<int Index> DECLARE_READ8_MEMBER(y8950_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ymf278b_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ymf271_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ymz280b_rom_r); + template<int Index> DECLARE_READ8_MEMBER(multipcm_rom_r); + template<int Index> DECLARE_READ8_MEMBER(upd7759_rom_r); + template<int Index> DECLARE_READ8_MEMBER(okim6295_rom_r); + template<int Index> DECLARE_READ8_MEMBER(k054539_rom_r); + template<int Index> DECLARE_READ8_MEMBER(c140_rom_r); + template<int Index> DECLARE_READ8_MEMBER(k053260_rom_r); + template<int Index> DECLARE_READ8_MEMBER(qsound_rom_r); + template<int Index> DECLARE_READ8_MEMBER(es5505_rom_r); + template<int Index> DECLARE_READ8_MEMBER(x1_010_rom_r); + template<int Index> DECLARE_READ8_MEMBER(c352_rom_r); + template<int Index> DECLARE_READ8_MEMBER(ga20_rom_r); + + template<int Index> DECLARE_WRITE8_MEMBER(multipcm_bank_hi_w); + template<int Index> DECLARE_WRITE8_MEMBER(multipcm_bank_lo_w); + + template<int Index> DECLARE_WRITE8_MEMBER(upd7759_bank_w); + + template<int Index> DECLARE_WRITE8_MEMBER(okim6295_nmk112_enable_w); + template<int Index> DECLARE_WRITE8_MEMBER(okim6295_bank_w); + template<int Index> DECLARE_WRITE8_MEMBER(okim6295_nmk112_bank_w); void stop(); void pause(); @@ -228,56 +279,9 @@ protected: private: enum { ACT_LED_PERSIST_MS = 100 }; - enum act_led - { - LED_SN76496 = 0, - LED_YM2413, - LED_YM2612, - LED_YM2151, - LED_SEGAPCM, - LED_RF5C68, - LED_YM2203, - LED_YM2608, - LED_YM2610, - LED_YM3812, - LED_YM3526, - LED_Y8950, - LED_YMF262, - LED_YMF278B, - LED_YMF271, - LED_YMZ280B, - LED_RF5C164, - LED_32X_PWM, - LED_AY8910, - LED_GAMEBOY, - LED_NESAPU, - LED_MULTIPCM, - LED_UPD7759, - LED_OKIM6258, - LED_OKIM6295, - LED_K051649, - LED_K054539, - LED_C6280, - LED_C140, - LED_K053260, - LED_POKEY, - LED_QSOUND, - LED_SCSP, - LED_WSWAN, - LED_VSU_VUE, - LED_SAA1099, - LED_ES5503, - LED_ES5505, - LED_X1_010, - LED_C352, - LED_GA20, - - LED_COUNT - }; - enum { RESET, RUN, DONE }; - using led_expiry = std::pair<act_led, attotime>; + using led_expiry = std::pair<vgm_chip, attotime>; using led_expiry_list = std::list<led_expiry>; using led_expiry_iterator = led_expiry_list::iterator; @@ -297,7 +301,7 @@ private: uint32_t position; emu_timer *timer; // stream control - act_led chip_type; + vgm_chip chip_type; uint8_t port; uint8_t reg; // stream data @@ -317,15 +321,15 @@ private: stream m_streams[0xff]; - void pulse_act_led(act_led led); + void pulse_act_led(vgm_chip led); TIMER_CALLBACK_MEMBER(act_led_expired); - uint8_t rom_r(int chip, uint8_t type, offs_t offset); + uint8_t rom_r(int index, uint8_t type, offs_t offset); uint32_t handle_data_block(uint32_t address); uint32_t handle_pcm_write(uint32_t address); void blocks_clear(); - output_finder<LED_COUNT> m_act_leds; + output_finder<CT_COUNT> m_act_leds; led_expiry_list m_act_led_expiries; std::unique_ptr<led_expiry_iterator[]> m_act_led_index; led_expiry_iterator m_act_led_off; @@ -353,6 +357,15 @@ private: std::array<std::vector<uint8_t>, 0x40> m_data_streams; std::array<std::vector<data_block>, 0x40> m_data_stream_blocks; + struct + { + uint8_t cmp_type; + uint8_t cmp_sub_type; + uint8_t bit_dec; + uint8_t bit_cmp; + std::vector<uint8_t> entries; + } m_dec_table; + uint32_t m_ym2612_stream_offset = 0U; uint32_t m_multipcm_bank_l[2]; @@ -365,7 +378,9 @@ private: uint32_t m_okim6295_bank[2]; uint32_t m_okim6295_nmk112_bank[2][4]; + int m_sega32x_channel_hack; int m_nes_apu_channel_hack[2]; + uint8_t m_c6280_channel[2]; }; DEFINE_DEVICE_TYPE(VGMPLAY, vgmplay_device, "vgmplay_core", "VGM Player engine") @@ -390,47 +405,51 @@ public: DECLARE_READ8_MEMBER(file_size_r); DECLARE_INPUT_CHANGED_MEMBER(key_pressed); - template<int Chip> DECLARE_WRITE8_MEMBER(upd7759_reset_w); - template<int Chip> DECLARE_WRITE8_MEMBER(upd7759_data_w); - template<int Chip> DECLARE_WRITE_LINE_MEMBER(upd7759_drq_w); - template<int Chip> DECLARE_WRITE8_MEMBER(okim6258_clock_w); - template<int Chip> DECLARE_WRITE8_MEMBER(okim6258_divider_w); - template<int Chip> DECLARE_WRITE8_MEMBER(okim6295_clock_w); - template<int Chip> DECLARE_WRITE8_MEMBER(okim6295_pin7_w); - template<int Chip> DECLARE_WRITE8_MEMBER(scc_w); + template<int Index> DECLARE_WRITE8_MEMBER(upd7759_reset_w); + template<int Index> DECLARE_WRITE8_MEMBER(upd7759_data_w); + template<int Index> DECLARE_WRITE_LINE_MEMBER(upd7759_drq_w); + template<int Index> DECLARE_WRITE8_MEMBER(okim6258_clock_w); + template<int Index> DECLARE_WRITE8_MEMBER(okim6258_divider_w); + template<int Index> DECLARE_WRITE8_MEMBER(okim6295_clock_w); + template<int Index> DECLARE_WRITE8_MEMBER(okim6295_pin7_w); + template<int Index> DECLARE_WRITE8_MEMBER(scc_w); void vgmplay(machine_config &config); void file_map(address_map &map); void soundchips_map(address_map &map); void soundchips16_map(address_map &map); - template<int Chip> void segapcm_map(address_map &map); - template<int Chip> void rf5c68_map(address_map &map); - template<int Chip> void ymf278b_map(address_map &map); - template<int Chip> void ymf271_map(address_map &map); - template<int Chip> void ymz280b_map(address_map &map); - template<int Chip> void rf5c164_map(address_map &map); - template<int Chip> void nescpu_map(address_map &map); - template<int Chip> void multipcm_map(address_map &map); - template<int Chip> void upd7759_map(address_map &map); - template<int Chip> void okim6295_map(address_map &map); - template<int Chip> void k054539_map(address_map &map); - template<int Chip> void c140_map(address_map &map); - template<int Chip> void k053260_map(address_map &map); - template<int Chip> void qsound_map(address_map &map); - template<int Chip> void scsp_map(address_map &map); - template<int Chip> void wswan_map(address_map &map); - template<int Chip> void es5503_map(address_map &map); - template<int Chip> void es5505_map(address_map &map); - template<int Chip> void x1_010_map(address_map &map); - template<int Chip> void c352_map(address_map &map); - template<int Chip> void ga20_map(address_map &map); + template<int Index> void segapcm_map(address_map &map); + template<int Index> void rf5c68_map(address_map &map); + template<int Index> void ym2608_map(address_map &map); + template<int Index> void ym2610_adpcm_a_map(address_map &map); + template<int Index> void ym2610_adpcm_b_map(address_map &map); + template<int Index> void y8950_map(address_map &map); + template<int Index> void ymf278b_map(address_map &map); + template<int Index> void ymf271_map(address_map &map); + template<int Index> void ymz280b_map(address_map &map); + template<int Index> void rf5c164_map(address_map &map); + template<int Index> void nescpu_map(address_map &map); + template<int Index> void multipcm_map(address_map &map); + template<int Index> void upd7759_map(address_map &map); + template<int Index> void okim6295_map(address_map &map); + template<int Index> void k054539_map(address_map &map); + template<int Index> void c140_map(address_map &map); + template<int Index> void k053260_map(address_map &map); + template<int Index> void qsound_map(address_map &map); + template<int Index> void scsp_map(address_map &map); + template<int Index> void wswan_map(address_map &map); + template<int Index> void es5503_map(address_map &map); + template<int Index> void es5505_map(address_map &map); + template<int Index> void x1_010_map(address_map &map); + template<int Index> void c352_map(address_map &map); + template<int Index> void ga20_map(address_map &map); private: std::vector<uint8_t> m_file_data; required_device<vgmplay_device> m_vgmplay; required_device<speaker_device> m_lspeaker; required_device<speaker_device> m_rspeaker; - required_device_array<sn76496_device, 2> m_sn76496; + required_device_array<sn76489_device, 2> m_sn76489; required_device_array<ym2413_device, 2> m_ym2413; required_device_array<ym2612_device, 2> m_ym2612; required_device_array<ym2151_device, 2> m_ym2151; @@ -472,9 +491,7 @@ private: required_device_array<c352_device, 2> m_c352; required_device_array<iremga20_device, 2> m_ga20; - uint32_t m_okim6258_clock[2]; uint8_t m_okim6258_divider[2]; - uint32_t m_okim6295_clock[2]; uint8_t m_okim6295_pin7[2]; uint8_t m_scc_reg[2]; @@ -504,8 +521,8 @@ void vgmplay_device::device_start() m_io16 = &space(AS_IO16); m_act_leds.resolve(); - m_act_led_index = std::make_unique<led_expiry_iterator[]>(LED_COUNT); - for (act_led led = act_led(0); LED_COUNT != led; led = act_led(led + 1)) + m_act_led_index = std::make_unique<led_expiry_iterator[]>(CT_COUNT); + for (vgm_chip led = vgm_chip(0); led != CT_COUNT; led = vgm_chip(led + 1)) m_act_led_index[led] = m_act_led_expiries.emplace(m_act_led_expiries.end(), led, attotime::never); m_act_led_off = m_act_led_expiries.begin(); m_act_led_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(vgmplay_device::act_led_expired), this)); @@ -532,17 +549,20 @@ void vgmplay_device::device_reset() for (int i = 0; i < 0xff; i++) { stream& s(m_streams[i]); - s.chip_type = act_led(0xff); + s.chip_type = vgm_chip(0xff); s.bank = 0xff; s.frequency = 0; s.timer->enable(false); } + m_sega32x_channel_hack = 0; m_nes_apu_channel_hack[0] = 0; m_nes_apu_channel_hack[1] = 0; + m_c6280_channel[0] = 0; + m_c6280_channel[1] = 0; } -void vgmplay_device::pulse_act_led(act_led led) +void vgmplay_device::pulse_act_led(vgm_chip led) { m_act_leds[led] = 1; @@ -624,6 +644,8 @@ void vgmplay_device::blocks_clear() m_data_streams[i].clear(); m_data_stream_blocks[i].clear(); } + + m_dec_table.entries.clear(); } uint32_t vgmplay_device::handle_data_block(uint32_t address) @@ -657,8 +679,10 @@ uint32_t vgmplay_device::handle_data_block(uint32_t address) uint8_t cmp_sub_type = m_file->read_byte(m_pc + 0x0e); uint16_t add_val = m_file->read_word(m_pc + 0x0f); - if (cmp_sub_type == 0x02) - osd_printf_error("unhandled n-bit compressed stream size %x->%x type %02x bit_dec %02x bit_cmp %02x unsupported cmp_sub_type %02x add_val %04x\n", size, out_size, type - 0x40, bit_dec, bit_cmp, cmp_sub_type, add_val); + if (cmp_sub_type == 0x02 && m_dec_table.entries.size() == 0) + osd_printf_error("invalid n-bit compressed stream, no decompression table\n"); + else if (cmp_sub_type == 0x02 && (m_dec_table.cmp_type != cmp_type || m_dec_table.cmp_sub_type != cmp_sub_type || m_dec_table.bit_dec != bit_dec || m_dec_table.bit_cmp != bit_cmp )) + osd_printf_error("invalid n-bit compressed stream, decompression table mismatch\n"); else { int in_pos = 0x11 - 0x07; @@ -705,8 +729,15 @@ uint32_t vgmplay_device::handle_data_block(uint32_t address) out_val = in_val + add_val; else if (cmp_sub_type == 1) out_val = (in_val << (bit_dec - bit_cmp)) + add_val; + else if (cmp_sub_type == 2) + { + if (bit_dec <= 8) + out_val = m_dec_table.entries[in_val]; + else if (bit_dec <= 16) + out_val = m_dec_table.entries[in_val << 1] | (m_dec_table.entries[(in_val << 1) + 1] << 8); + } else - osd_printf_error("unhandled n-bit compressed stream size %x->%x type %02x bit_dec %02x bit_cmp %02x unsupported cmp_sub_type %02x add_val %04x\n", size, out_size, type - 0x40, bit_dec, bit_cmp, cmp_sub_type, add_val); + osd_printf_error("invalid n-bit compressed stream size %x->%x type %02x bit_dec %02x bit_cmp %02x unsupported cmp_sub_type %02x add_val %04x\n", size, out_size, type - 0x40, bit_dec, bit_cmp, cmp_sub_type, add_val); for (int i = 0; i < bit_dec; i += 8) { @@ -726,9 +757,17 @@ uint32_t vgmplay_device::handle_data_block(uint32_t address) else osd_printf_error("unhandled unknown %02x compressed stream size %x->%x type %02x\n", cmp_type, size, out_size, type - 0x40); } - else if (type < 0x80) - osd_printf_error("unhandled compression table size %x\n", size); - + else if (type == 0x7f) + { + m_dec_table.cmp_type = m_file->read_byte(m_pc + 0x07); + m_dec_table.cmp_sub_type = m_file->read_byte(m_pc + 0x08); + m_dec_table.bit_dec = m_file->read_byte(m_pc + 0x09); + m_dec_table.bit_cmp = m_file->read_byte(m_pc + 0x0a); + + m_dec_table.entries.resize(m_file->read_word(m_pc + 0x0b) * ((m_dec_table.bit_dec + 7) / 8)); + for (size_t i = 0; i < m_dec_table.entries.size(); i++) + m_dec_table.entries[i] = m_file->read_byte(m_pc + 0x0d + i); + } else if (type < 0xc0) { uint32_t rom_size = m_file->read_dword(m_pc + 7); @@ -787,7 +826,7 @@ uint32_t vgmplay_device::handle_pcm_write(uint32_t address) int second = (type & 0x80) ? 1 : 0; type &= 0x7f; - if (m_data_streams.size() <= type || m_data_streams[type].size() <= src + size) + if (m_data_streams.size() <= type || m_data_streams[type].size() < src + size) osd_printf_error("invalid pcm ram writes src %x dst %x size %x type %02x\n", src, dst, size, type); else if (type == 0x01 && !second) { @@ -825,14 +864,55 @@ TIMER_CALLBACK_MEMBER(vgmplay_device::stream_timer_expired) else offset += s.position * s.step_size * s.byte_depth; - if (offset + s.byte_depth >= m_data_streams[s.bank].size()) + if (offset + s.byte_depth > m_data_streams[s.bank].size()) { - osd_printf_error("stream_timer_expired %02x: stream beyond end %u>=%u\n", param, offset, uint32_t(m_data_streams[s.bank].size())); + osd_printf_error("stream_timer_expired %02x: stream beyond end %d/%d %u>=%u\n", param, s.position, s.length, offset, uint32_t(m_data_streams[s.bank].size())); s.timer->enable(false); } - else if (s.chip_type == LED_32X_PWM) + else if (s.chip_type == CT_SN76489) + { + m_io->write_byte(A_SN76489_0, (s.reg & 0xf0) | (m_data_streams[s.bank][offset] & 0xf)); + if ((s.reg & 0x10) == 0) + m_io->write_byte(A_SN76489_0, ((m_data_streams[s.bank][offset + 1] & 3) << 4) | (m_data_streams[s.bank][offset] >> 4)); + } + else if (s.chip_type == CT_YM2612) + { + m_io->write_byte(A_YM2612_0 + 0 + ((s.port & 1) << 1), s.reg); + m_io->write_byte(A_YM2612_0 + 1 + ((s.port & 1) << 1), m_data_streams[s.bank][offset]); + } + else if (s.chip_type == CT_YM2203) + { + m_io->write_byte(A_YM2203_0 + 0 + ((s.port & 1) << 1), s.reg); + m_io->write_byte(A_YM2203_0 + 1 + ((s.port & 1) << 1), m_data_streams[s.bank][offset]); + } + else if (s.chip_type == CT_YM2608) + { + m_io->write_byte(A_YM2608_0 + 0 + ((s.port & 1) << 1), s.reg); + m_io->write_byte(A_YM2608_0 + 1 + ((s.port & 1) << 1), m_data_streams[s.bank][offset]); + } + else if (s.chip_type == CT_SEGA32X) + { + if (m_sega32x_channel_hack >= 0) + { + osd_printf_error("bad rip detected, enabling sega32x channels\n"); + m_io16->write_word(A_32X_PWM, 5); + + m_sega32x_channel_hack = -2; + } + m_io16->write_word(A_32X_PWM + (s.reg << 1), ((m_data_streams[s.bank][offset + 1] & 0xf) << 8) | m_data_streams[s.bank][offset]); - else if (s.chip_type == LED_OKIM6258) + } + else if (s.chip_type == CT_C6280) + { + if (s.port != 0xff) + m_io->write_byte(A_C6280_0 + (s.reg >> 4), s.port); + + m_io->write_byte(A_C6280_0 + (s.reg & 0xf), m_data_streams[s.bank][offset]); + + if (s.port != 0xff && s.port != m_c6280_channel[0]) + m_io->write_byte(A_C6280_0 + (s.reg >> 4), m_c6280_channel[0]); + } + else if (s.chip_type == CT_OKIM6258) m_io->write_byte(A_OKIM6258_0 + s.reg, m_data_streams[s.bank][offset]); else { @@ -906,31 +986,31 @@ void vgmplay_device::execute_run() switch (code) { case 0x30: - pulse_act_led(LED_SN76496); - m_io->write_byte(A_SN76496_1 + 0, m_file->read_byte(m_pc + 1)); + pulse_act_led(CT_SN76489); + m_io->write_byte(A_SN76489_1 + 0, m_file->read_byte(m_pc + 1)); m_pc += 2; break; case 0x3f: - pulse_act_led(LED_SN76496); - m_io->write_byte(A_SN76496_1 + 1, m_file->read_byte(m_pc + 1)); + pulse_act_led(CT_SN76489); + m_io->write_byte(A_SN76489_1 + 1, m_file->read_byte(m_pc + 1)); m_pc += 2; break; case 0x4f: - pulse_act_led(LED_SN76496); - m_io->write_byte(A_SN76496_0 + 1, m_file->read_byte(m_pc + 1)); + pulse_act_led(CT_SN76489); + m_io->write_byte(A_SN76489_0 + 1, m_file->read_byte(m_pc + 1)); m_pc += 2; break; case 0x50: - pulse_act_led(LED_SN76496); - m_io->write_byte(A_SN76496_0 + 0, m_file->read_byte(m_pc + 1)); + pulse_act_led(CT_SN76489); + m_io->write_byte(A_SN76489_0 + 0, m_file->read_byte(m_pc + 1)); m_pc += 2; break; case 0x51: - pulse_act_led(LED_YM2413); + pulse_act_led(CT_YM2413); m_io->write_byte(A_YM2413_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2413_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -938,21 +1018,21 @@ void vgmplay_device::execute_run() case 0x52: case 0x53: - pulse_act_led(LED_YM2612); + pulse_act_led(CT_YM2612); m_io->write_byte(A_YM2612_0 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2612_0 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0x54: - pulse_act_led(LED_YM2151); + pulse_act_led(CT_YM2151); m_io->write_byte(A_YM2151_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2151_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0x55: - pulse_act_led(LED_YM2203); + pulse_act_led(CT_YM2203); m_io->write_byte(A_YM2203_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2203_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -960,7 +1040,7 @@ void vgmplay_device::execute_run() case 0x56: case 0x57: - pulse_act_led(LED_YM2608); + pulse_act_led(CT_YM2608); m_io->write_byte(A_YM2608_0 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2608_0 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -968,35 +1048,35 @@ void vgmplay_device::execute_run() case 0x58: case 0x59: - pulse_act_led(LED_YM2610); + pulse_act_led(CT_YM2610); m_io->write_byte(A_YM2610_0 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2610_0 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0x5a: - pulse_act_led(LED_YM3812); + pulse_act_led(CT_YM3812); m_io->write_byte(A_YM3812_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM3812_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0x5b: - pulse_act_led(LED_YM3526); + pulse_act_led(CT_YM3526); m_io->write_byte(A_YM3526_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM3526_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0x5c: - pulse_act_led(LED_Y8950); + pulse_act_led(CT_Y8950); m_io->write_byte(A_Y8950_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_Y8950_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0x5d: - pulse_act_led(LED_YMZ280B); + pulse_act_led(CT_YMZ280B); m_io->write_byte(A_YMZ280B_0 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YMZ280B_0 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1004,7 +1084,7 @@ void vgmplay_device::execute_run() case 0x5e: case 0x5f: - pulse_act_led(LED_YMF262); + pulse_act_led(CT_YMF262); m_io->write_byte(A_YMF262_0 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YMF262_0 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1063,7 +1143,7 @@ void vgmplay_device::execute_run() case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87: case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f: - pulse_act_led(LED_YM2612); + pulse_act_led(CT_YM2612); if (!m_data_streams[0].empty()) { if (m_ym2612_stream_offset >= int(m_data_streams[0].size())) @@ -1086,14 +1166,11 @@ void vgmplay_device::execute_run() { stream& s(m_streams[id]); - s.chip_type = act_led(m_file->read_byte(m_pc + 2)); + s.chip_type = vgm_chip(m_file->read_byte(m_pc + 2)); s.port = m_file->read_byte(m_pc + 3); s.reg = m_file->read_byte(m_pc + 4); - if (s.chip_type == LED_32X_PWM) - s.byte_depth = 2; - else - s.byte_depth = 1; + s.byte_depth = ((s.chip_type == CT_SN76489 && (s.reg & 0x10) == 0) || s.chip_type == CT_SEGA32X) ? 2 : 1; if (s.timer->enabled()) { @@ -1166,7 +1243,7 @@ void vgmplay_device::execute_run() uint8_t id = m_file->read_byte(m_pc + 1); if (id == 0xff) osd_printf_error("stream start invalid id\n"); - else if (m_streams[id].chip_type >= LED_COUNT) + else if (m_streams[id].chip_type >= CT_COUNT) osd_printf_error("stream start %02x invalid chip type %02x\n", id, m_streams[id].chip_type); else { @@ -1231,7 +1308,7 @@ void vgmplay_device::execute_run() uint8_t id = m_file->read_byte(m_pc + 1); if (id == 0xff) osd_printf_error("stream start short invalid id\n"); - else if (m_streams[id].chip_type >= LED_COUNT) + else if (m_streams[id].chip_type >= CT_COUNT) osd_printf_error("stream start short %02x invalid chip type %02x\n", id, m_streams[id].chip_type); else { @@ -1265,7 +1342,7 @@ void vgmplay_device::execute_run() case 0xa0: { - pulse_act_led(LED_AY8910); + pulse_act_led(CT_AY8910); uint8_t reg = m_file->read_byte(m_pc + 1); if (reg & 0x80) { @@ -1282,7 +1359,7 @@ void vgmplay_device::execute_run() } case 0xa1: - pulse_act_led(LED_YM2413); + pulse_act_led(CT_YM2413); m_io->write_byte(A_YM2413_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2413_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1290,21 +1367,21 @@ void vgmplay_device::execute_run() case 0xa2: case 0xa3: - pulse_act_led(LED_YM2612); + pulse_act_led(CT_YM2612); m_io->write_byte(A_YM2612_1 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2612_1 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xa4: - pulse_act_led(LED_YM2151); + pulse_act_led(CT_YM2151); m_io->write_byte(A_YM2151_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2151_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xa5: - pulse_act_led(LED_YM2203); + pulse_act_led(CT_YM2203); m_io->write_byte(A_YM2203_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2203_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1312,7 +1389,7 @@ void vgmplay_device::execute_run() case 0xa6: case 0xa7: - pulse_act_led(LED_YM2608); + pulse_act_led(CT_YM2608); m_io->write_byte(A_YM2608_0 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2608_0 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1320,35 +1397,35 @@ void vgmplay_device::execute_run() case 0xa8: case 0xa9: - pulse_act_led(LED_YM2610); + pulse_act_led(CT_YM2610); m_io->write_byte(A_YM2610_0 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM2610_0 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xaa: - pulse_act_led(LED_YM3812); + pulse_act_led(CT_YM3812); m_io->write_byte(A_YM3812_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM3812_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xab: - pulse_act_led(LED_YM3526); + pulse_act_led(CT_YM3526); m_io->write_byte(A_YM3526_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YM3526_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xac: - pulse_act_led(LED_Y8950); + pulse_act_led(CT_Y8950); m_io->write_byte(A_Y8950_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_Y8950_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xad: - pulse_act_led(LED_YMZ280B); + pulse_act_led(CT_YMZ280B); m_io->write_byte(A_YMZ280B_1 + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YMZ280B_1 + 1, m_file->read_byte(m_pc + 2)); m_pc += 3; @@ -1356,34 +1433,48 @@ void vgmplay_device::execute_run() case 0xae: case 0xaf: - pulse_act_led(LED_YMF262); + pulse_act_led(CT_YMF262); m_io->write_byte(A_YMF262_1 + 0 + ((code & 1) << 1), m_file->read_byte(m_pc + 1)); m_io->write_byte(A_YMF262_1 + 1 + ((code & 1) << 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xb0: - pulse_act_led(LED_RF5C68); + pulse_act_led(CT_RF5C68); m_io->write_byte(A_RF5C68 + m_file->read_byte(m_pc + 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xb1: - pulse_act_led(LED_RF5C164); + pulse_act_led(CT_RF5C164); m_io->write_byte(A_RF5C164 + m_file->read_byte(m_pc + 1), m_file->read_byte(m_pc + 2)); m_pc += 3; break; case 0xb2: { - pulse_act_led(LED_32X_PWM); + pulse_act_led(CT_SEGA32X); uint8_t offset = m_file->read_byte(m_pc + 1); uint8_t data = m_file->read_byte(m_pc + 2); - if ((offset & 0xf0) == 0 && data == 0) + if (m_sega32x_channel_hack >= 0) { - osd_printf_error("bad rip detected, enabling sega32x channels\n"); - data |= 5; + if ((offset & 0xf0) == 0) + { + if (data != 0) + m_sega32x_channel_hack = -1; + } + else + { + m_sega32x_channel_hack++; + if (m_sega32x_channel_hack == 32) + { + osd_printf_error("bad rip detected, enabling sega32x channels\n"); + m_io16->write_word(A_32X_PWM, 5); + + m_sega32x_channel_hack = -2; + } + } } m_io16->write_word(A_32X_PWM + ((offset & 0xf0) >> 3), ((offset & 0xf) << 8) | data); @@ -1393,7 +1484,7 @@ void vgmplay_device::execute_run() case 0xb3: { - pulse_act_led(LED_GAMEBOY); + pulse_act_led(CT_GAMEBOY); uint8_t reg = m_file->read_byte(m_pc + 1); if (reg & 0x80) m_io->write_byte(A_GAMEBOY_1 + (reg & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1405,37 +1496,37 @@ void vgmplay_device::execute_run() case 0xb4: { - pulse_act_led(LED_NESAPU); + pulse_act_led(CT_NESAPU); uint8_t offset = m_file->read_byte(m_pc + 1); - int chip = offset & 0x80 ? 1 : 0; - if (m_nes_apu_channel_hack[chip] >= 0) + int index = offset & 0x80 ? 1 : 0; + if (m_nes_apu_channel_hack[index] >= 0) { if ((offset & 0x7f) == 0x15) { if ((m_file->read_byte(m_pc + 2) & 0x1f) != 0) - m_nes_apu_channel_hack[chip] = -1; + m_nes_apu_channel_hack[index] = -1; } else { - m_nes_apu_channel_hack[chip]++; - if (m_nes_apu_channel_hack[chip] == 32) + m_nes_apu_channel_hack[index]++; + if (m_nes_apu_channel_hack[index] == 32) { - osd_printf_error("bad rip detected, enabling nesapu.%d channels\n", chip); - if (chip) + osd_printf_error("bad rip detected, enabling nesapu.%d channels\n", index); + if (index) m_io->write_byte(A_NESAPU_1 + 0x15, 0x0f); else m_io->write_byte(A_NESAPU_0 + 0x15, 0x0f); - m_nes_apu_channel_hack[chip] = -2; + m_nes_apu_channel_hack[index] = -2; } } } - else if ((offset & 0x7f) == 0x15 && m_nes_apu_channel_hack[chip] == -2 && (m_file->read_byte(m_pc + 2) & 0x1f) != 0) - { - osd_printf_error("bad rip false positive, late enabling nesapu.%d channels\n", chip); - m_nes_apu_channel_hack[chip] = -1; - } + //else if ((offset & 0x7f) == 0x15 && m_nes_apu_channel_hack[index] == -2 && (m_file->read_byte(m_pc + 2) & 0x1f) != 0) + //{ + // osd_printf_error("bad rip false positive, late enabling nesapu.%d channels %x/%x\n", index, m_pc, m_io->read_dword(REG_SIZE)); + // m_nes_apu_channel_hack[index] = -1; + //} if (offset & 0x80) m_io->write_byte(A_NESAPU_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1447,7 +1538,7 @@ void vgmplay_device::execute_run() case 0xb5: { - pulse_act_led(LED_MULTIPCM); + pulse_act_led(CT_MULTIPCM); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_MULTIPCM_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1459,7 +1550,7 @@ void vgmplay_device::execute_run() case 0xb6: { - pulse_act_led(LED_UPD7759); + pulse_act_led(CT_UPD7759); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_UPD7759_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1471,7 +1562,7 @@ void vgmplay_device::execute_run() case 0xb7: { - pulse_act_led(LED_OKIM6258); + pulse_act_led(CT_OKIM6258); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_OKIM6258_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1483,7 +1574,7 @@ void vgmplay_device::execute_run() case 0xb8: { - pulse_act_led(LED_OKIM6295); + pulse_act_led(CT_OKIM6295); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_OKIM6295_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1495,8 +1586,10 @@ void vgmplay_device::execute_run() case 0xb9: { - pulse_act_led(LED_C6280); + pulse_act_led(CT_C6280); uint8_t offset = m_file->read_byte(m_pc + 1); + if ((offset & 0x7f) == 0) + m_c6280_channel[BIT(offset, 7)] = m_file->read_byte(m_pc + 2); if (offset & 0x80) m_io->write_byte(A_C6280_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); else @@ -1507,7 +1600,7 @@ void vgmplay_device::execute_run() case 0xba: { - pulse_act_led(LED_K053260); + pulse_act_led(CT_K053260); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_K053260_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1519,7 +1612,7 @@ void vgmplay_device::execute_run() case 0xbb: { - pulse_act_led(LED_POKEY); + pulse_act_led(CT_POKEY); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_POKEY_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1531,7 +1624,7 @@ void vgmplay_device::execute_run() case 0xbc: { - pulse_act_led(LED_WSWAN); + pulse_act_led(CT_WSWAN); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_WSWAN_1 + (offset & 0x7f) + 0x80, m_file->read_byte(m_pc + 2)); @@ -1543,7 +1636,7 @@ void vgmplay_device::execute_run() case 0xbd: { - pulse_act_led(LED_SAA1099); + pulse_act_led(CT_SAA1099); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) { @@ -1561,7 +1654,7 @@ void vgmplay_device::execute_run() case 0xbe: { - pulse_act_led(LED_ES5505); + pulse_act_led(CT_ES5505); // TODO: es5505 m_pc += 3; break; @@ -1569,7 +1662,7 @@ void vgmplay_device::execute_run() case 0xbf: { - pulse_act_led(LED_GA20); + pulse_act_led(CT_GA20); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_GA20_1 + (offset & 0x7f), m_file->read_byte(m_pc + 2)); @@ -1581,7 +1674,7 @@ void vgmplay_device::execute_run() case 0xc0: { - pulse_act_led(LED_SEGAPCM); + pulse_act_led(CT_SEGAPCM); uint16_t offset = m_file->read_word(m_pc + 1); if (offset & 0x8000) m_io->write_byte(A_SEGAPCM_1 + (offset & 0x7fff), m_file->read_byte(m_pc + 3)); @@ -1592,20 +1685,20 @@ void vgmplay_device::execute_run() } case 0xc1: - pulse_act_led(LED_RF5C68); + pulse_act_led(CT_RF5C68); m_io->write_byte(A_RF5C68_RAM + m_file->read_word(m_pc + 1), m_file->read_byte(m_pc + 3)); m_pc += 4; break; case 0xc2: - pulse_act_led(LED_RF5C164); + pulse_act_led(CT_RF5C164); m_io->write_byte(A_RF5C164_RAM + m_file->read_word(m_pc + 1), m_file->read_byte(m_pc + 3)); m_pc += 4; break; case 0xc3: { - pulse_act_led(LED_MULTIPCM); + pulse_act_led(CT_MULTIPCM); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) { @@ -1622,7 +1715,7 @@ void vgmplay_device::execute_run() } case 0xc4: - pulse_act_led(LED_QSOUND); + pulse_act_led(CT_QSOUND); m_io->write_byte(A_QSOUND + 0, m_file->read_byte(m_pc + 1)); m_io->write_byte(A_QSOUND + 1, m_file->read_byte(m_pc + 2)); m_io->write_byte(A_QSOUND + 2, m_file->read_byte(m_pc + 3)); @@ -1631,7 +1724,7 @@ void vgmplay_device::execute_run() case 0xc5: { - pulse_act_led(LED_SCSP); + pulse_act_led(CT_SCSP); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io16->write_byte(A_SCSP_1 + ((offset & 0x7f) << 8) + (m_file->read_byte(m_pc + 2) ^ 1), m_file->read_byte(m_pc + 3)); @@ -1643,7 +1736,7 @@ void vgmplay_device::execute_run() case 0xc6: { - pulse_act_led(LED_WSWAN); + pulse_act_led(CT_WSWAN); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_WSWAN_RAM_1 + ((offset & 0x7f) << 8) + m_file->read_byte(m_pc + 2), m_file->read_byte(m_pc + 3)); @@ -1655,7 +1748,7 @@ void vgmplay_device::execute_run() case 0xc7: { - pulse_act_led(LED_VSU_VUE); + pulse_act_led(CT_VSU_VUE); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_VSU_VUE_1 + ((offset & 0x7f) << 10) + (m_file->read_byte(m_pc + 2) << 2), m_file->read_byte(m_pc + 3)); @@ -1667,7 +1760,7 @@ void vgmplay_device::execute_run() case 0xc8: { - pulse_act_led(LED_X1_010); + pulse_act_led(CT_X1_010); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_X1_010_1 + ((offset & 0x7f) << 8) + m_file->read_byte(m_pc + 2), m_file->read_byte(m_pc + 3)); @@ -1679,7 +1772,7 @@ void vgmplay_device::execute_run() case 0xd0: { - pulse_act_led(LED_YMF278B); + pulse_act_led(CT_YMF278B); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) { @@ -1697,7 +1790,7 @@ void vgmplay_device::execute_run() case 0xd1: { - pulse_act_led(LED_YMF271); + pulse_act_led(CT_YMF271); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) { @@ -1715,7 +1808,7 @@ void vgmplay_device::execute_run() case 0xd2: { - pulse_act_led(LED_K051649); + pulse_act_led(CT_K051649); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) { @@ -1733,7 +1826,7 @@ void vgmplay_device::execute_run() case 0xd3: { - pulse_act_led(LED_K054539); + pulse_act_led(CT_K054539); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_K054539_1 + ((offset & 0x7f) << 8) + m_file->read_byte(m_pc + 2), m_file->read_byte(m_pc + 3)); @@ -1745,7 +1838,7 @@ void vgmplay_device::execute_run() case 0xd4: { - pulse_act_led(LED_C140); + pulse_act_led(CT_C140); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_C140_1 + ((offset & 0x7f) << 8) + m_file->read_byte(m_pc + 2), m_file->read_byte(m_pc + 3)); @@ -1757,7 +1850,7 @@ void vgmplay_device::execute_run() case 0xd5: { - pulse_act_led(LED_ES5503); + pulse_act_led(CT_ES5503); uint8_t offset = m_file->read_byte(m_pc + 1); if (offset & 0x80) m_io->write_byte(A_ES5503_1 + ((offset & 0x7f) << 8) + m_file->read_byte(m_pc + 2), m_file->read_byte(m_pc + 3)); @@ -1769,21 +1862,21 @@ void vgmplay_device::execute_run() case 0xd6: { - pulse_act_led(LED_ES5505); + pulse_act_led(CT_ES5505); // TODO: es5505 m_pc += 4; break; } case 0xe0: - pulse_act_led(LED_YM2612); + pulse_act_led(CT_YM2612); m_ym2612_stream_offset = m_file->read_dword(m_pc + 1); m_pc += 5; break; case 0xe1: { - pulse_act_led(LED_C352); + pulse_act_led(CT_C352); uint8_t offset = m_file->read_byte(m_pc + 1); uint32_t addr = ((offset & 0x7f) << 8) + m_file->read_byte(m_pc + 2); uint16_t data = (m_file->read_byte(m_pc + 3) << 8) + m_file->read_byte(m_pc + 4); @@ -1963,7 +2056,7 @@ offs_t vgmplay_disassembler::disassemble(std::ostream &stream, offs_t pc, const "ymf278b.%d rom", "ymf271.%d rom", "ymz280b.%d rom", - "ymf278b.%d rom", + "ymf278b.%d ram", "y8950.%d delta-t rom", "multipcm.%d rom", "upd7759.%d rom", @@ -2008,7 +2101,7 @@ offs_t vgmplay_disassembler::disassemble(std::ostream &stream, offs_t pc, const } else if (type < 0x7f) util::stream_format(stream, "unknown%02x.%d stream comp. data-block %x", type - 0x40, second, size); - else if (type < 0x80) + else if (type == 0x7f) util::stream_format(stream, "decomp-table %x, %02x/%02x", size, opcodes.r8(pc + 7), opcodes.r8(pc + 8)); else if (type < 0x94) { @@ -2065,27 +2158,27 @@ offs_t vgmplay_disassembler::disassemble(std::ostream &stream, offs_t pc, const return 1 | SUPPORTED; case 0x90: - util::stream_format(stream, "stream control %02x %02x %02x %02x\n", opcodes.r8(pc + 1), opcodes.r8(pc + 2), opcodes.r8(pc + 3), opcodes.r8(pc + 4)); + util::stream_format(stream, "stream control %02x %02x %02x %02x", opcodes.r8(pc + 1), opcodes.r8(pc + 2), opcodes.r8(pc + 3), opcodes.r8(pc + 4)); return 5 | SUPPORTED; case 0x91: - util::stream_format(stream, "stream data %02x %02x %02x %02x\n", opcodes.r8(pc + 1), opcodes.r8(pc + 2), opcodes.r8(pc + 3), opcodes.r8(pc + 4)); + util::stream_format(stream, "stream data %02x %02x %02x %02x", opcodes.r8(pc + 1), opcodes.r8(pc + 2), opcodes.r8(pc + 3), opcodes.r8(pc + 4)); return 5 | SUPPORTED; case 0x92: - util::stream_format(stream, "stream frequency %02x %d\n", opcodes.r8(pc + 1), opcodes.r32(pc + 2)); + util::stream_format(stream, "stream frequency %02x %d", opcodes.r8(pc + 1), opcodes.r32(pc + 2)); return 6 | SUPPORTED; case 0x93: - util::stream_format(stream, "stream start %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", opcodes.r8(pc + 1), opcodes.r8(pc + 2), opcodes.r8(pc + 3), opcodes.r8(pc + 4), opcodes.r8(pc + 5), opcodes.r8(pc + 6), opcodes.r8(pc + 7), opcodes.r8(pc + 8), opcodes.r8(pc + 9), opcodes.r8(pc + 10)); + util::stream_format(stream, "stream start %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x", opcodes.r8(pc + 1), opcodes.r8(pc + 2), opcodes.r8(pc + 3), opcodes.r8(pc + 4), opcodes.r8(pc + 5), opcodes.r8(pc + 6), opcodes.r8(pc + 7), opcodes.r8(pc + 8), opcodes.r8(pc + 9), opcodes.r8(pc + 10)); return 11 | SUPPORTED; case 0x94: - util::stream_format(stream, "stream stop %02x\n", opcodes.r8(pc + 1)); + util::stream_format(stream, "stream stop %02x", opcodes.r8(pc + 1)); return 2 | SUPPORTED; case 0x95: - util::stream_format(stream, "stream start short %02x %02x %02x %02x\n", opcodes.r8(pc + 1), opcodes.r8(pc + 2), opcodes.r8(pc + 3), opcodes.r8(pc + 4)); + util::stream_format(stream, "stream start short %02x %02x %02x %02x", opcodes.r8(pc + 1), opcodes.r8(pc + 2), opcodes.r8(pc + 3), opcodes.r8(pc + 4)); return 5 | SUPPORTED; case 0xa0: @@ -2289,9 +2382,9 @@ offs_t vgmplay_disassembler::disassemble(std::ostream &stream, offs_t pc, const } } -uint8_t vgmplay_device::rom_r(int chip, uint8_t type, offs_t offset) +uint8_t vgmplay_device::rom_r(int index, uint8_t type, offs_t offset) { - for (const auto &b : m_rom_blocks[chip][type - 0x80]) + for (const auto &b : m_rom_blocks[index][type - 0x80]) { if (offset >= b.start_address && offset <= b.end_address) { @@ -2301,131 +2394,155 @@ uint8_t vgmplay_device::rom_r(int chip, uint8_t type, offs_t offset) return 0; } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::segapcm_rom_r) { - return rom_r(Chip, 0x80, offset); + return rom_r(Index, 0x80, offset); +} + +template<int Index> +READ8_MEMBER(vgmplay_device::ym2608_rom_r) +{ + return rom_r(Index, 0x81, offset); +} + +template<int Index> +READ8_MEMBER(vgmplay_device::ym2610_adpcm_a_rom_r) +{ + return rom_r(Index, 0x82, offset); } -template<int Chip> +template<int Index> +READ8_MEMBER(vgmplay_device::ym2610_adpcm_b_rom_r) +{ + return rom_r(Index, 0x83, offset); +} + +template<int Index> READ8_MEMBER(vgmplay_device::ymf278b_rom_r) { - return rom_r(Chip, 0x84, offset); + return rom_r(Index, 0x84, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::ymf271_rom_r) { - return rom_r(Chip, 0x85, offset); + return rom_r(Index, 0x85, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::ymz280b_rom_r) { - return rom_r(Chip, 0x86, offset); + return rom_r(Index, 0x86, offset); } -template<int Chip> +template<int Index> +READ8_MEMBER(vgmplay_device::y8950_rom_r) +{ + return rom_r(Index, 0x88, offset); +} + +template<int Index> READ8_MEMBER(vgmplay_device::multipcm_rom_r) { - if (m_multipcm_banked[Chip] == 1) + if (m_multipcm_banked[Index] == 1) { offset &= 0x1fffff; if (offset & 0x100000) { - if (m_multipcm_bank_l[Chip] == m_multipcm_bank_r[Chip]) + if (m_multipcm_bank_l[Index] == m_multipcm_bank_r[Index]) { - offset = ((m_multipcm_bank_r[Chip] & ~0xf) << 16) | (offset & 0xfffff); + offset = ((m_multipcm_bank_r[Index] & ~0xf) << 16) | (offset & 0xfffff); } else { if (offset & 0x80000) { - offset = ((m_multipcm_bank_l[Chip] & ~0x7) << 16) | (offset & 0x7ffff); + offset = ((m_multipcm_bank_l[Index] & ~0x7) << 16) | (offset & 0x7ffff); } else { - offset = ((m_multipcm_bank_r[Chip] & ~0x7) << 16) | (offset & 0x7ffff); + offset = ((m_multipcm_bank_r[Index] & ~0x7) << 16) | (offset & 0x7ffff); } } } } - return rom_r(Chip, 0x89, offset); + return rom_r(Index, 0x89, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::upd7759_rom_r) { - return rom_r(Chip, 0x8a, m_upd7759_bank[Chip] | offset); + return rom_r(Index, 0x8a, m_upd7759_bank[Index] | offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::okim6295_rom_r) { - if (m_okim6295_nmk112_enable[Chip]) + if (m_okim6295_nmk112_enable[Index]) { - if ((offset < 0x400) && (m_okim6295_nmk112_enable[Chip] & 0x80)) + if ((offset < 0x400) && (m_okim6295_nmk112_enable[Index] & 0x80)) { - offset = (m_okim6295_nmk112_bank[Chip][(offset >> 8) & 0x3] << 16) | (offset & 0x3ff); + offset = (m_okim6295_nmk112_bank[Index][(offset >> 8) & 0x3] << 16) | (offset & 0x3ff); } else { - offset = (m_okim6295_nmk112_bank[Chip][(offset >> 16) & 0x3] << 16) | (offset & 0xffff); + offset = (m_okim6295_nmk112_bank[Index][(offset >> 16) & 0x3] << 16) | (offset & 0xffff); } } else { - offset = (m_okim6295_bank[Chip] * 0x40000) | offset; + offset = (m_okim6295_bank[Index] * 0x40000) | offset; } - return rom_r(Chip, 0x8b, offset); + return rom_r(Index, 0x8b, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::k054539_rom_r) { - return rom_r(Chip, 0x8c, offset); + return rom_r(Index, 0x8c, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::c140_rom_r) { - return rom_r(Chip, 0x8d, offset); + return rom_r(Index, 0x8d, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::k053260_rom_r) { - return rom_r(Chip, 0x8e, offset); + return rom_r(Index, 0x8e, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::qsound_rom_r) { - return rom_r(Chip, 0x8f, offset); + return rom_r(Index, 0x8f, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::es5505_rom_r) { - return rom_r(Chip, 0x90, offset); + return rom_r(Index, 0x90, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::x1_010_rom_r) { - return rom_r(Chip, 0x91, offset); + return rom_r(Index, 0x91, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::c352_rom_r) { - return rom_r(Chip, 0x92, offset); + return rom_r(Index, 0x92, offset); } -template<int Chip> +template<int Index> READ8_MEMBER(vgmplay_device::ga20_rom_r) { - return rom_r(Chip, 0x93, offset); + return rom_r(Index, 0x93, offset); } vgmplay_state::vgmplay_state(const machine_config &mconfig, device_type type, const char *tag) @@ -2433,7 +2550,7 @@ vgmplay_state::vgmplay_state(const machine_config &mconfig, device_type type, co , m_vgmplay(*this, "vgmplay") , m_lspeaker(*this, "lspeaker") , m_rspeaker(*this, "rspeaker") - , m_sn76496(*this, "sn76496.%d", 0) + , m_sn76489(*this, "sn76489.%d", 0) , m_ym2413(*this, "ym2413.%d", 0) , m_ym2612(*this, "ym2612.%d", 0) , m_ym2151(*this, "ym2151.%d", 0) @@ -2591,68 +2708,92 @@ QUICKLOAD_LOAD_MEMBER(vgmplay_state, load_file) uint32_t extra_header_start = version >= 0x170 && data_start >= 0xc0 && r32(0xbc) ? r32(0xbc) + 0xbc : 0; uint32_t header_size = extra_header_start ? extra_header_start : data_start; - // Parse clocks - m_sn76496[0]->set_unscaled_clock(r32(0x0c) & ~0xc0000000); - m_sn76496[1]->set_unscaled_clock((r32(0x0c) & 0x40000000) ? r32(0x0c) & ~0xc0000000 : 0); + uint32_t extra_header_size = extra_header_start ? r32(extra_header_start) : 0; + uint32_t chip_clock_start = extra_header_size >= 4 && r32(extra_header_start + 4) ? r32(extra_header_start + 4) + extra_header_start + 4: 0; + uint32_t chip_volume_start = extra_header_size >= 8 && r32(extra_header_start + 8) ? r32(extra_header_start + 8) + extra_header_start + 8 : 0; - if (r32(0x0c) & 0x80000000) - logerror("Warning: file requests an unsupported T6W28"); + if (chip_volume_start != 0) + osd_printf_warning("Warning: file has unsupported chip volumes\n"); - m_ym2413[0]->set_unscaled_clock(r32(0x10) & ~0xc0000000); - m_ym2413[1]->set_unscaled_clock((r32(0x10) & 0x40000000) ? r32(0x10) & ~0xc0000000 : 0); - if (version >= 0x110 && (r32(0x2c) & 0x80000000)) - logerror("Warning: file requests an unsupported VRC7\n"); + const auto&& setup_device([&](device_t &device, int chip_num, vgm_chip chip_type, uint32_t offset, uint32_t min_version = 0) + { + uint32_t c = 0; - m_ym2612[0]->set_unscaled_clock((version >= 0x110 ? r32(0x2c) : r32(0x10)) & ~0xc0000000); - m_ym2612[1]->set_unscaled_clock(((version >= 0x110 ? r32(0x2c) : r32(0x10)) & 0x40000000) ? (version >= 0x110 ? r32(0x2c) : r32(0x10)) & ~0xc0000000 : 0); - if (version >= 0x110 && (r32(0x2c) & 0x80000000)) - logerror("Warning: file requests an unsupported YM3438\n"); + if (min_version <= version && offset + 4 <= header_size && (chip_num == 0 || (r32(offset) & 0x40000000) != 0)) + { + c = r32(offset); - m_ym2151[0]->set_unscaled_clock((version >= 0x110 ? r32(0x30) : r32(0x10)) & ~0x40000000); - m_ym2151[1]->set_unscaled_clock(((version >= 0x110 ? r32(0x30) : r32(0x10)) & 0x40000000) ? (version >= 0x110 ? r32(0x30) : r32(0x10)) & ~0x40000000 : 0); + if (chip_clock_start && chip_num != 0) + for (auto i(0); i < r8(chip_clock_start); i++) + { + if (r8(chip_clock_start + 1 + (i * 5)) == chip_type) + { + c = r32(chip_clock_start + 2 + (i * 5)); + break; + } + } + } + + device.set_unscaled_clock(c & ~0xc0000000); + + return (c & 0x80000000) != 0; + }); + + // Parse clocks + if (setup_device(*m_sn76489[0], 0, CT_SN76489, 0x0c) || + setup_device(*m_sn76489[1], 1, CT_SN76489, 0x0c)) + osd_printf_warning("Warning: file requests an unsupported T6W28\n"); + + if (setup_device(*m_ym2413[0], 0, CT_YM2413, 0x10) || + setup_device(*m_ym2413[1], 1, CT_YM2413, 0x10)) + osd_printf_warning("Warning: file requests an unsupported VRC7\n"); - m_segapcm[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x3c ? r32(0x38) & ~0x40000000 : 0); - m_segapcm[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x3c && (r32(0x38) & 0x40000000) ? r32(0x38) & ~0x40000000 : 0); + if (setup_device(*m_ym2612[0], 0, CT_YM2612, version < 110 ? 0x10 : 0x2c) || + setup_device(*m_ym2612[1], 1, CT_YM2612, version < 110 ? 0x10 : 0x2c)) + osd_printf_warning("Warning: file requests an unsupported YM3438\n"); + + setup_device(*m_ym2151[0], 0, CT_YM2151, version < 110 ? 0x10 : 0x30); + setup_device(*m_ym2151[1], 1, CT_YM2151, version < 110 ? 0x10 : 0x30); + + setup_device(*m_segapcm[0], 0, CT_SEGAPCM, 0x38, 0x151); + setup_device(*m_segapcm[1], 1, CT_SEGAPCM, 0x38, 0x151); m_segapcm[0]->set_bank(version >= 0x151 && header_size >= 0x40 ? r32(0x3c) : 0); m_segapcm[1]->set_bank(version >= 0x151 && header_size >= 0x40 ? r32(0x3c) : 0); - m_rf5c68->set_unscaled_clock(version >= 0x151 && header_size >= 0x44 ? r32(0x40) : 0); - m_ym2203[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x48 ? r32(0x44) & ~0x40000000 : 0); - m_ym2203[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x48 && (r32(0x44) & 0x40000000) ? r32(0x44) & ~0x40000000 : 0); - m_ym2608[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x4c ? r32(0x48) & ~0x40000000 : 0); - m_ym2608[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x4c && (r32(0x48) & 0x40000000) ? r32(0x48) & ~0x40000000 : 0); - - m_ym2610[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x50 ? r32(0x4c) & ~0xc0000000 : 0); - m_ym2610[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x50 && (r32(0x4c) & 0x40000000) ? r32(0x4c) & ~0xc0000000 : 0); - if (version >= 0x151 && header_size >= 0x50 && (r32(0x4c) & 0x80000000)) - logerror("Warning: file requests an unsupported YM2610B\n"); - - m_ym3812[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x54 ? r32(0x50) & ~0xc0000000 : 0); - m_ym3812[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x54 && (r32(0x50) & 0x40000000) ? r32(0x50) & ~0xc0000000 : 0); - if (version >= 0x151 && header_size >= 0x54 && (r32(0x50) & 0x80000000)) - logerror("Warning: file requests an unsupported SoundBlaster Pro\n"); - - m_ym3526[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x58 ? r32(0x54) & ~0x40000000 : 0); - m_ym3526[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x58 && (r32(0x54) & 0x40000000) ? r32(0x54) & ~0x40000000 : 0); - m_y8950[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x5c ? r32(0x58) & ~0x40000000 : 0); - m_y8950[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x5c && (r32(0x58) & 0x40000000) ? r32(0x58) & ~0x40000000 : 0); - m_ymf262[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x60 ? r32(0x5c) & ~0x40000000 : 0); - m_ymf262[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x60 && (r32(0x5c) & 0x40000000) ? r32(0x5c) & ~0x40000000 : 0); - m_ymf278b[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x64 ? r32(0x60) & ~0x40000000 : 0); - m_ymf278b[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x64 && r32(0x60) & 0x40000000 ? r32(0x60) & ~0x40000000 : 0); - m_ymf271[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x68 ? r32(0x64) & ~0x40000000 : 0); - m_ymf271[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x68 && r32(0x64) & 0x40000000 ? r32(0x64) & ~0x40000000 : 0); - m_ymz280b[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x6c ? r32(0x68) & ~0x40000000 : 0); - m_ymz280b[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x6c && r32(0x68) & 0x40000000 ? r32(0x68) & ~0x40000000 : 0); - - m_rf5c164->set_unscaled_clock(version >= 0x151 && header_size >= 0x70 ? r32(0x6c) & ~0x80000000 : 0); - if (version >= 0x151 && header_size >= 0x70 && (r32(0x6c) & 0x80000000)) - logerror("Warning: file requests an unsupported Cosmic Fantasy Stories HACK\n"); - - m_sega32x->set_unscaled_clock(version >= 0x151 && header_size >= 0x74 && r32(0x70) ? r32(0x70) : 0); - - m_ay8910[0]->set_unscaled_clock(version >= 0x151 && header_size >= 0x78 ? r32(0x74) & ~0x40000000 : 0); - m_ay8910[1]->set_unscaled_clock(version >= 0x151 && header_size >= 0x78 && (r32(0x74) & 0x40000000) ? r32(0x74) & ~0x40000000 : 0); + setup_device(*m_rf5c68, 0, CT_RF5C68, 0x40, 0x151); + setup_device(*m_ym2203[0], 0, CT_YM2203, 0x44, 0x151); + setup_device(*m_ym2203[1], 1, CT_YM2203, 0x44, 0x151); + setup_device(*m_ym2608[0], 0, CT_YM2608, 0x48, 0x151); + setup_device(*m_ym2608[1], 1, CT_YM2608, 0x48, 0x151); + + if (setup_device(*m_ym2610[0], 0, CT_YM2610, 0x4c, 0x151) || + setup_device(*m_ym2610[1], 1, CT_YM2610, 0x4c, 0x151)) + osd_printf_warning("Warning: file requests an unsupported YM2610B\n"); + + if (setup_device(*m_ym3812[0], 0, CT_YM3812, 0x50, 0x151) || + setup_device(*m_ym3812[1], 1, CT_YM3812, 0x50, 0x151)) + osd_printf_warning("Warning: file requests an unsupported SoundBlaster Pro\n"); + + setup_device(*m_ym3526[0], 0, CT_YM3526, 0x54, 0x151); + setup_device(*m_ym3526[1], 1, CT_YM3526, 0x54, 0x151); + setup_device(*m_y8950[0], 0, CT_Y8950, 0x58, 0x151); + setup_device(*m_y8950[1], 1, CT_Y8950, 0x58, 0x151); + setup_device(*m_ymf262[0], 0, CT_YMF262, 0x5c, 0x151); + setup_device(*m_ymf262[1], 1, CT_YMF262, 0x5c, 0x151); + setup_device(*m_ymf278b[0], 0, CT_YMF278B, 0x60, 0x151); + setup_device(*m_ymf278b[1], 1, CT_YMF278B, 0x60, 0x151); + setup_device(*m_ymf271[0], 0, CT_YMF271, 0x64, 0x151); + setup_device(*m_ymf271[1], 1, CT_YMF271, 0x64, 0x151); + setup_device(*m_ymz280b[0], 0, CT_YMZ280B, 0x68, 0x151); + setup_device(*m_ymz280b[1], 1, CT_YMZ280B, 0x68, 0x151); + + if (setup_device(*m_rf5c164, 0, CT_RF5C164, 0x6c, 0x151)) + osd_printf_warning("Warning: file requests an unsupported Cosmic Fantasy Stories HACK\n"); + + setup_device(*m_sega32x, 0, CT_SEGA32X, 0x70, 0x151); + + setup_device(*m_ay8910[0], 0, CT_AY8910, 0x74, 0x151); + setup_device(*m_ay8910[1], 1, CT_AY8910, 0x74, 0x151); m_ay8910[0]->set_psg_type(vgm_ay8910_type(version >= 0x151 && header_size >= 0x7c ? r8(0x78) : 0)); m_ay8910[1]->set_psg_type(vgm_ay8910_type(version >= 0x151 && header_size >= 0x7c ? r8(0x78) : 0)); m_ay8910[0]->set_flags(vgm_ay8910_flags(version >= 0x151 && header_size >= 0x7a ? r8(0x79) : 0)); @@ -2662,25 +2803,25 @@ QUICKLOAD_LOAD_MEMBER(vgmplay_state, load_file) m_ym2608[0]->set_flags(vgm_ay8910_flags(version >= 0x151 && header_size >= 0x7c ? r8(0x7b) : 0)); m_ym2608[1]->set_flags(vgm_ay8910_flags(version >= 0x151 && header_size >= 0x7c ? r8(0x7b) : 0)); - m_dmg[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0x84 ? r32(0x80) & ~0x40000000 : 0); - m_dmg[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0x84 && (r32(0x80) & 0x40000000) ? r32(0x80) & ~0x40000000 : 0); - m_nescpu[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0x88 ? r32(0x84) & ~0xc0000000 : 0); - m_nescpu[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0x88 && (r32(0x84) & 0x40000000) ? r32(0x84) & ~0xc0000000 : 0); - if (version >= 0x161 && header_size >= 0x88 && (r32(0x84) & 0x80000000)) - logerror("Warning: file requests an unsupported FDS sound addon\n"); + setup_device(*m_dmg[0], 0, CT_GAMEBOY, 0x80, 0x161); + setup_device(*m_dmg[1], 1, CT_GAMEBOY, 0x80, 0x161); + + if (setup_device(*m_nescpu[0], 0, CT_NESAPU, 0x84, 0x161) || + setup_device(*m_nescpu[1], 1, CT_NESAPU, 0x84, 0x161)) + osd_printf_warning("Warning: file requests an unsupported FDS sound addon\n"); - m_multipcm[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0x8c ? r32(0x88) & ~0x40000000 : 0); - m_multipcm[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0x8c && (r32(0x88) & 0x40000000) ? r32(0x88) & ~0x40000000 : 0); + setup_device(*m_multipcm[0], 0, CT_MULTIPCM, 0x88, 0x161); + setup_device(*m_multipcm[1], 1, CT_MULTIPCM, 0x88, 0x161); - m_upd7759[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0x90 ? r32(0x8c) & ~0xc0000000 : 0); - m_upd7759[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0x90 && (r32(0x8c) & 0x40000000) ? r32(0x8c) & ~0xc0000000 : 0); + setup_device(*m_upd7759[0], 0, CT_UPD7759, 0x8c, 0x161); + setup_device(*m_upd7759[1], 1, CT_UPD7759, 0x8c, 0x161); m_upd7759_md[0] = r32(0x8c) & 0x80000000 ? 0 : 1; m_upd7759_md[1] = r32(0x8c) & 0x80000000 ? 0 : 1; m_upd7759[0]->md_w(m_upd7759_md[0]); m_upd7759[1]->md_w(m_upd7759_md[1]); - m_okim6258[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0x94 ? r32(0x90) & ~0x40000000 : 0); - m_okim6258[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0x94 && (r32(0x90) & 0x40000000) ? r32(0x90) & ~0x40000000 : 0); + setup_device(*m_okim6258[0], 0, CT_OKIM6258, 0x90, 0x161); + setup_device(*m_okim6258[1], 1, CT_OKIM6258, 0x90, 0x161); uint8_t okim6258_flags = version >= 0x161 && header_size >= 0x95 ? r8(0x94) : 0; m_okim6258_divider[0] = okim6258_flags & 3; @@ -2698,78 +2839,58 @@ QUICKLOAD_LOAD_MEMBER(vgmplay_state, load_file) m_c140[0]->set_bank_type(c140_bank_type(version >= 0x161 && header_size >= 0x96 ? r8(0x96) : 0)); m_c140[1]->set_bank_type(c140_bank_type(version >= 0x161 && header_size >= 0x96 ? r8(0x96) : 0)); - m_okim6295_clock[0] = version >= 0x161 && header_size >= 0x9c ? r32(0x98) & ~0xc0000000 : 0; - m_okim6295_clock[1] = version >= 0x161 && header_size >= 0x9c && (r32(0x98) & 0x40000000) ? r32(0x98) & ~0xc0000000 : 0; - m_okim6295[0]->set_unscaled_clock(m_okim6295_clock[0]); - m_okim6295[1]->set_unscaled_clock(m_okim6295_clock[1]); - - m_okim6295_pin7[0] = version >= 0x161 && header_size >= 0x9c && (r32(0x98) & 0x80000000) ? 1 : 0; - m_okim6295_pin7[1] = version >= 0x161 && header_size >= 0x9c && (r32(0x98) & 0x40000000) && (r32(0x98) & 0x80000000) ? 1 : 0; + m_okim6295_pin7[0] = setup_device(*m_okim6295[0], 0, CT_OKIM6295, 0x98, 0x161); + m_okim6295_pin7[1] = setup_device(*m_okim6295[1], 1, CT_OKIM6295, 0x98, 0x161); m_okim6295[0]->set_pin7(m_okim6295_pin7[0] ? okim6295_device::PIN7_HIGH : okim6295_device::PIN7_LOW); m_okim6295[1]->set_pin7(m_okim6295_pin7[1] ? okim6295_device::PIN7_HIGH : okim6295_device::PIN7_LOW); - m_k051649[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xa0 ? r32(0x9c) & ~0xc0000000 : 0); - m_k051649[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xa0 && (r32(0x9c) & 0x40000000) ? r32(0x9c) & ~0xc0000000 : 0); - if (version >= 0x161 && header_size >= 0xa0 && (r32(0x9c) & 0x80000000)) - logerror("Warning: file requests an unsupported Konami SCC\n"); + if (setup_device(*m_k051649[0], 0, CT_K051649, 0x9c, 0x161) || + setup_device(*m_k051649[1], 1, CT_K051649, 0x9c, 0x161)) + osd_printf_warning("Warning: file requests an unsupported Konami SCC\n"); + + setup_device(*m_k054539[0], 0, CT_K054539, 0xa0, 0x161); + setup_device(*m_k054539[1], 1, CT_K054539, 0xa0, 0x161); // HACK: Some VGMs contain 48,000 instead of 18,432,000 - if (version >= 0x161 && header_size >= 0xa4 && (r32(0xa0) & ~0x40000000) == 48000) - { + m_k054539[0]->set_clock_scale(m_k054539[0]->unscaled_clock() == 48000 ? 384.0 : 1.0); + m_k054539[1]->set_clock_scale(m_k054539[1]->unscaled_clock() == 48000 ? 384.0 : 1.0); + if (m_k054539[0]->unscaled_clock() == 48000 || m_k054539[1]->unscaled_clock() == 48000) osd_printf_error("bad rip detected, correcting k054539 clock\n"); - m_k054539[0]->set_clock_scale(384); - m_k054539[1]->set_clock_scale(384); - } - - m_k054539[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xa4 ? r32(0xa0) & ~0x40000000 : 0); - m_k054539[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xa4 && (r32(0xa0) & 0x40000000) ? r32(0xa0) & ~0x40000000 : 0); // HACK: VGM contain the halved clock speed of the sound core inside the HUC6280 m_huc6280[0]->set_clock_scale(2); m_huc6280[1]->set_clock_scale(2); - m_huc6280[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xa8 ? r32(0xa4) & ~0x40000000 : 0); - m_huc6280[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xa8 && (r32(0xa4) & 0x40000000) ? r32(0xa4) & ~0x40000000 : 0); - - m_c140[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xac ? r32(0xa8) & ~0x40000000 : 0); - m_c140[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xac && (r32(0xa8) & 0x40000000) ? r32(0xa8) & ~0x40000000 : 0); + setup_device(*m_huc6280[0], 0, CT_C6280, 0xa4, 0x161); + setup_device(*m_huc6280[1], 1, CT_C6280, 0xa4, 0x161); + setup_device(*m_c140[0], 0, CT_C140, 0xa8, 0x161); + setup_device(*m_c140[1], 1, CT_C140, 0xa8, 0x161); + setup_device(*m_k053260[0], 0, CT_K053260, 0xac, 0x161); + setup_device(*m_k053260[1], 1, CT_K053260, 0xac, 0x161); + setup_device(*m_pokey[0], 0, CT_POKEY, 0xb0, 0x161); + setup_device(*m_pokey[1], 1, CT_POKEY, 0xb0, 0x161); - m_k053260[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xb0 ? r32(0xac) & ~0x40000000 : 0); - m_k053260[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xb0 && (r32(0xac) & 0x40000000) ? r32(0xac) & ~0x40000000 : 0); - - m_pokey[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xb4 ? r32(0xb0) & ~0x40000000 : 0); - m_pokey[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xb4 && (r32(0xb0) & 0x40000000) ? r32(0xb0) & ~0x40000000 : 0); + setup_device(*m_qsound, 0, CT_QSOUND, 0xb4, 0x161); // HACK: VGMs contain 4,000,000 instead of 60,000,000 - if (version >= 0x161 && header_size >= 0xb8 && r32(0xb4) == 4000000) - { + m_qsound->set_clock_scale(m_qsound->unscaled_clock() == 4000000 ? 15.0 : 1.0); + if (m_qsound->unscaled_clock() == 4000000) osd_printf_error("bad rip detected, correcting qsound clock\n"); - m_qsound->set_clock_scale(15); - } - - m_qsound->set_unscaled_clock(version >= 0x161 && header_size >= 0xb8 ? r32(0xb4) : 0); - m_scsp[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xbc ? r32(0xb8) & ~0x40000000 : 0); - m_scsp[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xbc && (r32(0xb8) & 0x40000000) ? r32(0xb8) & ~0x40000000 : 0); - - if (version >= 0x170 && header_size >= 0xc0 && r32(0xbc)) - logerror("Warning: file requests an unsupported Extra Header\n"); - - m_wswan[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xc4 ? r32(0xc0) & ~0x40000000 : 0); - m_wswan[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xc4 && (r32(0xc0) & 0x40000000) ? r32(0xc0) & ~0x40000000 : 0); - - m_vsu_vue[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xc8 ? r32(0xc4) & ~0x40000000 : 0); - m_vsu_vue[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xc8 && (r32(0xc4) & 0x40000000) ? r32(0xc4) & ~0x40000000 : 0); - - m_saa1099[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xcc ? r32(0xc8) & ~0x40000000 : 0); - m_saa1099[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xcc && (r32(0xc8) & 0x40000000) ? r32(0xc8) & ~0x40000000 : 0); - - m_es5503[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xd0 ? r32(0xcc) & ~0x40000000 : 0); - m_es5503[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xd0 && (r32(0xcc) & 0x40000000) ? r32(0xcc) & ~0x40000000 : 0); - m_es5505[0]->set_unscaled_clock(version >= 0x161 && header_size >= 0xd4 ? r32(0xd0) & ~0x40000000 : 0); - m_es5505[1]->set_unscaled_clock(version >= 0x161 && header_size >= 0xd4 && (r32(0xd0) & 0x40000000) ? r32(0xd0) & ~0x40000000 : 0); - if (version >= 0x171 && header_size >= 0xd4 && r32(0xd0) & 0x80000000) - logerror("Warning: file requests an unsupported ES5506\n"); + setup_device(*m_scsp[0], 0, CT_SCSP, 0xb8, 0x171); + setup_device(*m_scsp[1], 1, CT_SCSP, 0xb8, 0x171); + setup_device(*m_wswan[0], 0, CT_WSWAN, 0xc0, 0x171); + setup_device(*m_wswan[1], 1, CT_WSWAN, 0xc0, 0x171); + setup_device(*m_vsu_vue[0], 0, CT_VSU_VUE, 0xc4, 0x171); + setup_device(*m_vsu_vue[1], 1, CT_VSU_VUE, 0xc4, 0x171); + setup_device(*m_saa1099[0], 0, CT_SAA1099, 0xc8, 0x171); + setup_device(*m_saa1099[1], 1, CT_SAA1099, 0xc8, 0x171); + setup_device(*m_es5503[0], 0, CT_ES5503, 0xcc, 0x171); + setup_device(*m_es5503[1], 1, CT_ES5503, 0xcc, 0x171); + + if (setup_device(*m_es5505[0], 0, CT_ES5505, 0xd0, 0x171) || + setup_device(*m_es5505[1], 1, CT_ES5503, 0xd0, 0x171)) + osd_printf_warning("Warning: file requests an unsupported ES5506\n"); // TODO: dynamically remap es5503/es5505 channels? //m_es5503[0]->set_channels(version >= 0x171 && header_size >= 0xd5 ? r8(0xd4) : 0); @@ -2780,16 +2901,15 @@ QUICKLOAD_LOAD_MEMBER(vgmplay_state, load_file) m_c352[0]->set_divider(version >= 0x171 && header_size >= 0xd7 && r8(0xd6) ? r8(0xd6) * 4 : 1); m_c352[1]->set_divider(version >= 0x171 && header_size >= 0xd7 && r8(0xd6) ? r8(0xd6) * 4 : 1); - m_x1_010[0]->set_unscaled_clock(version >= 0x171 && header_size >= 0xdc ? r32(0xd8) & ~0x40000000 : 0); - m_x1_010[1]->set_unscaled_clock(version >= 0x171 && header_size >= 0xdc && (r32(0xd8) & 0x40000000) ? r32(0xd8) & ~0x40000000 : 0); + setup_device(*m_x1_010[0], 0, CT_X1_010, 0xd8, 0x171); + setup_device(*m_x1_010[1], 1, CT_X1_010, 0xd8, 0x171); - m_c352[0]->set_unscaled_clock(version >= 0x171 && header_size >= 0xe0 ? r32(0xdc) & ~0xc0000000 : 0); - m_c352[1]->set_unscaled_clock(version >= 0x171 && header_size >= 0xe0 && (r32(0xdc) & 0x40000000) ? r32(0xdc) & ~0xc0000000 : 0); - if (version >= 0x171 && header_size >= 0xe0 && r32(0xdc) & 0x80000000) - logerror("Warning: file requests an unsupported disable rear speakers\n"); + if (setup_device(*m_c352[0], 0, CT_C352, 0xdc, 0x171) || + setup_device(*m_c352[1], 1, CT_C352, 0xdc, 0x171)) + osd_printf_warning("Warning: file requests an unsupported disable rear speakers\n"); - m_ga20[0]->set_unscaled_clock(version >= 0x171 && header_size >= 0xe4 ? r32(0xe0) & ~0x40000000 : 0); - m_ga20[1]->set_unscaled_clock(version >= 0x171 && header_size >= 0xe4 && (r32(0xe0) & 0x40000000) ? r32(0xe0) & ~0x40000000 : 0); + setup_device(*m_ga20[0], 0, CT_GA20, 0xe0, 0x171); + setup_device(*m_ga20[1], 1, CT_GA20, 0xe0, 0x171); for (device_t &child : subdevices()) if (child.clock() != 0) @@ -2818,175 +2938,171 @@ READ8_MEMBER(vgmplay_state::file_size_r) return size >> (8 * offset); } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_device::multipcm_bank_hi_w) { if (offset & 1) - m_multipcm_bank_l[Chip] = (m_multipcm_bank_l[Chip] & 0xff) | (data << 16); + m_multipcm_bank_l[Index] = (m_multipcm_bank_l[Index] & 0xff) | (data << 16); if (offset & 2) - m_multipcm_bank_r[Chip] = (m_multipcm_bank_r[Chip] & 0xff) | (data << 16); + m_multipcm_bank_r[Index] = (m_multipcm_bank_r[Index] & 0xff) | (data << 16); } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_device::multipcm_bank_lo_w) { if (offset & 1) - m_multipcm_bank_l[Chip] = (m_multipcm_bank_l[Chip] & 0xff00) | data; + m_multipcm_bank_l[Index] = (m_multipcm_bank_l[Index] & 0xff00) | data; if (offset & 2) - m_multipcm_bank_r[Chip] = (m_multipcm_bank_r[Chip] & 0xff00) | data; + m_multipcm_bank_r[Index] = (m_multipcm_bank_r[Index] & 0xff00) | data; - m_multipcm_banked[Chip] = 1; + m_multipcm_banked[Index] = 1; } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::upd7759_reset_w) { int reset = data != 0; - m_upd7759[Chip]->reset_w(reset); + m_upd7759[Index]->reset_w(reset); - if (m_upd7759_reset[Chip] != reset) + if (m_upd7759_reset[Index] != reset) { - m_upd7759_reset[Chip] = reset; + m_upd7759_reset[Index] = reset; if (!reset) - std::queue<uint8_t>().swap(m_upd7759_slave_data[Chip]); + std::queue<uint8_t>().swap(m_upd7759_slave_data[Index]); } } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::upd7759_data_w) { - if (!m_upd7759_md[Chip] && !m_upd7759_drq[Chip]) + if (!m_upd7759_md[Index] && !m_upd7759_drq[Index]) { - m_upd7759_slave_data[Chip].push(data); + m_upd7759_slave_data[Index].push(data); } else { - m_upd7759[Chip]->port_w(data); - m_upd7759_drq[Chip] = 0; + m_upd7759[Index]->port_w(data); + m_upd7759_drq[Index] = 0; } } -template<int Chip> +template<int Index> WRITE_LINE_MEMBER(vgmplay_state::upd7759_drq_w) { - if (m_upd7759_drq[Chip] && !state) - osd_printf_error("upd7759.%d underflow\n", Chip); + if (m_upd7759_drq[Index] && !state) + osd_printf_error("upd7759.%d underflow\n", Index); - m_upd7759_drq[Chip] = state; + m_upd7759_drq[Index] = state; - if (!m_upd7759_md[Chip] && m_upd7759_drq[Chip] && !m_upd7759_slave_data[Chip].empty()) + if (!m_upd7759_md[Index] && m_upd7759_drq[Index] && !m_upd7759_slave_data[Index].empty()) { - const uint8_t data(m_upd7759_slave_data[Chip].front()); - m_upd7759_slave_data[Chip].pop(); - m_upd7759[Chip]->port_w(data); - m_upd7759_drq[Chip] = 0; + const uint8_t data(m_upd7759_slave_data[Index].front()); + m_upd7759_slave_data[Index].pop(); + m_upd7759[Index]->port_w(data); + m_upd7759_drq[Index] = 0; } } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_device::upd7759_bank_w) { // TODO: upd7759 update stream - m_upd7759_bank[Chip] = data * 0x20000; + m_upd7759_bank[Index] = data * 0x20000; } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::okim6258_clock_w) { - uint32_t old = m_okim6258_clock[Chip]; int shift = ((offset & 3) << 3); - m_okim6258_clock[Chip] = (m_okim6258_clock[Chip] & ~(mem_mask << shift)) | ((data & mem_mask) << shift); - if (old != m_okim6258_clock[Chip]) - m_okim6258[Chip]->set_unscaled_clock(m_okim6258_clock[Chip]); + uint32_t c = (m_okim6258[Index]->unscaled_clock() & ~(mem_mask << shift)) | ((data & mem_mask) << shift); + m_okim6258[Index]->set_unscaled_clock(c); } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::okim6258_divider_w) { - if ((data & mem_mask) != (m_okim6258_divider[Chip] & mem_mask)) + if ((data & mem_mask) != (m_okim6258_divider[Index] & mem_mask)) { - COMBINE_DATA(&m_okim6258_divider[Chip]); - m_okim6258[Chip]->set_divider(m_okim6258_divider[Chip]); + COMBINE_DATA(&m_okim6258_divider[Index]); + m_okim6258[Index]->set_divider(m_okim6258_divider[Index]); } } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::okim6295_clock_w) { - uint32_t old = m_okim6295_clock[Chip]; int shift = ((offset & 3) << 3); - m_okim6295_clock[Chip] = (m_okim6295_clock[Chip] & ~(mem_mask << shift)) | ((data & mem_mask) << shift); - if (old != m_okim6295_clock[Chip]) - m_okim6295[Chip]->set_unscaled_clock(m_okim6295_clock[Chip]); + uint32_t c = (m_okim6295[Index]->unscaled_clock() & ~(mem_mask << shift)) | ((data & mem_mask) << shift); + m_okim6295[Index]->set_unscaled_clock(c); } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::okim6295_pin7_w) { - if ((data & mem_mask) != (m_okim6295_pin7[Chip] & mem_mask)) + if ((data & mem_mask) != (m_okim6295_pin7[Index] & mem_mask)) { - COMBINE_DATA(&m_okim6295_pin7[Chip]); - m_okim6295[Chip]->set_pin7(m_okim6295_pin7[Chip]); + COMBINE_DATA(&m_okim6295_pin7[Index]); + m_okim6295[Index]->set_pin7(m_okim6295_pin7[Index]); } } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_device::okim6295_nmk112_enable_w) { - COMBINE_DATA(&m_okim6295_nmk112_enable[Chip]); + COMBINE_DATA(&m_okim6295_nmk112_enable[Index]); } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_device::okim6295_bank_w) { - if ((data & mem_mask) != (m_okim6295_bank[Chip] & mem_mask)) + if ((data & mem_mask) != (m_okim6295_bank[Index] & mem_mask)) { - COMBINE_DATA(&m_okim6295_bank[Chip]); + COMBINE_DATA(&m_okim6295_bank[Index]); } } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_device::okim6295_nmk112_bank_w) { offset &= 3; - if ((data & mem_mask) != (m_okim6295_nmk112_bank[Chip][offset] & mem_mask)) + if ((data & mem_mask) != (m_okim6295_nmk112_bank[Index][offset] & mem_mask)) { - COMBINE_DATA(&m_okim6295_nmk112_bank[Chip][offset]); + COMBINE_DATA(&m_okim6295_nmk112_bank[Index][offset]); } } -template<int Chip> +template<int Index> WRITE8_MEMBER(vgmplay_state::scc_w) { switch (offset & 1) { case 0x00: - m_scc_reg[Chip] = data; + m_scc_reg[Index] = data; break; case 0x01: switch (offset >> 1) { case 0x00: - m_k051649[Chip]->k051649_waveform_w(space, m_scc_reg[Chip], data); + m_k051649[Index]->k051649_waveform_w(space, m_scc_reg[Index], data); break; case 0x01: - m_k051649[Chip]->k051649_frequency_w(space, m_scc_reg[Chip], data); + m_k051649[Index]->k051649_frequency_w(space, m_scc_reg[Index], data); break; case 0x02: - m_k051649[Chip]->k051649_volume_w(space, m_scc_reg[Chip], data); + m_k051649[Index]->k051649_volume_w(space, m_scc_reg[Index], data); break; case 0x03: - m_k051649[Chip]->k051649_keyonoff_w(space, m_scc_reg[Chip], data); + m_k051649[Index]->k051649_keyonoff_w(space, m_scc_reg[Index], data); break; case 0x04: - m_k051649[Chip]->k052539_waveform_w(space, m_scc_reg[Chip], data); + m_k051649[Index]->k052539_waveform_w(space, m_scc_reg[Index], data); break; case 0x05: - m_k051649[Chip]->k051649_test_w(space, m_scc_reg[Chip], data); + m_k051649[Index]->k051649_test_w(space, m_scc_reg[Index], data); break; } break; @@ -3036,10 +3152,10 @@ void vgmplay_state::file_map(address_map &map) void vgmplay_state::soundchips_map(address_map &map) { map(vgmplay_device::REG_SIZE, vgmplay_device::REG_SIZE + 3).r(FUNC(vgmplay_state::file_size_r)); - map(vgmplay_device::A_SN76496_0 + 0, vgmplay_device::A_SN76496_0 + 0).w(m_sn76496[0], FUNC(sn76496_device::command_w)); - //map(vgmplay_device::A_SN76496_0 + 1, vgmplay_device::A_SN76496_0 + 1).w(m_sn76496[0], FUNC(sn76496_device::stereo_w)); // TODO: GG stereo - map(vgmplay_device::A_SN76496_1 + 0, vgmplay_device::A_SN76496_1 + 0).w(m_sn76496[1], FUNC(sn76496_device::command_w)); - //map(vgmplay_device::A_SN76496_1 + 1, vgmplay_device::A_SN76496_1 + 1).w(m_sn76496[1], FUNC(sn76496_device::stereo_w)); // TODO: GG stereo + map(vgmplay_device::A_SN76489_0 + 0, vgmplay_device::A_SN76489_0 + 0).w(m_sn76489[0], FUNC(sn76489_device::command_w)); + //map(vgmplay_device::A_SN76489_0 + 1, vgmplay_device::A_SN76489_0 + 1).w(m_sn76489[0], FUNC(sn76489_device::stereo_w)); // TODO: GG stereo + map(vgmplay_device::A_SN76489_1 + 0, vgmplay_device::A_SN76489_1 + 0).w(m_sn76489[1], FUNC(sn76489_device::command_w)); + //map(vgmplay_device::A_SN76489_1 + 1, vgmplay_device::A_SN76489_1 + 1).w(m_sn76489[1], FUNC(sn76489_device::stereo_w)); // TODO: GG stereo map(vgmplay_device::A_YM2413_0, vgmplay_device::A_YM2413_0 + 1).w(m_ym2413[0], FUNC(ym2413_device::write)); map(vgmplay_device::A_YM2413_1, vgmplay_device::A_YM2413_1 + 1).w(m_ym2413[1], FUNC(ym2413_device::write)); map(vgmplay_device::A_YM2612_0, vgmplay_device::A_YM2612_0 + 3).w(m_ym2612[0], FUNC(ym2612_device::write)); @@ -3163,127 +3279,151 @@ void vgmplay_state::soundchips16_map(address_map &map) map(vgmplay_device::A_C352_1, vgmplay_device::A_C352_1 + 0x7fff).w(m_c352[1], FUNC(c352_device::write)); } -template<int Chip> +template<int Index> void vgmplay_state::segapcm_map(address_map &map) { - map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::segapcm_rom_r<Chip>)); + map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::segapcm_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::rf5c68_map(address_map &map) { - map(0, 0xffff).ram().share(Chip ? "rf5c68_ram.1" : "rf5c68_ram.0"); + map(0, 0xffff).ram().share(Index ? "rf5c68_ram.1" : "rf5c68_ram.0"); +} + +template<int Index> +void vgmplay_state::ym2608_map(address_map &map) +{ + map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::ym2608_rom_r<Index>)); +} + +template<int Index> +void vgmplay_state::ym2610_adpcm_a_map(address_map &map) +{ + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::ym2610_adpcm_a_rom_r<Index>)); +} + +template<int Index> +void vgmplay_state::ym2610_adpcm_b_map(address_map &map) +{ + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::ym2610_adpcm_b_rom_r<Index>)); +} + +template<int Index> +void vgmplay_state::y8950_map(address_map &map) +{ + map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::y8950_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::ymf278b_map(address_map &map) { - map(0, 0x3fffff).r("vgmplay", FUNC(vgmplay_device::ymf278b_rom_r<Chip>)); + map(0, 0x3fffff).r("vgmplay", FUNC(vgmplay_device::ymf278b_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::ymf271_map(address_map &map) { - map(0, 0x7fffff).r("vgmplay", FUNC(vgmplay_device::ymf271_rom_r<Chip>)); + map(0, 0x7fffff).r("vgmplay", FUNC(vgmplay_device::ymf271_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::ymz280b_map(address_map &map) { - map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::ymz280b_rom_r<Chip>)); + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::ymz280b_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::nescpu_map(address_map &map) { - map(0, 0xffff).ram().share(Chip ? "nesapu_ram.1" : "nesapu_ram.0"); + map(0, 0xffff).ram().share(Index ? "nesapu_ram.1" : "nesapu_ram.0"); } -template<int Chip> +template<int Index> void vgmplay_state::multipcm_map(address_map &map) { - map(0, 0x3fffff).r("vgmplay", FUNC(vgmplay_device::multipcm_rom_r<Chip>)); + map(0, 0x3fffff).r("vgmplay", FUNC(vgmplay_device::multipcm_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::upd7759_map(address_map &map) { - map(0, 0x1ffff).r("vgmplay", FUNC(vgmplay_device::upd7759_rom_r<Chip>)); + map(0, 0x1ffff).r("vgmplay", FUNC(vgmplay_device::upd7759_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::okim6295_map(address_map &map) { - map(0, 0x3ffff).r("vgmplay", FUNC(vgmplay_device::okim6295_rom_r<Chip>)); + map(0, 0x3ffff).r("vgmplay", FUNC(vgmplay_device::okim6295_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::k054539_map(address_map &map) { - map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::k054539_rom_r<Chip>)); + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::k054539_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::c140_map(address_map &map) { - map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::c140_rom_r<Chip>)); + map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::c140_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::k053260_map(address_map &map) { - map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::k053260_rom_r<Chip>)); + map(0, 0x1fffff).r("vgmplay", FUNC(vgmplay_device::k053260_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::qsound_map(address_map &map) { - map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::qsound_rom_r<Chip>)); + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::qsound_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::scsp_map(address_map &map) { - map(0, 0xfffff).ram().share(Chip ? "scsp_ram.1" : "scsp_ram.0"); + map(0, 0xfffff).ram().share(Index ? "scsp_ram.1" : "scsp_ram.0"); } -template<int Chip> +template<int Index> void vgmplay_state::wswan_map(address_map &map) { - map(0, 0x3fff).ram().share(Chip ? "wswan_ram.1" : "wswan_ram.0"); + map(0, 0x3fff).ram().share(Index ? "wswan_ram.1" : "wswan_ram.0"); } -template<int Chip> +template<int Index> void vgmplay_state::es5503_map(address_map &map) { - map(0, 0x1ffff).ram().share(Chip ? "es5503_ram.1" : "es5503_ram.0"); + map(0, 0x1ffff).ram().share(Index ? "es5503_ram.1" : "es5503_ram.0"); } -template<int Chip> +template<int Index> void vgmplay_state::es5505_map(address_map &map) { - map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::es5505_rom_r<Chip>)); + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::es5505_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::x1_010_map(address_map &map) { - map(0, 0xfffff).r("vgmplay", FUNC(vgmplay_device::x1_010_rom_r<Chip>)); + map(0, 0xfffff).r("vgmplay", FUNC(vgmplay_device::x1_010_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::c352_map(address_map &map) { - map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::c352_rom_r<Chip>)); + map(0, 0xffffff).r("vgmplay", FUNC(vgmplay_device::c352_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::ga20_map(address_map &map) { - map(0, 0xfffff).r("vgmplay", FUNC(vgmplay_device::ga20_rom_r<Chip>)); + map(0, 0xfffff).r("vgmplay", FUNC(vgmplay_device::ga20_rom_r<Index>)); } -template<int Chip> +template<int Index> void vgmplay_state::rf5c164_map(address_map &map) { map(0, 0xffff).ram().share("rf5c164_ram"); @@ -3302,13 +3442,13 @@ MACHINE_CONFIG_START(vgmplay_state::vgmplay) config.set_default_layout(layout_vgmplay); - SN76496(config, m_sn76496[0], 0); - m_sn76496[0]->add_route(0, "lspeaker", 0.5); - m_sn76496[0]->add_route(0, "rspeaker", 0.5); + SN76489(config, m_sn76489[0], 0); + m_sn76489[0]->add_route(0, "lspeaker", 0.5); + m_sn76489[0]->add_route(0, "rspeaker", 0.5); - SN76496(config, m_sn76496[1], 0); - m_sn76496[1]->add_route(0, "lspeaker", 0.5); - m_sn76496[1]->add_route(0, "rspeaker", 0.5); + SN76489(config, m_sn76489[1], 0); + m_sn76489[1]->add_route(0, "lspeaker", 0.5); + m_sn76489[1]->add_route(0, "rspeaker", 0.5); YM2413(config, m_ym2413[0], 0); m_ym2413[0]->add_route(ALL_OUTPUTS, "lspeaker", 1); @@ -3360,21 +3500,27 @@ MACHINE_CONFIG_START(vgmplay_state::vgmplay) // TODO: prevent error.log spew YM2608(config, m_ym2608[0], 0); + m_ym2608[0]->set_addrmap(0, &vgmplay_state::ym2608_map<0>); m_ym2608[0]->add_route(ALL_OUTPUTS, "lspeaker", 1); m_ym2608[0]->add_route(ALL_OUTPUTS, "rspeaker", 1); YM2608(config, m_ym2608[1], 0); + m_ym2608[1]->set_addrmap(0, &vgmplay_state::ym2608_map<1>); m_ym2608[1]->add_route(ALL_OUTPUTS, "lspeaker", 1); m_ym2608[1]->add_route(ALL_OUTPUTS, "rspeaker", 1); // TODO: prevent error.log spew YM2610(config, m_ym2610[0], 0); + m_ym2610[0]->set_addrmap(0, &vgmplay_state::ym2610_adpcm_a_map<0>); + m_ym2610[0]->set_addrmap(1, &vgmplay_state::ym2610_adpcm_b_map<0>); m_ym2610[0]->add_route(0, "lspeaker", 0.25); m_ym2610[0]->add_route(0, "rspeaker", 0.25); m_ym2610[0]->add_route(1, "lspeaker", 0.50); m_ym2610[0]->add_route(2, "rspeaker", 0.50); YM2610(config, m_ym2610[1], 0); + m_ym2610[1]->set_addrmap(0, &vgmplay_state::ym2610_adpcm_a_map<1>); + m_ym2610[1]->set_addrmap(1, &vgmplay_state::ym2610_adpcm_b_map<1>); m_ym2610[1]->add_route(0, "lspeaker", 0.25); m_ym2610[1]->add_route(0, "rspeaker", 0.25); m_ym2610[1]->add_route(1, "lspeaker", 0.50); @@ -3397,10 +3543,12 @@ MACHINE_CONFIG_START(vgmplay_state::vgmplay) m_ym3526[1]->add_route(ALL_OUTPUTS, "rspeaker", 0.5); Y8950(config, m_y8950[0], 0); + m_y8950[0]->set_addrmap(0, &vgmplay_state::y8950_map<0>); m_y8950[0]->add_route(ALL_OUTPUTS, "lspeaker", 0.40); m_y8950[0]->add_route(ALL_OUTPUTS, "rspeaker", 0.40); Y8950(config, m_y8950[1], 0); + m_y8950[1]->set_addrmap(0, &vgmplay_state::y8950_map<1>); m_y8950[1]->add_route(ALL_OUTPUTS, "lspeaker", 0.40); m_y8950[1]->add_route(ALL_OUTPUTS, "rspeaker", 0.40); @@ -3693,13 +3841,6 @@ MACHINE_CONFIG_START(vgmplay_state::vgmplay) MACHINE_CONFIG_END ROM_START( vgmplay ) - // TODO: change sound cores to device_rom_interface - ROM_REGION( 0x80000, "ym2608.0", ROMREGION_ERASE00 ) - ROM_REGION( 0x80000, "ym2608.1", ROMREGION_ERASE00 ) - ROM_REGION( 0x80000, "ym2610.0", ROMREGION_ERASE00 ) - ROM_REGION( 0x80000, "ym2610.1", ROMREGION_ERASE00 ) - ROM_REGION( 0x80000, "y8950.0", ROMREGION_ERASE00 ) - ROM_REGION( 0x80000, "y8950.1", ROMREGION_ERASE00 ) // TODO: split up 32x to remove dependencies ROM_REGION( 0x4000, "master", ROMREGION_ERASE00 ) ROM_REGION( 0x4000, "slave", ROMREGION_ERASE00 ) diff --git a/src/mame/drivers/video21.cpp b/src/mame/drivers/video21.cpp index f5841df44fb..ad3de2983cc 100644 --- a/src/mame/drivers/video21.cpp +++ b/src/mame/drivers/video21.cpp @@ -1,34 +1,36 @@ // license:BSD-3-Clause -// copyright-holders:Robbbert +// copyright-holders:Robbbert, hap /**************************************************************************************** 2018-09-15 -Video 21 blackjack game. Thanks to hap who figured out the inputs and the name of the game. - +Video 21 blackjack game VIDEO-GAMES - LICH/GERMANY 1017a -NEC D8080AFC (i8080), unknown xtal, bank of 7 dips. 10x 4-bit proms, type F93453 (=82S137) +NEC D8080AFC (i8080), 20.79MHz xtal, bank of 7 dips. 10x 4-bit proms, type F93453 (=82S137) Video Ram = 7 x 2102 (bit 7 omitted). Main Ram = 2x MCM145101 (=M5101L). The game has sound (there's a LM380N visible), looks like there's a bunch of TTL chips involved, and a 555. -To Do: -- Sound -- CPU clock -- unknown status bits? eg. hopper -- color overlay as seen on flyer upright cabinet - -When booted, press W to get it going. +TODO: +- improve sound, it's definitely beeper pitch control, but sounds offtune +- identify all dips (7 total) +- confirm CPU clock +When booted, press Key out (mapped to W by default) to get it going. *******************************************************************************************/ #include "emu.h" #include "cpu/i8085/i8085.h" +#include "machine/nvram.h" +#include "sound/beep.h" + #include "screen.h" #include "emupal.h" +#include "speaker.h" +#include "video21.lh" class video21_state : public driver_device { @@ -38,18 +40,35 @@ public: , m_maincpu(*this,"maincpu") , m_p_videoram(*this, "videoram") , m_p_chargen(*this, "chargen") + , m_beeper(*this, "beeper") + , m_lamps(*this, "lamp%u", 0U) { } void video21(machine_config &config); + DECLARE_CUSTOM_INPUT_MEMBER(hopper_coinout_r); + +protected: + virtual void machine_start() override; private: + DECLARE_WRITE8_MEMBER(sound_w); + DECLARE_WRITE8_MEMBER(lamp1_w); + DECLARE_WRITE8_MEMBER(lamp2_w); + + int m_hopper_motor; + int m_hopper_coin; + emu_timer *m_hopper_timer; + TIMER_CALLBACK_MEMBER(hopper_coinout); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void mem_map(address_map &map); void io_map(address_map &map); + required_device<cpu_device> m_maincpu; required_shared_ptr<u8> m_p_videoram; required_region_ptr<u8> m_p_chargen; + optional_device<beep_device> m_beeper; + output_finder<6> m_lamps; }; @@ -85,24 +104,75 @@ uint32_t video21_state::screen_update(screen_device &screen, bitmap_ind16 &bitma return 0; } +TIMER_CALLBACK_MEMBER(video21_state::hopper_coinout) +{ + m_hopper_coin = param; + + if (m_hopper_motor || m_hopper_coin) + m_hopper_timer->adjust(attotime::from_msec(100), m_hopper_coin ^ 1); +} + +WRITE8_MEMBER(video21_state::sound_w) +{ + // beeper pitch + m_beeper->set_state(data != 0xff); // FF is off + m_beeper->set_clock(4 * data); +} + +WRITE8_MEMBER(video21_state::lamp1_w) +{ + // d1-d3: coincounters + machine().bookkeeping().coin_counter_w(0, data & 0x04); // coin in + machine().bookkeeping().coin_counter_w(1, data & 0x08); // keeper coin out + machine().bookkeeping().coin_counter_w(2, data & 0x02); // hopper coin out + + // d4: hopper motor + if (!m_hopper_motor && BIT(data, 4)) + m_hopper_timer->adjust(attotime::from_msec(100), 1); + m_hopper_motor = BIT(data, 4); + + // lamps: + // d5: take/stand(which?) + // d6: take/stand(which?) + // d7: start + for (int i = 0; i < 3; i++) + m_lamps[i+0] = BIT(data, 7-i); +} + +WRITE8_MEMBER(video21_state::lamp2_w) +{ + // lamps: + // d5: bet + // d6: accept win/double(which?) + // d7: accept win/double(which?) + for (int i = 0; i < 3; i++) + m_lamps[i+3] = BIT(data, 7-i); +} + + void video21_state::mem_map(address_map &map) { map(0x0000,0x0fff).rom().mirror(0x3000); map(0xe000,0xe3ff).ram().share("videoram"); - map(0xff00,0xffff).ram(); + map(0xff00,0xffff).ram().share("nvram"); } void video21_state::io_map(address_map &map) { - map(0x02,0x02).nopw(); // lots of unknown writes, might be some kind of dac - map(0x04,0x04); //.w unknown write - map(0x08,0x08); //.w unknown write + map(0x02,0x02).w(FUNC(video21_state::sound_w)); + map(0x04,0x04).w(FUNC(video21_state::lamp1_w)); + map(0x08,0x08).w(FUNC(video21_state::lamp2_w)); map(0x41,0x41).portr("IN41"); map(0x42,0x42).portr("IN42"); map(0x44,0x44).portr("IN44"); } +CUSTOM_INPUT_MEMBER(video21_state::hopper_coinout_r) +{ + return m_hopper_coin; +} + static INPUT_PORTS_START( video21 ) - PORT_START("IN41") // dips and tilt + PORT_START("IN41") PORT_DIPNAME( 0x01, 0x01, "41b0" ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -112,31 +182,29 @@ static INPUT_PORTS_START( video21 ) PORT_DIPNAME( 0x04, 0x04, "41b2" ) PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, "41b3" ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, "Win Mode" ) + PORT_DIPSETTING( 0x08, "Amusement" ) // winnings get added to credits + PORT_DIPSETTING( 0x00, "Casino" ) // winnings go to coin out PORT_DIPNAME( 0x10, 0x10, "41b4" ) PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, "41b5" ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, "41b6" ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_TILT ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Coin_B ) ) + PORT_DIPSETTING( 0x20, "1 Coin/10 Credits" ) + PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Coin_A ) ) + PORT_DIPSETTING( 0x40, DEF_STR( 1C_5C ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_TILT ) // ? PORT_START("IN42") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Stay") - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Payout") - PORT_DIPNAME( 0x40, 0x40, "42b6" ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_STAND ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, video21_state, hopper_coinout_r, nullptr) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen") PORT_START("IN44") PORT_DIPNAME( 0x01, 0x01, "44b0" ) @@ -148,17 +216,13 @@ static INPUT_PORTS_START( video21 ) PORT_DIPNAME( 0x04, 0x04, "44b2" ) PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DOOR ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) - PORT_DIPNAME( 0x20, 0x20, "44b5" ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, "44b6" ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "44b7" ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) PORT_NAME("Double Or Nothing") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_NAME("Accept Win") + PORT_DIPNAME( 0x80, 0x80, "Max Bet" ) + PORT_DIPSETTING( 0x80, "10" ) + PORT_DIPSETTING( 0x00, "2" ) INPUT_PORTS_END @@ -179,44 +243,59 @@ static GFXDECODE_START( gfx_video21 ) GFXDECODE_ENTRY( "chargen", 0x0000, video21_charlayout, 0, 1 ) GFXDECODE_END -MACHINE_CONFIG_START( video21_state::video21 ) +void video21_state::machine_start() +{ + m_hopper_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(video21_state::hopper_coinout),this)); + + m_lamps.resolve(); + + // zerofill/register for savestates + m_hopper_motor = 0; + m_hopper_coin = 0; + + save_item(NAME(m_hopper_motor)); + save_item(NAME(m_hopper_coin)); +} + +void video21_state::video21(machine_config &config) +{ /* basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", I8080A, 20.79_MHz_XTAL / 16) // crystal confirmed but divisor unknown - MCFG_DEVICE_PROGRAM_MAP(mem_map) - MCFG_DEVICE_IO_MAP(io_map) + I8080A(config, m_maincpu, 20.79_MHz_XTAL / 10); // crystal confirmed but divisor unknown (divider appears to be 74LS160) + m_maincpu->set_addrmap(AS_PROGRAM, &video21_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &video21_state::io_map); + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); /* video hardware */ - MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::white()) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(250)) - MCFG_SCREEN_UPDATE_DRIVER(video21_state, screen_update) - MCFG_SCREEN_SIZE(32*8, 28*8) - MCFG_SCREEN_VISIBLE_AREA(0, 32*8-1, 0, 28*8-1) - MCFG_SCREEN_PALETTE("palette") + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_color(rgb_t::white()); + screen.set_raw(20.79_MHz_XTAL / 4, 330, 0, 32*8, 315, 0, 28*8); // parameters guessed + screen.set_screen_update(FUNC(video21_state::screen_update)); + screen.set_palette("palette"); - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_video21) - MCFG_PALETTE_ADD_MONOCHROME("palette") + GFXDECODE(config, "gfxdecode", "palette", gfx_video21); + PALETTE(config, "palette", 2).set_init("palette", FUNC(palette_device::palette_init_monochrome)); /* sound hardware */ -MACHINE_CONFIG_END - + SPEAKER(config, "mono").front_center(); + BEEP(config, m_beeper, 0).add_route(ALL_OUTPUTS, "mono", 0.25); +} ROM_START( video21 ) ROM_REGION( 0x1000, "maincpu", 0 ) - ROM_LOAD_NIB_HIGH( "lich_prg.02", 0x0000, 0x0400, CRC(05585e39) SHA1(7eefb5d63b4499a303ecdcad6af5df9fe9c89205) ) - ROM_LOAD_NIB_LOW ( "lich_prg.03", 0x0000, 0x0400, CRC(b9134e96) SHA1(e7a8ff71f735add608d3c9dcc287ca37414debcb) ) - ROM_LOAD_NIB_HIGH( "lich_prg.04", 0x0400, 0x0400, CRC(8a6aa143) SHA1(16973106a95b17d8c4712db8aa7ef564751ae6d4) ) - ROM_LOAD_NIB_LOW ( "lich_prg.05", 0x0400, 0x0400, CRC(98c07d4d) SHA1(d3126b5484c67ecc7c44ddc25b48ff72ed8a734f) ) - ROM_LOAD_NIB_HIGH( "lich_prg.76", 0x0800, 0x0400, CRC(737c27f5) SHA1(55c7eb29b979d35633e5fb2c1c1ac3117901a0f0) ) - ROM_LOAD_NIB_LOW ( "lich_prg.78", 0x0800, 0x0400, CRC(c1081a2f) SHA1(24dc1d9afa4635c3114369c338903343a8b81d1a) ) - ROM_LOAD_NIB_HIGH( "lich_prg.77", 0x0c00, 0x0400, CRC(3a725b98) SHA1(efa3802025f1f99b45e56abd85dc3d1860d4734d) ) - ROM_LOAD_NIB_LOW ( "lich_prg.79", 0x0c00, 0x0400, CRC(044d1bfd) SHA1(5a57c1ab7eb7dd7ed05852e128b704c3b37a87b8) ) + ROM_LOAD_NIB_HIGH( "2", 0x0000, 0x0400, CRC(05585e39) SHA1(7eefb5d63b4499a303ecdcad6af5df9fe9c89205) ) + ROM_LOAD_NIB_LOW ( "3", 0x0000, 0x0400, CRC(b9134e96) SHA1(e7a8ff71f735add608d3c9dcc287ca37414debcb) ) + ROM_LOAD_NIB_HIGH( "4", 0x0400, 0x0400, CRC(8a6aa143) SHA1(16973106a95b17d8c4712db8aa7ef564751ae6d4) ) + ROM_LOAD_NIB_LOW ( "5", 0x0400, 0x0400, CRC(98c07d4d) SHA1(d3126b5484c67ecc7c44ddc25b48ff72ed8a734f) ) + ROM_LOAD_NIB_HIGH( "76", 0x0800, 0x0400, CRC(737c27f5) SHA1(55c7eb29b979d35633e5fb2c1c1ac3117901a0f0) ) + ROM_LOAD_NIB_LOW ( "78", 0x0800, 0x0400, CRC(c1081a2f) SHA1(24dc1d9afa4635c3114369c338903343a8b81d1a) ) + ROM_LOAD_NIB_HIGH( "77", 0x0c00, 0x0400, CRC(3a725b98) SHA1(efa3802025f1f99b45e56abd85dc3d1860d4734d) ) + ROM_LOAD_NIB_LOW ( "79", 0x0c00, 0x0400, CRC(044d1bfd) SHA1(5a57c1ab7eb7dd7ed05852e128b704c3b37a87b8) ) ROM_REGION( 0x0400, "chargen", 0 ) - ROM_LOAD_NIB_HIGH( "lich_gfx.29", 0x0000, 0x0400, CRC(2b70870d) SHA1(1f50a6976e1634020c78f10c1259e38f5e010a86) ) - ROM_LOAD_NIB_LOW ( "lich_gfx.43", 0x0000, 0x0400, CRC(0ecb0aab) SHA1(7f3f1b93a5d38828ae3e97e5f8ef1a6a96dc798b) ) + ROM_LOAD_NIB_HIGH( "29", 0x0000, 0x0400, CRC(2b70870d) SHA1(1f50a6976e1634020c78f10c1259e38f5e010a86) ) + ROM_LOAD_NIB_LOW ( "43", 0x0000, 0x0400, CRC(0ecb0aab) SHA1(7f3f1b93a5d38828ae3e97e5f8ef1a6a96dc798b) ) ROM_END -GAME(1980, video21, 0, video21, video21, video21_state, empty_init, ROT0, "Video Games GmbH", "Video 21", MACHINE_NO_SOUND) - +GAMEL(1980?, video21, 0, video21, video21, video21_state, empty_init, ROT0, "Video Games GmbH", "Video 21", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_video21) diff --git a/src/mame/drivers/vii.cpp b/src/mame/drivers/vii.cpp index d4a8d2a3b1f..a1b5ea54f95 100644 --- a/src/mame/drivers/vii.cpp +++ b/src/mame/drivers/vii.cpp @@ -2,19 +2,9 @@ // copyright-holders:Ryan Holtz, Robbbert /****************************************************************************** - - Sport Vii / The Batman - ---------------------- - - driver by Ryan Holtz - Based largely off of Unununium, by Segher - - -******************************************************************************* - Short Description: - Systems run on the SPG243 SoC + Systems which run on the SPG243 SoC Status: @@ -23,7 +13,6 @@ To-Do: Audio (SPG243) - Motion controls (Vii) Known u'nSP-Based Systems: @@ -35,7 +24,7 @@ ND - SPG243 - Finding Nemo D - SPG243 - The Batman D - SPG243 - Wall-E - D - SPG243 - Chintendo / KenSingTon / Siatronics / Jungle Soft Vii + D - SPG243 - KenSingTon / Siatronics / Jungle Soft Vii Partial D - SPG200 - VTech V.Smile ND - unknown - Zone 40 D - SPG243 - Zone 60 @@ -58,29 +47,29 @@ also on this hardware name PCB ID ROM width TSOP pads ROM size SEEPROM die markings Radica Play TV Football 2 L7278 x16 48 not dumped no Sunplus - Dream Life ? x16 48 no tdumped no Sunplus + Dream Life ? x16 48 not dumped no Sunplus Detailed list of bugs: -- When loading a cart from file manager, sometimes it will crash -- On 'vii_vc1' & 'vii_vc2' cart, the left-right keys are transposed with the up-down keys -- The game 'Jewel Master' on both above carts displays a priority error at top of screen -- In the default bios (no cart loaded): --- In the menu, when 'Come On!' is selected, a graphics error appears --- Catch Fish, black screen --- Come On! freezes at the high score screen, controls seem haywire --- Bird Knight, no controls --- Lucky Dice, the dice never stop spinning --- Fever Move, after pressing A it freezes --- Alacrity Golf, black screen --- Smart Dart, black screen --- Happy Tennis, controls are haywire --- Bowling, freezes at the high score screen --- The "EEPROM TEST" option in the diagnostic menu (accessible by holding 1+2 or A+B during startup) freezes when selected --- The "MOTOR" option in the diagnostic menu does nothing when selected --- The input for the gyroscopic sensor tests in the "KEYBOARD + G-SENSOR" sub-menu goes haywire -- Zone 60 / Wireless 60: --- Auto Racing / Auto X, Dragon, Yummy, some other games: some sprites are inverted or opaque where they should be transparent --- Basketball: emulator crashes when starting the game due to an unimplemented instruction + +- all systems: + Various inaccuracies in samples/envelopes. +- vsmile: + Games loop the first legal screen rather than continuing. +- walle: + Voice sample on the title screen is continually retriggered by the game code. + Title screen lacks New Game / Continue Game menu options. +- rad_skat: + Palette issues on the High Score screen. +- vii: + Music does not loop. + When loading a cart from file manager, sometimes MAME will crash. + The "MOTOR" option in the diagnostic menu does nothing when selected. + The "SPEECH IC" option in the diagnostic menu does nothing when selected. + On 'vii_vc1' & 'vii_vc2' cart, the left-right keys are transposed with the up-down keys. + This is not a bug per se, as the games are played with the controller physically rotated 90 degrees. +- zone60/wirels60: + All Games: Music does not loop. + Basketball: MAME fatalerrors when starting the game due to jumping to invalid code. *******************************************************************************/ @@ -88,7 +77,10 @@ Detailed list of bugs: #include "emu.h" #include "cpu/unsp/unsp.h" +#include "machine/bankdev.h" #include "machine/i2cmem.h" +#include "machine/nvram.h" +#include "machine/spg2xx.h" #include "bus/generic/slot.h" #include "bus/generic/carts.h" @@ -96,162 +88,170 @@ Detailed list of bugs: #include "emupal.h" #include "screen.h" #include "softlist.h" - - -#define PAGE_ENABLE_MASK 0x0008 - -#define PAGE_DEPTH_FLAG_MASK 0x3000 -#define PAGE_DEPTH_FLAG_SHIFT 12 -#define PAGE_TILE_HEIGHT_MASK 0x00c0 -#define PAGE_TILE_HEIGHT_SHIFT 6 -#define PAGE_TILE_WIDTH_MASK 0x0030 -#define PAGE_TILE_WIDTH_SHIFT 4 -#define TILE_X_FLIP 0x0004 -#define TILE_Y_FLIP 0x0008 +#include "speaker.h" class spg2xx_game_state : public driver_device { public: spg2xx_game_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_bank(*this, "cart"), - m_maincpu(*this, "maincpu"), - m_p_ram(*this, "p_ram"), - m_p_rowscroll(*this, "p_rowscroll"), - m_p_palette(*this, "p_palette"), - m_p_spriteram(*this, "p_spriteram"), - m_io_p1(*this, "P1"), - m_io_p2(*this, "P2"), - m_io_p3(*this, "P3") + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_screen(*this, "screen") +#if SPG2XX_VISUAL_AUDIO_DEBUG + , m_debug_screen(*this, "debug_screen") +#endif + , m_spg(*this, "spg") + , m_bank(*this, "cartbank") + , m_io_p1(*this, "P1") + , m_io_p2(*this, "P2") + , m_io_p3(*this, "P3") + , m_io_motionx(*this, "MOTIONX") + , m_io_motiony(*this, "MOTIONY") + , m_io_motionz(*this, "MOTIONZ") + , m_i2cmem(*this, "i2cmem") + , m_nvram(*this, "nvram") { } void spg2xx_base(machine_config &config); void spg2xx_basep(machine_config &config); - void batman(machine_config &config); + void jakks(machine_config &config); + void walle(machine_config &config); + void wireless60(machine_config &config); + void rad_skat(machine_config &config); + void rad_skatp(machine_config &config); + void rad_crik(machine_config &config); + void non_spg_base(machine_config &config); - void init_walle(); - void init_batman(); - void init_wirels60(); - void init_rad_skat(); void init_rad_crik(); protected: void switch_bank(uint32_t bank); - uint32_t m_centered_coordinates; // this must be a vreg? - void test_centered(uint8_t *ROM); virtual void machine_start() override; - typedef delegate<uint16_t(uint16_t, int)> vii_io_rw_delegate; - vii_io_rw_delegate m_vii_io_rw; + DECLARE_WRITE8_MEMBER(eeprom_w); + DECLARE_READ8_MEMBER(eeprom_r); - required_memory_bank m_bank; + DECLARE_READ16_MEMBER(jakks_porta_r); + DECLARE_WRITE16_MEMBER(wireless60_porta_w); + DECLARE_WRITE16_MEMBER(wireless60_portb_w); + DECLARE_READ16_MEMBER(wireless60_porta_r); -private: - DECLARE_READ16_MEMBER(video_r); - DECLARE_WRITE16_MEMBER(video_w); - DECLARE_READ16_MEMBER(audio_r); - DECLARE_WRITE16_MEMBER(audio_w); - DECLARE_READ16_MEMBER(io_r); - DECLARE_WRITE16_MEMBER(io_w); - DECLARE_READ16_MEMBER(rom_r); - - uint32_t screen_update_vii(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - - INTERRUPT_GEN_MEMBER(vii_vblank); + required_device<cpu_device> m_maincpu; + required_device<screen_device> m_screen; +#if SPG2XX_VISUAL_AUDIO_DEBUG + required_device<screen_device> m_debug_screen; +#endif + required_device<spg2xx_device> m_spg; + optional_memory_bank m_bank; - TIMER_CALLBACK_MEMBER(tmb1_tick); - TIMER_CALLBACK_MEMBER(tmb2_tick); +protected: + DECLARE_WRITE_LINE_MEMBER(poll_controls); - void vii_mem(address_map &map); + DECLARE_READ16_MEMBER(walle_portc_r); + DECLARE_WRITE16_MEMBER(walle_portc_w); virtual void machine_reset() override; - virtual void video_start() override; - uint16_t do_spg240_rad_skat_io(uint16_t what, int index); - uint16_t do_spg243_batman_io(uint16_t what, int index); - uint16_t do_spg243_wireless60_io(uint16_t what, int index); + virtual void mem_map(address_map &map); uint32_t m_current_bank; - uint16_t m_video_regs[0x100]; - - struct - { - uint8_t r, g, b; - } - m_screenram[320 * 240]; - - uint16_t m_io_regs[0x200]; - uint16_t m_uart_rx_count; + std::unique_ptr<uint8_t[]> m_serial_eeprom; uint8_t m_controller_input[8]; uint8_t m_w60_controller_input; + uint16_t m_w60_porta_data; - emu_timer *m_tmb1; - emu_timer *m_tmb2; - void do_dma(uint32_t len); - void do_gpio(uint32_t offset); - void do_i2c(); - void spg_do_dma(uint32_t len); - - void blit(bitmap_rgb32 &bitmap, const rectangle &cliprect, uint32_t xoff, uint32_t yoff, uint32_t attr, uint32_t ctrl, uint32_t bitmap_addr, uint16_t tile); - void blit_page(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, uint32_t bitmap_addr, uint16_t *regs); - void blit_sprite(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, uint32_t base_addr); - void blit_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth); - inline void verboselog(int n_level, const char *s_fmt, ...) ATTR_PRINTF(3, 4); - inline uint8_t expand_rgb5_to_rgb8(uint8_t val); - inline uint8_t mix_channel(uint8_t a, uint8_t b); - void mix_pixel(uint32_t offset, uint16_t rgb); - void set_pixel(uint32_t offset, uint16_t rgb); + uint16_t m_walle_portc_data; - // devices + inline void verboselog(int n_level, const char *s_fmt, ...) ATTR_PRINTF(3, 4); - required_device<cpu_device> m_maincpu; - required_shared_ptr<uint16_t> m_p_ram; - required_shared_ptr<uint16_t> m_p_rowscroll; - required_shared_ptr<uint16_t> m_p_palette; - required_shared_ptr<uint16_t> m_p_spriteram; required_ioport m_io_p1; optional_ioport m_io_p2; optional_ioport m_io_p3; + optional_ioport m_io_motionx; + optional_ioport m_io_motiony; + optional_ioport m_io_motionz; + optional_device<i2cmem_device> m_i2cmem; + optional_device<nvram_device> m_nvram; // temp hack DECLARE_READ16_MEMBER(rad_crik_hack_r); }; +class vsmile_state : public spg2xx_game_state +{ +public: + vsmile_state(const machine_config &mconfig, device_type type, const char *tag) + : spg2xx_game_state(mconfig, type, tag) + , m_cart(*this, "cartslot") + , m_bankdev(*this, "bank") + , m_cart_banks(*this, "cartbank%u", 0U) + { } + + void vsmile(machine_config &config); + void vsmilep(machine_config &config); + +private: + virtual void machine_start() override; + virtual void machine_reset() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + + static const device_timer_id TIMER_PAD = 0; + + virtual void mem_map(address_map &map) override; + void banked_map(address_map &map); + + DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart); + + DECLARE_READ16_MEMBER(portb_r); + DECLARE_READ16_MEMBER(portc_r); + DECLARE_WRITE16_MEMBER(portb_w); + DECLARE_WRITE16_MEMBER(portc_w); + + DECLARE_WRITE8_MEMBER(chip_sel_w); + + DECLARE_WRITE8_MEMBER(uart_tx); + + DECLARE_READ16_MEMBER(bank0_r); + DECLARE_READ16_MEMBER(bank1_r); + DECLARE_READ16_MEMBER(bank2_r); + DECLARE_READ16_MEMBER(bank3_r); + optional_device<generic_slot_device> m_cart; + memory_region *m_cart_rom; + required_device<address_map_bank_device> m_bankdev; + optional_memory_bank_array<4> m_cart_banks; + + emu_timer *m_pad_timer; + uint8_t m_pad_counter; + + uint16_t m_portb_data; + uint16_t m_portc_data; +}; class spg2xx_cart_state : public spg2xx_game_state { public: spg2xx_cart_state(const machine_config &mconfig, device_type type, const char *tag) - : spg2xx_game_state(mconfig, type, tag), - m_cart(*this, "cartslot") + : spg2xx_game_state(mconfig, type, tag) + , m_cart(*this, "cartslot") { } void vii(machine_config &config); - void vsmile(machine_config &config); - - void init_vii(); - void init_vsmile(); private: - uint16_t do_spg243_vsmile_io(uint16_t what, int index); - uint16_t do_spg243_vii_io(uint16_t what, int index); + DECLARE_WRITE16_MEMBER(vii_portb_w); DECLARE_DEVICE_IMAGE_LOAD_MEMBER(vii_cart); - DECLARE_DEVICE_IMAGE_LOAD_MEMBER(vsmile_cart); virtual void machine_start() override; + virtual void machine_reset() override; optional_device<generic_slot_device> m_cart; memory_region *m_cart_rom; }; -#define VII_CTLR_IRQ_ENABLE m_io_regs[0x21] -#define VII_VIDEO_IRQ_ENABLE m_video_regs[0x62] -#define VII_VIDEO_IRQ_STATUS m_video_regs[0x63] - -#define VERBOSE_LEVEL (3) +#define VERBOSE_LEVEL (4) #define ENABLE_VERBOSE_LOG (1) @@ -264,770 +264,278 @@ inline void spg2xx_game_state::verboselog(int n_level, const char *s_fmt, ...) char buf[32768]; va_start(v, s_fmt); vsprintf(buf, s_fmt, v); + logerror("%s", buf); va_end(v); } #endif } /************************* -* Video Hardware * +* Machine Hardware * *************************/ -void spg2xx_game_state::video_start() -{ -} - -inline uint8_t spg2xx_game_state::expand_rgb5_to_rgb8(uint8_t val) -{ - uint8_t temp = val & 0x1f; - return (temp << 3) | (temp >> 2); -} - -// Perform a lerp between a and b -inline uint8_t spg2xx_game_state::mix_channel(uint8_t a, uint8_t b) +void spg2xx_game_state::switch_bank(uint32_t bank) { - uint8_t alpha = m_video_regs[0x1c] & 0x00ff; - return ((64 - alpha) * a + alpha * b) / 64; + if (bank != m_current_bank) + { + m_current_bank = bank; + m_bank->set_entry(bank); + } } -void spg2xx_game_state::mix_pixel(uint32_t offset, uint16_t rgb) +WRITE8_MEMBER(spg2xx_game_state::eeprom_w) { - m_screenram[offset].r = mix_channel(m_screenram[offset].r, expand_rgb5_to_rgb8(rgb >> 10)); - m_screenram[offset].g = mix_channel(m_screenram[offset].g, expand_rgb5_to_rgb8(rgb >> 5)); - m_screenram[offset].b = mix_channel(m_screenram[offset].b, expand_rgb5_to_rgb8(rgb)); + m_serial_eeprom[offset & 0x3ff] = data; } -void spg2xx_game_state::set_pixel(uint32_t offset, uint16_t rgb) +READ8_MEMBER(spg2xx_game_state::eeprom_r) { - m_screenram[offset].r = expand_rgb5_to_rgb8(rgb >> 10); - m_screenram[offset].g = expand_rgb5_to_rgb8(rgb >> 5); - m_screenram[offset].b = expand_rgb5_to_rgb8(rgb); + return m_serial_eeprom[offset & 0x3ff]; } -void spg2xx_game_state::blit(bitmap_rgb32 &bitmap, const rectangle &cliprect, uint32_t xoff, uint32_t yoff, uint32_t attr, uint32_t ctrl, uint32_t bitmap_addr, uint16_t tile) +WRITE16_MEMBER(spg2xx_game_state::wireless60_porta_w) { - address_space &space = m_maincpu->space(AS_PROGRAM); - - uint32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT); - uint32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT); - - uint32_t yflipmask = attr & TILE_Y_FLIP ? h - 1 : 0; - uint32_t xflipmask = attr & TILE_X_FLIP ? w - 1 : 0; - - uint32_t nc = ((attr & 0x0003) + 1) << 1; - - uint32_t palette_offset = (attr & 0x0f00) >> 4; - palette_offset >>= nc; - palette_offset <<= nc; - - uint32_t m = bitmap_addr + nc * w*h / 16 * tile; - uint32_t bits = 0; - uint32_t nbits = 0; - - uint32_t x, y; - - for (y = 0; y < h; y++) + m_w60_porta_data = data & 0xf00; + switch (m_w60_porta_data & 0x300) { - uint32_t yy = (yoff + (y ^ yflipmask)) & 0x1ff; + case 0x300: + m_w60_controller_input = -1; + break; - for (x = 0; x < w; x++) - { - uint32_t xx = (xoff + (x ^ xflipmask)) & 0x1ff; - uint32_t pal; - - bits <<= nc; - if (nbits < nc) - { - uint16_t b = space.read_word(m++ & 0x3fffff); - b = (b << 8) | (b >> 8); - bits |= b << (nc - nbits); - nbits += 16; - } - nbits -= nc; - - pal = palette_offset | (bits >> 16); - bits &= 0xffff; - - if ((ctrl & 0x0010) && yy < 240) - { - xx = (xx - (int16_t)m_p_rowscroll[yy]) & 0x01ff; - } - - if (xx < 320 && yy < 240) - { - uint16_t rgb = m_p_palette[pal]; - if (!(rgb & 0x8000)) - { - if (attr & 0x4000) - { - mix_pixel(xx + 320 * yy, rgb); - } - else - { - set_pixel(xx + 320 * yy, rgb); - } - } - } - } + case 0x200: + m_w60_controller_input++; + break; + + default: + uint16_t temp1 = m_io_p1->read(); + uint16_t temp2 = m_io_p2->read(); + uint16_t temp3 = 1 << m_w60_controller_input; + if (temp1 & temp3) m_w60_porta_data ^= 0x400; + if (temp2 & temp3) m_w60_porta_data ^= 0x800; + break; } } -void spg2xx_game_state::blit_page(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, uint32_t bitmap_addr, uint16_t *regs) +READ16_MEMBER(spg2xx_game_state::wireless60_porta_r) { - uint32_t x0, y0; - uint32_t xscroll = regs[0]; - uint32_t yscroll = regs[1]; - uint32_t attr = regs[2]; - uint32_t ctrl = regs[3]; - uint32_t tilemap = regs[4]; - uint32_t palette_map = regs[5]; - uint32_t h, w, hn, wn; - address_space &space = m_maincpu->space(AS_PROGRAM); - - if (!(ctrl & PAGE_ENABLE_MASK)) - { - return; - } - - if (((attr & PAGE_DEPTH_FLAG_MASK) >> PAGE_DEPTH_FLAG_SHIFT) != depth) - { - return; - } - - h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT); - w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT); - - hn = 256 / h; - wn = 512 / w; - - for (y0 = 0; y0 < hn; y0++) - { - for (x0 = 0; x0 < wn; x0++) - { - uint16_t tile = space.read_word(tilemap + x0 + wn * y0); - uint16_t palette = 0; - uint32_t xx, yy; - - if (!tile) - { - continue; - } - - palette = space.read_word(palette_map + (x0 + wn * y0) / 2); - if (x0 & 1) - { - palette >>= 8; - } - - uint32_t tileattr = attr; - uint32_t tilectrl = ctrl; - if ((ctrl & 2) == 0) - { // -(1) bld(1) flip(2) pal(4) - tileattr &= ~0x000c; - tileattr |= (palette >> 2) & 0x000c; // flip - - tileattr &= ~0x0f00; - tileattr |= (palette << 8) & 0x0f00; // palette - - tileattr &= ~0x0100; - tileattr |= (palette << 2) & 0x0100; // blend - } - - yy = ((h*y0 - yscroll + 0x10) & 0xff) - 0x10; - xx = (w*x0 - xscroll) & 0x1ff; - - blit(bitmap, cliprect, xx, yy, tileattr, tilectrl, bitmap_addr, tile); - } - } + return m_w60_porta_data; } -void spg2xx_game_state::blit_sprite(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, uint32_t base_addr) +WRITE16_MEMBER(spg2xx_game_state::wireless60_portb_w) { - address_space &space = m_maincpu->space(AS_PROGRAM); - uint16_t tile, attr; - int16_t x, y; - uint32_t h, w; - uint32_t bitmap_addr = 0x40 * m_video_regs[0x22]; - - tile = space.read_word(base_addr + 0); - x = space.read_word(base_addr + 1); - y = space.read_word(base_addr + 2); - attr = space.read_word(base_addr + 3); - - if (!tile) - { - return; - } - - if (((attr & PAGE_DEPTH_FLAG_MASK) >> PAGE_DEPTH_FLAG_SHIFT) != depth) - { - return; - } - - if (m_centered_coordinates) - { - x = 160 + x; - y = 120 - y; - - h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT); - w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT); - - x -= (w / 2); - y -= (h / 2) - 8; - } - - x &= 0x01ff; - y &= 0x01ff; - - blit(bitmap, cliprect, x, y, attr, 0, bitmap_addr, tile); + switch_bank(data & 7); } -void spg2xx_game_state::blit_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth) +WRITE16_MEMBER(spg2xx_cart_state::vii_portb_w) { - uint32_t n; - - if (!(m_video_regs[0x42] & 1)) - { - return; - } - - for (n = 0; n < 256; n++) - { - //if(space.read_word(0x2c00 + 4*n) - { - blit_sprite(bitmap, cliprect, depth, 0x2c00 + 4 * n); - } - } + if (data == 0x7c) machine().debug_break(); + switch_bank(((data & 0x80) >> 7) | ((data & 0x20) >> 4)); } -uint32_t spg2xx_game_state::screen_update_vii(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +void vsmile_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) { - int i, x, y; - - bitmap.fill(0, cliprect); - - memset(m_screenram, 0, sizeof(m_screenram)); - - for (i = 0; i < 4; i++) + if (id == TIMER_PAD) { - blit_page(bitmap, cliprect, i, 0x40 * m_video_regs[0x20], m_video_regs + 0x10); - blit_page(bitmap, cliprect, i, 0x40 * m_video_regs[0x21], m_video_regs + 0x16); - blit_sprites(bitmap, cliprect, i); - } - - for (y = 0; y < 240; y++) - { - for (x = 0; x < 320; x++) + m_pad_counter++; + if (m_pad_counter >= 100) { - bitmap.pix32(y, x) = (m_screenram[x + 320 * y].r << 16) | (m_screenram[x + 320 * y].g << 8) | m_screenram[x + 320 * y].b; + m_pad_counter = 0; + m_spg->uart_rx(0x55); } } - - return 0; } -/************************* -* Machine Hardware * -*************************/ - -void spg2xx_game_state::do_dma(uint32_t len) +#define VSMILE_PORTB_CS1 0x0001 +#define VSMILE_PORTB_CS2 0x0002 +#define VSMILE_PORTB_CART 0x0004 +#define VSMILE_PORTB_RESET 0x0008 +#define VSMILE_PORTB_FRONT24 0x0010 +#define VSMILE_PORTB_OFF 0x0020 +#define VSMILE_PORTB_OFF_SW 0x0040 +#define VSMILE_PORTB_ON_SW 0x0080 + +#define VSMILE_PORTC_VER 0x000f +#define VSMILE_PORTC_LOGO 0x0010 +#define VSMILE_PORTC_TEST 0x0020 +#define VSMILE_PORTC_AMP 0x0040 +#define VSMILE_PORTC_SYSRESET 0x0080 + +READ16_MEMBER(vsmile_state::bank0_r) { - address_space &mem = m_maincpu->space(AS_PROGRAM); - uint32_t src = m_video_regs[0x70]; - uint32_t dst = m_video_regs[0x71] + 0x2c00; - uint32_t j; - - for (j = 0; j < len; j++) - { - mem.write_word(dst + j, mem.read_word(src + j)); - } - - m_video_regs[0x72] = 0; - m_video_regs[0x63] |= 4; + const uint16_t data = ((uint16_t*)m_cart_rom->base())[offset]; + //printf("bank0_r: %06x: %04x\n", offset, data); + return data; } -READ16_MEMBER(spg2xx_game_state::video_r) +READ16_MEMBER(vsmile_state::bank1_r) { - switch (offset) - { - case 0x62: // Video IRQ Enable - verboselog(0, "video_r: Video IRQ Enable: %04x\n", VII_VIDEO_IRQ_ENABLE); - return VII_VIDEO_IRQ_ENABLE; - - case 0x63: // Video IRQ Status - verboselog(0, "video_r: Video IRQ Status: %04x\n", VII_VIDEO_IRQ_STATUS); - return VII_VIDEO_IRQ_STATUS; - - default: - verboselog(0, "video_r: Unknown register %04x = %04x\n", 0x2800 + offset, m_video_regs[offset]); - break; - } - return m_video_regs[offset]; + const uint16_t data = ((uint16_t*)m_cart_rom->base())[offset + 0x100000]; + //printf("bank1_r: %06x: %04x\n", offset + 0x100000, data); + return data; } -WRITE16_MEMBER(spg2xx_game_state::video_w) +READ16_MEMBER(vsmile_state::bank2_r) { - switch (offset) - { - case 0x10: case 0x16: // page 1,2 X scroll - data &= 0x01ff; - COMBINE_DATA(&m_video_regs[offset]); - break; - - case 0x11: case 0x17: // page 1,2 Y scroll - data &= 0x00ff; - COMBINE_DATA(&m_video_regs[offset]); - break; - case 0x36: // IRQ pos V - case 0x37: // IRQ pos H - data &= 0x01ff; - COMBINE_DATA(&m_video_regs[offset]); - break; - case 0x62: // Video IRQ Enable - verboselog(0, "video_w: Video IRQ Enable = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&VII_VIDEO_IRQ_ENABLE); - break; - - case 0x63: // Video IRQ Acknowledge - verboselog(0, "video_w: Video IRQ Acknowledge = %04x (%04x)\n", data, mem_mask); - VII_VIDEO_IRQ_STATUS &= ~data; - if (!VII_VIDEO_IRQ_STATUS) - { - m_maincpu->set_input_line(UNSP_IRQ0_LINE, CLEAR_LINE); - } - break; - - case 0x70: // Video DMA Source - verboselog(0, "video_w: Video DMA Source = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_video_regs[offset]); - break; - - case 0x71: // Video DMA Dest - verboselog(0, "video_w: Video DMA Dest = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_video_regs[offset]); - break; - - case 0x72: // Video DMA Length - verboselog(0, "video_w: Video DMA Length = %04x (%04x)\n", data, mem_mask); - do_dma(data); - break; - - default: - verboselog(0, "video_w: Unknown register %04x = %04x (%04x)\n", 0x2800 + offset, data, mem_mask); - COMBINE_DATA(&m_video_regs[offset]); - break; - } + const uint16_t data = ((uint16_t*)m_cart_rom->base())[offset + 0x200000]; + //printf("bank2_r: %06x: %04x\n", offset + 0x200000, data); + return data; } -READ16_MEMBER(spg2xx_game_state::audio_r) +READ16_MEMBER(vsmile_state::bank3_r) { - switch (offset) - { - default: - verboselog(4, "audio_r: Unknown register %04x\n", 0x3000 + offset); - break; - } - return 0; + const uint16_t data = ((uint16_t*)memregion("maincpu")->base())[offset]; + //printf("bank3_r: %06x: %04x\n", offset + 0x300000, data); + return data; } -WRITE16_MEMBER(spg2xx_game_state::audio_w) +READ16_MEMBER(vsmile_state::portb_r) { - switch (offset) - { - default: - verboselog(4, "audio_w: Unknown register %04x = %04x (%04x)\n", 0x3000 + offset, data, mem_mask); - break; - } + //const uint8_t inputs = m_io_p2->read(); + //const uint16_t input_bits = BIT(inputs, 0) ? VSMILE_PORTB_ON_SW : 0; + const uint16_t data = VSMILE_PORTB_ON_SW | (m_cart && m_cart->exists() ? VSMILE_PORTB_CART : 0); + logerror("V.Smile Port B read %04x, mask %04x\n", data, mem_mask); + //printf("V.Smile Port B read %04x, mask %04x\n", data, mem_mask); + return data; } -void spg2xx_game_state::switch_bank(uint32_t bank) +READ16_MEMBER(vsmile_state::portc_r) { - if (bank != m_current_bank) - { - m_current_bank = bank; - m_bank->set_entry(bank); - } -} - -uint16_t spg2xx_cart_state::do_spg243_vii_io(uint16_t what, int index) -{ - if (index == 1) - { - uint32_t bank = ((what & 0x80) >> 7) | ((what & 0x20) >> 4); - switch_bank(bank); - } - return what; + const uint16_t data = VSMILE_PORTC_LOGO | 0x0004; + logerror("V.Smile Port C read %04x, mask %04x\n", data, mem_mask); + return data; } -uint16_t spg2xx_cart_state::do_spg243_vsmile_io(uint16_t what, int index) +WRITE16_MEMBER(vsmile_state::portb_w) { - // TODO: find out how vsmile accesses these GPIO regs! - return what; + m_portb_data = data & mem_mask; + logerror("V.Smile Port B write %04x, mask %04x\n", m_portb_data, mem_mask); + //printf("V.Smile Port B write %04x, mask %04x\n", m_portb_data, mem_mask); } -uint16_t spg2xx_game_state::do_spg243_batman_io(uint16_t what, int index) +WRITE16_MEMBER(vsmile_state::portc_w) { - if (index == 0) - { - uint16_t temp = m_io_p1->read(); - what |= (temp & 0x0001) ? 0x8000 : 0; - what |= (temp & 0x0002) ? 0x4000 : 0; - what |= (temp & 0x0004) ? 0x2000 : 0; - what |= (temp & 0x0008) ? 0x1000 : 0; - what |= (temp & 0x0010) ? 0x0800 : 0; - what |= (temp & 0x0020) ? 0x0400 : 0; - what |= (temp & 0x0040) ? 0x0200 : 0; - what |= (temp & 0x0080) ? 0x0100 : 0; - } - - if (index == 2) - { - // TODO: what is here? - } - - return what; + m_portc_data = data & mem_mask; + logerror("V.Smile Port C write %04x, mask %04x\n", m_portc_data, mem_mask); + //printf("V.Smile Port C write %04x, mask %04x\n", m_portc_data, mem_mask); + //printf("%02x ", data >> 8); } -uint16_t spg2xx_game_state::do_spg240_rad_skat_io(uint16_t what, int index) +WRITE8_MEMBER(vsmile_state::uart_tx) { - // have not checked for outputs yet. - - if (index == 0) - { - what = m_io_p1->read(); - } - else if (index == 1) - { - what = m_io_p2->read(); - } - else if (index == 2) - { - what = m_io_p3->read(); - } - return what; + logerror("UART Tx: %02x\n", data); } -uint16_t spg2xx_game_state::do_spg243_wireless60_io(uint16_t what, int index) +WRITE8_MEMBER(vsmile_state::chip_sel_w) { - if (index == 0) + logerror("Chip select mode: %d\n", data); + const uint16_t cart_offset = m_cart && m_cart->exists() ? 4 : 0; + switch (data) { - switch (what & 0x300) - { - case 0x300: - m_w60_controller_input = -1; + case 0: + logerror("Setting bank %d\n", cart_offset); + m_bankdev->set_bank(cart_offset); break; - - case 0x200: - m_w60_controller_input++; + case 1: + logerror("Setting bank %d\n", 1 + cart_offset); + m_bankdev->set_bank(1 + cart_offset); break; - - default: - uint16_t temp1 = m_io_p1->read(); - uint16_t temp2 = m_io_p2->read(); - uint16_t temp3 = 1 << m_w60_controller_input; - if (temp1 & temp3) what ^= 0x400; - if (temp2 & temp3) what ^= 0x800; + case 2: + case 3: + logerror("Setting bank %d\n", 2 + cart_offset); + m_bankdev->set_bank(2 + cart_offset); break; - } } - - if (index == 1) - { - uint32_t bank = (what & 7); - switch_bank(bank); - } - - return what; -} - - -void spg2xx_game_state::do_gpio(uint32_t offset) -{ - uint32_t index = (offset - 1) / 5; - uint16_t buffer = m_io_regs[5 * index + 2]; - uint16_t dir = m_io_regs[5 * index + 3]; - uint16_t attr = m_io_regs[5 * index + 4]; - uint16_t special = m_io_regs[5 * index + 5]; - - uint16_t push = dir; - uint16_t pull = (~dir) & (~attr); - uint16_t what = (buffer & (push | pull)); - what ^= (dir & ~attr); - what &= ~special; - - if (!m_vii_io_rw.isnull()) - what = m_vii_io_rw(what, index); - - m_io_regs[5 * index + 1] = what; } -void spg2xx_game_state::do_i2c() +READ16_MEMBER(spg2xx_game_state::walle_portc_r) { + char mask_buf[17]; + mask_buf[16] = 0; + for (uint32_t i = 0; i < 16; i++) + { + mask_buf[i] = BIT(mem_mask, 15 - i) ? '1' : '0'; + } + logerror("Wall-E Port C read 0000, pull mask %s\n", mask_buf); + return m_i2cmem->read_sda(); } -void spg2xx_game_state::spg_do_dma(uint32_t len) -{ - address_space &mem = m_maincpu->space(AS_PROGRAM); - - uint32_t src = ((m_io_regs[0x101] & 0x3f) << 16) | m_io_regs[0x100]; - uint32_t dst = m_io_regs[0x103] & 0x3fff; - uint32_t j; - - for (j = 0; j < len; j++) - mem.write_word(dst + j, mem.read_word(src + j)); - - m_io_regs[0x102] = 0; -} - -READ16_MEMBER(spg2xx_game_state::io_r) +WRITE16_MEMBER(spg2xx_game_state::walle_portc_w) { - logerror("io_r %04x\n", offset); - - static const char *const gpioregs[] = { "GPIO Data Port", "GPIO Buffer Port", "GPIO Direction Port", "GPIO Attribute Port", "GPIO IRQ/Latch Port" }; - static const char gpioports[] = { 'A', 'B', 'C' }; - - uint16_t val = m_io_regs[offset]; - - switch (offset) + char data_buf[17]; + char mask_buf[17]; + data_buf[16] = 0; + mask_buf[16] = 0; + for (uint32_t i = 0; i < 16; i++) { - case 0x01: case 0x06: case 0x0b: // GPIO Data Port A/B/C - do_gpio(offset); - verboselog(3, "io_r: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], m_io_regs[offset], mem_mask); - val = m_io_regs[offset]; - break; - - case 0x02: case 0x03: case 0x04: case 0x05: - case 0x07: case 0x08: case 0x09: case 0x0a: - case 0x0c: case 0x0d: case 0x0e: case 0x0f: // Other GPIO regs - verboselog(3, "io_r: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], m_io_regs[offset], mem_mask); - break; - - case 0x1c: // Random - val = machine().rand() & 0x00ff; - verboselog(3, "io_r: Random = %04x (%04x)\n", val, mem_mask); - break; - - case 0x21: // IRQ Control - verboselog(3, "io_r: Controller IRQ Control = %04x (%04x)\n", val, mem_mask); - break; - - case 0x22: // IRQ Status - verboselog(3, "io_r: Controller IRQ Status = %04x (%04x)\n", val, mem_mask); - break; - - case 0x2b: - return 0x0000; - - case 0x2c: case 0x2d: // Timers? - val = machine().rand() & 0x0000ffff; - verboselog(3, "io_r: Unknown Timer %d Register = %04x (%04x)\n", offset - 0x2c, val, mem_mask); - break; - - case 0x2f: // Data Segment - val = m_maincpu->state_int(UNSP_SR) >> 10; - verboselog(3, "io_r: Data Segment = %04x (%04x)\n", val, mem_mask); - break; - - case 0x31: // Unknown, UART Status? - verboselog(3, "io_r: Unknown (UART Status?) = %04x (%04x)\n", 3, mem_mask); - val = 3; - break; - - case 0x36: // UART RX Data - val = m_controller_input[m_uart_rx_count]; - m_uart_rx_count = (m_uart_rx_count + 1) % 8; - verboselog(3, "io_r: UART RX Data = %04x (%04x)\n", val, mem_mask); - break; - - case 0x59: // I2C Status - verboselog(3, "io_r: I2C Status = %04x (%04x)\n", val, mem_mask); - break; - - case 0x5e: // I2C Data In - verboselog(3, "io_r: I2C Data In = %04x (%04x)\n", val, mem_mask); - break; - - default: - verboselog(3, "io_r: Unknown register %04x\n", 0x3d00 + offset); - break; + data_buf[i] = BIT(data, 15 - i) ? '1' : '0'; + mask_buf[i] = BIT(mem_mask, 15 - i) ? '1' : '0'; } - - return val; + logerror("Wall-E Port C write %s, push mask %s\n", data_buf, mask_buf); + m_walle_portc_data = data & mem_mask; + if (BIT(mem_mask, 1)) + m_i2cmem->write_scl(BIT(data, 1)); + if (BIT(mem_mask, 0)) + m_i2cmem->write_sda(BIT(data, 0)); } -WRITE16_MEMBER(spg2xx_game_state::io_w) +READ16_MEMBER(spg2xx_game_state::jakks_porta_r) { - static const char *const gpioregs[] = { "GPIO Data Port", "GPIO Buffer Port", "GPIO Direction Port", "GPIO Attribute Port", "GPIO IRQ/Latch Port" }; - static const char gpioports[3] = { 'A', 'B', 'C' }; - - uint16_t temp = 0; - - switch (offset) - { - case 0x00: // GPIO special function select - verboselog(3, "io_w: GPIO Function Select = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x01: case 0x06: case 0x0b: // GPIO data, port A/B/C - offset++; - // Intentional fallthrough - - case 0x02: case 0x03: case 0x04: case 0x05: // Port A - case 0x07: case 0x08: case 0x09: case 0x0a: // Port B - case 0x0c: case 0x0d: case 0x0e: case 0x0f: // Port C - verboselog(3, "io_w: %s %c = %04x (%04x)\n", gpioregs[(offset - 1) % 5], gpioports[(offset - 1) / 5], data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - do_gpio(offset); - break; - - case 0x10: // timebase control - if ((m_io_regs[offset] & 0x0003) != (data & 0x0003)) { - uint16_t hz = 8 << (data & 0x0003); - verboselog(3, "*** TMB1 FREQ set to %dHz\n", hz); - m_tmb1->adjust(attotime::zero, 0, attotime::from_hz(hz)); - } - if ((m_io_regs[offset] & 0x000c) != (data & 0x000c)) { - uint16_t hz = 128 << ((data & 0x000c) >> 2); - verboselog(3, "*** TMB2 FREQ set to %dHz\n", hz); - m_tmb2->adjust(attotime::zero, 0, attotime::from_hz(hz)); - } - COMBINE_DATA(&m_io_regs[offset]); - break; - case 0x21: // IRQ Enable - verboselog(3, "io_w: Controller IRQ Control = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&VII_CTLR_IRQ_ENABLE); - if (!VII_CTLR_IRQ_ENABLE) - { - m_maincpu->set_input_line(UNSP_IRQ3_LINE, CLEAR_LINE); - } - break; - - case 0x22: // IRQ Acknowledge - verboselog(3, "io_w: Controller IRQ Acknowledge = %04x (%04x)\n", data, mem_mask); - m_io_regs[0x22] &= ~data; - if (!m_io_regs[0x22]) - { - m_maincpu->set_input_line(UNSP_IRQ3_LINE, CLEAR_LINE); - } - break; - - case 0x2f: // Data Segment - temp = m_maincpu->state_int(UNSP_SR); - m_maincpu->set_state_int(UNSP_SR, (temp & 0x03ff) | ((data & 0x3f) << 10)); - verboselog(3, "io_w: Data Segment = %04x (%04x)\n", data, mem_mask); - break; - - case 0x31: // Unknown UART - verboselog(3, "io_w: Unknown UART = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x32: // UART Reset - verboselog(3, "io_w: UART Reset\n"); - break; - - case 0x33: // UART Baud Rate - verboselog(3, "io_w: UART Baud Rate = %u\n", 27000000 / 16 / (0x10000 - (m_io_regs[0x34] << 8) - data)); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x35: // UART TX Data - verboselog(3, "io_w: UART Baud Rate = %u\n", 27000000 / 16 / (0x10000 - (data << 8) - m_io_regs[0x33])); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x5a: // I2C Access Mode - verboselog(3, "io_w: I2C Access Mode = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x5b: // I2C Device Address - verboselog(3, "io_w: I2C Device Address = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x5c: // I2C Sub-Address - verboselog(3, "io_w: I2C Sub-Address = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x5d: // I2C Data Out - verboselog(3, "io_w: I2C Data Out = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x5e: // I2C Data In - verboselog(3, "io_w: I2C Data In = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x5f: // I2C Controller Mode - verboselog(3, "io_w: I2C Controller Mode = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x58: // I2C Command - verboselog(3, "io_w: I2C Command = %04x (%04x)\n", data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - do_i2c(); - break; - - case 0x59: // I2C Status / IRQ Acknowledge(?) - verboselog(3, "io_w: I2C Status / Ack = %04x (%04x)\n", data, mem_mask); - m_io_regs[offset] &= ~data; - break; - - case 0x100: // DMA Source (L) - case 0x101: // DMA Source (H) - case 0x103: // DMA Destination - COMBINE_DATA(&m_io_regs[offset]); - break; - - case 0x102: // DMA Length - spg_do_dma(data); - break; - - default: - verboselog(3, "io_w: Unknown register %04x = %04x (%04x)\n", 0x3d00 + offset, data, mem_mask); - COMBINE_DATA(&m_io_regs[offset]); - break; - } + const uint16_t temp = m_io_p1->read(); + uint16_t value = 0; + value |= (temp & 0x0001) ? 0x8000 : 0; + value |= (temp & 0x0002) ? 0x4000 : 0; + value |= (temp & 0x0004) ? 0x2000 : 0; + value |= (temp & 0x0008) ? 0x1000 : 0; + value |= (temp & 0x0010) ? 0x0800 : 0; + value |= (temp & 0x0020) ? 0x0400 : 0; + value |= (temp & 0x0040) ? 0x0200 : 0; + value |= (temp & 0x0080) ? 0x0100 : 0; + return value; } -/* -WRITE16_MEMBER( spg2xx_game_state::rowscroll_w ) +void spg2xx_game_state::mem_map(address_map &map) { - switch(offset) - { - default: - verboselog(0, "rowscroll_w: %04x = %04x (%04x)\n", 0x2900 + offset, data, mem_mask); - break; - } + map(0x000000, 0x3fffff).bankr("cartbank"); + map(0x000000, 0x003fff).m(m_spg, FUNC(spg2xx_device::map)); } -WRITE16_MEMBER( spg2xx_game_state::spriteram_w ) +void vsmile_state::banked_map(address_map &map) { - switch(offset) - { - default: - verboselog(0, "spriteram_w: %04x = %04x (%04x)\n", 0x2c00 + offset, data, mem_mask); - break; - } + map(0x0000000, 0x00fffff).rom().region("maincpu", 0); + map(0x0100000, 0x01fffff).rom().region("maincpu", 0); + map(0x0200000, 0x02fffff).rom().region("maincpu", 0); + map(0x0300000, 0x03fffff).rom().region("maincpu", 0); + + map(0x0400000, 0x04fffff).rom().region("maincpu", 0); + map(0x0500000, 0x05fffff).rom().region("maincpu", 0); + map(0x0600000, 0x06fffff).rom().region("maincpu", 0); + map(0x0700000, 0x07fffff).rom().region("maincpu", 0); + + map(0x0800000, 0x08fffff).rom().region("maincpu", 0); + map(0x0900000, 0x09fffff).rom().region("maincpu", 0); + map(0x0a00000, 0x0afffff).rom().region("maincpu", 0); + map(0x0b00000, 0x0bfffff).rom().region("maincpu", 0); + + map(0x1000000, 0x10fffff).bankr("cartbank0"); + map(0x1100000, 0x11fffff).bankr("cartbank0"); + map(0x1200000, 0x12fffff).bankr("cartbank0"); + map(0x1300000, 0x13fffff).bankr("cartbank0"); + + map(0x1400000, 0x14fffff).bankr("cartbank0"); + map(0x1500000, 0x15fffff).bankr("cartbank0"); + map(0x1600000, 0x16fffff).bankr("cartbank1"); + map(0x1700000, 0x17fffff).bankr("cartbank1"); + + map(0x1800000, 0x18fffff).r(FUNC(vsmile_state::bank0_r)); + map(0x1900000, 0x19fffff).r(FUNC(vsmile_state::bank1_r)); + map(0x1a00000, 0x1afffff).nopr(); + map(0x1b00000, 0x1bfffff).r(FUNC(vsmile_state::bank3_r)); } -*/ -void spg2xx_game_state::vii_mem(address_map &map) +void vsmile_state::mem_map(address_map &map) { - map(0x000000, 0x3fffff).bankr("cart"); - - map(0x000000, 0x0027ff).ram().share("p_ram"); - map(0x002800, 0x0028ff).rw(FUNC(spg2xx_game_state::video_r), FUNC(spg2xx_game_state::video_w)); - map(0x002900, 0x002aff).ram().share("p_rowscroll"); - map(0x002b00, 0x002bff).ram().share("p_palette"); - map(0x002c00, 0x002fff).ram().share("p_spriteram"); - map(0x003000, 0x0037ff).rw(FUNC(spg2xx_game_state::audio_r), FUNC(spg2xx_game_state::audio_w)); - map(0x003d00, 0x003eff).rw(FUNC(spg2xx_game_state::io_r), FUNC(spg2xx_game_state::io_w)); + map(0x000000, 0x3fffff).r(m_bankdev, FUNC(address_map_bank_device::read16)); + map(0x000000, 0x003fff).m(m_spg, FUNC(spg2xx_device::map)); } static INPUT_PORTS_START( vii ) @@ -1040,6 +548,15 @@ static INPUT_PORTS_START( vii ) PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("Button B") PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) PORT_NAME("Button C") PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(1) PORT_NAME("Button D") + + PORT_START("MOTIONX") + PORT_BIT( 0x3ff, 0x200, IPT_PADDLE ) PORT_MINMAX(0x000, 0x3ff) PORT_SENSITIVITY(50) PORT_KEYDELTA(50) PORT_NAME("Motion Control X") + + PORT_START("MOTIONY") + PORT_BIT( 0x3ff, 0x200, IPT_PADDLE ) PORT_MINMAX(0x000, 0x3ff) PORT_SENSITIVITY(50) PORT_KEYDELTA(50) PORT_NAME("Motion Control Y") PORT_PLAYER(2) + + PORT_START("MOTIONZ") + PORT_BIT( 0x3ff, 0x200, IPT_PADDLE ) PORT_MINMAX(0x000, 0x3ff) PORT_SENSITIVITY(50) PORT_KEYDELTA(50) PORT_NAME("Motion Control Z") PORT_PLAYER(3) INPUT_PORTS_END static INPUT_PORTS_START( batman ) @@ -1064,6 +581,14 @@ static INPUT_PORTS_START( vsmile ) PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("Menu") PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) PORT_NAME("B Button") PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(1) PORT_NAME("X Button") + + PORT_START("P2") + PORT_DIPNAME( 0x0001, 0x0001, "POWER ON" ) + PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0002, 0x0002, "POWER OFF" ) + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) INPUT_PORTS_END static INPUT_PORTS_START( walle ) @@ -1117,16 +642,15 @@ static INPUT_PORTS_START( rad_skat ) PORT_START("P2") PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED ) // read but unused? - - PORT_START("P3") // PAL/NTSC flag - PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_CUSTOM ) + PORT_START("P3") + PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_CUSTOM ) // NTSC (1) / PAL (0) flag INPUT_PORTS_END static INPUT_PORTS_START( rad_skatp ) PORT_INCLUDE(rad_skat) - PORT_MODIFY("P3") // PAL/NTSC flag - PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_CUSTOM ) + PORT_MODIFY("P3") + PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_CUSTOM ) // NTSC (1) / PAL (0) flag INPUT_PORTS_END static INPUT_PORTS_START( rad_sktv ) @@ -1223,10 +747,6 @@ static INPUT_PORTS_START( rad_sktv ) PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - - PORT_START("P3") // PAL/NTSC flag - PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_CUSTOM ) // NTSC - //PORT_BIT( 0xffff, IP_ACTIVE_PAL, IPT_CUSTOM ) // PAL INPUT_PORTS_END /* hold 'Console Down' while powering up to get the test menu, including input tests @@ -1248,33 +768,6 @@ static INPUT_PORTS_START( rad_crik ) PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN ) INPUT_PORTS_END -void spg2xx_game_state::test_centered(uint8_t *ROM) -{ - if (ROM[0x3cd808] == 0x99 && - ROM[0x3cd809] == 0x99 && - ROM[0x3cd80a] == 0x83 && - ROM[0x3cd80b] == 0x5e && - ROM[0x3cd80c] == 0x52 && - ROM[0x3cd80d] == 0x6b && - ROM[0x3cd80e] == 0x78 && - ROM[0x3cd80f] == 0x7f) - { - m_centered_coordinates = 0; - } -} - - - -TIMER_CALLBACK_MEMBER(spg2xx_game_state::tmb1_tick) -{ - m_io_regs[0x22] |= 1; -} - -TIMER_CALLBACK_MEMBER(spg2xx_game_state::tmb2_tick) -{ - m_io_regs[0x22] |= 2; -} - void spg2xx_cart_state::machine_start() { spg2xx_game_state::machine_start(); @@ -1289,102 +782,106 @@ void spg2xx_cart_state::machine_start() } } -void spg2xx_game_state::machine_start() +void vsmile_state::machine_start() { - memset(m_video_regs, 0, 0x100 * sizeof(m_video_regs[0])); - memset(m_io_regs, 0, 0x200 * sizeof(m_io_regs[0])); - m_current_bank = 0; + // if there's a cart, override the standard banking + if (m_cart && m_cart->exists()) + { + std::string region_tag; + m_cart_rom = memregion(region_tag.assign(m_cart->tag()).append(GENERIC_ROM_REGION_TAG).c_str()); + const uint32_t banks = (m_cart_rom->bytes() + 0x1fffff) / 0x200000; + for (uint32_t i = 0; i < 2; i++) + { + m_cart_banks[i]->configure_entries(0, banks, m_cart_rom->base(), 0x200000); + m_cart_banks[i]->set_entry(i % banks); + } + } + else + { + for (uint32_t i = 0; i < 2; i++) + { + m_cart_rom = memregion("maincpu"); + m_cart_banks[i]->configure_entries(0, (m_cart_rom->bytes() + 0x1fffff) / 0x200000, m_cart_rom->base(), 0x200000); + m_cart_banks[i]->set_entry(0); + } + } + m_bankdev->set_bank(m_cart && m_cart->exists() ? 4 : 0); + + m_serial_eeprom = std::make_unique<uint8_t[]>(0x400); + if (m_nvram) + m_nvram->set_base(&m_serial_eeprom[0], 0x400); + + m_pad_timer = timer_alloc(TIMER_PAD); + m_pad_timer->adjust(attotime::never); +} + +void vsmile_state::machine_reset() +{ + m_portb_data = 0; + m_portc_data = 0; + + m_pad_timer->adjust(attotime::from_hz(100), 0, attotime::from_hz(100)); + m_pad_counter = 0; +} + +void spg2xx_cart_state::machine_reset() +{ m_controller_input[0] = 0; m_controller_input[4] = 0; m_controller_input[6] = 0xff; m_controller_input[7] = 0; - m_w60_controller_input = -1; - - m_video_regs[0x36] = 0xffff; - m_video_regs[0x37] = 0xffff; - - m_tmb1 = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(spg2xx_game_state::tmb1_tick), this)); - m_tmb2 = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(spg2xx_game_state::tmb2_tick), this)); - m_tmb1->reset(); - m_tmb2->reset(); +} +void spg2xx_game_state::machine_start() +{ m_bank->configure_entries(0, ceilf((float)memregion("maincpu")->bytes() / 0x800000), memregion("maincpu")->base(), 0x800000); m_bank->set_entry(0); + + m_serial_eeprom = std::make_unique<uint8_t[]>(0x400); + if (m_nvram) + m_nvram->set_base(&m_serial_eeprom[0], 0x400); } void spg2xx_game_state::machine_reset() { + m_current_bank = 0; + + m_w60_controller_input = -1; + m_w60_porta_data = 0; } -INTERRUPT_GEN_MEMBER(spg2xx_game_state::vii_vblank) +WRITE_LINE_MEMBER(spg2xx_game_state::poll_controls) { - uint32_t x = machine().rand() & 0x3ff; - uint32_t y = machine().rand() & 0x3ff; - uint32_t z = machine().rand() & 0x3ff; + if (!state) + return; + + int32_t x = m_io_motionx ? ((int32_t)m_io_motionx->read() - 0x200) : 0; + int32_t y = m_io_motiony ? ((int32_t)m_io_motiony->read() - 0x200) : 0; + int32_t z = m_io_motionz ? ((int32_t)m_io_motionz->read() - 0x200) : 0; + + uint8_t old_input[8]; + memcpy(old_input, m_controller_input, 8); m_controller_input[0] = m_io_p1->read(); m_controller_input[1] = (uint8_t)x; m_controller_input[2] = (uint8_t)y; m_controller_input[3] = (uint8_t)z; m_controller_input[4] = 0; - x >>= 8; - y >>= 8; - z >>= 8; + x = (x >> 8) & 3; + y = (y >> 8) & 3; + z = (z >> 8) & 3; m_controller_input[5] = (z << 4) | (y << 2) | x; m_controller_input[6] = 0xff; m_controller_input[7] = 0; - m_uart_rx_count = 0; - - VII_VIDEO_IRQ_STATUS = VII_VIDEO_IRQ_ENABLE & 1; - if (VII_VIDEO_IRQ_STATUS) - { - verboselog(0, "Video IRQ\n"); - m_maincpu->set_input_line(UNSP_IRQ0_LINE, ASSERT_LINE); - } - - // { - // verboselog(0, "audio 1 IRQ\n"); - // m_maincpu->set_input_line(UNSP_IRQ1_LINE, ASSERT_LINE); - // } - if (m_io_regs[0x22] & m_io_regs[0x21] & 0x0c00) + if (memcmp(old_input, m_controller_input, 8)) { - verboselog(0, "timerA, timer B IRQ\n"); - m_maincpu->set_input_line(UNSP_IRQ2_LINE, ASSERT_LINE); - } - - //if(m_io_regs[0x22] & m_io_regs[0x21] & 0x2100) - // For now trigger always if any enabled - if (VII_CTLR_IRQ_ENABLE) - { - verboselog(0, "UART, ADC IRQ\n"); - m_maincpu->set_input_line(UNSP_IRQ3_LINE, ASSERT_LINE); - } - // { - // verboselog(0, "audio 4 IRQ\n"); - // m_maincpu->set_input_line(UNSP_IRQ4_LINE, ASSERT_LINE); - // } - - if (m_io_regs[0x22] & m_io_regs[0x21] & 0x1200) - { - verboselog(0, "External IRQ\n"); - m_maincpu->set_input_line(UNSP_IRQ5_LINE, ASSERT_LINE); - } - if (m_io_regs[0x22] & m_io_regs[0x21] & 0x0070) - { - verboselog(0, "1024Hz, 2048HZ, 4096HZ IRQ\n"); - m_maincpu->set_input_line(UNSP_IRQ6_LINE, ASSERT_LINE); - } - if (m_io_regs[0x22] & m_io_regs[0x21] & 0x008b) - { - verboselog(0, "TMB1, TMB2, 4Hz, key change IRQ\n"); - m_maincpu->set_input_line(UNSP_IRQ7_LINE, ASSERT_LINE); + for(int i = 0; i < 8; i++) + m_spg->uart_rx(m_controller_input[i]); } } - - DEVICE_IMAGE_LOAD_MEMBER(spg2xx_cart_state, vii_cart) { uint32_t size = m_cart->common_get_size("rom"); @@ -1398,12 +895,10 @@ DEVICE_IMAGE_LOAD_MEMBER(spg2xx_cart_state, vii_cart) m_cart->rom_alloc(size, GENERIC_ROM16_WIDTH, ENDIANNESS_LITTLE); m_cart->common_load_rom(m_cart->get_rom_base(), size, "rom"); - test_centered(m_cart->get_rom_base()); - return image_init_result::PASS; } -DEVICE_IMAGE_LOAD_MEMBER(spg2xx_cart_state, vsmile_cart) +DEVICE_IMAGE_LOAD_MEMBER(vsmile_state, cart) { uint32_t size = m_cart->common_get_size("rom"); @@ -1413,74 +908,189 @@ DEVICE_IMAGE_LOAD_MEMBER(spg2xx_cart_state, vsmile_cart) return image_init_result::PASS; } -MACHINE_CONFIG_START(spg2xx_game_state::spg2xx_base) - MCFG_DEVICE_ADD( "maincpu", UNSP, XTAL(27'000'000)) - MCFG_DEVICE_PROGRAM_MAP( vii_mem ) - MCFG_DEVICE_VBLANK_INT_DRIVER("screen", spg2xx_game_state, vii_vblank) +void spg2xx_game_state::spg2xx_base(machine_config &config) +{ + UNSP(config, m_maincpu, XTAL(27'000'000)); + m_maincpu->set_addrmap(AS_PROGRAM, &spg2xx_game_state::mem_map); + + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_refresh_hz(60); + m_screen->set_size(320, 262); + m_screen->set_visarea(0, 320-1, 0, 240-1); + m_screen->set_screen_update("spg", FUNC(spg2xx_device::screen_update)); + m_screen->screen_vblank().set(m_spg, FUNC(spg2xx_device::vblank)); + +#if SPG2XX_VISUAL_AUDIO_DEBUG + SCREEN(config, m_debug_screen, SCREEN_TYPE_RASTER); + m_debug_screen->set_refresh_hz(60); + m_debug_screen->set_size(1024, 768); + m_debug_screen->set_visarea(0, 1024-1, 0, 768-1); + m_debug_screen->set_screen_update("spg", FUNC(spg2xx_device::debug_screen_update)); +#endif - MCFG_SCREEN_ADD( "screen", RASTER ) - MCFG_SCREEN_REFRESH_RATE(60) - MCFG_SCREEN_SIZE(320, 240) - MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0, 240-1) - MCFG_SCREEN_UPDATE_DRIVER(spg2xx_game_state, screen_update_vii) - MCFG_PALETTE_ADD("palette", 32768) -MACHINE_CONFIG_END + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + m_spg->add_route(ALL_OUTPUTS, "lspeaker", 0.5); + m_spg->add_route(ALL_OUTPUTS, "rspeaker", 0.5); +} + +void spg2xx_game_state::non_spg_base(machine_config &config) +{ +#if SPG2XX_VISUAL_AUDIO_DEBUG + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen, m_debug_screen); +#else + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); +#endif -MACHINE_CONFIG_START(spg2xx_game_state::spg2xx_basep) spg2xx_base(config); +} - MCFG_SCREEN_MODIFY( "screen" ) - MCFG_SCREEN_REFRESH_RATE(50) -MACHINE_CONFIG_END +void spg2xx_game_state::spg2xx_basep(machine_config &config) +{ + spg2xx_base(config); + + m_screen->set_refresh_hz(50); + m_screen->set_size(320, 312); +} +void spg2xx_cart_state::vii(machine_config &config) +{ +#if SPG2XX_VISUAL_AUDIO_DEBUG + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen, m_debug_screen); +#else + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); +#endif -MACHINE_CONFIG_START(spg2xx_cart_state::vii) spg2xx_base(config); - MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_plain_slot, "vii_cart") - MCFG_GENERIC_WIDTH(GENERIC_ROM16_WIDTH) - MCFG_GENERIC_LOAD(spg2xx_cart_state, vii_cart) + m_screen->screen_vblank().append(FUNC(spg2xx_cart_state::poll_controls)); - MCFG_SOFTWARE_LIST_ADD("vii_cart","vii") -MACHINE_CONFIG_END + m_spg->portb_out().set(FUNC(spg2xx_cart_state::vii_portb_w)); + m_spg->eeprom_w().set(FUNC(spg2xx_cart_state::eeprom_w)); + m_spg->eeprom_r().set(FUNC(spg2xx_cart_state::eeprom_r)); -MACHINE_CONFIG_START(spg2xx_cart_state::vsmile) + NVRAM(config, m_nvram, nvram_device::DEFAULT_ALL_1); + + GENERIC_CARTSLOT(config, m_cart, generic_plain_slot, "vii_cart"); + m_cart->set_width(GENERIC_ROM16_WIDTH); + m_cart->set_device_load(device_image_load_delegate(&spg2xx_cart_state::device_image_load_vii_cart, this)); + + SOFTWARE_LIST(config, "vii_cart").set_original("vii"); +} + +void vsmile_state::vsmile(machine_config &config) +{ +#if SPG2XX_VISUAL_AUDIO_DEBUG + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen, m_debug_screen); +#else + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); +#endif spg2xx_base(config); - MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_plain_slot, "vsmile_cart") - MCFG_GENERIC_WIDTH(GENERIC_ROM16_WIDTH) - MCFG_GENERIC_LOAD(spg2xx_cart_state, vsmile_cart) + m_maincpu->set_addrmap(AS_PROGRAM, &vsmile_state::mem_map); + + m_spg->portb_in().set(FUNC(vsmile_state::portb_r)); + m_spg->portc_in().set(FUNC(vsmile_state::portc_r)); + m_spg->portb_out().set(FUNC(vsmile_state::portb_w)); + m_spg->portc_out().set(FUNC(vsmile_state::portc_w)); + m_spg->chip_select().set(FUNC(vsmile_state::chip_sel_w)); + m_spg->uart_tx().set(FUNC(vsmile_state::uart_tx)); + + GENERIC_CARTSLOT(config, m_cart, generic_plain_slot, "vsmile_cart"); + m_cart->set_width(GENERIC_ROM16_WIDTH); + m_cart->set_device_load(device_image_load_delegate(&vsmile_state::device_image_load_cart, this)); + + ADDRESS_MAP_BANK(config, m_bankdev); + m_bankdev->set_addrmap(AS_PROGRAM, &vsmile_state::banked_map); + m_bankdev->set_endianness(ENDIANNESS_LITTLE); + m_bankdev->set_data_width(16); + m_bankdev->set_shift(-1); + m_bankdev->set_stride(0x400000); + + SOFTWARE_LIST(config, "cart_list").set_original("vsmile_cart"); +} - MCFG_SOFTWARE_LIST_ADD("cart_list","vsmile_cart") -MACHINE_CONFIG_END +void vsmile_state::vsmilep(machine_config &config) +{ + vsmile(config); + m_spg->set_pal(true); +} -void spg2xx_game_state::batman(machine_config &config) +void spg2xx_game_state::wireless60(machine_config &config) { +#if SPG2XX_VISUAL_AUDIO_DEBUG + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen, m_debug_screen); +#else + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); +#endif spg2xx_base(config); - I2CMEM(config, "i2cmem", 0).set_data_size(0x200); + m_screen->screen_vblank().append(FUNC(spg2xx_game_state::poll_controls)); + + m_spg->porta_out().set(FUNC(spg2xx_game_state::wireless60_porta_w)); + m_spg->portb_out().set(FUNC(spg2xx_game_state::wireless60_portb_w)); + m_spg->porta_in().set(FUNC(spg2xx_game_state::wireless60_porta_r)); } +void spg2xx_game_state::jakks(machine_config &config) +{ +#if SPG2XX_VISUAL_AUDIO_DEBUG + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen, m_debug_screen); +#else + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); +#endif + spg2xx_base(config); + + m_spg->porta_in().set(FUNC(spg2xx_cart_state::jakks_porta_r)); + + I2CMEM(config, m_i2cmem, 0).set_data_size(0x200); +} -void spg2xx_cart_state::init_vii() +void spg2xx_game_state::walle(machine_config &config) { - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_cart_state::do_spg243_vii_io, this); - m_centered_coordinates = 1; + jakks(config); + + m_spg->portc_in().set(FUNC(spg2xx_game_state::walle_portc_r)); + m_spg->portc_out().set(FUNC(spg2xx_game_state::walle_portc_w)); } -void spg2xx_cart_state::init_vsmile() +void spg2xx_game_state::rad_skat(machine_config &config) { - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_cart_state::do_spg243_vsmile_io, this); - m_centered_coordinates = 1; +#if SPG2XX_VISUAL_AUDIO_DEBUG + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen, m_debug_screen); +#else + SPG24X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); +#endif + spg2xx_base(config); + + m_spg->porta_in().set_ioport("P1"); + m_spg->portb_in().set_ioport("P2"); + m_spg->portc_in().set_ioport("P3"); + m_spg->eeprom_w().set(FUNC(spg2xx_game_state::eeprom_w)); + m_spg->eeprom_r().set(FUNC(spg2xx_game_state::eeprom_r)); + + NVRAM(config, m_nvram, nvram_device::DEFAULT_ALL_1); } -void spg2xx_game_state::init_batman() +void spg2xx_game_state::rad_skatp(machine_config &config) { - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_game_state::do_spg243_batman_io, this); - m_centered_coordinates = 1; + rad_skat(config); + m_spg->set_pal(true); } -void spg2xx_game_state::init_rad_skat() +void spg2xx_game_state::rad_crik(machine_config &config) { - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_game_state::do_spg240_rad_skat_io, this); - m_centered_coordinates = 1; +#if SPG2XX_VISUAL_AUDIO_DEBUG + SPG28X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen, m_debug_screen); +#else + SPG28X(config, m_spg, XTAL(27'000'000), m_maincpu, m_screen); +#endif + spg2xx_base(config); + + m_spg->porta_in().set_ioport("P1"); + m_spg->portb_in().set_ioport("P2"); + m_spg->portc_in().set_ioport("P3"); + m_spg->eeprom_w().set(FUNC(spg2xx_game_state::eeprom_w)); + m_spg->eeprom_r().set(FUNC(spg2xx_game_state::eeprom_r)); + + NVRAM(config, m_nvram, nvram_device::DEFAULT_ALL_1); } READ16_MEMBER(spg2xx_game_state::rad_crik_hack_r) @@ -1494,25 +1104,8 @@ READ16_MEMBER(spg2xx_game_state::rad_crik_hack_r) void spg2xx_game_state::init_rad_crik() { - m_maincpu->space(AS_PROGRAM).install_writeonly(0x5800, 0x5bff, m_p_spriteram); // is this due to a CPU or DMA bug? 5800 == 2c00 << 1 - // not 100% sure what this is waiting on, could be eeprom as it seems to end up here frequently during the eeprom test, patch running code, not ROM, so that checksum can still pass m_maincpu->space(AS_PROGRAM).install_read_handler(0xf851, 0xf851, read16_delegate(FUNC(spg2xx_game_state::rad_crik_hack_r),this)); - - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_game_state::do_spg240_rad_skat_io, this); - m_centered_coordinates = 1; -} - -void spg2xx_game_state::init_walle() -{ - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_game_state::do_spg243_batman_io, this); - m_centered_coordinates = 0; -} - -void spg2xx_game_state::init_wirels60() -{ - m_vii_io_rw = vii_io_rw_delegate(&spg2xx_game_state::do_spg243_wireless60_io, this); - m_centered_coordinates = 1; } ROM_START( vii ) @@ -1601,7 +1194,7 @@ System: Wireless Air 60 ROM: Toshiba TC58NVG0S3ETA00 RAM: ESMT M12L128168A -This is a RAW NAND FLASH DUMP +This is a raw NAND flash dump Interesting Strings: @@ -1622,7 +1215,7 @@ ROM_START( wlsair60 ) ROM_END /* -Wireless +Wireless Hunting Video Game System (info provided with dump) System: Wireless Hunting Video Game System @@ -1697,40 +1290,37 @@ which is also found in the Wireless Air 60 ROM. */ -ROM_START( wireless ) +ROM_START( wrlshunt ) ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD16_WORD_SWAP( "wireless.bin", 0x0000, 0x8000000, CRC(a6ecc20e) SHA1(3645f23ba2bb218e92d4560a8ae29dddbaabf796) ) ROM_END -// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +// year, name, parent, compat, machine, input, class, init, company, fullname, flags // VTech systems -CONS( 2005, vsmile, 0, 0, vsmile, vsmile, spg2xx_cart_state, init_vsmile, "VTech", "V.Smile (US)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -CONS( 2005, vsmileg, vsmile, 0, vsmile, vsmile, spg2xx_cart_state, init_vsmile, "VTech", "V.Smile (Germany)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -CONS( 2005, vsmilef, vsmile, 0, vsmile, vsmile, spg2xx_cart_state, init_vsmile, "VTech", "V.Smile (France)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -CONS( 2005, vsmileb, 0, 0, vsmile, vsmile, spg2xx_cart_state, init_vsmile, "VTech", "V.Smile Baby (US)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +CONS( 2005, vsmile, 0, 0, vsmile, vsmile, vsmile_state, empty_init, "VTech", "V.Smile (US)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +CONS( 2005, vsmileg, vsmile, 0, vsmilep, vsmile, vsmile_state, empty_init, "VTech", "V.Smile (Germany)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +CONS( 2005, vsmilef, vsmile, 0, vsmilep, vsmile, vsmile_state, empty_init, "VTech", "V.Smile (France)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +CONS( 2005, vsmileb, 0, 0, vsmile, vsmile, vsmile_state, empty_init, "VTech", "V.Smile Baby (US)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) // Jungle Soft TV games -CONS( 2007, vii, 0, 0, vii, vii, spg2xx_cart_state, init_vii, "Jungle Soft / KenSingTon / Chintendo / Siatronics", "Vii", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) // some games run, others crash - -CONS( 2010, zone60, 0, 0, spg2xx_base, wirels60, spg2xx_game_state, init_wirels60, "Jungle Soft / Ultimate Products (HK) Ltd", "Zone 60", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) -CONS( 2010, wirels60, 0, 0, spg2xx_base, wirels60, spg2xx_game_state, init_wirels60, "Jungle Soft / Kids Station Toys Inc", "Wireless 60", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +CONS( 2007, vii, 0, 0, vii, vii, spg2xx_cart_state, empty_init, "Jungle Soft / KenSingTon / Siatronics", "Vii", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // motion controls are awkward, but playable for the most part +CONS( 2010, zone60, 0, 0, wireless60, wirels60, spg2xx_game_state, empty_init, "Jungle's Soft / Ultimate Products (HK) Ltd", "Zone 60", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +CONS( 2010, wirels60, 0, 0, wireless60, wirels60, spg2xx_game_state, empty_init, "Jungle Soft / Kids Station Toys Inc", "Wireless 60", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // JAKKS Pacific Inc TV games -CONS( 2004, batmantv, 0, 0, batman, batman, spg2xx_game_state, init_batman, "JAKKS Pacific Inc / HotGen Ltd", "The Batman", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) -CONS( 2008, walle, 0, 0, batman, walle, spg2xx_game_state, init_walle, "JAKKS Pacific Inc", "Wall-E", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +CONS( 2004, batmantv, 0, 0, jakks, batman, spg2xx_game_state, empty_init, "JAKKS Pacific Inc / HotGen Ltd", "The Batman", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +CONS( 2008, walle, 0, 0, walle, walle, spg2xx_game_state, empty_init, "JAKKS Pacific Inc", "Wall-E", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // Radica TV games -CONS( 2006, rad_skat, 0, 0, spg2xx_base, rad_skat, spg2xx_game_state, init_rad_skat, "Radica", "Play TV Skateboarder (NTSC)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) -CONS( 2006, rad_skatp, rad_skat,0, spg2xx_basep,rad_skatp,spg2xx_game_state, init_rad_skat, "Radica", "Connectv Skateboarder (PAL)", MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) - -CONS( 2006, rad_crik, 0, 0, spg2xx_basep,rad_crik, spg2xx_game_state, init_rad_crik, "Radica", "Connectv Cricket (PAL)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) // Version 3.00 20/03/06 is listed in INTERNAL TEST - -CONS( 2007, rad_sktv, 0, 0, spg2xx_base, rad_sktv, spg2xx_game_state, init_rad_skat, "Radica", "Skannerz TV", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) - +CONS( 2006, rad_skat, 0, 0, rad_skat, rad_skat, spg2xx_game_state, empty_init, "Radica", "Play TV Skateboarder (NTSC)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +CONS( 2006, rad_skatp, rad_skat, 0, rad_skatp, rad_skatp, spg2xx_game_state, empty_init, "Radica", "Connectv Skateboarder (PAL)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +CONS( 2006, rad_crik, 0, 0, rad_crik, rad_crik, spg2xx_game_state, empty_init, "Radica", "Connectv Cricket (PAL)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // Version 3.00 20/03/06 is listed in INTERNAL TEST +CONS( 2007, rad_sktv, 0, 0, rad_skat, rad_sktv, spg2xx_game_state, empty_init, "Radica", "Skannerz TV", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // might not fit here. First 0x8000 bytes are blank (not too uncommon for these) then rest of rom looks like it's probably encrypted at least -CONS( 2009, zone40, 0, 0, spg2xx_base, wirels60, spg2xx_game_state, init_wirels60, "Jungle Soft / Ultimate Products (HK) Ltd", "Zone 40", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -// might not fit here, NAND dump, has internal bootstrap at least, see above. -CONS( 2010, wlsair60, 0, 0, spg2xx_base, wirels60, spg2xx_game_state, init_wirels60, "Jungle Soft / Kids Station Toys Inc", "Wireless Air 60", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -CONS( 2011, wireless, 0, 0, spg2xx_base, wirels60, spg2xx_game_state, init_wirels60, "Hamy / Kids Station Toys Inc", "Wireless", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +CONS( 2009, zone40, 0, 0, non_spg_base, wirels60, spg2xx_game_state, empty_init, "Jungle Soft / Ultimate Products (HK) Ltd", "Zone 40", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) + +// NAND dumps w/ internal bootstrap. Almost certainly do not fit in this driver, as the SPG2xx can only address up to 4Mwords. +CONS( 2010, wlsair60, 0, 0, non_spg_base, wirels60, spg2xx_game_state, empty_init, "Jungle Soft / Kids Station Toys Inc", "Wireless Air 60", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +CONS( 2011, wrlshunt, 0, 0, non_spg_base, wirels60, spg2xx_game_state, empty_init, "Hamy / Kids Station Toys Inc", "Wireless Hunting Video Game System", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/drivers/viper.cpp b/src/mame/drivers/viper.cpp index 5e4e5ccc612..3581c9667b3 100644 --- a/src/mame/drivers/viper.cpp +++ b/src/mame/drivers/viper.cpp @@ -81,7 +81,7 @@ boxingm Goes to attract mode when ran with memory card check. Coins up. code1d,b RTC self check bad gticlub2 Attract mode works. Coins up. Hangs in car selection. - gticlub2ea Doesn't boot: bad CHD? + gticlub2ea Asks for password. jpark3 POST?: Shows "Now loading..." then black screen (sets global timer 1 on EPIC) - with IRQ3 crashes at first 3d frame mocapglf Security code error mocapb,j Crash after self checks @@ -2553,8 +2553,8 @@ ROM_START(gticlub2ea) //* ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00) /* M48T58 Timekeeper NVRAM */ ROM_LOAD("941eaa_nvram.u39", 0x00000, 0x2000, BAD_DUMP CRC(5ee7004d) SHA1(92e0ce01049308f459985d466fbfcfac82f34a47)) - DISK_REGION( "ata:0:hdd:image" ) - DISK_IMAGE( "941a02", 0, NO_DUMP ) + DISK_REGION( "ata:0:hdd:image" ) // 32 MB Memory Card labeled 941 EA A02 + DISK_IMAGE( "941a02", 0, SHA1(dd180ad92dd344b38f160e31833077e342cee38d) ) // with ATA id included ROM_END /* This CF card has sticker B41C02 */ diff --git a/src/mame/drivers/vixen.cpp b/src/mame/drivers/vixen.cpp index 9751536838a..9f349bcae61 100644 --- a/src/mame/drivers/vixen.cpp +++ b/src/mame/drivers/vixen.cpp @@ -292,8 +292,7 @@ void vixen_state::vixen_io(address_map &map) map(0x18, 0x18).mirror(0x07).r(FUNC(vixen_state::ieee488_r)); map(0x20, 0x21).mirror(0x04).w(m_io_i8155, FUNC(i8155_device::ale_w)); map(0x28, 0x28).mirror(0x05).rw(m_io_i8155, FUNC(i8155_device::read), FUNC(i8155_device::write)); - map(0x30, 0x30).mirror(0x06).rw(m_usart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x31, 0x31).mirror(0x06).rw(m_usart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x30, 0x31).mirror(0x06).rw(m_usart, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x38, 0x38).mirror(0x07).r(FUNC(vixen_state::port3_r)); // AM_RANGE(0xf0, 0xff) Hard Disk? } diff --git a/src/mame/drivers/vk100.cpp b/src/mame/drivers/vk100.cpp index 3090162f4e1..0b9fa43acb5 100644 --- a/src/mame/drivers/vk100.cpp +++ b/src/mame/drivers/vk100.cpp @@ -749,15 +749,13 @@ void vk100_state::vk100_io(address_map &map) map(0x64, 0x67).mirror(0x80).w(FUNC(vk100_state::vgEX)); //EX MOV, DOT, VEC, ER map(0x68, 0x68).mirror(0x83).w(FUNC(vk100_state::KBDW)); //KBDW (probably AM_MIRROR(0x03)) map(0x6C, 0x6C).mirror(0x83).w(COM5016T_TAG, FUNC(com8116_device::stt_str_w)); //LD BAUD (baud rate clock divider setting for i8251 tx and rx clocks) (probably AM_MIRROR(0x03)) - map(0x70, 0x70).mirror(0x82).w(m_uart, FUNC(i8251_device::data_w)); //LD COMD (i8251 data reg) - map(0x71, 0x71).mirror(0x82).w(m_uart, FUNC(i8251_device::control_w)); //LD COM (i8251 control reg) + map(0x70, 0x71).mirror(0x82).w(m_uart, FUNC(i8251_device::write)); //LD COMD //AM_RANGE (0x74, 0x74) AM_MIRROR(0x83) AM_WRITE(unknown_74) //AM_RANGE (0x78, 0x78) AM_MIRROR(0x83) AM_WRITE(kbdw) //KBDW ?(mirror?) //AM_RANGE (0x7C, 0x7C) AM_MIRROR(0x83) AM_WRITE(unknown_7C) map(0x40, 0x47).mirror(0x80).r(FUNC(vk100_state::SYSTAT_A)); // SYSTAT A (state machine done and last 4 bits of vram, as well as dipswitches) map(0x48, 0x48).mirror(0x87/*0x80*/).r(FUNC(vk100_state::SYSTAT_B)); // SYSTAT B (uart stuff) - map(0x50, 0x50).mirror(0x86).r(m_uart, FUNC(i8251_device::data_r)); // UART O - map(0x51, 0x51).mirror(0x86).r(m_uart, FUNC(i8251_device::status_r)); // UAR + map(0x50, 0x51).mirror(0x86).r(m_uart, FUNC(i8251_device::read)); // UART O //AM_RANGE (0x58, 0x58) AM_MIRROR(0x87) AM_READ(unknown_58) //AM_RANGE (0x60, 0x60) AM_MIRROR(0x87) AM_READ(unknown_60) //AM_RANGE (0x68, 0x68) AM_MIRROR(0x87) AM_READ(unknown_68) // NOT USED diff --git a/src/mame/drivers/votrpss.cpp b/src/mame/drivers/votrpss.cpp index 29148b476b1..2406bf53c2d 100644 --- a/src/mame/drivers/votrpss.cpp +++ b/src/mame/drivers/votrpss.cpp @@ -136,8 +136,7 @@ void votrpss_state::votrpss_io(address_map &map) { map.global_mask(0xff); map(0x00, 0x03).mirror(0x3c).rw(m_ppi, FUNC(i8255_device::read), FUNC(i8255_device::write)); - map(0x40, 0x40).mirror(0x3e).rw("uart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x41, 0x41).mirror(0x3e).rw("uart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x40, 0x41).mirror(0x3e).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x80, 0x83).mirror(0x3c).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0xc0, 0xc0).mirror(0x3e).rw("ay", FUNC(ay8910_device::data_r), FUNC(ay8910_device::address_w)); map(0xc1, 0xc1).mirror(0x3e).rw("ay", FUNC(ay8910_device::data_r), FUNC(ay8910_device::data_w)); diff --git a/src/mame/drivers/vp122.cpp b/src/mame/drivers/vp122.cpp index 4f96e34bd76..704659218ec 100644 --- a/src/mame/drivers/vp122.cpp +++ b/src/mame/drivers/vp122.cpp @@ -61,8 +61,7 @@ void vp122_state::io_map(address_map &map) { map(0x00, 0x07).rw("avdc", FUNC(scn2674_device::read), FUNC(scn2674_device::write)); map(0x10, 0x1f).rw("duart", FUNC(scn2681_device::read), FUNC(scn2681_device::write)); - map(0x20, 0x20).rw("usart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x21, 0x21).rw("usart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x20, 0x21).rw("usart", FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x50, 0x50).rw("avdc", FUNC(scn2674_device::buffer_r), FUNC(scn2674_device::buffer_w)); map(0x60, 0x60).rw("avdc", FUNC(scn2674_device::attr_buffer_r), FUNC(scn2674_device::attr_buffer_w)); map(0x70, 0x73).w("pit", FUNC(pit8253_device::write)); diff --git a/src/mame/drivers/vt100.cpp b/src/mame/drivers/vt100.cpp index d886f42c362..5d10f0d04f5 100644 --- a/src/mame/drivers/vt100.cpp +++ b/src/mame/drivers/vt100.cpp @@ -190,8 +190,7 @@ void vt100_state::vt100_io(address_map &map) map.unmap_value_high(); map.global_mask(0xff); // 0x00, 0x01 PUSART (Intel 8251) - map(0x00, 0x00).rw(m_pusart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x01, 0x01).rw(m_pusart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x00, 0x01).rw(m_pusart, FUNC(i8251_device::read), FUNC(i8251_device::write)); // 0x02 Baud rate generator map(0x02, 0x02).w("dbrg", FUNC(com8116_device::stt_str_w)); // 0x22 Modem buffer @@ -353,7 +352,7 @@ MACHINE_CONFIG_START(vt100_state::vt100) dbrg.fr_handler().set(m_pusart, FUNC(i8251_device::write_rxc)); dbrg.ft_handler().set(m_pusart, FUNC(i8251_device::write_txc)); - ER1400(config, m_nvr, 0); + ER1400(config, m_nvr); VT100_KEYBOARD(config, m_keyboard, 0).signal_out_callback().set(m_kbduart, FUNC(ay31015_device::write_si)); diff --git a/src/mame/drivers/vtech2.cpp b/src/mame/drivers/vtech2.cpp index a64f3a922ba..a581ffa0f0a 100644 --- a/src/mame/drivers/vtech2.cpp +++ b/src/mame/drivers/vtech2.cpp @@ -95,11 +95,7 @@ void vtech2_state::vtech2_io(address_map &map) map(0x45, 0x45).w(FUNC(vtech2_state::laser_two_color_w)); } -/* 2008-05 FP: -Small note about natural keyboard: currently, -- "Graph" is mapped to 'F11' -- "Del Line" is mapped to 'F12' -*/ + static INPUT_PORTS_START( laser500 ) PORT_START("ROW0") /* KEY ROW 0 */ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) @@ -173,7 +169,7 @@ static INPUT_PORTS_START( laser500 ) PORT_START("ROW7") /* KEY ROW 7 */ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Graph") PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(F11)) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Graph") PORT_CODE(KEYCODE_RALT) PORT_CHAR(UCHAR_MAMEKEY(RALT)) PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('`') PORT_CHAR('~') PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') @@ -204,7 +200,7 @@ static INPUT_PORTS_START( laser500 ) PORT_START("ROWC") /* KEY ROW C */ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Cap Lock") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Del Line") PORT_CODE(KEYCODE_PGUP) PORT_CHAR(UCHAR_MAMEKEY(F12)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Del Line") PORT_CODE(KEYCODE_PGUP) PORT_CHAR(UCHAR_MAMEKEY(PGUP)) PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(HOME)) PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) @@ -217,11 +213,21 @@ static INPUT_PORTS_START( laser500 ) PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR('\\') PORT_CHAR('|') PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Mu \xC2\xA3") PORT_CODE(KEYCODE_TILDE) PORT_CHAR(0xA3) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("\xCE\xBC \xC2\xA3") PORT_CODE(KEYCODE_TILDE) PORT_CHAR(0xa3) PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Del") PORT_CODE(KEYCODE_DEL) PORT_CHAR(UCHAR_MAMEKEY(DEL)) PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Ins") PORT_CODE(KEYCODE_INSERT) PORT_CHAR(UCHAR_MAMEKEY(INSERT)) + + PORT_START("RESET") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Reset") PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(LALT)) PORT_CHANGED_MEMBER(DEVICE_SELF, vtech2_state, reset_button, nullptr) INPUT_PORTS_END +INPUT_CHANGED_MEMBER(vtech2_state::reset_button) +{ + // RESET button is directly wired to Z80 RESET pin, BIOS will detect it (doesn't reset the computer) + m_maincpu->set_input_line(INPUT_LINE_RESET, newval ? ASSERT_LINE : CLEAR_LINE); +} + + /* 2008-05 FP: I wasn't able to find a good picture of the laser 350 to verify the mapping of the emulated keyboard. However, old-computers.com describes it as a laser 500/700 in a laser 300/310 case. The missing inputs seem to confirm this. */ @@ -252,6 +258,9 @@ static INPUT_PORTS_START( laser350 ) PORT_MODIFY("ROWD") /* KEY ROW D */ PORT_BIT(0xff, IP_ACTIVE_LOW, IPT_UNUSED) /* not on the Laser350 */ + PORT_MODIFY("RESET") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED) /* not on the Laser350 */ + /* 2008-05 FP: This input_port seems never to be read. Is it a leftover of the old cassette code? */ PORT_START("TAPE") /* Tape control */ PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Tape Start") PORT_CODE(KEYCODE_SLASH_PAD) diff --git a/src/mame/drivers/wangpc.cpp b/src/mame/drivers/wangpc.cpp index d77a2d3b48d..5126269d9c3 100644 --- a/src/mame/drivers/wangpc.cpp +++ b/src/mame/drivers/wangpc.cpp @@ -1326,9 +1326,9 @@ MACHINE_CONFIG_START(wangpc_state::wangpc) m_epci->dtr_handler().set(RS232_TAG, FUNC(rs232_port_device::write_dtr)); m_epci->txemt_dschg_handler().set(FUNC(wangpc_state::epci_irq_w)); - MCFG_UPD765A_ADD(UPD765_TAG, false, false) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, wangpc_state, fdc_irq)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE(*this, wangpc_state, fdc_drq)) + UPD765A(config, m_fdc, false, false); + m_fdc->intrq_wr_callback().set(FUNC(wangpc_state::fdc_irq)); + m_fdc->drq_wr_callback().set(FUNC(wangpc_state::fdc_drq)); MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", wangpc_floppies, "525dd", wangpc_state::floppy_formats) MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", wangpc_floppies, "525dd", wangpc_state::floppy_formats) diff --git a/src/mame/drivers/wecleman.cpp b/src/mame/drivers/wecleman.cpp index f66affd4761..5cf1db7c6e8 100644 --- a/src/mame/drivers/wecleman.cpp +++ b/src/mame/drivers/wecleman.cpp @@ -1199,6 +1199,55 @@ MACHINE_CONFIG_END ROM_START( wecleman ) ROM_REGION( 0x40000, "maincpu", 0 ) /* Main CPU Code */ + ROM_LOAD16_BYTE( "602g08.17h", 0x00000, 0x10000, CRC(2edf468c) SHA1(6143be7c45a6ab1597207f678602da9ca9d18c6d) ) + ROM_LOAD16_BYTE( "602g11.23h", 0x00001, 0x10000, CRC(ca5ecb25) SHA1(0aeb3cbbf6f7d7293f25fc6d9f56ee934e0c11ff) ) + ROM_LOAD16_BYTE( "602a09.18h", 0x20000, 0x10000, CRC(8a9d756f) SHA1(12605e86ce29e6300b5400720baac7b0293d9e66) ) + ROM_LOAD16_BYTE( "602a10.22h", 0x20001, 0x10000, CRC(569f5001) SHA1(ec2dd331a279083cf847fbbe71c017038a1d562a) ) + + ROM_REGION( 0x10000, "sub", 0 ) /* Sub CPU Code */ + ROM_LOAD16_BYTE( "602a06.18a", 0x00000, 0x08000, CRC(e12c0d11) SHA1(991afd48bf1b2c303b975ce80c754e5972c39111) ) + ROM_LOAD16_BYTE( "602a07.20a", 0x00001, 0x08000, CRC(47968e51) SHA1(9b01b2c6a14dd80327a8f66a7f1994471a4bc38e) ) + + ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU Code */ + ROM_LOAD( "602a01.6d", 0x00000, 0x08000, CRC(deafe5f1) SHA1(4cfbe2841233b1222c22160af7287b7a7821c3a0) ) + + ROM_REGION( 0x200000 * 2, "sprites", 0 ) /* x2, do not dispose, zooming sprites */ + ROM_LOAD( "602a25.12e", 0x000000, 0x20000, CRC(0eacf1f9) SHA1(b4dcd457e68175ffee3da4aff23a241fe33eb500) ) + ROM_LOAD( "602a26.14e", 0x020000, 0x20000, CRC(2182edaf) SHA1(5ae4223a76b3c0be8f66458707f2e6f63fba0b13) ) + ROM_LOAD( "602a27.15e", 0x040000, 0x20000, CRC(b22f08e9) SHA1(1ba99bc4e00e206507e9bfafc989208d6ae6f8a3) ) + ROM_LOAD( "602a28.17e", 0x060000, 0x20000, CRC(5f6741fa) SHA1(9c81634f502da8682673b3b87efe0497af8abbd7) ) + ROM_LOAD( "602a21.6e", 0x080000, 0x20000, CRC(8cab34f1) SHA1(264df01460f44cd5ccdf3c8bd2d3f327874b69ea) ) + ROM_LOAD( "602a22.7e", 0x0a0000, 0x20000, CRC(e40303cb) SHA1(da943437ea2e208ea477f35bb05f77412ecdf9ac) ) + ROM_LOAD( "602a23.9e", 0x0c0000, 0x20000, CRC(75077681) SHA1(32ad10e9e32779c36bb50b402f5c6d941e293942) ) + ROM_LOAD( "602a24.10e", 0x0e0000, 0x20000, CRC(583dadad) SHA1(181ebe87095d739a5903c17ec851864e2275f571) ) + ROM_LOAD( "602a17.12c", 0x100000, 0x20000, CRC(31612199) SHA1(dff58ec3f7d98bfa7e9405f0f23647ff4ecfee62) ) + ROM_LOAD( "602a18.14c", 0x120000, 0x20000, CRC(3f061a67) SHA1(be57c38410c5635311d26afc44b3065e42fa12b7) ) + ROM_LOAD( "602a19.15c", 0x140000, 0x20000, CRC(5915dbc5) SHA1(61ab123c8a4128a18d7eb2cae99ad58203f03ffc) ) + ROM_LOAD( "602a20.17c", 0x160000, 0x20000, CRC(f87e4ef5) SHA1(4c2f0d036925a7ccd32aef3ca12b960a27247bc3) ) + ROM_LOAD( "602a13.6c", 0x180000, 0x20000, CRC(5d3589b8) SHA1(d146cb8511cfe825bdfe8296c7758545542a0faa) ) + ROM_LOAD( "602a14.7c", 0x1a0000, 0x20000, CRC(e3a75f6c) SHA1(80b20323e3560316ffbdafe4fd2f81326e103045) ) + ROM_LOAD( "602a15.9c", 0x1c0000, 0x20000, CRC(0d493c9f) SHA1(02690a1963cadd469bd67cb362384923916900a1) ) + ROM_LOAD( "602a16.10c", 0x1e0000, 0x20000, CRC(b08770b3) SHA1(41871e9261d08fd372b7deb72d939973fb694b54) ) + + ROM_REGION( 0x18000, "layers", 0 ) + ROM_LOAD( "602a31.26g", 0x000000, 0x08000, CRC(01fa40dd) SHA1(2b8aa97f5116f39ae6a8e46f109853d70e370884) ) // layers + ROM_LOAD( "602a30.24g", 0x008000, 0x08000, CRC(be5c4138) SHA1(7aee2ee17ef3e37399a60d9b019cfa733acbf07b) ) + ROM_LOAD( "602a29.23g", 0x010000, 0x08000, CRC(f1a8d33e) SHA1(ed6531f2fd4ad6835a879e9a5600387d8cad6d17) ) + + ROM_REGION( 0x0c000, "road", 0 ) /* road */ + ROM_LOAD( "602a04.11e", 0x000000, 0x08000, CRC(ade9f359) SHA1(58db6be6217ed697827015e50e99e58602042a4c) ) + ROM_LOAD( "602a05.13e", 0x008000, 0x04000, CRC(f22b7f2b) SHA1(857389c57552c4e2237cb599f4c68c381430475e) ) // may also exist as 32KB with one half empty + + ROM_REGION( 0x40000, "k007232_1", 0 ) /* Samples (Channel A 0x20000=Channel B) */ + ROM_LOAD( "602a03.10a", 0x00000, 0x20000, CRC(31392b01) SHA1(0424747bc2015c9c93afd20e6a23083c0dcc4fb7) ) + ROM_LOAD( "602a02.8a", 0x20000, 0x20000, CRC(e2be10ae) SHA1(109c31bf7252c83a062d259143cd8299681db778) ) + + ROM_REGION( 0x04000, "user1", 0 ) /* extra data for road effects? */ + ROM_LOAD( "602a12.1a", 0x000000, 0x04000, CRC(77b9383d) SHA1(7cb970889677704d6324bb64aafc05326c4503ad) ) +ROM_END + +ROM_START( weclemana ) + ROM_REGION( 0x40000, "maincpu", 0 ) /* Main CPU Code */ ROM_LOAD16_BYTE( "602f08.17h", 0x00000, 0x10000, CRC(493b79d3) SHA1(9625e3b65c211d5081d8ed8977de287eff100842) ) ROM_LOAD16_BYTE( "602f11.23h", 0x00001, 0x10000, CRC(6bb4f1fa) SHA1(2cfb7885b42b49dab9892e8dfd54914b64eeab06) ) ROM_LOAD16_BYTE( "602a09.18h", 0x20000, 0x10000, CRC(8a9d756f) SHA1(12605e86ce29e6300b5400720baac7b0293d9e66) ) @@ -1246,9 +1295,9 @@ ROM_START( wecleman ) ROM_LOAD( "602a12.1a", 0x000000, 0x04000, CRC(77b9383d) SHA1(7cb970889677704d6324bb64aafc05326c4503ad) ) ROM_END -ROM_START( weclemana ) +ROM_START( weclemanb ) ROM_REGION( 0x40000, "maincpu", 0 ) /* Main CPU Code */ - // I doubt these labels are correct, or one set of roms is bad (17h and 23h differ slightly from parent) + // This set has been hacked, set was provided using same labels as weclemana ROM_LOAD16_BYTE( "602f08.17h", 0x00000, 0x10000, CRC(43241265) SHA1(3da1ed0d15b03845c07f07ec6838ce160d81633d) ) // sldh ROM_LOAD16_BYTE( "602f11.23h", 0x00001, 0x10000, CRC(3ea7dae0) SHA1(d33d67f4cc65a7680e5f43407136b75512a10230) ) // sldh ROM_LOAD16_BYTE( "602a09.18h", 0x20000, 0x10000, CRC(8a9d756f) SHA1(12605e86ce29e6300b5400720baac7b0293d9e66) ) @@ -1299,7 +1348,7 @@ ROM_END early set V.1.26 rom labels faded out, all other roms match */ -ROM_START( weclemanb ) +ROM_START( weclemanc ) ROM_REGION( 0x40000, "maincpu", 0 ) /* Main CPU Code */ ROM_LOAD16_BYTE( "17h", 0x00000, 0x10000, CRC(66901326) SHA1(672aab497e9b94843451e016de6ca6d3c358362e) ) ROM_LOAD16_BYTE( "23h", 0x00001, 0x10000, CRC(d9d492f4) SHA1(12c177fa5cc541be86431f314e96a4f3a74f95c6) ) @@ -1700,9 +1749,10 @@ void wecleman_state::init_hotchase() Game driver(s) ***************************************************************************/ -GAMEL( 1986, wecleman, 0, wecleman, wecleman, wecleman_state, init_wecleman, ROT0, "Konami", "WEC Le Mans 24 (v2.00, set 1)", 0, layout_wecleman ) -GAMEL( 1986, weclemana, wecleman, wecleman, wecleman, wecleman_state, init_wecleman, ROT0, "Konami", "WEC Le Mans 24 (v2.00, set 2)", 0, layout_wecleman ) // 1988 release (maybe date hacked?) -GAMEL( 1986, weclemanb, wecleman, wecleman, wecleman, wecleman_state, init_wecleman, ROT0, "Konami", "WEC Le Mans 24 (v1.26)", 0, layout_wecleman ) +GAMEL( 1986, wecleman, 0, wecleman, wecleman, wecleman_state, init_wecleman, ROT0, "Konami", "WEC Le Mans 24 (v2.01)", 0, layout_wecleman ) +GAMEL( 1986, weclemana, wecleman, wecleman, wecleman, wecleman_state, init_wecleman, ROT0, "Konami", "WEC Le Mans 24 (v2.00)", 0, layout_wecleman ) +GAMEL( 1988, weclemanb, wecleman, wecleman, wecleman, wecleman_state, init_wecleman, ROT0, "hack", "WEC Le Mans 24 (v2.00, hack)", 0, layout_wecleman ) // small section of code inserted, year changed to 1988 +GAMEL( 1986, weclemanc, wecleman, wecleman, wecleman, wecleman_state, init_wecleman, ROT0, "Konami", "WEC Le Mans 24 (v1.26)", 0, layout_wecleman ) // a version 1.21 is known to exist too, see https://www.youtube.com/watch?v=4l8vYJi1OeU GAMEL( 1988, hotchase, 0, hotchase, hotchase, wecleman_state, init_hotchase, ROT0, "Konami", "Hot Chase (set 1)", 0, layout_wecleman ) diff --git a/src/mame/drivers/wheelfir.cpp b/src/mame/drivers/wheelfir.cpp index 190e8ad59f7..0aa94a1ed9b 100644 --- a/src/mame/drivers/wheelfir.cpp +++ b/src/mame/drivers/wheelfir.cpp @@ -759,7 +759,8 @@ MACHINE_CONFIG_START(wheelfir_state::wheelfir) MCFG_SCREEN_PALETTE("palette") MCFG_PALETTE_ADD("palette", NUM_COLORS) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &wheelfir_state::ramdac_map); EEPROM_93C46_16BIT(config, "eeprom"); diff --git a/src/mame/drivers/wildpkr.cpp b/src/mame/drivers/wildpkr.cpp index e5116a75095..ebd33228905 100644 --- a/src/mame/drivers/wildpkr.cpp +++ b/src/mame/drivers/wildpkr.cpp @@ -482,7 +482,8 @@ MACHINE_CONFIG_START(wildpkr_state::wildpkr) MCFG_HD63484_ADD("acrtc", 0, hd63484_map) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, "palette")); + ramdac.set_addrmap(0, &wildpkr_state::ramdac_map); MCFG_PALETTE_ADD("palette", 256) MCFG_PALETTE_INIT_OWNER(wildpkr_state, wildpkr) @@ -523,7 +524,8 @@ MACHINE_CONFIG_START(wildpkr_state::tabpkr) MCFG_HD63484_ADD("acrtc", 0, hd63484_map) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, "palette")); + ramdac.set_addrmap(0, &wildpkr_state::ramdac_map); MCFG_PALETTE_ADD("palette", 256) MCFG_PALETTE_INIT_OWNER(wildpkr_state, wildpkr) diff --git a/src/mame/drivers/witch.cpp b/src/mame/drivers/witch.cpp index 5a26bd4ffa9..1331bf72cf1 100644 --- a/src/mame/drivers/witch.cpp +++ b/src/mame/drivers/witch.cpp @@ -1172,8 +1172,8 @@ void witch_state::init_witch() m_subcpu->space(AS_PROGRAM).install_read_handler(0x7000, 0x700f, read8_delegate(FUNC(witch_state::prot_read_700x), this)); } -GAME( 1987, keirinou, 0, keirinou, keirinou, keirinou_state, empty_init, ROT0, "Excellent System", "Keirin Ou", MACHINE_SUPPORTS_SAVE ) -GAME( 1992, witch, 0, witch, witch, witch_state, init_witch, ROT0, "Excellent System", "Witch", MACHINE_SUPPORTS_SAVE ) -GAME( 1992, witchb, witch, witch, witch, witch_state, init_witch, ROT0, "Excellent System", "Witch (With ranking)", MACHINE_SUPPORTS_SAVE ) -GAME( 1992, witchs, witch, witch, witch, witch_state, init_witch, ROT0, "Sega / Vic Tokai", "Witch (Sega License)", MACHINE_SUPPORTS_SAVE ) +GAME( 1987, keirinou, 0, keirinou, keirinou, keirinou_state, empty_init, ROT0, "Excellent System", "Keirin Ou", MACHINE_SUPPORTS_SAVE ) +GAME( 1992, witch, 0, witch, witch, witch_state, init_witch, ROT0, "Vic Tokai (Excellent System license)", "Witch", MACHINE_SUPPORTS_SAVE ) +GAME( 1992, witchb, witch, witch, witch, witch_state, init_witch, ROT0, "Vic Tokai (Excellent System license)", "Witch (with ranking)", MACHINE_SUPPORTS_SAVE ) +GAME( 1992, witchs, witch, witch, witch, witch_state, init_witch, ROT0, "Vic Tokai (Sega license)", "Witch (Sega license)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, pbchmp95, witch, witch, witch, witch_state, init_witch, ROT0, "Veltmeijer Automaten", "Pinball Champ '95", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/wpc_95.cpp b/src/mame/drivers/wpc_95.cpp index fe2978c1ea4..10c949b0d37 100644 --- a/src/mame/drivers/wpc_95.cpp +++ b/src/mame/drivers/wpc_95.cpp @@ -2475,6 +2475,19 @@ ROM_START(congo_11) ROM_LOAD16_BYTE("cgs4v1_0.rom", 0x400000, 0x100000, CRC(2a1980e7) SHA1(0badf27c2b8bc7b0074dc5e606d64490470bc108)) ROM_END +ROM_START(congo_11s10) + ROM_REGION(0x100000, "maincpu", 0) + ROM_LOAD("cong1_10.rom", 0x00000, 0x80000, CRC(b0b0ffd9) SHA1(26343f3bfbacf85b3f4db5aa3dad39216311a2da)) + ROM_RELOAD(0x80000, 0x80000) + ROM_REGION16_LE(0x1000000, "dcs", ROMREGION_ERASEFF) + ROM_LOAD16_BYTE("su2-100.rom", 0x000000, 0x80000, CRC(c4b59ac9) SHA1(a0bc5150120777c771a181496ced71bd3f92a311)) + ROM_LOAD16_BYTE("su3-100.rom", 0x200000, 0x80000, CRC(1d4dbc9a) SHA1(3fac6ffb1af806d1dfcf71d85b0be21e7ea4b8d2)) + ROM_LOAD16_BYTE("su4-100.rom", 0x400000, 0x80000, CRC(a3e9fd93) SHA1(7d767ddf22080f9886621a5130929d7afce90472)) + ROM_LOAD16_BYTE("su5-100.rom", 0x600000, 0x80000, CRC(c397b3f6) SHA1(ef4cc5a08a55ae941f42d2b02213cc5c85d67b43)) + ROM_LOAD16_BYTE("su6-100.rom", 0x800000, 0x80000, CRC(f89a29a2) SHA1(63f69ae6a886d9eac44627edd5ee561bdb3dd418)) + ROM_LOAD16_BYTE("su7-100.rom", 0xa00000, 0x80000, CRC(d1244d35) SHA1(7c5b3fcf8a35c417c778cd9bc741b92aaffeb444)) +ROM_END + /*----------------- / Junk Yard #50052 /------------------*/ @@ -3053,6 +3066,7 @@ GAME(1995, congo_21, 0, wpc_95, congo, wpc_95_state, init_congo, GAME(1995, congo_20, congo_21, wpc_95, congo, wpc_95_state, init_congo, ROT0, "Williams", "Congo (2.0)", MACHINE_MECHANICAL) GAME(1995, congo_13, congo_21, wpc_95, congo, wpc_95_state, init_congo, ROT0, "Williams", "Congo (1.3)", MACHINE_MECHANICAL) GAME(1995, congo_11, congo_21, wpc_95, congo, wpc_95_state, init_congo, ROT0, "Williams", "Congo (1.1)", MACHINE_MECHANICAL) +GAME(1995, congo_11s10,congo_21, wpc_95, congo, wpc_95_state, init_congo, ROT0, "Williams", "Congo (1.1, DCS sound 1.0)", MACHINE_MECHANICAL) GAME(1996, jy_12, 0, wpc_95, jy, wpc_95_state, init_jy, ROT0, "Williams", "Junk Yard (1.2)", MACHINE_MECHANICAL) GAME(1996, jy_11, jy_12, wpc_95, jy, wpc_95_state, init_jy, ROT0, "Williams", "Junk Yard (1.1)", MACHINE_MECHANICAL) GAME(1996, jy_03, jy_12, wpc_95, jy, wpc_95_state, init_jy, ROT0, "Williams", "Junk Yard (0.3)", MACHINE_MECHANICAL) diff --git a/src/mame/drivers/wpc_s.cpp b/src/mame/drivers/wpc_s.cpp index 6df1c12ec47..24b754c81e6 100644 --- a/src/mame/drivers/wpc_s.cpp +++ b/src/mame/drivers/wpc_s.cpp @@ -2141,6 +2141,17 @@ ROM_START(jb_10b) ROM_LOAD16_BYTE("jbsnd_u6.rom", 0x800000, 0x080000, CRC(7a1e2c3d) SHA1(0c6ccb937328509cb0a87e4c557a64c13bbed2db)) ROM_END +ROM_START(jb_04a) // WPC-S 5-Board + ROM_REGION(0x80000, "maincpu", 0) + ROM_LOAD("jack0_4a.rom", 0x00000, 0x80000, CRC(cc02e024) SHA1(5de886e4631c3c99b83f6692482259e2a6bf0bca)) + ROM_REGION16_LE(0x1000000, "dcs", ROMREGION_ERASEFF) + ROM_LOAD16_BYTE("jbsnd_04a.u2", 0x000000, 0x080000, CRC(f90ebf0f) SHA1(d18362c1946504dd456f6edc28bb5812d584874a)) + ROM_LOAD16_BYTE("jbsnd_u3.rom", 0x200000, 0x080000, CRC(76ad3aad) SHA1(012b44c48d1cbb282eb763e40db40b141397f426)) + ROM_LOAD16_BYTE("jbsnd_u4.rom", 0x400000, 0x080000, CRC(038b1309) SHA1(a6e337476902ed9ec5123fe4e088a0608c0d5f48)) + ROM_LOAD16_BYTE("jbsnd_u5.rom", 0x600000, 0x080000, CRC(0957e2ad) SHA1(0fb4e3fdb949b0979721064162a41cfba84d0013)) + ROM_LOAD16_BYTE("jbsnd_u6.rom", 0x800000, 0x080000, CRC(7a1e2c3d) SHA1(0c6ccb937328509cb0a87e4c557a64c13bbed2db)) +ROM_END + /*----------------- / Johnny Mnemonic #50042 /------------------*/ @@ -2753,6 +2764,7 @@ GAME(1995, i500_10r, i500_11r, wpc_s, i500, wpc_s_state, init_i500, ROT0 GAME(1995, i500_11b, i500_11r, wpc_s, i500, wpc_s_state, init_i500, ROT0, "Bally", "Indianapolis 500 (1.1 Belgium)", MACHINE_MECHANICAL) GAME(1995, jb_10r, 0, wpc_s, jb, wpc_s_state, init_jb, ROT0, "Williams", "Jack*Bot (1.0R)", MACHINE_MECHANICAL) GAME(1995, jb_10b, jb_10r, wpc_s, jb, wpc_s_state, init_jb, ROT0, "Williams", "Jack*Bot (1.0B) (Belgium/Canada)", MACHINE_MECHANICAL) +GAME(1995, jb_04a, jb_10r, wpc_s, jb, wpc_s_state, init_jb, ROT0, "Williams", "Jack*Bot (0.4A prototype)", MACHINE_MECHANICAL) GAME(1995, jm_12r, 0, wpc_s, jm, wpc_s_state, init_jm, ROT0, "Williams", "Johnny Mnemonic (1.2R)", MACHINE_MECHANICAL) GAME(1995, jm_12b, jm_12r, wpc_s, jm, wpc_s_state, init_jm, ROT0, "Williams", "Johnny Mnemonic (1.2B) Belgium", MACHINE_MECHANICAL) GAME(1995, jm_05r, jm_12r, wpc_s, jm, wpc_s_state, init_jm, ROT0, "Williams", "Johnny Mnemonic (0.5R)", MACHINE_MECHANICAL) diff --git a/src/mame/drivers/x68k.cpp b/src/mame/drivers/x68k.cpp index 092cf208d03..bcd229a3012 100644 --- a/src/mame/drivers/x68k.cpp +++ b/src/mame/drivers/x68k.cpp @@ -831,12 +831,12 @@ READ16_MEMBER(x68k_state::sysport_r) WRITE16_MEMBER(x68k_state::ppi_w) { - m_ppi->write(space,offset & 0x03,data); + m_ppi->write(offset & 0x03,data); } READ16_MEMBER(x68k_state::ppi_r) { - return m_ppi->read(space,offset & 0x03); + return m_ppi->read(offset & 0x03); } @@ -1695,7 +1695,7 @@ void x68ksupr_state::x68ksupr(machine_config &config) void x68ksupr_state::x68kxvi(machine_config &config) { - add_cpu(config, M68000, &x68ksupr_state::x68kxvi_map, 33.333_MHz_XTAL / 2); /* 16 MHz (nominally) */ + add_cpu(config, M68000, &x68ksupr_state::x68kxvi_map, 33.333_MHz_XTAL / 2); /* 16 MHz (nominally) */ x68ksupr_base(config); } diff --git a/src/mame/drivers/xavix.cpp b/src/mame/drivers/xavix.cpp index 09ab9e04d47..d75faf810aa 100644 --- a/src/mame/drivers/xavix.cpp +++ b/src/mame/drivers/xavix.cpp @@ -244,31 +244,42 @@ WRITE8_MEMBER(xavix_state::main_w) note, many DMA operations and tile bank redirects etc. have the high bit set too, so that could be significant if it defines how it accesses memory in those cases too + this can't be correct, it breaks monster truck which expects ROM at 8000 even in the >0x800000 region, maybe code + data mappings need + to be kept separate, with >0x800000 showing both ROM banks for code, but still having the zero page area etc. for data? + + The code at 00EA84 in Ping Pong stores 8e to the data bank, reads 16 bit pointer from from 0000 + y (expecting it to come from zero page ram - value 3081) + then reads data from 3081, pushes it to stack (which is expected to work) then sets data bank back to 00 (writes to ff, expecting it to work) then pulls + the value written and puts it in RAM. Is stack actually still memory mapped at this point, or do stack operations always go to stack regardless? + Do reads return databank/codebank/stack, or only zero page? is zero page visibility maybe even conditional on how it gets used? + */ READ8_MEMBER(xavix_state::main2_r) { if (offset & 0x8000) { - return m_lowbus->read8(space, offset&0x7fff); + return m_rgn[(offset) & (m_rgnlen - 1)]; } else { - if (offset>0x200) - return m_rgn[(offset) & (m_rgnlen - 1)]; + if ((offset & 0xffff) >= 0x200) + { + return m_rgn[(offset) & (m_rgnlen - 1)]; + } else - return m_lowbus->read8(space, offset&0x7fff); + return m_lowbus->read8(space, offset & 0x7fff); } } WRITE8_MEMBER(xavix_state::main2_w) { + if (offset & 0x8000) { - m_lowbus->write8(space, offset & 0x7fff, data); + } else { - if (offset>0x200) + if ((offset & 0xffff) >= 0x200) logerror("write to ROM area?\n"); else m_lowbus->write8(space, offset & 0x7fff, data); @@ -285,126 +296,135 @@ void xavix_state::xavix_map(address_map &map) void xavix_state::xavix_lowbus_map(address_map &map) { - map(0x0000, 0x01ff).ram(); - map(0x0200, 0x3fff).ram().share("mainram"); - - // this might not be a real area, the tilemap base register gets set to 0x40 in monster truck service mode, and expects a fixed layout. - // As that would point at this address maybe said layout is being read from here, or maybe it's just a magic tilemap register value that doesn't read address space at all. - map(0x4000, 0x41ff).r(FUNC(xavix_state::xavix_4000_r)); - - // 6xxx ranges are the video hardware - // appears to be 256 sprites - map(0x6000, 0x60ff).ram().share("spr_attr0"); - map(0x6100, 0x61ff).ram().share("spr_attr1"); - map(0x6200, 0x62ff).ram().share("spr_ypos"); // cleared to 0x80 by both games, maybe enable registers? - map(0x6300, 0x63ff).ram().share("spr_xpos"); - map(0x6400, 0x64ff).ram(); // 6400 range gets populated in some cases, but it seems to be more like work ram, data doesn't matter and must be ignored? - map(0x6500, 0x65ff).ram().share("spr_addr_lo"); - map(0x6600, 0x66ff).ram().share("spr_addr_md"); - map(0x6700, 0x67ff).ram().share("spr_addr_hi"); - map(0x6800, 0x68ff).ram().share("palram1"); // written with 6900 - map(0x6900, 0x69ff).ram().share("palram2"); // startup (taitons1) - map(0x6a00, 0x6a1f).ram().share("spr_attra"); // test mode, pass flag 0x20 - - map(0x6fc0, 0x6fc0).w(FUNC(xavix_state::xavix_6fc0_w)); // startup (maybe this is a mirror of tmap1_regs_w) - - map(0x6fc8, 0x6fcf).w(FUNC(xavix_state::tmap1_regs_w)); // video registers + map(0x0000, 0x3fff).ram().share("mainram"); - map(0x6fd0, 0x6fd7).rw(FUNC(xavix_state::tmap2_regs_r), FUNC(xavix_state::tmap2_regs_w)); - map(0x6fd8, 0x6fd8).w(FUNC(xavix_state::xavix_6fd8_w)); // startup (mirror of tmap2_regs_w?) + // Memory Emulator / Text Array + map(0x4000, 0x4fff).rw(FUNC(xavix_state::xavix_memoryemu_txarray_r), FUNC(xavix_state::xavix_memoryemu_txarray_w)); - map(0x6fe0, 0x6fe0).rw(FUNC(xavix_state::vid_dma_trigger_r), FUNC(xavix_state::vid_dma_trigger_w)); // after writing to 6fe1/6fe2 and 6fe5/6fe6 rad_mtrk writes 0x43/0x44 here then polls on 0x40 (see function call at c273) write values are hardcoded, similar code at 18401 - map(0x6fe1, 0x6fe2).w(FUNC(xavix_state::vid_dma_params_1_w)); - map(0x6fe5, 0x6fe6).w(FUNC(xavix_state::vid_dma_params_2_w)); + // Sprite RAM (aka Fragment RAM) + map(0x6000, 0x67ff).ram().share("fragment_sprite"); - // function in rad_mtrk at 0184b7 uses this - map(0x6fe8, 0x6fe8).rw(FUNC(xavix_state::xavix_6fe8_r), FUNC(xavix_state::xavix_6fe8_w)); // r/w tested - map(0x6fe9, 0x6fe9).rw(FUNC(xavix_state::xavix_6fe9_r), FUNC(xavix_state::xavix_6fe9_w)); // r/w tested - map(0x6fea, 0x6fea).w(FUNC(xavix_state::xavix_6fea_w)); + // Palette RAM + map(0x6800, 0x68ff).ram().share("palram_sh"); + map(0x6900, 0x69ff).ram().share("palram_l"); - map(0x6ff0, 0x6ff0).rw(FUNC(xavix_state::xavix_6ff0_r), FUNC(xavix_state::xavix_6ff0_w)); // r/w tested - map(0x6ff1, 0x6ff1).w(FUNC(xavix_state::xavix_6ff1_w)); // startup - cleared in interrupt 0 - map(0x6ff2, 0x6ff2).w(FUNC(xavix_state::xavix_6ff2_w)); // set to 07 after clearing above things in interrupt 0 + // Segment RAM + map(0x6a00, 0x6a1f).ram().share("segment_regs"); // test mode, pass flag 0x20 - map(0x6ff8, 0x6ff8).rw(FUNC(xavix_state::xavix_6ff8_r), FUNC(xavix_state::xavix_6ff8_w)); // always seems to be a read/store or read/modify/store + // Tilemap 1 Registers + map(0x6fc8, 0x6fcf).rw(FUNC(xavix_state::tmap1_regs_r), FUNC(xavix_state::tmap1_regs_w)); + + // Tilemap 2 Registers + map(0x6fd0, 0x6fd7).rw(FUNC(xavix_state::tmap2_regs_r), FUNC(xavix_state::tmap2_regs_w)); + + // Sprite Registers + map(0x6fd8, 0x6fd8).w(FUNC(xavix_state::spriteregs_w)); + + // Sprite DMA + map(0x6fe0, 0x6fe0).rw(FUNC(xavix_state::spritefragment_dma_status_r), FUNC(xavix_state::spritefragment_dma_trg_w)); // after writing to 6fe1/6fe2 and 6fe5/6fe6 rad_mtrk writes 0x43/0x44 here then polls on 0x40 (see function call at c273) write values are hardcoded, similar code at 18401 + map(0x6fe1, 0x6fe2).w(FUNC(xavix_state::spritefragment_dma_params_1_w)); + map(0x6fe5, 0x6fe6).w(FUNC(xavix_state::spritefragment_dma_params_2_w)); + + // Arena Registers (controls visible window + more?) + map(0x6fe8, 0x6fe8).rw(FUNC(xavix_state::arena_start_r), FUNC(xavix_state::arena_start_w)); // r/w tested + map(0x6fe9, 0x6fe9).rw(FUNC(xavix_state::arena_end_r), FUNC(xavix_state::arena_end_w)); // r/w tested + map(0x6fea, 0x6fea).rw(FUNC(xavix_state::arena_control_r), FUNC(xavix_state::arena_control_w)); + + // Colour Mixing / Enabling Registers + map(0x6ff0, 0x6ff0).ram().share("colmix_sh"); // a single colour (for effects?) not bgpen + map(0x6ff1, 0x6ff1).ram().share("colmix_l"); + map(0x6ff2, 0x6ff2).w(FUNC(xavix_state::colmix_6ff2_w)); // set to 07 after clearing above things in interrupt 0 + + // Display Control Register / Status Flags + map(0x6ff8, 0x6ff8).rw(FUNC(xavix_state::dispctrl_6ff8_r), FUNC(xavix_state::dispctrl_6ff8_w)); // always seems to be a read/store or read/modify/store map(0x6ff9, 0x6ff9).r(FUNC(xavix_state::pal_ntsc_r)); - map(0x6ffa, 0x6ffa).w(FUNC(xavix_state::xavix_6ffa_w)); - map(0x6ffb, 0x6ffb).w(FUNC(xavix_state::xavix_6ffb_w)); // increases / decreases when you jump in snowboard, maybe raster irq pos or part of a clipping window? + map(0x6ffa, 0x6ffa).w(FUNC(xavix_state::dispctrl_posirq_x_w)); + map(0x6ffb, 0x6ffb).w(FUNC(xavix_state::dispctrl_posirq_y_w)); // increases / decreases when you jump in snowboard (snowboard, used to blank ground) - // 7xxx ranges system controller? - map(0x75f0, 0x75f0).rw(FUNC(xavix_state::xavix_75f0_r), FUNC(xavix_state::xavix_75f0_w)); // r/w tested read/written 8 times in a row - map(0x75f1, 0x75f1).rw(FUNC(xavix_state::xavix_75f1_r), FUNC(xavix_state::xavix_75f1_w)); // r/w tested read/written 8 times in a row - map(0x75f3, 0x75f3).ram(); - map(0x75f4, 0x75f4).r(FUNC(xavix_state::xavix_75f4_r)); // related to 75f0 (read after writing there - rad_mtrk) - map(0x75f5, 0x75f5).r(FUNC(xavix_state::xavix_75f5_r)); // related to 75f1 (read after writing there - rad_mtrk) + // Lightgun / pen 1 control + // map(0x6ffc, 0x6fff) + // Sound RAM + // map(0x7400, 0x75ff) + + // Sound Control + map(0x75f0, 0x75f0).rw(FUNC(xavix_state::sound_75f0_r), FUNC(xavix_state::sound_75f0_w)); // r/w tested read/written 8 times in a row + map(0x75f1, 0x75f1).rw(FUNC(xavix_state::sound_75f1_r), FUNC(xavix_state::sound_75f1_w)); // r/w tested read/written 8 times in a row + map(0x75f2, 0x75f3).ram(); + map(0x75f4, 0x75f4).r(FUNC(xavix_state::sound_75f4_r)); // related to 75f0 (read after writing there - rad_mtrk) + map(0x75f5, 0x75f5).r(FUNC(xavix_state::sound_75f5_r)); // related to 75f1 (read after writing there - rad_mtrk) // taitons1 after 75f7/75f8 - map(0x75f6, 0x75f6).rw(FUNC(xavix_state::xavix_75f6_r), FUNC(xavix_state::xavix_75f6_w)); // r/w tested + map(0x75f6, 0x75f6).rw(FUNC(xavix_state::sound_75f6_r), FUNC(xavix_state::sound_75f6_w)); // r/w tested // taitons1 written as a pair - map(0x75f7, 0x75f7).w(FUNC(xavix_state::xavix_75f7_w)); - map(0x75f8, 0x75f8).rw(FUNC(xavix_state::xavix_75f8_r), FUNC(xavix_state::xavix_75f8_w)); // r/w tested + map(0x75f7, 0x75f7).w(FUNC(xavix_state::sound_75f7_w)); + map(0x75f8, 0x75f8).rw(FUNC(xavix_state::sound_75f8_r), FUNC(xavix_state::sound_75f8_w)); // r/w tested // taitons1 written after 75f6, then read - map(0x75f9, 0x75f9).rw(FUNC(xavix_state::xavix_75f9_r), FUNC(xavix_state::xavix_75f9_w)); + map(0x75f9, 0x75f9).rw(FUNC(xavix_state::sound_75f9_r), FUNC(xavix_state::sound_75f9_w)); // at another time - map(0x75fa, 0x75fa).rw(FUNC(xavix_state::xavix_75fa_r), FUNC(xavix_state::xavix_75fa_w)); // r/w tested - map(0x75fb, 0x75fb).rw(FUNC(xavix_state::xavix_75fb_r), FUNC(xavix_state::xavix_75fb_w)); // r/w tested - map(0x75fc, 0x75fc).rw(FUNC(xavix_state::xavix_75fc_r), FUNC(xavix_state::xavix_75fc_w)); // r/w tested - map(0x75fd, 0x75fd).rw(FUNC(xavix_state::xavix_75fd_r), FUNC(xavix_state::xavix_75fd_w)); // r/w tested - map(0x75fe, 0x75fe).w(FUNC(xavix_state::xavix_75fe_w)); + map(0x75fa, 0x75fa).rw(FUNC(xavix_state::sound_75fa_r), FUNC(xavix_state::sound_75fa_w)); // r/w tested + map(0x75fb, 0x75fb).rw(FUNC(xavix_state::sound_75fb_r), FUNC(xavix_state::sound_75fb_w)); // r/w tested + map(0x75fc, 0x75fc).rw(FUNC(xavix_state::sound_75fc_r), FUNC(xavix_state::sound_75fc_w)); // r/w tested + map(0x75fd, 0x75fd).rw(FUNC(xavix_state::sound_75fd_r), FUNC(xavix_state::sound_75fd_w)); // r/w tested + map(0x75fe, 0x75fe).w(FUNC(xavix_state::sound_75fe_w)); // taitons1 written other 75xx operations - map(0x75ff, 0x75ff).w(FUNC(xavix_state::xavix_75ff_w)); - - map(0x7810, 0x7810).w(FUNC(xavix_state::xavix_7810_w)); // startup - - map(0x7900, 0x7900).w(FUNC(xavix_state::xavix_7900_w)); - map(0x7901, 0x7901).w(FUNC(xavix_state::xavix_7901_w)); - map(0x7902, 0x7902).w(FUNC(xavix_state::xavix_7902_w)); - - // DMA trigger for below (written after the others) waits on status of bit 1 in a loop - map(0x7980, 0x7980).rw(FUNC(xavix_state::dma_trigger_r), FUNC(xavix_state::dma_trigger_w)); - // DMA source - map(0x7981, 0x7981).w(FUNC(xavix_state::rom_dmasrc_lo_w)); - map(0x7982, 0x7982).w(FUNC(xavix_state::rom_dmasrc_md_w)); - map(0x7983, 0x7983).w(FUNC(xavix_state::rom_dmasrc_hi_w)); - // DMA dest - map(0x7984, 0x7984).w(FUNC(xavix_state::rom_dmadst_lo_w)); - map(0x7985, 0x7985).w(FUNC(xavix_state::rom_dmadst_hi_w)); - // DMA length - map(0x7986, 0x7986).w(FUNC(xavix_state::rom_dmalen_lo_w)); - map(0x7987, 0x7987).w(FUNC(xavix_state::rom_dmalen_hi_w)); - - // GPIO stuff - map(0x7a00, 0x7a00).rw(FUNC(xavix_state::xavix_io_0_r),FUNC(xavix_state::xavix_7a00_w)); - map(0x7a01, 0x7a01).rw(FUNC(xavix_state::xavix_io_1_r),FUNC(xavix_state::xavix_7a01_w)); // startup (taitons1) - map(0x7a02, 0x7a02).rw(FUNC(xavix_state::xavix_7a02_r),FUNC(xavix_state::xavix_7a02_w)); // startup, gets set to 20, 7a00 is then also written with 20 - map(0x7a03, 0x7a03).rw(FUNC(xavix_state::xavix_7a03_r),FUNC(xavix_state::xavix_7a03_w)); // startup (gets set to 84 which is the same as the bits checked on 7a01, possible port direction register?) + map(0x75ff, 0x75ff).w(FUNC(xavix_state::sound_75ff_w)); + + // Slot Registers + map(0x7810, 0x7810).w(FUNC(xavix_state::slotreg_7810_w)); // startup + + // External Interface + map(0x7900, 0x7900).w(FUNC(xavix_state::extintrf_7900_w)); + map(0x7901, 0x7901).w(FUNC(xavix_state::extintrf_7901_w)); + map(0x7902, 0x7902).w(FUNC(xavix_state::extintrf_7902_w)); + + // DMA Controller + map(0x7980, 0x7980).rw(FUNC(xavix_state::rom_dmastat_r), FUNC(xavix_state::rom_dmatrg_w)); + map(0x7981, 0x7983).ram().w(FUNC(xavix_state::rom_dmasrc_w)).share("rom_dma_src"); + map(0x7984, 0x7985).ram().w(FUNC(xavix_state::rom_dmadst_w)).share("rom_dma_dst"); + map(0x7986, 0x7987).ram().w(FUNC(xavix_state::rom_dmalen_w)).share("rom_dma_len"); + // IO Ports + map(0x7a00, 0x7a00).rw(FUNC(xavix_state::io0_data_r),FUNC(xavix_state::io0_data_w)); + map(0x7a01, 0x7a01).rw(FUNC(xavix_state::io1_data_r),FUNC(xavix_state::io1_data_w)); + map(0x7a02, 0x7a02).rw(FUNC(xavix_state::io0_direction_r),FUNC(xavix_state::io0_direction_w)); + map(0x7a03, 0x7a03).rw(FUNC(xavix_state::io1_direction_r),FUNC(xavix_state::io1_direction_w)); + + // Interrupt control registers map(0x7a80, 0x7a80).w(FUNC(xavix_state::xavix_7a80_w)); // still IO? ADC related? - map(0x7b00, 0x7b00).w(FUNC(xavix_state::xavix_7b00_w)); // rad_snow (not often) + // Mouse? + map(0x7b00, 0x7b00).w(FUNC(xavix_state::adc_7b00_w)); // rad_snow (not often, why?) - map(0x7b80, 0x7b80).rw(FUNC(xavix_state::xavix_7b80_r), FUNC(xavix_state::xavix_7b80_w)); // rad_snow (not often) - map(0x7b81, 0x7b81).w(FUNC(xavix_state::xavix_7b81_w)); // written (often, m_trck, analog related?) + // Lightgun / pen 2 control + //map(0x7b18, 0x7b1b) + + // ADC registers + map(0x7b80, 0x7b80).rw(FUNC(xavix_state::adc_7b80_r), FUNC(xavix_state::adc_7b80_w)); // rad_snow (not often) + map(0x7b81, 0x7b81).rw(FUNC(xavix_state::adc_7b81_r), FUNC(xavix_state::adc_7b81_w)); // written (often, m_trck, analog related?) - map(0x7c00, 0x7c00).w(FUNC(xavix_state::xavix_7c00_w)); - map(0x7c01, 0x7c01).rw(FUNC(xavix_state::xavix_7c01_r), FUNC(xavix_state::xavix_7c01_w)); // r/w tested - map(0x7c02, 0x7c02).w(FUNC(xavix_state::xavix_7c02_w)); + // Sleep control + //map(7b82, 7b83) - // this is a multiplication chip - map(0x7ff2, 0x7ff4).w(FUNC(xavix_state::mult_param_w)); - map(0x7ff5, 0x7ff6).rw(FUNC(xavix_state::mult_r), FUNC(xavix_state::mult_w)); + // Timer control + map(0x7c00, 0x7c00).w(FUNC(xavix_state::timer_control_w)); + map(0x7c01, 0x7c01).rw(FUNC(xavix_state::timer_baseval_r), FUNC(xavix_state::timer_baseval_w)); // r/w tested + map(0x7c02, 0x7c02).w(FUNC(xavix_state::timer_freq_w)); - // maybe irq enable, written after below - map(0x7ff9, 0x7ff9).w(FUNC(xavix_state::irq_enable_w)); // interrupt related, but probalby not a simple 'enable' otherwise interrupts happen before we're ready for them. - // an IRQ vector (nmi?) - map(0x7ffa, 0x7ffa).w(FUNC(xavix_state::irq_vector0_lo_w)); - map(0x7ffb, 0x7ffb).w(FUNC(xavix_state::irq_vector0_hi_w)); + // Barrel Shifter registers + // map(0x7ff0, 0x7ff1) - map(0x7ffc, 0x7ffc).rw(FUNC(xavix_state::irq_source_r), FUNC(xavix_state::irq_source_w)); + // Multiply / Divide registers + map(0x7ff2, 0x7ff4).rw(FUNC(xavix_state::mult_param_r), FUNC(xavix_state::mult_param_w)); + map(0x7ff5, 0x7ff6).rw(FUNC(xavix_state::mult_r), FUNC(xavix_state::mult_w)); - // an IRQ vector (irq?) - map(0x7ffe, 0x7ffe).w(FUNC(xavix_state::irq_vector1_lo_w)); - map(0x7fff, 0x7fff).w(FUNC(xavix_state::irq_vector1_hi_w)); + // CPU Vector registers + map(0x7ff9, 0x7ff9).w(FUNC(xavix_state::vector_enable_w)); // enables / disables the custom vectors + map(0x7ffa, 0x7ffa).w(FUNC(xavix_state::nmi_vector_lo_w)); // an IRQ vector (nmi?) + map(0x7ffb, 0x7ffb).w(FUNC(xavix_state::nmi_vector_hi_w)); + map(0x7ffc, 0x7ffc).rw(FUNC(xavix_state::irq_source_r), FUNC(xavix_state::irq_source_w)); + // map(0x7ffd, 0x7ffd) some of the Nostalgia games read here, why? + map(0x7ffe, 0x7ffe).w(FUNC(xavix_state::irq_vector_lo_w)); // an IRQ vector (irq?) + map(0x7fff, 0x7fff).w(FUNC(xavix_state::irq_vector_hi_w)); } static INPUT_PORTS_START( xavix ) @@ -464,12 +484,14 @@ static INPUT_PORTS_START( xavix ) PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_CUSTOM ) INPUT_PORTS_END +/* static INPUT_PORTS_START( xavixp ) PORT_INCLUDE(xavix) PORT_MODIFY("REGION") // PAL/NTSC flag PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_CUSTOM ) INPUT_PORTS_END +*/ /* Test mode lists the following @@ -509,7 +531,14 @@ static INPUT_PORTS_START( rad_crdn ) PORT_INCLUDE(xavix) PORT_MODIFY("IN0") - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) // can press this to get to a game select screen + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON1 ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2 ) + + PORT_MODIFY("IN1") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) INPUT_PORTS_END static INPUT_PORTS_START( rad_crdnp ) @@ -545,6 +574,22 @@ static INPUT_PORTS_START( rad_boxp ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_CUSTOM ) INPUT_PORTS_END +static INPUT_PORTS_START( rad_bass ) + PORT_INCLUDE(xavix) + + PORT_MODIFY("IN0") + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON1 ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) +INPUT_PORTS_END + +static INPUT_PORTS_START( rad_bassp ) + PORT_INCLUDE(rad_bass) + + PORT_MODIFY("REGION") // PAL/NTSC flag + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_CUSTOM ) +INPUT_PORTS_END + static INPUT_PORTS_START( rad_snow ) PORT_INCLUDE(xavix) @@ -567,11 +612,37 @@ INPUT_PORTS_END static INPUT_PORTS_START( namcons2 ) PORT_INCLUDE(xavix) + PORT_MODIFY("IN0") // mappings based on Dragon Buster button list, inputs don't seem to work properly in some games, probably because bad EEPROM support means all buttons are mapped to the same thing? + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON4 ) // Fire4 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON3 ) // Fire3 + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // not a button? (but can be used to pass prompts?) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON5 ) // Pause / Add Coins, marked 'Credit' (but not a coin slot) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) + + PORT_MODIFY("IN1") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) // Fire2 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) // Fire1 + +INPUT_PORTS_END + +// to access hidden test mode reset while holding Button1 and Button2 (works every other reset) +// to cycle through modes use Button 1 until you get to the input test +static INPUT_PORTS_START( rad_bb2 ) + PORT_INCLUDE(xavix) + PORT_MODIFY("IN0") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON4 ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) + + PORT_MODIFY("IN1") + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("X") + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("O") + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME(".") INPUT_PORTS_END /* correct, 4bpp gfxs */ @@ -647,18 +718,23 @@ MACHINE_CONFIG_START(xavix_state::xavix) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) MCFG_SCREEN_UPDATE_DRIVER(xavix_state, screen_update) MCFG_SCREEN_SIZE(32*8, 32*8) - MCFG_SCREEN_VISIBLE_AREA(1*8, 31*8-1, 0*8, 28*8-1) + MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 28*8-1) MCFG_SCREEN_PALETTE("palette") MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_xavix) - MCFG_PALETTE_ADD("palette", 256) + MCFG_PALETTE_ADD("palette", 256 + 1) /* sound hardware */ SPEAKER(config, "mono").front_center(); // sound is PCM MACHINE_CONFIG_END +MACHINE_CONFIG_START(xavix_state::xavix_i2c) + xavix(config); + + I2CMEM(config, "i2cmem", 0).set_page_size(16).set_data_size(0x200); +MACHINE_CONFIG_END MACHINE_CONFIG_START(xavix_state::xavixp) xavix(config); @@ -680,6 +756,11 @@ MACHINE_CONFIG_START(xavix_state::xavix2000) MACHINE_CONFIG_END +MACHINE_CONFIG_START(xavix_state::xavix2000_i2c) + xavix2000(config); + + I2CMEM(config, "i2cmem", 0).set_page_size(16).set_data_size(0x200); +MACHINE_CONFIG_END void xavix_state::init_xavix() { @@ -687,18 +768,6 @@ void xavix_state::init_xavix() m_rgn = memregion("bios")->base(); } -void xavix_state::init_taitons1() -{ - init_xavix(); - m_alt_addressing = 1; -} - -void xavix_state::init_rad_box() -{ - init_xavix(); - m_alt_addressing = 2; -} - /*************************************************************************** Game driver(s) @@ -808,30 +877,35 @@ ROM_START( rad_rh ) ROM_END /* - There's more code in here than in the 'eka_strt' set, but all it seems to do is display an 'insert cartridge' message, - however eka_strt also seems a complete program in it's own right, it's unclear if it can see any of the data from this - ROM. - - (TODO: turn the cartridges into a software list once the mapping is properly understood) + The e-kara cartridges require the BIOS rom to map into 2nd external bus space as they fetch palette data from + it etc. */ +#define EKARA_BASE_ROM \ + ROM_LOAD( "ekara.bin", 0x600000, 0x100000, CRC(9b27c4a2) SHA1(d75dda7434933135d2f7e353840a9384e9a0d586) ) + + ROM_START( eka_base ) - ROM_REGION( 0x100000, "bios", ROMREGION_ERASE00 ) - ROM_LOAD( "ekara.bin", 0x000000, 0x100000, CRC(9b27c4a2) SHA1(d75dda7434933135d2f7e353840a9384e9a0d586) ) + ROM_REGION( 0x800000, "bios", ROMREGION_ERASE00 ) + EKARA_BASE_ROM + ROM_RELOAD(0x000000, 0x100000) ROM_END ROM_START( eka_strt ) - ROM_REGION( 0x080000, "bios", ROMREGION_ERASE00 ) + ROM_REGION( 0x800000, "bios", ROMREGION_ERASE00 ) + EKARA_BASE_ROM ROM_LOAD( "ekarastartcart.bin", 0x000000, 0x080000, CRC(8c12c0c2) SHA1(8cc1b098894af25a4bfccada884125b66f5fe8b2) ) ROM_END ROM_START( eka_vol1 ) - ROM_REGION( 0x100000, "bios", ROMREGION_ERASE00 ) + ROM_REGION( 0x800000, "bios", ROMREGION_ERASE00 ) + EKARA_BASE_ROM ROM_LOAD( "ekaravol1.bin", 0x000000, 0x100000, CRC(29df4aea) SHA1(b95835aaf8630b61b47e5da0968cd4a1dd3bc517) ) ROM_END ROM_START( eka_vol2 ) - ROM_REGION( 0x100000, "bios", ROMREGION_ERASE00 ) + ROM_REGION( 0x800000, "bios", ROMREGION_ERASE00 ) + EKARA_BASE_ROM ROM_LOAD( "ekaravol2.bin", 0x000000, 0x100000, CRC(6c66772e) SHA1(e1e719df1e51caaafd9b3af187059334f7abbba3) ) ROM_END @@ -842,51 +916,51 @@ ROM_END /* Standalone TV Games */ -CONS( 2006, taitons1, 0, 0, xavix, xavix, xavix_state, init_taitons1, "Bandai / SSD Company LTD / Taito", "Let's! TV Play Classic - Taito Nostalgia 1", MACHINE_IS_SKELETON ) +CONS( 2006, taitons1, 0, 0, xavix_i2c, namcons2, xavix_state, init_xavix, "Bandai / SSD Company LTD / Taito", "Let's! TV Play Classic - Taito Nostalgia 1", MACHINE_IS_SKELETON ) -CONS( 2006, taitons2, 0, 0, xavix, namcons2, xavix_state, init_xavix, "Bandai / SSD Company LTD / Taito", "Let's! TV Play Classic - Taito Nostalgia 2", MACHINE_IS_SKELETON ) +CONS( 2006, taitons2, 0, 0, xavix_i2c, namcons2, xavix_state, init_xavix, "Bandai / SSD Company LTD / Taito", "Let's! TV Play Classic - Taito Nostalgia 2", MACHINE_IS_SKELETON ) -CONS( 2006, namcons1, 0, 0, xavix, namcons2, xavix_state, init_taitons1, "Bandai / SSD Company LTD / Namco", "Let's! TV Play Classic - Namco Nostalgia 1", MACHINE_IS_SKELETON ) +CONS( 2006, namcons1, 0, 0, xavix_i2c, namcons2, xavix_state, init_xavix, "Bandai / SSD Company LTD / Namco", "Let's! TV Play Classic - Namco Nostalgia 1", MACHINE_IS_SKELETON ) -CONS( 2006, namcons2, 0, 0, xavix, namcons2, xavix_state, init_taitons1, "Bandai / SSD Company LTD / Namco", "Let's! TV Play Classic - Namco Nostalgia 2", MACHINE_IS_SKELETON ) +CONS( 2006, namcons2, 0, 0, xavix_i2c, namcons2, xavix_state, init_xavix, "Bandai / SSD Company LTD / Namco", "Let's! TV Play Classic - Namco Nostalgia 2", MACHINE_IS_SKELETON ) CONS( 2000, rad_ping, 0, 0, xavix, xavix, xavix_state, init_xavix, "Radica / SSD Company LTD / Simmer Technology", "Play TV Ping Pong", MACHINE_IS_SKELETON ) // "Simmer Technology" is also known as "Hummer Technology Co., Ltd" CONS( 2003, rad_mtrk, 0, 0, xavix, rad_mtrk, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Monster Truck (NTSC)", MACHINE_IS_SKELETON ) CONS( 2003, rad_mtrkp, rad_mtrk, 0, xavixp, rad_mtrkp,xavix_state, init_xavix, "Radica / SSD Company LTD", "ConnecTV Monster Truck (PAL)", MACHINE_IS_SKELETON ) -CONS( 200?, rad_box, 0, 0, xavix, rad_box, xavix_state, init_rad_box, "Radica / SSD Company LTD", "Play TV Boxing (NTSC)", MACHINE_IS_SKELETON) -CONS( 200?, rad_boxp, rad_box, 0, xavixp, rad_boxp, xavix_state, init_rad_box, "Radica / SSD Company LTD", "ConnecTV Boxing (PAL)", MACHINE_IS_SKELETON) +CONS( 200?, rad_box, 0, 0, xavix, rad_box, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Boxing (NTSC)", MACHINE_IS_SKELETON) +CONS( 200?, rad_boxp, rad_box, 0, xavixp, rad_boxp, xavix_state, init_xavix, "Radica / SSD Company LTD", "ConnecTV Boxing (PAL)", MACHINE_IS_SKELETON) -CONS( 200?, rad_crdn, 0, 0, xavix, rad_crdn, xavix_state, init_rad_box, "Radica / SSD Company LTD", "Play TV Card Night (NTSC)", MACHINE_IS_SKELETON) -CONS( 200?, rad_crdnp, rad_crdn, 0, xavixp, rad_crdnp,xavix_state, init_rad_box, "Radica / SSD Company LTD", "ConnecTV Card Night (PAL)", MACHINE_IS_SKELETON) +CONS( 200?, rad_crdn, 0, 0, xavix, rad_crdn, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Card Night (NTSC)", MACHINE_IS_SKELETON) +CONS( 200?, rad_crdnp, rad_crdn, 0, xavixp, rad_crdnp,xavix_state, init_xavix, "Radica / SSD Company LTD", "ConnecTV Card Night (PAL)", MACHINE_IS_SKELETON) -CONS( 2002, rad_bb2, 0, 0, xavix, xavix, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Baseball 2", MACHINE_IS_SKELETON ) // contains string "Radica RBB2 V1.0" +CONS( 2002, rad_bb2, 0, 0, xavix, rad_bb2, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Baseball 2", MACHINE_IS_SKELETON ) // contains string "Radica RBB2 V1.0" -CONS( 2001, rad_bass, 0, 0, xavix, xavix, xavix_state, init_rad_box, "Radica / SSD Company LTD", "Play TV Bass Fishin' (NTSC)", MACHINE_IS_SKELETON) -CONS( 2001, rad_bassp, rad_bass, 0, xavixp, xavixp, xavix_state, init_rad_box, "Radica / SSD Company LTD", "ConnecTV Bass Fishin' (PAL)", MACHINE_IS_SKELETON) +CONS( 2001, rad_bass, 0, 0, xavix, rad_bass, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Bass Fishin' (NTSC)", MACHINE_IS_SKELETON) +CONS( 2001, rad_bassp, rad_bass, 0, xavixp, rad_bassp,xavix_state, init_xavix, "Radica / SSD Company LTD", "ConnecTV Bass Fishin' (PAL)", MACHINE_IS_SKELETON) // there is another 'Snowboarder' with a white coloured board, it appears to be a newer game closer to 'SSX Snowboarder' but without the SSX license. -CONS( 2001, rad_snow, 0, 0, xavix, rad_snow, xavix_state, init_rad_box, "Radica / SSD Company LTD", "Play TV Snowboarder (Blue) (NTSC)", MACHINE_IS_SKELETON) -CONS( 2001, rad_snowp, rad_snow, 0, xavixp, rad_snowp,xavix_state, init_rad_box, "Radica / SSD Company LTD", "ConnecTV Snowboarder (Blue) (PAL)", MACHINE_IS_SKELETON) +CONS( 2001, rad_snow, 0, 0, xavix, rad_snow, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Snowboarder (Blue) (NTSC)", MACHINE_IS_SKELETON) +CONS( 2001, rad_snowp, rad_snow, 0, xavixp, rad_snowp,xavix_state, init_xavix, "Radica / SSD Company LTD", "ConnecTV Snowboarder (Blue) (PAL)", MACHINE_IS_SKELETON) -CONS( 2003, rad_madf, 0, 0, xavix, xavix, xavix_state, init_taitons1, "Radica / SSD Company LTD", "EA Sports Madden Football (NTSC)", MACHINE_IS_SKELETON) // no Play TV branding, USA only release? +CONS( 2003, rad_madf, 0, 0, xavix, xavix, xavix_state, init_xavix, "Radica / SSD Company LTD", "EA Sports Madden Football (NTSC)", MACHINE_IS_SKELETON) // no Play TV branding, USA only release? -CONS( 200?, rad_fb, 0, 0, xavix, xavix, xavix_state, init_taitons1, "Radica / SSD Company LTD", "Play TV Football (NTSC)", MACHINE_IS_SKELETON) // USA only release? doesn't change logo for PAL +CONS( 200?, rad_fb, 0, 0, xavix, xavix, xavix_state, init_xavix, "Radica / SSD Company LTD", "Play TV Football (NTSC)", MACHINE_IS_SKELETON) // USA only release? doesn't change logo for PAL -CONS( 200?, rad_rh, 0, 0, xavix, xavix, xavix_state, init_taitons1, "Radioa / Fisher-Price / SSD Company LTD", "Play TV Rescue Heroes", MACHINE_IS_SKELETON) +CONS( 200?, rad_rh, 0, 0, xavix, xavix, xavix_state, init_xavix, "Radioa / Fisher-Price / SSD Company LTD", "Play TV Rescue Heroes", MACHINE_IS_SKELETON) -CONS( 200?, epo_efdx, 0, 0, xavix, xavix, xavix_state, init_taitons1, "Epoch / SSD Company LTD", "Excite Fishing DX (Japan)", MACHINE_IS_SKELETON) +CONS( 200?, epo_efdx, 0, 0, xavix_i2c, xavix, xavix_state, init_xavix, "Epoch / SSD Company LTD", "Excite Fishing DX (Japan)", MACHINE_IS_SKELETON) -CONS( 200?, has_wamg, 0, 0, xavix, xavix, xavix_state, init_rad_box, "Hasbro / Milton Bradley / SSD Company LTD", "TV Wild Adventure Mini Golf", MACHINE_IS_SKELETON) +CONS( 200?, has_wamg, 0, 0, xavix, xavix, xavix_state, init_xavix, "Hasbro / Milton Bradley / SSD Company LTD", "TV Wild Adventure Mini Golf", MACHINE_IS_SKELETON) -CONS( 200?, eka_base, 0, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara (US?)", MACHINE_IS_SKELETON) +CONS( 200?, eka_base, 0, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara (US?)", MACHINE_IS_SKELETON|MACHINE_IS_BIOS_ROOT) -CONS( 200?, eka_strt, 0, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara Starter (US?)", MACHINE_IS_SKELETON) +CONS( 200?, eka_strt, eka_base, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara Starter (US?)", MACHINE_IS_SKELETON) -CONS( 200?, eka_vol1, 0, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara Volume 1 (US?)", MACHINE_IS_SKELETON) // insert calls it 'HIT MIX Vol 1' +CONS( 200?, eka_vol1, eka_base, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara Volume 1 (US?)", MACHINE_IS_SKELETON) // insert calls it 'HIT MIX Vol 1' -CONS( 200?, eka_vol2, 0, 0, xavix, xavix, xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara Volume 2 (US?)", MACHINE_IS_SKELETON) // insert calls it 'HIT MIX Vol 2' +CONS( 200?, eka_vol2, eka_base, 0, xavix, xavix , xavix_state, init_xavix, "Takara / Hasbro / SSD Company LTD", "e-kara Volume 2 (US?)", MACHINE_IS_SKELETON) // insert calls it 'HIT MIX Vol 2' /* The 'XaviXPORT' isn't a real console, more of a TV adapter, all the actual hardware (CPU including video hw, sound hw) is in the cartridges and controllers and can vary between games, see notes at top of driver. @@ -921,9 +995,9 @@ ROM_START( drgqst ) ROM_END -CONS( 2004, xavtenni, 0, 0, xavix2000, xavix, xavix_state, init_xavix, "SSD Company LTD", "XaviX Tennis (XaviXPORT)", MACHINE_IS_SKELETON ) +CONS( 2004, xavtenni, 0, 0, xavix2000_i2c, xavix, xavix_state, init_xavix, "SSD Company LTD", "XaviX Tennis (XaviXPORT)", MACHINE_IS_SKELETON ) -CONS( 2005, ttv_sw, 0, 0, xavix2000, xavix, xavix_state, init_xavix, "Tiger / SSD Company LTD", "Star Wars Saga Edition - Lightsaber Battle Game", MACHINE_IS_SKELETON ) -CONS( 2005, ttv_lotr, 0, 0, xavix2000, xavix, xavix_state, init_xavix, "Tiger / SSD Company LTD", "Lord Of The Rings - Warrior of Middle-Earth", MACHINE_IS_SKELETON ) -CONS( 2005, ttv_mx, 0, 0, xavix2000, xavix, xavix_state, init_xavix, "Tiger / SSD Company LTD", "MX Dirt Rebel", MACHINE_IS_SKELETON ) -CONS( 2003, drgqst, 0, 0, xavix2000, xavix, xavix_state, init_xavix, "Square Enix / SSD Company LTD", "Kenshin Dragon Quest: Yomigaerishi Densetsu no Ken", MACHINE_IS_SKELETON ) +CONS( 2005, ttv_sw, 0, 0, xavix2000_i2c, xavix, xavix_state, init_xavix, "Tiger / SSD Company LTD", "Star Wars Saga Edition - Lightsaber Battle Game", MACHINE_IS_SKELETON ) +CONS( 2005, ttv_lotr, 0, 0, xavix2000_i2c, xavix, xavix_state, init_xavix, "Tiger / SSD Company LTD", "Lord Of The Rings - Warrior of Middle-Earth", MACHINE_IS_SKELETON ) +CONS( 2005, ttv_mx, 0, 0, xavix2000_i2c, xavix, xavix_state, init_xavix, "Tiger / SSD Company LTD", "MX Dirt Rebel", MACHINE_IS_SKELETON ) +CONS( 2003, drgqst, 0, 0, xavix2000_i2c, xavix, xavix_state, init_xavix, "Square Enix / SSD Company LTD", "Kenshin Dragon Quest: Yomigaerishi Densetsu no Ken", MACHINE_IS_SKELETON ) diff --git a/src/mame/drivers/xbox.cpp b/src/mame/drivers/xbox.cpp index fa93e2c975a..1822dbe3419 100644 --- a/src/mame/drivers/xbox.cpp +++ b/src/mame/drivers/xbox.cpp @@ -10,8 +10,9 @@ #include "emu.h" -#include "includes/xbox.h" +#include "machine/pci.h" #include "includes/xbox_pci.h" +#include "includes/xbox.h" #include "cpu/i386/i386.h" #include "machine/atapicdr.h" diff --git a/src/mame/drivers/xor100.cpp b/src/mame/drivers/xor100.cpp index 92e00a2856b..4fa4b8b013f 100644 --- a/src/mame/drivers/xor100.cpp +++ b/src/mame/drivers/xor100.cpp @@ -257,10 +257,8 @@ void xor100_state::xor100_mem(address_map &map) void xor100_state::xor100_io(address_map &map) { map.global_mask(0xff); - map(0x00, 0x00).rw(m_uart_a, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x01, 0x01).rw(m_uart_a, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x02, 0x02).rw(m_uart_b, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x03, 0x03).rw(m_uart_b, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x00, 0x01).rw(m_uart_a, FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x02, 0x03).rw(m_uart_b, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x04, 0x07).rw(I8255A_TAG, FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0x08, 0x08).w(FUNC(xor100_state::mmu_w)); map(0x09, 0x09).w(FUNC(xor100_state::prom_toggle_w)); diff --git a/src/mame/drivers/z100.cpp b/src/mame/drivers/z100.cpp index e911fa4e3bd..f502eb087b6 100644 --- a/src/mame/drivers/z100.cpp +++ b/src/mame/drivers/z100.cpp @@ -744,5 +744,5 @@ void z100_state::driver_init() /* Driver */ -// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS -COMP( 1982, z100, 0, 0, z100, z100, z100_state, driver_init, "Zenith", "Z-100", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS +COMP( 1982, z100, 0, 0, z100, z100, z100_state, driver_init, "Zenith Data Systems", "Z-100", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/drivers/zms8085.cpp b/src/mame/drivers/zms8085.cpp index 2a072c4fe88..a867f448ce9 100644 --- a/src/mame/drivers/zms8085.cpp +++ b/src/mame/drivers/zms8085.cpp @@ -29,7 +29,8 @@ public: , m_rs232(*this, "rs232") , m_screen(*this, "screen") , m_mainram(*this, "mainram") - , m_p_chargen(*this, "chargen") + , m_chargen(*this, "chargen") + , m_keys(*this, "KEY%X", 0U) { } void zephyr(machine_config &config); @@ -37,8 +38,11 @@ public: private: u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - DECLARE_READ8_MEMBER(special_r); - DECLARE_READ8_MEMBER(uart_status_r); + u8 special_r(); + u8 uart_status_r(); + void key_l_w(u8 data); + void key_h_w(u8 data); + u8 key_r(); virtual void machine_start() override; @@ -50,13 +54,21 @@ private: required_device<rs232_port_device> m_rs232; required_device<screen_device> m_screen; required_shared_ptr<u8> m_mainram; - required_region_ptr<u8> m_p_chargen; + required_region_ptr<u8> m_chargen; + required_ioport_array<14> m_keys; + + u16 m_key_row; }; u32 zms8085_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - u16 pos = m_mainram[0x17] | (u16(m_mainram[0x18]) << 8); + u8 cursor_y = m_mainram[0x000]; + u8 cursor_x = m_mainram[0x001]; + u8 scroll = m_mainram[0x005]; + + u16 pos = 0x030 + (scroll & 0x1f) * 0x050; + u8 row = scroll & 0x1f; for (unsigned y = 0; y < 250; y++) { @@ -64,30 +76,69 @@ u32 zms8085_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, co { unsigned x = ch * 10; u8 code = m_mainram[(ch + pos) & 0xfff]; - u8 data = m_p_chargen[(code & 0x7f) * 16 + y % 10]; - for (int bit = 7; bit >= 0; bit--) - bitmap.pix(y, x++) = BIT(data, bit) ? rgb_t::black() : rgb_t::white(); - bitmap.pix(y, x++) = rgb_t::black(); - bitmap.pix(y, x++) = rgb_t::black(); - bitmap.pix(y, x++) = rgb_t::black(); + u16 data = (m_chargen[(code & 0x7f) * 16 + (y + 9) % 10] << 2) | 0x003; + if (ch == cursor_x && row == cursor_y) + data ^= 0x3ff; + for (int bit = 10; bit > 0; bit--, data <<= 1) + bitmap.pix(y, x++) = BIT(data, 9) ? rgb_t::black() : rgb_t::white(); } + if ((y % 10) == 9) - pos += 80; + { + row++; + if (y == 239) + { + pos = 0x030; + cursor_y = 0xff; + } + else + { + pos += 80; + if (pos >= 0x800) + { + pos = 0x080; + row -= 24; + } + } + } } return 0; } -READ8_MEMBER(zms8085_state::special_r) +u8 zms8085_state::special_r() { return 0x40; } -READ8_MEMBER(zms8085_state::uart_status_r) +u8 zms8085_state::uart_status_r() { return m_uart->tbmt_r() | (m_uart->dav_r() << 1); } +void zms8085_state::key_l_w(u8 data) +{ + m_key_row = (m_key_row & 0x3f00) | data; +} + +void zms8085_state::key_h_w(u8 data) +{ + m_key_row = (m_key_row & 0x00ff) | ((data & 0x3f) << 8); +} + +u8 zms8085_state::key_r() +{ + if (!machine().side_effects_disabled()) + m_maincpu->set_input_line(I8085_RST55_LINE, CLEAR_LINE); + + u8 result = 0xff; + for (int n = 0; n < 14; n++) + if (BIT(m_key_row, n)) + result &= m_keys[n]->read(); + + return result; +} + void zms8085_state::mem_map(address_map &map) { @@ -100,11 +151,159 @@ void zms8085_state::io_map(address_map &map) map(0x61, 0x61).r(FUNC(zms8085_state::special_r)).w(m_uart, FUNC(ay51013_device::transmit)); map(0x62, 0x62).r(m_uart, FUNC(ay51013_device::receive)); map(0x63, 0x63).r(FUNC(zms8085_state::uart_status_r)); + map(0x64, 0x64).w(FUNC(zms8085_state::key_l_w)); + map(0x65, 0x65).w(FUNC(zms8085_state::key_h_w)); + map(0x66, 0x66).r(FUNC(zms8085_state::key_r)); + map(0x67, 0x67).portr("MODIFIERS"); map(0x68, 0x68).nopw(); } -static INPUT_PORTS_START( zephyr ) +static INPUT_PORTS_START(zephyr) + PORT_START("KEY0") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('g') PORT_CHAR('G') PORT_CODE(KEYCODE_G) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('t') PORT_CHAR('T') PORT_CODE(KEYCODE_T) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('6') PORT_CHAR('^') PORT_CODE(KEYCODE_6) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('=') PORT_CHAR('+') PORT_CODE(KEYCODE_EQUALS) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('`') PORT_CHAR('~') PORT_CODE(KEYCODE_TILDE) // to right of right shift + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('m') PORT_CHAR('M') PORT_CODE(KEYCODE_M) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY1") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('j') PORT_CHAR('J') PORT_CODE(KEYCODE_J) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('u') PORT_CHAR('U') PORT_CODE(KEYCODE_U) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('8') PORT_CHAR('*') PORT_CODE(KEYCODE_8) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('{') PORT_CHAR('}') PORT_CODE(KEYCODE_BACKSLASH) // to right of Back Space + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) PORT_CODE(KEYCODE_2_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('.') PORT_CHAR('>') PORT_CODE(KEYCODE_STOP) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) PORT_CODE(KEYCODE_7_PAD) + + PORT_START("KEY2") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('l') PORT_CHAR('L') PORT_CODE(KEYCODE_L) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('o') PORT_CHAR('O') PORT_CODE(KEYCODE_O) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('0') PORT_CHAR(')') PORT_CODE(KEYCODE_0) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(HOME)) PORT_CODE(KEYCODE_HOME) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD)) PORT_CODE(KEYCODE_ENTER_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('[') PORT_CHAR(']') PORT_CODE(KEYCODE_OPENBRACE) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) PORT_CODE(KEYCODE_9_PAD) + + PORT_START("KEY3") + PORT_BIT(0x03, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('e') PORT_CHAR('E') PORT_CODE(KEYCODE_E) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('4') PORT_CHAR('$') PORT_CODE(KEYCODE_4) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(COMMA_PAD)) PORT_CODE(KEYCODE_PLUS_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('b') PORT_CHAR('B') PORT_CODE(KEYCODE_B) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) PORT_CODE(KEYCODE_DOWN) + + PORT_START("KEY4") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('f') PORT_CHAR('F') PORT_CODE(KEYCODE_F) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('r') PORT_CHAR('R') PORT_CODE(KEYCODE_R) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('5') PORT_CHAR('%') PORT_CODE(KEYCODE_5) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) PORT_CODE(KEYCODE_MINUS_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('n') PORT_CHAR('N') PORT_CODE(KEYCODE_N) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY5") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(';') PORT_CHAR(':') PORT_CODE(KEYCODE_COLON) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('p') PORT_CHAR('P') PORT_CODE(KEYCODE_P) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('-') PORT_CHAR('_') PORT_CODE(KEYCODE_MINUS) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) PORT_CODE(KEYCODE_RIGHT) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD)) PORT_CODE(KEYCODE_DEL_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('\'') PORT_CHAR('"') PORT_CODE(KEYCODE_QUOTE) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('\\') PORT_CHAR('|') PORT_CODE(KEYCODE_CLOSEBRACE) + + PORT_START("KEY6") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('k') PORT_CHAR('K') PORT_CODE(KEYCODE_K) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('i') PORT_CHAR('I') PORT_CODE(KEYCODE_I) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('9') PORT_CHAR('(') PORT_CODE(KEYCODE_9) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) PORT_CODE(KEYCODE_LEFT) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) PORT_CODE(KEYCODE_3_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('/') PORT_CHAR('?') PORT_CODE(KEYCODE_SLASH) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) PORT_CODE(KEYCODE_8_PAD) + + PORT_START("KEY7") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('h') PORT_CHAR('H') PORT_CODE(KEYCODE_H) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('y') PORT_CHAR('Y') PORT_CODE(KEYCODE_Y) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('7') PORT_CHAR('&') PORT_CODE(KEYCODE_7) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Back Space") PORT_CHAR(0x08) PORT_CODE(KEYCODE_BACKSPACE) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) PORT_CODE(KEYCODE_1_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(',') PORT_CHAR('<') PORT_CODE(KEYCODE_COMMA) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY8") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('d') PORT_CHAR('D') PORT_CODE(KEYCODE_D) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('w') PORT_CHAR('W') PORT_CODE(KEYCODE_W) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('3') PORT_CHAR('#') PORT_CODE(KEYCODE_3) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(UP)) PORT_CODE(KEYCODE_UP) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) PORT_CODE(KEYCODE_6_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('v') PORT_CHAR('V') PORT_CODE(KEYCODE_V) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY9") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('s') PORT_CHAR('S') PORT_CODE(KEYCODE_S) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('q') PORT_CHAR('Q') PORT_CODE(KEYCODE_Q) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('2') PORT_CHAR('@') PORT_CODE(KEYCODE_2) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) PORT_CODE(KEYCODE_5_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('c') PORT_CHAR('C') PORT_CODE(KEYCODE_C) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Line Feed") // to right of backslash + + PORT_START("KEYA") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('a') PORT_CHAR('A') PORT_CODE(KEYCODE_A) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(0x09) PORT_CODE(KEYCODE_TAB) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('1') PORT_CHAR('!') PORT_CODE(KEYCODE_1) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F2)) PORT_CODE(KEYCODE_F2) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) PORT_CODE(KEYCODE_4_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('x') PORT_CHAR('X') PORT_CODE(KEYCODE_X) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Return") PORT_CHAR(0x0d) PORT_CODE(KEYCODE_ENTER) + + PORT_START("KEYB") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Esc Del") PORT_CHAR(0x1b) PORT_CHAR(0x7f) PORT_CODE(KEYCODE_LALT) // to left of Caps Lock + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F1)) PORT_CODE(KEYCODE_F1) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("New Line/Page") // to right of Return? + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('z') PORT_CHAR('Z') PORT_CODE(KEYCODE_Z) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(' ') PORT_CODE(KEYCODE_SPACE) + + PORT_START("KEYC") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) PORT_CODE(KEYCODE_0_PAD) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F14)) PORT_CODE(KEYCODE_F14) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F13)) PORT_CODE(KEYCODE_F13) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F12)) PORT_CODE(KEYCODE_F12) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F11)) PORT_CODE(KEYCODE_F11) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F15)) PORT_CODE(KEYCODE_F15) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F16)) PORT_CODE(KEYCODE_F16) + + PORT_START("KEYD") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F10)) PORT_CODE(KEYCODE_F10) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F6)) PORT_CODE(KEYCODE_F6) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F5)) PORT_CODE(KEYCODE_F5) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F4)) PORT_CODE(KEYCODE_F4) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F3)) PORT_CODE(KEYCODE_F3) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F9)) PORT_CODE(KEYCODE_F9) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F7)) PORT_CODE(KEYCODE_F7) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F8)) PORT_CODE(KEYCODE_F8) + + PORT_START("MODIFIERS") + PORT_BIT(0x1f, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) PORT_CODE(KEYCODE_CAPSLOCK) PORT_TOGGLE + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Ctrl") PORT_CHAR(UCHAR_SHIFT_2) PORT_CODE(KEYCODE_LCONTROL) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Shift") PORT_CHAR(UCHAR_SHIFT_1) PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) INPUT_PORTS_END @@ -112,22 +311,28 @@ void zms8085_state::machine_start() { m_uart->write_swe(0); + // most of these settings should be configurable through switches m_uart->write_nb1(1); m_uart->write_nb2(1); m_uart->write_np(1); m_uart->write_eps(1); m_uart->write_tsb(0); m_uart->write_cs(1); + + m_key_row = 0; + save_item(NAME(m_key_row)); } -MACHINE_CONFIG_START(zms8085_state::zephyr) - MCFG_DEVICE_ADD("maincpu", I8085A, XTAL(15'582'000) / 2) // divider not verified - MCFG_DEVICE_PROGRAM_MAP(mem_map) - MCFG_DEVICE_IO_MAP(io_map) +void zms8085_state::zephyr(machine_config &config) +{ + I8085A(config, m_maincpu, 15.582_MHz_XTAL / 2); // divider not verified + m_maincpu->set_addrmap(AS_PROGRAM, &zms8085_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &zms8085_state::io_map); - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_RAW_PARAMS(XTAL(15'582'000), 980, 0, 800, 265, 0, 250) - MCFG_SCREEN_UPDATE_DRIVER(zms8085_state, screen_update) + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(15.582_MHz_XTAL, 980, 0, 800, 265, 0, 250); + screen.set_screen_update(FUNC(zms8085_state::screen_update)); + screen.screen_vblank().set_inputline(m_maincpu, I8085_RST55_LINE, ASSERT_LINE); AY51013(config, m_uart); // SMC COM2017 m_uart->set_tx_clock(153600); // should actually be configurable somehow @@ -138,7 +343,7 @@ MACHINE_CONFIG_START(zms8085_state::zephyr) m_uart->set_auto_rdav(true); RS232_PORT(config, "rs232", default_rs232_devices, nullptr); -MACHINE_CONFIG_END +} /************************************************************************************************************** @@ -150,7 +355,6 @@ Crystal: 15.582000 ROM_START( zephyr ) ROM_REGION(0x1000, "maincpu", 0) - ROM_DEFAULT_BIOS("test") // for now ROM_SYSTEM_BIOS(0, "main", "Main program" ) ROMX_LOAD( "23-067-03b.bin", 0x0000, 0x0800, CRC(29cfa003) SHA1(9de7a8402173a2c448e54ee433ba3050db7b70bb), ROM_BIOS(0) ) ROMX_LOAD( "23-067-004b.bin", 0x0800, 0x0800, CRC(37741104) SHA1(52b9998e0a8d4949e0dc7c3349b3681e13345061), ROM_BIOS(0) ) diff --git a/src/mame/drivers/zn.cpp b/src/mame/drivers/zn.cpp index b6eb60e5b30..106468653f9 100644 --- a/src/mame/drivers/zn.cpp +++ b/src/mame/drivers/zn.cpp @@ -71,8 +71,7 @@ public: m_rombank(*this, "rombank%u", 1), m_soundbank(*this, "soundbank"), m_okibank(*this, "okibank"), - m_znmcu_dataout(1), - m_znmcu_dsrout(1) + m_znmcu_dataout(1) { std::fill(std::begin(m_cat702_dataout), std::end(m_cat702_dataout), 1); } @@ -80,6 +79,7 @@ public: void zn1_1mb_vram(machine_config &config); void zn1_2mb_vram(machine_config &config); void zn2(machine_config &config); + void gameboard_cat702(machine_config &config); void jdredd(machine_config &config); void coh1002msnd(machine_config &config); void coh1002tb(machine_config &config); @@ -110,13 +110,9 @@ public: DECLARE_CUSTOM_INPUT_MEMBER(jdredd_gun_mux_read); private: - DECLARE_WRITE_LINE_MEMBER(sio0_sck){ m_cat702[0]->write_clock(state); m_cat702[1]->write_clock(state); m_znmcu->write_clock(state); } - DECLARE_WRITE_LINE_MEMBER(sio0_txd){ m_cat702[0]->write_datain(state); m_cat702[1]->write_datain(state); } - template<int Chip> DECLARE_WRITE_LINE_MEMBER(cat702_dataout){ m_cat702_dataout[Chip] = state; update_sio0_rxd(); } - DECLARE_WRITE_LINE_MEMBER(znmcu_dataout){ m_znmcu_dataout = state; update_sio0_rxd(); } - DECLARE_WRITE_LINE_MEMBER(znmcu_dsrout){ m_znmcu_dsrout = state; update_sio0_dsr(); } - void update_sio0_rxd(){ m_sio0->write_rxd(m_cat702_dataout[0] && m_cat702_dataout[1] && m_znmcu_dataout); } - void update_sio0_dsr(){ m_sio0->write_dsr(m_znmcu_dsrout); } + template<int Chip> DECLARE_WRITE_LINE_MEMBER(cat702_dataout) { m_cat702_dataout[Chip] = state; update_sio0_rxd(); } + DECLARE_WRITE_LINE_MEMBER(znmcu_dataout) { m_znmcu_dataout = state; update_sio0_rxd(); } + void update_sio0_rxd() { m_sio0->write_rxd(m_cat702_dataout[0] && m_cat702_dataout[1] && m_znmcu_dataout); } DECLARE_READ8_MEMBER(znsecsel_r); DECLARE_WRITE8_MEMBER(znsecsel_w); DECLARE_READ8_MEMBER(boardconfig_r); @@ -221,7 +217,7 @@ private: required_device<psxgpu_device> m_gpu; required_device<screen_device> m_gpu_screen; required_device<psxsio0_device> m_sio0; - required_device_array<cat702_device, 2> m_cat702; + optional_device_array<cat702_device, 2> m_cat702; required_device<znmcu_device> m_znmcu; required_device<cpu_device> m_maincpu; optional_device<cpu_device> m_audiocpu; @@ -241,7 +237,6 @@ private: int m_cat702_dataout[2]; int m_znmcu_dataout; - int m_znmcu_dsrout; }; inline void ATTR_PRINTF(3,4) zn_state::verboselog( int n_level, const char *s_fmt, ... ) @@ -262,7 +257,6 @@ void zn_state::machine_start() save_item(NAME(m_n_znsecsel)); save_item(NAME(m_cat702_dataout)); save_item(NAME(m_znmcu_dataout)); - save_item(NAME(m_znmcu_dsrout)); } @@ -288,8 +282,8 @@ WRITE8_MEMBER(zn_state::znsecsel_w) { verboselog(2, "znsecsel_w( %08x, %08x, %08x )\n", offset, data, mem_mask ); - m_cat702[0]->write_select(BIT(data, 2)); - m_cat702[1]->write_select(BIT(data, 3)); + if (m_cat702[0]) m_cat702[0]->write_select(BIT(data, 2)); + if (m_cat702[1]) m_cat702[1]->write_select(BIT(data, 3)); m_znmcu->write_select((data & 0x8c) != 0x8c); // BIT(data,4); // read analogue controls? @@ -383,27 +377,25 @@ void zn_state::zn_map(address_map &map) MACHINE_CONFIG_START(zn_state::zn1_1mb_vram) /* basic machine hardware */ - MCFG_DEVICE_ADD( m_maincpu, CXD8530CQ, XTAL(67'737'600) ) - MCFG_DEVICE_PROGRAM_MAP( zn_map) + CXD8530CQ(config, m_maincpu, XTAL(67'737'600)); + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::zn_map); - subdevice<ram_device>("maincpu:ram")->set_default_size("4M"); + m_maincpu->subdevice<ram_device>("ram")->set_default_size("4M"); - MCFG_DEVICE_MODIFY("maincpu:sio0") - MCFG_PSX_SIO_SCK_HANDLER(WRITELINE(*this, zn_state, sio0_sck)) - MCFG_PSX_SIO_TXD_HANDLER(WRITELINE(*this, zn_state, sio0_txd)) + auto &sio0(*m_maincpu->subdevice<psxsio0_device>("sio0")); + sio0.sck_handler().set(m_cat702[0], FUNC(cat702_device::write_clock)); + sio0.sck_handler().append(m_znmcu, FUNC(znmcu_device::write_clock)); + sio0.txd_handler().set(m_cat702[0], FUNC(cat702_device::write_datain)); - MCFG_DEVICE_ADD("cat702_1", CAT702, 0) - MCFG_CAT702_DATAOUT_HANDLER(WRITELINE(*this, zn_state, cat702_dataout<0>)) + CAT702(config, m_cat702[0], 0); + m_cat702[0]->dataout_handler().set(FUNC(zn_state::cat702_dataout<0>)); - MCFG_DEVICE_ADD("cat702_2", CAT702, 0) - MCFG_CAT702_DATAOUT_HANDLER(WRITELINE(*this, zn_state, cat702_dataout<1>)) - - MCFG_DEVICE_ADD("znmcu", ZNMCU, 0) - MCFG_ZNMCU_DATAOUT_HANDLER(WRITELINE(*this, zn_state, znmcu_dataout)) - MCFG_ZNMCU_DSR_HANDLER(WRITELINE(*this, zn_state, znmcu_dsrout)) - MCFG_ZNMCU_DSW_HANDLER(IOPORT("DSW")) - MCFG_ZNMCU_ANALOG1_HANDLER(IOPORT("ANALOG1")) - MCFG_ZNMCU_ANALOG2_HANDLER(IOPORT("ANALOG2")) + ZNMCU(config, m_znmcu, 0); + m_znmcu->dataout_handler().set(FUNC(zn_state::znmcu_dataout)); + m_znmcu->dsr_handler().set("maincpu:sio0", FUNC(psxsio0_device::write_dsr)); + m_znmcu->dsw_handler().set_ioport("DSW"); + m_znmcu->analog1_handler().set_ioport("ANALOG1"); + m_znmcu->analog2_handler().set_ioport("ANALOG2"); /* video hardware */ MCFG_PSXGPU_ADD( "maincpu", "gpu", CXD8561Q, 0x100000, XTAL(53'693'175) ) @@ -433,27 +425,25 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(zn_state::zn2) /* basic machine hardware */ - MCFG_DEVICE_ADD( m_maincpu, CXD8661R, XTAL(100'000'000) ) - MCFG_DEVICE_PROGRAM_MAP( zn_map) - - subdevice<ram_device>("maincpu:ram")->set_default_size("4M"); + CXD8661R(config, m_maincpu, XTAL(100'000'000)); + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::zn_map); - MCFG_DEVICE_MODIFY("maincpu:sio0") - MCFG_PSX_SIO_SCK_HANDLER(WRITELINE(*this, zn_state, sio0_sck)) - MCFG_PSX_SIO_TXD_HANDLER(WRITELINE(*this, zn_state, sio0_txd)) + m_maincpu->subdevice<ram_device>("ram")->set_default_size("4M"); - MCFG_DEVICE_ADD("cat702_1", CAT702, 0) - MCFG_CAT702_DATAOUT_HANDLER(WRITELINE(*this, zn_state, cat702_dataout<0>)) + auto &sio0(*m_maincpu->subdevice<psxsio0_device>("sio0")); + sio0.sck_handler().set(m_cat702[0], FUNC(cat702_device::write_clock)); + sio0.sck_handler().append(m_znmcu, FUNC(znmcu_device::write_clock)); + sio0.txd_handler().set(m_cat702[0], FUNC(cat702_device::write_datain)); - MCFG_DEVICE_ADD("cat702_2", CAT702, 0) - MCFG_CAT702_DATAOUT_HANDLER(WRITELINE(*this, zn_state, cat702_dataout<1>)) + CAT702(config, m_cat702[0], 0); + m_cat702[0]->dataout_handler().set(FUNC(zn_state::cat702_dataout<0>)); - MCFG_DEVICE_ADD("znmcu", ZNMCU, 0) - MCFG_ZNMCU_DATAOUT_HANDLER(WRITELINE(*this, zn_state, znmcu_dataout)) - MCFG_ZNMCU_DSR_HANDLER(WRITELINE(*this, zn_state, znmcu_dsrout)) - MCFG_ZNMCU_DSW_HANDLER(IOPORT("DSW")) - MCFG_ZNMCU_ANALOG1_HANDLER(IOPORT("ANALOG1")) - MCFG_ZNMCU_ANALOG2_HANDLER(IOPORT("ANALOG2")) + ZNMCU(config, m_znmcu, 0); + m_znmcu->dataout_handler().set(FUNC(zn_state::znmcu_dataout)); + m_znmcu->dsr_handler().set("maincpu:sio0", FUNC(psxsio0_device::write_dsr)); + m_znmcu->dsw_handler().set_ioport("DSW"); + m_znmcu->analog1_handler().set_ioport("ANALOG1"); + m_znmcu->analog2_handler().set_ioport("ANALOG2"); /* video hardware */ MCFG_PSXGPU_ADD( "maincpu", "gpu", CXD8654Q, 0x200000, XTAL(53'693'175) ) @@ -474,6 +464,16 @@ MACHINE_CONFIG_START(zn_state::zn2) MCFG_DEVICE_ADD("at28c16", AT28C16, 0) MACHINE_CONFIG_END +void zn_state::gameboard_cat702(machine_config &config) +{ + auto &sio0(*m_maincpu->subdevice<psxsio0_device>("sio0")); + sio0.sck_handler().append(m_cat702[1], FUNC(cat702_device::write_clock)); + sio0.txd_handler().append(m_cat702[1], FUNC(cat702_device::write_datain)); + + CAT702(config, m_cat702[1], 0); + m_cat702[1]->dataout_handler().set(FUNC(zn_state::cat702_dataout<1>)); +} + /* Capcom ZN1 generic PCB Layout ---------------------------- @@ -659,8 +659,9 @@ void zn_state::qsound_portmap(address_map &map) MACHINE_CONFIG_START(zn_state::coh1000c) zn1_1mb_vram(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1000c_map) + gameboard_cat702(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1000c_map); MCFG_DEVICE_ADD(m_audiocpu, Z80, XTAL(8'000'000)) MCFG_DEVICE_PROGRAM_MAP(qsound_map) @@ -684,8 +685,9 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(zn_state::coh1002c) zn1_2mb_vram(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1000c_map) + gameboard_cat702(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1000c_map); MCFG_DEVICE_ADD(m_audiocpu, Z80, XTAL(8'000'000)) MCFG_DEVICE_PROGRAM_MAP(qsound_map) @@ -845,8 +847,9 @@ Notes: MACHINE_CONFIG_START(zn_state::coh3002c) zn2(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1000c_map) + gameboard_cat702(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1000c_map); MCFG_DEVICE_ADD(m_audiocpu, Z80, XTAL(8'000'000)) MCFG_DEVICE_PROGRAM_MAP(qsound_map) @@ -1141,8 +1144,9 @@ void zn_state::fx1a_sound_map(address_map &map) MACHINE_CONFIG_START(zn_state::coh1000ta) zn1_1mb_vram(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1000ta_map) + gameboard_cat702(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1000ta_map); MCFG_DEVICE_ADD(m_audiocpu, Z80, XTAL(16'000'000) / 4) /* 4 MHz */ MCFG_DEVICE_PROGRAM_MAP(fx1a_sound_map) @@ -1197,10 +1201,10 @@ void zn_state::init_coh1000tb() MACHINE_CONFIG_START(zn_state::coh1000tb) zn1_1mb_vram(config); + gameboard_cat702(config); /* basic machine hardware */ - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1000tb_map) + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1000tb_map); MCFG_MACHINE_START_OVERRIDE(zn_state, coh1000ta) MCFG_MACHINE_RESET_OVERRIDE(zn_state, coh1000ta) @@ -1221,10 +1225,10 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(zn_state::coh1002tb) zn1_2mb_vram(config); + gameboard_cat702(config); /* basic machine hardware */ - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1000tb_map) + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1000tb_map); MCFG_MACHINE_START_OVERRIDE(zn_state, coh1000ta) MCFG_MACHINE_RESET_OVERRIDE(zn_state, coh1000ta) @@ -1471,8 +1475,9 @@ void zn_state::coh1000w_map(address_map &map) MACHINE_CONFIG_START(zn_state::coh1000w) zn1_2mb_vram(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1000w_map) + gameboard_cat702(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1000w_map); subdevice<ram_device>("maincpu:ram")->set_default_size("8M"); @@ -1691,8 +1696,9 @@ void zn_state::oki_map(address_map &map) MACHINE_CONFIG_START(zn_state::coh1002e) zn1_2mb_vram(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1002e_map) + gameboard_cat702(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1002e_map); MCFG_DEVICE_ADD(m_audiocpu, M68000, XTAL(12'000'000)) MCFG_DEVICE_PROGRAM_MAP(psarc_snd_map) @@ -1707,8 +1713,9 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(zn_state::beastrzrb) zn1_2mb_vram(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1002e_map) + gameboard_cat702(config); // TODO: hook up bootleg protection + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1002e_map); MCFG_DEVICE_ADD(m_audiocpu, AT89C4051, XTAL(12'000'000)) // clock unverified MCFG_DEVICE_PROGRAM_MAP(beastrzrb_snd_map) @@ -1847,8 +1854,9 @@ MACHINE_RESET_MEMBER(zn_state,bam2) MACHINE_CONFIG_START(zn_state::bam2) zn1_2mb_vram(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(bam2_map) + gameboard_cat702(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::bam2_map); MCFG_MACHINE_START_OVERRIDE(zn_state, bam2) MCFG_MACHINE_RESET_OVERRIDE(zn_state, bam2) @@ -2197,14 +2205,15 @@ void zn_state::jdredd_map(address_map &map) MACHINE_CONFIG_START(zn_state::coh1000a) zn1_2mb_vram(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1000a_map) + gameboard_cat702(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1000a_map); MACHINE_CONFIG_END MACHINE_CONFIG_START(zn_state::nbajamex) coh1000a(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(nbajamex_map) + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::nbajamex_map); NVRAM(config, "71256", nvram_device::DEFAULT_ALL_1); @@ -2218,8 +2227,8 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(zn_state::jdredd) coh1000a(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(jdredd_map) + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::jdredd_map); m_gpu_screen->screen_vblank().set(FUNC(zn_state::jdredd_vblank)); @@ -2385,8 +2394,9 @@ void zn_state::atlus_snd_map(address_map &map) MACHINE_CONFIG_START(zn_state::coh1001l) zn1_2mb_vram(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1001l_map) + gameboard_cat702(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1001l_map); MCFG_DEVICE_ADD(m_audiocpu, M68000, XTAL(10'000'000)) MCFG_DEVICE_PROGRAM_MAP(atlus_snd_map) @@ -2441,8 +2451,9 @@ MACHINE_RESET_MEMBER(zn_state,coh1002v) MACHINE_CONFIG_START(zn_state::coh1002v) zn1_2mb_vram(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1002v_map) + gameboard_cat702(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1002v_map); MCFG_MACHINE_START_OVERRIDE(zn_state, coh1002v) MCFG_MACHINE_RESET_OVERRIDE(zn_state, coh1002v) @@ -2631,8 +2642,9 @@ MACHINE_RESET_MEMBER(zn_state,coh1002m) MACHINE_CONFIG_START(zn_state::coh1002m) zn1_2mb_vram(config); - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1002m_map) + gameboard_cat702(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1002m_map); MCFG_MACHINE_START_OVERRIDE(zn_state, coh1002m) MCFG_MACHINE_RESET_OVERRIDE(zn_state, coh1002m) @@ -2688,8 +2700,7 @@ MACHINE_CONFIG_START(zn_state::coh1002msnd) coh1002m(config); /* basic machine hardware */ - MCFG_DEVICE_MODIFY("maincpu") - MCFG_DEVICE_PROGRAM_MAP(coh1002msnd_map) + m_maincpu->set_addrmap(AS_PROGRAM, &zn_state::coh1002msnd_map); MCFG_DEVICE_ADD(m_audiocpu, Z80, XTAL(32'000'000)/8) MCFG_DEVICE_PROGRAM_MAP(cbaj_z80_map) @@ -4944,10 +4955,13 @@ ROM_START( beastrzrb ) /* bootleg board */ /* http://www.atmel.com/dyn/products/product_card.asp?family_id=604&family_name=8051+Architecture&part_id=1939 */ ROM_LOAD( "at89c4051", 0x000000, 0x001000, NO_DUMP ) /* undumped internal ROM */ - ROM_REGION( 0x180000, "oki", 0 ) + ROM_REGION( 0x100000, "oki", 0 ) ROM_LOAD( "27c4096.1", 0x000000, 0x080000, CRC(217734a1) SHA1(de4f519215123c09b3b5f27509b4d74604b5e03d) ) ROM_LOAD( "27c4096.2", 0x080000, 0x080000, CRC(d1f2a9b2) SHA1(d1475a453ce4e3b9f2ff59abedf0f57ba3c408fe) ) - ROM_LOAD( "27c240.3", 0x100000, 0x080000, CRC(509cdc8b) SHA1(8b92b79be09de56e7d40c2d02fcbeca92bb60226) ) /* bad dump? (only contains 8k of data) */ + + // TODO: hook up bootleg protection + ROM_REGION16_LE( 0x080000, "blprot", 0 ) + ROM_LOAD( "27c240.3", 0x000000, 0x080000, CRC(509cdc8b) SHA1(8b92b79be09de56e7d40c2d02fcbeca92bb60226) ) // replay attack, upper & lower bytes identical ROM_REGION( 0x8, "cat702_2", 0 ) ROM_LOAD( "et02", 0x000000, 0x000008, CRC(187ce61a) SHA1(521122b0f7b3f278dd2a2b1d73c252b952b5f55d) ) diff --git a/src/mame/drivers/zorba.cpp b/src/mame/drivers/zorba.cpp index c51bb983378..74bce8a0af0 100644 --- a/src/mame/drivers/zorba.cpp +++ b/src/mame/drivers/zorba.cpp @@ -85,12 +85,9 @@ void zorba_state::zorba_io(address_map &map) map(0x04, 0x04).rw(FUNC(zorba_state::rom_r), FUNC(zorba_state::rom_w)); map(0x05, 0x05).rw(FUNC(zorba_state::ram_r), FUNC(zorba_state::ram_w)); map(0x10, 0x11).rw(m_crtc, FUNC(i8275_device::read), FUNC(i8275_device::write)); - map(0x20, 0x20).rw(m_uart0, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x21, 0x21).rw(m_uart0, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x22, 0x22).rw(m_uart1, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x23, 0x23).rw(m_uart1, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); - map(0x24, 0x24).rw(m_uart2, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)); - map(0x25, 0x25).rw(m_uart2, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)); + map(0x20, 0x21).rw(m_uart0, FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x22, 0x23).rw(m_uart1, FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x24, 0x25).rw(m_uart2, FUNC(i8251_device::read), FUNC(i8251_device::write)); map(0x26, 0x26).w(FUNC(zorba_state::intmask_w)); map(0x30, 0x30).rw(m_dma, FUNC(z80dma_device::bus_r), FUNC(z80dma_device::bus_w)); map(0x40, 0x43).rw(m_fdc, FUNC(fd1793_device::read), FUNC(fd1793_device::write)); diff --git a/src/mame/includes/bbc.h b/src/mame/includes/bbc.h index c907323c1c7..63a07b670fd 100644 --- a/src/mame/includes/bbc.h +++ b/src/mame/includes/bbc.h @@ -75,6 +75,7 @@ public: m_intube(*this, "intube"), m_extube(*this, "extube"), m_1mhzbus(*this, "1mhzbus"), + m_userport(*this, "userport"), m_rtc(*this, "rtc"), m_fdc(*this, "fdc"), m_i8271(*this, "i8271"), @@ -168,12 +169,12 @@ public: TIMER_CALLBACK_MEMBER(bbc_tape_timer_cb); DECLARE_WRITE_LINE_MEMBER(write_acia_clock); DECLARE_WRITE_LINE_MEMBER(adlc_irq_w); - DECLARE_WRITE_LINE_MEMBER(econet_clk_w); DECLARE_WRITE_LINE_MEMBER(bus_nmi_w); DECLARE_WRITE8_MEMBER(bbcb_via_system_write_porta); DECLARE_WRITE8_MEMBER(bbcb_via_system_write_portb); DECLARE_READ8_MEMBER(bbcb_via_system_read_porta); DECLARE_READ8_MEMBER(bbcb_via_system_read_portb); + DECLARE_WRITE_LINE_MEMBER(lpstb_w); DECLARE_WRITE_LINE_MEMBER(bbc_hsync_changed); DECLARE_WRITE_LINE_MEMBER(bbc_vsync_changed); DECLARE_WRITE_LINE_MEMBER(bbc_de_changed); @@ -192,8 +193,8 @@ public: DECLARE_WRITE_LINE_MEMBER(motor_w); DECLARE_WRITE_LINE_MEMBER(side_w); - UPD7002_GET_ANALOGUE(BBC_get_analogue_input); - UPD7002_EOC(BBC_uPD7002_EOC); + int BBC_get_analogue_input(int channel_number); + void BBC_uPD7002_EOC(int data); void bbc_setup_banks(memory_bank *membank, int banks, uint32_t shift, uint32_t size); void bbcm_setup_banks(memory_bank *membank, int banks, uint32_t shift, uint32_t size); @@ -205,8 +206,8 @@ public: DECLARE_DEVICE_IMAGE_LOAD_MEMBER(exp4_load) { return bbc_load_rom(image, m_exp4); } image_init_result bbcm_load_cart(device_image_interface &image, generic_slot_device *slot); - DECLARE_DEVICE_IMAGE_LOAD_MEMBER(bbcm_exp1_load) { return bbcm_load_cart(image, m_exp1); } - DECLARE_DEVICE_IMAGE_LOAD_MEMBER(bbcm_exp2_load) { return bbcm_load_cart(image, m_exp2); } + DECLARE_DEVICE_IMAGE_LOAD_MEMBER(bbcm_cart1_load) { return bbcm_load_cart(image, m_exp1); } + DECLARE_DEVICE_IMAGE_LOAD_MEMBER(bbcm_cart2_load) { return bbcm_load_cart(image, m_exp2); } MC6845_UPDATE_ROW(crtc_update_row); @@ -271,6 +272,7 @@ public: // HACK FOR MC6845 optional_device<bbc_tube_slot_device> m_intube; optional_device<bbc_tube_slot_device> m_extube; optional_device<bbc_1mhzbus_slot_device> m_1mhzbus; + optional_device<bbc_userport_slot_device> m_userport; optional_device<mc146818_device> m_rtc; optional_device<bbc_fdc_slot_device> m_fdc; optional_device<i8271_device> m_i8271; diff --git a/src/mame/includes/contra.h b/src/mame/includes/contra.h index 93585e3beda..80115d52038 100644 --- a/src/mame/includes/contra.h +++ b/src/mame/includes/contra.h @@ -20,6 +20,7 @@ public: m_tx_cram(*this, "tx_cram"), m_tx_vram(*this, "tx_vram"), m_spriteram(*this, "spriteram"), + m_spriteram_2(*this, "spriteram_2"), m_bg_cram(*this, "bg_cram"), m_bg_vram(*this, "bg_vram"), m_audiocpu(*this, "audiocpu"), @@ -38,6 +39,7 @@ public: required_shared_ptr<uint8_t> m_tx_cram; required_shared_ptr<uint8_t> m_tx_vram; required_shared_ptr<uint8_t> m_spriteram; + required_shared_ptr<uint8_t> m_spriteram_2; required_shared_ptr<uint8_t> m_bg_cram; required_shared_ptr<uint8_t> m_bg_vram; diff --git a/src/mame/includes/cps3.h b/src/mame/includes/cps3.h index 8ca781cddc3..694117a4946 100644 --- a/src/mame/includes/cps3.h +++ b/src/mame/includes/cps3.h @@ -135,6 +135,7 @@ public: SH2_DMA_KLUDGE_CB(dma_callback); virtual void machine_reset() override; virtual void video_start() override; + void draw_fg_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); uint32_t screen_update_cps3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); INTERRUPT_GEN_MEMBER(cps3_vbl_interrupt); INTERRUPT_GEN_MEMBER(cps3_other_interrupt); diff --git a/src/mame/includes/flkatck.h b/src/mame/includes/flkatck.h index 00b073eee79..a3b81cfe008 100644 --- a/src/mame/includes/flkatck.h +++ b/src/mame/includes/flkatck.h @@ -16,7 +16,8 @@ class flkatck_state : public driver_device public: flkatck_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), - m_k007121_ram(*this, "k007121_ram"), + m_vram(*this, "vram"), + m_spriteram(*this, "spriteram"), m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu"), m_k007121(*this, "k007121"), @@ -29,7 +30,8 @@ public: private: /* memory pointers */ - required_shared_ptr<uint8_t> m_k007121_ram; + required_shared_ptr<uint8_t> m_vram; + required_shared_ptr<uint8_t> m_spriteram; /* video-related */ tilemap_t *m_k007121_tilemap[2]; @@ -53,7 +55,7 @@ private: DECLARE_WRITE8_MEMBER(flkatck_ls138_w); DECLARE_READ8_MEMBER(multiply_r); DECLARE_WRITE8_MEMBER(multiply_w); - DECLARE_WRITE8_MEMBER(flkatck_k007121_w); + DECLARE_WRITE8_MEMBER(vram_w); DECLARE_WRITE8_MEMBER(flkatck_k007121_regs_w); TILE_GET_INFO_MEMBER(get_tile_info_A); TILE_GET_INFO_MEMBER(get_tile_info_B); diff --git a/src/mame/includes/gaiden.h b/src/mame/includes/gaiden.h index 90da74e9b24..4b15168682b 100644 --- a/src/mame/includes/gaiden.h +++ b/src/mame/includes/gaiden.h @@ -14,6 +14,7 @@ #include "machine/gen_latch.h" #include "machine/74157.h" #include "sound/msm5205.h" +#include "video/bufsprite.h" #include "video/tecmo_spr.h" #include "video/tecmo_mix.h" #include "emupal.h" @@ -54,7 +55,7 @@ public: private: /* memory pointers */ required_shared_ptr_array<uint16_t, 3> m_videoram; - required_shared_ptr<uint16_t> m_spriteram; + required_device<buffered_spriteram16_device> m_spriteram; optional_memory_bank m_adpcm_bank; /* video-related */ @@ -64,6 +65,7 @@ private: bitmap_ind16 m_sprite_bitmap; bitmap_ind16 m_tile_bitmap_bg; bitmap_ind16 m_tile_bitmap_fg; + bitmap_ind16 m_tile_bitmap_tx; uint16_t m_tx_scroll_x; uint16_t m_tx_scroll_y; uint16_t m_bg_scroll_x; @@ -127,7 +129,9 @@ private: DECLARE_VIDEO_START(gaiden); DECLARE_VIDEO_START(drgnbowl); DECLARE_VIDEO_START(raiga); + DECLARE_WRITE_LINE_MEMBER(screen_vblank); uint32_t screen_update_gaiden(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + uint32_t screen_update_raiga(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); uint32_t screen_update_drgnbowl(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void drgnbowl_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void descramble_drgnbowl(int descramble_cpu); diff --git a/src/mame/includes/gamecom.h b/src/mame/includes/gamecom.h index fb3638cfdbe..75db40ddb68 100644 --- a/src/mame/includes/gamecom.h +++ b/src/mame/includes/gamecom.h @@ -155,43 +155,39 @@ enum struct GAMECOM_DMA { - int enabled; - int transfer_mode; - int decrement_y; - int decrement_x; - int overwrite_mode; - int width_x; - int width_y; - int width_x_count; - int width_y_count; - int source_x; - int source_x_current; - int source_y; - int source_width; - int dest_x; - int dest_x_current; - int dest_y; - int dest_width; - int state_count; - int state_pixel; - int state_limit; - uint8_t palette[4]; - uint8_t *source_bank; - unsigned int source_current; - unsigned int source_line; - unsigned int source_mask; - uint8_t *dest_bank; - unsigned int dest_current; - unsigned int dest_line; - unsigned int dest_mask; + u8 width_x; + u8 width_y; + u8 source_x; + u8 source_x_current; + u8 source_y; + u8 source_width; + u8 dest_x; + u8 dest_x_current; + u8 dest_y; + u8 dest_width; + u8 palette; + u8 block_width; + u8 block_height; + u8 *source_bank; + u16 source_current; + u16 source_line; + u16 source_mask; + u8 *dest_bank; + u16 dest_current; + u16 dest_line; + u16 dest_mask; + u8 transfer_mode; + s16 adjust_x; + bool decrement_y; + bool overwrite_mode; }; struct GAMECOM_TIMER { - int enabled; - int state_count; - int state_limit; - int check_value; + bool enabled; + u32 prescale_count; + u32 prescale_max; + u8 upcounter_max; }; struct gamecom_sound_t diff --git a/src/mame/includes/glass.h b/src/mame/includes/glass.h index b36e62d673b..4c159306386 100644 --- a/src/mame/includes/glass.h +++ b/src/mame/includes/glass.h @@ -22,14 +22,15 @@ public: m_vregs(*this, "vregs"), m_spriteram(*this, "spriteram"), m_shareram(*this, "shareram"), - m_pant{ nullptr, nullptr } + m_bmap(*this, "bmap"), + m_okibank(*this, "okibank"), + m_pant{ nullptr, nullptr }, + m_blitter_command(0) { } void glass(machine_config &config); void glass_ds5002fp(machine_config &config); - void init_glass(); - private: /* devices */ required_device<cpu_device> m_maincpu; @@ -42,6 +43,9 @@ private: required_shared_ptr<uint16_t> m_vregs; required_shared_ptr<uint16_t> m_spriteram; required_shared_ptr<uint16_t> m_shareram; + required_region_ptr<uint8_t> m_bmap; + + required_memory_bank m_okibank; /* video-related */ tilemap_t *m_pant[2]; @@ -49,14 +53,13 @@ private: /* misc */ int m_current_bit; - int m_current_command; int m_cause_interrupt; - int m_blitter_serial_buffer[5]; + int m_blitter_command; DECLARE_WRITE8_MEMBER(shareram_w); DECLARE_READ8_MEMBER(shareram_r); DECLARE_WRITE16_MEMBER(clr_int_w); - DECLARE_WRITE16_MEMBER(OKIM6295_bankswitch_w); + DECLARE_WRITE8_MEMBER(oki_bankswitch_w); DECLARE_WRITE16_MEMBER(coin_w); DECLARE_WRITE16_MEMBER(blitter_w); DECLARE_WRITE16_MEMBER(vram_w); @@ -70,12 +73,10 @@ private: virtual void machine_reset() override; virtual void video_start() override; - TILE_GET_INFO_MEMBER(get_tile_info_screen0); - TILE_GET_INFO_MEMBER(get_tile_info_screen1); + template<int Layer> TILE_GET_INFO_MEMBER(get_tile_info); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); INTERRUPT_GEN_MEMBER(interrupt); void draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect ); - void ROM16_split_gfx( const char *src_reg, const char *dst_reg, int start, int length, int dest1, int dest2 ); void glass_map(address_map &map); void mcu_hostmem_map(address_map &map); void oki_map(address_map &map); diff --git a/src/mame/includes/itech8.h b/src/mame/includes/itech8.h index d031b64ecc2..ed8dd446dd9 100644 --- a/src/mame/includes/itech8.h +++ b/src/mame/includes/itech8.h @@ -7,6 +7,7 @@ **************************************************************************/ +#include "machine/gen_latch.h" #include "machine/ticket.h" #include "machine/timer.h" #include "video/tlc34076.h" @@ -17,19 +18,25 @@ class itech8_state : public driver_device { public: - itech8_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), + itech8_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), m_soundcpu(*this, "soundcpu"), m_subcpu(*this, "sub"), + m_soundlatch(*this, "soundlatch"), m_tms34061(*this, "tms34061"), m_tlc34076(*this, "tlc34076"), m_screen(*this, "screen"), m_ticket(*this, "ticket"), + m_grom(*this, "grom"), + m_mainbank(*this, "mainbank"), + m_fixed(*this, "fixed"), m_an(*this, { { "AN_C", "AN_D", "AN_E", "AN_F" } }), m_fakex(*this, "FAKEX"), m_fakey(*this, "FAKEY"), - m_visarea(0, 0, 0, 0) { } + m_visarea(0, 0, 0, 0), + m_bankxor(0) + {} void rimrockn(machine_config &config); void gtg2(machine_config &config); @@ -44,13 +51,12 @@ public: void slikshot_hi(machine_config &config); void hstennis_hi(machine_config &config); - void init_rimrockn(); + void init_invbank(); void init_peggle(); void init_slikshot(); void init_neckneck(); void init_arligntn(); void init_hstennis(); - void init_sstrike(); DECLARE_CUSTOM_INPUT_MEMBER(special_r); DECLARE_CUSTOM_INPUT_MEMBER(gtg_mux); @@ -64,7 +70,6 @@ protected: { TIMER_IRQ_OFF, TIMER_BEHIND_BEAM_UPDATE, - TIMER_DELAYED_SOUND_DATA, TIMER_BLITTER_DONE, TIMER_DELAYED_Z80_CONTROL, TIMER_BASE_LAST = TIMER_DELAYED_Z80_CONTROL @@ -73,10 +78,14 @@ protected: required_device<cpu_device> m_maincpu; required_device<cpu_device> m_soundcpu; optional_device<cpu_device> m_subcpu; + required_device<generic_latch_8_device> m_soundlatch; required_device<tms34061_device> m_tms34061; required_device<tlc34076_device> m_tlc34076; required_device<screen_device> m_screen; required_device<ticket_dispenser_device> m_ticket; + required_region_ptr<uint8_t> m_grom; + optional_memory_bank m_mainbank; + optional_memory_bank m_fixed; optional_ioport_array<4> m_an; optional_ioport m_fakex; optional_ioport m_fakey; @@ -87,7 +96,6 @@ protected: uint8_t m_blitter_int; uint8_t m_tms34061_int; uint8_t m_periodic_int; - uint8_t m_sound_data; uint8_t m_pia_porta_data; uint8_t m_pia_portb_data; uint8_t m_z80_ctrl; @@ -113,13 +121,11 @@ protected: uint8_t m_fetch_rle_count; uint8_t m_fetch_rle_value; uint8_t m_fetch_rle_literal; - uint8_t *m_grom_base; - uint32_t m_grom_size; emu_timer *m_irq_off_timer; emu_timer *m_behind_beam_update_timer; - emu_timer *m_delayed_sound_data_timer; emu_timer *m_blitter_done_timer; emu_timer *m_delayed_z80_control_timer; + int m_bankxor; // common DECLARE_WRITE_LINE_MEMBER(generate_tms34061_interrupt); @@ -127,12 +133,10 @@ protected: DECLARE_WRITE8_MEMBER(blitter_bank_w); DECLARE_WRITE8_MEMBER(rimrockn_bank_w); DECLARE_WRITE8_MEMBER(pia_portb_out); - DECLARE_WRITE8_MEMBER(sound_data_w); DECLARE_WRITE8_MEMBER(gtg2_sound_data_w); - DECLARE_READ8_MEMBER(sound_data_r); DECLARE_WRITE8_MEMBER(grom_bank_w); DECLARE_WRITE8_MEMBER(palette_w); - DECLARE_WRITE8_MEMBER(page_w); + void page_w(u8 data); DECLARE_READ8_MEMBER(blitter_r); DECLARE_WRITE8_MEMBER(blitter_w); DECLARE_WRITE8_MEMBER(tms34061_w); @@ -155,7 +159,6 @@ protected: DECLARE_WRITE_LINE_MEMBER(ninclown_irq); TIMER_CALLBACK_MEMBER(irq_off); TIMER_CALLBACK_MEMBER(behind_the_beam_update); - TIMER_CALLBACK_MEMBER(delayed_sound_data_w); TIMER_CALLBACK_MEMBER(blitter_done); inline uint8_t fetch_next_raw(); @@ -165,7 +168,7 @@ protected: void perform_blit(address_space &space); void update_interrupts(int periodic, int tms34061, int blitter); - /*----------- defined in machine/slikshot.c -----------*/ + /*----------- defined in machine/itech8.cpp -----------*/ DECLARE_READ8_MEMBER( slikz80_port_r ); DECLARE_WRITE8_MEMBER( slikz80_port_w ); @@ -190,8 +193,6 @@ protected: DECLARE_READ16_MEMBER(rom_constant_r); DECLARE_READ8_MEMBER(ninclown_palette_r); DECLARE_WRITE8_MEMBER(ninclown_palette_w); - DECLARE_WRITE16_MEMBER(grom_bank16_w); - DECLARE_WRITE16_MEMBER(display_page16_w); void itech8_sound_ym2203(machine_config &config); void itech8_sound_ym2608b(machine_config &config); @@ -200,16 +201,19 @@ protected: void itech8_core_devices(machine_config &config); void itech8_core_lo(machine_config &config); void itech8_core_hi(machine_config &config); + void common_hi_map(address_map &map); + void common_lo_map(address_map &map); void gtg2_map(address_map &map); void ninclown_map(address_map &map); + void rimrockn_map(address_map &map); + void slikshot_map(address_map &map); void slikz80_io_map(address_map &map); void slikz80_mem_map(address_map &map); void sound2203_map(address_map &map); void sound2608b_map(address_map &map); void sound3812_external_map(address_map &map); void sound3812_map(address_map &map); - void tmshi_map(address_map &map); - void tmslo_map(address_map &map); + void sstrike_map(address_map &map); virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; }; @@ -217,8 +221,8 @@ protected: class grmatch_state : public itech8_state { public: - grmatch_state(const machine_config &mconfig, device_type type, const char *tag) - : itech8_state(mconfig, type, tag), + grmatch_state(const machine_config &mconfig, device_type type, const char *tag) : + itech8_state(mconfig, type, tag), m_palette_timer(nullptr) { } @@ -249,4 +253,6 @@ protected: uint8_t m_palcontrol; uint8_t m_xscroll; rgb_t m_palette[2][16]; + + void grmatch_map(address_map &map); }; diff --git a/src/mame/includes/jazz.h b/src/mame/includes/jazz.h new file mode 100644 index 00000000000..d666b81a45a --- /dev/null +++ b/src/mame/includes/jazz.h @@ -0,0 +1,97 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +#ifndef MAME_INCLUDES_JAZZ_H +#define MAME_INCLUDES_JAZZ_H + +#pragma once + +#include "cpu/mips/mips3.h" + +// memory +#include "machine/ram.h" +#include "machine/nvram.h" +#include "machine/28fxxx.h" + +// various hardware +#include "machine/jazz_mct_adr.h" +#include "machine/dp83932c.h" +#include "machine/mc146818.h" +#include "machine/ncr5390.h" +#include "machine/upd765.h" +#include "machine/at_keybc.h" + +// video +#include "screen.h" +#include "video/ims_cvc.h" + +// busses and connectors +#include "machine/nscsi_bus.h" +#include "machine/nscsi_cd.h" +#include "machine/nscsi_hd.h" +#include "bus/rs232/rs232.h" +#include "bus/pc_kbd/pc_kbdc.h" +#include "bus/pc_kbd/keyboards.h" + +class jazz_state : public driver_device +{ +public: + jazz_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "cpu") + , m_ram(*this, "ram") + , m_mct_adr(*this, "mct_adr") + , m_scsibus(*this, "scsi") + , m_scsi(*this, "scsi:7:host") + , m_fdc(*this, "fdc") + , m_rtc(*this, "rtc") + , m_nvram(*this, "nvram") + , m_flash(*this, "flash") + , m_kbdc(*this, "kbdc") + , m_network(*this, "net") + , m_ramdac(*this, "g364") + { + } + +protected: + // driver_device overrides + virtual void machine_start() override; + virtual void machine_reset() override; + + // address maps + void jazz_common_map(address_map &map); + + // machine config + void jazz(machine_config &config); +public: + void mmr4000be(machine_config &config); + void mmr4000le(machine_config &config); + + void init_common(); + +protected: + // devices + required_device<mips3_device> m_maincpu; + required_device<ram_device> m_ram; + required_device<jazz_mct_adr_device> m_mct_adr; + required_device<nscsi_bus_device> m_scsibus; + required_device<ncr5390_device> m_scsi; + required_device<n82077aa_device> m_fdc; + required_device<mc146818_device> m_rtc; + required_device<nvram_device> m_nvram; + required_device<amd_28f020_device> m_flash; + required_device<at_keyboard_controller_device> m_kbdc; + required_device<dp83932c_device> m_network; + //required_device<screen_device> m_screen; + required_device<g364_device> m_ramdac; + + // helpers + u8 led_r() { return m_led; } + void led_w(const u8 data) { logerror("led 0x%02x\n", data); m_led = data; } + +private: + // machine state + u8 m_led; +}; + +#endif // MAME_INCLUDES_JAZZ_H diff --git a/src/mame/includes/m52.h b/src/mame/includes/m52.h index fb899754a37..5d77946b3f6 100644 --- a/src/mame/includes/m52.h +++ b/src/mame/includes/m52.h @@ -50,6 +50,7 @@ private: DECLARE_PALETTE_INIT(m52); uint32_t screen_update_m52(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void draw_background(bitmap_ind16 &bitmap, const rectangle &cliprect, int xpos, int ypos, int image); + void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int initoffs); required_device<cpu_device> m_maincpu; required_device<gfxdecode_device> m_gfxdecode; required_device<screen_device> m_screen; diff --git a/src/mame/includes/mips.h b/src/mame/includes/mips.h new file mode 100644 index 00000000000..0fb9ee547ee --- /dev/null +++ b/src/mame/includes/mips.h @@ -0,0 +1,100 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +#ifndef MAME_INCLUDES_MIPS_H +#define MAME_INCLUDES_MIPS_H + +#pragma once + +// processors and memory +#include "cpu/mips/r3000.h" +#include "cpu/nec/v53.h" +#include "machine/ram.h" + +// i/o devices +#include "machine/am79c90.h" +#include "machine/at_keybc.h" +#include "machine/mc146818.h" +#include "machine/ncr5390.h" +#include "machine/upd765.h" +#include "machine/wd33c93.h" +#include "machine/z80scc.h" + +// busses and connectors +#include "bus/pc_kbd/pc_kbdc.h" +#include "bus/pc_kbd/keyboards.h" +#include "bus/rs232/rs232.h" + +// video +#include "screen.h" +#include "video/bt45x.h" + +#include "formats/pc_dsk.h" + +class rx2030_state : public driver_device +{ +public: + rx2030_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "cpu") + , m_iop(*this, "iop") + , m_ram(*this, "ram") + , m_rtc(*this, "rtc") + , m_kbdc(*this, "kbdc") + , m_kbd(*this, "kbd") + , m_scc(*this, "scc") + , m_tty(*this, "tty%u", 0U) + , m_fdc(*this, "fdc") + , m_scsi(*this, "scsi") + , m_net(*this, "net") + , m_screen(*this, "screen") + , m_ramdac(*this, "ramdac") + , m_vram(*this, "vram") + { + } + + // machine config + void rx2030(machine_config &config); + void rs2030(machine_config &config); + void rc2030(machine_config &config); + + void rx2030_init(); + +protected: + // driver_device overrides + virtual void machine_start() override; + virtual void machine_reset() override; + + // address maps + void cpu_map(address_map &map); + void iop_program_map(address_map &map); + void iop_io_map(address_map &map); + + u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + +private: + // processors and memory + required_device<r2000_device> m_maincpu; + required_device<v53_device> m_iop; + required_device<ram_device> m_ram; + + // i/o devices + required_device<mc146818_device> m_rtc; + required_device<at_keyboard_controller_device> m_kbdc; + required_device<pc_kbdc_slot_device> m_kbd; + required_device<z80scc_device> m_scc; + required_device_array<rs232_port_device, 2> m_tty; + required_device<wd37c65c_device> m_fdc; + required_device<wd33c93_device> m_scsi; + required_device<am7990_device> m_net; + + // optional video board + optional_device<screen_device> m_screen; + optional_device<bt458_device> m_ramdac; + optional_device<ram_device> m_vram; + + // machine state + u16 m_mmu[32]; +}; + +#endif // MAME_INCLUDES_MIPS_H diff --git a/src/mame/includes/model1.h b/src/mame/includes/model1.h index f04d4b2843b..44a5b3c2504 100644 --- a/src/mame/includes/model1.h +++ b/src/mame/includes/model1.h @@ -103,8 +103,8 @@ public: private: // Machine - DECLARE_MACHINE_START(model1); - DECLARE_MACHINE_RESET(model1); + virtual void machine_start() override; + virtual void machine_reset() override; DECLARE_READ8_MEMBER(io_r); DECLARE_WRITE8_MEMBER(io_w); @@ -165,7 +165,7 @@ private: DECLARE_WRITE8_MEMBER(r360_w); // Rendering - DECLARE_VIDEO_START(model1); + virtual void video_start() override; DECLARE_READ16_MEMBER(model1_listctl_r); DECLARE_WRITE16_MEMBER(model1_listctl_w); diff --git a/src/mame/includes/msx.h b/src/mame/includes/msx.h index 79f1d8ec175..b8f705a7e59 100644 --- a/src/mame/includes/msx.h +++ b/src/mame/includes/msx.h @@ -45,70 +45,70 @@ #define MCFG_MSX_LAYOUT_ROM(_tag, _prim, _sec, _page, _numpages, _region, _offset) \ MCFG_MSX_SLOT_ROM_ADD(_tag, _page, _numpages, _region, _offset) \ - msx_state::install_slot_pages(*this, _prim, _sec, _page, _numpages, device); + install_slot_pages(_prim, _sec, _page, _numpages, device); #define MCFG_MSX_LAYOUT_RAM(_tag, _prim, _sec, _page, _numpages) \ MCFG_MSX_SLOT_RAM_ADD(_tag, _page, _numpages) \ - msx_state::install_slot_pages(*this, _prim, _sec, _page, _numpages, device); + install_slot_pages(_prim, _sec, _page, _numpages, device); #define MCFG_MSX_LAYOUT_CARTRIDGE(_tag, _prim, _sec) \ MCFG_MSX_SLOT_CARTRIDGE_ADD(_tag, WRITELINE(DEVICE_SELF, msx_state, msx_irq_source1)) \ - msx_state::install_slot_pages(*this, _prim, _sec, 0, 4, device); + install_slot_pages(_prim, _sec, 0, 4, device); #define MCFG_MSX_LAYOUT_YAMAHA_EXPANSION(_tag, _prim, _sec, _default) \ MCFG_MSX_SLOT_YAMAHA_EXPANSION_ADD(_tag, WRITELINE(DEVICE_SELF, msx_state, msx_irq_source2), _default) \ - msx_state::install_slot_pages(*this, _prim, _sec, 0, 4, device); + install_slot_pages(_prim, _sec, 0, 4, device); #define MCFG_MSX_LAYOUT_RAM_MM(_tag, _prim, _sec, _total_size) \ MCFG_MSX_SLOT_RAM_MM_ADD(_tag, _total_size) \ - msx_state::install_slot_pages(*this, _prim, _sec, 0, 4, device); + install_slot_pages(_prim, _sec, 0, 4, device); #define MCFG_MSX_RAMIO_SET_BITS(_ramio_set_bits) \ MCFG_MSX_SLOT_RAMM_SET_RAMIO_BITS(_ramio_set_bits) #define MCFG_MSX_LAYOUT_DISK1(_tag, _prim, _sec, _page, _numpages, _region, _offset) \ MCFG_MSX_SLOT_DISK1_ADD(_tag, _page, _numpages, _region, _offset, "fdc", "fdc:0", "fdc:1") \ - msx_state::install_slot_pages(*this, _prim, _sec, _page, _numpages + 1, device); /* Memory mapped FDC registers are also accessible through page 2 */ + install_slot_pages(_prim, _sec, _page, _numpages + 1, device); /* Memory mapped FDC registers are also accessible through page 2 */ #define MCFG_MSX_LAYOUT_DISK2(_tag, _prim, _sec, _page, _numpages, _region, _offset) \ MCFG_MSX_SLOT_DISK2_ADD(_tag, _page, _numpages, _region, _offset, "fdc", "fdc:0", "fdc:1") \ - msx_state::install_slot_pages(*this, _prim, _sec, _page, _numpages + 1, device); /* Memory mapped FDC registers are also accessible through page 2 */ + install_slot_pages(_prim, _sec, _page, _numpages + 1, device); /* Memory mapped FDC registers are also accessible through page 2 */ #define MCFG_MSX_LAYOUT_DISK3(_tag, _prim, _sec, _page, _numpages, _region, _offset) \ MCFG_MSX_SLOT_DISK3_ADD(_tag, _page, _numpages, _region, _offset, "fdc", "fdc:0", "fdc:1") \ - msx_state::install_slot_pages(*this, _prim, _sec, _page, _numpages, device); + install_slot_pages(_prim, _sec, _page, _numpages, device); #define MCFG_MSX_LAYOUT_DISK4(_tag, _prim, _sec, _page, _numpages, _region, _offset) \ MCFG_MSX_SLOT_DISK4_ADD(_tag, _page, _numpages, _region, _offset, "fdc", "fdc:0", "fdc:1") \ - msx_state::install_slot_pages(*this, _prim, _sec, _page, _numpages, device); + install_slot_pages(_prim, _sec, _page, _numpages, device); #define MCFG_MSX_LAYOUT_DISK5(_tag, _prim, _sec, _page, _numpages, _region, _offset) \ MCFG_MSX_SLOT_DISK5_ADD(_tag, _page, _numpages, _region, _offset, "fdc", "fdc:0", "fdc:1", "fdc:2", "fdc:3") \ - msx_state::install_slot_pages(*this, _prim, _sec, _page, _numpages, device); + install_slot_pages(_prim, _sec, _page, _numpages, device); #define MCFG_MSX_LAYOUT_DISK6(_tag, _prim, _sec, _page, _numpages, _region, _offset) \ MCFG_MSX_SLOT_DISK6_ADD(_tag, _page, _numpages, _region, _offset, "fdc", "fdc:0", "fdc:1") \ - msx_state::install_slot_pages(*this, _prim, _sec, _page, _numpages, device); + install_slot_pages(_prim, _sec, _page, _numpages, device); #define MCFG_MSX_LAYOUT_MUSIC(_tag, _prim, _sec, _page, _numpages, _region, _offset) \ MCFG_MSX_SLOT_MUSIC_ADD(_tag, _page, _numpages, _region, _offset, "ym2413" ) \ - msx_state::install_slot_pages(*this, _prim, _sec, _page, _numpages, device); + install_slot_pages(_prim, _sec, _page, _numpages, device); #define MCFG_MSX_LAYOUT_BUNSETSU(_tag, _prim, _sec, _page, _numpages, _region, _offset, _bunsetsu_tag) \ MCFG_MSX_SLOT_BUNSETSU_ADD(_tag, _page, _numpages, _region, _offset, _bunsetsu_tag) \ - msx_state::install_slot_pages(*this, _prim, _sec, _page, _numpages, device); + install_slot_pages(_prim, _sec, _page, _numpages, device); #define MCFG_MSX_LAYOUT_FS4600(_tag, _prim, _sec, _page, _numpages, _region, _offset) \ MCFG_MSX_SLOT_FS4600_ADD(_tag, _page, _numpages, _region, _offset) \ - msx_state::install_slot_pages(*this, _prim, _sec, _page, _numpages, device); + install_slot_pages(_prim, _sec, _page, _numpages, device); #define MCFG_MSX_LAYOUT_PANASONIC08(_tag, _prim, _sec, _page, _numpages, _region, _offset) \ MCFG_MSX_SLOT_PANASONIC08_ADD(_tag, _page, _numpages, _region, _offset) \ - msx_state::install_slot_pages(*this, _prim, _sec, _page, _numpages, device); + install_slot_pages(_prim, _sec, _page, _numpages, device); #define MCFG_MSX_LAYOUT_SONY08(_tag, _prim, _sec, _page, _numpages, _region, _offset) \ MCFG_MSX_SLOT_SONY08_ADD(_tag, _page, _numpages, _region, _offset) \ - msx_state::install_slot_pages(*this, _prim, _sec, _page, _numpages, device); + install_slot_pages(_prim, _sec, _page, _numpages, device); class msx_state : public driver_device @@ -117,12 +117,9 @@ public: msx_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") - , m_v9938(*this, "v9938") - , m_v9958(*this, "v9958") , m_cassette(*this, "cassette") , m_ay8910(*this, "ay8910") , m_dac(*this, "dac") - , m_rtc(*this, TC8521_TAG) , m_region_maincpu(*this, "maincpu") , m_region_kanji(*this, "kanji") , m_io_joy0(*this, "JOY0") @@ -133,7 +130,6 @@ public: , m_io_key(*this, {"KEY0", "KEY1", "KEY2", "KEY3", "KEY4", "KEY5"}) , m_leds(*this, "led%u", 1U) , m_psg_b(0) - , m_rtc_latch(0) , m_kanji_latch(0) , m_primary_slot(0) , m_port_c_old(0) @@ -159,109 +155,51 @@ public: } } - void mpc25fd(machine_config &config); void hc6(machine_config &config); - void nms8220(machine_config &config); void hb75d(machine_config &config); - void y805128r2e(machine_config &config); - void fs4600(machine_config &config); void dpc100(machine_config &config); - void nms8245f(machine_config &config); - void hbf1xd(machine_config &config); - void expert3t(machine_config &config); void hb55p(machine_config &config); void hotbi13p(machine_config &config); void fspc800(machine_config &config); - void fsa1(machine_config &config); void mpc200(machine_config &config); void hb201p(machine_config &config); void hx22i(machine_config &config); - void y503iiire(machine_config &config); void svi738dk(machine_config &config); void gfc1080a(machine_config &config); void svi738pl(machine_config &config); void hx10dp(machine_config &config); void perfect1(machine_config &config); void mlf110(machine_config &config); - void fsa1gt(machine_config &config); - void phc23(machine_config &config); - void hbg900p(machine_config &config); - void hbf12(machine_config &config); - void fs5000(machine_config &config); - void hbf1(machine_config &config); - void phc70fd2(machine_config &config); - void phc70fd(machine_config &config); void cf1200(machine_config &config); void hx20(machine_config &config); - void yis604(machine_config &config); void cf3000(machine_config &config); void mpc100(machine_config &config); - void tps312(machine_config &config); - void phc55fd2(machine_config &config); void vg8020f(machine_config &config); void hx10f(machine_config &config); - void hbf1xv(machine_config &config); - void expertac(machine_config &config); - void fsa1wsx(machine_config &config); void cf2000(machine_config &config); void expertpl(machine_config &config); - void fsa1wxa(machine_config &config); - void hx23i(machine_config &config); - void fsa1wx(machine_config &config); - void fsa1fx(machine_config &config); - void cpc61(machine_config &config); - void hbf1xdj(machine_config &config); - void expert3i(machine_config &config); - void y805256(machine_config &config); void fs4000a(machine_config &config); - void y805128r2(machine_config &config); - void expertdx(machine_config &config); - void hbf700d(machine_config &config); void mpc10(machine_config &config); - void yis60464(machine_config &config); - void cpc300(machine_config &config); void pv16(machine_config &config); - void tpc310(machine_config &config); void jvchc7gb(machine_config &config); - void nms8255(machine_config &config); - void cx7m128(machine_config &config); void phc28(machine_config &config); void hx10sa(machine_config &config); - void cx7m(machine_config &config); void cx5m128(machine_config &config); void expert10(machine_config &config); - void mlg3(machine_config &config); void mbh50(machine_config &config); - void victhc90(machine_config &config); void hc7(machine_config &config); - void fstm1(machine_config &config); - void victhc95a(machine_config &config); - void hx34(machine_config &config); void gfc1080(machine_config &config); - void ax350(machine_config &config); void cpc51(machine_config &config); - void victhc95(machine_config &config); void ax150(machine_config &config); - void hx23f(machine_config &config); void phc28s(machine_config &config); void mlfx1(machine_config &config); void tadpc200(machine_config &config); void gsfc200(machine_config &config); - void hbf9pr(machine_config &config); void hx10d(machine_config &config); - void hx23(machine_config &config); - void tpp311(machine_config &config); - void hbf900(machine_config &config); - void y503iiir(machine_config &config); void expertdp(machine_config &config); void yis303(machine_config &config); - void nms8255f(machine_config &config); - void hbf9sp(machine_config &config); - void hbf700f(machine_config &config); - void hbg900ap(machine_config &config); void canonv25(machine_config &config); void svi738sp(machine_config &config); - void hbf900a(machine_config &config); void fmx(machine_config &config); void phc2(machine_config &config); void pv7(machine_config &config); @@ -272,82 +210,36 @@ public: void hx20i(machine_config &config); void mx10(machine_config &config); void mx15(machine_config &config); - void hbf700s(machine_config &config); void expert13(machine_config &config); - void hotbit20(machine_config &config); - void vg8235(machine_config &config); void bruc100(machine_config &config); - void hbf500p(machine_config &config); void hx21(machine_config &config); - void nms8250(machine_config &config); void cf3300(machine_config &config); void cx5f1(machine_config &config); - void hbf500(machine_config &config); - void fsa1f(machine_config &config); void hx10e(machine_config &config); void dpc200(machine_config &config); - void fsa1a(machine_config &config); - void hbf5(machine_config &config); - void hbf1xdm2(machine_config &config); - void cpc300e(machine_config &config); - void phc77(machine_config &config); void svi738(machine_config &config); void dpc200e(machine_config &config); - void mpc27(machine_config &config); - void mpc2500f(machine_config &config); void canonv10(machine_config &config); - void mpc2300(machine_config &config); - void nms8280g(machine_config &config); void yis503(machine_config &config); - void vg8230(machine_config &config); - void vg8235f(machine_config &config); void mpc200sp(machine_config &config); void svi738sw(machine_config &config); - void nms8280(machine_config &config); - void nms8260(machine_config &config); void vg8010f(machine_config &config); - void nms8250j(machine_config &config); - void nms8245(machine_config &config); - void fs5500f2(machine_config &config); void dpc180(machine_config &config); - void fs5500f1(machine_config &config); - void hbf500f(machine_config &config); - void vg8240(machine_config &config); void mlf120(machine_config &config); void hb201(machine_config &config); void piopxv60(machine_config &config); void hb10(machine_config &config); - void kmc5000(machine_config &config); - void fsa1fm(machine_config &config); - void fsa1mk2(machine_config &config); - void hbf9p(machine_config &config); void hb501p(machine_config &config); void cx5m(machine_config &config); - void phc35j(machine_config &config); - void fs4700(machine_config &config); void mx101(machine_config &config); void mx64(machine_config &config); void hb55d(machine_config &config); - void nms8280f(machine_config &config); - void nms8250f(machine_config &config); void nms801(machine_config &config); - void ax370(machine_config &config); void svi728(machine_config &config); - void expert20(machine_config &config); void hotbi13b(machine_config &config); - void mlg10(machine_config &config); - void cpc400s(machine_config &config); void hotbit12(machine_config &config); - void nms8220a(machine_config &config); - void mbh70(machine_config &config); - void mlg30(machine_config &config); - void fpc900(machine_config &config); void hotbit11(machine_config &config); - void y805128(machine_config &config); - void cpc400(machine_config &config); void vg8010(machine_config &config); - void hx34i(machine_config &config); - void canonv30f(machine_config &config); void cf2700(machine_config &config); void hx21i(machine_config &config); void mbh2(machine_config &config); @@ -364,7 +256,6 @@ public: void yis503f(machine_config &config); void cx5m2(machine_config &config); void spc800(machine_config &config); - void cpc330k(machine_config &config); void canonv20(machine_config &config); void hb20p(machine_config &config); void mbh25(machine_config &config); @@ -379,42 +270,27 @@ public: void phc28l(machine_config &config); void hb101p(machine_config &config); void expert11(machine_config &config); - void hbf9s(machine_config &config); void vg802020(machine_config &config); - void fsa1st(machine_config &config); - void hx33(machine_config &config); void tadpc20a(machine_config &config); void hb75p(machine_config &config); void piopx7(machine_config &config); - void fs4500(machine_config &config); void canonv8(machine_config &config); void cpc88(machine_config &config); void vg802000(machine_config &config); void mlf80(machine_config &config); void cpc50a(machine_config &config); void hb701fd(machine_config &config); - void canonv30(machine_config &config); void vg8000(machine_config &config); void hb55(machine_config &config); - void vg8230j(machine_config &config); - void mlg1(machine_config &config); - void cpg120(machine_config &config); void y503iir2(machine_config &config); void fpc500(machine_config &config); - void hbf700p(machine_config &config); +protected: void msx(machine_config &config); template<typename VDPType> void msx1(VDPType &vdp_type, machine_config &config); - void msx2(machine_config &config); - void msx2p(machine_config &config); - void msx2_pal(machine_config &config); void msx1_cartlist(machine_config &config); void msx1_floplist(machine_config &config); - void msx2_cartlist(machine_config &config); - void msx2_floplist(machine_config &config); - void msx2p_floplist(machine_config &config); - void msxr_floplist(machine_config &config); void msx_fd1793(machine_config &config); void msx_wd2793_force_ready(machine_config &config); void msx_wd2793(machine_config &config); @@ -424,16 +300,14 @@ public: void msx_1_35_ssdd_drive(machine_config &config); void msx_1_35_dd_drive(machine_config &config); void msx_2_35_dd_drive(machine_config &config); - void msx_ym2413(machine_config &config); - void msx2_64kb_vram(machine_config &config); -private: // static configuration helpers - static void install_slot_pages(device_t &owner, uint8_t prim, uint8_t sec, uint8_t page, uint8_t numpages, device_t *device); + void install_slot_pages(uint8_t prim, uint8_t sec, uint8_t page, uint8_t numpages, device_t *device); virtual void driver_start() override; virtual void machine_start() override; virtual void machine_reset() override; + virtual void device_post_load() override; DECLARE_WRITE8_MEMBER(msx_sec_slot_w); DECLARE_READ8_MEMBER(msx_sec_slot_r); @@ -442,49 +316,37 @@ private: DECLARE_WRITE8_MEMBER(msx_ppi_port_a_w); DECLARE_WRITE8_MEMBER(msx_ppi_port_c_w); DECLARE_READ8_MEMBER(msx_ppi_port_b_r); - DECLARE_READ8_MEMBER(msx_rtc_reg_r); - DECLARE_WRITE8_MEMBER(msx_rtc_reg_w); - DECLARE_WRITE8_MEMBER(msx_rtc_latch_w); DECLARE_READ8_MEMBER(msx_mem_read); DECLARE_WRITE8_MEMBER(msx_mem_write); - DECLARE_READ8_MEMBER(msx_switched_r); - DECLARE_WRITE8_MEMBER(msx_switched_w); - DECLARE_WRITE_LINE_MEMBER(turbo_w); + DECLARE_READ8_MEMBER(msx_psg_port_a_r); + DECLARE_READ8_MEMBER(msx_psg_port_b_r); + DECLARE_WRITE8_MEMBER(msx_psg_port_a_w); + DECLARE_WRITE8_MEMBER(msx_psg_port_b_w); +private: void msx_memory_map_all(); void msx_memory_map_page(uint8_t page); void msx_memory_reset(); + void msx_memory_init(); DECLARE_FLOPPY_FORMATS(floppy_formats); - DECLARE_READ8_MEMBER(msx_psg_port_a_r); - DECLARE_READ8_MEMBER(msx_psg_port_b_r); - DECLARE_WRITE8_MEMBER(msx_psg_port_a_w); - DECLARE_WRITE8_MEMBER(msx_psg_port_b_w); INTERRUPT_GEN_MEMBER(msx_interrupt); - DECLARE_WRITE8_MEMBER(msx_ay8910_w); - void msx_memory_init(); - void post_load(); +public: DECLARE_WRITE_LINE_MEMBER(msx_irq_source0) { msx_irq_source(0, state); } // usually tms9918/v9938/v9958 DECLARE_WRITE_LINE_MEMBER(msx_irq_source1) { msx_irq_source(1, state); } // usually first cartridge slot DECLARE_WRITE_LINE_MEMBER(msx_irq_source2) { msx_irq_source(2, state); } // usually second cartridge slot DECLARE_WRITE_LINE_MEMBER(msx_irq_source3) { msx_irq_source(3, state); } // sometimes expansion slot - std::vector<msx_switched_interface *> m_switched; - - void msx2_io_map(address_map &map); - void msx2p_io_map(address_map &map); +protected: void msx_io_map(address_map &map); void msx_memory_map(address_map &map); required_device<z80_device> m_maincpu; - optional_device<v9938_device> m_v9938; - optional_device<v9958_device> m_v9958; required_device<cassette_image_device> m_cassette; required_device<ay8910_device> m_ay8910; required_device<dac_bit_interface> m_dac; - optional_device<rp5c01_device> m_rtc; required_memory_region m_region_maincpu; optional_memory_region m_region_kanji; required_ioport m_io_joy0; @@ -495,13 +357,12 @@ private: required_ioport_array<6> m_io_key; output_finder<2> m_leds; +private: /* PSG */ int m_psg_b; /* mouse */ uint16_t m_mouse[2]; int m_mouse_stat[2]; - /* rtc */ - int m_rtc_latch; /* kanji */ int m_kanji_latch; /* memory */ @@ -521,4 +382,168 @@ private: }; +class msx2_state : public msx_state +{ +public: + msx2_state(const machine_config &mconfig, device_type type, const char *tag) + : msx_state(mconfig, type, tag) + , m_v9938(*this, "v9938") + , m_v9958(*this, "v9958") + , m_rtc(*this, TC8521_TAG) + , m_rtc_latch(0) + { + } + + void ax350(machine_config &config); + void ax370(machine_config &config); + void canonv25(machine_config &config); + void canonv30(machine_config &config); + void canonv30f(machine_config &config); + void cpc300(machine_config &config); + void cpc300e(machine_config &config); + void cpc330k(machine_config &config); + void cpc400(machine_config &config); + void cpc400s(machine_config &config); + void cpc61(machine_config &config); + void cpg120(machine_config &config); + void fpc900(machine_config &config); + void expert20(machine_config &config); + void mbh70(machine_config &config); + void kmc5000(machine_config &config); + void mlg1(machine_config &config); + void mlg3(machine_config &config); + void mlg10(machine_config &config); + void mlg30(machine_config &config); + void fs4500(machine_config &config); + void fs4600(machine_config &config); + void fs4700(machine_config &config); + void fs5000(machine_config &config); + void fs5500f1(machine_config &config); + void fs5500f2(machine_config &config); + void fsa1(machine_config &config); + void fsa1a(machine_config &config); + void fsa1f(machine_config &config); + void fsa1fm(machine_config &config); + void fsa1mk2(machine_config &config); + void nms8220(machine_config &config); + void nms8220a(machine_config &config); + void nms8245(machine_config &config); + void nms8245f(machine_config &config); + void nms8250(machine_config &config); + void nms8250f(machine_config &config); + void nms8250j(machine_config &config); + void nms8255(machine_config &config); + void nms8255f(machine_config &config); + void nms8260(machine_config &config); + void nms8280(machine_config &config); + void nms8280f(machine_config &config); + void nms8280g(machine_config &config); + void vg8230(machine_config &config); + void vg8230j(machine_config &config); + void vg8235(machine_config &config); + void vg8235f(machine_config &config); + void vg8240(machine_config &config); + void mpc2300(machine_config &config); + void mpc2500f(machine_config &config); + void mpc25fd(machine_config &config); + void mpc27(machine_config &config); + void phc23(machine_config &config); + void phc55fd2(machine_config &config); + void phc77(machine_config &config); + void hotbit20(machine_config &config); + void hbf1(machine_config &config); + void hbf12(machine_config &config); + void hbf1xd(machine_config &config); + void hbf1xdm2(machine_config &config); + void hbf5(machine_config &config); + void hbf500(machine_config &config); + void hbf500f(machine_config &config); + void hbf500p(machine_config &config); + void hbf700d(machine_config &config); + void hbf700f(machine_config &config); + void hbf700p(machine_config &config); + void hbf700s(machine_config &config); + void hbf900(machine_config &config); + void hbf900a(machine_config &config); + void hbf9p(machine_config &config); + void hbf9pr(machine_config &config); + void hbf9s(machine_config &config); + void hbg900ap(machine_config &config); + void hbg900p(machine_config &config); + void tpc310(machine_config &config); + void tpp311(machine_config &config); + void tps312(machine_config &config); + void hx23(machine_config &config); + void hx23f(machine_config &config); + void hx23i(machine_config &config); + void hx33(machine_config &config); + void hx34(machine_config &config); + void hx34i(machine_config &config); + void fstm1(machine_config &config); + void victhc90(machine_config &config); + void victhc95(machine_config &config); + void victhc95a(machine_config &config); + void cx7m(machine_config &config); + void cx7m128(machine_config &config); + void y503iiir(machine_config &config); + void y503iiire(machine_config &config); + void yis60464(machine_config &config); + void yis604(machine_config &config); + void y805128(machine_config &config); + void y805128r2(machine_config &config); + void y805128r2e(machine_config &config); + void y805256(machine_config &config); + void expert3i(machine_config &config); + void expert3t(machine_config &config); + void expertac(machine_config &config); + void expertdx(machine_config &config); + void fsa1fx(machine_config &config); + void fsa1wsx(machine_config &config); + void fsa1wx(machine_config &config); + void fsa1wxa(machine_config &config); + void phc35j(machine_config &config); + void phc70fd(machine_config &config); + void phc70fd2(machine_config &config); + void hbf1xdj(machine_config &config); + void hbf1xv(machine_config &config); + void hbf9sp(machine_config &config); + void fsa1gt(machine_config &config); + void fsa1st(machine_config &config); + +protected: + virtual void machine_start() override; + +private: + void msx2(machine_config &config); + void msx2p(machine_config &config); + void msx2_pal(machine_config &config); + + void msx2_cartlist(machine_config &config); + void msx2_floplist(machine_config &config); + void msx2p_floplist(machine_config &config); + void msxr_floplist(machine_config &config); + void msx_ym2413(machine_config &config); + void msx2_64kb_vram(machine_config &config); + + DECLARE_READ8_MEMBER(msx_rtc_reg_r); + DECLARE_WRITE8_MEMBER(msx_rtc_reg_w); + DECLARE_WRITE8_MEMBER(msx_rtc_latch_w); + DECLARE_READ8_MEMBER(msx_switched_r); + DECLARE_WRITE8_MEMBER(msx_switched_w); + DECLARE_WRITE_LINE_MEMBER(turbo_w); + + void msx2_io_map(address_map &map); + void msx2p_io_map(address_map &map); + + std::vector<msx_switched_interface *> m_switched; + + optional_device<v9938_device> m_v9938; + optional_device<v9958_device> m_v9958; + required_device<rp5c01_device> m_rtc; + + /* rtc */ + int m_rtc_latch; +}; + + #endif // MAME_INCLUDES_MSX_H diff --git a/src/mame/includes/namcofl.h b/src/mame/includes/namcofl.h index 73fd7ec6a6f..1f9bce51306 100644 --- a/src/mame/includes/namcofl.h +++ b/src/mame/includes/namcofl.h @@ -7,21 +7,14 @@ #include "video/namco_c116.h" #include "video/namco_c169roz.h" #include "video/namco_c355spr.h" +#include "emupal.h" #define NAMCOFL_HTOTAL (288) /* wrong */ #define NAMCOFL_HBSTART (288) #define NAMCOFL_VTOTAL (262) /* needs to be checked */ #define NAMCOFL_VBSTART (224) -#define NAMCOFL_TILEMASKREGION "tilemask" -#define NAMCOFL_TILEGFXREGION "tile" -#define NAMCOFL_SPRITEGFXREGION "sprite" -#define NAMCOFL_ROTMASKREGION "rotmask" -#define NAMCOFL_ROTGFXREGION "rot" - -#define NAMCOFL_TILEGFX 0 -#define NAMCOFL_SPRITEGFX 1 -#define NAMCOFL_ROTGFX 2 +#define NAMCOFL_SPRITEGFX 0 class namcofl_state : public driver_device { @@ -29,7 +22,6 @@ public: namcofl_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), - m_palette(*this, "palette"), m_c116(*this, "c116"), m_screen(*this, "screen"), m_c123tmap(*this, "c123tmap"), @@ -52,13 +44,12 @@ public: private: required_device<cpu_device> m_maincpu; - required_device<palette_device> m_palette; required_device<namco_c116_device> m_c116; required_device<screen_device> m_screen; - required_device<namco_c123tmap_device> m_c123tmap; - required_device<namco_c169roz_device> m_c169roz; - required_device<namco_c355spr_device> m_c355spr; - required_device<cpu_device> m_mcu; + required_device<namco_c123tmap_device> m_c123tmap; + required_device<namco_c169roz_device> m_c169roz; + required_device<namco_c355spr_device> m_c355spr; + required_device<cpu_device> m_mcu; required_ioport m_in0; required_ioport m_in1; required_ioport m_in2; diff --git a/src/mame/includes/namconb1.h b/src/mame/includes/namconb1.h index 00892bb7fa3..07fc4f29eac 100644 --- a/src/mame/includes/namconb1.h +++ b/src/mame/includes/namconb1.h @@ -14,20 +14,7 @@ #include "video/namco_c123tmap.h" #include "video/namco_c169roz.h" -#define NAMCONB1_HTOTAL (288) /* wrong */ -#define NAMCONB1_HBSTART (288) -#define NAMCONB1_VTOTAL (262) /* needs to be checked */ -#define NAMCONB1_VBSTART (224) - -#define NAMCONB1_TILEMASKREGION "tilemask" -#define NAMCONB1_TILEGFXREGION "tile" -#define NAMCONB1_SPRITEGFXREGION "sprite" -#define NAMCONB1_ROTMASKREGION "rotmask" -#define NAMCONB1_ROTGFXREGION "rot" - -#define NAMCONB1_TILEGFX 0 -#define NAMCONB1_SPRITEGFX 1 -#define NAMCONB1_ROTGFX 2 +#define NAMCONB1_SPRITEGFX 0 @@ -38,7 +25,6 @@ public: driver_device(mconfig, type, tag), m_gametype(0), m_maincpu(*this, "maincpu"), - m_palette(*this, "palette"), m_c116(*this, "c116"), m_c123tmap(*this, "c123tmap"), m_c355spr(*this, "c355spr"), @@ -96,13 +82,12 @@ private: }; required_device<cpu_device> m_maincpu; - required_device<palette_device> m_palette; required_device<namco_c116_device> m_c116; - required_device<namco_c123tmap_device> m_c123tmap; - required_device<namco_c355spr_device> m_c355spr; + required_device<namco_c123tmap_device> m_c123tmap; + required_device<namco_c355spr_device> m_c355spr; optional_device<namco_c169roz_device> m_c169roz; // NB1 only, not NA1 required_device<screen_device> m_screen; - required_device<cpu_device> m_mcu; + required_device<cpu_device> m_mcu; required_device<eeprom_parallel_28xx_device> m_eeprom; required_ioport m_p1; required_ioport m_p2; diff --git a/src/mame/includes/namcos1.h b/src/mame/includes/namcos1.h index 79fc9d1922a..a8932a1d298 100644 --- a/src/mame/includes/namcos1.h +++ b/src/mame/includes/namcos1.h @@ -6,7 +6,6 @@ #include "sound/namco.h" #include "video/namco_c116.h" #include "machine/74157.h" -#include "emupal.h" class namcos1_state : public driver_device { @@ -22,12 +21,12 @@ public: m_dac0(*this, "dac0"), m_dac1(*this, "dac1"), m_gfxdecode(*this, "gfxdecode"), - m_palette(*this, "palette"), m_videoram(*this, "videoram"), m_spriteram(*this, "spriteram"), m_playfield_control(*this, "pfcontrol"), m_triram(*this, "triram"), m_rom(*this, "user1"), + m_tilemap_maskdata(*this, "tmap_mask"), m_soundbank(*this, "soundbank"), m_mcubank(*this, "mcubank"), m_io_dipsw(*this, "DIPSW"), @@ -70,13 +69,13 @@ private: required_device<dac_8bit_r2r_device> m_dac0; required_device<dac_8bit_r2r_device> m_dac1; required_device<gfxdecode_device> m_gfxdecode; - required_device<palette_device> m_palette; required_shared_ptr<uint8_t> m_videoram; required_shared_ptr<uint8_t> m_spriteram; required_shared_ptr<uint8_t> m_playfield_control; required_shared_ptr<uint8_t> m_triram; required_region_ptr<uint8_t> m_rom; + required_region_ptr<uint8_t> m_tilemap_maskdata; required_memory_bank m_soundbank; required_memory_bank m_mcubank; @@ -102,7 +101,6 @@ private: int m_strobe_count; int m_stored_input[2]; tilemap_t *m_bg_tilemap[6]; - uint8_t *m_tilemap_maskdata; int m_copy_sprites; uint8_t m_drawmode_table[16]; @@ -135,12 +133,7 @@ private: virtual void video_start() override; void driver_init() override; - TILE_GET_INFO_MEMBER(bg_get_info0); - TILE_GET_INFO_MEMBER(bg_get_info1); - TILE_GET_INFO_MEMBER(bg_get_info2); - TILE_GET_INFO_MEMBER(bg_get_info3); - TILE_GET_INFO_MEMBER(fg_get_info4); - TILE_GET_INFO_MEMBER(fg_get_info5); + template <int Offset> TILE_GET_INFO_MEMBER(get_tile_info); void draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); @@ -152,6 +145,4 @@ private: void sound_map(address_map &map); void sub_map(address_map &map); void virtual_map(address_map &map); - - inline void get_tile_info(tile_data &tileinfo,int tile_index,uint8_t *info_vram); }; diff --git a/src/mame/includes/namcos2.h b/src/mame/includes/namcos2.h index f3e3b138d4a..f2bac3e842a 100644 --- a/src/mame/includes/namcos2.h +++ b/src/mame/includes/namcos2.h @@ -25,7 +25,6 @@ #include "video/namco_c123tmap.h" #include "video/namcos2_sprite.h" #include "video/namcos2_roz.h" -#include "emupal.h" #include "screen.h" /*********************************************/ @@ -53,7 +52,6 @@ public: m_sci(*this, "sci"), m_c169roz(*this, "c169roz"), m_c355spr(*this, "c355spr"), - m_palette(*this, "palette"), m_gfxdecode(*this, "gfxdecode"), m_screen(*this, "screen"), m_audiobank(*this, "audiobank"), @@ -163,22 +161,21 @@ enum int m_gametype; required_device<cpu_device> m_maincpu; - optional_device<cpu_device> m_slave; - optional_device<cpu_device> m_audiocpu; + required_device<cpu_device> m_slave; + required_device<cpu_device> m_audiocpu; optional_device<namcoc65_device> m_c65; optional_device<namcoc68_device> m_c68; - optional_device<c140_device> m_c140; - optional_device<namco_c116_device> m_c116; - optional_device<namco_c123tmap_device> m_c123tmap; - optional_device<namco_c148_device> m_master_intc; - optional_device<namco_c148_device> m_slave_intc; - optional_device<namco_c139_device> m_sci; - optional_device<namco_c169roz_device> m_c169roz; - optional_device<namco_c355spr_device> m_c355spr; - required_device<palette_device> m_palette; + required_device<c140_device> m_c140; + required_device<namco_c116_device> m_c116; + required_device<namco_c123tmap_device> m_c123tmap; + required_device<namco_c148_device> m_master_intc; + required_device<namco_c148_device> m_slave_intc; + required_device<namco_c139_device> m_sci; + optional_device<namco_c169roz_device> m_c169roz; + optional_device<namco_c355spr_device> m_c355spr; optional_device<gfxdecode_device> m_gfxdecode; - optional_device<screen_device> m_screen; - optional_memory_bank m_audiobank; + required_device<screen_device> m_screen; + required_memory_bank m_audiobank; std::unique_ptr<uint8_t[]> m_eeprom; @@ -187,18 +184,16 @@ enum DECLARE_READ8_MEMBER(dpram_byte_r); DECLARE_WRITE8_MEMBER(dpram_byte_w); - DECLARE_WRITE8_MEMBER( namcos2_68k_eeprom_w ); - DECLARE_READ8_MEMBER( namcos2_68k_eeprom_r ); + DECLARE_WRITE8_MEMBER(eeprom_w); + DECLARE_READ8_MEMBER(eeprom_r); - DECLARE_WRITE8_MEMBER( namcos2_sound_bankselect_w ); + DECLARE_WRITE8_MEMBER(sound_bankselect_w); DECLARE_WRITE8_MEMBER(sound_reset_w); DECLARE_WRITE8_MEMBER(system_reset_w); void reset_all_subcpus(int state); virtual void video_start() override; - void video_start_finallap(); - void video_start_finalap2(); void video_start_luckywld(); void video_start_metlhawk(); void video_start_sgunner(); @@ -214,8 +209,8 @@ enum DECLARE_READ16_MEMBER( gfx_ctrl_r ); DECLARE_WRITE16_MEMBER( gfx_ctrl_w ); - DECLARE_MACHINE_START(namcos2); - DECLARE_MACHINE_RESET(namcos2); + virtual void machine_start() override; + virtual void machine_reset() override; void create_shadow_table(); void apply_clip( rectangle &clip, const rectangle &cliprect ); @@ -231,8 +226,8 @@ enum int m_sendval; optional_device<namco_c45_road_device> m_c45_road; - optional_device<namcos2_sprite_device> m_ns2sprite; - optional_device<namcos2_roz_device> m_ns2roz; + optional_device<namcos2_sprite_device> m_ns2sprite; + optional_device<namcos2_roz_device> m_ns2roz; DECLARE_READ16_MEMBER( namcos2_68k_key_r ); DECLARE_WRITE16_MEMBER( namcos2_68k_key_w ); @@ -282,16 +277,4 @@ enum #define NAMCOS2_C148_SERIRQ 6 /* 0x1cc000 */ #define NAMCOS2_C148_VBLANKIRQ 7 /* 0x1ce000 */ -/**************************************************************/ -/* MASTER CPU RAM MEMORY */ -/**************************************************************/ - -#define NAMCOS2_68K_MASTER_RAM "bank3" - -/**************************************************************/ -/* SLAVE CPU RAM MEMORY */ -/**************************************************************/ - -#define NAMCOS2_68K_SLAVE_RAM "bank4" - #endif // MAME_INCLUDES_NAMCOS2_H diff --git a/src/mame/includes/namcos21.h b/src/mame/includes/namcos21.h deleted file mode 100644 index 5e4db1e258a..00000000000 --- a/src/mame/includes/namcos21.h +++ /dev/null @@ -1,305 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Phil Stroffolino -/** - * @file namcos21.h - */ -#ifndef MAME_INCLUDES_NAMCOS21_H -#define MAME_INCLUDES_NAMCOS21_H - -#pragma once - - -#include "machine/namcoio_gearbox.h" -#include "machine/timer.h" -#include "machine/namco_c139.h" -#include "machine/namco_c148.h" -#include "machine/timer.h" -#include "sound/c140.h" -#include "video/c45.h" -#include "machine/namco65.h" -#include "machine/namco68.h" -#include "video/namco_c355spr.h" -#include "video/namcos2_sprite.h" -#include "video/namcos2_roz.h" - - -#define NAMCOS21_POLY_FRAME_WIDTH 496 -#define NAMCOS21_POLY_FRAME_HEIGHT 480 - -#define WINRUN_MAX_POLY_PARAM (1+256*3) - -#define NAMCOS21_NUM_COLORS 0x8000 - -#define DSP_BUF_MAX (4096*12) -struct dsp_state -{ - unsigned masterSourceAddr; - uint16_t slaveInputBuffer[DSP_BUF_MAX]; - unsigned slaveBytesAvailable; - unsigned slaveBytesAdvertised; - unsigned slaveInputStart; - uint16_t slaveOutputBuffer[DSP_BUF_MAX]; - unsigned slaveOutputSize; - uint16_t masterDirectDrawBuffer[256]; - unsigned masterDirectDrawSize; - int masterFinished; - int slaveActive; -}; - -struct n21_vertex -{ - double x,y; - double z; -}; - -struct edge -{ - double x; - double z; -}; - - -class namcos21_state : public driver_device -{ -public: - enum - { /* Namco System21 */ - NAMCOS21_AIRCOMBAT = 0x4000, - NAMCOS21_STARBLADE, - NAMCOS21_CYBERSLED, - NAMCOS21_SOLVALOU, - NAMCOS21_WINRUN91, - NAMCOS21_DRIVERS_EYES, - }; - - namcos21_state(const machine_config &mconfig, device_type type, const char *tag) : - driver_device(mconfig, type, tag), - m_master_dsp_code(*this,"master_dsp_code"), - m_gametype(0), - m_dspmaster(*this, "dspmaster"), - m_dspslave(*this, "dspslave"), - m_maincpu(*this, "maincpu"), - m_audiocpu(*this, "audiocpu"), - m_slave(*this, "slave"), - m_c65(*this, "c65mcu"), - m_c68(*this, "c68mcu"), - m_sci(*this, "sci"), - m_master_intc(*this, "master_intc"), - m_slave_intc(*this, "slave_intc"), - m_c140(*this, "c140"), - m_c355spr(*this, "c355spr"), - m_palette(*this, "palette"), - m_screen(*this, "screen"), - m_audiobank(*this, "audiobank"), - m_winrun_dspbios(*this,"winrun_dspbios"), - m_winrun_polydata(*this,"winrun_polydata"), - m_dspram16(*this,"dspram16"), - m_mpDualPortRAM(*this,"mpdualportram"), - m_ptrom24(*this,"point24"), - m_ptrom16(*this,"point16"), - m_dsp(*this, "dsp"), - m_io_gearbox(*this, "gearbox"), - m_gpu_intc(*this, "gpu_intc") - { } - - void configure_c148_standard(machine_config &config); - void driveyes(machine_config &config); - void winrun(machine_config &config); - void namcos21(machine_config &config); - - void init_driveyes(); - void init_winrun(); - void init_starblad(); - void init_solvalou(); - void init_cybsled(); - void init_aircomb(); - - optional_shared_ptr<uint16_t> m_master_dsp_code; - int m_mbNeedsKickstart; - void clear_poly_framebuffer(); - std::unique_ptr<dsp_state> m_mpDspState; - - int m_gametype; - - optional_device<cpu_device> m_dspmaster; - optional_device<cpu_device> m_dspslave; - -private: - required_device<cpu_device> m_maincpu; - optional_device<cpu_device> m_audiocpu; - optional_device<cpu_device> m_slave; - optional_device<namcoc65_device> m_c65; - optional_device<namcoc68_device> m_c68; - optional_device<namco_c139_device> m_sci; - optional_device<namco_c148_device> m_master_intc; - optional_device<namco_c148_device> m_slave_intc; - optional_device<c140_device> m_c140; - optional_device<namco_c355spr_device> m_c355spr; - required_device<palette_device> m_palette; - - optional_device<screen_device> m_screen; - optional_memory_bank m_audiobank; - - optional_shared_ptr<uint16_t> m_winrun_dspbios; - optional_shared_ptr<uint16_t> m_winrun_polydata; - optional_shared_ptr<uint16_t> m_dspram16; - required_shared_ptr<uint8_t> m_mpDualPortRAM; - - optional_region_ptr<int32_t> m_ptrom24; - optional_region_ptr<uint16_t> m_ptrom16; - - optional_device<cpu_device> m_dsp; - optional_device<namcoio_gearbox_device> m_io_gearbox; - optional_device<namco_c148_device> m_gpu_intc; - - std::unique_ptr<uint8_t[]> m_videoram; - std::unique_ptr<uint8_t[]> m_maskram; - std::unique_ptr<uint16_t[]> m_winrun_dspcomram; - uint16_t m_winrun_poly_buf[WINRUN_MAX_POLY_PARAM]; - int m_winrun_poly_index; - uint32_t m_winrun_pointrom_addr; - int m_winrun_dsp_alive; - uint16_t m_winrun_dspcomram_control[8]; - uint16_t m_video_enable; - std::unique_ptr<uint8_t[]> m_pointram; - int m_pointram_idx; - uint16_t m_pointram_control; - uint32_t m_pointrom_idx; - uint8_t m_mPointRomMSB; - int m_mbPointRomDataAvailable; - int m_irq_enable; - uint8_t m_depthcue[2][0x400]; - std::unique_ptr<uint16_t[]> m_mpPolyFrameBufferPens; - std::unique_ptr<uint16_t[]> m_mpPolyFrameBufferZ; - std::unique_ptr<uint16_t[]> m_mpPolyFrameBufferPens2; - std::unique_ptr<uint16_t[]> m_mpPolyFrameBufferZ2; - uint16_t m_winrun_color; - uint16_t m_winrun_gpu_register[0x10/2]; - DECLARE_READ16_MEMBER(namcos21_video_enable_r); - DECLARE_WRITE16_MEMBER(namcos21_video_enable_w); - DECLARE_WRITE16_MEMBER(dspcuskey_w); - DECLARE_READ16_MEMBER(dspcuskey_r); - DECLARE_READ16_MEMBER(dspram16_r); - template<bool maincpu> DECLARE_WRITE16_MEMBER(dspram16_w); - DECLARE_READ16_MEMBER(dsp_port0_r); - DECLARE_WRITE16_MEMBER(dsp_port0_w); - DECLARE_READ16_MEMBER(dsp_port1_r); - DECLARE_WRITE16_MEMBER(dsp_port1_w); - DECLARE_READ16_MEMBER(dsp_port2_r); - DECLARE_WRITE16_MEMBER(dsp_port2_w); - DECLARE_READ16_MEMBER(dsp_port3_idc_rcv_enable_r); - DECLARE_WRITE16_MEMBER(dsp_port3_w); - DECLARE_WRITE16_MEMBER(dsp_port4_w); - DECLARE_READ16_MEMBER(dsp_port8_r); - DECLARE_WRITE16_MEMBER(dsp_port8_w); - DECLARE_READ16_MEMBER(dsp_port9_r); - DECLARE_READ16_MEMBER(dsp_porta_r); - DECLARE_WRITE16_MEMBER(dsp_porta_w); - DECLARE_READ16_MEMBER(dsp_portb_r); - DECLARE_WRITE16_MEMBER(dsp_portb_w); - DECLARE_WRITE16_MEMBER(dsp_portc_w); - DECLARE_READ16_MEMBER(dsp_portf_r); - DECLARE_WRITE16_MEMBER(dsp_xf_w); - DECLARE_READ16_MEMBER(slave_port0_r); - DECLARE_WRITE16_MEMBER(slave_port0_w); - DECLARE_READ16_MEMBER(slave_port2_r); - DECLARE_READ16_MEMBER(slave_port3_r); - DECLARE_WRITE16_MEMBER(slave_port3_w); - DECLARE_WRITE16_MEMBER(slave_XF_output_w); - DECLARE_READ16_MEMBER(slave_portf_r); - DECLARE_WRITE16_MEMBER(pointram_control_w); - DECLARE_READ16_MEMBER(pointram_data_r); - DECLARE_WRITE16_MEMBER(pointram_data_w); - DECLARE_READ16_MEMBER(namcos21_depthcue_r); - DECLARE_WRITE16_MEMBER(namcos21_depthcue_w); - DECLARE_READ16_MEMBER(namcos2_68k_dualportram_word_r); - DECLARE_WRITE16_MEMBER(namcos2_68k_dualportram_word_w); - DECLARE_READ8_MEMBER(namcos2_dualportram_byte_r); - DECLARE_WRITE8_MEMBER(namcos2_dualportram_byte_w); - DECLARE_READ16_MEMBER(winrun_dspcomram_r); - DECLARE_WRITE16_MEMBER(winrun_dspcomram_w); - DECLARE_READ16_MEMBER(winrun_cuskey_r); - DECLARE_WRITE16_MEMBER(winrun_cuskey_w); - DECLARE_READ16_MEMBER(winrun_poly_reset_r); - DECLARE_WRITE16_MEMBER(winrun_dsp_render_w); - DECLARE_WRITE16_MEMBER(winrun_dsp_pointrom_addr_w); - DECLARE_READ16_MEMBER(winrun_dsp_pointrom_data_r); - DECLARE_WRITE16_MEMBER(winrun_dsp_complete_w); - DECLARE_READ16_MEMBER(winrun_table_r); - DECLARE_WRITE16_MEMBER(winrun_dspbios_w); - DECLARE_READ16_MEMBER(winrun_68k_dspcomram_r); - DECLARE_WRITE16_MEMBER(winrun_68k_dspcomram_w); - DECLARE_READ16_MEMBER(winrun_dspcomram_control_r); - DECLARE_WRITE16_MEMBER(winrun_dspcomram_control_w); - DECLARE_READ16_MEMBER(winrun_gpu_color_r); - DECLARE_WRITE16_MEMBER(winrun_gpu_color_w); - DECLARE_READ16_MEMBER(winrun_gpu_register_r); - DECLARE_WRITE16_MEMBER(winrun_gpu_register_w); - DECLARE_WRITE16_MEMBER(winrun_gpu_videoram_w); - DECLARE_READ16_MEMBER(winrun_gpu_videoram_r); - - DECLARE_WRITE8_MEMBER( namcos2_68k_eeprom_w ); - DECLARE_READ8_MEMBER( namcos2_68k_eeprom_r ); - - DECLARE_WRITE8_MEMBER( namcos2_sound_bankselect_w ); - - DECLARE_WRITE8_MEMBER(sound_reset_w); - DECLARE_WRITE8_MEMBER(system_reset_w); - void reset_all_subcpus(int state); - - // game type helpers - bool is_system21(); - - std::unique_ptr<uint8_t[]> m_eeprom; - - TIMER_DEVICE_CALLBACK_MEMBER(screen_scanline); - - uint8_t m_gearbox_state; - DECLARE_CUSTOM_INPUT_MEMBER(driveyes_gearbox_r); - - DECLARE_MACHINE_START(namcos21); - DECLARE_MACHINE_RESET(namcos21); - DECLARE_VIDEO_START(namcos21); - uint32_t screen_update_namcos21(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_winrun(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_driveyes(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - void allocate_poly_framebuffer(); - void copy_visible_poly_framebuffer(bitmap_ind16 &bitmap, const rectangle &clip, int zlo, int zhi); - void winrun_bitmap_draw(bitmap_ind16 &bitmap, const rectangle &cliprect); - void renderscanline_flat(const edge *e1, const edge *e2, int sy, unsigned color, int depthcueenable); - void rendertri(const n21_vertex *v0, const n21_vertex *v1, const n21_vertex *v2, unsigned color, int depthcueenable); - void draw_quad(int sx[4], int sy[4], int zcode[4], int color); - int32_t read_pointrom_data(unsigned offset); - void transmit_word_to_slave(uint16_t data); - void transfer_dsp_data(); - uint16_t read_word_from_slave_input(); - uint16_t get_input_bytes_advertised_for_slave(); - int init_dsp(); - void render_slave_output(uint16_t data); - void winrun_flush_poly(); - void init(int game_type); - void configure_c65_namcos21(machine_config &config); - void configure_c68_namcos21(machine_config &config); - void common_map(address_map &map); - void driveyes_common_map(address_map &map); - void driveyes_master_map(address_map &map); - void driveyes_slave_map(address_map &map); - void master_dsp_data(address_map &map); - void master_dsp_io(address_map &map); - void master_dsp_program(address_map &map); - void master_map(address_map &map); - void mcu_map(address_map &map); - void slave_dsp_data(address_map &map); - void slave_dsp_io(address_map &map); - void slave_dsp_program(address_map &map); - void slave_map(address_map &map); - void sound_map(address_map &map); - void winrun_dsp_data(address_map &map); - void winrun_dsp_io(address_map &map); - void winrun_dsp_program(address_map &map); - void winrun_gpu_map(address_map &map); - void winrun_master_map(address_map &map); - void winrun_slave_map(address_map &map); -}; - -#endif // MAME_INCLUDES_NAMCOS21_H diff --git a/src/mame/includes/namcos22.h b/src/mame/includes/namcos22.h index f679d498399..335e3aa89dd 100644 --- a/src/mame/includes/namcos22.h +++ b/src/mame/includes/namcos22.h @@ -2,10 +2,15 @@ // copyright-holders:Phil Stroffolino, hap, R. Belmont /*************************************************************************** - Namco System 22 / Super System 22 hardware + Namco System22 / System Super22 hardware ***************************************************************************/ +#ifndef MAME_INCLUDES_NAMCOS22_H +#define MAME_INCLUDES_NAMCOS22_H + +#pragma once + #include "machine/eeprompar.h" #include "machine/timer.h" #include "video/rgbutil.h" @@ -78,7 +83,9 @@ struct namcos22_scenenode struct { - int tile, color, pri; + int tile, color; + int prioverchar; + int fade_enabled; int flipx, flipy; int linktype; int cols, rows; @@ -112,10 +119,10 @@ struct namcos22_object_data int zfog_enabled; int cz_adjust; int cz_sdelta; - const uint8_t *czram; + const u8 *czram; /* sprites */ - const uint8_t *source; + const u8 *source; int alpha; int line_modulo; int flipx; @@ -131,9 +138,9 @@ public: namcos22_renderer(namcos22_state &state); void render_scene(screen_device &screen, bitmap_rgb32 &bitmap); - struct namcos22_scenenode *new_scenenode(running_machine &machine, uint32_t zsort, namcos22_scenenode_type type); + struct namcos22_scenenode *new_scenenode(running_machine &machine, u32 zsort, namcos22_scenenode_type type); - void reset(); + void init(); private: namcos22_state &m_state; @@ -145,13 +152,13 @@ private: int m_clipy; rectangle m_cliprect; - inline uint8_t nthbyte(const uint32_t *src, int n) { return (src[n / 4] << ((n & 3) * 8)) >> 24; } - inline uint16_t nthword(const uint32_t *src, int n) { return (src[n / 2] << ((n & 1) * 16)) >> 16; } + inline u8 nthbyte(const u32 *src, int n) { return (src[n / 4] << ((n & 3) * 8)) >> 24; } + inline u16 nthword(const u32 *src, int n) { return (src[n / 2] << ((n & 1) * 16)) >> 16; } void render_scene_nodes(screen_device &screen, bitmap_rgb32 &bitmap, struct namcos22_scenenode *node); void render_sprite(screen_device &screen, bitmap_rgb32 &bitmap, struct namcos22_scenenode *node); void poly3d_drawquad(screen_device &screen, bitmap_rgb32 &bitmap, struct namcos22_scenenode *node); - void poly3d_drawsprite(screen_device &screen, bitmap_rgb32 &dest_bmp, uint32_t code, uint32_t color, int flipx, int flipy, int sx, int sy, int scalex, int scaley, int cz_factor, int prioverchar, int alpha); + void poly3d_drawsprite(screen_device &screen, bitmap_rgb32 &dest_bmp, u32 code, u32 color, int flipx, int flipy, int sx, int sy, int scalex, int scaley, int cz_factor, int prioverchar, int fade_enabled, int alpha); void free_scenenode(struct namcos22_scenenode *node); struct namcos22_scenenode *alloc_scenenode(running_machine &machine, struct namcos22_scenenode *node); @@ -174,41 +181,39 @@ enum namcos22_dsp_upload_state class namcos22_state : public driver_device { public: - namcos22_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_palette(*this, "palette") - , m_czram(*this, "czram") - , m_czattr(*this, "czattr") - , m_spriteram(*this, "spriteram") - , m_gfxdecode(*this, "gfxdecode") - , m_maincpu(*this, "maincpu") - , m_master(*this, "master") - , m_slave(*this, "slave") - , m_mcu(*this, "mcu") - , m_iomcu(*this, "iomcu") - , m_shareram(*this, "shareram") - , m_eeprom(*this, "eeprom") - , m_pSlaveExternalRAM(*this, "slaveextram") - , m_pMasterExternalRAM(*this, "masterextram") - , m_paletteram(*this, "paletteram") - , m_cgram(*this, "cgram") - , m_textram(*this, "textram") - , m_polygonram(*this, "polygonram") - , m_mixer(*this, "video_mixer") - , m_gamma_proms(*this, "gamma_proms") - , m_vics_data(*this, "vics_data") - , m_vics_control(*this, "vics_control") - , m_tilemapattr(*this, "tilemapattr") - , m_motor_timer(*this, "motor_timer") - , m_pc_pedal_interrupt(*this, "pc_p_int") - , m_screen(*this, "screen") - , m_adc_ports(*this, "ADC.%u", 0) - , m_p1(*this, "P1") - , m_p2(*this, "P2") - , m_mcup5a(*this, "MCUP5A") - , m_mcup5b(*this, "MCUP5B") - , m_led(*this, "led") - , m_cpuled(*this, "cpuled%u", 0U) + namcos22_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_palette(*this, "palette"), + m_czram(*this, "czram"), + m_spriteram(*this, "spriteram"), + m_gfxdecode(*this, "gfxdecode"), + m_maincpu(*this, "maincpu"), + m_master(*this, "master"), + m_slave(*this, "slave"), + m_mcu(*this, "mcu"), + m_iomcu(*this, "iomcu"), + m_shareram(*this, "shareram"), + m_eeprom(*this, "eeprom"), + m_slave_extram(*this, "slaveextram"), + m_master_extram(*this, "masterextram"), + m_paletteram(*this, "paletteram"), + m_cgram(*this, "cgram"), + m_textram(*this, "textram"), + m_polygonram(*this, "polygonram"), + m_mixer(*this, "video_mixer"), + m_gamma_proms(*this, "gamma_proms"), + m_vics_data(*this, "vics_data"), + m_vics_control(*this, "vics_control"), + m_motor_timer(*this, "motor_timer"), + m_pc_pedal_interrupt(*this, "pc_p_int"), + m_screen(*this, "screen"), + m_adc_ports(*this, "ADC.%u", 0), + m_p1(*this, "P1"), + m_p2(*this, "P2"), + m_mcup5a(*this, "MCUP5A"), + m_mcup5b(*this, "MCUP5B"), + m_led(*this, "led"), + m_cpuled(*this, "cpuled%u", 0U) { } void namcos22s(machine_config &config); @@ -246,10 +251,10 @@ public: // renderer int m_poly_translucency; - uint16_t *m_texture_tilemap; - std::unique_ptr<uint8_t[]> m_texture_tileattr; - uint8_t *m_texture_tiledata; - std::unique_ptr<uint8_t[]> m_texture_ayx_to_pixel; + u16 *m_texture_tilemap; + std::unique_ptr<u8[]> m_texture_tileattr; + u8 *m_texture_tiledata; + std::unique_ptr<u8[]> m_texture_ayx_to_pixel; int m_is_ss22; int m_mixer_flags; int m_screen_fade_factor; @@ -260,31 +265,39 @@ public: int m_poly_fade_r; int m_poly_fade_g; int m_poly_fade_b; - uint32_t m_fog_colormask; + u32 m_fog_colormask; int m_fog_r; int m_fog_g; int m_fog_b; - std::unique_ptr<uint8_t[]> m_recalc_czram[4]; + std::unique_ptr<u8[]> m_recalc_czram[4]; int m_fog_r_per_cztype[4]; int m_fog_g_per_cztype[4]; int m_fog_b_per_cztype[4]; + u16 m_czattr[8]; required_device<palette_device> m_palette; - optional_shared_ptr<uint32_t> m_czram; - optional_shared_ptr<uint32_t> m_czattr; - optional_shared_ptr<uint32_t> m_spriteram; + optional_shared_ptr<u32> m_czram; + optional_shared_ptr<u32> m_spriteram; required_device<gfxdecode_device> m_gfxdecode; +protected: + virtual void machine_reset() override; + virtual void machine_start() override; + virtual void video_start() override; + virtual void device_post_load() override; + private: + DECLARE_WRITE16_MEMBER(namcos22s_czattr_w); + DECLARE_READ16_MEMBER(namcos22s_czattr_r); DECLARE_WRITE32_MEMBER(namcos22s_czram_w); DECLARE_READ32_MEMBER(namcos22s_czram_r); DECLARE_READ32_MEMBER(namcos22s_vics_control_r); DECLARE_WRITE32_MEMBER(namcos22s_vics_control_w); DECLARE_WRITE32_MEMBER(namcos22_textram_w); - DECLARE_READ32_MEMBER(namcos22_tilemapattr_r); - DECLARE_WRITE32_MEMBER(namcos22_tilemapattr_w); - DECLARE_READ32_MEMBER(namcos22s_spotram_r); - DECLARE_WRITE32_MEMBER(namcos22s_spotram_w); + DECLARE_READ16_MEMBER(namcos22_tilemapattr_r); + DECLARE_WRITE16_MEMBER(namcos22_tilemapattr_w); + DECLARE_READ16_MEMBER(spotram_r); + DECLARE_WRITE16_MEMBER(spotram_w); DECLARE_READ32_MEMBER(namcos22_dspram_r); DECLARE_WRITE32_MEMBER(namcos22_dspram_w); DECLARE_WRITE32_MEMBER(namcos22_cgram_w); @@ -294,8 +307,6 @@ private: DECLARE_WRITE16_MEMBER(namcos22_dspram16_w); DECLARE_READ16_MEMBER(pdp_status_r); DECLARE_READ16_MEMBER(pdp_begin_r); - DECLARE_READ16_MEMBER(slave_external_ram_r); - DECLARE_WRITE16_MEMBER(slave_external_ram_w); DECLARE_READ16_MEMBER(dsp_hold_signal_r); DECLARE_WRITE16_MEMBER(dsp_hold_ack_w); DECLARE_WRITE16_MEMBER(dsp_xf_output_w); @@ -310,15 +321,13 @@ private: DECLARE_READ16_MEMBER(dsp_unk8_r); DECLARE_READ16_MEMBER(custom_ic_status_r); DECLARE_READ16_MEMBER(dsp_upload_status_r); - DECLARE_READ16_MEMBER(master_external_ram_r); - DECLARE_WRITE16_MEMBER(master_external_ram_w); DECLARE_WRITE16_MEMBER(slave_serial_io_w); DECLARE_READ16_MEMBER(master_serial_io_r); DECLARE_WRITE16_MEMBER(dsp_unk_porta_w); DECLARE_WRITE16_MEMBER(dsp_led_w); DECLARE_WRITE16_MEMBER(dsp_unk8_w); DECLARE_WRITE16_MEMBER(master_render_device_w); - DECLARE_READ16_MEMBER(dsp_bioz_r); + DECLARE_READ16_MEMBER(dsp_slave_bioz_r); DECLARE_READ16_MEMBER(dsp_slave_port3_r); DECLARE_READ16_MEMBER(dsp_slave_port4_r); DECLARE_READ16_MEMBER(dsp_slave_port5_r); @@ -328,9 +337,9 @@ private: DECLARE_READ16_MEMBER(dsp_slave_portb_r); DECLARE_WRITE16_MEMBER(dsp_slave_portb_w); DECLARE_READ32_MEMBER(namcos22_sci_r); - DECLARE_READ8_MEMBER(namcos22_system_controller_r); - DECLARE_WRITE8_MEMBER(namcos22s_system_controller_w); - DECLARE_WRITE8_MEMBER(namcos22_system_controller_w); + DECLARE_WRITE32_MEMBER(namcos22_sci_w); + DECLARE_READ16_MEMBER(namcos22_shared_r); + DECLARE_WRITE16_MEMBER(namcos22_shared_w); DECLARE_READ16_MEMBER(namcos22_keycus_r); DECLARE_WRITE16_MEMBER(namcos22_keycus_w); DECLARE_READ16_MEMBER(namcos22_portbit_r); @@ -341,8 +350,6 @@ private: DECLARE_READ32_MEMBER(alpinesa_prot_r); DECLARE_WRITE32_MEMBER(alpinesa_prot_w); DECLARE_WRITE32_MEMBER(namcos22s_chipselect_w); - DECLARE_READ16_MEMBER(s22mcu_shared_r); - DECLARE_WRITE16_MEMBER(s22mcu_shared_w); DECLARE_WRITE8_MEMBER(mcu_port4_w); DECLARE_READ8_MEMBER(mcu_port4_r); DECLARE_WRITE8_MEMBER(mcu_port5_w); @@ -361,50 +368,63 @@ private: DECLARE_READ16_MEMBER(mcu130_speedup_r); DECLARE_READ16_MEMBER(mcuc74_speedup_r); - inline uint8_t nthbyte(const uint32_t *src, int n) { return (src[n / 4] << ((n & 3) * 8)) >> 24; } - inline uint16_t nthword(const uint32_t *src, int n) { return (src[n / 2] << ((n & 1) * 16)) >> 16; } + inline u8 nthbyte(const u32 *src, int n) { return (src[n / 4] << ((n & 3) * 8)) >> 24; } + inline u16 nthword(const u32 *src, int n) { return (src[n / 2] << ((n & 1) * 16)) >> 16; } - inline int32_t signed18(int32_t val) { return (val & 0x00020000) ? (int32_t)(val | 0xfffc0000) : val & 0x0001ffff; } - inline int32_t signed24(int32_t val) { return (val & 0x00800000) ? (int32_t)(val | 0xff000000) : val & 0x007fffff; } + inline s32 signed18(s32 val) { return (val & 0x00020000) ? (s32)(val | 0xfffc0000) : val & 0x0001ffff; } + inline s32 signed24(s32 val) { return (val & 0x00800000) ? (s32)(val | 0xff000000) : val & 0x007fffff; } - inline float dspfixed_to_nativefloat(int16_t val) { return val / (float)0x7fff; } - float dspfloat_to_nativefloat(uint32_t val); + inline float dspfixed_to_nativefloat(s16 val) { return val / (float)0x7fff; } + float dspfloat_to_nativefloat(u32 val); void handle_driving_io(); - void handle_coinage(int slots, int address_is_odd); + void handle_coinage(u16 flags); void handle_cybrcomm_io(); - uint32_t pdp_polygonram_read(offs_t offs); - void pdp_polygonram_write(offs_t offs, uint32_t data); - void point_write(offs_t offs, uint32_t data); - void slave_halt(); - void slave_enable(); - void enable_slave_simulation(bool enable); + inline u32 pdp_polygonram_read(offs_t offs) { return m_polygonram[offs & 0x7fff]; } + inline void pdp_polygonram_write(offs_t offs, u32 data) { m_polygonram[offs & 0x7fff] = data; } + void point_write(offs_t offs, u32 data); + s32 pointram_read(offs_t offs); + inline s32 point_read(offs_t offs) { offs &= 0x00ffffff; return (offs < m_pointrom_size) ? m_pointrom[offs] : pointram_read(offs); } + void master_enable(bool enable); + void slave_enable(bool enable); + + void syscon_irqlevel(offs_t offset, u8 data); + void syscon_irqack(offs_t offset, u8 data); + void syscon_dspcontrol(offs_t offset, u8 data); + void syscon_mcucontrol(offs_t offset, u8 data); + DECLARE_READ8_MEMBER(syscon_r); + DECLARE_WRITE8_MEMBER(ss22_syscon_w); + DECLARE_WRITE8_MEMBER(s22_syscon_w); + + void posirq_update(); + emu_timer *m_posirq_timer; + TIMER_CALLBACK_MEMBER(posirq_callback); void matrix3d_multiply(float a[4][4], float b[4][4]); void matrix3d_identity(float m[4][4]); + void matrix3d_apply_reflection(float m[4][4]); void transform_point(float *vx, float *vy, float *vz, float m[4][4]); void transform_normal(float *nx, float *ny, float *nz, float m[4][4]); - void register_normals(int32_t addr, float m[4][4]); + void register_normals(int addr, float m[4][4]); - void blit_single_quad(bitmap_rgb32 &bitmap, uint32_t color, uint32_t addr, float m[4][4], int32_t polyshift, int flags, int packetformat); - void blit_quads(bitmap_rgb32 &bitmap, int32_t addr, float m[4][4], int32_t base); - void blit_polyobject(bitmap_rgb32 &bitmap, int code, float m[4][4]); + void blit_single_quad(u32 color, u32 addr, float m[4][4], int polyshift, int flags, int packetformat); + void blit_quads(int addr, int len, float m[4][4]); + void blit_polyobject(int code, float m[4][4]); - void slavesim_handle_bb0003(const int32_t *src); - void slavesim_handle_200002(bitmap_rgb32 &bitmap, const int32_t *src); - void slavesim_handle_300000(const int32_t *src); - void slavesim_handle_233002(const int32_t *src); - void simulate_slavedsp(bitmap_rgb32 &bitmap); + void slavesim_handle_bb0003(const s32 *src); + void slavesim_handle_200002(const s32 *src, int code); + void slavesim_handle_300000(const s32 *src); + void slavesim_handle_233002(const s32 *src); + void simulate_slavedsp(); - int32_t point_read(int32_t addr); void init_tables(); void update_mixer(); void update_palette(); void recalc_czram(); - void draw_direct_poly(const uint16_t *src); - void draw_polygons(bitmap_rgb32 &bitmap); - void draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect); - void draw_sprite_group(bitmap_rgb32 &bitmap, const rectangle &cliprect, const uint32_t *src, const uint32_t *attr, int num_sprites, int deltax, int deltay, int y_lowres); + void draw_direct_poly(const u16 *src); + void draw_polygons(); + void draw_sprites(); + void draw_sprite_group(const u32 *src, const u32 *attr, int num_sprites, int deltax, int deltay, int y_lowres); void draw_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); void namcos22s_mix_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int prival); void namcos22_mix_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); @@ -416,18 +436,18 @@ private: TILE_GET_INFO_MEMBER(get_text_tile_info); DECLARE_MACHINE_START(adillor); - uint32_t screen_update_namcos22s(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - uint32_t screen_update_namcos22(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + u32 screen_update_namcos22s(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + u32 screen_update_namcos22(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); INTERRUPT_GEN_MEMBER(namcos22s_interrupt); INTERRUPT_GEN_MEMBER(namcos22_interrupt); + INTERRUPT_GEN_MEMBER(dsp_vblank_irq); + TIMER_DEVICE_CALLBACK_MEMBER(dsp_serial_pulse); + TIMER_DEVICE_CALLBACK_MEMBER(mcu_irq); TIMER_DEVICE_CALLBACK_MEMBER(adillor_trackball_update); TIMER_CALLBACK_MEMBER(adillor_trackball_interrupt); TIMER_DEVICE_CALLBACK_MEMBER(propcycl_pedal_update); TIMER_DEVICE_CALLBACK_MEMBER(propcycl_pedal_interrupt); TIMER_DEVICE_CALLBACK_MEMBER(alpine_steplock_callback); - TIMER_DEVICE_CALLBACK_MEMBER(dsp_master_serial_irq); - TIMER_DEVICE_CALLBACK_MEMBER(dsp_slave_serial_irq); - TIMER_DEVICE_CALLBACK_MEMBER(mcu_irq); void alpine_io_map(address_map &map); void alpinesa_am(address_map &map); void iomcu_s22_io(address_map &map); @@ -447,28 +467,23 @@ private: void slave_dsp_program(address_map &map); void timecris_am(address_map &map); - virtual void machine_reset() override; - virtual void machine_start() override; - virtual void video_start() override; - required_device<cpu_device> m_maincpu; required_device<cpu_device> m_master; required_device<cpu_device> m_slave; required_device<cpu_device> m_mcu; optional_device<cpu_device> m_iomcu; - required_shared_ptr<uint32_t> m_shareram; + required_shared_ptr<u16> m_shareram; required_device<eeprom_parallel_28xx_device> m_eeprom; - required_shared_ptr<uint16_t> m_pSlaveExternalRAM; - required_shared_ptr<uint16_t> m_pMasterExternalRAM; - required_shared_ptr<uint32_t> m_paletteram; - required_shared_ptr<uint32_t> m_cgram; - required_shared_ptr<uint32_t> m_textram; - required_shared_ptr<uint32_t> m_polygonram; - required_shared_ptr<uint32_t> m_mixer; - optional_region_ptr<uint8_t> m_gamma_proms; - optional_shared_ptr<uint32_t> m_vics_data; - optional_shared_ptr<uint32_t> m_vics_control; - required_shared_ptr<uint32_t> m_tilemapattr; + required_shared_ptr<u16> m_slave_extram; + required_shared_ptr<u16> m_master_extram; + required_shared_ptr<u32> m_paletteram; + required_shared_ptr<u32> m_cgram; + required_shared_ptr<u32> m_textram; + required_shared_ptr<u32> m_polygonram; + required_shared_ptr<u32> m_mixer; + optional_region_ptr<u8> m_gamma_proms; + optional_shared_ptr<u32> m_vics_data; + optional_shared_ptr<u32> m_vics_control; optional_device<timer_device> m_motor_timer; optional_device<timer_device> m_pc_pedal_interrupt; required_device<screen_device> m_screen; @@ -480,59 +495,62 @@ private: output_finder<> m_led; output_finder<8> m_cpuled; - uint8_t m_syscontrol[0x20]; + u8 m_syscontrol[0x20]; bool m_dsp_irq_enabled; emu_timer *m_ar_tb_interrupt[2]; - uint16_t m_dsp_master_bioz; - std::unique_ptr<uint32_t[]> m_pointram; - uint32_t m_old_coin_state; - uint32_t m_credits1; - uint32_t m_credits2; - uint32_t m_point_address; - uint32_t m_point_data; - uint16_t m_SerialDataSlaveToMasterNext; - uint16_t m_SerialDataSlaveToMasterCurrent; + u16 m_dsp_master_bioz; + std::unique_ptr<u32[]> m_pointram; + int m_old_coin_state; + u32 m_credits1; + u32 m_credits2; + u32 m_point_address; + u32 m_point_data; + u16 m_SerialDataSlaveToMasterNext; + u16 m_SerialDataSlaveToMasterCurrent; int m_RenderBufSize; - uint16_t m_RenderBufData[NAMCOS22_MAX_RENDER_CMD_SEQ]; - uint16_t m_portbits[2]; + u16 m_RenderBufData[NAMCOS22_MAX_RENDER_CMD_SEQ]; + u16 m_portbits[2]; int m_irq_state; + int m_irq_enabled; namcos22_dsp_upload_state m_dsp_upload_state; int m_UploadDestIdx; - uint32_t m_alpinesa_protection; + u32 m_alpinesa_protection; int m_motor_status; int m_p4; - uint16_t m_su_82; - uint16_t m_keycus_id; - uint16_t m_keycus_rng; + u16 m_su_82; + u16 m_keycus_id; + u16 m_keycus_rng; int m_gametype; int m_chipselect; - int m_spot_enable; - int m_spot_read_address; - int m_spot_write_address; - std::unique_ptr<uint16_t[]> m_spotram; - std::unique_ptr<uint16_t[]> m_banked_czram[4]; - uint32_t m_cz_was_written[4]; + int m_spotram_enable; + int m_spotram_address; + std::unique_ptr<u16[]> m_spotram; + std::unique_ptr<u16[]> m_banked_czram[4]; + u32 m_cz_was_written[4]; int m_cz_adjust; namcos22_renderer *m_poly; - uint16_t m_dspram_bank; - uint16_t m_dspram16_latch; + u16 m_dspram_bank; + u16 m_dspram16_latch; bool m_slave_simulation_active; - int32_t m_absolute_priority; - int32_t m_objectshift; - uint16_t m_PrimitiveID; + int m_absolute_priority; + int m_objectshift; float m_viewmatrix[4][4]; - uint8_t m_LitSurfaceInfo[NAMCOS22_MAX_LIT_SURFACES]; - int32_t m_SurfaceNormalFormat; + u8 m_reflection; + bool m_cullflip; + u8 m_LitSurfaceInfo[NAMCOS22_MAX_LIT_SURFACES]; + int m_SurfaceNormalFormat; unsigned m_LitSurfaceCount; unsigned m_LitSurfaceIndex; int m_pointrom_size; - int32_t *m_pointrom; - std::unique_ptr<uint8_t[]> m_dirtypal; + s32 *m_pointrom; + std::unique_ptr<u8[]> m_dirtypal; std::unique_ptr<bitmap_ind16> m_mix_bitmap; tilemap_t *m_bgtilemap; + u16 m_tilemapattr[8]; - int m_spot_limit; + int m_spot_factor; int m_text_palbase; + int m_bg_palbase; float m_camera_zoom; float m_camera_vx; @@ -544,4 +562,14 @@ private: float m_camera_lz; // " int m_camera_ambient; // 0.0..1.0 int m_camera_power; // 0.0..1.0 + + bool m_skipped_this_frame; + void render_frame_active(); + DECLARE_WRITE_LINE_MEMBER(screen_vblank); + bool m_pdp_render_done; + bool m_render_refresh; + uint64_t m_pdp_frame; + u16 m_pdp_base; }; + +#endif // MAME_INCLUDES_NAMCOS22_H diff --git a/src/mame/includes/neogeo.h b/src/mame/includes/neogeo.h index 9c18198534b..1269920f4af 100644 --- a/src/mame/includes/neogeo.h +++ b/src/mame/includes/neogeo.h @@ -84,7 +84,7 @@ protected: TIMER_CALLBACK_MEMBER(display_position_vblank_callback); TIMER_CALLBACK_MEMBER(vblank_interrupt_callback); - uint32_t screen_update_neogeo(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); virtual DECLARE_WRITE8_MEMBER(io_control_w); DECLARE_WRITE8_MEMBER(audio_command_w); @@ -113,7 +113,7 @@ protected: virtual void machine_start() override; virtual void machine_reset() override; - virtual void neogeo_postload(); + virtual void device_post_load() override; // devices required_device<cpu_device> m_maincpu; @@ -204,7 +204,7 @@ private: // color/palette related std::vector<uint16_t> m_paletteram; - uint8_t m_palette_lookup[32][4]; + uint8_t m_palette_lookup[32][4]; int m_screen_shadow; int m_palette_bank; }; diff --git a/src/mame/includes/next.h b/src/mame/includes/next.h index 7e96ce0b044..3002d3a2935 100644 --- a/src/mame/includes/next.h +++ b/src/mame/includes/next.h @@ -170,10 +170,10 @@ private: DMA_BUSEXC = 0x10 }; - static const char *dma_targets[0x20]; - static const int dma_irqs[0x20]; - static const bool dma_has_saved[0x20]; - static const int scsi_clocks[4]; + static char const *const dma_targets[0x20]; + static int const dma_irqs[0x20]; + static bool const dma_has_saved[0x20]; + static int const scsi_clocks[4]; dma_slot dma_slots[0x20]; uint32_t esp; diff --git a/src/mame/includes/nforcepc.h b/src/mame/includes/nforcepc.h new file mode 100644 index 00000000000..03e0d72e247 --- /dev/null +++ b/src/mame/includes/nforcepc.h @@ -0,0 +1,47 @@ +// license:BSD-3-Clause +// copyright-holders: Samuele Zannoli +#ifndef MAME_MACHINE_NFORCEPC_H +#define MAME_MACHINE_NFORCEPC_H + +#pragma once + +// NVIDIA Corporation nForce CPU bridge + +class crush11_host_device : public pci_host_device { +public: + template <typename T> + crush11_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, int ram_size) + : crush11_host_device(mconfig, tag, owner, clock) + { + set_ids_host(0x10de01a4, 0x01, 0x10430c11); + set_cpu_tag(std::forward<T>(cpu_tag)); + set_ram_size(ram_size); + } + crush11_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + template <typename T> void set_cpu_tag(T &&tag) { cpu.set_tag(std::forward<T>(tag)); } + void set_ram_size(int ram_size); + +protected: + virtual void device_start() override; + virtual void device_reset() override; + + virtual void reset_all_mappings() override; + + virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; + + virtual void config_map(address_map &map) override; + +private: + int ddr_ram_size; + required_device<device_memory_interface> cpu; + std::vector<uint32_t> ram; + + DECLARE_READ8_MEMBER(test_r); + DECLARE_WRITE8_MEMBER(test_w); +}; + +DECLARE_DEVICE_TYPE(CRUSH11, crush11_host_device) + +#endif diff --git a/src/mame/includes/scramble.h b/src/mame/includes/scramble.h index a899b194d3f..3ff5f8c1821 100644 --- a/src/mame/includes/scramble.h +++ b/src/mame/includes/scramble.h @@ -58,7 +58,6 @@ public: void init_mariner(); void init_scramble_ppi(); void init_mars(); - void init_ckongs(); void init_mimonscr(); void init_hotshock(); void init_ad2083(); @@ -70,6 +69,7 @@ public: void init_scobra(); void init_stratgyx(); void init_tazmani2(); + void init_tazmaniet(); void init_darkplnt(); void init_mimonkey(); void init_mimonsco(); diff --git a/src/mame/includes/segas16a.h b/src/mame/includes/segas16a.h index 90804513a4b..9862f1cc662 100644 --- a/src/mame/includes/segas16a.h +++ b/src/mame/includes/segas16a.h @@ -95,7 +95,7 @@ private: DECLARE_READ8_MEMBER( sound_data_r ); DECLARE_WRITE8_MEMBER( n7751_command_w ); DECLARE_WRITE8_MEMBER( n7751_control_w ); - DECLARE_WRITE8_MEMBER( n7751_rom_offset_w ); + template<int Shift> void n7751_rom_offset_w(uint8_t data); // N7751 sound generator CPU read/write handlers DECLARE_READ8_MEMBER( n7751_rom_r ); diff --git a/src/mame/includes/segas24.h b/src/mame/includes/segas24.h index 071a08b1aa4..e348f368a7e 100644 --- a/src/mame/includes/segas24.h +++ b/src/mame/includes/segas24.h @@ -23,9 +23,10 @@ public: , m_subcpu(*this, "subcpu") , m_screen(*this, "screen") , m_palette(*this, "palette") - , m_generic_paletteram_16(*this, "paletteram") + , m_paletteram(*this, "paletteram") , m_romboard(*this, "romboard") , m_floppy(*this, "floppy") + , m_rombank(*this, "rombank%u", 1U) , m_irq_timer(*this, "irq_timer") , m_irq_timer_clear(*this, "irq_timer_clear") , m_frc_cnt_timer(*this, "frc_timer") @@ -58,24 +59,31 @@ public: void init_qsww(); void init_sgmast(); + void dcclub(machine_config &config); void mahmajn(machine_config &config); - void system24_floppy_fd_upd(machine_config &config); void system24_floppy(machine_config &config); - void system24_floppy_fd1094(machine_config &config); - void dcclub(machine_config &config); void system24_floppy_dcclub(machine_config &config); + void system24_floppy_fd1094(machine_config &config); + void system24_floppy_fd_upd(machine_config &config); void system24_floppy_hotrod(machine_config &config); + void system24_floppy_rom(machine_config &config); + void system24_rom(machine_config &config); void system24(machine_config &config); +protected: + virtual void device_post_load() override; + private: required_device<cpu_device> m_maincpu; required_device<cpu_device> m_subcpu; required_device<screen_device> m_screen; required_device<palette_device> m_palette; - required_shared_ptr<uint16_t> m_generic_paletteram_16; + required_shared_ptr<uint16_t> m_paletteram; optional_memory_region m_romboard; optional_region_ptr<uint8_t> m_floppy; + optional_memory_bank_array<2> m_rombank; + static const uint8_t s_mahmajn_mlt[8]; static const uint8_t s_mahmajn2_mlt[8]; static const uint8_t s_qgh_mlt[8]; @@ -84,6 +92,8 @@ private: static const uint8_t s_quizmeku_mlt[8]; static const uint8_t s_dcclub_mlt[8]; + uint8_t m_fdc_track_side; + uint8_t m_fdc_mode; int m_fdc_status; int m_fdc_track; int m_fdc_sector; @@ -121,22 +131,22 @@ private: required_device<segas24_mixer_device> m_vmixer; DECLARE_WRITE_LINE_MEMBER(irq_ym); - DECLARE_READ16_MEMBER( sys16_paletteram_r ); - DECLARE_WRITE16_MEMBER( sys16_paletteram_w ); + DECLARE_READ16_MEMBER( paletteram_r ); + DECLARE_WRITE16_MEMBER( paletteram_w ); DECLARE_READ16_MEMBER( irq_r ); DECLARE_WRITE16_MEMBER( irq_w ); DECLARE_READ16_MEMBER( fdc_r ); DECLARE_WRITE16_MEMBER( fdc_w ); DECLARE_READ16_MEMBER( fdc_status_r ); DECLARE_WRITE16_MEMBER( fdc_ctrl_w ); - DECLARE_READ16_MEMBER( curbank_r ); - DECLARE_WRITE16_MEMBER( curbank_w ); + DECLARE_READ8_MEMBER( curbank_r ); + DECLARE_WRITE8_MEMBER( curbank_w ); DECLARE_READ8_MEMBER( frc_mode_r ); DECLARE_WRITE8_MEMBER( frc_mode_w ); DECLARE_READ8_MEMBER( frc_r ); DECLARE_WRITE8_MEMBER( frc_w ); - DECLARE_READ16_MEMBER( mlatch_r ); - DECLARE_WRITE16_MEMBER( mlatch_w ); + DECLARE_READ8_MEMBER( mlatch_r ); + DECLARE_WRITE8_MEMBER( mlatch_w ); DECLARE_READ16_MEMBER( iod_r ); DECLARE_WRITE16_MEMBER( iod_w ); @@ -157,7 +167,7 @@ private: WRITE_LINE_MEMBER(cnt1); virtual void machine_start() override; virtual void machine_reset() override; - uint32_t screen_update_system24(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); TIMER_DEVICE_CALLBACK_MEMBER(irq_timer_cb); TIMER_DEVICE_CALLBACK_MEMBER(irq_timer_clear_cb); TIMER_DEVICE_CALLBACK_MEMBER(irq_frc_cb); @@ -172,13 +182,19 @@ private: optional_ioport m_paddle; optional_ioport_array<8> m_mj_inputs; + void common_map(address_map &map); + void cpu1_map(address_map &map); + void cpu2_map(address_map &map); void decrypted_opcodes_map(address_map &map); + void hotrod_common_map(address_map &map); void hotrod_cpu1_map(address_map &map); void hotrod_cpu2_map(address_map &map); + void rombd_common_map(address_map &map); + void rombd_cpu1_map(address_map &map); + void rombd_cpu2_map(address_map &map); + void roughrac_common_map(address_map &map); void roughrac_cpu1_map(address_map &map); void roughrac_cpu2_map(address_map &map); - void system24_cpu1_map(address_map &map); - void system24_cpu2_map(address_map &map); }; #endif // MAME_INCLUDES_SEGAS24_H diff --git a/src/mame/includes/seta2.h b/src/mame/includes/seta2.h index 1c9380fdbf5..c1ebfe4940d 100644 --- a/src/mame/includes/seta2.h +++ b/src/mame/includes/seta2.h @@ -32,7 +32,6 @@ public: m_oki(*this, "oki"), m_eeprom(*this, "eeprom"), m_flash(*this, "flash"), - m_rtc(*this, "rtc"), m_dispenser(*this, "dispenser"), m_x1_bank(*this,"x1_bank_%u", 1U), @@ -129,7 +128,6 @@ protected: optional_device<okim9810_device> m_oki; optional_device<eeprom_serial_93cxx_device> m_eeprom; optional_device<intelfsh16_device> m_flash; - optional_device<upd4992_device> m_rtc; optional_device<ticket_dispenser_device> m_dispenser; optional_memory_bank_array<8> m_x1_bank; @@ -212,6 +210,7 @@ class staraudi_state : public seta2_state public: staraudi_state(const machine_config &mconfig, device_type type, const char *tag) : seta2_state(mconfig, type, tag), + m_rtc(*this, "rtc"), m_rgbram(*this, "rgbram", 0) { } @@ -236,6 +235,7 @@ private: void draw_rgbram(bitmap_ind16 &bitmap); + required_device<upd4992_device> m_rtc; required_shared_ptr<uint16_t> m_rgbram; uint16_t m_lamps1 = 0, m_lamps2 = 0, m_cam = 0; diff --git a/src/mame/includes/spectrum.h b/src/mame/includes/spectrum.h index 05b96dec6b7..b223756ce66 100644 --- a/src/mame/includes/spectrum.h +++ b/src/mame/includes/spectrum.h @@ -105,6 +105,8 @@ public: void spectrum_128(machine_config &config); void init_spectrum(); + void init_spec128(); + void init_timex(); void init_plus2(); void init_plus3(); diff --git a/src/mame/includes/stlforce.h b/src/mame/includes/stlforce.h index 6061804005c..c117738a7da 100644 --- a/src/mame/includes/stlforce.h +++ b/src/mame/includes/stlforce.h @@ -1,75 +1,45 @@ // license:BSD-3-Clause // copyright-holders:David Haywood +#include "video/edevices.h" #include "machine/eepromser.h" #include "emupal.h" +#include "cpu/m68000/m68000.h" +#include "sound/okim6295.h" +#include "screen.h" +#include "speaker.h" class stlforce_state : public driver_device { public: - stlforce_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), + stlforce_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), m_eeprom(*this, "eeprom"), + m_video(*this, "edevices_vid"), m_gfxdecode(*this, "gfxdecode"), m_palette(*this, "palette"), - m_bg_videoram(*this, "bg_videoram"), - m_mlow_videoram(*this, "mlow_videoram"), - m_mhigh_videoram(*this, "mhigh_videoram"), - m_tx_videoram(*this, "tx_videoram"), - m_bg_scrollram(*this, "bg_scrollram"), - m_mlow_scrollram(*this, "mlow_scrollram"), - m_mhigh_scrollram(*this, "mhigh_scrollram"), - m_vidattrram(*this, "vidattrram"), - m_spriteram(*this, "spriteram"), - m_okibank(*this, "okibank") { } + m_okibank(*this, "okibank") + { } void stlforce(machine_config &config); void twinbrat(machine_config &config); void init_twinbrat(); - void init_stlforce(); private: required_device<cpu_device> m_maincpu; required_device<eeprom_serial_93cxx_device> m_eeprom; + required_device<edevices_device> m_video; required_device<gfxdecode_device> m_gfxdecode; required_device<palette_device> m_palette; - required_shared_ptr<uint16_t> m_bg_videoram; - required_shared_ptr<uint16_t> m_mlow_videoram; - required_shared_ptr<uint16_t> m_mhigh_videoram; - required_shared_ptr<uint16_t> m_tx_videoram; - required_shared_ptr<uint16_t> m_bg_scrollram; - required_shared_ptr<uint16_t> m_mlow_scrollram; - required_shared_ptr<uint16_t> m_mhigh_scrollram; - required_shared_ptr<uint16_t> m_vidattrram; - required_shared_ptr<uint16_t> m_spriteram; - optional_memory_bank m_okibank; - tilemap_t *m_bg_tilemap; - tilemap_t *m_mlow_tilemap; - tilemap_t *m_mhigh_tilemap; - tilemap_t *m_tx_tilemap; - - int m_sprxoffs; - - DECLARE_WRITE16_MEMBER(bg_videoram_w); - DECLARE_WRITE16_MEMBER(mlow_videoram_w); - DECLARE_WRITE16_MEMBER(mhigh_videoram_w); - DECLARE_WRITE16_MEMBER(tx_videoram_w); DECLARE_WRITE8_MEMBER(eeprom_w); DECLARE_WRITE8_MEMBER(oki_bank_w); - TILE_GET_INFO_MEMBER(get_bg_tile_info); - TILE_GET_INFO_MEMBER(get_mlow_tile_info); - TILE_GET_INFO_MEMBER(get_mhigh_tile_info); - TILE_GET_INFO_MEMBER(get_tx_tile_info); - - virtual void video_start() override; uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect ); void stlforce_map(address_map &map); void twinbrat_oki_map(address_map &map); diff --git a/src/mame/includes/targeth.h b/src/mame/includes/targeth.h index 1e5616ebc85..12108b2b81b 100644 --- a/src/mame/includes/targeth.h +++ b/src/mame/includes/targeth.h @@ -12,8 +12,8 @@ class targeth_state : public driver_device { public: - targeth_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), + targeth_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), m_maincpu(*this,"maincpu"), m_gfxdecode(*this, "gfxdecode"), m_screen(*this, "screen"), @@ -22,13 +22,14 @@ public: m_videoram(*this, "videoram"), m_vregs(*this, "vregs"), m_spriteram(*this, "spriteram"), - m_shareram(*this, "shareram") + m_shareram(*this, "shareram"), + m_okibank(*this, "okibank") { } void targeth(machine_config &config); private: - DECLARE_WRITE16_MEMBER(OKIM6295_bankswitch_w); + DECLARE_WRITE8_MEMBER(oki_bankswitch_w); DECLARE_WRITE16_MEMBER(output_latch_w); DECLARE_WRITE_LINE_MEMBER(coin1_counter_w); DECLARE_WRITE_LINE_MEMBER(coin2_counter_w); @@ -37,8 +38,7 @@ private: DECLARE_WRITE16_MEMBER(vram_w); - TILE_GET_INFO_MEMBER(get_tile_info_screen0); - TILE_GET_INFO_MEMBER(get_tile_info_screen1); + template<int Layer> TILE_GET_INFO_MEMBER(get_tile_info); TIMER_CALLBACK_MEMBER(gun1_irq); TIMER_CALLBACK_MEMBER(gun2_irq); @@ -63,7 +63,9 @@ private: required_shared_ptr<uint16_t> m_videoram; required_shared_ptr<uint16_t> m_vregs; required_shared_ptr<uint16_t> m_spriteram; - optional_shared_ptr<uint16_t> m_shareram; + required_shared_ptr<uint16_t> m_shareram; + + required_memory_bank m_okibank; emu_timer *m_gun_irq_timer[2]; diff --git a/src/mame/includes/tecmo16.h b/src/mame/includes/tecmo16.h index 90421fb19f5..aad2da80a91 100644 --- a/src/mame/includes/tecmo16.h +++ b/src/mame/includes/tecmo16.h @@ -1,6 +1,7 @@ // license:BSD-3-Clause // copyright-holders:Hau, Nicola Salmoria +#include "video/bufsprite.h" #include "video/tecmo_spr.h" #include "video/tecmo_mix.h" #include "emupal.h" @@ -9,8 +10,8 @@ class tecmo16_state : public driver_device { public: - tecmo16_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), + tecmo16_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu"), m_gfxdecode(*this, "gfxdecode"), @@ -44,7 +45,7 @@ private: required_shared_ptr<uint16_t> m_videoram2; required_shared_ptr<uint16_t> m_colorram2; required_shared_ptr<uint16_t> m_charram; - required_shared_ptr<uint16_t> m_spriteram; + required_device<buffered_spriteram16_device> m_spriteram; tilemap_t *m_fg_tilemap; tilemap_t *m_bg_tilemap; @@ -52,6 +53,7 @@ private: bitmap_ind16 m_sprite_bitmap; bitmap_ind16 m_tile_bitmap_bg; bitmap_ind16 m_tile_bitmap_fg; + bitmap_ind16 m_tile_bitmap_tx; int m_flipscreen; int m_game_is_riot; uint16_t m_scroll_x_w; diff --git a/src/mame/includes/vtech2.h b/src/mame/includes/vtech2.h index 218afa9f9cd..f5af8d7ed45 100644 --- a/src/mame/includes/vtech2.h +++ b/src/mame/includes/vtech2.h @@ -37,6 +37,8 @@ public: void init_laser(); + DECLARE_INPUT_CHANGED_MEMBER(reset_button); + private: DECLARE_WRITE8_MEMBER(laser_bank_select_w); DECLARE_WRITE8_MEMBER(laser_fdc_w); diff --git a/src/mame/includes/xavix.h b/src/mame/includes/xavix.h index dd39f99b38a..43df8161edc 100644 --- a/src/mame/includes/xavix.h +++ b/src/mame/includes/xavix.h @@ -10,6 +10,7 @@ #include "screen.h" #include "speaker.h" #include "machine/bankdev.h" +#include "machine/i2cmem.h" class xavix_state : public driver_device @@ -18,33 +19,34 @@ public: xavix_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), + m_screen(*this, "screen"), m_mainram(*this, "mainram"), - m_spr_attr0(*this, "spr_attr0"), - m_spr_attr1(*this, "spr_attr1"), - m_spr_ypos(*this, "spr_ypos"), - m_spr_xpos(*this, "spr_xpos"), - m_spr_addr_lo(*this, "spr_addr_lo"), - m_spr_addr_md(*this, "spr_addr_md"), - m_spr_addr_hi(*this, "spr_addr_hi"), - m_palram1(*this, "palram1"), - m_palram2(*this, "palram2"), - m_spr_attra(*this, "spr_attra"), + m_fragment_sprite(*this, "fragment_sprite"), + m_rom_dma_src(*this,"rom_dma_src"), + m_rom_dma_dst(*this,"rom_dma_dst"), + m_rom_dma_len(*this,"rom_dma_len"), + m_palram_sh(*this, "palram_sh"), + m_palram_l(*this, "palram_l"), + m_colmix_sh(*this, "colmix_sh"), + m_colmix_l(*this, "colmix_l"), + m_segment_regs(*this, "segment_regs"), m_palette(*this, "palette"), m_in0(*this, "IN0"), m_in1(*this, "IN1"), m_region(*this, "REGION"), m_gfxdecode(*this, "gfxdecode"), - m_alt_addressing(0), - m_lowbus(*this, "lowbus") + m_lowbus(*this, "lowbus"), + m_i2cmem(*this, "i2cmem") { } void xavix(machine_config &config); void xavixp(machine_config &config); void xavix2000(machine_config &config); + void xavix_i2c(machine_config &config); + void xavix2000_i2c(machine_config &config); + void init_xavix(); - void init_taitons1(); - void init_rad_box(); private: // screen updates @@ -67,174 +69,173 @@ private: DECLARE_READ8_MEMBER(main2_r); DECLARE_WRITE8_MEMBER(main2_w); - DECLARE_WRITE8_MEMBER(xavix_7900_w); - DECLARE_WRITE8_MEMBER(xavix_7901_w); - DECLARE_WRITE8_MEMBER(xavix_7902_w); + DECLARE_WRITE8_MEMBER(extintrf_7900_w); + DECLARE_WRITE8_MEMBER(extintrf_7901_w); + DECLARE_WRITE8_MEMBER(extintrf_7902_w); DECLARE_WRITE8_MEMBER(xavix_7a80_w); - DECLARE_WRITE8_MEMBER(xavix_7b00_w); - DECLARE_READ8_MEMBER(xavix_7b80_r); - DECLARE_WRITE8_MEMBER(xavix_7b80_w); - DECLARE_WRITE8_MEMBER(xavix_7b81_w); - - DECLARE_WRITE8_MEMBER(xavix_7810_w); - - DECLARE_WRITE8_MEMBER(dma_trigger_w); - DECLARE_WRITE8_MEMBER(rom_dmasrc_lo_w); - DECLARE_WRITE8_MEMBER(rom_dmasrc_md_w); - DECLARE_WRITE8_MEMBER(rom_dmasrc_hi_w); - DECLARE_WRITE8_MEMBER(rom_dmadst_lo_w); - DECLARE_WRITE8_MEMBER(rom_dmadst_hi_w); - DECLARE_WRITE8_MEMBER(rom_dmalen_lo_w); - DECLARE_WRITE8_MEMBER(rom_dmalen_hi_w); - DECLARE_READ8_MEMBER(dma_trigger_r); - - DECLARE_WRITE8_MEMBER(vid_dma_params_1_w); - DECLARE_WRITE8_MEMBER(vid_dma_params_2_w); - DECLARE_WRITE8_MEMBER(vid_dma_trigger_w); - DECLARE_READ8_MEMBER(vid_dma_trigger_r); - - DECLARE_READ8_MEMBER(xavix_io_0_r); - DECLARE_READ8_MEMBER(xavix_io_1_r); - DECLARE_READ8_MEMBER(xavix_7a02_r); - DECLARE_READ8_MEMBER(xavix_7a03_r); - - DECLARE_WRITE8_MEMBER(xavix_7a00_w); - DECLARE_WRITE8_MEMBER(xavix_7a01_w); - DECLARE_WRITE8_MEMBER(xavix_7a02_w); - DECLARE_WRITE8_MEMBER(xavix_7a03_w); - - DECLARE_WRITE8_MEMBER(irq_enable_w); - DECLARE_WRITE8_MEMBER(irq_vector0_lo_w); - DECLARE_WRITE8_MEMBER(irq_vector0_hi_w); - DECLARE_WRITE8_MEMBER(irq_vector1_lo_w); - DECLARE_WRITE8_MEMBER(irq_vector1_hi_w); + DECLARE_WRITE8_MEMBER(adc_7b00_w); + DECLARE_READ8_MEMBER(adc_7b80_r); + DECLARE_WRITE8_MEMBER(adc_7b80_w); + DECLARE_READ8_MEMBER(adc_7b81_r); + DECLARE_WRITE8_MEMBER(adc_7b81_w); + + DECLARE_WRITE8_MEMBER(slotreg_7810_w); + + DECLARE_WRITE8_MEMBER(rom_dmatrg_w); + + DECLARE_WRITE8_MEMBER(rom_dmasrc_w); + + DECLARE_WRITE8_MEMBER(rom_dmadst_w); + DECLARE_WRITE8_MEMBER(rom_dmalen_w); + DECLARE_READ8_MEMBER(rom_dmastat_r); + + DECLARE_WRITE8_MEMBER(spritefragment_dma_params_1_w); + DECLARE_WRITE8_MEMBER(spritefragment_dma_params_2_w); + DECLARE_WRITE8_MEMBER(spritefragment_dma_trg_w); + DECLARE_READ8_MEMBER(spritefragment_dma_status_r); + + DECLARE_READ8_MEMBER(io0_data_r); + DECLARE_READ8_MEMBER(io1_data_r); + DECLARE_READ8_MEMBER(io0_direction_r); + DECLARE_READ8_MEMBER(io1_direction_r); + + DECLARE_WRITE8_MEMBER(io0_data_w); + DECLARE_WRITE8_MEMBER(io1_data_w); + DECLARE_WRITE8_MEMBER(io0_direction_w); + DECLARE_WRITE8_MEMBER(io1_direction_w); + + DECLARE_WRITE8_MEMBER(vector_enable_w); + DECLARE_WRITE8_MEMBER(nmi_vector_lo_w); + DECLARE_WRITE8_MEMBER(nmi_vector_hi_w); + DECLARE_WRITE8_MEMBER(irq_vector_lo_w); + DECLARE_WRITE8_MEMBER(irq_vector_hi_w); DECLARE_READ8_MEMBER(irq_source_r); DECLARE_WRITE8_MEMBER(irq_source_w); - DECLARE_READ8_MEMBER(xavix_6fe8_r); - DECLARE_WRITE8_MEMBER(xavix_6fe8_w); - DECLARE_READ8_MEMBER(xavix_6fe9_r); - DECLARE_WRITE8_MEMBER(xavix_6fe9_w); - DECLARE_WRITE8_MEMBER(xavix_6fea_w); + DECLARE_READ8_MEMBER(arena_start_r); + DECLARE_WRITE8_MEMBER(arena_start_w); + DECLARE_READ8_MEMBER(arena_end_r); + DECLARE_WRITE8_MEMBER(arena_end_w); + DECLARE_READ8_MEMBER(arena_control_r); + DECLARE_WRITE8_MEMBER(arena_control_w); - DECLARE_READ8_MEMBER(xavix_6ff0_r); - DECLARE_WRITE8_MEMBER(xavix_6ff0_w); + DECLARE_READ8_MEMBER(colmix_6ff0_r); + DECLARE_WRITE8_MEMBER(colmix_6ff0_w); - DECLARE_WRITE8_MEMBER(xavix_6ff1_w); - DECLARE_WRITE8_MEMBER(xavix_6ff2_w); + DECLARE_WRITE8_MEMBER(colmix_6ff1_w); + DECLARE_WRITE8_MEMBER(colmix_6ff2_w); - DECLARE_READ8_MEMBER(xavix_6ff8_r); - DECLARE_WRITE8_MEMBER(xavix_6ff8_w); + DECLARE_READ8_MEMBER(dispctrl_6ff8_r); + DECLARE_WRITE8_MEMBER(dispctrl_6ff8_w); - DECLARE_WRITE8_MEMBER(xavix_6ffa_w); - DECLARE_WRITE8_MEMBER(xavix_6ffb_w); + DECLARE_WRITE8_MEMBER(dispctrl_posirq_x_w); + DECLARE_WRITE8_MEMBER(dispctrl_posirq_y_w); - DECLARE_READ8_MEMBER(xavix_75f0_r); - DECLARE_WRITE8_MEMBER(xavix_75f0_w); + DECLARE_READ8_MEMBER(sound_75f0_r); + DECLARE_WRITE8_MEMBER(sound_75f0_w); - DECLARE_READ8_MEMBER(xavix_75f1_r); - DECLARE_WRITE8_MEMBER(xavix_75f1_w); + DECLARE_READ8_MEMBER(sound_75f1_r); + DECLARE_WRITE8_MEMBER(sound_75f1_w); - DECLARE_READ8_MEMBER(xavix_75f4_r); - DECLARE_READ8_MEMBER(xavix_75f5_r); - DECLARE_READ8_MEMBER(xavix_75f6_r); - DECLARE_WRITE8_MEMBER(xavix_75f6_w); + DECLARE_READ8_MEMBER(sound_75f4_r); + DECLARE_READ8_MEMBER(sound_75f5_r); + DECLARE_READ8_MEMBER(sound_75f6_r); + DECLARE_WRITE8_MEMBER(sound_75f6_w); - DECLARE_WRITE8_MEMBER(xavix_75f7_w); + DECLARE_WRITE8_MEMBER(sound_75f7_w); - DECLARE_READ8_MEMBER(xavix_75f8_r); - DECLARE_WRITE8_MEMBER(xavix_75f8_w); + DECLARE_READ8_MEMBER(sound_75f8_r); + DECLARE_WRITE8_MEMBER(sound_75f8_w); - DECLARE_READ8_MEMBER(xavix_75f9_r); - DECLARE_WRITE8_MEMBER(xavix_75f9_w); + DECLARE_READ8_MEMBER(sound_75f9_r); + DECLARE_WRITE8_MEMBER(sound_75f9_w); - DECLARE_READ8_MEMBER(xavix_75fa_r); - DECLARE_WRITE8_MEMBER(xavix_75fa_w); - DECLARE_READ8_MEMBER(xavix_75fb_r); - DECLARE_WRITE8_MEMBER(xavix_75fb_w); - DECLARE_READ8_MEMBER(xavix_75fc_r); - DECLARE_WRITE8_MEMBER(xavix_75fc_w); - DECLARE_READ8_MEMBER(xavix_75fd_r); - DECLARE_WRITE8_MEMBER(xavix_75fd_w); + DECLARE_READ8_MEMBER(sound_75fa_r); + DECLARE_WRITE8_MEMBER(sound_75fa_w); + DECLARE_READ8_MEMBER(sound_75fb_r); + DECLARE_WRITE8_MEMBER(sound_75fb_w); + DECLARE_READ8_MEMBER(sound_75fc_r); + DECLARE_WRITE8_MEMBER(sound_75fc_w); + DECLARE_READ8_MEMBER(sound_75fd_r); + DECLARE_WRITE8_MEMBER(sound_75fd_w); - DECLARE_WRITE8_MEMBER(xavix_75fe_w); - DECLARE_WRITE8_MEMBER(xavix_75ff_w); + DECLARE_WRITE8_MEMBER(sound_75fe_w); + DECLARE_WRITE8_MEMBER(sound_75ff_w); - DECLARE_WRITE8_MEMBER(xavix_7c00_w); - DECLARE_READ8_MEMBER(xavix_7c01_r); - DECLARE_WRITE8_MEMBER(xavix_7c01_w); - DECLARE_WRITE8_MEMBER(xavix_7c02_w); + DECLARE_WRITE8_MEMBER(timer_control_w); + DECLARE_READ8_MEMBER(timer_baseval_r); + DECLARE_WRITE8_MEMBER(timer_baseval_w); + DECLARE_WRITE8_MEMBER(timer_freq_w); - DECLARE_WRITE8_MEMBER(xavix_6fc0_w); DECLARE_WRITE8_MEMBER(tmap1_regs_w); - DECLARE_WRITE8_MEMBER(xavix_6fd8_w); DECLARE_WRITE8_MEMBER(tmap2_regs_w); + DECLARE_READ8_MEMBER(tmap1_regs_r); DECLARE_READ8_MEMBER(tmap2_regs_r); + DECLARE_WRITE8_MEMBER(spriteregs_w); + DECLARE_READ8_MEMBER(pal_ntsc_r); - DECLARE_READ8_MEMBER(xavix_4000_r); + DECLARE_READ8_MEMBER(xavix_memoryemu_txarray_r); + DECLARE_WRITE8_MEMBER(xavix_memoryemu_txarray_w); + uint8_t m_txarray[3]; DECLARE_READ8_MEMBER(mult_r); DECLARE_WRITE8_MEMBER(mult_w); + DECLARE_READ8_MEMBER(mult_param_r); DECLARE_WRITE8_MEMBER(mult_param_w); required_device<cpu_device> m_maincpu; - - uint8_t m_rom_dmasrc_lo_data; - uint8_t m_rom_dmasrc_md_data; - uint8_t m_rom_dmasrc_hi_data; - - uint8_t m_rom_dmadst_lo_data; - uint8_t m_rom_dmadst_hi_data; - - uint8_t m_rom_dmalen_lo_data; - uint8_t m_rom_dmalen_hi_data; - - uint8_t m_irq_enable_data; - uint8_t m_irq_vector0_lo_data; - uint8_t m_irq_vector0_hi_data; - uint8_t m_irq_vector1_lo_data; - uint8_t m_irq_vector1_hi_data; + required_device<screen_device> m_screen; + + uint8_t m_vectorenable; + uint8_t m_nmi_vector_lo_data; + uint8_t m_nmi_vector_hi_data; + uint8_t m_irq_vector_lo_data; + uint8_t m_irq_vector_hi_data; uint8_t m_multparams[3]; uint8_t m_multresults[2]; - uint8_t m_vid_dma_param1[2]; - uint8_t m_vid_dma_param2[2]; + uint8_t m_spritefragment_dmaparam1[2]; + uint8_t m_spritefragment_dmaparam2[2]; uint8_t m_tmap1_regs[8]; uint8_t m_tmap2_regs[8]; - uint8_t m_6fe8; - uint8_t m_6fe9; + int m_arena_start; + int m_arena_end; + uint8_t m_arena_control; uint8_t m_6ff0; uint8_t m_6ff8; - uint8_t m_75fx[0x10]; + uint8_t m_io0_data; + uint8_t m_io1_data; + uint8_t m_io0_direction; + uint8_t m_io1_direction; - uint8_t m_7c01; + uint8_t m_soundregs[0x10]; - uint8_t get_vectors(int which, int half); + uint8_t m_timer_baseval; - required_shared_ptr<uint8_t> m_mainram; + int16_t get_vectors(int which, int half); - required_shared_ptr<uint8_t> m_spr_attr0; - required_shared_ptr<uint8_t> m_spr_attr1; - required_shared_ptr<uint8_t> m_spr_ypos; - required_shared_ptr<uint8_t> m_spr_xpos; + required_shared_ptr<uint8_t> m_mainram; + required_shared_ptr<uint8_t> m_fragment_sprite; + required_shared_ptr<uint8_t> m_rom_dma_src; + required_shared_ptr<uint8_t> m_rom_dma_dst; + required_shared_ptr<uint8_t> m_rom_dma_len; - required_shared_ptr<uint8_t> m_spr_addr_lo; - required_shared_ptr<uint8_t> m_spr_addr_md; - required_shared_ptr<uint8_t> m_spr_addr_hi; + required_shared_ptr<uint8_t> m_palram_sh; + required_shared_ptr<uint8_t> m_palram_l; + required_shared_ptr<uint8_t> m_colmix_sh; + required_shared_ptr<uint8_t> m_colmix_l; - required_shared_ptr<uint8_t> m_palram1; - required_shared_ptr<uint8_t> m_palram2; - required_shared_ptr<uint8_t> m_spr_attra; + required_shared_ptr<uint8_t> m_segment_regs; required_device<palette_device> m_palette; @@ -246,9 +247,12 @@ private: void handle_palette(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); double hue2rgb(double p, double q, double t); - void draw_tile(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int tile, int bpp, int xpos, int ypos, int drawheight, int drawwidth, int flipx, int flipy, int pal, int opaque); + void draw_tile(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int tile, int bpp, int xpos, int ypos, int drawheight, int drawwidth, int flipx, int flipy, int pal, int zval); void draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int which); void draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + bitmap_ind16 m_zbuffer; + + uint8_t m_spritereg; int m_rgnlen; uint8_t* m_rgn; @@ -262,8 +266,8 @@ private: int get_current_address_byte(); - int m_alt_addressing; required_device<address_map_bank_device> m_lowbus; + optional_device<i2cmem_device> m_i2cmem; }; #endif // MAME_INCLUDES_XAVIX_H diff --git a/src/mame/includes/xbox.h b/src/mame/includes/xbox.h index 26388e6e159..47910468c2e 100644 --- a/src/mame/includes/xbox.h +++ b/src/mame/includes/xbox.h @@ -10,7 +10,70 @@ #include "machine/idectrl.h" #include "machine/pic8259.h" -#include "machine/pci.h" + +/* + * PIC16LC connected to SMBus + */ + +class xbox_pic16lc_device : public device_t, public smbus_interface +{ +public: + xbox_pic16lc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual int execute_command(int command, int rw, int data) override; + +protected: + virtual void device_start() override; + virtual void device_reset() override; + +private: + uint8_t buffer[0xff]; +}; + +DECLARE_DEVICE_TYPE(XBOX_PIC16LC, xbox_pic16lc_device) + +/* + * CX25871 connected to SMBus + */ + +class xbox_cx25871_device : public device_t, public smbus_interface +{ +public: + xbox_cx25871_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual int execute_command(int command, int rw, int data) override; + +protected: + virtual void device_start() override; + virtual void device_reset() override; + +private: +}; + +DECLARE_DEVICE_TYPE(XBOX_CX25871, xbox_cx25871_device) + +/* + * EEPROM connected to SMBus + */ + +class xbox_eeprom_device : public device_t, public smbus_interface +{ +public: + xbox_eeprom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual int execute_command(int command, int rw, int data) override; + + std::function<void(void)> hack_eeprom; + +protected: + virtual void device_start() override; + virtual void device_reset() override; + +private: +}; + +DECLARE_DEVICE_TYPE(XBOX_EEPROM, xbox_eeprom_device) + +/* + * Base + */ class xbox_base_state : public driver_device { @@ -63,7 +126,6 @@ protected: int selected; uint8_t registers[16][256]; // 256 registers for up to 16 devices, registers 0-0x2f common to all } superiost; - uint8_t pic16lc_buffer[0xff]; nv2a_renderer *nvidia_nv2a; bool debug_irq_active; int debug_irq_number; diff --git a/src/mame/includes/xbox_nv2a.h b/src/mame/includes/xbox_nv2a.h index 970db40f534..51b4944a9b1 100644 --- a/src/mame/includes/xbox_nv2a.h +++ b/src/mame/includes/xbox_nv2a.h @@ -14,13 +14,13 @@ #include <mutex> class vertex_program_disassembler { - static const char *srctypes[]; - static const char *scaops[]; - static const int scapar2[]; - static const char *vecops[]; - static const int vecpar2[]; - static const char *vecouts[]; - static const char compchar[]; + static char const *const srctypes[]; + static char const *const scaops[]; + static int const scapar2[]; + static char const *const vecops[]; + static int const vecpar2[]; + static char const *const vecouts[]; + static char const compchar[]; int o[6]; int state; diff --git a/src/mame/includes/xbox_pci.h b/src/mame/includes/xbox_pci.h index 7d4f69dfd62..d1488cb0c37 100644 --- a/src/mame/includes/xbox_pci.h +++ b/src/mame/includes/xbox_pci.h @@ -78,10 +78,14 @@ DECLARE_DEVICE_TYPE(MCPX_LPC, mcpx_lpc_device) * SMBus */ +class smbus_interface { +public: + virtual int execute_command(int command, int rw, int data) = 0; +}; + class mcpx_smbus_device : public pci_device { public: mcpx_smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - void register_device(int address, std::function<int(int command, int rw, int data)> callback) { if (address < 128) smbusst.devices[address] = callback; } template<class Object> devcb_base &set_interrupt_handler(Object &&cb) { return m_interrupt_handler.set_callback(std::forward<Object>(cb)); } @@ -101,7 +105,7 @@ private: int data; int command; int rw; - std::function<int(int command, int rw, int data)> devices[128]; + smbus_interface *devices[128]; uint32_t words[256 / 4]; } smbusst; void smbus_io0(address_map &map); diff --git a/src/mame/layout/coco3.lay b/src/mame/layout/coco3.lay index bebd45729eb..5bb06a96148 100644 --- a/src/mame/layout/coco3.lay +++ b/src/mame/layout/coco3.lay @@ -1,13 +1,16 @@ <?xml version="1.0"?> <mamelayout version="2"> <view name="Composite"> - <screen index="0"> <bounds left="0" top="0" right="4" bottom="3" /> - </screen> + <screen index="0"> + <bounds left="0" top="0" right="4" bottom="3" /> + </screen> + <!-- workaround for MAME selecting a 2-screen view by default --> + <screen index="1"><bounds left="10" top="0" right="14" bottom="3" /></screen> </view> <view name="RGB"> - <screen index="1"> + <screen index="1"> <bounds left="0" top="0" right="4" bottom="3" /> </screen> </view> diff --git a/src/mame/layout/emma2.lay b/src/mame/layout/emma2.lay new file mode 100644 index 00000000000..0d60ebe4732 --- /dev/null +++ b/src/mame/layout/emma2.lay @@ -0,0 +1,62 @@ +<?xml version="1.0"?> +<!-- emma2.lay --> + +<mamelayout version="2"> + + <element name="digit" defstate="0"> + <led7seg> + <color red="1.0" green="0.0" blue="0.0" /> + </led7seg> + </element> + + <element name="red_led" defstate="1"> + <disk> + <color red="1.0" green="0.0" blue="0.0" /> + </disk> + </element> + + <element name="background"> + <rect> + <bounds left="0" top="0" right="1" bottom="1" /> + <color red="0.0" green="0.0" blue="0.0" /> + </rect> + </element> + + <view name="Default Layout"> + + <!-- Background --> + <backdrop element="background"> + <bounds left="0" top="0" right="400" bottom="69" /> + </backdrop> + + <!-- LEDs --> + <bezel name="digit0" element="digit"> + <bounds left="10" top="10" right="44" bottom="59" /> + </bezel> + <bezel name="digit1" element="digit"> + <bounds left="54" top="10" right="88" bottom="59" /> + </bezel> + <bezel name="digit2" element="digit"> + <bounds left="98" top="10" right="132" bottom="59" /> + </bezel> + <bezel name="digit3" element="digit"> + <bounds left="142" top="10" right="176" bottom="59" /> + </bezel> + <bezel name="digit4" element="digit"> + <bounds left="186" top="10" right="220" bottom="59" /> + </bezel> + <bezel name="digit5" element="digit"> + <bounds left="230" top="10" right="264" bottom="59" /> + </bezel> + <bezel name="digit6" element="digit"> + <bounds left="274" top="10" right="308" bottom="59" /> + </bezel> + <bezel name="digit7" element="digit"> + <bounds left="318" top="10" right="352" bottom="59" /> + </bezel> + <bezel name="led0" element="red_led"> + <bounds left="370" right="390" top="25" bottom="45" /> + </bezel> + </view> + +</mamelayout> diff --git a/src/mame/layout/hp9825.lay b/src/mame/layout/hp9825.lay new file mode 100644 index 00000000000..d73603d07f7 --- /dev/null +++ b/src/mame/layout/hp9825.lay @@ -0,0 +1,34 @@ +<?xml version="1.0"?> +<mamelayout version="2"> + <element name="dotmatrix5dot"> + <dotmatrix5dot> + <color red="1.0" green="0" blue="0" /> + </dotmatrix5dot> + </element> + <element name="run_light" defstate="0"> + <disk state="0"> + <color red="0.25" green="0" blue="0" /> + </disk> + <disk state="1"> + <color red="1.0" green="0" blue="0" /> + </disk> + </element> + <view name="32-char display"> + <bounds x="-5" y="0" width="289" height="7"/> + <bezel name="run_light" element="run_light"> + <bounds x="-5" y="2" width="2" height="2"/> + </bezel> + <!-- 32 5x7 characters --> + <repeat count="32"> + <param name="digitidx" start="0" increment="1" /> + <param name="digit_x" start="0.0" increment="9"/> + <!-- Each of the 7 rows in a character --> + <repeat count="7"> + <param name="rowidx" start="0" increment="1" /> + <bezel name="char_~digitidx~_~rowidx~" element="dotmatrix5dot" state="0"> + <bounds x="~digit_x~" y="~rowidx~" width="5" height="1" /> + </bezel> + </repeat> + </repeat> + </view> +</mamelayout> diff --git a/src/mame/layout/hp9k_3xx.lay b/src/mame/layout/hp9k_3xx.lay new file mode 100644 index 00000000000..ba3282dd122 --- /dev/null +++ b/src/mame/layout/hp9k_3xx.lay @@ -0,0 +1,59 @@ +<?xml version="1.0"?> +<!-- +license:CC0 +copyright-holders:Sven Schnelle +Hewlett-Packard 9000/3xx Layout +--> +<mamelayout version="2"> + <element name="background"><rect><color red="0.30" green="0.30" blue="0.30"/></rect></element> + <element name="ledr" defstate="0"> + <disk state="0"><color red="1.0" green="0.0" blue="0.0"/></disk> + <disk state="1"><color red="0.2" green="0.2" blue="0.2"/></disk> + </element> + <element name="ledg" defstate="1"> + <disk state="0"><color red="0.2" green="0.2" blue="0.2"/></disk> + <disk state="1"><color red="0.0" green="1.0" blue="0.0"/></disk> + </element> + + + <element name="led_diag_7s"> <text string="7"> <color red="1.0" green="1.0" blue="1.0" /> </text> </element> + <element name="led_diag_6s"> <text string="6"> <color red="1.0" green="1.0" blue="1.0" /> </text> </element> + <element name="led_diag_5s"> <text string="5"> <color red="1.0" green="1.0" blue="1.0" /> </text> </element> + <element name="led_diag_4s"> <text string="4"> <color red="1.0" green="1.0" blue="1.0" /> </text> </element> + <element name="led_diag_3s"> <text string="3"> <color red="1.0" green="1.0" blue="1.0" /> </text> </element> + <element name="led_diag_2s"> <text string="2"> <color red="1.0" green="1.0" blue="1.0" /> </text> </element> + <element name="led_diag_1s"> <text string="1"> <color red="1.0" green="1.0" blue="1.0" /> </text> </element> + <element name="led_diag_0s"> <text string="0"> <color red="1.0" green="1.0" blue="1.0" /> </text> </element> + + <element name="led_power_s"> <text string="Power"> <color red="1.0" green="1.0" blue="1.0" /> </text> </element> + + <view name="HP9000/3xx"> + <bezel element="background"><bounds left="0" top="768" right="1024" bottom="832"/></bezel> + <bezel name="led_diag_7" element="ledr"><bounds left="20" top="776" right="36" bottom="792"/></bezel> + <bezel name="led_diag_7s" element="led_diag_7s"><bounds left="20" top="800" right="36" bottom="816"/></bezel> + <bezel name="led_diag_6" element="ledr"><bounds left="40" top="776" right="56" bottom="792"/></bezel> + <bezel name="led_diag_6s" element="led_diag_6s"><bounds left="40" top="800" right="56" bottom="816"/></bezel> + <bezel name="led_diag_5" element="ledr"><bounds left="60" top="776" right="76" bottom="792"/></bezel> + <bezel name="led_diag_5s" element="led_diag_5s"><bounds left="60" top="800" right="76" bottom="816"/></bezel> + <bezel name="led_diag_4" element="ledr"><bounds left="80" top="776" right="96" bottom="792"/></bezel> + <bezel name="led_diag_4s" element="led_diag_4s"><bounds left="80" top="800" right="96" bottom="816"/></bezel> + <bezel name="led_diag_3" element="ledr"><bounds left="100" top="776" right="116" bottom="792"/></bezel> + <bezel name="led_diag_3s" element="led_diag_3s"><bounds left="100" top="800" right="116" bottom="816"/></bezel> + <bezel name="led_diag_2" element="ledr"><bounds left="120" top="776" right="136" bottom="792"/></bezel> + <bezel name="led_diag_2s" element="led_diag_2s"><bounds left="120" top="800" right="136" bottom="816"/></bezel> + <bezel name="led_diag_1" element="ledr"><bounds left="140" top="776" right="156" bottom="792"/></bezel> + <bezel name="led_diag_1s" element="led_diag_1s"><bounds left="140" top="800" right="156" bottom="816"/></bezel> + <bezel name="led_diag_0" element="ledr"><bounds left="160" top="776" right="176" bottom="792"/></bezel> + <bezel name="led_diag_0s" element="led_diag_0s"><bounds left="160" top="800" right="176" bottom="816"/></bezel> + + <bezel name="led_power_s" element="led_power_s"><bounds left="980" top="800" right="1016" bottom="816"/></bezel> + + <bezel name="led_power" element="ledg"><bounds left="990" top="776" right="1006" bottom="792"/></bezel> + <screen index="0"><bounds x="0" y="0" width="1024" height="768"/></screen> + </view> + <view name="XGA Screen"> + <screen index="0"> + <bounds x="0" y="0" width="1024" height="768" /> + </screen> + </view> +</mamelayout> diff --git a/src/mame/layout/luckybal.lay b/src/mame/layout/luckybal.lay index 98dcae9969c..9fd43c9cdab 100644 --- a/src/mame/layout/luckybal.lay +++ b/src/mame/layout/luckybal.lay @@ -132,7 +132,7 @@ <screen index="0"> <bounds left="300" top="96" right="1432" bottom="1072" /> </screen> - + <bezel element="circle_dark"> <bounds x="3.35077282082" y="465.840100248669" width="270" height="270" /> </bezel> diff --git a/src/mame/layout/video21.lay b/src/mame/layout/video21.lay new file mode 100644 index 00000000000..8a83cdecbca --- /dev/null +++ b/src/mame/layout/video21.lay @@ -0,0 +1,134 @@ +<?xml version="1.0"?> +<mamelayout version="2"> + + <!-- define elements --> + + <element name="overlay"> + <rect> + <bounds x="0" y="0" width="256" height="97" /> + <color red="1" green="0.2" blue="0.2" /> + </rect> + <rect> + <bounds x="0" y="96" width="129" height="37" /> + <color red="0.2" green="0.5" blue="1" /> + </rect> + <rect> + <bounds x="128" y="96" width="128" height="37" /> + <color red="0.2" green="1" blue="0.1" /> + </rect> + <rect> + <bounds x="0" y="132" width="256" height="92" /> + <color red="1" green="1" blue="0.2" /> + </rect> + </element> + + <element name="start" defstate="0"> + <rect state="1"> + <color red="1.0" green="0.0" blue="0.0" /> + </rect> + <rect state="0"> + <color red="0.3" green="0.0" blue="0.0" /> + </rect> + <text string="Start"> + <color red="0.0" green="0.0" blue="0.0" /> + <bounds x="0.1" y="0.25" width="0.8" height="0.5" /> + </text> + </element> + + <element name="take" defstate="0"> + <rect state="1"> + <color red="1.0" green="0.0" blue="0.0" /> + </rect> + <rect state="0"> + <color red="0.3" green="0.0" blue="0.0" /> + </rect> + <text string="Take"> + <color red="0.0" green="0.0" blue="0.0" /> + <bounds x="0.1" y="0.25" width="0.8" height="0.5" /> + </text> + </element> + + <element name="stand" defstate="0"> + <rect state="1"> + <color red="1.0" green="0.0" blue="0.0" /> + </rect> + <rect state="0"> + <color red="0.3" green="0.0" blue="0.0" /> + </rect> + <text string="Stand"> + <color red="0.0" green="0.0" blue="0.0" /> + <bounds x="0.1" y="0.25" width="0.8" height="0.5" /> + </text> + </element> + + <element name="bet" defstate="0"> + <rect state="1"> + <color red="1.0" green="0.0" blue="0.0" /> + </rect> + <rect state="0"> + <color red="0.3" green="0.0" blue="0.0" /> + </rect> + <text string="Bet"> + <color red="0.0" green="0.0" blue="0.0" /> + <bounds x="0.1" y="0.25" width="0.8" height="0.5" /> + </text> + </element> + + <element name="accept" defstate="0"> + <rect state="1"> + <color red="1.0" green="0.0" blue="0.0" /> + </rect> + <rect state="0"> + <color red="0.3" green="0.0" blue="0.0" /> + </rect> + <text string="Accept"> + <color red="0.0" green="0.0" blue="0.0" /> + <bounds x="0.1" y="0.25" width="0.8" height="0.5" /> + </text> + </element> + + <element name="double" defstate="0"> + <rect state="1"> + <color red="1.0" green="0.0" blue="0.0" /> + </rect> + <rect state="0"> + <color red="0.3" green="0.0" blue="0.0" /> + </rect> + <text string="Double"> + <color red="0.0" green="0.0" blue="0.0" /> + <bounds x="0.1" y="0.25" width="0.8" height="0.5" /> + </text> + </element> + + + <!-- build screen --> + + <view name="Internal Layout"> + <screen index="0"> + <bounds left="0" top="0" right="4" bottom="3" /> + </screen> + <overlay name="overlay" element="overlay"> + <bounds left="0" top="0" right="4" bottom="3" /> + </overlay> + + <bezel name="lamp5" element="bet" inputtag="IN44" inputmask="0x10"> + <bounds x="0.0" y="3.05" width="0.35" height="0.24" /> + </bezel> + <bezel name="lamp0" element="start" inputtag="IN42" inputmask="0x04"> + <bounds x="0.4" y="3.05" width="0.35" height="0.24" /> + </bezel> + <bezel name="lamp1" element="take" inputtag="IN42" inputmask="0x08"> + <bounds x="0.8" y="3.05" width="0.35" height="0.24" /> + </bezel> + <bezel name="lamp2" element="stand" inputtag="IN42" inputmask="0x10"> + <bounds x="1.2" y="3.05" width="0.35" height="0.24" /> + </bezel> + <bezel name="lamp3" element="accept" inputtag="IN44" inputmask="0x40"> + <bounds x="1.85" y="3.05" width="0.35" height="0.24" /> + </bezel> + <bezel name="lamp4" element="double" inputtag="IN44" inputmask="0x20"> + <bounds x="2.25" y="3.05" width="0.35" height="0.24" /> + </bezel> + + </view> +</mamelayout> diff --git a/src/mame/machine/6883sam.cpp b/src/mame/machine/6883sam.cpp index 03d86b20a1f..3f455fc3954 100644 --- a/src/mame/machine/6883sam.cpp +++ b/src/mame/machine/6883sam.cpp @@ -156,6 +156,9 @@ void sam6883_device::configure_bank(int bank, uint8_t *memory, uint32_t memory_s /* if we're configuring a bank that never changes, update it now */ switch(bank) { + case 3: + m_space_C000.point(m_banks[3], m_banks[3].m_memory_offset); + break; case 4: m_space_FF00.point(m_banks[4], 0x0000); break; diff --git a/src/mame/machine/acs8600_ics.cpp b/src/mame/machine/acs8600_ics.cpp index 9f540e574c7..e44d040a81b 100644 --- a/src/mame/machine/acs8600_ics.cpp +++ b/src/mame/machine/acs8600_ics.cpp @@ -95,7 +95,8 @@ static const z80_daisy_config ics_daisy_chain[] = nullptr }; -MACHINE_CONFIG_START(acs8600_ics_device::device_add_mconfig) +void acs8600_ics_device::device_add_mconfig(machine_config &config) +{ Z80(config, m_icscpu, 4_MHz_XTAL); m_icscpu->set_addrmap(AS_PROGRAM, &acs8600_ics_device::ics_mem); m_icscpu->set_addrmap(AS_IO, &acs8600_ics_device::ics_io); @@ -127,16 +128,16 @@ MACHINE_CONFIG_START(acs8600_ics_device::device_add_mconfig) sio1.out_int_callback().set_inputline(m_icscpu, INPUT_LINE_IRQ0); sio1.set_cputag(m_icscpu); - MCFG_DEVICE_ADD("rs2321a", RS232_PORT, default_rs232_devices, "terminal") - MCFG_RS232_RXD_HANDLER(WRITELINE("sio1", z80sio_device, rxa_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio1", z80sio_device, dcda_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio1", z80sio_device, ctsa_w)) - MCFG_SLOT_OPTION_DEVICE_INPUT_DEFAULTS("terminal", altos8600_terminal) + rs232_port_device &rs2321a(RS232_PORT(config, "rs2321a", default_rs232_devices, "terminal")); + rs2321a.rxd_handler().set("sio1", FUNC(z80sio_device::rxa_w)); + rs2321a.dcd_handler().set("sio1", FUNC(z80sio_device::dcda_w)); + rs2321a.cts_handler().set("sio1", FUNC(z80sio_device::ctsa_w)); + rs2321a.set_option_device_input_defaults("terminal", DEVICE_INPUT_DEFAULTS_NAME(altos8600_terminal)); - MCFG_DEVICE_ADD("rs2321b", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("sio1", z80sio_device, rxb_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio1", z80sio_device, dcdb_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio1", z80sio_device, ctsb_w)) + rs232_port_device &rs2321b(RS232_PORT(config, "rs2321b", default_rs232_devices, nullptr)); + rs2321b.rxd_handler().set("sio1", FUNC(z80sio_device::rxb_w)); + rs2321b.dcd_handler().set("sio1", FUNC(z80sio_device::dcdb_w)); + rs2321b.cts_handler().set("sio1", FUNC(z80sio_device::ctsb_w)); z80sio_device &sio2(Z80SIO(config, "sio2", 8_MHz_XTAL/2)); sio2.out_txda_callback().set("rs2322a", FUNC(rs232_port_device::write_txd)); @@ -148,15 +149,15 @@ MACHINE_CONFIG_START(acs8600_ics_device::device_add_mconfig) sio2.out_int_callback().set_inputline(m_icscpu, INPUT_LINE_IRQ0); sio2.set_cputag(m_icscpu); - MCFG_DEVICE_ADD("rs2322a", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("sio2", z80sio_device, rxa_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio2", z80sio_device, dcda_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio2", z80sio_device, ctsa_w)) + rs232_port_device &rs2322a(RS232_PORT(config, "rs2322a", default_rs232_devices, nullptr)); + rs2322a.rxd_handler().set("sio2", FUNC(z80sio_device::rxa_w)); + rs2322a.dcd_handler().set("sio2", FUNC(z80sio_device::dcda_w)); + rs2322a.cts_handler().set("sio2", FUNC(z80sio_device::ctsa_w)); - MCFG_DEVICE_ADD("rs2322b", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("sio2", z80sio_device, rxb_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio2", z80sio_device, dcdb_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio2", z80sio_device, ctsb_w)) + rs232_port_device &rs2322b(RS232_PORT(config, "rs2322b", default_rs232_devices, nullptr)); + rs2322b.rxd_handler().set("sio2", FUNC(z80sio_device::rxb_w)); + rs2322b.dcd_handler().set("sio2", FUNC(z80sio_device::dcdb_w)); + rs2322b.cts_handler().set("sio2", FUNC(z80sio_device::ctsb_w)); z80sio_device &sio3(Z80SIO(config, "sio3", 8_MHz_XTAL/2)); sio3.out_txda_callback().set("rs2323a", FUNC(rs232_port_device::write_txd)); @@ -168,15 +169,15 @@ MACHINE_CONFIG_START(acs8600_ics_device::device_add_mconfig) sio3.out_int_callback().set_inputline(m_icscpu, INPUT_LINE_IRQ0); sio3.set_cputag(m_icscpu); - MCFG_DEVICE_ADD("rs2323a", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("sio3", z80sio_device, rxa_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio3", z80sio_device, dcda_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio3", z80sio_device, ctsa_w)) + rs232_port_device &rs2323a(RS232_PORT(config, "rs2323a", default_rs232_devices, nullptr)); + rs2323a.rxd_handler().set("sio3", FUNC(z80sio_device::rxa_w)); + rs2323a.dcd_handler().set("sio3", FUNC(z80sio_device::dcda_w)); + rs2323a.cts_handler().set("sio3", FUNC(z80sio_device::ctsa_w)); - MCFG_DEVICE_ADD("rs2323b", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("sio3", z80sio_device, rxb_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio3", z80sio_device, dcdb_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio3", z80sio_device, ctsb_w)) + rs232_port_device &rs2323b(RS232_PORT(config, "rs2323b", default_rs232_devices, nullptr)); + rs2323b.rxd_handler().set("sio3", FUNC(z80sio_device::rxb_w)); + rs2323b.dcd_handler().set("sio3", FUNC(z80sio_device::dcdb_w)); + rs2323b.cts_handler().set("sio3", FUNC(z80sio_device::ctsb_w)); z80sio_device &sio4(Z80SIO(config, "sio4", 8_MHz_XTAL/2)); sio4.out_txda_callback().set("rs2324a", FUNC(rs232_port_device::write_txd)); @@ -188,16 +189,16 @@ MACHINE_CONFIG_START(acs8600_ics_device::device_add_mconfig) sio4.out_int_callback().set_inputline(m_icscpu, INPUT_LINE_IRQ0); sio4.set_cputag(m_icscpu); - MCFG_DEVICE_ADD("rs2324a", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("sio4", z80sio_device, rxa_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio4", z80sio_device, dcda_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio4", z80sio_device, ctsa_w)) + rs232_port_device &rs2324a(RS232_PORT(config, "rs2324a", default_rs232_devices, nullptr)); + rs2324a.rxd_handler().set("sio4", FUNC(z80sio_device::rxa_w)); + rs2324a.dcd_handler().set("sio4", FUNC(z80sio_device::dcda_w)); + rs2324a.cts_handler().set("sio4", FUNC(z80sio_device::ctsa_w)); - MCFG_DEVICE_ADD("rs2324b", RS232_PORT, default_rs232_devices, nullptr) - MCFG_RS232_RXD_HANDLER(WRITELINE("sio4", z80sio_device, rxb_w)) - MCFG_RS232_DCD_HANDLER(WRITELINE("sio4", z80sio_device, dcdb_w)) - MCFG_RS232_CTS_HANDLER(WRITELINE("sio4", z80sio_device, ctsb_w)) -MACHINE_CONFIG_END + rs232_port_device &rs2324b(RS232_PORT(config, "rs2324b", default_rs232_devices, nullptr)); + rs2324b.rxd_handler().set("sio4", FUNC(z80sio_device::rxb_w)); + rs2324b.dcd_handler().set("sio4", FUNC(z80sio_device::dcdb_w)); + rs2324b.cts_handler().set("sio4", FUNC(z80sio_device::ctsb_w)); +} void acs8600_ics_device::device_resolve_objects() { diff --git a/src/mame/machine/amstrad.cpp b/src/mame/machine/amstrad.cpp index 05cd44546c2..eb7b97a7f1f 100644 --- a/src/mame/machine/amstrad.cpp +++ b/src/mame/machine/amstrad.cpp @@ -1923,7 +1923,7 @@ b9 b8 | PPI Function Read/Write status if ((offset & (1<<11)) == 0) { if (r1r0 < 0x03 ) - data = m_ppi->read(space, r1r0); + data = m_ppi->read(r1r0); if ( m_system_type == SYSTEM_PLUS || m_system_type == SYSTEM_GX4000 ) // Plus systems return the data written to port C (I/O status is ignored) if(r1r0 == 0x02) data = m_last_write; @@ -2128,7 +2128,7 @@ WRITE8_MEMBER(amstrad_state::amstrad_cpc_io_w) { unsigned int idx = ((offset & 0x0300) >> 8); - m_ppi->write(space, idx, data); + m_ppi->write(idx, data); if(idx == 0x02) m_last_write = data; } @@ -2311,11 +2311,11 @@ void amstrad_state::amstrad_handle_snapshot(unsigned char *pSnapshot) m_gate_array.upper_bank = pSnapshot[0x055]; /* PPI */ - m_ppi->write(space, 3, pSnapshot[0x059] & 0x0ff); + m_ppi->write(3, pSnapshot[0x059] & 0x0ff); - m_ppi->write(space, 0, pSnapshot[0x056] & 0x0ff); - m_ppi->write(space, 1, pSnapshot[0x057] & 0x0ff); - m_ppi->write(space, 2, pSnapshot[0x058] & 0x0ff); + m_ppi->write(0, pSnapshot[0x056] & 0x0ff); + m_ppi->write(1, pSnapshot[0x057] & 0x0ff); + m_ppi->write(2, pSnapshot[0x058] & 0x0ff); /* PSG */ for (i=0; i<16; i++) diff --git a/src/mame/machine/apollo.cpp b/src/mame/machine/apollo.cpp index 727e19be32e..cf485cecf97 100644 --- a/src/mame/machine/apollo.cpp +++ b/src/mame/machine/apollo.cpp @@ -1175,10 +1175,9 @@ MACHINE_CONFIG_START(apollo_state::apollo_terminal) MCFG_APOLLO_SIO_OUTPORT_CALLBACK(WRITE8(*this, apollo_state, sio_output)) MCFG_APOLLO_SIO_B_TX_CALLBACK(WRITELINE("rs232", rs232_port_device, write_txd)) - MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, "terminal") - MCFG_RS232_RXD_HANDLER(WRITELINE(APOLLO_SIO_TAG, apollo_sio, rx_b_w)) - - MCFG_SLOT_OPTION_DEVICE_INPUT_DEFAULTS("terminal", apollo_terminal) + rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, "terminal")); + rs232.rxd_handler().set(APOLLO_SIO_TAG, FUNC(apollo_sio::rx_b_w)); + rs232.set_option_device_input_defaults("terminal", DEVICE_INPUT_DEFAULTS_NAME(apollo_terminal)); MACHINE_CONFIG_END void apollo_state::init_apollo() diff --git a/src/mame/machine/apollo_dbg.cpp b/src/mame/machine/apollo_dbg.cpp index 32a86b9a272..e1181864453 100644 --- a/src/mame/machine/apollo_dbg.cpp +++ b/src/mame/machine/apollo_dbg.cpp @@ -21,7 +21,7 @@ // TRAP 0 //------------------------------------------------------ -static const char* trap0[] = { +static char const *const trap0[] = { /* 0x00 */nullptr, nullptr, /* 0x01 */"FIM_$GET_FIM_ADDR", "", /* 0x02 */nullptr, nullptr, @@ -66,7 +66,7 @@ static const char* trap0[] = { // TRAP1 //------------------------------------------------------ -static const char* trap1[] = { +static char const *const trap1[] = { /* 0x00 */nullptr, nullptr, /* 0x01 */nullptr, nullptr, /* 0x02 */"FIM_$INSTALL", "x", @@ -142,7 +142,7 @@ static const char* trap1[] = { // TRAP2 //------------------------------------------------------ -static const char* trap2[] = { +static char const *const trap2[] = { /* 0x00 */nullptr, nullptr, /* 0x01 */nullptr, nullptr, /* 0x02 */"FILE_$DELETE", "x,x", @@ -294,7 +294,7 @@ static const char* trap2[] = { // TRAP3 //------------------------------------------------------ -static const char* trap3[] = { +static char const *const trap3[] = { /* 0x00 */"PBU2_$DMA_STOP", "x,x,x", /* 0x01 */nullptr, nullptr, /* 0x02 */"FILE_$CREATE", "x,x,x", @@ -474,7 +474,7 @@ static const char* trap3[] = { // TRAP4 //------------------------------------------------------ -static const char* trap4[] = { +static char const *const trap4[] = { /* 0x00 */nullptr, nullptr, /* 0x01 */"MST_$SET_GUARD", "u,x,x,x", /* 0x02 */"MST_$UNMAP_GLOBAL", "u,x,x,x", @@ -621,7 +621,7 @@ static const char* trap4[] = { // TRAP5 //------------------------------------------------------ -static const char* trap5[] = { +static char const *const trap5[] = { /* 0x00 */nullptr, nullptr, /* 0x01 */"MST_$MAP_AREA", "x,x,x,u,x", /* 0x02 */nullptr, nullptr, @@ -732,7 +732,7 @@ static const char* trap5[] = { // TRAP7 //------------------------------------------------------ -static const char* trap7[] = { +static char const *const trap7[] = { /* 0x00 */"FILE_$LOCK", "u,x,x,x,x,x,x", /* 0x01 */"VFMT_$WRITE", "s,x,x,x,x,x,x", /* 0x02 */"MST_$MAP_AREA_AT", "x,x,x,x,x,x,x", @@ -799,7 +799,7 @@ static const char* trap7[] = { // TRAP8 //------------------------------------------------------ -static const char* trap8[] = { +static char const *const trap8[] = { /* 0x00 - 0x07 */"MST_$MAP", "u,x,x,x,x,x,x", /* 0x01 - 0x08 */"MST_$MAP_AT", "x,u,x,x,x,x,x,x", /* 0x02 - 0x07 */"MST_$MAP_GLOBAL", "u,x,x,x,x,x,x", diff --git a/src/mame/machine/at.cpp b/src/mame/machine/at.cpp index 13ecf80f24f..3554832896e 100644 --- a/src/mame/machine/at.cpp +++ b/src/mame/machine/at.cpp @@ -135,14 +135,15 @@ MACHINE_CONFIG_START(at_mb_device::device_add_mconfig) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50) at_keyboard_controller_device &keybc(AT_KEYBOARD_CONTROLLER(config, "keybc", 12_MHz_XTAL)); - keybc.system_reset_cb().set_inputline(":maincpu", INPUT_LINE_RESET); - keybc.gate_a20_cb().set_inputline(":maincpu", INPUT_LINE_A20); - keybc.input_buffer_full_cb().set("pic8259_master", FUNC(pic8259_device::ir1_w)); - keybc.keyboard_clock_cb().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); - keybc.keyboard_data_cb().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + keybc.hot_res().set_inputline(":maincpu", INPUT_LINE_RESET); + keybc.gate_a20().set_inputline(":maincpu", INPUT_LINE_A20); + keybc.kbd_irq().set("pic8259_master", FUNC(pic8259_device::ir1_w)); + keybc.kbd_clk().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb)); + keybc.kbd_data().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb)); + MCFG_DEVICE_ADD("pc_kbdc", PC_KBDC, 0) - MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_clock_w)) - MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_data_w)) + MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_clk_w)) + MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_data_w)) MACHINE_CONFIG_END diff --git a/src/mame/machine/bbc.cpp b/src/mame/machine/bbc.cpp index cea8152afd2..2ecd9e05e70 100644 --- a/src/mame/machine/bbc.cpp +++ b/src/mame/machine/bbc.cpp @@ -298,7 +298,7 @@ WRITE8_MEMBER(bbc_state::bbcm_acccon_w) } else { - space.install_read_handler(0xfc00, 0xfeff, read8_delegate(FUNC(bbc_state::bbcm_r),this)); + space.install_read_handler(0xfc00, 0xfeff, read8_delegate(FUNC(bbc_state::bbcm_r), this)); } } @@ -403,21 +403,22 @@ WRITE8_MEMBER(bbc_state::bbc_memorybm7_w) READ8_MEMBER(bbc_state::bbcm_r) { - long myo; + uint8_t data = 0xff; + uint8_t myo; - if (offset<=0x0ff) /* FRED */ + switch (offset >> 8) { - return 0xff; - }; + case 0x00: /* FRED */ + if (m_1mhzbus) return m_1mhzbus->fred_r(space, offset & 0xff); + break; - if ((offset>=0x100) && (offset<=0x1ff)) /* JIM */ - { - return 0xff; - }; + case 0x01: /* JIM */ + if (m_1mhzbus) return m_1mhzbus->jim_r(space, offset & 0xff); + break; - if ((offset>=0x200) && (offset<=0x2ff)) /* SHEILA */ - { - myo = offset-0x200; + case 0x02: /* SHEILA */ + data = 0xfe; + myo = offset & 0xff; if ((myo>=0x00) && (myo<=0x06) && (myo+0x01) & 1) return m_hd6845->status_r(space, myo-0x00); /* Video controller */ if ((myo>=0x01) && (myo<=0x07) && (myo & 1)) return m_hd6845->register_r(space, myo-0x01); if ((myo>=0x08) && (myo<=0x0f)) return m_acia ? m_acia->read(space, myo & 0x01) : 0xfe; /* Serial controller */ @@ -425,15 +426,11 @@ READ8_MEMBER(bbc_state::bbcm_r) if ((myo>=0x18) && (myo<=0x1f)) return m_upd7002 ? m_upd7002->read(space, myo-0x18) : 0xfe; /* A to D converter */ if ((myo>=0x20) && (myo<=0x23)) return 0xfe; /* VideoULA */ if ((myo>=0x24) && (myo<=0x27)) return bbcm_wd177xl_read(space, myo-0x24); /* 177x Control Latch */ - if ((myo>=0x28) && (myo<=0x2f) && (m_wd1770)) return m_wd1770->read(myo-0x28); /* 1770 Controller */ - if ((myo>=0x28) && (myo<=0x2f) && (m_wd1772)) return m_wd1772->read(myo-0x28); /* 1772 Controller */ - if ((myo>=0x28) && (myo<=0x2f)) return 0xfe; /* No Controller */ - if ((myo>=0x30) && (myo<=0x33)) return 0xfe; + if ((myo>=0x28) && (myo<=0x2f) && (m_wd1770)) return m_wd1770->read(myo-0x28); /* 1770 Controller */ + if ((myo>=0x28) && (myo<=0x2f) && (m_wd1772)) return m_wd1772->read(myo-0x28); /* 1772 Controller */ if ((myo>=0x34) && (myo<=0x37)) return bbcm_acccon_r(space, myo-0x34); /* ACCCON */ - if ((myo>=0x38) && (myo<=0x3f)) return 0xfe; /* NC ?? */ if ((myo>=0x40) && (myo<=0x5f)) return m_via6522_0->read(myo-0x40); if ((myo>=0x60) && (myo<=0x7f)) return m_via6522_1 ? m_via6522_1->read(myo-0x60) : 0xfe; - if ((myo>=0x80) && (myo<=0x9f)) return 0xfe; if ((myo>=0xa0) && (myo<=0xbf)) return m_adlc ? m_adlc->read(space, myo & 0x03) : 0xfe; if ((myo>=0xc0) && (myo<=0xdf)) return 0xff; if ((myo>=0xe0) && (myo<=0xff)) @@ -441,17 +438,27 @@ READ8_MEMBER(bbc_state::bbcm_r) if (m_intube && m_acccon_itu) return m_intube->host_r(space, myo-0xe0); /* Internal TUBE */ if (m_extube && !m_acccon_itu) return m_extube->host_r(space, myo-0xe0); /* External TUBE */ } + break; } - return 0xfe; + return data; } WRITE8_MEMBER(bbc_state::bbcm_w) { - long myo; + uint8_t myo; - if ((offset>=0x200) && (offset<=0x2ff)) /* SHEILA */ + switch (offset >> 8) { - myo=offset-0x200; + case 0x00: /* FRED */ + if (m_1mhzbus) m_1mhzbus->fred_w(space, offset & 0xff, data); + break; + + case 0x01: /* JIM */ + if (m_1mhzbus) m_1mhzbus->jim_w(space, offset & 0xff, data); + break; + + case 0x02: /* SHEILA */ + myo = offset & 0xff; if ((myo>=0x00) && (myo<=0x06) && (myo+0x01) & 1) m_hd6845->address_w(space, myo-0x00, data); /* Video Controller */ if ((myo>=0x01) && (myo<=0x07) && (myo & 1)) m_hd6845->register_w(space, myo-0x01, data); if ((myo>=0x08) && (myo<=0x0f)) if (m_acia) m_acia->write(space, myo & 0x01, data); /* Serial controller */ @@ -459,22 +466,20 @@ WRITE8_MEMBER(bbc_state::bbcm_w) if ((myo>=0x18) && (myo<=0x1f) && (m_upd7002)) m_upd7002->write(space, myo-0x18, data); /* A to D converter */ if ((myo>=0x20) && (myo<=0x23)) bbc_videoULA_w(space, myo-0x20, data); /* VideoULA */ if ((myo>=0x24) && (myo<=0x27) && (m_wd1770)) bbcm_wd1770l_write(space, myo-0x24, data); /* disc control latch */ - if ((myo>=0x28) && (myo<=0x2f) && (m_wd1770)) m_wd1770->write(myo-0x28, data); /* 1770 Controller */ + if ((myo>=0x28) && (myo<=0x2f) && (m_wd1770)) m_wd1770->write(myo-0x28, data); /* 1770 Controller */ if ((myo>=0x24) && (myo<=0x27) && (m_wd1772)) bbcm_wd1772l_write(space, myo-0x24, data); /* disc control latch */ - if ((myo>=0x28) && (myo<=0x2f) && (m_wd1772)) m_wd1772->write(myo-0x28, data); /* 1772 Controller */ + if ((myo>=0x28) && (myo<=0x2f) && (m_wd1772)) m_wd1772->write(myo-0x28, data); /* 1772 Controller */ if ((myo>=0x30) && (myo<=0x33)) page_selectbm_w(space, myo-0x30, data); /* ROMSEL */ if ((myo>=0x34) && (myo<=0x37)) bbcm_acccon_w(space, myo-0x34, data); /* ACCCON */ - //if ((myo>=0x38) && (myo<=0x3f)) /* NC ?? */ if ((myo>=0x40) && (myo<=0x5f)) m_via6522_0->write(myo-0x40, data); if ((myo>=0x60) && (myo<=0x7f) && (m_via6522_1)) m_via6522_1->write(myo-0x60, data); - //if ((myo>=0x80) && (myo<=0x9f)) if ((myo>=0xa0) && (myo<=0xbf) && (m_adlc)) m_adlc->write(space, myo & 0x03, data); - //if ((myo>=0xc0) && (myo<=0xdf)) if ((myo>=0xe0) && (myo<=0xff)) { if (m_intube && m_acccon_itu) m_intube->host_w(space, myo-0xe0, data); /* Internal TUBE */ if (m_extube && !m_acccon_itu) m_extube->host_w(space, myo-0xe0, data); /* External TUBE */ } + break; } } @@ -952,11 +957,18 @@ READ8_MEMBER(bbc_state::bbcb_via_system_read_portb) } +WRITE_LINE_MEMBER(bbc_state::lpstb_w) +{ + m_via6522_0->write_cb2(state); + if (!state) + m_hd6845->assert_light_pen_input(); +} + /************************************** BBC Joystick Support **************************************/ -UPD7002_GET_ANALOGUE(bbc_state::BBC_get_analogue_input) +int bbc_state::BBC_get_analogue_input(int channel_number) { if (m_analog) return ((0xff - m_analog->ch_r(channel_number)) << 8); @@ -964,7 +976,7 @@ UPD7002_GET_ANALOGUE(bbc_state::BBC_get_analogue_input) return 0xff; } -UPD7002_EOC(bbc_state::BBC_uPD7002_EOC) +void bbc_state::BBC_uPD7002_EOC(int data) { m_via6522_0->write_cb1(data); } @@ -1270,6 +1282,7 @@ WRITE_LINE_MEMBER(bbc_state::motor_w) con->get_device()->mon_w(!state); } } + m_i8271->ready_w(!state); } WRITE_LINE_MEMBER(bbc_state::side_w) @@ -1482,9 +1495,9 @@ image_init_result bbc_state::bbcm_load_cart(device_image_interface &image, gener return image_init_result::FAIL; } - slot->rom_alloc(size_lo + size_hi, GENERIC_ROM8_WIDTH, ENDIANNESS_LITTLE); - memcpy(slot->get_rom_base() + 0, image.get_software_region("uprom"), size_hi); - memcpy(slot->get_rom_base() + size_hi, image.get_software_region("lorom"), size_lo); + slot->rom_alloc(0x8000, GENERIC_ROM8_WIDTH, ENDIANNESS_LITTLE); + memcpy(slot->get_rom_base() + 0x0000, image.get_software_region("lorom"), size_lo); + memcpy(slot->get_rom_base() + 0x4000, image.get_software_region("uprom"), size_hi); } return image_init_result::PASS; diff --git a/src/mame/machine/cat702.h b/src/mame/machine/cat702.h index 4d25407e4a6..997c55bf241 100644 --- a/src/mame/machine/cat702.h +++ b/src/mame/machine/cat702.h @@ -10,16 +10,13 @@ DECLARE_DEVICE_TYPE(CAT702, cat702_device) -#define MCFG_CAT702_DATAOUT_HANDLER(_devcb) \ - downcast<cat702_device &>(*device).set_dataout_handler(DEVCB_##_devcb); - class cat702_device : public device_t { public: cat702_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // configuration helpers - template <class Object> devcb_base &set_dataout_handler(Object &&cb) { return m_dataout_handler.set_callback(std::forward<Object>(cb)); } + auto dataout_handler() { return m_dataout_handler.bind(); } DECLARE_WRITE_LINE_MEMBER(write_select); DECLARE_WRITE_LINE_MEMBER(write_datain); diff --git a/src/mame/machine/coco_vhd.cpp b/src/mame/machine/coco_vhd.cpp index 2384127346e..c75e278caee 100644 --- a/src/mame/machine/coco_vhd.cpp +++ b/src/mame/machine/coco_vhd.cpp @@ -48,7 +48,7 @@ CONSTANTS ***************************************************************************/ -#define VERBOSE 1 +#define VERBOSE 0 #define VHDSTATUS_OK 0x00 #define VHDSTATUS_NO_VHD_ATTACHED 0x02 diff --git a/src/mame/machine/dai.cpp b/src/mame/machine/dai.cpp index df557ed0fed..a7864d4c398 100644 --- a/src/mame/machine/dai.cpp +++ b/src/mame/machine/dai.cpp @@ -190,12 +190,12 @@ WRITE8_MEMBER(dai_state::dai_io_discrete_devices_w) READ8_MEMBER(dai_state::dai_pit_r) { - return m_pit->read(space, (offset >> 1) & 3); + return m_pit->read((offset >> 1) & 3); } WRITE8_MEMBER(dai_state::dai_pit_w) { - m_pit->write(space, (offset >> 1) & 3, data); + m_pit->write((offset >> 1) & 3, data); } /*************************************************************************** diff --git a/src/mame/machine/esqpanel.h b/src/mame/machine/esqpanel.h index b440180331a..41307847832 100644 --- a/src/mame/machine/esqpanel.h +++ b/src/mame/machine/esqpanel.h @@ -114,10 +114,6 @@ protected: virtual bool write_contents(std::ostream &o) override; required_device<esq2x40_device> m_vfd; - -private: - static const char *html; - static const char *js; }; class esqpanel2x40_sq1_device : public esqpanel_device { diff --git a/src/mame/machine/gamecom.cpp b/src/mame/machine/gamecom.cpp index b68480574a6..231227c3a19 100644 --- a/src/mame/machine/gamecom.cpp +++ b/src/mame/machine/gamecom.cpp @@ -232,10 +232,6 @@ READ8_MEMBER( gamecom_state::gamecom_pio_r ) READ8_MEMBER( gamecom_state::gamecom_internal_r ) { -// ToDo: Read from vblank bit -// if(SM8521_LCV == offset + 0x20) -// popmessage("Read from vblank bit, TODO"); - return m_p_ram[offset + 0x20]; } @@ -295,21 +291,23 @@ WRITE8_MEMBER( gamecom_state::gamecom_internal_w ) data &= 0x7f; break; case SM8521_TM0D: - m_timer[0].check_value = data; - return; + m_timer[0].upcounter_max = data; + data = 0; + break; case SM8521_TM0C: - m_timer[0].enabled = data & 0x80; - m_timer[0].state_limit = gamecom_timer_limit[data & 0x07] >> 1; - m_timer[0].state_count = 0; + m_timer[0].enabled = BIT(data, 7); + m_timer[0].prescale_max = gamecom_timer_limit[data & 0x07] >> 1; + m_timer[0].prescale_count = 0; m_p_ram[SM8521_TM0D] = 0; break; case SM8521_TM1D: - m_timer[1].check_value = data; - return; + m_timer[1].upcounter_max = data; + data = 0; + break; case SM8521_TM1C: - m_timer[1].enabled = data & 0x80; - m_timer[1].state_limit = gamecom_timer_limit[data & 0x07] >> 1; - m_timer[1].state_count = 0; + m_timer[1].enabled = BIT(data, 7); + m_timer[1].prescale_max = gamecom_timer_limit[data & 0x07] >> 1; + m_timer[1].prescale_count = 0; m_p_ram[SM8521_TM1D] = 0; break; case SM8521_CLKT: /* bit 6-7 */ @@ -319,7 +317,7 @@ WRITE8_MEMBER( gamecom_state::gamecom_internal_w ) if ( data & 0x40 ) { /* timer resolution 1 minute */ - m_clock_timer->adjust(attotime::from_seconds(1), 0, attotime::from_seconds(60)); + m_clock_timer->adjust(attotime::from_seconds(60), 0, attotime::from_seconds(60)); } else { @@ -457,46 +455,40 @@ WRITE8_MEMBER( gamecom_state::gamecom_internal_w ) /* The manual is not conclusive as to which bit of the DMVP register (offset 0x3D) determines - which page for source or destination is used */ + which page for source or destination is used. + Also, there's nothing about what happens if the block overflows the source or destination. */ WRITE8_MEMBER( gamecom_state::gamecom_handle_dma ) { - uint8_t dmc = m_p_ram[SM8521_DMC]; - m_dma.overwrite_mode = dmc & 0x01; - m_dma.transfer_mode = dmc & 0x06; - m_dma.decrement_x = dmc & 0x08; - m_dma.decrement_y = dmc & 0x10; - m_dma.enabled = dmc & 0x80; - if ( !m_dma.enabled ) - { + u8 dmc = m_p_ram[SM8521_DMC]; + if (!BIT(dmc, 7)) return; - } - m_dma.width_x = m_p_ram[SM8521_DMDX]; - m_dma.width_x_count = 0; - m_dma.width_y = m_p_ram[SM8521_DMDY]; - m_dma.width_y_count = 0; + m_dma.overwrite_mode = BIT(dmc, 0); + m_dma.transfer_mode = dmc & 0x06; + m_dma.adjust_x = BIT(dmc, 3) ? -1 : 1; + m_dma.decrement_y = BIT(dmc, 4); + + m_dma.block_width = m_p_ram[SM8521_DMDX]; + m_dma.block_height = m_p_ram[SM8521_DMDY]; m_dma.source_x = m_p_ram[SM8521_DMX1]; - m_dma.source_x_current = m_dma.source_x; + m_dma.source_x_current = m_dma.source_x & 3; m_dma.source_y = m_p_ram[SM8521_DMY1]; m_dma.source_width = ( m_p_ram[SM8521_LCH] & 0x20 ) ? 50 : 40; + m_dma.dest_width = m_dma.source_width; m_dma.dest_x = m_p_ram[SM8521_DMX2]; - m_dma.dest_x_current = m_dma.dest_x; + m_dma.dest_x_current = m_dma.dest_x & 3; m_dma.dest_y = m_p_ram[SM8521_DMY2]; - m_dma.dest_width = ( m_p_ram[SM8521_LCH] & 0x20 ) ? 50 : 40; - m_dma.palette[0] = m_p_ram[SM8521_DMPL] & 0x03; - m_dma.palette[1] = ( m_p_ram[SM8521_DMPL] >> 2 ) & 3; - m_dma.palette[2] = ( m_p_ram[SM8521_DMPL] >> 4 ) & 3; - m_dma.palette[3] = m_p_ram[SM8521_DMPL] >> 6; + m_dma.palette = m_p_ram[SM8521_DMPL]; m_dma.source_mask = 0x1FFF; m_dma.dest_mask = 0x1FFF; -// logerror("DMA: width %Xx%X, source (%X,%X), dest (%X,%X), transfer_mode %X, banks %X \n", m_dma.width_x, m_dma.width_y, m_dma.source_x, m_dma.source_y, m_dma.dest_x, m_dma.dest_y, m_dma.transfer_mode, m_p_ram[SM8521_DMVP] ); + m_dma.source_bank = &m_p_videoram[BIT(m_p_ram[SM8521_DMVP], 0) ? 0x2000 : 0x0000]; + m_dma.dest_bank = &m_p_videoram[BIT(m_p_ram[SM8521_DMVP], 1) ? 0x2000 : 0x0000]; +// logerror("DMA: width %Xx%X, source (%X,%X), dest (%X,%X), transfer_mode %X, banks %X \n", block_width, block_height, m_dma.source_x, m_dma.source_y, m_dma.dest_x, m_dma.dest_y, transfer_mode, m_p_ram[SM8521_DMVP] ); // logerror( " Palette: %d, %d, %d, %d\n", m_dma.palette[0], m_dma.palette[1], m_dma.palette[2], m_dma.palette[3] ); switch( m_dma.transfer_mode ) { case 0x00: /* VRAM->VRAM */ - m_dma.source_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x01) ? 0x2000 : 0x0000]; - m_dma.dest_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x02) ? 0x2000 : 0x0000]; break; case 0x02: /* ROM->VRAM */ @@ -508,18 +500,14 @@ WRITE8_MEMBER( gamecom_state::gamecom_handle_dma ) else if (m_cart_ptr) m_dma.source_bank = m_cart_ptr + (m_p_ram[SM8521_DMBR] << 14); - - m_dma.dest_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x02) ? 0x2000 : 0x0000]; break; case 0x04: /* Extend RAM->VRAM */ m_dma.source_width = 64; m_dma.source_bank = &m_p_nvram[0x0000]; - m_dma.dest_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x02) ? 0x2000 : 0x0000]; break; case 0x06: /* VRAM->Extend RAM */ - m_dma.source_bank = &m_p_videoram[(m_p_ram[SM8521_DMVP] & 0x01) ? 0x2000 : 0x0000]; m_dma.dest_width = 64; m_dma.dest_bank = &m_p_nvram[0x0000]; break; @@ -530,53 +518,51 @@ WRITE8_MEMBER( gamecom_state::gamecom_handle_dma ) m_dma.dest_current += m_dma.dest_x >> 2; m_dma.source_line = m_dma.source_current; m_dma.dest_line = m_dma.dest_current; - m_dma.state_count = 0; - - unsigned y_count, x_count; - for( y_count = 0; y_count <= m_dma.width_y; y_count++ ) + for( u16 y_count = 0; y_count <= m_dma.block_height; y_count++ ) { - for( x_count = 0; x_count <= m_dma.width_x; x_count++ ) + for( u16 x_count = 0; x_count <= m_dma.block_width; x_count++ ) { - uint16_t src_addr = m_dma.source_current & m_dma.source_mask; - uint16_t dest_addr = m_dma.dest_current & m_dma.dest_mask; - uint8_t dest_adj = (3 - (m_dma.dest_x_current & 3)) << 1; - uint8_t src_adj = (3 - (m_dma.source_x_current & 3)) << 1; + u16 src_addr = m_dma.source_current & m_dma.source_mask; + u16 dst_addr = m_dma.dest_current & m_dma.dest_mask; + u8 dst_adj = (m_dma.dest_x_current ^ 3) << 1; + u8 src_adj = (m_dma.source_x_current ^ 3) << 1; /* handle DMA for 1 pixel */ // Get new pixel - uint8_t source_pixel = (m_dma.source_bank[src_addr] >> src_adj) & 3; + u8 source_pixel = (m_dma.source_bank[src_addr] >> src_adj) & 3; // If overwrite mode, write new pixel if ( m_dma.overwrite_mode || source_pixel) { // Get 4 pixels and remove the one about to be replaced - uint8_t other_pixels = m_dma.dest_bank[dest_addr] & ~(3 << dest_adj); + u8 other_pixels = m_dma.dest_bank[dst_addr] & ~(3 << dst_adj); // Get palette of new pixel and place into the hole - m_dma.dest_bank[dest_addr] = other_pixels | (m_dma.palette[ source_pixel ] << dest_adj); + if (m_dma.transfer_mode == 6 || m_dma.transfer_mode == 0) + m_dma.dest_bank[dst_addr] = other_pixels | (source_pixel << dst_adj); + else + m_dma.dest_bank[dst_addr] = other_pixels | (((m_dma.palette >> (source_pixel << 1)) & 3) << dst_adj); } /* Advance a pixel */ - if ( m_dma.decrement_x ) - { - m_dma.source_x_current--; - if ( ( m_dma.source_x_current & 0x03 ) == 0x03 ) - m_dma.source_current--; - } - else + m_dma.source_x_current += m_dma.adjust_x; + if (BIT(m_dma.source_x_current, 2)) { - m_dma.source_x_current++; - if ( ( m_dma.source_x_current & 0x03 ) == 0x00 ) - m_dma.source_current++; + m_dma.source_current += m_dma.adjust_x; + m_dma.source_x_current &= 3; } + m_dma.dest_x_current++; - if ( ( m_dma.dest_x_current & 0x03 ) == 0x00 ) + if (BIT(m_dma.dest_x_current, 2)) + { m_dma.dest_current++; + m_dma.dest_x_current &= 3; + } } /* Advance a line */ - m_dma.source_x_current = m_dma.source_x; - m_dma.dest_x_current = m_dma.dest_x; + m_dma.source_x_current = m_dma.source_x & 3; + m_dma.dest_x_current = m_dma.dest_x & 3; if ( m_dma.decrement_y ) m_dma.source_line -= m_dma.source_width; else @@ -585,7 +571,8 @@ WRITE8_MEMBER( gamecom_state::gamecom_handle_dma ) m_dma.dest_line += m_dma.dest_width; m_dma.dest_current = m_dma.dest_line; } - m_dma.enabled = 0; + + m_p_ram[SM8521_DMC] &= 0x7f; // finished; turn off dma m_maincpu->set_input_line(sm8500_cpu_device::DMA_INT, ASSERT_LINE ); } @@ -593,29 +580,33 @@ WRITE8_MEMBER( gamecom_state::gamecom_update_timers ) { if ( m_timer[0].enabled ) { - m_timer[0].state_count += data; - while ( m_timer[0].state_count >= m_timer[0].state_limit ) + m_timer[0].prescale_count += data; + while ( m_timer[0].prescale_count >= m_timer[0].prescale_max ) { - m_timer[0].state_count -= m_timer[0].state_limit; + m_timer[0].prescale_count -= m_timer[0].prescale_max; m_p_ram[SM8521_TM0D]++; - if ( m_p_ram[SM8521_TM0D] >= m_timer[0].check_value ) + if ( m_p_ram[SM8521_TM0D] >= m_timer[0].upcounter_max ) { m_p_ram[SM8521_TM0D] = 0; -// m_maincpu->set_input_line(sm8500_cpu_device::TIM0_INT, ASSERT_LINE ); // this causes crazy flickering + // check if irq is enabled before calling, + // to stop monopoly choking up the interrupt queue + if (BIT(m_p_ram[SM8521_IE0], 6) && BIT(m_p_ram[SM8521_PS1], 0)) + m_maincpu->set_input_line(sm8500_cpu_device::TIM0_INT, ASSERT_LINE ); } } } if ( m_timer[1].enabled ) { - m_timer[1].state_count += data; - while ( m_timer[1].state_count >= m_timer[1].state_limit ) + m_timer[1].prescale_count += data; + while ( m_timer[1].prescale_count >= m_timer[1].prescale_max ) { - m_timer[1].state_count -= m_timer[1].state_limit; + m_timer[1].prescale_count -= m_timer[1].prescale_max; m_p_ram[SM8521_TM1D]++; - if ( m_p_ram[SM8521_TM1D] >= m_timer[1].check_value ) + if ( m_p_ram[SM8521_TM1D] >= m_timer[1].upcounter_max ) { m_p_ram[SM8521_TM1D] = 0; - m_maincpu->set_input_line(sm8500_cpu_device::TIM1_INT, ASSERT_LINE ); + if (BIT(m_p_ram[SM8521_IE1], 6) && BIT(m_p_ram[SM8521_PS1], 0) && ((m_p_ram[SM8521_PS0] & 7) < 4)) + m_maincpu->set_input_line(sm8500_cpu_device::TIM1_INT, ASSERT_LINE ); } } } diff --git a/src/mame/machine/hp9825_tape.cpp b/src/mame/machine/hp9825_tape.cpp new file mode 100644 index 00000000000..63234e2f3aa --- /dev/null +++ b/src/mame/machine/hp9825_tape.cpp @@ -0,0 +1,963 @@ +// license:BSD-3-Clause +// copyright-holders:F. Ulivi +/********************************************************************* + + hp9825_tape.cpp + + HP9825 tape sub-system + +*********************************************************************/ + +#include "emu.h" +#include "hp9825_tape.h" +#include "machine/rescap.h" + +// Debugging +#include "logmacro.h" +#define LOG_REG_MASK (LOG_GENERAL << 1) +#define LOG_REG(...) LOGMASKED(LOG_REG_MASK, __VA_ARGS__) +#define LOG_TMR_MASK (LOG_REG_MASK << 1) +#define LOG_TMR(...) LOGMASKED(LOG_TMR_MASK, __VA_ARGS__) +#define LOG_DBG_MASK (LOG_TMR_MASK << 1) +#define LOG_DBG(...) LOGMASKED(LOG_DBG_MASK, __VA_ARGS__) +#undef VERBOSE +#define VERBOSE (LOG_GENERAL) + +// Bit manipulation +namespace { + template<typename T> constexpr T BIT_MASK(unsigned n) + { + return (T)1U << n; + } + + template<typename T> void BIT_CLR(T& w , unsigned n) + { + w &= ~BIT_MASK<T>(n); + } + + template<typename T> void BIT_SET(T& w , unsigned n) + { + w |= BIT_MASK<T>(n); + } +} + +// Constants +constexpr double FAST_SPEED = 90.0; // Fast speed: 90 ips +constexpr double SLOW_SPEED = 22.0; // Slow speed: 22 ips +constexpr double MIN_RD_SPEED = 22.0; // Minimum speed to read data off the tape +constexpr double MOVING_THRESHOLD = 2.0; // Tape is moving (from MVG bit POV) when speed > 2.0 ips +constexpr double ACCELERATION = 1200.0; // Acceleration when speed set point is changed: 1200 ips^2 +constexpr unsigned TACH_TICKS_PER_INCH = 483; // Tachometer pulses per inch +constexpr double INVERSION_MARGIN = 1e-5; // Margin to ensure speed is away from 0 when motion is inverted (10 µs) +constexpr hti_format_t::tape_pos_t TACH_TICK_LENGTH = hti_format_t::ONE_INCH_POS / TACH_TICKS_PER_INCH; // Length of each tach tick + +// Bits in command register +enum : unsigned { + CMD_REG_MOTOR_BIT = 7, // Motor on (0) + CMD_REG_WR_GATE_BIT = 6, // Write gate (0) + CMD_REG_SPEED_BIT = 5, // Tape speed (1 = slow) + CMD_REG_DIR_BIT = 4, // Tape direction (1 = fwd) + CMD_REG_FLG_SEL_BIT = 3, // FLG selection (0 = tacho pulses, 1 = bit clock) + CMD_REG_THRESHOLD_BIT = 2, // Threshold selection + CMD_REG_DMA_EN_BIT = 1, // DMA enable (0) + CMD_REG_TRACK_SEL_BIT = 0 // Track selection (1 = A) +}; + +// Bits in status register +enum : unsigned { + STAT_REG_WPR_BIT = 7, // Write protected (1) + STAT_REG_DIR_BIT = 6, // Tape direction (1 = rev) + STAT_REG_MVG_BIT = 5, // Tape moving (1) + STAT_REG_GAP_BIT = 4, // Gap (1) or data (0) + STAT_REG_COUT_BIT = 2, // Cartridge out (1) + STAT_REG_SVF_BIT = 1, // Servo failure (1) + STAT_REG_EOT_BIT = 0 // End of tape (1) +}; + +// Timers +enum { + BIT_TMR_ID, + TACHO_TMR_ID, + HOLE_TMR_ID, + INV_TMR_ID +}; + +// Device type definition +DEFINE_DEVICE_TYPE(HP9825_TAPE, hp9825_tape_device, "hp9825_tape", "HP9825 tape sub-system") + +hp9825_tape_device::hp9825_tape_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +: device_t(mconfig , HP9825_TAPE , tag , owner , clock) + , device_image_interface(mconfig , *this) + , m_flg_handler(*this) + , m_sts_handler(*this) + , m_dmar_handler(*this) + , m_led_handler(*this) + , m_short_gap_timer(*this , "short_tmr") + , m_long_gap_timer(*this , "long_tmr") + , m_image() + , m_image_dirty(false) +{ +} + +MACHINE_CONFIG_START(hp9825_tape_device::device_add_mconfig) + TTL74123(config , m_short_gap_timer , 0); + m_short_gap_timer->set_connection_type(TTL74123_NOT_GROUNDED_NO_DIODE); + m_short_gap_timer->set_resistor_value(RES_K(37.9)); + m_short_gap_timer->set_capacitor_value(CAP_N(10)); + m_short_gap_timer->set_a_pin_value(0); + m_short_gap_timer->set_clear_pin_value(1); + m_short_gap_timer->out_cb().set(FUNC(hp9825_tape_device::short_gap_w)); + + TTL74123(config , m_long_gap_timer , 0); + m_long_gap_timer->set_connection_type(TTL74123_NOT_GROUNDED_NO_DIODE); + m_long_gap_timer->set_resistor_value(RES_K(28.7)); + m_long_gap_timer->set_capacitor_value(CAP_U(0.22)); + m_long_gap_timer->set_clear_pin_value(1); + m_long_gap_timer->out_cb().set(FUNC(hp9825_tape_device::long_gap_w)); +MACHINE_CONFIG_END + +void hp9825_tape_device::device_start() +{ + m_flg_handler.resolve_safe(); + m_sts_handler.resolve_safe(); + m_dmar_handler.resolve_safe(); + m_led_handler.resolve_safe(); + + m_bit_timer = timer_alloc(BIT_TMR_ID); + m_tacho_timer = timer_alloc(TACHO_TMR_ID); + m_hole_timer = timer_alloc(HOLE_TMR_ID); + m_inv_timer = timer_alloc(INV_TMR_ID); + + save_item(NAME(m_cmd_reg)); + save_item(NAME(m_stat_reg)); + save_item(NAME(m_flg)); + save_item(NAME(m_sts)); + save_item(NAME(m_data_out)); + save_item(NAME(m_data_in)); + save_item(NAME(m_exception)); + save_item(NAME(m_search_complete)); + save_item(NAME(m_dma_req)); + save_item(NAME(m_in_gap)); + save_item(NAME(m_no_go)); + save_item(NAME(m_present)); + save_item(NAME(m_valid_bits)); + save_item(NAME(m_trans_cnt)); + save_item(NAME(m_short_gap_out)); + save_item(NAME(m_long_gap_out)); + save_item(NAME(m_image_dirty)); + save_item(NAME(m_tape_pos)); + save_item(NAME(m_next_bit_pos)); + save_item(NAME(m_next_tacho_pos)); + save_item(NAME(m_next_hole_pos)); + save_item(NAME(m_speed)); + save_item(NAME(m_start_time)); + save_item(NAME(m_accelerating)); + save_item(NAME(m_rw_stat)); + save_item(NAME(m_rd_it_valid)); + save_item(NAME(m_rw_word)); + save_item(NAME(m_bit_idx)); + save_item(NAME(m_gap_start)); +} + +void hp9825_tape_device::device_reset() +{ + clear_state(); +} + +void hp9825_tape_device::clear_state() +{ + m_cmd_reg = ~0; + m_stat_reg = 0; + // Not actually reset in real hw + m_flg = false; + m_sts = true; + m_data_out = false; + m_data_in = false; + m_exception = false; + m_search_complete = false; + m_dma_req = false; + m_in_gap = true; + m_no_go = false; + m_valid_bits = false; + m_trans_cnt = 0; + m_tape_pos = 80 * hti_format_t::ONE_INCH_POS; + m_speed = 0.0; + m_start_time = attotime::never; + m_accelerating = false; + m_rw_stat = RW_IDLE; + m_rd_it_valid = false; + m_gap_start = hti_format_t::NULL_TAPE_POS; + + m_short_gap_timer->b_w(0); + m_long_gap_timer->a_w(1); + m_long_gap_timer->b_w(0); + + m_flg_handler(false); + m_sts_handler(true); + m_dmar_handler(false); + m_led_handler(false); + + m_bit_timer->reset(); + m_tacho_timer->reset(); + m_hole_timer->reset(); + m_inv_timer->reset(); + + set_tape_present(false); + set_tape_present(is_loaded()); +} + +void hp9825_tape_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + LOG_TMR("%.6f TMR %d s=%.3f p=%d a=%d\n" , machine().time().as_double() , id , m_speed , m_tape_pos , m_accelerating); + update_speed_pos(); + + switch (id) { + case BIT_TMR_ID: + m_tape_pos = m_next_bit_pos; + if (m_rw_stat == RW_READING) { + // Reading + // Tape pos here is aligned with the beginning of bit cell. It'd be more correct + // to align with end of cell, though. This solution is a lot simpler and + // it's basically harmless. + + // 17th bit is sync (always 1) + bool bit = m_bit_idx == 16 ? true : BIT(m_rd_it->second , 15 - m_bit_idx); + rd_bit(bit); + if (is_moving_fwd()) { + m_bit_idx++; + if (m_bit_idx >= 17) { + m_rd_it_valid = m_image.adv_it(current_track() , true , m_rd_it) != hti_format_t::ADV_NO_MORE_DATA; + load_rd_word(); + } else { + time_to_distance(bit_size(bit), m_next_bit_pos, m_bit_timer); + } + } else { + if (m_bit_idx > 0) { + m_bit_idx--; + time_to_distance(-bit_size(bit), m_next_bit_pos, m_bit_timer); + } else { + m_rd_it_valid = m_image.adv_it(current_track() , false , m_rd_it) != hti_format_t::ADV_NO_MORE_DATA; + load_rd_word(); + } + } + } else if (m_rw_stat == RW_WRITING) { + // Writing + // Tape pos is aligned with beginning of bit cell + bool bit = m_data_in; + if (BIT(m_cmd_reg , CMD_REG_FLG_SEL_BIT)) { + set_flg(true); + } + wr_bit(bit); + time_to_distance(bit_size(bit), m_next_bit_pos, m_bit_timer); + } + break; + + case TACHO_TMR_ID: + m_tape_pos = m_next_tacho_pos; + if (!BIT(m_cmd_reg , CMD_REG_FLG_SEL_BIT)) { + set_flg(true); + } + adjust_tacho_timer(); + break; + + case HOLE_TMR_ID: + m_tape_pos = m_next_hole_pos; + BIT_SET(m_stat_reg , STAT_REG_EOT_BIT); + update_sts(); + adjust_hole_timer(); + break; + + case INV_TMR_ID: + // In itself it does nothing (all work is in update_speed_pos) + break; + + default: + break; + } + LOG_TMR("%.6f TMR %d s=%.3f p=%d a=%d\n" , machine().time().as_double() , id , m_speed , m_tape_pos , m_accelerating); +} + +image_init_result hp9825_tape_device::internal_load(bool is_create) +{ + LOG("load %d\n" , is_create); + + device_reset(); + + io_generic io; + io.file = (device_image_interface *)this; + io.procs = &image_ioprocs; + io.filler = 0; + if (is_create) { + m_image.clear_tape(); + m_image.save_tape(&io); + } else if (!m_image.load_tape(&io)) { + LOG("load failed\n"); + seterror(IMAGE_ERROR_INVALIDIMAGE , "Wrong format"); + set_tape_present(false); + return image_init_result::FAIL; + } + LOG("load OK\n"); + + m_image_dirty = false; + + set_tape_present(true); + return image_init_result::PASS; +} + +image_init_result hp9825_tape_device::call_load() +{ + return internal_load(false); +} + +image_init_result hp9825_tape_device::call_create(int format_type, util::option_resolution *format_options) +{ + return internal_load(true); +} + +void hp9825_tape_device::call_unload() +{ + LOG("call_unload dirty=%d\n" , m_image_dirty); + + device_reset(); + + if (m_image_dirty) { + io_generic io; + io.file = (device_image_interface *)this; + io.procs = &image_ioprocs; + io.filler = 0; + m_image.save_tape(&io); + m_image_dirty = false; + } + + m_image.clear_tape(); + set_tape_present(false); +} + +std::string hp9825_tape_device::call_display() +{ + // TODO: + return std::string(); +} + +const char *hp9825_tape_device::file_extensions() const +{ + return "hti"; +} + +READ16_MEMBER(hp9825_tape_device::tape_r) +{ + uint16_t res = 0; + + switch (offset) { + case 0: + // R4: read data out + if (m_data_out) { + BIT_SET(res , 0); + } + if (!m_no_go) { + set_flg(false); + } + break; + + case 1: + // R5: read status + res = m_stat_reg; + break; + + case 2: + // R6: clear EOT + BIT_CLR(m_stat_reg , STAT_REG_EOT_BIT); + update_sts(); + break; + + default: + logerror("Reading @ offset %u\n" , offset); + break; + } + + LOG_REG("R R%u=%02x\n" , offset + 4 , res); + return res; +} + +WRITE16_MEMBER(hp9825_tape_device::tape_w) +{ + LOG_REG("W R%u=%02x\n" , offset + 4 , data); + + switch (offset) { + case 0: + // R4: write data in + m_data_in = BIT(data , 0); + m_dma_req = false; + update_dmar(); + if (!m_no_go) { + set_flg(false); + } + break; + + case 1: + // R5: write command + { + double old_set_point = get_speed_set_point(); + auto old_cmd_reg = m_cmd_reg; + m_cmd_reg = data; + check_for_speed_change(old_set_point); + // Direction bit is mirrored (inverted) in status register + if (BIT(m_cmd_reg , CMD_REG_DIR_BIT)) { + BIT_CLR(m_stat_reg , STAT_REG_DIR_BIT); + } else { + BIT_SET(m_stat_reg , STAT_REG_DIR_BIT); + } + if (BIT(m_cmd_reg , CMD_REG_DMA_EN_BIT)) { + // DMA disabled + m_search_complete = false; + } + update_sts(); + update_dmar(); + + if ((old_cmd_reg ^ m_cmd_reg) & + (BIT_MASK<uint8_t>(CMD_REG_WR_GATE_BIT) | BIT_MASK<uint8_t>(CMD_REG_THRESHOLD_BIT))) { + // Something changed in Wr gate or threshold bit, start rd/wr + update_speed_pos(); + start_rd_wr(); + } + } + break; + + case 2: + // R6: clear DMA + if (!BIT(m_cmd_reg , CMD_REG_DMA_EN_BIT)) { + m_search_complete = true; + update_sts(); + } + m_dma_req = false; + update_dmar(); + break; + + case 3: + // R7: reset status + if (m_present) { + BIT_CLR(m_stat_reg , STAT_REG_COUT_BIT); + update_sts(); + } + break; + + default: + logerror("Writing @ offset %u\n" , offset); + break; + } +} + +WRITE_LINE_MEMBER(hp9825_tape_device::short_gap_w) +{ + LOG_DBG("Short gap %d\n" , state); + m_short_gap_out = state; + if (!m_short_gap_out) { + m_valid_bits = false; + m_data_out = false; + m_trans_cnt = 0; + m_in_gap = true; + m_long_gap_timer->a_w(m_in_gap); + update_sts(); + } +} + +WRITE_LINE_MEMBER(hp9825_tape_device::long_gap_w) +{ + LOG_DBG("Long gap %d\n" , state); + if (m_long_gap_out && !state && !BIT(m_cmd_reg , CMD_REG_DMA_EN_BIT)) { + m_dma_req = true; + update_dmar(); + } + m_long_gap_out = state; + if (m_long_gap_out) { + BIT_CLR(m_stat_reg , STAT_REG_GAP_BIT); + } else { + BIT_SET(m_stat_reg , STAT_REG_GAP_BIT); + } +} + +void hp9825_tape_device::set_flg(bool state) +{ + if (state != m_flg) { + m_flg = state; + m_flg_handler(m_flg); + } +} + +void hp9825_tape_device::update_sts() +{ + // Inputs to STS computation: + // CMD_REG_MOTOR_BIT + // CMD_REG_DMA_EN_BIT + // STAT_REG_EOT_BIT + // STAT_REG_COUT_BIT + // m_search_complete + // m_in_gap + auto prev_set_point = get_speed_set_point(); + auto prev_exception = m_exception; + + m_exception = + BIT(m_stat_reg , STAT_REG_EOT_BIT) || + BIT(m_stat_reg , STAT_REG_COUT_BIT) || + m_search_complete; + + if (prev_exception != m_exception) { + check_for_speed_change(prev_set_point); + } + + m_no_go = m_exception && !BIT(m_cmd_reg , CMD_REG_MOTOR_BIT); + // U6-6 + bool sts_2 = m_in_gap && BIT(m_cmd_reg , CMD_REG_DMA_EN_BIT); + + bool new_sts = m_no_go || sts_2; + if (new_sts != m_sts) { + m_sts = new_sts; + m_sts_handler(m_sts); + } + + if (m_no_go) { + set_flg(true); + } +} + +void hp9825_tape_device::update_dmar() +{ + m_dmar_handler(m_dma_req && !BIT(m_cmd_reg , CMD_REG_DMA_EN_BIT)); +} + +void hp9825_tape_device::set_tape_present(bool present) +{ + m_present = present; + if (present) { + if (is_readonly()) { + BIT_SET(m_stat_reg, STAT_REG_WPR_BIT); + } else { + BIT_CLR(m_stat_reg, STAT_REG_WPR_BIT); + } + // STAT_REG_COUT_BIT is cleared by a write to R7 + } else { + BIT_SET(m_stat_reg, STAT_REG_COUT_BIT); + BIT_SET(m_stat_reg, STAT_REG_WPR_BIT); + update_sts(); + } +} + +bool hp9825_tape_device::is_moving_fwd() const +{ + return BIT(m_cmd_reg , CMD_REG_DIR_BIT); +} + +bool hp9825_tape_device::is_speed_fast() const +{ + return !BIT(m_cmd_reg , CMD_REG_SPEED_BIT); +} + +bool hp9825_tape_device::is_actual_dir_fwd() const +{ + // Actual direction can be different from commanded direction in accelerated phases (e.g. when tape + // direction is turned around) + return m_speed == 0.0 ? is_moving_fwd() : m_speed > 0.0; +} + +double hp9825_tape_device::get_speed_set_point() const +{ + if (m_exception || BIT(m_cmd_reg , CMD_REG_MOTOR_BIT)) { + // Stop + return 0.0; + } else { + double c; + if (is_speed_fast()) { + // HS + c = FAST_SPEED; + } else { + // LS + c = SLOW_SPEED; + } + if (!is_moving_fwd()) { + // Reverse + c = -c; + } + return c; + } +} + +void hp9825_tape_device::start_tape() +{ + LOG_DBG("Tape started %.6f p=%d\n" , machine().time().as_double() , m_tape_pos); + m_start_time = machine().time(); + m_accelerating = true; + m_speed = 0; +} + +void hp9825_tape_device::stop_tape() +{ + LOG_DBG("Tape stops %.6f p=%d\n" , machine().time().as_double() , m_tape_pos); + m_start_time = attotime::never; + m_accelerating = false; + m_speed = 0; + m_tacho_timer->reset(); + m_hole_timer->reset(); + m_inv_timer->reset(); + stop_rd_wr(); +} + +void hp9825_tape_device::check_for_speed_change(double prev_set_point) +{ + double set_point = get_speed_set_point(); + if (prev_set_point != set_point) { + update_speed_pos(); + LOG_DBG("Speed SP changed %f->%f %.6f p=%d\n" , prev_set_point , set_point , machine().time().as_double() , m_tape_pos); + // Speed set point changed, accelerate/decelerate + m_accelerating = true; + if (m_start_time.is_never()) { + // Tape starting now + start_tape(); + } + start_rd_wr(true); + adjust_tacho_timer(); + adjust_hole_timer(); + set_inv_timer(); + } +} + +void hp9825_tape_device::update_speed_pos() +{ + if (m_start_time.is_never()) { + // Tape stopped + return; + } + + attotime delta_time{machine().time() - m_start_time}; + if (delta_time.is_zero()) { + return; + } + m_start_time = machine().time(); + double delta_time_double = delta_time.as_double(); + + // Space in const A phase + double space_const_a; + // Time in const V phase + double time_const_v; + // Do R/W start/stop + bool rw_start_stop = false; + + if (m_accelerating) { + double set_point = get_speed_set_point(); + double time_to_const_v = fabs(set_point - m_speed) / ACCELERATION; + double acceleration = set_point > m_speed ? ACCELERATION : -ACCELERATION; + if (delta_time_double < time_to_const_v) { + space_const_a = const_a_space(acceleration , delta_time_double); + auto prev_speed = m_speed; + m_speed += delta_time_double * acceleration; + rw_start_stop = (fabs(prev_speed) >= MIN_RD_SPEED) != (fabs(m_speed) >= MIN_RD_SPEED); + if (prev_speed * m_speed < 0.0) { + // Direction inverted (speed sign flipped) + LOG_DBG("Dir inverted s=%f\n" , m_speed); + adjust_tacho_timer(); + adjust_hole_timer(); + } + set_inv_timer(); + time_const_v = 0.0; + } else { + space_const_a = const_a_space(acceleration , time_to_const_v); + time_const_v = delta_time_double - time_to_const_v; + LOG_DBG("Acceleration ends\n"); + m_accelerating = false; + m_speed = set_point; + m_inv_timer->reset(); + if (m_speed == 0.0) { + // Tape stops + stop_tape(); + } else { + rw_start_stop = true; + } + } + } else { + space_const_a = 0.0; + time_const_v = delta_time_double; + } + + // Update MVG bit + if (fabs(m_speed) >= MOVING_THRESHOLD) { + if (!BIT(m_stat_reg , STAT_REG_MVG_BIT)) { + BIT_SET(m_stat_reg , STAT_REG_MVG_BIT); + m_led_handler(true); + } + } else { + if (BIT(m_stat_reg , STAT_REG_MVG_BIT)) { + BIT_CLR(m_stat_reg , STAT_REG_MVG_BIT); + m_led_handler(false); + } + } + + hti_format_t::tape_pos_t delta_pos = (hti_format_t::tape_pos_t)((space_const_a + m_speed * time_const_v) * hti_format_t::ONE_INCH_POS); + LOG_DBG("dp=%d\n" , delta_pos); + if (!hti_format_t::pos_offset(m_tape_pos , true , delta_pos)) { + LOG("Tape unspooled!\n"); + } + + if (rw_start_stop) { + start_rd_wr(); + } +} + +void hp9825_tape_device::set_inv_timer() +{ + // Set inversion timer to go off at the moment the tape inverts its motion + // (i.e. when m_speed crosses 0) + if (m_speed == 0.0 || (get_speed_set_point() * m_speed) > 0.0) { + LOG_DBG("Inv tmr reset\n"); + // No inversion in sight + m_inv_timer->reset(); + } else { + // INVERSION_MARGIN is added to ensure that m_speed has already cleared the + // 0-crossing when inv timer goes off + LOG_DBG("Inv tmr set %.6f %f\n" , machine().time().as_double() , m_speed); + m_inv_timer->adjust(attotime::from_double(fabs(m_speed) / ACCELERATION + INVERSION_MARGIN)); + } +} + +void hp9825_tape_device::time_to_distance(hti_format_t::tape_pos_t distance , hti_format_t::tape_pos_t& target_pos , emu_timer *target_timer) const +{ + if (m_start_time.is_never()) { + // If tape is stopped we'll never get there.. + target_timer->reset(); + return; + } + + target_pos = m_tape_pos; + if (!hti_format_t::pos_offset(target_pos , true , distance)) { + // Beyond end of tape + target_timer->reset(); + return; + } + + double space = double(distance) / hti_format_t::ONE_INCH_POS; + double set_point = get_speed_set_point(); + double time_const_a; + + if (m_accelerating) { + // Time to reach constant V phase + double time_to_const_v = fabs(set_point - m_speed) / ACCELERATION; + // Signed acceleration + double acceleration = set_point > m_speed ? ACCELERATION : -ACCELERATION; + // Compute time to cover distance with constant acceleration + // It's the smallest non-negative root of this quadratic equation: + // 1/2*acceleration*t^2+m_speed*t=space + double delta = m_speed * m_speed + 2 * acceleration * space; + bool has_root = delta >= 0.0; + double time_in_const_a = 0.0; + if (has_root) { + double time_in_const_a_pos = (sqrt(delta) - m_speed) / acceleration; + double time_in_const_a_neg = -(sqrt(delta) + m_speed) / acceleration; + LOG_DBG("TTD %.6f %.6f\n" , time_in_const_a_pos , time_in_const_a_neg); + if (time_in_const_a_pos >= 0.0) { + if (time_in_const_a_neg >= 0.0) { + // pos + neg + + time_in_const_a = std::min(time_in_const_a_pos , time_in_const_a_neg); + } else { + // pos + neg - + time_in_const_a = time_in_const_a_pos; + } + } else { + if (time_in_const_a_neg >= 0.0) { + // pos - neg + + time_in_const_a = time_in_const_a_neg; + } else { + // pos - neg - + has_root = false; + } + } + } + LOG_DBG("TTD %d %d %.6f %.6f %.6f\n" , distance , has_root , m_speed , time_to_const_v , time_in_const_a); + if (has_root && time_in_const_a <= time_to_const_v) { + // Entirely in the constant A phase + time_const_a = time_in_const_a; + space = 0.0; + } else { + // Partly in const A & partly in const V + double space_in_const_a = const_a_space(acceleration , time_to_const_v); + space -= space_in_const_a; + time_const_a = time_to_const_v; + } + } else { + // Entirely in const V + time_const_a = 0.0; + } + + // Time in constant V + double time_const_v; + if (space != 0.0) { + if (set_point == 0.0) { + target_timer->reset(); + return; + } else { + time_const_v = space / set_point; + if (time_const_v < 0.0) { + target_timer->reset(); + return; + } + } + } else { + time_const_v = 0.0; + } + LOG_DBG("TTD %.6f %.6f\n" , time_const_a , time_const_v); + + target_timer->adjust(attotime::from_double(time_const_a + time_const_v)); +} + +double hp9825_tape_device::const_a_space(double a , double t) const +{ + // Space traveled in time 't' at constant acceleration 'a' starting with 'm_speed' speed + return t * (m_speed + a / 2 * t); +} + +hti_format_t::tape_pos_t hp9825_tape_device::get_next_hole() const +{ + return hti_format_t::next_hole(m_tape_pos , is_actual_dir_fwd()) - m_tape_pos; +} + +void hp9825_tape_device::adjust_tacho_timer() +{ + hti_format_t::tape_pos_t tick = TACH_TICK_LENGTH; + if (!is_actual_dir_fwd()) { + tick = -tick; + } + time_to_distance(tick , m_next_tacho_pos , m_tacho_timer); +} + +void hp9825_tape_device::adjust_hole_timer() +{ + time_to_distance(get_next_hole() , m_next_hole_pos , m_hole_timer); +} + +unsigned hp9825_tape_device::current_track() const +{ + return !BIT(m_cmd_reg , CMD_REG_TRACK_SEL_BIT); +} + +constexpr hti_format_t::tape_pos_t hp9825_tape_device::bit_size(bool bit) +{ + return bit ? hti_format_t::ONE_BIT_LEN : hti_format_t::ZERO_BIT_LEN; +} + +void hp9825_tape_device::start_rd_wr(bool recalc) +{ + if (fabs(m_speed) >= MIN_RD_SPEED && BIT(m_cmd_reg , CMD_REG_WR_GATE_BIT)) { + // Reading + if (m_rw_stat != RW_READING || recalc) { + stop_rd_wr(); + LOG_DBG("Start RD @%d s=%f t=%u\n" , m_tape_pos , m_speed , current_track()); + m_rd_it_valid = m_image.next_data(current_track() , m_tape_pos , is_actual_dir_fwd() , false , m_rd_it); + m_rw_stat = RW_READING; + load_rd_word(); + } + } else if (!m_accelerating && !BIT(m_cmd_reg , CMD_REG_WR_GATE_BIT) && BIT(m_cmd_reg , CMD_REG_THRESHOLD_BIT)) { + // Data writing + if (m_rw_stat != RW_WRITING) { + stop_rd_wr(); + // Start WR, only LS FWD is allowed + if (m_speed == SLOW_SPEED) { + LOG_DBG("Start WR @%d\n" , m_tape_pos); + // Looking for sync + m_bit_idx = 17; + m_rw_word = 0; + time_to_distance(bit_size(true) , m_next_bit_pos , m_bit_timer); + m_rw_stat = RW_WRITING; + } else { + LOG("Starting WR s=%f ???\n" , m_speed); + } + } + } else if (!BIT(m_cmd_reg , CMD_REG_WR_GATE_BIT) && !BIT(m_cmd_reg , CMD_REG_THRESHOLD_BIT)) { + // Gap writing + if (m_rw_stat != RW_WRITING_GAP) { + stop_rd_wr(); + LOG_DBG("Start GAP @%d\n" , m_tape_pos); + m_gap_start = m_tape_pos; + m_rw_stat = RW_WRITING_GAP; + } + } else { + stop_rd_wr(); + } +} + +void hp9825_tape_device::load_rd_word() +{ + if (m_rd_it_valid) { + if (is_moving_fwd()) { + m_bit_idx = 0; + } else { + m_bit_idx = 16; + } + // This is actually the nearest end (dir is inverted) + m_next_bit_pos = hti_format_t::farthest_end(m_rd_it , !is_actual_dir_fwd()); + LOG_DBG("Valid np=%d\n" , m_next_bit_pos); + time_to_distance(m_next_bit_pos - m_tape_pos , m_next_bit_pos , m_bit_timer); + } else { + LOG_DBG("Invalid\n"); + stop_rd_wr(); + } +} + +void hp9825_tape_device::rd_bit(bool bit) +{ + m_short_gap_timer->b_w(1); + m_short_gap_timer->b_w(0); + m_long_gap_timer->b_w(1); + m_long_gap_timer->b_w(0); + m_data_out = m_valid_bits && bit; + if (BIT(m_cmd_reg , CMD_REG_FLG_SEL_BIT)) { + set_flg(true); + } + m_trans_cnt++; + LOG_DBG("TC %u IG %d VB %d\n" , m_trans_cnt , m_in_gap , m_valid_bits); + if ((m_trans_cnt & 0x0c) == 0x0c) { + m_valid_bits = true; + } + if (BIT(m_trans_cnt , 2) && m_in_gap) { + m_in_gap = false; + m_long_gap_timer->a_w(m_in_gap); + update_sts(); + } +} + +void hp9825_tape_device::wr_bit(bool bit) +{ + LOG_DBG("WR %d idx=%u\n" , bit , m_bit_idx); + m_rw_word <<= 1; + m_rw_word |= bit; + + // A bit of heuristic here to achieve synchronization (i.e. find word boundary in bit stream) + if (m_bit_idx >= 17 && m_bit_idx < (17 + 16)) { + m_bit_idx++; + } else if (m_bit_idx == (17 + 16) && (m_rw_word & 3) == 3) { + m_bit_idx = 16; + } + if (m_bit_idx < 16) { + m_bit_idx++; + } else if (m_bit_idx == 16) { + // Write word + if (!BIT(m_rw_word , 0)) { + LOG_DBG("Sync lost! w=%05x\n" , m_rw_word & 0x1ffff); + } else { + hti_format_t::tape_word_t w = (hti_format_t::tape_word_t)(m_rw_word >> 1); + hti_format_t::tape_pos_t wr_pos = m_tape_pos - hti_format_t::word_length(w) + hti_format_t::ONE_BIT_LEN; + LOG_DBG("Wr word %04x @%d\n" , w , wr_pos); + m_image.write_word(current_track() , wr_pos , w , wr_pos); + m_image_dirty = true; + m_bit_idx = 0; + } + } +} + +void hp9825_tape_device::stop_rd_wr() +{ + if (m_rw_stat == RW_WRITING_GAP) { + LOG_DBG("Wr gap from %d to %d\n" , m_gap_start , m_tape_pos); + m_image.write_gap(current_track() , m_gap_start , m_tape_pos); + m_image_dirty = true; + } + m_bit_timer->reset(); + m_rw_stat = RW_IDLE; +} + diff --git a/src/mame/machine/hp9825_tape.h b/src/mame/machine/hp9825_tape.h new file mode 100644 index 00000000000..48accb2e88f --- /dev/null +++ b/src/mame/machine/hp9825_tape.h @@ -0,0 +1,150 @@ +// license:BSD-3-Clause +// copyright-holders:F. Ulivi +/********************************************************************* + + hp9825_tape.h + + HP9825 tape sub-system + +*********************************************************************/ + +#ifndef MAME_MACHINE_HP9825_TAPE_H +#define MAME_MACHINE_HP9825_TAPE_H + +#pragma once + +#include "formats/hti_tape.h" +#include "machine/74123.h" + +class hp9825_tape_device : public device_t , public device_image_interface +{ +public: + // construction/destruction + hp9825_tape_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // device-level overrides + virtual void device_add_mconfig(machine_config &config) override; + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + + // device_image_interface overrides + virtual image_init_result call_load() override; + virtual image_init_result call_create(int format_type, util::option_resolution *format_options) override; + virtual void call_unload() override; + virtual std::string call_display() override; + virtual iodevice_t image_type() const override { return IO_MAGTAPE; } + virtual bool is_readable() const override { return true; } + virtual bool is_writeable() const override { return true; } + virtual bool is_creatable() const override { return true; } + virtual bool must_be_loaded() const override { return false; } + virtual bool is_reset_on_load() const override { return false; } + virtual const char *file_extensions() const override; + + DECLARE_READ16_MEMBER(tape_r); + DECLARE_WRITE16_MEMBER(tape_w); + + auto flg() { return m_flg_handler.bind(); } + auto sts() { return m_sts_handler.bind(); } + auto dmar() { return m_dmar_handler.bind(); } + auto led() { return m_led_handler.bind(); } + + DECLARE_WRITE_LINE_MEMBER(short_gap_w); + DECLARE_WRITE_LINE_MEMBER(long_gap_w); + +private: + devcb_write_line m_flg_handler; + devcb_write_line m_sts_handler; + devcb_write_line m_dmar_handler; + devcb_write_line m_led_handler; + + required_device<ttl74123_device> m_short_gap_timer; // U43a + required_device<ttl74123_device> m_long_gap_timer; // U43b + + // Registers + uint8_t m_cmd_reg; + uint8_t m_stat_reg; + + // State + bool m_flg; + bool m_sts; + bool m_data_out; // U38-9 + bool m_data_in; // U13-6 + bool m_exception; // U4-6 + bool m_search_complete; // U9-6 + bool m_dma_req; // U9-9 + bool m_in_gap; // U39-4 + bool m_no_go; // U6-3 + bool m_present; + bool m_valid_bits; // U39-5 + uint8_t m_trans_cnt; // U42 + bool m_short_gap_out; // U43-13 + bool m_long_gap_out; // U43-5 + + // Timers + emu_timer *m_bit_timer; + emu_timer *m_tacho_timer; + emu_timer *m_hole_timer; + emu_timer *m_inv_timer; + + // Image of tape + hti_format_t m_image; + bool m_image_dirty; + + // Tape motion + hti_format_t::tape_pos_t m_tape_pos; + hti_format_t::tape_pos_t m_next_bit_pos; + hti_format_t::tape_pos_t m_next_tacho_pos; + hti_format_t::tape_pos_t m_next_hole_pos; + double m_speed; + attotime m_start_time; // Tape moving if != never + bool m_accelerating; + + // R/W + enum { + RW_IDLE, + RW_READING, + RW_WRITING, + RW_WRITING_GAP + }; + + int m_rw_stat; + hti_format_t::track_iterator_t m_rd_it; + bool m_rd_it_valid; + uint32_t m_rw_word; // Need 17 bits because of sync bit + unsigned m_bit_idx; // 0 is MSB, 15 is LSB, 16 is sync bit, >16 means "looking for sync" + hti_format_t::tape_pos_t m_gap_start; + + void clear_state(); + image_init_result internal_load(bool is_create); + void set_flg(bool state); + void update_sts(); + void update_dmar(); + void set_tape_present(bool present); + bool is_moving_fwd() const; + bool is_speed_fast() const; + bool is_actual_dir_fwd() const; + double get_speed_set_point() const; + void start_tape(); + void stop_tape(); + void check_for_speed_change(double prev_set_point); + void update_speed_pos(); + void set_inv_timer(); + void time_to_distance(hti_format_t::tape_pos_t distance , hti_format_t::tape_pos_t& target_pos , emu_timer *target_timer) const; + double const_a_space(double a , double t) const; + hti_format_t::tape_pos_t get_next_hole() const; + void adjust_tacho_timer(); + void adjust_hole_timer(); + unsigned current_track() const; + static constexpr hti_format_t::tape_pos_t bit_size(bool bit); + void start_rd_wr(bool recalc = false); + void load_rd_word(); + void rd_bit(bool bit); + void wr_bit(bool bit); + void stop_rd_wr(); +}; + +// device type definition +DECLARE_DEVICE_TYPE(HP9825_TAPE, hp9825_tape_device) + +#endif // MAME_MACHINE_HP9825_TAPE_H diff --git a/src/mame/machine/ibm6580_fdc.cpp b/src/mame/machine/ibm6580_fdc.cpp index 14648266a53..ac9e2db3fd8 100644 --- a/src/mame/machine/ibm6580_fdc.cpp +++ b/src/mame/machine/ibm6580_fdc.cpp @@ -43,9 +43,9 @@ MACHINE_CONFIG_START(dw_fdc_device::device_add_mconfig) MCFG_DEVICE_ADD("ppi8255", I8255, 0) - MCFG_UPD765A_ADD("upd765", false, false) -// MCFG_UPD765_INTRQ_CALLBACK(WRITELINE("pic8259", pic8259_device, ir4_w)) -// MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dma8257", dma8257_device, XXX)) + UPD765A(config, "upd765", false, false); +// m_upd_fdc->intrq_wr_callback().set("pic8259", FUNC(pic8259_device::ir4_w)); +// m_upd_fdc->drq_wr_callback().set("dma8257", FUNC(dma8257_device::XXX)); // MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", wangpc_floppies, "525dd", wangpc_state::floppy_formats) // MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", wangpc_floppies, "525dd", wangpc_state::floppy_formats) MACHINE_CONFIG_END diff --git a/src/mame/machine/inder_vid.cpp b/src/mame/machine/inder_vid.cpp index de434e7ffb3..affd1cb09c2 100644 --- a/src/mame/machine/inder_vid.cpp +++ b/src/mame/machine/inder_vid.cpp @@ -114,8 +114,9 @@ MACHINE_CONFIG_START(inder_vid_device::device_add_mconfig) MCFG_PALETTE_ADD(m_palette, 256) - MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") - MCFG_RAMDAC_SPLIT_READ(1) + ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette)); + ramdac.set_addrmap(0, &inder_vid_device::ramdac_map); + ramdac.set_split_read(1); MACHINE_CONFIG_END diff --git a/src/mame/machine/ioc2.cpp b/src/mame/machine/ioc2.cpp index a3366cfac65..bb96828ccef 100644 --- a/src/mame/machine/ioc2.cpp +++ b/src/mame/machine/ioc2.cpp @@ -10,12 +10,12 @@ #include "bus/rs232/rs232.h" #include "machine/ioc2.h" -/*static*/ const char *ioc2_device::SCC_TAG = "scc"; -/*static*/ const char *ioc2_device::PI1_TAG = "pi1"; -/*static*/ const char *ioc2_device::KBDC_TAG = "kbdc"; -/*static*/ const char *ioc2_device::PIT_TAG = "pit"; -/*static*/ const char *ioc2_device::RS232A_TAG = "rs232a"; -/*static*/ const char *ioc2_device::RS232B_TAG = "rs232b"; +/*static*/ char const *const ioc2_device::SCC_TAG = "scc"; +/*static*/ char const *const ioc2_device::PI1_TAG = "pi1"; +/*static*/ char const *const ioc2_device::KBDC_TAG = "kbdc"; +/*static*/ char const *const ioc2_device::PIT_TAG = "pit"; +/*static*/ char const *const ioc2_device::RS232A_TAG = "rs232a"; +/*static*/ char const *const ioc2_device::RS232B_TAG = "rs232b"; /*static*/ const XTAL ioc2_device::SCC_PCLK = 10_MHz_XTAL; /*static*/ const XTAL ioc2_device::SCC_RXA_CLK = 3.6864_MHz_XTAL; // Needs verification @@ -68,7 +68,7 @@ MACHINE_CONFIG_START(ioc2_device::device_add_mconfig) MCFG_RS232_DCD_HANDLER(WRITELINE(m_scc, scc85230_device, dcdb_w)) MCFG_RS232_RXD_HANDLER(WRITELINE(m_scc, scc85230_device, rxb_w)) - PC_LPT(config, m_pi1, 0); + PC_LPT(config, m_pi1); KBDC8042(config, m_kbdc); m_kbdc->set_keyboard_type(kbdc8042_device::KBDC8042_PS2); @@ -260,7 +260,7 @@ READ32_MEMBER( ioc2_device::read ) case TIMER_COUNT1_REG: case TIMER_COUNT2_REG: case TIMER_CONTROL_REG: - return m_pit->read(space, offset - TIMER_COUNT0_REG); + return m_pit->read(offset - TIMER_COUNT0_REG); } return 0; @@ -386,7 +386,7 @@ WRITE32_MEMBER( ioc2_device::write ) case TIMER_COUNT1_REG: case TIMER_COUNT2_REG: case TIMER_CONTROL_REG: - m_pit->write(space, offset - TIMER_COUNT0_REG, data & 0xff); + m_pit->write(offset - TIMER_COUNT0_REG, data & 0xff); return; } } diff --git a/src/mame/machine/ioc2.h b/src/mame/machine/ioc2.h index f4f2531f010..bfe637f206a 100644 --- a/src/mame/machine/ioc2.h +++ b/src/mame/machine/ioc2.h @@ -167,12 +167,12 @@ protected: uint32_t m_par_cntl; uint8_t m_system_id; - static const char *SCC_TAG; - static const char *PI1_TAG; - static const char *KBDC_TAG; - static const char *PIT_TAG; - static const char *RS232A_TAG; - static const char *RS232B_TAG; + static char const *const SCC_TAG; + static char const *const PI1_TAG; + static char const *const KBDC_TAG; + static char const *const PIT_TAG; + static char const *const RS232A_TAG; + static char const *const RS232B_TAG; static const XTAL SCC_PCLK; static const XTAL SCC_RXA_CLK; diff --git a/src/mame/machine/isbc_208.cpp b/src/mame/machine/isbc_208.cpp index 3f2b2806ef0..22456234ad7 100644 --- a/src/mame/machine/isbc_208.cpp +++ b/src/mame/machine/isbc_208.cpp @@ -31,7 +31,8 @@ static void isbc_208_floppies(device_slot_interface &device) device.option_add("525dd", FLOPPY_525_DD); } -MACHINE_CONFIG_START(isbc_208_device::device_add_mconfig) +void isbc_208_device::device_add_mconfig(machine_config &config) +{ AM9517A(config, m_dmac, 8_MHz_XTAL/4); m_dmac->out_hreq_callback().set(FUNC(isbc_208_device::hreq_w)); m_dmac->out_eop_callback().set(FUNC(isbc_208_device::out_eop_w)); @@ -40,12 +41,12 @@ MACHINE_CONFIG_START(isbc_208_device::device_add_mconfig) m_dmac->in_ior_callback<0>().set(m_fdc, FUNC(i8272a_device::mdma_r)); m_dmac->out_iow_callback<0>().set(m_fdc, FUNC(i8272a_device::mdma_w)); - MCFG_I8272A_ADD(m_fdc, true) - MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, isbc_208_device, irq_w)) - MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dmac", am9517a_device, dreq0_w)) + I8272A(config, m_fdc, true); + m_fdc->intrq_wr_callback().set(FUNC(isbc_208_device::irq_w)); + m_fdc->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq0_w)); FLOPPY_CONNECTOR(config, "fdc:0", isbc_208_floppies, "525dd", isbc_208_device::floppy_formats); FLOPPY_CONNECTOR(config, "fdc:1", isbc_208_floppies, "525dd", isbc_208_device::floppy_formats); -MACHINE_CONFIG_END +} void isbc_208_device::map(address_map &map) { diff --git a/src/mame/machine/iteagle_fpga.cpp b/src/mame/machine/iteagle_fpga.cpp index 7da81e6900b..7ba6967747f 100644 --- a/src/mame/machine/iteagle_fpga.cpp +++ b/src/mame/machine/iteagle_fpga.cpp @@ -293,19 +293,19 @@ READ32_MEMBER( iteagle_fpga_device::fpga_r ) m_cpu->eat_cycles(40); } if (ACCESSING_BITS_0_7) { - result |= m_scc1->cb_r(space, offset) << 0; + result |= m_scc1->cb_r(offset) << 0; if (LOG_SERIAL) m_serial0_1.read_control(1); } if (ACCESSING_BITS_8_15) { - result |= m_scc1->ca_r(space, offset) << 8; + result |= m_scc1->ca_r(offset) << 8; if (LOG_SERIAL) m_serial0_1.read_control(0); } if (ACCESSING_BITS_16_23) { - result |= m_scc1->db_r(space, offset) <<16; + result |= m_scc1->db_r(offset) <<16; if (LOG_SERIAL) m_serial0_1.read_data(1); } if (ACCESSING_BITS_24_31) { - result |= m_scc1->da_r(space, offset) << 24; + result |= m_scc1->da_r(offset) << 24; if (LOG_SERIAL) m_serial0_1.read_data(0); } if (0 && LOG_FPGA && m_prev_reg != offset) @@ -390,20 +390,20 @@ WRITE32_MEMBER( iteagle_fpga_device::fpga_w ) break; case 0x0c/4: if (ACCESSING_BITS_0_7) { - m_scc1->cb_w(space, offset, (data >> 0) & 0xff); + m_scc1->cb_w(offset, (data >> 0) & 0xff); if (LOG_SERIAL) m_serial0_1.write_control((data >> 0) & 0xff, 1); } if (ACCESSING_BITS_8_15) { - m_scc1->ca_w(space, offset, (data >> 8) & 0xff); + m_scc1->ca_w(offset, (data >> 8) & 0xff); if (LOG_SERIAL) m_serial0_1.write_control((data >> 8) & 0xff, 0); } if (ACCESSING_BITS_16_23) { // Convert 0xd to 0xa uint8_t byte = data >> 16; if (byte==0xd) - m_scc1->db_w(space, offset, 0xa); + m_scc1->db_w(offset, 0xa); else - m_scc1->db_w(space, offset, byte); + m_scc1->db_w(offset, byte); if (LOG_SERIAL) { m_serial0_1.write_data((data >> 16) & 0xff, 1); if (m_serial0_1.get_tx_str(1).back() == 0xd) { @@ -414,7 +414,7 @@ WRITE32_MEMBER( iteagle_fpga_device::fpga_w ) } } if (ACCESSING_BITS_24_31) { - m_scc1->da_w(space, offset, (data >> 24) & 0xff); + m_scc1->da_w(offset, (data >> 24) & 0xff); if (LOG_SERIAL) m_serial0_1.write_data((data >> 24) & 0xff, 0); } if (1 && LOG_FPGA) diff --git a/src/mame/machine/itt1700_kbd.cpp b/src/mame/machine/itt1700_kbd.cpp new file mode 100644 index 00000000000..23cbe0dd94b --- /dev/null +++ b/src/mame/machine/itt1700_kbd.cpp @@ -0,0 +1,282 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/*********************************************************************************************************************************** + +Preliminary ITT 1700 keyboard emulation. + +***********************************************************************************************************************************/ + +#include "emu.h" +#include "machine/itt1700_kbd.h" + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +DEFINE_DEVICE_TYPE(ITT1700_KEYBOARD, itt1700_keyboard_device, "itt1700_kbd", "ITT 1700 keyboard") + +//************************************************************************** +// DEVICE DEFINITION +//************************************************************************** + +//------------------------------------------------- +// itt1700_keyboard_device - constructor +//------------------------------------------------- + +itt1700_keyboard_device::itt1700_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, ITT1700_KEYBOARD, tag, owner, clock) + , m_clock_state(true) + , m_line1_state(true) + , m_line2_state(true) + , m_scan_counter(0) + , m_keys(*this, "KEY%u", 0U) +{ +} + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void itt1700_keyboard_device::device_start() +{ + save_item(NAME(m_clock_state)); + save_item(NAME(m_line1_state)); + save_item(NAME(m_line2_state)); + save_item(NAME(m_scan_counter)); +} + +//------------------------------------------------- +// line1_w - write from host to control line 1 +//------------------------------------------------- + +WRITE_LINE_MEMBER(itt1700_keyboard_device::line1_w) +{ + m_line1_state = state; +} + +//------------------------------------------------- +// line2_w - write from host to control line 2 +//------------------------------------------------- + +WRITE_LINE_MEMBER(itt1700_keyboard_device::line2_w) +{ + m_line2_state = state; +} + +//------------------------------------------------- +// clock_w - write clock pulse from host +//------------------------------------------------- + +WRITE_LINE_MEMBER(itt1700_keyboard_device::clock_w) +{ + if (state && !m_clock) + { + // TODO: what happens when both lines are on? + if (m_line1_state) + m_scan_counter = 0x7d; + else if (m_line2_state) + m_scan_counter = (m_scan_counter + 1) & 0x7f; + } + + m_clock = state; +} + +//------------------------------------------------- +// sense_r - poll return line +//------------------------------------------------- + +READ_LINE_MEMBER(itt1700_keyboard_device::sense_r) +{ + return !BIT(m_keys[m_scan_counter >> 3]->read(), m_scan_counter & 7); +} + +//************************************************************************** +// KEY INPUT MATRIX +//************************************************************************** + +static INPUT_PORTS_START(itt1700_kbd) + PORT_START("KEY0") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY1") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY2") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY3") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY4") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY5") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY6") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY7") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY8") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY9") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY10") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY11") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY12") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY13") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY14") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) + + PORT_START("KEY15") + PORT_DIPNAME(0x01, 0x01, DEF_STR(Unknown)) + PORT_DIPSETTING(0x01, DEF_STR(Off)) + PORT_DIPSETTING(0x00, DEF_STR(On)) + PORT_DIPNAME(0x02, 0x02, DEF_STR(Unknown)) + PORT_DIPSETTING(0x02, DEF_STR(Off)) + PORT_DIPSETTING(0x00, DEF_STR(On)) + PORT_DIPNAME(0x04, 0x04, DEF_STR(Unknown)) + PORT_DIPSETTING(0x04, DEF_STR(Off)) + PORT_DIPSETTING(0x00, DEF_STR(On)) + PORT_DIPNAME(0x08, 0x08, DEF_STR(Unknown)) + PORT_DIPSETTING(0x08, DEF_STR(Off)) + PORT_DIPSETTING(0x00, DEF_STR(On)) + PORT_DIPNAME(0x10, 0x10, DEF_STR(Unknown)) + PORT_DIPSETTING(0x10, DEF_STR(Off)) + PORT_DIPSETTING(0x00, DEF_STR(On)) + PORT_DIPNAME(0x20, 0x20, DEF_STR(Unknown)) + PORT_DIPSETTING(0x20, DEF_STR(Off)) + PORT_DIPSETTING(0x00, DEF_STR(On)) + PORT_DIPNAME(0x40, 0x40, DEF_STR(Unknown)) + PORT_DIPSETTING(0x40, DEF_STR(Off)) + PORT_DIPSETTING(0x00, DEF_STR(On)) + PORT_DIPNAME(0x80, 0x80, DEF_STR(Unknown)) + PORT_DIPSETTING(0x80, DEF_STR(Off)) + PORT_DIPSETTING(0x00, DEF_STR(On)) +INPUT_PORTS_END + +//------------------------------------------------- +// input_ports - device-specific input ports +//------------------------------------------------- + +ioport_constructor itt1700_keyboard_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(itt1700_kbd); +} diff --git a/src/mame/machine/itt1700_kbd.h b/src/mame/machine/itt1700_kbd.h new file mode 100644 index 00000000000..b8ee3cfd3ee --- /dev/null +++ b/src/mame/machine/itt1700_kbd.h @@ -0,0 +1,47 @@ +// license:BSD-3-Clause +// copyright-holders:AJR + +#ifndef MAME_MACHINE_ITT1700_KBD +#define MAME_MACHINE_ITT1700_KBD + +#pragma once + + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> itt1700_keyboard_device + +class itt1700_keyboard_device : public device_t +{ +public: + // device constructor + itt1700_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); + + // host interface + DECLARE_WRITE_LINE_MEMBER(line1_w); + DECLARE_WRITE_LINE_MEMBER(line2_w); + DECLARE_WRITE_LINE_MEMBER(clock_w); + DECLARE_READ_LINE_MEMBER(sense_r); + +protected: + // device-specific overrides + virtual void device_start() override; + virtual ioport_constructor device_input_ports() const override; + +private: + // internal state + bool m_clock_state; + bool m_line1_state; + bool m_line2_state; + u8 m_scan_counter; + + // key input matrix + required_ioport_array<16> m_keys; +}; + +// device type definition +DECLARE_DEVICE_TYPE(ITT1700_KEYBOARD, itt1700_keyboard_device) + +#endif // MAME_MACHINE_ITT1700_KBD_H diff --git a/src/mame/machine/jazz_mct_adr.cpp b/src/mame/machine/jazz_mct_adr.cpp new file mode 100644 index 00000000000..e14075f3f3f --- /dev/null +++ b/src/mame/machine/jazz_mct_adr.cpp @@ -0,0 +1,51 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +/* + * An implementation of the MCT-ADR device found in Microsoft Jazz/MIPS + * ARCSystem 100 architecture systems. This device was originally designed + * by Microsoft, and then implemented and used in various forms by MIPS, + * Olivetti, LSI Logic, NEC, Acer and others. + * + * Specific implementations/derivatives include: + * + * LSI Logic R4030/R4230 + * NEC μPD31432 + * ALI M6101-A1 + * + * References: + * + * https://datasheet.datasheetarchive.com/originals/scans/Scans-054/DSAIH000102184.pdf + * https://github.com/torvalds/linux/tree/master/arch/mips/jazz/ + * http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/arc/jazz/ + * + * TODO + * - everything (skeleton only) + */ + +#include "emu.h" +#include "jazz_mct_adr.h" + +#define VERBOSE 0 +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(JAZZ_MCT_ADR, jazz_mct_adr_device, "jazz_mct_adr", "Jazz MCT-ADR") + +jazz_mct_adr_device::jazz_mct_adr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, JAZZ_MCT_ADR, tag, owner, clock) +{ +} + +void jazz_mct_adr_device::map(address_map &map) +{ + map(0x000, 0x003).lr32("config", [](){ return 0x00000000; }); + map(0x008, 0x00b).lr32("revision", [](){ return 0xf0000000; }); +} + +void jazz_mct_adr_device::device_start() +{ +} + +void jazz_mct_adr_device::device_reset() +{ +} diff --git a/src/mame/machine/jazz_mct_adr.h b/src/mame/machine/jazz_mct_adr.h new file mode 100644 index 00000000000..dd2b651d25c --- /dev/null +++ b/src/mame/machine/jazz_mct_adr.h @@ -0,0 +1,25 @@ +// license:BSD-3-Clause +// copyright-holders:Patrick Mackinlay + +#ifndef MAME_MACHINE_JAZZ_MCT_ADR_H +#define MAME_MACHINE_JAZZ_MCT_ADR_H + +#pragma once + +class jazz_mct_adr_device : public device_t +{ +public: + jazz_mct_adr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual void map(address_map &map); + +protected: + // device_t overrides + virtual void device_start() override; + virtual void device_reset() override; +}; + +// device type definition +DECLARE_DEVICE_TYPE(JAZZ_MCT_ADR, jazz_mct_adr_device) + +#endif // MAME_MACHINE_JAZZ_MCT_ADR_H diff --git a/src/mame/machine/lviv.cpp b/src/mame/machine/lviv.cpp index afc15380bf2..8b418cb166e 100644 --- a/src/mame/machine/lviv.cpp +++ b/src/mame/machine/lviv.cpp @@ -136,7 +136,7 @@ READ8_MEMBER(lviv_state::io_r) { case 0: case 1: - return m_ppi[switch_val]->read(space, offset & 3); + return m_ppi[switch_val]->read(offset & 3); case 2: case 3: @@ -173,7 +173,7 @@ WRITE8_MEMBER(lviv_state::io_w) { case 0: case 1: - m_ppi[switch_val]->write(space, offset & 3, data); + m_ppi[switch_val]->write(offset & 3, data); break; case 2: diff --git a/src/mame/machine/macadb.cpp b/src/mame/machine/macadb.cpp index 6eabc071851..0e4d33e76fc 100644 --- a/src/mame/machine/macadb.cpp +++ b/src/mame/machine/macadb.cpp @@ -72,7 +72,7 @@ enum * *************************************************************************/ #if LOG_ADB -static const char *const adb_statenames[4] = { "NEW", "EVEN", "ODD", "IDLE" }; +static char const *const adb_statenames[4] = { "NEW", "EVEN", "ODD", "IDLE" }; #endif int mac_state::adb_pollkbd(int update) @@ -1223,7 +1223,7 @@ void mac_state::adb_reset() WRITE_LINE_MEMBER(mac_state::adb_linechange_w) { int dtime = 0; -/* static const char *states[] = +/* static char const *const states[] = { "idle", "attention", diff --git a/src/mame/machine/mbc55x.cpp b/src/mame/machine/mbc55x.cpp index dc4852e3568..300fb6f9414 100644 --- a/src/mame/machine/mbc55x.cpp +++ b/src/mame/machine/mbc55x.cpp @@ -42,12 +42,12 @@ static int instruction_hook(device_t &device, offs_t curpc); READ8_MEMBER( mbc55x_state::ppi8255_r ) { - return m_ppi->read(space, offset>>1); + return m_ppi->read(offset>>1); } WRITE8_MEMBER( mbc55x_state::ppi8255_w ) { - m_ppi->write(space, offset>>1, data); + m_ppi->write(offset>>1, data); } READ8_MEMBER( mbc55x_state::mbc55x_ppi_porta_r ) @@ -109,22 +109,22 @@ WRITE8_MEMBER( mbc55x_state::mbc55x_usart_w ) READ8_MEMBER(mbc55x_state::mbcpic8259_r) { - return m_pic->read(space, offset>>1); + return m_pic->read(offset>>1); } WRITE8_MEMBER(mbc55x_state::mbcpic8259_w) { - m_pic->write(space, offset>>1, data); + m_pic->write(offset>>1, data); } READ8_MEMBER(mbc55x_state::mbcpit8253_r) { - return m_pit->read(space, offset >> 1); + return m_pit->read(offset >> 1); } WRITE8_MEMBER(mbc55x_state::mbcpit8253_w) { - m_pit->write(space, offset >> 1, data); + m_pit->write(offset >> 1, data); } WRITE_LINE_MEMBER( mbc55x_state::pit8253_t2 ) @@ -251,11 +251,11 @@ READ8_MEMBER(mbc55x_state::mbc55x_kb_usart_r) switch (offset) { case 0: //logerror("%s read kb_uart\n",machine().describe_context()); - result = m_kb_uart->data_r(space,0); + result = m_kb_uart->data_r(); break; case 1: - result = m_kb_uart->status_r(space,0); + result = m_kb_uart->status_r(); if (m_keyboard.key_special & KEY_BIT_CTRL) // Parity error used to flag control down result |= i8251_device::I8251_STATUS_PARITY_ERROR; break; @@ -270,8 +270,8 @@ WRITE8_MEMBER(mbc55x_state::mbc55x_kb_usart_w) switch (offset) { - case 0 : m_kb_uart->data_w(space, 0, data); break; - case 1 : m_kb_uart->control_w(space, 0, data); break; + case 0 : m_kb_uart->data_w(data); break; + case 1 : m_kb_uart->control_w(data); break; } } diff --git a/src/mame/machine/mikro80.cpp b/src/mame/machine/mikro80.cpp index 11f0e7577f0..633c47481da 100644 --- a/src/mame/machine/mikro80.cpp +++ b/src/mame/machine/mikro80.cpp @@ -80,12 +80,12 @@ void mikro80_state::machine_reset() READ8_MEMBER(mikro80_state::mikro80_keyboard_r) { - return m_ppi8255->read(space, offset^0x03); + return m_ppi8255->read(offset^0x03); } WRITE8_MEMBER(mikro80_state::mikro80_keyboard_w) { - m_ppi8255->write(space, offset^0x03, data); + m_ppi8255->write(offset^0x03, data); } diff --git a/src/mame/machine/model1.cpp b/src/mame/machine/model1.cpp index c02b21d71ca..75eadf9a4d1 100644 --- a/src/mame/machine/model1.cpp +++ b/src/mame/machine/model1.cpp @@ -1723,7 +1723,7 @@ void model1_state::copro_hle_swa() } } -MACHINE_START_MEMBER(model1_state,model1) +void model1_state::machine_start() { m_digits.resolve(); m_copro_ram_data = std::make_unique<u32[]>(0x8000); diff --git a/src/mame/machine/model1io2.cpp b/src/mame/machine/model1io2.cpp index f1bac5e80bb..4c115d86bda 100644 --- a/src/mame/machine/model1io2.cpp +++ b/src/mame/machine/model1io2.cpp @@ -5,7 +5,7 @@ Sega Model 1 I/O Board (Advanced) Used by: - - Wing War (R360) (837-10859) + - Wing War/Wing War R360 (837-10859) - NetMerc (837-11659) - Virtua Cop (837-11130 with 837-11131) @@ -112,7 +112,7 @@ ioport_constructor model1io2_device::device_input_ports() const ROM_START( model1io2 ) ROM_REGION(0x10000, "iocpu", 0) - // Wing War (taken from R360 version, is it the same for the regular version?) + // Wing War/Wing War R360 ROM_SYSTEM_BIOS(0, "epr16891", "EPR-16891") ROMX_LOAD("epr-16891.6", 0x00000, 0x10000, CRC(a33f84d1) SHA1(3079397c7241c1a6f494fa310faff0989dfa04a0), ROM_BIOS(0)) diff --git a/src/mame/machine/ms7004.cpp b/src/mame/machine/ms7004.cpp index 5eb66f2c64f..52183ba835b 100644 --- a/src/mame/machine/ms7004.cpp +++ b/src/mame/machine/ms7004.cpp @@ -66,8 +66,10 @@ MACHINE_CONFIG_START(ms7004_device::device_add_mconfig) MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(m_i8243, i8243_device, prog_w)) I8243(config, m_i8243); - m_i8243->read_handler().set_constant(0); - m_i8243->write_handler().set(FUNC(ms7004_device::i8243_port_w)); + m_i8243->p4_out_cb().set(FUNC(ms7004_device::i8243_port_w<0>)); + m_i8243->p5_out_cb().set(FUNC(ms7004_device::i8243_port_w<1>)); + m_i8243->p6_out_cb().set(FUNC(ms7004_device::i8243_port_w<2>)); + m_i8243->p7_out_cb().set(FUNC(ms7004_device::i8243_port_w<3>)); SPEAKER(config, "mono").front_center(); MCFG_DEVICE_ADD(MS7004_SPK_TAG, BEEP, 3250) @@ -432,7 +434,7 @@ WRITE8_MEMBER( ms7004_device::p2_w ) DBG_LOG(2,0,( "p2_w %02x = col %d\n", data, data&15)); m_p2 = data; - m_i8243->p2_w(space, offset, data); + m_i8243->p2_w(data); } @@ -440,23 +442,24 @@ WRITE8_MEMBER( ms7004_device::p2_w ) // prog_w - //------------------------------------------------- -WRITE8_MEMBER( ms7004_device::i8243_port_w ) +template<int P> +void ms7004_device::i8243_port_w(uint8_t data) { int sense = 0; - DBG_LOG(2,0,( "8243 port %d data %02xH\n", offset + 4, data)); + DBG_LOG(2,0,( "8243 port %d data %02xH\n", P + 4, data)); if (data) { switch(data) { - case 0x01: sense = m_kbd[(offset << 2) + 0]->read(); break; - case 0x02: sense = m_kbd[(offset << 2) + 1]->read(); break; - case 0x04: sense = m_kbd[(offset << 2) + 2]->read(); break; - case 0x08: sense = m_kbd[(offset << 2) + 3]->read(); break; + case 0x01: sense = m_kbd[(P << 2) + 0]->read(); break; + case 0x02: sense = m_kbd[(P << 2) + 1]->read(); break; + case 0x04: sense = m_kbd[(P << 2) + 2]->read(); break; + case 0x08: sense = m_kbd[(P << 2) + 3]->read(); break; } m_keylatch = BIT(sense, (m_p1 & 7)); if (m_keylatch) DBG_LOG(1,0,( "row %d col %02x t1 %d\n", - (m_p1 & 7), (offset << 4 | data), m_keylatch)); + (m_p1 & 7), (P << 4 | data), m_keylatch)); } } diff --git a/src/mame/machine/ms7004.h b/src/mame/machine/ms7004.h index 4c6979a486e..654cc4d33dc 100644 --- a/src/mame/machine/ms7004.h +++ b/src/mame/machine/ms7004.h @@ -66,7 +66,7 @@ private: DECLARE_WRITE8_MEMBER( p1_w ); DECLARE_WRITE8_MEMBER( p2_w ); DECLARE_READ_LINE_MEMBER( t1_r ); - DECLARE_WRITE8_MEMBER( i8243_port_w ); + template<int P> void i8243_port_w(uint8_t data); }; // device type definition diff --git a/src/mame/machine/msx.cpp b/src/mame/machine/msx.cpp index b01836180e4..733fed38868 100644 --- a/src/mame/machine/msx.cpp +++ b/src/mame/machine/msx.cpp @@ -60,6 +60,12 @@ void msx_state::machine_start() { m_leds.resolve(); m_port_c_old = 0xff; +} + + +void msx2_state::machine_start() +{ + msx_state::machine_start(); for (device_t &device : device_iterator(*this)) { @@ -69,6 +75,8 @@ void msx_state::machine_start() m_switched.push_back(switched); } } + + save_item(NAME(m_rtc_latch)); } @@ -199,7 +207,6 @@ void msx_state::driver_start() save_item(NAME(m_psg_b)); save_item(NAME(m_mouse)); save_item(NAME(m_mouse_stat)); - save_item(NAME(m_rtc_latch)); save_item(NAME(m_kanji_latch)); save_item(NAME(m_slot_expanded)); save_item(NAME(m_primary_slot)); @@ -207,11 +214,9 @@ void msx_state::driver_start() save_item(NAME(m_port_c_old)); save_item(NAME(m_keylatch)); save_item(NAME(m_irq_state)); - - machine().save().register_postload(save_prepost_delegate(FUNC(msx_state::post_load), this)); } -void msx_state::post_load() +void msx_state::device_post_load() { for (int page = 0; page < 4; page++) { @@ -315,17 +320,17 @@ WRITE8_MEMBER(msx_state::msx_psg_port_b_w) ** RTC functions */ -WRITE8_MEMBER( msx_state::msx_rtc_latch_w ) +WRITE8_MEMBER( msx2_state::msx_rtc_latch_w ) { m_rtc_latch = data & 15; } -WRITE8_MEMBER( msx_state::msx_rtc_reg_w ) +WRITE8_MEMBER( msx2_state::msx_rtc_reg_w ) { m_rtc->write(space, m_rtc_latch, data); } -READ8_MEMBER( msx_state::msx_rtc_reg_r ) +READ8_MEMBER( msx2_state::msx_rtc_reg_r ) { return m_rtc->read(space, m_rtc_latch); } @@ -390,18 +395,17 @@ READ8_MEMBER( msx_state::msx_ppi_port_b_r ) * ***********************************************************************/ -void msx_state::install_slot_pages(device_t &owner, uint8_t prim, uint8_t sec, uint8_t page, uint8_t numpages, device_t *device) +void msx_state::install_slot_pages(uint8_t prim, uint8_t sec, uint8_t page, uint8_t numpages, device_t *device) { - msx_state &msx = downcast<msx_state &>(owner); msx_internal_slot_interface *internal_slot = dynamic_cast<msx_internal_slot_interface *>(device); for ( int i = page; i < std::min(page + numpages, 4); i++ ) { - msx.m_all_slots[prim][sec][i] = internal_slot; + m_all_slots[prim][sec][i] = internal_slot; } if ( sec ) { - msx.m_slot_expanded[prim] = true; + m_slot_expanded[prim] = true; } } @@ -519,7 +523,7 @@ WRITE8_MEMBER( msx_state::msx_kanji_w ) m_kanji_latch = (m_kanji_latch & 0x1f800) | ((data & 0x3f) << 5); } -READ8_MEMBER( msx_state::msx_switched_r ) +READ8_MEMBER( msx2_state::msx_switched_r ) { uint8_t data = 0xff; @@ -531,7 +535,7 @@ READ8_MEMBER( msx_state::msx_switched_r ) return data; } -WRITE8_MEMBER( msx_state::msx_switched_w ) +WRITE8_MEMBER( msx2_state::msx_switched_w ) { for (int i = 0; i < m_switched.size(); i++) { diff --git a/src/mame/machine/namco_c139.cpp b/src/mame/machine/namco_c139.cpp index fa842d84089..b9f9df75aab 100644 --- a/src/mame/machine/namco_c139.cpp +++ b/src/mame/machine/namco_c139.cpp @@ -8,6 +8,7 @@ TODO: - Make this to actually work! - Is RAM shared with a specific CPU other than master/slave? + - is this another MCU with internal ROM? ***************************************************************************/ diff --git a/src/mame/machine/namco_c67.cpp b/src/mame/machine/namco_c67.cpp new file mode 100644 index 00000000000..509fd21dc00 --- /dev/null +++ b/src/mame/machine/namco_c67.cpp @@ -0,0 +1,32 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/****************************************************************************** + + This is simply a TMS320C25 with internal ROM and Namco code '67' + + used by Namco System 21 for both the master and slave DSPs (configuration + is decided based on a port read) + +******************************************************************************/ + + +#include "emu.h" +#include "namco_c67.h" + +DEFINE_DEVICE_TYPE(NAMCO_C67, namco_c67_device, "namcoc67", "Namco C67 (TMS320C25)") + +namco_c67_device::namco_c67_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + tms32025_device(mconfig, NAMCO_C67, tag, owner, clock) +{ + set_mp_mc(false); +} + +ROM_START( c67 ) + ROM_REGION16_BE( 0x2000, "internal", 0 ) + ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) +ROM_END + +const tiny_rom_entry *namco_c67_device::device_rom_region() const +{ + return ROM_NAME(c67); +} diff --git a/src/mame/machine/namco_c67.h b/src/mame/machine/namco_c67.h new file mode 100644 index 00000000000..9aa54dac090 --- /dev/null +++ b/src/mame/machine/namco_c67.h @@ -0,0 +1,25 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +#ifndef MAME_MACHINE_NAMCO_C67_H +#define MAME_MACHINE_NAMCO_C67_H + +#pragma once + +#include "cpu/tms32025/tms32025.h" + +// base class +class namco_c67_device : public tms32025_device +{ +public: + namco_c67_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual const tiny_rom_entry *device_rom_region() const override; + +}; + +DECLARE_DEVICE_TYPE(NAMCO_C67, namco_c67_device) + + + +#endif // MAME_MACHINE_NAMCO_C67_H diff --git a/src/mame/machine/namcoio_gearbox.cpp b/src/mame/machine/namcoio_gearbox.cpp index 94855c8ab42..995129dbb86 100644 --- a/src/mame/machine/namcoio_gearbox.cpp +++ b/src/mame/machine/namcoio_gearbox.cpp @@ -3,8 +3,10 @@ /*************************************************************************** Namco 6-speed Gearbox device + Ridge Racer Clutch Pedal assembly part # 88800032, + 6 Speed Gear Shift assembly part # 88300672 + 88300683 - Used in Ridge Racer deluxe cabinet, Ace Driver and Driver's Eyes + Used in Ridge Racer 1,2,Rave Racer deluxe cabinet and Driver's Eyes User side gear scheme: 1 3 5 |-|-| @@ -15,10 +17,14 @@ First one just uses whatever is read in the inputs, second one simulates clutch lock as in a real car. + On the arcade cabinet(goes for Ridge Racer), the clutch isn't mechanically + or electronically connected to the shifter. The clutch pedal simply connects + to a microswitch. The shifter itself is basically a loose 8-way joystick with + a panel on top to restrict movement. There is no software-controlled lock, + maybe magnets. + TODO: - - check clutch lock via real HW, and get a way to lock current gear via - MAME's input system; - - Custom part #; + - Better way to lock current gear via MAME's input system; no clutch involved - gear output for artwork system; ***************************************************************************/ diff --git a/src/mame/machine/namcond1.cpp b/src/mame/machine/namcond1.cpp index 6fa23881dea..beb0577b640 100644 --- a/src/mame/machine/namcond1.cpp +++ b/src/mame/machine/namcond1.cpp @@ -84,7 +84,7 @@ WRITE16_MEMBER(namcond1_state::cuskey_w) break; case (0x0c>>1): - m_ygv608->set_gfxbank((data & 0x0002) >> 1); // i think + m_ygv608->set_gfxbank(data & 0x0003); // bit 0 used in abcheck during garbage screens, tile/color select of some kind? break; diff --git a/src/mame/machine/namcos2.cpp b/src/mame/machine/namcos2.cpp index d2dea28aac2..15f6273d97b 100644 --- a/src/mame/machine/namcos2.cpp +++ b/src/mame/machine/namcos2.cpp @@ -71,28 +71,24 @@ READ16_MEMBER( namcos2_state::namcos2_finallap_prot_r ) // S2 copy -MACHINE_START_MEMBER(namcos2_state,namcos2) +void namcos2_state::machine_start() { m_eeprom = std::make_unique<uint8_t[]>(0x2000); subdevice<nvram_device>("nvram")->set_base(m_eeprom.get(), 0x2000); - if (m_audiobank) - { - uint32_t max = memregion("audiocpu")->bytes() / 0x4000; - for (int i = 0; i < 0x10; i++) - m_audiobank->configure_entry(i, memregion("audiocpu")->base() + (i % max) * 0x4000); + uint32_t max = memregion("audiocpu")->bytes() / 0x4000; + for (int i = 0; i < 0x10; i++) + m_audiobank->configure_entry(i, memregion("audiocpu")->base() + (i % max) * 0x4000); - m_audiobank->set_entry(0); - } } -MACHINE_RESET_MEMBER(namcos2_state, namcos2) +void namcos2_state::machine_reset() { // address_space &space = m_maincpu->space(AS_PROGRAM); - address_space &audio_space = m_audiocpu->space(AS_PROGRAM); +// address_space &audio_space = m_audiocpu->space(AS_PROGRAM); /* Initialise the bank select in the sound CPU */ - namcos2_sound_bankselect_w(audio_space, 0, 0); /* Page in bank 0 */ + m_audiobank->set_entry(0); /* Page in bank 0 */ m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE ); @@ -145,12 +141,12 @@ WRITE8_MEMBER(namcos2_state::system_reset_w) /* EEPROM Load/Save and read/write handling */ /*************************************************************/ -WRITE8_MEMBER( namcos2_state::namcos2_68k_eeprom_w ) +WRITE8_MEMBER( namcos2_state::eeprom_w ) { m_eeprom[offset] = data; } -READ8_MEMBER( namcos2_state::namcos2_68k_eeprom_r ) +READ8_MEMBER( namcos2_state::eeprom_r ) { return m_eeprom[offset]; } @@ -397,7 +393,7 @@ WRITE16_MEMBER( namcos2_state::namcos2_68k_key_w ) /* Sound sub-system */ /**************************************************************/ -WRITE8_MEMBER( namcos2_state::namcos2_sound_bankselect_w ) +WRITE8_MEMBER( namcos2_state::sound_bankselect_w ) { m_audiobank->set_entry(data>>4); } diff --git a/src/mame/machine/namcos21_dsp.cpp b/src/mame/machine/namcos21_dsp.cpp new file mode 100644 index 00000000000..30caac6c524 --- /dev/null +++ b/src/mame/machine/namcos21_dsp.cpp @@ -0,0 +1,275 @@ +// license:BSD-3-Clause +// copyright-holders:Phil Stroffolino, David Haywood + +/* + +Common code for the original Namco System 21 DSP board, with a single DSP +used by Winning Run, Driver's Eyes + +TODO: handle protection properly and with callbacks + some of the list processing should probably be in the 3d device, split it out + +*/ + +#include "emu.h" +#include "namcos21_dsp.h" + +DEFINE_DEVICE_TYPE(NAMCOS21_DSP, namcos21_dsp_device, "namcos21_dsp_device", "Namco System 21 DSP Setup (1x TMS320C25 type)") + +namcos21_dsp_device::namcos21_dsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, NAMCOS21_DSP, tag, owner, clock), + m_dsp(*this, "dsp"), + m_winrun_dspbios(*this,"winrun_dspbios"), + m_winrun_polydata(*this,"winrun_polydata"), + m_ptrom16(*this,"point16"), + m_renderer(*this, finder_base::DUMMY_TAG) +{ +} + +void namcos21_dsp_device::device_start() +{ + m_winrun_dspcomram = std::make_unique<uint16_t[]>(0x1000*2); + m_suspend_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(namcos21_dsp_device::suspend_callback),this)); + m_pointram = std::make_unique<uint8_t[]>(PTRAM_SIZE); + m_pointram_idx = 0; +} + +TIMER_CALLBACK_MEMBER(namcos21_dsp_device::suspend_callback) +{ + m_dsp->suspend(SUSPEND_REASON_HALT, true); +} + +void namcos21_dsp_device::device_reset() +{ + m_poly_frame_width = m_renderer->get_width(); + m_poly_frame_height = m_renderer->get_height(); + // can't suspend directly from here, needs to be on a timer? + m_suspend_timer->adjust(attotime::zero); +} + + +READ16_MEMBER(namcos21_dsp_device::winrun_dspcomram_r) +{ + int bank = 1-(m_winrun_dspcomram_control[0x4/2]&1); + uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; + return mem[offset]; +} +WRITE16_MEMBER(namcos21_dsp_device::winrun_dspcomram_w) +{ + int bank = 1-(m_winrun_dspcomram_control[0x4/2]&1); + uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; + COMBINE_DATA( &mem[offset] ); +} + +READ16_MEMBER(namcos21_dsp_device::winrun_cuskey_r) +{ + int pc = m_dsp->pc(); + switch( pc ) + { + case 0x0064: /* winrun91 */ + return 0xFEBB; + case 0x006c: /* winrun91 */ + return 0xFFFF; + case 0x0073: /* winrun91 */ + return 0x0144; + + case 0x0075: /* winrun */ + return 0x24; + + default: + break; + } + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_device::winrun_cuskey_w) +{ +} + +void namcos21_dsp_device::winrun_flush_poly() +{ + if( m_winrun_poly_index>0 ) + { + const uint16_t *pSource = m_winrun_poly_buf; + uint16_t color; + int sx[4], sy[4], zcode[4]; + int j; + color = *pSource++; + if( color&0x8000 ) + { /* direct-draw */ + for( j=0; j<4; j++ ) + { + sx[j] = m_poly_frame_width/2 + (int16_t)*pSource++; + sy[j] = m_poly_frame_height/2 + (int16_t)*pSource++; + zcode[j] = *pSource++; + } + m_renderer->draw_quad(sx, sy, zcode, color&0x7fff); + } + else + { + int quad_idx = color*6; + for(;;) + { + uint8_t code = m_pointram[quad_idx++]; + color = m_pointram[quad_idx++]; + for( j=0; j<4; j++ ) + { + uint8_t vi = m_pointram[quad_idx++]; + sx[j] = m_poly_frame_width/2 + (int16_t)pSource[vi*3+0]; + sy[j] = m_poly_frame_height/2 + (int16_t)pSource[vi*3+1]; + zcode[j] = pSource[vi*3+2]; + } + m_renderer->draw_quad(sx, sy, zcode, color&0x7fff); + if( code&0x80 ) + { /* end-of-quadlist marker */ + break; + } + } + } + m_winrun_poly_index = 0; + } +} /* winrun_flushpoly */ + +READ16_MEMBER(namcos21_dsp_device::winrun_poly_reset_r) +{ + winrun_flush_poly(); + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_device::winrun_dsp_render_w) +{ + if( m_winrun_poly_index<WINRUN_MAX_POLY_PARAM ) + { + m_winrun_poly_buf[m_winrun_poly_index++] = data; + } + else + { + logerror( "WINRUN_POLY_OVERFLOW\n" ); + } +} + +WRITE16_MEMBER(namcos21_dsp_device::winrun_dsp_pointrom_addr_w) +{ + if( offset==0 ) + { /* port 8 */ + m_winrun_pointrom_addr = data; + } + else + { /* port 9 */ + m_winrun_pointrom_addr |= (data<<16); + } +} + +READ16_MEMBER(namcos21_dsp_device::winrun_dsp_pointrom_data_r) +{ + return m_ptrom16[m_winrun_pointrom_addr++]; +} + +WRITE16_MEMBER(namcos21_dsp_device::winrun_dsp_complete_w) +{ + if( data ) + { + winrun_flush_poly(); + m_dsp->pulse_input_line(INPUT_LINE_RESET, attotime::zero); + m_renderer->swap_and_clear_poly_framebuffer(); + } +} + +READ16_MEMBER(namcos21_dsp_device::winrun_table_r) +{ + return m_winrun_polydata[offset]; +} + +WRITE16_MEMBER(namcos21_dsp_device::winrun_dspbios_w) +{ + COMBINE_DATA( &m_winrun_dspbios[offset] ); + if( offset==0xfff ) // is this the real trigger? + { + m_winrun_dsp_alive = 1; + m_dsp->resume(SUSPEND_REASON_HALT); + } +} + +//380000 : read : dsp status? 1 = busy +//380000 : write(0x01) - done before dsp comram init +//380004 : dspcomram bank, as seen by 68k +//380008 : read : state? + +READ16_MEMBER(namcos21_dsp_device::winrun_68k_dspcomram_r) +{ + int bank = m_winrun_dspcomram_control[0x4/2]&1; + uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; + return mem[offset]; +} + +WRITE16_MEMBER(namcos21_dsp_device::winrun_68k_dspcomram_w) +{ + int bank = m_winrun_dspcomram_control[0x4/2]&1; + uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; + COMBINE_DATA( &mem[offset] ); +} + +READ16_MEMBER(namcos21_dsp_device::winrun_dspcomram_control_r) +{ + return m_winrun_dspcomram_control[offset]; +} + +WRITE16_MEMBER(namcos21_dsp_device::winrun_dspcomram_control_w) +{ + COMBINE_DATA( &m_winrun_dspcomram_control[offset] ); +} + + +void namcos21_dsp_device::winrun_dsp_program(address_map &map) +{ + // MCU is used in external program mode, program is uploaded to shared RAM by the 68k + map(0x0000, 0x0fff).ram().share("winrun_dspbios"); +} + +void namcos21_dsp_device::winrun_dsp_data(address_map &map) +{ + map(0x2000, 0x200f).rw(FUNC(namcos21_dsp_device::winrun_cuskey_r), FUNC(namcos21_dsp_device::winrun_cuskey_w)); + map(0x4000, 0x4fff).rw(FUNC(namcos21_dsp_device::winrun_dspcomram_r), FUNC(namcos21_dsp_device::winrun_dspcomram_w)); + map(0x8000, 0xffff).r(FUNC(namcos21_dsp_device::winrun_table_r)); +} + +void namcos21_dsp_device::winrun_dsp_io(address_map &map) +{ + map(0x08, 0x09).rw(FUNC(namcos21_dsp_device::winrun_dsp_pointrom_data_r), FUNC(namcos21_dsp_device::winrun_dsp_pointrom_addr_w)); + map(0x0a, 0x0a).w(FUNC(namcos21_dsp_device::winrun_dsp_render_w)); + map(0x0b, 0x0b).nopw(); + map(0x0c, 0x0c).w(FUNC(namcos21_dsp_device::winrun_dsp_complete_w)); +} + + +void namcos21_dsp_device::device_add_mconfig(machine_config &config) +{ + tms32025_device& dsp(TMS32025(config, m_dsp, 24000000*2)); /* 48 MHz? overclocked */ + dsp.set_addrmap(AS_PROGRAM, &namcos21_dsp_device::winrun_dsp_program); + dsp.set_addrmap(AS_DATA, &namcos21_dsp_device::winrun_dsp_data); + dsp.set_addrmap(AS_IO, &namcos21_dsp_device::winrun_dsp_io); + dsp.bio_in_cb().set(FUNC(namcos21_dsp_device::winrun_poly_reset_r)); + dsp.hold_in_cb().set_constant(0); + dsp.hold_ack_out_cb().set_nop(); + dsp.xf_out_cb().set_nop(); +} + +WRITE16_MEMBER(namcos21_dsp_device::pointram_control_w) +{ + COMBINE_DATA( &m_pointram_control ); + m_pointram_idx = 0; /* HACK */ +} + +READ16_MEMBER(namcos21_dsp_device::pointram_data_r) +{ + return m_pointram[m_pointram_idx]; +} + +WRITE16_MEMBER(namcos21_dsp_device::pointram_data_w) +{ + if( ACCESSING_BITS_0_7 ) + { + m_pointram[m_pointram_idx++] = data; + m_pointram_idx &= (PTRAM_SIZE-1); + } +} diff --git a/src/mame/machine/namcos21_dsp.h b/src/mame/machine/namcos21_dsp.h new file mode 100644 index 00000000000..17bf24a4c5c --- /dev/null +++ b/src/mame/machine/namcos21_dsp.h @@ -0,0 +1,85 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +#ifndef MAME_VIDEO_NAMCOS21_DSP_H +#define MAME_VIDEO_NAMCOS21_DSP_H + +#pragma once + +#include "cpu/tms32025/tms32025.h" +#include "video/namcos21_3d.h" + +#define WINRUN_MAX_POLY_PARAM (1+256*3) + +#define PTRAM_SIZE 0x20000 + +class namcos21_dsp_device : public device_t +{ +public: + namcos21_dsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // config + template <typename T> void set_renderer_tag(T &&tag) { m_renderer.set_tag(std::forward<T>(tag)); } + + DECLARE_WRITE16_MEMBER(winrun_dspbios_w); + DECLARE_READ16_MEMBER(winrun_68k_dspcomram_r); + DECLARE_WRITE16_MEMBER(winrun_68k_dspcomram_w); + DECLARE_READ16_MEMBER(winrun_dspcomram_control_r); + DECLARE_WRITE16_MEMBER(winrun_dspcomram_control_w); + + DECLARE_WRITE16_MEMBER(pointram_control_w); + DECLARE_READ16_MEMBER(pointram_data_r); + DECLARE_WRITE16_MEMBER(pointram_data_w); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + virtual void device_add_mconfig(machine_config &config) override; + + void winrun_dsp_data(address_map &map); + void winrun_dsp_io(address_map &map); + void winrun_dsp_program(address_map &map); +private: + + required_device<cpu_device> m_dsp; + required_shared_ptr<uint16_t> m_winrun_dspbios; + required_shared_ptr<uint16_t> m_winrun_polydata; + required_region_ptr<uint16_t> m_ptrom16; + + required_device<namcos21_3d_device> m_renderer; + std::unique_ptr<uint8_t[]> m_pointram; + int m_pointram_idx; + uint16_t m_pointram_control; + + uint16_t m_winrun_dspcomram_control[8]; + std::unique_ptr<uint16_t[]> m_winrun_dspcomram; + uint16_t m_winrun_poly_buf[WINRUN_MAX_POLY_PARAM]; + int m_winrun_poly_index; + uint32_t m_winrun_pointrom_addr; + int m_winrun_dsp_alive; + + void winrun_flush_poly(); + + int m_poly_frame_width; + int m_poly_frame_height; + + DECLARE_READ16_MEMBER(winrun_cuskey_r); + DECLARE_WRITE16_MEMBER(winrun_cuskey_w); + DECLARE_READ16_MEMBER(winrun_dspcomram_r); + DECLARE_WRITE16_MEMBER(winrun_dspcomram_w); + DECLARE_READ16_MEMBER(winrun_table_r); + DECLARE_WRITE16_MEMBER(winrun_dsp_complete_w); + DECLARE_WRITE16_MEMBER(winrun_dsp_render_w); + DECLARE_READ16_MEMBER(winrun_poly_reset_r); + DECLARE_WRITE16_MEMBER(winrun_dsp_pointrom_addr_w); + DECLARE_READ16_MEMBER(winrun_dsp_pointrom_data_r); + + TIMER_CALLBACK_MEMBER(suspend_callback); + emu_timer *m_suspend_timer; + +}; + +DECLARE_DEVICE_TYPE(NAMCOS21_DSP, namcos21_dsp_device) + +#endif // MAME_VIDEO_NAMCOS21_DSP_H diff --git a/src/mame/machine/namcos21_dsp_c67.cpp b/src/mame/machine/namcos21_dsp_c67.cpp new file mode 100644 index 00000000000..ca3ca239296 --- /dev/null +++ b/src/mame/machine/namcos21_dsp_c67.cpp @@ -0,0 +1,769 @@ +// license:BSD-3-Clause +// copyright-holders:Phil Stroffolino, David Haywood + +/* + +Common code for the later Namco System 21 DSP board 5 TMS320C25 DSPs with custom Namco programming (marked C67) in a 1x Master, 4x Slave configuration + +used by Star Blade, Cybersled + +TODO: handle protection properly and with callbacks + handle splitting of workload across slaves + remove hacks! + some of the list processing should probably be in the 3d device, split it out + +*/ + +#include "emu.h" +#include "namcos21_dsp_c67.h" + +DEFINE_DEVICE_TYPE(NAMCOS21_DSP_C67, namcos21_dsp_c67_device, "namcos21_dsp_c67_device", "Namco System 21 DSP Setup (5x C67 type)") + +namcos21_dsp_c67_device::namcos21_dsp_c67_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, NAMCOS21_DSP_C67, tag, owner, clock), + m_renderer(*this, finder_base::DUMMY_TAG), + m_c67master(*this, "dspmaster"), + m_c67slave(*this, "dspslave%u", 0U), + m_ptrom24(*this,"point24"), + m_master_dsp_ram(*this,"master_dsp_ram"), + m_gametype(0), + m_yield_hack_cb(*this), + m_irq_enable(false) +{ +} + +void namcos21_dsp_c67_device::device_start() +{ + m_dspram16.resize(0x10000/2); // 0x8000 16-bit words + std::fill(std::begin(m_dspram16), std::end(m_dspram16), 0x0000); + + m_yield_hack_cb.resolve_safe(); + m_pointram = std::make_unique<uint8_t[]>(PTRAM_SIZE); + m_mpDspState = make_unique_clear<dsp_state>(); + + save_item(NAME(m_dspram16)); +} + +void namcos21_dsp_c67_device::device_reset() +{ + m_poly_frame_width = m_renderer->get_width(); + m_poly_frame_height = m_renderer->get_height(); + + /* DSP startup hacks */ + m_mbNeedsKickstart = 20; + if (m_gametype == NAMCOS21_CYBERSLED) + { + m_mbNeedsKickstart = 200; + } + + /* Wipe the framebuffers */ + m_renderer->swap_and_clear_poly_framebuffer(); + m_renderer->swap_and_clear_poly_framebuffer(); + + //reset_dsps(ASSERT_LINE); + + m_mpDspState->masterSourceAddr = 0; + m_mpDspState->slaveBytesAvailable = 0; + m_mpDspState->slaveBytesAdvertised = 0; + m_mpDspState->slaveInputStart = 0; + m_mpDspState->slaveOutputSize = 0; + m_mpDspState->masterDirectDrawSize = 0; + m_mpDspState->masterFinished = 0; + m_mpDspState->slaveActive = 0; + + m_pointram_idx = 0; + m_pointram_control = 0; + m_pointrom_idx = 0; + m_mPointRomMSB = 0; + m_mbPointRomDataAvailable = 0; + m_irq_enable = 0; + + // clear these? + //m_depthcue[2][0x400]; + //m_pointram + //m_mpDspState->slaveInputBuffer[DSP_BUF_MAX]; + //m_mpDspState->slaveOutputBuffer[DSP_BUF_MAX]; + //m_mpDspState->masterDirectDrawBuffer[256]; +} + +void namcos21_dsp_c67_device::reset_dsps(int state) +{ + if (m_c67master) + m_c67master->set_input_line(INPUT_LINE_RESET, state); + + if (m_c67slave[0]) + m_c67slave[0]->set_input_line(INPUT_LINE_RESET, state); +} + + +void namcos21_dsp_c67_device::reset_kickstart() +{ + //printf( "dspkick=0x%x\n", data ); + namcos21_kickstart_hacks(1); +} + +void namcos21_dsp_c67_device::device_add_mconfig(machine_config &config) +{ + namco_c67_device& dspmaster(NAMCO_C67(config, m_c67master, 24000000)); /* 24 MHz? overclocked */ + dspmaster.set_addrmap(AS_PROGRAM, &namcos21_dsp_c67_device::master_dsp_program); + dspmaster.set_addrmap(AS_DATA, &namcos21_dsp_c67_device::master_dsp_data); + dspmaster.set_addrmap(AS_IO, &namcos21_dsp_c67_device::master_dsp_io); + dspmaster.hold_in_cb().set_constant(0); + dspmaster.hold_ack_out_cb().set_nop(); + dspmaster.xf_out_cb().set(FUNC(namcos21_dsp_c67_device::dsp_xf_w)); + + for (int i = 0; i < 4; i++) + { + namco_c67_device& dspslave(NAMCO_C67(config, m_c67slave[i], 24000000)); /* 24 MHz? overclocked */ + dspslave.set_addrmap(AS_PROGRAM, &namcos21_dsp_c67_device::slave_dsp_program); + dspslave.set_addrmap(AS_DATA, &namcos21_dsp_c67_device::slave_dsp_data); + dspslave.set_addrmap(AS_IO, &namcos21_dsp_c67_device::slave_dsp_io); + dspslave.hold_in_cb().set_constant(0); + dspslave.hold_ack_out_cb().set_nop(); + dspslave.xf_out_cb().set(FUNC(namcos21_dsp_c67_device::slave_XF_output_w)); + + // the emulation currently only uses one slave DSP clocked at 4x the normal rate instead of the master splitting the workload across the 4 slaves + if (i!=0) + dspslave.set_disable(); + else + dspslave.set_clock(24000000*4); + } +} + + +WRITE16_MEMBER(namcos21_dsp_c67_device::dspcuskey_w) +{ /* TODO: proper cuskey emulation */ +} + +READ16_MEMBER(namcos21_dsp_c67_device::dspcuskey_r) +{ + uint16_t result = 0; + if( m_gametype == NAMCOS21_SOLVALOU ) + { + switch( m_c67master->pc() ) + { + case 0x805e: result = 0x0000; break; + case 0x805f: result = 0xfeba; break; + case 0x8067: result = 0xffff; break; + case 0x806e: result = 0x0145; break; + default: + logerror( "unk cuskey_r; pc=0x%x\n", m_c67master->pc() ); + break; + } + } + else if( m_gametype == NAMCOS21_CYBERSLED ) + { + switch( m_c67master->pc() ) + { + case 0x8061: result = 0xfe95; break; + case 0x8069: result = 0xffff; break; + case 0x8070: result = 0x016A; break; + default: + break; + } + } + else if( m_gametype == NAMCOS21_AIRCOMBAT ) + { + switch( m_c67master->pc() ) + { + case 0x8062: result = 0xfeb9; break; + case 0x806a: result = 0xffff; break; + case 0x8071: result = 0x0146; break; + default: + break; + } + } + return result; +} + +void namcos21_dsp_c67_device::transmit_word_to_slave(uint16_t data) +{ + unsigned offs = m_mpDspState->slaveInputStart+m_mpDspState->slaveBytesAvailable++; + m_mpDspState->slaveInputBuffer[offs%DSP_BUF_MAX] = data; + if (ENABLE_LOGGING) logerror( "+%04x(#%04x)\n", data, m_mpDspState->slaveBytesAvailable ); + m_mpDspState->slaveActive = 1; + if( m_mpDspState->slaveBytesAvailable >= DSP_BUF_MAX ) + { + fatalerror( "IDC overflow\n" ); + } +} + +void namcos21_dsp_c67_device::transfer_dsp_data() +{ + uint16_t addr = m_mpDspState->masterSourceAddr; + int mode = addr&0x8000; + addr&=0x7fff; + if( addr ) + { + for(;;) + { + int i; + uint16_t old = addr; + uint16_t code = m_dspram16[addr++]; + if( code == 0xffff ) + { + if( mode ) + { + addr = m_dspram16[addr]; + m_mpDspState->masterSourceAddr = addr; + if (ENABLE_LOGGING) logerror( "LOOP:0x%04x\n", addr ); + addr&=0x7fff; + if( old==addr ) + { + return; + } + } + else + { + m_mpDspState->masterSourceAddr = 0; + return; + } + } + else if( mode==0 ) + { /* direct data transfer */ + if (ENABLE_LOGGING) logerror( "DATA TFR(0x%x)\n", code ); + transmit_word_to_slave(code); + for( i=0; i<code; i++ ) + { + uint16_t data = m_dspram16[addr++]; + transmit_word_to_slave(data); + } + } + else if( code==0x18 || code==0x1a ) + { + if (ENABLE_LOGGING) logerror( "HEADER TFR(0x%x)\n", code ); + transmit_word_to_slave(code+1); + for( i=0; i<code; i++ ) + { + uint16_t data = m_dspram16[addr++]; + transmit_word_to_slave(data); + } + } + else + { + int32_t masterAddr = read_pointrom_data(code); + if (ENABLE_LOGGING) logerror( "OBJ TFR(0x%x)\n", code ); + { + uint16_t len = m_dspram16[addr++]; + for(;;) + { + int subAddr = read_pointrom_data(masterAddr++); + if( subAddr==0xffffff ) + { + break; + } + else + { + int primWords = (uint16_t)read_pointrom_data(subAddr++); + // TODO: this function causes an IDC overflow in Solvalou, something else failed prior to that? + // In Header TFR when bad parameters happens there's a suspicious 0x000f 0x0003 as first two words, + // maybe it's supposed to have a different length there ... + // cfr: object code 0x17 in service mode + if( primWords>2 ) + { + transmit_word_to_slave(0); /* pad1 */ + transmit_word_to_slave(len+1); + for( i=0; i<len; i++ ) + { /* transform */ + transmit_word_to_slave(m_dspram16[addr+i]); + } + transmit_word_to_slave(0); /* pad2 */ + transmit_word_to_slave(primWords+1); + for( i=0; i<primWords; i++ ) + { + transmit_word_to_slave((uint16_t)read_pointrom_data(subAddr+i)); + } + } + else + { + if (ENABLE_LOGGING) logerror( "TFR NOP?\n" ); + } + } + } /* for(;;) */ + addr+=len; + } + } + } /* for(;;) */ + } +} + + + +void namcos21_dsp_c67_device::namcos21_kickstart_hacks(int internal) +{ + /* patch dsp watchdog */ + switch (m_gametype) + { + case namcos21_dsp_c67_device::NAMCOS21_AIRCOMBAT: + m_master_dsp_ram[0x008e] = 0x808f; + break; + case namcos21_dsp_c67_device::NAMCOS21_SOLVALOU: + m_master_dsp_ram[0x008b] = 0x808c; + break; + default: + break; + } + if (internal) + { + if (m_mbNeedsKickstart == 0) return; + m_mbNeedsKickstart--; + if (m_mbNeedsKickstart) return; + } + + m_renderer->swap_and_clear_poly_framebuffer(); + m_mpDspState->masterSourceAddr = 0; + m_mpDspState->slaveOutputSize = 0; + m_mpDspState->masterFinished = 0; + m_mpDspState->slaveActive = 0; + m_c67master->set_input_line(0, HOLD_LINE); + m_c67slave[0]->pulse_input_line(INPUT_LINE_RESET, attotime::zero); +} + +uint16_t namcos21_dsp_c67_device::read_word_from_slave_input() +{ + uint16_t data = 0; + if( m_mpDspState->slaveBytesAvailable>0 ) + { + data = m_mpDspState->slaveInputBuffer[m_mpDspState->slaveInputStart++]; + m_mpDspState->slaveInputStart %= DSP_BUF_MAX; + m_mpDspState->slaveBytesAvailable--; + if( m_mpDspState->slaveBytesAdvertised>0 ) + { + m_mpDspState->slaveBytesAdvertised--; + } + if (ENABLE_LOGGING) logerror( "%s:-%04x(0x%04x)\n", machine().describe_context(), data, m_mpDspState->slaveBytesAvailable ); + } + return data; +} + +uint16_t namcos21_dsp_c67_device::get_input_bytes_advertised_for_slave() +{ + if( m_mpDspState->slaveBytesAdvertised < m_mpDspState->slaveBytesAvailable ) + { + m_mpDspState->slaveBytesAdvertised++; + } + else if( m_mpDspState->slaveActive && m_mpDspState->masterFinished && m_mpDspState->masterSourceAddr ) + { + namcos21_kickstart_hacks(0); + } + return m_mpDspState->slaveBytesAdvertised; +} + +READ16_MEMBER(namcos21_dsp_c67_device::dspram16_r) +{ + return m_dspram16[offset]; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dspram16_hack_w) +{ + COMBINE_DATA(&m_dspram16[offset]); + + if (m_mpDspState->masterSourceAddr && offset == 1 + (m_mpDspState->masterSourceAddr & 0x7fff)) + { + if (ENABLE_LOGGING) logerror("IDC-CONTINUE\n"); + transfer_dsp_data(); + } + else if (m_gametype == NAMCOS21_SOLVALOU && offset == 0x103) + { + // HACK: synchronization for solvalou - is this really needed? + m_yield_hack_cb(1); + } +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dspram16_w) +{ + COMBINE_DATA(&m_dspram16[offset]); + + if (m_mpDspState->masterSourceAddr && offset == 1 + (m_mpDspState->masterSourceAddr & 0x7fff)) + { + if (ENABLE_LOGGING) logerror("IDC-CONTINUE\n"); + transfer_dsp_data(); + } +} + +/***********************************************************/ + +int32_t namcos21_dsp_c67_device::read_pointrom_data(unsigned offset) +{ + return m_ptrom24[offset]; +} + + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_port0_r) +{ + int32_t data = read_pointrom_data(m_pointrom_idx++); + m_mPointRomMSB = (uint8_t)(data>>16); + m_mbPointRomDataAvailable = 1; + return (uint16_t)data; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_port0_w) +{ /* unused? */ + if (ENABLE_LOGGING) logerror( "PTRAM_LO(0x%04x)\n", data ); +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_port1_r) +{ + if( m_mbPointRomDataAvailable ) + { + m_mbPointRomDataAvailable = 0; + return m_mPointRomMSB; + } + return 0x8000; /* IDC ack? */ +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_port1_w) +{ /* unused? */ + if (ENABLE_LOGGING) logerror( "PTRAM_HI(0x%04x)\n", data ); +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_port2_r) +{ /* IDC TRANSMIT ENABLE? */ + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_port2_w) +{ + if (ENABLE_LOGGING) logerror( "IDC ADDR INIT(0x%04x)\n", data ); + m_mpDspState->masterSourceAddr = data; + transfer_dsp_data(); +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_port3_idc_rcv_enable_r) +{ /* IDC RECEIVE ENABLE? */ + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_port3_w) +{ + m_pointrom_idx<<=16; + m_pointrom_idx|=data; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_port4_w) +{ /* receives $0B<<4 prior to IDC setup */ +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_port8_r) +{ /* SMU status */ + return 1; +} + + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_port8_w) +{ + if (ENABLE_LOGGING) logerror( "port8_w(%d)\n", data ); + if( data ) + { + m_mpDspState->masterFinished = 1; + } + m_irq_enable = data; +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_port9_r) +{ /* render-device-busy; used for direct-draw */ + return 0; +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_porta_r) +{ /* config */ + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_porta_w) +{ + /* boot: 1 */ + /* IRQ0 end: 0 */ + /* INT2 begin: 1 */ + /* direct-draw begin: 0 */ + /* INT1 begin: 1 */ +// if (ENABLE_LOGGING) logerror( "dsp_porta_w(0x%04x)\n", data ); +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_portb_r) +{ /* config */ + return 1; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_portb_w) +{ + if( data==0 ) + { /* only 0->1 transition triggers */ + return; + } + if( m_mpDspState->masterDirectDrawSize == 13 ) + { + int i; + int sx[4], sy[4], zcode[4]; + int color = m_mpDspState->masterDirectDrawBuffer[0]; + for( i=0; i<4; i++ ) + { + sx[i] = m_poly_frame_width/2 + (int16_t)m_mpDspState->masterDirectDrawBuffer[i*3+1]; + sy[i] = m_poly_frame_height/2 + (int16_t)m_mpDspState->masterDirectDrawBuffer[i*3+2]; + zcode[i] = m_mpDspState->masterDirectDrawBuffer[i*3+3]; + } + if( color&0x8000 ) + { + m_renderer->draw_quad(sx, sy, zcode, color); + } + else + { + logerror( "indirection used w/ direct draw?\n" ); + } + } + else if( m_mpDspState->masterDirectDrawSize ) + { + logerror( "unexpected masterDirectDrawSize=%d!\n",m_mpDspState->masterDirectDrawSize ); + } + m_mpDspState->masterDirectDrawSize = 0; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_portc_w) +{ + if( m_mpDspState->masterDirectDrawSize < DSP_BUF_MAX ) + { + m_mpDspState->masterDirectDrawBuffer[m_mpDspState->masterDirectDrawSize++] = data; + } + else + { + logerror( "portc overflow\n" ); + } +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_portf_r) +{ /* informs BIOS that this is Master DSP */ + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_xf_w) +{ + if (ENABLE_LOGGING) logerror("xf(%d)\n",data); +} + +void namcos21_dsp_c67_device::master_dsp_program(address_map &map) +{ + map(0x8000, 0xbfff).ram().share("master_dsp_ram"); +} + +void namcos21_dsp_c67_device::master_dsp_data(address_map &map) +{ + map(0x2000, 0x200f).rw(FUNC(namcos21_dsp_c67_device::dspcuskey_r), FUNC(namcos21_dsp_c67_device::dspcuskey_w)); + map(0x8000, 0xffff).rw(FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_w)); /* 0x8000 words */ +} + +void namcos21_dsp_c67_device::master_dsp_io(address_map &map) +{ + map(0x00, 0x00).rw(FUNC(namcos21_dsp_c67_device::dsp_port0_r), FUNC(namcos21_dsp_c67_device::dsp_port0_w)); + map(0x01, 0x01).rw(FUNC(namcos21_dsp_c67_device::dsp_port1_r), FUNC(namcos21_dsp_c67_device::dsp_port1_w)); + map(0x02, 0x02).rw(FUNC(namcos21_dsp_c67_device::dsp_port2_r), FUNC(namcos21_dsp_c67_device::dsp_port2_w)); + map(0x03, 0x03).rw(FUNC(namcos21_dsp_c67_device::dsp_port3_idc_rcv_enable_r), FUNC(namcos21_dsp_c67_device::dsp_port3_w)); + map(0x04, 0x04).w(FUNC(namcos21_dsp_c67_device::dsp_port4_w)); + map(0x08, 0x08).rw(FUNC(namcos21_dsp_c67_device::dsp_port8_r), FUNC(namcos21_dsp_c67_device::dsp_port8_w)); + map(0x09, 0x09).r(FUNC(namcos21_dsp_c67_device::dsp_port9_r)); + map(0x0a, 0x0a).rw(FUNC(namcos21_dsp_c67_device::dsp_porta_r), FUNC(namcos21_dsp_c67_device::dsp_porta_w)); + map(0x0b, 0x0b).rw(FUNC(namcos21_dsp_c67_device::dsp_portb_r), FUNC(namcos21_dsp_c67_device::dsp_portb_w)); + map(0x0c, 0x0c).w(FUNC(namcos21_dsp_c67_device::dsp_portc_w)); + map(0x0f, 0x0f).r(FUNC(namcos21_dsp_c67_device::dsp_portf_r)); +} + +/************************************************************************************/ + +void namcos21_dsp_c67_device::render_slave_output(uint16_t data) +{ + if( m_mpDspState->slaveOutputSize >= 4096 ) + { + fatalerror( "SLAVE OVERFLOW (0x%x)\n",m_mpDspState->slaveOutputBuffer[0] ); + } + + /* append word to slave output buffer */ + m_mpDspState->slaveOutputBuffer[m_mpDspState->slaveOutputSize++] = data; + + { + uint16_t *pSource = m_mpDspState->slaveOutputBuffer; + uint16_t count = *pSource++; + if( count && m_mpDspState->slaveOutputSize > count ) + { + uint16_t color = *pSource++; + int sx[4], sy[4],zcode[4]; + int j; + if( color&0x8000 ) + { + if( count!=13 ) logerror( "?!direct-draw(%d)\n", count ); + for( j=0; j<4; j++ ) + { + sx[j] = m_poly_frame_width/2 + (int16_t)pSource[3*j+0]; + sy[j] = m_poly_frame_height/2 + (int16_t)pSource[3*j+1]; + zcode[j] = pSource[3*j+2]; + } + m_renderer->draw_quad(sx, sy, zcode, color&0x7fff); + } + else + { + int quad_idx = color*6; + for(;;) + { + uint8_t code = m_pointram[quad_idx++]; + color = m_pointram[quad_idx++]|(code<<8); + for( j=0; j<4; j++ ) + { + uint8_t vi = m_pointram[quad_idx++]; + sx[j] = m_poly_frame_width/2 + (int16_t)pSource[vi*3+0]; + sy[j] = m_poly_frame_height/2 + (int16_t)pSource[vi*3+1]; + zcode[j] = pSource[vi*3+2]; + } + m_renderer->draw_quad(sx, sy, zcode, color&0x7fff); + if( code&0x80 ) + { /* end-of-quadlist marker */ + break; + } + } + } + m_mpDspState->slaveOutputSize = 0; + } + else if( count==0 ) + { + fatalerror( "RenderSlaveOutput\n" ); + } + } +} + +READ16_MEMBER(namcos21_dsp_c67_device::slave_port0_r) +{ + return read_word_from_slave_input(); +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::slave_port0_w) +{ + render_slave_output(data); +} + +READ16_MEMBER(namcos21_dsp_c67_device::slave_port2_r) +{ + return get_input_bytes_advertised_for_slave(); +} + +READ16_MEMBER(namcos21_dsp_c67_device::slave_port3_r) +{ /* render-device queue size */ + /* up to 0x1fe bytes? + * slave blocks until free &space exists + */ + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::slave_port3_w) +{ /* 0=busy, 1=ready? */ +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::slave_XF_output_w) +{ + if (ENABLE_LOGGING) logerror( "%s :slaveXF(%d)\n", machine().describe_context(), data ); +} + +READ16_MEMBER(namcos21_dsp_c67_device::slave_portf_r) +{ /* informs BIOS that this is Slave DSP */ + return 1; +} + +void namcos21_dsp_c67_device::slave_dsp_program(address_map &map) +{ + map(0x8000, 0x8fff).ram(); +} + +void namcos21_dsp_c67_device::slave_dsp_data(address_map &map) +{ + /* no external data memory */ +} + +void namcos21_dsp_c67_device::slave_dsp_io(address_map &map) +{ + map(0x00, 0x00).rw(FUNC(namcos21_dsp_c67_device::slave_port0_r), FUNC(namcos21_dsp_c67_device::slave_port0_w)); + map(0x02, 0x02).r(FUNC(namcos21_dsp_c67_device::slave_port2_r)); + map(0x03, 0x03).rw(FUNC(namcos21_dsp_c67_device::slave_port3_r), FUNC(namcos21_dsp_c67_device::slave_port3_w)); + map(0x0f, 0x0f).r(FUNC(namcos21_dsp_c67_device::slave_portf_r)); +} + +/************************************************************************************/ + +/** + * 801f->800f : prepare for master access to point ram + * 801f : done + * + * #bits data line + * 8 1a0 4 + * 7 0f8 4 + * 7 0ff 4 + * 1 001 4 + * 7 00a 2 + * a 0fe 8 + * + * line #bits data + * 0003 000A 000004FE + * 0001 0007 0000000A + * 0002 001A 03FFF1A0 + */ +WRITE16_MEMBER(namcos21_dsp_c67_device::pointram_control_w) +{ +// uint16_t prev = m_pointram_control; + COMBINE_DATA( &m_pointram_control ); + + /* m_pointram_control&0x20 : bank for depthcue data */ +#if 0 + logerror( "%s dsp_control_w:[%x]:=%04x ", + machine().describe_context(), + offset, + m_pointram_control ); + + uint16_t delta = (prev^m_pointram_control)&m_pointram_control; + if( delta&0x10 ) + { + logerror( " [reset]" ); + } + if( delta&2 ) + { + logerror( " send(A)%x", m_pointram_control&1 ); + } + if( delta&4 ) + { + logerror( " send(B)%x", m_pointram_control&1 ); + } + if( delta&8 ) + { + logerror( " send(C)%x", m_pointram_control&1 ); + } + logerror( "\n" ); +#endif + m_pointram_idx = 0; /* HACK */ +} + +READ16_MEMBER(namcos21_dsp_c67_device::pointram_data_r) +{ + return m_pointram[m_pointram_idx]; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::pointram_data_w) +{ + if( ACCESSING_BITS_0_7 ) + { +// if( (m_pointram_idx%6)==0 ) logerror("\n" ); +// logerror( " %02x", data ); + m_pointram[m_pointram_idx++] = data; + m_pointram_idx &= (PTRAM_SIZE-1); + } +} + + +READ16_MEMBER(namcos21_dsp_c67_device::namcos21_depthcue_r) +{ + int bank = (m_pointram_control&0x20)?1:0; + return m_depthcue[bank][offset]; +} +WRITE16_MEMBER(namcos21_dsp_c67_device::namcos21_depthcue_w) +{ + if( ACCESSING_BITS_0_7 ) + { + int bank = (m_pointram_control&0x20)?1:0; + m_depthcue[bank][offset] = data; +// if( (offset&0xf)==0 ) logerror( "\n depthcue: " ); +// logerror( " %02x", data ); + } +} diff --git a/src/mame/machine/namcos21_dsp_c67.h b/src/mame/machine/namcos21_dsp_c67.h new file mode 100644 index 00000000000..42e13a34a8c --- /dev/null +++ b/src/mame/machine/namcos21_dsp_c67.h @@ -0,0 +1,147 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +#ifndef MAME_VIDEO_NAMCOS21_DSP_C67_H +#define MAME_VIDEO_NAMCOS21_DSP_C67_H + +#pragma once + +#include "machine/namco_c67.h" +#include "video/namcos21_3d.h" + +#define PTRAM_SIZE 0x20000 + +#define ENABLE_LOGGING 0 + +class namcos21_dsp_c67_device : public device_t +{ +public: + enum + { /* Namco System21 */ + NAMCOS21_AIRCOMBAT = 0x4000, + NAMCOS21_STARBLADE, + NAMCOS21_CYBERSLED, + NAMCOS21_SOLVALOU, + }; + + namcos21_dsp_c67_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // config + template <typename T> void set_renderer_tag(T &&tag) { m_renderer.set_tag(std::forward<T>(tag)); } + template <class Object> devcb_base &set_yield_hack_callback(Object &&cb) { return m_yield_hack_cb.set_callback(std::forward<Object>(cb)); } + auto yield_hack_callback() { return m_yield_hack_cb.bind(); } + + void set_gametype(int gametype) { m_gametype = gametype; } + + DECLARE_READ16_MEMBER(dspram16_r); + DECLARE_WRITE16_MEMBER(dspram16_hack_w); + DECLARE_WRITE16_MEMBER(dspram16_w); + DECLARE_WRITE16_MEMBER(pointram_control_w); + DECLARE_READ16_MEMBER(pointram_data_r); + DECLARE_WRITE16_MEMBER(pointram_data_w); + DECLARE_READ16_MEMBER(namcos21_depthcue_r); + DECLARE_WRITE16_MEMBER(namcos21_depthcue_w); + + void reset_dsps(int state); + void reset_kickstart(); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + virtual void device_add_mconfig(machine_config &config) override; + +private: + #define DSP_BUF_MAX (4096*12) + struct dsp_state + { + unsigned masterSourceAddr; + uint16_t slaveInputBuffer[DSP_BUF_MAX]; + unsigned slaveBytesAvailable; + unsigned slaveBytesAdvertised; + unsigned slaveInputStart; + uint16_t slaveOutputBuffer[DSP_BUF_MAX]; + unsigned slaveOutputSize; + uint16_t masterDirectDrawBuffer[256]; + unsigned masterDirectDrawSize; + int masterFinished; + int slaveActive; + }; + + required_device<namcos21_3d_device> m_renderer; + required_device<cpu_device> m_c67master; + required_device_array<cpu_device,4> m_c67slave; + required_region_ptr<int32_t> m_ptrom24; + std::vector<uint16_t> m_dspram16; + + required_shared_ptr<uint16_t> m_master_dsp_ram; + + int m_gametype; // hacks + devcb_write_line m_yield_hack_cb; + + std::unique_ptr<dsp_state> m_mpDspState; + + std::unique_ptr<uint8_t[]> m_pointram; + int m_pointram_idx; + uint16_t m_pointram_control; + uint32_t m_pointrom_idx; + uint8_t m_mPointRomMSB; + int m_mbPointRomDataAvailable; + uint8_t m_depthcue[2][0x400]; + int m_irq_enable; + + int m_mbNeedsKickstart; + + int m_poly_frame_width; + int m_poly_frame_height; + + int32_t read_pointrom_data(unsigned offset); + void transmit_word_to_slave(uint16_t data); + void transfer_dsp_data(); + uint16_t read_word_from_slave_input(); + uint16_t get_input_bytes_advertised_for_slave(); + void render_slave_output(uint16_t data); + + void namcos21_kickstart_hacks(int internal); + + DECLARE_WRITE16_MEMBER(dspcuskey_w); + DECLARE_READ16_MEMBER(dspcuskey_r); + DECLARE_READ16_MEMBER(dsp_port0_r); + DECLARE_WRITE16_MEMBER(dsp_port0_w); + DECLARE_READ16_MEMBER(dsp_port1_r); + DECLARE_WRITE16_MEMBER(dsp_port1_w); + DECLARE_READ16_MEMBER(dsp_port2_r); + DECLARE_WRITE16_MEMBER(dsp_port2_w); + DECLARE_READ16_MEMBER(dsp_port3_idc_rcv_enable_r); + DECLARE_WRITE16_MEMBER(dsp_port3_w); + DECLARE_WRITE16_MEMBER(dsp_port4_w); + DECLARE_READ16_MEMBER(dsp_port8_r); + DECLARE_WRITE16_MEMBER(dsp_port8_w); + DECLARE_READ16_MEMBER(dsp_port9_r); + DECLARE_READ16_MEMBER(dsp_porta_r); + DECLARE_WRITE16_MEMBER(dsp_porta_w); + DECLARE_READ16_MEMBER(dsp_portb_r); + DECLARE_WRITE16_MEMBER(dsp_portb_w); + DECLARE_WRITE16_MEMBER(dsp_portc_w); + DECLARE_READ16_MEMBER(dsp_portf_r); + DECLARE_WRITE16_MEMBER(dsp_xf_w); + DECLARE_READ16_MEMBER(slave_port0_r); + DECLARE_WRITE16_MEMBER(slave_port0_w); + DECLARE_READ16_MEMBER(slave_port2_r); + DECLARE_READ16_MEMBER(slave_port3_r); + DECLARE_WRITE16_MEMBER(slave_port3_w); + DECLARE_WRITE16_MEMBER(slave_XF_output_w); + DECLARE_READ16_MEMBER(slave_portf_r); + + void master_dsp_data(address_map &map); + void master_dsp_io(address_map &map); + void master_dsp_program(address_map &map); + + void slave_dsp_data(address_map &map); + void slave_dsp_io(address_map &map); + void slave_dsp_program(address_map &map); +}; + +DECLARE_DEVICE_TYPE(NAMCOS21_DSP_C67, namcos21_dsp_c67_device) + +#endif // MAME_VIDEO_NAMCOS21_DSP_C67_H diff --git a/src/mame/machine/orion.cpp b/src/mame/machine/orion.cpp index f13f937ccf0..d6dc146a678 100644 --- a/src/mame/machine/orion.cpp +++ b/src/mame/machine/orion.cpp @@ -49,22 +49,22 @@ void orion_state::machine_start() READ8_MEMBER(orion_state::orion128_system_r) { - return m_ppi8255_2->read(space, offset & 3); + return m_ppi8255_2->read(offset & 3); } WRITE8_MEMBER(orion_state::orion128_system_w) { - m_ppi8255_2->write(space, offset & 3, data); + m_ppi8255_2->write(offset & 3, data); } READ8_MEMBER(orion_state::orion128_romdisk_r) { - return m_ppi8255_1->read(space, offset & 3); + return m_ppi8255_1->read(offset & 3); } WRITE8_MEMBER(orion_state::orion128_romdisk_w) { - m_ppi8255_1->write(space, offset & 3, data); + m_ppi8255_1->write(offset & 3, data); } void orion_state::orion_set_video_mode(int width) diff --git a/src/mame/machine/pk8020.cpp b/src/mame/machine/pk8020.cpp index 74f6852501f..a9ab9b7acc3 100644 --- a/src/mame/machine/pk8020.cpp +++ b/src/mame/machine/pk8020.cpp @@ -149,22 +149,14 @@ READ8_MEMBER(pk8020_state::devices_r) { switch(offset & 0x38) { - case 0x00: return m_pit8253->read(space, offset & 3); - case 0x08: return m_ppi8255_3->read(space,offset & 3); - case 0x10: switch(offset & 1) { - case 0 : return m_rs232->data_r(space,0); - case 1 : return m_rs232->status_r(space,0); - } - break; + case 0x00: return m_pit8253->read(offset & 3); + case 0x08: return m_ppi8255_3->read(offset & 3); + case 0x10: return m_rs232->read(offset & 1); case 0x18: return m_wd1793->read(offset & 0x03); - case 0x20: switch(offset & 1) { - case 0 : return m_lan->data_r(space,0); - case 1 : return m_lan->status_r(space,0); - } - break; - case 0x28: return m_pic8259->read(space, offset & 1); - case 0x30: return m_ppi8255_2->read(space,offset & 3); - case 0x38: return m_ppi8255_1->read(space,offset & 3); + case 0x20: return m_lan->read(offset & 1); + case 0x28: return m_pic8259->read(offset & 1); + case 0x30: return m_ppi8255_2->read(offset & 3); + case 0x38: return m_ppi8255_1->read(offset & 3); } return 0xff; } @@ -173,24 +165,14 @@ WRITE8_MEMBER(pk8020_state::devices_w) { switch(offset & 0x38) { - case 0x00: m_pit8253->write(space, offset & 3, data); break; - case 0x08: m_ppi8255_3->write(space,offset & 3,data); break; - case 0x10: switch(offset & 1) { - case 0 : m_rs232->data_w(space,0,data); break; - case 1 : m_rs232->control_w(space,0,data); break; - } - break; - case 0x18: - m_wd1793->write(offset & 0x03, data); - break; - case 0x20: switch(offset & 1) { - case 0 : m_lan->data_w(space,0,data); break; - case 1 : m_lan->control_w(space,0,data); break; - } - break; - case 0x28: m_pic8259->write(space, offset & 1,data);break; - case 0x30: m_ppi8255_2->write(space,offset & 3,data); break; - case 0x38: m_ppi8255_1->write(space,offset & 3,data); break; + case 0x00: m_pit8253->write(offset & 3, data); break; + case 0x08: m_ppi8255_3->write(offset & 3,data); break; + case 0x10: m_rs232->write(offset & 1, data); break; + case 0x18: m_wd1793->write(offset & 0x03, data); break; + case 0x20: m_lan->write(offset & 1, data); break; + case 0x28: m_pic8259->write(offset & 1,data);break; + case 0x30: m_ppi8255_2->write(offset & 3,data); break; + case 0x38: m_ppi8255_1->write(offset & 3,data); break; } } diff --git a/src/mame/machine/pmd85.cpp b/src/mame/machine/pmd85.cpp index ca16cd117fa..acddc4e1978 100644 --- a/src/mame/machine/pmd85.cpp +++ b/src/mame/machine/pmd85.cpp @@ -469,7 +469,7 @@ READ8_MEMBER(pmd85_state::pmd85_io_r) switch (offset & 0x80) { case 0x80: /* Motherboard 8255 */ - return m_ppi8255_0->read(space, offset & 0x03); + return m_ppi8255_0->read(offset & 0x03); } break; case 0x08: /* ROM module connector */ @@ -485,7 +485,7 @@ READ8_MEMBER(pmd85_state::pmd85_io_r) switch (offset & 0x80) { case 0x80: /* ROM module 8255 */ - return m_ppi8255_3->read(space, offset & 0x03); + return m_ppi8255_3->read(offset & 0x03); } } break; @@ -498,18 +498,13 @@ READ8_MEMBER(pmd85_state::pmd85_io_r) switch (offset & 0x70) { case 0x10: /* 8251 (casette recorder, V24) */ - switch (offset & 0x01) - { - case 0x00: return m_uart->data_r(space, offset & 0x01); - case 0x01: return m_uart->status_r(space, offset & 0x01); - } - break; + return m_uart->read(offset & 0x01); case 0x40: /* 8255 (GPIO/0, GPIO/1) */ - return m_ppi8255_1->read(space, offset & 0x03); + return m_ppi8255_1->read(offset & 0x03); case 0x50: /* 8253 */ - return m_pit8253->read(space, offset & 0x03); + return m_pit8253->read(offset & 0x03); case 0x70: /* 8255 (IMS-2) */ - return m_ppi8255_2->read(space, offset & 0x03); + return m_ppi8255_2->read(offset & 0x03); } break; case 0x80: /* external interfaces */ @@ -536,7 +531,7 @@ WRITE8_MEMBER(pmd85_state::pmd85_io_w) switch (offset & 0x80) { case 0x80: /* Motherboard 8255 */ - m_ppi8255_0->write(space, offset & 0x03, data); + m_ppi8255_0->write(offset & 0x03, data); /* PMD-85.3 memory banking */ if ((offset & 0x03) == 0x03) { @@ -559,7 +554,7 @@ WRITE8_MEMBER(pmd85_state::pmd85_io_w) switch (offset & 0x80) { case 0x80: /* ROM module 8255 */ - m_ppi8255_3->write(space, offset & 0x03, data); + m_ppi8255_3->write(offset & 0x03, data); break; } } @@ -573,21 +568,17 @@ WRITE8_MEMBER(pmd85_state::pmd85_io_w) switch (offset & 0x70) { case 0x10: /* 8251 (casette recorder, V24) */ - switch (offset & 0x01) - { - case 0x00: m_uart->data_w(space, offset & 0x01, data); break; - case 0x01: m_uart->control_w(space, offset & 0x01, data); break; - } + m_uart->write(offset & 0x01, data); break; case 0x40: /* 8255 (GPIO/0, GPIO/0) */ - m_ppi8255_1->write(space, offset & 0x03, data); + m_ppi8255_1->write(offset & 0x03, data); break; case 0x50: /* 8253 */ - m_pit8253->write(space, offset & 0x03, data); + m_pit8253->write(offset & 0x03, data); logerror ("8253 writing. Address: %02x, Data: %02x\n", offset, data); break; case 0x70: /* 8255 (IMS-2) */ - m_ppi8255_2->write(space, offset & 0x03, data); + m_ppi8255_2->write(offset & 0x03, data); break; } break; @@ -621,7 +612,7 @@ READ8_MEMBER(pmd85_state::mato_io_r) switch (offset & 0x80) { case 0x80: /* Motherboard 8255 */ - return m_ppi8255_0->read(space, offset & 0x03); + return m_ppi8255_0->read(offset & 0x03); } break; } @@ -644,7 +635,7 @@ WRITE8_MEMBER(pmd85_state::mato_io_w) switch (offset & 0x80) { case 0x80: /* Motherboard 8255 */ - return m_ppi8255_0->write(space, offset & 0x03, data); + return m_ppi8255_0->write(offset & 0x03, data); } break; } diff --git a/src/mame/machine/psion_pack.cpp b/src/mame/machine/psion_pack.cpp index 498ceeaf85c..9953a711a5a 100644 --- a/src/mame/machine/psion_pack.cpp +++ b/src/mame/machine/psion_pack.cpp @@ -49,7 +49,7 @@ OPTION_GUIDE_START( datapack_option_guide ) OPTION_INT('C', "copy", "Copyable" ) OPTION_GUIDE_END -static const char *datapack_option_spec = +static char const *const datapack_option_spec = "S1/2/4/[8]/16;R0/[1];P[0]/1;W[0]/1;B[0]/1;C0/[1]"; diff --git a/src/mame/machine/qx10kbd.cpp b/src/mame/machine/qx10kbd.cpp index c467b4689ee..d9b727ae5d2 100644 --- a/src/mame/machine/qx10kbd.cpp +++ b/src/mame/machine/qx10kbd.cpp @@ -1,73 +1,62 @@ // license:BSD-3-Clause // copyright-holders:Carl -// TODO: dump 8049 mcu; key repeat; LEDs +// TODO: LEDs #include "emu.h" #include "machine/qx10kbd.h" - -#include "machine/keyboard.ipp" +#include "cpu/mcs48/mcs48.h" qx10_keyboard_device::qx10_keyboard_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock) - : buffered_rs232_device(mconfig, QX10_KEYBOARD, tag, owner, 0) - , device_matrix_keyboard_interface(mconfig, *this, "LINE0", "LINE1", "LINE2", "LINE3", "LINE4", "LINE5", "LINE6", "LINE7", "LINE8", "LINE9", "LINEA", "LINEB", "LINEC", "LINED", "LINEE", "LINEF") + : device_t(mconfig, QX10_KEYBOARD, tag, owner, clock) + , device_rs232_port_interface(mconfig, *this) + , m_rows(*this, "LINE%X", 0U) + , m_mcu(*this, "mcu") { } +ROM_START(qx10kbd) + ROM_REGION(0x0800, "mcu", 0) + ROM_LOAD("mbl8049h.5a", 0x0000, 0x0800, CRC(8615e159) SHA1(26b7f447acfe2c605dbe0fc98e6c777f0fa8a94d)) +ROM_END -void qx10_keyboard_device::device_reset() +tiny_rom_entry const *qx10_keyboard_device::device_rom_region() const { - buffered_rs232_device::device_reset(); - - reset_key_state(); - clear_fifo(); - - set_data_frame(1, 8, PARITY_EVEN, STOP_BITS_1); - set_rate(1'200); - receive_register_reset(); - transmit_register_reset(); - - output_dcd(0); - output_dsr(0); - output_cts(0); - output_rxd(1); - - start_processing(attotime::from_hz(2'400)); + return ROM_NAME(qx10kbd); } +void qx10_keyboard_device::device_start() +{ + m_bit_timer = timer_alloc(); + m_bit_timer->adjust(attotime::from_hz(2400), 0, attotime::from_hz(2400)); + m_clk_state = 0; +} -void qx10_keyboard_device::key_make(uint8_t row, uint8_t column) +WRITE_LINE_MEMBER(qx10_keyboard_device::input_txd) { - transmit_byte((column << 4) | row); + m_rxd = state; } +void qx10_keyboard_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +{ + m_clk_state = !m_clk_state; +} -void qx10_keyboard_device::received_byte(uint8_t data) +WRITE8_MEMBER(qx10_keyboard_device::mcu_p1_w) { - switch (data & 0xe0) - { - case 0x00: // set repeat start - break; - case 0x20: // set repeat interval - break; - case 0x40: // set LED - break; - case 0x60: // get LED - transmit_byte(0); - break; - case 0x80: // get SW - break; - case 0xa0: // set repeat - break; - case 0xc0: // enable keyboard - break; - case 0xe0: - if (!(data & 1)) - transmit_byte(0); - break; - } + m_row = data & 0xf; + output_rxd(BIT(data, 7)); } +void qx10_keyboard_device::device_add_mconfig(machine_config &config) +{ + auto &mcu(I8049(config, "mcu", 11_MHz_XTAL)); + mcu.p1_out_cb().set(FUNC(qx10_keyboard_device::mcu_p1_w)); + mcu.p2_out_cb().set([](u8 data) { /* leds */ }); + mcu.bus_in_cb().set([this]() { return m_rows[m_row]->read(); }); + mcu.t1_in_cb().set([this]() { return m_rxd; }); + mcu.t0_in_cb().set([this]() { return m_clk_state; }); +} static INPUT_PORTS_START( qx10_keyboard ) PORT_START("LINE0") diff --git a/src/mame/machine/qx10kbd.h b/src/mame/machine/qx10kbd.h index b351fd4ef73..8070548c556 100644 --- a/src/mame/machine/qx10kbd.h +++ b/src/mame/machine/qx10kbd.h @@ -9,18 +9,28 @@ #include "machine/keyboard.h" -class qx10_keyboard_device : public buffered_rs232_device<16U>, protected device_matrix_keyboard_interface<16U> +class qx10_keyboard_device + : public device_t + , public device_rs232_port_interface { public: qx10_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ioport_constructor device_input_ports() const override; + virtual DECLARE_WRITE_LINE_MEMBER(input_txd) override; + DECLARE_WRITE8_MEMBER(mcu_p1_w); protected: - virtual void device_reset() override; - virtual void key_make(uint8_t row, uint8_t column) override; + virtual const tiny_rom_entry *device_rom_region() const override; + virtual void device_add_mconfig(machine_config &config) override; + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + virtual void device_start() override; private: - virtual void received_byte(uint8_t data) override; + required_ioport_array<16> m_rows; + required_device<cpu_device> m_mcu; + emu_timer *m_bit_timer; + u8 m_rxd; + int m_row, m_clk_state; }; DECLARE_DEVICE_TYPE(QX10_KEYBOARD, qx10_keyboard_device) diff --git a/src/mame/machine/scramble.cpp b/src/mame/machine/scramble.cpp index 8027984f599..1ba4da7f7c0 100644 --- a/src/mame/machine/scramble.cpp +++ b/src/mame/machine/scramble.cpp @@ -93,9 +93,9 @@ READ8_MEMBER(scramble_state::cavelon_banksw_r ) cavelon_banksw(); if ((offset >= 0x0100) && (offset <= 0x0103)) - return m_ppi8255_0->read(space, offset - 0x0100); + return m_ppi8255_0->read(offset - 0x0100); else if ((offset >= 0x0200) && (offset <= 0x0203)) - return m_ppi8255_1->read(space, offset - 0x0200); + return m_ppi8255_1->read(offset - 0x0200); return 0xff; } @@ -105,9 +105,9 @@ WRITE8_MEMBER(scramble_state::cavelon_banksw_w ) cavelon_banksw(); if ((offset >= 0x0100) && (offset <= 0x0103)) - m_ppi8255_0->write(space, offset - 0x0100, data); + m_ppi8255_0->write(offset - 0x0100, data); else if ((offset >= 0x0200) && (offset <= 0x0203)) - m_ppi8255_1->write(space, offset - 0x0200, data); + m_ppi8255_1->write(offset - 0x0200, data); } @@ -156,8 +156,23 @@ void scramble_state::init_tazmani2() m_maincpu->space(AS_PROGRAM).install_write_handler(0xb002, 0xb002, write8_delegate(FUNC(scramble_state::scrambold_background_enable_w),this)); } -void scramble_state::init_ckongs() +void scramble_state::init_tazmaniet() { + init_tazmani2(); + + uint8_t* romdata = memregion("maincpu")->base(); + uint8_t buf[0x6000]; + memcpy(buf, romdata, 0x6000); + + // some sort of weak protection? + for (int i = 0; i < 0x1000; i++) + romdata[i] = buf[i^0x3ff]; + + for (int i = 0x2000; i < 0x3000; i++) + romdata[i] = buf[i^0x3ff]; + + for (int i = 0x4000; i < 0x5000; i++) + romdata[i] = buf[i^0x3ff]; } void scramble_state::init_mariner() diff --git a/src/mame/machine/segacrpt_device.cpp b/src/mame/machine/segacrpt_device.cpp index cc1131ece2f..47dc8bfb55c 100644 --- a/src/mame/machine/segacrpt_device.cpp +++ b/src/mame/machine/segacrpt_device.cpp @@ -104,7 +104,7 @@ List of encrypted games currently known: - CPU Part # Game Comments + CPU Part # Game Comments 315-5010 Pengo unencrypted version available 315-5013 Super Zaxxon used Zaxxon for known plaintext attack 315-5014 Buck Rogers / Zoom 909 unencrypted version available @@ -112,8 +112,8 @@ 315-5018 Yamato ???-???? Top Roller same key as Yamato 315-5028 Sindbad Mystery - 315-5030 Up'n Down & unencrypted version available - ???-???? M120 Razzmatazz + 315-5030 Up'n Down unencrypted version available + ???-???? M120 Razzmatazz same key as Up'n Down 315-5033 Regulus unencrypted version available 315-5041 M140 Mister Viking 315-5048 SWAT used Bull Fight for k.p.a. @@ -123,15 +123,15 @@ 315-5064 Water Match used Mister Viking for k.p.a. 315-5065 Bull Fight 315-5069 Star Force game by Tehkan; same key as Super Locomotive - ???-???? Pinball Action game by Tehkan; also has a simple bitswap on top ???-???? Spatter 315-5084 Jongkyo TABLE INCOMPLETE game by Kiwako; also has a simple bitswap on top 315-5093 Pitfall II 315-5098 Ninja Princess unencrypted version available; same key as Up'n Down 315-5102 Sega Ninja unencrypted version available 315-5110 I'm Sorry used My Hero for k.p.a. - 315-5114 ?? pcb 834-5492 same key as Regulus + 315-5114 Champion Pro Wrestling same key as Regulus 315-5115 TeddyBoy Blues + 315-5128 Pinball Action game by Tehkan; also has a simple bitswap on top 315-5132 My Hero 315-5135 Heavy Metal & Wonder Boy (set 1a & 3; bootlegs?) @@ -278,10 +278,8 @@ DEFINE_DEVICE_TYPE(SEGA_315_5013, sega_315_5013_device, "sega_315_5013", "Sega 3 DEFINE_DEVICE_TYPE(SEGA_315_5014, sega_315_5014_device, "sega_315_5014", "Sega 315-5014") DEFINE_DEVICE_TYPE(SEGA_315_5018, sega_315_5018_device, "sega_315_5018", "Sega 315-5018") DEFINE_DEVICE_TYPE(SEGA_315_5010, sega_315_5010_device, "sega_315_5010", "Sega 315-5010") - -// below are unknown part numbers -DEFINE_DEVICE_TYPE(SEGA_315_SPAT, sega_315_spat_device, "sega_315_spat", "Sega 315-???? Spat") // unknown part number -DEFINE_DEVICE_TYPE(SEGA_CPU_PBACTIO4, sega_cpu_pbactio4_device, "sega_pbactio4", "Sega pbactio4") +DEFINE_DEVICE_TYPE(SEGA_315_SPAT, sega_315_spat_device, "sega_315_spat", "Sega 315-5xxx (Spatter)") // unknown part number +DEFINE_DEVICE_TYPE(SEGA_315_5128, sega_315_5128_device, "sega_315_5128", "Sega 315-5128") @@ -971,8 +969,8 @@ void sega_315_5010_device::decrypt() -sega_cpu_pbactio4_device::sega_cpu_pbactio4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : segacrpt_z80_device(mconfig, SEGA_CPU_PBACTIO4, tag, owner, clock) {} -void sega_cpu_pbactio4_device::decrypt() +sega_315_5128_device::sega_315_5128_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : segacrpt_z80_device(mconfig, SEGA_315_5128, tag, owner, clock) {} +void sega_315_5128_device::decrypt() { static const uint8_t convtable[32][4] = { diff --git a/src/mame/machine/segacrpt_device.h b/src/mame/machine/segacrpt_device.h index 1c31d6a0116..ba87cca9671 100644 --- a/src/mame/machine/segacrpt_device.h +++ b/src/mame/machine/segacrpt_device.h @@ -45,7 +45,7 @@ protected: virtual void device_reset() override; virtual void decrypt() = 0; - const char* m_decrypted_tag; + const char* m_decrypted_tag; uint8_t* m_decrypted_ptr; uint8_t* m_region_ptr; int m_decode_size; @@ -241,10 +241,10 @@ protected: -class sega_cpu_pbactio4_device : public segacrpt_z80_device +class sega_315_5128_device : public segacrpt_z80_device { public: - sega_cpu_pbactio4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t); + sega_315_5128_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t); protected: virtual void decrypt() override; }; @@ -266,31 +266,31 @@ protected: }; -DECLARE_DEVICE_TYPE(SEGA_315_5132, sega_315_5132_device) -DECLARE_DEVICE_TYPE(SEGA_315_5155, sega_315_5155_device) -DECLARE_DEVICE_TYPE(SEGA_315_5110, sega_315_5110_device) -DECLARE_DEVICE_TYPE(SEGA_315_5135, sega_315_5135_device) -DECLARE_DEVICE_TYPE(SEGA_315_5051, sega_315_5051_device) -DECLARE_DEVICE_TYPE(SEGA_315_5098, sega_315_5098_device) -DECLARE_DEVICE_TYPE(SEGA_315_5102, sega_315_5102_device) -DECLARE_DEVICE_TYPE(SEGA_315_5065, sega_315_5065_device) -DECLARE_DEVICE_TYPE(SEGA_315_5064, sega_315_5064_device) -DECLARE_DEVICE_TYPE(SEGA_315_5033, sega_315_5033_device) -DECLARE_DEVICE_TYPE(SEGA_315_5041, sega_315_5041_device) -DECLARE_DEVICE_TYPE(SEGA_315_5048, sega_315_5048_device) -DECLARE_DEVICE_TYPE(SEGA_315_5093, sega_315_5093_device) -DECLARE_DEVICE_TYPE(SEGA_315_5099, sega_315_5099_device) -DECLARE_DEVICE_TYPE(SEGA_315_SPAT, sega_315_spat_device) -DECLARE_DEVICE_TYPE(SEGA_315_5015, sega_315_5015_device) -DECLARE_DEVICE_TYPE(SEGA_315_5133, sega_315_5133_device) -DECLARE_DEVICE_TYPE(SEGA_315_5014, sega_315_5014_device) -DECLARE_DEVICE_TYPE(SEGA_315_5013, sega_315_5013_device) -DECLARE_DEVICE_TYPE(SEGA_315_5061, sega_315_5061_device) -DECLARE_DEVICE_TYPE(SEGA_315_5018, sega_315_5018_device) -DECLARE_DEVICE_TYPE(SEGA_315_5010, sega_315_5010_device) -DECLARE_DEVICE_TYPE(SEGA_CPU_PBACTIO4, sega_cpu_pbactio4_device) -DECLARE_DEVICE_TYPE(SEGA_315_5028, sega_315_5028_device) -DECLARE_DEVICE_TYPE(SEGA_315_5084, sega_315_5084_device) +DECLARE_DEVICE_TYPE(SEGA_315_5132, sega_315_5132_device) +DECLARE_DEVICE_TYPE(SEGA_315_5155, sega_315_5155_device) +DECLARE_DEVICE_TYPE(SEGA_315_5110, sega_315_5110_device) +DECLARE_DEVICE_TYPE(SEGA_315_5135, sega_315_5135_device) +DECLARE_DEVICE_TYPE(SEGA_315_5051, sega_315_5051_device) +DECLARE_DEVICE_TYPE(SEGA_315_5098, sega_315_5098_device) +DECLARE_DEVICE_TYPE(SEGA_315_5102, sega_315_5102_device) +DECLARE_DEVICE_TYPE(SEGA_315_5065, sega_315_5065_device) +DECLARE_DEVICE_TYPE(SEGA_315_5064, sega_315_5064_device) +DECLARE_DEVICE_TYPE(SEGA_315_5033, sega_315_5033_device) +DECLARE_DEVICE_TYPE(SEGA_315_5041, sega_315_5041_device) +DECLARE_DEVICE_TYPE(SEGA_315_5048, sega_315_5048_device) +DECLARE_DEVICE_TYPE(SEGA_315_5093, sega_315_5093_device) +DECLARE_DEVICE_TYPE(SEGA_315_5099, sega_315_5099_device) +DECLARE_DEVICE_TYPE(SEGA_315_SPAT, sega_315_spat_device) +DECLARE_DEVICE_TYPE(SEGA_315_5015, sega_315_5015_device) +DECLARE_DEVICE_TYPE(SEGA_315_5133, sega_315_5133_device) +DECLARE_DEVICE_TYPE(SEGA_315_5014, sega_315_5014_device) +DECLARE_DEVICE_TYPE(SEGA_315_5013, sega_315_5013_device) +DECLARE_DEVICE_TYPE(SEGA_315_5061, sega_315_5061_device) +DECLARE_DEVICE_TYPE(SEGA_315_5018, sega_315_5018_device) +DECLARE_DEVICE_TYPE(SEGA_315_5010, sega_315_5010_device) +DECLARE_DEVICE_TYPE(SEGA_315_5128, sega_315_5128_device) +DECLARE_DEVICE_TYPE(SEGA_315_5028, sega_315_5028_device) +DECLARE_DEVICE_TYPE(SEGA_315_5084, sega_315_5084_device) #endif // MAME_MACHINE_SEGACRYPT_DEVICE_H diff --git a/src/mame/machine/special.cpp b/src/mame/machine/special.cpp index 9cad7be3ca0..92511b9d6a2 100644 --- a/src/mame/machine/special.cpp +++ b/src/mame/machine/special.cpp @@ -323,7 +323,7 @@ void special_state::erik_set_bank() m_bank4->set_base(mem + 0x1c000); space.unmap_write(0xf000, 0xf7ff); space.nop_read(0xf000, 0xf7ff); - space.install_readwrite_handler(0xf800, 0xf803, 0, 0x7fc, 0, read8_delegate(FUNC(i8255_device::read), (i8255_device*)m_ppi), write8_delegate(FUNC(i8255_device::write), (i8255_device*)m_ppi)); + space.install_readwrite_handler(0xf800, 0xf803, 0, 0x7fc, 0, read8sm_delegate(FUNC(i8255_device::read), (i8255_device*)m_ppi), write8sm_delegate(FUNC(i8255_device::write), (i8255_device*)m_ppi)); break; } } diff --git a/src/mame/machine/taitosjsec.cpp b/src/mame/machine/taitosjsec.cpp index cbb2502078c..e5eb6877c43 100644 --- a/src/mame/machine/taitosjsec.cpp +++ b/src/mame/machine/taitosjsec.cpp @@ -100,6 +100,7 @@ void taito_sj_security_mcu_device::device_start() save_item(NAME(m_read_data)); save_item(NAME(m_zaccept)); save_item(NAME(m_zready)); + save_item(NAME(m_pa_val)); save_item(NAME(m_pb_val)); save_item(NAME(m_busak)); save_item(NAME(m_reset)); @@ -121,13 +122,14 @@ void taito_sj_security_mcu_device::device_reset() m_mcu->set_input_line(M68705_IRQ_LINE, CLEAR_LINE); } -MACHINE_CONFIG_START(taito_sj_security_mcu_device::device_add_mconfig) - MCFG_DEVICE_ADD("mcu", M68705P5, DERIVED_CLOCK(1, 1)) - MCFG_M68705_PORTA_R_CB(READ8(*this, taito_sj_security_mcu_device, mcu_pa_r)) - MCFG_M68705_PORTC_R_CB(READ8(*this, taito_sj_security_mcu_device, mcu_pc_r)) - MCFG_M68705_PORTA_W_CB(WRITE8(*this, taito_sj_security_mcu_device, mcu_pa_w)) - MCFG_M68705_PORTB_W_CB(WRITE8(*this, taito_sj_security_mcu_device, mcu_pb_w)) -MACHINE_CONFIG_END +void taito_sj_security_mcu_device::device_add_mconfig(machine_config &config) +{ + M68705P5(config, m_mcu, DERIVED_CLOCK(1, 1)); + m_mcu->porta_r_cb().set(FUNC(taito_sj_security_mcu_device::mcu_pa_r)); + m_mcu->portc_r_cb().set(FUNC(taito_sj_security_mcu_device::mcu_pc_r)); + m_mcu->porta_w_cb().set(FUNC(taito_sj_security_mcu_device::mcu_pa_w)); + m_mcu->portb_w_cb().set(FUNC(taito_sj_security_mcu_device::mcu_pb_w)); +} READ8_MEMBER(taito_sj_security_mcu_device::mcu_pa_r) { diff --git a/src/mame/machine/taitosjsec.h b/src/mame/machine/taitosjsec.h index d46e5ec705f..c952a532e57 100644 --- a/src/mame/machine/taitosjsec.h +++ b/src/mame/machine/taitosjsec.h @@ -10,16 +10,6 @@ DECLARE_DEVICE_TYPE(TAITO_SJ_SECURITY_MCU, taito_sj_security_mcu_device) -#define MCFG_TAITO_SJ_SECURITY_MCU_INT_MODE(mode) \ - downcast<taito_sj_security_mcu_device &>(*device).set_int_mode(taito_sj_security_mcu_device::int_mode::mode); -#define MCFG_TAITO_SJ_SECURITY_MCU_68READ_CB(cb) \ - downcast<taito_sj_security_mcu_device &>(*device).set_68read_cb(DEVCB_##cb); -#define MCFG_TAITO_SJ_SECURITY_MCU_68WRITE_CB(cb) \ - downcast<taito_sj_security_mcu_device &>(*device).set_68write_cb(DEVCB_##cb); -#define MCFG_TAITO_SJ_SECURITY_MCU_68INTRQ_CB(cb) \ - downcast<taito_sj_security_mcu_device &>(*device).set_68intrq_cb(DEVCB_##cb); -#define MCFG_TAITO_SJ_SECURITY_MCU_BUSRQ_CB(cb) \ - downcast<taito_sj_security_mcu_device &>(*device).set_busrq_cb(DEVCB_##cb); class taito_sj_security_mcu_device : public device_t { @@ -32,10 +22,10 @@ public: }; void set_int_mode(int_mode mode) { m_int_mode = mode; } - template <typename Obj> devcb_base &set_68read_cb(Obj &&cb) { return m_68read_cb.set_callback(std::forward<Obj>(cb)); } - template <typename Obj> devcb_base &set_68write_cb(Obj &&cb) { return m_68write_cb.set_callback(std::forward<Obj>(cb)); } - template <typename Obj> devcb_base &set_68intrq_cb(Obj &&cb) { return m_68intrq_cb.set_callback(std::forward<Obj>(cb)); } - template <typename Obj> devcb_base &set_busrq_cb(Obj &&cb) { return m_busrq_cb.set_callback(std::forward<Obj>(cb)); } + auto m68read_cb() { return m_68read_cb.bind(); } + auto m68write_cb() { return m_68write_cb.bind(); } + auto m68intrq_cb() { return m_68intrq_cb.bind(); } + auto busrq_cb() { return m_busrq_cb.bind(); } taito_sj_security_mcu_device( machine_config const &mconfig, diff --git a/src/mame/machine/ut88.cpp b/src/mame/machine/ut88.cpp index 1ac29589dd9..712a2683e57 100644 --- a/src/mame/machine/ut88.cpp +++ b/src/mame/machine/ut88.cpp @@ -97,13 +97,13 @@ MACHINE_RESET_MEMBER(ut88_state,ut88) READ8_MEMBER( ut88_state::ut88_keyboard_r ) { - return m_ppi->read(space, offset^0x03); + return m_ppi->read(offset^0x03); } WRITE8_MEMBER( ut88_state::ut88_keyboard_w ) { - m_ppi->write(space, offset^0x03, data); + m_ppi->write(offset^0x03, data); } WRITE8_MEMBER( ut88_state::ut88_sound_w ) diff --git a/src/mame/machine/xavix.cpp b/src/mame/machine/xavix.cpp index e761e96ea4b..5ad392d7c2c 100644 --- a/src/mame/machine/xavix.cpp +++ b/src/mame/machine/xavix.cpp @@ -4,134 +4,122 @@ #include "emu.h" #include "includes/xavix.h" -// general DMA fro ROM, not Video DMA -WRITE8_MEMBER(xavix_state::dma_trigger_w) +// general DMA to/from entire main map (not dedicated sprite DMA) +WRITE8_MEMBER(xavix_state::rom_dmatrg_w) { if (data & 0x01) // namcons2 writes 0x81, most of the time things write 0x01 { - logerror("%s: dma_trigger_w (do DMA?) %02x\n", machine().describe_context(), data); + logerror("%s: rom_dmatrg_w (do DMA?) %02x\n", machine().describe_context(), data); - uint32_t source = (m_rom_dmasrc_hi_data << 16) | (m_rom_dmasrc_md_data << 8) | m_rom_dmasrc_lo_data; - uint16_t dest = (m_rom_dmadst_hi_data << 8) | m_rom_dmadst_lo_data; - uint16_t len = (m_rom_dmalen_hi_data << 8) | m_rom_dmalen_lo_data; + uint32_t source = (m_rom_dma_src[2] << 16) | (m_rom_dma_src[1] << 8) | m_rom_dma_src[0]; + uint16_t dest = (m_rom_dma_dst[1] << 8) | m_rom_dma_dst[0]; + uint16_t len = (m_rom_dma_len[1] << 8) | m_rom_dma_len[0]; - source &= m_rgnlen - 1; logerror(" (possible DMA op SRC %08x DST %04x LEN %04x)\n", source, dest, len); address_space& destspace = m_maincpu->space(AS_PROGRAM); for (int i = 0; i < len; i++) { - uint8_t dat = m_rgn[(source + i) & (m_rgnlen - 1)]; + uint32_t m_tmpaddress = source+i; + + // many games explicitly want to access with the high bank bit set, so probably the same logic as when grabbing tile data + // we have to be careful here or we get the zero page memory read, hence not just using read8 on the whole space + // this again probably indicates there is 'data space' where those don't appear + uint8_t dat = 0; + // if bank is > 0x80, or address is >0x8000 it's a plain ROM read + if ((m_tmpaddress >= 0x80000) || (m_tmpaddress & 0x8000)) + { + dat= m_rgn[m_tmpaddress & (m_rgnlen - 1)]; + } + else + { + address_space& mainspace = m_maincpu->space(AS_PROGRAM); + dat = m_lowbus->read8(mainspace, m_tmpaddress & 0x7fff); + } + destspace.write_byte(dest + i, dat); } } else // the interrupt routine writes 0x80 to the trigger, maybe 'clear IRQ?' { - logerror("%s: dma_trigger_w (unknown) %02x\n", machine().describe_context(), data); + logerror("%s: rom_dmatrg_w (unknown) %02x\n", machine().describe_context(), data); } } -WRITE8_MEMBER(xavix_state::rom_dmasrc_lo_w) -{ - logerror("%s: rom_dmasrc_lo_w %02x\n", machine().describe_context(), data); - m_rom_dmasrc_lo_data = data; -} - -WRITE8_MEMBER(xavix_state::rom_dmasrc_md_w) -{ - logerror("%s: rom_dmasrc_md_w %02x\n", machine().describe_context(), data); - m_rom_dmasrc_md_data = data; -} -WRITE8_MEMBER(xavix_state::rom_dmasrc_hi_w) +WRITE8_MEMBER(xavix_state::rom_dmasrc_w) { - logerror("%s: rom_dmasrc_hi_w %02x\n", machine().describe_context(), data); - m_rom_dmasrc_hi_data = data; - // this would mean Taito Nostalgia relies on mirroring tho, as it has the high bits set... so could just be wrong - logerror(" (DMA ROM source of %02x%02x%02x)\n", m_rom_dmasrc_hi_data, m_rom_dmasrc_md_data, m_rom_dmasrc_lo_data); + // has_wamg expects to be able to read back the source to modify it (need to check if it expects it to change after an operation) + logerror("%s: rom_dmasrc_w (%02x) %02x\n", machine().describe_context(), offset, data); + m_rom_dma_src[offset] = data; } -WRITE8_MEMBER(xavix_state::rom_dmadst_lo_w) +WRITE8_MEMBER(xavix_state::rom_dmadst_w) { - logerror("%s: rom_dmadst_lo_w %02x\n", machine().describe_context(), data); - m_rom_dmadst_lo_data = data; + logerror("%s: rom_dmadst_w (%02x) %02x\n", machine().describe_context(), offset, data); + m_rom_dma_dst[offset] = data; } -WRITE8_MEMBER(xavix_state::rom_dmadst_hi_w) +WRITE8_MEMBER(xavix_state::rom_dmalen_w) { - logerror("%s: rom_dmadst_hi_w %02x\n", machine().describe_context(), data); - m_rom_dmadst_hi_data = data; - - logerror(" (DMA dest of %02x%02x)\n", m_rom_dmadst_hi_data, m_rom_dmadst_lo_data); + logerror("%s: rom_dmalen_w (%02x) %02x\n", machine().describe_context(), offset, data); + m_rom_dma_len[offset] = data; } -WRITE8_MEMBER(xavix_state::rom_dmalen_lo_w) -{ - logerror("%s: rom_dmalen_lo_w %02x\n", machine().describe_context(), data); - m_rom_dmalen_lo_data = data; -} -WRITE8_MEMBER(xavix_state::rom_dmalen_hi_w) +READ8_MEMBER(xavix_state::rom_dmastat_r) { - logerror("%s: rom_dmalen_hi_w %02x\n", machine().describe_context(), data); - m_rom_dmalen_hi_data = data; - - logerror(" (DMA len of %02x%02x)\n", m_rom_dmalen_hi_data, m_rom_dmalen_lo_data); -} - -READ8_MEMBER(xavix_state::dma_trigger_r) -{ - logerror("%s: dma_trigger_r (operation status?)\n", machine().describe_context()); + logerror("%s: rom_dmastat_r (operation status?)\n", machine().describe_context()); return 0x00; } -WRITE8_MEMBER(xavix_state::irq_enable_w) +WRITE8_MEMBER(xavix_state::vector_enable_w) { - logerror("%s: irq_enable_w %02x\n", machine().describe_context(), data); - m_irq_enable_data = data; + logerror("%s: vector_enable_w %02x\n", machine().describe_context(), data); + m_vectorenable = data; } -WRITE8_MEMBER(xavix_state::irq_vector0_lo_w) +WRITE8_MEMBER(xavix_state::nmi_vector_lo_w) { - logerror("%s: irq_vector0_lo_w %02x\n", machine().describe_context(), data); - m_irq_vector0_lo_data = data; + logerror("%s: nmi_vector_lo_w %02x\n", machine().describe_context(), data); + m_nmi_vector_lo_data = data; } -WRITE8_MEMBER(xavix_state::irq_vector0_hi_w) +WRITE8_MEMBER(xavix_state::nmi_vector_hi_w) { - logerror("%s: irq_vector0_hi_w %02x\n", machine().describe_context(), data); - m_irq_vector0_hi_data = data; + logerror("%s: nmi_vector_hi_w %02x\n", machine().describe_context(), data); + m_nmi_vector_hi_data = data; } -WRITE8_MEMBER(xavix_state::irq_vector1_lo_w) +WRITE8_MEMBER(xavix_state::irq_vector_lo_w) { - logerror("%s: irq_vector1_lo_w %02x\n", machine().describe_context(), data); - m_irq_vector1_lo_data = data; + logerror("%s: irq_vector_lo_w %02x\n", machine().describe_context(), data); + m_irq_vector_lo_data = data; } -WRITE8_MEMBER(xavix_state::irq_vector1_hi_w) +WRITE8_MEMBER(xavix_state::irq_vector_hi_w) { - logerror("%s: irq_vector1_hi_w %02x\n", machine().describe_context(), data); - m_irq_vector1_hi_data = data; + logerror("%s: irq_vector_hi_w %02x\n", machine().describe_context(), data); + m_irq_vector_hi_data = data; } -WRITE8_MEMBER(xavix_state::xavix_7900_w) +WRITE8_MEMBER(xavix_state::extintrf_7900_w) { - logerror("%s: xavix_7900_w %02x (---FIRST WRITE ON STARTUP---)\n", machine().describe_context(), data); + logerror("%s: extintrf_7900_w %02x (---FIRST WRITE ON STARTUP---)\n", machine().describe_context(), data); } -WRITE8_MEMBER(xavix_state::xavix_7901_w) +WRITE8_MEMBER(xavix_state::extintrf_7901_w) { - logerror("%s: xavix_7901_w %02x\n", machine().describe_context(), data); + logerror("%s: extintrf_7901_w %02x\n", machine().describe_context(), data); } -WRITE8_MEMBER(xavix_state::xavix_7902_w) +WRITE8_MEMBER(xavix_state::extintrf_7902_w) { - logerror("%s: xavix_7902_w %02x\n", machine().describe_context(), data); + logerror("%s: extintrf_7902_w %02x\n", machine().describe_context(), data); } WRITE8_MEMBER(xavix_state::xavix_7a80_w) @@ -139,366 +127,221 @@ WRITE8_MEMBER(xavix_state::xavix_7a80_w) logerror("%s: xavix_7a80_w %02x\n", machine().describe_context(), data); } -WRITE8_MEMBER(xavix_state::xavix_7b00_w) +WRITE8_MEMBER(xavix_state::adc_7b00_w) { - logerror("%s: xavix_7b00_w %02x\n", machine().describe_context(), data); + logerror("%s: adc_7b00_w %02x\n", machine().describe_context(), data); } -READ8_MEMBER(xavix_state::xavix_7b80_r) +READ8_MEMBER(xavix_state::adc_7b80_r) { - logerror("%s: xavix_7b80_r\n", machine().describe_context()); - return 0xff; + logerror("%s: adc_7b80_r\n", machine().describe_context()); + return 0x00;//0xff; } -WRITE8_MEMBER(xavix_state::xavix_7b80_w) +WRITE8_MEMBER(xavix_state::adc_7b80_w) { - logerror("%s: xavix_7b80_w %02x\n", machine().describe_context(), data); + logerror("%s: adc_7b80_w %02x\n", machine().describe_context(), data); } -WRITE8_MEMBER(xavix_state::xavix_7b81_w) +WRITE8_MEMBER(xavix_state::adc_7b81_w) { - logerror("%s: xavix_7b81_w %02x\n", machine().describe_context(), data); + logerror("%s: adc_7b81_w %02x\n", machine().describe_context(), data); } +READ8_MEMBER(xavix_state::adc_7b81_r) +{ + return 0x00; +// return machine().rand(); +} + + -WRITE8_MEMBER(xavix_state::xavix_7810_w) +WRITE8_MEMBER(xavix_state::slotreg_7810_w) { - logerror("%s: xavix_7810_w %02x\n", machine().describe_context(), data); + logerror("%s: slotreg_7810_w %02x\n", machine().describe_context(), data); } TIMER_DEVICE_CALLBACK_MEMBER(xavix_state::scanline_cb) { -/* - int scanline = param; - if (scanline == 200) - { - if (m_irq_enable_data != 0) - m_maincpu->set_input_line(INPUT_LINE_IRQ0,HOLD_LINE); - } -*/ } INTERRUPT_GEN_MEMBER(xavix_state::interrupt) { - // if (m_irq_enable_data != 0) - // m_maincpu->set_input_line(INPUT_LINE_IRQ0,HOLD_LINE); - - // this logic is clearly VERY wrong - - if (m_irq_enable_data != 0) - { - if (m_6ff8) - m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); - } + if (m_6ff8 & 0x20) + m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); } -READ8_MEMBER(xavix_state::xavix_6ff0_r) -{ - //logerror("%s: xavix_6ff0_r\n", machine().describe_context()); - return m_6ff0; -} -WRITE8_MEMBER(xavix_state::xavix_6ff0_w) +WRITE8_MEMBER(xavix_state::colmix_6ff2_w) { - // expected to return data written - m_6ff0 = data; - //logerror("%s: xavix_6ff0_w %02x\n", machine().describe_context(), data); + logerror("%s: colmix_6ff2_w %02x\n", machine().describe_context(), data); } -WRITE8_MEMBER(xavix_state::xavix_6ff1_w) -{ - logerror("%s: xavix_6ff1_w %02x\n", machine().describe_context(), data); -} -WRITE8_MEMBER(xavix_state::xavix_6ff2_w) +READ8_MEMBER(xavix_state::dispctrl_6ff8_r) { - logerror("%s: xavix_6ff2_w %02x\n", machine().describe_context(), data); -} - - -READ8_MEMBER(xavix_state::xavix_6ff8_r) -{ - //logerror("%s: xavix_6ff8_r\n", machine().describe_context()); + //logerror("%s: dispctrl_6ff8_r\n", machine().describe_context()); return m_6ff8; } -WRITE8_MEMBER(xavix_state::xavix_6ff8_w) +WRITE8_MEMBER(xavix_state::dispctrl_6ff8_w) { // I think this is something to do with IRQ ack / enable m_6ff8 = data; - logerror("%s: xavix_6ff8_w %02x\n", machine().describe_context(), data); -} - -WRITE8_MEMBER(xavix_state::xavix_6ffa_w) -{ - logerror("%s: xavix_6ffa_w %02x\n", machine().describe_context(), data); -} - -WRITE8_MEMBER(xavix_state::xavix_6ffb_w) -{ - logerror("%s: xavix_6ffb_w %02x\n", machine().describe_context(), data); + logerror("%s: dispctrl_6ff8_w %02x\n", machine().describe_context(), data); } -READ8_MEMBER(xavix_state::xavix_75f0_r) +WRITE8_MEMBER(xavix_state::dispctrl_posirq_x_w) { - logerror("%s: xavix_75f0_r\n", machine().describe_context()); - return m_75fx[0]; + logerror("%s: dispctrl_posirq_x_w %02x\n", machine().describe_context(), data); } -READ8_MEMBER(xavix_state::xavix_75f1_r) +WRITE8_MEMBER(xavix_state::dispctrl_posirq_y_w) { - logerror("%s: xavix_75f1_r\n", machine().describe_context()); - return m_75fx[1]; + logerror("%s: dispctrl_posirq_y_w %02x\n", machine().describe_context(), data); } -READ8_MEMBER(xavix_state::xavix_75f6_r) +READ8_MEMBER(xavix_state::io0_data_r) { - logerror("%s: xavix_75f6_r\n", machine().describe_context()); - return m_75fx[6]; + uint8_t ret = m_in0->read() & ~m_io0_direction; + ret |= m_io0_data & m_io0_direction; + return ret; } -READ8_MEMBER(xavix_state::xavix_75f8_r) +READ8_MEMBER(xavix_state::io1_data_r) { - logerror("%s: xavix_75f8_r\n", machine().describe_context()); - return m_75fx[8]; -} - -READ8_MEMBER(xavix_state::xavix_75f9_r) -{ - logerror("%s: xavix_75f9_r\n", machine().describe_context()); - return 0x00; -} - -READ8_MEMBER(xavix_state::xavix_75fa_r) -{ - logerror("%s: xavix_75fa_r\n", machine().describe_context()); - return m_75fx[10]; -} - -READ8_MEMBER(xavix_state::xavix_75fb_r) -{ - logerror("%s: xavix_75fb_r\n", machine().describe_context()); - return m_75fx[11]; -} - -READ8_MEMBER(xavix_state::xavix_75fc_r) -{ - logerror("%s: xavix_75fc_r\n", machine().describe_context()); - return m_75fx[12]; -} - -READ8_MEMBER(xavix_state::xavix_75fd_r) -{ - logerror("%s: xavix_75fd_r\n", machine().describe_context()); - return m_75fx[13]; -} - - - - -WRITE8_MEMBER(xavix_state::xavix_75f0_w) -{ - // expected to return data written - m_75fx[0] = data; - logerror("%s: xavix_75f0_w %02x\n", machine().describe_context(), data); -} - - -WRITE8_MEMBER(xavix_state::xavix_75f1_w) -{ - // expected to return data written - m_75fx[1] = data; - logerror("%s: xavix_75f1_w %02x\n", machine().describe_context(), data); -} - - -WRITE8_MEMBER(xavix_state::xavix_75f6_w) -{ - // expected to return data written - m_75fx[6] = data; - logerror("%s: xavix_75f6_w %02x\n", machine().describe_context(), data); -} - -WRITE8_MEMBER(xavix_state::xavix_75f7_w) -{ - m_75fx[7] = data; - logerror("%s: xavix_75f7_w %02x\n", machine().describe_context(), data); -} - + uint8_t ret = m_in1->read(); -WRITE8_MEMBER(xavix_state::xavix_75f8_w) -{ - // expected to return data written - m_75fx[8] = data; - logerror("%s: xavix_75f8_w %02x\n", machine().describe_context(), data); -} - -WRITE8_MEMBER(xavix_state::xavix_75f9_w) -{ - m_75fx[9] = data; - logerror("%s: xavix_75f9_w %02x\n", machine().describe_context(), data); -} - -WRITE8_MEMBER(xavix_state::xavix_75fa_w) -{ - // expected to return data written - m_75fx[10] = data; - logerror("%s: xavix_75fa_w %02x\n", machine().describe_context(), data); -} + if (m_i2cmem) + { + if (!(m_io1_direction & 0x08)) + { + ret &= ~0x08; + ret |= (m_i2cmem->read_sda() & 1) << 3; + } + } -WRITE8_MEMBER(xavix_state::xavix_75fb_w) -{ - // expected to return data written - m_75fx[11] = data; - logerror("%s: xavix_75fb_w %02x\n", machine().describe_context(), data); -} + ret &= ~m_io1_direction; -WRITE8_MEMBER(xavix_state::xavix_75fc_w) -{ - // expected to return data written - m_75fx[12] = data; - logerror("%s: xavix_75fc_w %02x\n", machine().describe_context(), data); + ret |= m_io1_data & m_io1_direction; + return ret; } -WRITE8_MEMBER(xavix_state::xavix_75fd_w) +READ8_MEMBER(xavix_state::io0_direction_r) { - // expected to return data written - m_75fx[13] = data; - logerror("%s: xavix_75fd_w %02x\n", machine().describe_context(), data); + return m_io0_direction; } -WRITE8_MEMBER(xavix_state::xavix_75fe_w) +READ8_MEMBER(xavix_state::io1_direction_r) { - m_75fx[14] = data; - logerror("%s: xavix_75fe_w %02x\n", machine().describe_context(), data); + return m_io1_direction; } -WRITE8_MEMBER(xavix_state::xavix_75ff_w) -{ - m_75fx[15] = data; - logerror("%s: xavix_75ff_w %02x\n", machine().describe_context(), data); -} -READ8_MEMBER(xavix_state::xavix_io_0_r) +WRITE8_MEMBER(xavix_state::io0_data_w) { - return m_in0->read(); + m_io0_data = data; + logerror("%s: io0_data_w %02x\n", machine().describe_context(), data); } -READ8_MEMBER(xavix_state::xavix_io_1_r) +WRITE8_MEMBER(xavix_state::io1_data_w) { - /* - int pc = m_maincpu->state_int(M6502_PC); + m_io1_data = data; + logerror("%s: io1_data_w %02x\n", machine().describe_context(), data); - if (pc == 0x3acc) return 0x08; - if (pc == 0x3ae0) return 0x08; - if (pc == 0xfcb0) return 0xff; + if (m_i2cmem) + { + if (m_io1_direction & 0x08) + { + m_i2cmem->write_sda((data & 0x08) >> 3); + } - logerror("%04x: in1 read\n", pc); - */ - return m_in1->read(); + if (m_io1_direction & 0x10) + { + m_i2cmem->write_scl((data & 0x10) >> 4); + } + } } -READ8_MEMBER(xavix_state::xavix_7a02_r) +WRITE8_MEMBER(xavix_state::io0_direction_w) { - return 0xff; + m_io0_direction = data; + logerror("%s: io0_direction_w %02x\n", machine().describe_context(), data); + io0_data_w(space,0,m_io0_data); } -READ8_MEMBER(xavix_state::xavix_7a03_r) +WRITE8_MEMBER(xavix_state::io1_direction_w) { - return 0xff; + m_io1_direction = data; + logerror("%s: io1_direction_w %02x\n", machine().describe_context(), data); + io1_data_w(space,0,m_io1_data); // requires this for i2cmem to work, is it correct tho? } - -WRITE8_MEMBER(xavix_state::xavix_7a00_w) +READ8_MEMBER(xavix_state::arena_start_r) { - logerror("%s: xavix_7a00_w %02x\n", machine().describe_context(), data); + //logerror("%s: arena_start_r\n", machine().describe_context()); + return m_arena_start; } -WRITE8_MEMBER(xavix_state::xavix_7a01_w) +WRITE8_MEMBER(xavix_state::arena_start_w) { - logerror("%s: xavix_7a01_w %02x\n", machine().describe_context(), data); -} + logerror("%s: arena_start_w %02x\n", machine().describe_context(), data); + m_arena_start = data; // expected to return data written -WRITE8_MEMBER(xavix_state::xavix_7a02_w) -{ - logerror("%s: xavix_7a02_w %02x\n", machine().describe_context(), data); } - -WRITE8_MEMBER(xavix_state::xavix_7a03_w) +READ8_MEMBER(xavix_state::arena_end_r) { - logerror("%s: xavix_7a03_w %02x\n", machine().describe_context(), data); + logerror("%s: arena_end_r\n", machine().describe_context()); + return m_arena_end; } -READ8_MEMBER(xavix_state::xavix_6fe8_r) +WRITE8_MEMBER(xavix_state::arena_end_w) { - logerror("%s: xavix_6fe8_r\n", machine().describe_context()); - return m_6fe8; + logerror("%s: arena_end_w %02x\n", machine().describe_context(), data); + m_arena_end = data; // expected to return data written } -WRITE8_MEMBER(xavix_state::xavix_6fe8_w) +READ8_MEMBER(xavix_state::arena_control_r) { - // expected to return data written - m_6fe8 = data; - logerror("%s: xavix_6fe8_w %02x\n", machine().describe_context(), data); + m_arena_control ^= 0x40; // unknown, xavtenni expects this to become high, also seems to be running in some kind of interlace mode, so could be a field flag? + return m_arena_control; } -READ8_MEMBER(xavix_state::xavix_6fe9_r) +WRITE8_MEMBER(xavix_state::arena_control_w) { - logerror("%s: xavix_6fe9_r\n", machine().describe_context()); - return m_6fe9; -} - -WRITE8_MEMBER(xavix_state::xavix_6fe9_w) -{ - // expected to return data written - m_6fe9 = data; - logerror("%s: xavix_6fe9_w %02x\n", machine().describe_context(), data); -} - -WRITE8_MEMBER(xavix_state::xavix_6fea_w) -{ - logerror("%s: xavix_6fea_w %02x\n", machine().describe_context(), data); + logerror("%s: arena_control_w %02x\n", machine().describe_context(), data); + m_arena_control = data; } -READ8_MEMBER(xavix_state::xavix_7c01_r) +READ8_MEMBER(xavix_state::timer_baseval_r) { - logerror("%s: xavix_7c01_r\n", machine().describe_context()); - return m_7c01; + logerror("%s: timer_baseval_r\n", machine().describe_context()); + return m_timer_baseval; } -WRITE8_MEMBER(xavix_state::xavix_7c00_w) +WRITE8_MEMBER(xavix_state::timer_control_w) { - logerror("%s: xavix_7c00_w %02x\n", machine().describe_context(), data); + logerror("%s: timer_control_w %02x\n", machine().describe_context(), data); } -WRITE8_MEMBER(xavix_state::xavix_7c01_w) +WRITE8_MEMBER(xavix_state::timer_baseval_w) { // expected to return data written - m_7c01 = data; - logerror("%s: xavix_7c01_w %02x\n", machine().describe_context(), data); + m_timer_baseval = data; + logerror("%s: timer_baseval_w %02x\n", machine().describe_context(), data); } -WRITE8_MEMBER(xavix_state::xavix_7c02_w) +WRITE8_MEMBER(xavix_state::timer_freq_w) { - logerror("%s: xavix_7c02_w %02x\n", machine().describe_context(), data); + // 4-bit prescale + logerror("%s: timer_freq_w %02x\n", machine().describe_context(), data); } -READ8_MEMBER(xavix_state::xavix_75f4_r) -{ - // used with 75f0 - return 0xff; -} - -READ8_MEMBER(xavix_state::xavix_75f5_r) -{ - // used with 75f1 - return 0xff; -} READ8_MEMBER(xavix_state::mult_r) { @@ -507,24 +350,58 @@ READ8_MEMBER(xavix_state::mult_r) WRITE8_MEMBER(xavix_state::mult_w) { - // rad_fb writes here, why would you write to the results registers? - logerror("%s: mult_w (write to multiply RESULT registers, why?) reg: %d %02x\n", machine().describe_context(), offset, data); + // rad_madf writes here to set the base value which the multiplication result gets added to m_multresults[offset] = data; } +READ8_MEMBER(xavix_state::mult_param_r) +{ + return m_multparams[offset]; +} + WRITE8_MEMBER(xavix_state::mult_param_w) { COMBINE_DATA(&m_multparams[offset]); // there are NOPs after one of the writes, so presumably the operation is write triggerd and not intstant // see test code at 0184a4 in monster truck + // offset0 is control + + // mm-- --Ss + // mm = mode, S = sign for param1, s = sign for param2 + // modes 00 = multiply (regular?) 11 = add to previous 01 / 10 unknown (maybe subtract?) + if (offset == 2) { // assume 0 is upper bits, might be 'mode' instead, check - uint16_t param1 = (m_multparams[0]<<8) | (m_multparams[1]); - uint8_t param2 = (m_multparams[2]); + int param1 = m_multparams[1]; + int param2 = m_multparams[2]; + +#if 0 + int signparam1 = (m_multparams[0] & 0x02)>>1; + int signparam2 = (m_multparams[0] & 0x01)>>0; + + if (signparam1) param1 = -param1; + if (signparam2) param2 = -param2; +#endif - uint16_t result = param1*param2; + uint16_t result = 0; + + // rad_madf uses this mode (add to previous result) + if ((m_multparams[0] & 0xc0) == 0xc0) + { + result = param1 * param2; + uint16_t oldresult = (m_multresults[1] << 8) | m_multresults[0]; + result = oldresult + result; + } + else if ((m_multparams[0] & 0xc0) == 0x00) + { + result = param1 * param2; + } + else + { + popmessage("unknown multiplier mode %02n", m_multparams[0] & 0xc0); + } m_multresults[1] = (result>>8)&0xff; m_multresults[0] = result&0xff; @@ -534,16 +411,18 @@ WRITE8_MEMBER(xavix_state::mult_param_w) READ8_MEMBER(xavix_state::irq_source_r) { - /* the 2nd IRQ routine (regular IRQ, not NMI?) reads here before deciding what to do + /* the 2nd IRQ routine (regular IRQ) reads here before deciding what to do the following bits have been seen to be checked (active low?) - 0x40 - Monster Truck - stuff with 6ffb 6fd6 and 6ff8 - 0x20 - most games (but not Monster Truck) - DMA related? - 0x10 - card night + monster truck - 7c00 related? (increases 16-bit counter in ram stores 0xc1 at 7c00) - 0x08 - several games - Input related (ADC? - used for analog control on Monster Truck) (uses 7a80 top bit to determine direction, and 7a81 0x08 as an output, presumably to clock) - 0x04 - Monster Truck - loads/stores 7b81 + 0x80 - Sound Irq + 0x40 - Picture / Arena Irq? + 0x20 - DMA Irq + 0x10 - Timer / Counter IRQ + 0x08 - IO Irq (ADC? - used for analog control on Monster Truck) (uses 7a80 top bit to determine direction, and 7a81 0x08 as an output, presumably to clock) + 0x04 - ADC IRQ - loads/stores 7b81 */ + logerror("%s: irq_source_r\n", machine().describe_context()); return 0xff; } @@ -557,80 +436,86 @@ WRITE8_MEMBER(xavix_state::irq_source_w) void xavix_state::machine_start() { - + // card night expects RAM to be initialized to 0xff or it will show the pause menu over the startup graphics?! + // don't do this every reset or it breaks the baseball 2 secret mode toggle which flips a bit in RAM + std::fill_n(&m_mainram[0], 0x4000, 0xff); } void xavix_state::machine_reset() { - m_rom_dmasrc_lo_data = 0; - m_rom_dmasrc_md_data = 0; - m_rom_dmasrc_hi_data = 0; + m_rom_dma_src[0] = 0; + m_rom_dma_src[1] = 0; + m_rom_dma_src[2] = 0; - m_rom_dmadst_lo_data = 0; - m_rom_dmadst_hi_data = 0; + m_rom_dma_dst[0] = 0; + m_rom_dma_dst[1] = 0; - m_rom_dmalen_lo_data = 0; - m_rom_dmalen_hi_data = 0; + m_rom_dma_len[0] = 0; + m_rom_dma_len[1] = 0; - m_irq_enable_data = 0; - m_irq_vector0_lo_data = 0; - m_irq_vector0_hi_data = 0; - m_irq_vector1_lo_data = 0; - m_irq_vector1_hi_data = 0; + m_vectorenable = 0; + m_nmi_vector_lo_data = 0; + m_nmi_vector_hi_data = 0; + m_irq_vector_lo_data = 0; + m_irq_vector_hi_data = 0; - m_6ff0 = 0; m_6ff8 = 0; - m_75fx[0] = 0; - m_75fx[1] = 0; + m_arena_control = 0; + m_arena_start = 0; + m_arena_end = 0; - m_75fx[6] = 0; - m_75fx[8] = 0; - m_75fx[10] = 0; - m_75fx[11] = 0; - m_75fx[12] = 0; - m_75fx[13] = 0; + m_spritereg = 0; - for (int i = 0; i < 3; i++) - m_multparams[i] = 0; + m_soundregs[0] = 0; + m_soundregs[1] = 0; - for (int i = 0; i < 2; i++) - m_multresults[i] = 0; + m_soundregs[6] = 0; + m_soundregs[8] = 0; + m_soundregs[10] = 0; + m_soundregs[11] = 0; + m_soundregs[12] = 0; + m_soundregs[13] = 0; - for (int i = 0; i < 2; i++) - { - m_vid_dma_param1[i] = 0; - m_vid_dma_param2[i] = 0; - } - - for (int i = 0; i < 8; i++) - { - m_tmap1_regs[i] = 0; - m_tmap2_regs[i] = 0; - } + std::fill(std::begin(m_multparams), std::end(m_multparams), 0x00); + std::fill(std::begin(m_multresults), std::end(m_multresults), 0x00); + std::fill(std::begin(m_spritefragment_dmaparam1), std::end(m_spritefragment_dmaparam1), 0x00); + std::fill(std::begin(m_tmap1_regs), std::end(m_tmap1_regs), 0x00); + std::fill(std::begin(m_tmap2_regs), std::end(m_tmap2_regs), 0x00); + std::fill(std::begin(m_txarray), std::end(m_txarray), 0x00); + std::fill_n(&m_fragment_sprite[0], 0x800, 0x00); // taito nostalgia 1 never initializes the ram at 0x6400 but there's no condition on using it at present? m_lowbus->set_bank(0); + + m_io0_data = 0x00; + m_io1_data = 0x00; + + m_io0_direction = 0x00; + m_io1_direction = 0x00; + } typedef device_delegate<uint8_t (int which, int half)> xavix_interrupt_vector_delegate; -uint8_t xavix_state::get_vectors(int which, int half) +int16_t xavix_state::get_vectors(int which, int half) { // logerror("get_vectors %d %d\n", which, half); + if (m_vectorenable == 0) + return -1; if (which == 0) // irq? { if (half == 0) - return m_irq_vector0_hi_data; + return m_nmi_vector_hi_data; else - return m_irq_vector0_lo_data; + return m_nmi_vector_lo_data; } else { if (half == 0) - return m_irq_vector1_hi_data; + return m_irq_vector_hi_data; else - return m_irq_vector1_lo_data; + return m_irq_vector_lo_data; } } diff --git a/src/mame/machine/xbox.cpp b/src/mame/machine/xbox.cpp index 2e2bc7bdaa2..83fa5549c52 100644 --- a/src/mame/machine/xbox.cpp +++ b/src/mame/machine/xbox.cpp @@ -2,8 +2,9 @@ // copyright-holders:Samuele Zannoli #include "emu.h" -#include "includes/xbox.h" +#include "machine/pci.h" #include "includes/xbox_pci.h" +#include "includes/xbox.h" #include "cpu/i386/i386.h" #include "machine/pit8253.h" @@ -389,7 +390,8 @@ void xbox_base_state::grab_vprog_command(int ref, const std::vector<std::string> return; if ((fil = fopen(params[1].c_str(), "wb")) == nullptr) return; - for (int n = 0; n < 136; n++) { + for (int n = 0; n < 136; n++) + { nvidia_nv2a->debug_grab_vertex_program_slot(n, instruction); fwrite(instruction, sizeof(uint32_t), 4, fil); } @@ -636,72 +638,6 @@ WRITE_LINE_MEMBER(xbox_base_state::xbox_nv2a_interrupt_changed) } /* - * SMbus devices - */ - -int xbox_base_state::smbus_pic16lc(int command, int rw, int data) -{ - if (rw == 1) { // read - if (command == 0) { - if (pic16lc_buffer[0] == 'D') - pic16lc_buffer[0] = 'X'; - else if (pic16lc_buffer[0] == 'X') - pic16lc_buffer[0] = 'B'; - else if (pic16lc_buffer[0] == 'B') - pic16lc_buffer[0] = 'D'; - } - logerror("pic16lc: %d %d %d\n", command, rw, pic16lc_buffer[command]); - return pic16lc_buffer[command]; - } - else - if (command == 0) - pic16lc_buffer[0] = 'B'; - else - pic16lc_buffer[command] = (uint8_t)data; - logerror("pic16lc: %d %d %d\n", command, rw, data); - return 0; -} - -int xbox_base_state::smbus_cx25871(int command, int rw, int data) -{ - logerror("cx25871: %d %d %d\n", command, rw, data); - return 0; -} - -// let's try to fake the missing eeprom, make sure its ntsc, otherwise chihiro will show an error -static int dummyeeprom[256] = { - 0x39, 0xe3, 0xcc, 0x81, 0xb0, 0xa9, 0x97, 0x09, 0x57, 0xac, 0x57, 0x12, 0xf7, 0xc2, 0xc0, 0x21, 0xce, 0x0d, 0x0a, 0xdb, 0x20, 0x7a, 0xf3, 0xff, - 0xdf, 0x67, 0xed, 0xf4, 0xf8, 0x95, 0x5c, 0xd0, 0x9b, 0xef, 0x7b, 0x81, 0xda, 0xd5, 0x98, 0xc1, 0xb1, 0xb3, 0x74, 0x18, 0x86, 0x05, 0xe2, 0x7c, - 0xd1, 0xad, 0xc9, 0x90, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x41, 0x42, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x00, 0x00, - 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff, 0xab, 0xcd, 0xef, 0xba, 0xdc, 0xfe, 0xa1, 0xb2, 0xc3, 0xd3, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; - -int xbox_base_state::smbus_eeprom(int command, int rw, int data) -{ - if (command >= 112) - return 0; - if (rw == 1) { // if reading - // hack to avoid hanging if eeprom contents are not correct - // this would need dumping the serial eeprom on the xbox board - if (command == 0) { - hack_eeprom(); - } - data = dummyeeprom[command] + dummyeeprom[command + 1] * 256; - logerror("eeprom: %d %d %d\n", command, rw, data); - return data; - } - logerror("eeprom: %d %d %d\n", command, rw, data); - dummyeeprom[command] = data; - return 0; -} - -/* * SuperIO */ @@ -772,37 +708,144 @@ WRITE8_MEMBER(xbox_base_state::superiors232_write) } } -void xbox_base_state::machine_start() +/* + * SMbus devices + */ + +/* + * PIC16LC + */ + +DEFINE_DEVICE_TYPE(XBOX_PIC16LC, xbox_pic16lc_device, "pic16lc", "XBOX PIC16LC") + +xbox_pic16lc_device::xbox_pic16lc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, XBOX_PIC16LC, tag, owner, clock) { - find_debug_params(); - nvidia_nv2a = subdevice<nv2a_gpu_device>("pci:1e.0:00.0")->debug_get_renderer(); - memset(pic16lc_buffer, 0, sizeof(pic16lc_buffer)); - pic16lc_buffer[0] = 'B'; - pic16lc_buffer[4] = 0; // A/V connector, 0=scart 2=vga 4=svideo 7=none - // PIC challenge handshake data - pic16lc_buffer[0x1c] = 0x0c; - pic16lc_buffer[0x1d] = 0x0d; - pic16lc_buffer[0x1e] = 0x0e; - pic16lc_buffer[0x1f] = 0x0f; - mcpx_smbus_device *smbus = subdevice<mcpx_smbus_device>("pci:01.1"); - smbus->register_device(0x10, - [&](int command, int rw, int data) - { - return smbus_pic16lc(command, rw, data); - } - ); - smbus->register_device(0x45, - [&](int command, int rw, int data) - { - return smbus_cx25871(command, rw, data); +} + +int xbox_pic16lc_device::execute_command(int command, int rw, int data) +{ + if (rw == 1) { // read + if (command == 0) + { + if (buffer[0] == 'D') + buffer[0] = 'X'; + else if (buffer[0] == 'X') + buffer[0] = 'B'; + else if (buffer[0] == 'B') + buffer[0] = 'D'; + } + logerror("pic16lc: %d %d %d\n", command, rw, buffer[command]); + return buffer[command]; } - ); - smbus->register_device(0x54, - [&](int command, int rw, int data) + else + if (command == 0) + buffer[0] = 'B'; + else + buffer[command] = (uint8_t)data; + logerror("pic16lc: %d %d %d\n", command, rw, data); + return 0; +} + +void xbox_pic16lc_device::device_start() +{ + memset(buffer, 0, sizeof(buffer)); + buffer[0] = 'B'; + buffer[4] = 0; // A/V connector, 0=scart 2=vga 4=svideo 7=none + // PIC challenge handshake data + buffer[0x1c] = 0x0c; + buffer[0x1d] = 0x0d; + buffer[0x1e] = 0x0e; + buffer[0x1f] = 0x0f; +} + +void xbox_pic16lc_device::device_reset() +{ +} + +/* + * CX25871 + */ + +DEFINE_DEVICE_TYPE(XBOX_CX25871, xbox_cx25871_device, "cx25871", "XBOX CX25871") + +xbox_cx25871_device::xbox_cx25871_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, XBOX_CX25871, tag, owner, clock) +{ +} + +int xbox_cx25871_device::execute_command(int command, int rw, int data) +{ + logerror("cx25871: %d %d %d\n", command, rw, data); + return 0; +} + +void xbox_cx25871_device::device_start() +{ +} + +void xbox_cx25871_device::device_reset() +{ +} + +/* + * EEPROM + */ + +// let's try to fake the missing eeprom, make sure its ntsc, otherwise chihiro will show an error +static int dummyeeprom[256] = { + 0x39, 0xe3, 0xcc, 0x81, 0xb0, 0xa9, 0x97, 0x09, 0x57, 0xac, 0x57, 0x12, 0xf7, 0xc2, 0xc0, 0x21, 0xce, 0x0d, 0x0a, 0xdb, 0x20, 0x7a, 0xf3, 0xff, + 0xdf, 0x67, 0xed, 0xf4, 0xf8, 0x95, 0x5c, 0xd0, 0x9b, 0xef, 0x7b, 0x81, 0xda, 0xd5, 0x98, 0xc1, 0xb1, 0xb3, 0x74, 0x18, 0x86, 0x05, 0xe2, 0x7c, + 0xd1, 0xad, 0xc9, 0x90, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x41, 0x42, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x00, 0x00, + 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff, 0xab, 0xcd, 0xef, 0xba, 0xdc, 0xfe, 0xa1, 0xb2, 0xc3, 0xd3, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; + +DEFINE_DEVICE_TYPE(XBOX_EEPROM, xbox_eeprom_device, "eeprom", "XBOX EEPROM") + +xbox_eeprom_device::xbox_eeprom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, XBOX_EEPROM, tag, owner, clock) +{ +} + +int xbox_eeprom_device::execute_command(int command, int rw, int data) +{ + if (command >= 112) + return 0; + if (rw == 1) // if reading { - return smbus_eeprom(command, rw, data); + // hack to avoid hanging if eeprom contents are not correct + // removing this would need dumping the serial eeprom on the chihiro xbox board + if (command == 0) + { + hack_eeprom(); + } + data = dummyeeprom[command] + dummyeeprom[command + 1] * 256; + logerror("eeprom: %d %d %d\n", command, rw, data); + return data; } - ); + logerror("eeprom: %d %d %d\n", command, rw, data); + dummyeeprom[command] = data; + return 0; +} + +void xbox_eeprom_device::device_start() +{ +} + +void xbox_eeprom_device::device_reset() +{ +} + +void xbox_base_state::machine_start() +{ + find_debug_params(); + nvidia_nv2a = subdevice<nv2a_gpu_device>("pci:1e.0:00.0")->debug_get_renderer(); xbox_base_devs.pic8259_1 = subdevice<pic8259_device>("pic8259_1"); xbox_base_devs.pic8259_2 = subdevice<pic8259_device>("pic8259_2"); xbox_base_devs.ide = subdevice<bus_master_ide_controller_device>("ide"); @@ -811,6 +854,11 @@ void xbox_base_state::machine_start() using namespace std::placeholders; machine().debugger().console().register_command("xbox", CMDFLAG_NONE, 0, 1, 4, std::bind(&xbox_base_state::xbox_debug_commands, this, _1, _2)); } + subdevice<xbox_eeprom_device>("pci:01.1:54")->hack_eeprom = + [&](void) + { + hack_eeprom(); + }; subdevice<mcpx_ohci_device>("pci:02.0")->set_hack_callback( [&](void) { @@ -824,7 +872,6 @@ void xbox_base_state::machine_start() // savestates save_item(NAME(debug_irq_active)); save_item(NAME(debug_irq_number)); - save_item(NAME(pic16lc_buffer)); } void xbox_base_state::xbox_base_map(address_map &map) @@ -876,6 +923,9 @@ MACHINE_CONFIG_START(xbox_base_state::xbox_base) MCFG_DEVICE_ADD(":pci:01.0", MCPX_LPC, 0) MCFG_DEVICE_ADD(":pci:01.1", MCPX_SMBUS, 0) MCFG_MCPX_SMBUS_INTERRUPT_HANDLER(WRITELINE(*this, xbox_base_state, xbox_smbus_interrupt_changed)) + MCFG_DEVICE_ADD(":pci:01.1:10", XBOX_PIC16LC, 0) + MCFG_DEVICE_ADD(":pci:01.1:45", XBOX_CX25871, 0) + MCFG_DEVICE_ADD(":pci:01.1:54", XBOX_EEPROM, 0) MCFG_DEVICE_ADD(":pci:02.0", MCPX_OHCI, 0) MCFG_MCPX_OHCI_INTERRUPT_HANDLER(WRITELINE(*this, xbox_base_state, xbox_ohci_usb_interrupt_changed)) MCFG_DEVICE_ADD(":pci:03.0", MCPX_OHCI, 0) diff --git a/src/mame/machine/xbox_pci.cpp b/src/mame/machine/xbox_pci.cpp index 0045fc9f990..8e856de385e 100644 --- a/src/mame/machine/xbox_pci.cpp +++ b/src/mame/machine/xbox_pci.cpp @@ -2,8 +2,9 @@ // copyright-holders:Samuele Zannoli #include "emu.h" -#include "includes/xbox.h" +#include "machine/pci.h" #include "includes/xbox_pci.h" +#include "includes/xbox.h" #include <functional> @@ -153,6 +154,36 @@ void mcpx_smbus_device::device_start() add_map(0x00000020, M_IO, FUNC(mcpx_smbus_device::smbus_io2)); bank_infos[2].adr = 0xc200; memset(&smbusst, 0, sizeof(smbusst)); + for (int n = 0; n < 128; n++) + smbusst.devices[n] = nullptr; + for (device_t &d : subdevices()) + { + const char *t = d.tag(); + int l = strlen(t); + + while (l > 0) + { + l--; + if (t[l] == ':') + { + l++; + int address = strtol(t + l, nullptr, 16); + if ((address > 0) && (address < 128)) + { + if (smbusst.devices[address] == nullptr) + { + smbus_interface *i = dynamic_cast<smbus_interface *>(&d); + smbusst.devices[address] = i; + } + else + logerror("Duplicate address for SMBus device with tag %s\n", t); + } + else + logerror("Invalid address for SMBus device with tag %s\n", t); + break; + } + } + } } void mcpx_smbus_device::device_reset() @@ -190,9 +221,9 @@ WRITE32_MEMBER(mcpx_smbus_device::smbus_w) { if (smbusst.devices[smbusst.address]) if (smbusst.rw == 0) - smbusst.devices[smbusst.address](smbusst.command, smbusst.rw, smbusst.data); + smbusst.devices[smbusst.address]->execute_command(smbusst.command, smbusst.rw, smbusst.data); else - smbusst.data = smbusst.devices[smbusst.address](smbusst.command, smbusst.rw, smbusst.data); + smbusst.data = smbusst.devices[smbusst.address]->execute_command(smbusst.command, smbusst.rw, smbusst.data); else logerror("SMBUS: access to missing device at address %d\n", smbusst.address); smbusst.status |= 0x10; diff --git a/src/mame/machine/xbox_usb.cpp b/src/mame/machine/xbox_usb.cpp index 5a7a167ee49..edfb254f85c 100644 --- a/src/mame/machine/xbox_usb.cpp +++ b/src/mame/machine/xbox_usb.cpp @@ -2,6 +2,8 @@ // copyright-holders:Samuele Zannoli #include "emu.h" +#include "machine/pci.h" +#include "includes/xbox_pci.h" #include "includes/xbox_usb.h" #include "includes/xbox.h" diff --git a/src/mame/machine/znmcu.h b/src/mame/machine/znmcu.h index 5b8e3a88d94..4207cae2038 100644 --- a/src/mame/machine/znmcu.h +++ b/src/mame/machine/znmcu.h @@ -8,32 +8,17 @@ DECLARE_DEVICE_TYPE(ZNMCU, znmcu_device) -#define MCFG_ZNMCU_DATAOUT_HANDLER(_devcb) \ - downcast<znmcu_device &>(*device).set_dataout_handler(DEVCB_##_devcb); - -#define MCFG_ZNMCU_DSR_HANDLER(_devcb) \ - downcast<znmcu_device &>(*device).set_dsr_handler(DEVCB_##_devcb); - -#define MCFG_ZNMCU_DSW_HANDLER(_devcb) \ - downcast<znmcu_device &>(*device).set_dsw_handler(DEVCB_##_devcb); - -#define MCFG_ZNMCU_ANALOG1_HANDLER(_devcb) \ - downcast<znmcu_device &>(*device).set_analog1_handler(DEVCB_##_devcb); - -#define MCFG_ZNMCU_ANALOG2_HANDLER(_devcb) \ - downcast<znmcu_device &>(*device).set_analog2_handler(DEVCB_##_devcb); - class znmcu_device : public device_t { public: znmcu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // configuration helpers - template <class Object> devcb_base &set_dsw_handler(Object &&cb) { return m_dsw_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_analog1_handler(Object &&cb) { return m_analog1_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_analog2_handler(Object &&cb) { return m_analog2_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_dataout_handler(Object &&cb) { return m_dataout_handler.set_callback(std::forward<Object>(cb)); } - template <class Object> devcb_base &set_dsr_handler(Object &&cb) { return m_dsr_handler.set_callback(std::forward<Object>(cb)); } + auto dsw_handler() { return m_dsw_handler.bind(); } + auto analog1_handler() { return m_analog1_handler.bind(); } + auto analog2_handler() { return m_analog2_handler.bind(); } + auto dataout_handler() { return m_dataout_handler.bind(); } + auto dsr_handler() { return m_dsr_handler.bind(); } WRITE_LINE_MEMBER(write_select); WRITE_LINE_MEMBER(write_clock); diff --git a/src/mame/mame.lst b/src/mame/mame.lst index dcd496d1f2d..887dc00ba7d 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -890,12 +890,12 @@ triothep // (c) 1989 Data East Corporation (World) triothepj // (c) 1989 Data East Corporation (Japan) @source:acvirus.cpp -virusa // (c) 1997 Access Gmbh -virusb // (c) 1999 Access Gmbh -virusc // (c) 2002 Access Gmbh -virusrck // (c) 2001 Access Gmbh -virusrckxl // (c) 2002 Access Gmbh -viruscl // (c) 2004 Access Gmbh +virusa // (c) 1997 Access GmbH +virusb // (c) 1999 Access GmbH +virusc // (c) 2002 Access GmbH +virusrck // (c) 2001 Access GmbH +virusrckxl // (c) 2002 Access GmbH +viruscl // (c) 2004 Access GmbH @source:adam.cpp adam // Coleco Adam @@ -2583,6 +2583,7 @@ atetrisa // 136066 (c) 1988 atetrisb // (bootleg) atetrisb2 // (bootleg) atetrisb3 // (bootleg) +atetb3482 // (bootleg, with UM3482) atetrisc // 136066 (c) 1989 atetrisc2 // 136066 (c) 1989 @@ -9777,6 +9778,7 @@ spacewar // (c) 1977 speedfrk // (c) 1979 Vectorbeam starcas // (c) 1980 starcas1 // (c) 1980 +starcasc // (c) 1980 starcase // (c) 1980 Cinematronics (Mottoeis license) starcasp // (c) 1980 prototype starhawk // (c) 1979 @@ -9807,6 +9809,7 @@ circusce // GX380 (c) 1984 + Centuri license @source:cischeat.cpp armchmp2 // (c) 1992 Jaleco armchmp2o // (c) 1992 Jaleco +armchmp2o2 // (c) 1992 Jaleco bigrun // (c) 1989 Jaleco captflag // (c) 1993 Jaleco cischeat // (c) 1990 Jaleco @@ -10177,6 +10180,7 @@ mswordj // 23/06/1990 (c) 1990 (Japan) mswordr1 // 23/06/1990 (c) 1990 (World) mswordu // 25/07/1990 (c) 1990 (USA) mtwins // 19/06/1990 (c) 1990 (World) +mtwinsb // bootleg nemo // 30/11/1990 (c) 1990 (World) nemoj // 20/11/1990 (c) 1990 (Japan) nemor1 // 09/11/1990 (c) 1990 (World) @@ -12324,6 +12328,9 @@ emate // (c) 1997 Apple Computer @source:embargo.cpp embargo // +@source:emma2.cpp +emma2 // 1979 L.J.Technical Systems + @source:enigma2.cpp enigma2 // (c) 1981 Game Plan (Zilec Electronics license) enigma2a // (c) 1984 Zilec Electronics (bootleg?) @@ -12554,6 +12561,7 @@ crossbow // (c) 1983 hitnmiss // (c) 1987 hitnmiss2 // (c) 1987 showdown // (c) 1988 +showdown4 // (c) 1988 topsecex // (c) 1986 whodunit // (c) 1988 whodunit8 // (c) 1988 @@ -12639,6 +12647,12 @@ f1gpb // bootleg mosaicf2 // (c) 1999 F2 System royalpk2 // +@source:facit4440.cpp +facit4440 // 1984 + +@source:falco5220.cpp +falco5220 // 1987 + @source:famibox.cpp famibox // 1986 @@ -13456,8 +13470,9 @@ victorycb // (c) Comsoft (bootleg) warofbug // (c) 1981 Armenia warofbugg // German Version warofbugu // (c) 1981 Armenia -zerotime // hack -zerotimed // hack +zerotime // hack (Petaco S.A.) +zerotimed // hack (Datamat) +zerotimemc // hack (Marti Colls) zigzagb // (c) 1982 LAX (bootleg) zigzagb2 // (c) 1982 LAX (bootleg) @@ -14818,6 +14833,10 @@ hg_frd // Fruit Deuce @source:hazeltin.cpp hazl1500 // Hazeltine 1500 (c) 1977 +hazl1552 // Hazeltine 1552 (c) 1979 + +@source:hazl1420.cpp +hazl1420 // Hazeltine 1420 (c) 1979 @source:hcastle.cpp akumajou // GX768 (c) 1988 (Japan) @@ -14922,6 +14941,7 @@ uspbball // US Games exospace // Elektronika gnw_boxing // Nintendo gnw_dkjr // Nintendo +gnw_dkong // Nintendo gnw_dkong2 // Nintendo gnw_egg // Nintendo gnw_mario // Nintendo @@ -15164,9 +15184,10 @@ sams64_2 // 005 1998/10/16 Samurai Shodown: Warrior's Rag xrally // 003 1998/05/13 Xtreme Rally / Off Beat Racer! @source:holeland.cpp -crzrally // (c) 1985 -crzrallya // (c) 1985 -crzrallyg // (c) 1985 +crzrally // (c) 1985 Tecfri +crzrallya // (c) 1985 Tecfri +crzrallyg // (c) 1985 Gecas +crzrallyrf // (c) 1985 Recreativos Franco holeland // (c) 1984 holeland2 // (c) 1984 @@ -15267,8 +15288,12 @@ hp49gp // HP 49G+ hp64k // @source:hp700.cpp +hp700_70 // hp700_92 // +@source:hp9825.cpp +hp9825b // HP 9825B + @source:hp9845.cpp hp9835a // hp9835b // @@ -15290,6 +15315,7 @@ hp9k320 // hp9k330 // hp9k332 // hp9k340 // +hp9k360 // hp9k370 // hp9k380 // hp9k382 // @@ -15624,6 +15650,9 @@ farwest // bootleg ironhors // GX560 (c) 1986 ironhorsh // GX560 (c) 1986 +@source:is48x.cpp +is482 // + @source:isbc.cpp isbc286 // isbc2861 // @@ -15774,6 +15803,7 @@ pegglet // (c) 1991 Strata/Incredible Technologies pokrdice // (c) 1991 Strata/Incredible Technologies rimrockn // (c) 1991 Strata/Incredible Technologies rimrockn12 // (c) 1991 Strata/Incredible Technologies +rimrockn12b // bootleg rimrockn16 // (c) 1991 Strata/Incredible Technologies rimrockn20 // (c) 1991 Strata/Incredible Technologies slikshot // (c) 1990 Grand Products/Incredible Technologies @@ -15827,6 +15857,11 @@ euro2k2s // (c) 2002 Nazionale Elettronica laperla // (c) 2002 Nazionale Elettronica laperlag // (c) 2001 Nazionale Elettronica mnumber // (c) 200? M.M. - B.R.L. +wcup // (c) 2001 Nazionale Elettronica +wcup14 // (c) 2001 Nazionale Elettronica + +@source:itt1700.cpp +itt1700 // @source:itt3030.cpp itt3030 // @@ -15919,6 +15954,10 @@ jankenmn // (c) 1985 Sunwise @source:jantotsu.cpp jantotsu // (c) 1983 Sanritsu +@source:jazz.cpp +mmr4000be // MIPS Magnum R4000 (big) +mmr4000le // MIPS Magnum R4000 (little) + @source:jchan.cpp jchan // (c) 1995 Kaneko jchan2 // (c) 1995 Kaneko @@ -17981,6 +18020,9 @@ learnwin1 // learnwinf // spielmast // Yuvo +@source:lee1214.cpp +lee1214d // + @source:legionna.cpp cupsoc // (c) 1992 Seibu cupsoca // (c) 1992 Seibu @@ -17993,6 +18035,7 @@ grainbow // (c) 1993 Banpresto grainbowk // (c) 1993 Banpresto heatbrl // (c) 1992 Tad (World version 3) heatbrl2 // (c) 1992 Tad (World version 2) +heatbrl3 // (c) 1992 Tad (World version ?) heatbrle // (c) 1992 Tad (Electronic Devices license) heatbrlo // (c) 1992 Tad (World) heatbrlu // (c) 1992 Tad (US) @@ -21382,6 +21425,10 @@ minitel2 // @source:minivadr.cpp minivadr // D26 cabinet test board +@source:mips.cpp +rc2030 // MIPS RC2030 +rs2030 // MIPS RS2030 + @source:mirage.cpp mirage // (c) 1994 Mitchell @@ -21437,6 +21484,7 @@ qtono1 // 25/12/1990 (QUIZ 3) (c) 1991 Capcom (Japan) sbbros // 01/10/1990 (c) 1990 Mitchell + Capcom (US) not listed on Capcom's site spang // 14/09/1990 (c) 1990 Mitchell (World) spangbl // bootleg +spangbl2 // bootleg spangj // --/--/1990 (c) 1990 Mitchell (Japan) @source:mits680b.cpp @@ -21598,6 +21646,7 @@ dirtdvlsa // dirtdvlsj // eca // 1999.10 Kyukyuusya Emergency Call Ambulance ecap // 1999.12 Emergency Call Ambulance - US proto or location test +ecaj // ecau // fvipers2 // 1998.04 Fighting Vipers 2 getbass // @@ -23298,6 +23347,7 @@ m4colossg // m4ctn // Tuppenny Nudger Classic (Mdm?) m4ewshft // Each Way Shifter m4excam // Excalibur (Mdm) +m4excamd // m4firebl // Fireball (Mdm) m4firebla // m4fireblb // @@ -27466,6 +27516,9 @@ v4picdil // Piccadilly Nights v4psi // Prize Space Invaders v4psia // v4psib // +v4psi14d // +v4psi20d // +v4psi214 // v4pztet // Prize Tetris v4pzteta // v4quidgr // Ten Quid Grid @@ -27487,6 +27540,7 @@ v4strike2d // v4striked // v4sunbst // Sunburst v4tetrs // BwB Tetris v 2.2 +v4tetrs1 // BwB Tetris v 1.0 v4time // Time Machine v4timebn // Time Bandit v4turnov // Turnover @@ -28908,6 +28962,7 @@ vshoot // (c) 1994 ncv1 // (c) 1995 ncv1j // (c) 1995 (Japan) ncv1j2 // (c) 1995 (Japan) +gynotai // (c) 1996 (Japan) ncv2 // (c) 1996 ncv2j // (c) 1996 (Japan) abcheck // (c) 1996 (Japan) @@ -29137,7 +29192,7 @@ finallapjb // 87.12 Final Lap finallapjc // 87.12 Final Lap finehour // (c) 1989 (Japan) fourtrax // 89.11 -fourtraxj // 89.11 +fourtraxj // 89.11 fourtraxa // 89.11 gollygho // 91.7 Golly Ghost kyukaidk // (c) 1990 (Japan, new version) @@ -29171,17 +29226,21 @@ sws93 // (c) 1993 (Japan) valkyrie // (c) 1989 (Japan) @source:namcos21.cpp +winrun // (c) 1988 +winrun91 // (c) 1991 +winrungp // (c) 1989 + +@source:namcos21_c67.cpp aircomb // (c) 1992 (US) aircombj // (c) 1992 (Japan) cybsled // (c) 1993 (World) -cybsledj // (c) 1993 (Japan) -driveyes // (c) 1992? +cybsleda // (c) 1993 (World) solvalou // (c) 1991 (Japan) starblad // (c) 1991 (World) starbladj // (c) 1991 (Japan) -winrun // (c) 1988 -winrun91 // (c) 1991 -winrungp // (c) 1989 + +@source:namcos21_de.cpp +driveyes // (c) 1992? @source:namcos22.cpp acedrvrw // (c) 1994 @@ -29212,6 +29271,7 @@ timecris // (c) 1995 timecrisa // (c) 1995 tokyowar // (c) 1996 victlapw // (c) 1996 +victlapj // (c) 1996 @source:namcos23.cpp 500gp // March 1999 @@ -29907,6 +29967,7 @@ minasan // 0027 (c) 1990 Monolith Corp. moshougi // 0203 (c) 1995 ADK / SNK ms4plus // bootleg ms5plus // bootleg +mvstemp // development board mslug // 0201 (c) 1996 Nazca mslug2 // 0241 (c) 1998 SNK mslug2t // bootleg @@ -30147,6 +30208,9 @@ neocd // NeoGeo CD neocdz // NeoGeo CDZ neocdzj // +@source:nforcepc.cpp +nforcepc // + @source:ngen.cpp 386i // 199? ngen // 1983 @@ -30263,7 +30327,8 @@ mustangs // UPL-90058 (c) 1990 UPL + Seoul Trading nouryoku // (c) 1995 Tecmo nouryokup // (c) 1995 Tecmo popspops // (c) 1999 -raphero // (c) 1994 Media Trading Corp +raphero // (c) 1994 NMK +rapheroa // (c) 1994 Media Trading Corp redfoxwp2 // (c) 1998 (China) redfoxwp2a // (c) 1998 (China) redhawk // (c) 1997 New Vision Ent. license @@ -30279,8 +30344,9 @@ spec2k // (c) 2000 Yonatech spec2kh // (c) 2000 Yonatech ssmissin // (c) 1992 Comad stagger1 // (c) 1998 -strahl // UPL-91074 (c) 1992 UPL (Japan) -strahla // UPL-91074 (c) 1992 UPL (Japan) +strahl // UPL-91074 (c) 1992 UPL (World) +strahlj // UPL-91074 (c) 1992 UPL (Japan) +strahlja // UPL-91074 (c) 1992 UPL (Japan) tdragon // (c) 1991 NMK / Tecmo tdragon1 // (c) 1991 NMK / Tecmo tdragon2 // UPL-93091 (c) 1993 NMK @@ -30612,6 +30678,7 @@ clubpacm // Miky SRL clubpacma // Miky SRL clubpacmb // Miky SRL crockman // 1980 bootleg (RENE PIERRE) +crockmnf // bootleg (Marti Colls / Falgas) crush // (c) 1981 Kural Samno Electric Ltd crush2 // (c) 1981 Kural Esco Electric Ltd - bootleg? crush3 // Kural Electric Ltd @@ -30648,6 +30715,7 @@ mrtnt // (c) 1983 Telko mschamp // hack by RAYGLO MFG "Zola-Puc" (c) 1992/1993 mschamps // hack (hack of the Rayglo hack?) msheartb // hack +mspacmbmc // bootleg (Marti Colls / Falgas) mspacii // bootleg mspacii2 // bootleg mspacmab // bootleg @@ -30707,6 +30775,7 @@ superabc // hack superabco // hack theglobp // (c) 1983 Epos Corporation titanpac // hack +pacmanfm // bootleg (FAMARE S.A.) vanvan // (c) 1983 Sanritsu vanvanb // (c) 1983 Karateco (bootleg?) vanvank // (c) 1983 Karateco (bootleg?) @@ -31818,7 +31887,8 @@ condor // bootleg (Sidam) condorn // bootleg (S C Novar) falcon // bootleg falconz // bootleg -fenix // bootleg +fenix // bootleg (Orio) +fenixn // bootleg (Niemer) griffon // bootleg (Videotron) griffono // bootleg (Olympia) nextfase // bootleg @@ -31833,6 +31903,7 @@ phoenixc2 // bootleg phoenixc3 // bootleg phoenixc4 // bootleg phoenixdal // bootleg D&L (No copyright/title) +phoenixgu // bootleg G. Universal Video phoenixha // bootleg Hellomat Automaten phoenixi // bootleg IDI phoenixj // (c) 1980 Taito @@ -31944,9 +32015,10 @@ neiva // pkscram // (c) 1993 Cosmo Electronics Corporation @source:pktgaldx.cpp -pktgaldx // MAZ (c) 1993 Data East (Euro v3.00) +pktgaldx // MAZ (c) 1992 Data East (Euro v3.00) +pktgaldxa // MAZ (c) 1992 Data East (Asia v3.00) pktgaldxb // bootleg -pktgaldxj // MAZ (c) 1993 +pktgaldxj // MAZ (c) 1993 Nihon System inc (Japan v3.00) @source:plan80.cpp plan80 // @@ -33314,6 +33386,7 @@ diner_l1 // diner_l2 // diner_l3 // diner_l4 // +diner_p0 // gs_la3 // gs_lg6 // gs_lu3 // @@ -33752,6 +33825,7 @@ stratgyx // GX306 (c) 1981 Konami strongx // bootleg tazmani2 // (c) 1982 Stern tazmani3 // bootleg (Rodmar) +tazmaniet // bootleg (U.R.V. BBCPE) @source:scopus.cpp sagitta180 // 1979? @@ -33822,6 +33896,9 @@ spacewin // @source:sderby2.cpp sderby2 // (c) 1985 +@source:sdk51.cpp +sdk51 // + @source:sdk80.cpp sdk80 // @@ -34897,6 +34974,7 @@ sg1000m2 // Sega SG-1000 Mark II (Japan) chboxing // (c) 1984 chwrestl // (c) 1985 dokidoki // (c) 1985 +sderbys // (c) 1984 sderby2s // (c) 1985 @source:sh4robot.cpp @@ -34965,6 +35043,9 @@ smssgamea shuuz // 136083 (c) 1990 shuuz2 // 136083 (c) 1990 +@source:si5500.cpp +si5500 // + @source:sidearms.cpp dyger // (c) 1989 Philko (NOT A CAPCOM GAME but runs on modified Sidearms hardware) dygera // (c) 1989 Philko (NOT A CAPCOM GAME but runs on modified Sidearms hardware) @@ -35894,12 +35975,14 @@ sfish2 // 1995.11 Sports Fishing 2 (Export) sfish2j // 1995.08 Sports Fishing 2 (Japan) shanhigw // 1995.08 Shanghai Banri no Choujou shienryu // 1997.02 Shienryu (Warashi) +skychal // 2000.04 Sky Challenger smleague // 1996.04 Super Major League sokyugrt // 1996.09 Soukyuu Gurentai (Raizing / 8ing) sss // 1998.12 Steep Slope Sliders (Capcom / Cave / Victor) stress // 1998.10 Stress Busters stvbios // suikoenb // 1995.03 Suiko Enbu (Data East) +supgoal // 1998.12 Nerae Super Goal tatacot // 1995.?? Tatacot techbowl // 1997.12 Technical Bowling thunt // 1997.09 Puzzle & Action Treasure Hunt (Deniam license) @@ -36106,7 +36189,8 @@ suprlocoo // (c) 1982 Sega @source:suprnova.cpp cyvern // 1998.02 (c) 1998 Kaneko (US) cyvernj // 1998.02 (c) 1998 Kaneko (Japan) -galpani4 // 1996.09 (c) 1996 Kaneko (Japan) +galpani4 // 1996.09 (c) 1996 Kaneko (Europe) +galpani4j // 1996.09 (c) 1996 Kaneko (Japan) galpani4k // 1996.09 (c) 1996 Kaneko (Korea) galpanidx // 1996.09 (c) 1996 Kaneko (Asia) galpanis // 1997.04 (c) 1997 Kaneko (Europe) @@ -36259,7 +36343,7 @@ teddybbo // 834-5712 (c) 1985 (S1) teddybbobl // bootleg thetogyu // 834-5478 (c) 1984 Sega / Coreland (S1) tokisens // (c) 1987 -tokisensa // +tokisensa // ufosensi // 834-6659 (S2) ufosensib // bootleg upndown // (c) 1983 (S1) @@ -36291,6 +36375,7 @@ wmatch // (c) 1984 (S1) @source:system16.cpp altbeastbl // +altbeastbl2 // astormb2 // BOOTLEG astormbl // BOOTLEG bayrouteb1 // (c) 1989 (protected) (bootleg) @@ -36517,7 +36602,8 @@ kaiserkn // 1994.?? D84 (c) 1994 Taito Corporation Japan kaiserknj // 1994.08 D84 (c) 1994 Taito Corporation (Japan) kirameki // 1997.09 E44 (c) 1997 Taito Corporation (Japan) ktiger2 // 1996.02 E15 (c) 1995 Taito Corporation (Japan) -landmakr // 1998.08 E61 (c) 1998 Taito Corporation (Japan) +landmakr // 1998.08 E61 (c) 1998 Taito Corporation (World) +landmakrj // 1998.08 E61 (c) 1998 Taito Corporation (Japan) landmakrp // 1998.?? E61 (c) 1998 Taito Corporation (World, prototype) lightbr // 1994.03 D69 (c) 1993 Taito Corporation Japan (World) lightbrj // 1994.03 D69 (c) 1993 Taito Corporation (Japan) @@ -36952,7 +37038,6 @@ t4490 // Terco 4490 Mill CNC Control (c) 1986 7951om // alcat258 // alcat7100 // -facit4440 // feap90 // ikt5a // itt9216 // @@ -37875,8 +37960,9 @@ gq863 // @source:twins.cpp spider // -twins // (c) 1994 -twinsa // (c) 1994 +twins // (c) 1993 Ecogames +twinsed1 // (c) 1994 Electronic Devices +twinsed2 // (c) 1994 Electronic Devices @source:tx0.cpp tx0_64kw // April 1956 MIT TX-0 (64kw RAM) @@ -38141,6 +38227,7 @@ vendetta2pw // GX081 (c) 1991 (World) vendettan // GX081 (c) 1991 (Japan) vendettar // GX081 (c) 1991 (World) vendettaz // GX081 (c) 1991 (World) +vendettaun // GX081 (c) 1991 (World) @source:vertigo.cpp topgunnr // (c) 1986 @@ -38215,7 +38302,7 @@ victory // (c) 1982 vidbrain // @source:video21.cpp -video21 // Videogames gmbh 1980 +video21 // Videogames GmbH 1980 @source:videopin.cpp solarwar // 036154-036169 1979 [6502] @@ -38254,13 +38341,13 @@ vigilanto // (c) 1988 (US) @source:vii.cpp batmantv // The Batman, 2004 -vii // Chintendo / KenSingTon / Jungle Soft / Siatronics Vii +vii // KenSingTon / Jungle Soft / Siatronics Vii vsmile // vsmileb // vsmilef // vsmileg // walle // -wireless // Wireless +wrlshunt // Wireless: Hunting Video Game System wirels60 // Wireless 60 wlsair60 // Wireless Air 60 zone40 // Zone 40 @@ -38559,8 +38646,9 @@ twcup90ba // bootleg hotchase // GX763 (c) 1988 hotchasea // wecleman // GX602 (c) 1986 -weclemana // GX602?(c) 1988 -weclemanb // GX602 (c) 1986 +weclemana // GX602 (c) 1986 +weclemanb // GX602?(c) 1988 +weclemanc // GX602 (c) 1986 @source:welltris.cpp quiz18k // (c) 1992 EIM (Welltris hardware) @@ -39070,6 +39158,7 @@ cc_104 // cc_12 // cc_13 // congo_11 // +congo_11s10 // congo_13 // congo_20 // congo_21 // @@ -39276,6 +39365,7 @@ fs_sp2 // i500_10r // i500_11b // i500_11r // +jb_04a // jb_10b // jb_10r // jm_05r // diff --git a/src/mame/mess.flt b/src/mame/mess.flt index 294c7830685..2ade77185b9 100644 --- a/src/mame/mess.flt +++ b/src/mame/mess.flt @@ -203,6 +203,7 @@ elektronmono.cpp elf.cpp elwro800.cpp emate.cpp +emma2.cpp enmirage.cpp ep64.cpp esprit.cpp @@ -220,6 +221,8 @@ evmbug.cpp excali64.cpp exelv.cpp exp85.cpp +facit4440.cpp +falco5220.cpp fanucs15.cpp fanucspmg.cpp fb01.cpp @@ -265,6 +268,7 @@ h8.cpp h89.cpp harriet.cpp hazeltin.cpp +hazl1420.cpp hec2hrp.cpp hh_amis2k.cpp hh_cop400.cpp @@ -287,6 +291,7 @@ hp48.cpp hp49gp.cpp hp64k.cpp hp700.cpp +hp9825.cpp hp9845.cpp hp9k.cpp hp9k_3xx.cpp @@ -326,12 +331,15 @@ iq151.cpp iqunlim.cpp iris3130.cpp irisha.cpp +is48x.cpp isbc.cpp isbc8010.cpp isbc8030.cpp iskr103x.cpp +itt1700.cpp itt3030.cpp jade.cpp +jazz.cpp jonos.cpp jr100.cpp jr200.cpp @@ -358,6 +366,7 @@ lc80.cpp lcmate2.cpp leapster.cpp learnwin.cpp +lee1214.cpp lft.cpp lg-dvd.cpp lilith.cpp @@ -417,6 +426,7 @@ minicom.cpp miniforce.cpp miniframe.cpp minitel_2_rpic.cpp +mips.cpp mits680b.cpp mk1.cpp mk14.cpp @@ -468,6 +478,7 @@ nes.cpp nes_vt.cpp newbrain.cpp next.cpp +nforcepc.cpp ngen.cpp ngp.cpp nokia_3310.cpp @@ -629,6 +640,7 @@ sc2.cpp scopus.cpp scorpion.cpp scv.cpp +sdk51.cpp sdk80.cpp sdk85.cpp sdk86.cpp @@ -639,6 +651,7 @@ segapm.cpp selz80.cpp sg1000.cpp sh4robot.cpp +si5500.cpp sitcom.cpp sk1.cpp slc1.cpp diff --git a/src/mame/video/apollo.cpp b/src/mame/video/apollo.cpp index 981b2048f0d..08cae067368 100644 --- a/src/mame/video/apollo.cpp +++ b/src/mame/video/apollo.cpp @@ -285,17 +285,17 @@ uint32_t apollo_graphics_15i::bt458::get_rgb(uint8_t index) const char *apollo_graphics_15i::cr_text(offs_t offset, uint8_t data, uint8_t rw) { - static const char *cr0[8] = + static char const *const cr0[8] = { "cr0 mode=0 CPU dest BLT", "cr0 mode=1 Alternating BLT", "cr0 mode=2 Vector mode", "cr0 mode=3 CPU Source BLT", "cr0 mode=4 Double access BLT ", "cr0 mode=5 ???", "cr0 mode=6 ???", "cr0 mode=7 Normal" }; - static const char *cr2[4] = + static char const *const cr2[4] = { "cr2 Constant access", "cr2 Pixel access", "cr2 ???", "cr2 Plane access" }; - static const char *cr2b[4] = + static char const *const cr2b[4] = { "cr2b Constant access", "cr2b Pixel access", "cr2b ???", "cr2b Plane access" }; diff --git a/src/mame/video/bbusters.cpp b/src/mame/video/bbusters.cpp index 0f4c717c13f..b4aae331873 100644 --- a/src/mame/video/bbusters.cpp +++ b/src/mame/video/bbusters.cpp @@ -163,7 +163,7 @@ void bbusters_state::draw_block(screen_device &screen, bitmap_ind16 &dest,int x, priorityline[(x+(x_index>>16)) & 0x1ff] = priority; destline[(x+(x_index>>16)) & 0x1ff]= pen_base + pixel; } - + if (flipx) x_index-=xinc; else @@ -181,7 +181,7 @@ void bbusters_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, c { int offs; - // Sprites are stored in memory in back to front order. + // Sprites are stored in memory in back to front order. // We draw them here front to back with a priority buffer in case any sprite // with priority under a tilemap is later in the list than a sprite with // above tilemap priority (which would cause a cut-out as only the top-most sprite @@ -191,7 +191,7 @@ void bbusters_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, c int16_t y; int block; int priority; - + sprite=source[offs+1]; colour=source[offs+0]; @@ -227,7 +227,7 @@ void bbusters_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, c // Palettes 0xc-0xf confirmed to be behind tilemap on Beast Busters for 2nd sprite chip priority = (bank==2) ? (((colour&0xc)==0xc) ? 1 : 4) : 8; - + switch ((source[offs+0]>>8)&0x3) { case 0: scale=source[offs+0]&0x7; @@ -273,7 +273,7 @@ uint32_t bbusters_state::screen_update(screen_device &screen, bitmap_ind16 &bitm draw_sprites(screen, bitmap, m_spriteram[1]->buffer(), 2); draw_sprites(screen, bitmap, m_spriteram[0]->buffer(), 1); m_fix_tilemap->draw(screen, bitmap, cliprect, 0, 0); - + return 0; } diff --git a/src/mame/video/contra.cpp b/src/mame/video/contra.cpp index 45bab77d1f6..ef97ba765a7 100644 --- a/src/mame/video/contra.cpp +++ b/src/mame/video/contra.cpp @@ -239,9 +239,9 @@ WRITE8_MEMBER(contra_state::contra_K007121_ctrl_1_w) if (offset == 3) { if ((data & 0x8) == 0) - memcpy(m_buffered_spriteram_2.get(), m_spriteram + 0x2800, 0x800); + memcpy(m_buffered_spriteram_2.get(), m_spriteram_2 + 0x800, 0x800); else - memcpy(m_buffered_spriteram_2.get(), m_spriteram + 0x2000, 0x800); + memcpy(m_buffered_spriteram_2.get(), m_spriteram_2 + 0x000, 0x800); } if (offset == 6) { diff --git a/src/mame/video/cps1.cpp b/src/mame/video/cps1.cpp index 485aa610a23..a6df5578acb 100644 --- a/src/mame/video/cps1.cpp +++ b/src/mame/video/cps1.cpp @@ -1462,6 +1462,7 @@ static const struct CPS1config cps1_config_table[]= {"mswordj", CPS_B_13, mapper_MS24B }, // wrong, this set uses MS22B, dumped but equations still not added {"mtwins", CPS_B_14, mapper_CK24B }, {"chikij", CPS_B_14, mapper_CK24B }, // wrong, this set uses CK22B, dumped but equations still not added + {"mtwinsb", CPS_B_14, mapper_CK24B }, // wrong, bootleg hardware {"nemo", CPS_B_15, mapper_NM24B }, {"nemor1", CPS_B_15, mapper_NM24B }, {"nemoj", CPS_B_15, mapper_NM24B }, // wrong, this set uses NM22B, still not dumped diff --git a/src/mame/video/edevices.cpp b/src/mame/video/edevices.cpp new file mode 100644 index 00000000000..2c2c1a6e3fd --- /dev/null +++ b/src/mame/video/edevices.cpp @@ -0,0 +1,336 @@ +// license:BSD-3-Clause +// copyright-holders:Pierpaolo Prazzoli, David Haywood +/* + Electronic Devices video system + + used by + stlforce.cpp + mwarr.cpp + + TODO: + Check if the sprites are an obvious clone of anything else and split out if neccessary + Steel Force doesn't use the variable height sprites, does the hardware support them? + Verify offsets / visible areas / overscan etc. especially text layer as Steel Force ending does not quite fit on screen +*/ + + +#include "emu.h" +#include "edevices.h" + +DEFINE_DEVICE_TYPE(EDEVICES_VID, edevices_device, "edevices_vid", "Electronic Devices Video (Mighty Warriors)") +DEFINE_DEVICE_TYPE(EDEVICES_SFORCE_VID, edevices_sforce_device, "edevices_sforce_vid", "Electronic Devices Video (Steel Forces)") + + +edevices_device::edevices_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, type, tag, owner, clock), + m_bg_videoram(*this, finder_base::DUMMY_TAG), + m_mlow_videoram(*this, finder_base::DUMMY_TAG), + m_mhigh_videoram(*this, finder_base::DUMMY_TAG), + m_tx_videoram(*this, finder_base::DUMMY_TAG), + m_bg_scrollram(*this, finder_base::DUMMY_TAG), + m_mlow_scrollram(*this, finder_base::DUMMY_TAG), + m_mhigh_scrollram(*this, finder_base::DUMMY_TAG), + m_vidattrram(*this, finder_base::DUMMY_TAG), + m_spriteram(*this, finder_base::DUMMY_TAG), + m_gfxdecode(*this, finder_base::DUMMY_TAG), + m_palette(*this, finder_base::DUMMY_TAG), + m_spritexoffs(0) // might come from the clock, twinbrat has different video timings and resolution +{ +} + + +edevices_device::edevices_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + edevices_device(mconfig, EDEVICES_VID, tag, owner, clock) +{ +} + +edevices_sforce_device::edevices_sforce_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + edevices_device(mconfig, EDEVICES_SFORCE_VID, tag, owner, clock) +{ +} + + +void edevices_device::device_start() +{ + m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(edevices_device::get_bg_tile_info),this), TILEMAP_SCAN_COLS, 16, 16, 64, 16); + m_mlow_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(edevices_device::get_mlow_tile_info),this), TILEMAP_SCAN_COLS, 16, 16, 64, 16); + m_mhigh_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(edevices_device::get_mhigh_tile_info),this), TILEMAP_SCAN_COLS, 16, 16, 64, 16); + m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(edevices_device::get_tx_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); + + m_mlow_tilemap->set_transparent_pen(0); + m_mhigh_tilemap->set_transparent_pen(0); + m_tx_tilemap->set_transparent_pen(0); + + m_bg_tilemap->set_scroll_rows(256); + m_mlow_tilemap->set_scroll_rows(256); + m_mhigh_tilemap->set_scroll_rows(256); + + save_item(NAME(m_sprites_buffer)); + save_item(NAME(m_which)); +} + +void edevices_device::device_reset() +{ + m_which = 0; +} + +WRITE16_MEMBER(edevices_device::bg_videoram_w) +{ + COMBINE_DATA(&m_bg_videoram[offset]); + m_bg_tilemap->mark_tile_dirty(offset); +} + +WRITE16_MEMBER(edevices_device::mlow_videoram_w) +{ + COMBINE_DATA(&m_mlow_videoram[offset]); + m_mlow_tilemap->mark_tile_dirty(offset); +} + +WRITE16_MEMBER(edevices_device::mhigh_videoram_w) +{ + COMBINE_DATA(&m_mhigh_videoram[offset]); + m_mhigh_tilemap->mark_tile_dirty(offset); +} + +WRITE16_MEMBER(edevices_device::tx_videoram_w) +{ + COMBINE_DATA(&m_tx_videoram[offset]); + m_tx_tilemap->mark_tile_dirty(offset); +} + +WRITE16_MEMBER(edevices_device::sprites_commands_w) +{ + // TODO: I'm not convinced by this, from mwarr.cpp driver + if (m_which) + { + int i; + + switch (data & 0xf) + { + case 0: + /* clear sprites on screen */ + for (i = 0; i < 0x400; i++) + { + m_sprites_buffer[i] = 0; + } + m_which = 0; + break; + + default: + // allow everything else to fall through, other games are writing other values + case 0xf: // mwarr + /* refresh sprites on screen */ + for (i = 0; i < 0x400; i++) + { + m_sprites_buffer[i] = m_spriteram[i]; + } + break; + + case 0xd: + /* keep sprites on screen */ + break; + } + } + + m_which ^= 1; +} + +TILE_GET_INFO_MEMBER(edevices_device::get_bg_tile_info) +{ + int tileno = m_bg_videoram[tile_index] & 0x1fff; + int colour = (m_bg_videoram[tile_index] & 0xe000) >> 13; + + SET_TILE_INFO_MEMBER(4, tileno, colour, 0); +} + +TILE_GET_INFO_MEMBER(edevices_device::get_mlow_tile_info) +{ + int tileno = m_mlow_videoram[tile_index] & 0x1fff; + int colour = (m_mlow_videoram[tile_index] & 0xe000) >> 13; + + SET_TILE_INFO_MEMBER(3, tileno, colour, 0); +} + +TILE_GET_INFO_MEMBER(edevices_device::get_mhigh_tile_info) +{ + int tileno = m_mhigh_videoram[tile_index] & 0x1fff; + int colour = (m_mhigh_videoram[tile_index] & 0xe000) >> 13; + + SET_TILE_INFO_MEMBER(2, tileno, colour, 0); +} + +TILE_GET_INFO_MEMBER(edevices_device::get_tx_tile_info) +{ + int tileno = m_tx_videoram[tile_index] & 0x1fff; + int colour = (m_tx_videoram[tile_index] & 0xe000) >> 13; + + SET_TILE_INFO_MEMBER(1, tileno, colour, 0); +} + + +int edevices_device::get_priority(const uint16_t *source) +{ + return ((source[1] & 0x3c00) >> 10); // Priority (1 = Low) +} + +// the Steel Force type hardware uses an entirely different bit for priority and only appears to have 2 levels +int edevices_sforce_device::get_priority(const uint16_t *source) +{ + return (source[1] & 0x0020) ? 0xc : 0x2; +} + +void edevices_device::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + const uint16_t *source = m_sprites_buffer + 0x400 - 4; + const uint16_t *finish = m_sprites_buffer; + gfx_element *gfx = m_gfxdecode->gfx(0); + int x, y, color, flipx, dy, pri, pri_mask, i; + + while (source >= finish) + { + /* draw sprite */ + if (source[0] & 0x0800) + { + y = 0x1ff - (source[0] & 0x01ff); + x = (source[3] & 0x3ff) - 9; + + color = source[1] & 0x000f; + flipx = source[1] & 0x0200; + + dy = (source[0] & 0xf000) >> 12; + + pri = get_priority(source); + pri_mask = ~((1 << (pri + 1)) - 1); // Above the first "pri" levels + + x += m_spritexoffs; + + for (i = 0; i <= dy; i++) + { + gfx->prio_transpen(bitmap, + cliprect, + source[2] + i, + color, + flipx, 0, + x, y + i * 16, + screen.priority(), pri_mask, 0); + + /* wrap around x */ + gfx->prio_transpen(bitmap, + cliprect, + source[2] + i, + color, + flipx, 0, + x - 1024, y + i * 16, + screen.priority(), pri_mask, 0); + + /* wrap around y */ + gfx->prio_transpen(bitmap, + cliprect, + source[2] + i, + color, + flipx, 0, + x, y - 512 + i * 16, + screen.priority(), pri_mask, 0); + + /* wrap around x & y */ + gfx->prio_transpen(bitmap, + cliprect, + source[2] + i, + color, + flipx, 0, + x - 1024, y - 512 + i * 16, + screen.priority(), pri_mask, 0); + } + } + + source -= 0x4; + } +} + +/* + m_vidattrram + 0 tx xscroll (or global x scroll?) + 1 back yscroll + 2 mlow yscroll + 3 mhigh yscroll + 4 tx yscroll + 5 ---- ---- ---s tMmB layer enables (s = sprites, t = tx, M = highmid, m = lowmid, B = back) + 6 ---- ---- ---M -m-B rowscroll enables (B = back, m = lowmid, M = highmid) + +*/ + +uint32_t edevices_device::draw(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int i; + + bitmap.fill(0, cliprect); + screen.priority().fill(0, cliprect); + + /* xscrolls - Steel Force clearly shows that each layer needs -1 scroll compared to the previous, do enable flags change this? */ + if (BIT(m_vidattrram[6], 0)) + { + for (i = 0; i < 256; i++) + m_bg_tilemap->set_scrollx(i, m_bg_scrollram[i] + 18); + } + else + { + for (i = 0; i < 256; i++) + m_bg_tilemap->set_scrollx(i, m_bg_scrollram[0] + 18); + } + + if (BIT(m_vidattrram[6], 2)) + { + for (i = 0; i < 256; i++) + m_mlow_tilemap->set_scrollx(i, m_mlow_scrollram[i] + 17); + } + else + { + for (i = 0; i < 256; i++) + m_mlow_tilemap->set_scrollx(i, m_mlow_scrollram[0] + 17); + } + + if (BIT(m_vidattrram[6], 4)) + { + for (i = 0; i < 256; i++) + m_mhigh_tilemap->set_scrollx(i, m_mhigh_scrollram[i] + 16); + } + else + { + for (i = 0; i < 256; i++) + m_mhigh_tilemap->set_scrollx(i, m_mhigh_scrollram[0] + 16); + } + + m_tx_tilemap->set_scrollx(0, m_vidattrram[0] + 15); + + /* yscrolls */ + m_bg_tilemap->set_scrolly(0, m_vidattrram[1] + 1); + m_mlow_tilemap->set_scrolly(0, m_vidattrram[2] + 1); + m_mhigh_tilemap->set_scrolly(0, m_vidattrram[3] + 1); + m_tx_tilemap->set_scrolly(0, m_vidattrram[4] + 1); + + + if (BIT(m_vidattrram[5], 0)) + { + m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0x01); + } + + if (BIT(m_vidattrram[5], 1)) + { + m_mlow_tilemap->draw(screen, bitmap, cliprect, 0, 0x02); + } + + if (BIT(m_vidattrram[5], 2)) + { + m_mhigh_tilemap->draw(screen, bitmap, cliprect, 0, 0x04); + } + + if (BIT(m_vidattrram[5], 3)) + { + m_tx_tilemap->draw(screen, bitmap, cliprect, 0, 0x10); + } + + if (BIT(m_vidattrram[5], 4)) + draw_sprites(screen, bitmap, cliprect); + + return 0; +} diff --git a/src/mame/video/edevices.h b/src/mame/video/edevices.h new file mode 100644 index 00000000000..dcb91a67b45 --- /dev/null +++ b/src/mame/video/edevices.h @@ -0,0 +1,93 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +#ifndef MAME_VIDEO_EDEVICES_H +#define MAME_VIDEO_EDEVICES_H + +#pragma once + +#include "screen.h" +#include "emupal.h" + +class edevices_device : public device_t +{ +public: + edevices_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + edevices_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + template <typename T> void set_bg_videoram_tag(T &&tag) { m_bg_videoram.set_tag(std::forward<T>(tag)); } + template <typename T> void set_mlow_videoram_tag(T &&tag) { m_mlow_videoram.set_tag(std::forward<T>(tag)); } + template <typename T> void set_mhigh_videoram_tag(T &&tag) { m_mhigh_videoram.set_tag(std::forward<T>(tag)); } + template <typename T> void set_tx_videoram_tag(T &&tag) { m_tx_videoram.set_tag(std::forward<T>(tag)); } + template <typename T> void set_bg_scrollram_tag(T &&tag) { m_bg_scrollram.set_tag(std::forward<T>(tag)); } + template <typename T> void set_mlow_scrollram_tag(T &&tag) { m_mlow_scrollram.set_tag(std::forward<T>(tag)); } + template <typename T> void set_mhigh_scrollram_tag(T &&tag) { m_mhigh_scrollram.set_tag(std::forward<T>(tag)); } + template <typename T> void set_vidattrram_tag(T &&tag) { m_vidattrram.set_tag(std::forward<T>(tag)); } + template <typename T> void set_spriteram_tag(T &&tag) { m_spriteram.set_tag(std::forward<T>(tag)); } + template <typename T> void set_gfxdecode_tag(T &&tag) { m_gfxdecode.set_tag(std::forward<T>(tag)); } + template <typename T> void set_palette_tag(T &&tag) { m_palette.set_tag(std::forward<T>(tag)); } + + void set_spritexoffset(int offset) + { + m_spritexoffs = offset; + } + + DECLARE_WRITE16_MEMBER(bg_videoram_w); + DECLARE_WRITE16_MEMBER(mlow_videoram_w); + DECLARE_WRITE16_MEMBER(mhigh_videoram_w); + DECLARE_WRITE16_MEMBER(tx_videoram_w); + DECLARE_WRITE16_MEMBER(sprites_commands_w); + + uint32_t draw(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + +protected: + virtual void device_start() override; + virtual void device_reset() override; + + virtual int get_priority(const uint16_t *source); +private: + + /* video-related */ + tilemap_t *m_bg_tilemap; + tilemap_t *m_mlow_tilemap; + tilemap_t *m_mhigh_tilemap; + tilemap_t *m_tx_tilemap; + + TILE_GET_INFO_MEMBER(get_bg_tile_info); + TILE_GET_INFO_MEMBER(get_mlow_tile_info); + TILE_GET_INFO_MEMBER(get_mhigh_tile_info); + TILE_GET_INFO_MEMBER(get_tx_tile_info); + + void draw_sprites( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect ); + + uint16_t m_sprites_buffer[0x400]; + + required_shared_ptr<uint16_t> m_bg_videoram; + required_shared_ptr<uint16_t> m_mlow_videoram; + required_shared_ptr<uint16_t> m_mhigh_videoram; + required_shared_ptr<uint16_t> m_tx_videoram; + required_shared_ptr<uint16_t> m_bg_scrollram; + required_shared_ptr<uint16_t> m_mlow_scrollram; + required_shared_ptr<uint16_t> m_mhigh_scrollram; + required_shared_ptr<uint16_t> m_vidattrram; + required_shared_ptr<uint16_t> m_spriteram; + required_device<gfxdecode_device> m_gfxdecode; + required_device<palette_device> m_palette; + + /* misc */ + int m_which; + int m_spritexoffs; +}; + +class edevices_sforce_device : public edevices_device +{ +public: + edevices_sforce_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +protected: + virtual int get_priority(const uint16_t *source) override; +}; + + +DECLARE_DEVICE_TYPE(EDEVICES_VID, edevices_device) +DECLARE_DEVICE_TYPE(EDEVICES_SFORCE_VID, edevices_sforce_device) + +#endif // MAME_VIDEO_EDEVICES_H diff --git a/src/mame/video/flkatck.cpp b/src/mame/video/flkatck.cpp index 764bb40aa66..e90c49c9982 100644 --- a/src/mame/video/flkatck.cpp +++ b/src/mame/video/flkatck.cpp @@ -23,8 +23,8 @@ TILE_GET_INFO_MEMBER(flkatck_state::get_tile_info_A) uint8_t ctrl_3 = m_k007121->ctrlram_r(3); uint8_t ctrl_4 = m_k007121->ctrlram_r(4); uint8_t ctrl_5 = m_k007121->ctrlram_r(5); - int attr = m_k007121_ram[tile_index]; - int code = m_k007121_ram[tile_index + 0x400]; + int attr = m_vram[tile_index]; + int code = m_vram[tile_index + 0x400]; int bit0 = (ctrl_5 >> 0) & 0x03; int bit1 = (ctrl_5 >> 2) & 0x03; int bit2 = (ctrl_5 >> 4) & 0x03; @@ -51,8 +51,8 @@ TILE_GET_INFO_MEMBER(flkatck_state::get_tile_info_A) TILE_GET_INFO_MEMBER(flkatck_state::get_tile_info_B) { - int attr = m_k007121_ram[tile_index + 0x800]; - int code = m_k007121_ram[tile_index + 0xc00]; + int attr = m_vram[tile_index + 0x800]; + int code = m_vram[tile_index + 0xc00]; SET_TILE_INFO_MEMBER(0, code, @@ -80,16 +80,13 @@ void flkatck_state::video_start() ***************************************************************************/ -WRITE8_MEMBER(flkatck_state::flkatck_k007121_w) +WRITE8_MEMBER(flkatck_state::vram_w) { - m_k007121_ram[offset] = data; - if (offset < 0x1000) /* tiles */ - { - if (offset & 0x800) /* score */ - m_k007121_tilemap[1]->mark_tile_dirty(offset & 0x3ff); - else - m_k007121_tilemap[0]->mark_tile_dirty(offset & 0x3ff); - } + m_vram[offset] = data; + if (offset & 0x800) /* score */ + m_k007121_tilemap[1]->mark_tile_dirty(offset & 0x3ff); + else + m_k007121_tilemap[0]->mark_tile_dirty(offset & 0x3ff); } WRITE8_MEMBER(flkatck_state::flkatck_k007121_regs_w) @@ -118,18 +115,13 @@ WRITE8_MEMBER(flkatck_state::flkatck_k007121_regs_w) ***************************************************************************/ -/*************************************************************************** - - Flack Attack sprites. Each sprite has 16 bytes!: - - -***************************************************************************/ - uint32_t flkatck_state::screen_update_flkatck(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { rectangle clip[2]; const rectangle &visarea = screen.visible_area(); - + // TODO: reversed polarity? Hard to say, fwiw Combat School uses this in reverse ... + uint16_t sprite_buffer = (m_k007121->ctrlram_r(3) & 8) * 0x100; + if (m_flipscreen) { clip[0] = visarea; @@ -162,7 +154,7 @@ uint32_t flkatck_state::screen_update_flkatck(screen_device &screen, bitmap_ind1 /* draw the graphics */ m_k007121_tilemap[0]->draw(screen, bitmap, clip[0], 0, 0); - m_k007121->sprites_draw(bitmap, cliprect, m_gfxdecode->gfx(0), m_gfxdecode->palette(), &m_k007121_ram[0x1000], 0, 40, 0, screen.priority(), (uint32_t)-1, true); + m_k007121->sprites_draw(bitmap, cliprect, m_gfxdecode->gfx(0), m_gfxdecode->palette(), &m_spriteram[sprite_buffer], 0, 40, 0, screen.priority(), (uint32_t)-1, true); m_k007121_tilemap[1]->draw(screen, bitmap, clip[1], 0, 0); return 0; } diff --git a/src/mame/video/gaiden.cpp b/src/mame/video/gaiden.cpp index d66dc509bf2..a0f74e8954e 100644 --- a/src/mame/video/gaiden.cpp +++ b/src/mame/video/gaiden.cpp @@ -74,6 +74,7 @@ VIDEO_START_MEMBER(gaiden_state,gaiden) /* set up tile layers */ m_screen->register_screen_bitmap(m_tile_bitmap_bg); m_screen->register_screen_bitmap(m_tile_bitmap_fg); + m_screen->register_screen_bitmap(m_tile_bitmap_tx); m_background = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(gaiden_state::get_bg_tile_info),this), TILEMAP_SCAN_ROWS, 16, 16, 64, 32); m_foreground = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(gaiden_state::get_fg_tile_info_raiga),this), TILEMAP_SCAN_ROWS, 16, 16, 64, 32); @@ -97,6 +98,7 @@ VIDEO_START_MEMBER(gaiden_state,raiga) /* set up tile layers */ m_screen->register_screen_bitmap(m_tile_bitmap_bg); m_screen->register_screen_bitmap(m_tile_bitmap_fg); + m_screen->register_screen_bitmap(m_tile_bitmap_tx); m_background = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(gaiden_state::get_bg_tile_info),this), TILEMAP_SCAN_ROWS, 16, 16, 64, 32); m_foreground = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(gaiden_state::get_fg_tile_info_raiga),this), TILEMAP_SCAN_ROWS, 16, 16, 64, 32); @@ -108,6 +110,7 @@ VIDEO_START_MEMBER(gaiden_state,raiga) /* set up sprites */ m_screen->register_screen_bitmap(m_sprite_bitmap); + } VIDEO_START_MEMBER(gaiden_state,drgnbowl) @@ -253,7 +256,7 @@ WRITE16_MEMBER(gaiden_state::tx_videoram_w) void gaiden_state::drgnbowl_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - uint16_t *spriteram = m_spriteram; + uint16_t const *const spriteram = m_spriteram->live(); // not buffered? int i, code, color, x, y, flipx, flipy, priority_mask; for( i = 0; i < 0x800/2; i += 4 ) @@ -295,18 +298,37 @@ uint32_t gaiden_state::screen_update_gaiden(screen_device &screen, bitmap_rgb32 { m_tile_bitmap_bg.fill(0, cliprect); m_tile_bitmap_fg.fill(0, cliprect); + m_tile_bitmap_tx.fill(0, cliprect); m_sprite_bitmap.fill(0, cliprect); bitmap.fill(0, cliprect); - m_sprgen->gaiden_draw_sprites(screen, m_gfxdecode, cliprect, m_spriteram, m_sprite_sizey, flip_screen() ? -m_spr_offset_y : m_spr_offset_y, flip_screen(), m_sprite_bitmap); + // non buffered? + m_sprgen->gaiden_draw_sprites(screen, m_gfxdecode, cliprect, m_spriteram->live(), m_sprite_sizey, flip_screen() ? -m_spr_offset_y : m_spr_offset_y, flip_screen(), m_sprite_bitmap); m_background->draw(screen, m_tile_bitmap_bg, cliprect, 0, 0); m_foreground->draw(screen, m_tile_bitmap_fg, cliprect, 0, 0); + m_text_layer->draw(screen, m_tile_bitmap_tx, cliprect, 0, 0); - m_mixer->mix_bitmaps(screen, bitmap, cliprect, *m_palette, &m_tile_bitmap_bg, &m_tile_bitmap_fg, (bitmap_ind16*)nullptr, &m_sprite_bitmap); + m_mixer->mix_bitmaps(screen, bitmap, cliprect, *m_palette, &m_tile_bitmap_bg, &m_tile_bitmap_fg, &m_tile_bitmap_tx, &m_sprite_bitmap); - // todo, this should go through the mixer! - m_text_layer->draw(screen, bitmap, cliprect, 0, 0); + return 0; +} +uint32_t gaiden_state::screen_update_raiga(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + m_tile_bitmap_bg.fill(0, cliprect); + m_tile_bitmap_fg.fill(0, cliprect); + m_tile_bitmap_tx.fill(0, cliprect); + bitmap.fill(0, cliprect); + + m_background->draw(screen, m_tile_bitmap_bg, cliprect, 0, 0); + m_foreground->draw(screen, m_tile_bitmap_fg, cliprect, 0, 0); + m_text_layer->draw(screen, m_tile_bitmap_tx, cliprect, 0, 0); + + m_mixer->mix_bitmaps(screen, bitmap, cliprect, *m_palette, &m_tile_bitmap_bg, &m_tile_bitmap_fg, &m_tile_bitmap_tx, &m_sprite_bitmap); + + // raiga sprite has 2 frame lags + m_sprite_bitmap.fill(0, cliprect); + m_sprgen->gaiden_draw_sprites(screen, m_gfxdecode, cliprect, m_spriteram->buffer(), m_sprite_sizey, flip_screen() ? -m_spr_offset_y : m_spr_offset_y, flip_screen(), m_sprite_bitmap); return 0; } diff --git a/src/mame/video/galaxian.cpp b/src/mame/video/galaxian.cpp index 14337af90e3..95b85463c09 100644 --- a/src/mame/video/galaxian.cpp +++ b/src/mame/video/galaxian.cpp @@ -1064,7 +1064,7 @@ void galaxian_state::sfx_draw_background(bitmap_rgb32 &bitmap, const rectangle & { /* current schematics are unreadable, assuming like Turtles */ bitmap.fill(rgb_t(m_background_red * 0x55, m_background_green * 0x47, m_background_blue * 0x55), cliprect); - scramble_draw_stars(bitmap, cliprect, 256); + scramble_draw_stars(bitmap, cliprect, 256); } diff --git a/src/mame/video/gamecom.cpp b/src/mame/video/gamecom.cpp index f8f2967588d..ea987a07adc 100644 --- a/src/mame/video/gamecom.cpp +++ b/src/mame/video/gamecom.cpp @@ -11,7 +11,7 @@ TIMER_CALLBACK_MEMBER(gamecom_state::gamecom_scanline) - { +{ // draw line m_base_address = ( m_p_ram[SM8521_LCDC] & 0x40 ) ? 0x2000 : 0x0000; diff --git a/src/mame/video/gime.cpp b/src/mame/video/gime.cpp index 71086db95c7..db8265c0b89 100644 --- a/src/mame/video/gime.cpp +++ b/src/mame/video/gime.cpp @@ -86,6 +86,7 @@ + //************************************************************************** // CONSTANTS //************************************************************************** @@ -97,6 +98,7 @@ #define LOG_INT_MASKING 0 #define LOG_GIME 0 #define LOG_TIMER 0 +#define LOG_PALETTE 0 @@ -552,12 +554,15 @@ void gime_device::update_memory(int bank) // we're in ROM static const uint8_t rom_map[4][4] = { - { 0, 1, 6, 7 }, - { 0, 1, 6, 7 }, + { 0, 1, 4, 5 }, + { 0, 1, 4, 5 }, { 0, 1, 2, 3 }, - { 4, 5, 6, 7 } + { 6, 7, 4, 5 } }; + // Pin ROM page to MMU slot + block = (block & 0xfc) | (bank & 0x03); + // look up the block in the ROM map block = rom_map[m_gime_registers[0] & 3][(block & 0x3F) - 0x3C]; @@ -1005,6 +1010,10 @@ inline void gime_device::write_palette_register(offs_t offset, uint8_t data) { offset &= 0x0F; + // perform logging + if (LOG_PALETTE) + logerror("%s: CoCo3 Palette: $%04x <== $%02x\n", describe_context(), offset + 0xffB0, data); + /* has this entry changed? */ if (m_palette_rotated[m_palette_rotated_position][offset] != data) { diff --git a/src/mame/video/glass.cpp b/src/mame/video/glass.cpp index 87913b717a6..9006aa42ca8 100644 --- a/src/mame/video/glass.cpp +++ b/src/mame/video/glass.cpp @@ -33,20 +33,11 @@ 1 | xxxxxxxx -------- | not used */ -TILE_GET_INFO_MEMBER(glass_state::get_tile_info_screen0) +template<int Layer> +TILE_GET_INFO_MEMBER(glass_state::get_tile_info) { - int data = m_videoram[tile_index << 1]; - int data2 = m_videoram[(tile_index << 1) + 1]; - int code = ((data & 0x03) << 14) | ((data & 0x0fffc) >> 2); - - SET_TILE_INFO_MEMBER(0, code, 0x20 + (data2 & 0x1f), TILE_FLIPYX((data2 & 0xc0) >> 6)); -} - - -TILE_GET_INFO_MEMBER(glass_state::get_tile_info_screen1) -{ - int data = m_videoram[(0x1000 / 2) + (tile_index << 1)]; - int data2 = m_videoram[(0x1000 / 2) + (tile_index << 1) + 1]; + int data = m_videoram[(Layer * 0x1000 / 2) + (tile_index << 1)]; + int data2 = m_videoram[(Layer * 0x1000 / 2) + (tile_index << 1) + 1]; int code = ((data & 0x03) << 14) | ((data & 0x0fffc) >> 2); SET_TILE_INFO_MEMBER(0, code, 0x20 + (data2 & 0x1f), TILE_FLIPYX((data2 & 0xc0) >> 6)); @@ -69,26 +60,20 @@ TILE_GET_INFO_MEMBER(glass_state::get_tile_info_screen1) WRITE16_MEMBER(glass_state::blitter_w) { - m_blitter_serial_buffer[m_current_bit] = data & 0x01; + m_blitter_command = ((m_blitter_command << 1) | (data & 0x01)) & 0x1f; m_current_bit++; if (m_current_bit == 5) { - m_current_command = (m_blitter_serial_buffer[0] << 4) | - (m_blitter_serial_buffer[1] << 3) | - (m_blitter_serial_buffer[2] << 2) | - (m_blitter_serial_buffer[3] << 1) | - (m_blitter_serial_buffer[4] << 0); m_current_bit = 0; /* fill the screen bitmap with the current picture */ { int i, j; - uint8_t *gfx = (uint8_t *)memregion("gfx3")->base(); - gfx = gfx + (m_current_command & 0x07) * 0x10000 + (m_current_command & 0x08) * 0x10000 + 0x140; + uint8_t *gfx = m_bmap + (m_blitter_command & 0x07) * 0x10000 + (m_blitter_command & 0x08) * 0x10000 + 0x140; - if ((m_current_command & 0x18) != 0) + if ((m_blitter_command & 0x18) != 0) { for (j = 0; j < 200; j++) { @@ -127,8 +112,8 @@ WRITE16_MEMBER(glass_state::vram_w) void glass_state::video_start() { - m_pant[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(glass_state::get_tile_info_screen0),this), TILEMAP_SCAN_ROWS, 16, 16, 32, 32); - m_pant[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(glass_state::get_tile_info_screen1),this), TILEMAP_SCAN_ROWS, 16, 16, 32, 32); + m_pant[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(glass_state::get_tile_info<0>),this), TILEMAP_SCAN_ROWS, 16, 16, 32, 32); + m_pant[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(glass_state::get_tile_info<1>),this), TILEMAP_SCAN_ROWS, 16, 16, 32, 32); m_screen_bitmap = std::make_unique<bitmap_ind16>(320, 200); save_item(NAME(*m_screen_bitmap)); diff --git a/src/mame/video/igs017_igs031.cpp b/src/mame/video/igs017_igs031.cpp index 4c918a07727..dbb960807b2 100644 --- a/src/mame/video/igs017_igs031.cpp +++ b/src/mame/video/igs017_igs031.cpp @@ -35,7 +35,7 @@ void igs017_igs031_device::map(address_map &map) READ8_MEMBER(igs017_igs031_device::i8255_r) { if (m_i8255) - return m_i8255->read(space, offset); + return m_i8255->read(offset); logerror("igs017_igs031_device::i8255_r(%02x) with no 8255 device\n", offset); return 0; diff --git a/src/mame/video/itech8.cpp b/src/mame/video/itech8.cpp index 90d27ccbc54..6218c6c8e5e 100644 --- a/src/mame/video/itech8.cpp +++ b/src/mame/video/itech8.cpp @@ -146,10 +146,6 @@ void itech8_state::video_start() /* reset statics */ m_page_select = 0xc0; - /* fetch the GROM base */ - m_grom_base = memregion("grom")->base(); - m_grom_size = memregion("grom")->bytes(); - save_item(NAME(m_blitter_data)); save_item(NAME(m_blit_in_progress)); save_item(NAME(m_page_select)); @@ -180,7 +176,7 @@ WRITE8_MEMBER(itech8_state::palette_w) * *************************************/ -WRITE8_MEMBER(itech8_state::page_w) +void itech8_state::page_w(u8 data) { m_screen->update_partial(m_screen->vpos()); logerror("%04x:display_page = %02X (%d)\n", m_maincpu->pc(), data, m_screen->vpos()); @@ -198,7 +194,7 @@ WRITE8_MEMBER(itech8_state::page_w) inline uint8_t itech8_state::fetch_next_raw() { - return m_grom_base[m_fetch_offset++ % m_grom_size]; + return m_grom[m_fetch_offset++ % m_grom.length()]; } @@ -212,17 +208,17 @@ inline uint8_t itech8_state::fetch_next_rle() { if (m_fetch_rle_count == 0) { - m_fetch_rle_count = m_grom_base[m_fetch_offset++ % m_grom_size]; + m_fetch_rle_count = m_grom[m_fetch_offset++ % m_grom.length()]; m_fetch_rle_literal = m_fetch_rle_count & 0x80; m_fetch_rle_count &= 0x7f; if (!m_fetch_rle_literal) - m_fetch_rle_value = m_grom_base[m_fetch_offset++ % m_grom_size]; + m_fetch_rle_value = m_grom[m_fetch_offset++ % m_grom.length()]; } m_fetch_rle_count--; if (m_fetch_rle_literal) - m_fetch_rle_value = m_grom_base[m_fetch_offset++ % m_grom_size]; + m_fetch_rle_value = m_grom[m_fetch_offset++ % m_grom.length()]; return m_fetch_rle_value; } @@ -236,12 +232,12 @@ inline void itech8_state::consume_rle(int count) if (m_fetch_rle_count == 0) { - m_fetch_rle_count = m_grom_base[m_fetch_offset++ % m_grom_size]; + m_fetch_rle_count = m_grom[m_fetch_offset++ % m_grom.length()]; m_fetch_rle_literal = m_fetch_rle_count & 0x80; m_fetch_rle_count &= 0x7f; if (!m_fetch_rle_literal) - m_fetch_rle_value = m_grom_base[m_fetch_offset++ % m_grom_size]; + m_fetch_rle_value = m_grom[m_fetch_offset++ % m_grom.length()]; } num_to_consume = (count < m_fetch_rle_count) ? count : m_fetch_rle_count; diff --git a/src/mame/video/k007121.cpp b/src/mame/video/k007121.cpp index e5bae691d41..7714f54d60f 100644 --- a/src/mame/video/k007121.cpp +++ b/src/mame/video/k007121.cpp @@ -46,6 +46,7 @@ control registers 000: scroll x (low 8 bits) 001: -------x scroll x (high bit) ------x- enable rowscroll? (combatsc) + -----x-- unknown (flak attack) ----x--- this probably selects an alternate screen layout used in combat school where tilemap #2 is overlayed on front and doesn't scroll. The 32 lines of the front layer can be individually turned on or @@ -206,17 +207,6 @@ WRITE8_MEMBER( k007121_device::ctrl_w ) * 4 | ----xxx- | sprite size 000=16x16 001=16x8 010=8x16 011=8x8 100=32x32 * 4 | -------x | x position (high bit) * - * Flack Attack uses a different, "wider" layout with 32 bytes per sprite, - * mapped as follows, and the priority order is reversed. Maybe it is a - * compatibility mode with an older custom IC. It is not known how this - * alternate layout is selected. - * - * 0 -> e - * 1 -> f - * 2 -> 6 - * 3 -> 4 - * 4 -> 8 - * */ void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &cliprect, gfx_element *gfx, device_palette_interface &palette, @@ -224,55 +214,37 @@ void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &clipre { // gfx_element *gfx = gfxs[chip]; int flipscreen = m_flipscreen; - int i, num, inc, offs[5]; + int i, num, inc; - if (is_flakatck) - { - num = 0x40; - inc = -0x20; - source += 0x3f * 0x20; - offs[0] = 0x0e; - offs[1] = 0x0f; - offs[2] = 0x06; - offs[3] = 0x04; - offs[4] = 0x08; - } - else /* all others */ + + // TODO: sprite limit is supposed to be per-line! (check MT #00185) + num = 0x40; + //num = (k007121->ctrlram[0x03] & 0x40) ? 0x80 : 0x40; /* WRONG!!! (needed by combatsc) */ + + inc = 5; + /* when using priority buffer, draw front to back */ + if (pri_mask != -1) { - /* TODO: sprite limit is supposed to be per-line! (check MT #00185) */ - num = 0x40; - //num = (k007121->ctrlram[0x03] & 0x40) ? 0x80 : 0x40; /* WRONG!!! (needed by combatsc) */ - - inc = 5; - offs[0] = 0x00; - offs[1] = 0x01; - offs[2] = 0x02; - offs[3] = 0x03; - offs[4] = 0x04; - /* when using priority buffer, draw front to back */ - if (pri_mask != -1) - { - source += (num - 1)*inc; - inc = -inc; - } + source += (num - 1)*inc; + inc = -inc; } for (i = 0; i < num; i++) { - int number = source[offs[0]]; /* sprite number */ - int sprite_bank = source[offs[1]] & 0x0f; /* sprite bank */ - int sx = source[offs[3]]; /* vertical position */ - int sy = source[offs[2]]; /* horizontal position */ - int attr = source[offs[4]]; /* attributes */ - int xflip = source[offs[4]] & 0x10; /* flip x */ - int yflip = source[offs[4]] & 0x20; /* flip y */ - int color = base_color + ((source[offs[1]] & 0xf0) >> 4); + int number = source[0]; /* sprite number */ + int sprite_bank = source[1] & 0x0f; /* sprite bank */ + int sx = source[3]; /* vertical position */ + int sy = source[2]; /* horizontal position */ + int attr = source[4]; /* attributes */ + int xflip = source[4] & 0x10; /* flip x */ + int yflip = source[4] & 0x20; /* flip y */ + int color = base_color + ((source[1] & 0xf0) >> 4); int width, height; int transparent_mask; static const int x_offset[4] = {0x0,0x1,0x4,0x5}; static const int y_offset[4] = {0x0,0x2,0x8,0xa}; int x,y, ex, ey, flipx, flipy, destx, desty; - + if (attr & 0x01) sx -= 256; if (sy >= 240) sy -= 256; @@ -282,68 +254,66 @@ void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &clipre /* Flak Attack doesn't use a lookup PROM, it maps the color code directly */ /* to a palette entry */ + // TODO: check if it's true or callback-ize this one and remove the per-game hack. if (is_flakatck) transparent_mask = 1 << 0; else transparent_mask = palette.transpen_mask(*gfx, color, 0); - if (!is_flakatck || source[0x00]) /* Flak Attack needs this */ - { - number += bank_base; + number += bank_base; - switch (attr & 0xe) - { - case 0x06: width = height = 1; break; - case 0x04: width = 1; height = 2; number &= (~2); break; - case 0x02: width = 2; height = 1; number &= (~1); break; - case 0x00: width = height = 2; number &= (~3); break; - case 0x08: width = height = 4; number &= (~3); break; - default: width = 1; height = 1; + switch (attr & 0xe) + { + case 0x06: width = height = 1; break; + case 0x04: width = 1; height = 2; number &= (~2); break; + case 0x02: width = 2; height = 1; number &= (~1); break; + case 0x00: width = height = 2; number &= (~3); break; + case 0x08: width = height = 4; number &= (~3); break; + default: width = 1; height = 1; // logerror("Unknown sprite size %02x\n", attr & 0xe); // popmessage("Unknown sprite size %02x\n", attr & 0xe); - } + } - for (y = 0; y < height; y++) + for (y = 0; y < height; y++) + { + for (x = 0; x < width; x++) { - for (x = 0; x < width; x++) + ex = xflip ? (width - 1 - x) : x; + ey = yflip ? (height - 1 - y) : y; + + if (flipscreen) + { + flipx = !xflip; + flipy = !yflip; + destx = 248 - (sx + x * 8); + desty = 248 - (sy + y * 8); + } + else { - ex = xflip ? (width - 1 - x) : x; - ey = yflip ? (height - 1 - y) : y; - - if (flipscreen) - { - flipx = !xflip; - flipy = !yflip; - destx = 248 - (sx + x * 8); - desty = 248 - (sy + y * 8); - } - else - { - flipx = xflip; - flipy = yflip; - destx = global_x_offset + sx + x * 8; - desty = sy + y * 8; - } - - if (pri_mask != -1) - gfx->prio_transmask(bitmap,cliprect, - number + x_offset[ex] + y_offset[ey], - color, - flipx,flipy, - destx,desty, - priority_bitmap,pri_mask, - transparent_mask); - else - gfx->transmask(bitmap,cliprect, - number + x_offset[ex] + y_offset[ey], - color, - flipx,flipy, - destx,desty, - transparent_mask); + flipx = xflip; + flipy = yflip; + destx = global_x_offset + sx + x * 8; + desty = sy + y * 8; } + + if (pri_mask != -1) + gfx->prio_transmask(bitmap,cliprect, + number + x_offset[ex] + y_offset[ey], + color, + flipx,flipy, + destx,desty, + priority_bitmap,pri_mask, + transparent_mask); + else + gfx->transmask(bitmap,cliprect, + number + x_offset[ex] + y_offset[ey], + color, + flipx,flipy, + destx,desty, + transparent_mask); } } - + source += inc; } } diff --git a/src/mame/video/k052109.cpp b/src/mame/video/k052109.cpp index 0d4d4dee964..5c403e02031 100644 --- a/src/mame/video/k052109.cpp +++ b/src/mame/video/k052109.cpp @@ -252,7 +252,6 @@ void k052109_device::device_start() save_item(NAME(m_charrombank)); save_item(NAME(m_charrombank_2)); save_item(NAME(m_has_extra_video_ram)); - machine().save().register_postload(save_prepost_delegate(FUNC(k052109_device::tileflip_reset), this)); } //------------------------------------------------- @@ -275,6 +274,15 @@ void k052109_device::device_reset() } } +//------------------------------------------------- +// device_post_load - device-specific postload +//------------------------------------------------- + +void k052109_device::device_post_load() +{ + tileflip_reset(); +} + /***************************************************************************** DEVICE HANDLERS *****************************************************************************/ diff --git a/src/mame/video/k052109.h b/src/mame/video/k052109.h index 69ee5108dc2..eb2b9240159 100644 --- a/src/mame/video/k052109.h +++ b/src/mame/video/k052109.h @@ -76,6 +76,7 @@ protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_post_load() override; private: // internal state diff --git a/src/mame/video/k053250_ps.cpp b/src/mame/video/k053250_ps.cpp index 3c4fce4022d..871a0e14522 100644 --- a/src/mame/video/k053250_ps.cpp +++ b/src/mame/video/k053250_ps.cpp @@ -556,7 +556,7 @@ READ_LINE_MEMBER(k053250ps_device::dmairq_r) WRITE16_MEMBER(k053250ps_device::reg_w) { #if 0 - static const char * regnames[] = + static char const *const regnames[] = { "SCROLL_X_L", "SCROLL_X_H", diff --git a/src/mame/video/k053251.cpp b/src/mame/video/k053251.cpp index 2b37c44a5aa..d337d7d259c 100644 --- a/src/mame/video/k053251.cpp +++ b/src/mame/video/k053251.cpp @@ -145,8 +145,6 @@ void k053251_device::device_start() save_item(NAME(m_ram)); save_item(NAME(m_tilemaps_set)); save_item(NAME(m_dirty_tmap)); - - machine().save().register_postload(save_prepost_delegate(FUNC(k053251_device::reset_indexes), this)); } //------------------------------------------------- @@ -168,6 +166,15 @@ void k053251_device::device_reset() reset_indexes(); } +//------------------------------------------------- +// device_post_load - device-specific postload +//------------------------------------------------- + +void k053251_device::device_post_load() +{ + reset_indexes(); +} + /***************************************************************************** DEVICE HANDLERS *****************************************************************************/ diff --git a/src/mame/video/k053251.h b/src/mame/video/k053251.h index 9243ffb1e87..43c879e2698 100644 --- a/src/mame/video/k053251.h +++ b/src/mame/video/k053251.h @@ -38,6 +38,7 @@ protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_post_load() override; private: // internal state diff --git a/src/mame/video/k054156_k054157_k056832.cpp b/src/mame/video/k054156_k054157_k056832.cpp index 723fd0ae654..32d39132ab7 100644 --- a/src/mame/video/k054156_k054157_k056832.cpp +++ b/src/mame/video/k054156_k054157_k056832.cpp @@ -327,9 +327,6 @@ void k056832_device::finalize_init() save_item(NAME(m_use_ext_linescroll)); save_item(NAME(m_uses_tile_banks)); save_item(NAME(m_cur_tile_bank)); - - - machine().save().register_postload(save_prepost_delegate(FUNC(k056832_device::postload), this)); } @@ -1942,7 +1939,7 @@ int k056832_device::read_register( int regnum ) return(m_regs[regnum]); } -void k056832_device::postload() +void k056832_device::device_post_load() { update_page_layout(); change_rambank(); diff --git a/src/mame/video/k054156_k054157_k056832.h b/src/mame/video/k054156_k054157_k056832.h index 8f121a9c5e9..04bf18d0944 100644 --- a/src/mame/video/k054156_k054157_k056832.h +++ b/src/mame/video/k054156_k054157_k056832.h @@ -118,6 +118,7 @@ public: protected: // device-level overrides virtual void device_start() override; + virtual void device_post_load() override; private: // internal state @@ -195,7 +196,6 @@ private: void update_page_layout(); void change_rambank(); void change_rombank(); - void postload(); int rom_read_b(int offset, int blksize, int blksize2, int zerosec); template<class _BitmapClass> diff --git a/src/mame/video/m52.cpp b/src/mame/video/m52.cpp index cedc7db65e6..1bb2852d418 100644 --- a/src/mame/video/m52.cpp +++ b/src/mame/video/m52.cpp @@ -182,7 +182,7 @@ WRITE8_MEMBER(m52_state::m52_scroll_w) m_bg_tilemap->set_scrollx(0, 255); m_bg_tilemap->set_scrollx(1, 255); m_bg_tilemap->set_scrollx(2, 255); - m_bg_tilemap->set_scrollx(3, -data); + m_bg_tilemap->set_scrollx(3, -(data + 1)); } @@ -298,17 +298,17 @@ void m52_state::draw_background(bitmap_ind16 &bitmap, const rectangle &cliprect, if (flip_screen()) { - xpos = 127 - xpos; - ypos = 255 - ypos - BGHEIGHT; + xpos = 264 - xpos; + ypos = 264 - ypos - BGHEIGHT; } - xpos += 128; + xpos += 124; /* this may not be correct */ - ypos = ypos + (22 - 8); + ypos += 16; - m_gfxdecode->gfx(image)->transpen(bitmap,cliprect, + m_gfxdecode->gfx(image)->transpen(bitmap,cliprect, 0, 0, flip_screen(), flip_screen(), @@ -316,7 +316,7 @@ void m52_state::draw_background(bitmap_ind16 &bitmap, const rectangle &cliprect, ypos, 0); - m_gfxdecode->gfx(image)->transpen(bitmap,cliprect, + m_gfxdecode->gfx(image)->transpen(bitmap,cliprect, 0, 0, flip_screen(), flip_screen(), @@ -344,34 +344,16 @@ void m52_state::draw_background(bitmap_ind16 &bitmap, const rectangle &cliprect, /************************************* * - * Video render + * Sprites rendering * *************************************/ -uint32_t m52_state::screen_update_m52(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +void m52_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int initoffs) { int offs; - bitmap.fill(0, cliprect); - - if (!(m_bgcontrol & 0x20)) - { - if (!(m_bgcontrol & 0x10)) - draw_background(bitmap, cliprect, m_bg2xpos, m_bg2ypos, 2); /* distant mountains */ - - if (!(m_bgcontrol & 0x02)) - draw_background(bitmap, cliprect, m_bg1xpos, m_bg1ypos, 3); /* hills */ - - if (!(m_bgcontrol & 0x04)) - draw_background(bitmap, cliprect, m_bg1xpos, m_bg1ypos, 4); /* cityscape */ - } - - m_bg_tilemap->set_flip(flip_screen() ? TILEMAP_FLIPX | TILEMAP_FLIPY : 0); - - m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0); - /* draw the sprites */ - for (offs = 0xfc; offs >= 0; offs -= 4) + for (offs = initoffs; offs >= (initoffs & 0xc0); offs -= 4) { int sy = 257 - m_spriteram[offs]; int color = m_spriteram[offs + 1] & 0x3f; @@ -397,11 +379,11 @@ uint32_t m52_state::screen_update_m52(screen_device &screen, bitmap_ind16 &bitma clip.max_y = 255 - temp; flipx = !flipx; flipy = !flipy; - sx = 112 - sx; - sy = 257 + 11 - sy; + sx = 238 - sx; + sy = 282 - sy; } - sx += 128; + sx += 129; /* in theory anyways; in practice, some of the molecule-looking guys get clipped */ #ifdef SPLIT_SPRITES @@ -414,5 +396,41 @@ uint32_t m52_state::screen_update_m52(screen_device &screen, bitmap_ind16 &bitma code, color, flipx, flipy, sx, sy, m_palette->transpen_mask(*m_gfxdecode->gfx(1), color, 512 + 32)); } +} + + + +/************************************* + * + * Video render + * + *************************************/ + +uint32_t m52_state::screen_update_m52(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int offs; + + bitmap.fill(0, cliprect); + + if (!(m_bgcontrol & 0x20)) + { + if (!(m_bgcontrol & 0x10)) + draw_background(bitmap, cliprect, m_bg2xpos, m_bg2ypos, 2); /* distant mountains */ + + if (!(m_bgcontrol & 0x02)) + draw_background(bitmap, cliprect, m_bg1xpos, m_bg1ypos, 3); /* hills */ + + if (!(m_bgcontrol & 0x04)) + draw_background(bitmap, cliprect, m_bg1xpos, m_bg1ypos, 4); /* cityscape */ + } + + m_bg_tilemap->set_flip(flip_screen() ? TILEMAP_FLIPX | TILEMAP_FLIPY : 0); + + m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0); + + /* draw the sprites */ + for (offs = 0x3c; offs <= 0xfc; offs += 0x40) + draw_sprites(bitmap, cliprect, offs); + return 0; } diff --git a/src/mame/video/model1.cpp b/src/mame/video/model1.cpp index 2426dcbd3ae..9cf4db2c057 100644 --- a/src/mame/video/model1.cpp +++ b/src/mame/video/model1.cpp @@ -1562,7 +1562,7 @@ void model1_state::tgp_scan() m_render_done = 0; } -VIDEO_START_MEMBER(model1_state, model1) +void model1_state::video_start() { m_view = std::make_unique<model1_state::view_t>(); diff --git a/src/mame/video/n64.cpp b/src/mame/video/n64.cpp index 453592ac63e..2a1ba864bff 100644 --- a/src/mame/video/n64.cpp +++ b/src/mame/video/n64.cpp @@ -600,7 +600,7 @@ void n64_rdp::set_blender_input(int32_t cycle, int32_t which, color_t** input_rg } } -const uint8_t n64_rdp::s_bayer_matrix[16] = +uint8_t const n64_rdp::s_bayer_matrix[16] = { /* Bayer matrix */ 0, 4, 1, 5, 6, 2, 7, 3, @@ -608,7 +608,7 @@ const uint8_t n64_rdp::s_bayer_matrix[16] = 7, 3, 6, 2 }; -const uint8_t n64_rdp::s_magic_matrix[16] = +uint8_t const n64_rdp::s_magic_matrix[16] = { /* Magic square matrix */ 0, 6, 1, 7, 4, 2, 5, 3, @@ -616,7 +616,7 @@ const uint8_t n64_rdp::s_magic_matrix[16] = 7, 1, 6, 0 }; -const z_decompress_entry_t n64_rdp::m_z_dec_table[8] = +z_decompress_entry_t const n64_rdp::m_z_dec_table[8] = { { 6, 0x00000 }, { 5, 0x20000 }, @@ -1109,10 +1109,10 @@ uint64_t n64_rdp::read_data(uint32_t address) } } -const char* n64_rdp::s_image_format[] = { "RGBA", "YUV", "CI", "IA", "I", "???", "???", "???" }; -const char* n64_rdp::s_image_size[] = { "4-bit", "8-bit", "16-bit", "32-bit" }; +char const *const n64_rdp::s_image_format[] = { "RGBA", "YUV", "CI", "IA", "I", "???", "???", "???" }; +char const *const n64_rdp::s_image_size[] = { "4-bit", "8-bit", "16-bit", "32-bit" }; -const int32_t n64_rdp::s_rdp_command_length[64] = +int32_t const n64_rdp::s_rdp_command_length[64] = { 8, // 0x00, No Op 8, // 0x01, ??? diff --git a/src/mame/video/n64.h b/src/mame/video/n64.h index 2310ec8eb6d..d8ab0fa9eb7 100644 --- a/src/mame/video/n64.h +++ b/src/mame/video/n64.h @@ -374,14 +374,14 @@ private: pin64_t m_capture; static uint32_t s_special_9bit_clamptable[512]; - static const z_decompress_entry_t m_z_dec_table[8]; - - static const uint8_t s_bayer_matrix[16]; - static const uint8_t s_magic_matrix[16]; - static const rdp_command_t m_commands[0x40]; - static const int32_t s_rdp_command_length[]; - static const char* s_image_format[]; - static const char* s_image_size[]; + static z_decompress_entry_t const m_z_dec_table[8]; + + static uint8_t const s_bayer_matrix[16]; + static uint8_t const s_magic_matrix[16]; + static rdp_command_t const m_commands[0x40]; + static int32_t const s_rdp_command_length[]; + static char const *const s_image_format[]; + static char const *const s_image_size[]; public: bool ignore; diff --git a/src/mame/video/namco_c116.cpp b/src/mame/video/namco_c116.cpp index 2f519eba05d..91791cc027f 100644 --- a/src/mame/video/namco_c116.cpp +++ b/src/mame/video/namco_c116.cpp @@ -68,6 +68,8 @@ i960 CPU, needs to write its clip and raster values byteswapped. #include "emu.h" #include "video/namco_c116.h" +#include <algorithm> + DEFINE_DEVICE_TYPE(NAMCO_C116, namco_c116_device, "namco_c116", "Namco C116 Video Controller") //------------------------------------------------- @@ -75,9 +77,10 @@ DEFINE_DEVICE_TYPE(NAMCO_C116, namco_c116_device, "namco_c116", "Namco C116 Vide //------------------------------------------------- namco_c116_device::namco_c116_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, NAMCO_C116, tag, owner, clock), - device_gfx_interface(mconfig, *this), - device_video_interface(mconfig, *this) + : device_t(mconfig, NAMCO_C116, tag, owner, clock) + , device_palette_interface(mconfig, *this) + , device_video_interface(mconfig, *this) + , m_enable_shadows(false) { } @@ -91,7 +94,7 @@ void namco_c116_device::device_start() m_ram_r.resize(0x2000); m_ram_g.resize(0x2000); m_ram_b.resize(0x2000); - memset(m_regs, 0, sizeof(m_regs)); + std::fill(std::begin(m_regs), std::end(m_regs), 0); save_item(NAME(m_ram_r)); save_item(NAME(m_ram_g)); @@ -175,5 +178,5 @@ WRITE8_MEMBER(namco_c116_device::write) } int color = ((offset & 0x6000) >> 2) | (offset & 0x7ff); RAM[color] = data; - palette().set_pen_color(color,m_ram_r[color],m_ram_g[color],m_ram_b[color]); + set_pen_color(color,m_ram_r[color],m_ram_g[color],m_ram_b[color]); } diff --git a/src/mame/video/namco_c116.h b/src/mame/video/namco_c116.h index e24d61119c0..7638b12b903 100644 --- a/src/mame/video/namco_c116.h +++ b/src/mame/video/namco_c116.h @@ -13,13 +13,16 @@ class namco_c116_device : public device_t, - public device_gfx_interface, + public device_palette_interface, public device_video_interface { public: //construction/destruction namco_c116_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + // configuration + void enable_shadows() { m_enable_shadows = true; } + //read/write handlers DECLARE_READ8_MEMBER( read ); DECLARE_WRITE8_MEMBER( write ); @@ -31,12 +34,17 @@ protected: // device-level overrides virtual void device_start() override; + // device_palette_interface overrides + virtual uint32_t palette_entries() const override { return 0x2000; } + virtual bool palette_shadows_enabled() const override { return m_enable_shadows; } + private: // internal state std::vector<uint8_t> m_ram_r; std::vector<uint8_t> m_ram_g; std::vector<uint8_t> m_ram_b; uint16_t m_regs[8]; + bool m_enable_shadows; // are shadows enabled? }; DECLARE_DEVICE_TYPE(NAMCO_C116, namco_c116_device) diff --git a/src/mame/video/namco_c123tmap.cpp b/src/mame/video/namco_c123tmap.cpp index cf635c5cb16..73b80e82c96 100644 --- a/src/mame/video/namco_c123tmap.cpp +++ b/src/mame/video/namco_c123tmap.cpp @@ -2,45 +2,59 @@ // copyright-holders:David Haywood, Phil Stroffolino /* - C123 Tilemaps - used by - namcos2.cpp (all games) - namcofl.cpp (all games) - namconb1.cpp (all games) + C123 Tilemaps + used by + namcos2.cpp (all games) + namcofl.cpp (all games) + namconb1.cpp (all games) - should be used by - namcos1.cpp (all games) + should be used by + namcos1.cpp (all games) - (TODO: merge with namcos1.cpp implementation) + (TODO: merge with namcos1.cpp implementation) */ #include "emu.h" #include "namco_c123tmap.h" +static const gfx_layout layout = +{ + 8,8, + RGN_FRAC(1,1), + 8, + { STEP8(0,1) }, + { STEP8(0,8) }, + { STEP8(0,8*8) }, + 8*8*8 +}; + +GFXDECODE_START( namco_c123tmap_device::gfxinfo ) + GFXDECODE_DEVICE( DEVICE_SELF, 0, layout, 0, 32 ) +GFXDECODE_END + DEFINE_DEVICE_TYPE(NAMCO_C123TMAP, namco_c123tmap_device, "namco_c123tmap", "Namco C123 (4x + 2x Tilemaps)") namco_c123tmap_device::namco_c123tmap_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, NAMCO_C123TMAP, tag, owner, clock), - m_gfxdecode(*this, finder_base::DUMMY_TAG), - m_maskregion(*this, finder_base::DUMMY_TAG) + device_gfx_interface(mconfig, *this, gfxinfo), + m_color_base(0), + m_mask(*this, "mask") { } void namco_c123tmap_device::device_start() { - m_tilemapinfo.maskBaseAddr = m_maskregion->base(); - m_tilemapinfo.videoram = std::make_unique<uint16_t[]>(0x10000); /* four scrolling tilemaps */ - m_tilemapinfo.tmap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namco_c123tmap_device::get_tile_info<0x0000>), this), TILEMAP_SCAN_ROWS, 8, 8, 64, 64); - m_tilemapinfo.tmap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namco_c123tmap_device::get_tile_info<0x1000>), this), TILEMAP_SCAN_ROWS, 8, 8, 64, 64); - m_tilemapinfo.tmap[2] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namco_c123tmap_device::get_tile_info<0x2000>), this), TILEMAP_SCAN_ROWS, 8, 8, 64, 64); - m_tilemapinfo.tmap[3] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namco_c123tmap_device::get_tile_info<0x3000>), this), TILEMAP_SCAN_ROWS, 8, 8, 64, 64); + m_tilemapinfo.tmap[0] = &machine().tilemap().create(*this, tilemap_get_info_delegate(FUNC(namco_c123tmap_device::get_tile_info<0x0000>), this), TILEMAP_SCAN_ROWS, 8, 8, 64, 64); + m_tilemapinfo.tmap[1] = &machine().tilemap().create(*this, tilemap_get_info_delegate(FUNC(namco_c123tmap_device::get_tile_info<0x1000>), this), TILEMAP_SCAN_ROWS, 8, 8, 64, 64); + m_tilemapinfo.tmap[2] = &machine().tilemap().create(*this, tilemap_get_info_delegate(FUNC(namco_c123tmap_device::get_tile_info<0x2000>), this), TILEMAP_SCAN_ROWS, 8, 8, 64, 64); + m_tilemapinfo.tmap[3] = &machine().tilemap().create(*this, tilemap_get_info_delegate(FUNC(namco_c123tmap_device::get_tile_info<0x3000>), this), TILEMAP_SCAN_ROWS, 8, 8, 64, 64); /* two non-scrolling tilemaps */ - m_tilemapinfo.tmap[4] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namco_c123tmap_device::get_tile_info<0x4008>), this), TILEMAP_SCAN_ROWS, 8, 8, 36, 28); - m_tilemapinfo.tmap[5] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namco_c123tmap_device::get_tile_info<0x4408>), this), TILEMAP_SCAN_ROWS, 8, 8, 36, 28); + m_tilemapinfo.tmap[4] = &machine().tilemap().create(*this, tilemap_get_info_delegate(FUNC(namco_c123tmap_device::get_tile_info<0x4008>), this), TILEMAP_SCAN_ROWS, 8, 8, 36, 28); + m_tilemapinfo.tmap[5] = &machine().tilemap().create(*this, tilemap_get_info_delegate(FUNC(namco_c123tmap_device::get_tile_info<0x4408>), this), TILEMAP_SCAN_ROWS, 8, 8, 36, 28); /* define offsets for scrolling */ for (int i = 0; i < 4; i++) @@ -51,7 +65,6 @@ void namco_c123tmap_device::device_start() m_tilemapinfo.tmap[i]->set_scrolldy(-24, 224 + 24); } - save_item(NAME(m_tilemapinfo.control)); save_pointer(NAME(m_tilemapinfo.videoram), 0x10000); } @@ -72,19 +85,19 @@ TILE_GET_INFO_MEMBER(namco_c123tmap_device::get_tile_info) const uint16_t *vram = &m_tilemapinfo.videoram[Offset]; int tile, mask; m_tilemapinfo.cb(vram[tile_index], &tile, &mask); - tileinfo.mask_data = m_tilemapinfo.maskBaseAddr + mask * 8; - SET_TILE_INFO_MEMBER(m_tilemapinfo.gfxbank, tile, 0, 0); + tileinfo.mask_data = m_mask + mask * 8; + SET_TILE_INFO_MEMBER(0, tile, 0, 0); } /* get_tile_info */ void namco_c123tmap_device::draw(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri) { for (int i = 0; i < 6; i++) { - /* note: priority is only in range 0..7, but Point Blank uses 0xf to hide a layer */ - if ((m_tilemapinfo.control[0x20 / 2 + i] & 0xf) == pri) + // bit 3 : disable layer + if ((m_tilemapinfo.control[0x20 / 2 + i] & 0x7) == pri) { int color = m_tilemapinfo.control[0x30 / 2 + i] & 0x07; - m_tilemapinfo.tmap[i]->set_palette_offset(color * 256); + m_tilemapinfo.tmap[i]->set_palette_offset(color * 256 + m_color_base); m_tilemapinfo.tmap[i]->draw(screen, bitmap, cliprect, 0, 0); } } @@ -137,6 +150,10 @@ void namco_c123tmap_device::set_tilemap_control(int offset, uint16_t newword) } } } + else if (offset <= 0x2a / 2) + { + m_tilemapinfo.tmap[offset & 7]->enable(BIT(~newword, 3)); + } newword &= 0x1ff; if (m_tilemapinfo.control[0x02 / 2] & 0x8000) { diff --git a/src/mame/video/namco_c123tmap.h b/src/mame/video/namco_c123tmap.h index b626ac09a73..8465ce6d61b 100644 --- a/src/mame/video/namco_c123tmap.h +++ b/src/mame/video/namco_c123tmap.h @@ -7,17 +7,14 @@ #pragma once #include "screen.h" -#include "emupal.h" -class namco_c123tmap_device : public device_t +class namco_c123tmap_device : public device_t, public device_gfx_interface { public: // construction/destruction namco_c123tmap_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - template <typename T> void set_gfxdecode_tag(T &&tag) { m_gfxdecode.set_tag(std::forward<T>(tag)); } - template <typename T> void set_maskregion_tag(T &&tag) { m_maskregion.set_tag(std::forward<T>(tag)); } - void set_gfxregion(int region) { m_tilemapinfo.gfxbank = region; } + void set_color_base(int color) { m_color_base = color; } typedef delegate<void(uint16_t, int*, int*)> c123_tilemap_delegate; void set_tile_callback(c123_tilemap_delegate tilemap_cb) { m_tilemapinfo.cb = tilemap_cb; } @@ -56,15 +53,14 @@ private: */ tilemap_t *tmap[6]; std::unique_ptr<uint16_t[]> videoram; - int gfxbank; - uint8_t *maskBaseAddr; c123_tilemap_delegate cb; }; info m_tilemapinfo; + DECLARE_GFXDECODE_MEMBER(gfxinfo); - required_device<gfxdecode_device> m_gfxdecode; - required_memory_region m_maskregion; + int m_color_base; + required_region_ptr<uint8_t> m_mask; }; // device type definition diff --git a/src/mame/video/namco_c169roz.cpp b/src/mame/video/namco_c169roz.cpp index e298a2dd333..09ab88ec06f 100644 --- a/src/mame/video/namco_c169roz.cpp +++ b/src/mame/video/namco_c169roz.cpp @@ -8,7 +8,7 @@ Each layer uses a designated subset of a master 256x256 tile tilemap (4096x4096 pixels). Each layer has configurable color and tile banking. ROZ attributes may be specified independently for each scanline. - + Used by: Namco NB2 - The Outfoxies, Mach Breakers Namco System 2 - Metal Hawk, Lucky and Wild @@ -19,32 +19,44 @@ #include "emu.h" #include "namco_c169roz.h" +static const gfx_layout layout = +{ + 16,16, + RGN_FRAC(1,1), + 8, + { STEP8(0,1) }, + { STEP16(0,8) }, + { STEP16(0,8*16) }, + 16*128 +}; + +GFXDECODE_START( namco_c169roz_device::gfxinfo ) + GFXDECODE_DEVICE( DEVICE_SELF, 0, layout, 0, 32 ) +GFXDECODE_END + DEFINE_DEVICE_TYPE(NAMCO_C169ROZ, namco_c169roz_device, "namco_c169roz", "Namco C169 (ROZ)") namco_c169roz_device::namco_c169roz_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, NAMCO_C169ROZ, tag, owner, clock), - m_gfx_region(0), - m_mask(nullptr), + device_gfx_interface(mconfig, *this, gfxinfo), + m_color_base(0), m_is_namcofl(false), - m_gfxdecode(*this, finder_base::DUMMY_TAG), - m_maskregion(*this, finder_base::DUMMY_TAG) + m_mask(*this, "mask") { } void namco_c169roz_device::device_start() { - m_mask = m_maskregion->base(); - m_videoram.resize(m_ramsize); std::fill(std::begin(m_videoram), std::end(m_videoram), 0x0000); - m_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, + m_tilemap[0] = &machine().tilemap().create(*this, tilemap_get_info_delegate(FUNC(namco_c169roz_device::get_info<0>), this), tilemap_mapper_delegate(FUNC(namco_c169roz_device::mapper), this), 16, 16, 256, 256); - m_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, + m_tilemap[1] = &machine().tilemap().create(*this, tilemap_get_info_delegate(FUNC(namco_c169roz_device::get_info<1>), this), tilemap_mapper_delegate(FUNC(namco_c169roz_device::mapper), this), 16, 16, @@ -73,7 +85,7 @@ TILE_GET_INFO_MEMBER(namco_c169roz_device::get_info) m_c169_cb(m_videoram[tile_index&(m_ramsize-1)] & 0x3fff, &tile, &mask, Which); // need to mask with ramsize because the nb1/fl games have twice as much RAM, presumably the tilemaps mirror in ns2? tileinfo.mask_data = m_mask + 32 * mask; - SET_TILE_INFO_MEMBER(m_gfx_region, tile, 0/*color*/, 0/*flag*/); + SET_TILE_INFO_MEMBER(0, tile, 0/*color*/, 0/*flag*/); } TILEMAP_MAPPER_MEMBER( namco_c169roz_device::mapper ) @@ -160,7 +172,7 @@ void namco_c169roz_device::draw_helper(screen_device &screen, bitmap_ind16 &bitm uint32_t xpos = (((cx >> 16) & size_mask) + params.left) & 0xfff; uint32_t ypos = (((cy >> 16) & size_mask) + params.top) & 0xfff; if (flagsbitmap.pix(ypos, xpos) & TILEMAP_PIXEL_LAYER0) - *dest = srcbitmap.pix(ypos, xpos) + params.color; + *dest = srcbitmap.pix(ypos, xpos) + params.color + m_color_base; cx += params.incxx; cy += params.incxy; x++; @@ -173,7 +185,7 @@ void namco_c169roz_device::draw_helper(screen_device &screen, bitmap_ind16 &bitm } else { - tmap.set_palette_offset(params.color); + tmap.set_palette_offset(m_color_base + params.color); tmap.draw_roz( screen, bitmap, diff --git a/src/mame/video/namco_c169roz.h b/src/mame/video/namco_c169roz.h index b3299171c04..90507f9e1b1 100644 --- a/src/mame/video/namco_c169roz.h +++ b/src/mame/video/namco_c169roz.h @@ -7,17 +7,15 @@ #pragma once -class namco_c169roz_device : public device_t +class namco_c169roz_device : public device_t, public device_gfx_interface { public: // construction/destruction namco_c169roz_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - template <typename T> void set_gfxdecode_tag(T &&tag) { m_gfxdecode.set_tag(std::forward<T>(tag)); } void set_is_namcofl(bool state) { m_is_namcofl = state; } void set_ram_words(uint32_t size) { m_ramsize = size; } - template <typename T> void set_maskregion_tag(T &&tag) { m_maskregion.set_tag(std::forward<T>(tag)); } - void set_gfxregion(int region) { m_gfx_region = region; } + void set_color_base(int color) { m_color_base = color; } DECLARE_READ16_MEMBER( control_r ); DECLARE_WRITE16_MEMBER( control_w ); @@ -56,15 +54,14 @@ private: tilemap_t *m_tilemap[ROZ_TILEMAP_COUNT]; uint16_t m_control[0x20/2]; std::vector<uint16_t> m_videoram; - int m_gfx_region; - uint8_t *m_mask; + int m_color_base; + DECLARE_GFXDECODE_MEMBER(gfxinfo); uint32_t m_ramsize; // per-game hacks bool m_is_namcofl; - required_device<gfxdecode_device> m_gfxdecode; - required_memory_region m_maskregion; + required_region_ptr<uint8_t> m_mask; }; // device type definition diff --git a/src/mame/video/namco_c355spr.cpp b/src/mame/video/namco_c355spr.cpp index bc793898aeb..f81ab57eccf 100644 --- a/src/mame/video/namco_c355spr.cpp +++ b/src/mame/video/namco_c355spr.cpp @@ -2,13 +2,13 @@ // copyright-holders:David Haywood, Phil Stroffolino /* - C355 Zooming sprites - used by - namcofl.cpp (all games) - namconb1.cpp (all games) - gal3.cpp (all games) - namcos21.cpp (Driver's Eyes, Solvalou, Starblade, Air Combat, Cyber Sled) (everything except Winning Run series) - namcos2.cpp (Steel Gunner, Steel Gunner 2, Lucky & Wild, Suzuka 8 Hours, Suzuka 8 Hours 2) + C355 Zooming sprites + used by + namcofl.cpp (all games) + namconb1.cpp (all games) + gal3.cpp (all games) + namcos21.cpp (Driver's Eyes, Solvalou, Starblade, Air Combat, Cyber Sled) (everything except Winning Run series) + namcos2.cpp (Steel Gunner, Steel Gunner 2, Lucky & Wild, Suzuka 8 Hours, Suzuka 8 Hours 2) */ @@ -19,11 +19,12 @@ DEFINE_DEVICE_TYPE(NAMCO_C355SPR, namco_c355spr_device, "namco_c355spr", "Namco namco_c355spr_device::namco_c355spr_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, NAMCO_C355SPR, tag, owner, clock), + device_video_interface(mconfig, *this), m_gfx_region(0), m_palxor(0), m_is_namcofl(false), - m_gfxdecode(*this, finder_base::DUMMY_TAG), - m_palette(*this, finder_base::DUMMY_TAG) + m_buffer(0), + m_gfxdecode(*this, finder_base::DUMMY_TAG) { } @@ -39,10 +40,11 @@ void namco_c355spr_device::zdrawgfxzoom( if (!scalex || !scaley) return; if (dest_bmp.bpp() == 16) { - if( gfx ) + if (gfx) { - int shadow_offset = (m_palette->shadows_enabled())?m_palette->entries():0; - const pen_t *pal = &m_palette->pen(gfx->colorbase() + gfx->granularity() * (color % gfx->colors())); + device_palette_interface &palette = m_gfxdecode->palette(); + int shadow_offset = (palette.shadows_enabled())?palette.entries():0; + const pen_t *pal = &palette.pen(gfx->colorbase() + gfx->granularity() * (color % gfx->colors())); const uint8_t *source_base = gfx->get_data(code % gfx->elements()); int sprite_screen_height = (scaley*gfx->height()+0x8000)>>16; int sprite_screen_width = (scalex*gfx->width()+0x8000)>>16; @@ -58,7 +60,7 @@ void namco_c355spr_device::zdrawgfxzoom( int x_index_base; int y_index; - if( flipx ) + if (flipx) { x_index_base = (sprite_screen_width-1)*dx; dx = -dx; @@ -68,7 +70,7 @@ void namco_c355spr_device::zdrawgfxzoom( x_index_base = 0; } - if( flipy ) + if (flipy) { y_index = (sprite_screen_height-1)*dy; dy = -dy; @@ -78,51 +80,51 @@ void namco_c355spr_device::zdrawgfxzoom( y_index = 0; } - if( sx < clip.min_x) + if (sx < clip.min_x) { /* clip left */ int pixels = clip.min_x-sx; sx += pixels; x_index_base += pixels*dx; } - if( sy < clip.min_y ) + if (sy < clip.min_y) { /* clip top */ int pixels = clip.min_y-sy; sy += pixels; y_index += pixels*dy; } - if( ex > clip.max_x+1 ) + if (ex > clip.max_x+1) { /* clip right */ int pixels = ex-clip.max_x-1; ex -= pixels; } - if( ey > clip.max_y+1 ) + if (ey > clip.max_y+1) { /* clip bottom */ int pixels = ey-clip.max_y-1; ey -= pixels; } - if( ex>sx ) + if (ex>sx) { /* skip if inner loop doesn't draw anything */ int y; bitmap_ind8 &priority_bitmap = screen.priority(); - if( priority_bitmap.valid() ) + if (priority_bitmap.valid()) { - for( y=sy; y<ey; y++ ) + for (y = sy; y < ey; y++) { const uint8_t *source = source_base + (y_index>>16) * gfx->rowbytes(); uint16_t *dest = &dest_bmp.pix16(y); uint8_t *pri = &priority_bitmap.pix8(y); int x, x_index = x_index_base; - if( m_palxor ) + if (m_palxor) { - for( x=sx; x<ex; x++ ) + for (x = sx; x < ex; x++) { int c = source[x_index>>16]; - if( c != 0xff ) + if (c != 0xff) { - if( pri[x]<=zpos ) + if (pri[x] <= zpos) { - switch( c ) + switch (c) { case 0: dest[x] = 0x4000|(dest[x]&0x1fff); @@ -143,14 +145,14 @@ void namco_c355spr_device::zdrawgfxzoom( } else { - for( x=sx; x<ex; x++ ) + for (x = sx; x < ex; x++) { int c = source[x_index>>16]; - if( c != 0xff ) + if (c != 0xff) { - if( pri[x]<=zpos ) + if (pri[x] <= zpos ) { - if( color == 0xf && c==0xfe && shadow_offset ) + if (color == 0xf && c == 0xfe && shadow_offset) { dest[x] |= shadow_offset; } @@ -184,11 +186,15 @@ void namco_c355spr_device::zdrawgfxzoom( void namco_c355spr_device::device_start() { - //m_spriteram.resize(m_ramsize); - std::fill(std::begin(m_spriteram), std::end(m_spriteram), 0x0000); // needed for Nebulas Ray std::fill(std::begin(m_position), std::end(m_position), 0x0000); + for (int i = 0; i < 2; i++) + { + m_spritelist[i] = auto_alloc_array(machine(), struct c355_sprite, 0x100); + m_sprite_end[i] = m_spritelist[i]; + m_spriteram[i].resize(0x20000/2, 0); + save_item(NAME(m_spriteram[i]), i); + } - save_item(NAME(m_spriteram)); save_item(NAME(m_position)); } @@ -216,17 +222,15 @@ READ16_MEMBER( namco_c355spr_device::position_r ) * 0x10000 sprite attr (page1) * 0x14000 sprite list (page1) */ -template<class _BitmapClass> -void namco_c355spr_device::draw_sprite(screen_device &screen, _BitmapClass &bitmap, const rectangle &cliprect, const uint16_t *pSource, int pri, int zpos ) +void namco_c355spr_device::get_single_sprite(const uint16_t *pSource, struct c355_sprite *sprite_ptr) { - uint16_t *spriteram16 = m_spriteram; + uint16_t *spriteram16 = &m_spriteram[std::max(0, m_buffer - 1)][0]; unsigned screen_height_remaining, screen_width_remaining; unsigned source_height_remaining, source_width_remaining; int hpos,vpos; uint16_t hsize,vsize; uint16_t palette; uint16_t linkno; - uint16_t offset; uint16_t format; int tile_index; int num_cols,num_rows; @@ -239,7 +243,6 @@ void namco_c355spr_device::draw_sprite(screen_device &screen, _BitmapClass &bitm int tile_screen_height; const uint16_t *spriteformat16 = &spriteram16[0x4000/2]; const uint16_t *spritetile16 = &spriteram16[0x8000/2]; - int color; const uint16_t *pWinAttr; rectangle clip; int xscroll, yscroll; @@ -250,34 +253,35 @@ void namco_c355spr_device::draw_sprite(screen_device &screen, _BitmapClass &bitm * ------------xxxx palette select */ palette = pSource[6]; - if( pri != ((palette>>4)&0xf) ) - { - return; - } - - linkno = pSource[0]; /* LINKNO */ - offset = pSource[1]; /* OFFSET */ - hpos = pSource[2]; /* HPOS 0x000..0x7ff (signed) */ - vpos = pSource[3]; /* VPOS 0x000..0x7ff (signed) */ - hsize = pSource[4]; /* HSIZE max 0x3ff pixels */ - vsize = pSource[5]; /* VSIZE max 0x3ff pixels */ + sprite_ptr->pri = ((palette>>4)&0xf); + + linkno = pSource[0]; /* LINKNO */ + sprite_ptr->offset = pSource[1]; /* OFFSET */ + hpos = pSource[2]; /* HPOS 0x000..0x7ff (signed) */ + vpos = pSource[3]; /* VPOS 0x000..0x7ff (signed) */ + hsize = pSource[4]; /* HSIZE max 0x3ff pixels */ + vsize = pSource[5]; /* VSIZE max 0x3ff pixels */ /* pSource[6] contains priority/palette */ /* pSource[7] is used in Lucky & Wild, possibly for sprite-road priority */ - if( linkno*4>=0x4000/2 ) return; /* avoid garbage memory reads */ + if (linkno*4>=0x4000/2) /* avoid garbage memory reads */ + { + sprite_ptr->disable = true; + return; + } xscroll = (int16_t)m_position[1]; yscroll = (int16_t)m_position[0]; -// xscroll &= 0x3ff; if( xscroll & 0x200 ) xscroll |= ~0x3ff; - xscroll &= 0x1ff; if( xscroll & 0x100 ) xscroll |= ~0x1ff; - yscroll &= 0x1ff; if( yscroll & 0x100 ) yscroll |= ~0x1ff; +// xscroll &= 0x3ff; if (xscroll & 0x200 ) xscroll |= ~0x3ff; + xscroll &= 0x1ff; if (xscroll & 0x100 ) xscroll |= ~0x1ff; + yscroll &= 0x1ff; if (yscroll & 0x100 ) yscroll |= ~0x1ff; - if( bitmap.width() > 384 ) + if (screen().height() > 384) { /* Medium Resolution: System21 adjust */ xscroll = (int16_t)m_position[1]; - xscroll &= 0x3ff; if( xscroll & 0x200 ) xscroll |= ~0x3ff; - if( yscroll<0 ) + xscroll &= 0x3ff; if (xscroll & 0x200) xscroll |= ~0x3ff; + if (yscroll<0) { /* solvalou */ yscroll += 0x20; } @@ -299,9 +303,9 @@ void namco_c355spr_device::draw_sprite(screen_device &screen, _BitmapClass &bitm vpos -= yscroll; pWinAttr = &spriteram16[0x2400/2+((palette>>8)&0xf)*4]; clip.set(pWinAttr[0] - xscroll, pWinAttr[1] - xscroll, pWinAttr[2] - yscroll, pWinAttr[3] - yscroll); - clip &= cliprect; - hpos&=0x7ff; if( hpos&0x400 ) hpos |= ~0x7ff; /* sign extend */ - vpos&=0x7ff; if( vpos&0x400 ) vpos |= ~0x7ff; /* sign extend */ + sprite_ptr->clip = clip; + hpos&=0x7ff; if (hpos&0x400 ) hpos |= ~0x7ff; /* sign extend */ + vpos&=0x7ff; if (vpos&0x400 ) vpos |= ~0x7ff; /* sign extend */ tile_index = spriteformat16[linkno*4+0]; format = spriteformat16[linkno*4+1]; @@ -310,13 +314,17 @@ void namco_c355spr_device::draw_sprite(screen_device &screen, _BitmapClass &bitm num_cols = (format>>4)&0xf; num_rows = (format)&0xf; - if( num_cols == 0 ) num_cols = 0x10; + if (num_cols == 0) num_cols = 0x10; flipx = (hsize&0x8000)?1:0; hsize &= 0x3ff;//0x1ff; - if( hsize == 0 ) return; + if (hsize == 0) + { + sprite_ptr->disable = true; + return; + } zoomx = (hsize<<16)/(num_cols*16); dx = (dx*zoomx+0x8000)>>16; - if( flipx ) + if (flipx) { hpos += dx; } @@ -325,13 +333,17 @@ void namco_c355spr_device::draw_sprite(screen_device &screen, _BitmapClass &bitm hpos -= dx; } - if( num_rows == 0 ) num_rows = 0x10; + if (num_rows == 0) num_rows = 0x10; flipy = (vsize&0x8000)?1:0; vsize &= 0x3ff; - if( vsize == 0 ) return; + if (vsize == 0) + { + sprite_ptr->disable = true; + return; + } zoomy = (vsize<<16)/(num_rows*16); dy = (dy*zoomy+0x8000)>>16; - if( flipy ) + if (flipy) { vpos += dy; } @@ -340,52 +352,52 @@ void namco_c355spr_device::draw_sprite(screen_device &screen, _BitmapClass &bitm vpos -= dy; } - color = (palette&0xf)^m_palxor; + sprite_ptr->flipx = flipx; + sprite_ptr->flipy = flipy; + sprite_ptr->size = num_rows * num_cols; + sprite_ptr->color = (palette&0xf)^m_palxor; source_height_remaining = num_rows*16; screen_height_remaining = vsize; sy = vpos; - for( row=0; row<num_rows; row++ ) + int ind = 0; + for (row = 0; row < num_rows; row++) { tile_screen_height = 16*screen_height_remaining/source_height_remaining; zoomy = (screen_height_remaining<<16)/source_height_remaining; - if( flipy ) + if (flipy) { sy -= tile_screen_height; } source_width_remaining = num_cols*16; screen_width_remaining = hsize; sx = hpos; - for( col=0; col<num_cols; col++ ) + for (col = 0; col < num_cols; col++) { tile_screen_width = 16*screen_width_remaining/source_width_remaining; zoomx = (screen_width_remaining<<16)/source_width_remaining; - if( flipx ) + if (flipx) { sx -= tile_screen_width; } tile = spritetile16[tile_index++]; - if( (tile&0x8000)==0 ) + sprite_ptr->tile[ind] = tile; + if ((tile&0x8000)==0) { - zdrawgfxzoom( - screen, - bitmap, - clip, - m_gfxdecode->gfx(m_gfx_region), - m_code2tile(tile) + offset, - color, - flipx,flipy, - sx,sy, - zoomx, zoomy, zpos ); + sprite_ptr->x[ind] = sx; + sprite_ptr->y[ind] = sy; + sprite_ptr->zoomx[ind] = zoomx; + sprite_ptr->zoomy[ind] = zoomy; } - if( !flipx ) + if (!flipx) { sx += tile_screen_width; } screen_width_remaining -= tile_screen_width; source_width_remaining -= 16; + ind++; } /* next col */ - if( !flipy ) + if (!flipy) { sy += tile_screen_height; } @@ -400,51 +412,144 @@ int namco_c355spr_device::default_code2tile(int code) return code; } -template<class _BitmapClass> -void namco_c355spr_device::draw_list(screen_device &screen, _BitmapClass &bitmap, const rectangle &cliprect, int pri, const uint16_t *pSpriteList16, const uint16_t *pSpriteTable) +void namco_c355spr_device::get_list(int no, const uint16_t *pSpriteList16, const uint16_t *pSpriteTable) { - int i; /* draw the sprites */ - for( i=0; i<256; i++ ) + struct c355_sprite *sprite_ptr = m_spritelist[no]; + for (int i = 0; i < 256; i++) { + sprite_ptr->disable = false; uint16_t which = pSpriteList16[i]; - draw_sprite(screen, bitmap, cliprect, &pSpriteTable[(which&0xff)*8], pri, i ); - if( which&0x100 ) break; + get_single_sprite(&pSpriteTable[(which&0xff)*8], sprite_ptr); + sprite_ptr++; + if (which&0x100) break; } + m_sprite_end[no] = sprite_ptr; } -void namco_c355spr_device::draw(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri) +void namco_c355spr_device::get_sprites() { + int buffer = std::max(0, m_buffer - 1); // int offs = spriteram16[0x18000/2]; /* end-of-sprite-list */ - if (pri == 0) - screen.priority().fill(0, cliprect); // if (offs == 0) // boot // TODO: solvalou service mode wants 0x14000/2 & 0x00000/2 - draw_list(screen, bitmap, cliprect, pri, &m_spriteram[0x02000/2], &m_spriteram[0x00000/2]); + get_list(0, &m_spriteram[buffer][0x02000/2], &m_spriteram[buffer][0x00000/2]); // else - draw_list(screen, bitmap, cliprect, pri, &m_spriteram[0x14000/2], &m_spriteram[0x10000/2]); + get_list(1, &m_spriteram[buffer][0x14000/2], &m_spriteram[buffer][0x10000/2]); +} + +void namco_c355spr_device::draw(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri) +{ +// int offs = spriteram16[0x18000/2]; /* end-of-sprite-list */ + if (pri == 0) + { + screen.priority().fill(0, cliprect); + if (m_buffer == 0) // not buffered sprites + get_sprites(); + } + + for (int no = 0; no < 2; no++) + { + //if (offs == no) + { + int i = 0; + struct c355_sprite *sprite_ptr = m_spritelist[no]; + + while (sprite_ptr != m_sprite_end[no]) + { + if ((sprite_ptr->pri == pri) && (sprite_ptr->disable == false)) + { + rectangle clip = sprite_ptr->clip; + clip &= cliprect; + for (int ind = 0; ind < sprite_ptr->size; ind++) + { + if ((sprite_ptr->tile[ind] & 0x8000) == 0) + { + zdrawgfxzoom( + screen, + bitmap, + clip, + m_gfxdecode->gfx(m_gfx_region), + m_code2tile(sprite_ptr->tile[ind]) + sprite_ptr->offset, + sprite_ptr->color, + sprite_ptr->flipx, sprite_ptr->flipy, + sprite_ptr->x[ind], sprite_ptr->y[ind], + sprite_ptr->zoomx[ind], sprite_ptr->zoomy[ind], i); + } + } + } + i++; + sprite_ptr++; + } + } + } } void namco_c355spr_device::draw(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int pri) { // int offs = spriteram16[0x18000/2]; /* end-of-sprite-list */ if (pri == 0) + { screen.priority().fill(0, cliprect); + if (m_buffer == 0) // not buffered sprites + get_sprites(); + } -// if (offs == 0) // boot - draw_list(screen, bitmap, cliprect, pri, &m_spriteram[0x02000/2], &m_spriteram[0x00000/2]); -// else - draw_list(screen, bitmap, cliprect, pri, &m_spriteram[0x14000/2], &m_spriteram[0x10000/2]); + for (int no = 0; no < 2; no++) + { + //if (offs == no) + { + int i = 0; + struct c355_sprite *sprite_ptr = m_spritelist[no]; + + while (sprite_ptr != m_sprite_end[no]) + { + if (sprite_ptr->pri == pri) + { + sprite_ptr->clip &= cliprect; + for (int ind = 0; ind < sprite_ptr->size; ind++) + { + if ((sprite_ptr->tile[ind] & 0x8000) == 0) + { + zdrawgfxzoom( + screen, + bitmap, + sprite_ptr->clip, + m_gfxdecode->gfx(m_gfx_region), + m_code2tile(sprite_ptr->tile[ind]) + sprite_ptr->offset, + sprite_ptr->color, + sprite_ptr->flipx,sprite_ptr->flipy, + sprite_ptr->x[ind],sprite_ptr->y[ind], + sprite_ptr->zoomx[ind], sprite_ptr->zoomy[ind], i ); + } + } + } + sprite_ptr++; + } + } + } } WRITE16_MEMBER( namco_c355spr_device::spriteram_w ) { - COMBINE_DATA(&m_spriteram[offset]); + COMBINE_DATA(&m_spriteram[0][offset]); } READ16_MEMBER( namco_c355spr_device::spriteram_r ) { - return m_spriteram[offset]; + return m_spriteram[0][offset]; +} + +WRITE_LINE_MEMBER( namco_c355spr_device::vblank ) +{ + if (state) + { + if (m_buffer > 0) + get_sprites(); + + if (m_buffer > 1) + std::copy(m_spriteram[0].begin(), m_spriteram[0].end(), m_spriteram[1].begin()); + } } diff --git a/src/mame/video/namco_c355spr.h b/src/mame/video/namco_c355spr.h index c9ec0ba6d46..d25ee80cdf4 100644 --- a/src/mame/video/namco_c355spr.h +++ b/src/mame/video/namco_c355spr.h @@ -7,25 +7,25 @@ #pragma once #include "screen.h" -#include "emupal.h" -class namco_c355spr_device : public device_t +class namco_c355spr_device : public device_t, public device_video_interface { public: // construction/destruction namco_c355spr_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - template <typename T> void set_palette_tag(T &&tag) { m_palette.set_tag(std::forward<T>(tag)); } template <typename T> void set_gfxdecode_tag(T &&tag) { m_gfxdecode.set_tag(std::forward<T>(tag)); } void set_is_namcofl(bool state) { m_is_namcofl = state; } //void set_ram_words(uint32_t size) { m_ramsize = size; } void set_palxor(int palxor) { m_palxor = palxor; } void set_gfxregion(int region) { m_gfx_region = region; } + void set_buffer(int buffer) { m_buffer = buffer; } DECLARE_READ16_MEMBER( spriteram_r ); DECLARE_WRITE16_MEMBER( spriteram_w ); DECLARE_READ16_MEMBER( position_r ); DECLARE_WRITE16_MEMBER( position_w ); + DECLARE_WRITE_LINE_MEMBER( vblank ); typedef delegate<int (int)> c355_obj_code2tile_delegate; void set_tile_callback(c355_obj_code2tile_delegate cb) @@ -46,6 +46,20 @@ protected: private: + struct c355_sprite + { + int disable; + int size; + rectangle clip; + int offset; + int color; + int flipx,flipy; + int tile[16*16]; + int x[16*16],y[16*16]; + int zoomx[16*16],zoomy[16*16]; + int pri; + }; + // general void zdrawgfxzoom(screen_device &screen, bitmap_ind16 &dest_bmp, const rectangle &clip, gfx_element *gfx, uint32_t code, uint32_t color, int flipx, int flipy, int sx, int sy, int scalex, int scaley, int zpos); void zdrawgfxzoom(screen_device &screen, bitmap_rgb32 &dest_bmp, const rectangle &clip, gfx_element *gfx, uint32_t code, uint32_t color, int flipx, int flipy, int sx, int sy, int scalex, int scaley, int zpos); @@ -55,23 +69,24 @@ private: int default_code2tile(int code); // C355 Motion Object internals - template<class _BitmapClass> - void draw_sprite(screen_device &screen, _BitmapClass &bitmap, const rectangle &cliprect, const uint16_t *pSource, int pri, int zpos); - template<class _BitmapClass> - void draw_list(screen_device &screen, _BitmapClass &bitmap, const rectangle &cliprect, int pri, const uint16_t *pSpriteList16, const uint16_t *pSpriteTable); + void get_single_sprite(const uint16_t *pSource, struct c355_sprite *sprite_ptr); + void get_list(int no, const uint16_t *pSpriteList16, const uint16_t *pSpriteTable); + void get_sprites(); + struct c355_sprite *m_spritelist[2]; + const struct c355_sprite *m_sprite_end[2]; c355_obj_code2tile_delegate m_code2tile; int m_gfx_region; int m_palxor; uint16_t m_position[4]; - uint16_t m_spriteram[0x20000/2]; + std::vector<uint16_t> m_spriteram[2]; //std::vector<uint16_t> m_spriteram; bool m_is_namcofl; //uint32_t m_ramsize; + int m_buffer; required_device<gfxdecode_device> m_gfxdecode; - required_device<palette_device> m_palette; }; // device type definition diff --git a/src/mame/video/namcofl.cpp b/src/mame/video/namcofl.cpp index 0ecf77c5abd..9a4f2be52e7 100644 --- a/src/mame/video/namcofl.cpp +++ b/src/mame/video/namcofl.cpp @@ -62,7 +62,7 @@ uint32_t namcofl_state::screen_update_namcofl(screen_device &screen, bitmap_ind1 { int pri; - bitmap.fill(m_palette->black_pen(), cliprect ); + bitmap.fill(m_c116->black_pen(), cliprect ); for( pri=0; pri<16; pri++ ) { @@ -71,7 +71,7 @@ uint32_t namcofl_state::screen_update_namcofl(screen_device &screen, bitmap_ind1 { m_c123tmap->draw(screen, bitmap, cliprect, pri >> 1); } - + m_c355spr->draw(screen, bitmap, cliprect, pri ); } diff --git a/src/mame/video/namconb1.cpp b/src/mame/video/namconb1.cpp index e04c49fd438..17705ccfaeb 100644 --- a/src/mame/video/namconb1.cpp +++ b/src/mame/video/namconb1.cpp @@ -123,7 +123,7 @@ uint32_t namconb1_state::screen_update_namconb1(screen_device &screen, bitmap_in /* intersect with master clip rectangle */ clip &= cliprect; - bitmap.fill(m_palette->black_pen(), cliprect ); + bitmap.fill(m_c116->black_pen(), cliprect ); video_update_common( screen, bitmap, clip, 0 ); @@ -163,7 +163,7 @@ uint32_t namconb1_state::screen_update_namconb2(screen_device &screen, bitmap_in /* intersect with master clip rectangle */ clip &= cliprect; - bitmap.fill(m_palette->black_pen(), cliprect ); + bitmap.fill(m_c116->black_pen(), cliprect ); if( memcmp(m_tilemap_tile_bank,m_tilebank32,sizeof(m_tilemap_tile_bank))!=0 ) { diff --git a/src/mame/video/namcos1.cpp b/src/mame/video/namcos1.cpp index 0caac817ce0..a87b9fc6d09 100644 --- a/src/mame/video/namcos1.cpp +++ b/src/mame/video/namcos1.cpp @@ -53,46 +53,18 @@ Namco System 1 Video Hardware ***************************************************************************/ -inline void namcos1_state::get_tile_info(tile_data &tileinfo,int tile_index,uint8_t *info_vram) +template <int Offset> +TILE_GET_INFO_MEMBER(namcos1_state::get_tile_info) { int code; tile_index <<= 1; - code = info_vram[tile_index + 1] + ((info_vram[tile_index] & 0x3f) << 8); + tile_index += Offset; + code = m_videoram[tile_index + 1] + ((m_videoram[tile_index] & 0x3f) << 8); SET_TILE_INFO_MEMBER(0,code,0,0); tileinfo.mask_data = &m_tilemap_maskdata[code << 3]; } -TILE_GET_INFO_MEMBER(namcos1_state::bg_get_info0) -{ - get_tile_info(tileinfo,tile_index,&m_videoram[0x0000]); -} - -TILE_GET_INFO_MEMBER(namcos1_state::bg_get_info1) -{ - get_tile_info(tileinfo,tile_index,&m_videoram[0x2000]); -} - -TILE_GET_INFO_MEMBER(namcos1_state::bg_get_info2) -{ - get_tile_info(tileinfo,tile_index,&m_videoram[0x4000]); -} - -TILE_GET_INFO_MEMBER(namcos1_state::bg_get_info3) -{ - get_tile_info(tileinfo,tile_index,&m_videoram[0x6000]); -} - -TILE_GET_INFO_MEMBER(namcos1_state::fg_get_info4) -{ - get_tile_info(tileinfo,tile_index,&m_videoram[0x7010]); -} - -TILE_GET_INFO_MEMBER(namcos1_state::fg_get_info5) -{ - get_tile_info(tileinfo,tile_index,&m_videoram[0x7810]); -} - /*************************************************************************** @@ -105,15 +77,13 @@ void namcos1_state::video_start() { int i; - m_tilemap_maskdata = (uint8_t *)memregion("gfx1")->base(); - /* initialize playfields */ - m_bg_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos1_state::bg_get_info0),this),TILEMAP_SCAN_ROWS,8,8,64,64); - m_bg_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos1_state::bg_get_info1),this),TILEMAP_SCAN_ROWS,8,8,64,64); - m_bg_tilemap[2] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos1_state::bg_get_info2),this),TILEMAP_SCAN_ROWS,8,8,64,64); - m_bg_tilemap[3] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos1_state::bg_get_info3),this),TILEMAP_SCAN_ROWS,8,8,64,32); - m_bg_tilemap[4] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos1_state::fg_get_info4),this),TILEMAP_SCAN_ROWS,8,8,36,28); - m_bg_tilemap[5] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos1_state::fg_get_info5),this),TILEMAP_SCAN_ROWS,8,8,36,28); + m_bg_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos1_state::get_tile_info<0x0000>),this),TILEMAP_SCAN_ROWS,8,8,64,64); + m_bg_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos1_state::get_tile_info<0x2000>),this),TILEMAP_SCAN_ROWS,8,8,64,64); + m_bg_tilemap[2] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos1_state::get_tile_info<0x4000>),this),TILEMAP_SCAN_ROWS,8,8,64,64); + m_bg_tilemap[3] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos1_state::get_tile_info<0x6000>),this),TILEMAP_SCAN_ROWS,8,8,64,32); + m_bg_tilemap[4] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos1_state::get_tile_info<0x7010>),this),TILEMAP_SCAN_ROWS,8,8,36,28); + m_bg_tilemap[5] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos1_state::get_tile_info<0x7810>),this),TILEMAP_SCAN_ROWS,8,8,36,28); for (i = 0; i < 4; i++) { @@ -135,10 +105,10 @@ void namcos1_state::video_start() /* all palette entries are not affected by shadow sprites... */ for (i = 0;i < 0x2000;i++) - m_palette->shadow_table()[i] = i; + m_c116->shadow_table()[i] = i; /* ... except for tilemap colors */ for (i = 0x0800;i < 0x1000;i++) - m_palette->shadow_table()[i] = i + 0x0800; + m_c116->shadow_table()[i] = i + 0x0800; memset(m_playfield_control, 0, sizeof(m_playfield_control)); m_copy_sprites = 0; @@ -292,7 +262,7 @@ uint32_t namcos1_state::screen_update(screen_device &screen, bitmap_ind16 &bitma flip_screen_set(m_spriteram[0x0ff6] & 1); /* background color */ - bitmap.fill(m_palette->black_pen(), cliprect); + bitmap.fill(m_c116->black_pen(), cliprect); /* berabohm uses asymmetrical visibility windows to iris on the character */ i = m_c116->get_reg(0) - 1; // min x diff --git a/src/mame/video/namcos2.cpp b/src/mame/video/namcos2.cpp index c87c8770bc6..fae1c18fd5c 100644 --- a/src/mame/video/namcos2.cpp +++ b/src/mame/video/namcos2.cpp @@ -61,7 +61,7 @@ void namcos2_state::create_shadow_table() /* set table for sprite color == 0x0f */ for (int i = 0; i < 16 * 256; i++) { - m_palette->shadow_table()[i] = i + 0x2000; + m_c116->shadow_table()[i] = i + 0x2000; } } @@ -87,7 +87,7 @@ uint32_t namcos2_state::screen_update(screen_device &screen, bitmap_ind16 &bitma rectangle clip; int pri; - bitmap.fill(m_palette->black_pen(), cliprect); + bitmap.fill(m_c116->black_pen(), cliprect); apply_clip(clip, cliprect); /* HACK: enable ROZ layer only if it has priority > 0 */ @@ -114,22 +114,12 @@ uint32_t namcos2_state::screen_update(screen_device &screen, bitmap_ind16 &bitma /**************************************************************************/ -void namcos2_state::video_start_finallap() -{ - create_shadow_table(); -} - -void namcos2_state::video_start_finalap2() -{ - create_shadow_table(); -} - uint32_t namcos2_state::screen_update_finallap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { rectangle clip; int pri; - bitmap.fill(m_palette->black_pen(), cliprect); + bitmap.fill(m_c116->black_pen(), cliprect); apply_clip(clip, cliprect); for (pri = 0; pri < 16; pri++) @@ -171,7 +161,7 @@ uint32_t namcos2_state::screen_update_luckywld(screen_device &screen, bitmap_ind rectangle clip; int pri; - bitmap.fill(m_palette->black_pen(), cliprect); + bitmap.fill(m_c116->black_pen(), cliprect); apply_clip(clip, cliprect); for (pri = 0; pri < 16; pri++) @@ -181,10 +171,10 @@ uint32_t namcos2_state::screen_update_luckywld(screen_device &screen, bitmap_ind m_c123tmap->draw(screen, bitmap, clip, pri / 2); } m_c45_road->draw(bitmap, clip, pri); - + if (m_c169roz) m_c169roz->draw(screen, bitmap, clip, pri); - + m_c355spr->draw(screen, bitmap, clip, pri); } return 0; @@ -201,7 +191,7 @@ uint32_t namcos2_state::screen_update_sgunner(screen_device &screen, bitmap_ind1 rectangle clip; int pri; - bitmap.fill(m_palette->black_pen(), cliprect); + bitmap.fill(m_c116->black_pen(), cliprect); apply_clip(clip, cliprect); for (pri = 0; pri < 8; pri++) @@ -230,7 +220,7 @@ uint32_t namcos2_state::screen_update_metlhawk(screen_device &screen, bitmap_ind rectangle clip; int pri; - bitmap.fill(m_palette->black_pen(), cliprect); + bitmap.fill(m_c116->black_pen(), cliprect); apply_clip(clip, cliprect); for (pri = 0; pri < 16; pri++) diff --git a/src/mame/video/namcos21.cpp b/src/mame/video/namcos21.cpp deleted file mode 100644 index 620f0a01445..00000000000 --- a/src/mame/video/namcos21.cpp +++ /dev/null @@ -1,471 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Phil Stroffolino -/*************************************************************************** -Namco System 21 Video Hardware - -- sprite hardware is identical to Namco System NB1 -- there are no tilemaps -- 3d graphics are managed by DSP processors -*/ -/* Palette: - 0x0000..0x1fff sprite palettes (0x10 sets of 0x100 colors) - - 0x2000..0x3fff polygon palette bank0 (0x10 sets of 0x200 colors) - (in starblade, some palette animation effects are performed here) - - 0x4000..0x5fff polygon palette bank1 (0x10 sets of 0x200 colors) - - 0x6000..0x7fff polygon palette bank2 (0x10 sets of 0x200 colors) - - The polygon-dedicated color sets within a bank typically increase in - intensity from very dark to full intensity. - - Probably the selected palette is determined by most significant bits of z-code. - This is not yet hooked up. - */ - -#include "emu.h" -#include "includes/namcos21.h" - -#define FRAMEBUFFER_SIZE_IN_BYTES (sizeof(uint16_t)*NAMCOS21_POLY_FRAME_WIDTH*NAMCOS21_POLY_FRAME_HEIGHT) - -READ16_MEMBER(namcos21_state::winrun_gpu_color_r) -{ - return m_winrun_color; -} - -WRITE16_MEMBER(namcos21_state::winrun_gpu_color_w) -{ - COMBINE_DATA( &m_winrun_color ); -} - -READ16_MEMBER(namcos21_state::winrun_gpu_register_r) -{ - return m_winrun_gpu_register[offset]; -} - -WRITE16_MEMBER(namcos21_state::winrun_gpu_register_w) -{ - COMBINE_DATA( &m_winrun_gpu_register[offset] ); - m_screen->update_partial(m_screen->vpos()); -} - -WRITE16_MEMBER(namcos21_state::winrun_gpu_videoram_w) -{ - int color = data>>8; - int mask = data&0xff; - int i; - for( i=0; i<8; i++ ) - { - if( mask&(0x01<<i) ) - { - m_videoram[(offset+i)&0x7ffff] = color; - m_maskram[(offset+i)&0x7ffff] = mask; - } - } -} - -READ16_MEMBER(namcos21_state::winrun_gpu_videoram_r) -{ - return (m_videoram[offset]<<8) | m_maskram[offset]; -} - -void namcos21_state::allocate_poly_framebuffer() -{ - m_mpPolyFrameBufferZ = std::make_unique<uint16_t[]>(FRAMEBUFFER_SIZE_IN_BYTES/2 ); - m_mpPolyFrameBufferPens = std::make_unique<uint16_t[]>(FRAMEBUFFER_SIZE_IN_BYTES/2 ); - - m_mpPolyFrameBufferZ2 = std::make_unique<uint16_t[]>(FRAMEBUFFER_SIZE_IN_BYTES/2 ); - m_mpPolyFrameBufferPens2 = std::make_unique<uint16_t[]>(FRAMEBUFFER_SIZE_IN_BYTES/2 ); - - clear_poly_framebuffer(); - clear_poly_framebuffer(); -} - -void namcos21_state::clear_poly_framebuffer() -{ - /* swap work and visible framebuffers */ - m_mpPolyFrameBufferZ.swap(m_mpPolyFrameBufferZ2); - - m_mpPolyFrameBufferPens.swap(m_mpPolyFrameBufferPens2); - - /* wipe work zbuffer */ - for( int i = 0; i < NAMCOS21_POLY_FRAME_WIDTH*NAMCOS21_POLY_FRAME_HEIGHT; i++ ) - { - m_mpPolyFrameBufferZ[i] = 0x7fff; - } -} - -void namcos21_state::copy_visible_poly_framebuffer(bitmap_ind16 &bitmap, const rectangle &clip, int zlo, int zhi) -{ - /* blit the visible framebuffer */ - int sy; - for( sy=clip.top(); sy<=clip.bottom(); sy++ ) - { - uint16_t *dest = &bitmap.pix16(sy); - const uint16_t *pPen = m_mpPolyFrameBufferPens2.get()+NAMCOS21_POLY_FRAME_WIDTH*sy; - const uint16_t *pZ = m_mpPolyFrameBufferZ2.get()+NAMCOS21_POLY_FRAME_WIDTH*sy; - int sx; - for( sx=clip.left(); sx<=clip.right(); sx++ ) - { - int z = pZ[sx]; - //if( pZ[sx]!=0x7fff ) - if( z>=zlo && z<=zhi ) - { - dest[sx] = pPen[sx]; - } - } - } -} - - -/*********************************************************************************************/ - -#define SWAP(T,A,B) { const T *temp = A; A = B; B = temp; } - -void namcos21_state::renderscanline_flat(const edge *e1, const edge *e2, int sy, unsigned color, int depthcueenable) -{ - if( e1->x > e2->x ) - { - SWAP(edge,e1,e2); - } - - { - uint16_t *pDest = m_mpPolyFrameBufferPens.get() + sy*NAMCOS21_POLY_FRAME_WIDTH; - uint16_t *pZBuf = m_mpPolyFrameBufferZ.get() + sy*NAMCOS21_POLY_FRAME_WIDTH; - int x0 = (int)e1->x; - int x1 = (int)e2->x; - int w = x1-x0; - if( w ) - { - double z = e1->z; - double dz = (e2->z - e1->z)/w; - int x, crop; - crop = - x0; - if( crop>0 ) - { - z += crop*dz; - x0 = 0; - } - if( x1>NAMCOS21_POLY_FRAME_WIDTH-1 ) - { - x1 = NAMCOS21_POLY_FRAME_WIDTH-1; - } - - for( x=x0; x<x1; x++ ) - { - uint16_t zz = (uint16_t)z; - if( zz<pZBuf[x] ) - { - int pen = color; - if( depthcueenable && zz>0 ) - { - int depth = 0; - if( m_gametype == NAMCOS21_WINRUN91 ) - { - depth = (zz>>10)*0x100; - pen += depth; - } - else if( m_gametype == NAMCOS21_DRIVERS_EYES ) - { - depth = (zz>>10)*0x100; - pen -= depth; - } - else - { - depth = (zz>>11)*0x200; - pen -= depth; - } - } - pDest[x] = pen; - pZBuf[x] = zz; - } - z += dz; - } - } - } -} - -void namcos21_state::rendertri(const n21_vertex *v0, const n21_vertex *v1, const n21_vertex *v2, unsigned color, int depthcueenable) -{ - int dy,ystart,yend,crop; - - /* first, sort so that v0->y <= v1->y <= v2->y */ - for(;;) - { - if( v0->y > v1->y ) - { - SWAP(n21_vertex,v0,v1); - } - else if( v1->y > v2->y ) - { - SWAP(n21_vertex,v1,v2); - } - else - { - break; - } - } - - ystart = v0->y; - yend = v2->y; - dy = yend-ystart; - if( dy ) - { - int y; - edge e1; /* short edge (top and bottom) */ - edge e2; /* long (common) edge */ - - double dx2dy = (v2->x - v0->x)/dy; - double dz2dy = (v2->z - v0->z)/dy; - - double dx1dy; - double dz1dy; - - e2.x = v0->x; - e2.z = v0->z; - crop = -ystart; - if( crop>0 ) - { - e2.x += dx2dy*crop; - e2.z += dz2dy*crop; - } - - ystart = v0->y; - yend = v1->y; - dy = yend-ystart; - if( dy ) - { - e1.x = v0->x; - e1.z = v0->z; - - dx1dy = (v1->x - v0->x)/dy; - dz1dy = (v1->z - v0->z)/dy; - - crop = -ystart; - if( crop>0 ) - { - e1.x += dx1dy*crop; - e1.z += dz1dy*crop; - ystart = 0; - } - if( yend>NAMCOS21_POLY_FRAME_HEIGHT-1 ) yend = NAMCOS21_POLY_FRAME_HEIGHT-1; - - for( y=ystart; y<yend; y++ ) - { - renderscanline_flat(&e1, &e2, y, color, depthcueenable); - - e2.x += dx2dy; - e2.z += dz2dy; - - e1.x += dx1dy; - e1.z += dz1dy; - } - } - - ystart = v1->y; - yend = v2->y; - dy = yend-ystart; - if( dy ) - { - e1.x = v1->x; - e1.z = v1->z; - - dx1dy = (v2->x - v1->x)/dy; - dz1dy = (v2->z - v1->z)/dy; - - crop = -ystart; - if( crop>0 ) - { - e1.x += dx1dy*crop; - e1.z += dz1dy*crop; - ystart = 0; - } - if( yend>NAMCOS21_POLY_FRAME_HEIGHT-1 ) - { - yend = NAMCOS21_POLY_FRAME_HEIGHT-1; - } - for( y=ystart; y<yend; y++ ) - { - renderscanline_flat(&e1, &e2, y, color, depthcueenable); - - e2.x += dx2dy; - e2.z += dz2dy; - - e1.x += dx1dy; - e1.z += dz1dy; - } - } - } -} - -void namcos21_state::draw_quad(int sx[4], int sy[4], int zcode[4], int color) -{ - n21_vertex a,b,c,d; - int depthcueenable = 1; - /* - 0x0000..0x1fff sprite palettes (0x20 sets of 0x100 colors) - 0x2000..0x3fff polygon palette bank0 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) - 0x4000..0x5fff polygon palette bank1 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) - 0x6000..0x7fff polygon palette bank2 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) - */ - if( m_gametype == NAMCOS21_WINRUN91 ) - { - color = 0x4000|(color&0xff); - } - else if ( m_gametype == NAMCOS21_DRIVERS_EYES ) - { - color = 0x3f00|(color&0xff); - } - else - { /* map color code to hardware pen */ - int code = color>>8; - if( code&0x80 ) - { - color = color&0xff; -// color = 0x3e00|color; - color = 0x2100|color; - depthcueenable = 0; - } - else - { - color&=0xff; - color = 0x3e00|color; - if( (code&0x02)==0 ) - { - color|=0x100; - } - } - } - a.x = sx[0]; - a.y = sy[0]; - a.z = zcode[0]; - - b.x = sx[1]; - b.y = sy[1]; - b.z = zcode[1]; - - c.x = sx[2]; - c.y = sy[2]; - c.z = zcode[2]; - - d.x = sx[3]; - d.y = sy[3]; - d.z = zcode[3]; - - rendertri(&a, &b, &c, color, depthcueenable); - rendertri(&c, &d, &a, color, depthcueenable); -} - -VIDEO_START_MEMBER(namcos21_state,namcos21) -{ - if( m_gametype == NAMCOS21_WINRUN91 ) - { - m_videoram = std::make_unique<uint8_t[]>(0x80000); - m_maskram = std::make_unique<uint8_t[]>(0x80000); - } - allocate_poly_framebuffer(); -} - -uint32_t namcos21_state::screen_update_namcos21(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - //uint8_t *videoram = m_videoram.get(); - int pivot = 3; - int pri; - bitmap.fill(0xff, cliprect ); - - m_c355spr->draw(screen, bitmap, cliprect, 2 ); - //draw(screen, bitmap, cliprect, 14 ); //driver's eyes - - copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe); - - m_c355spr->draw(screen, bitmap, cliprect, 0 ); - m_c355spr->draw(screen, bitmap, cliprect, 1 ); - - copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf); - - /* draw high priority 2d sprites */ - for( pri=pivot; pri<8; pri++ ) - { - m_c355spr->draw(screen, bitmap, cliprect, pri ); - } - // draw(screen, bitmap, cliprect, 15 ); //driver's eyes - return 0; -} - -uint32_t namcos21_state::screen_update_driveyes(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - //uint8_t *videoram = m_videoram.get(); - int pivot = 3; - int pri; - bitmap.fill(0xff, cliprect ); - - m_c355spr->draw(screen, bitmap, cliprect, 2 ); - m_c355spr->draw(screen, bitmap, cliprect, 14 ); //driver's eyes - - copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe); - - m_c355spr->draw(screen, bitmap, cliprect, 0 ); - m_c355spr->draw(screen, bitmap, cliprect, 1 ); - - copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf); - - for (pri = pivot; pri < 8; pri++) - { - m_c355spr->draw(screen, bitmap, cliprect, pri); - } - - m_c355spr->draw(screen, bitmap, cliprect, 15 ); //driver's eyes - - return 0; - -} - -void namcos21_state::winrun_bitmap_draw(bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - uint8_t *videoram = m_videoram.get(); - //printf("%d %d (%d %d) - %04x %04x %04x|%04x %04x\n",cliprect.top(),cliprect.bottom(),m_screen->vpos(),m_gpu_intc->get_posirq_line(),m_winrun_gpu_register[0],m_winrun_gpu_register[2/2],m_winrun_gpu_register[4/2],m_winrun_gpu_register[0xa/2],m_winrun_gpu_register[0xc/2]); - - int yscroll = -cliprect.top()+(int16_t)m_winrun_gpu_register[0x2/2]; - int xscroll = 0;//m_winrun_gpu_register[0xc/2] >> 7; - int base = 0x1000+0x100*(m_winrun_color&0xf); - int sx,sy; - for( sy=cliprect.top(); sy<=cliprect.bottom(); sy++ ) - { - const uint8_t *pSource = &videoram[((yscroll+sy)&0x3ff)*0x200]; - uint16_t *pDest = &bitmap.pix16(sy); - for( sx=cliprect.left(); sx<=cliprect.right(); sx++ ) - { - int pen = pSource[(sx+xscroll) & 0x1ff]; - switch( pen ) - { - case 0xff: - break; - // TODO: additive blending? winrun car select uses register [0xc] for a xscroll value - case 0x00: - pDest[sx] = (pDest[sx]&0x1fff)+0x4000; - break; - case 0x01: - pDest[sx] = (pDest[sx]&0x1fff)+0x6000; - break; - default: - pDest[sx] = base|pen; - break; - } - } - } -} - - -uint32_t namcos21_state::screen_update_winrun(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - bitmap.fill(0xff, cliprect ); - - copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe); - copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf); - winrun_bitmap_draw(bitmap,cliprect); - - //popmessage("%04x %04x %04x|%04x %04x",m_winrun_gpu_register[0],m_winrun_gpu_register[2/2],m_winrun_gpu_register[4/2],m_winrun_gpu_register[0xa/2],m_winrun_gpu_register[0xc/2]); - - return 0; -} diff --git a/src/mame/video/namcos21_3d.cpp b/src/mame/video/namcos21_3d.cpp new file mode 100644 index 00000000000..9858a9afcf4 --- /dev/null +++ b/src/mame/video/namcos21_3d.cpp @@ -0,0 +1,311 @@ +// license:BSD-3-Clause +// copyright-holders:Phil Stroffolino, David Haywood + +#include "emu.h" +#include "namcos21_3d.h" + +DEFINE_DEVICE_TYPE(NAMCOS21_3D, namcos21_3d_device, "namcos21_3d", "Namco System 21 3D Rasterizer") + +namcos21_3d_device::namcos21_3d_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, NAMCOS21_3D, tag, owner, clock), + m_fixed_palbase(-1), + m_zz_shift(10), + m_zzmult(0x100), + m_depth_reverse(false), + m_poly_frame_width(0), + m_poly_frame_height(0), + m_framebuffer_size_in_bytes(0) +{ +} + +void namcos21_3d_device::device_start() +{ + allocate_poly_framebuffer(); +} + +void namcos21_3d_device::device_reset() +{ +} + +void namcos21_3d_device::allocate_poly_framebuffer() +{ + if (m_framebuffer_size_in_bytes == 0) + fatalerror("m_framebuffer_size_in_bytes == 0\n"); + + m_mpPolyFrameBufferZ = std::make_unique<uint16_t[]>(m_framebuffer_size_in_bytes / 2); + m_mpPolyFrameBufferPens = std::make_unique<uint16_t[]>(m_framebuffer_size_in_bytes / 2); + + m_mpPolyFrameBufferZ2 = std::make_unique<uint16_t[]>(m_framebuffer_size_in_bytes / 2); + m_mpPolyFrameBufferPens2 = std::make_unique<uint16_t[]>(m_framebuffer_size_in_bytes / 2); + + swap_and_clear_poly_framebuffer(); + swap_and_clear_poly_framebuffer(); +} + +void namcos21_3d_device::swap_and_clear_poly_framebuffer() +{ + /* swap work and visible framebuffers */ + m_mpPolyFrameBufferZ.swap(m_mpPolyFrameBufferZ2); + + m_mpPolyFrameBufferPens.swap(m_mpPolyFrameBufferPens2); + + /* wipe work zbuffer */ + for (int i = 0; i < m_poly_frame_width*m_poly_frame_height; i++) + { + m_mpPolyFrameBufferZ[i] = 0x7fff; + } +} + +void namcos21_3d_device::copy_visible_poly_framebuffer(bitmap_ind16 &bitmap, const rectangle &clip, int zlo, int zhi) +{ + /* blit the visible framebuffer */ + int sy; + for (sy = clip.top(); sy <= clip.bottom(); sy++) + { + uint16_t *dest = &bitmap.pix16(sy); + const uint16_t *pPen = m_mpPolyFrameBufferPens2.get() + m_poly_frame_width * sy; + const uint16_t *pZ = m_mpPolyFrameBufferZ2.get() + m_poly_frame_width * sy; + int sx; + for (sx = clip.left(); sx <= clip.right(); sx++) + { + int z = pZ[sx]; + //if( pZ[sx]!=0x7fff ) + if (z >= zlo && z <= zhi) + { + dest[sx] = pPen[sx]; + } + } + } +} + +/*********************************************************************************************/ + +#define SWAP(T,A,B) { const T *temp = A; A = B; B = temp; } + +void namcos21_3d_device::renderscanline_flat(const edge *e1, const edge *e2, int sy, unsigned color, int depthcueenable) +{ + if (e1->x > e2->x) + { + SWAP(edge, e1, e2); + } + + { + uint16_t *pDest = m_mpPolyFrameBufferPens.get() + sy * m_poly_frame_width; + uint16_t *pZBuf = m_mpPolyFrameBufferZ.get() + sy * m_poly_frame_width; + int x0 = (int)e1->x; + int x1 = (int)e2->x; + int w = x1 - x0; + if (w) + { + double z = e1->z; + double dz = (e2->z - e1->z) / w; + int x, crop; + crop = -x0; + if (crop > 0) + { + z += crop * dz; + x0 = 0; + } + if (x1 > m_poly_frame_width - 1) + { + x1 = m_poly_frame_width - 1; + } + + for (x = x0; x < x1; x++) + { + uint16_t zz = (uint16_t)z; + if (zz < pZBuf[x]) + { + int pen = color; + if (depthcueenable && zz > 0) + { + int depth = 0; + if (m_depth_reverse) + { + depth = (zz >> m_zz_shift)*m_zzmult; + pen += depth; + } + else + { + depth = (zz >> m_zz_shift)*m_zzmult; + pen -= depth; + } + } + pDest[x] = pen; + pZBuf[x] = zz; + } + z += dz; + } + } + } +} + +void namcos21_3d_device::rendertri(const n21_vertex *v0, const n21_vertex *v1, const n21_vertex *v2, unsigned color, int depthcueenable) +{ + int dy, ystart, yend, crop; + + /* first, sort so that v0->y <= v1->y <= v2->y */ + for (;;) + { + if (v0->y > v1->y) + { + SWAP(n21_vertex, v0, v1); + } + else if (v1->y > v2->y) + { + SWAP(n21_vertex, v1, v2); + } + else + { + break; + } + } + + ystart = v0->y; + yend = v2->y; + dy = yend - ystart; + if (dy) + { + int y; + edge e1; /* short edge (top and bottom) */ + edge e2; /* long (common) edge */ + + double dx2dy = (v2->x - v0->x) / dy; + double dz2dy = (v2->z - v0->z) / dy; + + double dx1dy; + double dz1dy; + + e2.x = v0->x; + e2.z = v0->z; + crop = -ystart; + if (crop > 0) + { + e2.x += dx2dy * crop; + e2.z += dz2dy * crop; + } + + ystart = v0->y; + yend = v1->y; + dy = yend - ystart; + if (dy) + { + e1.x = v0->x; + e1.z = v0->z; + + dx1dy = (v1->x - v0->x) / dy; + dz1dy = (v1->z - v0->z) / dy; + + crop = -ystart; + if (crop > 0) + { + e1.x += dx1dy * crop; + e1.z += dz1dy * crop; + ystart = 0; + } + if (yend > m_poly_frame_height - 1) yend = m_poly_frame_height - 1; + + for (y = ystart; y < yend; y++) + { + renderscanline_flat(&e1, &e2, y, color, depthcueenable); + + e2.x += dx2dy; + e2.z += dz2dy; + + e1.x += dx1dy; + e1.z += dz1dy; + } + } + + ystart = v1->y; + yend = v2->y; + dy = yend - ystart; + if (dy) + { + e1.x = v1->x; + e1.z = v1->z; + + dx1dy = (v2->x - v1->x) / dy; + dz1dy = (v2->z - v1->z) / dy; + + crop = -ystart; + if (crop > 0) + { + e1.x += dx1dy * crop; + e1.z += dz1dy * crop; + ystart = 0; + } + if (yend > m_poly_frame_height - 1) + { + yend = m_poly_frame_height - 1; + } + for (y = ystart; y < yend; y++) + { + renderscanline_flat(&e1, &e2, y, color, depthcueenable); + + e2.x += dx2dy; + e2.z += dz2dy; + + e1.x += dx1dy; + e1.z += dz1dy; + } + } + } +} + +void namcos21_3d_device::draw_quad(int sx[4], int sy[4], int zcode[4], int color) +{ + n21_vertex a, b, c, d; + int depthcueenable = 1; + /* + 0x0000..0x1fff sprite palettes (0x20 sets of 0x100 colors) + 0x2000..0x3fff polygon palette bank0 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) + 0x4000..0x5fff polygon palette bank1 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) + 0x6000..0x7fff polygon palette bank2 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) + */ + + + if (m_fixed_palbase != -1) + { + // Winning Run & Driver's Eyes use this logic + color = m_fixed_palbase | (color & 0xff); + } + else + { /* map color code to hardware pen */ + int code = color >> 8; + if (code & 0x80) + { + color = color & 0xff; + // color = 0x3e00|color; + color = 0x2100 | color; + depthcueenable = 0; + } + else + { + color &= 0xff; + color = 0x3e00 | color; + if ((code & 0x02) == 0) + { + color |= 0x100; + } + } + } + a.x = sx[0]; + a.y = sy[0]; + a.z = zcode[0]; + + b.x = sx[1]; + b.y = sy[1]; + b.z = zcode[1]; + + c.x = sx[2]; + c.y = sy[2]; + c.z = zcode[2]; + + d.x = sx[3]; + d.y = sy[3]; + d.z = zcode[3]; + + rendertri(&a, &b, &c, color, depthcueenable); + rendertri(&c, &d, &a, color, depthcueenable); +} diff --git a/src/mame/video/namcos21_3d.h b/src/mame/video/namcos21_3d.h new file mode 100644 index 00000000000..2973e0a6df2 --- /dev/null +++ b/src/mame/video/namcos21_3d.h @@ -0,0 +1,71 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +#ifndef MAME_VIDEO_NAMCOS21_3D_H +#define MAME_VIDEO_NAMCOS21_3D_H + +#pragma once + +class namcos21_3d_device : public device_t +{ +public: + namcos21_3d_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // config + void set_fixed_palbase(int base) { m_fixed_palbase = base; } + void set_zz_shift_mult(int shift, int mult) { m_zz_shift = shift; m_zzmult = mult; } + void set_depth_reverse(bool reverse) { m_depth_reverse = reverse; } + + void set_framebuffer_size(int width, int height) + { + m_poly_frame_width = width; + m_poly_frame_height = height; + m_framebuffer_size_in_bytes = (sizeof(uint16_t)*m_poly_frame_width*m_poly_frame_height); + } + + int get_width() { return m_poly_frame_width; } + int get_height() { return m_poly_frame_height; } + + void copy_visible_poly_framebuffer(bitmap_ind16 &bitmap, const rectangle &clip, int zlo, int zhi); + void swap_and_clear_poly_framebuffer(); + + void draw_quad(int sx[4], int sy[4], int zcode[4], int color); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + +private: + struct n21_vertex + { + double x,y; + double z; + }; + + struct edge + { + double x; + double z; + }; + + void renderscanline_flat(const edge *e1, const edge *e2, int sy, unsigned color, int depthcueenable); + void rendertri(const n21_vertex *v0, const n21_vertex *v1, const n21_vertex *v2, unsigned color, int depthcueenable); + void allocate_poly_framebuffer(); + + std::unique_ptr<uint16_t[]> m_mpPolyFrameBufferPens; + std::unique_ptr<uint16_t[]> m_mpPolyFrameBufferZ; + std::unique_ptr<uint16_t[]> m_mpPolyFrameBufferPens2; + std::unique_ptr<uint16_t[]> m_mpPolyFrameBufferZ2; + + int m_fixed_palbase; + int m_zz_shift, m_zzmult; + bool m_depth_reverse; + + int m_poly_frame_width; + int m_poly_frame_height; + int m_framebuffer_size_in_bytes; +}; + +DECLARE_DEVICE_TYPE(NAMCOS21_3D, namcos21_3d_device) + +#endif // MAME_VIDEO_NAMCOS21_3D_H diff --git a/src/mame/video/namcos22.cpp b/src/mame/video/namcos22.cpp index f5765af21d6..78060588b4a 100644 --- a/src/mame/video/namcos22.cpp +++ b/src/mame/video/namcos22.cpp @@ -1,43 +1,10 @@ // license:BSD-3-Clause // copyright-holders:Phil Stroffolino, hap, R. Belmont -/** - * video hardware for Namco System22 - * - * TODO: - * - * - emulate slave dsp! - * - texture u/v mapping is often 1 pixel off, resulting in many glitch lines/gaps between textures. The glitch may be in MAME core: - * it used to be much worse with the legacy_poly_manager - * - tokyowar tanks are not shootable, same for timecris helicopter, there's still a very small hitbox but almost impossible to hit. - * airco22b may have a similar problem. (is this related to dsp? or cpu?) - * - find out how/where vics num_sprites is determined exactly, currently a workaround is needed for airco22b and dirtdash - * - improve ss22 fogging: - * + scene changes too rapidly sometimes, eg. dirtdash snow level finish (see attract), or aquajet going down the waterfall - * + 100% fog if you start dirtdash at the hill level - * - improve ss22 lighting, eg. mountains in alpinr2b selection screen - * - improve ss22 spot: - * + dirtdash spotlight is opaque for a short time when exiting the jungle level - * + dirtdash speedometer has wrong colors when in the jungle level - * + dirtdash record time message creates a 'gap' in the spotlight when entering the jungle level (possibly just a game bug?) - * - add layer enable in system 22, see bugs in cybrcomm and victlapw - * - window clipping is wrong in acedrvrw, victlapw - * - ridgerac waving flag title screen is missing, just an empty beach scenery instead - * - global offset is wrong in non-super22 servicemode video test, and above that, it flickers in acedrvrw, victlapw - * - dirtdash polys are broken at the start section of the mountain level, maybe bad rom? - * - alpinr2b skiier selection screen should have mirrored models (easiest to see with cursor on the red pants guy). specular reflection? - * - propcycl scoreboard sprite part should fade out in attract mode and just before game over, fader or fog related? - * - ridgerac fogging isn't applied to the upper/side part of the sky (best seen when driving down a hill), it's fine in ridgera2 - * czram contents is rather odd here and partly cleared (probably the cause?): - * $0000-$0d7f - gradual increase from $00-$7c - * $0d80-$0fff - $73, huh, why lower? - * $1000-$19ff - $00, huh!? (it's specifically cleared, memsetting czram at boot does not fix the issue) - * $1a00-$0dff - $77 - * $1e00-$1fff - $78 - * - * - lots of smaller issues - * - * - *******************************/ +/* + + Namco System22 + System Super22 video hardware emulation + +*/ #include "emu.h" #include "includes/namcos22.h" @@ -47,9 +14,11 @@ namcos22_renderer::namcos22_renderer(namcos22_state &state) : poly_manager<float, namcos22_object_data, 4, 8000>(state.machine()), m_state(state) - { } + { + init(); + } -void namcos22_renderer::reset() +void namcos22_renderer::init() { memset(&m_scenenode_root, 0, sizeof(m_scenenode_root)); m_scenenode_cur = nullptr; @@ -60,9 +29,6 @@ void namcos22_renderer::reset() } - -/*********************************************************************************************/ - // poly scanline callbacks void namcos22_renderer::renderscanline_uvi_full(int32_t scanline, const extent_t &extent, const namcos22_object_data &extra, int threadid) { @@ -76,7 +42,7 @@ void namcos22_renderer::renderscanline_uvi_full(int32_t scanline, const extent_t float di = extent.param[3].dpdx; int bn = extra.bn * 0x1000; const pen_t *pens = extra.pens; - const uint8_t *czram = extra.czram; + const u8 *czram = extra.czram; int cz_adjust = extra.cz_adjust; int cz_sdelta = extra.cz_sdelta; int zfog_enabled = extra.zfog_enabled; @@ -90,12 +56,12 @@ void namcos22_renderer::renderscanline_uvi_full(int32_t scanline, const extent_t int penmask = 0xff; int penshift = 0; int prioverchar = extra.prioverchar; - uint32_t *dest = &extra.destbase->pix32(scanline); - uint8_t *primap = &extra.primap->pix8(scanline); - uint16_t *ttmap = m_state.m_texture_tilemap; - uint8_t *ttattr = m_state.m_texture_tileattr.get(); - uint8_t *ttdata = m_state.m_texture_tiledata; - uint8_t *tt_ayx_to_pixel = m_state.m_texture_ayx_to_pixel.get(); + u32 *dest = &extra.destbase->pix32(scanline); + u8 *primap = &extra.primap->pix8(scanline); + u16 *ttmap = m_state.m_texture_tilemap; + u8 *ttattr = m_state.m_texture_tileattr.get(); + u8 *ttdata = m_state.m_texture_tiledata; + u8 *tt_ayx_to_pixel = m_state.m_texture_ayx_to_pixel.get(); if (extra.cmode & 4) { @@ -111,23 +77,23 @@ void namcos22_renderer::renderscanline_uvi_full(int32_t scanline, const extent_t } // slight differences between super and non-super, do the branch here for optimization - // normal: 1 fader, no alpha, shading after fog + // normal: no alpha, shading after fog, global fader // super: 2 faders, alpha, shading before fog if (m_state.m_is_ss22) { for (int x = extent.startx; x < extent.stopx; x++) { float ooz = 1.0f / z; - int32_t tx = (int)(u * ooz); - int32_t ty = (int)(v * ooz) + bn; - int32_t to = ((ty & 0xfff0) << 4) | ((tx & 0xff0) >> 4); - int32_t pen = ttdata[(ttmap[to] << 8) | tt_ayx_to_pixel[ttattr[to] << 8 | (ty << 4 & 0xf0) | (tx & 0xf)]]; + int tx = (int)(u * ooz); + int ty = (int)(v * ooz) + bn; + int to = ((ty & 0xfff0) << 4) | ((tx & 0xff0) >> 4); + int pen = ttdata[(ttmap[to] << 8) | tt_ayx_to_pixel[ttattr[to] << 8 | (ty << 4 & 0xf0) | (tx & 0xf)]]; // pen = 0x55; // debug: disable textures rgbaint_t rgb(pens[pen >> penshift & penmask]); // apply shading before fog - int32_t shade = i*ooz; + int shade = i*ooz; rgb.scale_imm_and_clamp(shade << 2); // per-z distance fogging @@ -135,7 +101,7 @@ void namcos22_renderer::renderscanline_uvi_full(int32_t scanline, const extent_t { int cz = ooz + cz_adjust; // discard low byte and clamp to 0-1fff - if ((uint32_t)cz < 0x200000) cz >>= 8; + if ((u32)cz < 0x200000) cz >>= 8; else cz = (cz < 0) ? 0 : 0x1fff; fogfactor = czram[cz] + cz_sdelta; if (fogfactor > 0) @@ -191,7 +157,7 @@ void namcos22_renderer::renderscanline_uvi_full(int32_t scanline, const extent_t { int cz = ooz + cz_adjust; // discard low byte and clamp to 0-1fff - if ((uint32_t)cz < 0x200000) cz >>= 8; + if ((u32)cz < 0x200000) cz >>= 8; else cz = (cz < 0) ? 0 : 0x1fff; fogfactor = czram[NATIVE_ENDIAN_VALUE_LE_BE(3, 0) ^ cz]; if (fogfactor != 0) @@ -208,11 +174,6 @@ void namcos22_renderer::renderscanline_uvi_full(int32_t scanline, const extent_t int shade = i*ooz; rgb.scale_imm_and_clamp(shade << 2); - if (polyfade_enabled) - { - rgb.scale_and_clamp(polycolor); - } - dest[x] = rgb.to_rgba(); primap[x] |= prioverchar; @@ -237,9 +198,9 @@ void namcos22_renderer::renderscanline_sprite(int32_t scanline, const extent_t & int fadefactor = 0xff - extra.fadefactor; rgbaint_t fogcolor(extra.fogcolor); rgbaint_t fadecolor(extra.fadecolor); - uint8_t *source = (uint8_t *)extra.source + y_index * extra.line_modulo; - uint32_t *dest = &extra.destbase->pix32(scanline); - uint8_t *primap = &extra.primap->pix8(scanline); + u8 *source = (u8 *)extra.source + y_index * extra.line_modulo; + u32 *dest = &extra.destbase->pix32(scanline); + u8 *primap = &extra.primap->pix8(scanline); for (int x = extent.startx; x < extent.stopx; x++) { @@ -308,10 +269,11 @@ void namcos22_renderer::poly3d_drawquad(screen_device &screen, bitmap_rgb32 &bit m_clipx = cx; m_clipy = cy; m_cliprect.set( - std::max<s32>(cx + node->data.quad.vw, 0), - std::min<s32>(cx - node->data.quad.vw, 639), - std::max<s32>(cy + node->data.quad.vh, 0), - std::min<s32>(cy - node->data.quad.vh, 479)); + std::max<s32>(cx + node->data.quad.vw, 0), + std::min<s32>(cx - node->data.quad.vw, 639), + std::max<s32>(cy + node->data.quad.vh, 0), + std::min<s32>(cy - node->data.quad.vh, 479) + ); // non-direct case: project and z-clip if (!direct) @@ -372,83 +334,29 @@ void namcos22_renderer::poly3d_drawquad(screen_device &screen, bitmap_rgb32 &bit extra.pfade_enabled = m_state.m_poly_fade_enabled; extra.polycolor.set(0, m_state.m_poly_fade_r, m_state.m_poly_fade_g, m_state.m_poly_fade_b); - /* poly fog (not completely accurate yet) - - czram contents, it's basically a big cz compare table - - testmode: - o_16 0 1 2 3 4 5 6 7 < > f8 f9 fa fb fc fd fe ff - czram[0] = 1fff 1fdf 1fbf 1f9f 1f7f 1f5f 1f3f 1f1f .... 00ff 00df 00bf 009f 007f 005f 003f 001f - czram[1] = 0000 0000 0000 0001 0002 0003 0005 0007 .... 1e45 1e83 1ec2 1f01 1f40 1f7f 1fbf 1fff - czram[2] = 003f 007f 00be 00fd 013c 017b 01b9 01f7 .... 1ff9 1ffb 1ffc 1ffd 1ffe 1fff 1fff 1fff - czram[3] = 0000 001f 003f 005f 007f 009f 00bf 00df .... 1eff 1f1f 1f3f 1f5f 1f7f 1f9f 1fbf 1fdf - - airco22b demo mode, fog color: 76 9a c3 - o_16 0 1 2 3 4 5 6 7 < > f8 f9 fa fb fc fd fe ff - czram[0] = 0000 00e4 0141 0189 01c6 01fb 022c 0258 .... 13bb 13c4 13cd 13d6 13df 13e7 13f0 13f9 - - alpinerd (1st course), fog color: c8 c8 c8 - o_16 0 1 2 3 4 5 6 7 < > ec ed ee ef f0 f1 f2 - ff - czram[0] = 00c8 00ca 00cc 00ce 00d0 00d2 00d4 00d6 .... 02a0 02a2 02a4 02a6 02a8 1fff 1fff .... - - alpinr2b (1st course), fog color: ff ff ff - alpinr2b start of race: - gets gradually filled from left to right, initial contents filled with 1fff? - game should be foggy here - o_16 0 1 2 3 4 5 6 7 < > 67 68 69 6a 6b 6c 6d - ff - czram[0] = 01cd 01d7 01e1 01eb 01f5 01ff 0209 0213 .... 05d3 05dd 05e7 05f1 05fb 1fff 1fff .... - other banks unused, zerofilled - alpinr2b mid race: - gets gradually filled from right to left, initial contents above - game should not be foggy here - o_16 0 1 2 3 4 5 6 7 < > ec ed ee ef f0 f1 f2 - ff - czram[0] = 1ffe 1fff 1fff 1fff 1fff 1fff 1fff 1fff .... 1fff 1fff 1fff 1fff 1fff 1fff 1fff 1fff - - cybrcycc (1st course), fog color: 80 80 c0 - 2nd course has same cz table, but fog color 00 00 00 - o_16 0 1 2 3 4 5 6 7 < > d4 d5 d6 d7 d8 d9 da - ff - czram[0] = 0000 0011 0021 0031 0041 0051 0060 0061 .... 04e0 04e4 04e7 04eb 04ee 1fff 1fff .... - - tokyowar, fog color: 80 c0 ff - it uses cztype 1 too by accident? (becomes fogfactor 0) - o_16 0 1 2 3 4 5 6 7 < > f8 f9 fa fb fc fd fe ff - czram[0] = 0000 01c5 0244 029f 02e7 0325 035b 038b .... 0eaf 0ec7 0ee0 0efc 0f1b 0f3f 0f6a 0faa - czram[1] = 0000 0000 0000 0000 0000 0000 0000 0000 .... 0000 0000 0000 0000 0000 0000 0000 0000 - czram[2] = 0000 0000 0000 0000 0000 0000 0000 0000 .... 0000 0000 0000 0000 0000 0000 0000 0000 - czram[3] = 0000 00e8 0191 0206 0265 02b7 0301 0345 .... 1c7e 1cbc 1d00 1d4a 1d9c 1dfb 1e70 1f19 - - */ - - /* czattr: - assumed that it's write-only - 0 2 4 6 8 a c e - ^^^^ ^^^^ ^^^^ ^^^^ cz offset, signed16 per cztype 0,1,2,3 - ^^^^ flags, nybble per cztype 3,2,1,0 - 4 probably means enable - ^^^^ maincpu ram access bank - ^^^^ flags, nybble per cztype 3,2,1,0 - ? - ^^^^ ? (only set sometimes in timecris) - 0000 0000 0000 0000 7555 0000 00e4 0000 // testmode normal - 0=white to black(mid), 1=white to black(weak), 2=white to black(strong), 3=black to white(mid, reverse of 0) - 7fff 8000 7fff 8000 7555 0000 00e4 0000 // testmode offset - 0=black, 1=white, 2=black, 3=white - 0000 0000 0000 0000 3111 0000 00e4 0000 // testmode off - 0=white, 1=white, 2=white, 3=white - 0000 0000 0000 0000 4444 0000 0000 0000 // propcycl solitar - 0004 0004 0004 0004 4444 0000 0000 0000 // propcycl out pool - 00a4 00a4 00a4 00a4 4444 0000 0000 0000 // propcycl in pool - ff80 ff80 ff80 ff80 4444 0000 0000 0000 // propcycl ending - ff80 ff80 ff80 ff80 0000 0000 0000 0000 // propcycl hs entry - 0000 0000 0000 0000 0b6c 0000 00e4 0000 // cybrcycc - 0000 0000 0000 0000 5554 0000 00e4 0000 // airco22b - ff01 ff01 0000 0000 4444 0000 0000 0000 // alpinerd - 0000 0000 0000 0000 4455 0000 000a 0000 // alpinr2b - 8001 8001 0000 0000 1111 0000 5555 0000 // aquajet (reg 8 is either 1111 or 5555, reg c is usually interlaced) - 0000 0000 0000 0000 5554 0000 0000 0000 // tokyowar - */ + // poly fog if (~color & 0x80) { int cztype = flags & 3; - if (nthword(m_state.m_czattr, 4) & (4 << (cztype * 4))) + int bank = m_state.m_czattr[6] >> (cztype * 2) & 3; + int bank_enabled = m_state.m_czattr[4] >> (bank * 4) & 4; + + if (bank_enabled) { - int delta = (int16_t)nthword(m_state.m_czattr, cztype); + s16 delta = m_state.m_czattr[bank]; + // sign-extend + if (delta < 0) delta |= 0xff00; + else delta &= 0x00ff; + extra.fogcolor.set(0, m_state.m_fog_r, m_state.m_fog_g, m_state.m_fog_b); + if (direct) { int cz = ((flags & 0x1fff00) + cz_adjust) >> 8; if (cz < 0) cz = 0; else if (cz > 0x1fff) cz = 0x1fff; - int fogfactor = m_state.m_recalc_czram[cztype][cz] + delta; + int fogfactor = m_state.m_recalc_czram[bank][cz] + delta; if (fogfactor > 0) { if (fogfactor > 0xff) fogfactor = 0xff; @@ -459,7 +367,7 @@ void namcos22_renderer::poly3d_drawquad(screen_device &screen, bitmap_rgb32 &bit { extra.zfog_enabled = 1; extra.cz_sdelta = delta; - extra.czram = m_state.m_recalc_czram[cztype].get(); + extra.czram = m_state.m_recalc_czram[bank].get(); } } } @@ -467,13 +375,6 @@ void namcos22_renderer::poly3d_drawquad(screen_device &screen, bitmap_rgb32 &bit else { - // global fade - if (m_state.m_mixer_flags & 1) - { - extra.pfade_enabled = m_state.m_poly_fade_enabled; - extra.polycolor.set(0, m_state.m_poly_fade_r, m_state.m_poly_fade_g, m_state.m_poly_fade_b); - } - // poly fog if (~color & 0x80) { @@ -492,7 +393,7 @@ void namcos22_renderer::poly3d_drawquad(screen_device &screen, bitmap_rgb32 &bit else { extra.zfog_enabled = 1; - extra.czram = (uint8_t*)&m_state.m_czram[cztype << (13-2)]; + extra.czram = (u8*)&m_state.m_czram[cztype << (13-2)]; } } } @@ -504,13 +405,14 @@ void namcos22_renderer::poly3d_drawquad(screen_device &screen, bitmap_rgb32 &bit void namcos22_renderer::poly3d_drawsprite( screen_device &screen, bitmap_rgb32 &dest_bmp, - uint32_t code, - uint32_t color, + u32 code, + u32 color, int flipx, int flipy, int sx, int sy, int scalex, int scaley, int cz_factor, int prioverchar, + int fade_enabled, int alpha ) { @@ -561,16 +463,15 @@ void namcos22_renderer::poly3d_drawsprite( vert[3].p[1] = fheight; // global fade - if (m_state.m_mixer_flags & 2) + if (m_state.m_mixer_flags & 2 || fade_enabled) { extra.fadefactor = m_state.m_screen_fade_factor; extra.fadecolor.set(0, m_state.m_screen_fade_r, m_state.m_screen_fade_g, m_state.m_screen_fade_b); } - // fog, 0xfe is a special case for sprite priority over textlayer - if (~color & 0x80 && cz_factor > 0 && cz_factor != 0xfe) + // sprite fog + if (~color & 0x80 && cz_factor > 0) { - // or does it fetch from poly-cz ram? that will break timecris though extra.fogfactor = cz_factor; extra.fogcolor.set(0, m_state.m_fog_r, m_state.m_fog_g, m_state.m_fog_b); } @@ -579,15 +480,15 @@ void namcos22_renderer::poly3d_drawsprite( } } - void namcos22_renderer::render_sprite(screen_device &screen, bitmap_rgb32 &bitmap, struct namcos22_scenenode *node) { // scene clip m_cliprect.set( - std::max<s32>(node->data.sprite.cx_min, 0), - std::min<s32>(node->data.sprite.cx_max, 639), - std::max<s32>(node->data.sprite.cy_min, 0), - std::min<s32>(node->data.sprite.cy_max, 479)); + std::max<s32>(node->data.sprite.cx_min, 0), + std::min<s32>(node->data.sprite.cx_max, 639), + std::max<s32>(node->data.sprite.cy_min, 0), + std::min<s32>(node->data.sprite.cy_max, 479) + ); int offset = 0; @@ -602,19 +503,21 @@ void namcos22_renderer::render_sprite(screen_device &screen, bitmap_rgb32 &bitma code += nthword(&m_state.m_spriteram[0x800/4], offset + node->data.sprite.linktype*4); poly3d_drawsprite( - screen, - bitmap, - code, - node->data.sprite.color, - node->data.sprite.flipx, - node->data.sprite.flipy, - node->data.sprite.xpos + col * node->data.sprite.sizex, - node->data.sprite.ypos + row * node->data.sprite.sizey, - (node->data.sprite.sizex << 16) / 32, - (node->data.sprite.sizey << 16) / 32, - node->data.sprite.cz, - node->data.sprite.pri, - 0xff - node->data.sprite.translucency); + screen, + bitmap, + code, + node->data.sprite.color, + node->data.sprite.flipx, + node->data.sprite.flipy, + node->data.sprite.xpos + col * node->data.sprite.sizex, + node->data.sprite.ypos + row * node->data.sprite.sizey, + (node->data.sprite.sizex << 16) / 32, + (node->data.sprite.sizey << 16) / 32, + node->data.sprite.cz, + node->data.sprite.prioverchar, + node->data.sprite.fade_enabled, + 0xff - node->data.sprite.translucency + ); offset++; } } @@ -645,7 +548,7 @@ struct namcos22_scenenode *namcos22_renderer::alloc_scenenode(running_machine &m return node; } -struct namcos22_scenenode *namcos22_renderer::new_scenenode(running_machine &machine, uint32_t zsort, namcos22_scenenode_type type) +struct namcos22_scenenode *namcos22_renderer::new_scenenode(running_machine &machine, u32 zsort, namcos22_scenenode_type type) { struct namcos22_scenenode *node = &m_scenenode_root; struct namcos22_scenenode *prev = nullptr; @@ -743,9 +646,9 @@ void namcos22_renderer::render_scene(screen_device &screen, bitmap_rgb32 &bitmap // slave dsp render -float namcos22_state::dspfloat_to_nativefloat(uint32_t val) +float namcos22_state::dspfloat_to_nativefloat(u32 val) { - int16_t mantissa = (int16_t)val; + s16 mantissa = (s16)val; float result = mantissa;//?((float)mantissa):((float)0x10000); int exponent = (val >> 16) & 0xff; while (exponent < 0x2e) @@ -756,12 +659,12 @@ float namcos22_state::dspfloat_to_nativefloat(uint32_t val) return result; } -/* modal rendering properties */ +// model rendering properties void namcos22_state::matrix3d_multiply(float a[4][4], float b[4][4]) { - float temp[4][4]; + float result[4][4]; - for (int row = 0; row < 4; row++) + for (int row = 0; row < 4; row++) { for (int col = 0; col < 4; col++) { @@ -770,24 +673,40 @@ void namcos22_state::matrix3d_multiply(float a[4][4], float b[4][4]) { sum += a[row][i] * b[i][col]; } - temp[row][col] = sum; + result[row][col] = sum; } } - memcpy(a, temp, sizeof(temp)); + memcpy(a, result, sizeof(result)); } void namcos22_state::matrix3d_identity(float m[4][4]) { - for (int r = 0; r < 4; r++) + for (int row = 0; row < 4; row++) { - for (int c = 0; c < 4; c++) + for (int col = 0; col < 4; col++) { - m[r][c] = (r == c) ? 1.0 : 0.0; + m[row][col] = (row == col) ? 1.0f : 0.0f; } } } +void namcos22_state::matrix3d_apply_reflection(float m[4][4]) +{ + if (!m_reflection) + return; + + float r[4][4]; + matrix3d_identity(r); + + if (m_reflection & 0x10) + r[0][0] = -1.0f; + if (m_reflection & 0x20) + r[1][1] = -1.0f; + + matrix3d_multiply(m, r); +} + void namcos22_state::transform_point(float *vx, float *vy, float *vz, float m[4][4]) { float x = *vx; @@ -810,7 +729,7 @@ void namcos22_state::transform_normal(float *nx, float *ny, float *nz, float m[4 *nz = m[0][2]*x + m[1][2]*y + m[2][2]*z; } -void namcos22_state::register_normals(int32_t addr, float m[4][4]) +void namcos22_state::register_normals(int addr, float m[4][4]) { for (int i = 0; i < 4; i++) { @@ -829,7 +748,7 @@ void namcos22_state::register_normals(int32_t addr, float m[4][4]) } -void namcos22_state::draw_direct_poly(const uint16_t *src) +void namcos22_state::draw_direct_poly(const u16 *src) { if (machine().video().skip_this_frame()) return; @@ -861,13 +780,12 @@ void namcos22_state::draw_direct_poly(const uint16_t *src) * xx-- ---- // BRI * --xx xxxx // zpos */ - uint32_t zsort = ((src[1] & 0xfff) << 12) | (src[0] & 0xfff); + u32 zsort = ((src[1] & 0xfff) << 12) | (src[0] & 0xfff); struct namcos22_scenenode *node = m_poly->new_scenenode(machine(), zsort, NAMCOS22_SCENENODE_QUAD); int cztype = src[3] & 3; if (m_is_ss22) { - cztype ^= 3; // ? not sure, but this makes testmode look like on a pcb (only 1 pcb checked) node->data.quad.cmode = (src[2] & 0x00f0) >> 4; node->data.quad.texturebank = (src[2] & 0x000f); } @@ -895,7 +813,7 @@ void namcos22_state::draw_direct_poly(const uint16_t *src) p->v = src[1] & 0x0fff; } - int mantissa = (int16_t)src[5]; + int mantissa = (s16)src[5]; float zf = (float)mantissa; int exponent = (src[4]) & 0xff; if (mantissa) @@ -922,8 +840,8 @@ void namcos22_state::draw_direct_poly(const uint16_t *src) p->z = 1.0f / zf; } - p->x = (int16_t)src[2]; - p->y = -(int16_t)src[3]; + p->x = (s16)src[2]; + p->y = -(s16)src[3]; p->bri = src[4] >> 8; src += 6; } @@ -968,10 +886,10 @@ void namcos22_state::draw_direct_poly(const uint16_t *src) * 0x07350 - guardrail * 0x061a8 - red car */ -void namcos22_state::blit_single_quad(bitmap_rgb32 &bitmap, uint32_t color, uint32_t addr, float m[4][4], int32_t polyshift, int flags, int packetformat) +void namcos22_state::blit_single_quad(u32 color, u32 addr, float m[4][4], int polyshift, int flags, int packetformat) { int absolute_priority = m_absolute_priority; - int32_t zsort; + int zsort; float zmin = 0.0f; float zmax = 0.0f; namcos22_polyvertex v[4]; @@ -987,16 +905,19 @@ void namcos22_state::blit_single_quad(bitmap_rgb32 &bitmap, uint32_t color, uint } /* backface cull one-sided polygons */ - if (flags & 0x0020 && - (v[2].x*((v[0].z*v[1].y)-(v[0].y*v[1].z)))+ - (v[2].y*((v[0].x*v[1].z)-(v[0].z*v[1].x)))+ - (v[2].z*((v[0].y*v[1].x)-(v[0].x*v[1].y))) >= 0 && - - (v[0].x*((v[2].z*v[3].y)-(v[2].y*v[3].z)))+ - (v[0].y*((v[2].x*v[3].z)-(v[2].z*v[3].x)))+ - (v[0].z*((v[2].y*v[3].x)-(v[2].x*v[3].y))) >= 0) - { - return; + if (flags & 0x0020) + { + float c1 = + (v[2].x*((v[0].z*v[1].y)-(v[0].y*v[1].z)))+ + (v[2].y*((v[0].x*v[1].z)-(v[0].z*v[1].x)))+ + (v[2].z*((v[0].y*v[1].x)-(v[0].x*v[1].y))); + float c2 = + (v[0].x*((v[2].z*v[3].y)-(v[2].y*v[3].z)))+ + (v[0].y*((v[2].x*v[3].z)-(v[2].z*v[3].x)))+ + (v[0].z*((v[2].y*v[3].x)-(v[2].x*v[3].y))); + + if ((m_cullflip && c1 <= 0.0f && c2 <= 0.0f) || (!m_cullflip && c1 >= 0.0f && c2 >= 0.0f)) + return; } for (i = 0; i < 4; i++) @@ -1014,15 +935,18 @@ void namcos22_state::blit_single_quad(bitmap_rgb32 &bitmap, uint32_t color, uint { // lighting (prelim) bri = m_LitSurfaceInfo[m_LitSurfaceIndex % m_LitSurfaceCount]; + if (m_SurfaceNormalFormat == 0x6666) { if (i == 3) m_LitSurfaceIndex++; } else if (m_SurfaceNormalFormat == 0x4000) + { m_LitSurfaceIndex++; + } else - logerror("unknown normal format: 0x%x\n", m_SurfaceNormalFormat); + logerror("blit_single_quad:unknown normal format: 0x%x\n", m_SurfaceNormalFormat); } else if (packetformat & 0x40) { @@ -1044,15 +968,15 @@ void namcos22_state::blit_single_quad(bitmap_rgb32 &bitmap, uint32_t color, uint switch (flags & 0x300) { case 0x000: - zsort = (int32_t)zmin; + zsort = (int)zmin; break; case 0x100: - zsort = (int32_t)zmax; + zsort = (int)zmax; break; default: - zsort = (int32_t)((zmin + zmax) / 2.0f); + zsort = (int)((zmin + zmax) / 2.0f); break; } @@ -1109,14 +1033,10 @@ void namcos22_state::blit_single_quad(bitmap_rgb32 &bitmap, uint32_t color, uint } -void namcos22_state::blit_quads(bitmap_rgb32 &bitmap, int32_t addr, float m[4][4], int32_t base) +void namcos22_state::blit_quads(int addr, int len, float m[4][4]) { -// int additionalnormals = 0; - int chunklength = point_read(addr++); - int finish = addr + chunklength; - - if (chunklength > 0x100) - fatalerror("bad packet length\n"); + //int additionalnormals = 0; + int finish = addr + len; while (addr < finish) { @@ -1148,7 +1068,7 @@ void namcos22_state::blit_quads(bitmap_rgb32 &bitmap, int32_t addr, float m[4][4 flags = point_read(addr + 1); color = point_read(addr + 2); bias = 0; - blit_single_quad(bitmap, color, addr + 3, m, bias, flags, packetformat); + blit_single_quad(color, addr + 3, m, bias, flags, packetformat); break; case 0x18: @@ -1161,7 +1081,7 @@ void namcos22_state::blit_quads(bitmap_rgb32 &bitmap, int32_t addr, float m[4][4 flags = point_read(addr + 1); color = point_read(addr + 2); bias = point_read(addr + 3); - blit_single_quad(bitmap, color, addr + 4, m, bias, flags, packetformat); + blit_single_quad(color, addr + 4, m, bias, flags, packetformat); break; case 0x10: /* vertex lighting */ @@ -1173,7 +1093,7 @@ void namcos22_state::blit_quads(bitmap_rgb32 &bitmap, int32_t addr, float m[4][4 000000 000000 007fff // normal vector 000000 000000 007fff // normal vector */ -// additionalnormals = point_read(addr+2); + //additionalnormals = point_read(addr+2); m_SurfaceNormalFormat = point_read(addr + 3); m_LitSurfaceCount = 0; m_LitSurfaceIndex = 0; @@ -1192,24 +1112,53 @@ void namcos22_state::blit_quads(bitmap_rgb32 &bitmap, int32_t addr, float m[4][4 break; default: - break; + logerror("blit_quads unknown packet length: addr=0x%06x len=0x%x format=0x%x\n", addr-1, packetlength, packetformat); + return; } addr += packetlength; } } -void namcos22_state::blit_polyobject(bitmap_rgb32 &bitmap, int code, float m[4][4]) +void namcos22_state::blit_polyobject(int code, float m[4][4]) { - uint32_t addr1 = point_read(code); + // list start address, code 5 is special case for pointram + int list_addr; + bool pointram = (code == 0x5); + if (pointram) + list_addr = (m_is_ss22) ? 0xf80000 : 0xf00000; + else + list_addr = point_read(code); + m_LitSurfaceCount = 0; m_LitSurfaceIndex = 0; for (;;) { - int32_t addr2 = point_read(addr1++); - if (addr2 < 0) + int object_addr = point_read(list_addr++); + + if (object_addr < 0) + { + if (object_addr == -1) + { + // 0xffffff is end-of-list marker + break; + } + else if (!pointram) + { + logerror("blit_polyobject unexpected end: addr=0x%06x\n", list_addr-1); + break; + } + object_addr &= 0x00ffffff; + } + + u32 chunklength = point_read(object_addr++); + if (chunklength > 0x100) + { + logerror("blit_polyobject bad chunk length: addr=0x%06x len=0x%x\n", object_addr-1, chunklength); break; - blit_quads(bitmap, addr2, m, code); + } + + blit_quads(object_addr, chunklength, m); } } @@ -1245,21 +1194,13 @@ void namcos22_state::blit_polyobject(bitmap_rgb32 &bitmap, int code, float m[4][ /*******************************************************************************/ -/** - * 0xfffd - * 0x0: transform - * 0x1 - * 0x2 - * 0x5: transform - * >=0x45: draw primitive - */ -void namcos22_state::slavesim_handle_bb0003(const int32_t *src) +void namcos22_state::slavesim_handle_bb0003(const s32 *src) { /* bb0003 or 3b0003 14.00c8 light.ambient light.power - 01.0000 ? light.dx + 01.0000 reflection,? light.dx 06.5a82 window priority light.dy 00.a57e ? light.dz @@ -1280,12 +1221,14 @@ void namcos22_state::slavesim_handle_bb0003(const int32_t *src) m_camera_ly = dspfixed_to_nativefloat(src[0x3]); m_camera_lz = dspfixed_to_nativefloat(src[0x4]); + m_reflection = src[0x2] >> 16 & 0x30; // z too? + m_cullflip = (m_reflection == 0x10 || m_reflection == 0x20); m_absolute_priority = src[0x3] >> 16; - m_camera_vx = (int16_t)(src[5] >> 16); - m_camera_vy = (int16_t)(src[5] & 0xffff); - m_camera_zoom = dspfloat_to_nativefloat(src[6]); - m_camera_vw = dspfloat_to_nativefloat(src[7]) * m_camera_zoom; - m_camera_vh = dspfloat_to_nativefloat(src[9]) * m_camera_zoom; + m_camera_vx = (s16)(src[0x5] >> 16); + m_camera_vy = (s16)(src[0x5] & 0xffff); + m_camera_zoom = dspfloat_to_nativefloat(src[0x6]); + m_camera_vw = dspfloat_to_nativefloat(src[0x7]) * m_camera_zoom; + m_camera_vh = dspfloat_to_nativefloat(src[0x9]) * m_camera_zoom; m_viewmatrix[0][0] = dspfixed_to_nativefloat(src[0x0c]); m_viewmatrix[1][0] = dspfixed_to_nativefloat(src[0x0d]); @@ -1299,12 +1242,22 @@ void namcos22_state::slavesim_handle_bb0003(const int32_t *src) m_viewmatrix[1][2] = dspfixed_to_nativefloat(src[0x13]); m_viewmatrix[2][2] = dspfixed_to_nativefloat(src[0x14]); + matrix3d_apply_reflection(m_viewmatrix); transform_normal(&m_camera_lx, &m_camera_ly, &m_camera_lz, m_viewmatrix); } -void namcos22_state::slavesim_handle_200002(bitmap_rgb32 &bitmap, const int32_t *src) +void namcos22_state::slavesim_handle_200002(const s32 *src, int code) { - if (m_PrimitiveID >= 0x45) + /** + * 0xfffd + * 0x0: transform + * 0x1 + * 0x2 + * 0x5: draw primitive(RAM) + * >=0x45: draw primitive(ROM) + */ + + if (code == 0x5 || code >= 0x45) { float m[4][4]; /* row major */ @@ -1327,16 +1280,15 @@ void namcos22_state::slavesim_handle_200002(bitmap_rgb32 &bitmap, const int32_t m[3][2] = src[0xc]; /* zpos */ matrix3d_multiply(m, m_viewmatrix); - blit_polyobject(bitmap, m_PrimitiveID, m); + blit_polyobject(code, m); } - else if (m_PrimitiveID != 0 && m_PrimitiveID != 2) + else if (code != 0 && code != 2) { - logerror("slavesim_handle_200002:unk code=0x%x\n", m_PrimitiveID); - // ridgerac title screen waving flag: 0x5 + logerror("slavesim_handle_200002:unknown code=0x%x\n", code); } } -void namcos22_state::slavesim_handle_300000(const int32_t *src) +void namcos22_state::slavesim_handle_300000(const s32 *src) { m_viewmatrix[0][0] = dspfixed_to_nativefloat(src[1]); m_viewmatrix[1][0] = dspfixed_to_nativefloat(src[2]); @@ -1349,9 +1301,11 @@ void namcos22_state::slavesim_handle_300000(const int32_t *src) m_viewmatrix[0][2] = dspfixed_to_nativefloat(src[7]); m_viewmatrix[1][2] = dspfixed_to_nativefloat(src[8]); m_viewmatrix[2][2] = dspfixed_to_nativefloat(src[9]); + + matrix3d_apply_reflection(m_viewmatrix); } -void namcos22_state::slavesim_handle_233002(const int32_t *src) +void namcos22_state::slavesim_handle_233002(const s32 *src) { /* 00233002 @@ -1367,16 +1321,13 @@ void namcos22_state::slavesim_handle_233002(const int32_t *src) m_objectshift = src[2]; } -void namcos22_state::simulate_slavedsp(bitmap_rgb32 &bitmap) +void namcos22_state::simulate_slavedsp() { - const int32_t *src = 0x300 + (int32_t *)m_polygonram.target(); - int16_t len; - - matrix3d_identity(m_viewmatrix); + const s32 *src = 0x300 + (s32 *)m_polygonram.target(); if (m_is_ss22) { - src += 4; /* FFFE 0400 */ + src += 4; // FFFE 0400 } else { @@ -1385,67 +1336,111 @@ void namcos22_state::simulate_slavedsp(bitmap_rgb32 &bitmap) for (;;) { - int16_t next; - m_PrimitiveID = *src++; - len = (int16_t)*src++; + // hackery! commands should be streamed, not parsed here + u16 code = *src++; + u16 len = *src++; + s32 index = src - (s32 *)m_polygonram.target(); + if ((index + len) >= 0x7fff) + { + logerror("simulate_slavedsp buffer overflow: len=0x%x code=0x%x addr=0x%x\n", len, code, index); + return; + } switch (len) { case 0x15: - slavesim_handle_bb0003(src); /* define viewport */ + slavesim_handle_bb0003(src); // define viewport break; case 0x10: - slavesim_handle_233002(src); /* set modal rendering options */ + slavesim_handle_233002(src); // set model rendering options break; case 0x0a: - slavesim_handle_300000(src); /* modify view transform */ + slavesim_handle_300000(src); // modify view transform break; case 0x0d: - slavesim_handle_200002(bitmap, src); /* render primitive */ + slavesim_handle_200002(src, code); // render primitive break; default: - logerror("unk 3d data(%d) addr=0x%x!", len, (int)(src-(int32_t*)m_polygonram.target())); + { + std::string polydata; + int i = 0; + for (; i < len && i < 0x20; i++) { - int i; - for (i = 0; i < len; i++) - { - logerror(" %06x", src[i] & 0xffffff); - } - logerror("\n"); + char h[8]; + sprintf(h, " %06x", src[i] & 0xffffff); + polydata += h; } + if (i < len) + polydata += " (...)"; + logerror("simulate_slavedsp unknown 3d data: len=0x%x code=0x%x addr=0x%x!%s\n", len, code, index, polydata); return; + } } - /* hackery! commands should be streamed, not parsed here */ src += len; - src++; /* always 0xffff */ - next = (int16_t)*src++; /* link to next command */ - if ((next & 0x7fff) != (src - (int32_t *)m_polygonram.target())) + src++; // should be 0xffff (GOTO command) + u16 next = *src++ & 0x7fff; // link to next command + if (next != (index + len + 1 + 1)) { - /* end of list */ - break; + // end of list, normally with a "goto self" + if (next != (index + len)) + logerror("simulate_slavedsp unexpected end: addr=0x%x, next=0x%x\n", index+len, next); + + return; + } + else if (next == 0x7fff) + { + logerror("simulate_slavedsp buffer overflow: next=0x7fff\n"); + return; } } } -void namcos22_state::draw_polygons(bitmap_rgb32 &bitmap) + +void namcos22_state::draw_polygons() { - if (m_slave_simulation_active) + if (m_pdp_render_done && m_slave_simulation_active) { - simulate_slavedsp(bitmap); + simulate_slavedsp(); m_poly->wait("draw_polygons"); } } +void namcos22_state::render_frame_active() +{ + /** + * Since pdp_begin and simulate_slavedsp are basically the same thing, when PDP is inactive, + * the parser here needs to be inactive too. However, propcycl attract mode(during the pauses) + * doesn't trigger the PDP and still expects polygons to be shown. It doesn't overwrite the PDP + * loop address, so it must be drawing the previous framebuffer, it's not known exactly where/how + * this is controlled. + */ + if (m_screen->frame_number() > m_pdp_frame && m_render_refresh) + m_pdp_render_done = false; + + m_render_refresh = false; +} + +WRITE_LINE_MEMBER(namcos22_state::screen_vblank) +{ + if (state) + { + // still need to determine active state if frame was skipped + if (m_skipped_this_frame) + render_frame_active(); + m_skipped_this_frame = machine().video().skip_this_frame(); + } +} + /*********************************************************************************************/ -void namcos22_state::draw_sprite_group(bitmap_rgb32 &bitmap, const rectangle &cliprect, const uint32_t *src, const uint32_t *attr, int num_sprites, int deltax, int deltay, int y_lowres) +void namcos22_state::draw_sprite_group(const u32 *src, const u32 *attr, int num_sprites, int deltax, int deltay, int y_lowres) { for (int i = 0; i < num_sprites; i++) { @@ -1459,10 +1454,10 @@ void namcos22_state::draw_sprite_group(bitmap_rgb32 &bitmap, const rectangle &cl ----.----.----.---- | xxxx.xxxx.xxxx.xxxx y size src[2] - xxxx.x---.----.---- | ----.----.----.---- no function + xxxx.x---.----.---- | ----.----.----.---- unused ----.-xxx.----.---- | ----.----.----.---- clip target ----.----.xxxx.xxxx | ----.----.----.---- linktype - ----.----.----.---- | xxxx.xx--.----.---- no function(?) - set in airco22b + ----.----.----.---- | xxxx.xx--.----.---- no function(?) - 0x400 set in airco22b(invisible sprite) ----.----.----.---- | ----.--x-.----.---- right justify ----.----.----.---- | ----.---x.----.---- bottom justify ----.----.----.---- | ----.----.x---.---- flipx @@ -1473,17 +1468,17 @@ void namcos22_state::draw_sprite_group(bitmap_rgb32 &bitmap, const rectangle &cl src[3] xxxx.xxxx.xxxx.xxxx | ----.----.----.---- tile number ----.----.----.---- | xxxx.xxxx.----.---- translucency - ----.----.----.---- | ----.----.xxxx.xxxx no function(?) - set in timecris + ----.----.----.---- | ----.----.xxxx.xxxx no function(?) - set in timecris when increasing translucency, it's probably not 16bit attr[0] - xxxx.xxxx.----.---- | ----.----.----.---- no function + xxxx.xxxx.----.---- | ----.----.----.---- unused ----.----.xxxx.xxxx | xxxx.xxxx.xxxx.xxxx z pos attr[1] - xxxx.xxxx.----.---- | ----.----.----.---- no function + xxxx.xxxx.----.---- | ----.----.----.---- unused ----.----.x---.---- | ----.----.----.---- cz enable ----.----.-xxx.xxxx | ----.----.----.---- color - ----.----.----.---- | xxxx.xxxx.----.---- no function(?) - set in airco22b, propcycl + ----.----.----.---- | xxxx.xxxx.----.---- unknown flags? - set in airco22b(0x7/0x1, invisible sprite), propcycl score hinge(0xff), cybrcycc at boot(0x2b) ----.----.----.---- | ----.----.xxxx.xxxx cz factor (fog aka depth cueing) */ int xpos = (src[0] >> 16) - deltax; @@ -1495,32 +1490,36 @@ void namcos22_state::draw_sprite_group(bitmap_rgb32 &bitmap, const rectangle &cl int linktype = (src[2] & 0x00ff0000) >> 16; int flipx = (src[2] >> 7) & 0x1; int cols = (src[2] >> 4) & 0x7; - uint32_t code = src[3]; + u32 code = src[3]; int tile = code >> 16; int translucency = (code & 0xff00) >> 8; - uint32_t zcoord = attr[0] & 0x00ffffff; - int color = attr[1] >> 16; + u32 zcoord = attr[0] & 0x00ffffff; + int color = attr[1] >> 16 & 0xff; int cz = attr[1] & 0xff; + // one of these is to override global fade setting? + // eg. propcycl time over, where global fade affects score hinge, but not "TIME" + int fade_enabled = (attr[1] & 0x8000) ? 1 : 0; + // priority over textlayer, trusted by testmode and timecris - int pri = ((attr[1] & 0xffff) == 0x00fe); + int prioverchar = (cz == 0xfe) ? 1 : 0; // set window clipping int clip = src[2] >> 23 & 0xe; - int cx_min = -deltax + (int16_t)(m_spriteram[0x80|clip] >> 16); - int cx_max = -deltax + (int16_t)(m_spriteram[0x80|clip] & 0xffff); - int cy_min = -deltay + (int16_t)(m_spriteram[0x81|clip] >> 16); - int cy_max = -deltay + (int16_t)(m_spriteram[0x81|clip] & 0xffff); + int cx_min = -deltax + (s16)(m_spriteram[0x80|clip] >> 16); + int cx_max = -deltax + (s16)(m_spriteram[0x80|clip] & 0xffff); + int cy_min = -deltay + (s16)(m_spriteram[0x81|clip] >> 16); + int cy_max = -deltay + (s16)(m_spriteram[0x81|clip] & 0xffff); if (rows == 0) rows = 8; if (cols == 0) cols = 8; - /* right justify */ + // right justify if (src[2] & 0x0200) xpos -= sizex * cols - 1; - /* bottom justify */ + // bottom justify if (src[2] & 0x0100) ypos -= sizey * rows - 1; @@ -1563,17 +1562,19 @@ void namcos22_state::draw_sprite_group(bitmap_rgb32 &bitmap, const rectangle &cl node->data.sprite.translucency = translucency; node->data.sprite.color = color; node->data.sprite.cz = cz; - node->data.sprite.pri = pri; + node->data.sprite.prioverchar = prioverchar; + node->data.sprite.fade_enabled = fade_enabled; } + src += 4; attr += 2; } } -void namcos22_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect) +void namcos22_state::draw_sprites() { - const uint32_t *src; - const uint32_t *attr; + const u32 *src; + const u32 *attr; #if 0 // show reg contents int i; @@ -1641,7 +1642,7 @@ void namcos22_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprec { src = &m_spriteram[0x04000/4 + base*4]; attr = &m_spriteram[0x20000/4 + base*2]; - draw_sprite_group(bitmap, cliprect, src, attr, num_sprites, deltax, deltay, y_lowres); + draw_sprite_group(src, attr, num_sprites, deltax, deltay, y_lowres); } /* VICS RAM provides two additional banks (also many unknown regs here) */ @@ -1675,7 +1676,7 @@ void namcos22_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprec { src = &m_vics_data[(m_vics_control[0x48/4] & 0xffff)/4]; attr = &m_vics_data[(m_vics_control[0x58/4] & 0xffff)/4]; - draw_sprite_group(bitmap, cliprect, src, attr, num_sprites, deltax, deltay, y_lowres); + draw_sprite_group(src, attr, num_sprites, deltax, deltay, y_lowres); } num_sprites = m_vics_control[0x60/4] >> 4 & 0x1ff; // no +1 @@ -1691,13 +1692,13 @@ void namcos22_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprec { src = &m_vics_data[(m_vics_control[0x68/4] & 0xffff)/4]; attr = &m_vics_data[(m_vics_control[0x78/4] & 0xffff)/4]; - draw_sprite_group(bitmap, cliprect, src, attr, num_sprites, deltax, deltay, y_lowres); + draw_sprite_group(src, attr, num_sprites, deltax, deltay, y_lowres); } } READ32_MEMBER(namcos22_state::namcos22s_vics_control_r) { - uint32_t ret = m_vics_control[offset]; + u32 ret = m_vics_control[offset]; switch (offset*4) { @@ -1730,7 +1731,7 @@ WRITE32_MEMBER(namcos22_state::namcos22s_vics_control_w) TILE_GET_INFO_MEMBER(namcos22_state::get_text_tile_info) { - uint16_t data = nthword(m_textram, tile_index); + u16 data = nthword(m_textram, tile_index); /** * xxxx.----.----.---- palette select * ----.xx--.----.---- flip @@ -1741,34 +1742,93 @@ TILE_GET_INFO_MEMBER(namcos22_state::get_text_tile_info) WRITE32_MEMBER(namcos22_state::namcos22_textram_w) { + u32 prev = m_textram[offset]; COMBINE_DATA(&m_textram[offset]); - m_bgtilemap->mark_tile_dirty(offset * 2); - m_bgtilemap->mark_tile_dirty(offset * 2 + 1); + if (prev != m_textram[offset]) + { + m_bgtilemap->mark_tile_dirty(offset * 2); + m_bgtilemap->mark_tile_dirty(offset * 2 + 1); + } } WRITE32_MEMBER(namcos22_state::namcos22_cgram_w) { + u32 prev = m_cgram[offset]; COMBINE_DATA(&m_cgram[offset]); - m_gfxdecode->gfx(0)->mark_dirty(offset/32); + if (prev != m_cgram[offset]) + m_gfxdecode->gfx(0)->mark_dirty(offset/32); +} + +void namcos22_state::posirq_update() +{ + int scanline = 2 * m_tilemapattr[4]; + + // schedule next timeout + if (scanline < m_screen->height()) + { + scanline = (scanline + 480) % m_screen->height(); // 0 = vblank start + m_posirq_timer->adjust(m_screen->time_until_pos(scanline)); + } + else + m_posirq_timer->adjust(attotime::never); +} + +TIMER_CALLBACK_MEMBER(namcos22_state::posirq_callback) +{ + // hblank irq line differs between s22/ss22 (see syscon) + int line = (m_is_ss22) ? 1 : 0; + + if (m_irq_enabled & (1 << line)) + { + // driver doesn't support partial updates yet + // partial updates here should apply to the text layer only, not the 3D framebuffer + //m_screen->update_partial(m_screen->vpos()); + + m_irq_state |= (1 << line); + m_maincpu->set_input_line(m_syscontrol[line] & 7, ASSERT_LINE); + } + + posirq_update(); +} + +WRITE16_MEMBER(namcos22_state::namcos22_tilemapattr_w) +{ + /* + 0: R/W - x offset + 1: R/W - y offset + 2: R/W - ??? always 0x006e? + 3: ? - unused? + 4: R/W - posirq scanline + 5: R - current scanline? + 6: ? - unused? + 7: R - ??? + */ + COMBINE_DATA(&m_tilemapattr[offset]); + + switch (offset) + { + case 4: + posirq_update(); + break; + + default: + break; + } } -READ32_MEMBER(namcos22_state::namcos22_tilemapattr_r) +READ16_MEMBER(namcos22_state::namcos22_tilemapattr_r) { switch (offset) { - case 2: + case 5: { - uint16_t lo, hi = (m_tilemapattr[offset] & 0xffff0000) >> 16; - // assume current scanline, 0x1ff if in vblank (used in alpinesa) - // or maybe relative to posirq? - if (m_screen->vblank()) lo = 0x1ff; - else lo = m_screen->vpos() >> 1; + // unknown, maybe posirq related // dirtdash has slowdowns if high bit is clear, why?? - return hi << 16 | lo | 0x8000; + return 0x8000; } - case 3: - // don't know, maybe also scanline related + case 7: + // unknown // timecris reads it everytime the gun triggers and will decline if it's 0xffff return 0; @@ -1779,25 +1839,10 @@ READ32_MEMBER(namcos22_state::namcos22_tilemapattr_r) return m_tilemapattr[offset]; } -WRITE32_MEMBER(namcos22_state::namcos22_tilemapattr_w) -{ - /* - 0.hiword R/W x offset - 0.loword R/W y offset, bit 9 for interlacing?(cybrcomm, tokyowar) - 1.hiword R/W ??? always 0x006e? - 1.loword ? unused? - 2.hiword R/W posirq scanline? - not hooked up yet - 2.loword R assume current scanline - 3.hiword ? unused? - 3.loword R ??? - */ - COMBINE_DATA(&m_tilemapattr[offset]); -// popmessage("%08x\n%08x\n%08x\n%08x\n",m_tilemapattr[0],m_tilemapattr[1],m_tilemapattr[2],m_tilemapattr[3]); -} /** - * Spot RAM affects how the text layer is blended with the scene, it is not yet known exactly how. + * Spot RAM affects how the text layer is blended with the scene. * It isn't directly memory mapped, but rather ports are used to populate and poll it. * * See Time Crisis "SPOT RAM" self test for sample use, maybe also used in-game, but where? @@ -1809,84 +1854,74 @@ WRITE32_MEMBER(namcos22_state::namcos22_tilemapattr_w) * 0x860006: enable */ -// tokyowar and timecris test ram 000-4ff, but the only practically usable part seems to be 000-3ff -#define SPOTRAM_SIZE (0x800) - /* RAM looks like it is a 256 * 4 words table testmode: offs: 0000 0001 0002 0003 - 03f4 03f5 03f6 03f7 03f8 03f9 03fa 03fb 03fc 03fd 03fe 03ff data: 00fe 00fe 00fe 00fe - 0001 0001 0001 0001 0000 0000 0000 0000 ffff ffff ffff ffff -is the high byte of each word used? it's usually 00, and in dirtdash always 02 - -low byte of each word: - byte 0 looks like a blend factor - bytes 1,2,3 a secondary brightness factor per rgb channel(?) +tokyowar and timecris test ram 000-4ff, but the only practically usable part seems to be 000-3ff +low byte is indirect pen, high byte is shift amount when spot is in alpha blend mode(pens 0x80-0xff) */ -READ32_MEMBER(namcos22_state::namcos22s_spotram_r) +READ16_MEMBER(namcos22_state::spotram_r) { - if (offset == 1) + if (offset == 2) { // read - if (m_spot_read_address >= SPOTRAM_SIZE) - { - m_spot_read_address = 0; - } - return m_spotram[m_spot_read_address++] << 16; + u16 ret = m_spotram[m_spotram_address >> 1 & 0x7ff]; + m_spotram_address += 2; + return ret; } + return 0; } -WRITE32_MEMBER(namcos22_state::namcos22s_spotram_w) +WRITE16_MEMBER(namcos22_state::spotram_w) { - if (offset == 0) + switch (offset) { - if (ACCESSING_BITS_16_31) - { + case 0: // set address - m_spot_read_address = data >> (16 + 1); - m_spot_write_address = data >> (16 + 1); - } - else - { + COMBINE_DATA(&m_spotram_address); + break; + + case 1: // write - if (m_spot_write_address >= SPOTRAM_SIZE) - { - m_spot_write_address = 0; - } - m_spotram[m_spot_write_address++] = data; - } - } - else - { - if (ACCESSING_BITS_0_15) - { + COMBINE_DATA(&m_spotram[m_spotram_address >> 1 & 0x7ff]); + m_spotram_address += 2; + break; + + case 3: // enable - m_spot_enable = data & 1; - } + COMBINE_DATA(&m_spotram_enable); + break; + + default: + // 2=read-only + break; } } void namcos22_state::namcos22s_mix_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int prival) { const pen_t *pens = m_palette->pens(); - uint16_t *src; - uint32_t *dest; - uint8_t *pri; + u8 pen = 0; + rgbaint_t rgb; // prepare alpha - uint8_t alpha_check12 = nthbyte(m_mixer, 0x12); - uint8_t alpha_check13 = nthbyte(m_mixer, 0x13); - uint8_t alpha_mask = nthbyte(m_mixer, 0x14); - uint8_t alpha_factor = nthbyte(m_mixer, 0x15); + u8 alpha_check12 = nthbyte(m_mixer, 0x12); + u8 alpha_check13 = nthbyte(m_mixer, 0x13); + u8 alpha_mask = nthbyte(m_mixer, 0x14) & 0xf; + u8 alpha_factor = nthbyte(m_mixer, 0x15); // prepare spot - int spot_flags = m_mixer_flags >> 16; - bool spot_enabled = (spot_flags & 1) && (spot_flags & 0xc); - int spot_limit = (spot_flags & 2) ? m_spot_limit : 0xff; + bool spot_enabled = (m_spotram_enable & 1) && (m_chipselect & 0xc000); + int spot_factor = (m_spot_factor < 0x100) ? 0 : m_spot_factor & 0xff; + rgbaint_t spot_color(0, spot_factor, spot_factor, spot_factor); + int spot_palbase = m_text_palbase >> 8 & 3; // src[x] >> 8 & 3 + int spot_shift = 0; // prepare fader bool fade_enabled = (m_mixer_flags & 2) && m_screen_fade_factor; @@ -1896,49 +1931,45 @@ void namcos22_state::namcos22s_mix_text_layer(screen_device &screen, bitmap_rgb3 // mix textlayer with poly/sprites for (int y = cliprect.top(); y <= cliprect.bottom(); y++) { - src = &m_mix_bitmap->pix16(y); - dest = &bitmap.pix32(y); - pri = &screen.priority().pix8(y); + u16 *src = &m_mix_bitmap->pix16(y); + u32 *dest = &bitmap.pix32(y); + u8 *pri = &screen.priority().pix8(y); for (int x = cliprect.left(); x <= cliprect.right(); x++) { // skip if transparent or under poly/sprite if (pri[x] == prival) { - rgbaint_t rgb(pens[src[x]]); - - // apply alpha - if (alpha_factor) - { - uint8_t pen = src[x] & 0xff; - if ((pen & 0xf) == alpha_mask || pen == alpha_check12 || pen == alpha_check13) - { - rgb.blend(rgbaint_t(dest[x]), 0xff - alpha_factor); - } - } - - // apply spot if (spot_enabled) { - uint8_t pen = src[x] & 0xff; - rgbaint_t mix(dest[x]); - if (spot_flags & 8) - { - // mix with per-channel brightness - rgbaint_t shade(0, (0xff - (m_spotram[pen << 2 | 1] & 0xff)) << 2, (0xff - (m_spotram[pen << 2 | 2] & 0xff)) << 2, (0xff - (m_spotram[pen << 2 | 3] & 0xff)) << 2); - mix.scale_and_clamp(shade); - } + // remap pen + int spot_data = m_spotram[(src[x] << 2 | spot_palbase) & 0x3ff]; + pen = spot_data; - int spot_factor = 0xff - (m_spotram[pen << 2] & 0xff); - if (spot_factor < spot_limit) + if (pen >= 0x80) { - rgb.blend(mix, spot_factor); + spot_shift = spot_data >> 8 & 7; + rgb.set(spot_color); } + else + rgb.set(pens[pen | m_text_palbase]); + } + else + { + rgb.set(pens[src[x]]); + pen = src[x]; } + // apply fade if (fade_enabled) - { rgb.blend(fade_color, fade_factor); - } + + // spot pen becomes brightness factor + if (spot_enabled && pen >= 0x80) + rgb.blend(rgbaint_t(dest[x]), (~pen & 0x7f) >> spot_shift); + + // otherwise apply alpha + else if (alpha_factor && ((pen & 0xf) == alpha_mask || (pen >= alpha_check12 && pen <= alpha_check13))) + rgb.blend(rgbaint_t(dest[x]), 0xff - alpha_factor); dest[x] = rgb.to_rgba(); } @@ -1949,70 +1980,67 @@ void namcos22_state::namcos22s_mix_text_layer(screen_device &screen, bitmap_rgb3 void namcos22_state::namcos22_mix_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { const pen_t *pens = m_palette->pens(); - uint16_t *src; - uint32_t *dest; - uint8_t *pri; - - const uint8_t *rlut = &m_gamma_proms[0x000]; - const uint8_t *glut = &m_gamma_proms[0x100]; - const uint8_t *blut = &m_gamma_proms[0x200]; + const u8 *rlut = &m_gamma_proms[0x000]; + const u8 *glut = &m_gamma_proms[0x100]; + const u8 *blut = &m_gamma_proms[0x200]; // prepare fader and shadow factor - bool fade_enabled = m_mixer_flags & 2 && m_poly_fade_enabled; + bool fade_enabled = (m_screen_fade_r != 0x100 || m_screen_fade_g != 0x100 || m_screen_fade_b != 0x100); + u32 fade_r_add = (m_screen_fade_r > 0x100) ? (1 << 16) : 0; + u32 fade_g_add = (m_screen_fade_g > 0x100) ? (1 << 8) : 0; + u32 fade_b_add = (m_screen_fade_b > 0x100) ? 1 : 0; + bool fade_white = fade_r_add || fade_g_add || fade_b_add; + bool shadow_enabled = (m_mixer_flags & 0x100) != 0; // ? (ridgerac is the only game not using shadow) - rgbaint_t fade_color(0, m_poly_fade_r, m_poly_fade_g, m_poly_fade_b); + rgbaint_t fade_color(0, m_screen_fade_r, m_screen_fade_g, m_screen_fade_b); rgbaint_t rgb_mix[3] = { rgbaint_t(0, nthbyte(m_mixer, 0x08), nthbyte(m_mixer, 0x09), nthbyte(m_mixer, 0x0a)), // pen c rgbaint_t(0, nthbyte(m_mixer, 0x0b), nthbyte(m_mixer, 0x0c), nthbyte(m_mixer, 0x0d)), // pen d rgbaint_t(0, nthbyte(m_mixer, 0x0e), nthbyte(m_mixer, 0x0f), nthbyte(m_mixer, 0x10)) // pen e }; - // mix textlayer with poly/sprites + // mix textlayer with polys + do final mix for (int y = cliprect.top(); y <= cliprect.bottom(); y++) { - src = &m_mix_bitmap->pix16(y); - dest = &bitmap.pix32(y); - pri = &screen.priority().pix8(y); + u16 *src = &m_mix_bitmap->pix16(y); + u32 *dest = &bitmap.pix32(y); + u8 *pri = &screen.priority().pix8(y); for (int x = cliprect.left(); x <= cliprect.right(); x++) { - uint32_t pixel = dest[x]; + u32 pixel = dest[x]; // skip if transparent or under poly if (pri[x] == 2) { // apply shadow - rgbaint_t rgb; - switch (src[x] & 0xff) + u8 pen = src[x]; + if (shadow_enabled && pen >= 0xfc && pen <= 0xfe) { - case 0xfc: - case 0xfd: - case 0xfe: - if (shadow_enabled) - { - rgb.set(pixel); - rgb.scale_and_clamp(rgb_mix[(src[x] & 0xf) - 0xc]); - break; - } - // (fall through) - default: - rgb.set(pens[src[x]]); - break; + rgbaint_t rgb(pixel); + rgb.scale_and_clamp(rgb_mix[pen - 0xfc]); + pixel = rgb.to_rgba(); } + else + pixel = pens[src[x]]; + } - if (fade_enabled) + // apply global fade + if (fade_enabled) + { + if (fade_white) { - rgb.scale_and_clamp(fade_color); + // need to make sure that blacks can scale up + if (!(pixel & 0xff0000)) pixel += fade_r_add; + if (!(pixel & 0x00ff00)) pixel += fade_g_add; + if (!(pixel & 0x0000ff)) pixel += fade_b_add; } - - // BTANB note: fading to white does not affect color channels set to 00, - // eg. a rr-gg-bb of 3f-7f-00 will fade to ff-ff-00 and not ff-ff-ff - // seen in victlapw attract mode - + rgbaint_t rgb(pixel); + rgb.scale_and_clamp(fade_color); pixel = rgb.to_rgba(); } - // final mix gamma here + // apply gamma dest[x] = (rlut[(pixel >> 16) & 0xff] << 16) | (glut[(pixel >> 8) & 0xff] << 8) | blut[pixel & 0xff]; } } @@ -2020,12 +2048,12 @@ void namcos22_state::namcos22_mix_text_layer(screen_device &screen, bitmap_rgb32 void namcos22_state::draw_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - int scroll_x = (m_tilemapattr[0] >> 16) - 0x35c; - int scroll_y = m_tilemapattr[0] & 0xffff; + int scroll_x = m_tilemapattr[0] - 0x35c; + int scroll_y = m_tilemapattr[1]; m_bgtilemap->set_scrollx(0, scroll_x & 0x3ff); m_bgtilemap->set_scrolly(0, scroll_y & 0x3ff); - m_bgtilemap->set_palette_offset(m_text_palbase * 256); + m_bgtilemap->set_palette_offset(m_text_palbase); if (m_is_ss22) { @@ -2045,8 +2073,10 @@ void namcos22_state::draw_text_layer(screen_device &screen, bitmap_rgb32 &bitmap WRITE32_MEMBER(namcos22_state::namcos22_paletteram_w) { + u32 prev = m_paletteram[offset]; COMBINE_DATA(&m_paletteram[offset]); - m_dirtypal[offset & (0x7fff/4)] = 1; + if (prev != m_paletteram[offset]) + m_dirtypal[offset & (0x7fff/4)] = 1; } void namcos22_state::update_palette() @@ -2069,83 +2099,128 @@ void namcos22_state::update_palette() } +WRITE16_MEMBER(namcos22_state::namcos22s_czattr_w) +{ + /* + 0 1 2 3 4 5 6 7 + ^^^^ ^^^^ ^^^^ ^^^^ cz offset, 8-bit(+high bit for sign) per czbank 0,1,2,3 + ^^^^ flags, nybble per czbank 3,2,1,0 - 8=?, 4=enable in-game, 2=reverse compare, 1=ram write enable if 0 + ^^^^ maincpu ram bank on read + ^^^^ bank select for in-game, 2 bits per cztype 3,2,1,0 (0xe4 = 3,2,1,0) + ^^^^ ? (only set sometimes in timecris) + 0000 0000 0000 0000 7555 0000 00e4 0000 // testmode normal - 0=white to black(mid), 1=white to black(weak), 2=white to black(strong), 3=black to white(mid, reverse of 0) + 7fff 8000 7fff 8000 7555 0000 00e4 0000 // testmode offset - 0=black, 1=white, 2=black, 3=white + 0000 0000 0000 0000 3111 0000 00e4 0000 // testmode off - 0=white, 1=white, 2=white, 3=white + 8001 8001 0000 0000 5555 0000 5555 0000 // aquajet (reg 6 is usually interlaced for double buffering) + 0000 0000 0000 0000 0b6c 0000 00e4 0000 // cybrcycc + 00a4 00a4 00a4 00a4 4444 0000 0000 0000 // propcycl in pool + ff80 ff80 ff80 ff80 4444 0000 0000 0000 // propcycl ending + */ + u16 prev = m_czattr[offset]; + COMBINE_DATA(&m_czattr[offset]); + + if (offset == 4) + { + // invalidate if compare function changed + u16 changed = prev ^ m_czattr[offset]; + for (int bank = 0; bank < 4; bank++) + m_cz_was_written[bank] |= changed >> (bank * 4) & 2; + } +} + +READ16_MEMBER(namcos22_state::namcos22s_czattr_r) +{ + return m_czattr[offset]; +} + WRITE32_MEMBER(namcos22_state::namcos22s_czram_w) { - int bank = nthword(m_czattr, 0xa/2) & 3; - uint32_t prev = (m_banked_czram[bank][offset * 2] << 16) | m_banked_czram[bank][offset * 2 + 1]; - uint32_t temp = prev; - COMBINE_DATA(&temp); - data = temp; - m_banked_czram[bank][offset * 2] = data >> 16; - m_banked_czram[bank][offset * 2 + 1] = data & 0xffff; - m_cz_was_written[bank] |= (prev ^ data); + /* + czram contents, it's basically a big cz compare table + + testmode: + o_16 0 1 2 3 4 5 6 7 < > f8 f9 fa fb fc fd fe ff + czram[0] = 0000 001f 003f 005f 007f 009f 00bf 00df .... 1eff 1f1f 1f3f 1f5f 1f7f 1f9f 1fbf 1fdf + czram[1] = 003f 007f 00be 00fd 013c 017b 01b9 01f7 .... 1ff9 1ffb 1ffc 1ffd 1ffe 1fff 1fff 1fff + czram[2] = 0000 0000 0000 0001 0002 0003 0005 0007 .... 1e45 1e83 1ec2 1f01 1f40 1f7f 1fbf 1fff + czram[3] = 1fff 1fdf 1fbf 1f9f 1f7f 1f5f 1f3f 1f1f .... 00ff 00df 00bf 009f 007f 005f 003f 001f + */ + for (int bank = 0; bank < 4; bank++) + { + // write enable bit + if (~m_czattr[4] >> (bank * 4) & 1) + { + u32 prev = (m_banked_czram[bank][offset * 2] << 16) | m_banked_czram[bank][offset * 2 + 1]; + u32 temp = prev; + COMBINE_DATA(&temp); + m_banked_czram[bank][offset * 2] = temp >> 16; + m_banked_czram[bank][offset * 2 + 1] = temp & 0xffff; + m_cz_was_written[bank] |= (prev ^ temp); + } + } } READ32_MEMBER(namcos22_state::namcos22s_czram_r) { - int bank = nthword(m_czattr, 0xa/2) & 3; + int bank = m_czattr[5] & 3; return (m_banked_czram[bank][offset * 2] << 16) | m_banked_czram[bank][offset * 2 + 1]; } void namcos22_state::recalc_czram() { - for (int table = 0; table < 4; table++) + for (int bank = 0; bank < 4; bank++) { // as documented above, ss22 czram is 'just' a big compare table // this is very slow when emulating, so let's recalculate it to a simpler lookup table - if (m_cz_was_written[table]) + if (m_cz_was_written[bank]) { + int reverse = (m_czattr[4] >> (bank * 4) & 2) ? 0xff : 0; int small_val = 0x2000; - int small_offset = 0; + int small_offset = reverse; int large_val = 0; - int large_offset = 0; - int prev = 0x2000; + int large_offset = reverse ^ 0xff; + int prev = 0; for (int i = 0; i < 0x100; i++) { - int val = m_banked_czram[table][i]; - - // discard if larger than 1fff - if (val > 0x1fff) val = prev; - if (prev > 0x1fff) - { - prev = val; - continue; - } - + int factor = i ^ reverse; + int val = std::min<u16>(m_banked_czram[bank][factor], 0x2000); int start = prev; int end = val; - if (start > end) + + if (i > 0) { - start = val; - end = prev; - } - prev = val; + // discard if compare function doesn't match + if (start >= end) + continue; - // fill range - for (int j = start; j < end; j++) - m_recalc_czram[table][j] = i; + // fill range + for (int j = start; j < end; j++) + m_recalc_czram[bank][j] = factor; + } // remember largest/smallest for later if (val < small_val) { small_val = val; - small_offset = i; + small_offset = factor; } if (val > large_val) { large_val = val; - large_offset = i; + large_offset = factor; } + + prev = val; } // fill possible leftover ranges for (int j = 0; j < small_val; j++) - m_recalc_czram[table][j] = small_offset; + m_recalc_czram[bank][j] = small_offset; for (int j = large_val; j < 0x2000; j++) - m_recalc_czram[table][j] = large_offset; + m_recalc_czram[bank][j] = large_offset; - m_cz_was_written[table] = 0; + m_cz_was_written[bank] = 0; } } } @@ -2193,8 +2268,7 @@ void namcos22_state::update_mixer() 08,09,0a background color 0b 0c - 0d spot factor limit value - 0e enable spot factor limit + 0d,0e spot factor 0f 10 11 global polygon alpha factor @@ -2216,19 +2290,14 @@ void namcos22_state::update_mixer() m_fog_r = nthbyte(m_mixer, 0x05); m_fog_g = nthbyte(m_mixer, 0x06); m_fog_b = nthbyte(m_mixer, 0x07); - m_spot_limit = nthbyte(m_mixer, 0x0d); + m_spot_factor = nthbyte(m_mixer, 0x0e) << 8 | nthbyte(m_mixer, 0x0d); m_poly_translucency = nthbyte(m_mixer, 0x11); m_screen_fade_r = nthbyte(m_mixer, 0x16); m_screen_fade_g = nthbyte(m_mixer, 0x17); m_screen_fade_b = nthbyte(m_mixer, 0x18); m_screen_fade_factor = nthbyte(m_mixer, 0x19); m_mixer_flags = nthbyte(m_mixer, 0x1a); - m_text_palbase = nthbyte(m_mixer, 0x1b) & 0x7f; - - // put spot-specific flags into high word - m_mixer_flags |= m_spot_enable << 16; - m_mixer_flags |= (nthbyte(m_mixer, 0x0e) & 1) << 17; - m_mixer_flags |= (m_chipselect & 0xc000) << 4; + m_text_palbase = nthbyte(m_mixer, 0x1b) << 8 & 0x7f00; } else { @@ -2244,7 +2313,7 @@ void namcos22_state::update_mixer() 00,01 display flags 02 03 - 04 + 04 bgcolor palette base? 05 06 07 textlayer palette base? @@ -2260,14 +2329,15 @@ void namcos22_state::update_mixer() 102,182,202 fog rgb 2 103,183,203 fog rgb 3 */ - m_mixer_flags = nthbyte(m_mixer, 0x00) << 8 | nthbyte(m_mixer, 0x01); - m_poly_fade_r = nthbyte(m_mixer, 0x11) << 8 | nthbyte(m_mixer, 0x12); // 0x0100 = 1.0 - m_poly_fade_g = nthbyte(m_mixer, 0x13) << 8 | nthbyte(m_mixer, 0x14); - m_poly_fade_b = nthbyte(m_mixer, 0x15) << 8 | nthbyte(m_mixer, 0x16); - m_poly_fade_enabled = (m_poly_fade_r == 0x100 && m_poly_fade_g == 0x100 && m_poly_fade_b == 0x100) ? 0 : 1; + m_mixer_flags = nthbyte(m_mixer, 0x00) << 8 | nthbyte(m_mixer, 0x01); + m_bg_palbase = nthbyte(m_mixer, 0x04) << 8 & 0x7f00; + m_text_palbase = nthbyte(m_mixer, 0x07) << 8 & 0x7f00; + m_screen_fade_r = nthbyte(m_mixer, 0x11) << 8 | nthbyte(m_mixer, 0x12); // 0x0100 = 1.0 + m_screen_fade_g = nthbyte(m_mixer, 0x13) << 8 | nthbyte(m_mixer, 0x14); + m_screen_fade_b = nthbyte(m_mixer, 0x15) << 8 | nthbyte(m_mixer, 0x16); // raveracw is the only game using multiple fog colors (city smog, cars under tunnels, brake disc in attract mode) - m_fog_colormask = m_mixer[0x84/4]; + m_fog_colormask = m_mixer[0x84/4]; // fog color per cz type for (i = 0; i < 4; i++) @@ -2276,8 +2346,6 @@ void namcos22_state::update_mixer() m_fog_g_per_cztype[i] = nthbyte(m_mixer, 0x0180+i); m_fog_b_per_cztype[i] = nthbyte(m_mixer, 0x0200+i); } - - m_text_palbase = 0x7f; } } @@ -2285,8 +2353,9 @@ void namcos22_state::update_mixer() /*********************************************************************************************/ -uint32_t namcos22_state::screen_update_namcos22s(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +u32 namcos22_state::screen_update_namcos22s(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { + render_frame_active(); update_mixer(); update_palette(); recalc_czram(); @@ -2302,20 +2371,20 @@ uint32_t namcos22_state::screen_update_namcos22s(screen_device &screen, bitmap_r bitmap.fill(bg_color.to_rgba(), cliprect); // layers - uint8_t layer = nthbyte(m_mixer, 0x1f); + u8 layer = nthbyte(m_mixer, 0x1f); if (layer & 4) draw_text_layer(screen, bitmap, cliprect); - if (layer & 2) draw_sprites(bitmap, cliprect); - if (layer & 1) draw_polygons(bitmap); + if (layer & 2) draw_sprites(); + if (layer & 1) draw_polygons(); m_poly->render_scene(screen, bitmap); if (layer & 4) namcos22s_mix_text_layer(screen, bitmap, cliprect, 6); // apply gamma - const uint8_t *rlut = (const uint8_t *)&m_mixer[0x100/4]; - const uint8_t *glut = (const uint8_t *)&m_mixer[0x200/4]; - const uint8_t *blut = (const uint8_t *)&m_mixer[0x300/4]; + const u8 *rlut = (const u8 *)&m_mixer[0x100/4]; + const u8 *glut = (const u8 *)&m_mixer[0x200/4]; + const u8 *blut = (const u8 *)&m_mixer[0x300/4]; for (int y = cliprect.top(); y <= cliprect.bottom(); y++) { - uint32_t *dest = &bitmap.pix32(y); + u32 *dest = &bitmap.pix32(y); for (int x = cliprect.left(); x <= cliprect.right(); x++) { int rgb = dest[x]; @@ -2329,19 +2398,21 @@ uint32_t namcos22_state::screen_update_namcos22s(screen_device &screen, bitmap_r return 0; } -uint32_t namcos22_state::screen_update_namcos22(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +u32 namcos22_state::screen_update_namcos22(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { + render_frame_active(); update_mixer(); update_palette(); screen.priority().fill(0, cliprect); // background color - bitmap.fill(m_palette->pen(0x7fff), cliprect); + int bg_color = m_bg_palbase | 0xff; + bitmap.fill(m_palette->pen(bg_color), cliprect); // layers - draw_polygons(bitmap); + draw_polygons(); m_poly->render_scene(screen, bitmap); - draw_text_layer(screen, bitmap, cliprect); // text layer + final mix(gamma) + draw_text_layer(screen, bitmap, cliprect); // text layer + final mix return 0; } @@ -2352,51 +2423,69 @@ uint32_t namcos22_state::screen_update_namcos22(screen_device &screen, bitmap_rg void namcos22_state::init_tables() { - m_dirtypal = std::make_unique<uint8_t[]>(0x8000/4); + m_dirtypal = std::make_unique<u8[]>(0x8000/4); + save_pointer(NAME(m_dirtypal), 0x8000/4); memset(m_dirtypal.get(), 1, 0x8000/4); memset(m_paletteram, 0, 0x8000); + matrix3d_identity(m_viewmatrix); memset(m_polygonram, 0xcc, m_polygonram.bytes()); // init spotram (super22 only) if (m_is_ss22) - m_spotram = make_unique_clear<uint16_t[]>(SPOTRAM_SIZE); + { + m_spotram = make_unique_clear<u16[]>(0x800); + save_pointer(NAME(m_spotram), 0x800); + } // init czram tables (super22 only) if (m_is_ss22) { - for (int table = 0; table < 4; table++) + for (int bank = 0; bank < 4; bank++) { - m_banked_czram[table] = make_unique_clear<uint16_t[]>(0x100); - m_recalc_czram[table] = make_unique_clear<uint8_t[]>(0x2000); - m_cz_was_written[table] = 1; + m_banked_czram[bank] = make_unique_clear<u16[]>(0x100); + m_recalc_czram[bank] = make_unique_clear<u8[]>(0x2000); + m_cz_was_written[bank] = 1; + + save_pointer(NAME(m_banked_czram[bank]), 0x100, bank); + save_pointer(NAME(m_recalc_czram[bank]), 0x2000, bank); } + + save_item(NAME(m_czattr)); + save_item(NAME(m_cz_was_written)); + } + else + { + save_item(NAME(m_fog_r_per_cztype)); + save_item(NAME(m_fog_g_per_cztype)); + save_item(NAME(m_fog_b_per_cztype)); } // init pointrom m_pointrom_size = memregion("pointrom")->bytes()/3; - m_pointrom = auto_alloc_array(machine(), int32_t, m_pointrom_size); - uint8_t* pointrom_low = memregion("pointrom")->base(); - uint8_t* pointrom_mid = pointrom_low + m_pointrom_size; - uint8_t* pointrom_high = pointrom_mid + m_pointrom_size; + m_pointrom = auto_alloc_array(machine(), s32, m_pointrom_size); + u8* pointrom_low = memregion("pointrom")->base(); + u8* pointrom_mid = pointrom_low + m_pointrom_size; + u8* pointrom_high = pointrom_mid + m_pointrom_size; for (int i = 0; i < m_pointrom_size; i++) { m_pointrom[i] = signed24(pointrom_high[i] << 16 | pointrom_mid[i] << 8 | pointrom_low[i]); } - m_pointram = make_unique_clear<uint32_t[]>(0x20000); + m_pointram = make_unique_clear<u32[]>(0x20000); + save_pointer(NAME(m_pointram), 0x20000); // force all texture tiles to be decoded now for (int i = 0; i < m_gfxdecode->gfx(1)->elements(); i++) m_gfxdecode->gfx(1)->get_data(i); - m_texture_tilemap = (uint16_t *)memregion("textilemap")->base(); - m_texture_tiledata = (uint8_t *)m_gfxdecode->gfx(1)->get_data(0); - m_texture_tileattr = std::make_unique<uint8_t[]>(0x080000*2); + m_texture_tilemap = (u16 *)memregion("textilemap")->base(); + m_texture_tiledata = (u8 *)m_gfxdecode->gfx(1)->get_data(0); + m_texture_tileattr = std::make_unique<u8[]>(0x080000*2); // unpack textures - uint8_t *packed_tileattr = 0x200000 + (uint8_t *)memregion("textilemap")->base(); - uint8_t *unpacked_tileattr = m_texture_tileattr.get(); + u8 *packed_tileattr = 0x200000 + (u8 *)memregion("textilemap")->base(); + u8 *unpacked_tileattr = m_texture_tileattr.get(); for (int i = 0; i < 0x80000; i++) { *unpacked_tileattr++ = (*packed_tileattr) >> 4; @@ -2405,7 +2494,7 @@ void namcos22_state::init_tables() } // make attr/y/x lookup table - m_texture_ayx_to_pixel = std::make_unique<uint8_t[]>(16*16*16); + m_texture_ayx_to_pixel = std::make_unique<u8[]>(16*16*16); for (int attr = 0; attr < 16; attr++) { for (int y = 0; y < 16; y++) @@ -2432,7 +2521,7 @@ void namcos22_state::init_tables() } } - // following setup is Namco System 22 specific + // following setup is System22 specific switch (m_gametype) { case NAMCOS22_RIDGE_RACER: @@ -2458,17 +2547,18 @@ void namcos22_state::init_tables() } } - void namcos22_state::video_start() { m_is_ss22 = (m_iomcu == nullptr); init_tables(); + m_posirq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(namcos22_state::posirq_callback),this)); + m_mix_bitmap = std::make_unique<bitmap_ind16>(640, 480); m_bgtilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos22_state::get_text_tile_info), this), TILEMAP_SCAN_ROWS, 16, 16, 64, 64); m_bgtilemap->set_transparent_pen(0xf); - m_gfxdecode->gfx(0)->set_source((uint8_t *)m_cgram.target()); + m_gfxdecode->gfx(0)->set_source((u8 *)m_cgram.target()); m_poly = auto_alloc(machine(), namcos22_renderer(*this)); } diff --git a/src/mame/video/namcos2_roz.cpp b/src/mame/video/namcos2_roz.cpp index cd5ff202775..7f2b40f73d0 100644 --- a/src/mame/video/namcos2_roz.cpp +++ b/src/mame/video/namcos2_roz.cpp @@ -2,14 +2,14 @@ // copyright-holders:David Haywood, Phil Stroffolino /* - Namco System 2 ROZ Tilemap - found on Namco System 2 video board (standard type) - - based on namcoic.txt this probably consists of the following - C102 - Controls CPU access to ROZ Memory Area. - (anything else?) + Namco System 2 ROZ Tilemap - found on Namco System 2 video board (standard type) - used by the following drivers - namcos2.cpp (all games EXCEPT Final Lap 1,2,3 , Lucky & Wild , Steel Gunner 1,2 , Suzuka 8 Hours 1,2 , Metal Hawk) + based on namcoic.txt this probably consists of the following + C102 - Controls CPU access to ROZ Memory Area. + (anything else?) + + used by the following drivers + namcos2.cpp (all games EXCEPT Final Lap 1,2,3 , Lucky & Wild , Steel Gunner 1,2 , Suzuka 8 Hours 1,2 , Metal Hawk) */ @@ -17,20 +17,34 @@ #include "emu.h" #include "namcos2_roz.h" +static const gfx_layout layout = +{ + 8,8, + RGN_FRAC(1,1), + 8, + { STEP8(0,1) }, + { STEP8(0,8) }, + { STEP8(0,8*8) }, + 8*8*8 +}; + +GFXDECODE_START( namcos2_roz_device::gfxinfo ) + GFXDECODE_DEVICE( DEVICE_SELF, 0, layout, 0, 16 ) +GFXDECODE_END + DEFINE_DEVICE_TYPE(NAMCOS2_ROZ, namcos2_roz_device, "namcos2_roz", "Namco Sysem 2 ROZ (C102)") namcos2_roz_device::namcos2_roz_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, NAMCOS2_ROZ, tag, owner, clock), + device_gfx_interface(mconfig, *this, gfxinfo), m_rozram(*this, finder_base::DUMMY_TAG), - m_roz_ctrl(*this, finder_base::DUMMY_TAG), - m_gfxdecode(*this, finder_base::DUMMY_TAG), - m_palette(*this, finder_base::DUMMY_TAG) + m_roz_ctrl(*this, finder_base::DUMMY_TAG) { } void namcos2_roz_device::device_start() { - m_tilemap_roz = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(namcos2_roz_device::roz_tile_info), this), TILEMAP_SCAN_ROWS, 8, 8, 256, 256); + m_tilemap_roz = &machine().tilemap().create(*this, tilemap_get_info_delegate(FUNC(namcos2_roz_device::roz_tile_info), this), TILEMAP_SCAN_ROWS, 8, 8, 256, 256); m_tilemap_roz->set_transparent_pen(0xff); } @@ -38,7 +52,7 @@ void namcos2_roz_device::device_start() TILE_GET_INFO_MEMBER(namcos2_roz_device::roz_tile_info) { int tile = m_rozram[tile_index]; - SET_TILE_INFO_MEMBER(3, tile, 0/*color*/, 0); + SET_TILE_INFO_MEMBER(0, tile, 0/*color*/, 0); } struct roz_param @@ -113,30 +127,30 @@ draw_roz_helper( if (bitmap.bpp() == 16) { /* On many processors, the simple approach of an outer loop over the - rows of the destination bitmap with an inner loop over the columns - of the destination bitmap has poor performance due to the order - that memory in the source bitmap is referenced when rotation - approaches 90 or 270 degrees. The reason is that the inner loop - ends up reading pixels not sequentially in the source bitmap, but - instead at rozInfo->incxx increments, which is at its maximum at 90 - degrees of rotation. This means that only a few (or as few as - one) source pixels are in each cache line at a time. - - Instead of the above, this code iterates in NxN blocks through the - destination bitmap. This has more overhead when there is little or - no rotation, but much better performance when there is closer to 90 - degrees of rotation (as long as the chunk of the source bitmap that - corresponds to an NxN destination block fits in cache!). - - N is defined by ROZ_BLOCK_SIZE below; the best N is one that is as - big as possible but at the same time not too big to prevent all of - the source bitmap pixels from fitting into cache at the same time. - Keep in mind that the block of source pixels used can be somewhat - scattered in memory. 8x8 works well on the few processors that - were tested; 16x16 seems to work even better for more modern - processors with larger caches, but since 8x8 works well enough and - is less likely to result in cache misses on processors with smaller - caches, it is used. + rows of the destination bitmap with an inner loop over the columns + of the destination bitmap has poor performance due to the order + that memory in the source bitmap is referenced when rotation + approaches 90 or 270 degrees. The reason is that the inner loop + ends up reading pixels not sequentially in the source bitmap, but + instead at rozInfo->incxx increments, which is at its maximum at 90 + degrees of rotation. This means that only a few (or as few as + one) source pixels are in each cache line at a time. + + Instead of the above, this code iterates in NxN blocks through the + destination bitmap. This has more overhead when there is little or + no rotation, but much better performance when there is closer to 90 + degrees of rotation (as long as the chunk of the source bitmap that + corresponds to an NxN destination block fits in cache!). + + N is defined by ROZ_BLOCK_SIZE below; the best N is one that is as + big as possible but at the same time not too big to prevent all of + the source bitmap pixels from fitting into cache at the same time. + Keep in mind that the block of source pixels used can be somewhat + scattered in memory. 8x8 works well on the few processors that + were tested; 16x16 seems to work even better for more modern + processors with larger caches, but since 8x8 works well enough and + is less likely to result in cache misses on processors with smaller + caches, it is used. */ #define ROZ_BLOCK_SIZE 8 diff --git a/src/mame/video/namcos2_roz.h b/src/mame/video/namcos2_roz.h index 7fcce11f708..e513251fa5a 100644 --- a/src/mame/video/namcos2_roz.h +++ b/src/mame/video/namcos2_roz.h @@ -7,10 +7,9 @@ #pragma once #include "screen.h" -#include "emupal.h" -class namcos2_roz_device : public device_t +class namcos2_roz_device : public device_t, public device_gfx_interface { public: // construction/destruction @@ -18,8 +17,6 @@ public: template <typename T> void set_rozram_tag(T &&tag) { m_rozram.set_tag(std::forward<T>(tag)); } template <typename T> void set_rozctrl_tag(T &&tag) { m_roz_ctrl.set_tag(std::forward<T>(tag)); } - template <typename T> void set_palette_tag(T &&tag) { m_palette.set_tag(std::forward<T>(tag)); } - template <typename T> void set_gfxdecode_tag(T &&tag) { m_gfxdecode.set_tag(std::forward<T>(tag)); } DECLARE_WRITE16_MEMBER( rozram_word_w ); @@ -36,11 +33,10 @@ private: TILE_GET_INFO_MEMBER( roz_tile_info ); tilemap_t *m_tilemap_roz; - + required_shared_ptr<uint16_t> m_rozram; required_shared_ptr<uint16_t> m_roz_ctrl; - required_device<gfxdecode_device> m_gfxdecode; - required_device<palette_device> m_palette; + DECLARE_GFXDECODE_MEMBER(gfxinfo); }; // device type definition diff --git a/src/mame/video/namcos2_sprite.cpp b/src/mame/video/namcos2_sprite.cpp index 3bca708fef1..9c9bca2546b 100644 --- a/src/mame/video/namcos2_sprite.cpp +++ b/src/mame/video/namcos2_sprite.cpp @@ -2,18 +2,18 @@ // copyright-holders:David Haywood, Phil Stroffolino /* - Namco System 2 Sprites - found on Namco System 2 video board (standard type) - - based on namcoic.txt this probably consists of the following - C106 - Generates memory output clocks to generate X-Axis Zoom for Line Buffer Writes - C134 - Object Memory Address Generator. Sequences the sprite memory contents to the hardware. - C135 - Checks is object is displayed on Current output line. - C146 - Steers the Decode Object Pixel data to the correct line buffer A or B + Namco System 2 Sprites - found on Namco System 2 video board (standard type) - Metal Hawk requires a different draw function, so might use a different chip unless the hookup is just scrambled (needs checking) + based on namcoic.txt this probably consists of the following + C106 - Generates memory output clocks to generate X-Axis Zoom for Line Buffer Writes + C134 - Object Memory Address Generator. Sequences the sprite memory contents to the hardware. + C135 - Checks is object is displayed on Current output line. + C146 - Steers the Decode Object Pixel data to the correct line buffer A or B - used by the following drivers - namcos2.cpp (all games EXCEPT Steel Gunner, Steel Gunner 2, Lucky & Wild, Suzuka 8 Hours, Suzuka 8 Hours 2 which use the newer Namco NB1 style sprites, see namco_c355spr.cpp) + Metal Hawk requires a different draw function, so might use a different chip unless the hookup is just scrambled (needs checking) + + used by the following drivers + namcos2.cpp (all games EXCEPT Steel Gunner, Steel Gunner 2, Lucky & Wild, Suzuka 8 Hours, Suzuka 8 Hours 2 which use the newer Namco NB1 style sprites, see namco_c355spr.cpp) */ @@ -26,7 +26,6 @@ DEFINE_DEVICE_TYPE(NAMCOS2_SPRITE, namcos2_sprite_device, "namcos2_sprite", "Nam namcos2_sprite_device::namcos2_sprite_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, NAMCOS2_SPRITE, tag, owner, clock), m_gfxdecode(*this, finder_base::DUMMY_TAG), - m_palette(*this, finder_base::DUMMY_TAG), m_spriteram(*this, finder_base::DUMMY_TAG) { } @@ -50,8 +49,9 @@ void namcos2_sprite_device::zdrawgfxzoom( { if( gfx ) { - int shadow_offset = (m_palette->shadows_enabled())?m_palette->entries():0; - const pen_t *pal = &m_palette->pen(gfx->colorbase() + gfx->granularity() * (color % gfx->colors())); + device_palette_interface &palette = m_gfxdecode->palette(); + int shadow_offset = (palette.shadows_enabled())?palette.entries():0; + const pen_t *pal = &palette.pen(gfx->colorbase() + gfx->granularity() * (color % gfx->colors())); const uint8_t *source_base = gfx->get_data(code % gfx->elements()); int sprite_screen_height = (scaley*gfx->height()+0x8000)>>16; int sprite_screen_width = (scalex*gfx->width()+0x8000)>>16; @@ -125,31 +125,31 @@ void namcos2_sprite_device::zdrawgfxzoom( /* this code was previously shared with the c355 where this was needed if( m_palxor ) { - for( x=sx; x<ex; x++ ) - { - int c = source[x_index>>16]; - if( c != 0xff ) - { - if( pri[x]<=zpos ) - { - switch( c ) - { - case 0: - dest[x] = 0x4000|(dest[x]&0x1fff); - break; - case 1: - dest[x] = 0x6000|(dest[x]&0x1fff); - break; - default: - dest[x] = pal[c]; - break; - } - pri[x] = zpos; - } - } - x_index += dx; - } - y_index += dy; + for( x=sx; x<ex; x++ ) + { + int c = source[x_index>>16]; + if( c != 0xff ) + { + if( pri[x]<=zpos ) + { + switch( c ) + { + case 0: + dest[x] = 0x4000|(dest[x]&0x1fff); + break; + case 1: + dest[x] = 0x6000|(dest[x]&0x1fff); + break; + default: + dest[x] = pal[c]; + break; + } + pri[x] = zpos; + } + } + x_index += dx; + } + y_index += dy; } else */ @@ -343,7 +343,7 @@ void namcos2_sprite_device::draw_sprites_metalhawk(screen_device &screen, bitmap int scaley = (sizey<<16)/(bBigSprite?0x20:0x10); /* swap xy */ - int rgn = (flags&0x01) ? 3 : 0; + int rgn = (flags&0x01); gfx_element *gfx = m_gfxdecode->gfx(rgn); diff --git a/src/mame/video/namcos2_sprite.h b/src/mame/video/namcos2_sprite.h index ccbe4b1d806..03fe3796293 100644 --- a/src/mame/video/namcos2_sprite.h +++ b/src/mame/video/namcos2_sprite.h @@ -15,7 +15,6 @@ public: // construction/destruction namcos2_sprite_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - template <typename T> void set_palette_tag(T &&tag) { m_palette.set_tag(std::forward<T>(tag)); } template <typename T> void set_gfxdecode_tag(T &&tag) { m_gfxdecode.set_tag(std::forward<T>(tag)); } template <typename T> void set_spriteram_tag(T &&tag) { m_spriteram.set_tag(std::forward<T>(tag)); } @@ -32,7 +31,6 @@ private: void zdrawgfxzoom(screen_device &screen, bitmap_rgb32 &dest_bmp, const rectangle &clip, gfx_element *gfx, uint32_t code, uint32_t color, int flipx, int flipy, int sx, int sy, int scalex, int scaley, int zpos); required_device<gfxdecode_device> m_gfxdecode; - required_device<palette_device> m_palette; required_shared_ptr<uint16_t> m_spriteram; }; diff --git a/src/mame/video/neogeo.cpp b/src/mame/video/neogeo.cpp index f2f23f46010..47e88ab434c 100644 --- a/src/mame/video/neogeo.cpp +++ b/src/mame/video/neogeo.cpp @@ -116,7 +116,6 @@ WRITE16_MEMBER(neogeo_base_state::paletteram_w) } - /************************************* * * Video system start @@ -127,8 +126,7 @@ void neogeo_base_state::video_start() { create_rgb_lookups(); - m_paletteram.resize(0x1000 * 2); - memset(&m_paletteram[0], 0, 0x1000 * 2 * sizeof(m_paletteram[0])); + m_paletteram.resize(0x1000 * 2, 0); m_screen_shadow = 0; m_palette_bank = 0; @@ -136,13 +134,11 @@ void neogeo_base_state::video_start() save_item(NAME(m_paletteram)); save_item(NAME(m_screen_shadow)); save_item(NAME(m_palette_bank)); - machine().save().register_postload(save_prepost_delegate(FUNC(neogeo_base_state::set_pens), this)); set_pens(); } - /************************************* * * Video system reset @@ -154,14 +150,13 @@ void neogeo_base_state::video_reset() } - /************************************* * * Video update * *************************************/ -uint32_t neogeo_base_state::screen_update_neogeo(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +uint32_t neogeo_base_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { // fill with background color first bitmap.fill(*m_bg_pen, cliprect); @@ -174,7 +169,6 @@ uint32_t neogeo_base_state::screen_update_neogeo(screen_device &screen, bitmap_r } - /************************************* * * Video control diff --git a/src/mame/video/neogeo_spr.cpp b/src/mame/video/neogeo_spr.cpp index a53d09b871d..ea4fd41fd88 100644 --- a/src/mame/video/neogeo_spr.cpp +++ b/src/mame/video/neogeo_spr.cpp @@ -177,6 +177,7 @@ void neosprite_base_device::neogeo_set_fixed_layer_source(uint8_t data) void neosprite_base_device::draw_fixed_layer(bitmap_rgb32 &bitmap, int scanline) { + assert((m_fixed_layer_source && m_region_fixed != nullptr) || (m_region_fixedbios != nullptr)); int x; uint8_t* gfx_base = m_fixed_layer_source ? m_region_fixed : m_region_fixedbios->base(); diff --git a/src/mame/video/pc080sn.cpp b/src/mame/video/pc080sn.cpp index 64e2a825dd6..62689d6759f 100644 --- a/src/mame/video/pc080sn.cpp +++ b/src/mame/video/pc080sn.cpp @@ -117,8 +117,15 @@ void pc080sn_device::device_start() save_pointer(NAME(m_ram), PC080SN_RAM_SIZE / 2); save_item(NAME(m_ctrl)); - machine().save().register_postload(save_prepost_delegate(FUNC(pc080sn_device::restore_scroll), this)); +} +//------------------------------------------------- +// device_post_load - device-specific postload +//------------------------------------------------- + +void pc080sn_device::device_post_load() +{ + restore_scroll(); } /***************************************************************************** diff --git a/src/mame/video/pc080sn.h b/src/mame/video/pc080sn.h index 4c429dc7f9b..39a2ca6794a 100644 --- a/src/mame/video/pc080sn.h +++ b/src/mame/video/pc080sn.h @@ -45,11 +45,12 @@ public: void restore_scroll(); - protected: +protected: // device-level overrides virtual void device_start() override; + virtual void device_post_load() override; - private: +private: // internal state uint16_t m_ctrl[8]; diff --git a/src/mame/video/pcd.cpp b/src/mame/video/pcd.cpp index 003ad8ca1b8..b6609505c8f 100644 --- a/src/mame/video/pcd.cpp +++ b/src/mame/video/pcd.cpp @@ -36,7 +36,6 @@ pcx_video_device::pcx_video_device(const machine_config &mconfig, const char *ta pcdx_video_device(mconfig, PCX_VIDEO, tag, owner, clock), device_serial_interface(mconfig, *this), m_crtc(*this, "crtc"), - m_vram(4*1024), m_charrom(*this, "char"), m_txd_handler(*this) { @@ -129,16 +128,22 @@ void pcx_video_device::pcx_vid_map(address_map &map) void pcx_video_device::pcx_vid_io(address_map &map) { - map(0x8000, 0x8007).rw("crtc", FUNC(scn2672_device::read), FUNC(scn2672_device::write)); + map(0x8000, 0x8007).rw(m_crtc, FUNC(scn2672_device::read), FUNC(scn2672_device::write)); map(0x8008, 0x8008).r(FUNC(pcx_video_device::unk_r)); - map(0xa000, 0xa001).rw(FUNC(pcx_video_device::vram_latch_r), FUNC(pcx_video_device::vram_latch_w)); + map(0xa000, 0xa000).rw(m_crtc, FUNC(scn2672_device::buffer_r), FUNC(scn2672_device::buffer_w)); + map(0xa001, 0xa001).rw(m_crtc, FUNC(scn2672_device::attr_buffer_r), FUNC(scn2672_device::attr_buffer_w)); map(0xa002, 0xa003).rw(FUNC(pcx_video_device::term_mcu_r), FUNC(pcx_video_device::term_mcu_w)); map(0xc000, 0xc7ff).ram(); } -void pcx_video_device::pcx_vram(address_map &map) +void pcx_video_device::pcx_char_ram(address_map &map) { - map(0x0000, 0x07ff).rw(FUNC(pcx_video_device::vram_r), FUNC(pcx_video_device::vram_w)); + map(0x0000, 0x07ff).ram(); +} + +void pcx_video_device::pcx_attr_ram(address_map &map) +{ + map(0x0000, 0x07ff).ram(); } MACHINE_CONFIG_START(pcx_video_device::device_add_mconfig) @@ -161,7 +166,8 @@ MACHINE_CONFIG_START(pcx_video_device::device_add_mconfig) m_crtc->set_character_width(12); m_crtc->set_display_callback(FUNC(pcx_video_device::display_pixels)); m_crtc->set_screen("screen"); - m_crtc->set_addrmap(0, &pcx_video_device::pcx_vram); + m_crtc->set_addrmap(0, &pcx_video_device::pcx_char_ram); + m_crtc->set_addrmap(1, &pcx_video_device::pcx_attr_ram); MACHINE_CONFIG_END @@ -211,19 +217,25 @@ SCN2674_DRAW_CHARACTER_MEMBER(pcd_video_device::display_pixels) SCN2672_DRAW_CHARACTER_MEMBER(pcx_video_device::display_pixels) { - uint8_t data; - address <<= 1; - data = m_charrom[m_vram[address] * 16 + linecount + (m_vram[address + 1] & 0x20 ? 4096 : 0)]; - if(cursor && blink) - data = 0xff; - if(m_p1 & 0x20) - data = ~data; - for(int i = 0; i < 8; i++) + uint16_t data = m_charrom[charcode * 16 + linecount + (attrcode & 0x20 ? 4096 : 0)]; + + if (cursor && blink) + data = 0x3ff; + else { - rgb_t pix = palette().pen(BIT(data, 7) ? 1 : 0); - bitmap.pix32(y, x++) = pix; - bitmap.pix32(y, x++) = pix; data <<= 1; + data |= data << 1; + } + + if (m_p1 & 0x20) + data ^= 0x3ff; + + for (int i = 0; i < 12; i++) + { + rgb_t pix = palette().pen(BIT(data, 10) ? 1 : 0); + bitmap.pix32(y, x++) = pix; + if (i != 1) + data <<= 1; } } @@ -365,31 +377,6 @@ WRITE8_MEMBER(pcx_video_device::term_mcu_w) } } -WRITE8_MEMBER(pcx_video_device::vram_w) -{ - offset <<= 1; - m_vram[offset] = m_vram_latch_w[0]; - m_vram[offset+1] = m_vram_latch_w[1]; -} - -READ8_MEMBER(pcx_video_device::vram_r) -{ - offset <<= 1; - m_vram_latch_r[0] = m_vram[offset]; - m_vram_latch_r[1] = m_vram[offset+1]; - return m_vram[offset]; -} - -WRITE8_MEMBER(pcx_video_device::vram_latch_w) -{ - m_vram_latch_w[offset] = data; -} - -READ8_MEMBER(pcx_video_device::vram_latch_r) -{ - return m_vram_latch_r[offset]; -} - READ8_MEMBER(pcdx_video_device::detect_r) { return 0; @@ -429,8 +416,8 @@ void pcd_video_device::device_reset() void pcd_video_device::map(address_map &map) { - map(0x00, 0x0f).w("crtc", FUNC(scn2674_device::write)).umask16(0x00ff); - map(0x00, 0x0f).r("crtc", FUNC(scn2674_device::read)).umask16(0xff00); + map(0x00, 0x0f).w(m_crtc, FUNC(scn2674_device::write)).umask16(0x00ff); + map(0x00, 0x0f).r(m_crtc, FUNC(scn2674_device::read)).umask16(0xff00); map(0x20, 0x20).w(FUNC(pcd_video_device::vram_sw_w)); map(0x30, 0x33).rw("graphics", FUNC(i8741_device::upi41_master_r), FUNC(i8741_device::upi41_master_w)).umask16(0x00ff); } diff --git a/src/mame/video/pcd.h b/src/mame/video/pcd.h index 1c92a66512b..22a28000616 100644 --- a/src/mame/video/pcd.h +++ b/src/mame/video/pcd.h @@ -93,16 +93,13 @@ public: DECLARE_WRITE8_MEMBER(term_w); DECLARE_READ8_MEMBER(term_mcu_r); DECLARE_WRITE8_MEMBER(term_mcu_w); - DECLARE_READ8_MEMBER(vram_r); - DECLARE_WRITE8_MEMBER(vram_w); - DECLARE_READ8_MEMBER(vram_latch_r); - DECLARE_WRITE8_MEMBER(vram_latch_w); DECLARE_READ8_MEMBER(unk_r); DECLARE_WRITE8_MEMBER(p1_w); void pcx_vid_io(address_map &map); void pcx_vid_map(address_map &map); - void pcx_vram(address_map &map); + void pcx_char_ram(address_map &map); + void pcx_attr_ram(address_map &map); protected: void device_start() override; void device_reset() override; @@ -115,10 +112,9 @@ protected: private: required_device<scn2672_device> m_crtc; - std::vector<uint8_t> m_vram; required_region_ptr<uint8_t> m_charrom; devcb_write_line m_txd_handler; - uint8_t m_term_key, m_term_char, m_term_stat, m_vram_latch_r[2], m_vram_latch_w[2], m_p1; + uint8_t m_term_key, m_term_char, m_term_stat, m_p1; DECLARE_READ8_MEMBER(rx_callback); DECLARE_WRITE8_MEMBER(tx_callback); diff --git a/src/mame/video/powervr2.cpp b/src/mame/video/powervr2.cpp index 1cbb9409d05..890490c5c64 100644 --- a/src/mame/video/powervr2.cpp +++ b/src/mame/video/powervr2.cpp @@ -1804,8 +1804,8 @@ void powervr2_device::process_ta_fifo() if (paratype == 7) { if ((global_paratype == 5) || - (tafifo_listtype == DISPLAY_LIST_OPAQUE_MOD) || - (tafifo_listtype == DISPLAY_LIST_TRANS_MOD)) + (tafifo_listtype == DISPLAY_LIST_OPAQUE_MOD) || + (tafifo_listtype == DISPLAY_LIST_TRANS_MOD)) { tafifo_vertexwords = 16; } diff --git a/src/mame/video/segas24.cpp b/src/mame/video/segas24.cpp index 64f0d989e38..3234b1eb6cd 100644 --- a/src/mame/video/segas24.cpp +++ b/src/mame/video/segas24.cpp @@ -30,7 +30,7 @@ namespace { }; } -uint32_t segas24_state::screen_update_system24(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +uint32_t segas24_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { if(m_vmixer->get_reg(13) & 1) { bitmap.fill(m_palette->black_pen()); diff --git a/src/mame/video/seta001.cpp b/src/mame/video/seta001.cpp index 3fb9c3f7c18..231aa339431 100644 --- a/src/mame/video/seta001.cpp +++ b/src/mame/video/seta001.cpp @@ -270,13 +270,13 @@ void seta001_device::draw_background( bitmap_ind16 &bitmap, const rectangle &cli int const max_y = 0xf0; int startcol = 0; - + if (ctrl & 0x01) startcol += 0x4; if (ctrl & 0x02) startcol += 0x8; - + xoffs = flip ? m_bg_flipxoffs : m_bg_noflipxoffs; yoffs = flip ? m_bg_flipyoffs : m_bg_noflipyoffs; diff --git a/src/mame/video/ssozumo.cpp b/src/mame/video/ssozumo.cpp index 06ba66b7a8d..6cb4f1ad14b 100644 --- a/src/mame/video/ssozumo.cpp +++ b/src/mame/video/ssozumo.cpp @@ -137,6 +137,8 @@ void ssozumo_state::video_start() 8, 8, 32, 32); m_fg_tilemap->set_transparent_pen(0); + + save_item(NAME(m_color_bank)); } void ssozumo_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect) diff --git a/src/mame/video/stlforce.cpp b/src/mame/video/stlforce.cpp deleted file mode 100644 index ad52fac5e6a..00000000000 --- a/src/mame/video/stlforce.cpp +++ /dev/null @@ -1,189 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:David Haywood -/* video/stlforce.cpp - see main driver for other notes */ - -#include "emu.h" -#include "includes/stlforce.h" - -/* background, appears to be the bottom layer */ - -TILE_GET_INFO_MEMBER(stlforce_state::get_bg_tile_info) -{ - int tileno,colour; - - tileno = m_bg_videoram[tile_index] & 0x0fff; - colour = m_bg_videoram[tile_index] & 0xe000; - colour = colour >> 13; - SET_TILE_INFO_MEMBER(0,tileno,colour,0); -} - -WRITE16_MEMBER(stlforce_state::bg_videoram_w) -{ - m_bg_videoram[offset] = data; - m_bg_tilemap->mark_tile_dirty(offset); -} - -/* middle layer, low */ - -TILE_GET_INFO_MEMBER(stlforce_state::get_mlow_tile_info) -{ - int tileno,colour; - - tileno = m_mlow_videoram[tile_index] & 0x0fff; - colour = m_mlow_videoram[tile_index] & 0xe000; - colour = colour >> 13; - colour += 8; - tileno += 0x1000; - - SET_TILE_INFO_MEMBER(0,tileno,colour,0); -} - -WRITE16_MEMBER(stlforce_state::mlow_videoram_w) -{ - m_mlow_videoram[offset] = data; - m_mlow_tilemap->mark_tile_dirty(offset); -} - -/* middle layer, high */ - -TILE_GET_INFO_MEMBER(stlforce_state::get_mhigh_tile_info) -{ - int tileno,colour; - - tileno = m_mhigh_videoram[tile_index] & 0x0fff; - colour = m_mhigh_videoram[tile_index] & 0xe000; - colour = colour >> 13; - colour += 16; - tileno += 0x2000; - - SET_TILE_INFO_MEMBER(0,tileno,colour,0); -} - -WRITE16_MEMBER(stlforce_state::mhigh_videoram_w) -{ - m_mhigh_videoram[offset] = data; - m_mhigh_tilemap->mark_tile_dirty(offset); -} - -/* text layer, appears to be the top layer */ - -TILE_GET_INFO_MEMBER(stlforce_state::get_tx_tile_info) -{ - int tileno,colour; - - tileno = m_tx_videoram[tile_index] & 0x0fff; - colour = m_tx_videoram[tile_index] & 0xe000; - colour = colour >> 13; - - tileno += 0xc000; - - colour += 24; - SET_TILE_INFO_MEMBER(1,tileno,colour,0); -} - -WRITE16_MEMBER(stlforce_state::tx_videoram_w) -{ - m_tx_videoram[offset] = data; - m_tx_tilemap->mark_tile_dirty(offset); -} - -/* sprites - quite a bit still needs doing .. */ - -void stlforce_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect ) -{ - const uint16_t *source = m_spriteram+0x0; - const uint16_t *finish = m_spriteram+0x800; - gfx_element *gfx = m_gfxdecode->gfx(2); - int ypos, xpos, attr, num; - - while (source<finish) - { - if (source[0] & 0x0800) - { - ypos = source[0]& 0x01ff; - attr = source[1]& 0x000f; - xpos = source[3]& 0x03ff; - num = (source[2] & 0x1fff); - - ypos = 512-ypos; - - - gfx->transpen(bitmap, - cliprect, - num, - 64+attr, - 0,0, - xpos+m_sprxoffs,ypos,0 ); - } - - source += 0x4; - } -} - -uint32_t stlforce_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - int i; - - if (m_vidattrram[6] & 1) - { - for(i=0;i<256;i++) - m_bg_tilemap->set_scrollx(i, m_bg_scrollram[i]+9); //+9 for twinbrat - } - else - { - for(i=0;i<256;i++) - m_bg_tilemap->set_scrollx(i, m_bg_scrollram[0]+9); //+9 for twinbrat - } - - if (m_vidattrram[6] & 4) - { - for(i=0;i<256;i++) - m_mlow_tilemap->set_scrollx(i, m_mlow_scrollram[i]+8); - } - else - { - for(i=0;i<256;i++) - m_mlow_tilemap->set_scrollx(i, m_mlow_scrollram[0]+8); - } - - if (m_vidattrram[6] & 0x10) - { - for(i=0;i<256;i++) - m_mhigh_tilemap->set_scrollx(i, m_mhigh_scrollram[i]+8); - } - else - { - for(i=0;i<256;i++) - m_mhigh_tilemap->set_scrollx(i, m_mhigh_scrollram[0]+8); - } - - m_bg_tilemap->set_scrolly(0, m_vidattrram[1]); - m_mlow_tilemap->set_scrolly(0, m_vidattrram[2]); - m_mhigh_tilemap->set_scrolly(0, m_vidattrram[3]); - - m_tx_tilemap->set_scrollx(0, m_vidattrram[0]+8); - m_tx_tilemap->set_scrolly(0,m_vidattrram[4]); - - m_bg_tilemap->draw(screen, bitmap, cliprect, 0,0); - m_mlow_tilemap->draw(screen, bitmap, cliprect, 0,0); - m_mhigh_tilemap->draw(screen, bitmap, cliprect, 0,0); - draw_sprites(bitmap, cliprect); - m_tx_tilemap->draw(screen, bitmap, cliprect, 0,0); - return 0; -} - -void stlforce_state::video_start() -{ - m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(stlforce_state::get_bg_tile_info),this), TILEMAP_SCAN_COLS, 16,16,64,16); - m_mlow_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(stlforce_state::get_mlow_tile_info),this), TILEMAP_SCAN_COLS, 16,16,64,16); - m_mhigh_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(stlforce_state::get_mhigh_tile_info),this),TILEMAP_SCAN_COLS, 16,16,64,16); - m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(stlforce_state::get_tx_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8,64,32); - - m_mlow_tilemap->set_transparent_pen(0); - m_mhigh_tilemap->set_transparent_pen(0); - m_tx_tilemap->set_transparent_pen(0); - - m_bg_tilemap->set_scroll_rows(256); - m_mlow_tilemap->set_scroll_rows(256); - m_mhigh_tilemap->set_scroll_rows(256); -} diff --git a/src/mame/video/targeth.cpp b/src/mame/video/targeth.cpp index 2844fcb3e19..def35b159d3 100644 --- a/src/mame/video/targeth.cpp +++ b/src/mame/video/targeth.cpp @@ -34,19 +34,11 @@ 1 | xxxxxxxx x------- | not used? */ -TILE_GET_INFO_MEMBER(targeth_state::get_tile_info_screen0) +template<int Layer> +TILE_GET_INFO_MEMBER(targeth_state::get_tile_info) { - int data = m_videoram[tile_index << 1]; - int data2 = m_videoram[(tile_index << 1) + 1]; - int code = data & 0x3fff; - - SET_TILE_INFO_MEMBER(0, code, data2 & 0x1f, TILE_FLIPXY((data2 >> 5) & 0x03)); -} - -TILE_GET_INFO_MEMBER(targeth_state::get_tile_info_screen1) -{ - int data = m_videoram[(0x2000/2) + (tile_index << 1)]; - int data2 = m_videoram[(0x2000/2) + (tile_index << 1) + 1]; + int data = m_videoram[(Layer * 0x2000/2) + (tile_index << 1)]; + int data2 = m_videoram[(Layer * 0x2000/2) + (tile_index << 1) + 1]; int code = data & 0x3fff; SET_TILE_INFO_MEMBER(0, code, data2 & 0x1f, TILE_FLIPXY((data2 >> 5) & 0x03)); @@ -73,8 +65,8 @@ WRITE16_MEMBER(targeth_state::vram_w) void targeth_state::video_start() { - m_pant[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(targeth_state::get_tile_info_screen0),this),TILEMAP_SCAN_ROWS,16,16,64,32); - m_pant[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(targeth_state::get_tile_info_screen1),this),TILEMAP_SCAN_ROWS,16,16,64,32); + m_pant[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(targeth_state::get_tile_info<0>),this),TILEMAP_SCAN_ROWS,16,16,64,32); + m_pant[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(targeth_state::get_tile_info<1>),this),TILEMAP_SCAN_ROWS,16,16,64,32); m_pant[0]->set_transparent_pen(0); } diff --git a/src/mame/video/tc0080vco.cpp b/src/mame/video/tc0080vco.cpp index f90984319bc..fc870de2a23 100644 --- a/src/mame/video/tc0080vco.cpp +++ b/src/mame/video/tc0080vco.cpp @@ -178,7 +178,6 @@ void tc0080vco_device::device_start() m_gfxdecode->set_gfx(m_txnum, std::make_unique<gfx_element>(&m_gfxdecode->palette(), charlayout, (uint8_t *)m_char_ram, 0, 1, 512)); save_pointer(NAME(m_ram), TC0080VCO_RAM_SIZE / 2); - machine().save().register_postload(save_prepost_delegate(FUNC(tc0080vco_device::postload), this)); } @@ -680,8 +679,11 @@ READ_LINE_MEMBER( tc0080vco_device::flipscreen_r ) return m_flipscreen; } +//------------------------------------------------- +// device_post_load - device-specific postload +//------------------------------------------------- -void tc0080vco_device::postload() +void tc0080vco_device::device_post_load() { m_flipscreen = m_scroll_ram[0] & 0x0c00; diff --git a/src/mame/video/tc0080vco.h b/src/mame/video/tc0080vco.h index 8185163ab14..64665db56ab 100644 --- a/src/mame/video/tc0080vco.h +++ b/src/mame/video/tc0080vco.h @@ -34,11 +34,11 @@ public: uint16_t scrram_r(int offset); DECLARE_WRITE16_MEMBER( scrollram_w ); READ_LINE_MEMBER( flipscreen_r ); - void postload(); protected: // device-level overrides virtual void device_start() override; + virtual void device_post_load() override; private: // internal state diff --git a/src/mame/video/tc0100scn.cpp b/src/mame/video/tc0100scn.cpp index cc4a37b0e3e..6016594f76a 100644 --- a/src/mame/video/tc0100scn.cpp +++ b/src/mame/video/tc0100scn.cpp @@ -287,7 +287,6 @@ void tc0100scn_device::device_start() save_item(NAME(m_ctrl)); save_item(NAME(m_dblwidth)); save_item(NAME(m_gfxbank)); - machine().save().register_postload(save_prepost_delegate(FUNC(tc0100scn_device::postload), this)); } //------------------------------------------------- @@ -421,8 +420,11 @@ void tc0100scn_device::restore_scroll() m_tilemap[2][1]->set_flip(flip); } +//------------------------------------------------- +// device_post_load - device-specific postload +//------------------------------------------------- -void tc0100scn_device::postload() +void tc0100scn_device::device_post_load() { set_layer_ptrs(); restore_scroll(); diff --git a/src/mame/video/tc0100scn.h b/src/mame/video/tc0100scn.h index 2311448ba6e..3236cfb3279 100644 --- a/src/mame/video/tc0100scn.h +++ b/src/mame/video/tc0100scn.h @@ -65,12 +65,11 @@ public: register. Use this function to draw tilemaps in the correct order. */ int bottomlayer(); - void postload(); - protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_post_load() override; private: // internal state diff --git a/src/mame/video/tc0110pcr.cpp b/src/mame/video/tc0110pcr.cpp index 05fd8d42c15..6ad26828d6c 100644 --- a/src/mame/video/tc0110pcr.cpp +++ b/src/mame/video/tc0110pcr.cpp @@ -40,8 +40,6 @@ void tc0110pcr_device::device_start() save_pointer(NAME(m_ram), TC0110PCR_RAM_SIZE); save_item(NAME(m_type)); save_item(NAME(m_addr)); - machine().save().register_postload(save_prepost_delegate(FUNC(tc0110pcr_device::restore_colors), this)); - } //------------------------------------------------- @@ -53,6 +51,15 @@ void tc0110pcr_device::device_reset() m_type = 0; /* default, xBBBBBGGGGGRRRRR */ } +//------------------------------------------------- +// device_post_load - device-specific postload +//------------------------------------------------- + +void tc0110pcr_device::device_post_load() +{ + restore_colors(); +} + /***************************************************************************** DEVICE HANDLERS *****************************************************************************/ diff --git a/src/mame/video/tc0110pcr.h b/src/mame/video/tc0110pcr.h index ab27b6df9b3..cb0b4be2772 100644 --- a/src/mame/video/tc0110pcr.h +++ b/src/mame/video/tc0110pcr.h @@ -31,6 +31,7 @@ protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_post_load() override; private: std::unique_ptr<uint16_t[]> m_ram; diff --git a/src/mame/video/tc0480scp.cpp b/src/mame/video/tc0480scp.cpp index 6731b655d2e..a4791f33a90 100644 --- a/src/mame/video/tc0480scp.cpp +++ b/src/mame/video/tc0480scp.cpp @@ -286,7 +286,6 @@ void tc0480scp_device::device_start() save_item(NAME(m_bgscrolly)); save_item(NAME(m_pri_reg)); save_item(NAME(m_dblwidth)); - machine().save().register_postload(save_prepost_delegate(FUNC(tc0480scp_device::postload), this)); } //------------------------------------------------- @@ -965,7 +964,11 @@ READ8_MEMBER( tc0480scp_device::pri_reg_r ) return m_pri_reg; } -void tc0480scp_device::postload() +//------------------------------------------------- +// device_post_load - device-specific postload +//------------------------------------------------- + +void tc0480scp_device::device_post_load() { int reg; int flip = m_ctrl[0xf] & 0x40; diff --git a/src/mame/video/tc0480scp.h b/src/mame/video/tc0480scp.h index 282f8473a0d..084922f225d 100644 --- a/src/mame/video/tc0480scp.h +++ b/src/mame/video/tc0480scp.h @@ -57,12 +57,11 @@ public: /* Undrfire needs to read this for a sprite/tile priority hack */ DECLARE_READ8_MEMBER( pri_reg_r ); - void postload(); - protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_post_load() override; private: // internal state diff --git a/src/mame/video/tecmo16.cpp b/src/mame/video/tecmo16.cpp index e256f9b1fc2..dbd5da59a7d 100644 --- a/src/mame/video/tecmo16.cpp +++ b/src/mame/video/tecmo16.cpp @@ -69,6 +69,7 @@ void tecmo16_state::video_start() /* set up tile layers */ m_screen->register_screen_bitmap(m_tile_bitmap_bg); m_screen->register_screen_bitmap(m_tile_bitmap_fg); + m_screen->register_screen_bitmap(m_tile_bitmap_tx); /* set up sprites */ m_screen->register_screen_bitmap(m_sprite_bitmap); @@ -93,6 +94,7 @@ VIDEO_START_MEMBER(tecmo16_state,ginkun) /* set up tile layers */ m_screen->register_screen_bitmap(m_tile_bitmap_bg); m_screen->register_screen_bitmap(m_tile_bitmap_fg); + m_screen->register_screen_bitmap(m_tile_bitmap_tx); /* set up sprites */ m_screen->register_screen_bitmap(m_sprite_bitmap); @@ -115,6 +117,7 @@ VIDEO_START_MEMBER(tecmo16_state,riot) /* set up tile layers */ m_screen->register_screen_bitmap(m_tile_bitmap_bg); m_screen->register_screen_bitmap(m_tile_bitmap_fg); + m_screen->register_screen_bitmap(m_tile_bitmap_tx); /* set up sprites */ m_screen->register_screen_bitmap(m_sprite_bitmap); @@ -219,20 +222,19 @@ uint32_t tecmo16_state::screen_update(screen_device &screen, bitmap_rgb32 &bitma { m_tile_bitmap_bg.fill(0, cliprect); m_tile_bitmap_fg.fill(0, cliprect); - m_sprite_bitmap.fill(0, cliprect); + m_tile_bitmap_tx.fill(0, cliprect); bitmap.fill(0, cliprect); - if (m_game_is_riot) m_sprgen->gaiden_draw_sprites(screen, m_gfxdecode, cliprect, m_spriteram, 0, 0, flip_screen(), m_sprite_bitmap); - else m_sprgen->gaiden_draw_sprites(screen, m_gfxdecode, cliprect, m_spriteram, 2, 0, flip_screen(), m_sprite_bitmap); - m_bg_tilemap->draw(screen, m_tile_bitmap_bg, cliprect, 0, 0); m_fg_tilemap->draw(screen, m_tile_bitmap_fg, cliprect, 0, 0); + m_tx_tilemap->draw(screen, m_tile_bitmap_tx, cliprect, 0, 0); - m_mixer->mix_bitmaps(screen, bitmap, cliprect, *m_palette, &m_tile_bitmap_bg, &m_tile_bitmap_fg, (bitmap_ind16*)nullptr, &m_sprite_bitmap); - - // todo, this should go through the mixer! - m_tx_tilemap->draw(screen, bitmap, cliprect, 0, 0); + m_mixer->mix_bitmaps(screen, bitmap, cliprect, *m_palette, &m_tile_bitmap_bg, &m_tile_bitmap_fg, &m_tile_bitmap_tx, &m_sprite_bitmap); + // 2 frame sprite lags + m_sprite_bitmap.fill(0, cliprect); + if (m_game_is_riot) m_sprgen->gaiden_draw_sprites(screen, m_gfxdecode, cliprect, m_spriteram->buffer(), 0, 0, flip_screen(), m_sprite_bitmap); + else m_sprgen->gaiden_draw_sprites(screen, m_gfxdecode, cliprect, m_spriteram->buffer(), 2, 0, flip_screen(), m_sprite_bitmap); return 0; } diff --git a/src/mame/video/tecmo_mix.cpp b/src/mame/video/tecmo_mix.cpp index e89423232c2..abcdbca4017 100644 --- a/src/mame/video/tecmo_mix.cpp +++ b/src/mame/video/tecmo_mix.cpp @@ -27,8 +27,10 @@ tecmo_mix_device::tecmo_mix_device(const machine_config &mconfig, const char *ta m_txregular_comp(0), m_spregular_comp(0), - m_revspritetile(0), - m_bgpen(0) + m_bgpen(0), + m_bgpen_blend(0), + + m_revspritetile(0) { } @@ -79,6 +81,9 @@ void tecmo_mix_device::mix_bitmaps(screen_device &screen, bitmap_rgb32 &bitmap, uint16_t *sd2 = &bitmap_sp->pix16(y); uint16_t *fg = &bitmap_fg->pix16(y); uint16_t *bg = &bitmap_bg->pix16(y); + uint16_t *tx = nullptr; + if (bitmap_tx != nullptr) + tx = &bitmap_tx->pix16(y); for (x = cliprect.min_x; x <= cliprect.max_x; x++) { @@ -99,11 +104,19 @@ void tecmo_mix_device::mix_bitmaps(screen_device &screen, bitmap_rgb32 &bitmap, uint16_t bgpixel = (bg[x]); bgpixel &= 0xff; + uint16_t txpixel = (bitmap_tx != nullptr) ? (tx[x]) : 0; + txpixel &= 0xff; + if (sprpixel&0xf) { if (m_sprpri == (0 ^ m_revspritetile)) // behind all { - if (fgpixel & 0xf) // is the fg used? + if (txpixel & 0xf) + { + // solid TX + dd[x] = paldata[txpixel + m_txregular_comp]; + } + else if (fgpixel & 0xf) // is the fg used? { if (fgbln) { @@ -115,7 +128,7 @@ void tecmo_mix_device::mix_bitmaps(screen_device &screen, bitmap_rgb32 &bitmap, dd[x] = paldata[fgpixel + m_fgregular_comp]; } } - else if (bgpixel & 0x0f) + else if (bgpixel & 0xf) { // solid BG dd[x] = paldata[bgpixel + m_bgregular_comp]; @@ -135,7 +148,12 @@ void tecmo_mix_device::mix_bitmaps(screen_device &screen, bitmap_rgb32 &bitmap, } else if (m_sprpri == (1 ^ m_revspritetile)) // above bg, behind tx, fg { - if (fgpixel & 0xf) // is the fg used? + if (txpixel & 0xf) + { + // solid TX + dd[x] = paldata[txpixel + m_txregular_comp]; + } + else if (fgpixel & 0xf) // is the fg used? { if (fgbln) { @@ -162,10 +180,16 @@ void tecmo_mix_device::mix_bitmaps(screen_device &screen, bitmap_rgb32 &bitmap, { if (m_sprbln) { - // needs if bgpixel & 0xf check? - - //fg isn't used, sprite is used and blended with bg? -- used on trail of ball / flippers (looks odd) -- some ninja gaiden enemy deaths (when behind fg) (looks ok?) (maybe we need to check for colour saturation?) - dd[x] = sum_colors(paldata, bgpixel + m_bgblend_comp, sprpixel + m_spblend_source); + if (bgpixel & 0xf) + { + //fg isn't used, sprite is used and blended with bg? -- used on trail of ball / flippers (looks odd) -- some ninja gaiden enemy deaths (when behind fg) (looks ok?) (maybe we need to check for colour saturation?) + dd[x] = sum_colors(paldata, bgpixel + m_bgblend_comp, sprpixel + m_spblend_source); + } + else + { + //fg isn't used, sprite is used and blended with bg? -- used on trail of ball / flippers (looks odd) -- some ninja gaiden enemy deaths (when behind fg) (looks ok?) (maybe we need to check for colour saturation?) + dd[x] = sum_colors(paldata, m_bgpen_blend, sprpixel + m_spblend_source); + } } else { @@ -176,35 +200,49 @@ void tecmo_mix_device::mix_bitmaps(screen_device &screen, bitmap_rgb32 &bitmap, } else if (m_sprpri == (2 ^ m_revspritetile)) // above bg,fg, behind tx { - if (m_sprbln) + if (txpixel & 0xf) + { + // solid TX + dd[x] = paldata[txpixel + m_txregular_comp]; + } + else { - if (fgpixel & 0xf) // is the fg used? + if (m_sprbln) { - if (fgbln) + if (fgpixel & 0xf) // is the fg used? { - // blended sprite over blended fg pixel? - dd[x] = machine().rand(); + if (fgbln) + { + // blended sprite over blended fg pixel? + dd[x] = machine().rand(); + } + else + { + // blended sprite over solid fgpixel? + dd[x] = sum_colors(paldata, fgpixel + m_fgblend_comp, sprpixel + m_spblend_source); + } + } + else if (bgpixel & 0xf) + { + // blended sprite over solid bg pixel + dd[x] = sum_colors(paldata, bgpixel + m_bgblend_comp, sprpixel + m_spblend_source); + // dd[x] = machine().rand(); } else { - // blended sprite over solid fgpixel? - dd[x] = sum_colors(paldata, fgpixel + m_fgblend_comp, sprpixel + m_spblend_source); + // blended sprite over solid bg pixel + dd[x] = sum_colors(paldata, m_bgpen_blend, sprpixel + m_spblend_source); + // dd[x] = machine().rand(); } } - else // needs if bgpixel & 0xf check? + else { - // blended sprite over solid bg pixel - dd[x] = sum_colors(paldata, bgpixel + m_bgblend_comp, sprpixel + m_spblend_source); - // dd[x] = machine().rand(); + dd[x] = paldata[sprpixel + m_spregular_comp]; + //dd[x] = machine().rand(); + // the bad tiles on the wildfang map (shown between levels) are drawn here.. why? looks like they should be transparent? + // most wildfang sprites use this and are fine, so what's going wrong? } } - else - { - dd[x] = paldata[sprpixel + m_spregular_comp]; - //dd[x] = machine().rand(); - // the bad tiles on the wildfang map (shown between levels) are drawn here.. why? looks like they should be transparent? - // most wildfang sprites use this and are fine, so what's going wrong? - } } else if (m_sprpri == (3 ^ m_revspritetile)) // above all? @@ -212,7 +250,35 @@ void tecmo_mix_device::mix_bitmaps(screen_device &screen, bitmap_rgb32 &bitmap, if (m_sprbln) { // unusued by this game? - dd[x] = machine().rand(); + //dd[x] = machine().rand(); + if (txpixel & 0xf) + { + // blended sprite over solid txpixel? + dd[x] = sum_colors(paldata, txpixel + m_txblend_comp, sprpixel + m_spblend_source); + } + else if (fgpixel & 0xf) // is the fg used? + { + if (fgbln) + { + // blended sprite over blended fg pixel? + dd[x] = machine().rand(); + } + else + { + // blended sprite over solid fgpixel? + dd[x] = sum_colors(paldata, fgpixel + m_fgblend_comp, sprpixel + m_spblend_source); + } + } + else if (bgpixel & 0xf) + { + // blended sprite over solid bg pixel + dd[x] = sum_colors(paldata, bgpixel + m_bgblend_comp, sprpixel + m_spblend_source); + } + else + { + // blended sprite over solid bg pixel + dd[x] = sum_colors(paldata, m_bgpen_blend, sprpixel + m_spblend_source); + } } else { @@ -223,20 +289,30 @@ void tecmo_mix_device::mix_bitmaps(screen_device &screen, bitmap_rgb32 &bitmap, } else // NON SPRITE CASES { - if (fgpixel & 0x0f) + if (txpixel & 0xf) + { + // solid TX + dd[x] = paldata[txpixel + m_txregular_comp]; + } + else if (fgpixel & 0xf) { if (fgbln) { - // needs if bgpixel & 0xf check? - dd[x] = sum_colors(paldata, fgpixel + m_fgblend_source, bgpixel + m_bgblend_comp); - + if (bgpixel & 0xf) + { + dd[x] = sum_colors(paldata, fgpixel + m_fgblend_source, bgpixel + m_bgblend_comp); + } + else + { + dd[x] = sum_colors(paldata, fgpixel + m_fgblend_source, m_bgpen_blend); + } } else { dd[x] = paldata[fgpixel + m_fgregular_comp]; } } - else if (bgpixel & 0x0f) + else if (bgpixel & 0xf) { dd[x] = paldata[bgpixel + m_bgregular_comp]; } diff --git a/src/mame/video/tecmo_mix.h b/src/mame/video/tecmo_mix.h index ee0681d5a72..69b3d5ef326 100644 --- a/src/mame/video/tecmo_mix.h +++ b/src/mame/video/tecmo_mix.h @@ -40,8 +40,12 @@ public: m_spblend_source = spblend_source; m_fgblend_source = fgblend_source; } + void set_bgpen(int bgpen, int bgpen_blend) + { + m_bgpen = bgpen; + m_bgpen_blend = bgpen_blend; + } void set_revspritetile() { m_revspritetile = 3; } - void set_bgpen(int bgpen) { m_bgpen = bgpen; } protected: virtual void device_start() override; @@ -67,8 +71,10 @@ protected: int m_txregular_comp; int m_spregular_comp; - int m_revspritetile; int m_bgpen; + int m_bgpen_blend; + + int m_revspritetile; private: uint32_t sum_colors(const pen_t *pal, int c1_idx, int c2_idx); @@ -78,22 +84,4 @@ DECLARE_DEVICE_TYPE(TECMO_MIXER, tecmo_mix_device) -#define MCFG_TECMO_MIXER_SHIFTS(_sprpri_shift, _sprbln_shift, _sprcol_shift) \ - downcast<tecmo_mix_device &>(*device).set_mixer_shifts(_sprpri_shift, _sprbln_shift, _sprcol_shift); - -#define MCFG_TECMO_MIXER_BLENDCOLS(_bgblend_comp, _fgblend_comp, _txblend_comp, _spblend_comp) \ - downcast<tecmo_mix_device &>(*device).set_blendcols(_bgblend_comp, _fgblend_comp, _txblend_comp, _spblend_comp); - -#define MCFG_TECMO_MIXER_REGULARCOLS(_bgregular_comp, _fgregular_comp, _txregular_comp, _spregular_comp) \ - downcast<tecmo_mix_device &>(*device).set_regularcols(_bgregular_comp, _fgregular_comp, _txregular_comp, _spregular_comp); - -#define MCFG_TECMO_MIXER_BLENDSOURCE(_spblend_source, _fgblend_source) \ - downcast<tecmo_mix_device &>(*device).set_blendsource(_spblend_source, _fgblend_source); - -#define MCFG_TECMO_MIXER_REVSPRITETILE \ - downcast<tecmo_mix_device &>(*device).set_revspritetile(); - -#define MCFG_TECMO_MIXER_BGPEN(_bgpen) \ - downcast<tecmo_mix_device &>(*device).set_bgpen(_bgpen); - #endif // MAME_VIDEO_TECMO_MIX_H diff --git a/src/mame/video/vrender0.cpp b/src/mame/video/vrender0.cpp index 772a41fd679..dc937f1ff95 100644 --- a/src/mame/video/vrender0.cpp +++ b/src/mame/video/vrender0.cpp @@ -23,7 +23,7 @@ DEVICE INTERFACE *****************************************************************************/ -DEFINE_DEVICE_TYPE(VIDEO_VRENDER0, vr0video_device, "vr0video", "VRender0 Video") +DEFINE_DEVICE_TYPE(VIDEO_VRENDER0, vr0video_device, "vr0video", "MagicEyes VRender0 Video Engine") vr0video_device::vr0video_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, VIDEO_VRENDER0, tag, owner, clock) diff --git a/src/mame/video/warpwarp.cpp b/src/mame/video/warpwarp.cpp index 593956231cf..9d9d3c2d4c2 100644 --- a/src/mame/video/warpwarp.cpp +++ b/src/mame/video/warpwarp.cpp @@ -248,14 +248,8 @@ void warpwarp_state::draw_ball(bitmap_ind16 &bitmap, const rectangle &cliprect,p { int x,y,i,j; - if (flip_screen() & 1) { - x = 376 - m_ball_h; - y = 280 - m_ball_v; - } - else { - x = 264 - m_ball_h; - y = 240 - m_ball_v; - } + x = 264 - m_ball_h; + y = 240 - m_ball_v; for (i = m_ball_sizey;i > 0;i--) for (j = m_ball_sizex;j > 0;j--) diff --git a/src/mame/video/xavix.cpp b/src/mame/video/xavix.cpp index 6c576f8eb8d..f00f5ec701f 100644 --- a/src/mame/video/xavix.cpp +++ b/src/mame/video/xavix.cpp @@ -12,7 +12,19 @@ inline void xavix_state::set_data_address(int address, int bit) inline uint8_t xavix_state::get_next_bit() { - uint8_t bit = m_rgn[m_tmp_dataaddress & (m_rgnlen - 1)]; + uint8_t bit; + + // if bank is > 0x80, or address is >0x8000 it's a plain ROM read + if ((m_tmp_dataaddress >= 0x80000) || (m_tmp_dataaddress & 0x8000)) + { + bit= m_rgn[m_tmp_dataaddress & (m_rgnlen - 1)]; + } + else // otherwise we read from RAM etc.? (baseball 2 secret test mode relies on this as it puts 1bpp characters in RAM) + { + address_space& mainspace = m_maincpu->space(AS_PROGRAM); + bit = m_lowbus->read8(mainspace, m_tmp_dataaddress & 0x7fff); + } + bit = bit >> m_tmp_databit; bit &= 1; @@ -45,6 +57,7 @@ inline int xavix_state::get_current_address_byte() void xavix_state::video_start() { + m_screen->register_screen_bitmap(m_zbuffer); } @@ -63,10 +76,21 @@ void xavix_state::handle_palette(screen_device &screen, bitmap_ind16 &bitmap, co { // not verified int offs = 0; - for (int index = 0; index < 256; index++) + for (int index = 0; index < 257; index++) { - uint16_t dat = m_palram1[offs]; - dat |= m_palram2[offs]<<8; + uint16_t dat; + + if (index < 256) + { + dat = m_palram_sh[offs]; + dat |= m_palram_l[offs] << 8; + } + else + { + dat = m_colmix_sh[0]; + dat |= m_colmix_l[0] << 8; + } + offs++; int l_raw = (dat & 0x1f00) >> 8; @@ -110,30 +134,28 @@ void xavix_state::handle_palette(screen_device &screen, bitmap_ind16 &bitmap, co void xavix_state::draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int which) { - int alt_tileaddressing = 0; - int alt_tileaddressing2 = 0; - - int ydimension = 0; - int xdimension = 0; - int ytilesize = 0; - int xtilesize = 0; - int offset_multiplier = 0; - int opaque = 0; - uint8_t* tileregs; - address_space& mainspace = m_maincpu->space(AS_PROGRAM); - if (which == 0) { tileregs = m_tmap1_regs; - opaque = 1; } else { tileregs = m_tmap2_regs; - opaque = 0; } + // bail if tilemap is disabled + if (!(tileregs[0x7] & 0x80)) + return; + + int alt_tileaddressing = 0; + int alt_tileaddressing2 = 0; + + int ydimension = 0; + int xdimension = 0; + int ytilesize = 0; + int xtilesize = 0; + switch (tileregs[0x3] & 0x30) { case 0x00: @@ -165,8 +187,6 @@ void xavix_state::draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, cons break; } - offset_multiplier = (ytilesize * xtilesize)/8; - if (tileregs[0x7] & 0x10) alt_tileaddressing = 1; else @@ -175,6 +195,10 @@ void xavix_state::draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, cons if (tileregs[0x7] & 0x02) alt_tileaddressing2 = 1; + if ((tileregs[0x7] & 0x7f) == 0x04) + alt_tileaddressing2 = 2; + + /* static int hackx = 1; if (machine().input().code_pressed_once(KEYCODE_Q)) @@ -188,291 +212,393 @@ void xavix_state::draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, cons hackx++; logerror("%02x\n", hackx); } + */ - if (tileregs[0x7] & 0x80) + //logerror("draw tilemap %d, regs base0 %02x base1 %02x base2 %02x tilesize,bpp %02x scrollx %02x scrolly %02x pal %02x mode %02x\n", which, tileregs[0x0], tileregs[0x1], tileregs[0x2], tileregs[0x3], tileregs[0x4], tileregs[0x5], tileregs[0x6], tileregs[0x7]); + + // there's a tilemap register to specify base in main ram, although in the monster truck test mode it points to an unmapped region + // and expected a fixed layout, we handle that in the memory map at the moment + int count = 0; + for (int y = 0; y < ydimension; y++) { - //logerror("draw tilemap %d, regs base0 %02x base1 %02x base2 %02x tilesize,bpp %02x scrollx %02x scrolly %02x pal %02x mode %02x\n", which, tileregs[0x0], tileregs[0x1], tileregs[0x2], tileregs[0x3], tileregs[0x4], tileregs[0x5], tileregs[0x6], tileregs[0x7]); + for (int x = 0; x < xdimension; x++) + { + address_space& mainspace = m_maincpu->space(AS_PROGRAM); + + int tile = 0; + + // the register being 0 probably isn't the condition here + if (tileregs[0x0] != 0x00) tile |= mainspace.read_byte((tileregs[0x0] << 8) + count); + + // only read the next byte if we're not in an 8-bit mode + if (((tileregs[0x7] & 0x7f) != 0x00) && ((tileregs[0x7] & 0x7f) != 0x08)) + tile |= mainspace.read_byte((tileregs[0x1] << 8) + count) << 8; + + // 24 bit modes can use reg 0x2, otherwise it gets used as extra attribute in other modes + if (alt_tileaddressing2 == 2) + tile |= mainspace.read_byte((tileregs[0x2] << 8) + count) << 16; + + + int bpp = (tileregs[0x3] & 0x0e) >> 1; + bpp++; + int pal = (tileregs[0x6] & 0xf0) >> 4; + int zval = (tileregs[0x6] & 0x0f) >> 0; + int scrolly = tileregs[0x5]; + int scrollx = tileregs[0x4]; + + int basereg; + int flipx = 0; + int flipy = 0; + int gfxbase; + + // tile 0 is always skipped, doesn't even point to valid data packets in alt mode + // this is consistent with the top layer too + // should we draw as solid in solid layer? + if (tile == 0) + { + count++; + continue; + } - // there's a tilemap register to specify base in main ram, although in the monster truck test mode it points to an unmapped region - // and expected a fixed layout, we handle that in the memory map at the moment - int count; + const int debug_packets = 0; + int test = 0; - count = 0;// ; - for (int y = 0; y < ydimension; y++) - { - for (int x = 0; x < xdimension; x++) + if (!alt_tileaddressing) { - int bpp, pal, scrolly, scrollx; - int tile = 0; - int extraattr = 0; + if (alt_tileaddressing2 == 0) + { + // Tile Based Addressing takes into account Tile Sizes and bpp + const int offset_multiplier = (ytilesize * xtilesize)/8; + + basereg = 0; + gfxbase = (m_segment_regs[(basereg * 2) + 1] << 16) | (m_segment_regs[(basereg * 2)] << 8); - // the register being 0 probably isn't the condition here - if (tileregs[0x0] != 0x00) tile |= mainspace.read_byte((tileregs[0x0] << 8) + count); - if (tileregs[0x1] != 0x00) tile |= mainspace.read_byte((tileregs[0x1] << 8) + count) << 8; + tile = tile * (offset_multiplier * bpp); + tile += gfxbase; + } + else if (alt_tileaddressing2 == 1) + { + // 8-byte alignment Addressing Mode uses a fixed offset? (like sprites) + tile = tile * 8; + basereg = (tile & 0x70000) >> 16; + tile &= 0xffff; + gfxbase = (m_segment_regs[(basereg * 2) + 1] << 16) | (m_segment_regs[(basereg * 2)] << 8); + tile += gfxbase; + } + else if (alt_tileaddressing2 == 2) + { + // 24-bit addressing + tile |= 0x800000; + } - // at the very least boxing leaves unwanted bits set in ram after changing between mode 0x8a and 0x82, expecting them to not be used + // Tilemap specific mode extension with an 8-bit per tile attribute, works in all modes except 24-bit (no room for attribute) and header (not needed?) if (tileregs[0x7] & 0x08) - extraattr = mainspace.read_byte((tileregs[0x2] << 8) + count); + { + uint8_t extraattr = mainspace.read_byte((tileregs[0x2] << 8) + count); + // make use of the extraattr stuff? + pal = (extraattr & 0xf0)>>4; + zval = (extraattr & 0x0f) >> 0; + } + } + else + { + // Addressing Mode 2 (plus Inline Header) - count++; + if (debug_packets) logerror("for tile %04x (at %d %d): ", tile, (((x * 16) + scrollx) & 0xff), (((y * 16) + scrolly) & 0xff)); - bpp = (tileregs[0x3] & 0x0e) >> 1; - bpp++; - pal = (tileregs[0x6] & 0xf0) >> 4; - scrolly = tileregs[0x5]; - scrollx = tileregs[0x4]; - int basereg; - int flipx = 0; - int flipy = 0; - int gfxbase; + basereg = (tile & 0xf000) >> 12; + tile &= 0x0fff; + gfxbase = (m_segment_regs[(basereg * 2) + 1] << 16) | (m_segment_regs[(basereg * 2)] << 8); - // tile 0 is always skipped, doesn't even point to valid data packets in alt mode - // this is consistent with the top layer too - // should we draw as solid in solid layer? - if (tile == 0) - continue; + tile += gfxbase; + set_data_address(tile, 0); - const int debug_packets = 0; - int test = 0; + // there seems to be a packet stored before the tile?! + // the offset used for flipped sprites seems to specifically be changed so that it picks up an extra byte which presumably triggers the flipping + uint8_t byte1 = 0; + int done = 0; + int skip = 0; - if (!alt_tileaddressing) + do { - if (!alt_tileaddressing2) - { - basereg = 0; - gfxbase = (m_spr_attra[(basereg * 2) + 1] << 16) | (m_spr_attra[(basereg * 2)] << 8); + byte1 = get_next_byte(); - tile = tile * (offset_multiplier * bpp); - tile += gfxbase; + if (debug_packets) logerror(" %02x, ", byte1); + + if (skip == 1) + { + skip = 0; + //test = 1; } - else + else if ((byte1 & 0x0f) == 0x01) { - tile = tile * 8; - basereg = (tile & 0x70000) >> 16; - tile &= 0xffff; - gfxbase = (m_spr_attra[(basereg * 2) + 1] << 16) | (m_spr_attra[(basereg * 2)] << 8); - tile += gfxbase; - - if (tileregs[0x7] & 0x08) - { - // make use of the extraattr stuff? - pal = (extraattr & 0xf0)>>4; - // low bits are priority? - } + // used } - } - else - { - if (debug_packets) logerror("for tile %04x (at %d %d): ", tile, (((x * 16) + scrollx) & 0xff), (((y * 16) + scrolly) & 0xff)); - - - basereg = (tile & 0xf000) >> 12; - tile &= 0x0fff; - gfxbase = (m_spr_attra[(basereg * 2) + 1] << 16) | (m_spr_attra[(basereg * 2)] << 8); - - tile += gfxbase; - set_data_address(tile, 0); - - // there seems to be a packet stored before the tile?! - // the offset used for flipped sprites seems to specifically be changed so that it picks up an extra byte which presumably triggers the flipping - uint8_t byte1 = 0; - int done = 0; - int skip = 0; - - do + else if ((byte1 & 0x0f) == 0x03) { - byte1 = get_next_byte(); - - if (debug_packets) logerror(" %02x, ", byte1); - - if (skip == 1) - { - skip = 0; - //test = 1; - } - else if ((byte1 & 0x0f) == 0x01) - { - // used - } - else if ((byte1 & 0x0f) == 0x03) - { - // causes next byte to be skipped?? - skip = 1; - } - else if ((byte1 & 0x0f) == 0x05) - { - // the upper bits are often 0x00, 0x10, 0x20, 0x30, why? - flipx = 1; - } - else if ((byte1 & 0x0f) == 0x06) // there must be other finish conditions too because sometimes this fails.. - { - // tile data will follow after this, always? - pal = (byte1 & 0xf0) >> 4; - done = 1; - } - else if ((byte1 & 0x0f) == 0x07) - { - // causes next byte to be skipped?? - skip = 1; - } - else if ((byte1 & 0x0f) == 0x09) - { - // used - } - else if ((byte1 & 0x0f) == 0x0a) - { - // not seen - } - else if ((byte1 & 0x0f) == 0x0b) - { - // used - } - else if ((byte1 & 0x0f) == 0x0c) - { - // not seen - } - else if ((byte1 & 0x0f) == 0x0d) - { - // used - } - else if ((byte1 & 0x0f) == 0x0e) - { - // not seen - } - else if ((byte1 & 0x0f) == 0x0f) - { - // used - } - - } while (done == 0); - if (debug_packets) logerror("\n"); - tile = get_current_address_byte(); - } + // causes next byte to be skipped?? + skip = 1; + } + else if ((byte1 & 0x0f) == 0x05) + { + // the upper bits are often 0x00, 0x10, 0x20, 0x30, why? + flipx = 1; + } + else if ((byte1 & 0x0f) == 0x06) // there must be other finish conditions too because sometimes this fails.. + { + // tile data will follow after this, always? + pal = (byte1 & 0xf0) >> 4; + done = 1; + } + else if ((byte1 & 0x0f) == 0x07) + { + // causes next byte to be skipped?? + skip = 1; + } + else if ((byte1 & 0x0f) == 0x09) + { + // used + } + else if ((byte1 & 0x0f) == 0x0a) + { + // not seen + } + else if ((byte1 & 0x0f) == 0x0b) + { + // used + } + else if ((byte1 & 0x0f) == 0x0c) + { + // not seen + } + else if ((byte1 & 0x0f) == 0x0d) + { + // used + } + else if ((byte1 & 0x0f) == 0x0e) + { + // not seen + } + else if ((byte1 & 0x0f) == 0x0f) + { + // used + } + + } while (done == 0); + if (debug_packets) logerror("\n"); + tile = get_current_address_byte(); + } - if (test == 1) pal = machine().rand() & 0xf; + if (test == 1) pal = machine().rand() & 0xf; - draw_tile(screen, bitmap, cliprect, tile, bpp, (x * xtilesize) + scrollx, ((y * ytilesize) - 16) - scrolly, ytilesize, xtilesize, flipx, flipy, pal, opaque); - draw_tile(screen, bitmap, cliprect, tile, bpp, (x * xtilesize) + scrollx, (((y * ytilesize) - 16) - scrolly) + 256, ytilesize, xtilesize, flipx, flipy, pal, opaque); // wrap-y - draw_tile(screen, bitmap, cliprect, tile, bpp, ((x * xtilesize) + scrollx) - 256, ((y * ytilesize) - 16) - scrolly, ytilesize, xtilesize, flipx, flipy, pal, opaque); // wrap-x - draw_tile(screen, bitmap, cliprect, tile, bpp, ((x * xtilesize) + scrollx) - 256, (((y * ytilesize) - 16) - scrolly) + 256, ytilesize, xtilesize, flipx, flipy, pal, opaque); // wrap-y and x - } + draw_tile(screen, bitmap, cliprect, tile, bpp, (x * xtilesize) + scrollx, ((y * ytilesize) - 16) - scrolly, ytilesize, xtilesize, flipx, flipy, pal, zval); + draw_tile(screen, bitmap, cliprect, tile, bpp, (x * xtilesize) + scrollx, (((y * ytilesize) - 16) - scrolly) + 256, ytilesize, xtilesize, flipx, flipy, pal, zval); // wrap-y + draw_tile(screen, bitmap, cliprect, tile, bpp, ((x * xtilesize) + scrollx) - 256, ((y * ytilesize) - 16) - scrolly, ytilesize, xtilesize, flipx, flipy, pal, zval); // wrap-x + draw_tile(screen, bitmap, cliprect, tile, bpp, ((x * xtilesize) + scrollx) - 256, (((y * ytilesize) - 16) - scrolly) + 256, ytilesize, xtilesize, flipx, flipy, pal, zval); // wrap-y and x + + count++; } } + } void xavix_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { + int alt_addressing = 0; + + if (m_spritereg == 0x00) + { + // 8-bit addressing (Tile Number) + alt_addressing = 1; + } + else if (m_spritereg == 0x02) + { + // 16-bit addressing (8-byte alignment Addressing Mode) + alt_addressing = 2; + } + else if (m_spritereg == 0x04) + { + // 24-bit addressing (Addressing Mode 2) + alt_addressing = 0; + } + else + { + popmessage("unknown sprite reg %02x", m_spritereg); + } + //logerror("frame\n"); // priority doesn't seem to be based on list order, there are bad sprite-sprite priorities with either forward or reverse for (int i = 0xff; i >= 0; i--) { + + uint8_t* spr_attr0 = m_fragment_sprite + 0x000; + uint8_t* spr_attr1 = m_fragment_sprite + 0x100; + uint8_t* spr_ypos = m_fragment_sprite + 0x200; + uint8_t* spr_xpos = m_fragment_sprite + 0x300; + uint8_t* spr_xposh = m_fragment_sprite + 0x400; + uint8_t* spr_addr_lo = m_fragment_sprite + 0x500; + uint8_t* spr_addr_md = m_fragment_sprite + 0x600; + uint8_t* spr_addr_hi = m_fragment_sprite + 0x700; + + /* attribute 0 bits pppp bbb- p = palette, b = bpp attribute 1 bits - ---- ss-f s = size, f = flipx + zzzz ssFf s = size, F = flipy f = flipx */ - int ypos = m_spr_ypos[i]; - int xpos = m_spr_xpos[i]; - int tile = (m_spr_addr_hi[i] << 16) | (m_spr_addr_md[i] << 8) | m_spr_addr_lo[i]; - int attr0 = m_spr_attr0[i]; - int attr1 = m_spr_attr1[i]; + int ypos = spr_ypos[i]; + int xpos = spr_xpos[i]; + int tile = 0; + + // high 8-bits only used in 24-bit mode + if (((m_spritereg & 0x7f) == 0x04) || ((m_spritereg & 0x7f) == 0x15)) + tile |= (spr_addr_hi[i] << 16); + + // mid 8-bits used in everything except 8-bit mode + if ((m_spritereg & 0x7f) != 0x00) + tile |= (spr_addr_md[i] << 8); + + // low 8-bits always read + tile |= spr_addr_lo[i]; + + int attr0 = spr_attr0[i]; + int attr1 = spr_attr1[i]; int pal = (attr0 & 0xf0) >> 4; + + int zval = (attr1 & 0xf0) >> 4; int flipx = (attr1 & 0x01); + int flipy = (attr1 & 0x02); int drawheight = 16; int drawwidth = 16; + int xpos_adjust = 0; + int ypos_adjust = 0; + tile &= (m_rgnlen - 1); - // taito nostalgia 1 also seems to use a different addressing, is it selectable or is the chip different? // taito nost attr1 is 84 / 80 / 88 / 8c for the various elements of the xavix logo. monster truck uses ec / fc / dc / 4c / 5c / 6c (final 6 sprites ingame are 00 00 f0 f0 f0 f0, radar?) if ((attr1 & 0x0c) == 0x0c) { drawheight = 16; drawwidth = 16; - if (m_alt_addressing == 1) - tile = tile * 128; - else if (m_alt_addressing == 2) - tile = tile * 8; } else if ((attr1 & 0x0c) == 0x08) { drawheight = 16; drawwidth = 8; - xpos += 4; - if (m_alt_addressing == 1) - tile = tile * 64; - else if (m_alt_addressing == 2) - tile = tile * 8; + xpos_adjust = 4; } else if ((attr1 & 0x0c) == 0x04) { drawheight = 8; drawwidth = 16; - ypos -= 4; - if (m_alt_addressing == 1) - tile = tile * 64; - else if (m_alt_addressing == 2) - tile = tile * 8; + ypos_adjust = -4; } else if ((attr1 & 0x0c) == 0x00) { drawheight = 8; drawwidth = 8; - xpos += 4; - ypos -= 4; - if (m_alt_addressing == 1) - tile = tile * 32; - else if (m_alt_addressing == 2) - tile = tile * 8; + xpos_adjust = 4; + ypos_adjust = -4; } - if (m_alt_addressing != 0) + // Everything except direct addressing (Addressing Mode 2) goes through the segment registers? + if (alt_addressing != 0) { + // tile based addressing takes into account tile size (and bpp?) + if (alt_addressing == 1) + tile = (tile * drawheight * drawwidth) / 2; + + // 8-byte alignment Addressing Mode uses a fixed offset? + if (alt_addressing == 2) + tile = tile * 8; + int basereg = (tile & 0xf0000) >> 16; tile &= 0xffff; - int gfxbase = (m_spr_attra[(basereg * 2) + 1] << 16) | (m_spr_attra[(basereg * 2)] << 8); - tile+= gfxbase; + int gfxbase = (m_segment_regs[(basereg * 2) + 1] << 16) | (m_segment_regs[(basereg * 2)] << 8); + tile += gfxbase; + } + else + { + // ?? in 24-bit mode the upper bit isn't being set, which causes some things to be drawn from RAM instead + // which is not what we want at all. are the segment registers still involved even in this mode? + tile |= 0x800000; + } + + /* coordinates are signed, based on screen position 0,0 being at the center of the screen + tile addressing likewise, point 0,0 is center of tile? + this makes the calculation a bit more annoying in terms of knowing when to apply offsets, when to wrap etc. + this is likely still incorrect + + Use of additional x-bit is very confusing rad_snow, taitons1 (ingame) etc. clearly need to use it + but the taitons1 xavix logo doesn't even initialize the RAM for it and behavior conflicts with ingame? + maybe only works with certain tile sizes? + + some code even suggests this should be bit 0 of attr0, but it never gets set there + + there must be a register somewhere (or a side-effect of another mode) that enables / disables this + behavior, as we need to make use of xposh for the left side in cases that need it, but that + completely breaks the games that never set it at all (monster truck, xavix logo on taitons1) + + */ + + int xposh = spr_xposh[i]&1; + + if (xpos & 0x80) // left side of center + { + xpos &=0x7f; + xpos = -0x80+xpos; + } + else // right side of center + { + xpos &= 0x7f; + + if (xposh) + xpos += 0x80; } - ypos = 0x100 - ypos; + xpos += 128 - 8; + + ypos ^= 0xff; - xpos -= 136; - ypos -= 152; + if (ypos & 0x80) + { + ypos = -0x80+(ypos&0x7f); + } + else + { + ypos &= 0x7f; + } - xpos &= 0xff; - ypos &= 0xff; + ypos += 128 - 15 - 8; - if (ypos >= 192) - ypos -= 256; int bpp = 1; bpp = (attr0 & 0x0e) >> 1; bpp += 1; - draw_tile(screen, bitmap, cliprect, tile, bpp, xpos, ypos, drawheight, drawwidth, flipx, 0, pal, 0); - draw_tile(screen, bitmap, cliprect, tile, bpp, xpos - 256, ypos, drawheight, drawwidth, flipx, 0, pal, 0); // wrap-x - draw_tile(screen, bitmap, cliprect, tile, bpp, xpos, ypos - 256, drawheight, drawwidth, flipx, 0, pal, 0); // wrap-y - draw_tile(screen, bitmap, cliprect, tile, bpp, xpos - 256, ypos - 256, drawheight, drawwidth, flipx, 0, pal, 0); // wrap-x,y + draw_tile(screen, bitmap, cliprect, tile, bpp, xpos + xpos_adjust, ypos - ypos_adjust, drawheight, drawwidth, flipx, flipy, pal, zval); + draw_tile(screen, bitmap, cliprect, tile, bpp, xpos + xpos_adjust, ypos - 256 - ypos_adjust, drawheight, drawwidth, flipx, flipy, pal, zval); // wrap-y /* - if ((m_spr_ypos[i] != 0x81) && (m_spr_ypos[i] != 0x80) && (m_spr_ypos[i] != 0x00)) + if ((spr_ypos[i] != 0x81) && (spr_ypos[i] != 0x80) && (spr_ypos[i] != 0x00)) { - logerror("sprite with enable? %02x attr0 %02x attr1 %02x attr3 %02x attr5 %02x attr6 %02x attr7 %02x\n", m_spr_ypos[i], m_spr_attr0[i], m_spr_attr1[i], m_spr_xpos[i], m_spr_addr_lo[i], m_spr_addr_md[i], m_spr_addr_hi[i] ); + logerror("sprite with enable? %02x attr0 %02x attr1 %02x attr3 %02x attr5 %02x attr6 %02x attr7 %02x\n", spr_ypos[i], spr_attr0[i], spr_attr1[i], spr_xpos[i], spr_addr_lo[i], spr_addr_md[i], spr_addr_hi[i] ); } */ } } -void xavix_state::draw_tile(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int tile, int bpp, int xpos, int ypos, int drawheight, int drawwidth, int flipx, int flipy, int pal, int opaque) +void xavix_state::draw_tile(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int tile, int bpp, int xpos, int ypos, int drawheight, int drawwidth, int flipx, int flipy, int pal, int zval) { // set the address here so we can increment in bits in the draw function set_data_address(tile, 0); @@ -512,19 +638,20 @@ void xavix_state::draw_tile(screen_device &screen, bitmap_ind16 &bitmap, const r if ((row >= cliprect.min_y && row <= cliprect.max_y) && (col >= cliprect.min_x && col <= cliprect.max_x)) { - uint16_t* rowptr; + uint16_t* rowptr = &bitmap.pix16(row); + uint16_t* zrowptr = &m_zbuffer.pix16(row); - rowptr = &bitmap.pix16(row); - if (opaque) - { - rowptr[col] = (dat + (pal << 4)) & 0xff; - } - else + if (zval >= zrowptr[col]) { - if (dat) - rowptr[col] = (dat + (pal << 4)) & 0xff; - } + int pen = (dat + (pal << 4)) & 0xff; + + if ((m_palram_sh[pen] & 0x1f) < 24) // hue values 24-31 are transparent + { + rowptr[col] = pen; + zrowptr[col] = zval; + } + } } } } @@ -534,42 +661,75 @@ uint32_t xavix_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, { handle_palette(screen, bitmap, cliprect); - bitmap.fill(0, cliprect); + // not sure what you end up with if you fall through all layers as transparent, so far no issues noticed + bitmap.fill(m_palette->black_pen(), cliprect); + m_zbuffer.fill(0,cliprect); + + rectangle clip = cliprect; - draw_tilemap(screen,bitmap,cliprect,0); - draw_sprites(screen,bitmap,cliprect); - draw_tilemap(screen,bitmap,cliprect,1); + clip.min_y = cliprect.min_y; + clip.max_y = cliprect.max_y; + clip.min_x = cliprect.min_x; + clip.max_x = cliprect.max_x; - //popmessage("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x", m_75fx[0],m_75fx[1],m_75fx[2],m_75fx[3],m_75fx[4],m_75fx[5],m_75fx[6],m_75fx[7],m_75fx[8],m_75fx[9],m_75fx[10],m_75fx[11],m_75fx[12],m_75fx[13],m_75fx[14],m_75fx[15]); + if (m_arena_control & 0x01) + { + /* Controls the clipping area (for all layers?) used for effect at start of Slap Fight and to add black borders in other cases + based on Slap Fight Tiger lives display (and reference videos) this is slightly offset as all status bar gfx must display + Monster Truck black bars are wider on the right hand side, but this matches with the area in which the tilemap is incorrectly rendered so seems to be intentional + Snowboard hides garbage sprites on the right hand side with this, confirming the right hand side offset + Taito Nostalgia 1 'Gladiator' portraits in demo mode are cut slightly due to the area specified, again the cut-off points for left and right are confirmed as correct on hardware + + some games enable it with both regs as 00, which causes a problem, likewise ping pong sets both to 0xff + but Slap Fight Tiger has both set to 0x82 at a time when everything should be clipped + */ + if (((m_arena_start != 0x00) && (m_arena_end != 0x00)) && ((m_arena_start != 0xff) && (m_arena_end != 0xff))) + { + clip.max_x = m_arena_start - 3; + clip.min_x = m_arena_end - 1; + + if (clip.min_x < cliprect.min_x) + clip.min_x = cliprect.min_x; + + if (clip.max_x > cliprect.max_x) + clip.max_x = cliprect.max_x; + } + } + bitmap.fill(0, clip); + + draw_tilemap(screen,bitmap,clip,1); + draw_tilemap(screen,bitmap,clip,0); + draw_sprites(screen,bitmap,clip); + + //popmessage("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x", m_soundregs[0],m_soundregs[1],m_soundregs[2],m_soundregs[3],m_soundregs[4],m_soundregs[5],m_soundregs[6],m_soundregs[7],m_soundregs[8],m_soundregs[9],m_soundregs[10],m_soundregs[11],m_soundregs[12],m_soundregs[13],m_soundregs[14],m_soundregs[15]); return 0; } -WRITE8_MEMBER(xavix_state::vid_dma_params_1_w) +WRITE8_MEMBER(xavix_state::spritefragment_dma_params_1_w) { - m_vid_dma_param1[offset] = data; + m_spritefragment_dmaparam1[offset] = data; } -WRITE8_MEMBER(xavix_state::vid_dma_params_2_w) +WRITE8_MEMBER(xavix_state::spritefragment_dma_params_2_w) { - m_vid_dma_param2[offset] = data; + m_spritefragment_dmaparam2[offset] = data; } -WRITE8_MEMBER(xavix_state::vid_dma_trigger_w) +WRITE8_MEMBER(xavix_state::spritefragment_dma_trg_w) { uint16_t len = data & 0x07; - uint16_t src = (m_vid_dma_param1[1]<<8) | m_vid_dma_param1[0]; - uint16_t dst = (m_vid_dma_param2[0]<<8); - dst += 0x6000; + uint16_t src = (m_spritefragment_dmaparam1[1]<<8) | m_spritefragment_dmaparam1[0]; + uint16_t dst = (m_spritefragment_dmaparam2[0]<<8); - uint8_t unk = m_vid_dma_param2[1]; + uint8_t unk = m_spritefragment_dmaparam2[1]; - logerror("%s: vid_dma_trigger_w with trg %02x size %04x src %04x dest %04x unk (%02x)\n", machine().describe_context(), data & 0xf8, len,src,dst,unk); + logerror("%s: spritefragment_dma_trg_w with trg %02x size %04x src %04x dest %04x unk (%02x)\n", machine().describe_context(), data & 0xf8, len,src,dst,unk); if (unk) { - fatalerror("m_vid_dma_param2[1] != 0x00 (is %02x)\n", m_vid_dma_param2[1]); + fatalerror("m_spritefragment_dmaparam2[1] != 0x00 (is %02x)\n", m_spritefragment_dmaparam2[1]); } if (len == 0x00) @@ -580,19 +740,17 @@ WRITE8_MEMBER(xavix_state::vid_dma_trigger_w) len = len << 8; - address_space& dmaspace = m_maincpu->space(AS_PROGRAM); - if (data & 0x40) { for (int i = 0; i < len; i++) { - uint8_t dat = dmaspace.read_byte(src + i); - dmaspace.write_byte(dst + i, dat); + uint8_t dat = m_maincpu->space(AS_PROGRAM).read_byte(src + i); + m_fragment_sprite[(dst + i) & 0x7ff] = dat; } } } -READ8_MEMBER(xavix_state::vid_dma_trigger_r) +READ8_MEMBER(xavix_state::spritefragment_dma_status_r) { // expects bit 0x40 to clear in most cases return 0x00; @@ -606,80 +764,45 @@ READ8_MEMBER(xavix_state::pal_ntsc_r) return m_region->read(); } -WRITE8_MEMBER(xavix_state::xavix_6fc0_w) // also related to tilemap 1? -{ - logerror("%s: xavix_6fc0_w data %02x\n", machine().describe_context(), data); -} WRITE8_MEMBER(xavix_state::tmap1_regs_w) { /* - 0x0 pointer to address where tile data is - it gets set to 0x40 in monster truck test mode, which is outside of ram but test mode requires a fixed 'column scan' layout - so that might be special + 0x0 pointer to low tile bits + 0x1 pointer to middle tile bits + 0x2 pointer to upper tile bits - 0x1 pointer to middle tile bits (if needed, depends on mode) (usually straight after the ram needed for above) + 0x3 Fftt bbb- Ff = flip Y,X + tt = tile/tilemap size + b = bpp + - = unused - 0x2 pointer to tile highest tile bits (if needed, depends on mode) (usually straight after the ram needed for above) + 0x4 scroll + 0x5 scroll - 0x3 --tt bbb- - = ? tt = tile/tilemap size b = bpp (0x36 xavix logo, 0x3c title screen, 0x36 course select) + 0x6 pppp zzzz p = palette + z = priority - 0x4 and 0x5 are scroll + 0x7 e--m mmmm e = enable + m = mode - 0x6 pppp ---- p = palette - = ? (0x02 xavix logo, 0x01 course select) + modes are + ---0 0000 (00) 8-bit addressing (Tile Number) + ---0 0001 (01) 16-bit addressing (Tile Number) (monster truck, ekara) + ---0 0010 (02) 16-bit addressing (8-byte alignment Addressing Mode) (boxing) + ---0 0011 (03) 16-bit addressing (Addressing Mode 2) + ---0 0100 (04) 24-bit addressing (Addressing Mode 2) (epo_efdx) - 0x7 could be mode (16x16, 8x8 etc.) - 0x00 is disabled? - 0x80 means 16x16 tiles - 0x81 might be 8x8 tiles - 0x93 course / mode select bg / ingame (weird addressing?) + ---0 1000 (08) 8-bit+8 addressing (Tile Number + 8-bit Attribute) + ---0 1001 (09) 16-bit+8 addressing (Tile Number + 8-bit Attribute) (Taito Nostalgia 2) + ---0 1010 (0a) 16-bit+8 addressing (8-byte alignment Addressing Mode + 8-bit Attribute) (boxing, Snowboard) + ---0 1011 (0b) 16-bit+8 addressing (Addressing Mode 2 + 8-bit Attribute) + ---1 0011 (13) 16-bit addressing (Addressing Mode 2 + Inline Header) (monster truck) + ---1 0100 (14) 24-bit addressing (Addressing Mode 2 + Inline Header) - */ - - /* - 6aff base registers - -- ingame - - ae 80 - 02 80 - 02 90 - 02 a0 - 02 b0 - 02 c0 - 02 d0 - 02 e0 - - 02 00 - 04 80 - 04 90 - 04 a0 - 04 b0 - 04 c0 - 04 d0 - 04 e0 - - -- menu - af 80 - 27 80 - 27 90 - 27 a0 - 27 b0 - 27 c0 - 27 d0 - 27 e0 - - 27 00 - 00 80 - 00 90 - 00 a0 - 00 b0 - 00 c0 - 00 d0 - 00 e0 */ - if ((offset != 0x4) && (offset != 0x5)) { logerror("%s: tmap1_regs_w offset %02x data %02x\n", machine().describe_context(), offset, data); @@ -688,43 +811,104 @@ WRITE8_MEMBER(xavix_state::tmap1_regs_w) COMBINE_DATA(&m_tmap1_regs[offset]); } -WRITE8_MEMBER(xavix_state::xavix_6fd8_w) // also related to tilemap 2? -{ - // possibly just a mirror of tmap2_regs_w, at least it writes 0x04 here which would be the correct - // base address to otherwise write at tmap2_regs_w offset 0 -// tmap2_regs_w(space,offset,data); - - logerror("%s: xavix_6fd8_w data %02x\n", machine().describe_context(), data); -} - WRITE8_MEMBER(xavix_state::tmap2_regs_w) { // same as above but for 2nd tilemap if ((offset != 0x4) && (offset != 0x5)) { - //logerror("%s: tmap2_regs_w offset %02x data %02x\n", machine().describe_context(), offset, data); + logerror("%s: tmap2_regs_w offset %02x data %02x\n", machine().describe_context(), offset, data); } COMBINE_DATA(&m_tmap2_regs[offset]); } -READ8_MEMBER(xavix_state::tmap2_regs_r) + +WRITE8_MEMBER(xavix_state::spriteregs_w) +{ + logerror("%s: spriteregs_w data %02x\n", machine().describe_context(), data); + /* + This is similar to Tilemap reg 7 and is used to set the addressing mode for sprite data + + ---0 -000 (00) 8-bit addressing (Tile Number) + ---0 -001 (01) 16-bit addressing (Tile Number) + ---0 -010 (02) 16-bit addressing (8-byte alignment Addressing Mode) + ---0 -011 (03) 16-bit addressing (Addressing Mode 2) + ---0 -100 (04) 24-bit addressing (Addressing Mode 2) + + ---1 -011 (13) 16-bit addressing (Addressing Mode 2 + Inline Header) + ---1 -100 (14) 24-bit addressing (Addressing Mode 2 + Inline Header) + */ + m_spritereg = data; +} + +READ8_MEMBER(xavix_state::tmap1_regs_r) { - // does this return the same data or a status? + logerror("%s: tmap1_regs_r offset %02x\n", offset, machine().describe_context()); + return m_tmap1_regs[offset]; +} +READ8_MEMBER(xavix_state::tmap2_regs_r) +{ logerror("%s: tmap2_regs_r offset %02x\n", offset, machine().describe_context()); return m_tmap2_regs[offset]; } -READ8_MEMBER(xavix_state::xavix_4000_r) +// The Text Array / Memory Emulator acts as a memory area that you can point the tilemap sources at to get a fixed pattern of data +WRITE8_MEMBER(xavix_state::xavix_memoryemu_txarray_w) +{ + if (offset < 0x400) + { + // nothing + } + else if (offset < 0x800) + { + m_txarray[0] = data; + } + else if (offset < 0xc00) + { + m_txarray[1] = data; + } + else if (offset < 0x1000) + { + m_txarray[2] = data; + } +} + +READ8_MEMBER(xavix_state::xavix_memoryemu_txarray_r) { if (offset < 0x100) { + offset &= 0xff; return ((offset>>4) | (offset<<4)); } - else + else if (offset < 0x200) { - return 0x00; + offset &= 0xff; + return ((offset>>4) | (~offset<<4)); } + else if (offset < 0x300) + { + offset &= 0xff; + return ((~offset>>4) | (offset<<4)); + } + else if (offset < 0x400) + { + offset &= 0xff; + return ((~offset>>4) | (~offset<<4)); + } + else if (offset < 0x800) + { + return m_txarray[0]; + } + else if (offset < 0xc00) + { + return m_txarray[1]; + } + else if (offset < 0x1000) + { + return m_txarray[2]; + } + + return 0xff; } diff --git a/src/mame/video/xbox_nv2a.cpp b/src/mame/video/xbox_nv2a.cpp index 3052cad0644..0623e4e3759 100644 --- a/src/mame/video/xbox_nv2a.cpp +++ b/src/mame/video/xbox_nv2a.cpp @@ -10,13 +10,13 @@ //#define LOG_NV2A #define DEBUG_CHECKS // enable for debugging -const char *vertex_program_disassembler::srctypes[] = { "??", "Rn", "Vn", "Cn" }; -const char *vertex_program_disassembler::scaops[] = { "NOP", "IMV", "RCP", "RCC", "RSQ", "EXP", "LOG", "LIT", "???", "???", "???", "???", "???", "???", "???", "???", "???" }; -const int vertex_program_disassembler::scapar2[] = { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; -const char *vertex_program_disassembler::vecops[] = { "NOP", "MOV", "MUL", "ADD", "MAD", "DP3", "DPH", "DP4", "DST", "MIN", "MAX", "SLT", "SGE", "ARL", "???", "???", "???" }; -const int vertex_program_disassembler::vecpar2[] = { 0, 4, 6, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 4, 0, 0, 0 }; -const char *vertex_program_disassembler::vecouts[] = { "oPos", "???", "???", "oD0", "oD1", "oFog", "oPts", "oB0", "oB1", "oT0", "oT1", "oT2", "oT3" }; -const char vertex_program_disassembler::compchar[] = { 'x', 'y', 'z', 'w' }; +char const *const vertex_program_disassembler::srctypes[] = { "??", "Rn", "Vn", "Cn" }; +char const *const vertex_program_disassembler::scaops[] = { "NOP", "IMV", "RCP", "RCC", "RSQ", "EXP", "LOG", "LIT", "???", "???", "???", "???", "???", "???", "???", "???", "???" }; +int const vertex_program_disassembler::scapar2[] = { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; +char const *const vertex_program_disassembler::vecops[] = { "NOP", "MOV", "MUL", "ADD", "MAD", "DP3", "DPH", "DP4", "DST", "MIN", "MAX", "SLT", "SGE", "ARL", "???", "???", "???" }; +int const vertex_program_disassembler::vecpar2[] = { 0, 4, 6, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 4, 0, 0, 0 }; +char const *const vertex_program_disassembler::vecouts[] = { "oPos", "???", "???", "oD0", "oD1", "oFog", "oPts", "oB0", "oB1", "oT0", "oT1", "oT2", "oT3" }; +char const vertex_program_disassembler::compchar[] = { 'x', 'y', 'z', 'w' }; /* Each vertex program instruction is a 128 bit word made of the fields: diff --git a/src/mame/video/ygv608.cpp b/src/mame/video/ygv608.cpp index 7ba368168fa..49151855927 100644 --- a/src/mame/video/ygv608.cpp +++ b/src/mame/video/ygv608.cpp @@ -30,7 +30,7 @@ * Split-screen scrolling by row (by column supported) (see test mode) * Everything else! :) * - * TODO (2017 edition): + * TODO (2017-2018 edition): * - move ports into device_address_map (done); * - add registers into own space, improve naming and variable usage; * - remove code repetition in tilemap drawing functions; @@ -38,6 +38,7 @@ * - fix garbage tiles in Mappy Arrange (done) * - fix tile encryption for Abnormal Check (sets extra bit in cuskey); * nopping bit 0 writes to 0x40081e makes gfxs to draw better!? + * - fix Gynotai row scroll glitches; * - fix attract mode garbage for Namco Collection Vol. 2 (either transparent or page banking select registers) (done); * - fix tilemap dirty flags, move tilemap data in own space prolly helps; * - DMA from/to ROM; @@ -351,8 +352,8 @@ void ygv608_device::device_start() m_base_y_shift = 0; // flag rebuild of the tilemaps - m_screen_resize = 1; - m_tilemap_resize = 1; + m_screen_resize = true; + m_tilemap_resize = true; m_namcond1_gfxbank = 0; save_item(NAME(m_namcond1_gfxbank)); @@ -439,7 +440,7 @@ void ygv608_device::device_timer(emu_timer &timer, device_timer_id id, int param void ygv608_device::set_gfxbank(uint8_t gfxbank) { m_namcond1_gfxbank = gfxbank; - m_tilemap_resize = 1; + m_tilemap_resize = true; } inline int ygv608_device::get_col_division(int raw_col) @@ -873,10 +874,10 @@ TILE_GET_INFO_MEMBER( ygv608_device::get_tile_info_B_16 ) } } -void ygv608_device::postload() +void ygv608_device::device_post_load() { - m_screen_resize = 1; - m_tilemap_resize = 1; + m_screen_resize = true; + m_tilemap_resize = true; } void ygv608_device::register_state_save() @@ -891,8 +892,6 @@ void ygv608_device::register_state_save() save_item(NAME(m_color_state_r)); save_item(NAME(m_color_state_w)); // TODO: register save for the newly added variables - - machine().save().register_postload(save_prepost_delegate(FUNC(ygv608_device::postload), this)); } @@ -1084,7 +1083,7 @@ uint32_t ygv608_device::update_screen(screen_device &screen, bitmap_ind16 &bitma m_work_bitmap.resize(screen.width(), screen.height()); // reset resize flag - m_screen_resize = 0; + m_screen_resize = false; } if( m_tilemap_resize ) @@ -1135,7 +1134,7 @@ uint32_t ygv608_device::update_screen(screen_device &screen, bitmap_ind16 &bitma m_work_bitmap.fill(0, finalclip ); // reset resize flag - m_tilemap_resize = 0; + m_tilemap_resize = false; } #ifdef _ENABLE_SCROLLY @@ -1821,7 +1820,7 @@ WRITE8_MEMBER( ygv608_device::screen_ctrl_7_w ) { uint8_t new_md = (data >> 1) & 3; if( new_md != m_md) - m_tilemap_resize = 1; + m_tilemap_resize = true; m_dckm = BIT(data,7); m_flip = BIT(data,6); @@ -1882,7 +1881,7 @@ READ8_MEMBER( ygv608_device::screen_ctrl_8_r ) WRITE8_MEMBER( ygv608_device::screen_ctrl_8_w ) { if( (data & 1) != m_page_size) - m_tilemap_resize = 1; + m_tilemap_resize = true; /**/m_h_display_size = (data >> 6) & 3; /**/m_v_display_size = (data >> 4) & 3; @@ -1915,7 +1914,7 @@ WRITE8_MEMBER( ygv608_device::screen_ctrl_9_w ) uint8_t new_pts = (data >> 6) & 3; if(new_pts != m_pattern_size) - m_tilemap_resize = 1; + m_tilemap_resize = true; m_pattern_size = new_pts; /**/m_h_div_size = (data >> 3) & 7; @@ -2101,7 +2100,7 @@ WRITE8_MEMBER( ygv608_device::base_address_w ) m_base_addr[plane][addr] = data & 0x07; m_base_addr[plane][addr+1] = (data >> 4) & 0x7; - m_tilemap_resize = 1; + m_tilemap_resize = true; } // R#25W - R#27W - X coordinate of initial value @@ -2181,7 +2180,7 @@ WRITE8_MEMBER( ygv608_device::crtc_w ) m_crtc.htotal |= ((data & 0xc0) << 3); if(new_display_width != m_crtc.display_width) - m_screen_resize = 1; + m_screen_resize = true; m_crtc.display_width = new_display_width; break; @@ -2216,7 +2215,7 @@ WRITE8_MEMBER( ygv608_device::crtc_w ) // TODO: VSLS, bit 6 if(new_display_height != m_crtc.display_height) - m_screen_resize = 1; + m_screen_resize = true; m_crtc.display_height = new_display_height; break; diff --git a/src/mame/video/ygv608.h b/src/mame/video/ygv608.h index ae054a0ac6b..5d297029b20 100644 --- a/src/mame/video/ygv608.h +++ b/src/mame/video/ygv608.h @@ -102,6 +102,7 @@ public: protected: // device-level overrides virtual void device_start() override; + virtual void device_post_load() override; virtual space_config_vector memory_space_config() const override; @@ -125,7 +126,7 @@ private: TILE_GET_INFO_MEMBER(get_tile_info_B_8); TILE_GET_INFO_MEMBER(get_tile_info_A_16); TILE_GET_INFO_MEMBER(get_tile_info_B_16); - void postload(); + void register_state_save(); void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect); void draw_layer_roz(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, tilemap_t *source_tilemap); @@ -174,8 +175,8 @@ private: uint32_t m_base_addr[2][8]; uint32_t m_base_y_shift; // for extracting pattern y coord 'base' - uint8_t m_screen_resize; // screen requires resize - uint8_t m_tilemap_resize; // tilemap requires resize + bool m_screen_resize; // screen requires resize + bool m_tilemap_resize; // tilemap requires resize /* These were statically allocated in the r/w routines */ int m_color_state_r; diff --git a/src/osd/modules/lib/osdobj_common.cpp b/src/osd/modules/lib/osdobj_common.cpp index b937a66394c..5e6be57bde3 100644 --- a/src/osd/modules/lib/osdobj_common.cpp +++ b/src/osd/modules/lib/osdobj_common.cpp @@ -155,6 +155,7 @@ const options_entry osd_options::s_option_entries[] = { OSDOPTION_BGFX_DEBUG, "0", OPTION_BOOLEAN, "enable BGFX debugging statistics" }, { OSDOPTION_BGFX_SCREEN_CHAINS, "default", OPTION_STRING, "comma-delimited list of screen chain JSON names, colon-delimited per-window" }, { OSDOPTION_BGFX_SHADOW_MASK, "slot-mask.png", OPTION_STRING, "shadow mask texture name" }, + { OSDOPTION_BGFX_LUT, "", OPTION_STRING, "LUT texture name" }, { OSDOPTION_BGFX_AVI_NAME, OSDOPTVAL_AUTO, OPTION_STRING, "filename for BGFX output logging" }, // End of list diff --git a/src/osd/modules/lib/osdobj_common.h b/src/osd/modules/lib/osdobj_common.h index 7d6e303fd8e..8c275ebf48d 100644 --- a/src/osd/modules/lib/osdobj_common.h +++ b/src/osd/modules/lib/osdobj_common.h @@ -88,6 +88,7 @@ #define OSDOPTION_BGFX_DEBUG "bgfx_debug" #define OSDOPTION_BGFX_SCREEN_CHAINS "bgfx_screen_chains" #define OSDOPTION_BGFX_SHADOW_MASK "bgfx_shadow_mask" +#define OSDOPTION_BGFX_LUT "bgfx_lut" #define OSDOPTION_BGFX_AVI_NAME "bgfx_avi_name" //============================================================ @@ -162,6 +163,7 @@ public: bool bgfx_debug() const { return bool_value(OSDOPTION_BGFX_DEBUG); } const char *bgfx_screen_chains() const { return value(OSDOPTION_BGFX_SCREEN_CHAINS); } const char *bgfx_shadow_mask() const { return value(OSDOPTION_BGFX_SHADOW_MASK); } + const char *bgfx_lut() const { return value(OSDOPTION_BGFX_LUT); } const char *bgfx_avi_name() const { return value(OSDOPTION_BGFX_AVI_NAME); } // PortAudio options diff --git a/src/osd/modules/opengl/gl_shader_mgr.cpp b/src/osd/modules/opengl/gl_shader_mgr.cpp index de36240ab3e..0cf3f9b6617 100644 --- a/src/osd/modules/opengl/gl_shader_mgr.cpp +++ b/src/osd/modules/opengl/gl_shader_mgr.cpp @@ -15,12 +15,12 @@ #ifdef GLSL_SOURCE_ON_DISK -static const char * glsl_mamebm_vsh_files [GLSL_VERTEX_SHADER_INT_NUMBER] = +static char const *const glsl_mamebm_vsh_files [GLSL_VERTEX_SHADER_INT_NUMBER] = { "/tmp/glsl_general.vsh" // general }; -static const char * glsl_mamebm_fsh_files [GLSL_SHADER_FEAT_INT_NUMBER] = +static char const *const glsl_mamebm_fsh_files [GLSL_SHADER_FEAT_INT_NUMBER] = { "/tmp/glsl_plain_rgb32_dir.fsh", // rgb32 dir plain "/tmp/glsl_bilinear_rgb32_dir.fsh", // rgb32 dir bilinear @@ -35,12 +35,12 @@ static const char * glsl_mamebm_fsh_files [GLSL_SHADER_FEAT_INT_NUMBER] = #include "shader/glsl_bilinear_rgb32_dir.fsh.c" #include "shader/glsl_bicubic_rgb32_dir.fsh.c" -static const char * glsl_mamebm_vsh_sources [GLSL_VERTEX_SHADER_INT_NUMBER] = +static char const *const glsl_mamebm_vsh_sources [GLSL_VERTEX_SHADER_INT_NUMBER] = { glsl_general_vsh_src // general }; -static const char * glsl_mamebm_fsh_sources [GLSL_SHADER_FEAT_INT_NUMBER] = +static char const *const glsl_mamebm_fsh_sources [GLSL_SHADER_FEAT_INT_NUMBER] = { glsl_plain_rgb32_dir_fsh_src, // rgb32 dir plain glsl_bilinear_rgb32_dir_fsh_src, // rgb32 dir bilinear @@ -49,7 +49,7 @@ static const char * glsl_mamebm_fsh_sources [GLSL_SHADER_FEAT_INT_NUMBER] = #endif // GLSL_SOURCE_ON_DISK -static const char * glsl_mamebm_filter_names [GLSL_SHADER_FEAT_MAX_NUMBER] = +static char const *const glsl_mamebm_filter_names [GLSL_SHADER_FEAT_MAX_NUMBER] = { "plain", "bilinear", diff --git a/src/osd/modules/render/bgfx/chainentryreader.cpp b/src/osd/modules/render/bgfx/chainentryreader.cpp index 57ade646a44..156827b0a96 100644 --- a/src/osd/modules/render/bgfx/chainentryreader.cpp +++ b/src/osd/modules/render/bgfx/chainentryreader.cpp @@ -63,8 +63,10 @@ bgfx_chain_entry* chain_entry_reader::read_from_value(const Value& value, std::s if (!READER_CHECK(!has_target || input["target"].IsString(), (prefix + "input[" + std::to_string(i) + ": Value 'target' must be a string\n").c_str())) return nullptr; if (!READER_CHECK(!has_option || input["option"].IsString(), (prefix + "input[" + std::to_string(i) + ": Value 'option' must be a string\n").c_str())) return nullptr; if (!READER_CHECK(has_target || !input.HasMember("bilinear") || input["bilinear"].IsBool(), (prefix + "input[" + std::to_string(i) + ": Value 'bilinear' must be a boolean\n").c_str())) return nullptr; + if (!READER_CHECK(has_target || !input.HasMember("clamp") || input["clamp"].IsBool(), (prefix + "input[" + std::to_string(i) + ": Value 'clamp' must be a boolean\n").c_str())) return nullptr; if (!READER_CHECK(has_texture || has_option || !input.HasMember("selection") || input["selection"].IsString(), (prefix + "input[" + std::to_string(i) + ": Value 'selection' must be a string\n").c_str())) return nullptr; bool bilinear = get_bool(input, "bilinear", true); + bool clamp = get_bool(input, "clamp", false); std::string selection = get_string(input, "selection", ""); std::vector<std::string> texture_names; @@ -87,7 +89,8 @@ bgfx_chain_entry* chain_entry_reader::read_from_value(const Value& value, std::s if (selection == "") { // create texture for specified file name - uint32_t flags = bilinear ? 0 : (BGFX_TEXTURE_MIN_POINT | BGFX_TEXTURE_MAG_POINT | BGFX_TEXTURE_MIP_POINT); + uint32_t flags = bilinear ? 0u : (BGFX_TEXTURE_MIN_POINT | BGFX_TEXTURE_MAG_POINT | BGFX_TEXTURE_MIP_POINT); + flags |= clamp ? (BGFX_TEXTURE_U_CLAMP | BGFX_TEXTURE_V_CLAMP | BGFX_TEXTURE_W_CLAMP) : 0u; bgfx_texture* texture = chains.textures().create_png_texture(chains.options().art_path(), texture_name, texture_name, flags, screen_index); if (texture == nullptr) { @@ -97,7 +100,8 @@ bgfx_chain_entry* chain_entry_reader::read_from_value(const Value& value, std::s else { // create texture for specified file name - uint32_t flags = bilinear ? 0 : (BGFX_TEXTURE_MIN_POINT | BGFX_TEXTURE_MAG_POINT | BGFX_TEXTURE_MIP_POINT); + uint32_t flags = bilinear ? 0u : (BGFX_TEXTURE_MIN_POINT | BGFX_TEXTURE_MAG_POINT | BGFX_TEXTURE_MIP_POINT); + flags |= clamp ? (BGFX_TEXTURE_U_CLAMP | BGFX_TEXTURE_V_CLAMP | BGFX_TEXTURE_W_CLAMP) : 0u; bgfx_texture* texture = chains.textures().create_png_texture(chains.options().art_path(), texture_name, texture_name, flags, screen_index); if (texture == nullptr) { @@ -149,7 +153,8 @@ bgfx_chain_entry* chain_entry_reader::read_from_value(const Value& value, std::s if (file_extension == extension) { // create textures for all files containd in the path of the specified file name - uint32_t flags = bilinear ? 0 : (BGFX_TEXTURE_MIN_POINT | BGFX_TEXTURE_MAG_POINT | BGFX_TEXTURE_MIP_POINT); + uint32_t flags = bilinear ? 0u : (BGFX_TEXTURE_MIN_POINT | BGFX_TEXTURE_MAG_POINT | BGFX_TEXTURE_MIP_POINT); + flags |= clamp ? (BGFX_TEXTURE_U_CLAMP | BGFX_TEXTURE_V_CLAMP | BGFX_TEXTURE_W_CLAMP) : 0u; bgfx_texture* texture = chains.textures().create_png_texture(chains.options().art_path(), file_path, file_path, flags, screen_index); if (texture == nullptr) { diff --git a/src/osd/modules/render/bgfx/shaders/chains/hlsl/fs_chroma.sc b/src/osd/modules/render/bgfx/shaders/chains/hlsl/fs_chroma.sc new file mode 100644 index 00000000000..b76370c0aa9 --- /dev/null +++ b/src/osd/modules/render/bgfx/shaders/chains/hlsl/fs_chroma.sc @@ -0,0 +1,38 @@ +$input v_color0, v_texcoord0 + +// license: BSD-3-Clause +// copyright-holders: W. M. Martinez +//----------------------------------------------------------------------------- +// Phosphor Chromaticity to sRGB Transform Effect +//----------------------------------------------------------------------------- + +#include "common.sh" + +// User-supplied +uniform vec4 u_y_gain; +uniform vec4 u_chroma_a; +uniform vec4 u_chroma_b; +uniform vec4 u_chroma_c; + +// Samplers +SAMPLER2D(s_tex, 0); + +void main() +{ + vec4 cin = texture2D(s_tex, v_texcoord0); + vec4 cout = vec4(0.0, 0.0, 0.0, cin.a); + mat3 xy = mat3(u_chroma_a.xyz, u_chroma_b.xyz, u_chroma_c.xyz); + const mat3 XYZ_TO_sRGB = mat3( + 3.2406, -1.5372, -0.4986, + -0.9689, 1.8758, 0.0415, + 0.0557, -0.2040, 1.0570 + ); + + for (int i = 0; i < 3; ++i) { + float Y = u_y_gain[i] * cin[i]; + float X = xy[i].x / xy[i].y * Y; + float Z = (1.0 - xy[i].x - xy[i].y) / xy[i].y * Y; + cout.rgb += mul(XYZ_TO_sRGB, vec3(X, Y, Z)); + } + gl_FragColor = cout * v_color0; +} diff --git a/src/osd/modules/render/bgfx/shaders/chains/hlsl/fs_post.sc b/src/osd/modules/render/bgfx/shaders/chains/hlsl/fs_post.sc index 4aa3719c0ab..10fb11dac8c 100644 --- a/src/osd/modules/render/bgfx/shaders/chains/hlsl/fs_post.sc +++ b/src/osd/modules/render/bgfx/shaders/chains/hlsl/fs_post.sc @@ -3,11 +3,15 @@ $input v_color0, v_texcoord0 // license:BSD-3-Clause // copyright-holders:Ryan Holtz,ImJezze //----------------------------------------------------------------------------- -// Scanline & Shadowmask Effect +// Shadowmask Effect //----------------------------------------------------------------------------- #include "common.sh" +#define MONOCHROME 1.0 +#define DICHROME 2.0 +#define TRICHROME 3.0 + // Autos uniform vec4 u_swap_xy; uniform vec4 u_source_dims; // size of the guest machine @@ -27,6 +31,8 @@ uniform vec4 u_humbar_hertz_rate; // difference between the 59.94 Hz field rate uniform vec4 u_humbar_alpha; uniform vec4 u_power; uniform vec4 u_floor; +uniform vec4 u_chroma_mode; +uniform vec4 u_conversion_gain; // Parametric uniform vec4 u_time; // milliseconds @@ -112,6 +118,14 @@ void main() } else { + // Hum Bar Simulation + if (u_humbar_alpha.x > 0.0f) + { + float HumTimeStep = fract(u_time.x * u_humbar_hertz_rate.x); + float HumBrightness = 1.0 - fract(BaseCoord.y + HumTimeStep) * u_humbar_alpha.x; + BaseColor.rgb *= HumBrightness; + } + // Mask Simulation if (u_shadow_alpha.x > 0.0) { @@ -139,14 +153,15 @@ void main() BaseColor.g = pow(BaseColor.g, u_power.g); BaseColor.b = pow(BaseColor.b, u_power.b); - // Hum Bar Simulation - if (u_humbar_alpha.x > 0.0f) - { - float HumTimeStep = fract(u_time.x * u_humbar_hertz_rate.x); - float HumBrightness = 1.0 - fract(BaseCoord.y + HumTimeStep) * u_humbar_alpha.x; - BaseColor.rgb *= HumBrightness; + BaseColor.rgb *= v_color0.rgb; + if (u_chroma_mode.x == MONOCHROME) { + BaseColor.r = dot(u_conversion_gain.rgb, BaseColor.rgb); + BaseColor.gb = vec2(BaseColor.r, BaseColor.r); + } else if (u_chroma_mode.x == DICHROME) { + BaseColor.r = dot(u_conversion_gain.rg, BaseColor.rg); + BaseColor.g = BaseColor.r; } - gl_FragColor = vec4(BaseColor.rgb * v_color0.rgb, BaseColor.a); + gl_FragColor = BaseColor; } } diff --git a/src/osd/modules/render/bgfx/shaders/chains/hlsl/vs_chroma.sc b/src/osd/modules/render/bgfx/shaders/chains/hlsl/vs_chroma.sc new file mode 100644 index 00000000000..405ef8feb3b --- /dev/null +++ b/src/osd/modules/render/bgfx/shaders/chains/hlsl/vs_chroma.sc @@ -0,0 +1,14 @@ +$input a_position, a_texcoord0, a_color0 +$output v_texcoord0, v_color0 + +// license:BSD-3-Clause +// copyright-holders:Dario Manesku + +#include "common.sh" + +void main() +{ + gl_Position = mul(u_viewProj, vec4(a_position.xy, 0.0, 1.0)); + v_texcoord0 = a_texcoord0; + v_color0 = a_color0; +} diff --git a/src/osd/modules/render/bgfx/shaders/chains/misc/fs_lut.sc b/src/osd/modules/render/bgfx/shaders/chains/misc/fs_lut.sc new file mode 100644 index 00000000000..2c8cffab7e1 --- /dev/null +++ b/src/osd/modules/render/bgfx/shaders/chains/misc/fs_lut.sc @@ -0,0 +1,29 @@ +$input v_color0, v_texcoord0 + +// license: BSD-3-Clause +// copyright-holders: W. M. Martinez + +#include "common.sh" + +#define LUT_TEXTURE_WIDTH 4096.0f +#define LUT_SIZE 64.0f +#define LUT_SCALE vec2(1.0f / LUT_TEXTURE_WIDTH, 1.0f / LUT_SIZE) + +SAMPLER2D(s_tex, 0); +SAMPLER2D(s_3dlut, 1); + +void main() +{ + vec4 bp = texture2D(s_tex, v_texcoord0); + vec3 color = bp.rgb; + // NOTE: Do not change the order of parameters here. + vec3 lutcoord = vec3(color.rg * ((LUT_SIZE - 1.0f) + 0.5f) * + LUT_SCALE, (LUT_SIZE - 1.0f) * color.b); + float shift = floor(lutcoord.z); + + lutcoord.x += shift * LUT_SCALE.y; + color.rgb = mix(texture2D(s_3dlut, lutcoord.xy).rgb, + texture2D(s_3dlut, vec2(lutcoord.x + LUT_SCALE.y, + lutcoord.y)).rgb, lutcoord.z - shift); + gl_FragColor = vec4(color, bp.a) * v_color0; +} diff --git a/src/osd/modules/render/bgfx/shaders/chains/misc/vs_lut.sc b/src/osd/modules/render/bgfx/shaders/chains/misc/vs_lut.sc new file mode 100644 index 00000000000..405ef8feb3b --- /dev/null +++ b/src/osd/modules/render/bgfx/shaders/chains/misc/vs_lut.sc @@ -0,0 +1,14 @@ +$input a_position, a_texcoord0, a_color0 +$output v_texcoord0, v_color0 + +// license:BSD-3-Clause +// copyright-holders:Dario Manesku + +#include "common.sh" + +void main() +{ + gl_Position = mul(u_viewProj, vec4(a_position.xy, 0.0, 1.0)); + v_texcoord0 = a_texcoord0; + v_color0 = a_color0; +} diff --git a/src/osd/modules/render/d3d/d3dcomm.h b/src/osd/modules/render/d3d/d3dcomm.h index 38b93adb7ac..95dcac48ca7 100644 --- a/src/osd/modules/render/d3d/d3dcomm.h +++ b/src/osd/modules/render/d3d/d3dcomm.h @@ -143,6 +143,14 @@ private: void compute_size(int texwidth, int texheight); void compute_size_subroutine(int texwidth, int texheight, int* p_width, int* p_height); + inline void copyline_palette16(uint32_t *dst, const uint16_t *src, int width, const rgb_t *palette, int xborderpix); + inline void copyline_palettea16(uint32_t *dst, const uint16_t *src, int width, const rgb_t *palette, int xborderpix); + inline void copyline_rgb32(uint32_t *dst, const uint32_t *src, int width, const rgb_t *palette, int xborderpix); + inline void copyline_argb32(uint32_t *dst, const uint32_t *src, int width, const rgb_t *palette, int xborderpix); + inline void copyline_yuy16_to_yuy2(uint16_t *dst, const uint16_t *src, int width, const rgb_t *palette); + inline void copyline_yuy16_to_uyvy(uint16_t *dst, const uint16_t *src, int width, const rgb_t *palette); + inline void copyline_yuy16_to_argb(uint32_t *dst, const uint16_t *src, int width, const rgb_t *palette); + d3d_texture_manager * m_texture_manager; // texture manager pointer renderer_d3d9 * m_renderer; // renderer pointer diff --git a/src/osd/modules/render/d3d/d3dhlsl.cpp b/src/osd/modules/render/d3d/d3dhlsl.cpp index df5e2febea2..e2a9bb4bc53 100644 --- a/src/osd/modules/render/d3d/d3dhlsl.cpp +++ b/src/osd/modules/render/d3d/d3dhlsl.cpp @@ -25,6 +25,7 @@ #include "strconv.h" #include "d3dhlsl.h" #include "../frontend/mame/ui/slider.h" +#include <array> #include <utility> //============================================================ @@ -171,6 +172,8 @@ shaders::shaders() : acc_t(0), delta_t(0), shadow_texture(nullptr), + lut_texture(nullptr), + ui_lut_texture(nullptr), options(nullptr), black_surface(nullptr), black_texture(nullptr), @@ -198,6 +201,7 @@ shaders::shaders() : bloom_effect(nullptr), downsample_effect(nullptr), vector_effect(nullptr), + chroma_effect(nullptr), curr_texture(nullptr), curr_render_target(nullptr), curr_poly(nullptr), @@ -546,6 +550,12 @@ bool shaders::init(d3d_base *d3dintf, running_machine *machine, renderer_d3d9 *r get_vector(winoptions.screen_floor(), 3, options->floor, true); get_vector(winoptions.screen_phosphor(), 3, options->phosphor, true); options->saturation = winoptions.screen_saturation(); + options->chroma_mode = winoptions.screen_chroma_mode(); + get_vector(winoptions.screen_chroma_a(), 2, options->chroma_a, true); + get_vector(winoptions.screen_chroma_b(), 2, options->chroma_b, true); + get_vector(winoptions.screen_chroma_c(), 2, options->chroma_c, true); + get_vector(winoptions.screen_chroma_conversion_gain(), 3, options->chroma_conversion_gain, true); + get_vector(winoptions.screen_chroma_y_gain(), 3, options->chroma_y_gain, true); options->yiq_enable = winoptions.screen_yiq_enable(); options->yiq_jitter = winoptions.screen_yiq_jitter(); options->yiq_cc = winoptions.screen_yiq_cc(); @@ -574,6 +584,10 @@ bool shaders::init(d3d_base *d3dintf, running_machine *machine, renderer_d3d9 *r options->bloom_level6_weight = winoptions.screen_bloom_lvl6_weight(); options->bloom_level7_weight = winoptions.screen_bloom_lvl7_weight(); options->bloom_level8_weight = winoptions.screen_bloom_lvl8_weight(); + strncpy(options->lut_texture, winoptions.screen_lut_texture(), sizeof(options->lut_texture)); + options->lut_enable = winoptions.screen_lut_enable(); + strncpy(options->ui_lut_texture, winoptions.ui_lut_texture(), sizeof(options->ui_lut_texture)); + options->ui_lut_enable = winoptions.ui_lut_enable(); options->params_init = true; @@ -728,6 +742,44 @@ int shaders::create_resources() d3d->get_texture_manager()->m_texture_list.push_back(std::move(tex)); } + render_load_png(lut_bitmap, file, nullptr, options->lut_texture); + if (lut_bitmap.valid()) + { + render_texinfo texture; + + // fake in the basic data so it looks like it came from render.c + texture.base = lut_bitmap.raw_pixptr(0); + texture.rowpixels = lut_bitmap.rowpixels(); + texture.width = lut_bitmap.width(); + texture.height = lut_bitmap.height(); + texture.palette = nullptr; + texture.seqid = 0; + + // now create it (no prescale, no wrap) + auto tex = std::make_unique<texture_info>(d3d->get_texture_manager(), &texture, 1, PRIMFLAG_BLENDMODE(BLENDMODE_ALPHA) | PRIMFLAG_TEXFORMAT(TEXFORMAT_ARGB32)); + lut_texture = tex.get(); + d3d->get_texture_manager()->m_texture_list.push_back(std::move(tex)); + } + + render_load_png(ui_lut_bitmap, file, nullptr, options->ui_lut_texture); + if (ui_lut_bitmap.valid()) + { + render_texinfo texture; + + // fake in the basic data so it looks like it came from render.c + texture.base = ui_lut_bitmap.raw_pixptr(0); + texture.rowpixels = ui_lut_bitmap.rowpixels(); + texture.width = ui_lut_bitmap.width(); + texture.height = ui_lut_bitmap.height(); + texture.palette = nullptr; + texture.seqid = 0; + + // now create it (no prescale, no wrap) + auto tex = std::make_unique<texture_info>(d3d->get_texture_manager(), &texture, 1, PRIMFLAG_BLENDMODE(BLENDMODE_ALPHA) | PRIMFLAG_TEXFORMAT(TEXFORMAT_ARGB32)); + ui_lut_texture = tex.get(); + d3d->get_texture_manager()->m_texture_list.push_back(std::move(tex)); + } + const char *fx_dir = downcast<windows_options &>(machine->options()).screen_post_fx_dir(); default_effect = new effect(this, d3d->get_device(), "primary.fx", fx_dir); @@ -743,6 +795,7 @@ int shaders::create_resources() bloom_effect = new effect(this, d3d->get_device(), "bloom.fx", fx_dir); downsample_effect = new effect(this, d3d->get_device(), "downsample.fx", fx_dir); vector_effect = new effect(this, d3d->get_device(), "vector.fx", fx_dir); + chroma_effect = new effect(this, d3d->get_device(), "chroma.fx", fx_dir); if (!default_effect->is_valid() || !post_effect->is_valid() || @@ -756,14 +809,13 @@ int shaders::create_resources() !ntsc_effect->is_valid() || !bloom_effect->is_valid() || !downsample_effect->is_valid() || - !vector_effect->is_valid()) + !vector_effect->is_valid() || + !chroma_effect->is_valid()) { return 1; } - const int EFFECT_COUNT = 14; - - effect *effects[EFFECT_COUNT] = { + std::array<effect*, 15> effects = { default_effect, post_effect, distortion_effect, @@ -777,10 +829,11 @@ int shaders::create_resources() color_effect, bloom_effect, downsample_effect, - vector_effect + vector_effect, + chroma_effect }; - for (int i = 0; i < 13; i++) + for (int i = 0; i < effects.size(); i++) { effects[i]->add_uniform("SourceDims", uniform::UT_VEC2, uniform::CU_SOURCE_DIMS); effects[i]->add_uniform("TargetDims", uniform::UT_VEC2, uniform::CU_TARGET_DIMS); @@ -820,19 +873,26 @@ int shaders::create_resources() scanline_effect->add_uniform("ScanlineHeight", uniform::UT_FLOAT, uniform::CU_POST_SCANLINE_HEIGHT); scanline_effect->add_uniform("ScanlineVariation", uniform::UT_FLOAT, uniform::CU_POST_SCANLINE_VARIATION); scanline_effect->add_uniform("ScanlineBrightScale", uniform::UT_FLOAT, uniform::CU_POST_SCANLINE_BRIGHT_SCALE); - scanline_effect->add_uniform("ScanlineBrightOffset", uniform::UT_FLOAT, uniform::CU_POST_SCANLINE_BRIGHT_OFFSET); + scanline_effect->add_uniform("ScanlineBrightOffset", uniform::UT_FLOAT, uniform::CU_POST_SCANLINE_BRIGHT_OFFSET); focus_effect->add_uniform("Defocus", uniform::UT_VEC2, uniform::CU_FOCUS_SIZE); - phosphor_effect->add_uniform("Phosphor", uniform::UT_VEC3, uniform::CU_PHOSPHOR_LIFE); - post_effect->add_uniform("ShadowAlpha", uniform::UT_FLOAT, uniform::CU_POST_SHADOW_ALPHA); post_effect->add_uniform("ShadowCount", uniform::UT_VEC2, uniform::CU_POST_SHADOW_COUNT); post_effect->add_uniform("ShadowUV", uniform::UT_VEC2, uniform::CU_POST_SHADOW_UV); post_effect->add_uniform("ShadowUVOffset", uniform::UT_VEC2, uniform::CU_POST_SHADOW_UV_OFFSET); - post_effect->add_uniform("ShadowDims", uniform::UT_VEC2, uniform::CU_POST_SHADOW_DIMS); + post_effect->add_uniform("ShadowDims", uniform::UT_VEC2, uniform::CU_POST_SHADOW_DIMS); post_effect->add_uniform("Power", uniform::UT_VEC3, uniform::CU_POST_POWER); post_effect->add_uniform("Floor", uniform::UT_VEC3, uniform::CU_POST_FLOOR); + post_effect->add_uniform("ChomaMode", uniform::UT_INT, uniform::CU_CHROMA_MODE); + post_effect->add_uniform("ConversionGain", uniform::UT_VEC3, uniform::CU_CHROMA_CONVERSION_GAIN); + + phosphor_effect->add_uniform("Phosphor", uniform::UT_VEC3, uniform::CU_PHOSPHOR_LIFE); + + chroma_effect->add_uniform("YGain", uniform::UT_VEC3, uniform::CU_CHROMA_Y_GAIN); + chroma_effect->add_uniform("ChromaA", uniform::UT_VEC2, uniform::CU_CHROMA_A); + chroma_effect->add_uniform("ChromaB", uniform::UT_VEC2, uniform::CU_CHROMA_B); + chroma_effect->add_uniform("ChromaC", uniform::UT_VEC2, uniform::CU_CHROMA_C); distortion_effect->add_uniform("VignettingAmount", uniform::UT_FLOAT, uniform::CU_POST_VIGNETTING); distortion_effect->add_uniform("DistortionAmount", uniform::UT_FLOAT, uniform::CU_POST_DISTORTION); @@ -842,6 +902,9 @@ int shaders::create_resources() distortion_effect->add_uniform("SmoothBorderAmount", uniform::UT_FLOAT, uniform::CU_POST_SMOOTH_BORDER); distortion_effect->add_uniform("ReflectionAmount", uniform::UT_FLOAT, uniform::CU_POST_REFLECTION); + default_effect->add_uniform("LutEnable", uniform::UT_BOOL, uniform::CU_LUT_ENABLE); + default_effect->add_uniform("UiLutEnable", uniform::UT_BOOL, uniform::CU_UI_LUT_ENABLE); + return 0; } @@ -880,6 +943,7 @@ void shaders::begin_draw() bloom_effect->set_technique("DefaultTechnique"); downsample_effect->set_technique("DefaultTechnique"); vector_effect->set_technique("DefaultTechnique"); + chroma_effect->set_technique("DefaultTechnique"); HRESULT result = d3d->get_device()->SetRenderTarget(0, backbuffer); if (FAILED(result)) @@ -1190,13 +1254,11 @@ int shaders::post_pass(d3d_render_target *rt, int source_index, poly_info *poly, curr_effect = post_effect; curr_effect->update_uniforms(); - curr_effect->set_texture("ShadowTexture", shadow_texture == nullptr ? nullptr : shadow_texture->get_finaltex()); - curr_effect->set_int("ShadowTileMode", options->shadow_mask_tile_mode); + curr_effect->set_texture("ShadowTexture", shadow_texture == nullptr ? nullptr : shadow_texture->get_finaltex()); curr_effect->set_int("ShadowTileMode", options->shadow_mask_tile_mode); curr_effect->set_texture("DiffuseTexture", rt->target_texture[next_index]); curr_effect->set_vector("BackColor", 3, back_color); curr_effect->set_vector("ScreenScale", 2, screen_scale); curr_effect->set_vector("ScreenOffset", 2, screen_offset); - curr_effect->set_float("ScanlineOffset", curr_texture->get_cur_frame() == 0 ? 0.0f : options->scanline_jitter); curr_effect->set_float("TimeMilliseconds", (float)machine->time().as_double() * 1000.0f); curr_effect->set_float("HumBarAlpha", options->hum_bar_alpha); curr_effect->set_bool("PrepareBloom", prepare_bloom); @@ -1207,6 +1269,18 @@ int shaders::post_pass(d3d_render_target *rt, int source_index, poly_info *poly, return next_index; } +int shaders::chroma_pass(d3d_render_target *rt, int source_index, poly_info *poly, int vertnum) +{ + int next_index = source_index; + + curr_effect = chroma_effect; + curr_effect->update_uniforms(); + curr_effect->set_texture("Diffuse", rt->target_texture[next_index]); + next_index = rt->next_index(next_index); + blit(rt->target_surface[next_index], false, D3DPT_TRIANGLELIST, 0, 2); + return next_index; +} + int shaders::downsample_pass(d3d_render_target *rt, int source_index, poly_info *poly, int vertnum) { int next_index = source_index; @@ -1332,6 +1406,8 @@ int shaders::vector_buffer_pass(d3d_render_target *rt, int source_index, poly_in curr_effect->set_technique("VectorBufferTechnique"); curr_effect->set_texture("Diffuse", rt->target_texture[next_index]); + curr_effect->set_texture("LutTexture", lut_texture == nullptr ? nullptr : lut_texture->get_finaltex()); + // we need to clear the vector render target here next_index = rt->next_index(next_index); @@ -1351,6 +1427,7 @@ int shaders::screen_pass(d3d_render_target *rt, int source_index, poly_info *pol curr_effect->set_technique("ScreenTechnique"); curr_effect->set_texture("Diffuse", rt->target_texture[next_index]); + curr_effect->set_texture("LutTexture", lut_texture == nullptr ? nullptr : lut_texture->get_finaltex()); blit(backbuffer, false, poly->type(), vertnum, poly->count()); @@ -1382,6 +1459,8 @@ void shaders::ui_pass(poly_info *poly, int vertnum) curr_effect->update_uniforms(); curr_effect->set_technique("UiTechnique"); + curr_effect->set_texture("LutTexture", lut_texture == nullptr ? nullptr : ui_lut_texture->get_finaltex()); + blit(nullptr, false, poly->type(), vertnum, poly->count()); } @@ -1429,17 +1508,19 @@ void shaders::render_quad(poly_info *poly, int vertnum) next_index = deconverge_pass(rt, next_index, poly, vertnum); next_index = scanline_pass(rt, next_index, poly, vertnum); next_index = defocus_pass(rt, next_index, poly, vertnum); - next_index = phosphor_pass(rt, next_index, poly, vertnum); + //next_index = phosphor_pass(rt, next_index, poly, vertnum); // create bloom textures - int phosphor_index = next_index; + int old_index = next_index; next_index = post_pass(rt, next_index, poly, vertnum, true); next_index = downsample_pass(rt, next_index, poly, vertnum); // apply bloom textures - next_index = phosphor_index; + next_index = old_index; next_index = post_pass(rt, next_index, poly, vertnum, false); next_index = bloom_pass(rt, next_index, poly, vertnum); + next_index = phosphor_pass(rt, next_index, poly, vertnum); + next_index = chroma_pass(rt, next_index, poly, vertnum); next_index = distortion_pass(rt, next_index, poly, vertnum); @@ -1508,17 +1589,19 @@ void shaders::render_quad(poly_info *poly, int vertnum) next_index = vector_buffer_pass(rt, next_index, poly, vertnum); next_index = deconverge_pass(rt, next_index, poly, vertnum); next_index = defocus_pass(rt, next_index, poly, vertnum); - next_index = phosphor_pass(rt, next_index, poly, vertnum); + //next_index = phosphor_pass(rt, next_index, poly, vertnum); // create bloom textures - int phosphor_index = next_index; + int old_index = next_index; next_index = post_pass(rt, next_index, poly, vertnum, true); next_index = downsample_pass(rt, next_index, poly, vertnum); // apply bloom textures - next_index = phosphor_index; + next_index = old_index; next_index = post_pass(rt, next_index, poly, vertnum, false); next_index = bloom_pass(rt, next_index, poly, vertnum); + next_index = phosphor_pass(rt, next_index, poly, vertnum); + next_index = chroma_pass(rt, next_index, poly, vertnum); next_index = distortion_pass(rt, next_index, poly, vertnum); @@ -1826,6 +1909,11 @@ void shaders::delete_resources() delete ntsc_effect; ntsc_effect = nullptr; } + if (chroma_effect != nullptr) + { + delete chroma_effect; + chroma_effect = nullptr; + } if (backbuffer != nullptr) { @@ -1845,6 +1933,8 @@ void shaders::delete_resources() } shadow_bitmap.reset(); + lut_bitmap.reset(); + ui_lut_bitmap.reset(); } @@ -1980,7 +2070,8 @@ hlsl_options shaders::last_options = { false }; enum slider_option { - SLIDER_VECTOR_BEAM_SMOOTH = 0, + SLIDER_UI_LUT_ENABLE = 0, + SLIDER_VECTOR_BEAM_SMOOTH, SLIDER_VECTOR_ATT_MAX, SLIDER_VECTOR_ATT_LEN_MIN, SLIDER_SHADOW_MASK_TILE_MODE, @@ -2019,6 +2110,12 @@ enum slider_option SLIDER_SCALE, SLIDER_POWER, SLIDER_FLOOR, + SLIDER_CHROMA_MODE, + SLIDER_CHROMA_A, + SLIDER_CHROMA_B, + SLIDER_CHROMA_C, + SLIDER_CHROMA_CONVERSION_GAIN, + SLIDER_Y_GAIN, SLIDER_PHOSPHOR, SLIDER_BLOOM_BLEND_MODE, SLIDER_BLOOM_SCALE, @@ -2043,7 +2140,8 @@ enum slider_option SLIDER_NTSC_Y_VALUE, SLIDER_NTSC_I_VALUE, SLIDER_NTSC_Q_VALUE, - SLIDER_NTSC_SCAN_TIME + SLIDER_NTSC_SCAN_TIME, + SLIDER_LUT_ENABLE, }; enum slider_screen_type @@ -2058,6 +2156,7 @@ enum slider_screen_type slider_desc shaders::s_sliders[] = { + { "3D LUT (UI/Artwork)", 0, 0, 1, 1, SLIDER_INT_ENUM, SLIDER_SCREEN_TYPE_ANY, SLIDER_UI_LUT_ENABLE, 0, "%s", { "Off", "On" } }, { "Vector Beam Smooth Amount", 0, 0, 100, 1, SLIDER_FLOAT, SLIDER_SCREEN_TYPE_VECTOR, SLIDER_VECTOR_BEAM_SMOOTH, 0.01f, "%1.2f", {} }, { "Vector Attenuation Maximum", 0, 50, 100, 1, SLIDER_FLOAT, SLIDER_SCREEN_TYPE_VECTOR, SLIDER_VECTOR_ATT_MAX, 0.01f, "%1.2f", {} }, { "Vector Attenuation Length Minimum", 1, 500, 1000, 1, SLIDER_FLOAT, SLIDER_SCREEN_TYPE_VECTOR, SLIDER_VECTOR_ATT_LEN_MIN, 0.001f, "%1.3f", {} }, @@ -2097,6 +2196,12 @@ slider_desc shaders::s_sliders[] = { "Signal Scale,", -200, 100, 200, 1, SLIDER_COLOR, SLIDER_SCREEN_TYPE_ANY, SLIDER_SCALE, 0.01f, "%2.2f", {} }, { "Signal Exponent,", -800, 0, 800, 1, SLIDER_COLOR, SLIDER_SCREEN_TYPE_ANY, SLIDER_POWER, 0.01f, "%2.2f", {} }, { "Signal Floor,", 0, 0, 100, 1, SLIDER_COLOR, SLIDER_SCREEN_TYPE_ANY, SLIDER_FLOOR, 0.01f, "%2.2f", {} }, + { "Color Mode,", 1, 3, 3, 1, SLIDER_INT_ENUM, SLIDER_SCREEN_TYPE_ANY, SLIDER_CHROMA_MODE, 0, "%s", { "", "Monochrome", "Dichrome", "Trichrome" } }, + { "Chroma Conversion Gain,", 0, 0, 10000,10, SLIDER_COLOR, SLIDER_SCREEN_TYPE_ANY, SLIDER_CHROMA_CONVERSION_GAIN, 0.0001f, "%1.4f", {} }, + { "Phosphor A Chromaticity,", 0, 0, 1000,10, SLIDER_VEC2, SLIDER_SCREEN_TYPE_ANY, SLIDER_CHROMA_A, 0.001f, "%1.3f", {} }, + { "Phosphor B Chromaticity,", 0, 0, 1000,10, SLIDER_VEC2, SLIDER_SCREEN_TYPE_ANY, SLIDER_CHROMA_B, 0.001f, "%1.3f", {} }, + { "Phosphor C Chromaticity,", 0, 0, 1000,10, SLIDER_VEC2, SLIDER_SCREEN_TYPE_ANY, SLIDER_CHROMA_C, 0.001f, "%1.3f", {} }, + { "Phosphor Gain,", 0, 0, 10000,10, SLIDER_COLOR, SLIDER_SCREEN_TYPE_ANY, SLIDER_Y_GAIN, 0.0001f, "%1.4f", {} }, { "Phosphor Persistence,", 0, 0, 100, 1, SLIDER_COLOR, SLIDER_SCREEN_TYPE_ANY, SLIDER_PHOSPHOR, 0.01f, "%2.2f", {} }, { "Bloom Blend Mode", 0, 0, 1, 1, SLIDER_INT_ENUM, SLIDER_SCREEN_TYPE_ANY, SLIDER_BLOOM_BLEND_MODE, 0, "%s", { "Brighten", "Darken" } }, { "Bloom Scale", 0, 0, 2000, 5, SLIDER_FLOAT, SLIDER_SCREEN_TYPE_ANY, SLIDER_BLOOM_SCALE, 0.001f, "%1.3f", {} }, @@ -2122,6 +2227,7 @@ slider_desc shaders::s_sliders[] = { "NTSC I Signal Bandwidth (Hz)", 0, 120, 600, 5, SLIDER_FLOAT, SLIDER_SCREEN_TYPE_LCD_OR_RASTER, SLIDER_NTSC_I_VALUE, 0.01f, "%1.4f", {} }, { "NTSC Q Signal Bandwidth (Hz)", 0, 60, 600, 5, SLIDER_FLOAT, SLIDER_SCREEN_TYPE_LCD_OR_RASTER, SLIDER_NTSC_Q_VALUE, 0.01f, "%1.4f", {} }, { "NTSC Scanline Duration (uSec)", 0, 5260, 10000, 1, SLIDER_FLOAT, SLIDER_SCREEN_TYPE_LCD_OR_RASTER, SLIDER_NTSC_SCAN_TIME, 0.01f, "%1.2f", {} }, + { "3D LUT (Screen)", 0, 0, 1, 1, SLIDER_INT_ENUM, SLIDER_SCREEN_TYPE_ANY, SLIDER_LUT_ENABLE, 0, "%s", { "Off", "On" } }, { nullptr, 0, 0, 0, 0, 0, 0, -1, 0, nullptr, {} } }; @@ -2169,6 +2275,12 @@ void *shaders::get_slider_option(int id, int index) case SLIDER_SCALE: return &(options->scale[index]); case SLIDER_POWER: return &(options->power[index]); case SLIDER_FLOOR: return &(options->floor[index]); + case SLIDER_CHROMA_MODE: return &(options->chroma_mode); + case SLIDER_CHROMA_A: return &(options->chroma_a[index]); + case SLIDER_CHROMA_B: return &(options->chroma_b[index]); + case SLIDER_CHROMA_C: return &(options->chroma_c[index]); + case SLIDER_CHROMA_CONVERSION_GAIN: return &(options->chroma_conversion_gain[index]); + case SLIDER_Y_GAIN: return &(options->chroma_y_gain[index]); case SLIDER_PHOSPHOR: return &(options->phosphor[index]); case SLIDER_BLOOM_BLEND_MODE: return &(options->bloom_blend_mode); case SLIDER_BLOOM_SCALE: return &(options->bloom_scale); @@ -2194,6 +2306,8 @@ void *shaders::get_slider_option(int id, int index) case SLIDER_NTSC_I_VALUE: return &(options->yiq_i); case SLIDER_NTSC_Q_VALUE: return &(options->yiq_q); case SLIDER_NTSC_SCAN_TIME: return &(options->yiq_scan_time); + case SLIDER_LUT_ENABLE: return &(options->lut_enable); + case SLIDER_UI_LUT_ENABLE: return &(options->ui_lut_enable); } return nullptr; } @@ -2458,6 +2572,24 @@ void uniform::update() m_shader->set_vector("Defocus", 2, &options->defocus[0]); break; + case CU_CHROMA_MODE: + m_shader->set_int("ChromaMode", options->chroma_mode); + break; + case CU_CHROMA_A: + m_shader->set_vector("ChromaA", 2, &options->chroma_a[0]); + break; + case CU_CHROMA_B: + m_shader->set_vector("ChromaB", 2, &options->chroma_b[0]); + break; + case CU_CHROMA_C: + m_shader->set_vector("ChromaC", 2, &options->chroma_c[0]); + break; + case CU_CHROMA_CONVERSION_GAIN: + m_shader->set_vector("ConversionGain", 3, &options->chroma_conversion_gain[0]); + case CU_CHROMA_Y_GAIN: + m_shader->set_vector("YGain", 3, &options->chroma_y_gain[0]); + break; + case CU_PHOSPHOR_LIFE: m_shader->set_vector("Phosphor", 3, options->phosphor); break; @@ -2545,6 +2677,11 @@ void uniform::update() case CU_POST_FLOOR: m_shader->set_vector("Floor", 3, options->floor); break; + case CU_LUT_ENABLE: + m_shader->set_bool("LutEnable", options->lut_enable ? true : false); + break; + case CU_UI_LUT_ENABLE: + m_shader->set_bool("UiLutEnable", options->ui_lut_enable ? true : false); } } diff --git a/src/osd/modules/render/d3d/d3dhlsl.h b/src/osd/modules/render/d3d/d3dhlsl.h index eae92ee5b3d..7f7dacc4538 100644 --- a/src/osd/modules/render/d3d/d3dhlsl.h +++ b/src/osd/modules/render/d3d/d3dhlsl.h @@ -101,6 +101,14 @@ public: CU_POST_SCANLINE_BRIGHT_OFFSET, CU_POST_POWER, CU_POST_FLOOR, + CU_CHROMA_MODE, + CU_CHROMA_A, + CU_CHROMA_B, + CU_CHROMA_C, + CU_CHROMA_CONVERSION_GAIN, + CU_CHROMA_Y_GAIN, + CU_LUT_ENABLE, + CU_UI_LUT_ENABLE, CU_COUNT }; @@ -207,6 +215,12 @@ struct hlsl_options float floor[3]; float phosphor[3]; float saturation; + int chroma_mode; + float chroma_a[2]; + float chroma_b[2]; + float chroma_c[2]; + float chroma_conversion_gain[3]; + float chroma_y_gain[3]; // NTSC int yiq_enable; @@ -241,6 +255,12 @@ struct hlsl_options float bloom_level6_weight; float bloom_level7_weight; float bloom_level8_weight; + + // Final + char lut_texture[1024]; + int lut_enable; + char ui_lut_texture[1024]; + int ui_lut_enable; }; struct slider_desc @@ -338,6 +358,7 @@ private: int post_pass(d3d_render_target *rt, int source_index, poly_info *poly, int vertnum, bool prepare_bloom); int downsample_pass(d3d_render_target *rt, int source_index, poly_info *poly, int vertnum); int bloom_pass(d3d_render_target *rt, int source_index, poly_info *poly, int vertnum); + int chroma_pass(d3d_render_target *rt, int source_index, poly_info *poly, int vertnum); int distortion_pass(d3d_render_target *rt, int source_index, poly_info *poly, int vertnum); int vector_pass(d3d_render_target *rt, int source_index, poly_info *poly, int vertnum); int vector_buffer_pass(d3d_render_target *rt, int source_index, poly_info *poly, int vertnum); @@ -357,6 +378,10 @@ private: double delta_t; // data for delta_time bitmap_argb32 shadow_bitmap; // shadow mask bitmap for post-processing shader texture_info * shadow_texture; // shadow mask texture for post-processing shader + bitmap_argb32 lut_bitmap; + texture_info * lut_texture; + bitmap_argb32 ui_lut_bitmap; + texture_info * ui_lut_texture; hlsl_options * options; // current options IDirect3DSurface9 * black_surface; // black dummy surface @@ -391,6 +416,7 @@ private: effect * bloom_effect; // pointer to the bloom composite effect effect * downsample_effect; // pointer to the bloom downsample effect effect * vector_effect; // pointer to the vector-effect object + effect * chroma_effect; texture_info * curr_texture; d3d_render_target * curr_render_target; diff --git a/src/osd/modules/render/drawbgfx.cpp b/src/osd/modules/render/drawbgfx.cpp index 792c292e23e..47863324ab3 100644 --- a/src/osd/modules/render/drawbgfx.cpp +++ b/src/osd/modules/render/drawbgfx.cpp @@ -55,10 +55,10 @@ // CONSTANTS //============================================================ -const uint16_t renderer_bgfx::CACHE_SIZE = 1024; -const uint32_t renderer_bgfx::PACKABLE_SIZE = 128; -const uint32_t renderer_bgfx::WHITE_HASH = 0x87654321; -const char* renderer_bgfx::WINDOW_PREFIX = "Window 0, "; +uint16_t const renderer_bgfx::CACHE_SIZE = 1024; +uint32_t const renderer_bgfx::PACKABLE_SIZE = 128; +uint32_t const renderer_bgfx::WHITE_HASH = 0x87654321; +char const *const renderer_bgfx::WINDOW_PREFIX = "Window 0, "; //============================================================ // MACROS diff --git a/src/osd/modules/render/drawbgfx.h b/src/osd/modules/render/drawbgfx.h index fadbabf7c13..7994a20246f 100644 --- a/src/osd/modules/render/drawbgfx.h +++ b/src/osd/modules/render/drawbgfx.h @@ -80,7 +80,7 @@ public: return &win->target()->get_primitives(); } - static const char* WINDOW_PREFIX; + static char const *const WINDOW_PREFIX; private: void vertex(ScreenVertex* vertex, float x, float y, float z, uint32_t rgba, float u, float v); diff --git a/src/osd/modules/render/drawd3d.cpp b/src/osd/modules/render/drawd3d.cpp index 5b359458f76..e5dd8547c9b 100644 --- a/src/osd/modules/render/drawd3d.cpp +++ b/src/osd/modules/render/drawd3d.cpp @@ -2214,7 +2214,7 @@ void texture_info::compute_size(int texwidth, int texheight) // copyline_palette16 //============================================================ -static inline void copyline_palette16(uint32_t *dst, const uint16_t *src, int width, const rgb_t *palette, int xborderpix) +inline void texture_info::copyline_palette16(uint32_t *dst, const uint16_t *src, int width, const rgb_t *palette, int xborderpix) { if (xborderpix) *dst++ = 0xff000000 | palette[*src]; @@ -2229,7 +2229,7 @@ static inline void copyline_palette16(uint32_t *dst, const uint16_t *src, int wi // copyline_palettea16 //============================================================ -static inline void copyline_palettea16(uint32_t *dst, const uint16_t *src, int width, const rgb_t *palette, int xborderpix) +inline void texture_info::copyline_palettea16(uint32_t *dst, const uint16_t *src, int width, const rgb_t *palette, int xborderpix) { if (xborderpix) *dst++ = palette[*src]; @@ -2244,7 +2244,7 @@ static inline void copyline_palettea16(uint32_t *dst, const uint16_t *src, int w // copyline_rgb32 //============================================================ -static inline void copyline_rgb32(uint32_t *dst, const uint32_t *src, int width, const rgb_t *palette, int xborderpix) +inline void texture_info::copyline_rgb32(uint32_t *dst, const uint32_t *src, int width, const rgb_t *palette, int xborderpix) { if (palette != nullptr) { @@ -2280,7 +2280,7 @@ static inline void copyline_rgb32(uint32_t *dst, const uint32_t *src, int width, // copyline_argb32 //============================================================ -static inline void copyline_argb32(uint32_t *dst, const uint32_t *src, int width, const rgb_t *palette, int xborderpix) +inline void texture_info::copyline_argb32(uint32_t *dst, const uint32_t *src, int width, const rgb_t *palette, int xborderpix) { if (palette != nullptr) { @@ -2317,7 +2317,7 @@ static inline void copyline_argb32(uint32_t *dst, const uint32_t *src, int width // copyline_yuy16_to_yuy2 //============================================================ -static inline void copyline_yuy16_to_yuy2(uint16_t *dst, const uint16_t *src, int width, const rgb_t *palette) +inline void texture_info::copyline_yuy16_to_yuy2(uint16_t *dst, const uint16_t *src, int width, const rgb_t *palette) { assert(width % 2 == 0); @@ -2348,7 +2348,7 @@ static inline void copyline_yuy16_to_yuy2(uint16_t *dst, const uint16_t *src, in // copyline_yuy16_to_uyvy //============================================================ -static inline void copyline_yuy16_to_uyvy(uint16_t *dst, const uint16_t *src, int width, const rgb_t *palette) +inline void texture_info::copyline_yuy16_to_uyvy(uint16_t *dst, const uint16_t *src, int width, const rgb_t *palette) { assert(width % 2 == 0); @@ -2375,7 +2375,7 @@ static inline void copyline_yuy16_to_uyvy(uint16_t *dst, const uint16_t *src, in // copyline_yuy16_to_argb //============================================================ -static inline void copyline_yuy16_to_argb(uint32_t *dst, const uint16_t *src, int width, const rgb_t *palette) +inline void texture_info::copyline_yuy16_to_argb(uint32_t *dst, const uint16_t *src, int width, const rgb_t *palette) { assert(width % 2 == 0); diff --git a/src/osd/sdl/window.cpp b/src/osd/sdl/window.cpp index e7ef73f4edc..030804f5db8 100644 --- a/src/osd/sdl/window.cpp +++ b/src/osd/sdl/window.cpp @@ -694,7 +694,7 @@ int sdl_window_info::complete_create() * */ osd_printf_verbose("Enter sdl_info::create\n"); - if (renderer().has_flags(osd_renderer::FLAG_NEEDS_OPENGL)) + if (renderer().has_flags(osd_renderer::FLAG_NEEDS_OPENGL) && !video_config.novideo) { SDL_GL_SetAttribute( SDL_GL_DOUBLEBUFFER, 1 ); diff --git a/src/osd/windows/window.cpp b/src/osd/windows/window.cpp index 69bb5153ed4..ca4062a9adf 100644 --- a/src/osd/windows/window.cpp +++ b/src/osd/windows/window.cpp @@ -325,6 +325,7 @@ win_window_info::win_window_info( m_non_fullscreen_bounds.right = 0; m_non_fullscreen_bounds.bottom = 0; m_prescale = video_config.prescale; + m_index = index; } POINT win_window_info::s_saved_cursor_pos = { -1, -1 }; diff --git a/src/osd/windows/winmain.cpp b/src/osd/windows/winmain.cpp index f33b018f1bf..cb512948b26 100644 --- a/src/osd/windows/winmain.cpp +++ b/src/osd/windows/winmain.cpp @@ -216,6 +216,12 @@ const options_entry windows_options::s_option_entries[] = { WINOPTION_POWER";fs_power", "1.0,1.0,1.0", OPTION_STRING, "signal power value (exponential)" }, { WINOPTION_FLOOR";fs_floor", "0.0,0.0,0.0", OPTION_STRING, "signal floor level" }, { WINOPTION_PHOSPHOR";fs_phosphor", "0.0,0.0,0.0", OPTION_STRING, "phosphorescence decay rate (0.0 is instant, 1.0 is forever)" }, + { WINOPTION_CHROMA_MODE, "3", OPTION_INTEGER, "Number of phosphors to use: 1 - monochrome, 2 - dichrome, 3 - trichrome (color)" }, + { WINOPTION_CHROMA_CONVERSION_GAIN, "0.299,0.587,0.114", OPTION_STRING, "Gain to be applied when summing RGB signal for monochrome and dichrome modes" }, + { WINOPTION_CHROMA_A, "0.64,0.33", OPTION_STRING, "Chromaticity coordinate for first phosphor" }, + { WINOPTION_CHROMA_B, "0.30,0.60", OPTION_STRING, "Chromaticity coordinate for second phosphor" }, + { WINOPTION_CHROMA_C, "0.15,0.06", OPTION_STRING, "Chromaticity coordinate for third phosphor" }, + { WINOPTION_CHROMA_Y_GAIN, "0.2126,0.7152,0.0722", OPTION_STRING, "Gain to be applied for each phosphor" }, /* NTSC simulation below this line */ { nullptr, nullptr, OPTION_HEADER, "NTSC POST-PROCESSING OPTIONS" }, { WINOPTION_YIQ_ENABLE";yiq", "0", OPTION_BOOLEAN, "enables YIQ-space HLSL post-processing" }, @@ -250,6 +256,10 @@ const options_entry windows_options::s_option_entries[] = { WINOPTION_BLOOM_LEVEL6_WEIGHT, "0.04", OPTION_FLOAT, "Bloom level 6 weight (1/4 smaller that level 5 target)" }, { WINOPTION_BLOOM_LEVEL7_WEIGHT, "0.02", OPTION_FLOAT, "Bloom level 7 weight (1/4 smaller that level 6 target)" }, { WINOPTION_BLOOM_LEVEL8_WEIGHT, "0.01", OPTION_FLOAT, "Bloom level 8 weight (1/4 smaller that level 7 target)" }, + { WINOPTION_LUT_TEXTURE, "", OPTION_STRING, "3D LUT texture filename for screen, PNG format" }, + { WINOPTION_LUT_ENABLE, "0", OPTION_BOOLEAN, "Enables 3D LUT to be applied to screen after post-processing" }, + { WINOPTION_UI_LUT_TEXTURE, "", OPTION_STRING, "3D LUT texture filename of UI, PNG format" }, + { WINOPTION_UI_LUT_ENABLE, "0", OPTION_BOOLEAN, "Enables 3D LUT to be applied to UI and artwork after post-processing" }, // full screen options { nullptr, nullptr, OPTION_HEADER, "FULL SCREEN OPTIONS" }, @@ -648,4 +658,3 @@ static int is_double_click_start(int argc) } #endif // WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_DESKTOP) - diff --git a/src/osd/windows/winmain.h b/src/osd/windows/winmain.h index 6a0d3421306..79e3b023b64 100644 --- a/src/osd/windows/winmain.h +++ b/src/osd/windows/winmain.h @@ -70,6 +70,12 @@ #define WINOPTION_FLOOR "floor" #define WINOPTION_PHOSPHOR "phosphor_life" #define WINOPTION_SATURATION "saturation" +#define WINOPTION_CHROMA_MODE "chroma_mode" +#define WINOPTION_CHROMA_CONVERSION_GAIN "chroma_conversion_gain" +#define WINOPTION_CHROMA_A "chroma_a" +#define WINOPTION_CHROMA_B "chroma_b" +#define WINOPTION_CHROMA_C "chroma_c" +#define WINOPTION_CHROMA_Y_GAIN "chroma_y_gain" #define WINOPTION_YIQ_ENABLE "yiq_enable" #define WINOPTION_YIQ_JITTER "yiq_jitter" #define WINOPTION_YIQ_CCVALUE "yiq_cc" @@ -98,6 +104,10 @@ #define WINOPTION_BLOOM_LEVEL6_WEIGHT "bloom_lvl6_weight" #define WINOPTION_BLOOM_LEVEL7_WEIGHT "bloom_lvl7_weight" #define WINOPTION_BLOOM_LEVEL8_WEIGHT "bloom_lvl8_weight" +#define WINOPTION_LUT_TEXTURE "lut_texture" +#define WINOPTION_LUT_ENABLE "lut_enable" +#define WINOPTION_UI_LUT_TEXTURE "ui_lut_texture" +#define WINOPTION_UI_LUT_ENABLE "ui_lut_enable" // full screen options #define WINOPTION_TRIPLEBUFFER "triplebuffer" @@ -199,6 +209,16 @@ public: const char *screen_floor() const { return value(WINOPTION_FLOOR); } const char *screen_phosphor() const { return value(WINOPTION_PHOSPHOR); } float screen_saturation() const { return float_value(WINOPTION_SATURATION); } + int screen_chroma_mode() const { return int_value(WINOPTION_CHROMA_MODE); } + const char *screen_chroma_a() const { return value(WINOPTION_CHROMA_A); } + const char *screen_chroma_b() const { return value(WINOPTION_CHROMA_B); } + const char *screen_chroma_c() const { return value(WINOPTION_CHROMA_C); } + const char *screen_chroma_conversion_gain() const { return value(WINOPTION_CHROMA_CONVERSION_GAIN); } + const char *screen_chroma_y_gain() const { return value(WINOPTION_CHROMA_Y_GAIN); } + const char *screen_lut_texture() const { return value(WINOPTION_LUT_TEXTURE); } + bool screen_lut_enable() const { return bool_value(WINOPTION_LUT_ENABLE); } + const char *ui_lut_texture() const { return value(WINOPTION_UI_LUT_TEXTURE); } + bool ui_lut_enable() const { return bool_value(WINOPTION_UI_LUT_ENABLE); } // full screen options bool triple_buffer() const { return bool_value(WINOPTION_TRIPLEBUFFER); } diff --git a/src/tools/unidasm.cpp b/src/tools/unidasm.cpp index 837f50e3e75..51ceeb71e5d 100644 --- a/src/tools/unidasm.cpp +++ b/src/tools/unidasm.cpp @@ -349,8 +349,9 @@ static const dasm_table_entry dasm_table[] = { "hd6309", be, 0, []() -> util::disasm_interface * { return new hd6309_disassembler; } }, { "hd63701", be, 0, []() -> util::disasm_interface * { return new m680x_disassembler(63701); } }, { "hmcs40", le, -1, []() -> util::disasm_interface * { return new hmcs40_disassembler; } }, - { "hp_hybrid", be, -1, []() -> util::disasm_interface * { return new hp_hybrid_disassembler; } }, { "hp_5061_3001", be, -1, []() -> util::disasm_interface * { return new hp_5061_3001_disassembler; } }, + { "hp_5061_3011", be, -1, []() -> util::disasm_interface * { return new hp_5061_3011_disassembler; } }, + { "hp_09825_67907", be, -1, []() -> util::disasm_interface * { return new hp_09825_67907_disassembler; } }, { "hyperstone", be, 0, []() -> util::disasm_interface * { return new hyperstone_disassembler(&hyperstone_unidasm); } }, { "i4004", le, 0, []() -> util::disasm_interface * { return new i4004_disassembler; } }, { "i4040", le, 0, []() -> util::disasm_interface * { return new i4040_disassembler; } }, @@ -369,7 +370,7 @@ static const dasm_table_entry dasm_table[] = { "ie15", le, 0, []() -> util::disasm_interface * { return new ie15_disassembler; } }, { "jaguardsp", be, 0, []() -> util::disasm_interface * { return new jaguar_disassembler(jaguar_disassembler::variant::DSP); } }, { "jaguargpu", be, 0, []() -> util::disasm_interface * { return new jaguar_disassembler(jaguar_disassembler::variant::GPU); } }, - { "konami", le, 0, []() -> util::disasm_interface * { return new konami_disassembler; } }, + { "konami", be, 0, []() -> util::disasm_interface * { return new konami_disassembler; } }, { "lc8670", be, 0, []() -> util::disasm_interface * { return new lc8670_disassembler; } }, { "lh5801", le, 0, []() -> util::disasm_interface * { return new lh5801_disassembler; } }, { "lr35902", le, 0, []() -> util::disasm_interface * { return new lr35902_disassembler; } }, @@ -468,8 +469,8 @@ static const dasm_table_entry dasm_table[] = { "tms57002", le, -2, []() -> util::disasm_interface * { return new tms57002_disassembler; } }, { "tms7000", le, 0, []() -> util::disasm_interface * { return new tms7000_disassembler; } }, { "tms9900", be, 0, []() -> util::disasm_interface * { return new tms9900_disassembler(TMS9900_ID); } }, - { "tms9980", le, 0, []() -> util::disasm_interface * { return new tms9900_disassembler(TMS9980_ID); } }, - { "tms9995", le, 0, []() -> util::disasm_interface * { return new tms9900_disassembler(TMS9995_ID); } }, + { "tms9980", be, 0, []() -> util::disasm_interface * { return new tms9900_disassembler(TMS9980_ID); } }, + { "tms9995", be, 0, []() -> util::disasm_interface * { return new tms9900_disassembler(TMS9995_ID); } }, { "tp0320", be, 0, []() -> util::disasm_interface * { return new tp0320_disassembler; } }, { "tx0_64kw", be, -2, []() -> util::disasm_interface * { return new tx0_64kw_disassembler; } }, { "tx0_8kw", be, -2, []() -> util::disasm_interface * { return new tx0_8kw_disassembler; } }, |