diff options
Diffstat (limited to 'src')
27 files changed, 639 insertions, 392 deletions
diff --git a/src/lib/netlist/analog/nld_bjt.cpp b/src/lib/netlist/analog/nld_bjt.cpp index 897c242b3e8..0acd0887e74 100644 --- a/src/lib/netlist/analog/nld_bjt.cpp +++ b/src/lib/netlist/analog/nld_bjt.cpp @@ -11,7 +11,7 @@ namespace netlist { - namespace devices + namespace analog { class diode { @@ -82,9 +82,9 @@ NETLIB_UPDATE(QBJT_switch) NETLIB_UPDATE_PARAM(QBJT_switch) { - nl_double IS = m_model.model_value("IS"); - nl_double BF = m_model.model_value("BF"); - nl_double NF = m_model.model_value("NF"); + nl_double IS = m_model.m_IS; + nl_double BF = m_model.m_BF; + nl_double NF = m_model.m_NF; //nl_double VJE = m_model.dValue("VJE", 0.75); set_qtype((m_model.model_type() == "NPN") ? BJT_NPN : BJT_PNP); @@ -176,11 +176,11 @@ NETLIB_UPDATE_TERMINALS(QBJT_EB) NETLIB_UPDATE_PARAM(QBJT_EB) { - nl_double IS = m_model.model_value("IS"); - nl_double BF = m_model.model_value("BF"); - nl_double NF = m_model.model_value("NF"); - nl_double BR = m_model.model_value("BR"); - nl_double NR = m_model.model_value("NR"); + nl_double IS = m_model.m_IS; + nl_double BF = m_model.m_BF; + nl_double NF = m_model.m_NF; + nl_double BR = m_model.m_BR; + nl_double NR = m_model.m_NR; //nl_double VJE = m_model.dValue("VJE", 0.75); set_qtype((m_model.model_type() == "NPN") ? BJT_NPN : BJT_PNP); diff --git a/src/lib/netlist/analog/nld_bjt.h b/src/lib/netlist/analog/nld_bjt.h index 7d137249b21..a4e163b13bc 100644 --- a/src/lib/netlist/analog/nld_bjt.h +++ b/src/lib/netlist/analog/nld_bjt.h @@ -26,13 +26,84 @@ namespace netlist { - namespace devices + namespace analog { // ----------------------------------------------------------------------------- // nld_Q - Base classes // ----------------------------------------------------------------------------- -// Have a common start for transistors + /* FIXME: Make table pretty */ + + /*! Class representing the bjt model paramers. + * This is the model representation of the bjt model. Typically, SPICE uses + * the following parameters. A "Y" in the first column indicates that the + * parameter is actually used in netlist. + * + * |NL? |name |parameter |units|default| example|area | + * |:--:|:-----|:--------------------------------|:----|------:|-------:|:----:| + * | Y |IS |transport saturation current|A |1E-016|1E-015|* | + * | Y |BF |ideal maximum forward beta|- |100|100| | + * | Y |NF |forward current emission coefficient|- |1|1| | + * | |VAF |forward Early voltage|V |infinite |200| | + * | |IKF |corner for forward beta high current roll-off|A |infinite |0.01|* | + * | |ISE |B-E leakage saturation current|A |0|0.0000000000001|* | + * | |NE |B-E leakage emission coefficient|- |1.5|2| | + * | Y |BR |ideal maximum reverse beta |- |1|0.1| | + * | Y |NR |reverse current emission coefficient|- |1|1| | + * | |VAR |reverse Early voltage|V |infinite |200| | + * | |IKR |corner for reverse beta high current roll-off|A |infinite |0.01|* | + * | |ISC |leakage saturation current|A |0|8| | + * | |NC |leakage emission coefficient|- |2|1.5| | + * | |RB |zero bias base resistance| |0|100|* | + * | |IRB |current where base resistance falls halfway to its min value|A |infinte |0.1|* | + * | |RBM |minimum base resistance at high currents| |RB |10|* | + * | |RE |emitter resistance| |0|1|* | + * | |RC |collector resistance | |0|10|* | + * | |CJE |B-E zero-bias depletion capacitance|F |0|2pF |* | + * | |VJE |B-E built-in potential|V |0.75|0.6| | + * | |MJE |B-E junction exponential factor |- |0.33|0.33| | + * | |TF |ideal forward transit time |sec |0|0.1ns | | + * | |XTF|coefficient for bias dependence of TF |- |0| | | + * | |VTF |voltage describing VBC dependence of TF |V |infinite | | | + * | |ITF |high-current parameter for effect on TF |A |0| |* | + * | |PTF |excess phase at freq=1.0/(TF*2PI) Hz |deg |0| | | + * | |CJC |B-C zero-bias depletion capacitance |F |0|2pF |* | + * | |VJC |B-C built-in potential |V |0.75|0.5| | + * | |MJC |B-C junction exponential factor |- |0.33|0.5| | + * | |XCJC |fraction of B-C depletion capacitance connected to internal base node |- |1| | | + * | |TR |ideal reverse transit time |sec |0|10ns | | + * | |CJS |zero-bias collector-substrate capacitance |F |0|2pF |* | + * | |VJS |substrate junction built-in potential |V |0.75| | | + * | |MJS |substrate junction exponential factor |- |0|0.5| | + * | |XTB |forward and reverse beta temperature exponent |- |0| | | + * | |EG|energy gap for temperature effect on IS |eV |1.11| | | + * | |XTI|temperature exponent for effect on IS |- |3| | | + * | |KF |flicker-noise coefficient |- |0| | | + * | |AF |flicker-noise exponent |- |1| | | + * | |FC |coefficient for forward-bias depletion capacitance formula |- |0.5| | | + * | |TNOM |Parameter measurement temperature |C |27|50| | + */ + + class bjt_model_t : public param_model_t + { + public: + bjt_model_t(device_t &device, const pstring name, const pstring val) + : param_model_t(device, name, val) + , m_IS(*this, "IS") + , m_BF(*this, "BF") + , m_NF(*this, "NF") + , m_BR(*this, "BR") + , m_NR(*this, "NR") + {} + + value_t m_IS; //!< transport saturation current + value_t m_BF; //!< ideal maximum forward beta + value_t m_NF; //!< forward current emission coefficient + value_t m_BR; //!< ideal maximum reverse beta + value_t m_NR; //!< reverse current emission coefficient + }; + + // Have a common start for transistors NETLIB_OBJECT(Q) { @@ -58,7 +129,7 @@ public: inline void set_qtype(q_type atype) { m_qtype = atype; } protected: - param_model_t m_model; + bjt_model_t m_model; private: q_type m_qtype; }; diff --git a/src/lib/netlist/analog/nld_fourterm.cpp b/src/lib/netlist/analog/nld_fourterm.cpp index 31ea09339cf..3707b2a74c4 100644 --- a/src/lib/netlist/analog/nld_fourterm.cpp +++ b/src/lib/netlist/analog/nld_fourterm.cpp @@ -11,7 +11,7 @@ namespace netlist { - namespace devices + namespace analog { // ---------------------------------------------------------------------------------------- // nld_VCCS diff --git a/src/lib/netlist/analog/nld_fourterm.h b/src/lib/netlist/analog/nld_fourterm.h index e1170eb010d..0e4bcc03429 100644 --- a/src/lib/netlist/analog/nld_fourterm.h +++ b/src/lib/netlist/analog/nld_fourterm.h @@ -30,7 +30,7 @@ namespace netlist { - namespace devices + namespace analog { // ---------------------------------------------------------------------------------------- // nld_VCCS diff --git a/src/lib/netlist/analog/nld_opamps.cpp b/src/lib/netlist/analog/nld_opamps.cpp index b081f922696..e777ffb791c 100644 --- a/src/lib/netlist/analog/nld_opamps.cpp +++ b/src/lib/netlist/analog/nld_opamps.cpp @@ -11,96 +11,175 @@ namespace netlist { - namespace devices + namespace analog { -/* - * Type = 0: Impedance changer - * 1; Idealized opamp - * 2; opamp with first pole - * 3: opamp with first pole + output limit - * 4: opamp with input stage, first pole + output limit - * - * Type 1 parameters: - * FPF = frequency of first pole in Hz (ony used for open-loop gain) - * UGF = unity gain frequency in Hz (only used for open-loop gain) - * RI = input resistance in Ohms - * RO = output resistance in Ohms - * - * Type 3 parameters: - * VLH = high supply rail minus high output swing in V - * VLL = low output swing minus low supply rail in V - * FPF = frequency of first pole in Hz - * UGF = unity gain frequency (transition frequency) in Hz - * SLEW = unity gain slew rate in V/s - * RI = input resistance in Ohms - * RO = output resistance in Ohms - * DAB = Differential Amp Bias ~ op amp's total quiescent current. - * - * .model abc OPAMP(VLH=2.0 VLL=0.2 FPF=5 UGF=10k SLEW=0.6u RI=1000k RO=50 DAB=0.002) - * - * http://www.ecircuitcenter.com/Circuits/opmodel1/opmodel1.htm - * - * */ + /* + * Type = 0: Impedance changer + * 1; Idealized opamp + * 2; opamp with first pole + * 3: opamp with first pole + output limit + * 4: opamp with input stage, first pole + output limit + * + * Type 1 parameters: + * FPF = frequency of first pole in Hz (ony used for open-loop gain) + * UGF = unity gain frequency in Hz (only used for open-loop gain) + * RI = input resistance in Ohms + * RO = output resistance in Ohms + * + * Type 3 parameters: + * VLH = high supply rail minus high output swing in V + * VLL = low output swing minus low supply rail in V + * FPF = frequency of first pole in Hz + * UGF = unity gain frequency (transition frequency) in Hz + * SLEW = unity gain slew rate in V/s + * RI = input resistance in Ohms + * RO = output resistance in Ohms + * DAB = Differential Amp Bias ~ op amp's total quiescent current. + * + * .model abc OPAMP(VLH=2.0 VLL=0.2 FPF=5 UGF=10k SLEW=0.6u RI=1000k RO=50 DAB=0.002) + * + * http://www.ecircuitcenter.com/Circuits/opmodel1/opmodel1.htm + * + * */ -NETLIB_UPDATE(OPAMP) -{ - const double cVt = 0.0258 * 1.0; // * m_n; - const double cId = m_model.model_value("DAB"); // 3 mA - const double cVd = cVt * std::log(cId / 1e-15 + 1.0); - m_VH.push(m_VCC() - m_model.model_value("VLH") - cVd); - m_VL.push(m_GND() + m_model.model_value("VLL") + cVd); - m_VREF.push((m_VCC() + m_GND()) / 2.0); -} - -NETLIB_RESET(OPAMP) -{ - m_G1.do_reset(); - m_G1.m_RI.setTo(m_model.model_value("RI")); - if (m_type == 1) + NETLIB_OBJECT(opamp) + { + NETLIB_CONSTRUCTOR(opamp) + , m_RP(*this, "RP1") + , m_G1(*this, "G1") + , m_VCC(*this, "VCC") + , m_GND(*this, "GND") + , m_model(*this, "MODEL", "LM324") + , m_VH(*this, "VH") + , m_VL(*this, "VL") + , m_VREF(*this, "VREF") + { + m_type = static_cast<int>(m_model.m_TYPE); + + if (m_type == 1) + { + register_subalias("PLUS", "G1.IP"); + register_subalias("MINUS", "G1.IN"); + register_subalias("OUT", "G1.OP"); + + connect("G1.ON", "VREF"); + connect("RP1.2", "VREF"); + connect("RP1.1", "G1.OP"); + + } + else if (m_type == 3) + { + register_sub("CP1", m_CP); + register_sub("EBUF", m_EBUF); + register_sub("DN", m_DN, "D(IS=1e-15 N=1)"); + register_sub("DP", m_DP, "D(IS=1e-15 N=1)"); + + //m_DP->m_model.setTo("D(IS=1e-15 N=1)"); + //m_DN->m_model.setTo("D(IS=1e-15 N=1)"); + + register_subalias("PLUS", "G1.IP"); + register_subalias("MINUS", "G1.IN"); + register_subalias("OUT", "EBUF.OP"); + + connect("EBUF.ON", "VREF"); + + connect("G1.ON", "VREF"); + connect("RP1.2", "VREF"); + connect("CP1.2", "VREF"); + connect("EBUF.IN", "VREF"); + + connect("RP1.1", "G1.OP"); + connect("CP1.1", "RP1.1"); + + connect("DP.K", "VH"); + connect("VL", "DN.A"); + connect("DP.A", "DN.K"); + connect("DN.K", "RP1.1"); + connect("EBUF.IP", "RP1.1"); + } + else + netlist().log().fatal("Unknown opamp type: {1}", m_type); + + } + + NETLIB_UPDATEI(); + NETLIB_RESETI(); + NETLIB_UPDATE_PARAMI() + { + } + + private: + + analog::NETLIB_SUB(R_base) m_RP; + analog::NETLIB_SUB(VCCS) m_G1; + NETLIB_SUBXX(analog, C) m_CP; + NETLIB_SUBXX(analog, VCVS) m_EBUF; + NETLIB_SUBXX(analog, D) m_DP; + NETLIB_SUBXX(analog, D) m_DN; + + analog_input_t m_VCC; + analog_input_t m_GND; + + opamp_model_t m_model; + analog_output_t m_VH; + analog_output_t m_VL; + analog_output_t m_VREF; + + /* state */ + int m_type; + }; + + NETLIB_UPDATE(opamp) { - double RO = m_model.model_value("RO"); - double G = m_model.model_value("UGF") / m_model.model_value("FPF") / RO; - m_RP.set_R(RO); - m_G1.m_G.setTo(G); + const double cVt = 0.0258 * 1.0; // * m_n; + const double cId = m_model.m_DAB; // 3 mA + const double cVd = cVt * std::log(cId / 1e-15 + 1.0); + m_VH.push(m_VCC() - m_model.m_VLH - cVd); + m_VL.push(m_GND() + m_model.m_VLL + cVd); + m_VREF.push((m_VCC() + m_GND()) / 2.0); } - else if (m_type == 3) + + NETLIB_RESET(opamp) { - m_EBUF->do_reset(); - m_DP->do_reset(); - m_DN->do_reset(); - m_CP->do_reset(); - m_RP.do_reset(); + m_G1.do_reset(); + m_G1.m_RI.setTo(m_model.m_RI); + + if (m_type == 1) + { + double RO = m_model.m_RO; + double G = m_model.m_UGF / m_model.m_FPF / RO; + m_RP.set_R(RO); + m_G1.m_G.setTo(G); + } + else if (m_type == 3) + { + m_EBUF->do_reset(); + m_DP->do_reset(); + m_DN->do_reset(); + m_CP->do_reset(); + m_RP.do_reset(); - m_EBUF->m_G.setTo(1.0); - m_EBUF->m_RO.setTo(m_model.model_value("RO")); + m_EBUF->m_G.setTo(1.0); + m_EBUF->m_RO.setTo(m_model.m_RO); - double CP = m_model.model_value("DAB") / m_model.model_value("SLEW"); - double RP = 0.5 / 3.1459 / CP / m_model.model_value("FPF"); - double G = m_model.model_value("UGF") / m_model.model_value("FPF") / RP; + double CP = m_model.m_DAB / m_model.m_SLEW; + double RP = 0.5 / 3.1459 / CP / m_model.m_FPF; + double G = m_model.m_UGF / m_model.m_FPF / RP; - //printf("Min Freq %s: %f\n", name().c_str(), 1.0 / (CP*RP / (G*RP))); + //printf("Min Freq %s: %f\n", name().c_str(), 1.0 / (CP*RP / (G*RP))); - m_CP->m_C.setTo(CP); - m_RP.set_R(RP); - m_G1.m_G.setTo(G); + m_CP->m_C.setTo(CP); + m_RP.set_R(RP); + m_G1.m_G.setTo(G); + } } -} -/* -NETLIB_DEVICE_WITH_PARAMS(OPAMPx, - NETLIB_NAME(R) m_RP; - NETLIB_NAME(C) m_CP; - NETLIB_NAME(VCCS) m_G1; - NETLIB_NAME(VCVS) m_EBUF; - - param_model_t m_model; - analog_input_t m_VH; - analog_input_t m_VL; - analog_input_t m_VREF; -); -*/ - - } //namespace devices + + } //namespace analog + + namespace devices { + NETLIB_DEVICE_IMPL_NS(analog, opamp) + } } // namespace netlist diff --git a/src/lib/netlist/analog/nld_opamps.h b/src/lib/netlist/analog/nld_opamps.h index f02a64a2347..b407bb2215e 100644 --- a/src/lib/netlist/analog/nld_opamps.h +++ b/src/lib/netlist/analog/nld_opamps.h @@ -29,96 +29,66 @@ namespace netlist { - namespace devices + namespace analog { -NETLIB_OBJECT(OPAMP) -{ - NETLIB_CONSTRUCTOR(OPAMP) - , m_RP(*this, "RP1") - , m_G1(*this, "G1") - , m_VCC(*this, "VCC") - , m_GND(*this, "GND") - , m_model(*this, "MODEL", "LM324") - , m_VH(*this, "VH") - , m_VL(*this, "VL") - , m_VREF(*this, "VREF") - { - m_type = static_cast<int>(m_model.model_value("TYPE")); - - if (m_type == 1) - { - register_subalias("PLUS", "G1.IP"); - register_subalias("MINUS", "G1.IN"); - register_subalias("OUT", "G1.OP"); - - connect("G1.ON", "VREF"); - connect("RP1.2", "VREF"); - connect("RP1.1", "G1.OP"); - - } - else if (m_type == 3) - { - register_sub("CP1", m_CP); - register_sub("EBUF", m_EBUF); - register_sub("DN", m_DN); - register_sub("DP", m_DP); - - m_DP->m_model.setTo("D(IS=1e-15 N=1)"); - m_DN->m_model.setTo("D(IS=1e-15 N=1)"); - - register_subalias("PLUS", "G1.IP"); - register_subalias("MINUS", "G1.IN"); - register_subalias("OUT", "EBUF.OP"); - - connect("EBUF.ON", "VREF"); - - connect("G1.ON", "VREF"); - connect("RP1.2", "VREF"); - connect("CP1.2", "VREF"); - connect("EBUF.IN", "VREF"); - connect("RP1.1", "G1.OP"); - connect("CP1.1", "RP1.1"); - - connect("DP.K", "VH"); - connect("VL", "DN.A"); - connect("DP.A", "DN.K"); - connect("DN.K", "RP1.1"); - connect("EBUF.IP", "RP1.1"); - } - else - netlist().log().fatal("Unknown opamp type: {1}", m_type); - - } - - NETLIB_UPDATEI(); - NETLIB_RESETI(); - NETLIB_UPDATE_PARAMI() + /*! Class representing the opamp model parameters. + * The opamp model was designed based on designs from + * http://www.ecircuitcenter.com/Circuits/opmodel1/opmodel1.htm. + * Currently 2 different types are supported: Type 1 and Type 3. Type 1 + * is less complex and should run faster than Type 3. + * + * This is an extension to the traditional SPICE approach which + * assumes that you will be using an manufacturer model. These models may + * have copyrights incompatible with the netlist license. Thus they may not + * be suitable for certain implementations of netlist. + * + * For the typical use cases in low frequency (< 100 KHz) applications at + * which netlist is targeted, this model is certainly suitable. All parameters + * can be determined from a typical opamp datasheet. + * + * |Type|name |parameter |units|default| example| + * |:--:|:-----|:----------------------------------------------|:----|------:|-------:| + * | 3 |TYPE |Model Type, 1 and 3 are supported | | | | + * |1,3 |FPF |frequency of first pole |Hz | |100 | + * | 3 |SLEW |unity gain slew rate |V/s | | 1| + * |1,3 |RI |input resistance |Ohm | |1M | + * |1,3 |RO |output resistance |Ohm | |50 | + * |1,3 |UGF |unity gain frequency (transition frequency) |Hz | |1000 | + * | 3 |VLL |low output swing minus low supply rail |V | |1.5 | + * | 3 |VLH |high supply rail minus high output swing |V | |1.5 | + * | 3 |DAB |Differential Amp Bias - total quiescent current|A | |0.001 | + */ + + class opamp_model_t : public param_model_t { - } - -private: - - NETLIB_SUB(R_base) m_RP; - NETLIB_SUB(VCCS) m_G1; - NETLIB_SUBXX(C) m_CP; - NETLIB_SUBXX(VCVS) m_EBUF; - NETLIB_SUBXX(D) m_DP; - NETLIB_SUBXX(D) m_DN; - - analog_input_t m_VCC; - analog_input_t m_GND; - - param_model_t m_model; - analog_output_t m_VH; - analog_output_t m_VL; - analog_output_t m_VREF; - - /* state */ - int m_type; -}; - - } //namespace devices + public: + opamp_model_t(device_t &device, const pstring name, const pstring val) + : param_model_t(device, name, val) + , m_TYPE(*this, "TYPE") + , m_FPF(*this, "FPF") + , m_SLEW(*this, "SLEW") + , m_RI(*this, "RI") + , m_RO(*this, "RO") + , m_UGF(*this, "UGF") + , m_VLL(*this, "VLL") + , m_VLH(*this, "VLH") + , m_DAB(*this, "DAB") + {} + + value_t m_TYPE; //!< Model Type, 1 and 3 are supported + value_t m_FPF; //!< frequency of first pole + value_t m_SLEW; //!< unity gain slew rate + value_t m_RI; //!< input resistance + value_t m_RO; //!< output resistance + value_t m_UGF; //!< unity gain frequency (transition frequency) + value_t m_VLL; //!< low output swing minus low supply rail + value_t m_VLH; //!< high supply rail minus high output swing + value_t m_DAB; //!< Differential Amp Bias - total quiescent current + }; + + + } //namespace analog } // namespace netlist #endif /* NLD_OPAMPS_H_ */ diff --git a/src/lib/netlist/analog/nld_switches.cpp b/src/lib/netlist/analog/nld_switches.cpp index 0bfc4b50512..92afa752e86 100644 --- a/src/lib/netlist/analog/nld_switches.cpp +++ b/src/lib/netlist/analog/nld_switches.cpp @@ -13,68 +13,115 @@ namespace netlist { - namespace devices + namespace analog { -// ---------------------------------------------------------------------------------------- -// SWITCH -// ---------------------------------------------------------------------------------------- + // ---------------------------------------------------------------------------------------- + // SWITCH + // ---------------------------------------------------------------------------------------- -NETLIB_RESET(switch1) -{ - m_R.set_R(R_OFF); -} + NETLIB_OBJECT(switch1) + { + NETLIB_CONSTRUCTOR(switch1) + , m_R(*this, "R") + , m_POS(*this, "POS", 0) + { + register_subalias("1", m_R.m_P); + register_subalias("2", m_R.m_N); + } -NETLIB_UPDATE(switch1) -{ - if (!m_POS()) + NETLIB_RESETI(); + NETLIB_UPDATEI(); + NETLIB_UPDATE_PARAMI(); + + analog::NETLIB_SUB(R_base) m_R; + param_logic_t m_POS; + }; + + + NETLIB_RESET(switch1) { m_R.set_R(R_OFF); } - else + + NETLIB_UPDATE(switch1) { - m_R.set_R(R_ON); - } + if (!m_POS()) + { + m_R.set_R(R_OFF); + } + else + { + m_R.set_R(R_ON); + } - m_R.update_dev(); -} + m_R.update_dev(); + } -NETLIB_UPDATE_PARAM(switch1) -{ - update(); -} + NETLIB_UPDATE_PARAM(switch1) + { + update(); + } // ---------------------------------------------------------------------------------------- // SWITCH2 // ---------------------------------------------------------------------------------------- + NETLIB_OBJECT(switch2) + { + NETLIB_CONSTRUCTOR(switch2) + , m_R1(*this, "R1") + , m_R2(*this, "R2") + , m_POS(*this, "POS", 0) + { + connect(m_R1.m_N, m_R2.m_N); -NETLIB_RESET(switch2) -{ - m_R1.set_R(R_ON); - m_R2.set_R(R_OFF); -} + register_subalias("1", m_R1.m_P); + register_subalias("2", m_R2.m_P); -NETLIB_UPDATE(switch2) -{ - if (!m_POS()) + register_subalias("Q", m_R1.m_N); + } + + NETLIB_RESETI(); + NETLIB_UPDATEI(); + NETLIB_UPDATE_PARAMI(); + + analog::NETLIB_SUB(R_base) m_R1; + analog::NETLIB_SUB(R_base) m_R2; + param_logic_t m_POS; + }; + + NETLIB_RESET(switch2) { m_R1.set_R(R_ON); m_R2.set_R(R_OFF); } - else + + NETLIB_UPDATE(switch2) { - m_R1.set_R(R_OFF); - m_R2.set_R(R_ON); + if (!m_POS()) + { + m_R1.set_R(R_ON); + m_R2.set_R(R_OFF); + } + else + { + m_R1.set_R(R_OFF); + m_R2.set_R(R_ON); + } + + m_R1.update_dev(); + m_R2.update_dev(); } - m_R1.update_dev(); - m_R2.update_dev(); -} + NETLIB_UPDATE_PARAM(switch2) + { + update(); + } -NETLIB_UPDATE_PARAM(switch2) -{ - update(); -} + } //namespace analog - } //namespace devices + namespace devices { + NETLIB_DEVICE_IMPL_NS(analog, switch1) + NETLIB_DEVICE_IMPL_NS(analog, switch2) + } } // namespace netlist diff --git a/src/lib/netlist/analog/nld_switches.h b/src/lib/netlist/analog/nld_switches.h index 11bf0242f4d..d91cf775377 100644 --- a/src/lib/netlist/analog/nld_switches.h +++ b/src/lib/netlist/analog/nld_switches.h @@ -23,57 +23,5 @@ #define SWITCH2(name) \ NET_REGISTER_DEV(SWITCH2, name) -// ---------------------------------------------------------------------------------------- -// Devices ... -// ---------------------------------------------------------------------------------------- - -namespace netlist -{ - namespace devices - { -NETLIB_OBJECT(switch1) -{ - NETLIB_CONSTRUCTOR(switch1) - , m_R(*this, "R") - , m_POS(*this, "POS", 0) - { - register_subalias("1", m_R.m_P); - register_subalias("2", m_R.m_N); - } - - NETLIB_RESETI(); - NETLIB_UPDATEI(); - NETLIB_UPDATE_PARAMI(); - - NETLIB_SUB(R_base) m_R; - param_logic_t m_POS; -}; - -NETLIB_OBJECT(switch2) -{ - NETLIB_CONSTRUCTOR(switch2) - , m_R1(*this, "R1") - , m_R2(*this, "R2") - , m_POS(*this, "POS", 0) - { - connect(m_R1.m_N, m_R2.m_N); - - register_subalias("1", m_R1.m_P); - register_subalias("2", m_R2.m_P); - - register_subalias("Q", m_R1.m_N); - } - - NETLIB_RESETI(); - NETLIB_UPDATEI(); - NETLIB_UPDATE_PARAMI(); - - NETLIB_SUB(R_base) m_R1; - NETLIB_SUB(R_base) m_R2; - param_logic_t m_POS; -}; - - } //namespace devices -} // namespace netlist #endif /* NLD_SWITCHES_H_ */ diff --git a/src/lib/netlist/analog/nld_twoterm.cpp b/src/lib/netlist/analog/nld_twoterm.cpp index 484c951eefe..a87e0c03f88 100644 --- a/src/lib/netlist/analog/nld_twoterm.cpp +++ b/src/lib/netlist/analog/nld_twoterm.cpp @@ -12,7 +12,7 @@ namespace netlist { - namespace devices + namespace analog { // ---------------------------------------------------------------------------------------- // generic_diode @@ -255,8 +255,8 @@ NETLIB_TIMESTEP(L) NETLIB_RESET(D) { - nl_double Is = m_model.model_value("IS"); - nl_double n = m_model.model_value("N"); + nl_double Is = m_model.m_IS; + nl_double n = m_model.m_N; m_D.set_param(Is, n, netlist().gmin()); set(m_D.G(), 0.0, m_D.Ieq()); @@ -264,8 +264,8 @@ NETLIB_RESET(D) NETLIB_UPDATE_PARAM(D) { - nl_double Is = m_model.model_value("IS"); - nl_double n = m_model.model_value("N"); + nl_double Is = m_model.m_IS; + nl_double n = m_model.m_N; m_D.set_param(Is, n, netlist().gmin()); } diff --git a/src/lib/netlist/analog/nld_twoterm.h b/src/lib/netlist/analog/nld_twoterm.h index 377de1aec50..06325679dff 100644 --- a/src/lib/netlist/analog/nld_twoterm.h +++ b/src/lib/netlist/analog/nld_twoterm.h @@ -101,7 +101,7 @@ namespace netlist { - namespace devices + namespace analog { // ----------------------------------------------------------------------------- // nld_twoterm @@ -358,6 +358,45 @@ private: nl_double m_Vcrit; }; +/*! Class representing the diode model paramers. + * This is the model representation of the diode model. Typically, SPICE uses + * the following parameters. A "Y" in the first column indicates that the + * parameter is actually used in netlist. + * + * |NL? |name |parameter |units|default| example|area | + * |:--:|:-----|:--------------------------------|:----|------:|-------:|:----:| + * | Y |IS |saturation current |A |1.0e-14| 1.0e-14| * | + * | |RS |ohmic resistanc |Ohm | 0| 10| * | + * | Y |N |emission coefficient |- | 1| 1| | + * | |TT |transit-time |sec | 0| 0.1ns| | + * | |CJO |zero-bias junction capacitance |F | 0| 2pF| * | + * | |VJ |junction potential |V | 1| 0.6| | + * | |M |grading coefficient |- | 0.5| 0.5| | + * | |EG |band-gap energy |eV | 1.11| 1.11 Si| | + * | |XTI |saturation-current temp.exp |- | 3|3.0 pn. 2.0 Schottky| | + * | |KF |flicker noise coefficient |- | 0| | | + * | |AF |flicker noise exponent |- | 1| | | + * | |FC |coefficient for forward-bias depletion capacitance formula|-|0.5|| | + * | |BV |reverse breakdown voltage |V |infinite| 40| | + * | |IBV |current at breakdown voltage |V | 0.001| | | + * | |TNOM |parameter measurement temperature|deg C| 27| 50| | + * + */ + +class diode_model_t : public param_model_t +{ +public: + diode_model_t(device_t &device, const pstring name, const pstring val) + : param_model_t(device, name, val) + , m_IS(*this, "IS") + , m_N(*this, "N") + {} + + value_t m_IS; //!< saturation current. + value_t m_N; //!< emission coefficient. +}; + + // ----------------------------------------------------------------------------- // nld_D // ----------------------------------------------------------------------------- @@ -373,11 +412,22 @@ public: register_subalias("K", m_N); } + template <class CLASS> + NETLIB_NAME(D)(CLASS &owner, const pstring name, const pstring model) + : NETLIB_NAME(twoterm)(owner, name) + , m_model(*this, "MODEL", model) + , m_D(*this, "m_D") + { + register_subalias("A", m_P); + register_subalias("K", m_N); + } + + NETLIB_IS_DYNAMIC() NETLIB_UPDATE_TERMINALSI(); - param_model_t m_model; + diode_model_t m_model; protected: NETLIB_RESETI(); diff --git a/src/lib/netlist/build/doxygen.conf b/src/lib/netlist/build/doxygen.conf index 9f0ff127793..adf69b30e54 100644 --- a/src/lib/netlist/build/doxygen.conf +++ b/src/lib/netlist/build/doxygen.conf @@ -771,7 +771,7 @@ WARN_LOGFILE = # spaces. See also FILE_PATTERNS and EXTENSION_MAPPING # Note: If this tag is empty the current directory is searched. -INPUT = ".." "../documentation" +INPUT = ".." "../analog" "../documentation" # This tag can be used to specify the character encoding of the source files # that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses diff --git a/src/lib/netlist/devices/net_lib.cpp b/src/lib/netlist/devices/net_lib.cpp index bbdf1b8f1b1..502f044ec76 100644 --- a/src/lib/netlist/devices/net_lib.cpp +++ b/src/lib/netlist/devices/net_lib.cpp @@ -24,6 +24,8 @@ namespace netlist { + using namespace netlist::analog; + namespace devices { static void initialize_factory(factory::list_t &factory) @@ -40,7 +42,7 @@ static void initialize_factory(factory::list_t &factory) ENTRY(LVCCS, LVCCS, "") ENTRY(VS, VS, "V") ENTRY(CS, CS, "I") - ENTRY(OPAMP, OPAMP, "MODEL") + ENTRYX(opamp, OPAMP, "MODEL") ENTRYX(dummy_input, DUMMY_INPUT, "") ENTRYX(frontier, FRONTIER_DEV, "+I,+G,+Q") // not intended to be used directly ENTRYX(function, AFUNC, "N,FUNC") // only for macro devices - NO FEEDBACK loops @@ -58,8 +60,8 @@ static void initialize_factory(factory::list_t &factory) ENTRYX(netlistparams, PARAMETER, "") ENTRY(solver, SOLVER, "FREQ") ENTRYX(res_sw, RES_SWITCH, "+IN,+P1,+P2") - ENTRY(switch1, SWITCH, "") - ENTRY(switch2, SWITCH2, "") + ENTRYX(switch1, SWITCH, "") + ENTRYX(switch2, SWITCH2, "") ENTRYX(nicRSFF, NETDEV_RSFF, "+S,+R") ENTRYX(nicDelay, NETDEV_DELAY, "") ENTRYX(2716, EPROM_2716, "+GQ,+EPQ,+A0,+A1,+A2,+A3,+A4,+A5,+A6,+A7,+A8,+A9,+A10") diff --git a/src/lib/netlist/devices/nld_4066.cpp b/src/lib/netlist/devices/nld_4066.cpp index 2936c692786..f33688b73b7 100644 --- a/src/lib/netlist/devices/nld_4066.cpp +++ b/src/lib/netlist/devices/nld_4066.cpp @@ -28,11 +28,11 @@ namespace netlist NETLIB_UPDATEI(); public: - NETLIB_SUB(vdd_vss) m_supply; - NETLIB_SUB(R_base) m_R; + NETLIB_SUB(vdd_vss) m_supply; + analog::NETLIB_SUB(R_base) m_R; - analog_input_t m_control; - param_double_t m_base_r; + analog_input_t m_control; + param_double_t m_base_r; }; NETLIB_RESET(CD4066_GATE) diff --git a/src/lib/netlist/devices/nld_4316.cpp b/src/lib/netlist/devices/nld_4316.cpp index 467786de3d1..8b9cb0d46ad 100644 --- a/src/lib/netlist/devices/nld_4316.cpp +++ b/src/lib/netlist/devices/nld_4316.cpp @@ -27,11 +27,12 @@ namespace netlist { namespace devices { NETLIB_UPDATEI(); public: - NETLIB_SUB(vdd_vss) m_supply; - NETLIB_SUB(R_base) m_R; + NETLIB_SUB(vdd_vss) m_supply; + analog::NETLIB_SUB(R_base) m_R; - logic_input_t m_S, m_E; - param_double_t m_base_r; + logic_input_t m_S; + logic_input_t m_E; + param_double_t m_base_r; }; NETLIB_RESET(CD4316_GATE) diff --git a/src/lib/netlist/devices/nld_74ls629.cpp b/src/lib/netlist/devices/nld_74ls629.cpp index ee7ad9d4837..07eee6f5a57 100644 --- a/src/lib/netlist/devices/nld_74ls629.cpp +++ b/src/lib/netlist/devices/nld_74ls629.cpp @@ -108,8 +108,8 @@ namespace netlist public: NETLIB_SUB(SN74LS629clk) m_clock; - NETLIB_SUB(R_base) m_R_FC; - NETLIB_SUB(R_base) m_R_RNG; + analog::NETLIB_SUB(R_base) m_R_FC; + analog::NETLIB_SUB(R_base) m_R_RNG; logic_input_t m_ENQ; analog_input_t m_RNG; diff --git a/src/lib/netlist/devices/nld_mm5837.cpp b/src/lib/netlist/devices/nld_mm5837.cpp index 85dfdb010bb..7650538997b 100644 --- a/src/lib/netlist/devices/nld_mm5837.cpp +++ b/src/lib/netlist/devices/nld_mm5837.cpp @@ -47,7 +47,7 @@ namespace netlist NETLIB_UPDATE_PARAMI(); protected: - NETLIB_SUB(twoterm) m_RV; + analog::NETLIB_SUB(twoterm) m_RV; analog_input_t m_VDD; analog_input_t m_VGG; analog_input_t m_VSS; diff --git a/src/lib/netlist/devices/nld_ne555.cpp b/src/lib/netlist/devices/nld_ne555.cpp index 3db95e41161..3cfd120be30 100644 --- a/src/lib/netlist/devices/nld_ne555.cpp +++ b/src/lib/netlist/devices/nld_ne555.cpp @@ -44,10 +44,10 @@ namespace netlist NETLIB_RESETI(); protected: - NETLIB_SUB(R_base) m_R1; - NETLIB_SUB(R_base) m_R2; - NETLIB_SUB(R_base) m_R3; - NETLIB_SUB(R_base) m_RDIS; + analog::NETLIB_SUB(R_base) m_R1; + analog::NETLIB_SUB(R_base) m_R2; + analog::NETLIB_SUB(R_base) m_R3; + analog::NETLIB_SUB(R_base) m_RDIS; logic_input_t m_RESET; analog_input_t m_THRES; diff --git a/src/lib/netlist/devices/nld_r2r_dac.cpp b/src/lib/netlist/devices/nld_r2r_dac.cpp index fa5b89fff46..8a6d811f2d4 100644 --- a/src/lib/netlist/devices/nld_r2r_dac.cpp +++ b/src/lib/netlist/devices/nld_r2r_dac.cpp @@ -10,7 +10,7 @@ namespace netlist { - namespace devices + namespace analog { NETLIB_OBJECT_DERIVED(r2r_dac, twoterm) { @@ -45,8 +45,10 @@ namespace netlist this->set(1.0 / m_R(), V, 0.0); } + } //namespace analog - NETLIB_DEVICE_IMPL(r2r_dac) + namespace devices { + NETLIB_DEVICE_IMPL_NS(analog, r2r_dac) + } - } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nlid_proxy.h b/src/lib/netlist/devices/nlid_proxy.h index eced07f8356..77a8d52026c 100644 --- a/src/lib/netlist/devices/nlid_proxy.h +++ b/src/lib/netlist/devices/nlid_proxy.h @@ -124,7 +124,7 @@ namespace netlist private: analog_output_t m_GNDHack; // FIXME: Long term, we need to connect proxy gnd to device gnd - NETLIB_SUB(twoterm) m_RV; + analog::NETLIB_SUB(twoterm) m_RV; state_var<int> m_last_state; bool m_is_timestep; }; diff --git a/src/lib/netlist/devices/nlid_system.h b/src/lib/netlist/devices/nlid_system.h index c375f742e2c..8d2cd8162f8 100644 --- a/src/lib/netlist/devices/nlid_system.h +++ b/src/lib/netlist/devices/nlid_system.h @@ -286,9 +286,9 @@ namespace netlist } private: - NETLIB_NAME(twoterm) m_RIN; + analog::NETLIB_NAME(twoterm) m_RIN; /* Fixme: only works if the device is time-stepped - need to rework */ - NETLIB_NAME(twoterm) m_ROUT; + analog::NETLIB_NAME(twoterm) m_ROUT; analog_input_t m_I; analog_output_t m_Q; @@ -367,7 +367,7 @@ namespace netlist register_subalias("2", m_R.m_N); } - NETLIB_SUB(R_base) m_R; + analog::NETLIB_SUB(R_base) m_R; logic_input_t m_I; param_double_t m_RON; param_double_t m_ROFF; diff --git a/src/lib/netlist/nl_base.cpp b/src/lib/netlist/nl_base.cpp index fa6ac936ce3..80acf9847a3 100644 --- a/src/lib/netlist/nl_base.cpp +++ b/src/lib/netlist/nl_base.cpp @@ -1173,6 +1173,7 @@ param_ptr_t::~param_ptr_t() void param_model_t::changed() { + netlist().log().fatal("Models can not be changed at runtime"); m_map.clear(); } diff --git a/src/lib/netlist/nl_base.h b/src/lib/netlist/nl_base.h index da8cb14401b..171a81292ae 100644 --- a/src/lib/netlist/nl_base.h +++ b/src/lib/netlist/nl_base.h @@ -132,7 +132,7 @@ class NETLIB_NAME(name) : public device_t #define NETLIB_TIMESTEP(chip) void NETLIB_NAME(chip) :: timestep(const nl_double step) #define NETLIB_SUB(chip) nld_ ## chip -#define NETLIB_SUBXX(chip) std::unique_ptr< nld_ ## chip > +#define NETLIB_SUBXX(ns, chip) std::unique_ptr< ns :: nld_ ## chip > #define NETLIB_UPDATE(chip) void NETLIB_NAME(chip) :: update(void) NL_NOEXCEPT #define NETLIB_PARENT_UPDATE(chip) NETLIB_NAME(chip) :: update(); @@ -951,22 +951,40 @@ namespace netlist pstring m_param; }; - class param_model_t final : public param_str_t + class param_model_t : public param_str_t { public: + + class value_t + { + public: + value_t(param_model_t ¶m, const pstring name) + { + m_value = param.model_value(name); + } + double operator()() const { return m_value; } + operator double() const { return m_value; } + private: + double m_value; + }; + + friend class value_t; + param_model_t(device_t &device, const pstring name, const pstring val) : param_str_t(device, name, val) { } - /* these should be cached! */ - nl_double model_value(const pstring &entity); - const pstring model_value_str(const pstring &entity); - const pstring model_type(); + const pstring model_value_str(const pstring &entity) /*const*/; + const pstring model_type() /*const*/; protected: virtual void changed() override; + nl_double model_value(const pstring &entity) /*const*/; private: + /* hide this */ + void setTo(const pstring ¶m) = delete; model_map_t m_map; }; + class param_data_t : public param_str_t { public: @@ -1082,10 +1100,10 @@ namespace netlist setup_t &setup(); - template<class C> - void register_sub(const pstring &name, std::unique_ptr<C> &dev) + template<class C, typename... Args> + void register_sub(const pstring &name, std::unique_ptr<C> &dev, const Args&... args) { - dev.reset(new C(*this, name)); + dev.reset(new C(*this, name, args...)); } void register_subalias(const pstring &name, detail::core_terminal_t &term); diff --git a/src/lib/netlist/nl_factory.h b/src/lib/netlist/nl_factory.h index e1ea6727cce..9e2185e0729 100644 --- a/src/lib/netlist/nl_factory.h +++ b/src/lib/netlist/nl_factory.h @@ -18,6 +18,7 @@ #include "nl_base.h" #define NETLIB_DEVICE_IMPL(chip) factory::constructor_ptr_t decl_ ## chip = factory::constructor_t< NETLIB_NAME(chip) >; +#define NETLIB_DEVICE_IMPL_NS(ns, chip) factory::constructor_ptr_t decl_ ## chip = factory::constructor_t< ns :: NETLIB_NAME(chip) >; namespace netlist { namespace factory { diff --git a/src/lib/netlist/nl_setup.cpp b/src/lib/netlist/nl_setup.cpp index 8dcb28bea01..84aa7c8d384 100644 --- a/src/lib/netlist/nl_setup.cpp +++ b/src/lib/netlist/nl_setup.cpp @@ -754,7 +754,7 @@ void setup_t::resolve_inputs() log().verbose("looking for two terms connected to rail nets ..."); - for (auto & t : netlist().get_device_list<devices::NETLIB_NAME(twoterm)>()) + for (auto & t : netlist().get_device_list<analog::NETLIB_NAME(twoterm)>()) { if (t->m_N.net().isRailNet() && t->m_P.net().isRailNet()) { diff --git a/src/mame/drivers/atvtrack.cpp b/src/mame/drivers/atvtrack.cpp index 303a37db79c..914ea4ac667 100644 --- a/src/mame/drivers/atvtrack.cpp +++ b/src/mame/drivers/atvtrack.cpp @@ -85,7 +85,9 @@ write - enable slave CPU, gpu, etc most of bits is unclear SH4 XTAL is 33MHz, SH4 MD0-2 pins is 001 or 011 (CPU core clk = XTAL*6, preipheral clk = XTAL, bus clk is XTAL or XTAL*2) TODO: - currently ATV Track dies during texture data upload to GPU RAM, most likely due to some SH4 core bugs + devicify NAND + somehow hook PVR2 renderer here + add sound */ @@ -211,89 +213,76 @@ WRITE64_MEMBER(atvtrack_state::control_w) READ64_MEMBER(atvtrack_state::nand_data_r) { - uint32_t addr, dat; - int c; - - addr = 0; - dat = decode64_32(offset, 0, mem_mask, addr); - if (addr == 0) { - dat = 0; - for (c = 3;c >= 0;c--) { - if (m_nandcommand[c] <= 0x50) { - addr = m_nandaddress[c]+m_nandoffset[c]; - dat = (dat << 8) | m_nandregion->as_u8(addr+c); - m_nandoffset[c] += 4; - } else - dat = (dat << 8) | 0xc0; + u32 dat = 0; + for (int c = 3; c >= 0; c--) { + if (m_nandcommand[c] <= 0x50) { + u32 addr = m_nandaddress[c] + m_nandoffset[c]; + dat = (dat << 8) | m_nandregion->as_u8(addr + c); + m_nandoffset[c] += 4; } - return dat; - } else { - /* nothing */ + else + dat = (dat << 8) | 0xc0; } - return 0; + return dat; } WRITE64_MEMBER(atvtrack_state::nand_data_w) { - // not implemented + for (int c = 0; c < 4; c++) { + if (m_nandcommand[c] == 0x80) { + u8 *ptr = m_nandregion->base(); + u32 addr = m_nandaddress[c] + m_nandoffset[c] + c; + ptr[addr] &= data & 0xff; + m_nandoffset[c] += 4; + } + data >>= 8; + } } WRITE64_MEMBER(atvtrack_state::nand_cmd_w) { - uint32_t addr; //, dat; - int c; - - addr = 0; -// dat = decode64_32(offset, data, mem_mask, addr); - if (addr == 0) { - for (c = 0;c < 4;c++) { - m_nandcommand[c] = data & 0xff; - if (m_nandcommand[c] == 0x00) { - m_nandoffset[c] = 0; - } else if (m_nandcommand[c] == 0x01) { - m_nandoffset[c] = 256*4; - } else if (m_nandcommand[c] == 0x50) { - m_nandoffset[c] = 512*4; - } else if (m_nandcommand[c] == 0x90) { - } else if (m_nandcommand[c] == 0xff) { - } else if (m_nandcommand[c] == 0x80) { - } else if (m_nandcommand[c] == 0x60) { - } else if (m_nandcommand[c] == 0x70) { - } else if (m_nandcommand[c] == 0x10) { - } else if (m_nandcommand[c] == 0xd0) { - } else { - m_nandcommand[c] = 0xff; - } - data=data >> 8; + m_nandaddressstep = 0; + for (int c = 0;c < 4;c++) { + m_nandcommand[c] = data & 0xff; + if (m_nandcommand[c] == 0x00) { + m_nandoffset[c] = 0; + } else if (m_nandcommand[c] == 0x01) { + m_nandoffset[c] = 256*4; + } else if (m_nandcommand[c] == 0x50) { + m_nandoffset[c] = 512*4; + } else if (m_nandcommand[c] == 0x90) { + } else if (m_nandcommand[c] == 0xff) { + } else if (m_nandcommand[c] == 0x80) { + } else if (m_nandcommand[c] == 0x60) { + m_nandaddressstep = 1; + m_nandaddress[c] = 0; + } else if (m_nandcommand[c] == 0x70) { + } else if (m_nandcommand[c] == 0x10) { + } else if (m_nandcommand[c] == 0xd0) { + u8 *ptr = m_nandregion->base(); + u32 addr = m_nandaddress[c] + c; + for (int i = 0; i < 32 * 528; i++) + ptr[addr + i * 4] = 0xff; + } else { + m_nandcommand[c] = 0xff; } - m_nandaddressstep = 0; - } else { - /* nothing */ + data=data >> 8; } } WRITE64_MEMBER(atvtrack_state::nand_addr_w) { - uint32_t addr; //, dat; - int c; - - addr = 0; -// dat = decode64_32(offset, data, mem_mask, addr); - if (addr == 0) { - for (c = 0;c < 4;c++) { - if (m_nandaddressstep == 0) { - m_nandaddress[c] = (data & 0xff)*4; - } else if (m_nandaddressstep == 1) { - m_nandaddress[c] = m_nandaddress[c]+(data & 0xff)*0x840; - } else if (m_nandaddressstep == 2) { - m_nandaddress[c] = m_nandaddress[c]+(data & 0xff)*0x84000; - } - data = data >> 8; + for (int c = 0;c < 4;c++) { + if (m_nandaddressstep == 0) { + m_nandaddress[c] = (data & 0xff)*4; + } else if (m_nandaddressstep == 1) { + m_nandaddress[c] = m_nandaddress[c]+(data & 0xff)*0x840; + } else if (m_nandaddressstep == 2) { + m_nandaddress[c] = m_nandaddress[c]+(data & 0xff)*0x84000; } - m_nandaddressstep++; - } else { - /* nothing */ + data = data >> 8; } + m_nandaddressstep++; } void atvtrack_state::gpu_irq_test() @@ -329,7 +318,7 @@ WRITE32_MEMBER(atvtrack_state::gpu_w) switch (offset) { case 0x00/4: - // not really required, game code will go even if GPU CPU shows no sings of live + // not really required, game code will go even if GPU CPU shows no signs of live if (data) // internal CPU start ? m_subcpu->space(AS_PROGRAM).write_byte(0x18001350, 1); // simulate GPUs internal CPU reply to skip busy loop break; @@ -347,7 +336,7 @@ WRITE32_MEMBER(atvtrack_state::gpu_w) // GPU render happens here gpu_irq_set(7); } - // not really required, game code will go even if GPU CPU shows no sings of live + // not really required, game code will go even if GPU CPU shows no signs of live if (data == 0x8001) m_subcpu->space(AS_PROGRAM).write_byte(0x18814804, 1); // simulate GPUs internal CPU reply to skip busy loop break; @@ -387,7 +376,7 @@ WRITE64_MEMBER(atvtrack_state::ioport_w) // bit 0 O - unk (SD: FPGA config clock) // ADC and DAC is 4-channel SPI devices // Switch inputs is active low, *1 - game specific inputs - // All above IO multiplexig, ADC and DAC implemented in FPGA + // All above IO multiplexing, ADC and DAC implemented in FPGA #ifdef SPECIALMODE uint64_t d; diff --git a/src/mame/drivers/jollyjgr.cpp b/src/mame/drivers/jollyjgr.cpp index debd0ca52c0..cc2039a7fe6 100644 --- a/src/mame/drivers/jollyjgr.cpp +++ b/src/mame/drivers/jollyjgr.cpp @@ -2,8 +2,7 @@ // copyright-holders:Pierpaolo Prazzoli /* -Jolly Jogger -Taito, 1982 +Guru-Readme for Jolly Jogger (Taito, 1982) PCB Layout ---------- @@ -35,6 +34,14 @@ KDK00502 | |-| | VOL AY3-8910 3.579545MHz | |----------------------------------------------------------| +Notes: + AY3-8910 - Clock 1.7897725MHz [3.579545/2] + KD13.1F - 82S123 Bipolar PROM + TMM416 - Toshiba TMM416 16k x1-bit Page Mode DRAM + MB14241 - Fujitsu MB14241 Video Shifter + VSync - 59.1864Hz + HSync - 15.0835kHz + FGO70008 KDN00007 @@ -56,12 +63,19 @@ KDN00007 | | | | KD15.8B | | | | | -| KD14.8A | | +| 8216 8216 KD14.8A | | | | | | | | | |-| | | |----------------------------------------------------------| +Notes: + Z80 - Clock 3.000MHz [18/6] + D2125 - Intel D2125 1k x1-bit SRAM + 8216 - 4 Bit Parallel Bi-directional Bus Driver + 6116 - 2k x8-bit SRAM + KD* - 2732 EPROM + FGO70009 KDN00006 @@ -70,25 +84,29 @@ KDN00006 | |-| | | | | | | -| | | +| [E]| | | | | | | | | KD11.5H KD12.7H | | | |-| |1 | |8 | -|W | +|W [T] | |A | |Y |-| | | | | | | | | | -| KD09.1C KD10.2C | | +| KD09.1C KD10.2C 8216 8216 8216 8216 8216 8216 [F]| | | | | | | | | 2114 2114 2114 2114 2114 2114 |-| | | |----------------------------------------------------------| +Notes: + KD* - 2716 EPROM + 2114 - 1k x4-bit SRAM + 8216 - 4 Bit Parallel Bi-directional Bus Driver driver by Pierpaolo Prazzoli @@ -651,13 +669,13 @@ void jollyjgr_state::machine_reset() static MACHINE_CONFIG_START( jollyjgr, jollyjgr_state ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", Z80, 3579545) /* 3,579545 MHz */ + MCFG_CPU_ADD("maincpu", Z80, XTAL_18MHz/6) /* 3MHz verified */ MCFG_CPU_PROGRAM_MAP(jollyjgr_map) MCFG_CPU_VBLANK_INT_DRIVER("screen", jollyjgr_state, jollyjgr_interrupt) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(60) + MCFG_SCREEN_REFRESH_RATE(59.18) /* 59.1864Hz measured */ MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) MCFG_SCREEN_SIZE(256, 256) MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1) @@ -671,7 +689,7 @@ static MACHINE_CONFIG_START( jollyjgr, jollyjgr_state ) /* sound hardware */ MCFG_SPEAKER_STANDARD_MONO("mono") - MCFG_SOUND_ADD("aysnd", AY8910, 3579545) + MCFG_SOUND_ADD("aysnd", AY8910, XTAL_3_579545MHz/2) /* 1.7897725MHz verified */ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.45) MACHINE_CONFIG_END diff --git a/src/mame/drivers/pacman.cpp b/src/mame/drivers/pacman.cpp index e2a6cc74c12..99790e35523 100644 --- a/src/mame/drivers/pacman.cpp +++ b/src/mame/drivers/pacman.cpp @@ -6583,6 +6583,56 @@ ROM_START( woodpeca ) ROM_END +/* +Guru-Readme for Number Crash (Hanshin Goraku 1983) + +|----------------------------------------------------------------------| +| 74107 Z80A LS157 MB7052.4A LS158 | +| LS368 18.432MHz LS377 LS157 | +| LS16 LS367 DIP28A LS194 LS00 7475 93422 | +| LS367 LS194 LS273 LS20 | +| DSW(8) LS367 P1.7E NC-1.6E NC-9.5E LS157 7489 7461 LS161 | +|2 LS367 LS08 NC-2.6F NC-10.5F LS86 7489 LS283 LS283 | +|2 LS138 NC-3.6H NC-11.5H LS174 | +|W 4099 NC-12.5J LS245 LS158 LS86 | +|A LS02 NC-4.6K LS157 LS283| +|Y LS139 NC-5.6L LS139 AM27S03.2K LS174| +| LS42 2114 P2.3M AM27S03.2L P3.1M| +| LS367 NC-6.6M LS74 2114 LS74 | +| MB3713 LS08 2114 LS273 4066 | +| NC-7.6N 2114 LS10 LS02 | +| NC-8.6P DIP28B 2114 7416 | +| VOLUME LS367 2114 7416 7416 7416 | +|----------------------------------------------------------------------| +Notes: (All IC's shown) + Z80A - Clock input 3.072MHz [18.432/6] + 7489 - Texas Instruments 7489 64-bit Random Access Read-Write Memory + 2114 - 1k x 4-bit SRAM + AM27S03- AMD AM27S03 (74S189 / 3101 compatible) 64-bit (16word x 4-bit) Inverting-Output Bipolar RAM + 93422 - AMD 93422 256 x 4-bit TTL Bipolar RAM + NC-* - 2716 EPROM + P1 - Fujitsu MB7051 Bipolar PROM + P2/3 - Harris 7611 Bipolar PROM + MB7052 - Fujitsu MB7052 Bipolar PROM + DIP28A - Plug-in daughterboard containing logic + |----------| + | LS373 | + | LS245 | + |LS02 LS00| + |LS74 LS04| + |----------| + + DIP28B - Plug-in daughterboard containing logic + |----------------------------| + |LS257 LS253 LS253 LS253 LS00| + | | + |LS86 LS86 LS86 LS02 LS368 | + |----------------------------| + + VSync - 60.5721Hz + HSync - 15.3892kHz +*/ + ROM_START( numcrash ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "nc-1.6e", 0x0000, 0x0800, CRC(c85a79ba) SHA1(938b6b2920b14a4f0fbcd09fe25873bfd8ddc245) ) |