diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/emu/cpu/i86/i286.c | 174 | ||||
-rw-r--r-- | src/emu/cpu/i86/i286.h | 89 | ||||
-rw-r--r-- | src/emu/cpu/i86/instr86.c | 2 | ||||
-rw-r--r-- | src/mess/drivers/at.c | 75 | ||||
-rw-r--r-- | src/mess/mess.lst | 3 |
5 files changed, 181 insertions, 162 deletions
diff --git a/src/emu/cpu/i86/i286.c b/src/emu/cpu/i86/i286.c index 350c0ea6e2b..a46bc38b44e 100644 --- a/src/emu/cpu/i86/i286.c +++ b/src/emu/cpu/i86/i286.c @@ -64,7 +64,6 @@ struct i80286_state INT32 AuxVal, OverVal, SignVal, ZeroVal, CarryVal, DirVal; /* 0 or non-0 valued flags */ UINT8 ParityVal; UINT8 TF, IF; /* 0 or 1 valued flags */ - UINT8 int_vector; INT8 nmi_state; INT8 irq_state; INT8 test_state; @@ -154,9 +153,8 @@ static CPU_RESET( i80286 ) memset(&cpustate->regs, 0, sizeof(i80286basicregs)); cpustate->sregs[CS] = 0xf000; cpustate->base[CS] = 0xff0000; - /* temporary, until I have the right reset vector working */ cpustate->base[CS] = cpustate->sregs[CS] << 4; - cpustate->pc = 0xffff0; + cpustate->pc = 0xfffff0; cpustate->limit[CS]=cpustate->limit[SS]=cpustate->limit[DS]=cpustate->limit[ES]=0xffff; cpustate->sregs[DS]=cpustate->sregs[SS]=cpustate->sregs[ES]=0; cpustate->base[DS]=cpustate->base[SS]=cpustate->base[ES]=0; @@ -302,7 +300,6 @@ static CPU_INIT( i80286 ) device->save_item(NAME(cpustate->ParityVal)); device->save_item(NAME(cpustate->TF)); device->save_item(NAME(cpustate->IF)); - device->save_item(NAME(cpustate->int_vector)); device->save_item(NAME(cpustate->nmi_state)); device->save_item(NAME(cpustate->irq_state)); device->save_item(NAME(cpustate->extra_cycles)); @@ -346,7 +343,7 @@ static CPU_SET_INFO( i80286 ) case CPUINFO_INT_INPUT_STATE + INPUT_LINE_A20: i80286_set_a20_line(cpustate, info->i); break; case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + I80286_PC: + case CPUINFO_INT_REGISTER + I286_PC: if (PM) { /* protected mode NYI */ @@ -362,7 +359,7 @@ static CPU_SET_INFO( i80286 ) } break; - case CPUINFO_INT_REGISTER + I80286_IP: cpustate->pc = cpustate->base[CS] + info->i; break; + case CPUINFO_INT_REGISTER + I286_IP: cpustate->pc = cpustate->base[CS] + info->i; break; case CPUINFO_INT_SP: if (PM) { @@ -383,20 +380,19 @@ static CPU_SET_INFO( i80286 ) } break; - case CPUINFO_INT_REGISTER + I80286_SP: cpustate->regs.w[SP] = info->i; break; - case CPUINFO_INT_REGISTER + I80286_FLAGS: cpustate->flags = info->i; ExpandFlags(info->i); break; - case CPUINFO_INT_REGISTER + I80286_AX: cpustate->regs.w[AX] = info->i; break; - case CPUINFO_INT_REGISTER + I80286_CX: cpustate->regs.w[CX] = info->i; break; - case CPUINFO_INT_REGISTER + I80286_DX: cpustate->regs.w[DX] = info->i; break; - case CPUINFO_INT_REGISTER + I80286_BX: cpustate->regs.w[BX] = info->i; break; - case CPUINFO_INT_REGISTER + I80286_BP: cpustate->regs.w[BP] = info->i; break; - case CPUINFO_INT_REGISTER + I80286_SI: cpustate->regs.w[SI] = info->i; break; - case CPUINFO_INT_REGISTER + I80286_DI: cpustate->regs.w[DI] = info->i; break; - case CPUINFO_INT_REGISTER + I80286_ES: cpustate->sregs[ES] = info->i; cpustate->base[ES] = SegBase(ES); break; - case CPUINFO_INT_REGISTER + I80286_CS: cpustate->sregs[CS] = info->i; cpustate->base[CS] = SegBase(CS); break; - case CPUINFO_INT_REGISTER + I80286_SS: cpustate->sregs[SS] = info->i; cpustate->base[SS] = SegBase(SS); break; - case CPUINFO_INT_REGISTER + I80286_DS: cpustate->sregs[DS] = info->i; cpustate->base[DS] = SegBase(DS); break; - case CPUINFO_INT_REGISTER + I80286_VECTOR: cpustate->int_vector = info->i; break; + case CPUINFO_INT_REGISTER + I286_SP: cpustate->regs.w[SP] = info->i; break; + case CPUINFO_INT_REGISTER + I286_FLAGS: cpustate->flags = info->i; ExpandFlags(info->i); break; + case CPUINFO_INT_REGISTER + I286_AX: cpustate->regs.w[AX] = info->i; break; + case CPUINFO_INT_REGISTER + I286_CX: cpustate->regs.w[CX] = info->i; break; + case CPUINFO_INT_REGISTER + I286_DX: cpustate->regs.w[DX] = info->i; break; + case CPUINFO_INT_REGISTER + I286_BX: cpustate->regs.w[BX] = info->i; break; + case CPUINFO_INT_REGISTER + I286_BP: cpustate->regs.w[BP] = info->i; break; + case CPUINFO_INT_REGISTER + I286_SI: cpustate->regs.w[SI] = info->i; break; + case CPUINFO_INT_REGISTER + I286_DI: cpustate->regs.w[DI] = info->i; break; + case CPUINFO_INT_REGISTER + I286_ES: cpustate->sregs[ES] = info->i; cpustate->base[ES] = SegBase(ES); break; + case CPUINFO_INT_REGISTER + I286_CS: cpustate->sregs[CS] = info->i; cpustate->base[CS] = SegBase(CS); break; + case CPUINFO_INT_REGISTER + I286_SS: cpustate->sregs[SS] = info->i; cpustate->base[SS] = SegBase(SS); break; + case CPUINFO_INT_REGISTER + I286_DS: cpustate->sregs[DS] = info->i; cpustate->base[DS] = SegBase(DS); break; } } @@ -440,32 +436,43 @@ CPU_GET_INFO( i80286 ) case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->prevpc; break; case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + I80286_PC: info->i = cpustate->pc; break; - case CPUINFO_INT_REGISTER + I80286_IP: info->i = cpustate->pc - cpustate->base[CS]; break; + case CPUINFO_INT_REGISTER + I286_PC: info->i = cpustate->pc; break; + case CPUINFO_INT_REGISTER + I286_IP: info->i = cpustate->pc - cpustate->base[CS]; break; case CPUINFO_INT_SP: info->i = cpustate->base[SS] + cpustate->regs.w[SP]; break; - case CPUINFO_INT_REGISTER + I80286_SP: info->i = cpustate->regs.w[SP]; break; - case CPUINFO_INT_REGISTER + I80286_FLAGS: cpustate->flags = CompressFlags(); info->i = cpustate->flags; break; - case CPUINFO_INT_REGISTER + I80286_AX: info->i = cpustate->regs.w[AX]; break; - case CPUINFO_INT_REGISTER + I80286_CX: info->i = cpustate->regs.w[CX]; break; - case CPUINFO_INT_REGISTER + I80286_DX: info->i = cpustate->regs.w[DX]; break; - case CPUINFO_INT_REGISTER + I80286_BX: info->i = cpustate->regs.w[BX]; break; - case CPUINFO_INT_REGISTER + I80286_BP: info->i = cpustate->regs.w[BP]; break; - case CPUINFO_INT_REGISTER + I80286_SI: info->i = cpustate->regs.w[SI]; break; - case CPUINFO_INT_REGISTER + I80286_DI: info->i = cpustate->regs.w[DI]; break; - case CPUINFO_INT_REGISTER + I80286_ES: info->i = cpustate->sregs[ES]; break; - case CPUINFO_INT_REGISTER + I80286_CS: info->i = cpustate->sregs[CS]; break; - case CPUINFO_INT_REGISTER + I80286_SS: info->i = cpustate->sregs[SS]; break; - case CPUINFO_INT_REGISTER + I80286_DS: info->i = cpustate->sregs[DS]; break; - case CPUINFO_INT_REGISTER + I80286_VECTOR: info->i = cpustate->int_vector; break; - case CPUINFO_INT_REGISTER + I80286_MSW: info->i = cpustate->msw; break; - case CPUINFO_INT_REGISTER + I80286_GDTR_BASE: info->i = cpustate->gdtr.base; break; - case CPUINFO_INT_REGISTER + I80286_GDTR_LIMIT: info->i = cpustate->gdtr.limit; break; - case CPUINFO_INT_REGISTER + I80286_IDTR_BASE: info->i = cpustate->idtr.base; break; - case CPUINFO_INT_REGISTER + I80286_IDTR_LIMIT: info->i = cpustate->idtr.limit; break; - case CPUINFO_INT_REGISTER + I80286_LDTR_BASE: info->i = cpustate->ldtr.base; break; - case CPUINFO_INT_REGISTER + I80286_LDTR_LIMIT: info->i = cpustate->ldtr.limit; break; - case CPUINFO_INT_REGISTER + I80286_TR_BASE: info->i = cpustate->tr.base; break; - case CPUINFO_INT_REGISTER + I80286_TR_LIMIT: info->i = cpustate->tr.limit; break; + case CPUINFO_INT_REGISTER + I286_SP: info->i = cpustate->regs.w[SP]; break; + case CPUINFO_INT_REGISTER + I286_FLAGS: cpustate->flags = CompressFlags(); info->i = cpustate->flags; break; + case CPUINFO_INT_REGISTER + I286_AX: info->i = cpustate->regs.w[AX]; break; + case CPUINFO_INT_REGISTER + I286_CX: info->i = cpustate->regs.w[CX]; break; + case CPUINFO_INT_REGISTER + I286_DX: info->i = cpustate->regs.w[DX]; break; + case CPUINFO_INT_REGISTER + I286_BX: info->i = cpustate->regs.w[BX]; break; + case CPUINFO_INT_REGISTER + I286_BP: info->i = cpustate->regs.w[BP]; break; + case CPUINFO_INT_REGISTER + I286_SI: info->i = cpustate->regs.w[SI]; break; + case CPUINFO_INT_REGISTER + I286_DI: info->i = cpustate->regs.w[DI]; break; + case CPUINFO_INT_REGISTER + I286_CS: info->i = cpustate->sregs[CS]; break; + case CPUINFO_INT_REGISTER + I286_SS: info->i = cpustate->sregs[SS]; break; + case CPUINFO_INT_REGISTER + I286_DS: info->i = cpustate->sregs[DS]; break; + case CPUINFO_INT_REGISTER + I286_ES: info->i = cpustate->sregs[ES]; break; + case CPUINFO_INT_REGISTER + I286_CS_BASE: info->i = cpustate->base[CS]; break; + case CPUINFO_INT_REGISTER + I286_SS_BASE: info->i = cpustate->base[SS]; break; + case CPUINFO_INT_REGISTER + I286_DS_BASE: info->i = cpustate->base[DS]; break; + case CPUINFO_INT_REGISTER + I286_ES_BASE: info->i = cpustate->base[ES]; break; + case CPUINFO_INT_REGISTER + I286_CS_LIMIT: info->i = cpustate->limit[CS]; break; + case CPUINFO_INT_REGISTER + I286_SS_LIMIT: info->i = cpustate->limit[SS]; break; + case CPUINFO_INT_REGISTER + I286_DS_LIMIT: info->i = cpustate->limit[DS]; break; + case CPUINFO_INT_REGISTER + I286_ES_LIMIT: info->i = cpustate->limit[ES]; break; + case CPUINFO_INT_REGISTER + I286_CS_FLAGS: info->i = cpustate->rights[CS]; break; + case CPUINFO_INT_REGISTER + I286_SS_FLAGS: info->i = cpustate->rights[SS]; break; + case CPUINFO_INT_REGISTER + I286_DS_FLAGS: info->i = cpustate->rights[DS]; break; + case CPUINFO_INT_REGISTER + I286_ES_FLAGS: info->i = cpustate->rights[ES]; break; + case CPUINFO_INT_REGISTER + I286_MSW: info->i = cpustate->msw; break; + case CPUINFO_INT_REGISTER + I286_GDTR_BASE: info->i = cpustate->gdtr.base; break; + case CPUINFO_INT_REGISTER + I286_GDTR_LIMIT: info->i = cpustate->gdtr.limit; break; + case CPUINFO_INT_REGISTER + I286_IDTR_BASE: info->i = cpustate->idtr.base; break; + case CPUINFO_INT_REGISTER + I286_IDTR_LIMIT: info->i = cpustate->idtr.limit; break; + case CPUINFO_INT_REGISTER + I286_LDTR_BASE: info->i = cpustate->ldtr.base; break; + case CPUINFO_INT_REGISTER + I286_LDTR_LIMIT: info->i = cpustate->ldtr.limit; break; + case CPUINFO_INT_REGISTER + I286_TR_BASE: info->i = cpustate->tr.base; break; + case CPUINFO_INT_REGISTER + I286_TR_LIMIT: info->i = cpustate->tr.limit; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i80286); break; @@ -505,35 +512,54 @@ CPU_GET_INFO( i80286 ) cpustate->flags & 0x0001 ? 'C' : '.'); break; - case CPUINFO_STR_REGISTER + I80286_PC: sprintf(info->s, "PC:%06X", cpustate->pc); break; - case CPUINFO_STR_REGISTER + I80286_IP: sprintf(info->s, "IP: %04X", cpustate->pc - cpustate->base[CS]); break; - case CPUINFO_STR_REGISTER + I80286_SP: sprintf(info->s, "SP: %04X", cpustate->regs.w[SP]); break; - case CPUINFO_STR_REGISTER + I80286_FLAGS: sprintf(info->s, "F:%04X", cpustate->flags); break; - case CPUINFO_STR_REGISTER + I80286_AX: sprintf(info->s, "AX:%04X", cpustate->regs.w[AX]); break; - case CPUINFO_STR_REGISTER + I80286_CX: sprintf(info->s, "CX:%04X", cpustate->regs.w[CX]); break; - case CPUINFO_STR_REGISTER + I80286_DX: sprintf(info->s, "DX:%04X", cpustate->regs.w[DX]); break; - case CPUINFO_STR_REGISTER + I80286_BX: sprintf(info->s, "BX:%04X", cpustate->regs.w[BX]); break; - case CPUINFO_STR_REGISTER + I80286_BP: sprintf(info->s, "BP:%04X", cpustate->regs.w[BP]); break; - case CPUINFO_STR_REGISTER + I80286_SI: sprintf(info->s, "SI: %04X", cpustate->regs.w[SI]); break; - case CPUINFO_STR_REGISTER + I80286_DI: sprintf(info->s, "DI: %04X", cpustate->regs.w[DI]); break; - case CPUINFO_STR_REGISTER + I80286_CS: sprintf(info->s, "CS: %04X %02X", cpustate->sregs[CS], cpustate->rights[CS]); break; - case CPUINFO_STR_REGISTER + I80286_CS_2: sprintf(info->s, "CSDESC: %06X %04X", cpustate->base[CS], cpustate->limit[CS]); break; - case CPUINFO_STR_REGISTER + I80286_SS: sprintf(info->s, "SS: %04X %02X", cpustate->sregs[SS], cpustate->rights[SS]); break; - case CPUINFO_STR_REGISTER + I80286_SS_2: sprintf(info->s, "SSDESC: %06X %04X", cpustate->base[SS], cpustate->limit[SS]); break; - case CPUINFO_STR_REGISTER + I80286_DS: sprintf(info->s, "DS: %04X %02X", cpustate->sregs[DS], cpustate->rights[DS]); break; - case CPUINFO_STR_REGISTER + I80286_DS_2: sprintf(info->s, "DSDESC: %06X %04X", cpustate->base[DS], cpustate->limit[DS]); break; - case CPUINFO_STR_REGISTER + I80286_ES: sprintf(info->s, "ES: %04X %02X", cpustate->sregs[ES], cpustate->rights[ES]); break; - case CPUINFO_STR_REGISTER + I80286_ES_2: sprintf(info->s, "ESDESC: %06X %04X", cpustate->base[ES], cpustate->limit[ES]); break; - case CPUINFO_STR_REGISTER + I80286_VECTOR: sprintf(info->s, "V:%02X", cpustate->int_vector); break; - case CPUINFO_STR_REGISTER + I80286_MSW: sprintf(info->s, "MSW:%04X", cpustate->msw); break; - case CPUINFO_STR_REGISTER + I80286_TR_BASE: sprintf(info->s, "TRBASE: %06X", cpustate->tr.base); break; - case CPUINFO_STR_REGISTER + I80286_TR_LIMIT: sprintf(info->s, "TRLIM: %04X", cpustate->tr.limit); break; - case CPUINFO_STR_REGISTER + I80286_GDTR_BASE: sprintf(info->s, "GDTRBASE: %06X", cpustate->gdtr.base); break; - case CPUINFO_STR_REGISTER + I80286_GDTR_LIMIT: sprintf(info->s, "GDTRLIM: %04X", cpustate->gdtr.limit); break; - case CPUINFO_STR_REGISTER + I80286_LDTR_BASE: sprintf(info->s, "LDTR: %04X %02X", cpustate->ldtr.sel, cpustate->ldtr.rights); break; - case CPUINFO_STR_REGISTER + I80286_LDTR_LIMIT: sprintf(info->s, "LDTRDESC: %06X %04X", cpustate->ldtr.base, cpustate->ldtr.limit); break; - case CPUINFO_STR_REGISTER + I80286_IDTR_BASE: sprintf(info->s, "IDTRBASE: %06X", cpustate->idtr.base); break; - case CPUINFO_STR_REGISTER + I80286_IDTR_LIMIT: sprintf(info->s, "IDTRLIM: %04X", cpustate->idtr.limit); break; + case CPUINFO_STR_REGISTER + I286_PC: sprintf(info->s, "PC: %06X", cpustate->pc); break; + case CPUINFO_STR_REGISTER + I286_IP: sprintf(info->s, "IP: %04X", cpustate->pc - cpustate->base[CS]); break; + case CPUINFO_STR_REGISTER + I286_AL: sprintf(info->s, "~AL: %02X", cpustate->regs.b[AL]); break; + case CPUINFO_STR_REGISTER + I286_AH: sprintf(info->s, "~AH: %02X", cpustate->regs.b[AH]); break; + case CPUINFO_STR_REGISTER + I286_BL: sprintf(info->s, "~BL: %02X", cpustate->regs.b[BL]); break; + case CPUINFO_STR_REGISTER + I286_BH: sprintf(info->s, "~BH: %02X", cpustate->regs.b[BH]); break; + case CPUINFO_STR_REGISTER + I286_CL: sprintf(info->s, "~CL: %02X", cpustate->regs.b[CL]); break; + case CPUINFO_STR_REGISTER + I286_CH: sprintf(info->s, "~CH: %02X", cpustate->regs.b[CH]); break; + case CPUINFO_STR_REGISTER + I286_DL: sprintf(info->s, "~DL: %02X", cpustate->regs.b[DL]); break; + case CPUINFO_STR_REGISTER + I286_DH: sprintf(info->s, "~DH: %02X", cpustate->regs.b[DH]); break; + case CPUINFO_STR_REGISTER + I286_AX: sprintf(info->s, "AX: %04X", cpustate->regs.w[AX]); break; + case CPUINFO_STR_REGISTER + I286_BX: sprintf(info->s, "BX: %04X", cpustate->regs.w[BX]); break; + case CPUINFO_STR_REGISTER + I286_CX: sprintf(info->s, "CX: %04X", cpustate->regs.w[CX]); break; + case CPUINFO_STR_REGISTER + I286_DX: sprintf(info->s, "DX: %04X", cpustate->regs.w[DX]); break; + case CPUINFO_STR_REGISTER + I286_BP: sprintf(info->s, "BP: %04X", cpustate->regs.w[BP]); break; + case CPUINFO_STR_REGISTER + I286_SP: sprintf(info->s, "SP: %04X", cpustate->regs.w[SP]); break; + case CPUINFO_STR_REGISTER + I286_SI: sprintf(info->s, "SI: %04X", cpustate->regs.w[SI]); break; + case CPUINFO_STR_REGISTER + I286_DI: sprintf(info->s, "DI: %04X", cpustate->regs.w[DI]); break; + case CPUINFO_STR_REGISTER + I286_FLAGS: sprintf(info->s, "FLAGS: %04X", cpustate->flags); break; + case CPUINFO_STR_REGISTER + I286_CS: sprintf(info->s, "CS: %04X", cpustate->sregs[CS]); break; + case CPUINFO_STR_REGISTER + I286_CS_BASE: sprintf(info->s, "CSBASE: %06X", cpustate->base[CS]); break; + case CPUINFO_STR_REGISTER + I286_CS_LIMIT: sprintf(info->s, "CSLIMIT: %04X", cpustate->limit[CS]); break; + case CPUINFO_STR_REGISTER + I286_CS_FLAGS: sprintf(info->s, "CSFLAGS: %02X", cpustate->rights[CS]); break; + case CPUINFO_STR_REGISTER + I286_SS: sprintf(info->s, "SS: %04X", cpustate->sregs[SS]); break; + case CPUINFO_STR_REGISTER + I286_SS_BASE: sprintf(info->s, "SSBASE: %06X", cpustate->base[SS]); break; + case CPUINFO_STR_REGISTER + I286_SS_LIMIT: sprintf(info->s, "SSLIMIT: %04X", cpustate->limit[SS]); break; + case CPUINFO_STR_REGISTER + I286_SS_FLAGS: sprintf(info->s, "SSFLAGS: %02X", cpustate->rights[SS]); break; + case CPUINFO_STR_REGISTER + I286_DS: sprintf(info->s, "DS: %04X", cpustate->sregs[DS]); break; + case CPUINFO_STR_REGISTER + I286_DS_BASE: sprintf(info->s, "DSBASE: %06X", cpustate->base[DS]); break; + case CPUINFO_STR_REGISTER + I286_DS_LIMIT: sprintf(info->s, "DSLIMIT: %04X", cpustate->limit[DS]); break; + case CPUINFO_STR_REGISTER + I286_DS_FLAGS: sprintf(info->s, "DSFLAGS: %02X", cpustate->rights[DS]); break; + case CPUINFO_STR_REGISTER + I286_ES: sprintf(info->s, "ES: %04X", cpustate->sregs[ES]); break; + case CPUINFO_STR_REGISTER + I286_ES_BASE: sprintf(info->s, "ESBASE: %06X", cpustate->base[ES]); break; + case CPUINFO_STR_REGISTER + I286_ES_LIMIT: sprintf(info->s, "ESLIMIT: %04X", cpustate->limit[ES]); break; + case CPUINFO_STR_REGISTER + I286_ES_FLAGS: sprintf(info->s, "ESFLAGS: %02X", cpustate->rights[ES]); break; + case CPUINFO_STR_REGISTER + I286_GDTR_BASE: sprintf(info->s, "GDTRBASE: %06X", cpustate->gdtr.base); break; + case CPUINFO_STR_REGISTER + I286_GDTR_LIMIT: sprintf(info->s, "GDTRLIMIT: %04X", cpustate->gdtr.limit); break; + case CPUINFO_STR_REGISTER + I286_IDTR_BASE: sprintf(info->s, "IDTRBASE: %06X", cpustate->idtr.base); break; + case CPUINFO_STR_REGISTER + I286_IDTR_LIMIT: sprintf(info->s, "IDTRLIMIT: %04X", cpustate->idtr.limit); break; + case CPUINFO_STR_REGISTER + I286_LDTR: sprintf(info->s, "LDTR: %04X", cpustate->ldtr.sel); break; + case CPUINFO_STR_REGISTER + I286_LDTR_BASE: sprintf(info->s, "LDTRBASE: %06X", cpustate->ldtr.base); break; + case CPUINFO_STR_REGISTER + I286_LDTR_LIMIT: sprintf(info->s, "LDTRLIMIT: %04X", cpustate->ldtr.limit); break; + case CPUINFO_STR_REGISTER + I286_LDTR_FLAGS: sprintf(info->s, "LDTRFLAGS: %02X", cpustate->ldtr.rights); break; + case CPUINFO_STR_REGISTER + I286_TR: sprintf(info->s, "TR: %04X", cpustate->tr.sel); break; + case CPUINFO_STR_REGISTER + I286_TR_BASE: sprintf(info->s, "TRBASE: %06X", cpustate->tr.base); break; + case CPUINFO_STR_REGISTER + I286_TR_LIMIT: sprintf(info->s, "TRLIMIT: %04X", cpustate->tr.limit); break; + case CPUINFO_STR_REGISTER + I286_TR_FLAGS: sprintf(info->s, "TRFLAGS: %02X", cpustate->tr.rights); break; + case CPUINFO_STR_REGISTER + I286_MSW: sprintf(info->s, "MSW: %04X", cpustate->msw); break; } } diff --git a/src/emu/cpu/i86/i286.h b/src/emu/cpu/i86/i286.h index d46cf46eb8b..3e6d2b6e1ee 100644 --- a/src/emu/cpu/i86/i286.h +++ b/src/emu/cpu/i86/i286.h @@ -8,38 +8,63 @@ enum { - I80286_PC=0, - I80286_IP, - I80286_AX, - I80286_CX, - I80286_DX, - I80286_BX, - I80286_SP, - I80286_BP, - I80286_SI, - I80286_DI, - I80286_FLAGS, - I80286_ES, - I80286_CS, - I80286_SS, - I80286_DS, - I80286_ES_2, - I80286_CS_2, - I80286_SS_2, - I80286_DS_2, - I80286_MSW, - I80286_GDTR_BASE, - I80286_IDTR_BASE, - I80286_LDTR_BASE, - I80286_TR_BASE, - I80286_GDTR_LIMIT, - I80286_IDTR_LIMIT, - I80286_LDTR_LIMIT, - I80286_TR_LIMIT, - I80286_VECTOR, - I80286_PENDING, - I80286_NMI_STATE, - I80286_IRQ_STATE + I286_PC = 0, + + /* 8-bit registers */ + I286_AL, + I286_AH, + I286_BL, + I286_BH, + I286_CL, + I286_CH, + I286_DL, + I286_DH, + + /* 16-bit registers */ + I286_AX, + I286_BX, + I286_CX, + I286_DX, + I286_BP, + I286_SP, + I286_SI, + I286_DI, + I286_IP, + + /* segment registers */ + I286_CS, + I286_CS_BASE, + I286_CS_LIMIT, + I286_CS_FLAGS, + I286_SS, + I286_SS_BASE, + I286_SS_LIMIT, + I286_SS_FLAGS, + I286_DS, + I286_DS_BASE, + I286_DS_LIMIT, + I286_DS_FLAGS, + I286_ES, + I286_ES_BASE, + I286_ES_LIMIT, + I286_ES_FLAGS, + + /* other */ + I286_FLAGS, + I286_MSW, + + I286_GDTR_BASE, + I286_GDTR_LIMIT, + I286_IDTR_BASE, + I286_IDTR_LIMIT, + I286_TR, + I286_TR_BASE, + I286_TR_LIMIT, + I286_TR_FLAGS, + I286_LDTR, + I286_LDTR_BASE, + I286_LDTR_LIMIT, + I286_LDTR_FLAGS, }; #define TRAP(fault, code) (UINT32)(((fault&0xffff)<<16)|(code&0xffff)) diff --git a/src/emu/cpu/i86/instr86.c b/src/emu/cpu/i86/instr86.c index 2c007ff3fa9..de34b277af6 100644 --- a/src/emu/cpu/i86/instr86.c +++ b/src/emu/cpu/i86/instr86.c @@ -3271,12 +3271,12 @@ static void PREFIX86(_ffpre)(i8086_state *cpustate) /* Opcode 0xff */ static void PREFIX86(_invalid)(i8086_state *cpustate) { + logerror("illegal instruction %.2x at %.5x\n",PEEKBYTE(cpustate->pc-1), cpustate->pc); #ifdef I80286 throw TRAP(ILLEGAL_INSTRUCTION,-1); #else /* i8086/i8088 ignore an invalid opcode. */ /* i80186/i80188 probably also ignore an invalid opcode. */ - logerror("illegal instruction %.2x at %.5x\n",PEEKBYTE(cpustate->pc-1), cpustate->pc); ICOUNT -= 10; #endif } diff --git a/src/mess/drivers/at.c b/src/mess/drivers/at.c index 3b7fecd8e24..80ed525f95f 100644 --- a/src/mess/drivers/at.c +++ b/src/mess/drivers/at.c @@ -15,7 +15,7 @@ static ADDRESS_MAP_START( at16_map, AS_PROGRAM, 16, at_state ) - AM_RANGE(0x000000, 0x09ffff) AM_MIRROR(0xff000000) AM_RAMBANK("bank10") + AM_RANGE(0x000000, 0x09ffff) AM_RAMBANK("bank10") AM_RANGE(0x0c0000, 0x0c7fff) AM_ROM AM_RANGE(0x0c8000, 0x0cffff) AM_ROM AM_RANGE(0x0d0000, 0x0effff) AM_RAM @@ -23,16 +23,6 @@ static ADDRESS_MAP_START( at16_map, AS_PROGRAM, 16, at_state ) AM_RANGE(0xff0000, 0xffffff) AM_ROM AM_REGION("maincpu", 0x0f0000) ADDRESS_MAP_END -static ADDRESS_MAP_START( neat_map, AS_PROGRAM, 16, at_state ) - AM_RANGE(0x000000, 0x09ffff) AM_MIRROR(0xff000000) AM_RAMBANK("bank10") - AM_RANGE(0x0c0000, 0x0c7fff) AM_ROM - AM_RANGE(0x0c8000, 0x0cffff) AM_ROM - AM_RANGE(0x0d0000, 0x0effff) AM_RAM - AM_RANGE(0x0f0000, 0x0fffff) AM_ROM - AM_RANGE(0x100000, 0xfeffff) AM_RAM - AM_RANGE(0xff0000, 0xffffff) AM_ROM AM_REGION("maincpu", 0x0f0000) -ADDRESS_MAP_END - static ADDRESS_MAP_START( at386_map, AS_PROGRAM, 32, at_state ) AM_RANGE(0x00000000, 0x0009ffff) AM_RAMBANK("bank10") AM_RANGE(0x000a0000, 0x000bffff) AM_NOP @@ -246,8 +236,6 @@ static INPUT_PORTS_START( atcga ) PORT_DIPNAME( 0x01, 0x01, "Floppy installed") PORT_DIPSETTING( 0x00, DEF_STR( No ) ) PORT_DIPSETTING( 0x01, DEF_STR( Yes ) ) - - PORT_INCLUDE( pcvideo_cga ) INPUT_PORTS_END static INPUT_PORTS_START( atvga ) @@ -432,7 +420,7 @@ static MACHINE_CONFIG_START( ibm5170, at_state ) /* internal ram */ MCFG_RAM_ADD(RAM_TAG) MCFG_RAM_DEFAULT_SIZE("1664K") - MCFG_RAM_EXTRA_OPTIONS("2M,4M,8M,16M") + MCFG_RAM_EXTRA_OPTIONS("2M,4M,8M,15M") MACHINE_CONFIG_END @@ -461,13 +449,12 @@ static MACHINE_CONFIG_START( ibm5162, at_state ) MCFG_ISA16_SLOT_ADD("isabus","isa1", pc_isa16_cards, "fdc", NULL, false) MCFG_ISA16_SLOT_ADD("isabus","isa2", pc_isa16_cards, "ide", NULL, false) MCFG_ISA16_SLOT_ADD("isabus","isa3", pc_isa16_cards, "comat", NULL, false) - - MCFG_FRAGMENT_ADD( pcvideo_cga ) + MCFG_ISA16_SLOT_ADD("isabus","isa4", pc_isa16_cards, "cga", NULL, false) /* internal ram */ MCFG_RAM_ADD(RAM_TAG) MCFG_RAM_DEFAULT_SIZE("1664K") - MCFG_RAM_EXTRA_OPTIONS("2M,4M,8M,16M") + MCFG_RAM_EXTRA_OPTIONS("2M,4M,8M,15M") MACHINE_CONFIG_END @@ -489,14 +476,14 @@ static MACHINE_CONFIG_START( ps2m30286, at_state ) /* internal ram */ MCFG_RAM_ADD(RAM_TAG) MCFG_RAM_DEFAULT_SIZE("1664K") - MCFG_RAM_EXTRA_OPTIONS("2M,4M,8M,16M") + MCFG_RAM_EXTRA_OPTIONS("2M,4M,8M,15M") MACHINE_CONFIG_END static MACHINE_CONFIG_START( neat, at_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", I80286, 12000000) - MCFG_CPU_PROGRAM_MAP(neat_map) + MCFG_CPU_PROGRAM_MAP(at16_map) MCFG_CPU_IO_MAP(neat_io) MCFG_CPU_CONFIG(i286_address_mask) @@ -506,15 +493,14 @@ static MACHINE_CONFIG_START( neat, at_state ) MCFG_ISA16_SLOT_ADD("isabus", "isa1", pc_isa16_cards, "fdc", NULL, false) MCFG_ISA16_SLOT_ADD("isabus", "isa2", pc_isa16_cards, "ide", NULL, false) MCFG_ISA16_SLOT_ADD("isabus", "isa3", pc_isa16_cards, "comat", NULL, false) - - MCFG_FRAGMENT_ADD( pcvideo_cga ) + MCFG_ISA16_SLOT_ADD("isabus","isa4", pc_isa16_cards, "svga_et4k", NULL, false) MCFG_CS8221_ADD("cs8221", "maincpu", "isa", "bios") /* internal ram */ MCFG_RAM_ADD(RAM_TAG) MCFG_RAM_DEFAULT_SIZE("1664K") - MCFG_RAM_EXTRA_OPTIONS("2M,4M,8M,16M") + MCFG_RAM_EXTRA_OPTIONS("2M,4M,8M,15M") MACHINE_CONFIG_END static MACHINE_CONFIG_START( atvga, at_state ) @@ -536,7 +522,7 @@ static MACHINE_CONFIG_START( atvga, at_state ) /* internal ram */ MCFG_RAM_ADD(RAM_TAG) MCFG_RAM_DEFAULT_SIZE("1664K") - MCFG_RAM_EXTRA_OPTIONS("2M,4M,8M,16M") + MCFG_RAM_EXTRA_OPTIONS("2M,4M,8M,15M") MACHINE_CONFIG_END static MACHINE_CONFIG_START( xb42639, at_state ) @@ -557,7 +543,7 @@ static MACHINE_CONFIG_START( xb42639, at_state ) /* internal ram */ MCFG_RAM_ADD(RAM_TAG) MCFG_RAM_DEFAULT_SIZE("1664K") - MCFG_RAM_EXTRA_OPTIONS("2M,4M,8M,16M") + MCFG_RAM_EXTRA_OPTIONS("2M,4M,8M,15M") MACHINE_CONFIG_END //------------------------------------------------- @@ -704,6 +690,12 @@ static MACHINE_CONFIG_DERIVED( at386sx, atvga ) MCFG_CPU_IO_MAP(at16_io) MACHINE_CONFIG_END +static MACHINE_CONFIG_DERIVED( ct386sx, neat ) + MCFG_CPU_REPLACE("maincpu", I386SX, 16000000) + MCFG_CPU_PROGRAM_MAP(at16_map) + MCFG_CPU_IO_MAP(neat_io) +MACHINE_CONFIG_END + static MACHINE_CONFIG_DERIVED( megapc, at386 ) MCFG_CPU_REPLACE("maincpu", I386, XTAL_50MHz / 2) MCFG_CPU_PROGRAM_MAP(at386_map) @@ -784,11 +776,6 @@ ROM_START( ec1849 ) ROM_LOAD16_BYTE( "cpu-card_27c256_016.rom", 0xf0001, 0x8000, CRC(bc3924d6) SHA1(596be415e6c2bc4ff30a187f146664531565712c)) ROM_LOAD16_BYTE( "video-card_573rf6( 2764)_040.rom", 0xc0001, 0x2000, CRC(a3ece315) SHA1(e800e11c3b1b6fcaf41bfb7d4058a9d34fdd2b3f)) ROM_LOAD16_BYTE( "video-card_573rf6( 2764)_041.rom", 0xc0000, 0x2000, CRC(b0a2ba7f) SHA1(c8160e8bc97cd391558f1dddd3fd3ec4a19d030c)) - - ROM_REGION(0x08100, "gfx1", 0) - ROM_LOAD("cga.chr", 0x00000, 0x01000, CRC(42009069) SHA1(ed08559ce2d7f97f68b9f540bddad5b6295294dd)) - - ROM_REGION(0x50000, "gfx2", ROMREGION_ERASE00) ROM_END ROM_START( ibm5170a ) @@ -820,10 +807,6 @@ ROM_START( ibm5162 ) //MB p/n 62x1168 ROM_LOAD16_BYTE("78x7460.u34", 0xf0000, 0x8000, CRC(1db4bd8f) SHA1(7be669fbb998d8b4626fefa7cd1208d3b2a88c31)) /* 78X7460 U34 // (C) IBM CORP // 1981-1986 */ ROM_LOAD16_BYTE("78x7461.u35", 0xf0001, 0x8000, CRC(be14b453) SHA1(ec7c10087dbd53f9c6d1174e8f14212e2aec1818)) /* 78X7461 U35 // (C) IBM CORP // 1981-1986 */ - /* Character rom */ - ROM_REGION(0x2000,"gfx1", 0) - ROM_LOAD("5788005.u33", 0x00000, 0x2000, CRC(0bf56d70) SHA1(c2a8b10808bf51a3c123ba3eb1e9dd608231916f)) - /* Mainboard PALS */ ROM_REGION( 0x2000, "pals", 0 ) ROM_LOAD("59x7599.mmipal20l8.u27.jed", 0x0000, 0x02E7, NO_DUMP) /* MMI PAL20L8ACN5 8631 // N59X7599 IBM (C)85 K3 */ @@ -1016,22 +999,12 @@ ROM_START( at ) ROM_SYSTEM_BIOS(13, "aw303gs", "Award 303GS") ROMX_LOAD( "aw303gs-hi.bin", 0xf8001, 0x4000, CRC(82392e18) SHA1(042453b7b29933a1b72301d21fcf8fa6b293c9c9), ROM_SKIP(1) | ROM_BIOS(14) ) ROMX_LOAD( "aw303gs-lo.bin", 0xf8000, 0x4000, CRC(a4cf8ba1) SHA1(b73e34be3b2754aaed1ac06471f4441fea06c67c), ROM_SKIP(1) | ROM_BIOS(14) ) - /* Character rom */ - ROM_REGION(0x2000,"gfx1", 0) - ROM_LOAD("5788005.u33", 0x00000, 0x2000, CRC(0bf56d70) SHA1(c2a8b10808bf51a3c123ba3eb1e9dd608231916f)) - - ROM_REGION(0x50000, "gfx2", ROMREGION_ERASE00) ROM_END ROM_START( cmdpc30 ) ROM_REGION(0x1000000,"maincpu", 0) ROMX_LOAD( "commodore pc 30 iii even.bin", 0xf8000, 0x4000, CRC(36307aa9) SHA1(50237ffea703b867de426ab9ebc2af46bac1d0e1),ROM_SKIP(1)) ROMX_LOAD( "commodore pc 30 iii odd.bin", 0xf8001, 0x4000, CRC(41bae42d) SHA1(27d6ad9554be86359d44331f25591e3122a31519),ROM_SKIP(1)) - /* Character rom */ - ROM_REGION(0x2000,"gfx1", 0) - ROM_LOAD("5788005.u33", 0x00000, 0x2000, CRC(0bf56d70) SHA1(c2a8b10808bf51a3c123ba3eb1e9dd608231916f)) - - ROM_REGION(0x50000, "gfx2", ROMREGION_ERASE00) ROM_END ROM_START( atvga ) @@ -1120,21 +1093,15 @@ ROM_START( neat ) //ROM_RELOAD(0xff0000,0x8000) ROM_LOAD16_BYTE("at030389.1", 0xf0001, 0x8000, CRC(4e90f294) SHA1(18c21fd8d7e959e2292a9afbbaf78310f9cad12f)) //ROM_RELOAD(0xff0001,0x8000) - - /* Character rom */ - ROM_REGION(0x2000,"gfx1", 0) - ROM_LOAD("5788005.u33", 0x00000, 0x2000, CRC(0bf56d70) SHA1(c2a8b10808bf51a3c123ba3eb1e9dd608231916f)) - - ROM_REGION(0x50000, "gfx2", ROMREGION_ERASE00) ROM_END -ROM_START( at386sx ) +ROM_START( ct386sx ) ROM_REGION(0x1000000,"maincpu", 0) ROM_SYSTEM_BIOS(0, "neatsx", "NEATsx 386sx") ROMX_LOAD("012l-u25.bin", 0xf0000, 0x8000, CRC(4AB1862D) SHA1(D4E8D0FF43731270478CA7671A129080FF350A4F),ROM_SKIP(1) | ROM_BIOS(1) ) - //ROM_RELOAD(0xff0000,0x8000) ROMX_LOAD("012h-u24.bin", 0xf0001, 0x8000, CRC(17472521) SHA1(7588C148FE53D9DC4CB2D0AB6E0FD51A39BB5D1A),ROM_SKIP(1) | ROM_BIOS(1) ) - //ROM_RELOAD(0xff0000,0x8000) + ROM_FILL(0xfe2c9, 1, 0) // skip incompatible keyboard controller test + ROM_FILL(0xfe2cb, 1, 0xbb) // fix checksum ROM_END ROM_START( at386 ) @@ -1459,11 +1426,11 @@ COMP ( 198?, i8580111, ibm5170, 0, at386, atvga, at_state, atvga, COMP ( 1987, at, ibm5170, 0, ibm5162, atcga, at_state, atcga, "<generic>", "PC/AT (CGA, MF2 Keyboard)", GAME_NOT_WORKING ) COMP ( 1987, atvga, ibm5170, 0, atvga, atvga, at_state, atvga, "<generic>", "PC/AT (VGA, MF2 Keyboard)" , GAME_NOT_WORKING ) COMP ( 1988, at386, ibm5170, 0, at386, atvga, at_state, atvga, "<generic>", "PC/AT 386 (VGA, MF2 Keyboard)", GAME_NOT_WORKING ) -COMP ( 1988, at386sx, ibm5170, 0, at386sx, atvga, at_state, atvga, "<generic>", "PC/AT 386SX (VGA, MF2 Keyboard)", GAME_NOT_WORKING ) +COMP ( 1988, ct386sx, ibm5170, 0, ct386sx, atvga, at_state, atvga, "<generic>", "NEAT 386SX (VGA, MF2 Keyboard)", GAME_NOT_WORKING ) COMP ( 1990, at486, ibm5170, 0, at486, atvga, at_state, atvga, "<generic>", "PC/AT 486 (VGA, MF2 Keyboard)", GAME_NOT_WORKING ) COMP ( 1990, at586, ibm5170, 0, at586, atvga, driver_device, 0, "<generic>", "PC/AT 586 (PIIX4)", GAME_NOT_WORKING ) COMP ( 1990, at586x3, ibm5170, 0, at586x3, atvga, driver_device, 0, "<generic>", "PC/AT 586 (PIIX3)", GAME_NOT_WORKING ) -COMP ( 1989, neat, ibm5170, 0, neat, atcga, at_state, atcga, "<generic>", "NEAT (CGA, MF2 Keyboard)", GAME_NOT_WORKING ) +COMP ( 1989, neat, ibm5170, 0, neat, atvga, at_state, atvga, "<generic>", "NEAT (VGA, MF2 Keyboard)", GAME_NOT_WORKING ) COMP ( 1993, ct486, ibm5170, 0, ct486, atvga, at_state, atvga, "<unknown>", "PC/AT 486 with C&T chipset", GAME_NOT_WORKING ) COMP ( 1993, ec1849, ibm5170, 0, ec1849, atcga, at_state, atcga, "<unknown>", "EC-1849", GAME_NOT_WORKING ) COMP ( 1993, megapc, ibm5170, 0, megapc, atvga, at_state, atvga, "Amstrad plc", "MegaPC", GAME_NOT_WORKING ) diff --git a/src/mess/mess.lst b/src/mess/mess.lst index 3e8858187a2..80b1988f488 100644 --- a/src/mess/mess.lst +++ b/src/mess/mess.lst @@ -771,7 +771,8 @@ at // 1987 AMI Bios and Diagnostics atvga // 19?? AT VGA neat // 1989 New Enhanced AT chipset, AMI BIOS at386 // 19?? IBM AT 386 -at386sx +//at386sx // no bios for this currently +ct386sx at486 // 19?? IBM AT 486 ct486 // 1993? 486 with CS4031 ficpio2 // 1995 FIC 486-PIO-2 |