diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/devices/bus/hp9845_io/98034.cpp | 375 | ||||
-rw-r--r-- | src/devices/bus/hp9845_io/98034.h | 85 | ||||
-rw-r--r-- | src/devices/bus/hp9845_io/98035.cpp | 2 | ||||
-rw-r--r-- | src/devices/bus/hp9845_io/hp9845_io.cpp | 2 | ||||
-rw-r--r-- | src/devices/bus/hp9845_io/hp9845_io.h | 4 | ||||
-rw-r--r-- | src/devices/bus/ieee488/ieee488.cpp | 27 | ||||
-rw-r--r-- | src/devices/cpu/mb86235/mb86235d.cpp | 584 | ||||
-rw-r--r-- | src/devices/machine/z80scc.cpp | 96 | ||||
-rw-r--r-- | src/devices/machine/z80scc.h | 103 | ||||
-rw-r--r-- | src/devices/video/upd7220.cpp | 35 | ||||
-rw-r--r-- | src/mame/drivers/amusco.cpp | 111 | ||||
-rwxr-xr-x | src/mame/drivers/mac128.cpp | 25 | ||||
-rw-r--r-- | src/mame/drivers/vegas.cpp | 18 | ||||
-rw-r--r-- | src/mame/layout/x68000.lay | 79 | ||||
-rw-r--r-- | src/mame/machine/x68k_kbd.cpp | 14 | ||||
-rw-r--r-- | src/mame/mame.lst | 1 | ||||
-rw-r--r-- | src/mame/video/mrdo.cpp | 7 |
17 files changed, 1040 insertions, 528 deletions
diff --git a/src/devices/bus/hp9845_io/98034.cpp b/src/devices/bus/hp9845_io/98034.cpp new file mode 100644 index 00000000000..9dfec3a35c5 --- /dev/null +++ b/src/devices/bus/hp9845_io/98034.cpp @@ -0,0 +1,375 @@ +// license:BSD-3-Clause +// copyright-holders: F. Ulivi +/********************************************************************* + + 98034.cpp + + 98034 module (HPIB interface) + + TODO: Implement Parallel Poll response + + The main reference for this module is: + HP 98034-90001, 98034 Installation and Service Manual + +*********************************************************************/ + +#include "98034.h" +#include "coreutil.h" + +// Debugging +#define VERBOSE 0 +#define LOG(x) do { if (VERBOSE) logerror x; } while (0) + +#define BIT_MASK(n) (1U << (n)) + +// Macros to clear/set single bits +#define BIT_CLR(w , n) ((w) &= ~BIT_MASK(n)) +#define BIT_SET(w , n) ((w) |= BIT_MASK(n)) + +hp98034_io_card::hp98034_io_card(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : hp9845_io_card_device(mconfig , HP98034_IO_CARD , "HP98034 card" , tag , owner , clock , "hp98034" , __FILE__), + m_cpu(*this , "np"), + m_sw1(*this , "sw1"), + m_ieee488(*this , IEEE488_TAG) +{ +} + +hp98034_io_card::~hp98034_io_card() +{ +} + +static INPUT_PORTS_START(hp98034_port) + MCFG_HP9845_IO_SC(7) + PORT_START("sw1") + PORT_DIPNAME(0x1f , 0x15 , "HPIB address") + PORT_DIPLOCATION("S1:1,2,3,4,5") + PORT_DIPSETTING(0x00 , "0") + PORT_DIPSETTING(0x01 , "1") + PORT_DIPSETTING(0x02 , "2") + PORT_DIPSETTING(0x03 , "3") + PORT_DIPSETTING(0x04 , "4") + PORT_DIPSETTING(0x05 , "5") + PORT_DIPSETTING(0x06 , "6") + PORT_DIPSETTING(0x07 , "7") + PORT_DIPSETTING(0x08 , "8") + PORT_DIPSETTING(0x09 , "9") + PORT_DIPSETTING(0x0a , "10") + PORT_DIPSETTING(0x0b , "11") + PORT_DIPSETTING(0x0c , "12") + PORT_DIPSETTING(0x0d , "13") + PORT_DIPSETTING(0x0e , "14") + PORT_DIPSETTING(0x0f , "15") + PORT_DIPSETTING(0x10 , "16") + PORT_DIPSETTING(0x11 , "17") + PORT_DIPSETTING(0x12 , "18") + PORT_DIPSETTING(0x13 , "19") + PORT_DIPSETTING(0x14 , "20") + PORT_DIPSETTING(0x15 , "21") + PORT_DIPSETTING(0x16 , "22") + PORT_DIPSETTING(0x17 , "23") + PORT_DIPSETTING(0x18 , "24") + PORT_DIPSETTING(0x19 , "25") + PORT_DIPSETTING(0x1a , "26") + PORT_DIPSETTING(0x1b , "27") + PORT_DIPSETTING(0x1c , "28") + PORT_DIPSETTING(0x1d , "29") + PORT_DIPSETTING(0x1e , "30") + PORT_DIPSETTING(0x1f , "31") + PORT_DIPNAME(0x20 , 0x00 , "Sys. controller") + PORT_DIPLOCATION("S1:6") + PORT_DIPSETTING(0x00 , DEF_STR(On)) + PORT_DIPSETTING(0x20 , DEF_STR(Off)) +INPUT_PORTS_END + +ioport_constructor hp98034_io_card::device_input_ports() const +{ + return INPUT_PORTS_NAME(hp98034_port); +} + +void hp98034_io_card::device_start() +{ + save_item(NAME(m_dc)); + save_item(NAME(m_idr)); + save_item(NAME(m_odr)); + save_item(NAME(m_force_flg)); + save_item(NAME(m_mode_reg)); + save_item(NAME(m_clr_hpib)); + save_item(NAME(m_ctrl_out)); + save_item(NAME(m_data_out)); +} + +void hp98034_io_card::device_reset() +{ + hp9845_io_card_device::device_reset(); + install_readwrite_handler(read16_delegate(FUNC(hp98034_io_card::reg_r) , this) , write16_delegate(FUNC(hp98034_io_card::reg_w) , this)); + + m_idr = 0; + m_odr = 0; + m_force_flg = false; + m_mode_reg = 0xff; + m_clr_hpib = false; + m_ctrl_out = 0; + m_data_out = 0; + update_dc(); +} + +READ16_MEMBER(hp98034_io_card::reg_r) +{ + uint16_t res = m_odr; + + if (offset == 1 || offset == 3) { + // Reading from R5 or R7 forces bits 4&5 to 1 + res |= 0x30; + } + + // Mode register + // Bits Value + // ========== + // 7-4 1 + // 3-2 ~offset + // 1-0 1 + m_mode_reg = (uint8_t)((offset << 2) ^ 0xff); + m_force_flg = true; + + update_flg(); + + LOG(("read R%u=%04x\n" , offset + 4 , res)); + return res; +} + +WRITE16_MEMBER(hp98034_io_card::reg_w) +{ + m_idr = (uint8_t)data; + + // Mode register + // Bits Value + // ========== + // 7-4 1 + // 3-2 ~offset + // 1 0 + // 0 1 + m_mode_reg = (uint8_t)((offset << 2) ^ 0xfd); + m_force_flg = true; + + update_flg(); + LOG(("write R%u=%04x\n" , offset + 4 , data)); +} + +WRITE8_MEMBER(hp98034_io_card::dc_w) +{ + if (data != m_dc) { + //LOG(("DC=%02x\n" , data)); + m_dc = data; + update_dc(); + } +} + +READ8_MEMBER(hp98034_io_card::dc_r) +{ + uint8_t res; + + if (m_force_flg) { + // Force DC3 low + res = 0xf7; + } else { + res = 0xff; + } + + return res; +} + +WRITE8_MEMBER(hp98034_io_card::hpib_data_w) +{ + m_data_out = data; + update_data_out(); +} + +WRITE8_MEMBER(hp98034_io_card::hpib_ctrl_w) +{ + m_ctrl_out = data; + update_ctrl_out(); +} + +READ8_MEMBER(hp98034_io_card::hpib_ctrl_r) +{ + uint8_t res = 0; + + if (!m_ieee488->dav_r()) { + BIT_SET(res , 0); + } + if (!m_ieee488->nrfd_r()) { + BIT_SET(res , 1); + } + if (!m_ieee488->ndac_r()) { + BIT_SET(res , 2); + } + if (!m_ieee488->ifc_r()) { + BIT_SET(res , 3); + } + if (!m_ieee488->atn_r()) { + BIT_SET(res , 4); + } + if (!m_ieee488->srq_r()) { + BIT_SET(res , 5); + } + if (!m_ieee488->ren_r()) { + BIT_SET(res , 6); + } + if (!m_ieee488->eoi_r()) { + BIT_SET(res , 7); + } + + return res; +} + +READ8_MEMBER(hp98034_io_card::hpib_data_r) +{ + return ~m_ieee488->dio_r(); +} + +READ8_MEMBER(hp98034_io_card::idr_r) +{ + return m_idr; +} + +WRITE8_MEMBER(hp98034_io_card::odr_w) +{ + m_odr = data; +} + +READ8_MEMBER(hp98034_io_card::mode_reg_r) +{ + return m_mode_reg; +} + +WRITE8_MEMBER(hp98034_io_card::mode_reg_clear_w) +{ + m_mode_reg = 0xff; + m_force_flg = false; + update_flg(); +} + +READ8_MEMBER(hp98034_io_card::switch_r) +{ + return m_sw1->read() | 0xc0; +} + +IRQ_CALLBACK_MEMBER(hp98034_io_card::irq_callback) +{ + int res = 0xff; + + if (irqline == 0 && !m_ieee488->ifc_r()) { + BIT_CLR(res, 1); + } + + return res; +} + +WRITE_LINE_MEMBER(hp98034_io_card::ieee488_ctrl_w) +{ + update_clr_hpib(); +} + +void hp98034_io_card::update_dc(void) +{ + irq_w(!BIT(m_dc , 0)); + sts_w(BIT(m_dc , 4)); + update_flg(); + update_clr_hpib(); +} + +void hp98034_io_card::update_flg(void) +{ + flg_w(BIT(m_dc , 3) && !m_force_flg); +} + +void hp98034_io_card::update_np_irq(void) +{ + m_cpu->set_input_line(0 , (!m_ieee488->ifc_r() || m_clr_hpib) && BIT(m_dc , HP_NANO_IE_DC)); +} + +void hp98034_io_card::update_data_out(void) +{ + if (m_clr_hpib) { + m_data_out = 0; + } + m_ieee488->dio_w(~m_data_out); +} + +void hp98034_io_card::update_ctrl_out(void) +{ + if (m_clr_hpib) { + m_ieee488->dav_w(1); + m_ieee488->nrfd_w(1); + m_ieee488->eoi_w(1); + m_ieee488->ndac_w(0); + } else { + m_ieee488->dav_w(BIT(m_dc , 2)); + m_ieee488->nrfd_w(BIT(m_dc , 1)); + m_ieee488->eoi_w(!BIT(m_ctrl_out , 4)); + m_ieee488->ndac_w(BIT(m_dc , 6)); + } + m_ieee488->srq_w(!BIT(m_ctrl_out , 0)); + m_ieee488->ren_w(!BIT(m_ctrl_out , 1)); + m_ieee488->atn_w(!BIT(m_ctrl_out , 2)); + m_ieee488->ifc_w(!BIT(m_ctrl_out , 3)); +} + +void hp98034_io_card::update_clr_hpib(void) +{ + m_clr_hpib = !m_ieee488->atn_r() && BIT(m_dc , 5); + update_data_out(); + update_ctrl_out(); + update_np_irq(); + LOG(("clr_hpib %d\n" , m_clr_hpib)); +} + +ROM_START(hp98034) + ROM_REGION(0x400 , "np" , 0) + ROM_LOAD("1816-1242.bin" , 0 , 0x400 , CRC(301a9f5f) SHA1(3d7c1ace38c4d3178fdbf764c044535d9f6ac94f)) +ROM_END + +static ADDRESS_MAP_START(np_program_map , AS_PROGRAM , 8 , hp98034_io_card) + ADDRESS_MAP_UNMAP_HIGH + AM_RANGE(0x000 , 0x3ff) AM_ROM AM_REGION("np" , 0) +ADDRESS_MAP_END + +static ADDRESS_MAP_START(np_io_map , AS_IO , 8 , hp98034_io_card) + ADDRESS_MAP_UNMAP_HIGH + AM_RANGE(0 , 0) AM_WRITE(hpib_data_w) + AM_RANGE(1 , 1) AM_WRITE(hpib_ctrl_w) + AM_RANGE(2 , 2) AM_READ(hpib_ctrl_r) + AM_RANGE(3 , 3) AM_READ(hpib_data_r) + AM_RANGE(4 , 4) AM_READ(idr_r) + AM_RANGE(5 , 5) AM_WRITE(odr_w) + AM_RANGE(6 , 6) AM_READWRITE(mode_reg_r , mode_reg_clear_w) + AM_RANGE(7 , 7) AM_READ(switch_r) +ADDRESS_MAP_END + +static MACHINE_CONFIG_FRAGMENT(hp98034) +// Clock for NP is generated by a RC oscillator. Manual says its typical frequency +// is around 2 MHz. + MCFG_CPU_ADD("np" , HP_NANOPROCESSOR , 2000000) + MCFG_CPU_PROGRAM_MAP(np_program_map) + MCFG_CPU_IO_MAP(np_io_map) + MCFG_HP_NANO_DC_CHANGED(WRITE8(hp98034_io_card , dc_w)) + MCFG_HP_NANO_READ_DC_CB(READ8(hp98034_io_card , dc_r)) + MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(hp98034_io_card , irq_callback) + + MCFG_IEEE488_BUS_ADD() + MCFG_IEEE488_IFC_CALLBACK(WRITELINE(hp98034_io_card , ieee488_ctrl_w)) + MCFG_IEEE488_ATN_CALLBACK(WRITELINE(hp98034_io_card , ieee488_ctrl_w)) +MACHINE_CONFIG_END + +const tiny_rom_entry *hp98034_io_card::device_rom_region() const +{ + return ROM_NAME(hp98034); +} + +machine_config_constructor hp98034_io_card::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME(hp98034); +} + +// device type definition +const device_type HP98034_IO_CARD = &device_creator<hp98034_io_card>; diff --git a/src/devices/bus/hp9845_io/98034.h b/src/devices/bus/hp9845_io/98034.h new file mode 100644 index 00000000000..317259925b5 --- /dev/null +++ b/src/devices/bus/hp9845_io/98034.h @@ -0,0 +1,85 @@ +// license:BSD-3-Clause +// copyright-holders: F. Ulivi +/********************************************************************* + + 98034.h + + 98034 module (HPIB interface) + +*********************************************************************/ + +#pragma once + +#ifndef _98034_H_ +#define _98034_H_ + +#include "hp9845_io.h" +#include "cpu/nanoprocessor/nanoprocessor.h" +#include "bus/ieee488/ieee488.h" + +class hp98034_io_card : public hp9845_io_card_device +{ +public: + // construction/destruction + hp98034_io_card(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~hp98034_io_card(); + + // device-level overrides + virtual ioport_constructor device_input_ports() const override; + virtual void device_start() override; + virtual void device_reset() override; + virtual const tiny_rom_entry *device_rom_region() const override; + virtual machine_config_constructor device_mconfig_additions() const override; + + DECLARE_READ16_MEMBER(reg_r); + DECLARE_WRITE16_MEMBER(reg_w); + + DECLARE_WRITE8_MEMBER(dc_w); + DECLARE_READ8_MEMBER(dc_r); + + DECLARE_WRITE8_MEMBER(hpib_data_w); + DECLARE_WRITE8_MEMBER(hpib_ctrl_w); + DECLARE_READ8_MEMBER(hpib_ctrl_r); + DECLARE_READ8_MEMBER(hpib_data_r); + DECLARE_READ8_MEMBER(idr_r); + DECLARE_WRITE8_MEMBER(odr_w); + DECLARE_READ8_MEMBER(mode_reg_r); + DECLARE_WRITE8_MEMBER(mode_reg_clear_w); + DECLARE_READ8_MEMBER(switch_r); + + IRQ_CALLBACK_MEMBER(irq_callback); + + DECLARE_WRITE_LINE_MEMBER(ieee488_ctrl_w); + +private: + required_device<hp_nanoprocessor_device> m_cpu; + required_ioport m_sw1; + required_device<ieee488_device> m_ieee488; + + // DC lines + uint8_t m_dc; + + // Interface state + uint8_t m_idr; // Input Data Register + uint8_t m_odr; // Output Data Register + bool m_force_flg; + uint8_t m_mode_reg; + + // 488 bus state + bool m_clr_hpib; + uint8_t m_ctrl_out; + uint8_t m_data_out; + + void update_dc(void); + void update_flg(void); + void update_np_irq(void); + void update_data_out(void); + void update_ctrl_out(void); + void update_clr_hpib(void); + +}; + +// device type definition +extern const device_type HP98034_IO_CARD; + +#endif /* _98034_H_ */ diff --git a/src/devices/bus/hp9845_io/98035.cpp b/src/devices/bus/hp9845_io/98035.cpp index 28004e6d04f..7f5718b497c 100644 --- a/src/devices/bus/hp9845_io/98035.cpp +++ b/src/devices/bus/hp9845_io/98035.cpp @@ -153,7 +153,7 @@ hp98035_io_card::~hp98035_io_card() } static INPUT_PORTS_START(hp98035_port) - MCFG_HP9845_IO_SC + MCFG_HP9845_IO_SC(1) INPUT_PORTS_END ioport_constructor hp98035_io_card::device_input_ports() const diff --git a/src/devices/bus/hp9845_io/hp9845_io.cpp b/src/devices/bus/hp9845_io/hp9845_io.cpp index 1702c2ad4d6..9cbfceaf289 100644 --- a/src/devices/bus/hp9845_io/hp9845_io.cpp +++ b/src/devices/bus/hp9845_io/hp9845_io.cpp @@ -80,7 +80,9 @@ void hp9845_io_card_device::install_readwrite_handler(read16_delegate rhandler, } #include "98035.h" +#include "98034.h" SLOT_INTERFACE_START(hp9845_io_slot_devices) +SLOT_INTERFACE("98034_hpib" , HP98034_IO_CARD) SLOT_INTERFACE("98035_rtc" , HP98035_IO_CARD) SLOT_INTERFACE_END diff --git a/src/devices/bus/hp9845_io/hp9845_io.h b/src/devices/bus/hp9845_io/hp9845_io.h index a5c0f39b9b1..1c159fc862a 100644 --- a/src/devices/bus/hp9845_io/hp9845_io.h +++ b/src/devices/bus/hp9845_io/hp9845_io.h @@ -21,9 +21,9 @@ #define HP9845_IO_FIRST_SC 1 // Lowest SC used by I/O cards -#define MCFG_HP9845_IO_SC\ +#define MCFG_HP9845_IO_SC(_default_sc) \ PORT_START("SC") \ - PORT_CONFNAME(0xf , 0 , "Select Code") \ + PORT_CONFNAME(0xf , (_default_sc) - HP9845_IO_FIRST_SC , "Select Code") \ PORT_CONFSETTING(0 , "1")\ PORT_CONFSETTING(1 , "2")\ PORT_CONFSETTING(2 , "3")\ diff --git a/src/devices/bus/ieee488/ieee488.cpp b/src/devices/bus/ieee488/ieee488.cpp index 1b2f71c3f6a..385f3a8cd28 100644 --- a/src/devices/bus/ieee488/ieee488.cpp +++ b/src/devices/bus/ieee488/ieee488.cpp @@ -188,6 +188,7 @@ ieee488_device::daisy_entry::daisy_entry(device_t *device) void ieee488_device::set_signal(device_t *device, int signal, int state) { bool changed = false; + int old_state = get_signal(signal); if (device == this) { @@ -218,8 +219,13 @@ void ieee488_device::set_signal(device_t *device, int signal, int state) } } - if (changed) - { + if (!changed) { + return; + } + + state = get_signal(signal); + + if (old_state != state) { switch (signal) { case EOI: m_write_eoi(state); break; @@ -289,21 +295,18 @@ int ieee488_device::get_signal(int signal) { int state = m_line[signal]; - if (state) - { - daisy_entry *entry = m_device_list.first(); + daisy_entry *entry = m_device_list.first(); - while (entry) + while (state && entry) { if (!entry->m_line[signal]) - { - state = 0; - break; - } + { + state = 0; + break; + } entry = entry->next(); } - } return state; } @@ -352,7 +355,7 @@ uint8_t ieee488_device::get_data() daisy_entry *entry = m_device_list.first(); - while (entry) + while (data && entry) { data &= entry->m_dio; diff --git a/src/devices/cpu/mb86235/mb86235d.cpp b/src/devices/cpu/mb86235/mb86235d.cpp index d85753cd7d6..f32fcba8969 100644 --- a/src/devices/cpu/mb86235/mb86235d.cpp +++ b/src/devices/cpu/mb86235/mb86235d.cpp @@ -86,39 +86,39 @@ static const char *ai2f_field[32] = { "AA0", "AA1", "AA2", "AA3", "AA4", "AA5", "AA6", "AA7", "AB0", "AB1", "AB2", "AB3", "AB4", "AB5", "AB6", "AB7", "PR", "PR++", "PR--", "PR#0", "???", "???", "???", "???", "-1.0E+0", "0.0E+0", "0.5E+0", "1.0E+0", "1.5E+0", "2.0E+0", "3.0E+0", "5.0E+0" }; -static char* get_ea(int md, int arx, int ary, int disp) +static void dasm_ea(std::ostream &stream, int md, int arx, int ary, int disp) { - static char buffer[40]; - char *p = buffer; + if (arx & 0x20) + stream << "B("; + else + stream << "A("; + arx &= 7; switch (md) { - case 0x0: p += sprintf(p, "@AR%d", arx); break; - case 0x1: p += sprintf(p, "@AR%d++", arx); break; - case 0x2: p += sprintf(p, "@AR%d--", arx); break; - case 0x3: p += sprintf(p, "@AR%d++%04X", arx, disp); break; - case 0x4: p += sprintf(p, "@AR%d+AR%d", arx, ary); break; - case 0x5: p += sprintf(p, "@AR%d+AR%d++", arx, ary); break; - case 0x6: p += sprintf(p, "@AR%d+AR%d--", arx, ary); break; - case 0x7: p += sprintf(p, "@AR%d+AR%d++%04X", arx, ary, disp); break; - case 0x8: p += sprintf(p, "@AR%d+AR%dU", arx, ary); break; - case 0x9: p += sprintf(p, "@AR%d+AR%dL", arx, ary); break; - case 0xa: p += sprintf(p, "@AR%d+%04X", arx, disp); break; - case 0xb: p += sprintf(p, "@AR%d+AR%d+%04X", arx, ary, disp); break; - case 0xc: p += sprintf(p, "%04X", disp); break; - case 0xd: p += sprintf(p, "@AR%d+[AR%d++]", arx, ary); break; - case 0xe: p += sprintf(p, "@AR%d+[AR%d--]", arx, ary); break; - case 0xf: p += sprintf(p, "@AR%d+[AR%d++%04X]", arx, ary, disp); break; + case 0x0: util::stream_format(stream, "@AR%d", arx); break; + case 0x1: util::stream_format(stream, "@AR%d++", arx); break; + case 0x2: util::stream_format(stream, "@AR%d--", arx); break; + case 0x3: util::stream_format(stream, "@AR%d++%04X", arx, disp); break; + case 0x4: util::stream_format(stream, "@AR%d+AR%d", arx, ary); break; + case 0x5: util::stream_format(stream, "@AR%d+AR%d++", arx, ary); break; + case 0x6: util::stream_format(stream, "@AR%d+AR%d--", arx, ary); break; + case 0x7: util::stream_format(stream, "@AR%d+AR%d++%04X", arx, ary, disp); break; + case 0x8: util::stream_format(stream, "@AR%d+AR%dU", arx, ary); break; + case 0x9: util::stream_format(stream, "@AR%d+AR%dL", arx, ary); break; + case 0xa: util::stream_format(stream, "@AR%d+%04X", arx, disp); break; + case 0xb: util::stream_format(stream, "@AR%d+AR%d+%04X", arx, ary, disp); break; + case 0xc: util::stream_format(stream, "%04X", disp); break; + case 0xd: util::stream_format(stream, "@AR%d+[AR%d++]", arx, ary); break; + case 0xe: util::stream_format(stream, "@AR%d+[AR%d--]", arx, ary); break; + case 0xf: util::stream_format(stream, "@AR%d+[AR%d++%04X]", arx, ary, disp); break; } - return buffer; + stream << ')'; } -static char* dasm_alu_mul(uint64_t opcode, bool twoop) +static void dasm_alu_mul(std::ostream &stream, uint64_t opcode, bool twoop) { - static char buffer[80]; - char *p = buffer; - int ma = (opcode & ((uint64_t)(1) << 41)) ? 1 : 0; int o = (opcode >> 42) & 0x1f; int i2 = (opcode >> 47) & 0x1f; @@ -130,69 +130,69 @@ static char* dasm_alu_mul(uint64_t opcode, bool twoop) int aluop = (opcode >> 56) & 0x1f; switch (aluop) { - case 0x00: p += sprintf(p, "FADD %s, %s, %s", ai1_field[i1], ai2f_field[i2], mo_field[o]); + case 0x00: util::stream_format(stream, "FADD %s, %s, %s", ai1_field[i1], ai2f_field[i2], mo_field[o]); break; - case 0x01: p += sprintf(p, "FADDZ %s, %s, %s", ai1_field[i1], ai2f_field[i2], mo_field[o]); + case 0x01: util::stream_format(stream, "FADDZ %s, %s, %s", ai1_field[i1], ai2f_field[i2], mo_field[o]); break; - case 0x02: p += sprintf(p, "FSUB %s, %s, %s", ai1_field[i1], ai2f_field[i2], mo_field[o]); + case 0x02: util::stream_format(stream, "FSUB %s, %s, %s", ai1_field[i1], ai2f_field[i2], mo_field[o]); break; - case 0x03: p += sprintf(p, "FSUBZ %s, %s, %s", ai1_field[i1], ai2f_field[i2], mo_field[o]); + case 0x03: util::stream_format(stream, "FSUBZ %s, %s, %s", ai1_field[i1], ai2f_field[i2], mo_field[o]); break; - case 0x04: p += sprintf(p, "FCMP %s, %s", ai1_field[i1], ai2f_field[i2]); + case 0x04: util::stream_format(stream, "FCMP %s, %s", ai1_field[i1], ai2f_field[i2]); break; - case 0x05: p += sprintf(p, "FABS %s, %s", ai1_field[i1], mo_field[o]); + case 0x05: util::stream_format(stream, "FABS %s, %s", ai1_field[i1], mo_field[o]); break; - case 0x06: p += sprintf(p, "FABC %s, %s, %s", ai1_field[i1], ai2f_field[i2], mo_field[o]); + case 0x06: util::stream_format(stream, "FABC %s, %s, %s", ai1_field[i1], ai2f_field[i2], mo_field[o]); break; - case 0x07: p += sprintf(p, "NOP"); + case 0x07: stream << "NOP"; break; - case 0x08: p += sprintf(p, "FEA %s, #%02X, %s", ai1_field[i1], i2, mo_field[o]); + case 0x08: util::stream_format(stream, "FEA %s, #%02X, %s", ai1_field[i1], i2, mo_field[o]); break; - case 0x09: p += sprintf(p, "FES %s, #%02X, %s", ai1_field[i1], i2, mo_field[o]); + case 0x09: util::stream_format(stream, "FES %s, #%02X, %s", ai1_field[i1], i2, mo_field[o]); break; - case 0x0a: p += sprintf(p, "FRCP %s, %s", ai1_field[i1], mo_field[o]); + case 0x0a: util::stream_format(stream, "FRCP %s, %s", ai1_field[i1], mo_field[o]); break; - case 0x0b: p += sprintf(p, "FRSQ %s, %s", ai1_field[i1], mo_field[o]); + case 0x0b: util::stream_format(stream, "FRSQ %s, %s", ai1_field[i1], mo_field[o]); break; - case 0x0c: p += sprintf(p, "FLOG %s, %s", ai1_field[i1], mo_field[o]); + case 0x0c: util::stream_format(stream, "FLOG %s, %s", ai1_field[i1], mo_field[o]); break; - case 0x0d: p += sprintf(p, "CIF %s, %s", ai1_field[i1], mo_field[o]); + case 0x0d: util::stream_format(stream, "CIF %s, %s", ai1_field[i1], mo_field[o]); break; - case 0x0e: p += sprintf(p, "CFI %s, %s", ai1_field[i1], mo_field[o]); + case 0x0e: util::stream_format(stream, "CFI %s, %s", ai1_field[i1], mo_field[o]); break; - case 0x0f: p += sprintf(p, "CFIB %s, %s", ai1_field[i1], mo_field[o]); + case 0x0f: util::stream_format(stream, "CFIB %s, %s", ai1_field[i1], mo_field[o]); break; - case 0x10: p += sprintf(p, "ADD %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); + case 0x10: util::stream_format(stream, "ADD %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); break; - case 0x11: p += sprintf(p, "ADDZ %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); + case 0x11: util::stream_format(stream, "ADDZ %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); break; - case 0x12: p += sprintf(p, "SUB %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); + case 0x12: util::stream_format(stream, "SUB %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); break; - case 0x13: p += sprintf(p, "SUBZ %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); + case 0x13: util::stream_format(stream, "SUBZ %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); break; - case 0x14: p += sprintf(p, "CMP %s, %s", ai1_field[i1], ai2_field[i2]); + case 0x14: util::stream_format(stream, "CMP %s, %s", ai1_field[i1], ai2_field[i2]); break; - case 0x15: p += sprintf(p, "ABS %s, %s", ai1_field[i1], mo_field[o]); + case 0x15: util::stream_format(stream, "ABS %s, %s", ai1_field[i1], mo_field[o]); break; - case 0x16: p += sprintf(p, "ATR %s, %s", ai1_field[i1], mo_field[o]); + case 0x16: util::stream_format(stream, "ATR %s, %s", ai1_field[i1], mo_field[o]); break; - case 0x17: p += sprintf(p, "ATRZ %s, %s", ai1_field[i1], mo_field[o]); + case 0x17: util::stream_format(stream, "ATRZ %s, %s", ai1_field[i1], mo_field[o]); break; - case 0x18: p += sprintf(p, "AND %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); + case 0x18: util::stream_format(stream, "AND %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); break; - case 0x19: p += sprintf(p, "OR %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); + case 0x19: util::stream_format(stream, "OR %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); break; - case 0x1a: p += sprintf(p, "XOR %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); + case 0x1a: util::stream_format(stream, "XOR %s, %s, %s", ai1_field[i1], ai2_field[i2], mo_field[o]); break; - case 0x1b: p += sprintf(p, "NOT %s, %s", ai1_field[i1], mo_field[o]); + case 0x1b: util::stream_format(stream, "NOT %s, %s", ai1_field[i1], mo_field[o]); break; - case 0x1c: p += sprintf(p, "LSR %s, #%02X, %s", ai1_field[i1], i2, mo_field[o]); + case 0x1c: util::stream_format(stream, "LSR %s, #%02X, %s", ai1_field[i1], i2, mo_field[o]); break; - case 0x1d: p += sprintf(p, "LSL %s, #%02X, %s", ai1_field[i1], i2, mo_field[o]); + case 0x1d: util::stream_format(stream, "LSL %s, #%02X, %s", ai1_field[i1], i2, mo_field[o]); break; - case 0x1e: p += sprintf(p, "ASR %s, #%02X, %s", ai1_field[i1], i2, mo_field[o]); + case 0x1e: util::stream_format(stream, "ASR %s, #%02X, %s", ai1_field[i1], i2, mo_field[o]); break; - case 0x1f: p += sprintf(p, "ASL %s, #%02X, %s", ai1_field[i1], i2, mo_field[o]); + case 0x1f: util::stream_format(stream, "ASL %s, #%02X, %s", ai1_field[i1], i2, mo_field[o]); break; } } @@ -204,29 +204,24 @@ static char* dasm_alu_mul(uint64_t opcode, bool twoop) int mi1 = (opcode >> 37) & 0xf; int mo = (opcode >> 27) & 0x1f; if (opcode & ((uint64_t)(1) << 41)) - p += sprintf(p, " : FMUL %s, %s, %s", mi1_field[mi1], mi2_field[mi2], mo_field[mo]); + util::stream_format(stream, " : FMUL %s, %s, %s", mi1_field[mi1], mi2_field[mi2], mo_field[mo]); else - p += sprintf(p, " : MUL %s, %s, %s", mi1_field[mi1], mi2_field[mi2], mo_field[mo]); + util::stream_format(stream, " : MUL %s, %s, %s", mi1_field[mi1], mi2_field[mi2], mo_field[mo]); } else { if (ma == 0) { if (opcode & ((uint64_t)(1) << 56)) - p += sprintf(p, "FMUL %s, %s, %s", mi1_field[i1], mi2_field[i2], mo_field[o]); + util::stream_format(stream, "FMUL %s, %s, %s", mi1_field[i1], mi2_field[i2], mo_field[o]); else - p += sprintf(p, "MUL %s, %s, %s", mi1_field[i1], mi2_field[i2], mo_field[o]); + util::stream_format(stream, "MUL %s, %s, %s", mi1_field[i1], mi2_field[i2], mo_field[o]); } } - - return buffer; } -static char* dasm_control(uint32_t pc, uint64_t opcode) +static void dasm_control(std::ostream &stream, uint32_t pc, uint64_t opcode) { - static char buffer[80]; - char *p = buffer; - int ef1 = (opcode >> 16) & 0x3f; int ef2 = opcode & 0xffff; @@ -234,66 +229,65 @@ static char* dasm_control(uint32_t pc, uint64_t opcode) int rel12 = (opcode & 0x800) ? (0xfffff000 | (opcode & 0xfff)) : (opcode & 0xfff); - switch (cop) { - case 0x00: p += sprintf(p, "NOP"); + case 0x00: stream << "NOP"; break; case 0x01: if (ef1 == 0) - p += sprintf(p, "REP #%04X", ef2); + util::stream_format(stream, "REP #%04X", ef2); else - p += sprintf(p, "REP AR%d", (ef2 >> 12) & 7); + util::stream_format(stream, "REP AR%d", (ef2 >> 12) & 7); break; case 0x02: if (ef1 == 0) - p += sprintf(p, "SETL #%04X", ef2); + util::stream_format(stream, "SETL #%04X", ef2); else - p += sprintf(p, "SETL AR%d", (ef2 >> 12) & 7); + util::stream_format(stream, "SETL AR%d", (ef2 >> 12) & 7); break; case 0x03: if (ef1 == 1) - p += sprintf(p, "CLRFI"); + stream << "CLRFI"; else if (ef1 == 2) - p += sprintf(p, "CLRFO"); + stream << "CLRFO"; else if (ef1 == 3) - p += sprintf(p, "CLRF"); + stream << "CLRF"; break; case 0x04: - p += sprintf(p, "PUSH %s", regname[(ef2 >> 6) & 0x3f]); + util::stream_format(stream, "PUSH %s", regname[(ef2 >> 6) & 0x3f]); break; case 0x05: - p += sprintf(p, "POP %s", regname[(ef2 >> 6) & 0x3f]); + util::stream_format(stream, "POP %s", regname[(ef2 >> 6) & 0x3f]); break; case 0x08: - p += sprintf(p, "SETM #%04X", ef2); + util::stream_format(stream, "SETM #%04X", ef2); break; case 0x09: - p += sprintf(p, "SETM #%01X, CBSA", (ef2 >> 12) & 7); + util::stream_format(stream, "SETM #%01X, CBSA", (ef2 >> 12) & 7); break; case 0x0a: - p += sprintf(p, "SETM #%01X, CBSB", (ef2 >> 8) & 7); + util::stream_format(stream, "SETM #%01X, CBSB", (ef2 >> 8) & 7); break; case 0x0b: - p += sprintf(p, "SETM #%d, RF", (ef2 >> 7) & 1); + util::stream_format(stream, "SETM #%d, RF", (ef2 >> 7) & 1); break; case 0x0c: - p += sprintf(p, "SETM #%d, RDY", (ef2 >> 4) & 1); + util::stream_format(stream, "SETM #%d, RDY", (ef2 >> 4) & 1); break; case 0x0d: - p += sprintf(p, "SETM #%01X, WAIT", ef2 & 7); + util::stream_format(stream, "SETM #%01X, WAIT", ef2 & 7); break; case 0x13: - p += sprintf(p, "DBLP %04X", pc + rel12); + util::stream_format(stream, "DBLP %04X", pc + rel12); break; case 0x14: - p += sprintf(p, "DBBC AR%d:%d, %04X", (uint32_t)((opcode >> 13) & 7), (uint32_t)((opcode >> 16) & 0xf), pc + rel12); + util::stream_format(stream, "DBBC AR%d:%d, %04X", (uint32_t)((opcode >> 13) & 7), (uint32_t)((opcode >> 16) & 0xf), pc + rel12); break; case 0x15: - p += sprintf(p, "DBBS AR%d:%d, %04X", (uint32_t)((opcode >> 13) & 7), (uint32_t)((opcode >> 16) & 0xf), pc + rel12); + util::stream_format(stream, "DBBS AR%d:%d, %04X", (uint32_t)((opcode >> 13) & 7), (uint32_t)((opcode >> 16) & 0xf), pc + rel12); break; case 0x1b: - p += sprintf(p, "DRET"); + stream << "DRET"; break; case 0x10: // DBcc @@ -304,52 +298,49 @@ static char* dasm_control(uint32_t pc, uint64_t opcode) case 0x12: // DJMP { if (cop == 0x10) - p += sprintf(p, "%s ", db_mnemonic[ef1]); + util::stream_format(stream, "%s ", db_mnemonic[ef1]); else if (cop == 0x11) - p += sprintf(p, "%s ", dbn_mnemonic[ef1]); + util::stream_format(stream, "%s ", dbn_mnemonic[ef1]); else if (cop == 0x18) - p += sprintf(p, "%s ", dc_mnemonic[ef1]); + util::stream_format(stream, "%s ", dc_mnemonic[ef1]); else if (cop == 0x19) - p += sprintf(p, "%s ", dcn_mnemonic[ef1]); + util::stream_format(stream, "%s ", dcn_mnemonic[ef1]); else if (cop == 0x12) - p += sprintf(p, "DJMP "); + stream << "DJMP "; else if (cop == 0x1a) - p += sprintf(p, "DCALL "); + stream << "DCALL "; switch ((opcode >> 12) & 0xf) { - case 0x0: p += sprintf(p, "%03X", ef2 & 0xfff); break; - case 0x1: p += sprintf(p, "%04X", pc + rel12); break; - case 0x2: p += sprintf(p, "%s", regname[(ef2 >> 6) & 0x3f]); break; - case 0x3: p += sprintf(p, "+%s", regname[(ef2 >> 6) & 0x3f]); break; - case 0x4: p += sprintf(p, "%s", regname[(ef2 >> 6) & 0x3f]); break; - case 0x5: p += sprintf(p, "+%s", regname[(ef2 >> 6) & 0x3f]); break; - case 0x6: p += sprintf(p, "%s", regname[(ef2 >> 6) & 0x3f]); break; - case 0x7: p += sprintf(p, "+%s", regname[(ef2 >> 6) & 0x3f]); break; - case 0x8: p += sprintf(p, "A(%03X)", ef2 & 0x3ff); break; - case 0x9: p += sprintf(p, "+A(%03X)", ef2 & 0x3ff); break; - case 0xa: p += sprintf(p, "B(%03X)", ef2 & 0x3ff); break; - case 0xb: p += sprintf(p, "+B(%03X)", ef2 & 0x3ff); break; - case 0xc: p += sprintf(p, "A(%s)", regname[(ef2 >> 6) & 0x3f]); break; - case 0xd: p += sprintf(p, "+A(%s)", regname[(ef2 >> 6) & 0x3f]); break; - case 0xe: p += sprintf(p, "B(%s)", regname[(ef2 >> 6) & 0x3f]); break; - case 0xf: p += sprintf(p, "+B(%s)", regname[(ef2 >> 6) & 0x3f]); break; + case 0x0: util::stream_format(stream, "%03X", ef2 & 0xfff); break; + case 0x1: util::stream_format(stream, "%04X", pc + rel12); break; + case 0x2: util::stream_format(stream, "%s", regname[(ef2 >> 6) & 0x3f]); break; + case 0x3: util::stream_format(stream, "+%s", regname[(ef2 >> 6) & 0x3f]); break; + case 0x4: util::stream_format(stream, "%s", regname[(ef2 >> 6) & 0x3f]); break; + case 0x5: util::stream_format(stream, "+%s", regname[(ef2 >> 6) & 0x3f]); break; + case 0x6: util::stream_format(stream, "%s", regname[(ef2 >> 6) & 0x3f]); break; + case 0x7: util::stream_format(stream, "+%s", regname[(ef2 >> 6) & 0x3f]); break; + case 0x8: util::stream_format(stream, "A(%03X)", ef2 & 0x3ff); break; + case 0x9: util::stream_format(stream, "+A(%03X)", ef2 & 0x3ff); break; + case 0xa: util::stream_format(stream, "B(%03X)", ef2 & 0x3ff); break; + case 0xb: util::stream_format(stream, "+B(%03X)", ef2 & 0x3ff); break; + case 0xc: util::stream_format(stream, "A(%s)", regname[(ef2 >> 6) & 0x3f]); break; + case 0xd: util::stream_format(stream, "+A(%s)", regname[(ef2 >> 6) & 0x3f]); break; + case 0xe: util::stream_format(stream, "B(%s)", regname[(ef2 >> 6) & 0x3f]); break; + case 0xf: util::stream_format(stream, "+B(%s)", regname[(ef2 >> 6) & 0x3f]); break; } break; } } - - return buffer; } -static char* dasm_double_xfer1(uint64_t opcode) +static void dasm_double_xfer1(std::ostream &stream, uint64_t opcode) { - static char buffer[80]; - char *p = buffer; - int sd = (opcode >> 25) & 3; + stream << "MVD1 "; + switch (sd) { case 0: @@ -358,7 +349,7 @@ static char* dasm_double_xfer1(uint64_t opcode) int ad = (opcode >> 15) & 0x1f; int bs = (opcode >> 10) & 0x1f; int bd = (opcode >> 5) & 0x1f; - p += sprintf(p, "MVD1 %s, %s, %s, %s", regname[as], regname[ad], regname[bs], regname[bd]); + util::stream_format(stream, "%s, %s, %s, %s", regname[as], regname[ad], regname[bs], regname[bd]); break; } @@ -372,21 +363,19 @@ static char* dasm_double_xfer1(uint64_t opcode) int bary = (opcode >> 4) & 7; int md = opcode & 0xf; - p += sprintf(p, "MVD1 "); - switch (md) { - case 0x0: p += sprintf(p, "%s, A(@AR%d), %s, B(@AR%d)", regname[areg], aarx, regname[breg], barx); break; - case 0x1: p += sprintf(p, "%s, A(@AR%d++), %s, B(@AR%d++)", regname[areg], aarx, regname[breg], barx); break; - case 0x2: p += sprintf(p, "%s, A(@AR%d--), %s, B(@AR%d--)", regname[areg], aarx, regname[breg], barx); break; - case 0x4: p += sprintf(p, "%s, A(@AR%d+AR%d), %s, B(@AR%d+AR%d)", regname[areg], aarx, aary, regname[breg], barx, bary); break; - case 0x5: p += sprintf(p, "%s, A(@AR%d+AR%d++), %s, B(@AR%d+AR%d++)", regname[areg], aarx, aary, regname[breg], barx, bary); break; - case 0x6: p += sprintf(p, "%s, A(@AR%d+AR%d--), %s, B(@AR%d+AR%d--)", regname[areg], aarx, aary, regname[breg], barx, bary); break; - case 0x8: p += sprintf(p, "%s, A(@AR%d+AR%dU), %s, B(@AR%d+AR%dL)", regname[areg], aarx, aary, regname[breg], barx, bary); break; - case 0x9: p += sprintf(p, "%s, A(@AR%d+AR%dL), %s, B(@AR%d+AR%dU)", regname[areg], aarx, aary, regname[breg], barx, bary); break; - case 0xd: p += sprintf(p, "%s, A(@AR%d+[AR%d++]), %s, B(@AR%d+[AR%d++])", regname[areg], aarx, aary, regname[breg], barx, bary); break; - case 0xe: p += sprintf(p, "%s, A(@AR%d+[AR%d--]), %s, B(@AR%d+[AR%d--])", regname[areg], aarx, aary, regname[breg], barx, bary); break; - default: p += sprintf(p, "???"); break; + case 0x0: util::stream_format(stream, "%s, A(@AR%d), %s, B(@AR%d)", regname[areg], aarx, regname[breg], barx); break; + case 0x1: util::stream_format(stream, "%s, A(@AR%d++), %s, B(@AR%d++)", regname[areg], aarx, regname[breg], barx); break; + case 0x2: util::stream_format(stream, "%s, A(@AR%d--), %s, B(@AR%d--)", regname[areg], aarx, regname[breg], barx); break; + case 0x4: util::stream_format(stream, "%s, A(@AR%d+AR%d), %s, B(@AR%d+AR%d)", regname[areg], aarx, aary, regname[breg], barx, bary); break; + case 0x5: util::stream_format(stream, "%s, A(@AR%d+AR%d++), %s, B(@AR%d+AR%d++)", regname[areg], aarx, aary, regname[breg], barx, bary); break; + case 0x6: util::stream_format(stream, "%s, A(@AR%d+AR%d--), %s, B(@AR%d+AR%d--)", regname[areg], aarx, aary, regname[breg], barx, bary); break; + case 0x8: util::stream_format(stream, "%s, A(@AR%d+AR%dU), %s, B(@AR%d+AR%dL)", regname[areg], aarx, aary, regname[breg], barx, bary); break; + case 0x9: util::stream_format(stream, "%s, A(@AR%d+AR%dL), %s, B(@AR%d+AR%dU)", regname[areg], aarx, aary, regname[breg], barx, bary); break; + case 0xd: util::stream_format(stream, "%s, A(@AR%d+[AR%d++]), %s, B(@AR%d+[AR%d++])", regname[areg], aarx, aary, regname[breg], barx, bary); break; + case 0xe: util::stream_format(stream, "%s, A(@AR%d+[AR%d--]), %s, B(@AR%d+[AR%d--])", regname[areg], aarx, aary, regname[breg], barx, bary); break; + default: stream << "???"; break; } break; } @@ -401,38 +390,31 @@ static char* dasm_double_xfer1(uint64_t opcode) int bary = (opcode >> 4) & 7; int md = opcode & 0xf; - p += sprintf(p, "MVD1 "); - switch (md) { - case 0x0: p += sprintf(p, "A(@AR%d), %s, B(@AR%d), %s", aarx, regname[areg], barx, regname[breg]); break; - case 0x1: p += sprintf(p, "A(@AR%d++), %s, B(@AR%d++), %s", aarx, regname[areg], barx, regname[breg]); break; - case 0x2: p += sprintf(p, "A(@AR%d--), %s, B(@AR%d--), %s", aarx, regname[areg], barx, regname[breg]); break; - case 0x4: p += sprintf(p, "A(@AR%d+AR%d), %s, B(@AR%d+AR%d), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; - case 0x5: p += sprintf(p, "A(@AR%d+AR%d++), %s, B(@AR%d+AR%d++), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; - case 0x6: p += sprintf(p, "A(@AR%d+AR%d--), %s, B(@AR%d+AR%d--), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; - case 0x8: p += sprintf(p, "A(@AR%d+AR%dU), %s, B(@AR%d+AR%dL), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; - case 0x9: p += sprintf(p, "A(@AR%d+AR%dL), %s, B(@AR%d+AR%dU), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; - case 0xd: p += sprintf(p, "A(@AR%d+[AR%d++]), %s, B(@AR%d+[AR%d++]), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; - case 0xe: p += sprintf(p, "A(@AR%d+[AR%d--]), %s, B(@AR%d+[AR%d--]), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; - default: p += sprintf(p, "???"); break; + case 0x0: util::stream_format(stream, "A(@AR%d), %s, B(@AR%d), %s", aarx, regname[areg], barx, regname[breg]); break; + case 0x1: util::stream_format(stream, "A(@AR%d++), %s, B(@AR%d++), %s", aarx, regname[areg], barx, regname[breg]); break; + case 0x2: util::stream_format(stream, "A(@AR%d--), %s, B(@AR%d--), %s", aarx, regname[areg], barx, regname[breg]); break; + case 0x4: util::stream_format(stream, "A(@AR%d+AR%d), %s, B(@AR%d+AR%d), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; + case 0x5: util::stream_format(stream, "A(@AR%d+AR%d++), %s, B(@AR%d+AR%d++), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; + case 0x6: util::stream_format(stream, "A(@AR%d+AR%d--), %s, B(@AR%d+AR%d--), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; + case 0x8: util::stream_format(stream, "A(@AR%d+AR%dU), %s, B(@AR%d+AR%dL), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; + case 0x9: util::stream_format(stream, "A(@AR%d+AR%dL), %s, B(@AR%d+AR%dU), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; + case 0xd: util::stream_format(stream, "A(@AR%d+[AR%d++]), %s, B(@AR%d+[AR%d++]), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; + case 0xe: util::stream_format(stream, "A(@AR%d+[AR%d--]), %s, B(@AR%d+[AR%d--]), %s", aarx, aary, regname[areg], barx, bary, regname[breg]); break; + default: stream << "???"; break; } break; } case 3: - p += sprintf(p, "???"); + stream << "???"; break; } - - return buffer; } -static char* dasm_xfer1(uint64_t opcode) +static void dasm_xfer1(std::ostream &stream, uint64_t opcode) { - static char buffer[80]; - char *p = buffer; - int dr = (opcode >> 12) & 0x7f; int sr = (opcode >> 19) & 0x7f; int md = opcode & 0xf; @@ -441,104 +423,61 @@ static char* dasm_xfer1(uint64_t opcode) int trm = (opcode >> 26) & 1; int dir = (opcode >> 25) & 1; + stream << "MOV1 "; + if (trm == 0) { if (sr == 0x58) { - p += sprintf(p, "MOV1 #%03X, %s", (uint32_t)(opcode & 0xfff), regname[dr]); + util::stream_format(stream, "#%03X, %s", (uint32_t)(opcode & 0xfff), regname[dr]); } else { - p += sprintf(p, "MOV1 "); - if ((sr & 0x40) == 0) - { - p += sprintf(p, "%s", regname[sr]); - } + stream << regname[sr]; else - { - if (sr & 0x20) - p += sprintf(p, "B"); - else - p += sprintf(p, "A"); + dasm_ea(stream, md, sr, ary, disp5); - p += sprintf(p, "(%s)", get_ea(md, sr & 7, ary, disp5)); - } - - p += sprintf(p, ", "); + stream << ", "; if ((dr & 0x40) == 0) - { - p += sprintf(p, "%s", regname[dr]); - } + stream << regname[dr]; else - { - if (dr & 0x20) - p += sprintf(p, "B"); - else - p += sprintf(p, "A"); - - p += sprintf(p, "(%s)", get_ea(md, dr & 7, ary, disp5)); - } + dasm_ea(stream, md, dr, ary, disp5); } } else { if (dir == 0) { - p += sprintf(p, "MOV1 "); - if ((dr & 0x40) == 0) - { - p += sprintf(p, "%s, ", regname[dr]); - } + util::stream_format(stream, "%s, ", regname[dr]); else - { - if (dr & 0x20) - p += sprintf(p, "B"); - else - p += sprintf(p, "A"); + dasm_ea(stream, md, dr, ary, disp5); - p += sprintf(p, "(%s)", get_ea(md, dr & 7, ary, disp5)); - } - - p += sprintf(p, "E(@EB+EO++%02X)", sr); + util::stream_format(stream, "E(@EB+EO++%02X)", sr); } else { - p += sprintf(p, "MOV1 E(@EB+EO++%02X), ", sr); + util::stream_format(stream, "E(@EB+EO++%02X), ", sr); if ((dr & 0x40) == 0) - { - p += sprintf(p, "%s", regname[dr]); - } + stream << regname[dr]; else - { - if (dr & 0x20) - p += sprintf(p, "B"); - else - p += sprintf(p, "A"); - - p += sprintf(p, "(%s)", get_ea(md, dr & 7, ary, disp5)); - } + dasm_ea(stream, md, dr, ary, disp5); } } - - return buffer; } -static char* double_xfer2_field(int sd, uint32_t field) +static void dasm_double_xfer2_field(std::ostream &stream, int sd, uint32_t field) { - static char buffer[40]; - char *p = buffer; - switch (sd) { case 0: { int s = (field >> 13) & 0x1f; int d = (field >> 8) & 0x1f; - p += sprintf(p, "%s, %s", regname[s], regname[d]); + util::stream_format(stream, "%s, %s", regname[s], regname[d]); break; } @@ -552,17 +491,17 @@ static char* double_xfer2_field(int sd, uint32_t field) switch (md) { - case 0x0: p += sprintf(p, "%s, A(@AR%d)", regname[reg], arx); break; - case 0x1: p += sprintf(p, "%s, A(@AR%d++)", regname[reg], arx); break; - case 0x2: p += sprintf(p, "%s, A(@AR%d--)", regname[reg], arx); break; - case 0x4: p += sprintf(p, "%s, A(@AR%d+AR%d))", regname[reg], arx, ary); break; - case 0x5: p += sprintf(p, "%s, A(@AR%d+AR%d++)", regname[reg], arx, ary); break; - case 0x6: p += sprintf(p, "%s, A(@AR%d+AR%d--)", regname[reg], arx, ary); break; - case 0x8: p += sprintf(p, "%s, A(@AR%d+AR%dU)", regname[reg], arx, ary); break; - case 0x9: p += sprintf(p, "%s, A(@AR%d+AR%dL)", regname[reg], arx, ary); break; - case 0xd: p += sprintf(p, "%s, A(@AR%d+[AR%d++])", regname[reg], arx, ary); break; - case 0xe: p += sprintf(p, "%s, A(@AR%d+[AR%d--]", regname[reg], arx, ary); break; - default: p += sprintf(p, "???"); break; + case 0x0: util::stream_format(stream, "%s, A(@AR%d)", regname[reg], arx); break; + case 0x1: util::stream_format(stream, "%s, A(@AR%d++)", regname[reg], arx); break; + case 0x2: util::stream_format(stream, "%s, A(@AR%d--)", regname[reg], arx); break; + case 0x4: util::stream_format(stream, "%s, A(@AR%d+AR%d))", regname[reg], arx, ary); break; + case 0x5: util::stream_format(stream, "%s, A(@AR%d+AR%d++)", regname[reg], arx, ary); break; + case 0x6: util::stream_format(stream, "%s, A(@AR%d+AR%d--)", regname[reg], arx, ary); break; + case 0x8: util::stream_format(stream, "%s, A(@AR%d+AR%dU)", regname[reg], arx, ary); break; + case 0x9: util::stream_format(stream, "%s, A(@AR%d+AR%dL)", regname[reg], arx, ary); break; + case 0xd: util::stream_format(stream, "%s, A(@AR%d+[AR%d++])", regname[reg], arx, ary); break; + case 0xe: util::stream_format(stream, "%s, A(@AR%d+[AR%d--]", regname[reg], arx, ary); break; + default: stream << "???"; break; } break; } @@ -577,34 +516,29 @@ static char* double_xfer2_field(int sd, uint32_t field) switch (md) { - case 0x0: p += sprintf(p, "A(@AR%d), %s", arx, regname[reg]); break; - case 0x1: p += sprintf(p, "A(@AR%d++), %s", arx, regname[reg]); break; - case 0x2: p += sprintf(p, "A(@AR%d--), %s", arx, regname[reg]); break; - case 0x4: p += sprintf(p, "A(@AR%d+AR%d), %s", arx, ary, regname[reg]); break; - case 0x5: p += sprintf(p, "A(@AR%d+AR%d++), %s", arx, ary, regname[reg]); break; - case 0x6: p += sprintf(p, "A(@AR%d+AR%d--), %s", arx, ary, regname[reg]); break; - case 0x8: p += sprintf(p, "A(@AR%d+AR%dU), %s", arx, ary, regname[reg]); break; - case 0x9: p += sprintf(p, "A(@AR%d+AR%dL), %s", arx, ary, regname[reg]); break; - case 0xd: p += sprintf(p, "A(@AR%d+[AR%d++]), %s", arx, ary, regname[reg]); break; - case 0xe: p += sprintf(p, "A(@AR%d+[AR%d--]), %s", arx, ary, regname[reg]); break; - default: p += sprintf(p, "???"); break; + case 0x0: util::stream_format(stream, "A(@AR%d), %s", arx, regname[reg]); break; + case 0x1: util::stream_format(stream, "A(@AR%d++), %s", arx, regname[reg]); break; + case 0x2: util::stream_format(stream, "A(@AR%d--), %s", arx, regname[reg]); break; + case 0x4: util::stream_format(stream, "A(@AR%d+AR%d), %s", arx, ary, regname[reg]); break; + case 0x5: util::stream_format(stream, "A(@AR%d+AR%d++), %s", arx, ary, regname[reg]); break; + case 0x6: util::stream_format(stream, "A(@AR%d+AR%d--), %s", arx, ary, regname[reg]); break; + case 0x8: util::stream_format(stream, "A(@AR%d+AR%dU), %s", arx, ary, regname[reg]); break; + case 0x9: util::stream_format(stream, "A(@AR%d+AR%dL), %s", arx, ary, regname[reg]); break; + case 0xd: util::stream_format(stream, "A(@AR%d+[AR%d++]), %s", arx, ary, regname[reg]); break; + case 0xe: util::stream_format(stream, "A(@AR%d+[AR%d--]), %s", arx, ary, regname[reg]); break; + default: stream << "???"; break; } break; } case 3: - p += sprintf(p, "???"); + stream << "???"; break; } - - return buffer; } -static char* dasm_double_xfer2(uint64_t opcode) +static void dasm_double_xfer2(std::ostream &stream, uint64_t opcode) { - static char buffer[80]; - char *p = buffer; - int asd = (opcode >> 38) & 3; int bsd = (opcode >> 18) & 3; @@ -616,43 +550,41 @@ static char* dasm_double_xfer2(uint64_t opcode) int bmd = opcode & 0xf; int arx = (opcode >> 30) & 7; - p += sprintf(p, "MOVI "); + stream << "MOVI "; switch (bmd) { - case 0x0: p += sprintf(p, "B(@BAR%d)", barx); break; - case 0x1: p += sprintf(p, "B(@BAR%d++)", barx); break; - case 0x2: p += sprintf(p, "B(@BAR%d--)", barx); break; - case 0x3: p += sprintf(p, "B(@BAR%d++%02X)", barx, disp3); break; - case 0x4: p += sprintf(p, "B(@BAR%d+BAR%d)", barx, bary); break; - case 0x5: p += sprintf(p, "B(@BAR%d+BAR%d++)", barx, bary); break; - case 0x6: p += sprintf(p, "B(@BAR%d+BAR%d--)", barx, bary); break; - case 0x7: p += sprintf(p, "B(@BAR%d+BAR%d++%02X)", barx, bary, disp3); break; - case 0x8: p += sprintf(p, "B(@BAR%d+BAR%dU)", barx, bary); break; - case 0x9: p += sprintf(p, "B(@BAR%d+BAR%dL)", barx, bary); break; - case 0xa: p += sprintf(p, "B(@BAR%d+%02X)", barx, disp3); break; - case 0xb: p += sprintf(p, "B(@BAR%d+BAR%d+%02X)", barx, bary, disp3); break; - case 0xc: p += sprintf(p, "???"); break; - case 0xd: p += sprintf(p, "B(@BAR%d+[BAR%d++])", barx, bary); break; - case 0xe: p += sprintf(p, "B(@BAR%d+[BAR%d--])", barx, bary); break; - case 0xf: p += sprintf(p, "B(@BAR%d+[BAR%d++%02X])", barx, bary, disp3); break; + case 0x0: util::stream_format(stream, "B(@BAR%d)", barx); break; + case 0x1: util::stream_format(stream, "B(@BAR%d++)", barx); break; + case 0x2: util::stream_format(stream, "B(@BAR%d--)", barx); break; + case 0x3: util::stream_format(stream, "B(@BAR%d++%02X)", barx, disp3); break; + case 0x4: util::stream_format(stream, "B(@BAR%d+BAR%d)", barx, bary); break; + case 0x5: util::stream_format(stream, "B(@BAR%d+BAR%d++)", barx, bary); break; + case 0x6: util::stream_format(stream, "B(@BAR%d+BAR%d--)", barx, bary); break; + case 0x7: util::stream_format(stream, "B(@BAR%d+BAR%d++%02X)", barx, bary, disp3); break; + case 0x8: util::stream_format(stream, "B(@BAR%d+BAR%dU)", barx, bary); break; + case 0x9: util::stream_format(stream, "B(@BAR%d+BAR%dL)", barx, bary); break; + case 0xa: util::stream_format(stream, "B(@BAR%d+%02X)", barx, disp3); break; + case 0xb: util::stream_format(stream, "B(@BAR%d+BAR%d+%02X)", barx, bary, disp3); break; + case 0xc: stream << "???"; break; + case 0xd: util::stream_format(stream, "B(@BAR%d+[BAR%d++])", barx, bary); break; + case 0xe: util::stream_format(stream, "B(@BAR%d+[BAR%d--])", barx, bary); break; + case 0xf: util::stream_format(stream, "B(@BAR%d+[BAR%d++%02X])", barx, bary, disp3); break; } - p += sprintf(p, ", I(@AR%d++)", arx); + util::stream_format(stream, ", I(@AR%d++)", arx); } else { - p += sprintf(p, "MVD2 %s, %s", double_xfer2_field(asd, (opcode >> 20) & 0x3ffff), double_xfer2_field(bsd, opcode & 0x3ffff)); + stream << "MVD2 "; + dasm_double_xfer2_field(stream, asd, (opcode >> 20) & 0x3ffff); + stream << ", "; + dasm_double_xfer2_field(stream, bsd, opcode & 0x3ffff); } - - return buffer; } -static char* dasm_xfer2(uint64_t opcode) +static void dasm_xfer2(std::ostream &stream, uint64_t opcode) { - static char buffer[80]; - char *p = buffer; - int op = (opcode >> 39) & 3; int trm = (opcode >> 38) & 1; int dir = (opcode >> 37) & 1; @@ -664,130 +596,76 @@ static char* dasm_xfer2(uint64_t opcode) if (op == 0) { + stream << "MOV2 "; + if (trm == 0) { if (sr == 0x58) { - p += sprintf(p, "MOV2 #%06X, %s", (uint32_t)(opcode & 0xffffff), regname[dr]); + util::stream_format(stream, "#%06X, %s", (uint32_t)(opcode & 0xffffff), regname[dr]); } else { - p += sprintf(p, "MOV2 "); - if ((sr & 0x40) == 0) - { - p += sprintf(p, "%s", regname[sr]); - } + stream << regname[sr]; else - { - if (sr & 0x20) - p += sprintf(p, "B"); - else - p += sprintf(p, "A"); - - p += sprintf(p, "(%s)", get_ea(md, sr & 7, ary, disp14)); - } + dasm_ea(stream, md, sr, ary, disp14); - p += sprintf(p, ", "); + stream << ", "; if ((dr & 0x40) == 0) - { - p += sprintf(p, "%s", regname[dr]); - } + stream << regname[dr]; else - { - if (dr & 0x20) - p += sprintf(p, "B"); - else - p += sprintf(p, "A"); - - p += sprintf(p, "(%s)", get_ea(md, dr & 7, ary, disp14)); - } + dasm_ea(stream, md, dr, ary, disp14); } } else { if (dir == 0) - { - p += sprintf(p, "MOV2 %s, E(@EB+EO++%02X)", regname[dr], sr); - } + util::stream_format(stream, "%s, E(@EB+EO++%02X)", regname[dr], sr); else - { - p += sprintf(p, "MOV2 E(@EB+EO++%02X), %s", sr, regname[dr]); - } + util::stream_format(stream, "E(@EB+EO++%02X), %s", sr, regname[dr]); } } else if (op == 2) { + stream << "MOV4 "; + if (trm == 0) { if ((sr & 0x40) == 0) - { - p += sprintf(p, "MOV4 %s, ICDTR%d", regname[sr], dr & 7); - } + stream << regname[sr]; + else if (sr == 0x58) + util::stream_format(stream, "#%06X", (uint32_t)(opcode & 0xffffff)); else - { - if (sr == 0x58) - { - p += sprintf(p, "MOV4 #%06X, ICDTR%d", (uint32_t)(opcode & 0xffffff), dr & 7); - } - else - { - p += sprintf(p, "MOV4 "); + dasm_ea(stream, md, sr, ary, disp14); - if (sr & 0x20) - p += sprintf(p, "B"); - else - p += sprintf(p, "A"); - - p += sprintf(p, "(%s), ICDTR%d", get_ea(md, sr & 7, ary, disp14), dr & 7); - } - } + util::stream_format(stream, ", ICDTR%d", dr & 7); } else { if (dir == 0) - { - p += sprintf(p, "MOV4 ICDTR%d, E(@EB+EO++%02X)", dr & 7, sr); - } + util::stream_format(stream, "ICDTR%d, E(@EB+EO++%02X)", dr & 7, sr); else - { - p += sprintf(p, "MOV4 E(@EB+EO++%02X), ICDTR%d", sr, dr & 7); - } + util::stream_format(stream, "E(@EB+EO++%02X), ICDTR%d", sr, dr & 7); } } - - return buffer; } -static char* dasm_xfer3(uint64_t opcode) +static void dasm_xfer3(std::ostream &stream, uint64_t opcode) { - static char buffer[80]; - char *p = buffer; - uint32_t imm = (uint32_t)(opcode >> 27); int dr = (opcode >> 19) & 0x7f; int disp = (opcode >> 7) & 0xfff; int ary = (opcode >> 4) & 7; int md = opcode & 0xf; - p += sprintf(p, "MOV3 #%08X, ", imm); + util::stream_format(stream, "MOV3 #%08X, ", imm); if ((dr & 0x40) == 0) - { - p += sprintf(p, "%s", regname[dr]); - } + stream << regname[dr]; else - { - if (dr & 0x20) - p += sprintf(p, "B"); - else - p += sprintf(p, "A"); - - p += sprintf(p, "(%s)", get_ea(md, dr & 7, ary, disp)); - } - - return buffer; + dasm_ea(stream, md, dr, ary, disp); } static unsigned dasm_mb86235(std::ostream &stream, uint32_t pc, uint64_t opcode) @@ -795,29 +673,41 @@ static unsigned dasm_mb86235(std::ostream &stream, uint32_t pc, uint64_t opcode) switch ((opcode >> 61) & 7) { case 0: // ALU / MUL / double transfer (type 1) - util::stream_format(stream, "%s : %s", dasm_alu_mul(opcode, true), dasm_double_xfer1(opcode)); + dasm_alu_mul(stream, opcode, true); + stream << " : "; + dasm_double_xfer1(stream, opcode); break; case 1: // ALU / MYL / transfer (type 1) - util::stream_format(stream, "%s : %s", dasm_alu_mul(opcode, true), dasm_xfer1(opcode)); + dasm_alu_mul(stream, opcode, true); + stream << " : "; + dasm_xfer1(stream, opcode); break; case 2: // ALU / MUL / control - util::stream_format(stream, "%s : %s", dasm_alu_mul(opcode, true), dasm_control(pc, opcode)); + dasm_alu_mul(stream, opcode, true); + stream << " : "; + dasm_control(stream, pc, opcode); break; case 4: // ALU or MUL / double transfer (type 2) - util::stream_format(stream, "%s : %s", dasm_alu_mul(opcode, false), dasm_double_xfer2(opcode)); + dasm_alu_mul(stream, opcode, false); + stream << " : "; + dasm_double_xfer2(stream, opcode); break; case 5: // ALU or MUL / transfer (type 2) - util::stream_format(stream, "%s : %s", dasm_alu_mul(opcode, false), dasm_xfer2(opcode)); + dasm_alu_mul(stream, opcode, false); + stream << " : "; + dasm_xfer2(stream, opcode); break; case 6: // ALU or MUL / control - util::stream_format(stream, "%s : %s", dasm_alu_mul(opcode, false), dasm_control(pc, opcode)); + dasm_alu_mul(stream, opcode, false); + stream << " : "; + dasm_control(stream, pc, opcode); break; case 7: // transfer (type 3) - util::stream_format(stream, "%s", dasm_xfer3(opcode)); + dasm_xfer3(stream, opcode); break; default: - util::stream_format(stream, "???"); + stream << "???"; break; } diff --git a/src/devices/machine/z80scc.cpp b/src/devices/machine/z80scc.cpp index e2b14c3ec63..51e92d27a55 100644 --- a/src/devices/machine/z80scc.cpp +++ b/src/devices/machine/z80scc.cpp @@ -88,6 +88,7 @@ DONE (x) (p=partly) NMOS CMOS ESCC EMSCC #define LOGRCV(x) {} LOGPRINT(x) #define LOGCTS(x) {} LOGPRINT(x) #define LOGDCD(x) {} LOGPRINT(x) +#define LOGSYNC(x) {} LOGPRINT(x) #if VERBOSE == 2 #define logerror printf #endif @@ -856,7 +857,7 @@ z80scc_channel::z80scc_channel(const machine_config &mconfig, const char *tag, d m_tx_clock(0), m_dtr(0), m_rts(0), - m_sync(0) + m_sync_pattern(0) #if START_BIT_HUNT ,m_rcv_mode(RCV_IDLE) #endif @@ -956,7 +957,7 @@ void z80scc_channel::device_start() save_item(NAME(m_tx_clock)); save_item(NAME(m_dtr)); save_item(NAME(m_rts)); - save_item(NAME(m_sync)); + save_item(NAME(m_sync_pattern)); device_serial_interface::register_save_state(machine().save(), this); } @@ -1434,6 +1435,7 @@ uint8_t z80scc_channel::do_sccreg_rr6() LOGR(("%s\n", FUNCNAME)); if (m_wr15 & WR15_STATUS_FIFO) { + LOGSYNC((" - Status FIFO for synchronous mode - not implemented\n")); logerror(" - Status FIFO for synchronous mode - not implemented\n"); return 0; } @@ -1635,13 +1637,13 @@ void z80scc_channel::do_sccreg_wr0_resets(uint8_t data) LOG((" CRC_RESET_NULL\n")); break; case WR0_CRC_RESET_RX: /* In Synchronous mode: all Os (zeros) (CCITT-O CRC-16) */ - LOG((" CRC_RESET_RX - not implemented\n")); + LOGSYNC((" CRC_RESET_RX - not implemented\n")); break; case WR0_CRC_RESET_TX: /* In HDLC mode: all 1s (ones) (CCITT-1) */ - LOG((" CRC_RESET_TX - not implemented\n")); + LOGSYNC((" CRC_RESET_TX - not implemented\n")); break; case WR0_CRC_RESET_TX_UNDERRUN: /* Resets Tx underrun/EOM bit (D6 of the RRO register) */ - LOG((" CRC_RESET_TX_UNDERRUN - not implemented\n")); + LOGSYNC((" CRC_RESET_TX_UNDERRUN - not implemented\n")); break; default: /* Will not happen unless someone messes with the mask */ logerror(" Wrong CRC reset/init command:%02x\n", data & WR0_CRC_RESET_CODE_MASK); @@ -1793,9 +1795,9 @@ void z80scc_channel::do_sccreg_wr1(uint8_t data) m_uart->check_interrupts(); } -/*WR2 is the interrupt vector register. Only one vector register exists in the SCC, and it can be -accessed through either channel. The interrupt vector can be modified by status information. This -is controlled by the Vector Includes Status (VIS) and the Status High/Status Low bits in WR9.*/ +/* WR2 is the interrupt vector register. Only one vector register exists in the SCC, and it can be + accessed through either channel. The interrupt vector can be modified by status information. This + is controlled by the Vector Includes Status (VIS) and the Status High/Status Low bits in WR9.*/ void z80scc_channel::do_sccreg_wr2(uint8_t data) { LOG(("%s(%02x) Setting the interrupt vector\n", FUNCNAME, data)); @@ -1806,13 +1808,29 @@ void z80scc_channel::do_sccreg_wr2(uint8_t data) m_uart->check_interrupts(); } +/* + In the SDLC modes, the Sync/Hunt bit is initially set by the Enter Hunt Mode command or when + the receiver is disabled. It is reset when the opening flag of the first frame is detected by the SCC. + An External/Status interrupt is also generated if the Sync/Hunt IE bit is set. Unlike the Monosync + and Bisync modes, once the Sync/Hunt bit is reset in SDLC mode, it does not need to be set when + the end of the frame is detected. The SCC automatically maintains synchronization. The only way + the Sync/Hunt bit is set again is by the Enter Hunt Mode command or by disabling the receiver.*/ void z80scc_channel::do_sccreg_wr3(uint8_t data) { LOG(("%s(%02x) Setting up the receiver\n", FUNCNAME, data)); m_wr3 = data; - LOG(("- Receiver Enable %u\n", (data & WR3_RX_ENABLE) ? 1 : 0)); - LOG(("- Auto Enables %u\n", (data & WR3_AUTO_ENABLES) ? 1 : 0)); + LOG(("- Receiver Enable: %u\n", (data & WR3_RX_ENABLE) ? 1 : 0)); + LOG(("- Sync Char Load Inhibit %u\n", (data & WR3_SYNC_CHAR_LOAD_INHIBIT) ? 1 : 0)); + LOG(("- Address Search Mode %u\n", (data & WR3_ADDRESS_SEARCH_MODE) ? 1 : 0)); + LOG(("- Rx CRC Enable %u\n", (data & WR3_RX_CRC_ENABLE) ? 1 : 0)); + LOG(("- Enter Hunt Mode %u\n", (data & WR3_ENTER_HUNT_MODE) ? 1 : 0)); + LOG(("- Auto Enables %u\n", (data & WR3_AUTO_ENABLES) ? 1 : 0)); LOG(("- Receiver Bits/Character %u\n", get_rx_word_length())); + + if ((m_wr3 & WR3_ENTER_HUNT_MODE) || ((m_wr3 & WR3_RX_ENABLE) == 0)) + { + m_rr0 |= RR0_SYNC_HUNT; // Set the sync/hunt bit + } update_serial(); receive_register_reset(); } @@ -1827,10 +1845,14 @@ void z80scc_channel::do_sccreg_wr4(uint8_t data) else { m_wr4 = data; - LOG(("- Parity Enable %u\n", (data & WR4_PARITY_ENABLE) ? 1 : 0)); - LOG(("- Parity %s\n", (data & WR4_PARITY_EVEN) ? "Even" : "Odd")); - LOG(("- Stop Bits %s\n", stop_bits_tostring(get_stop_bits()))); - LOG(("- Clock Mode %uX\n", get_clock_mode())); + LOG(("- Parity : %s\n", (data & WR4_PARITY_ENABLE) ? ((data & WR4_PARITY_EVEN) ? "Even" : "Odd") : "None")); + LOG(("- Stop Bits : %s\n", data & WR4_STOP_BITS_MASK ? stop_bits_tostring(get_stop_bits()) : "not used, sync modes enabled" )); + LOG(("- Sync Mode : %s\n", !(data & WR4_STOP_BITS_MASK) ? + (data & WR4_BIT5 ? + (data & WR4_BIT4 ? "External Sync Mode - /SYNC is used as input!" : "SDLC - not implemented") + : (data & WR4_BIT4 ? "16 bit" : "8 bit")) + : "Disabled")); + LOG(("- Clock Mode: %uX\n", get_clock_mode())); update_serial(); safe_transmit_register_reset(); receive_register_reset(); @@ -1861,13 +1883,13 @@ void z80scc_channel::do_sccreg_wr5(uint8_t data) void z80scc_channel::do_sccreg_wr6(uint8_t data) { LOG(("%s(%02x) Transmit sync\n", FUNCNAME, data)); - m_sync = (m_sync & 0xff00) | data; + m_sync_pattern = (m_sync_pattern & 0xff00) | data; } void z80scc_channel::do_sccreg_wr7(uint8_t data) { LOG(("%s(%02x) Receive sync\n", FUNCNAME, data)); - m_sync = (data << 8) | (m_sync & 0xff); + m_sync_pattern = (data << 8) | (m_sync_pattern & 0xff); } /* WR8 is the transmit buffer register */ @@ -1924,13 +1946,21 @@ void z80scc_channel::do_sccreg_wr9(uint8_t data) } } -/* WR10 contains miscellaneous control bits for both the receiver and the transmitter. Bit positions -for WR10 are displayed in Figure . On the ESCC and 85C30 with the Extended Read option -enabled, this register may be read as RR11.*/ +/* WR10 contains miscellaneous control bits for both the receiver and the transmitter. + On the ESCC and 85C30 with the Extended Read option enabled, this register may be read as RR11.*/ void z80scc_channel::do_sccreg_wr10(uint8_t data) { m_wr10 = data; LOG(("\"%s\": %c : %s Misc Tx/Rx Control %02x - not implemented \n", m_owner->tag(), 'A' + m_index, FUNCNAME, data)); + LOG(("- 6/8 bit sync %d\n", data & WR10_8_6_BIT_SYNC ? 1 : 0)); + LOG(("- Loop Mode %d\n", data & WR10_LOOP_MODE ? 1 : 0)); + LOG(("- Abort/Flag on underrun %d\n", data & WR10_ABORT_FLAG_UNDERRUN ? 1 : 0)); + LOG(("- Mark/Flag Idle line %d\n", data & WR10_MARK_FLAG_IDLE ? 1 : 0)); + LOG(("- Go active on poll %d\n", data & WR10_GO_ACTIVE_ON_POLL ? 1 : 0)); + LOG(("- Encoding %s\n", data & WR10_BIT6 ? + (data & WR10_BIT5 ? "FM0" : "FM1") : + (data & WR10_BIT5 ? "NRZI" : "NRZ") )); + LOG(("- CRC Preset %d\n", data & WR10_CRC_PRESET ? 1 : 0)); } /* WR11 is the Clock Mode Control register. The bits in this register control the sources of both the @@ -1948,7 +1978,7 @@ void z80scc_channel::do_sccreg_wr11(uint8_t data) /SYNC pin is unavailable for other use. The /SYNC signal is forced to zero internally. A hardware reset forces /NO XTAL. (At least 20 ms should be allowed after this bit is set to allow the oscillator to stabilize.)*/ - LOG((" Clock type %s\n", data & WR11_RCVCLK_TYPE ? "Crystal oscillator between RTxC and /SYNC pins" : "TTL level on RTxC pin")); + LOG((" Clock type %s\n", data & WR11_RCVCLK_TYPE ? "Crystal oscillator between RTxC and /SYNC pins" : "TTL level on RTxC pin and /SYNC can be used")); /*Bits 6 and 5: Receiver Clock select bits 1 and 0 These bits determine the source of the receive clock as listed below. They do not interfere with any of the modes of operation in the SCC, but simply control a multiplexer just @@ -2137,16 +2167,16 @@ void z80scc_channel::do_sccreg_wr14(uint8_t data) #define WR15NO "not implemented" void z80scc_channel::do_sccreg_wr15(uint8_t data) { - LOGINT(("%s(%02x) \"%s\": %c : External/Status Control Bits\n", + LOG(("%s(%02x) \"%s\": %c : External/Status Control Bits\n", FUNCNAME, data, m_owner->tag(), 'A' + m_index)); - LOGINT(("WR7 prime ints : %s\n", data & WR15_WR7PRIME ? WR15NO : "disabled")); - LOGINT(("Zero count ints : %s\n", data & WR15_ZEROCOUNT ? WR15NO : "disabled")); - LOGINT(("14 bit Status FIFO : %s\n", data & WR15_STATUS_FIFO ? WR15NO : "disabled")); - LOGINT(("DCD ints : %s\n", data & WR15_DCD ? WR15EN : "disabled")); - LOGINT(("SYNC/Hunt ints : %s\n", data & WR15_SYNC ? WR15NO : "disabled")); - LOGINT(("CTS ints : %s\n", data & WR15_CTS ? WR15EN : "disabled")); - LOGINT(("Tx underr./EOM ints: %s\n", data & WR15_TX_EOM ? WR15NO : "disabled")); - LOGINT(("Break/Abort ints : %s\n", data & WR15_BREAK_ABORT ? WR15NO : "disabled")); + LOG(("WR7 prime ints : %s\n", data & WR15_WR7PRIME ? WR15NO : "disabled")); + LOG(("Zero count ints : %s\n", data & WR15_ZEROCOUNT ? WR15NO : "disabled")); + LOG(("14 bit Status FIFO : %s\n", data & WR15_STATUS_FIFO ? WR15NO : "disabled")); + LOG(("DCD ints : %s\n", data & WR15_DCD ? WR15EN : "disabled")); + LOG(("SYNC/Hunt ints : %s\n", data & WR15_SYNC ? WR15NO : "disabled")); + LOG(("CTS ints : %s\n", data & WR15_CTS ? WR15EN : "disabled")); + LOG(("Tx underr./EOM ints: %s\n", data & WR15_TX_EOM ? WR15NO : "disabled")); + LOG(("Break/Abort ints : %s\n", data & WR15_BREAK_ABORT ? WR15NO : "disabled")); m_wr15 = data; } @@ -2578,11 +2608,15 @@ WRITE_LINE_MEMBER( z80scc_channel::ri_w ) } //------------------------------------------------- -// sync_w - sync handler +// sync_w - sync handler for external sync mode //------------------------------------------------- WRITE_LINE_MEMBER( z80scc_channel::sync_w ) { - LOGINT(("\"%s\": %c : SYNC %u - not implemented\n", m_owner->tag(), 'A' + m_index, state)); + LOGSYNC(("\"%s\": %c : SYNC %u\n", m_owner->tag(), 'A' + m_index, state)); + if ((m_rr0 & RR0_SYNC_HUNT) != (state ? RR0_SYNC_HUNT : 0)) // SCC change detection logic + { + if (state) m_rr0 |= RR0_SYNC_HUNT; else m_rr0 &= ~RR0_SYNC_HUNT; // Raw pin/status value + } } //------------------------------------------------- diff --git a/src/devices/machine/z80scc.h b/src/devices/machine/z80scc.h index 6884221fcf0..c2b0f81a68d 100644 --- a/src/devices/machine/z80scc.h +++ b/src/devices/machine/z80scc.h @@ -310,10 +310,10 @@ protected: { REG_WR0_COMMAND_REGPT = 0, REG_WR1_INT_DMA_ENABLE = 1, - REG_WR2_INT_VECTOR = 2, - REG_WR3_RX_CONTROL = 3, - REG_WR4_RX_TX_MODES = 4, - REG_WR5_TX_CONTROL = 5, + REG_WR2_INT_VECTOR = 2, + REG_WR3_RX_CONTROL = 3, + REG_WR4_RX_TX_MODES = 4, + REG_WR5_TX_CONTROL = 5, REG_WR6_SYNC_OR_SDLC_A = 6, REG_WR7_SYNC_OR_SDLC_F = 7, REG_WR8_TRANSMIT_DATA = 8, @@ -322,7 +322,7 @@ protected: REG_WR11_CLOCK_MODES = 11, REG_WR12_LO_BAUD_GEN = 12, REG_WR13_HI_BAUD_GEN = 13, - REG_WR14_MISC_CTRL = 14, + REG_WR14_MISC_CTRL = 14, REG_WR15_EXT_ST_INT_CTRL= 15 }; @@ -332,24 +332,24 @@ protected: RR0_ZC = 0x02, RR0_TX_BUFFER_EMPTY = 0x04, RR0_DCD = 0x08, - RR0_SYNC_HUNT = 0x10, // SIO bit, not supported - RR0_CTS = 0x20, // SIO bit - RR0_TX_UNDERRUN = 0x40, // SIO bit, not supported - RR0_BREAK_ABORT = 0x80 // SIO bit, not supported + RR0_SYNC_HUNT = 0x10, + RR0_CTS = 0x20, + RR0_TX_UNDERRUN = 0x40, + RR0_BREAK_ABORT = 0x80 }; enum { - RR1_ALL_SENT = 0x01, // SIO/SCC bit - RR1_RESIDUE_CODE_MASK = 0x0e, // SIO/SCC bits, not supported - RR1_PARITY_ERROR = 0x10, // SIO/SCC bits - RR1_RX_OVERRUN_ERROR = 0x20, // SIO/SCC bits - RR1_CRC_FRAMING_ERROR = 0x40, // SIO/SCC bits - RR1_END_OF_FRAME = 0x80 // SIO/SCC bits, not supported + RR1_ALL_SENT = 0x01, + RR1_RESIDUE_CODE_MASK = 0x0e, + RR1_PARITY_ERROR = 0x10, + RR1_RX_OVERRUN_ERROR = 0x20, + RR1_CRC_FRAMING_ERROR = 0x40, + RR1_END_OF_FRAME = 0x80 }; enum - { // TODO: overload SIO functionality + { RR2_INT_VECTOR_MASK = 0xff, // SCC channel A, SIO channel B (special case) RR2_INT_VECTOR_V1 = 0x02, // SIO (special case) /SCC Channel B RR2_INT_VECTOR_V2 = 0x04, // SIO (special case) /SCC Channel B @@ -409,21 +409,21 @@ protected: WR1_RX_INT_MODE_MASK = 0x18, WR1_RX_INT_DISABLE = 0x00, WR1_RX_INT_FIRST = 0x08, - WR1_RX_INT_ALL_PARITY = 0x10, // not supported + WR1_RX_INT_ALL_PARITY = 0x10, WR1_RX_INT_ALL = 0x18, - WR1_WRDY_ON_RX_TX = 0x20, // not supported - WR1_WRDY_FUNCTION = 0x40, // not supported - WR1_WRDY_ENABLE = 0x80 // not supported + WR1_WRDY_ON_RX_TX = 0x20, + WR1_WRDY_FUNCTION = 0x40, + WR1_WRDY_ENABLE = 0x80 }; enum { - WR3_RX_ENABLE = 0x01, - WR3_SYNC_CHAR_LOAD_INHIBIT = 0x02, // not supported - WR3_ADDRESS_SEARCH_MODE = 0x04, // not supported - WR3_RX_CRC_ENABLE = 0x08, // not supported - WR3_ENTER_HUNT_PHASE = 0x10, // not supported - WR3_AUTO_ENABLES = 0x20, + WR3_RX_ENABLE = 0x01, + WR3_SYNC_CHAR_LOAD_INHIBIT = 0x02, + WR3_ADDRESS_SEARCH_MODE = 0x04, + WR3_RX_CRC_ENABLE = 0x08, + WR3_ENTER_HUNT_MODE = 0x10, + WR3_AUTO_ENABLES = 0x20, WR3_RX_WORD_LENGTH_MASK = 0xc0, WR3_RX_WORD_LENGTH_5 = 0x00, WR3_RX_WORD_LENGTH_7 = 0x40, @@ -437,13 +437,15 @@ protected: WR4_PARITY_EVEN = 0x02, WR4_STOP_BITS_MASK = 0x0c, WR4_STOP_BITS_1 = 0x04, - WR4_STOP_BITS_1_5 = 0x08, // not supported + WR4_STOP_BITS_1_5 = 0x08, WR4_STOP_BITS_2 = 0x0c, - WR4_SYNC_MODE_MASK = 0x30, // not supported - WR4_SYNC_MODE_8_BIT = 0x00, // not supported - WR4_SYNC_MODE_16_BIT = 0x10, // not supported - WR4_SYNC_MODE_SDLC = 0x20, // not supported - WR4_SYNC_MODE_EXT = 0x30, // not supported + WR4_SYNC_MODE_MASK = 0x30, + WR4_SYNC_MODE_8_BIT = 0x00, + WR4_SYNC_MODE_16_BIT = 0x10, + WR4_BIT4 = 0x10, + WR4_SYNC_MODE_SDLC = 0x20, + WR4_BIT5 = 0x20, + WR4_SYNC_MODE_EXT = 0x30, WR4_CLOCK_RATE_MASK = 0xc0, WR4_CLOCK_RATE_X1 = 0x00, WR4_CLOCK_RATE_X16 = 0x40, @@ -453,11 +455,11 @@ protected: enum { - WR5_TX_CRC_ENABLE = 0x01, // not supported - WR5_RTS = 0x02, - WR5_CRC16 = 0x04, // not supported - WR5_TX_ENABLE = 0x08, - WR5_SEND_BREAK = 0x10, + WR5_TX_CRC_ENABLE = 0x01, + WR5_RTS = 0x02, + WR5_CRC16 = 0x04, + WR5_TX_ENABLE = 0x08, + WR5_SEND_BREAK = 0x10, WR5_TX_WORD_LENGTH_MASK = 0x60, WR5_TX_WORD_LENGTH_5 = 0x00, WR5_TX_WORD_LENGTH_6 = 0x40, @@ -479,16 +481,33 @@ protected: WR9_CMD_CHNB_RESET = 0x40, WR9_CMD_CHNA_RESET = 0x80, WR9_CMD_HW_RESET = 0xC0, - WR9_BIT_VIS = 0x01, - WR9_BIT_NV = 0x02, - WR9_BIT_DLC = 0x04, - WR9_BIT_MIE = 0x08, + WR9_BIT_VIS = 0x01, + WR9_BIT_NV = 0x02, + WR9_BIT_DLC = 0x04, + WR9_BIT_MIE = 0x08, WR9_BIT_SHSL = 0x10, WR9_BIT_IACK = 0x20 }; enum { + WR10_8_6_BIT_SYNC = 0x01, + WR10_LOOP_MODE = 0x02, + WR10_ABORT_FLAG_UNDERRUN = 0x04, + WR10_MARK_FLAG_IDLE = 0x08, + WR10_GO_ACTIVE_ON_POLL = 0x10, + WR10_ENCODING_MASK = 0x60, + WR10_NRZ_ENCODING = 0x00, + WR10_NRZI_ENCODING = 0x20, + WR10_BIT5 = 0x20, + WR10_FM1_ENCODING = 0x40, + WR10_BIT6 = 0x40, + WR10_FM0_ENCODING = 0x60, + WR10_CRC_PRESET = 0x80 + }; + + enum + { WR11_RCVCLK_TYPE = 0x80, WR11_RCVCLK_SRC_MASK = 0x60, // RCV CLOCK WR11_RCVCLK_SRC_RTXC = 0x00, // 0 0 @@ -600,7 +619,7 @@ protected: int m_rts; // request to send // synchronous state - uint16_t m_sync; // sync character + uint16_t m_sync_pattern; // sync character int m_rcv_mode; int m_index; diff --git a/src/devices/video/upd7220.cpp b/src/devices/video/upd7220.cpp index cc6d9a1ffca..94f88c85769 100644 --- a/src/devices/video/upd7220.cpp +++ b/src/devices/video/upd7220.cpp @@ -816,11 +816,12 @@ void upd7220_device::draw_line(int x, int y) { int xi, yi; int d = (m_figs.m_d & 0x2000) ? (int16_t)(m_figs.m_d | 0xe000) : m_figs.m_d; + int d1 = (m_figs.m_d1 & 0x2000) ? (int16_t)(m_figs.m_d1 | 0xe000) : m_figs.m_d1; int d2 = (m_figs.m_d2 & 0x2000) ? (int16_t)(m_figs.m_d2 | 0xe000) : m_figs.m_d2; uint16_t pattern = (m_ra[8]) | (m_ra[9]<<8); const int dot_dir[4] = {1, -1, -1, 1}; - LOG(("uPD7220 line check: %d %d %02x %08x %d %d %d\n",x,y,m_figs.m_dir,m_ead,m_figs.m_d1,m_figs.m_dc,m_bitmap_mod)); + LOG(("uPD7220 line check: %d %d %02x %08x %d %d %d\n",x,y,m_figs.m_dir,m_ead,d1,m_figs.m_dc,m_bitmap_mod)); for(yi = xi = 0; yi <= m_figs.m_dc; yi++) { @@ -840,7 +841,7 @@ void upd7220_device::draw_line(int x, int y) d += d2; } else - d += m_figs.m_d1; + d += d1; } switch(m_figs.m_dir & 3) @@ -866,48 +867,34 @@ void upd7220_device::draw_line(int x, int y) void upd7220_device::draw_arc(int x, int y) { - int xi = m_figs.m_d + 1, yi = 0, err = -m_figs.m_d; - int x0, y0; + int xi = 0, err = -m_figs.m_d, d = m_figs.m_d + 1; uint16_t pattern = (m_ra[8]) | (m_ra[9]<<8); const int dot_dir[4] = {1, -1, -1, 1}; - switch(m_figs.m_dir & 3) - { - case 1: - case 2: - x0 = x; - y0 = y + xi * dot_dir[m_figs.m_dir >> 1]; - break; - default: - x0 = x + xi * dot_dir[((m_figs.m_dir >> 1) + 3) & 3]; - y0 = y; - break; - } - LOG(("uPD7220 arc check: %d %d %02x %08x %d %d %d\n",x,y,m_figs.m_dir,m_ead,m_figs.m_dm,m_figs.m_dc,m_figs.m_d)); - for(int i = 0; i <= m_figs.m_dc; i++) + for(int yi = 0; yi <= m_figs.m_dc; yi++) { - if(i >= m_figs.m_dm) + if(yi >= m_figs.m_dm) { switch(m_figs.m_dir & 3) { case 1: case 2: - draw_pixel(yi * dot_dir[((m_figs.m_dir >> 1) + 3) & 3] + x0, xi * dot_dir[m_figs.m_dir >> 1] + y0, i, pattern); + draw_pixel(yi * dot_dir[((m_figs.m_dir >> 1) + 3) & 3] + x, xi * dot_dir[m_figs.m_dir >> 1] + y, yi, pattern); break; default: - draw_pixel(xi * dot_dir[m_figs.m_dir >> 1] + x0, yi * dot_dir[((m_figs.m_dir >> 1) + 3) & 3] + y0, i, pattern); + draw_pixel(xi * dot_dir[((m_figs.m_dir >> 1) + 3) & 3] + x, yi * dot_dir[m_figs.m_dir >> 1] + y, yi, pattern); break; } } - yi++; if(err < 0) err += (yi + 1) << 1; else { - xi--; - err += (yi - xi + 1) << 1; + xi++; + d--; + err += (yi - d + 1) << 1; } } switch(m_figs.m_dir & 3) diff --git a/src/mame/drivers/amusco.cpp b/src/mame/drivers/amusco.cpp index 4ce44b35493..4de43260602 100644 --- a/src/mame/drivers/amusco.cpp +++ b/src/mame/drivers/amusco.cpp @@ -39,11 +39,10 @@ CPU socket. Some of the other chips on this board were replaced with clones (e.g. AMD P8253, SY6545-1). - The program code reads from and writes to what must be a line printer and a RTC + The program code reads from and writes to a 40-column line printer and a RTC (probably a MSM5832), though neither is present on the main board. The I/O write patterns also suggest that each or both of these devices are accessed through an - Intel 8155 or compatible interface chip. The printer appears to use non-Epson - control codes: ETB, DLE, DC4, DC2, SO, EM, DC1 and STX. + Intel 8155 or compatible interface chip. The printer uses NCR-style control codes. ***************************************************************************************** @@ -66,7 +65,8 @@ - Make the 6845 transparent videoram addressing actually transparent. (IRQ1 changes the 6845 address twice but neither reads nor writes data?) - Add NVRAM in a way that won't trigger POST error message (needs NMI on shutdown?) - - Identify remaining outputs from first PPI (button lamps and coin counter are identified and implemented) + - Identify remaining outputs from first PPI (button lamps are identified and implemented) + - Draw 88 Poker fails POST memory test for some weird reason (IRQ interference?) *******************************************************************************/ @@ -80,6 +80,8 @@ #define PIT_CLOCK0 SECOND_CLOCK / 8 /* guess */ #define PIT_CLOCK1 SECOND_CLOCK / 8 /* guess */ +#define COIN_IMPULSE 3 + #include "emu.h" #include "cpu/i86/i86.h" #include "video/mc6845.h" @@ -111,9 +113,7 @@ public: TILE_GET_INFO_MEMBER(get_bg_tile_info); virtual void video_start() override; virtual void machine_start() override; - DECLARE_READ8_MEMBER(hack_coin1_r); - DECLARE_READ8_MEMBER(hack_coin2_r); - DECLARE_READ8_MEMBER(hack_bill_r); + DECLARE_WRITE_LINE_MEMBER(coin_irq); DECLARE_READ8_MEMBER(mc6845_r); DECLARE_WRITE8_MEMBER(mc6845_w); DECLARE_WRITE8_MEMBER(output_a_w); @@ -174,44 +174,11 @@ void amusco_state::machine_start() } -/************************** -* Read / Write Handlers * -**************************/ - -READ8_MEMBER(amusco_state::hack_coin1_r) -{ - // actually set by IRQ4 - return BIT(ioport("IN2")->read(), 1) ? 1 : 0; -} - -READ8_MEMBER(amusco_state::hack_coin2_r) -{ - // actually set by IRQ4 - return BIT(ioport("IN2")->read(), 2) ? 1 : 0; -} - -READ8_MEMBER(amusco_state::hack_bill_r) -{ - // actually set by IRQ4 - return BIT(ioport("IN1")->read(), 2) ? 0 : 1; -} - /************************* * Memory Map Information * *************************/ static ADDRESS_MAP_START( amusco_mem_map, AS_PROGRAM, 8, amusco_state ) - AM_RANGE(0x006a6, 0x006a6) AM_READ(hack_coin1_r) - AM_RANGE(0x006a8, 0x006a8) AM_READ(hack_coin2_r) - AM_RANGE(0x00000, 0x0ffff) AM_RAM - AM_RANGE(0xec000, 0xecfff) AM_RAM AM_SHARE("videoram") // placeholder - AM_RANGE(0xf8000, 0xfffff) AM_ROM -ADDRESS_MAP_END - -static ADDRESS_MAP_START( draw88pkr_mem_map, AS_PROGRAM, 8, amusco_state ) - AM_RANGE(0x006ae, 0x006ae) AM_READ(hack_coin1_r) - AM_RANGE(0x006b0, 0x006b0) AM_READ(hack_coin2_r) - AM_RANGE(0x0069a, 0x0069a) AM_READ(hack_bill_r) AM_RANGE(0x00000, 0x0ffff) AM_RAM AM_RANGE(0xec000, 0xecfff) AM_RAM AM_SHARE("videoram") // placeholder AM_RANGE(0xf8000, 0xfffff) AM_ROM @@ -273,14 +240,16 @@ WRITE8_MEMBER(amusco_state::output_b_w) 7654 3210 ---- --x- Unknown lamp (lits when all holds/disc are ON. Could be a Cancel lamp in an inverted Hold system). ---- -x-- Start/Draw lamp. - ---x ---- Coin counter. - xxx- x--x Unknown. + ---x ---- Low when sound data queued. + --x- ---- Safe to shutdown? + -x-- ---- Allow NMI? + x--- x--x Unknown. */ output().set_lamp_value(6, (data >> 2) & 1); // Lamp 6 (Start/Draw) output().set_lamp_value(7, (data >> 1) & 1); // Lamp 7 (Unknown) - machine().bookkeeping().coin_counter_w(0, ~data & 0x10); // Coin counter + //machine().bookkeeping().coin_counter_w(0, ~data & 0x10); // Probably not coin-related // logerror("Writing %02Xh to PPI output B\n", data); } @@ -308,7 +277,39 @@ READ8_MEMBER(amusco_state::lpt_status_r) WRITE8_MEMBER(amusco_state::lpt_data_w) { - logerror("Writing %02Xh to printer\n", data); + switch (data) + { + case 0x10: // NCR: Clear all printer and interface functions + logerror("Writing DLE to printer\n"); + break; + + case 0x11: + logerror("Writing DC1 to printer\n"); + break; + + case 0x12: // NCR: Select double-wide characters for one line + logerror("Writing DC2 to printer\n"); + break; + + case 0x14: // NCR: Feed n print lines (where n is following byte) + logerror("Writing DC4 to printer\n"); + break; + + case 0x17: // NCR: Print buffer contents; advance one line + logerror("Writing ETB to printer\n"); + break; + + case 0x19: // NCR: Perform full knife cut + logerror("Writing EM to printer\n"); + break; + + default: + if (data >= 0x20 && data < 0x7f) + logerror("Writing '%c' to printer\n", data); + else + logerror("Writing %02Xh to printer\n", data); + break; + } } WRITE8_MEMBER(amusco_state::rtc_control_w) @@ -369,21 +370,26 @@ static INPUT_PORTS_START( amusco ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) // move down in service mode PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) // move up in service mode - PORT_START("IN2") // TO DO: enabling IRQ4 produces COIN ERROR message - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN1 ) //PORT_WRITE_LINE_DEVICE_MEMBER("pic8259", pic8259_device, ir4_w) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN2 ) //PORT_WRITE_LINE_DEVICE_MEMBER("pic8259", pic8259_device, ir4_w) - PORT_BIT( 0xf9, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_START("IN2") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(COIN_IMPULSE) PORT_WRITE_LINE_DEVICE_MEMBER(":", amusco_state, coin_irq) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(COIN_IMPULSE) PORT_WRITE_LINE_DEVICE_MEMBER(":", amusco_state, coin_irq) + PORT_BIT( 0xf9, IP_ACTIVE_LOW, IPT_UNUSED ) INPUT_PORTS_END static INPUT_PORTS_START( draw88pkr ) PORT_INCLUDE( amusco ) - PORT_MODIFY("IN1") + PORT_MODIFY("IN1") // Doors probably still exist, though code does nothing with them PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BILL1 ) //PORT_WRITE_LINE_DEVICE_MEMBER("pic8259", pic8259_device, ir4_w) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BILL1 ) PORT_IMPULSE(COIN_IMPULSE) PORT_WRITE_LINE_DEVICE_MEMBER(":", amusco_state, coin_irq) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) INPUT_PORTS_END +WRITE_LINE_MEMBER(amusco_state::coin_irq) +{ + m_pic->ir4_w(state ? CLEAR_LINE : HOLD_LINE); +} + /************************* @@ -495,8 +501,7 @@ static MACHINE_CONFIG_START( amusco, amusco_state ) MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( draw88pkr, amusco ) - MCFG_CPU_MODIFY("maincpu") - MCFG_CPU_PROGRAM_MAP(draw88pkr_mem_map) + //MCFG_DEVICE_MODIFY("ppi_outputs") // Some bits are definitely different MACHINE_CONFIG_END @@ -549,4 +554,4 @@ ROM_END /* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS LAYOUT */ GAMEL( 1987, amusco, 0, amusco, amusco, driver_device, 0, ROT0, "Amusco", "American Music Poker (V1.4)", MACHINE_IMPERFECT_COLORS | MACHINE_NODEVICE_PRINTER, layout_amusco ) // palette totally wrong -GAMEL( 1988, draw88pkr, 0, draw88pkr,draw88pkr,driver_device, 0, ROT0, "BTE, Inc.", "Draw 88 Poker (V2.0)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_COLORS | MACHINE_NODEVICE_PRINTER, layout_amusco ) +GAMEL( 1988, draw88pkr, 0, draw88pkr,draw88pkr,driver_device, 0, ROT0, "BTE, Inc.", "Draw 88 Poker (V2.0)", MACHINE_IMPERFECT_COLORS | MACHINE_NODEVICE_PRINTER, layout_amusco ) // palette totally wrong diff --git a/src/mame/drivers/mac128.cpp b/src/mame/drivers/mac128.cpp index cffed939ca2..2885eaf2250 100755 --- a/src/mame/drivers/mac128.cpp +++ b/src/mame/drivers/mac128.cpp @@ -107,6 +107,7 @@ c0 8 data bits, Rx disabled #define OVERLAY_TAG "bank1" #define C7M (7833600) +#define C3_7M (3916800) // uncomment to run i8021 keyboard in original Mac/512(e)/Plus //#define MAC_USE_EMULATED_KBD (1) @@ -1283,7 +1284,7 @@ static MACHINE_CONFIG_START( mac512ke, mac128_state ) MCFG_IWM_ADD("fdc", mac_iwm_interface) MCFG_LEGACY_FLOPPY_SONY_2_DRIVES_ADD(mac_floppy_interface) - MCFG_SCC85C30_ADD("scc", C7M, 0, 0, 0, 0) + MCFG_SCC85C30_ADD("scc", C7M, C3_7M, 0, C3_7M, 0) MCFG_Z80SCC_OUT_INT_CB(WRITELINE(mac128_state, set_scc_interrupt)) MCFG_DEVICE_ADD("via6522_0", VIA6522, 1000000) @@ -1514,7 +1515,27 @@ ROM_END * 00 <- 10 Reset External/status interrupts * 01 <- 01 Enable External Interrupts * Above init first for channel B and then for channel A - * 09 <- 0a Master Interrup Control: No vector and Interrupts enabled! + * 09 <- 0a Master Interrupt Control: No vector and Interrupts enabled! + * + SCC re-init of Channel B booting MacOS 7.0.0 (on Mac plus) + * 09 <- 40 Master Interrup Control: channel B reset + * 04 <- 20 x1 clock, Sync Modes Enable, SDLC Mode (01111110 Flag) + * 0a <- e0 CRC preset to '1's, FM0 encoding scheme + * 06 <- 00 Receiver SDLC ADR0-ADR7 bits + * 07 <- 7e Receiver SDLC Flag character (0x7e as expected) + * 0c <- 06 Low baudrate divider + * 0d <- 00 Hi baudrate divider + * 0e <- c0 Set FM Mode Command + * 03 <- dd Rx 8 bit, Enter Hunt Mode, Rx CRC Enable, Enter SDLC Address Search Mode, Rx enable + * 02 <- 00 Interrupt vector + * 0f <- 08 External/Status Control: DCD interrupts enabled + * 01 <- 09 Enable External Interrupts + Rx Int On First Character or Special Condition + * 09 <- 0a Master Interrupt Control: No vector and Interrupts enabled! + * 0b <- 70 Rx Clock is DPLL Output, Tx Clock is BRG output + TTL Clock on RTxC + * 0e <- 21 Enter Search Mode Command + BRG enable + RTxC as BRG clock + * 05 <- 60 Tx 8 bit, Tx disable, SDLC CRC Polynomial selected, Tx CRC disabled + * 06 <- 01 Receiver SDLC ADR0-ADR7 bits updated + * 0f <- 88 External/Status Control: Abort/Break and DCD interrupts enabled */ ROM_START( mac512ke ) diff --git a/src/mame/drivers/vegas.cpp b/src/mame/drivers/vegas.cpp index 0eae12d407e..893f25df22f 100644 --- a/src/mame/drivers/vegas.cpp +++ b/src/mame/drivers/vegas.cpp @@ -1982,6 +1982,9 @@ static INPUT_PORTS_START( warfa ) PORT_DIPNAME( 0x0040, 0x0040, "Boot ROM Test" ) PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0080, 0x0080, "Boot ROM Test v1.3" ) + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPNAME( 0xc000, 0x4000, "Resolution" ) PORT_DIPSETTING( 0xc000, "Standard Res 512x256" ) PORT_DIPSETTING( 0x4000, "Medium Res 512x384" ) @@ -2593,6 +2596,20 @@ ROM_START( warfaa ) ROM_LOAD16_BYTE( "warsnd.106", 0x000000, 0x8000, CRC(d1470e23) SHA1(f6e8405cfa604528c0224401bc374a6df9caccef) ) ROM_END +ROM_START( warfab ) + ROM_REGION32_LE( 0x80000, "user1", 0 ) // test: EPROM 1.3 Apr 7 1999 + // label: WAR 42CE / BOOT V1.9 / PROG V1.6 + ROM_LOAD( "war42ce.bin", 0x000000, 0x80000, CRC(1a6e7f59) SHA1(0d8b4ce1e4b1132689796c4374aa54447b9a3369) ) + + ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) + + DISK_REGION( "ide:0:hdd:image" ) // test: Guts 1.3 Apr7 1999 Game 1.3 Apr7 1999 + // V1.5 + DISK_IMAGE( "warfa15", 0, SHA1(bd538bf2f6a245545dae4ea97c433bb3f7d4394e) ) + + ROM_REGION16_LE( 0x10000, "dcs", 0 ) /* Vegas SIO boot ROM */ + ROM_LOAD16_BYTE( "warsnd.106", 0x000000, 0x8000, CRC(d1470e23) SHA1(f6e8405cfa604528c0224401bc374a6df9caccef) ) +ROM_END ROM_START( tenthdeg ) ROM_REGION32_LE( 0x80000, "user1", 0 ) @@ -2846,6 +2863,7 @@ GAME( 1999, gauntdl, 0, gauntdl, gauntdl, vegas_state, gauntdl, ROT GAME( 1999, gauntdl24,gauntdl, gauntdl, gauntdl, vegas_state, gauntdl, ROT0, "Midway Games", "Gauntlet Dark Legacy (version DL 2.4)", MACHINE_SUPPORTS_SAVE ) GAME( 1999, warfa, 0, warfa, warfa, vegas_state, warfa, ROT0, "Atari Games", "War: The Final Assault (EPROM 1.9 Mar 25 1999, GUTS 1.3 Apr 20 1999, GAME Apr 20 1999)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) GAME( 1999, warfaa, warfa, warfa, warfa, vegas_state, warfa, ROT0, "Atari Games", "War: The Final Assault (EPROM 1.6 Jan 14 1999, GUTS 1.1 Mar 16 1999, GAME Mar 16 1999)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) +GAME( 1999, warfab, warfa, warfa, warfa, vegas_state, warfa, ROT0, "Atari Games", "War: The Final Assault (EPROM 1.3 Apr 7 1999, GUTS 1.3 Apr 7 1999, GAME Apr 7 1999)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // version numbers comes from test mode, can be unreliable /* Durango + DSIO + Voodoo 2 */ diff --git a/src/mame/layout/x68000.lay b/src/mame/layout/x68000.lay index 0e868b0b2ca..338212c4dc7 100644 --- a/src/mame/layout/x68000.lay +++ b/src/mame/layout/x68000.lay @@ -38,8 +38,43 @@ <color red="1.0" green="1.0" blue="1.0" /> </text> </element> + <element name="kana"> + <text string="Kana"> + <color red="1.0" green="1.0" blue="1.0" /> + </text> + </element> + <element name="romaji"> + <text string="Romaji"> + <color red="1.0" green="1.0" blue="1.0" /> + </text> + </element> + <element name="code"> + <text string="Code"> + <color red="1.0" green="1.0" blue="1.0" /> + </text> + </element> + <element name="caps"> + <text string="Caps"> + <color red="1.0" green="1.0" blue="1.0" /> + </text> + </element> + <element name="insert"> + <text string="Insert"> + <color red="1.0" green="1.0" blue="1.0" /> + </text> + </element> + <element name="hiragana"> + <text string="Hiragana"> + <color red="1.0" green="1.0" blue="1.0" /> + </text> + </element> + <element name="fullsize"> + <text string="Fullsize"> + <color red="1.0" green="1.0" blue="1.0" /> + </text> + </element> - <view name="Disk Drive LEDs"> + <view name="Disk Drive and Keyboard LEDs"> <bezel name="drv0text" element="drv0"> <bounds left="0" right="59" top="0" bottom="30" /> </bezel> @@ -91,6 +126,48 @@ <screen index="0"> <bounds x="61" y="0" width="1024" height="768" /> </screen> + <bezel name="kana_text" element="kana"> + <bounds left="0" right="40" top="300" bottom="314" /> + </bezel> + <bezel name="key_led_kana" element="access_led"> + <bounds left="40" right="54" top="300" bottom="314" /> + </bezel> + <bezel name="romaji_text" element="romaji"> + <bounds left="0" right="40" top="330" bottom="344" /> + </bezel> + <bezel name="key_led_romaji" element="access_led"> + <bounds left="40" right="54" top="330" bottom="344" /> + </bezel> + <bezel name="code_text" element="code"> + <bounds left="0" right="40" top="360" bottom="374" /> + </bezel> + <bezel name="key_led_code" element="access_led"> + <bounds left="40" right="54" top="360" bottom="374" /> + </bezel> + <bezel name="caps_text" element="caps"> + <bounds left="0" right="40" top="390" bottom="404" /> + </bezel> + <bezel name="key_led_caps" element="access_led"> + <bounds left="40" right="54" top="390" bottom="404" /> + </bezel> + <bezel name="insert_text" element="insert"> + <bounds left="0" right="40" top="420" bottom="434" /> + </bezel> + <bezel name="key_led_insert" element="access_led"> + <bounds left="40" right="54" top="420" bottom="434" /> + </bezel> + <bezel name="hiragana_text" element="hiragana"> + <bounds left="0" right="40" top="450" bottom="464" /> + </bezel> + <bezel name="key_led_hiragana" element="access_led"> + <bounds left="40" right="54" top="450" bottom="464" /> + </bezel> + <bezel name="fullsize_text" element="fullsize"> + <bounds left="0" right="40" top="480" bottom="494" /> + </bezel> + <bezel name="key_led_fullsize" element="access_led"> + <bounds left="40" right="54" top="480" bottom="494" /> + </bezel> </view> </mamelayout> diff --git a/src/mame/machine/x68k_kbd.cpp b/src/mame/machine/x68k_kbd.cpp index 6c42692d512..40ca743a6b5 100644 --- a/src/mame/machine/x68k_kbd.cpp +++ b/src/mame/machine/x68k_kbd.cpp @@ -48,13 +48,13 @@ void x68k_keyboard_device::received_byte(uint8_t data) if (data & 0x80) // LED status { - machine().output().set_value("key_led_kana", (data & 0x01) ? 0 : 1); - machine().output().set_value("key_led_romaji", (data & 0x02) ? 0 : 1); - machine().output().set_value("key_led_code", (data & 0x04) ? 0 : 1); - machine().output().set_value("key_led_caps", (data & 0x08) ? 0 : 1); - machine().output().set_value("key_led_insert", (data & 0x10) ? 0 : 1); - machine().output().set_value("key_led_hiragana", (data & 0x20) ? 0 : 1); - machine().output().set_value("key_led_fullsize", (data & 0x40) ? 0 : 1); + machine().output().set_value("key_led_kana", data & 0x01); + machine().output().set_value("key_led_romaji", data & 0x02); + machine().output().set_value("key_led_code", data & 0x04); + machine().output().set_value("key_led_caps", data & 0x08); + machine().output().set_value("key_led_insert", data & 0x10); + machine().output().set_value("key_led_hiragana", data & 0x20); + machine().output().set_value("key_led_fullsize", data & 0x40); logerror("KB: LED status set to %02x\n", data & 0x7f); } diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 97e45c6b617..e690307776b 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -36368,6 +36368,7 @@ sf2049te // (c) 1999 Atari Games tenthdeg // (c) 1998 Atari Games (prototype) warfa // (c) 1999 Atari Games warfaa // (c) 1999 Atari Games +warfab // (c) 1999 Atari Games @source:vendetta.cpp esckids // GX975 (c) 1991 (Asia) diff --git a/src/mame/video/mrdo.cpp b/src/mame/video/mrdo.cpp index c41a9e90c5b..62afb88916c 100644 --- a/src/mame/video/mrdo.cpp +++ b/src/mame/video/mrdo.cpp @@ -2,7 +2,7 @@ // copyright-holders:Nicola Salmoria /*************************************************************************** - video.c + mrdo.cpp Functions to emulate the video hardware of the machine. @@ -167,11 +167,6 @@ void mrdo_state::video_start() m_bg_tilemap->set_transparent_pen(0); m_fg_tilemap->set_transparent_pen(0); - m_bg_tilemap->set_scrolldx(0, 56); - m_fg_tilemap->set_scrolldx(0, 56); - m_bg_tilemap->set_scrolldy(0, 6); - m_fg_tilemap->set_scrolldy(0, 6); - m_flipscreen = 0; save_item(NAME(m_flipscreen)); |