diff options
Diffstat (limited to 'src')
163 files changed, 3082 insertions, 2852 deletions
diff --git a/src/devices/bus/a2bus/a2mockingboard.cpp b/src/devices/bus/a2bus/a2mockingboard.cpp index 93d8ba084c9..167c7dc2f6f 100644 --- a/src/devices/bus/a2bus/a2mockingboard.cpp +++ b/src/devices/bus/a2bus/a2mockingboard.cpp @@ -30,7 +30,7 @@ // GLOBAL VARIABLES //************************************************************************** -DEFINE_DEVICE_TYPE(A2BUS_MOCKINGBOARD, a2bus_mockingboard_device, "a2mockbd", "Sweet Micro Systems Mockingboard") +DEFINE_DEVICE_TYPE(A2BUS_MOCKINGBOARD, a2bus_mockingboard_device, "a2mockbd", "Sweet Micro Systems Mockingboard Sound/Speech I") DEFINE_DEVICE_TYPE(A2BUS_PHASOR, a2bus_phasor_device, "a2phasor", "Applied Engineering Phasor") DEFINE_DEVICE_TYPE(A2BUS_ECHOPLUS, a2bus_echoplus_device, "a2echop", "Street Electronics Echo Plus") @@ -64,6 +64,22 @@ void a2bus_ayboard_device::device_add_mconfig(machine_config &config) m_ay2->add_route(ALL_OUTPUTS, "rspeaker", 1.0); } +void a2bus_mockingboard_device::device_add_mconfig(machine_config &config) +{ + add_common_devices(config); + + m_via1->writepb_handler().set(FUNC(a2bus_mockingboard_device::via1_out_b)); + m_via1->cb2_handler().set(FUNC(a2bus_mockingboard_device::write_via1_cb2)); + + AY8913(config, m_ay2, 1022727); + m_ay2->add_route(ALL_OUTPUTS, "rspeaker", 1.0); + + VOTRAX_SC01(config, m_sc01, 1022727); + m_sc01->ar_callback().set(m_via1, FUNC(via6522_device::write_cb1)); + m_sc01->add_route(ALL_OUTPUTS, "lspeaker", 1.0); + m_sc01->add_route(ALL_OUTPUTS, "rspeaker", 1.0); +} + void a2bus_phasor_device::device_add_mconfig(machine_config &config) { add_common_devices(config); @@ -111,7 +127,8 @@ a2bus_ayboard_device::a2bus_ayboard_device(const machine_config &mconfig, device } a2bus_mockingboard_device::a2bus_mockingboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - a2bus_ayboard_device(mconfig, A2BUS_MOCKINGBOARD, tag, owner, clock) + a2bus_ayboard_device(mconfig, A2BUS_MOCKINGBOARD, tag, owner, clock), + m_sc01(*this, "sc01") { } @@ -429,3 +446,48 @@ void a2bus_echoplus_device::write_c0nx(uint8_t offset, uint8_t data) break; } } + +void a2bus_mockingboard_device::device_reset() +{ + m_porta1 = m_porta2 = m_portb1 = 0; + m_last_cb2_state = ASSERT_LINE; +} + +WRITE_LINE_MEMBER( a2bus_mockingboard_device::write_via1_cb2 ) +{ + if ((state == CLEAR_LINE) && (m_last_cb2_state == ASSERT_LINE)) + { + m_sc01->write(m_portb1); + } + m_last_cb2_state = state; +} + +void a2bus_mockingboard_device::via1_out_b(uint8_t data) +{ + m_portb1 = data; + + if (!BIT(data, 2)) + { + m_ay1->reset_w(); + } + else + { + switch (data & 3) + { + case 0: // BDIR=0, BC1=0 (inactive) + break; + + case 1: // BDIR=0, BC1=1 (read PSG) + m_porta1 = m_ay1->data_r(); + break; + + case 2: // BDIR=1, BC1=0 (write PSG) + m_ay1->data_w(m_porta1); + break; + + case 3: // BDIR=1, BC1=1 (latch) + m_ay1->address_w(m_porta1); + break; + } + } +} diff --git a/src/devices/bus/a2bus/a2mockingboard.h b/src/devices/bus/a2bus/a2mockingboard.h index a7287f8e734..6d4aa8e73af 100644 --- a/src/devices/bus/a2bus/a2mockingboard.h +++ b/src/devices/bus/a2bus/a2mockingboard.h @@ -15,6 +15,7 @@ #include "machine/6522via.h" #include "sound/ay8910.h" #include "sound/tms5220.h" +#include "sound/votrax.h" //************************************************************************** // TYPE DEFINITIONS @@ -61,6 +62,19 @@ class a2bus_mockingboard_device : public a2bus_ayboard_device { public: a2bus_mockingboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual void via1_out_b(uint8_t data) override; +protected: + virtual void device_add_mconfig(machine_config &config) override; + virtual void device_reset() override; + + required_device<votrax_sc01_device> m_sc01; + +private: + DECLARE_WRITE_LINE_MEMBER(write_via1_cb2); + + uint8_t m_portb1; + int m_last_cb2_state; }; class a2bus_phasor_device : public a2bus_ayboard_device diff --git a/src/devices/bus/a2gameio/gizmo.cpp b/src/devices/bus/a2gameio/gizmo.cpp index b3ffa9ea614..3fc87c20688 100644 --- a/src/devices/bus/a2gameio/gizmo.cpp +++ b/src/devices/bus/a2gameio/gizmo.cpp @@ -3,7 +3,7 @@ /********************************************************************* gizmo.cpp - HAL Labs Gizmo digital joystick adapter - Used by Vindicator and Super Taxman 2. + Used by Vindicator and Super Taxman 2. *********************************************************************/ @@ -55,7 +55,7 @@ void apple2_gizmo_device::device_start() READ_LINE_MEMBER(apple2_gizmo_device::sw0_r) { - static const int gizmo_bits[8] = { 1,3,2,0,4,5,5,5 }; + static const int gizmo_bits[8] = { 1,3,2,0,4,5,5,5 }; return BIT(m_player1->read(),gizmo_bits[m_an0+(m_an1<<1)+(m_an2<<2)]); } diff --git a/src/devices/bus/a2gameio/gizmo.h b/src/devices/bus/a2gameio/gizmo.h index c0702bc7a41..8f451992222 100644 --- a/src/devices/bus/a2gameio/gizmo.h +++ b/src/devices/bus/a2gameio/gizmo.h @@ -3,7 +3,7 @@ /********************************************************************* gizmo.h - HAL Labs Gizmo digital joystick adapter - Used by Vindicator and Super Taxman 2. + Used by Vindicator and Super Taxman 2. *********************************************************************/ diff --git a/src/devices/bus/abcbus/abcbus.h b/src/devices/bus/abcbus/abcbus.h index 402f1325136..1c5721650e4 100644 --- a/src/devices/bus/abcbus/abcbus.h +++ b/src/devices/bus/abcbus/abcbus.h @@ -132,7 +132,8 @@ public: // optional operation overrides for ABC 1600 virtual int abcbus_csb() { return 1; } virtual uint8_t abcbus_ops() { return 0xff; } - virtual void abcbus_tren(int state) { } + virtual uint8_t abcbus_tren() { return 0xff; } + virtual void abcbus_tren(uint8_t data) { } virtual void abcbus_prac(int state) { } virtual uint8_t abcbus_exp() { return 0xff; } virtual int abcbus_xcsb2() { return 1; } @@ -198,7 +199,8 @@ public: DECLARE_READ_LINE_MEMBER( xcsb3_r ) { return m_card ? m_card->abcbus_xcsb3() : 1; } DECLARE_READ_LINE_MEMBER( xcsb4_r ) { return m_card ? m_card->abcbus_xcsb4() : 1; } DECLARE_READ_LINE_MEMBER( xcsb5_r ) { return m_card ? m_card->abcbus_xcsb5() : 1; } - DECLARE_WRITE_LINE_MEMBER( tren_w ) { if (m_card) m_card->abcbus_tren(state); } + uint8_t read_tren() { return m_card ? m_card->abcbus_tren() : 0xff; } + void write_tren(uint8_t data) { if (m_card) m_card->abcbus_tren(data); } DECLARE_WRITE_LINE_MEMBER( prac_w ) { if (m_card) m_card->abcbus_prac(state); } void cs_w(uint8_t data) { write_cs(data); } diff --git a/src/devices/bus/abcbus/lux10828.cpp b/src/devices/bus/abcbus/lux10828.cpp index 6db3b9d2196..3bbbcb027c1 100644 --- a/src/devices/bus/abcbus/lux10828.cpp +++ b/src/devices/bus/abcbus/lux10828.cpp @@ -106,6 +106,9 @@ Notes: 0704: rr a 0706: call $073F + There is an alternate format function in the controller firmware that allows to set a secret byte which is stored in the sector header. + Copy protected software checks the secret byte read from the sector header and refuses to start if the disk has not been appropriately formatted. + */ #include "emu.h" diff --git a/src/devices/bus/abcbus/lux4105.cpp b/src/devices/bus/abcbus/lux4105.cpp index 59b4f5191a5..1bb72560855 100644 --- a/src/devices/bus/abcbus/lux4105.cpp +++ b/src/devices/bus/abcbus/lux4105.cpp @@ -41,59 +41,7 @@ Notes: TODO - - command execution gets stuck in message in phase - - 08A88 move.l D7,D0 D0=00000025 - 08A8A lsl.l #5, D0 D0=000004A0 - 08A8C ori.l #$7e000, D0 D0=0007E4A0 - 08A92 movea.l D0, A0 A0=0007E4A0 - 08A94 move.b ($2,A0), D0 D0=0007E4AF - 08A98 btst #$2, D0 - 08A9C beq $8aa4 - 08AA0 bra $8a88 - - [:bus2:4105:sasi:0:s1410] state=3.1 change - [:bus2:4105:sasi:0:s1410] state=3.0 change - [:bus2:4105:sasi] ctrl .....B.CI stat 0005 - [:bus2:4105:sasi] 0=ICB - [:bus2:4105:sasi] ctrl .....B.CI stat 0005 - [:bus2:4105:sasi] 0=ICB - [:bus2:4105:sasi] ctrl .....B.CI stat 0000 - [:bus2:4105:sasi] 0=ICB - [:bus2:4105:sasi] ctrl ...Q.B.CI stat 0000 - [:bus2:4105:sasi] 0=QICB - [:bus2:4105:sasi] ctrl ...Q.B.CI stat 0000 - [:bus2:4105:sasi] 0=QICB - [:bus2:4105:sasi:0:s1410] state=3.4 change - [:bus2:4105:sasi] ctrl ...Q.B.CI stat 0000 - [:bus2:4105:sasi] 0=QICB - [:] ':3f' (089A8) STAT 25: 45 - [:bus2:4105:sasi] ctrl ..KQ.B.CI stat 0000 - [:bus2:4105:sasi] 0=QICB - [:bus2:4105:sasi] 1=K - [:bus2:4105:sasi:0:s1410] state=3.4 change - [:bus2:4105:sasi] ctrl ..K..B.CI stat 0000 - [:bus2:4105:sasi] 0=ICB - [:bus2:4105:sasi] 1=K - [:bus2:4105:sasi] ctrl .....B.CI stat 0000 - [:bus2:4105:sasi] 0=ICB - [:bus2:4105:sasi:0:s1410] state=3.3 change - [:bus2:4105:sasi:0:s1410] state=3.0 change - [:bus2:4105:sasi] ctrl .....BMCI min 0000 - [:bus2:4105:sasi] 0=MICB - [:bus2:4105:sasi] ctrl .....BMCI min 0000 - [:bus2:4105:sasi] 0=MICB - [:bus2:4105:sasi] ctrl .....BMCI min 0000 - [:bus2:4105:sasi] 0=MICB - [:bus2:4105:sasi] ctrl ...Q.BMCI min 0000 - [:bus2:4105:sasi] 0=QMICB - [:bus2:4105:sasi] ctrl ...Q.BMCI min 0000 - [:bus2:4105:sasi] 0=QMICB - [:bus2:4105:sasi:0:s1410] state=3.4 change - [:bus2:4105:sasi] ctrl ...Q.BMCI min 0000 - [:bus2:4105:sasi] 0=QMICB - [:] ':3f' (089D4) INP 25: 00 - [:] ':3f' (089E8) STAT 25: 05 + - sector length error in read check after format */ @@ -109,7 +57,9 @@ Notes: //************************************************************************** #define SASIBUS_TAG "sasi" - +#define DMA_O1 BIT(m_dma, 0) +#define DMA_O2 BIT(m_dma, 1) +#define DMA_O3 BIT(m_dma, 2) //************************************************************************** @@ -133,6 +83,7 @@ void luxor_4105_device::device_add_mconfig(machine_config &config) downcast<nscsi_callback_device&>(*device).cd_callback().set(*this, FUNC(luxor_4105_device::write_sasi_cd)); downcast<nscsi_callback_device&>(*device).bsy_callback().set(*this, FUNC(luxor_4105_device::write_sasi_bsy)); downcast<nscsi_callback_device&>(*device).req_callback().set(*this, FUNC(luxor_4105_device::write_sasi_req)); + downcast<nscsi_callback_device&>(*device).msg_callback().set(*this, FUNC(luxor_4105_device::write_sasi_msg)); downcast<nscsi_callback_device&>(*device).io_callback().set(*this, FUNC(luxor_4105_device::write_sasi_io)); }); } @@ -164,6 +115,11 @@ INPUT_PORTS_START( luxor_4105 ) PORT_DIPNAME( 0x7f, 0x25, "Card Address" ) PORT_DIPLOCATION("5E:1,2,3,4,5,6,7") PORT_DIPSETTING( 0x25, "37" ) PORT_DIPSETTING( 0x2d, "45" ) + + PORT_START("S1") + PORT_CONFNAME( 0x01, 0x01, "DMA Timing" ) + PORT_CONFSETTING( 0x00, "1043/1044" ) // a. TREN connected via delay circuit to OUT latch enable + PORT_CONFSETTING( 0x01, "1045/1046" ) // b. TREN connected directly to OUT latch enable INPUT_PORTS_END @@ -206,7 +162,11 @@ void luxor_4105_device::device_start() { // state saving save_item(NAME(m_cs)); + save_item(NAME(m_data_out)); save_item(NAME(m_dma)); + save_item(NAME(m_req)); + save_item(NAME(m_drq)); + save_item(NAME(m_pren)); } @@ -217,38 +177,93 @@ void luxor_4105_device::device_start() void luxor_4105_device::device_reset() { m_cs = false; - m_dma = 0; + + internal_reset(); +} + + +void luxor_4105_device::internal_reset() +{ + write_dma_register(0); + + m_data_out = 0; + + m_sasi->sel_w(0); m_sasi->rst_w(1); m_sasi->rst_w(0); - - m_slot->trrq_w(1); } -void luxor_4105_device::update_trrq_int() +void luxor_4105_device::update_dma() { - bool cd = !m_sasi->cd_r(); - bool req = !m_sasi->req_r(); - int trrq = (cd & !req) ? 0 : 1; - - if (BIT(m_dma, 5)) + // IRQ + bool cd = m_sasi->cd_r(); + bool io = m_sasi->io_r(); + bool req = m_sasi->req_r() && !m_req; + m_drq = (!((!cd || !io) && !(!cd && !DMA_O2))) && req; + bool irq = !(DMA_O3 && m_pren) || !(DMA_O1 && m_drq); + m_slot->irq_w(irq); + + // TRRQ + if (DMA_O2) { - m_slot->irq_w(trrq ? CLEAR_LINE : ASSERT_LINE); + bool trrq = !(!cd && req); + m_slot->trrq_w(trrq); } else { - m_slot->irq_w(CLEAR_LINE); + m_slot->trrq_w(1); } +} - if (BIT(m_dma, 6)) - { - m_slot->trrq_w(trrq); - } - else + +void luxor_4105_device::update_ack() +{ + m_sasi->ack_w(m_sasi->req_r() && (m_sasi->msg_r() || m_req)); +} + + +void luxor_4105_device::write_dma_register(uint8_t data) +{ + /* + + bit description + + 0 + 1 + 2 + 3 + 4 + 5 byte interrupt enable? + 6 DMA/CPU mode (1=DMA, 0=CPU)? + 7 error interrupt enable? + + */ + + m_dma = BIT(data, 5) << 2 | BIT(data, 6) << 1 | BIT(data, 7); + + // PREN + m_pren = !DMA_O2; + m_slot->pren_w(m_pren); + + update_dma(); +} + + +void luxor_4105_device::write_sasi_data(uint8_t data) +{ + m_data_out = data; + + if (!m_sasi->io_r()) { - m_slot->trrq_w(1); + m_sasi->write(data); } + + // clock REQ FF + m_req = m_sasi->req_r(); + update_ack(); + update_dma(); } @@ -263,7 +278,7 @@ WRITE_LINE_MEMBER( luxor_4105_device::write_sasi_bsy ) WRITE_LINE_MEMBER( luxor_4105_device::write_sasi_cd ) { - update_trrq_int(); + update_dma(); } @@ -271,10 +286,18 @@ WRITE_LINE_MEMBER( luxor_4105_device::write_sasi_req ) { if (!state) { - m_sasi->ack_w(0); + // reset REQ FF + m_req = 0; } - update_trrq_int(); + update_ack(); + update_dma(); +} + + +WRITE_LINE_MEMBER( luxor_4105_device::write_sasi_msg ) +{ + update_ack(); } @@ -284,6 +307,12 @@ WRITE_LINE_MEMBER( luxor_4105_device::write_sasi_io ) { m_sasi->write(0); } + else + { + m_sasi->write(m_data_out); + } + + update_dma(); } @@ -321,22 +350,25 @@ uint8_t luxor_4105_device::abcbus_stat() bit description - 0 ? - 1 ? - 2 ? - 3 ? + 0 REQ + 1 C/D + 2 BSY + 3 I/O 4 0 - 5 - 6 ? (tested at 014D9A, after command 08 sent and 1 byte read from SASI, should be 1) - 7 + 5 DMA !O3 + 6 PREN + 7 DMA request */ - data = m_sasi->req_r(); + data = m_sasi->req_r() && !m_req; data |= !m_sasi->cd_r() << 1; data |= m_sasi->bsy_r() << 2; data |= !m_sasi->io_r() << 3; - data |= !m_sasi->msg_r() << 6; + + data |= !DMA_O3 << 5; + data |= !m_pren << 6; + data |= !m_drq << 7; } return data; @@ -351,19 +383,19 @@ uint8_t luxor_4105_device::abcbus_inp() { uint8_t data = 0xff; - if (m_cs) + if (m_sasi->bsy_r()) { - if (!m_sasi->bsy_r()) - { - data = m_1e->read(); - } - else - { - data = m_sasi->read(); - - m_sasi->ack_w(1); - } + data = m_sasi->read(); } + else + { + data = m_1e->read(); + } + + // clock REQ FF + m_req = m_sasi->req_r(); + update_ack(); + update_dma(); return data; } @@ -377,9 +409,7 @@ void luxor_4105_device::abcbus_out(uint8_t data) { if (m_cs) { - m_sasi->write(data); - - m_sasi->ack_w(1); + write_sasi_data(data); } } @@ -405,12 +435,7 @@ void luxor_4105_device::abcbus_c3(uint8_t data) { if (m_cs) { - m_dma = 0; - - m_sasi->sel_w(0); - - m_sasi->rst_w(1); - m_sasi->rst_w(0); + internal_reset(); } } @@ -423,23 +448,54 @@ void luxor_4105_device::abcbus_c4(uint8_t data) { if (m_cs) { - /* + write_dma_register(data); + } +} - bit description - 0 - 1 - 2 - 3 - 4 - 5 byte interrupt enable? - 6 DMA/CPU mode (1=DMA, 0=CPU)? - 7 error interrupt enable? +//------------------------------------------------- +// abcbus_tren - +//------------------------------------------------- - */ +uint8_t luxor_4105_device::abcbus_tren() +{ + uint8_t data = 0xff; + + if (m_sasi->bsy_r()) + { + data = m_sasi->read(); + } - m_dma = data; + // clock REQ FF + m_req = m_sasi->req_r(); + update_ack(); + update_dma(); - update_trrq_int(); + return data; +} + + +//------------------------------------------------- +// abcbus_tren - +//------------------------------------------------- + +void luxor_4105_device::abcbus_tren(uint8_t data) +{ + write_sasi_data(data); +} + + +//------------------------------------------------- +// abcbus_prac - +//------------------------------------------------- + +void luxor_4105_device::abcbus_prac(int state) +{ + if ((state && DMA_O2) && !m_slot->trrq_r()) + { + // set REQ FF + m_req = 1; + update_ack(); + update_dma(); } } diff --git a/src/devices/bus/abcbus/lux4105.h b/src/devices/bus/abcbus/lux4105.h index e2c05d57dba..e6e9317ec70 100644 --- a/src/devices/bus/abcbus/lux4105.h +++ b/src/devices/bus/abcbus/lux4105.h @@ -50,13 +50,21 @@ protected: virtual void abcbus_c1(uint8_t data) override; virtual void abcbus_c3(uint8_t data) override; virtual void abcbus_c4(uint8_t data) override; + virtual uint8_t abcbus_tren() override; + virtual void abcbus_tren(uint8_t data) override; + virtual void abcbus_prac(int state) override; private: - inline void update_trrq_int(); + void internal_reset(); + void update_ack(); + void update_dma(); + void write_dma_register(uint8_t data); + void write_sasi_data(uint8_t data); DECLARE_WRITE_LINE_MEMBER( write_sasi_bsy ); DECLARE_WRITE_LINE_MEMBER( write_sasi_cd ); DECLARE_WRITE_LINE_MEMBER( write_sasi_req ); + DECLARE_WRITE_LINE_MEMBER( write_sasi_msg ); DECLARE_WRITE_LINE_MEMBER( write_sasi_io ); required_device<nscsi_callback_device> m_sasi; @@ -64,7 +72,11 @@ private: required_ioport m_5e; bool m_cs; + uint8_t m_data_out; uint8_t m_dma; + bool m_req; + bool m_drq; + bool m_pren; }; diff --git a/src/devices/bus/electron/cart/sndexp3.cpp b/src/devices/bus/electron/cart/sndexp3.cpp index afaf927e443..f39fb90c414 100644 --- a/src/devices/bus/electron/cart/sndexp3.cpp +++ b/src/devices/bus/electron/cart/sndexp3.cpp @@ -66,7 +66,7 @@ uint8_t electron_sndexp3_device::read(offs_t offset, int infc, int infd, int rom { uint8_t data = 0xff; - if (oe && romqa) + if (oe2) { if (offset < 0x2000) { @@ -103,7 +103,7 @@ void electron_sndexp3_device::write(offs_t offset, uint8_t data, int infc, int i break; } } - else if (oe && romqa) + else if (oe2) { if (offset >= 0x2000) { diff --git a/src/devices/bus/electron/romboxp.cpp b/src/devices/bus/electron/romboxp.cpp index cb8fb77e81d..66c9a582fc3 100644 --- a/src/devices/bus/electron/romboxp.cpp +++ b/src/devices/bus/electron/romboxp.cpp @@ -34,7 +34,7 @@ DEFINE_DEVICE_TYPE(ELECTRON_ROMBOXP, electron_romboxp_device, "electron_romboxp" ROM_START( romboxp ) // Bank 12 Expansion module operating system ROM_REGION(0x2000, "exp_rom", 0) - ROM_DEFAULT_BIOS("exp100") + ROM_DEFAULT_BIOS("exp202") ROM_SYSTEM_BIOS(0, "exp100", "ROMBOX+ Expansion 1.00") ROMX_LOAD("romboxplus.rom", 0x0000, 0x2000, CRC(0520ab6d) SHA1(2f551bea279a64e09fd4d31024799f7459fb9938), ROM_BIOS(0)) @@ -63,12 +63,9 @@ ROM_END static INPUT_PORTS_START( romboxp ) PORT_START("OPTION") - PORT_CONFNAME(0x01, 0x01, "A1") // not implemented - PORT_CONFSETTING(0x00, "RAM") - PORT_CONFSETTING(0x01, "ROM") - PORT_CONFNAME(0x02, 0x02, "A2") - PORT_CONFSETTING(0x00, "ROM 12-15") - PORT_CONFSETTING(0x02, "ROM 4-7") + PORT_CONFNAME(0x01, 0x01, "Sideways ROM Pages") + PORT_CONFSETTING(0x00, "12-15") + PORT_CONFSETTING(0x01, "4-7") INPUT_PORTS_END //------------------------------------------------- @@ -124,18 +121,18 @@ const tiny_rom_entry *electron_romboxp_device::device_rom_region() const // electron_romboxp_device - constructor //------------------------------------------------- -electron_romboxp_device::electron_romboxp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, ELECTRON_ROMBOXP, tag, owner, clock), - device_electron_expansion_interface(mconfig, *this), - m_exp_rom(*this, "exp_rom"), - m_rom(*this, "rom%u", 1), - m_cart(*this, "cart%u", 1), - m_centronics(*this, "centronics"), - m_cent_data_out(*this, "cent_data_out"), - m_option(*this, "OPTION"), - m_romsel(0), - m_rom_base(0), - m_centronics_busy(0) +electron_romboxp_device::electron_romboxp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, ELECTRON_ROMBOXP, tag, owner, clock) + , device_electron_expansion_interface(mconfig, *this) + , m_exp_rom(*this, "exp_rom") + , m_rom(*this, "rom%u", 1) + , m_cart(*this, "cart%u", 1) + , m_centronics(*this, "centronics") + , m_cent_data_out(*this, "cent_data_out") + , m_option(*this, "OPTION") + , m_romsel(0) + , m_rom_base(0) + , m_centronics_busy(0) { } @@ -145,6 +142,12 @@ electron_romboxp_device::electron_romboxp_device(const machine_config &mconfig, void electron_romboxp_device::device_start() { + m_ram = make_unique_clear<uint8_t[]>(0x10000); + memset(m_ram.get(), 0xff, 0x10000); + + /* register for save states */ + save_item(NAME(m_romsel)); + save_pointer(NAME(m_ram), 0x10000); } //------------------------------------------------- @@ -153,7 +156,7 @@ void electron_romboxp_device::device_start() void electron_romboxp_device::device_reset() { - m_rom_base = (m_option->read() & 0x02) ? 4 : 12; + m_rom_base = m_option->read() ? 4 : 12; } //------------------------------------------------- @@ -186,7 +189,10 @@ uint8_t electron_romboxp_device::expbus_r(offs_t offset) case 7: if (m_rom_base == 4) { - data = m_rom[m_romsel - 4]->read_rom(offset & 0x3fff); + if (m_rom[m_romsel - 4]->exists()) + data = m_rom[m_romsel - 4]->read_rom(offset & 0x3fff); + else + data = m_ram[(m_romsel - 4) << 14 | (offset & 0x3fff)]; } break; case 12: @@ -199,7 +205,10 @@ uint8_t electron_romboxp_device::expbus_r(offs_t offset) case 15: if (m_rom_base == 12) { - data = m_rom[m_romsel - 12]->read_rom(offset & 0x3fff); + if (m_rom[m_romsel - 12]->exists()) + data = m_rom[m_romsel - 12]->read_rom(offset & 0x3fff); + else + data = m_ram[(m_romsel - 12) << 14 | (offset & 0x3fff)]; } break; } @@ -250,6 +259,26 @@ void electron_romboxp_device::expbus_w(offs_t offset, uint8_t data) case 3: m_cart[0]->write(offset & 0x3fff, data, 0, 0, m_romsel & 0x01, 1, 0); break; + case 4: + case 5: + case 6: + case 7: + if (m_rom_base == 4) + { + if (!m_rom[m_romsel - 4]->exists()) + m_ram[(m_romsel - 4) << 14 | (offset & 0x3fff)] = data; + } + break; + case 12: + case 13: + case 14: + case 15: + if (m_rom_base == 12) + { + if (!m_rom[m_romsel - 12]->exists()) + m_ram[(m_romsel - 12) << 14 | (offset & 0x3fff)] = data; + } + break; } break; diff --git a/src/devices/bus/electron/romboxp.h b/src/devices/bus/electron/romboxp.h index f5905bc47bf..be81af520e0 100644 --- a/src/devices/bus/electron/romboxp.h +++ b/src/devices/bus/electron/romboxp.h @@ -60,6 +60,7 @@ private: required_device<output_latch_device> m_cent_data_out; required_ioport m_option; + std::unique_ptr<uint8_t[]> m_ram; uint8_t m_romsel; uint8_t m_rom_base; int m_centronics_busy; diff --git a/src/devices/bus/nscsi/s1410.cpp b/src/devices/bus/nscsi/s1410.cpp index 6f45adb32ea..c5fccebb686 100644 --- a/src/devices/bus/nscsi/s1410.cpp +++ b/src/devices/bus/nscsi/s1410.cpp @@ -3,7 +3,15 @@ #include "emu.h" #include "bus/nscsi/s1410.h" -DEFINE_DEVICE_TYPE(NSCSI_S1410, nscsi_s1410_device, "scsi_s1410", "S1410 Hard Disk") +#define LOG_GENERAL (1U << 0) +#define LOG_COMMAND (1U << 1) +#define LOG_DATA (1U << 2) + +#define VERBOSE 0 + +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(NSCSI_S1410, nscsi_s1410_device, "scsi_s1410", "Xebec S1410 5.25 Inch Winchester Disk Controller") nscsi_s1410_device::nscsi_s1410_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : nscsi_harddisk_device(mconfig, NSCSI_S1410, tag, owner, clock) @@ -30,6 +38,7 @@ void nscsi_s1410_device::scsi_command() switch(scsi_cmdbuf[0]) { case SC_TEST_UNIT_READY: case SC_REZERO: + case SC_FORMAT_UNIT: // TODO does not support starting LBA case SC_REQUEST_SENSE: case SC_REASSIGN_BLOCKS: case SC_READ: @@ -42,15 +51,6 @@ void nscsi_s1410_device::scsi_command() } break; - case SC_FORMAT_UNIT: - if (scsi_cmdbuf[1] >> 5) { - scsi_status_complete(SS_NOT_READY); - return; - } - - scsi_status_complete(SS_GOOD); - break; - case SC_FORMAT_TRACK: { if (scsi_cmdbuf[1] >> 5) { scsi_status_complete(SS_NOT_READY); @@ -134,15 +134,22 @@ uint8_t nscsi_s1410_device::scsi_get_data(int id, int pos) void nscsi_s1410_device::scsi_put_data(int id, int pos, uint8_t data) { + if(id != 2 && !pos) { + return nscsi_harddisk_device::scsi_put_data(id, pos, data); + } + switch(scsi_cmdbuf[0]) { case SC_FORMAT_ALT_TRACK: + LOGMASKED(LOG_DATA, "s1410: scsi_put_data, id:%d pos:%d data:%02x %c\n", id, pos, data, data >= 0x20 && data < 0x7f ? (char)data : ' '); break; case SC_INIT_DRIVE_PARAMS: + LOGMASKED(LOG_DATA, "s1410: scsi_put_data, id:%d pos:%d data:%02x %c\n", id, pos, data, data >= 0x20 && data < 0x7f ? (char)data : ' '); params[pos] = data; break; case SC_WRITE_SECTOR_BUFFER: + LOGMASKED(LOG_DATA, "s1410: scsi_put_data, id:%d pos:%d data:%02x %c\n", id, pos, data, data >= 0x20 && data < 0x7f ? (char)data : ' '); block[pos] = data; break; diff --git a/src/devices/cpu/gigatron/gigatron.cpp b/src/devices/cpu/gigatron/gigatron.cpp index b40b03c08b7..5729a33633e 100644 --- a/src/devices/cpu/gigatron/gigatron.cpp +++ b/src/devices/cpu/gigatron/gigatron.cpp @@ -89,10 +89,10 @@ void gigatron_cpu_device::reset_cpu() m_inReg = 0xff; m_outx = 0; m_out = 0; - + m_out_cb(0, 0); m_outx_cb(0, 0); - + for(uint16_t i = 0; i < m_ramMask; i++) gigatron_writemem8(i, floor(machine().rand() & 0xff)); } diff --git a/src/devices/cpu/z8/z8.cpp b/src/devices/cpu/z8/z8.cpp index 5d291b465f1..f0660d19b03 100644 --- a/src/devices/cpu/z8/z8.cpp +++ b/src/devices/cpu/z8/z8.cpp @@ -15,6 +15,11 @@ - internal diagnostic ROM in data space (requires high voltage reset) - what really happens when register pairs are unaligned? + Note that A8–A15 outputs are not enabled on Port 0 upon reset, except + on some later ROMless versions such as Z8691. This may redirect + external memory accesses, including program fetches, to FFxx until + P01M is written to. Z8681 is particularly affected by this. + */ #include "emu.h" @@ -1538,6 +1543,7 @@ void z8_device::execute_set_input(int inputnum, int state) { switch ( inputnum ) { + // IRQ0 input is P32 (also DAV0/RDY0 handshake, not emulated) case INPUT_LINE_IRQ0: if (state != CLEAR_LINE && m_irq_line[0] == CLEAR_LINE) request_interrupt(0); @@ -1550,6 +1556,7 @@ void z8_device::execute_set_input(int inputnum, int state) break; + // IRQ1 input is P33 case INPUT_LINE_IRQ1: if (state != CLEAR_LINE && m_irq_line[1] == CLEAR_LINE) request_interrupt(1); @@ -1562,6 +1569,7 @@ void z8_device::execute_set_input(int inputnum, int state) break; + // IRQ2 input is P31 (also TIN and DAV2/RDY2 handshake, latter not emulated) case INPUT_LINE_IRQ2: if (state != CLEAR_LINE && m_irq_line[2] == CLEAR_LINE) request_interrupt(2); @@ -1582,6 +1590,7 @@ void z8_device::execute_set_input(int inputnum, int state) break; + // IRQ3 input is P30 (also serial DI) case INPUT_LINE_IRQ3: if (state != CLEAR_LINE && m_irq_line[3] == CLEAR_LINE && (m_p3m & Z8_P3M_P3_SERIAL) == 0) request_interrupt(3); diff --git a/src/devices/machine/6522via.cpp b/src/devices/machine/6522via.cpp index a0b66c138d8..37c7237db52 100644 --- a/src/devices/machine/6522via.cpp +++ b/src/devices/machine/6522via.cpp @@ -227,6 +227,7 @@ void via6522_device::device_start() m_t1 = timer_alloc(TIMER_T1); m_t2 = timer_alloc(TIMER_T2); m_ca2_timer = timer_alloc(TIMER_CA2); + m_cb2_timer = timer_alloc(TIMER_CB2); m_shift_timer = timer_alloc(TIMER_SHIFT); m_shift_irq_timer = timer_alloc(TIMER_SHIFT_IRQ); @@ -308,6 +309,7 @@ void via6522_device::device_reset() m_t1->adjust(attotime::never); m_t2->adjust(attotime::never); m_ca2_timer->adjust(attotime::never); + m_cb2_timer->adjust(attotime::never); m_shift_timer->adjust(attotime::never); m_shift_irq_timer->adjust(attotime::never); } @@ -585,6 +587,17 @@ u8 via6522_device::read(offs_t offset) { LOGINT("PB INT "); CLR_PB_INT(); + + if (m_out_cb2 && (CB2_PULSE_OUTPUT(m_pcr) || CB2_AUTO_HS(m_pcr))) + { + m_out_cb2 = 0; + m_cb2_handler(m_out_cb2); + } + + if (CB2_PULSE_OUTPUT(m_pcr)) + { + m_cb2_timer->adjust(clocks_to_attotime(1)); + } } break; @@ -780,11 +793,16 @@ void via6522_device::write(offs_t offset, u8 data) LOGINT("PB INT "); CLR_PB_INT(); - if (m_out_cb2 && CB2_AUTO_HS(m_pcr)) + if (m_out_cb2 && (CB2_PULSE_OUTPUT(m_pcr) || CB2_AUTO_HS(m_pcr))) { m_out_cb2 = 0; m_cb2_handler(m_out_cb2); } + + if (CB2_PULSE_OUTPUT(m_pcr)) + { + m_cb2_timer->adjust(clocks_to_attotime(1)); + } break; case VIA_PA: diff --git a/src/devices/machine/6522via.h b/src/devices/machine/6522via.h index c79f0fa5903..1a705ab6a29 100644 --- a/src/devices/machine/6522via.h +++ b/src/devices/machine/6522via.h @@ -105,6 +105,8 @@ private: static constexpr device_timer_id TIMER_T2 = 2; static constexpr device_timer_id TIMER_CA2 = 3; static constexpr device_timer_id TIMER_SHIFT_IRQ = 4; + static constexpr device_timer_id TIMER_CB2 = 5; + uint16_t get_counter1_value(); void counter2_decrement(); @@ -175,6 +177,7 @@ private: attotime m_time2; uint8_t m_t2_active; emu_timer *m_ca2_timer; + emu_timer *m_cb2_timer; emu_timer *m_shift_timer; emu_timer *m_shift_irq_timer; diff --git a/src/devices/machine/e05a30.h b/src/devices/machine/e05a30.h index 5dfb51ac81c..4cc88759ff5 100644 --- a/src/devices/machine/e05a30.h +++ b/src/devices/machine/e05a30.h @@ -39,7 +39,7 @@ public: DECLARE_WRITE_LINE_MEMBER( centronics_input_data6 ) { if (state) m_centronics_data |= 0x40; else m_centronics_data &= ~0x40; } DECLARE_WRITE_LINE_MEMBER( centronics_input_data7 ) { if (state) m_centronics_data |= 0x80; else m_centronics_data &= ~0x80; } - int ready_led() { return !m_centronics_busy; } + int ready_led() { return !m_centronics_busy; } protected: // device-level overrides diff --git a/src/devices/machine/nscsi_bus.cpp b/src/devices/machine/nscsi_bus.cpp index 99de59881fe..60d7e54d2fd 100644 --- a/src/devices/machine/nscsi_bus.cpp +++ b/src/devices/machine/nscsi_bus.cpp @@ -630,6 +630,10 @@ void nscsi_full_device::scsi_unknown_command() void nscsi_full_device::scsi_command() { switch(scsi_cmdbuf[0]) { + case SC_REZERO: + LOG("command REZERO\n"); + scsi_status_complete(SS_GOOD); + break; case SC_REQUEST_SENSE: LOG("command REQUEST SENSE alloc=%d\n", scsi_cmdbuf[4]); scsi_data_in(SBUF_SENSE, scsi_cmdbuf[4] ? std::min(scsi_cmdbuf[4], u8(sizeof(scsi_sense_buffer))) : 4); diff --git a/src/devices/machine/pit8253.cpp b/src/devices/machine/pit8253.cpp index f0f4450e90d..7d0d4246b67 100644 --- a/src/devices/machine/pit8253.cpp +++ b/src/devices/machine/pit8253.cpp @@ -201,7 +201,7 @@ void pit_counter_device::device_reset() inline void pit_counter_device::adjust_timer(attotime target) { -// if (target != m_next_update) +// if (target != m_next_update) { m_next_update = target; m_updatetimer->adjust(target - machine().time()); diff --git a/src/devices/machine/pit8253.h b/src/devices/machine/pit8253.h index a862dee8aad..c602a64a3d1 100644 --- a/src/devices/machine/pit8253.h +++ b/src/devices/machine/pit8253.h @@ -84,7 +84,7 @@ private: // internal state int m_index; // index number of the timer double m_clockin; // input clock frequency in Hz - attotime m_clock_period; // precomputed input clock period + attotime m_clock_period; // precomputed input clock period int m_clock_signal; // clock signal when clockin is 0 attotime m_last_updated; // time when last updated diff --git a/src/devices/machine/z80dma.cpp b/src/devices/machine/z80dma.cpp index 831c20e7aff..1a347cc2f24 100644 --- a/src/devices/machine/z80dma.cpp +++ b/src/devices/machine/z80dma.cpp @@ -154,6 +154,7 @@ z80dma_device::z80dma_device(const machine_config &mconfig, const char *tag, dev , device_z80daisy_interface(mconfig, *this) , m_out_busreq_cb(*this) , m_out_int_cb(*this) + , m_out_ieo_cb(*this) , m_out_bao_cb(*this) , m_in_mreq_cb(*this) , m_out_mreq_cb(*this) @@ -172,6 +173,7 @@ void z80dma_device::device_start() // resolve callbacks m_out_busreq_cb.resolve_safe(); m_out_int_cb.resolve_safe(); + m_out_ieo_cb.resolve_safe(); m_out_bao_cb.resolve_safe(); m_in_mreq_cb.resolve_safe(0); m_out_mreq_cb.resolve_safe(); @@ -189,6 +191,7 @@ void z80dma_device::device_start() save_item(NAME(m_status)); save_item(NAME(m_dma_enabled)); save_item(NAME(m_vector)); + save_item(NAME(m_iei)); save_item(NAME(m_ip)); save_item(NAME(m_ius)); save_item(NAME(m_addressA)); @@ -331,6 +334,7 @@ int z80dma_device::is_ready() void z80dma_device::interrupt_check() { m_out_int_cb(m_ip ? ASSERT_LINE : CLEAR_LINE); + m_out_ieo_cb(m_iei && !m_ip); } diff --git a/src/devices/machine/z80dma.h b/src/devices/machine/z80dma.h index ec49d9ea2b6..14725329bd0 100644 --- a/src/devices/machine/z80dma.h +++ b/src/devices/machine/z80dma.h @@ -53,6 +53,7 @@ public: auto out_busreq_callback() { return m_out_busreq_cb.bind(); } auto out_int_callback() { return m_out_int_cb.bind(); } + auto out_ieo_callback() { return m_out_ieo_cb.bind(); } auto out_bao_callback() { return m_out_bao_cb.bind(); } auto in_mreq_callback() { return m_in_mreq_cb.bind(); } auto out_mreq_callback() { return m_out_mreq_cb.bind(); } @@ -62,6 +63,7 @@ public: uint8_t read(); void write(uint8_t data); + DECLARE_WRITE_LINE_MEMBER(iei_w) { m_iei = state; interrupt_check(); } DECLARE_WRITE_LINE_MEMBER(rdy_w); DECLARE_WRITE_LINE_MEMBER(wait_w); DECLARE_WRITE_LINE_MEMBER(bai_w); @@ -94,6 +96,7 @@ private: // internal state devcb_write_line m_out_busreq_cb; devcb_write_line m_out_int_cb; + devcb_write_line m_out_ieo_cb; devcb_write_line m_out_bao_cb; devcb_read8 m_in_mreq_cb; devcb_write8 m_out_mreq_cb; @@ -125,6 +128,7 @@ private: uint8_t m_latch; // interrupts + bool m_iei; int m_ip; // interrupt pending int m_ius; // interrupt under service uint8_t m_vector; // interrupt vector diff --git a/src/devices/sound/flt_rc.cpp b/src/devices/sound/flt_rc.cpp index 9a81d14aaa1..88fb3c7624f 100644 --- a/src/devices/sound/flt_rc.cpp +++ b/src/devices/sound/flt_rc.cpp @@ -63,6 +63,7 @@ void filter_rc_device::sound_stream_update(sound_stream &stream, stream_sample_t switch (m_type) { case LOWPASS: + case LOWPASS_2C: while (samples--) { memory += ((*src++ - memory) * m_k) / 0x10000; @@ -93,10 +94,21 @@ void filter_rc_device::recalc() { /* filter disabled */ m_k = 0x10000; + m_memory = 0x0; return; } Req = (m_R1 * (m_R2 + m_R3)) / (m_R1 + m_R2 + m_R3); break; + case LOWPASS_2C: + if (m_C == 0.0) + { + /* filter disabled */ + m_k = 0x10000; + m_memory = 0x0; + return; + } + Req = m_R1; + break; case HIGHPASS: case AC: if (m_C == 0.0) diff --git a/src/devices/sound/flt_rc.h b/src/devices/sound/flt_rc.h index 8e6057ceed0..cbf5772607e 100644 --- a/src/devices/sound/flt_rc.h +++ b/src/devices/sound/flt_rc.h @@ -18,6 +18,16 @@ * * Set C=0 to disable filter * + * FLT_RC_LOWPASS_@C: + * + * signal >--R1--+----> amp + * | + * C + * | + * GND + * + * Set C=0 to disable filter + * * FLT_RC_HIGHPASS: * * signal >--C---+----> amp @@ -53,8 +63,9 @@ public: enum { LOWPASS = 0, - HIGHPASS = 1, - AC = 2 + LOWPASS_2C = 2, + HIGHPASS = 3, + AC = 4 }; filter_rc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); @@ -70,6 +81,16 @@ public: return *this; } + filter_rc_device &set_lowpass(double R, double C) + { + m_type = LOWPASS_2C; + m_R1 = R; + m_R2 = 0; + m_R3 = 0; + m_C = C; + return *this; + } + filter_rc_device &filter_rc_set_RC(int type, double R1, double R2, double R3, double C) { m_stream->update(); diff --git a/src/devices/sound/sp0250.cpp b/src/devices/sound/sp0250.cpp index 594211548b3..a2476c9d521 100644 --- a/src/devices/sound/sp0250.cpp +++ b/src/devices/sound/sp0250.cpp @@ -241,7 +241,7 @@ int8_t sp0250_device::next() // DAC 62 -> 33,32,33,32 // DAC 63 -> 33,33,33,32 m_pwm_counts = (((dac + 68 + 3) >> 2) << 0) + - (((dac + 68 + 1) >> 2) << 8) + + (((dac + 68 + 1) >> 2) << 8) + (((dac + 68 + 2) >> 2) << 16) + (((dac + 68 + 0) >> 2) << 24); diff --git a/src/devices/sound/votrax.cpp b/src/devices/sound/votrax.cpp index 720df7d2ca9..8b416da6188 100644 --- a/src/devices/sound/votrax.cpp +++ b/src/devices/sound/votrax.cpp @@ -470,14 +470,17 @@ void votrax_sc01_device::chip_update() // Pitch counter. Equality comparison, so it's possible to make // it miss by manipulating the inflection inputs, but it'll wrap. - // There's a delay, hence the +1. - m_pitch = (m_pitch + 1) & 0x7f; - if(m_pitch == (0x7f ^ (m_inflection << 4) ^ m_filt_f1) + 1) + // There's a delay, hence the +2. + + // Intrinsically pre-divides by two, so we added one bit on the 7 + + m_pitch = (m_pitch + 1) & 0xff; + if(m_pitch == (0xe0 ^ (m_inflection << 5) ^ (m_filt_f1 << 1)) + 2) m_pitch = 0; // Filters are updated in index 1 of the pitch wave, which does // indeed mean four times in a row. - if((m_pitch >> 2) == 1) + if((m_pitch & 0xf9) == 0x08) filters_commit(false); // Noise shift register. 15 bits, with a nxor on the last two @@ -486,7 +489,7 @@ void votrax_sc01_device::chip_update() m_noise = ((m_noise << 1) & 0x7ffe) | inp; m_cur_noise = !(((m_noise >> 14) ^ (m_noise >> 13)) & 1); - // logerror("tick %02x.%03x 625=%d 208=%d pitch=%02x.%x ns=%04x ni=%d noise=%d cl=%x.%x clf=%d/%d\n", m_ticks, m_phonetick, tick_625, tick_208, m_pitch >> 2, m_pitch & 3, m_noise, inp, m_cur_noise, m_closure >> 2, m_closure & 3, m_rom_closure, m_cur_closure); + // logerror("%s tick %02x.%03x 625=%d 208=%d pitch=%02x.%x ns=%04x ni=%d noise=%d cl=%x.%x clf=%d/%d\n", machine().time().to_string(), m_ticks, m_phonetick, tick_625, tick_208, m_pitch >> 3, m_pitch & 7, m_noise, inp, m_cur_noise, m_closure >> 2, m_closure & 3, m_rom_closure, m_cur_closure); } void votrax_sc01_device::filters_commit(bool force) @@ -570,7 +573,7 @@ stream_sample_t votrax_sc01_device::analog_calc() // Voice-only path. // 1. Pick up the pitch wave - double v = m_pitch >= (9 << 2) ? 0 : s_glottal_wave[m_pitch >> 2]; + double v = m_pitch >= (9 << 3) ? 0 : s_glottal_wave[m_pitch >> 3]; // 2. Multiply by the initial amplifier. It's linear on the die, // even if it's not in the patent. @@ -622,7 +625,7 @@ stream_sample_t votrax_sc01_device::analog_calc() shift_hist(vn, m_vn_4); // 13. Apply the glottal closure amplitude, also linear - vn = vn * (7 ^ (m_cur_closure >> 2)) / 7.0; + vn = vn * (7 ^ (m_closure >> 2)) / 7.0; shift_hist(vn, m_vn_5); // 13. Apply the final fixed filter diff --git a/src/devices/video/epic12.cpp b/src/devices/video/epic12.cpp index ed23f2ebe88..e8368f8bac9 100644 --- a/src/devices/video/epic12.cpp +++ b/src/devices/video/epic12.cpp @@ -141,21 +141,21 @@ inline u16 epic12_device::COPY_NEXT_WORD(address_space &space, offs_t *addr) } /* - Upload command - This command uploads gfx data to VRAM, from Main CPU RAM. - - Offset Bits Description - fedcba98 76543210 - 00 0010---- -------- 0x2 for upload - ----0000 00000000 Fixed for upload? - 02 00000000 00000000 "" - 04 10011001 10011001 "" - 06 10011001 10011001 "" - 08 ---xxxxx xxxxxxxx Destination X start position - 0a ----xxxx xxxxxxxx Destination Y start position - 0c ---xxxxx xxxxxxxx Source Width - 0e ----xxxx xxxxxxxx Source Height - 10...10 + (Width * Height * 2) Source GFX data (ARGB1555 format) + Upload command + This command uploads gfx data to VRAM, from Main CPU RAM. + + Offset Bits Description + fedcba98 76543210 + 00 0010---- -------- 0x2 for upload + ----0000 00000000 Fixed for upload? + 02 00000000 00000000 "" + 04 10011001 10011001 "" + 06 10011001 10011001 "" + 08 ---xxxxx xxxxxxxx Destination X start position + 0a ----xxxx xxxxxxxx Destination Y start position + 0c ---xxxxx xxxxxxxx Source Width + 0e ----xxxx xxxxxxxx Source Height + 10...10 + (Width * Height * 2) Source GFX data (ARGB1555 format) */ inline void epic12_device::gfx_upload_shadow_copy(address_space &space, offs_t *addr) @@ -319,38 +319,38 @@ const epic12_device::blitfunction epic12_device::f1_ti0_tr0_blit_funcs[64] = /* - Draw command - This command draws gfx data. - - Offset Bits Description - fedcba98 76543210 - 00 0001---- -------- 0x1 for draw - ----x--- -------- Flip X - -----x-- -------- Flip Y - ------x- -------- Enable Blending - -------x -------- Enable Transparent - -------- -xxx---- Source Blending mode - -------- -----xxx Destination Blending mode - 02 xxxxxxxx -------- Source Alpha value - -------- xxxxxxxx Destination Alpha value - 04 ---xxxxx xxxxxxxx Source X start position - 06 ----xxxx xxxxxxxx Source Y start position - 08 sxxxxxxx xxxxxxxx Destination X start position - 0a sxxxxxxx xxxxxxxx Destination Y start position - 0c ---xxxxx xxxxxxxx Source Width - 0e ----xxxx xxxxxxxx Source Height - 10 -------- xxxxxxxx Source Red multiplication (0x80 = 100%) - 12 xxxxxxxx -------- Source Green multiplication (0x80 = 100%) - -------- xxxxxxxx Source Blue multiplication (0x80 = 100%) - - Blending mode (description from ibara test mode) - 000 +alpha - 001 +source - 010 +destination - 100 -alpha - 101 -source - 110 -destination - others are reserved/disable? + Draw command + This command draws gfx data. + + Offset Bits Description + fedcba98 76543210 + 00 0001---- -------- 0x1 for draw + ----x--- -------- Flip X + -----x-- -------- Flip Y + ------x- -------- Enable Blending + -------x -------- Enable Transparent + -------- -xxx---- Source Blending mode + -------- -----xxx Destination Blending mode + 02 xxxxxxxx -------- Source Alpha value + -------- xxxxxxxx Destination Alpha value + 04 ---xxxxx xxxxxxxx Source X start position + 06 ----xxxx xxxxxxxx Source Y start position + 08 sxxxxxxx xxxxxxxx Destination X start position + 0a sxxxxxxx xxxxxxxx Destination Y start position + 0c ---xxxxx xxxxxxxx Source Width + 0e ----xxxx xxxxxxxx Source Height + 10 -------- xxxxxxxx Source Red multiplication (0x80 = 100%) + 12 xxxxxxxx -------- Source Green multiplication (0x80 = 100%) + -------- xxxxxxxx Source Blue multiplication (0x80 = 100%) + + Blending mode (description from ibara test mode) + 000 +alpha + 001 +source + 010 +destination + 100 -alpha + 101 -source + 110 -destination + others are reserved/disable? */ inline void epic12_device::gfx_draw_shadow_copy(address_space &space, offs_t *addr) diff --git a/src/devices/video/i8244.cpp b/src/devices/video/i8244.cpp index f2aaa56be48..6721f43ed2d 100644 --- a/src/devices/video/i8244.cpp +++ b/src/devices/video/i8244.cpp @@ -369,7 +369,7 @@ void i8244_device::write(offs_t offset, uint8_t data) return; // update screen before accessing video registers - if (offset < 0xa4 || offset >= 0xc0) + if (offset >= 0x80 && offset < 0xa4) screen().update_now(); // color registers d4-d7 are not connected @@ -518,13 +518,13 @@ uint32_t i8244_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap int w = ( m_vdc.s.control & 0x80 ) ? width : 2; /* Draw horizontal part of the grid */ - for ( int j = 1, y = 0; y < 9; y++, j <<= 1 ) + for ( int y = 0; y < 9; y++ ) { if ( y_grid_offset + y * height <= scanline && scanline < y_grid_offset + y * height + 3 ) { for ( int i = 0; i < 9; i++ ) { - if ( ( m_vdc.s.hgrid[0][i] & j ) || ( m_vdc.s.hgrid[1][i] & ( j >> 8 ) ) ) + if ( BIT(m_vdc.s.hgrid[1][i] << 8 | m_vdc.s.hgrid[0][i], y) ) { for ( int k = 0; k < width + 2; k++ ) { diff --git a/src/emu/inputdev.cpp b/src/emu/inputdev.cpp index 66480068a14..e29dfe39315 100644 --- a/src/emu/inputdev.cpp +++ b/src/emu/inputdev.cpp @@ -570,8 +570,7 @@ void input_class::remap_device_index(int oldindex, int newindex) if (nullptr != m_device[newindex].get()) m_device[newindex]->set_devindex(newindex); - // update the maximum index found, since newindex may - // exceed current m_maxindex + // update the maximum index found, since newindex may exceed current m_maxindex m_maxindex = std::max(m_maxindex, newindex); } diff --git a/src/emu/speaker.h b/src/emu/speaker.h index 26896dd7e3f..7cf27d12471 100644 --- a/src/emu/speaker.h +++ b/src/emu/speaker.h @@ -83,9 +83,9 @@ protected: // internal state static constexpr int BUCKETS_PER_SECOND = 10; - std::vector<s32> m_max_sample; - s32 m_current_max; - u32 m_samples_this_bucket; + std::vector<s32> m_max_sample; + s32 m_current_max; + u32 m_samples_this_bucket; }; diff --git a/src/emu/xtal.cpp b/src/emu/xtal.cpp index c1d3b9f6467..9a8f5092fe5 100644 --- a/src/emu/xtal.cpp +++ b/src/emu/xtal.cpp @@ -92,6 +92,7 @@ const double XTAL::known_xtals[] = { 3'521'280, /* 3.52128_MHz_XTAL RCA COSMAC VIP */ 3'546'800, /* 3.5468_MHz_XTAL Atari 400 PAL */ 3'547'000, /* 3.547_MHz_XTAL Philips G7200, Philips C7240 */ + 3'562'500, /* 3.5625_MHz_XTAL Jopac JO7400 */ 3'570'000, /* 3.57_MHz_XTAL Telmac TMC-600 */ 3'578'640, /* 3.57864_MHz_XTAL Atari Portfolio PCD3311T */ 3'579'000, /* 3.579_MHz_XTAL BeebOPL */ diff --git a/src/lib/formats/apridisk.cpp b/src/lib/formats/apridisk.cpp index 4c2cad2123c..bb53006f188 100644 --- a/src/lib/formats/apridisk.cpp +++ b/src/lib/formats/apridisk.cpp @@ -12,8 +12,6 @@ #include "imageutl.h" -#include "emucore.h" // emu_fatalerror - apridisk_format::apridisk_format() { @@ -100,7 +98,10 @@ bool apridisk_format::load(io_generic *io, uint32_t form_factor, floppy_image *i uint16_t length = pick_integer_le(comp, 0, 2); if (length != SECTOR_SIZE) - throw emu_fatalerror("apridisk_format: Invalid compression length %04x\n", length); + { + osd_printf_error("apridisk_format: Invalid compression length %04x\n", length); + return false; + } memset(data_ptr, comp[2], SECTOR_SIZE); } @@ -111,7 +112,8 @@ bool apridisk_format::load(io_generic *io, uint32_t form_factor, floppy_image *i break; default: - throw emu_fatalerror("apridisk_format: Invalid compression %04x\n", compression); + osd_printf_error("apridisk_format: Invalid compression %04x\n", compression); + return false; } sectors[track][head][sector - 1].data = data_ptr; diff --git a/src/lib/formats/dfi_dsk.cpp b/src/lib/formats/dfi_dsk.cpp index f36969b58f0..23884f10b52 100644 --- a/src/lib/formats/dfi_dsk.cpp +++ b/src/lib/formats/dfi_dsk.cpp @@ -13,8 +13,6 @@ #include "dfi_dsk.h" -#include "emucore.h" // emu_fatalerror - #include <zlib.h> #define NUMBER_OF_MULTIREADS 3 @@ -62,13 +60,19 @@ int dfi_format::identify(io_generic *io, uint32_t form_factor) { char sign[4]; io_generic_read(io, sign, 0, 4); - if (memcmp(sign, "DFER", 4) == 0) - throw emu_fatalerror("Old type Discferret image detected; the mess Discferret decoder will not handle this properly, bailing out!\n"); return memcmp(sign, "DFE2", 4) ? 0 : 100; } bool dfi_format::load(io_generic *io, uint32_t form_factor, floppy_image *image) { + char sign[4]; + io_generic_read(io, sign, 0, 4); + if (memcmp(sign, "DFER", 4) == 0) + { + osd_printf_error("dfi_dsk: Old type Discferret image detected; the mess Discferret decoder will not handle this properly, bailing out!\n"); + return false; + } + uint64_t size = io_generic_size(io); uint64_t pos = 4; std::vector<uint8_t> data; @@ -102,7 +106,10 @@ bool dfi_format::load(io_generic *io, uint32_t form_factor, floppy_image *image) int total_time = 0; // total sampled time per track for(int i=0; i<tsize; i++) { uint8_t v = data[i]; - if (v == 0xFF) { fprintf(stderr,"DFI stream contained a 0xFF at t%d, position%d, THIS SHOULD NEVER HAPPEN! Bailing out!\n", track, i); exit(1); } + if (v == 0xFF) { + osd_printf_error("dfi_dsk: DFI stream contained a 0xFF at t%d, position%d, THIS SHOULD NEVER HAPPEN! Bailing out!\n", track, i); + return false; + } if((v & 0x7f) == 0x7f) total_time += 0x7f; else if(v & 0x80) { @@ -121,30 +128,30 @@ bool dfi_format::load(io_generic *io, uint32_t form_factor, floppy_image *image) if (onerev_time == 0) onerev_time = total_time; if(!track && !head) - fprintf(stderr, "%02d:%d tt=%10d it=%10d\n", track, head, total_time, index_time); + osd_printf_verbose("dfi_dsk: %02d:%d tt=%10d it=%10d\n", track, head, total_time, index_time); if(!track && !head) { - fprintf(stderr, "index_count: %d, onerev_time: %d\n", index_count, onerev_time); + osd_printf_verbose("dfi_dsk: index_count: %d, onerev_time: %d\n", index_count, onerev_time); if ((onerev_time > REV25_MIN) && (onerev_time < REV25_MAX)) { - fprintf(stderr, "Guess: speed: 360rpm, clock 25MHz\n"); + osd_printf_verbose("dfi_dsk: Guess: speed: 360rpm, clock 25MHz\n"); clock_rate = 25000000; rpm = 360; } else if ((onerev_time > REV25_MIN*1.2) && (onerev_time < REV25_MAX*1.2)) { - fprintf(stderr, "Guess: speed: 300rpm, clock 25MHz\n"); + osd_printf_verbose("dfi_dsk: Guess: speed: 300rpm, clock 25MHz\n"); clock_rate = 25000000; rpm = 300; } else if ((onerev_time > REV25_MIN*2) && (onerev_time < REV25_MAX*2)) { - fprintf(stderr, "Guess: speed: 360rpm, clock 50MHz\n"); + osd_printf_verbose("dfi_dsk: Guess: speed: 360rpm, clock 50MHz\n"); clock_rate = 50000000; rpm = 360; } else if ((onerev_time > (REV25_MIN*2)*1.2) && (onerev_time < (REV25_MAX*2)*1.2)) { - fprintf(stderr, "Guess: speed: 300rpm, clock 50MHz\n"); + osd_printf_verbose("dfi_dsk: Guess: speed: 300rpm, clock 50MHz\n"); clock_rate = 50000000; rpm = 300; } else if ((onerev_time > REV25_MIN*4) && (onerev_time < REV25_MAX*4)) { - fprintf(stderr, "Guess: speed: 360rpm, clock 100MHz\n"); + osd_printf_verbose("dfi_dsk: Guess: speed: 360rpm, clock 100MHz\n"); clock_rate = 100000000; rpm = 360; } else if ((onerev_time > (REV25_MIN*4)*1.2) && (onerev_time < (REV25_MAX*4)*1.2)) { - fprintf(stderr, "Guess: speed: 300rpm, clock 100MHz\n"); + osd_printf_verbose("dfi_dsk: Guess: speed: 300rpm, clock 100MHz\n"); clock_rate = 100000000; rpm = 300; } else - fprintf(stderr, "WARNING: Cannot Guess Speed! Assuming 360rpm, 100Mhz clock!\n"); - fprintf(stderr,"Actual rpm based on index: %f\n", ((double)clock_rate/(double)onerev_time)*60); + osd_printf_warning("dfi_dsk: WARNING: Cannot Guess Speed! Assuming 360rpm, 100Mhz clock!\n"); + osd_printf_verbose("dfi_dsk: Actual rpm based on index: %f\n", ((double)clock_rate/(double)onerev_time)*60); } rpm += 0; // HACK: prevent GCC 4.6+ from warning "variable set but unused" @@ -187,7 +194,7 @@ bool dfi_format::load(io_generic *io, uint32_t form_factor, floppy_image *image) // cur_time and onerev_time need to be converted to something standard, so we'll stick with 300rpm at the standard 200mhz rate that mfi uses internally // TODO for 4/22/2012: ACTUALLY DO THIS RESCALING STEP // filter out spurious crap - //if (trans_time <= MIN_THRESH) fprintf(stderr, "DFI: Throwing out short transition of length %d\n", trans_time); + //if (trans_time <= MIN_THRESH) osd_printf_verbose("dfi_dsk: Throwing out short transition of length %d\n", trans_time); // the normal case: write the transition at the appropriate time if ((prev_time == 0) || ((trans_time > MIN_THRESH) && (trans_time <= MAX_THRESH))) { mg = mg == floppy_image::MG_A ? floppy_image::MG_B : floppy_image::MG_A; @@ -197,7 +204,7 @@ bool dfi_format::load(io_generic *io, uint32_t form_factor, floppy_image *image) // the long case: we probably missed a transition, stuff an extra guessed one in there to see if it helps if (trans_time > MAX_THRESH) { mg = mg == floppy_image::MG_A ? floppy_image::MG_B : floppy_image::MG_A; - if (((track%2)==0)&&(head==0)) fprintf(stderr,"missed transition, total time for transition is %d\n",trans_time); + if (((track%2)==0)&&(head==0)) osd_printf_info("dfi_dsk: missed transition, total time for transition is %d\n",trans_time); #ifndef FAKETRANS_ONE buf[tpos++] = mg | uint32_t((200000000ULL*(cur_time-(trans_time/2)))/index_time); // generate imaginary transition at half period #else @@ -208,7 +215,7 @@ bool dfi_format::load(io_generic *io, uint32_t form_factor, floppy_image *image) mg = mg == floppy_image::MG_A ? floppy_image::MG_B : floppy_image::MG_A; buf[tpos++] = mg | uint32_t(200000000ULL*cur_time/index_time); // generate transition now prev_time = cur_time; - } + } } } #ifdef TRACK_HISTOGRAM diff --git a/src/lib/formats/jvc_dsk.cpp b/src/lib/formats/jvc_dsk.cpp index 2bbbb15bd2d..960c384fdb7 100644 --- a/src/lib/formats/jvc_dsk.cpp +++ b/src/lib/formats/jvc_dsk.cpp @@ -106,8 +106,6 @@ #include "jvc_dsk.h" -#include "emucore.h" // emu_fatalerror - jvc_format::jvc_format() { @@ -136,8 +134,7 @@ bool jvc_format::parse_header(io_generic *io, int &header_size, int &tracks, int header_size = size % 256; uint8_t header[5]; - // if we know that this is a header of a bad size, we can fail - // immediately; otherwise read the header + // if we know that this is a header of a bad size, we can fail immediately; otherwise read the header if (header_size >= sizeof(header)) return false; if (header_size > 0) @@ -152,7 +149,8 @@ bool jvc_format::parse_header(io_generic *io, int &header_size, int &tracks, int switch (header_size) { case 5: - throw emu_fatalerror("jvc_format: sector attribute flag unsupported\n"); + osd_printf_info("jvc_format: sector attribute flag unsupported\n"); + return false; case 4: base_sector_id = header[3]; // no break case 3: sector_size = 128 << header[2]; @@ -185,7 +183,10 @@ bool jvc_format::load(io_generic *io, uint32_t form_factor, floppy_image *image) // safety check if (sector_count * sector_size > 10000) - throw emu_fatalerror("jvc_format: incorrect track layout\n"); + { + osd_printf_error("jvc_format: incorrect track layout\n"); + return false; + } int file_offset = header_size; @@ -254,7 +255,10 @@ bool jvc_format::save(io_generic *io, floppy_image *image) for (int i = 0; i < 18; i++) { if (sectors[1 + i].size != 256) - throw emu_fatalerror("jvc_format: invalid sector size: %d\n", sectors[1 + i].size); + { + osd_printf_error("jvc_format: invalid sector size: %d\n", sectors[1 + i].size); + return false; + } io_generic_write(io, sectors[1 + i].data, file_offset, sectors[1 + i].size); file_offset += sectors[1 + i].size; diff --git a/src/lib/netlist/analog/nlid_twoterm.h b/src/lib/netlist/analog/nlid_twoterm.h index ebbfa479864..6f42e90b3bf 100644 --- a/src/lib/netlist/analog/nlid_twoterm.h +++ b/src/lib/netlist/analog/nlid_twoterm.h @@ -635,8 +635,8 @@ namespace analog , m_compiled(*this, "m_compiled") , m_funcparam({nlconst::zero()}) { - register_subalias("P", P()); - register_subalias("N", N()); + register_subalias("P", "1"); + register_subalias("N", "2"); if (!m_func().empty()) m_compiled->compile(m_func(), std::vector<pstring>({{pstring("T")}})); } diff --git a/src/lib/netlist/build/doxygen.conf b/src/lib/netlist/build/doxygen.conf index fc500b3aabb..dcafc37f852 100644 --- a/src/lib/netlist/build/doxygen.conf +++ b/src/lib/netlist/build/doxygen.conf @@ -771,7 +771,7 @@ WARN_LOGFILE = # spaces. See also FILE_PATTERNS and EXTENSION_MAPPING # Note: If this tag is empty the current directory is searched. -INPUT = .. ../analog ../documentation ../devices ../macro +INPUT = .. ../analog ../documentation ../devices ../macro ../core # This tag can be used to specify the character encoding of the source files # that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses @@ -844,7 +844,7 @@ EXCLUDE_SYMBOLS = # that contain example code fragments that are included (see the \include # command). -EXAMPLE_PATH = ../documentation ../examples ./html +EXAMPLE_PATH = ../documentation ../examples ./html # If the value of the EXAMPLE_PATH tag contains directories, you can use the # EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and diff --git a/src/lib/netlist/build/makefile b/src/lib/netlist/build/makefile index 7e90e7bb645..82f9f1c12b6 100644 --- a/src/lib/netlist/build/makefile +++ b/src/lib/netlist/build/makefile @@ -370,7 +370,7 @@ man: nltool$(EXESUFFIX) nlwav$(EXESUFFIX) help2man --include=nltool.help2man --no-info ./nltool$(EXESUFFIX) > man/nltool.1 groff -mandoc -Thtml man/nltool.1 > html/nltool.html -doc: nltool$(EXESUFFIX) nlwav$(EXESUFFIX) +doc: ./nltool$(EXESUFFIX) -c docheader > ../documentation/devsyn.dox.h $(DOXYGEN) doxygen.conf diff --git a/src/lib/netlist/core/core_device.h b/src/lib/netlist/core/core_device.h index e1df57deb50..2e511ce6c9b 100644 --- a/src/lib/netlist/core/core_device.h +++ b/src/lib/netlist/core/core_device.h @@ -66,11 +66,13 @@ namespace netlist }; stats_t * stats() const noexcept { return m_stats.get(); } -#if 0 - virtual void update() noexcept { } -#endif + virtual void reset() { } + void handler_noop() + { + } + protected: virtual void inc_active() noexcept { } diff --git a/src/lib/netlist/core/device.h b/src/lib/netlist/core/device.h index c087686b0dc..241325970d2 100644 --- a/src/lib/netlist/core/device.h +++ b/src/lib/netlist/core/device.h @@ -40,7 +40,6 @@ namespace netlist protected: //NETLIB_UPDATE_TERMINALSI() { } - private: param_model_t m_model; }; diff --git a/src/lib/netlist/core/device_macros.h b/src/lib/netlist/core/device_macros.h index 127447e194a..6c32613054d 100644 --- a/src/lib/netlist/core/device_macros.h +++ b/src/lib/netlist/core/device_macros.h @@ -153,6 +153,8 @@ class NETLIB_NAME(name) : public delegator_t<base_device_t> #define NETLIB_DELEGATE(name) nldelegate(&this_type :: name, this) +#define NETLIB_DELEGATE_NOOP() nldelegate(&core_device_t::handler_noop, static_cast<core_device_t *>(this)) + #define NETLIB_UPDATE_TERMINALSI() virtual void update_terminals() noexcept override #define NETLIB_HANDLERI(name) void name() noexcept #define NETLIB_UPDATE_PARAMI() virtual void update_param() noexcept override diff --git a/src/lib/netlist/core/devices.h b/src/lib/netlist/core/devices.h index de4b11b994a..f14832aa0b7 100644 --- a/src/lib/netlist/core/devices.h +++ b/src/lib/netlist/core/devices.h @@ -138,7 +138,7 @@ namespace netlist { public: NETLIB_CONSTRUCTOR(nc_pin) - , m_I(*this, "I", NETLIB_DELEGATE(noop)) + , m_I(*this, "I", NETLIB_DELEGATE_NOOP()) { } @@ -146,10 +146,6 @@ namespace netlist //NETLIB_RESETI() {} private: - NETLIB_HANDLERI(noop) - { - } - analog_input_t m_I; }; diff --git a/src/lib/netlist/devices/net_lib.cpp b/src/lib/netlist/devices/net_lib.cpp index 4918a105fab..2ae4fd72442 100644 --- a/src/lib/netlist/devices/net_lib.cpp +++ b/src/lib/netlist/devices/net_lib.cpp @@ -248,18 +248,14 @@ namespace devices LIB_ENTRY(9310) LIB_ENTRY(9314) LIB_ENTRY(9316) - LIB_ENTRY(9321_GATE) LIB_ENTRY(9321) - LIB_ENTRY(9322_GATE) LIB_ENTRY(9322) LIB_ENTRY(9334) LIB_ENTRY(AM2847) - // FIXME: duplicate? LIB_ENTRY(CD4006) LIB_ENTRY(CD4013) LIB_ENTRY(CD4017) LIB_ENTRY(CD4022) - LIB_ENTRY(CD4020_WI) LIB_ENTRY(CD4020) LIB_ENTRY(CD4024) LIB_ENTRY(CD4053_GATE) @@ -267,28 +263,16 @@ namespace devices LIB_ENTRY(CD4316_GATE) LIB_ENTRY(4538) LIB_ENTRY(schmitt_trigger) - // entries with suffix WI are legacy only - //ENTRY(4066, CD_4066, "+A,B") LIB_ENTRY(NE555) LIB_ENTRY(NE555_dip) LIB_ENTRY(MC1455P) LIB_ENTRY(MC1455P_dip) LIB_ENTRY(TMS4800) - LIB_ENTRY(TMS4800_dip) LIB_ENTRY(r2r_dac) LIB_ENTRY(tristate) LIB_ENTRY(tristate3) - LIB_ENTRY(74175_dip) - LIB_ENTRY(74192_dip) - LIB_ENTRY(74193_dip) - LIB_ENTRY(74194_dip) - LIB_ENTRY(74365_dip) - LIB_ENTRY(8277_dip) LIB_ENTRY(9602) - LIB_ENTRY(9314_dip) - LIB_ENTRY(9334_dip) - LIB_ENTRY(AM2847_dip) - LIB_ENTRY(MM5837_dip) + LIB_ENTRY(MM5837) #endif } diff --git a/src/lib/netlist/devices/nld_4006.cpp b/src/lib/netlist/devices/nld_4006.cpp index 1e49a46b724..358b2097654 100644 --- a/src/lib/netlist/devices/nld_4006.cpp +++ b/src/lib/netlist/devices/nld_4006.cpp @@ -61,6 +61,7 @@ namespace netlist { } + private: NETLIB_HANDLERI(inputs) { if (m_last_clock && !m_CLOCK()) @@ -93,8 +94,6 @@ namespace netlist } } - friend class NETLIB_NAME(CD4006_dip); - private: logic_input_t m_CLOCK; object_array_t<logic_input_t, 4> m_I; object_array_t<logic_output_t, 7> m_Q; diff --git a/src/lib/netlist/devices/nld_4017.cpp b/src/lib/netlist/devices/nld_4017.cpp index d680eaa4829..c8bd465089c 100644 --- a/src/lib/netlist/devices/nld_4017.cpp +++ b/src/lib/netlist/devices/nld_4017.cpp @@ -60,6 +60,7 @@ namespace netlist { } + private: NETLIB_RESETI() { m_CLK.set_state(logic_t::STATE_INP_LH); @@ -90,7 +91,6 @@ namespace netlist } } - public: void update_outputs(const unsigned cnt) noexcept { for (std::size_t i = 0; i < _MaxCount; i++) diff --git a/src/lib/netlist/devices/nld_4020.cpp b/src/lib/netlist/devices/nld_4020.cpp index 9e2dd386654..bbca07b2c72 100644 --- a/src/lib/netlist/devices/nld_4020.cpp +++ b/src/lib/netlist/devices/nld_4020.cpp @@ -79,7 +79,7 @@ namespace netlist m_cnt = 0; m_IP.inactivate(); /* static */ const netlist_time reset_time = netlist_time::from_nsec(140); - for (int i = 0; i < _TotalBits; i++) + for (unsigned i = 0; i < _TotalBits; i++) if (((_LiveBitmask >> i) & 1) != 0) m_Q[i].push(0, reset_time); } @@ -100,7 +100,7 @@ namespace netlist NLTIME_FROM_NS(1380), NLTIME_FROM_NS(1480), }; - for (int i = 0; i < _TotalBits; i++) + for (unsigned i = 0; i < _TotalBits; i++) if (((_LiveBitmask >> i) & 1) != 0) m_Q[i].push((cnt >> i) & 1, out_delayQn[i]); } @@ -115,24 +115,24 @@ namespace netlist NETLIB_OBJECT(CD4020) { NETLIB_CONSTRUCTOR_MODEL(CD4020, "CD4XXX") - , m_sub(*this, "sub") + , m_sub(*this, "A") { - register_subalias("IP", m_sub.m_IP); - register_subalias("RESET", m_sub.m_RESET); - register_subalias("Q1", m_sub.m_Q[0]); - register_subalias("Q4", m_sub.m_Q[3]); - register_subalias("Q5", m_sub.m_Q[4]); - register_subalias("Q6", m_sub.m_Q[5]); - register_subalias("Q7", m_sub.m_Q[6]); - register_subalias("Q8", m_sub.m_Q[7]); - register_subalias("Q9", m_sub.m_Q[8]); - register_subalias("Q10", m_sub.m_Q[9]); - register_subalias("Q11", m_sub.m_Q[10]); - register_subalias("Q12", m_sub.m_Q[11]); - register_subalias("Q13", m_sub.m_Q[12]); - register_subalias("Q14", m_sub.m_Q[13]); - register_subalias("VDD", "sub.VDD"); - register_subalias("VSS", "sub.VSS"); + register_subalias("IP", "A.IP"); + register_subalias("RESET", "A.RESET"); + register_subalias("Q1", "A.Q1"); + register_subalias("Q4", "A.Q4"); + register_subalias("Q5", "A.Q5"); + register_subalias("Q6", "A.Q6"); + register_subalias("Q7", "A.Q7"); + register_subalias("Q8", "A.Q8"); + register_subalias("Q9", "A.Q9"); + register_subalias("Q10", "A.Q10"); + register_subalias("Q11", "A.Q11"); + register_subalias("Q12", "A.Q12"); + register_subalias("Q13", "A.Q13"); + register_subalias("Q14", "A.Q14"); + register_subalias("VDD", "A.VDD"); + register_subalias("VSS", "A.VSS"); } //NETLIB_RESETI() {} @@ -144,19 +144,19 @@ namespace netlist NETLIB_OBJECT(CD4024) { NETLIB_CONSTRUCTOR_MODEL(CD4024, "CD4XXX") - , m_sub(*this, "sub") + , m_sub(*this, "A") { - register_subalias("IP", m_sub.m_IP); - register_subalias("RESET", m_sub.m_RESET); - register_subalias("Q1", m_sub.m_Q[0]); - register_subalias("Q2", m_sub.m_Q[1]); - register_subalias("Q3", m_sub.m_Q[2]); - register_subalias("Q4", m_sub.m_Q[3]); - register_subalias("Q5", m_sub.m_Q[4]); - register_subalias("Q6", m_sub.m_Q[5]); - register_subalias("Q7", m_sub.m_Q[6]); - register_subalias("VDD", "sub.VDD"); - register_subalias("VSS", "sub.VSS"); + register_subalias("IP", "A.IP"); + register_subalias("RESET", "A.RESET"); + register_subalias("Q1", "A.Q1"); + register_subalias("Q2", "A.Q2"); + register_subalias("Q3", "A.Q3"); + register_subalias("Q4", "A.Q4"); + register_subalias("Q5", "A.Q5"); + register_subalias("Q6", "A.Q6"); + register_subalias("Q7", "A.Q7"); + register_subalias("VDD", "A.VDD"); + register_subalias("VSS", "A.VSS"); } //NETLIB_RESETI() {} @@ -167,8 +167,7 @@ namespace netlist - NETLIB_DEVICE_IMPL(CD4020, "CD4020", "") - NETLIB_DEVICE_IMPL_ALIAS(CD4020_WI, CD4020, "CD4020_WI", "+IP,+RESET,+VDD,+VSS") + NETLIB_DEVICE_IMPL(CD4020, "CD4020", "+IP,+RESET,+VDD,+VSS") NETLIB_DEVICE_IMPL(CD4024, "CD4024", "") diff --git a/src/lib/netlist/devices/nld_4020.h b/src/lib/netlist/devices/nld_4020.h index 942b2f2d457..440a164910c 100644 --- a/src/lib/netlist/devices/nld_4020.h +++ b/src/lib/netlist/devices/nld_4020.h @@ -6,18 +6,12 @@ #include "netlist/nl_setup.h" -/* FIXME: only used in mario.c */ -#define CD4020_WI(name, cIP, cRESET, cVDD, cVSS) \ - NET_REGISTER_DEV(CD4020_WI, name) \ - NET_CONNECT(name, IP, cIP) \ - NET_CONNECT(name, RESET, cRESET) \ - NET_CONNECT(name, VDD, cVDD) \ - NET_CONNECT(name, VSS, cVSS) +// usage : CD4020(name) +#define CD4020(...) \ + NET_REGISTER_DEVEXT(CD4020, __VA_ARGS__) -#define CD4020(name) \ - NET_REGISTER_DEV(CD4020, name) - -#define CD4024(name) \ - NET_REGISTER_DEV(CD4024, name) +// usage : CD4024(name) +#define CD4024(...) \ + NET_REGISTER_DEVEXT(CD4024, __VA_ARGS__) #endif /* NLD_4020_H_ */ diff --git a/src/lib/netlist/devices/nld_4053.cpp b/src/lib/netlist/devices/nld_4053.cpp index 5056b453622..fb61415f01d 100644 --- a/src/lib/netlist/devices/nld_4053.cpp +++ b/src/lib/netlist/devices/nld_4053.cpp @@ -47,10 +47,10 @@ namespace netlist , m_inhibit_state(*this, "m_inhibit_state", false) , m_supply(*this) { - connect(m_RX.N(), m_RY.N()); - register_subalias("X", m_RX.P()); - register_subalias("Y", m_RY.P()); - register_subalias("XY", m_RX.N()); + connect("RX.2", "RY.2"); + register_subalias("X", "RX.1"); + register_subalias("Y", "RY.1"); + register_subalias("XY", "RX.2"); } NETLIB_RESETI() diff --git a/src/lib/netlist/devices/nld_74107.cpp b/src/lib/netlist/devices/nld_74107.cpp index 913a9c41f44..b176d460d5c 100644 --- a/src/lib/netlist/devices/nld_74107.cpp +++ b/src/lib/netlist/devices/nld_74107.cpp @@ -69,27 +69,21 @@ namespace netlist namespace devices { - static constexpr const std::array<netlist_time, 2> delay_107 = { NLTIME_FROM_NS(16), NLTIME_FROM_NS(25) }; - static constexpr const std::array<netlist_time, 2> delay_107A = { NLTIME_FROM_NS(15), NLTIME_FROM_NS(15) }; - - NETLIB_OBJECT(74107A) + template <typename D> + NETLIB_OBJECT(74107_base) { - NETLIB_CONSTRUCTOR(74107A) + NETLIB_CONSTRUCTOR(74107_base) , m_clk(*this, "CLK", NETLIB_DELEGATE(clk)) - , m_Q(*this, "Q") - , m_QQ(*this, "QQ") , m_J(*this, "J", NETLIB_DELEGATE(other)) , m_K(*this, "K", NETLIB_DELEGATE(other)) , m_clrQ(*this, "CLRQ", NETLIB_DELEGATE(other)) + , m_Q(*this, "Q") + , m_QQ(*this, "QQ") , m_power_pins(*this) { - m_delay[0] = delay_107A[0]; - m_delay[1] = delay_107A[1]; } - friend class NETLIB_NAME(74107_dip); - friend class NETLIB_NAME(74107); - + private: NETLIB_RESETI() { m_clk.set_state(logic_t::STATE_INP_HL); @@ -127,35 +121,35 @@ namespace netlist newstate(((t ^ 1) & m_J()) | (t & (m_K() ^ 1))); } - private: - logic_input_t m_clk; - - logic_output_t m_Q; - logic_output_t m_QQ; + void newstate(const netlist_sig_t state) + { + m_Q.push(state, D::delay::value(state)); + m_QQ.push(state ^ 1, D::delay::value(state ^ 1)); + } - std::array<netlist_time, 2> m_delay; + logic_input_t m_clk; logic_input_t m_J; logic_input_t m_K; logic_input_t m_clrQ; + logic_output_t m_Q; + logic_output_t m_QQ; + nld_power_pins m_power_pins; - void newstate(const netlist_sig_t state) - { - m_Q.push(state, m_delay[state]); - m_QQ.push(state ^ 1, m_delay[state ^ 1]); - } }; - NETLIB_OBJECT_DERIVED(74107, 74107A) + struct desc_74107 : public desc_base { - public: - NETLIB_CONSTRUCTOR(74107) - { - m_delay[0] = delay_107[0]; - m_delay[1] = delay_107[1]; - } + using delay = times_ns2<16, 25>; }; + struct desc_74107A : public desc_base + { + using delay = times_ns2<15, 15>; + }; + + using NETLIB_NAME(74107) = NETLIB_NAME(74107_base)<desc_74107>; + using NETLIB_NAME(74107A) = NETLIB_NAME(74107_base)<desc_74107A>; NETLIB_DEVICE_IMPL(74107, "TTL_74107", "+CLK,+J,+K,+CLRQ,@VCC,@GND") NETLIB_DEVICE_IMPL(74107A, "TTL_74107A", "+CLK,+J,+K,+CLRQ,@VCC,@GND") diff --git a/src/lib/netlist/devices/nld_74113.cpp b/src/lib/netlist/devices/nld_74113.cpp index 1198771695e..fe8e6054d71 100644 --- a/src/lib/netlist/devices/nld_74113.cpp +++ b/src/lib/netlist/devices/nld_74113.cpp @@ -60,7 +60,8 @@ #include "nld_74113.h" #include "netlist/nl_base.h" -// Note: this can probably be merged with nld_7473.cpp +// FIXME: this can probably be merged with nld_7473.cpp +// FIXME: timing, see 74107 for example, use template namespace netlist { @@ -81,6 +82,7 @@ namespace netlist { } + private: NETLIB_RESETI() { m_last_CLK = 0; @@ -122,7 +124,6 @@ namespace netlist m_QQ.push(m_q ^ 1, NLTIME_FROM_NS(20)); // FIXME: timing } - public: logic_input_t m_CLK; logic_input_t m_J; logic_input_t m_K; @@ -138,7 +139,6 @@ namespace netlist NETLIB_OBJECT_DERIVED(74113A, 74113) { - public: NETLIB_CONSTRUCTOR(74113A) { } }; diff --git a/src/lib/netlist/devices/nld_74123.cpp b/src/lib/netlist/devices/nld_74123.cpp index f19f0042be1..a7651c9de6c 100644 --- a/src/lib/netlist/devices/nld_74123.cpp +++ b/src/lib/netlist/devices/nld_74123.cpp @@ -120,16 +120,16 @@ namespace netlist //, m_power_pins(*this) { - register_subalias(pstring(D::gnd()), m_RN.N()); - register_subalias(pstring(D::vcc()), m_RP.P()); - register_subalias("C", m_RN.N()); - register_subalias("RC", m_RN.P()); + register_subalias(pstring(D::gnd()), "RN.2"); + register_subalias(pstring(D::vcc()), "RP.1"); + register_subalias("C", "RN.2"); + register_subalias("RC", "RN.1"); - connect(m_RP_Q, m_RP.I()); - connect(m_RN_Q, m_RN.I()); + connect("_RP_Q", "RP.I"); + connect("_RN_Q", "RN.I"); - connect(m_RN.P(), m_RP.N()); - connect(m_CV, m_RN.P()); + connect("RN.1", "RP.2"); + connect("_CV", "RN.1"); m_RP.m_RON.set(D::RI()); m_RN.m_RON.set(D::RI()); diff --git a/src/lib/netlist/devices/nld_74153.cpp b/src/lib/netlist/devices/nld_74153.cpp index 6fea1a711d3..d26de50819e 100644 --- a/src/lib/netlist/devices/nld_74153.cpp +++ b/src/lib/netlist/devices/nld_74153.cpp @@ -67,6 +67,7 @@ namespace devices { } + private: NETLIB_RESETI() { m_chan = 0; @@ -92,7 +93,6 @@ namespace devices } } - public: object_array_t<logic_input_t, 4> m_C; logic_input_t m_G; diff --git a/src/lib/netlist/devices/nld_74164.cpp b/src/lib/netlist/devices/nld_74164.cpp index 9626232a309..36d794e315e 100644 --- a/src/lib/netlist/devices/nld_74164.cpp +++ b/src/lib/netlist/devices/nld_74164.cpp @@ -103,8 +103,6 @@ namespace netlist m_ab = static_cast<unsigned>((m_AB() == 3) ? 1 : 0); } - friend class NETLIB_NAME(74164_dip); - private: object_array_t<logic_input_t, 2> m_AB; logic_input_t m_CLRQ; logic_input_t m_CLK; diff --git a/src/lib/netlist/devices/nld_74165.cpp b/src/lib/netlist/devices/nld_74165.cpp index 527e4605bef..1da604aef36 100644 --- a/src/lib/netlist/devices/nld_74165.cpp +++ b/src/lib/netlist/devices/nld_74165.cpp @@ -36,7 +36,7 @@ namespace netlist { NETLIB_CONSTRUCTOR(74165) , m_DATA(*this, { "H", "G", "F", "E", "D", "C", "B", "A" }, NETLIB_DELEGATE(inputs)) - , m_SER(*this, "SER", NETLIB_DELEGATE(noop)) + , m_SER(*this, "SER", NETLIB_DELEGATE_NOOP()) , m_SH_LDQ(*this, "SH_LDQ", NETLIB_DELEGATE(inputs)) , m_CLK(*this, "CLK", NETLIB_DELEGATE(clk)) , m_CLKINH(*this, "CLKINH", NETLIB_DELEGATE(inputs)) @@ -53,10 +53,6 @@ namespace netlist m_shifter = 0; } - NETLIB_HANDLERI(noop) - { - } - NETLIB_HANDLERI(clk) { unsigned high_bit = m_SER() ? 0x80 : 0; diff --git a/src/lib/netlist/devices/nld_74166.cpp b/src/lib/netlist/devices/nld_74166.cpp index 467132c9451..e2b7901ff3c 100644 --- a/src/lib/netlist/devices/nld_74166.cpp +++ b/src/lib/netlist/devices/nld_74166.cpp @@ -50,6 +50,7 @@ namespace netlist { } + private: NETLIB_RESETI() { m_shifter = 0; @@ -103,8 +104,6 @@ namespace netlist m_QH.push(qh, delay); //FIXME } - friend class NETLIB_NAME(74166_dip); - private: object_array_t<logic_input_t, 8> m_DATA; logic_input_t m_SER; logic_input_t m_CLRQ; diff --git a/src/lib/netlist/devices/nld_74174.cpp b/src/lib/netlist/devices/nld_74174.cpp index cdc08aa8d8e..9949503ef42 100644 --- a/src/lib/netlist/devices/nld_74174.cpp +++ b/src/lib/netlist/devices/nld_74174.cpp @@ -162,7 +162,6 @@ namespace devices NETLIB_SUB(74174_GATE) F; }; - NETLIB_DEVICE_IMPL(74174_GATE, "TTL_74174_GATE", "") NETLIB_DEVICE_IMPL(74174, "TTL_74174", "+CLK,+D1,+D2,+D3,+D4,+D5,+D6,+CLRQ,@VCC,@GND") } //namespace devices diff --git a/src/lib/netlist/devices/nld_74174.h b/src/lib/netlist/devices/nld_74174.h index 7b41f818787..572cf560aae 100644 --- a/src/lib/netlist/devices/nld_74174.h +++ b/src/lib/netlist/devices/nld_74174.h @@ -6,10 +6,6 @@ #include "netlist/nl_setup.h" -// usage: TTL_74174_GATE(name) -#define TTL_74174_GATE(...) \ - NET_REGISTER_DEVEXT(TTL_74174_GATE, __VA_ARGS__) - // usage: TTL_74174(name, cCLK, cD1, cD2, cD3, cD4, cD5, cD6, cCLRQ) #define TTL_74174(...) \ NET_REGISTER_DEVEXT(TTL_74174, __VA_ARGS__) diff --git a/src/lib/netlist/devices/nld_74175.cpp b/src/lib/netlist/devices/nld_74175.cpp index 4e30785de08..aa7993ada7b 100644 --- a/src/lib/netlist/devices/nld_74175.cpp +++ b/src/lib/netlist/devices/nld_74175.cpp @@ -60,6 +60,7 @@ namespace netlist { } + private: NETLIB_RESETI() { m_CLK.set_state(logic_t::STATE_INP_LH); @@ -102,8 +103,6 @@ namespace netlist } } - friend class NETLIB_NAME(74175_dip); - private: object_array_t<logic_input_t, 4> m_D; logic_input_t m_CLRQ; @@ -115,40 +114,7 @@ namespace netlist nld_power_pins m_power_pins; }; - NETLIB_OBJECT(74175_dip) - { - NETLIB_CONSTRUCTOR(74175_dip) - , A(*this, "A") - { - register_subalias("9", A.m_CLK); - register_subalias("1", A.m_CLRQ); - - register_subalias("4", A.m_D[0]); - register_subalias("2", A.m_Q[0]); - register_subalias("3", A.m_QQ[0]); - - register_subalias("5", A.m_D[1]); - register_subalias("7", A.m_Q[1]); - register_subalias("6", A.m_QQ[1]); - - register_subalias("12", A.m_D[2]); - register_subalias("10", A.m_Q[2]); - register_subalias("11", A.m_QQ[2]); - - register_subalias("13", A.m_D[3]); - register_subalias("15", A.m_Q[3]); - register_subalias("14", A.m_QQ[3]); - - register_subalias("8", "A.GND"); - register_subalias("16", "A.VCC"); - } - //NETLIB_RESETI() {} - private: - NETLIB_SUB(74175) A; - }; - NETLIB_DEVICE_IMPL(74175, "TTL_74175", "+CLK,+D1,+D2,+D3,+D4,+CLRQ,@VCC,@GND") - NETLIB_DEVICE_IMPL(74175_dip,"TTL_74175_DIP", "") } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nld_74175.h b/src/lib/netlist/devices/nld_74175.h index 0687df96947..ae9faa9bae0 100644 --- a/src/lib/netlist/devices/nld_74175.h +++ b/src/lib/netlist/devices/nld_74175.h @@ -6,19 +6,9 @@ #include "netlist/nl_setup.h" -#define TTL_74175(name, cCLK, cD1, cD2, cD3, cD4, cCLRQ) \ - NET_REGISTER_DEV(TTL_74175, name) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, CLK, cCLK) \ - NET_CONNECT(name, D1, cD1) \ - NET_CONNECT(name, D2, cD2) \ - NET_CONNECT(name, D3, cD3) \ - NET_CONNECT(name, D4, cD4) \ - NET_CONNECT(name, CLRQ, cCLRQ) - -#define TTL_74175_DIP(name) \ - NET_REGISTER_DEV(TTL_74175_DIP, name) - +// usage : TTL_74175(name, pCLK, pD1, pD2, pD3, pD4, pCLRQ) +// auto connect: VCC, GND +#define TTL_74175(...) \ + NET_REGISTER_DEVEXT(TTL_74175, __VA_ARGS__) #endif /* NLD_74175_H_ */ diff --git a/src/lib/netlist/devices/nld_74192.cpp b/src/lib/netlist/devices/nld_74192.cpp index 5e77e245f97..f7c49bdd56d 100644 --- a/src/lib/netlist/devices/nld_74192.cpp +++ b/src/lib/netlist/devices/nld_74192.cpp @@ -75,7 +75,6 @@ namespace netlist m_last_CD = 0; } - friend class NETLIB_NAME(74192_dip); private: logic_input_t m_CLEAR; logic_input_t m_LOADQ; @@ -152,36 +151,7 @@ namespace netlist }; - NETLIB_OBJECT(74192_dip) - { - NETLIB_CONSTRUCTOR(74192_dip) - , A(*this, "A") - { - register_subalias("1", A.m_B); - register_subalias("2", A.m_Q[1]); - register_subalias("3", A.m_Q[0]); - register_subalias("4", A.m_CD); - register_subalias("5", A.m_CU); - register_subalias("6", A.m_Q[2]); - register_subalias("7", A.m_Q[3]); - register_subalias("8", "A.GND"); - - register_subalias("9", A.m_D); - register_subalias("10", A.m_C); - register_subalias("11", A.m_LOADQ); - register_subalias("12", A.m_CARRYQ); - register_subalias("13", A.m_BORROWQ); - register_subalias("14", A.m_CLEAR); - register_subalias("15", A.m_A); - register_subalias("16", "A.VCC"); - } - //NETLIB_RESETI() {} - private: - NETLIB_SUB(74192) A; - }; - NETLIB_DEVICE_IMPL(74192, "TTL_74192", "+A,+B,+C,+D,+CLEAR,+LOADQ,+CU,+CD,@VCC,@GND") - NETLIB_DEVICE_IMPL(74192_dip,"TTL_74192_DIP", "") } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nld_74192.h b/src/lib/netlist/devices/nld_74192.h index 30e80ad28fa..2331c151bb9 100644 --- a/src/lib/netlist/devices/nld_74192.h +++ b/src/lib/netlist/devices/nld_74192.h @@ -6,20 +6,9 @@ #include "netlist/nl_setup.h" -#define TTL_74192(name, cA, cB, cC, cD, cCLEAR, cLOADQ, cCU, cCD) \ - NET_REGISTER_DEV(TTL_74192, name) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, A, cA) \ - NET_CONNECT(name, B, cB) \ - NET_CONNECT(name, C, cC) \ - NET_CONNECT(name, D, cD) \ - NET_CONNECT(name, CLEAR, cCLEAR) \ - NET_CONNECT(name, LOADQ, cLOADQ) \ - NET_CONNECT(name, CU, cCU) \ - NET_CONNECT(name, CD, cCD) - -#define TTL_74192_DIP(name) \ - NET_REGISTER_DEV(TTL_74192_DIP, name) +// usage : TTL_74192(name, pA, pB, pC, pD, pCLEAR, pLOADQ, pCU, pCD) +// auto connect: VCC, GND +#define TTL_74192(...) \ + NET_REGISTER_DEVEXT(TTL_74192, __VA_ARGS__) #endif /* NLD_74192_H_ */ diff --git a/src/lib/netlist/devices/nld_74193.cpp b/src/lib/netlist/devices/nld_74193.cpp index 054f0462bdd..1fcec366aa5 100644 --- a/src/lib/netlist/devices/nld_74193.cpp +++ b/src/lib/netlist/devices/nld_74193.cpp @@ -33,7 +33,7 @@ namespace netlist static constexpr const unsigned MAXCNT = 15; - // FIXME: Timing + // FIXME: Timing, combine with 74192! static constexpr const std::array<netlist_time, 4> delay = { NLTIME_FROM_NS(40), @@ -65,6 +65,7 @@ namespace netlist { } + private: NETLIB_RESETI() { m_cnt = 0; @@ -72,9 +73,6 @@ namespace netlist m_last_CD = 0; } - friend class NETLIB_NAME(74193_dip); - private: - NETLIB_HANDLERI(inputs) { netlist_sig_t tCarry = 1; @@ -138,36 +136,7 @@ namespace netlist nld_power_pins m_power_pins; }; - NETLIB_OBJECT(74193_dip) - { - NETLIB_CONSTRUCTOR(74193_dip) - , A(*this, "A") - { - register_subalias("1", A.m_B); - register_subalias("2", A.m_Q[1]); - register_subalias("3", A.m_Q[0]); - register_subalias("4", A.m_CD); - register_subalias("5", A.m_CU); - register_subalias("6", A.m_Q[2]); - register_subalias("7", A.m_Q[3]); - register_subalias("8", "A.GND"); - - register_subalias("9", A.m_D); - register_subalias("10", A.m_C); - register_subalias("11", A.m_LOADQ); - register_subalias("12", A.m_CARRYQ); - register_subalias("13", A.m_BORROWQ); - register_subalias("14", A.m_CLEAR); - register_subalias("15", A.m_A); - register_subalias("16", "A.VCC"); - } - //NETLIB_RESETI() {} - private: - NETLIB_SUB(74193) A; - }; - NETLIB_DEVICE_IMPL(74193, "TTL_74193", "+A,+B,+C,+D,+CLEAR,+LOADQ,+CU,+CD,@VCC,@GND") - NETLIB_DEVICE_IMPL(74193_dip, "TTL_74193_DIP", "") } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nld_74193.h b/src/lib/netlist/devices/nld_74193.h index 5049f783016..fc9a1254c2f 100644 --- a/src/lib/netlist/devices/nld_74193.h +++ b/src/lib/netlist/devices/nld_74193.h @@ -6,20 +6,9 @@ #include "netlist/nl_setup.h" -#define TTL_74193(name, cA, cB, cC, cD, cCLEAR, cLOADQ, cCU, cCD) \ - NET_REGISTER_DEV(TTL_74193, name) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, A, cA) \ - NET_CONNECT(name, B, cB) \ - NET_CONNECT(name, C, cC) \ - NET_CONNECT(name, D, cD) \ - NET_CONNECT(name, CLEAR, cCLEAR) \ - NET_CONNECT(name, LOADQ, cLOADQ) \ - NET_CONNECT(name, CU, cCU) \ - NET_CONNECT(name, CD, cCD) - -#define TTL_74193_DIP(name) \ - NET_REGISTER_DEV(TTL_74193_DIP, name) +// usage : TTL_74193(name, pA, pB, pC, pD, pCLEAR, pLOADQ, pCU, pCD) +// auto connect: VCC, GND +#define TTL_74193(...) \ + NET_REGISTER_DEVEXT(TTL_74193, __VA_ARGS__) #endif /* NLD_74193_H_ */ diff --git a/src/lib/netlist/devices/nld_74194.cpp b/src/lib/netlist/devices/nld_74194.cpp index 5eba4549a5e..e29fb947228 100644 --- a/src/lib/netlist/devices/nld_74194.cpp +++ b/src/lib/netlist/devices/nld_74194.cpp @@ -50,14 +50,13 @@ namespace netlist { } + private: NETLIB_RESETI() { m_last_CLK = 0; m_last_Q = 0; } - friend class NETLIB_NAME(74194_dip); - private: // FIXME: Timing NETLIB_HANDLERI(inputs) { @@ -114,37 +113,7 @@ namespace netlist nld_power_pins m_power_pins; }; - NETLIB_OBJECT(74194_dip) - { - NETLIB_CONSTRUCTOR(74194_dip) - , A(*this, "A") - { - register_subalias("1", A.m_CLRQ); - register_subalias("2", A.m_SRIN); - register_subalias("3", A.m_DATA[3]); - register_subalias("4", A.m_DATA[2]); - register_subalias("5", A.m_DATA[1]); - register_subalias("6", A.m_DATA[0]); - register_subalias("7", A.m_SLIN); - register_subalias("8", "A.GND"); - - register_subalias("9", A.m_S0); - register_subalias("10", A.m_S1); - register_subalias("11", A.m_CLK); - register_subalias("12", A.m_Q[0]); - register_subalias("13", A.m_Q[1]); - register_subalias("14", A.m_Q[2]); - register_subalias("15", A.m_Q[3]); - register_subalias("16", "VCC"); - - } - //NETLIB_RESETI() {} - private: - NETLIB_SUB(74194) A; - }; - NETLIB_DEVICE_IMPL(74194, "TTL_74194", "+CLK,+S0,+S1,+SRIN,+A,+B,+C,+D,+SLIN,+CLRQ,@VCC,@GND") - NETLIB_DEVICE_IMPL(74194_dip, "TTL_74194_DIP", "") } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nld_74194.h b/src/lib/netlist/devices/nld_74194.h index 838c3c96406..43830f8fa0e 100644 --- a/src/lib/netlist/devices/nld_74194.h +++ b/src/lib/netlist/devices/nld_74194.h @@ -5,22 +5,9 @@ #include "netlist/nl_setup.h" -#define TTL_74194(name, cCLK, cS0, cS1, cSRIN, cA, cB, cC, cD, cSLIN, cCLRQ) \ - NET_REGISTER_DEV(TTL_74194, name) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, CLK, cCLK) \ - NET_CONNECT(name, S0, cS0) \ - NET_CONNECT(name, S1, cS1) \ - NET_CONNECT(name, SRIN, cSRIN) \ - NET_CONNECT(name, A, cA) \ - NET_CONNECT(name, B, cB) \ - NET_CONNECT(name, C, cC) \ - NET_CONNECT(name, D, cD) \ - NET_CONNECT(name, SLIN, cSLIN) \ - NET_CONNECT(name, CLRQ, cCLRQ) - -#define TTL_74194_DIP(name) \ - NET_REGISTER_DEV(TTL_74194_DIP, name) +// usage : TTL_74194(name, pCLK, pS0, pS1, pSRIN, pA, pB, pC, pD, pSLIN, pCLRQ) +// auto connect: VCC, GND +#define TTL_74194(...) \ + NET_REGISTER_DEVEXT(TTL_74194, __VA_ARGS__) #endif /* NLD_74194_H_ */ diff --git a/src/lib/netlist/devices/nld_74365.cpp b/src/lib/netlist/devices/nld_74365.cpp index 4b9f7be9afa..6906547fc35 100644 --- a/src/lib/netlist/devices/nld_74365.cpp +++ b/src/lib/netlist/devices/nld_74365.cpp @@ -48,7 +48,6 @@ namespace netlist { } - friend class NETLIB_NAME(74365_dip); private: NETLIB_HANDLERI(inputs) { @@ -71,36 +70,7 @@ namespace netlist nld_power_pins m_power_pins; }; - NETLIB_OBJECT(74365_dip) - { - NETLIB_CONSTRUCTOR(74365_dip) - , A(*this, "A") - { - register_subalias("1", A.m_G1Q); - register_subalias("2", A.m_A[0]); - register_subalias("3", A.m_Y[0]); - register_subalias("4", A.m_A[1]); - register_subalias("5", A.m_Y[1]); - register_subalias("6", A.m_A[2]); - register_subalias("7", A.m_Y[2]); - register_subalias("8", "A.GND"); - - register_subalias("9", A.m_A[3]); - register_subalias("10", A.m_Y[3]); - register_subalias("11", A.m_A[4]); - register_subalias("12", A.m_Y[4]); - register_subalias("13", A.m_A[5]); - register_subalias("14", A.m_Y[5]); - register_subalias("15", A.m_G2Q); - register_subalias("16", "A.VCC"); - } - //NETLIB_RESETI() {} - private: - NETLIB_SUB(74365) A; - }; - NETLIB_DEVICE_IMPL(74365, "TTL_74365", "+G1Q,+G2Q,+A1,+A2,+A3,+A4,+A5,+A6,@VCC,@GND") - NETLIB_DEVICE_IMPL(74365_dip, "TTL_74365_DIP", "") } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nld_74365.h b/src/lib/netlist/devices/nld_74365.h index 9fc55f52243..1084bce6d85 100644 --- a/src/lib/netlist/devices/nld_74365.h +++ b/src/lib/netlist/devices/nld_74365.h @@ -5,20 +5,9 @@ #include "netlist/nl_setup.h" -#define TTL_74365(name, cG1Q, cG2Q, cA1, cA2, cA3, cA4, cA5, cA6) \ - NET_REGISTER_DEV(TTL_74365, name) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, G1Q, cG1Q) \ - NET_CONNECT(name, G2Q, cG2Q) \ - NET_CONNECT(name, A1, cA1) \ - NET_CONNECT(name, A2, cA2) \ - NET_CONNECT(name, A3, cA3) \ - NET_CONNECT(name, A4, cA4) \ - NET_CONNECT(name, A5, cA5) \ - NET_CONNECT(name, A6, cA6) - -#define TTL_74365_DIP(name) \ - NET_REGISTER_DEV(TTL_74365_DIP, name) +// usage : TTL_74365(name, pG1Q, pG2Q, pA1, pA2, pA3, pA4, pA5, pA6) +// auto connect: VCC, GND +#define TTL_74365(...) \ + NET_REGISTER_DEVEXT(TTL_74365, __VA_ARGS__) #endif /* NLD_74365_H_ */ diff --git a/src/lib/netlist/devices/nld_7450.cpp b/src/lib/netlist/devices/nld_7450.cpp index 1c997d466df..429958d02d5 100644 --- a/src/lib/netlist/devices/nld_7450.cpp +++ b/src/lib/netlist/devices/nld_7450.cpp @@ -31,6 +31,8 @@ namespace netlist static constexpr const std::array<netlist_time, 2> times = { NLTIME_FROM_NS(15), NLTIME_FROM_NS(22) }; + // FIXME: timing, see 74107 for example, use template + NETLIB_OBJECT(7450) { NETLIB_CONSTRUCTOR(7450) @@ -45,7 +47,7 @@ namespace netlist //NETLIB_RESETI(); - public: + private: NETLIB_HANDLERI(inputs) { m_A.activate(); diff --git a/src/lib/netlist/devices/nld_7473.cpp b/src/lib/netlist/devices/nld_7473.cpp index 4a9d1ac27b3..805321e997e 100644 --- a/src/lib/netlist/devices/nld_7473.cpp +++ b/src/lib/netlist/devices/nld_7473.cpp @@ -79,12 +79,12 @@ namespace netlist { } + private: NETLIB_RESETI() { m_last_CLK = 0; } - public: NETLIB_HANDLERI(inputs) { const auto JK = (m_J() << 1) | m_K(); @@ -132,9 +132,7 @@ namespace netlist NETLIB_OBJECT_DERIVED(7473A, 7473) { - public: NETLIB_CONSTRUCTOR(7473A) { } - }; NETLIB_DEVICE_IMPL(7473, "TTL_7473", "+CLK,+J,+K,+CLRQ,@VCC,@GND") diff --git a/src/lib/netlist/devices/nld_7493.cpp b/src/lib/netlist/devices/nld_7493.cpp index 7ad8aedc13f..2fce9523c0b 100644 --- a/src/lib/netlist/devices/nld_7493.cpp +++ b/src/lib/netlist/devices/nld_7493.cpp @@ -57,66 +57,6 @@ #include "nld_7493.h" #include "netlist/nl_base.h" -//- Identifier: TTL_7493_DIP -//- Title: 7493 Binary Counters -//- Description: -//- Each of these monolithic counters contains four master-slave -//- flip-flops and additional gating to provide a divide-by-two -//- counter and a three-stage binary counter for which the -//- count cycle length is divide-by-five for the 90A and divide-by-eight -//- for the 93A. -//- -//- All of these counters have a gated zero reset and the 90A -//- also has gated set-to-nine inputs for use in BCD nine’s complement -//- applications. -//- -//- To use their maximum count length (decade or four-bit binary), -//- the B input is connected to the Q A output. The input count pulses -//- are applied to input A and the outputs are as described in the -//- appropriate truth table. A symmetrical divide-by-ten count can be -//- obtained from the 90A counters by connecting the Q D output to the -//- A input and applying the input count to the B input which gives -//- a divide-by-ten square wave at output Q A. -//- -//- Pinalias: B,R01,R02,NC,VCC,NC,NC,QC,QB,GND,QD,QA,NC,A -//- Package: DIP -//- NamingConvention: Naming conventions follow National Semiconductor datasheet -//- Limitations: Internal resistor network currently fixed to 5k -//- more limitations -//- Example: ne555_astable.c,ne555_example -//- FunctionTable: -//- Counter Sequence -//- -//- | COUNT || QD | QC | QB | QA | -//- |------:||:--:|:--:|:--:|:--:| -//- | 0 || 0 | 0 | 0 | 0 | -//- | 1 || 0 | 0 | 0 | 1 | -//- | 2 || 0 | 0 | 1 | 0 | -//- | 3 || 0 | 0 | 1 | 1 | -//- | 4 || 0 | 1 | 0 | 0 | -//- | 5 || 0 | 1 | 0 | 1 | -//- | 6 || 0 | 1 | 1 | 0 | -//- | 7 || 0 | 1 | 1 | 1 | -//- | 8 || 1 | 0 | 0 | 0 | -//- | 9 || 1 | 0 | 0 | 1 | -//- | 10 || 1 | 0 | 1 | 0 | -//- | 11 || 1 | 0 | 1 | 1 | -//- | 12 || 1 | 1 | 0 | 0 | -//- | 13 || 1 | 1 | 0 | 1 | -//- | 14 || 1 | 1 | 1 | 0 | -//- | 15 || 1 | 1 | 1 | 1 | -//- -//- Note C Output QA is connected to input B -//- -//- Reset Count Function table -//- -//- | R01 | R02 | QD | QC | QB | QA | -//- |:---:|:---:|:--:|:--:|:--:|:--:| -//- | 1 | 1 | 0 | 0 | 0 | 0 | -//- | 0 | X | COUNT |||| -//- | X | 0 | COUNT |||| -//- -//- namespace netlist { diff --git a/src/lib/netlist/devices/nld_7497.cpp b/src/lib/netlist/devices/nld_7497.cpp index 4fdf282a9fd..6f5f30e8811 100644 --- a/src/lib/netlist/devices/nld_7497.cpp +++ b/src/lib/netlist/devices/nld_7497.cpp @@ -48,6 +48,8 @@ namespace netlist static constexpr const std::array<netlist_time, 2> out_delay_CLK_Y = { NLTIME_FROM_NS(20), NLTIME_FROM_NS(26) }; // tPHL, tPLH static constexpr const std::array<netlist_time, 2> out_delay_CLK_Z = { NLTIME_FROM_NS(17), NLTIME_FROM_NS(12) }; + // FIXME: room for improvement -> clock handling + NETLIB_OBJECT(7497) { NETLIB_CONSTRUCTOR(7497) @@ -76,8 +78,6 @@ namespace netlist m_lastclock = 0; } - NETLIB_HANDLERI(noop) { } - NETLIB_HANDLERI(unity) { newstate (m_state); diff --git a/src/lib/netlist/devices/nld_74ls629.cpp b/src/lib/netlist/devices/nld_74ls629.cpp index 669c57912e3..d9822492c80 100644 --- a/src/lib/netlist/devices/nld_74ls629.cpp +++ b/src/lib/netlist/devices/nld_74ls629.cpp @@ -76,7 +76,7 @@ namespace netlist , m_out(owner, "m_out", 0) , m_inc(owner, "m_inc", netlist_time::zero()) { - owner.connect(m_FB, m_Y); + owner.connect("FB", "Y"); } public: @@ -116,15 +116,14 @@ namespace netlist , m_power_pins(*this) , m_power_pins_osc(*this, "OSCVCC", "OSCGND") { - connect(m_power_pins_osc.GND(), m_R_FC.N()); + connect("OSCGND", "R_FC.2"); - connect(m_FC, m_R_FC.P()); - connect(m_RNG, m_R_RNG.P()); - connect(m_R_FC.N(), m_R_RNG.N()); - - register_subalias("Y", m_clock.m_Y); + connect("FC", "R_FC.1"); + connect("RNG", "R_RNG.1"); + connect("R_FC.2", "R_RNG.2"); } + private: NETLIB_RESETI() { m_R_FC.set_R( nlconst::magic(90000.0)); @@ -136,7 +135,6 @@ namespace netlist /* update param may be called from anywhere, update_dev(time) is not a good idea */ } - public: SN74LS629clk m_clock; analog::NETLIB_SUB(R_base) m_R_FC; analog::NETLIB_SUB(R_base) m_R_RNG; @@ -149,7 +147,6 @@ namespace netlist nld_power_pins m_power_pins; nld_power_pins m_power_pins_osc; - private: NETLIB_HANDLERI(inputs) { { diff --git a/src/lib/netlist/devices/nld_8277.cpp b/src/lib/netlist/devices/nld_8277.cpp index 1bc67f69a76..e7f87c9336f 100644 --- a/src/lib/netlist/devices/nld_8277.cpp +++ b/src/lib/netlist/devices/nld_8277.cpp @@ -87,20 +87,16 @@ namespace netlist , m_last_CLKB(*this, "m_last_CLKB", 0) // FIXME: needs family! { - register_subalias("RESET", m_RESET); - register_subalias("CLK", m_CLK); - register_subalias("CLKA", m_CLKA); - register_subalias("CLKB", m_CLKB); - register_subalias("D0A", m_A.m_D0); - register_subalias("D1A", m_A.m_D1); - register_subalias("DSA", m_A.m_DS); - register_subalias("Q7A", m_A.m_Q7); - register_subalias("Q7QA", m_A.m_Q7Q); - register_subalias("D0B", m_B.m_D0); - register_subalias("D1B", m_B.m_D1); - register_subalias("DSB", m_B.m_DS); - register_subalias("Q7B", m_B.m_Q7); - register_subalias("Q7QB", m_B.m_Q7Q); + register_subalias("D0A", "A.D0"); + register_subalias("D1A", "A.D1"); + register_subalias("DSA", "A.DS"); + register_subalias("Q7A", "A.Q7"); + register_subalias("Q7QA", "A.Q7Q"); + register_subalias("D0B", "B.D0"); + register_subalias("D1B", "B.D1"); + register_subalias("DSB", "B.DS"); + register_subalias("Q7B", "B.Q7"); + register_subalias("Q7QB", "B.Q7Q"); connect("A.VCC", "B.VCC"); connect("A.GND", "B.GND"); @@ -116,7 +112,6 @@ namespace netlist m_last_CLKB = 0; } - friend class NETLIB_NAME(8277_dip); private: NETLIB_HANDLERI(shifter_reset) { @@ -169,36 +164,7 @@ namespace netlist state_var<uint32_t> m_last_CLKB; }; - NETLIB_OBJECT(8277_dip) - { - NETLIB_CONSTRUCTOR(8277_dip) - , A(*this, "A") - { - register_subalias("1", A.m_RESET); - register_subalias("2", A.m_A.m_Q7Q); - register_subalias("3", A.m_A.m_Q7); - register_subalias("4", A.m_A.m_DS); - register_subalias("5", A.m_A.m_D1); - register_subalias("6", A.m_A.m_D0); - register_subalias("7", A.m_CLKA); - register_subalias("8", "A.GND"); - - register_subalias("9", A.m_CLK); - register_subalias("10", A.m_CLKB); - register_subalias("11", A.m_B.m_D0); - register_subalias("12", A.m_B.m_D1); - register_subalias("13", A.m_B.m_DS); - register_subalias("14", A.m_B.m_Q7); - register_subalias("15", A.m_B.m_Q7Q); - register_subalias("16", "A.VCC"); - } - //NETLIB_RESETI() {} - private: - NETLIB_SUB(8277) A; - }; - NETLIB_DEVICE_IMPL(8277, "TTL_8277", "+RESET,+CLK,+CLKA,+D0A,+D1A,+DSA,+CLKB,+D0B,+D1B,+DSB,@VCC,@GND") - NETLIB_DEVICE_IMPL(8277_dip, "TTL_8277_DIP", "") } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nld_8277.h b/src/lib/netlist/devices/nld_8277.h index 58a925c4976..0b98e15760b 100644 --- a/src/lib/netlist/devices/nld_8277.h +++ b/src/lib/netlist/devices/nld_8277.h @@ -6,22 +6,9 @@ #include "netlist/nl_setup.h" -#define TTL_8277(name, cRESET, cCLK, cCLKA, cD0A, cD1A, cDSA, cCLKB, cD0B, cD1B, cDSB) \ - NET_REGISTER_DEV(TTL_8277, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, RESET, cRESET) \ - NET_CONNECT(name, CLK, cCLK) \ - NET_CONNECT(name, CLKA, cCLKA) \ - NET_CONNECT(name, CLKB, cCLKB) \ - NET_CONNECT(name, D0A, cD0A) \ - NET_CONNECT(name, D0B, cD0B) \ - NET_CONNECT(name, D1A, cD1A) \ - NET_CONNECT(name, D1B, cD1B) \ - NET_CONNECT(name, DSA, cDSA) \ - NET_CONNECT(name, DSB, cDSB) - -#define TTL_8277_DIP(name) \ - NET_REGISTER_DEV(TTL_8277_DIP, name) +// usage : TTL_8277(name, pRESET, pCLK, pCLKA, pD0A, pD1A, pDSA, pCLKB, pD0B, pD1B, pDSB) +// auto connect: VCC, GND +#define TTL_8277(...) \ + NET_REGISTER_DEVEXT(TTL_8277, __VA_ARGS__) #endif /* NLD_2877_H_ */ diff --git a/src/lib/netlist/devices/nld_9321.cpp b/src/lib/netlist/devices/nld_9321.cpp index a3e5411c86e..1634e4f13f0 100644 --- a/src/lib/netlist/devices/nld_9321.cpp +++ b/src/lib/netlist/devices/nld_9321.cpp @@ -25,11 +25,12 @@ namespace netlist { namespace devices { - class NETLIB_NAME(9321); - NETLIB_OBJECT(9321_GATE) + // FIXME: m_E should activate deactivate m_A + + NETLIB_OBJECT(9321) { - NETLIB_CONSTRUCTOR(9321_GATE) + NETLIB_CONSTRUCTOR(9321) , m_enable(*this, "m_enable", true) , m_o(*this, "m_o", 0) , m_A(*this, 0, "A{}", NETLIB_DELEGATE(in)) @@ -39,6 +40,7 @@ namespace netlist { } + private: NETLIB_HANDLERI(in) { m_enable = m_E() ? 0 : 1; @@ -55,7 +57,6 @@ namespace netlist m_D[i].push((i == m_o && m_enable) ? 0 : 1, NLTIME_FROM_NS(18)); } - public: state_var<bool> m_enable; state_var<uint32_t> m_o; object_array_t<logic_input_t, 2> m_A; @@ -64,42 +65,7 @@ namespace netlist nld_power_pins m_power_pins; }; - NETLIB_OBJECT(9321) - { - NETLIB_CONSTRUCTOR(9321) - , m_A(*this, "A") - , m_B(*this, "B") - { - register_subalias("AE1", m_A.m_E); - register_subalias("BE1", m_B.m_E); - register_subalias("AA0", m_A.m_A[0]); - register_subalias("BA0", m_B.m_A[0]); - register_subalias("AA1", m_A.m_A[1]); - register_subalias("BA1", m_B.m_A[1]); - register_subalias("AD0", m_A.m_D[0]); - register_subalias("BD0", m_B.m_D[0]); - register_subalias("AD1", m_A.m_D[1]); - register_subalias("BD1", m_B.m_D[1]); - register_subalias("AD2", m_A.m_D[2]); - register_subalias("BD2", m_B.m_D[2]); - register_subalias("AD3", m_A.m_D[3]); - register_subalias("BD3", m_B.m_D[3]); - - connect("A.VCC", "B.VCC"); - connect("A.GND", "B.GND"); - - register_subalias("GND", "A.GND"); - register_subalias("VCC", "B.VCC"); - } - - friend class NETLIB_NAME(9321_dip); - private: - NETLIB_SUB(9321_GATE) m_A; - NETLIB_SUB(9321_GATE) m_B; - }; - - NETLIB_DEVICE_IMPL(9321_GATE, "TTL_9321_GATE", "") - NETLIB_DEVICE_IMPL(9321, "TTL_9321", "+SELECT,+A1,+B1,+A2,+B2,+A3,+B3,+A4,+B4,+STROBE,@VCC,@GND") + NETLIB_DEVICE_IMPL(9321, "TTL_9321", "+E,+A0,+A1") } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nld_9321.h b/src/lib/netlist/devices/nld_9321.h index 3ed55a346bd..41bf89fed2a 100644 --- a/src/lib/netlist/devices/nld_9321.h +++ b/src/lib/netlist/devices/nld_9321.h @@ -6,9 +6,6 @@ #include "netlist/nl_setup.h" -#define TTL_9321_GATE(...) \ - NET_REGISTER_DEVEXT(TTL_9321_GATE, __VA_ARGS__) - // usage: TTL_9321(name, cAE, cA0, cA1, cBE, cB0, cB1) #define TTL_9321(...) \ NET_REGISTER_DEVEXT(TTL_9321, __VA_ARGS__) diff --git a/src/lib/netlist/devices/nld_9322.cpp b/src/lib/netlist/devices/nld_9322.cpp index 11b7659b581..bfc643b27ae 100644 --- a/src/lib/netlist/devices/nld_9322.cpp +++ b/src/lib/netlist/devices/nld_9322.cpp @@ -67,18 +67,18 @@ namespace netlist , m_3(*this, "C") , m_4(*this, "D") { - register_subalias("A1", m_1.m_A); - register_subalias("B1", m_1.m_B); - register_subalias("Y1", m_1.m_Y); - register_subalias("A2", m_2.m_A); - register_subalias("B2", m_2.m_B); - register_subalias("Y2", m_2.m_Y); - register_subalias("A3", m_3.m_A); - register_subalias("B3", m_3.m_B); - register_subalias("Y3", m_3.m_Y); - register_subalias("A4", m_4.m_A); - register_subalias("B4", m_4.m_B); - register_subalias("Y4", m_4.m_Y); + register_subalias("A1", "A.A"); + register_subalias("B1", "A.B"); + register_subalias("Y1", "A.Y"); + register_subalias("A2", "B.A"); + register_subalias("B2", "B.B"); + register_subalias("Y2", "B.Y"); + register_subalias("A3", "C.A"); + register_subalias("B3", "C.B"); + register_subalias("Y3", "C.Y"); + register_subalias("A4", "D.A"); + register_subalias("B4", "D.B"); + register_subalias("Y4", "D.Y"); connect("A.VCC", "B.VCC"); connect("A.VCC", "C.VCC"); @@ -107,7 +107,6 @@ namespace netlist }; - NETLIB_DEVICE_IMPL(9322_GATE, "TTL_9322_GATE", "") NETLIB_DEVICE_IMPL(9322, "TTL_9322", "+SELECT,+A1,+B1,+A2,+B2,+A3,+B3,+A4,+B4,+STROBE,@VCC,@GND") } //namespace devices diff --git a/src/lib/netlist/devices/nld_9322.h b/src/lib/netlist/devices/nld_9322.h index d53d0c210e5..8a33f66959b 100644 --- a/src/lib/netlist/devices/nld_9322.h +++ b/src/lib/netlist/devices/nld_9322.h @@ -6,9 +6,6 @@ #include "netlist/nl_setup.h" -#define TTL_9322_GATE(...) \ - NET_REGISTER_DEVEXT(TTL_9322_GATE, __VA_ARGS__) - // usage: TTL_9322(name, cSELECT, cA1, cB1, cA2, cB2, cA3, cB3, cA4, cB4, cSTROBE) #define TTL_9322(...) \ NET_REGISTER_DEVEXT(TTL_9322, __VA_ARGS__) diff --git a/src/lib/netlist/devices/nld_am2847.cpp b/src/lib/netlist/devices/nld_am2847.cpp index 0b0b321efa4..89034dc518b 100644 --- a/src/lib/netlist/devices/nld_am2847.cpp +++ b/src/lib/netlist/devices/nld_am2847.cpp @@ -76,18 +76,18 @@ namespace netlist , m_last_CP(*this, "m_last_CP", 0) // FIXME: needs family! { - register_subalias("OUTA", m_A.m_OUT); - register_subalias("OUTB", m_B.m_OUT); - register_subalias("OUTC", m_C.m_OUT); - register_subalias("OUTD", m_D.m_OUT); - register_subalias("INA", m_A.m_IN); - register_subalias("INB", m_B.m_IN); - register_subalias("INC", m_C.m_IN); - register_subalias("IND", m_D.m_IN); - register_subalias("RCA", m_A.m_RC); - register_subalias("RCB", m_B.m_RC); - register_subalias("RCC", m_C.m_RC); - register_subalias("RCD", m_D.m_RC); + register_subalias("OUTA", "A.OUT"); + register_subalias("OUTB", "B.OUT"); + register_subalias("OUTC", "C.OUT"); + register_subalias("OUTD", "D.OUT"); + register_subalias("INA", "A.IN"); + register_subalias("INB", "B.IN"); + register_subalias("INC", "C.IN"); + register_subalias("IND", "D.IN"); + register_subalias("RCA", "A.RC"); + register_subalias("RCB", "B.RC"); + register_subalias("RCC", "C.RC"); + register_subalias("RCD", "D.RC"); connect("A.VSS", "B.VSS"); connect("A.VSS", "C.VSS"); @@ -105,7 +105,6 @@ namespace netlist m_last_CP = 0; } - friend class NETLIB_NAME(AM2847_dip); private: NETLIB_HANDLERI(cp) { @@ -128,35 +127,7 @@ namespace netlist state_var<uint32_t> m_last_CP; }; - NETLIB_OBJECT(AM2847_dip) - { - NETLIB_CONSTRUCTOR(AM2847_dip) - , A(*this, "A") - { - register_subalias("1", A.m_A.m_OUT); - register_subalias("2", A.m_A.m_RC); - register_subalias("3", A.m_A.m_IN); - register_subalias("4", A.m_B.m_OUT); - register_subalias("5", A.m_B.m_RC); - register_subalias("6", A.m_B.m_IN); - register_subalias("7", A.m_C.m_OUT); - register_subalias("8", "A.VDD"); - - register_subalias("9", A.m_C.m_RC); - register_subalias("10", A.m_C.m_IN); - register_subalias("11", A.m_CP); - register_subalias("13", A.m_D.m_OUT); - register_subalias("14", A.m_D.m_RC); - register_subalias("15", A.m_D.m_IN); - register_subalias("16", "A.VSS"); - } - //NETLIB_RESETI() {} - private: - NETLIB_SUB(AM2847) A; - }; - NETLIB_DEVICE_IMPL(AM2847, "TTL_AM2847", "+CP,+INA,+INB,+INC,+IND,+RCA,+RCB,+RCC,+RCD,@VSS,@VDD") - NETLIB_DEVICE_IMPL(AM2847_dip, "TTL_AM2847_DIP", "") } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nld_am2847.h b/src/lib/netlist/devices/nld_am2847.h index bad7331e8f6..abf91184f4d 100644 --- a/src/lib/netlist/devices/nld_am2847.h +++ b/src/lib/netlist/devices/nld_am2847.h @@ -6,21 +6,7 @@ #include "netlist/nl_setup.h" -#define TTL_AM2847(name, cCP, cINA, cINB, cINC, cIND, cRCA, cRCB, cRCC, cRCD) \ - NET_REGISTER_DEV(TTL_AM2847, name) \ - NET_CONNECT(name, VDD, VDD) \ - NET_CONNECT(name, VSS, VSS) \ - NET_CONNECT(name, CP, cCP) \ - NET_CONNECT(name, INA, cINA) \ - NET_CONNECT(name, INB, cINB) \ - NET_CONNECT(name, INC, cINC) \ - NET_CONNECT(name, IND, cIND) \ - NET_CONNECT(name, RCA, cRCA) \ - NET_CONNECT(name, RCB, cRCB) \ - NET_CONNECT(name, RCC, cRCC) \ - NET_CONNECT(name, RCD, cRCD) - -#define TTL_AM2847_DIP(name) \ - NET_REGISTER_DEV(TTL_AM2847_DIP, name) +#define TTL_AM2847(...) \ + NET_REGISTER_DEVEXT(TTL_AM2847, __VA_ARGS__) #endif /* NLD_AM2847_H_ */ diff --git a/src/lib/netlist/devices/nld_dm9314.cpp b/src/lib/netlist/devices/nld_dm9314.cpp index c941aadc0cf..8aa842c0214 100644 --- a/src/lib/netlist/devices/nld_dm9314.cpp +++ b/src/lib/netlist/devices/nld_dm9314.cpp @@ -42,6 +42,8 @@ namespace netlist { } + private: + NETLIB_RESETI() { m_last_MRQ = 0; @@ -51,8 +53,6 @@ namespace netlist m_last_Q = 0; } - friend class NETLIB_NAME(9314_dip); - private: NETLIB_HANDLERI(inputs) { netlist_time delay = NLTIME_FROM_NS(24); //FIXME! @@ -97,35 +97,7 @@ namespace netlist nld_power_pins m_power_pins; }; - NETLIB_OBJECT(9314_dip) - { - NETLIB_CONSTRUCTOR(9314_dip) - , A(*this, "A") - { - register_subalias("1", A.m_EQ); - register_subalias("2", A.m_SQ[0]); - register_subalias("3", A.m_D[0]); - register_subalias("4", A.m_D[1]); - register_subalias("5", A.m_SQ[2]); - register_subalias("6", A.m_D[2]); - register_subalias("7", A.m_D[3]); - register_subalias("8", "A.GND"); - - register_subalias("9", A.m_MRQ); - register_subalias("10", A.m_Q[3]); - register_subalias("11", A.m_SQ[3]); - register_subalias("12", A.m_Q[2]); - register_subalias("13", A.m_Q[1]); - register_subalias("14", A.m_SQ[1]); - register_subalias("15", A.m_Q[0]); - register_subalias("16", "A.VCC"); - } - private: - NETLIB_SUB(9314) A; - }; - NETLIB_DEVICE_IMPL(9314, "TTL_9314", "+EQ,+MRQ,+S0Q,+S1Q,+S2Q,+S3Q,+D0,+D1,+D2,+D3,@VCC,@GND") - NETLIB_DEVICE_IMPL(9314_dip, "TTL_9314_DIP", "") } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nld_dm9314.h b/src/lib/netlist/devices/nld_dm9314.h index 4fc855c40b2..107b25464a6 100644 --- a/src/lib/netlist/devices/nld_dm9314.h +++ b/src/lib/netlist/devices/nld_dm9314.h @@ -6,22 +6,9 @@ #include "netlist/nl_setup.h" -#define TTL_9314(name, cEQ, cMRQ, cS0Q, cS1Q, cS2Q, cS3Q, cD0, cD1, cD2, cD3) \ - NET_REGISTER_DEV(TTL_9314, name) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, EQ, cEQ) \ - NET_CONNECT(name, MRQ, cMRQ) \ - NET_CONNECT(name, S0Q, cS0Q) \ - NET_CONNECT(name, S1Q, cS1Q) \ - NET_CONNECT(name, S2Q, cS2Q) \ - NET_CONNECT(name, S3Q, cS3Q) \ - NET_CONNECT(name, D0, cD0) \ - NET_CONNECT(name, D1, cD1) \ - NET_CONNECT(name, D2, cD2) \ - NET_CONNECT(name, D3, cD3) - -#define TTL_9314_DIP(name) \ - NET_REGISTER_DEV(TTL_9314_DIP, name) +// usage : TTL_9314(name, pEQ, pMRQ, pS0Q, pS1Q, pS2Q, pS3Q, pD0, pD1, pD2, pD3) +// auto connect: VCC, GND +#define TTL_9314(...) \ + NET_REGISTER_DEVEXT(TTL_9314, __VA_ARGS__) #endif /* NLD_DM9314_H_ */ diff --git a/src/lib/netlist/devices/nld_dm9334.cpp b/src/lib/netlist/devices/nld_dm9334.cpp index 0755c4532f1..aa69d2c949d 100644 --- a/src/lib/netlist/devices/nld_dm9334.cpp +++ b/src/lib/netlist/devices/nld_dm9334.cpp @@ -86,6 +86,7 @@ namespace netlist { } + private: NETLIB_RESETI() { m_last_CQ = 0; @@ -95,8 +96,6 @@ namespace netlist m_last_Q = 0; } - friend class NETLIB_NAME(9334_dip); - private: NETLIB_HANDLERI(inputs) { uint_fast8_t a = 0; @@ -177,37 +176,7 @@ namespace netlist nld_power_pins m_power_pins; }; - NETLIB_OBJECT(9334_dip) - { - NETLIB_CONSTRUCTOR(9334_dip) - , A(*this, "A") - { - register_subalias("1", A.m_A[0]); - register_subalias("2", A.m_A[1]); - register_subalias("3", A.m_A[2]); - register_subalias("4", A.m_Q[0]); - register_subalias("5", A.m_Q[1]); - register_subalias("6", A.m_Q[2]); - register_subalias("7", A.m_Q[3]); - register_subalias("8", "A.GND"); - - register_subalias("9", A.m_Q[4]); - register_subalias("10", A.m_Q[5]); - register_subalias("11", A.m_Q[6]); - register_subalias("12", A.m_Q[7]); - register_subalias("13", A.m_D); - register_subalias("14", A.m_EQ); - register_subalias("15", A.m_CQ); - register_subalias("16", "A.VCC"); - - } - //NETLIB_RESETI() {} - private: - NETLIB_SUB(9334) A; - }; - NETLIB_DEVICE_IMPL(9334, "TTL_9334", "+CQ,+EQ,+D,+A0,+A1,+A2,@VCC,@GND") - NETLIB_DEVICE_IMPL(9334_dip, "TTL_9334_DIP", "") } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nld_dm9334.h b/src/lib/netlist/devices/nld_dm9334.h index f4edeb97306..052ab58fc82 100644 --- a/src/lib/netlist/devices/nld_dm9334.h +++ b/src/lib/netlist/devices/nld_dm9334.h @@ -6,18 +6,9 @@ #include "netlist/nl_setup.h" -#define TTL_9334(name, cCQ, cEQ, cD, cA0, cA1, cA2) \ - NET_REGISTER_DEV(TTL_9334, name) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, CQ, cCQ) \ - NET_CONNECT(name, EQ, cEQ) \ - NET_CONNECT(name, D, cD) \ - NET_CONNECT(name, A0, cA0) \ - NET_CONNECT(name, A1, cA1) \ - NET_CONNECT(name, A2, cA2) - -#define TTL_9334_DIP(name) \ - NET_REGISTER_DEV(TTL_9334_DIP, name) +// usage : TTL_9334(name, pCQ, pEQ, pD, pA0, pA1, pA2) +// auto connect: VCC, GND +#define TTL_9334(...) \ + NET_REGISTER_DEVEXT(TTL_9334, __VA_ARGS__) #endif /* NLD_DM9334_H_ */ diff --git a/src/lib/netlist/devices/nld_mm5837.cpp b/src/lib/netlist/devices/nld_mm5837.cpp index c43509fac7d..b55593eb10d 100644 --- a/src/lib/netlist/devices/nld_mm5837.cpp +++ b/src/lib/netlist/devices/nld_mm5837.cpp @@ -24,13 +24,13 @@ namespace netlist { namespace devices { - NETLIB_OBJECT(MM5837_dip) + NETLIB_OBJECT(MM5837) { - NETLIB_CONSTRUCTOR(MM5837_dip) + NETLIB_CONSTRUCTOR(MM5837) , m_RV(*this, "_RV") - , m_VDD(*this, "1", NETLIB_DELEGATE(inputs)) - , m_VGG(*this, "2", NETLIB_DELEGATE(inputs)) - , m_VSS(*this, "4", NETLIB_DELEGATE(inputs)) + , m_VDD(*this, "VDD", NETLIB_DELEGATE(inputs)) + , m_VGG(*this, "VGG", NETLIB_DELEGATE(inputs)) + , m_VSS(*this, "VSS", NETLIB_DELEGATE(inputs)) , m_FREQ(*this, "FREQ", 24000 * 2) , m_R_LOW(*this, "R_LOW", 1000) , m_R_HIGH(*this, "R_HIGH", 1000) @@ -40,11 +40,11 @@ namespace netlist , m_inc(netlist_time::from_hz(24000 * 2)) , m_shift(*this, "m_shift", 0) { - connect(m_feedback, m_Q); + connect("_FB", "_Q"); // output - connect(m_RV.N(), m_VDD); - register_subalias("3", m_RV.P()); + connect("_RV.2", "VDD"); + register_subalias("OUT", "_RV.1"); } NETLIB_RESETI() @@ -114,7 +114,7 @@ namespace netlist state_var_u32 m_shift; }; - NETLIB_DEVICE_IMPL(MM5837_dip, "MM5837_DIP", "") + NETLIB_DEVICE_IMPL(MM5837, "MM5837", "") } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nld_mm5837.h b/src/lib/netlist/devices/nld_mm5837.h index 0fe862f964e..9c8380c8220 100644 --- a/src/lib/netlist/devices/nld_mm5837.h +++ b/src/lib/netlist/devices/nld_mm5837.h @@ -6,7 +6,7 @@ #include "netlist/nl_setup.h" -#define MM5837_DIP(name) \ - NET_REGISTER_DEV(MM5837_DIP, name) +#define MM5837(name) \ + NET_REGISTER_DEV(MM5837, name) #endif /* NLD_MM5837_H_ */ diff --git a/src/lib/netlist/devices/nld_ne555.cpp b/src/lib/netlist/devices/nld_ne555.cpp index 8df9a76cb1f..25ef0998d23 100644 --- a/src/lib/netlist/devices/nld_ne555.cpp +++ b/src/lib/netlist/devices/nld_ne555.cpp @@ -86,16 +86,16 @@ namespace netlist , m_undershoot(*this, "m_undershoot", 0.0) , m_ovlimit(0.0) { - register_subalias("GND", m_R3.N()); // Pin 1 - register_subalias("CONT", m_R1.N()); // Pin 5 - register_subalias("DISCH", m_RDIS.P()); // Pin 7 - register_subalias("VCC", m_R1.P()); // Pin 8 - register_subalias("OUT", m_ROUT.P()); // Pin 3 - - connect(m_R1.N(), m_R2.P()); - connect(m_R2.N(), m_R3.P()); - connect(m_RDIS.N(), m_R3.N()); - connect(m_OUT, m_ROUT.N()); + register_subalias("GND", "R3.2"); // Pin 1 + register_subalias("CONT", "R1.2"); // Pin 5 + register_subalias("DISCH", "RDIS.1"); // Pin 7 + register_subalias("VCC", "R1.1"); // Pin 8 + register_subalias("OUT", "ROUT.1"); // Pin 3 + + connect("R1.2", "R2.1"); + connect("R2.2", "R3.1"); + connect("RDIS.2", "R3.2"); + connect("_OUT", "ROUT.2"); } NETLIB_RESETI() diff --git a/src/lib/netlist/devices/nld_roms.cpp b/src/lib/netlist/devices/nld_roms.cpp index d39324e226f..1903b2d3adc 100644 --- a/src/lib/netlist/devices/nld_roms.cpp +++ b/src/lib/netlist/devices/nld_roms.cpp @@ -67,7 +67,7 @@ namespace netlist { if (!m_ARQ()) { - uint16_t addr = m_A(); + const auto addr = m_A(); m_latched_rom = m_ROM[addr]; } uint8_t o = (m_enable_hi || m_enable_lo) ? m_latched_rom : 0; diff --git a/src/lib/netlist/devices/nld_schmitt.cpp b/src/lib/netlist/devices/nld_schmitt.cpp index f78b8f0cf65..e201fe822d1 100644 --- a/src/lib/netlist/devices/nld_schmitt.cpp +++ b/src/lib/netlist/devices/nld_schmitt.cpp @@ -67,9 +67,10 @@ namespace netlist , m_modacc(m_stmodel) , m_last_state(*this, "m_last_var", 1) { - register_subalias("Q", m_RVO.P()); + register_subalias("Q", "RVO.1"); - connect(m_A, m_RVI.P()); + connect("A", "RVI.1"); + // FIXME: need a symbolic reference from connect as well connect(m_supply.GND(), m_RVI.N()); connect(m_supply.GND(), m_RVO.N()); } diff --git a/src/lib/netlist/devices/nld_tms4800.cpp b/src/lib/netlist/devices/nld_tms4800.cpp index 0c37821b37f..b52af34ca6a 100644 --- a/src/lib/netlist/devices/nld_tms4800.cpp +++ b/src/lib/netlist/devices/nld_tms4800.cpp @@ -46,7 +46,6 @@ namespace netlist { } - friend class NETLIB_NAME(TMS4800_dip); private: // FIXME: timing! // FIXME: CS: The code looks odd, looks like m_last_data should be pushed out. @@ -87,45 +86,8 @@ namespace netlist NETLIB_NAME(power_pins) m_supply; }; - NETLIB_OBJECT(TMS4800_dip) - { - NETLIB_CONSTRUCTOR(TMS4800_dip) - , A(*this, "A") - { - // FIXME: this device is missing supply pins - register_subalias("2", A.m_A[0]); - register_subalias("3", A.m_A[1]); - register_subalias("4", A.m_A[2]); - register_subalias("5", A.m_A[3]); - register_subalias("6", A.m_A[4]); - register_subalias("7", A.m_A[5]); - register_subalias("12", A.m_A[6]); - register_subalias("11", A.m_A[7]); - register_subalias("10", A.m_A[8]); - register_subalias("8", A.m_A[9]); - register_subalias("15", A.m_A[10]); - - register_subalias("13", A.m_AR); - register_subalias("24", A.m_OE1); - register_subalias("14", A.m_OE2); - - register_subalias("23", A.m_D[0]); - register_subalias("22", A.m_D[1]); - register_subalias("21", A.m_D[2]); - register_subalias("20", A.m_D[3]); - register_subalias("19", A.m_D[4]); - register_subalias("18", A.m_D[5]); - register_subalias("17", A.m_D[6]); - register_subalias("16", A.m_D[7]); - } - //NETLIB_RESETI() {} - private: - NETLIB_SUB(TMS4800) A; - - }; NETLIB_DEVICE_IMPL(TMS4800, "ROM_TMS4800", "+AR,+OE1,+OE2,+A0,+A1,+A2,+A3,+A4,+A5,+A6,+A7,+A8,+A9,+A10,@VCC,@GND") - NETLIB_DEVICE_IMPL(TMS4800_dip, "ROM_TMS4800_DIP", "") } //namespace devices } // namespace netlist diff --git a/src/lib/netlist/devices/nld_tms4800.h b/src/lib/netlist/devices/nld_tms4800.h index 63bcff9e7e9..57abe34e031 100644 --- a/src/lib/netlist/devices/nld_tms4800.h +++ b/src/lib/netlist/devices/nld_tms4800.h @@ -6,26 +6,9 @@ #include "netlist/nl_setup.h" -#define ROM_TMS4800(name, cAR, cOE1, cOE2, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7, cA8, cA9, cA10) \ - NET_REGISTER_DEV(ROM_TMS4800, name) \ - NET_CONNECT(name, AR, cAR) \ - NET_CONNECT(name, OE1, cOE1) \ - NET_CONNECT(name, OE2, cOE2) \ - NET_CONNECT(name, A0, cA0) \ - NET_CONNECT(name, A1, cA1) \ - NET_CONNECT(name, A2, cA2) \ - NET_CONNECT(name, A3, cA3) \ - NET_CONNECT(name, A4, cA4) \ - NET_CONNECT(name, A5, cA5) \ - NET_CONNECT(name, A6, cA6) \ - NET_CONNECT(name, A7, cA7) \ - NET_CONNECT(name, A8, cA8) \ - NET_CONNECT(name, A9, cA9) \ - NET_CONNECT(name, A10, cA10) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) - -#define ROM_TMS4800_DIP(name) \ - NET_REGISTER_DEV(ROM_TMS4800_DIP, name) +// usage : ROM_TMS4800(name, pAR, pOE1, pOE2, pA0, pA1, pA2, pA3, pA4, pA5, pA6, pA7, pA8, pA9, pA10) +// auto connect: VCC, GND +#define ROM_TMS4800(...) \ + NET_REGISTER_DEVEXT(ROM_TMS4800, __VA_ARGS__) #endif /* NLD_TMS4800_H_ */ diff --git a/src/lib/netlist/devices/nlid_proxy.cpp b/src/lib/netlist/devices/nlid_proxy.cpp index 5723797c53b..51eb0fbf5cd 100644 --- a/src/lib/netlist/devices/nlid_proxy.cpp +++ b/src/lib/netlist/devices/nlid_proxy.cpp @@ -122,7 +122,7 @@ namespace netlist , m_RN(*this, "RN") , m_last_state(*this, "m_last_var", terminal_t::OUT_TRISTATE()) { - register_subalias("Q", m_RN.P()); + register_subalias("Q", "RN.1"); log().verbose("D/A Proxy: Found power terminals on device {1}", out_proxied->device().name()); if (anetlist.is_extended_validation()) diff --git a/src/lib/netlist/devices/nlid_system.h b/src/lib/netlist/devices/nlid_system.h index ddf99f98b67..d00339e852b 100644 --- a/src/lib/netlist/devices/nlid_system.h +++ b/src/lib/netlist/devices/nlid_system.h @@ -34,7 +34,7 @@ namespace devices { m_inc = netlist_time::from_fp(plib::reciprocal(m_freq()*nlconst::two())); - connect(m_feedback, m_Q); + connect("FB", "Q"); } NETLIB_UPDATE_PARAMI() @@ -85,7 +85,7 @@ namespace devices } m_compiled->compile(m_func(), inps); } - connect(m_feedback, m_Q); + connect("FB", "Q"); } //NETLIB_RESETI(); //NETLIB_UPDATE_PARAMI() @@ -132,7 +132,7 @@ namespace devices { m_inc[0] = netlist_time::from_fp(plib::reciprocal(m_freq()*nlconst::two())); - connect(m_feedback, m_Q); + connect("FB", "Q"); netlist_time base = netlist_time::from_fp(plib::reciprocal(m_freq()*nlconst::two())); std::vector<pstring> pat(plib::psplit(m_pattern(),",")); @@ -337,7 +337,6 @@ namespace devices NETLIB_OBJECT(frontier) { - public: NETLIB_CONSTRUCTOR(frontier) , m_RIN(*this, "m_RIN", NETLIB_DELEGATE(input)) , m_ROUT(*this, "m_ROUT", NETLIB_DELEGATE(input)) @@ -347,22 +346,22 @@ namespace devices , m_p_ROUT(*this, "ROUT", nlconst::magic(50.0)) { - register_subalias("I", m_RIN.P()); - register_subalias("G", m_RIN.N()); - connect(m_I, m_RIN.P()); + register_subalias("I", "m_RIN.1"); + register_subalias("G", "m_RIN.2"); + connect("_I", "m_RIN.1"); - register_subalias("_OP", m_ROUT.P()); - register_subalias("Q", m_ROUT.N()); - connect(m_Q, m_ROUT.P()); + register_subalias("_OP", "m_ROUT.1"); + register_subalias("Q", "m_ROUT.2"); + connect("_Q", "m_ROUT.1"); } + private: NETLIB_RESETI() { m_RIN.set_G_V_I(plib::reciprocal(m_p_RIN()),0,0); m_ROUT.set_G_V_I(plib::reciprocal(m_p_ROUT()),0,0); } - private: NETLIB_HANDLERI(input) { m_Q.push(m_I()); @@ -442,7 +441,6 @@ namespace devices NETLIB_OBJECT(sys_dsw1) { - public: NETLIB_CONSTRUCTOR(sys_dsw1) , m_RON(*this, "RON", nlconst::one()) , m_ROFF(*this, "ROFF", nlconst::magic(1.0E20)) @@ -450,8 +448,8 @@ namespace devices , m_I(*this, "I", NETLIB_DELEGATE(input)) , m_last_state(*this, "m_last_state", 0) { - register_subalias("1", m_R.P()); - register_subalias("2", m_R.N()); + register_subalias("1", "_R.1"); + register_subalias("2", "_R.2"); } NETLIB_RESETI() @@ -499,7 +497,6 @@ namespace devices NETLIB_OBJECT(sys_dsw2) { - public: NETLIB_CONSTRUCTOR(sys_dsw2) , m_R1(*this, "_R1") , m_R2(*this, "_R2") @@ -509,12 +506,13 @@ namespace devices , m_power_pins(*this) { // connect and register pins - register_subalias("1", m_R1.P()); - register_subalias("2", m_R1.N()); - register_subalias("3", m_R2.N()); - connect(m_R1.N(), m_R2.P()); + register_subalias("1", "_R1.1"); + register_subalias("2", "_R1.2"); + register_subalias("3", "_R2.2"); + connect("_R1.2", "_R2.1"); } + private: NETLIB_RESETI() { m_R1.set_G(m_GOFF()); @@ -523,7 +521,6 @@ namespace devices //NETLIB_UPDATE_PARAMI(); - private: NETLIB_HANDLERI(input) { const netlist_sig_t state = m_I(); @@ -568,7 +565,6 @@ namespace devices NETLIB_OBJECT(sys_compd) { - public: NETLIB_CONSTRUCTOR(sys_compd) , m_IP(*this, "IP", NETLIB_DELEGATE(inputs)) , m_IN(*this, "IN", NETLIB_DELEGATE(inputs)) @@ -579,6 +575,7 @@ namespace devices { } + private: NETLIB_RESETI() { m_last_state = 0; @@ -586,7 +583,6 @@ namespace devices //NETLIB_UPDATE_PARAMI(); - private: NETLIB_HANDLERI(inputs) { const netlist_sig_t state = (m_IP() > m_IN()); @@ -657,8 +653,8 @@ namespace devices , m_dis(*this, "m_dis",m_sigma()) { - register_subalias("1", m_T.P()); - register_subalias("2", m_T.N()); + register_subalias("1", "m_T.1"); + register_subalias("2", "m_T.2"); } private: diff --git a/src/lib/netlist/macro/nlm_cd4xxx_lib.cpp b/src/lib/netlist/macro/nlm_cd4xxx_lib.cpp index 492736d75ca..7dc97b02407 100644 --- a/src/lib/netlist/macro/nlm_cd4xxx_lib.cpp +++ b/src/lib/netlist/macro/nlm_cd4xxx_lib.cpp @@ -70,7 +70,7 @@ static NETLIST_START(CD4006_DIP) A.D3, /* D3 |5 10| D3+4 */ A.D3P4, A.D4, /* D4 |6 9| D4+5 */ A.D4P5, A.VSS, /* VSS |7 8| D4+4 */ A.D4P4 - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -95,15 +95,15 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(CD4011_DIP) - CD4011_GATE(A) - CD4011_GATE(B) - CD4011_GATE(C) - CD4011_GATE(D) + CD4011_GATE(A) + CD4011_GATE(B) + CD4011_GATE(C) + CD4011_GATE(D) - NET_C(A.VDD, B.VDD, C.VDD, D.VDD) - NET_C(A.VSS, B.VSS, C.VSS, D.VSS) + NET_C(A.VDD, B.VDD, C.VDD, D.VDD) + NET_C(A.VSS, B.VSS, C.VSS, D.VSS) - DIPPINS( /* +--------------+ */ + DIPPINS( /* +--------------+ */ A.A, /* A |1 ++ 14| VDD */ A.VDD, A.B, /* B |2 13| H */ D.B, A.Q, /* J |3 12| G */ D.A, @@ -147,14 +147,14 @@ static NETLIST_START(CD4013_DIP) NET_C(A.VSS, B.VSS) DIPPINS( /* +--------------+ */ - A.Q, /* Q1 |1 ++ 14| VDD */ A.VDD, + A.Q, /* Q1 |1 ++ 14| VDD */ A.VDD, A.QQ, /* Q1Q |2 13| Q2 */ B.Q, A.CLOCK, /* CLOCK1 |3 12| Q2Q */ B.QQ, A.RESET, /* RESET1 |4 4013 11| CLOCK2 */ B.CLOCK, A.DATA, /* DATA1 |5 10| RESET2 */ B.RESET, A.SET, /* SET1 |6 9| DATA2 */ B.DATA, A.VSS, /* VSS |7 8| SET2 */ B.SET - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -547,10 +547,28 @@ static NETLIST_START(CD4538_DIP) A.Q, /* 3S |6 11| 3Y */ B.B, A.QQ, /* EQ |7 10| 3Z */ B.Q, A.VSS, /* GND |8 9| VEE */ B.QQ - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() +//FIXME: Documentation +static NETLIST_START(MM5837_DIP) + MM5837(A) + NC_PIN(NC) + + // Create a parameter freq for the dip model + // The default will be A's FREQ parameter. + DEFPARAM(FREQ, "$(@.A.FREQ") + PARAM(A.FREQ, "$(@.FREQ)") + + DIPPINS( /* +--------+ */ + A.VDD, /* VDD |1 ++ 8| NC */ NC.I, + A.VGG, /* VGG |2 7| NC */ NC.I, + A.OUT, /* OUT |3 6| NC */ NC.I, + A.VSS, /* VSS |4 5| NC */ NC.I, + /* +--------+ */ + ) +NETLIST_END() NETLIST_START(cd4xxx_lib) @@ -604,4 +622,6 @@ NETLIST_START(cd4xxx_lib) LOCAL_LIB_ENTRY(CD4316_DIP) LOCAL_LIB_ENTRY(CD4538_DIP) + LOCAL_LIB_ENTRY(MM5837_DIP) + NETLIST_END() diff --git a/src/lib/netlist/macro/nlm_cd4xxx_lib.h b/src/lib/netlist/macro/nlm_cd4xxx_lib.h index d6ecade6658..64fbaed5bde 100644 --- a/src/lib/netlist/macro/nlm_cd4xxx_lib.h +++ b/src/lib/netlist/macro/nlm_cd4xxx_lib.h @@ -88,9 +88,12 @@ #define CD4316_DIP(name) \ NET_REGISTER_DEV(CD4016_DIP, name) -#define CD4538_DIP(name) \ +#define CD4538_DIP(name) \ NET_REGISTER_DEV(CD4538_DIP, name) +#define MM5837_DIP(name) \ + NET_REGISTER_DEV(MM5837_DIP, name) + #endif // !NL_AUTO_DEVICES /* ---------------------------------------------------------------------------- diff --git a/src/lib/netlist/macro/nlm_roms_lib.cpp b/src/lib/netlist/macro/nlm_roms_lib.cpp index a28c3cec37b..61d0638944d 100644 --- a/src/lib/netlist/macro/nlm_roms_lib.cpp +++ b/src/lib/netlist/macro/nlm_roms_lib.cpp @@ -312,7 +312,7 @@ static NETLIST_START(TTL_82S16_DIP) A.DOUTQ, /* DOUTQ |6 11| A7 */ A.A7, A.A4, /* A4 |7 10| A6 */ A.A6, A.GND, /* GND |8 9| A5 */ A.A5 - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -414,8 +414,7 @@ NETLIST_END() * A0 |8 9| GND * +--------------+ */ - - static NETLIST_START(RAM_2102A_DIP) +static NETLIST_START(RAM_2102A_DIP) RAM_2102A(A) DIPPINS( /* +--------------+ */ @@ -431,6 +430,27 @@ NETLIST_END() ) NETLIST_END() +//FIXME: Documentation +static NETLIST_START(ROM_TMS4800_DIP) + ROM_TMS4800(A) + + DIPPINS( /* +----------------+ */ + A.VSS, /* VSS |1 ++ 24| OE1 */ A.OE1, + A.A1, /* A1 |2 23| O1 */ A.O1, + A.A2, /* A2 |3 22| O2 */ A.O2, + A.A3, /* A3 |4 TMS-4800 21| O3 */ A.O3, + A.A4, /* A4 |5 20| O4 */ A.O4, + A.A5, /* A5 |6 19| O5 */ A.O5, + A.A6, /* A6 |7 18| O6 */ A.O6, + A.A10, /* A10 |8 17| O7 */ A.O7, + A.VGG, /* VGG |9 16| O8 */ A.O8, + A.A9, /* A9 |10 15| A11 */ A.A11, + A.A8, /* A8 |11 14| OE2 */ A.OE2, + A.A7, /* A7 |12 13| AR */ A.AR + /* +----------------+ */ + ) +NETLIST_END() + NETLIST_START(roms_lib) @@ -442,6 +462,6 @@ NETLIST_START(roms_lib) LOCAL_LIB_ENTRY(PROM_82S115_DIP) LOCAL_LIB_ENTRY(PROM_MK28000_DIP) LOCAL_LIB_ENTRY(RAM_2102A_DIP) - + LOCAL_LIB_ENTRY(ROM_TMS4800_DIP) NETLIST_END() diff --git a/src/lib/netlist/macro/nlm_roms_lib.h b/src/lib/netlist/macro/nlm_roms_lib.h index 2dcec6ca37b..aca01bbcf91 100644 --- a/src/lib/netlist/macro/nlm_roms_lib.h +++ b/src/lib/netlist/macro/nlm_roms_lib.h @@ -43,6 +43,9 @@ #define RAM_2102A_DIP(name) \ NET_REGISTER_DEV(RAM_2102A_DIP, name) +#define ROM_TMS4800_DIP(name) \ + NET_REGISTER_DEV(ROM_TMS4800, name) + #endif // NL_AUTO_DEVICES diff --git a/src/lib/netlist/macro/nlm_ttl74xx_lib.cpp b/src/lib/netlist/macro/nlm_ttl74xx_lib.cpp index 0d3754e94d7..acbe20503a5 100644 --- a/src/lib/netlist/macro/nlm_ttl74xx_lib.cpp +++ b/src/lib/netlist/macro/nlm_ttl74xx_lib.cpp @@ -22,10 +22,10 @@ //- +---+---++---+ //- static NETLIST_START(TTL_7400_DIP) - TTL_7400_GATE(A) - TTL_7400_GATE(B) - TTL_7400_GATE(C) - TTL_7400_GATE(D) + TTL_7400_NAND(A) + TTL_7400_NAND(B) + TTL_7400_NAND(C) + TTL_7400_NAND(D) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) @@ -61,10 +61,10 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(TTL_7402_DIP) - TTL_7402_GATE(A) - TTL_7402_GATE(B) - TTL_7402_GATE(C) - TTL_7402_GATE(D) + TTL_7402_NOR(A) + TTL_7402_NOR(B) + TTL_7402_NOR(C) + TTL_7402_NOR(D) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) @@ -98,12 +98,12 @@ NETLIST_END() //- +---++---+ //- static NETLIST_START(TTL_7404_DIP) - TTL_7404_GATE(A) - TTL_7404_GATE(B) - TTL_7404_GATE(C) - TTL_7404_GATE(D) - TTL_7404_GATE(E) - TTL_7404_GATE(F) + TTL_7404_INVERT(A) + TTL_7404_INVERT(B) + TTL_7404_INVERT(C) + TTL_7404_INVERT(D) + TTL_7404_INVERT(E) + TTL_7404_INVERT(F) NET_C(A.VCC, B.VCC, C.VCC, D.VCC, E.VCC, F.VCC) NET_C(A.GND, B.GND, C.GND, D.GND, E.GND, F.GND) @@ -221,10 +221,10 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(TTL_7408_DIP) - TTL_7408_GATE(A) - TTL_7408_GATE(B) - TTL_7408_GATE(C) - TTL_7408_GATE(D) + TTL_7408_AND(A) + TTL_7408_AND(B) + TTL_7408_AND(C) + TTL_7408_AND(D) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) @@ -260,9 +260,9 @@ NETLIST_END() //- +---+---+---++---+ //- static NETLIST_START(TTL_7410_DIP) - TTL_7410_GATE(A) - TTL_7410_GATE(B) - TTL_7410_GATE(C) + TTL_7410_NAND(A) + TTL_7410_NAND(B) + TTL_7410_NAND(C) NET_C(A.VCC, B.VCC, C.VCC) NET_C(A.GND, B.GND, C.GND) @@ -298,9 +298,9 @@ NETLIST_END() //- +---+---+---++---+ //- static NETLIST_START(TTL_7411_DIP) - TTL_7411_GATE(A) - TTL_7411_GATE(B) - TTL_7411_GATE(C) + TTL_7411_AND(A) + TTL_7411_AND(B) + TTL_7411_AND(C) NET_C(A.VCC, B.VCC, C.VCC) NET_C(A.GND, B.GND, C.GND) @@ -457,8 +457,8 @@ NETLIST_END() //- +---+---+---+---++---+ //- static NETLIST_START(TTL_7420_DIP) - TTL_7420_GATE(A) - TTL_7420_GATE(B) + TTL_7420_NAND(A) + TTL_7420_NAND(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) @@ -496,8 +496,8 @@ NETLIST_END() //- +---+---+---+---++---+ //- static NETLIST_START(TTL_7421_DIP) - TTL_7421_GATE(A) - TTL_7421_GATE(B) + TTL_7421_AND(A) + TTL_7421_AND(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) @@ -538,8 +538,8 @@ NETLIST_END() //- +---+---+---+---+---++---+ //- static NETLIST_START(TTL_7425_DIP) - TTL_7425_GATE(A) - TTL_7425_GATE(B) + TTL_7425_NOR(A) + TTL_7425_NOR(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) @@ -577,9 +577,9 @@ NETLIST_END() //- +---+---+---++---+ //- static NETLIST_START(TTL_7427_DIP) - TTL_7427_GATE(A) - TTL_7427_GATE(B) - TTL_7427_GATE(C) + TTL_7427_NOR(A) + TTL_7427_NOR(B) + TTL_7427_NOR(C) NET_C(A.VCC, B.VCC, C.VCC) NET_C(A.GND, B.GND, C.GND) @@ -619,7 +619,7 @@ NETLIST_END() //- +---+---+---+---+---+---+---+---++---+ //- static NETLIST_START(TTL_7430_DIP) - TTL_7430_GATE(A) + TTL_7430_NAND(A) NC_PIN(NC) DIPPINS( /* +--------------+ */ @@ -653,10 +653,10 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(TTL_7432_DIP) - TTL_7432_GATE(A) - TTL_7432_GATE(B) - TTL_7432_GATE(C) - TTL_7432_GATE(D) + TTL_7432_OR(A) + TTL_7432_OR(B) + TTL_7432_OR(C) + TTL_7432_OR(D) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) @@ -693,10 +693,10 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(TTL_7437_DIP) - TTL_7437_GATE(A) - TTL_7437_GATE(B) - TTL_7437_GATE(C) - TTL_7437_GATE(D) + TTL_7437_NAND(A) + TTL_7437_NAND(B) + TTL_7437_NAND(C) + TTL_7437_NAND(D) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) @@ -909,7 +909,7 @@ static NETLIST_START(TTL_7473_DIP) B.CLK, /* CLK2 |5 10| K2 */ B.K, B.CLRQ, /* CLR2 |6 9| Q2 */ B.Q, B.J, /* J2 |7 8| QQ2 */ B.QQ - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -952,7 +952,7 @@ static NETLIST_START(TTL_7473A_DIP) B.CLK, /* CLK2 |5 10| K2 */ B.K, B.CLRQ, /* CLR2 |6 9| Q2 */ B.Q, B.J, /* J2 |7 8| QQ2 */ B.QQ - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -995,7 +995,7 @@ static NETLIST_START(TTL_7474_DIP) A.Q, /* Q1 |5 10| PR2 */ B.PREQ, A.QQ, /* QQ1 |6 9| Q2 */ B.Q, A.GND, /* GND |7 8| QQ2 */ B.QQ - /* +-------------+ */ + /* +-------------+ */ ) NETLIST_END() @@ -1179,7 +1179,7 @@ static NETLIST_START(TTL_7485_DIP) A.EQOUT, /* EQOUT |6 11| B1 */ A.B1, A.LTOUT, /* LTOUT |7 10| A0 */ A.A0, A.GND, /* GND |8 9| B0 */ A.B0 - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -1202,10 +1202,10 @@ NETLIST_END() //- +---+---++---+ //- static NETLIST_START(TTL_7486_DIP) - TTL_7486_GATE(A) - TTL_7486_GATE(B) - TTL_7486_GATE(C) - TTL_7486_GATE(D) + TTL_7486_XOR(A) + TTL_7486_XOR(B) + TTL_7486_XOR(C) + TTL_7486_XOR(D) NET_C(A.VCC, B.VCC, C.VCC, D.VCC) NET_C(A.GND, B.GND, C.GND, D.GND) @@ -1354,56 +1354,69 @@ NETLIST_END() ) NETLIST_END() -//- Identifier: TTL_7493_DIP -//- Title: DM7493A Binary Counter -//- Description: These monolithic counters contains four -//- master-slave flip-flops and additional gating to provide -//- a divide-by-two counter and a three-stage binary counter -//- for which the count cycle length is divide-by-eight. +//- Identifier: TTL_7493_DIP +//- Title: 7493 Binary Counters +//- Description: +//- Each of these monolithic counters contains four master-slave +//- flip-flops and additional gating to provide a divide-by-two +//- counter and a three-stage binary counter for which the +//- count cycle length is divide-by-five for the 90A and divide-by-eight +//- for the 93A. //- -//- These counters have a gated zero reset. +//- All of these counters have a gated zero reset and the 90A +//- also has gated set-to-nine inputs for use in BCD nine’s complement +//- applications. +//- +//- To use their maximum count length (decade or four-bit binary), +//- the B input is connected to the Q A output. The input count pulses +//- are applied to input A and the outputs are as described in the +//- appropriate truth table. A symmetrical divide-by-ten count can be +//- obtained from the 90A counters by connecting the Q D output to the +//- A input and applying the input count to the B input which gives +//- a divide-by-ten square wave at output Q A. //- -//- To use their maximum count length (four-bit binary), the B input is connected -//- to the QA output. The input count pulses are applied to -//- input A and the outputs are as described in the appropriate -//- truth table. //- Pinalias: B,R01,R02,NC,VCC,NC,NC,QC,QB,GND,QD,QA,NC,A //- Package: DIP //- NamingConvention: Naming conventions follow National Semiconductor datasheet +//- Limitations: Internal resistor network currently fixed to 5k +//- more limitations +//- Example: ne555_astable.c,ne555_example //- FunctionTable: //- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS006533.PDF //- -//- Count Sequence -//- +-------++----+----+----+----+ -//- | Count || QD | QC | QB | QA | -//- +=======++====+====+====+====+ -//- | 0 || 0 | 0 | 0 | 0 | -//- | 1 || 0 | 0 | 0 | 1 | -//- | 2 || 0 | 0 | 1 | 0 | -//- | 3 || 0 | 0 | 1 | 1 | -//- | 4 || 0 | 1 | 0 | 0 | -//- | 5 || 0 | 1 | 0 | 1 | -//- | 6 || 0 | 1 | 1 | 0 | -//- | 7 || 0 | 1 | 1 | 1 | -//- | 8 || 1 | 0 | 0 | 0 | -//- | 9 || 1 | 0 | 0 | 1 | -//- | 10 || 1 | 0 | 1 | 0 | -//- | 11 || 1 | 0 | 1 | 1 | -//- | 12 || 1 | 1 | 0 | 0 | -//- | 13 || 1 | 1 | 0 | 1 | -//- | 14 || 1 | 1 | 1 | 0 | -//- | 15 || 1 | 1 | 1 | 1 | -//- +-------++----+----+----+----+ +//- Counter Sequence //- -//- Reset/Count Function Table -//- +-----+-----++----+----+----+----+ -//- | R01 | R02 || QD | QC | QB | QA | -//- +=====+=====++====+====+====+====+ -//- | 1 | 1 || 0 | 0 | 0 | 0 | -//- | 0 | X || COUNT | -//- | X | 0 || COUNT | -//- +-----+-----++----+----+----+----+ +//- | COUNT || QD | QC | QB | QA | +//- |------:||:--:|:--:|:--:|:--:| +//- | 0 || 0 | 0 | 0 | 0 | +//- | 1 || 0 | 0 | 0 | 1 | +//- | 2 || 0 | 0 | 1 | 0 | +//- | 3 || 0 | 0 | 1 | 1 | +//- | 4 || 0 | 1 | 0 | 0 | +//- | 5 || 0 | 1 | 0 | 1 | +//- | 6 || 0 | 1 | 1 | 0 | +//- | 7 || 0 | 1 | 1 | 1 | +//- | 8 || 1 | 0 | 0 | 0 | +//- | 9 || 1 | 0 | 0 | 1 | +//- | 10 || 1 | 0 | 1 | 0 | +//- | 11 || 1 | 0 | 1 | 1 | +//- | 12 || 1 | 1 | 0 | 0 | +//- | 13 || 1 | 1 | 0 | 1 | +//- | 14 || 1 | 1 | 1 | 0 | +//- | 15 || 1 | 1 | 1 | 1 | +//- +//- Note C Output QA is connected to input B +//- +//- Reset Count Function table +//- +//- | R01 | R02 | QD | QC | QB | QA | +//- |:---:|:---:|:--:|:--:|:--:|:--:| +//- | 1 | 1 | 0 | 0 | 0 | 0 | +//- | 0 | X | COUNT |||| +//- | X | 0 | COUNT |||| //- +//- + static NETLIST_START(TTL_7493_DIP) TTL_7493(A) NC_PIN(NC) @@ -1416,7 +1429,7 @@ NETLIST_END() A.VCC, /* VCC |5 10| GND */ A.GND, NC.I, /* NC |6 9| QB */ A.QB, NC.I, /* NC |7 8| QC */ A.QC - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -1437,15 +1450,15 @@ static NETLIST_START(TTL_7497_DIP) TTL_7497(A) DIPPINS( /* +--------------+ */ - A.B1, /* S1 |1 ++ 16| VCC */ A.VCC, - A.B4, /* S4 |2 15| S3 */ A.B3, - A.B5, /* S5 |3 14| S2 */ A.B2, - A.B0, /* S0 |4 7497 13| MR */ A.CLR, - A.ZQ, /* ZQ |5 12| EY */ A.UNITYQ, - A.Y, /* Y |6 11| CEQ */ A.ENQ, + A.B1, /* S1 |1 ++ 16| VCC */ A.VCC, + A.B4, /* S4 |2 15| S3 */ A.B3, + A.B5, /* S5 |3 14| S2 */ A.B2, + A.B0, /* S0 |4 7497 13| MR */ A.CLR, + A.ZQ, /* ZQ |5 12| EY */ A.UNITYQ, + A.Y, /* Y |6 11| CEQ */ A.ENQ, A.ENOUTQ, /* TCQ |7 10| EZQ */ A.STRBQ, A.GND, /* GND |8 9| CP */ A.CLK - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -1572,7 +1585,7 @@ static NETLIST_START(TTL_74113_DIP) A.Q, /* Q1 |5 10| PRQ2 */ B.SETQ, A.QQ, /* QQ1 |6 9| Q2 */ B.Q, A.GND, /* GND |7 8| QQ2 */ B.QQ - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -1615,7 +1628,7 @@ static NETLIST_START(TTL_74113A_DIP) A.Q, /* Q1 |5 10| PRQ2 */ B.SETQ, A.QQ, /* QQ1 |6 9| Q2 */ B.Q, A.GND, /* GND |7 8| QQ2 */ B.QQ - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -1663,7 +1676,7 @@ static NETLIST_START(TTL_74121_DIP) A.B, /* B |5 10| CEXT */ A.C, A.Q, /* Q |6 9| RINT */ RINT.1, A.GND, /* GND |7 8| NC */ NC.I - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -1702,15 +1715,15 @@ static NETLIST_START(TTL_74123_DIP) NET_C(A.GND, B.GND) DIPPINS( /* +--------------+ */ - A.A, /* A1 |1 ++ 16| VCC */ A.VCC, - A.B, /* B1 |2 15| RC1 */ A.RC, + A.A, /* A1 |1 ++ 16| VCC */ A.VCC, + A.B, /* B1 |2 15| RC1 */ A.RC, A.CLRQ, /* CLRQ1 |3 14| C1 */ A.C, - A.QQ, /* QQ1 |4 74123 13| Q1 */ A.Q, - B.Q, /* Q2 |5 12| QQ2 */ B.QQ, - B.C, /* C2 |6 11| CLRQ */ B.CLRQ, - B.RC, /* RC2 |7 10| B2 */ B.B, + A.QQ, /* QQ1 |4 74123 13| Q1 */ A.Q, + B.Q, /* Q2 |5 12| QQ2 */ B.QQ, + B.C, /* C2 |6 11| CLRQ */ B.CLRQ, + B.RC, /* RC2 |7 10| B2 */ B.B, A.GND, /* GND |8 9| A2 */ B.A - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -2124,7 +2137,7 @@ static NETLIST_START(TTL_74161_DIP) A.D, /* D |6 11| QD */ A.QD, A.ENP, /* Enable P |7 10| Enable T */ A.ENT, A.GND, /* GND |8 9| /LOAD */ A.LOADQ - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -2166,7 +2179,7 @@ static NETLIST_START(TTL_74163_DIP) A.D, /* D |6 11| QD */ A.QD, A.ENP, /* Enable P |7 10| Enable T */ A.ENT, A.GND, /* GND |8 9| /LOAD */ A.LOADQ - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -2205,7 +2218,7 @@ static NETLIST_START(TTL_74164_DIP) A.QC, /* QC |5 10| QE */ A.QE, A.QD, /* QD |6 9| CLRQ */ A.CLRQ, A.GND, /* GND |7 8| CLK */ A.CLK - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -2237,13 +2250,13 @@ static NETLIST_START(TTL_74165_DIP) DIPPINS( /* +--------------+ */ A.SH_LDQ, /* PLQ |1 ++ 16| VCC */ A.VCC, A.CLK, /* CP1 |2 15| CP2 */ A.CLKINH, - A.E, /* P4 |3 14| P3 */ A.D, - A.F, /* P5 |4 74165 13| P2 */ A.C, - A.G, /* P6 |5 12| P1 */ A.B, - A.H, /* P7 |6 11| P0 */ A.A, + A.E, /* P4 |3 14| P3 */ A.D, + A.F, /* P5 |4 74165 13| P2 */ A.C, + A.G, /* P6 |5 12| P1 */ A.B, + A.H, /* P7 |6 11| P0 */ A.A, A.QHQ, /* QQ7 |7 10| DS */ A.SER, A.GND, /* GND |8 9| Q7 */ A.QH - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -2282,14 +2295,14 @@ static NETLIST_START(TTL_74166_DIP) DIPPINS( /* +--------------+ */ A.SER, /* SER |1 ++ 16| VCC */ A.VCC, - A.A, /* A |2 15| SH/LDQ */ A.SH_LDQ, - A.B, /* B |3 14| H */ A.H, - A.C, /* C |4 74166 13| QH */ A.QH, - A.D, /* D |5 12| G */ A.G, + A.A, /* A |2 15| SH/LDQ */ A.SH_LDQ, + A.B, /* B |3 14| H */ A.H, + A.C, /* C |4 74166 13| QH */ A.QH, + A.D, /* D |5 12| G */ A.G, A.CLKINH, /* CLKINH |6 11| F */ A.F, A.CLK, /* CLK |7 10| E */ A.E, A.GND, /* GND |8 9| CLRQ */ A.CLRQ - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -2316,12 +2329,12 @@ NETLIST_END() //- +------+-----+---++---+ //- static NETLIST_START(TTL_74174_DIP) - TTL_74174_GATE(A) - TTL_74174_GATE(B) - TTL_74174_GATE(C) - TTL_74174_GATE(D) - TTL_74174_GATE(E) - TTL_74174_GATE(F) + TTL_74174(A) + TTL_74174(B) + TTL_74174(C) + TTL_74174(D) + TTL_74174(E) + TTL_74174(F) DIPPINS( /* +--------------+ */ A.CLRQ, /* CLRQ |1 ++ 16| VCC */ A.VCC, @@ -2332,7 +2345,75 @@ static NETLIST_START(TTL_74174_DIP) C.D, /* D3 |6 11| D4 */ D.D, C.Q, /* Q3 |7 10| Q4 */ D.Q, A.GND, /* GND |8 9| CLK */ A.CLK - /* +--------------+ */ + /* +--------------+ */ + ) +NETLIST_END() + +//FIXME: add documentation +static NETLIST_START(TTL_74175_DIP) + TTL_74175(A) + + DIPPINS( /* +--------------+ */ + A.CLRQ, /* CLRQ |1 ++ 16| VCC */ A.VCC, + A.Q1, /* Q1 |2 15| Q4 */ A.Q4, + A.Q1Q, /* Q1Q |3 14| Q4Q */ A.Q4Q, + A.D1, /* D1 |4 74175 13| D4 */ A.D4, + A.D2, /* D2 |5 12| D3 */ A.D3, + A.Q2Q, /* Q2Q |6 11| Q3Q */ A.Q3Q, + A.Q2, /* Q2 |7 10| Q3 */ A.Q3, + A.GND, /* GND |8 9| CLK */ A.CLK + /* +--------------+ */ + ) +NETLIST_END() + +//FIXME: add documentation +static NETLIST_START(TTL_74192_DIP) + TTL_74192(A) + + DIPPINS( /* +--------------+ */ + A.B, /* B |1 ++ 16| VCC */ A.VCC, + A.QB, /* QB |2 15| A */ A.A, + A.QA, /* QA |3 14| CLEAR */ A.CLEAR, + A.CD, /* CD |4 74192 13| BORROWQ*/ A.BORROWQ, + A.CU, /* CU |5 12| CARRYQ */ A.CARRYQ, + A.QC, /* QC |6 11| LOADQ */ A.LOADQ, + A.QD, /* QD |7 10| C */ A.C, + A.GND, /* GND |8 9| D */ A.D + /* +--------------+ */ + ) +NETLIST_END() + +//FIXME: add documentation +static NETLIST_START(TTL_74193_DIP) + TTL_74193(A) + + DIPPINS( /* +--------------+ */ + A.B, /* B |1 ++ 16| VCC */ A.VCC, + A.QB, /* QB |2 15| A */ A.A, + A.QA, /* QA |3 14| CLEAR */ A.CLEAR, + A.CD, /* CD |4 74192 13| BORROWQ*/ A.BORROWQ, + A.CU, /* CU |5 12| CARRYQ */ A.CARRYQ, + A.QC, /* QC |6 11| LOADQ */ A.LOADQ, + A.QD, /* QD |7 10| C */ A.C, + A.GND, /* GND |8 9| D */ A.D + /* +--------------+ */ + ) +NETLIST_END() + +//FIXME: add documentation +static NETLIST_START(TTL_74194_DIP) + TTL_74194(A) + + DIPPINS( /* +--------------+ */ + A.CLRQ, /* CLRQ |1 ++ 16| VCC */ A.VCC, + A.SRIN, /* SRIN |2 15| QA */ A.QA, + A.A, /* A |3 14| QB */ A.QB, + A.B, /* B |4 74194 13| QC */ A.QC, + A.C, /* C |5 12| QD */ A.QD, + A.D, /* D |6 11| CLK */ A.CLK, + A.SLIN, /* SLIN |7 10| S1 */ A.S1, + A.GND, /* GND |8 9| S0 */ A.S0 + /* +--------------+ */ ) NETLIST_END() @@ -2357,8 +2438,8 @@ NETLIST_END() //- +---+---+---+---+---++---+ //- static NETLIST_START(TTL_74260_DIP) - TTL_74260_GATE(A) - TTL_74260_GATE(B) + TTL_74260_NOR(A) + TTL_74260_NOR(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) @@ -2433,6 +2514,23 @@ static NETLIST_START(TTL_74279_DIP) ) NETLIST_END() +// FIXME: Documentation +static NETLIST_START(TTL_74365_DIP) + TTL_74365(A) + + DIPPINS( /* +--------------+ */ + A.G1Q, /* G1Q |1 ++ 16| VCC */ A.VCC, + A.A1, /* A1 |2 15| G2Q */ A.G2Q, + A.Y1, /* Y1 |3 14| A6 */ A.A6, + A.A2, /* A2 |4 74365 13| Y6 */ A.Y6, + A.Y2, /* Y2 |5 12| A5 */ A.A5, + A.A3, /* A3 |6 11| Y5 */ A.Y5, + A.Y3, /* Y3 |7 10| A4 */ A.A4, + A.GND, /* GND |8 9| Y4 */ A.Y4 + /* +--------------+ */ + ) +NETLIST_END() + //- Identifier: TTL_74377_DIP //- Title: DM54LS377/DM74LS377 Octal D Flip-Flop with Common Enable and Clock //- Description: The ’LS377 is an 8-bit register built using advanced low power Schottky technology. @@ -2716,7 +2814,7 @@ static NETLIST_START(TTL_9310_DIP) A.D, /* D |6 11| QD */ A.QD, A.ENP, /* Enable P |7 10| Enable T */ A.ENT, A.GND, /* GND |8 9| /LOAD */ A.LOADQ - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -2766,6 +2864,23 @@ static NETLIST_START(TTL_9312_DIP) ) NETLIST_END() +// FIXME: Documenation +static NETLIST_START(TTL_9314_DIP) + TTL_9314(A) + + DIPPINS( /* +--------------+ */ + A.EQ, /* /E |1 ++ 16| VCC */ A.VCC, + A.S0Q, /* /S0 |2 15| Q0 */ A.Q0, + A.D0, /* D0 |3 14| /S1 */ A.S1Q, + A.D1, /* D1 |4 DM9314 13| Q1 */ A.Q1, + A.S2Q, /* /S2 |5 12| Q2 */ A.Q2, + A.D2, /* D2 |6 11| /S3 */ A.S3Q, + A.D3, /* D3 |7 10| Q3 */ A.Q3, + A.GND, /* GND |8 9| /MR */ A.MRQ + /* +--------------+ */ + ) +NETLIST_END() + //- Identifier: TTL_9316_DIP //- Title: DM9316/DM8316 Synchronous 4-Bit Counters //- Description: These synchronous, presettable counters feature an @@ -2827,7 +2942,7 @@ static NETLIST_START(TTL_9316_DIP) A.D, /* D |6 11| QD */ A.QD, A.ENP, /* Enable P |7 10| Enable T */ A.ENT, A.GND, /* GND |8 9| LOADQ */ A.LOADQ - /* +--------------+ */ + /* +--------------+ */ ) NETLIST_END() @@ -2846,26 +2961,18 @@ NETLIST_END() //- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS006606.PDF //- static NETLIST_START(TTL_9322_DIP) - TTL_9322_GATE(A) - TTL_9322_GATE(B) - TTL_9322_GATE(C) - TTL_9322_GATE(D) - - NET_C(A.SELECT, B.SELECT, C.SELECT, D.SELECT) - NET_C(A.STROBE, B.STROBE, C.STROBE, D.STROBE) - NET_C(A.VCC, B.VCC, C.VCC, D.VCC) - NET_C(A.GND, B.GND, C.GND, D.GND) + TTL_9322(A) DIPPINS( /* +--------------+ */ - A.SELECT, /* SELECT |1 ++ 16| VCC */ A.VCC, - A.A, /* A1 |2 15| STROBE */ A.STROBE, - A.B, /* B1 |3 14| A4 */ D.A, - A.Y, /* Y1 |4 9322 13| B4 */ D.B, - B.A, /* A2 |5 12| Y4 */ D.Y, - B.B, /* B2 |6 11| A3 */ C.A, - B.Y, /* Y2 |7 10| B3 */ C.B, - A.GND, /* GND |8 9| Y3 */ C.Y - /* +--------------+ */ + A.SELECT, /* SELECT |1 ++ 16| VCC */ A.VCC, + A.A1, /* A1 |2 15| STROBE */ A.STROBE, + A.B1, /* B1 |3 14| A4 */ A.A4, + A.Y1, /* Y1 |4 9322 13| B4 */ A.B4, + A.A2, /* A2 |5 12| Y4 */ A.Y4, + A.B2, /* B2 |6 11| A3 */ A.A3, + A.Y2, /* Y2 |7 10| B3 */ A.B3, + A.GND, /* GND |8 9| Y3 */ A.Y3 + /* +--------------+ */ ) NETLIST_END() @@ -2876,22 +2983,40 @@ NETLIST_END() //- NamingConvention: Naming conventions follow National Semiconductor datasheet //- static NETLIST_START(TTL_9321_DIP) - TTL_9321_GATE(A) - TTL_9321_GATE(B) + TTL_9321(A) + TTL_9321(B) NET_C(A.VCC, B.VCC) NET_C(A.GND, B.GND) DIPPINS( /* +--------------+ */ - A.E, /* /E |1 ++ 16| VCC */ A.VCC, - A.A0, /* A0 |2 15| /E */ B.E, - A.A1, /* A1 |3 14| A0 */ B.A0, - A.D0, /* /D0 |4 9321 13| A1 */ B.A1, - A.D1, /* /D1 |5 12| /D0 */ B.D0, - A.D2, /* /D2 |6 11| /D1 */ B.D1, - A.D3, /* /D3 |7 10| /D2 */ B.D2, + A.E, /* /E |1 ++ 16| VCC */ A.VCC, + A.A0, /* A0 |2 15| /E */ B.E, + A.A1, /* A1 |3 14| A0 */ B.A0, + A.D0, /* /D0 |4 9321 13| A1 */ B.A1, + A.D1, /* /D1 |5 12| /D0 */ B.D0, + A.D2, /* /D2 |6 11| /D1 */ B.D1, + A.D3, /* /D3 |7 10| /D2 */ B.D2, A.GND, /* GND |8 9| /D3 */ B.D3 - /* +--------------+ */ + /* +--------------+ */ + ) +NETLIST_END() + + +//FIXME: Documenation +static NETLIST_START(TTL_9334_DIP) + TTL_9334(A) + + DIPPINS(/* +--------------+ */ + A.A0, /* A0 |1 ++ 16| VCC */ A.VCC, + A.A1, /* A1 |2 15| /C */ A.CQ, + A.A2, /* A2 |3 14| /E */ A.EQ, + A.Q0, /* Q0 |4 DM9334 13| D */ A.D, + A.Q1, /* Q1 |5 12| Q7 */ A.Q7, + A.Q2, /* Q2 |6 11| Q6 */ A.Q6, + A.Q3, /* Q3 |7 10| Q5 */ A.Q5, + A.GND,/* GND |8 9| Q4 */ A.Q4 + /* +--------------+ */ ) NETLIST_END() @@ -2940,7 +3065,41 @@ static NETLIST_START(TTL_9602_DIP) A.Q, /* Q1 |6 11| A2 */ B.A, A.QQ, /* QQ1 |7 10| Q2 */ B.Q, A.GND, /* GND |8 9| QQ2 */ B.QQ - /* +--------------+ */ + /* +--------------+ */ + ) +NETLIST_END() + +// FIXME: Documentation and naming +static NETLIST_START(TTL_8277_DIP) + TTL_8277(A) + + DIPPINS( /* +--------------+ */ + A.RESET, /* RESET |1 ++ 16| VCC */ A.VCC, + A.Q7QA, /* /Q7A |2 15| /Q7B */ A.Q7QB, + A.Q7A, /* Q7A |3 14| Q7B */ A.Q7B, + A.DSA, /* DSA |4 8277 13| DSB */ A.DSB, + A.D1A, /* D1A |5 12| D1B */ A.D1B, + A.D0A, /* D0A |6 11| D0B */ A.D0B, + A.CLKA, /* CLKA |7 10| CLKB */ A.CLKB, + A.GND, /* GND |8 9| CLK */ A.CLK + /* +--------------+ */ + ) +NETLIST_END() + +// FIXME: Documentation, add model, seems to be a CMOS device +static NETLIST_START(TTL_AM2847_DIP) + TTL_AM2847(A) + + DIPPINS( /* +--------------+ */ + A.OUTA, /* OUTA |1 ++ 16| VSS */ A.VSS, + A.RCA, /* RCA |2 15| IND */ A.IND, + A.INA, /* INA |3 14| RCD */ A.RCD, + A.OUTB, /* OUTB |4 Am2847 13| OUTD */ A.OUTD, + A.RCB, /* RCB |5 12| VGG */ A.VGG, + A.INB, /* INB |6 11| CP */ A.CP, + A.OUTC, /* OUTC |7 10| INC */ A.INC, + A.VDD, /* VDD |8 9| RCC */ A.RCC + /* +--------------+ */ ) NETLIST_END() @@ -2952,14 +3111,6 @@ NETLIST_START(ttl74xx_lib) //NET_MODEL("DM7414 FAMILY(IVL=0.16 IVH=0.4 OVL=0.1 OVH=0.05 ORL=10.0 ORH=1.0e8)") - TRUTHTABLE_START(TTL_7400_GATE, 2, 1, "") - TT_HEAD("A,B|Q ") - TT_LINE("0,X|1|22") - TT_LINE("X,0|1|22") - TT_LINE("1,1|0|15") - TT_FAMILY("74XX") - TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7400_NAND, 2, 1, "+A,+B,@VCC,@GND") TT_HEAD("A,B|Q ") TT_LINE("0,X|1|22") @@ -2968,14 +3119,6 @@ NETLIST_START(ttl74xx_lib) TT_FAMILY("74XX") TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7402_GATE, 2, 1, "") - TT_HEAD("A,B|Q ") - TT_LINE("0,0|1|22") - TT_LINE("X,1|0|15") - TT_LINE("1,X|0|15") - TT_FAMILY("74XX") - TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7402_NOR, 2, 1, "+A,+B,@VCC,@GND") TT_HEAD("A,B|Q ") TT_LINE("0,0|1|22") @@ -2984,13 +3127,6 @@ NETLIST_START(ttl74xx_lib) TT_FAMILY("74XX") TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7404_GATE, 1, 1, "") - TT_HEAD(" A | Q ") - TT_LINE(" 0 | 1 |22") - TT_LINE(" 1 | 0 |15") - TT_FAMILY("74XX") - TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7404_INVERT, 1, 1, "+A,@VCC,@GND") TT_HEAD(" A | Q ") TT_LINE(" 0 | 1 |22") @@ -3074,16 +3210,6 @@ NETLIST_START(ttl74xx_lib) TT_FAMILY("74XXOC") TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7420_GATE, 4, 1, "") - TT_HEAD("A,B,C,D|Q ") - TT_LINE("0,X,X,X|1|22") - TT_LINE("X,0,X,X|1|22") - TT_LINE("X,X,0,X|1|22") - TT_LINE("X,X,X,0|1|22") - TT_LINE("1,1,1,1|0|15") - TT_FAMILY("74XX") - TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7420_NAND, 4, 1, "+A,+B,+C,+D,@VCC,@GND") TT_HEAD("A,B,C,D|Q ") TT_LINE("0,X,X,X|1|22") @@ -3094,16 +3220,6 @@ NETLIST_START(ttl74xx_lib) TT_FAMILY("74XX") TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7421_GATE, 4, 1, "") - TT_HEAD("A,B,C,D|Q ") - TT_LINE("0,X,X,X|0|22") - TT_LINE("X,0,X,X|0|22") - TT_LINE("X,X,0,X|0|22") - TT_LINE("X,X,X,0|0|22") - TT_LINE("1,1,1,1|1|15") - TT_FAMILY("74XX") - TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7421_AND, 4, 1, "+A,+B,+C,+D,@VCC,@GND") TT_HEAD("A,B,C,D|Q ") TT_LINE("0,X,X,X|0|22") @@ -3114,16 +3230,6 @@ NETLIST_START(ttl74xx_lib) TT_FAMILY("74XX") TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7425_GATE, 4, 1, "") - TT_HEAD("A,B,C,D|Q ") - TT_LINE("1,X,X,X|0|15") - TT_LINE("X,1,X,X|0|15") - TT_LINE("X,X,1,X|0|15") - TT_LINE("X,X,X,1|0|15") - TT_LINE("0,0,0,0|1|22") - TT_FAMILY("74XX") - TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7425_NOR, 4, 1, "+A,+B,+C,+D,@VCC,@GND") TT_HEAD("A,B,C,D|Q ") TT_LINE("1,X,X,X|0|15") @@ -3134,15 +3240,6 @@ NETLIST_START(ttl74xx_lib) TT_FAMILY("74XX") TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7427_GATE, 3, 1, "") - TT_HEAD("A,B,C|Q ") - TT_LINE("1,X,X|0|15") - TT_LINE("X,1,X|0|15") - TT_LINE("X,X,1|0|15") - TT_LINE("0,0,0|1|22") - TT_FAMILY("74XX") - TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7427_NOR, 3, 1, "+A,+B,+C,@VCC,@GND") TT_HEAD("A,B,C|Q ") TT_LINE("1,X,X|0|15") @@ -3152,20 +3249,6 @@ NETLIST_START(ttl74xx_lib) TT_FAMILY("74XX") TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7430_GATE, 8, 1, "") - TT_HEAD("A,B,C,D,E,F,G,H|Q ") - TT_LINE("0,X,X,X,X,X,X,X|1|22") - TT_LINE("X,0,X,X,X,X,X,X|1|22") - TT_LINE("X,X,0,X,X,X,X,X|1|22") - TT_LINE("X,X,X,0,X,X,X,X|1|22") - TT_LINE("X,X,X,X,0,X,X,X|1|22") - TT_LINE("X,X,X,X,X,0,X,X|1|22") - TT_LINE("X,X,X,X,X,X,0,X|1|22") - TT_LINE("X,X,X,X,X,X,X,0|1|22") - TT_LINE("1,1,1,1,1,1,1,1|0|15") - TT_FAMILY("74XX") - TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7430_NAND, 8, 1, "+A,+B,+C,+D,+E,+F,+G,+H,@VCC,@GND") TT_HEAD("A,B,C,D,E,F,G,H|Q ") TT_LINE("0,X,X,X,X,X,X,X|1|22") @@ -3180,14 +3263,6 @@ NETLIST_START(ttl74xx_lib) TT_FAMILY("74XX") TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7432_GATE, 2, 1, "") - TT_HEAD("A,B|Q ") - TT_LINE("1,X|1|22") - TT_LINE("X,1|1|22") - TT_LINE("0,0|0|15") - TT_FAMILY("74XX") - TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7432_OR, 2, 1, "+A,+B,@VCC,@GND") TT_HEAD("A,B|Q ") TT_LINE("1,X|1|22") @@ -3196,18 +3271,6 @@ NETLIST_START(ttl74xx_lib) TT_FAMILY("74XX") TRUTHTABLE_END() - /* FIXME: Same as 7400, but drains higher output currents. - * Netlist currently does not model over currents (should it ever?) - */ - - TRUTHTABLE_START(TTL_7437_GATE, 2, 1, "") - TT_HEAD("A,B|Q ") - TT_LINE("0,X|1|22") - TT_LINE("X,0|1|22") - TT_LINE("1,1|0|15") - TT_FAMILY("74XX") - TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7442, 4, 10, "") TT_HEAD("D,C,B,A|0,1,2,3,4,5,6,7,8,9") TT_LINE("0,0,0,0|0,1,1,1,1,1,1,1,1,1|30,30,30,30,30,30,30,30,30,30") @@ -3224,6 +3287,10 @@ NETLIST_START(ttl74xx_lib) TT_LINE("1,1,X,X|1,1,1,1,1,1,1,1,1,1|30,30,30,30,30,30,30,30,30,30") TRUTHTABLE_END() + /* FIXME: Same as 7400, but drains higher output currents. + * Netlist currently does not model over currents (should it ever?) + */ + TRUTHTABLE_START(TTL_7437_NAND, 2, 1, "+A,+B") TT_HEAD("A,B|Q ") TT_LINE("0,X|1|22") @@ -3232,15 +3299,6 @@ NETLIST_START(ttl74xx_lib) TT_FAMILY("74XX") TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7486_GATE, 2, 1, "") - TT_HEAD("A,B|Q ") - TT_LINE("0,0|0|15") - TT_LINE("0,1|1|22") - TT_LINE("1,0|1|22") - TT_LINE("1,1|0|15") - TT_FAMILY("74XX") - TRUTHTABLE_END() - TRUTHTABLE_START(TTL_7486_XOR, 2, 1, "+A,+B,@VCC,@GND") TT_HEAD("A,B|Q ") TT_LINE("0,0|0|15") @@ -3315,17 +3373,6 @@ NETLIST_START(ttl74xx_lib) TT_FAMILY("74XX") TRUTHTABLE_END() - TRUTHTABLE_START(TTL_74260_GATE, 5, 1, "") - TT_HEAD("A,B,C,D,E|Q ") - TT_LINE("0,0,0,0,0|1|10") - TT_LINE("X,X,X,X,1|0|12") - TT_LINE("X,X,X,1,X|0|12") - TT_LINE("X,X,1,X,X|0|12") - TT_LINE("X,1,X,X,X|0|12") - TT_LINE("1,X,X,X,X|0|12") - TT_FAMILY("74XX") - TRUTHTABLE_END() - TRUTHTABLE_START(TTL_74260_NOR, 5, 1, "+A,+B,+C,+D,+E,@VCC,@GND") TT_HEAD("A,B,C,D,E|Q") TT_LINE("0,0,0,0,0|1|10") @@ -3434,16 +3481,25 @@ NETLIST_START(ttl74xx_lib) LOCAL_LIB_ENTRY(TTL_74165_DIP) LOCAL_LIB_ENTRY(TTL_74166_DIP) LOCAL_LIB_ENTRY(TTL_74174_DIP) + LOCAL_LIB_ENTRY(TTL_74175_DIP) + LOCAL_LIB_ENTRY(TTL_74192_DIP) + LOCAL_LIB_ENTRY(TTL_74193_DIP) + LOCAL_LIB_ENTRY(TTL_74194_DIP) LOCAL_LIB_ENTRY(TTL_74260_DIP) LOCAL_LIB_ENTRY(TTL_74279_DIP) + LOCAL_LIB_ENTRY(TTL_74365_DIP) LOCAL_LIB_ENTRY(TTL_74377_DIP) LOCAL_LIB_ENTRY(TTL_74378_DIP) LOCAL_LIB_ENTRY(TTL_74379_DIP) LOCAL_LIB_ENTRY(TTL_74393_DIP) LOCAL_LIB_ENTRY(SN74LS629_DIP) - LOCAL_LIB_ENTRY(TTL_9312_DIP) LOCAL_LIB_ENTRY(TTL_9310_DIP) + LOCAL_LIB_ENTRY(TTL_9312_DIP) + LOCAL_LIB_ENTRY(TTL_9314_DIP) LOCAL_LIB_ENTRY(TTL_9316_DIP) LOCAL_LIB_ENTRY(TTL_9321_DIP) LOCAL_LIB_ENTRY(TTL_9322_DIP) + LOCAL_LIB_ENTRY(TTL_9334_DIP) + LOCAL_LIB_ENTRY(TTL_8277_DIP) + LOCAL_LIB_ENTRY(TTL_AM2847_DIP) NETLIST_END() diff --git a/src/lib/netlist/macro/nlm_ttl74xx_lib.h b/src/lib/netlist/macro/nlm_ttl74xx_lib.h index ce91782b5e6..2bc6e355638 100644 --- a/src/lib/netlist/macro/nlm_ttl74xx_lib.h +++ b/src/lib/netlist/macro/nlm_ttl74xx_lib.h @@ -18,41 +18,21 @@ #if !NL_AUTO_DEVICES -#define TTL_7400_GATE(name) \ - NET_REGISTER_DEV(TTL_7400_GATE, name) - -#define TTL_7400_NAND(name, cA, cB) \ - NET_REGISTER_DEV(TTL_7400_NAND, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cA) \ - NET_CONNECT(name, B, cB) +#define TTL_7400_NAND(...) \ + NET_REGISTER_DEVEXT(TTL_7400_NAND, __VA_ARGS__) #define TTL_7400_DIP(name) \ NET_REGISTER_DEV(TTL_7400_DIP, name) -#define TTL_7402_GATE(name) \ - NET_REGISTER_DEV(TTL_7402_GATE, name) - -#define TTL_7402_NOR(name, cI1, cI2) \ - NET_REGISTER_DEV(TTL_7402_NOR, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cI1) \ - NET_CONNECT(name, B, cI2) +#define TTL_7402_NOR(...) \ + NET_REGISTER_DEVEXT(TTL_7402_NOR, __VA_ARGS__) #define TTL_7402_DIP(name) \ NET_REGISTER_DEV(TTL_7402_DIP, name) -#define TTL_7404_GATE(name) \ - NET_REGISTER_DEV(TTL_7404_GATE, name) - -#define TTL_7404_INVERT(name, cA) \ - NET_REGISTER_DEV(TTL_7404_INVERT, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cA) +#define TTL_7404_INVERT(...) \ + NET_REGISTER_DEVEXT(TTL_7404_INVERT, __VA_ARGS__) #define TTL_7404_DIP(name) \ NET_REGISTER_DEV(TTL_7404_DIP, name) @@ -72,48 +52,27 @@ NET_REGISTER_DEV(TTL_7407_DIP, name) -#define TTL_7408_GATE(name) \ - NET_REGISTER_DEV(TTL_7408_GATE, name) - -#define TTL_7408_AND(name, cA, cB) \ - NET_REGISTER_DEV(TTL_7408_AND, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cA) \ - NET_CONNECT(name, B, cB) +#define TTL_7408_AND(...) \ + NET_REGISTER_DEVEXT(TTL_7408_AND, __VA_ARGS__) #define TTL_7408_DIP(name) \ NET_REGISTER_DEV(TTL_7408_DIP, name) -#define TTL_7410_GATE(name) \ - NET_REGISTER_DEV(TTL_7410_GATE, name) -#define TTL_7410_NAND(name, cI1, cI2, cI3) \ - NET_REGISTER_DEV(TTL_7410_NAND, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cI1) \ - NET_CONNECT(name, B, cI2) \ - NET_CONNECT(name, C, cI3) +#define TTL_7410_NAND(...) \ + NET_REGISTER_DEVEXT(TTL_7410_NAND, __VA_ARGS__) #define TTL_7410_DIP(name) \ NET_REGISTER_DEV(TTL_7410_DIP, name) -#define TTL_7411_GATE(name) \ - NET_REGISTER_DEV(TTL_7411_GATE, name) - -#define TTL_7411_AND(name, cI1, cI2, cI3) \ - NET_REGISTER_DEV(TTL_7411_AND, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cI1) \ - NET_CONNECT(name, B, cI2) \ - NET_CONNECT(name, C, cI3) +#define TTL_7411_AND(...) \ + NET_REGISTER_DEVEXT(TTL_7411_AND, __VA_ARGS__) #define TTL_7411_DIP(name) \ NET_REGISTER_DEV(TTL_7411_DIP, name) + #define TTL_7414_GATE(name) \ NET_REGISTER_DEV(TTL_7414_GATE, name) @@ -135,111 +94,50 @@ NET_REGISTER_DEV(TTL_7416_DIP, name) -#define TTL_7420_GATE(name) \ - NET_REGISTER_DEV(TTL_7420_GATE, name) - -#define TTL_7420_NAND(name, cI1, cI2, cI3, cI4) \ - NET_REGISTER_DEV(TTL_7420_NAND, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cI1) \ - NET_CONNECT(name, B, cI2) \ - NET_CONNECT(name, C, cI3) \ - NET_CONNECT(name, D, cI4) +#define TTL_7420_NAND(...) \ + NET_REGISTER_DEVEXT(TTL_7420_NAND, __VA_ARGS__) #define TTL_7420_DIP(name) \ NET_REGISTER_DEV(TTL_7420_DIP, name) -#define TTL_7421_GATE(name) \ - NET_REGISTER_DEV(TTL_7421_GATE, name) - -#define TTL_7421_AND(name, cI1, cI2, cI3, cI4) \ - NET_REGISTER_DEV(TTL_7421_AND, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cI1) \ - NET_CONNECT(name, B, cI2) \ - NET_CONNECT(name, C, cI3) \ - NET_CONNECT(name, D, cI4) +#define TTL_7421_AND(...) \ + NET_REGISTER_DEVEXT(TTL_7421_AND, __VA_ARGS__) #define TTL_7421_DIP(name) \ NET_REGISTER_DEV(TTL_7421_DIP, name) -#define TTL_7425_GATE(name) \ - NET_REGISTER_DEV(TTL_7425_GATE, name) - -#define TTL_7425_NOR(name, cI1, cI2, cI3, cI4) \ - NET_REGISTER_DEV(TTL_7425_NOR, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cI1) \ - NET_CONNECT(name, B, cI2) \ - NET_CONNECT(name, C, cI3) \ - NET_CONNECT(name, D, cI4) +#define TTL_7425_NOR(...) \ + NET_REGISTER_DEVEXT(TTL_7425_NOR, __VA_ARGS__) #define TTL_7425_DIP(name) \ NET_REGISTER_DEV(TTL_7425_DIP, name) -#define TTL_7427_GATE(name) \ - NET_REGISTER_DEV(TTL_7427_GATE, name) - -#define TTL_7427_NOR(name, cI1, cI2, cI3) \ - NET_REGISTER_DEV(TTL_7427_NOR, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cI1) \ - NET_CONNECT(name, B, cI2) \ - NET_CONNECT(name, C, cI3) +#define TTL_7427_NOR(...) \ + NET_REGISTER_DEVEXT(TTL_7427_NOR, __VA_ARGS__) #define TTL_7427_DIP(name) \ NET_REGISTER_DEV(TTL_7427_DIP, name) -#define TTL_7430_GATE(name) \ - NET_REGISTER_DEV(TTL_7430_GATE, name) - -#define TTL_7430_NAND(name, cI1, cI2, cI3, cI4, cI5, cI6, cI7, cI8)\ - NET_REGISTER_DEV(TTL_7430_NAND, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cI1) \ - NET_CONNECT(name, B, cI2) \ - NET_CONNECT(name, C, cI3) \ - NET_CONNECT(name, D, cI4) \ - NET_CONNECT(name, E, cI5) \ - NET_CONNECT(name, F, cI6) \ - NET_CONNECT(name, G, cI7) \ - NET_CONNECT(name, H, cI8) +#define TTL_7430_NAND(...) \ + NET_REGISTER_DEVEXT(TTL_7430_NAND, __VA_ARGS__) #define TTL_7430_DIP(name) \ NET_REGISTER_DEV(TTL_7430_DIP, name) -#define TTL_7432_GATE(name) \ - NET_REGISTER_DEV(TTL_7432_OR, name) - -#define TTL_7432_OR(name, cI1, cI2) \ - NET_REGISTER_DEV(TTL_7432_OR, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cI1) \ - NET_CONNECT(name, B, cI2) +#define TTL_7432_OR(...) \ + NET_REGISTER_DEVEXT(TTL_7432_OR, __VA_ARGS__) #define TTL_7432_DIP(name) \ NET_REGISTER_DEV(TTL_7432_DIP, name) -#define TTL_7437_GATE(name) \ - NET_REGISTER_DEV(TTL_7437_GATE, name) -#define TTL_7437_NAND(name, cA, cB) \ - NET_REGISTER_DEV(TTL_7437_NAND, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cA) \ - NET_CONNECT(name, B, cB) +#define TTL_7437_NAND(...) \ + NET_REGISTER_DEVEXT(TTL_7437_NAND, __VA_ARGS__) #define TTL_7437_DIP(name) \ NET_REGISTER_DEV(TTL_7437_DIP, name) @@ -275,15 +173,8 @@ #define TTL_7485_DIP(name) \ NET_REGISTER_DEV(TTL_7485_DIP, name) -#define TTL_7486_GATE(name) \ - NET_REGISTER_DEV(TTL_7486_GATE, name) - -#define TTL_7486_XOR(name, cA, cB) \ - NET_REGISTER_DEV(TTL_7486_XOR, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cA) \ - NET_CONNECT(name, B, cB) +#define TTL_7486_XOR(...) \ + NET_REGISTER_DEVEXT(TTL_7486_XOR, __VA_ARGS__) #define TTL_7486_DIP(name) \ NET_REGISTER_DEV(TTL_7486_DIP, name) @@ -357,18 +248,20 @@ #define TTL_74174_DIP(name) \ NET_REGISTER_DEV(TTL_74174_DIP, name) -#define TTL_74260_GATE(name) \ - NET_REGISTER_DEV(TTL_74260_GATE, name) +#define TTL_74175_DIP(name) \ + NET_REGISTER_DEV(TTL_74175_DIP, name) + +#define TTL_74192_DIP(name) \ + NET_REGISTER_DEV(TTL_74192_DIP, name) + +#define TTL_74193_DIP(name) \ + NET_REGISTER_DEV(TTL_74193_DIP, name) + +#define TTL_74194_DIP(name) \ + NET_REGISTER_DEV(TTL_74194_DIP, name) -#define TTL_74260_NOR(name, cA, cB, cC, cD, cE) \ - NET_REGISTER_DEV(TTL_74260_NOR, name) \ - NET_CONNECT(name, VCC, VCC) \ - NET_CONNECT(name, GND, GND) \ - NET_CONNECT(name, A, cA) \ - NET_CONNECT(name, B, cB) \ - NET_CONNECT(name, C, cC) \ - NET_CONNECT(name, D, cD) \ - NET_CONNECT(name, E, cE) +#define TTL_74260_NOR(...) \ + NET_REGISTER_DEVEXT(TTL_74260_NOR, __VA_ARGS__) #define TTL_74260_DIP(name) \ NET_REGISTER_DEV(TTL_74260_DIP, name) @@ -376,6 +269,9 @@ #define TTL_74279_DIP(name) \ NET_REGISTER_DEV(TTL_74279_DIP, name) +#define TTL_74365_DIP(name) \ + NET_REGISTER_DEV(TTL_74365_DIP, name) + #define TTL_74377_DIP(name) \ NET_REGISTER_DEV(TTL_74377_DIP, name) @@ -394,6 +290,9 @@ #define TTL_9312_DIP(name) \ NET_REGISTER_DEV(TTL_9312_DIP, name) +#define TTL_9314_DIP(name) \ + NET_REGISTER_DEV(TTL_9314_DIP, name) + #define TTL_9310_DIP(name) \ NET_REGISTER_DEV(TTL_9310_DIP, name) @@ -406,6 +305,15 @@ #define TTL_9322_DIP(name) \ NET_REGISTER_DEV(TTL_9322_DIP, name) +#define TTL_9334_DIP(name) \ + NET_REGISTER_DEV(TTL_9334_DIP, name) + +#define TTL_8277_DIP(name) \ + NET_REGISTER_DEV(TTL_8277_DIP, name) + +#define TTL_AM2847_DIP(name) \ + NET_REGISTER_DEV(TTL_AM2847_DIP, name) + #endif // NL_AUTO_DEVICES /* ---------------------------------------------------------------------------- diff --git a/src/lib/netlist/nl_base.cpp b/src/lib/netlist/nl_base.cpp index 9cb12d06668..f4aaaa930cc 100644 --- a/src/lib/netlist/nl_base.cpp +++ b/src/lib/netlist/nl_base.cpp @@ -332,9 +332,10 @@ namespace netlist std::vector<const nldelegate *> t; log().verbose("Using default startup strategy"); for (auto &n : m_nets) + { + n->update_inputs(); // only used if USE_COPY_INSTEAD_OF_REFERENCE == 1 for (auto & term : n->core_terms()) { - n->update_inputs(); // only used if USE_COPY_INSTEAD_OF_REFERENCE == 1 if (!plib::container::contains(t, &term->delegate())) { t.push_back(&term->delegate()); @@ -345,6 +346,7 @@ namespace netlist if (!plib::container::contains(devices_called, dev)) devices_called.push_back(dev); } + } log().verbose("Devices not yet updated:"); for (auto &dev : m_devices) if (!plib::container::contains(devices_called, dev.second.get())) @@ -747,8 +749,6 @@ namespace netlist nldelegate delegate) : logic_t(dev, aname, STATE_INP_ACTIVE, delegate) { - if (!delegate.is_set()) - throw nl_exception("delegate not set for {1}", this->name()); state().setup().register_term(*this); } diff --git a/src/lib/netlist/nl_interface.h b/src/lib/netlist/nl_interface.h index 4b8b7cbcbfb..be90e96020c 100644 --- a/src/lib/netlist/nl_interface.h +++ b/src/lib/netlist/nl_interface.h @@ -143,7 +143,7 @@ namespace netlist , m_param(nullptr) , m_id(*this, "ID", 0) { - connect(m_feedback, m_Q); + connect("FB", "Q"); m_buffer = nullptr; } diff --git a/src/lib/netlist/nl_setup.cpp b/src/lib/netlist/nl_setup.cpp index 70860747f93..06ad0619cc7 100644 --- a/src/lib/netlist/nl_setup.cpp +++ b/src/lib/netlist/nl_setup.cpp @@ -1688,12 +1688,15 @@ void setup_t::prepare_to_run() } for (auto &n : m_nlstate.nets()) + { for (auto & term : n->core_terms()) - if (!term->delegate().is_set()) + if (!term->delegate()) { log().fatal(MF_DELEGATE_NOT_SET_1(term->name())); throw nl_exception(MF_DELEGATE_NOT_SET_1(term->name())); } + n->rebuild_list(); + } } // ---------------------------------------------------------------------------------------- diff --git a/src/lib/netlist/nltypes.h b/src/lib/netlist/nltypes.h index 1dcb1f943c9..70fbad6bb17 100644 --- a/src/lib/netlist/nltypes.h +++ b/src/lib/netlist/nltypes.h @@ -265,7 +265,7 @@ namespace netlist { static constexpr netlist_time value(std::size_t N) { - return NLTIME_FROM_NS(N == 0 ? value0 : value1); + return N == 0 ? NLTIME_FROM_NS(value0) : NLTIME_FROM_NS(value1); } }; @@ -278,9 +278,9 @@ namespace netlist { static constexpr netlist_time value(std::size_t N) { - return NLTIME_FROM_NS(N == 0 ? value0 : - N == 1 ? value1 : - value2); + return N == 0 ? NLTIME_FROM_NS(value0) : + N == 1 ? NLTIME_FROM_NS(value1) : + NLTIME_FROM_NS(value2); } }; diff --git a/src/lib/netlist/plib/ppmf.h b/src/lib/netlist/plib/ppmf.h index 13d627dd2a1..e86c94ff4c9 100644 --- a/src/lib/netlist/plib/ppmf.h +++ b/src/lib/netlist/plib/ppmf.h @@ -368,8 +368,6 @@ namespace plib { bind<const_specific_member_function<O>>(object, &mftp); } - bool is_set() const noexcept { return m_resolved != nullptr; } - generic_class *object() const noexcept { return m_obj; } bool has_object() const noexcept { return m_obj != nullptr; } @@ -384,6 +382,7 @@ namespace plib { return this->call(std::forward<Targs>(args)...); } + operator bool() const noexcept { return m_resolved != nullptr; } private: template<typename SPC, typename O, typename MF> void bind(O * object, MF *fraw) diff --git a/src/lib/netlist/plib/ppreprocessor.cpp b/src/lib/netlist/plib/ppreprocessor.cpp index ccf03c97bc7..9daf9fa9836 100644 --- a/src/lib/netlist/plib/ppreprocessor.cpp +++ b/src/lib/netlist/plib/ppreprocessor.cpp @@ -519,7 +519,7 @@ namespace plib { error("#elif without #if"); //if ((m_if_flag & (1 << m_if_level)) == 0) - // m_if_flag ^= (1 << m_if_level); + // m_if_flag ^= (1 << m_if_level); if (m_elif & (1 << m_if_level)) // elif disabled m_if_flag |= (1 << m_if_level); else diff --git a/src/lib/netlist/prg/nltool.cpp b/src/lib/netlist/prg/nltool.cpp index f8bedd1b993..ef6c54ad34e 100644 --- a/src/lib/netlist/prg/nltool.cpp +++ b/src/lib/netlist/prg/nltool.cpp @@ -1055,13 +1055,25 @@ void tool_app_t::create_docheader() auto & pins = d.pinalias; //const int w = 8; poutprefix("///", " {1:10} +--------+", " "); - for (std::size_t i=0; i<pins.size()/2; i++) + for (std::size_t i=0; i < pins.size() / 2; i++) { poutprefix("///", " {1:10} |{2:-2} {3:2}| {4:-10}", pins[i], i+1, pins.size()-i, pins[pins.size()-i-1]); } poutprefix("///", " {1:10} +--------+", " "); } + else if (d.package == "SIL") + { + auto & pins = d.pinalias; + //const int w = 8; + poutprefix("///", " {1:10} +--------+", " "); + for (std::size_t i=0; i < pins.size(); i++) + { + poutprefix("///", " {1:10} |{2:-2} |", + pins[i], i+1); + } + poutprefix("///", " {1:10} +--------+", " "); + } poutprefix("///", " </pre>"); } poutprefix("///", ""); diff --git a/src/lib/netlist/solver/nld_solver.h b/src/lib/netlist/solver/nld_solver.h index f742132b862..8014830e4a0 100644 --- a/src/lib/netlist/solver/nld_solver.h +++ b/src/lib/netlist/solver/nld_solver.h @@ -41,7 +41,7 @@ namespace devices // internal stuff state().save(*this, static_cast<plib::state_manager_t::callback_t &>(m_queue), this->name(), "m_queue"); - connect(m_fb_step, m_Q_step); + connect("FB_step", "Q_step"); } void post_start(); diff --git a/src/mame/audio/mw8080bw.cpp b/src/mame/audio/mw8080bw.cpp index dbba34bfb95..55f8faedddf 100644 --- a/src/mame/audio/mw8080bw.cpp +++ b/src/mame/audio/mw8080bw.cpp @@ -3737,24 +3737,24 @@ void zzzap_common_audio_device::device_add_mconfig(machine_config &config) .add_route(ALL_OUTPUTS, "mono", 1.0); NETLIST_LOGIC_INPUT(config, "sound_nl:pedal_bit0", - "I_PEDAL_BIT0", 0); + "I_PEDAL_BIT0", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:pedal_bit1", - "I_PEDAL_BIT1", 0); + "I_PEDAL_BIT1", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:pedal_bit2", - "I_PEDAL_BIT2", 0); + "I_PEDAL_BIT2", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:pedal_bit3", - "I_PEDAL_BIT3", 0); + "I_PEDAL_BIT3", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:hi_shift", - "I_HI_SHIFT", 0); + "I_HI_SHIFT", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:lo_shift", - "I_LO_SHIFT", 0); + "I_LO_SHIFT", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:boom", "I_BOOM", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:engine_sound_off", - "I_ENGINE_SOUND_OFF", 0); + "I_ENGINE_SOUND_OFF", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:noise_cr_1", - "I_NOISE_CR_1", 0); + "I_NOISE_CR_1", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:noise_cr_2", - "I_NOISE_CR_2", 0); + "I_NOISE_CR_2", 0); // The audio output is taken from an LM3900 op-amp whose // output has a peak-to-peak range of about 5 volts, centered @@ -3786,13 +3786,13 @@ void zzzap_common_audio_device::device_start() zzzap_audio_device::zzzap_audio_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) : - zzzap_common_audio_device(mconfig, ZZZAP_AUDIO, tag, owner, clock, NETLIST_NAME(280zzzap)) + zzzap_common_audio_device(mconfig, ZZZAP_AUDIO, tag, owner, clock, NETLIST_NAME(280zzzap)) { } lagunar_audio_device::lagunar_audio_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) : - zzzap_common_audio_device(mconfig, LAGUNAR_AUDIO, tag, owner, clock, NETLIST_NAME(lagunar)) + zzzap_common_audio_device(mconfig, LAGUNAR_AUDIO, tag, owner, clock, NETLIST_NAME(lagunar)) { } diff --git a/src/mame/audio/nl_astrob.cpp b/src/mame/audio/nl_astrob.cpp index 90d3d6c98ed..2d5a5894c52 100644 --- a/src/mame/audio/nl_astrob.cpp +++ b/src/mame/audio/nl_astrob.cpp @@ -74,9 +74,9 @@ NETLIST_START(astrob) PARAM(Solver.DYNAMIC_TS, 1) PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 4e-5) #if (SIMPLIFY_SONAR) - PARAM(Solver.Solver_54.DYNAMIC_MIN_TIMESTEP, 7e-6) // gets rid of NR loops failure + PARAM(Solver.Solver_54.DYNAMIC_MIN_TIMESTEP, 7e-6) // gets rid of NR loops failure #else - PARAM(Solver.Solver_40.DYNAMIC_MIN_TIMESTEP, 7e-6) // gets rid of NR loops failure + PARAM(Solver.Solver_40.DYNAMIC_MIN_TIMESTEP, 7e-6) // gets rid of NR loops failure #endif #else SOLVER(Solver, 48000) @@ -171,7 +171,7 @@ NETLIST_START(astrob) RES(R16, RES_K(10)) RES(R17, RES_K(10)) RES(R18, RES_M(2.7)) -// RES(R19, RES_K(1)) +// RES(R19, RES_K(1)) RES(R20, RES_M(1)) RES(R21, RES_K(100)) RES(R22, RES_K(470)) @@ -188,11 +188,11 @@ NETLIST_START(astrob) RES(R33, RES_K(39)) RES(R34, RES_K(4.7)) RES(R35, RES_K(4.7)) - RES(R36, RES_K(100.1)) // part of SONAR circuit that relies on subtle part differences - RES(R37, RES_K(1.51)) // part of SONAR circuit that relies on subtle part differences - RES(R38, RES_K(330.1)) // part of SONAR circuit that relies on subtle part differences - RES(R39, RES_K(10.1)) // part of SONAR circuit that relies on subtle part differences - RES(R40, RES_K(68.1)) // part of SONAR circuit that relies on subtle part differences + RES(R36, RES_K(100.1)) // part of SONAR circuit that relies on subtle part differences + RES(R37, RES_K(1.51)) // part of SONAR circuit that relies on subtle part differences + RES(R38, RES_K(330.1)) // part of SONAR circuit that relies on subtle part differences + RES(R39, RES_K(10.1)) // part of SONAR circuit that relies on subtle part differences + RES(R40, RES_K(68.1)) // part of SONAR circuit that relies on subtle part differences RES(R41, RES_K(10)) RES(R42, RES_K(100)) RES(R43, RES_K(470)) @@ -214,11 +214,11 @@ NETLIST_START(astrob) RES(R59, RES_K(100)) RES(R60, RES_K(10)) RES(R61, RES_K(100)) - RES(R62, RES_K(99.9)) // part of SONAR circuit that relies on subtle part differences - RES(R63, RES_K(1.49)) // part of SONAR circuit that relies on subtle part differences - RES(R64, RES_K(329.9)) // part of SONAR circuit that relies on subtle part differences - RES(R65, RES_K(9.9)) // part of SONAR circuit that relies on subtle part differences - RES(R66, RES_K(67.9)) // part of SONAR circuit that relies on subtle part differences + RES(R62, RES_K(99.9)) // part of SONAR circuit that relies on subtle part differences + RES(R63, RES_K(1.49)) // part of SONAR circuit that relies on subtle part differences + RES(R64, RES_K(329.9)) // part of SONAR circuit that relies on subtle part differences + RES(R65, RES_K(9.9)) // part of SONAR circuit that relies on subtle part differences + RES(R66, RES_K(67.9)) // part of SONAR circuit that relies on subtle part differences RES(R67, RES_K(10)) RES(R68, RES_K(82)) RES(R69, RES_K(470)) @@ -243,11 +243,11 @@ NETLIST_START(astrob) RES(R88, RES_K(100)) RES(R89, RES_K(10)) RES(R90, RES_K(100)) - RES(R91, RES_K(100.2)) // part of SONAR circuit that relies on subtle part differences - RES(R92, RES_K(1.52)) // part of SONAR circuit that relies on subtle part differences - RES(R93, RES_K(330.2)) // part of SONAR circuit that relies on subtle part differences - RES(R94, RES_K(10.2)) // part of SONAR circuit that relies on subtle part differences - RES(R95, RES_K(68.2)) // part of SONAR circuit that relies on subtle part differences + RES(R91, RES_K(100.2)) // part of SONAR circuit that relies on subtle part differences + RES(R92, RES_K(1.52)) // part of SONAR circuit that relies on subtle part differences + RES(R93, RES_K(330.2)) // part of SONAR circuit that relies on subtle part differences + RES(R94, RES_K(10.2)) // part of SONAR circuit that relies on subtle part differences + RES(R95, RES_K(68.2)) // part of SONAR circuit that relies on subtle part differences RES(R96, RES_K(10)) RES(R97, RES_K(4.7)) RES(R98, RES_M(1)) @@ -267,16 +267,16 @@ NETLIST_START(astrob) RES(R112, RES_K(10)) RES(R113, RES_K(10)) RES(R114, 100) -// RES(R115, RES_K(100)) -- part of final amp (not emulated) -// RES(R116, RES_K(470)) -- part of final amp (not emulated) +// RES(R115, RES_K(100)) -- part of final amp (not emulated) +// RES(R116, RES_K(470)) -- part of final amp (not emulated) RES(R117, RES_K(1)) RES(R118, RES_K(470)) RES(R119, RES_K(470)) RES(R120, RES_K(220)) RES(R121, RES_K(10)) RES(R122, RES_K(4.7)) -// RES(R123, RES_K(1)) -- part of final amp (not emulated) -// RES(R124, RES_K(100)) -- part of final amp (not emulated) +// RES(R123, RES_K(1)) -- part of final amp (not emulated) +// RES(R124, RES_K(100)) -- part of final amp (not emulated) RES(R125, RES_K(82)) RES(R126, RES_K(39)) RES(R127, RES_K(10)) @@ -287,16 +287,16 @@ NETLIST_START(astrob) RES(R132, RES_K(82)) RES(R133, RES_K(100)) RES(R134, RES_M(2.7)) -// RES(R135, RES_K(22)) -- part of final amp (not emulated) +// RES(R135, RES_K(22)) -- part of final amp (not emulated) RES(R136, RES_K(1)) RES(R137, RES_K(4.7)) RES(R138, RES_M(2.2)) RES(R139, RES_K(4.7)) RES(R140, RES_K(4.7)) -// RES(R141, RES_K(22)) -// RES(R142, RES_M(1)) -- part of final amp (not emulated) -// RES(R143, RES_K(22)) -- part of final amp (not emulated) -// RES(R144, RES_K(22)) -- part of final amp (not emulated) +// RES(R141, RES_K(22)) +// RES(R142, RES_M(1)) -- part of final amp (not emulated) +// RES(R143, RES_K(22)) -- part of final amp (not emulated) +// RES(R144, RES_K(22)) -- part of final amp (not emulated) RES(R145, RES_K(4.7)) RES(R146, RES_K(100)) RES(R147, RES_M(2.2)) @@ -349,11 +349,11 @@ NETLIST_START(astrob) CAP(C7, CAP_U(0.1)) CAP(C8, CAP_U(0.1)) CAP(C9, CAP_U(0.1)) -// CAP(C10, CAP_U(0.05)) -// CAP(C11, CAP_U(0.05)) +// CAP(C10, CAP_U(0.05)) +// CAP(C11, CAP_U(0.05)) CAP(C12, CAP_U(10)) -// CAP(C13, CAP_U(0.05)) -// CAP(C14, CAP_U(0.05)) +// CAP(C13, CAP_U(0.05)) +// CAP(C14, CAP_U(0.05)) CAP(C15, CAP_U(10)) CAP(C16, CAP_U(0.01)) CAP(C17, CAP_U(0.01)) @@ -368,8 +368,8 @@ NETLIST_START(astrob) CAP(C26, CAP_U(0.022)) CAP(C27, CAP_U(10)) CAP(C28, CAP_U(0.05)) -// CAP(C29, CAP_U(0.05)) -// CAP(C30, CAP_U(0.05)) +// CAP(C29, CAP_U(0.05)) +// CAP(C30, CAP_U(0.05)) CAP(C31, CAP_U(0.0047)) CAP(C32, CAP_U(0.05)) CAP(C33, CAP_U(10)) @@ -381,23 +381,23 @@ NETLIST_START(astrob) CAP(C39, CAP_U(0.1)) CAP(C40, CAP_U(0.01)) CAP(C41, CAP_U(0.01)) -// CAP(C42, CAP_U(0.001)) -// CAP(C43, CAP_U(10)) -// CAP(C44, CAP_U(0.001)) -// CAP(C45, CAP_U(0.001)) -// CAP(C46, CAP_U(10)) +// CAP(C42, CAP_U(0.001)) +// CAP(C43, CAP_U(10)) +// CAP(C44, CAP_U(0.001)) +// CAP(C45, CAP_U(0.001)) +// CAP(C46, CAP_U(10)) CAP(C47, CAP_U(4.7)) -// CAP(C48, CAP_U(22)) -- part of final amp (not emulated) +// CAP(C48, CAP_U(22)) -- part of final amp (not emulated) CAP(C49, CAP_U(0.05)) CAP(C50, CAP_U(0.05)) CAP(C51, CAP_U(0.05)) CAP(C52, CAP_U(0.05)) CAP(C53, CAP_U(0.1)) -// CAP(C54, CAP_U(0.05)) +// CAP(C54, CAP_U(0.05)) CAP(C55, CAP_U(0.05)) CAP(C56, CAP_U(10)) CAP(C57, CAP_U(0.1)) -// CAP(C58, CAP_U(4.7)) -- part of final amp (not emulated) +// CAP(C58, CAP_U(4.7)) -- part of final amp (not emulated) CAP(C59, CAP_U(0.33)) CAP(C60, CAP_U(4.7)) CAP(C61, CAP_U(4.7)) @@ -405,20 +405,20 @@ NETLIST_START(astrob) CAP(C63, CAP_U(0.1)) CAP(C64, CAP_U(0.1)) CAP(C65, CAP_U(0.01)) -// CAP(C66, CAP_U(0.05)) +// CAP(C66, CAP_U(0.05)) CAP(C67, CAP_U(0.05)) CAP(C68, CAP_U(0.0047)) CAP(C69, CAP_U(4.7)) CAP(C70, CAP_U(0.1)) CAP(C71, CAP_U(0.022)) CAP(C72, CAP_U(0.05)) -// CAP(C73, CAP_U(0.05)) +// CAP(C73, CAP_U(0.05)) CAP(C74, CAP_U(0.05)) CAP(C75, CAP_U(0.05)) CAP(C76, CAP_U(0.022)) CAP(C77, CAP_U(0.0047)) CAP(C78, CAP_U(0.1)) -// CAP(C79, CAP_U(0.05)) +// CAP(C79, CAP_U(0.05)) CAP(C80, CAP_U(4.7)) CAP(C81, CAP_U(0.05)) CAP(C82, CAP_U(0.1)) @@ -435,7 +435,7 @@ NETLIST_START(astrob) D_1N5231(D10) D_1N914(D11) D_1N914(D12) -// D_1N914(D13) -- part of final amp (not emulated) +// D_1N914(D13) -- part of final amp (not emulated) D_1N914(D14) D_1N914(D15) D_1N914(D16) @@ -466,138 +466,138 @@ NETLIST_START(astrob) Q_2N4403(Q9) Q_2N4403(Q10) - TL084_DIP(U1) // Op. Amp. + TL084_DIP(U1) // Op. Amp. NET_C(U1.4, I_V12) NET_C(U1.11, I_VM12) - TL084_DIP(U2) // Op. Amp. + TL084_DIP(U2) // Op. Amp. NET_C(U2.4, I_V12) NET_C(U2.11, I_VM12) - CD4017_DIP(U3) // Decade Counter/Divider + CD4017_DIP(U3) // Decade Counter/Divider NET_C(U3.8, GND) NET_C(U3.16, I_V12) - NE555_DIP(U4) // Timer + NE555_DIP(U4) // Timer - NE555_DIP(U5) // Timer + NE555_DIP(U5) // Timer - NE555_DIP(U6) // Timer + NE555_DIP(U6) // Timer - TL084_DIP(U7) // Op. Amp. + TL084_DIP(U7) // Op. Amp. NET_C(U7.4, I_V12) NET_C(U7.11, I_VM12) - MM5837_DIP(U8) // Noise Generator + MM5837_DIP(U8) // Noise Generator #if (UNDERCLOCK_NOISE_GEN) // officially runs at 48-112kHz, but little noticeable difference // in exchange for a big performance boost PARAM(U8.FREQ, 12000) #endif - CD4011_DIP(U9) // Quad 2-Input NAND Gates + CD4011_DIP(U9) // Quad 2-Input NAND Gates NET_C(U9.7, GND) NET_C(U9.14, I_V12) - CD4011_DIP(U10) // Quad 2-Input NAND Gates + CD4011_DIP(U10) // Quad 2-Input NAND Gates NET_C(U10.7, GND) NET_C(U10.14, I_V12) - CD4011_DIP(U11) // Quad 2-Input NAND Gates + CD4011_DIP(U11) // Quad 2-Input NAND Gates NET_C(U11.7, GND) NET_C(U11.14, I_V12) - CD4024_DIP(U12) // 7-Stage Ripple Binary Counter + CD4024_DIP(U12) // 7-Stage Ripple Binary Counter NET_C(U12.7, GND) NET_C(U12.14, I_V12) - NE555_DIP(U13) // Timer + NE555_DIP(U13) // Timer - CD4024_DIP(U14) // 7-Stage Ripple Binary Counter + CD4024_DIP(U14) // 7-Stage Ripple Binary Counter NET_C(U14.7, GND) NET_C(U14.14, I_V12) - CD4017_DIP(U15) // Decade Counter/Divider + CD4017_DIP(U15) // Decade Counter/Divider NET_C(U15.8, GND) NET_C(U15.16, I_V12) - TL084_DIP(U16) // Op. Amp. + TL084_DIP(U16) // Op. Amp. NET_C(U16.4, I_V12) NET_C(U16.11, I_VM12) - NE555_DIP(U17) // Timer + NE555_DIP(U17) // Timer - NE555_DIP(U18) // Timer + NE555_DIP(U18) // Timer - CD4024_DIP(U19) // 7-Stage Ripple Binary Counter + CD4024_DIP(U19) // 7-Stage Ripple Binary Counter NET_C(U19.7, GND) NET_C(U19.14, I_V12) - NE555_DIP(U20) // Timer + NE555_DIP(U20) // Timer - CD4011_DIP(U21) // Quad 2-Input NAND Gates + CD4011_DIP(U21) // Quad 2-Input NAND Gates NET_C(U21.7, GND) NET_C(U21.14, I_V12) - TL084_DIP(U22) // Op. Amp. + TL084_DIP(U22) // Op. Amp. NET_C(U22.4, I_V12) NET_C(U22.11, I_VM12) - NE555_DIP(U23) // Timer + NE555_DIP(U23) // Timer - NE555_DIP(U24) // Timer + NE555_DIP(U24) // Timer - CD4011_DIP(U25) // Quad 2-Input NAND Gates + CD4011_DIP(U25) // Quad 2-Input NAND Gates NET_C(U25.7, GND) NET_C(U25.14, I_V12) - TTL_7407_DIP(U26) // Hex Buffers with High Votage Open-Collector Outputs - NET_C(U26.7, GND) - NET_C(U26.14, I_V5) + TTL_7407_DIP(U26) // Hex Buffers with High Votage Open-Collector Outputs + NET_C(U26.7, GND) + NET_C(U26.14, I_V5) - CD4011_DIP(U27) // Quad 2-Input NAND Gates + CD4011_DIP(U27) // Quad 2-Input NAND Gates NET_C(U27.7, GND) NET_C(U27.14, I_V12) - CD4024_DIP(U28) // 7-Stage Ripple Binary Counter + CD4024_DIP(U28) // 7-Stage Ripple Binary Counter NET_C(U28.7, GND) NET_C(U28.14, I_V12) - TTL_7407_DIP(U29) // Hex Buffers with High Votage Open-Collector Outputs - NET_C(U29.7, GND) - NET_C(U29.14, I_V5) + TTL_7407_DIP(U29) // Hex Buffers with High Votage Open-Collector Outputs + NET_C(U29.7, GND) + NET_C(U29.14, I_V5) - TTL_7406_DIP(U30) // Hex inverter -- currently using a clone of 7416, no open collector behavior + TTL_7406_DIP(U30) // Hex inverter -- currently using a clone of 7416, no open collector behavior NET_C(U30.7, GND) NET_C(U30.14, I_V5) - TTL_7406_DIP(U31) // Hex inverter -- currently using a clone of 7416, no open collector behavior + TTL_7406_DIP(U31) // Hex inverter -- currently using a clone of 7416, no open collector behavior NET_C(U31.7, GND) NET_C(U31.14, I_V5) -// TTL_74LS374_DIP(U32) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop -// NET_C(U32.10, GND) -// NET_C(U32.20, I_V5) +// TTL_74LS374_DIP(U32) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop +// NET_C(U32.10, GND) +// NET_C(U32.20, I_V5) -// TTL_74LS374_DIP(U33) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop -// NET_C(U33.10, GND) -// NET_C(U33.20, I_V5) +// TTL_74LS374_DIP(U33) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop +// NET_C(U33.10, GND) +// NET_C(U33.20, I_V5) -// TTL_74LS00_DIP(U34) // Quad 4-Input NAND Gate +// TTL_74LS00_DIP(U34) // Quad 4-Input NAND Gate // NET_C(U34.7, GND) // NET_C(U34.14, I_V5) -// TTL_74LS30_DIP(U35) // 8-Input NAND Gate -// NET_C(U35.7, GND) -// NET_C(U35.14, I_V5) +// TTL_74LS30_DIP(U35) // 8-Input NAND Gate +// NET_C(U35.7, GND) +// NET_C(U35.14, I_V5) -// TTL_74LS04_DIP(U36) // Hex Inverting Gates -// NET_C(U36.7, GND) -// NET_C(U36.14, I_V5) +// TTL_74LS04_DIP(U36) // Hex Inverting Gates +// NET_C(U36.7, GND) +// NET_C(U36.14, I_V5) - NE555_DIP(U37) // Timer + NE555_DIP(U37) // Timer - NE555_DIP(U38) // Timer + NE555_DIP(U38) // Timer // // Sheet 7, top-left (SONAR) @@ -722,8 +722,8 @@ NETLIST_START(astrob) VARCLOCK(LASER1CLK, 1, "max(0.000001,min(0.1,(0.0000000343262*A0*A0*A0*A0*A0) - (0.00000096054*A0*A0*A0*A0) + (0.0000105481*A0*A0*A0) - (0.0000561978*A0*A0) + (0.000148191*A0) - 0.000131018))") NET_C(LASER1CLK.GND, GND) NET_C(LASER1CLK.VCC, I_V12) - NET_C(LASER1CLK.A0, Q10.E) - NET_C(LASER1CLK.Q, LASER1ENV.A1) + NET_C(LASER1CLK.A0, Q10.E) + NET_C(LASER1CLK.Q, LASER1ENV.A1) AFUNC(LASER1ENV, 2, "if(A0>6,A1,0)") NET_C(LASER1ENV.A0, U25.10) NET_C(LASER1ENV.Q, U19.1) @@ -774,8 +774,8 @@ NETLIST_START(astrob) VARCLOCK(LASER2CLK, 1, "max(0.000001,min(0.1,(0.0000000153499*A0*A0*A0*A0*A0) - (0.000000433800*A0*A0*A0*A0) + (0.00000480504*A0*A0*A0) - (0.0000257871*A0*A0) + (0.000068467*A0) - 0.0000608574))") NET_C(LASER2CLK.GND, GND) NET_C(LASER2CLK.VCC, I_V12) - NET_C(LASER2CLK.A0, Q9.E) - NET_C(LASER2CLK.Q, LASER2ENV.A1) + NET_C(LASER2CLK.A0, Q9.E) + NET_C(LASER2CLK.Q, LASER2ENV.A1) AFUNC(LASER2ENV, 2, "if(A0>6,A1,0)") NET_C(LASER2ENV.A0, U25.11) NET_C(LASER2ENV.Q, U14.1) @@ -916,7 +916,7 @@ NETLIST_START(astrob) NET_C(C80.2, GND) NET_C(R180.2, U16.9, R179.1) NET_C(R179.2, U16.8, R177.1) - NET_C(R181.2, U16.10, Q6.D, D26.K) // D and S swapped on schematics??? + NET_C(R181.2, U16.10, Q6.D, D26.K) // D and S swapped on schematics??? NET_C(Q6.G, C72.2, R151.2, Q5.G) NET_C(R151.1, GND) NET_C(C72.1, U8.3) @@ -960,7 +960,7 @@ NETLIST_START(astrob) NET_C(I_ASTROIDS, R97.1, R174.1, R175.1) NET_C(R97.2, I_V12) NET_C(R174.2, U16.13, R173.1) - NET_C(R175.2, U16.12, Q5.D, D25.K) // D and S swapped on schematics??? + NET_C(R175.2, U16.12, Q5.D, D25.K) // D and S swapped on schematics??? NET_C(D25.A, Q5.S, GND) NET_C(R173.2, U16.14, R172.1) NET_C(R172.2, R150.1, C70.1) @@ -992,7 +992,7 @@ NETLIST_START(astrob) NET_C(MUTEFUNC.A0, I_MUTE) NET_C(MUTEFUNC.A1, R121.2) ALIAS(OUTPUT, MUTEFUNC.Q) -// ALIAS(OUTPUT, C55.2) +// ALIAS(OUTPUT, C55.2) // // Sheet 8, middle-top (INVADER_1) @@ -1154,7 +1154,7 @@ NETLIST_START(astrob) OPTIMIZE_FRONTIER(INVADER_4, RES_M(1), RXX) OPTIMIZE_FRONTIER(C50.1, RES_M(10), RXX) - OPTIMIZE_FRONTIER(C60.1, RES_M(10), RXX) // this is a big one + OPTIMIZE_FRONTIER(C60.1, RES_M(10), RXX) // this is a big one OPTIMIZE_FRONTIER(C61.1, RES_M(10), RXX) #endif diff --git a/src/mame/audio/nl_carpolo.cpp b/src/mame/audio/nl_carpolo.cpp index e135227c69b..cef3eb79346 100644 --- a/src/mame/audio/nl_carpolo.cpp +++ b/src/mame/audio/nl_carpolo.cpp @@ -81,10 +81,10 @@ NETLIST_START(carpolo) ANALOG_INPUT(V5, 5) ALIAS(VCC, V5) - TTL_INPUT(PL1_CRASH, 1) // active high - TTL_INPUT(PL2_CRASH, 0) // active high - TTL_INPUT(PL3_CRASH, 0) // active high - TTL_INPUT(PL4_CRASH, 0) // active high + TTL_INPUT(PL1_CRASH, 1) // active high + TTL_INPUT(PL2_CRASH, 0) // active high + TTL_INPUT(PL3_CRASH, 0) // active high + TTL_INPUT(PL4_CRASH, 0) // active high LOCAL_SOURCE(PLAYER_CRASH) diff --git a/src/mame/audio/nl_elim.cpp b/src/mame/audio/nl_elim.cpp index 1727de5c46f..147441f3a6f 100644 --- a/src/mame/audio/nl_elim.cpp +++ b/src/mame/audio/nl_elim.cpp @@ -96,14 +96,14 @@ NETLIST_END() // once for Zektor // -#define VARIANT_ELIMINATOR 0 -#define VARIANT_ZEKTOR 1 +#define VARIANT_ELIMINATOR 0 +#define VARIANT_ZEKTOR 1 -#define SOUND_VARIANT (VARIANT_ELIMINATOR) +#define SOUND_VARIANT (VARIANT_ELIMINATOR) #include "nl_elim.cpp" #undef SOUND_VARIANT -#define SOUND_VARIANT (VARIANT_ZEKTOR) +#define SOUND_VARIANT (VARIANT_ZEKTOR) #include "nl_elim.cpp" @@ -131,7 +131,7 @@ NETLIST_START(zektor) LOCAL_SOURCE(_CA3080_FAST_DIP) -// TTL_INPUT(I_LO_D0, 0) +// TTL_INPUT(I_LO_D0, 0) TTL_INPUT(I_LO_D1, 0) ALIAS(I_FIREBALL, I_LO_D1) TTL_INPUT(I_LO_D2, 0) @@ -193,14 +193,14 @@ NETLIST_START(zektor) // C46 0.022uF 0.047uF // -// RES(R1, RES_K(100)) -- part of final amp (not emulated) -// RES(R2, RES_M(1)) -- part of final amp (not emulated) -// RES(R3, RES_K(22)) -- part of final amp (not emulated) -// RES(R4, RES_K(2.2)) -- part of final amp (not emulated) +// RES(R1, RES_K(100)) -- part of final amp (not emulated) +// RES(R2, RES_M(1)) -- part of final amp (not emulated) +// RES(R3, RES_K(22)) -- part of final amp (not emulated) +// RES(R4, RES_K(2.2)) -- part of final amp (not emulated) #if (SOUND_VARIANT == VARIANT_ELIMINATOR) -// RES(R5, RES_K(10)) -- part of final amp (not emulated) +// RES(R5, RES_K(10)) -- part of final amp (not emulated) #else // (SOUND_VARIANT == VARIANT_ZEKTOR) -// RES(R5, RES_K(4.7)) -- part of final amp (not emulated) +// RES(R5, RES_K(4.7)) -- part of final amp (not emulated) #endif RES(R6, RES_K(220)) RES(R7, RES_K(220)) @@ -211,9 +211,9 @@ NETLIST_START(zektor) RES(R9, RES_K(12)) #endif RES(R10, RES_K(10)) -// RES(R11, RES_K(2.2)) -- part of final amp (not emulated) -// RES(R12, RES_M(1)) -- part of final amp (not emulated) -// RES(R13, RES_K(330)) -- part of final amp (not emulated) +// RES(R11, RES_K(2.2)) -- part of final amp (not emulated) +// RES(R12, RES_M(1)) -- part of final amp (not emulated) +// RES(R13, RES_K(330)) -- part of final amp (not emulated) RES(R14, RES_K(470)) RES(R15, RES_K(100)) RES(R16, RES_K(100)) @@ -363,10 +363,10 @@ NETLIST_START(zektor) RES(R146, RES_K(22)) RES(R147, RES_K(2.2)) -// CAP(C1, CAP_U(4.7)) -- part of final amp (not emulated) -// CAP(C2, CAP_U(0.1)) -// CAP(C3, CAP_U(0.1)) -// CAP(C4, CAP_U(10)) -- part of final amp (not emulated) +// CAP(C1, CAP_U(4.7)) -- part of final amp (not emulated) +// CAP(C2, CAP_U(0.1)) +// CAP(C3, CAP_U(0.1)) +// CAP(C4, CAP_U(10)) -- part of final amp (not emulated) CAP(C5, CAP_U(0.1)) CAP(C6, CAP_U(0.1)) CAP(C7, CAP_U(0.001)) @@ -388,17 +388,17 @@ NETLIST_START(zektor) CAP(C19, CAP_U(0.068)) CAP(C20, CAP_U(0.068)) CAP(C21, CAP_U(2.2)) -// CAP(C22, CAP_U(0.1)) -// CAP(C23, CAP_U(0.1)) -// CAP(C24, CAP_U(0.1)) -// CAP(C25, CAP_U(0.1)) -// CAP(C26, CAP_U(0.1)) -// CAP(C27, CAP_U(0.1)) +// CAP(C22, CAP_U(0.1)) +// CAP(C23, CAP_U(0.1)) +// CAP(C24, CAP_U(0.1)) +// CAP(C25, CAP_U(0.1)) +// CAP(C26, CAP_U(0.1)) +// CAP(C27, CAP_U(0.1)) CAP(C28, CAP_U(0.1)) CAP(C29, CAP_U(0.1)) CAP(C30, CAP_U(0.022)) -// CAP(C31, CAP_U(0.1)) -// CAP(C32, CAP_U(0.1)) +// CAP(C31, CAP_U(0.1)) +// CAP(C32, CAP_U(0.1)) CAP(C33, CAP_U(0.1)) CAP(C34, CAP_U(0.1)) CAP(C35, CAP_U(1)) @@ -406,8 +406,8 @@ NETLIST_START(zektor) CAP(C37, CAP_U(10)) CAP(C38, CAP_U(4.7)) CAP(C39, CAP_U(0.1)) -// CAP(C40, CAP_U(0.1)) -// CAP(C41, CAP_U(0.1)) +// CAP(C40, CAP_U(0.1)) +// CAP(C41, CAP_U(0.1)) // C42?? CAP(C43, CAP_U(0.033)) CAP(C44, CAP_U(0.1)) @@ -432,7 +432,7 @@ NETLIST_START(zektor) CAP(C59, CAP_U(0.1)) CAP(C60, CAP_U(0.001)) CAP(C61, CAP_U(0.068)) -// CAP(C62, CAP_U(0.1)) +// CAP(C62, CAP_U(0.1)) CAP(C63, CAP_P(100)) CAP(C64, CAP_U(0.1)) CAP(C65, CAP_U(0.01)) @@ -440,11 +440,11 @@ NETLIST_START(zektor) CAP(C67, CAP_U(0.047)) CAP(C68, CAP_U(0.01)) CAP(C69, CAP_U(0.1)) -// CAP(C70, CAP_U(0.1)) -// CAP(C71, CAP_U(0.1)) -// CAP(C72, CAP_U(0.1)) -// CAP(C73, CAP_U(10)) -// CAP(C74, CAP_U(0.1)) +// CAP(C70, CAP_U(0.1)) +// CAP(C71, CAP_U(0.1)) +// CAP(C72, CAP_U(0.1)) +// CAP(C73, CAP_U(10)) +// CAP(C74, CAP_U(0.1)) CAP(C75, CAP_U(0.1)) CAP(C76, CAP_U(0.1)) CAP(C77, CAP_U(0.1)) @@ -458,7 +458,7 @@ NETLIST_START(zektor) D_1N914(D7) D_1N4002(D8) -// Q_2N4093(Q1) -- part of final amp (not emulated) +// Q_2N4093(Q1) -- part of final amp (not emulated) Q_2N4403(Q2) Q_2N4403(Q3) Q_2N4403(Q4) @@ -470,164 +470,164 @@ NETLIST_START(zektor) Q_2N4403(Q10) Q_2N4403(Q11) - TL081_DIP(U1) // Op. Amp. + TL081_DIP(U1) // Op. Amp. NET_C(U1.7, I_V12) NET_C(U1.4, I_VM12) -// TL082_DIP(U2) // Op. Amp. -- part of final amp (not emulated) -// NET_C(U2.8, I_V12) -// NET_C(U2.4, I_VM12) +// TL082_DIP(U2) // Op. Amp. -- part of final amp (not emulated) +// NET_C(U2.8, I_V12) +// NET_C(U2.4, I_VM12) - TL081_DIP(U3) // Op. Amp. + TL081_DIP(U3) // Op. Amp. NET_C(U3.7, I_V12) NET_C(U3.4, I_VM12) - MM5837_DIP(U4) // Noise Generator + MM5837_DIP(U4) // Noise Generator #if (UNDERCLOCK_NOISE_GEN) PARAM(U4.FREQ, 24000) #endif - LM555_DIP(U5) // Timer + LM555_DIP(U5) // Timer - CA3080_DIP(U6) // Op. Amp. + CA3080_DIP(U6) // Op. Amp. NET_C(U6.4, I_VM12) NET_C(U6.7, I_V12) - CA3080_DIP(U7) // Op. Amp. + CA3080_DIP(U7) // Op. Amp. NET_C(U7.4, I_VM12) NET_C(U7.7, I_V12) - CA3080_DIP(U8) // Op. Amp. + CA3080_DIP(U8) // Op. Amp. NET_C(U8.4, I_VM12) NET_C(U8.7, I_V12) - CA3080_DIP(U9) // Op. Amp. + CA3080_DIP(U9) // Op. Amp. NET_C(U9.4, I_VM12) NET_C(U9.7, I_V12) - CA3080_DIP(U10) // Op. Amp. + CA3080_DIP(U10) // Op. Amp. NET_C(U10.4, I_VM12) NET_C(U10.7, I_V12) - CA3080_DIP(U11) // Op. Amp. + CA3080_DIP(U11) // Op. Amp. NET_C(U11.4, I_VM12) NET_C(U11.7, I_V12) - TL081_DIP(U12) // Op. Amp. + TL081_DIP(U12) // Op. Amp. NET_C(U12.7, I_V12) NET_C(U12.4, I_VM12) - LM555_DIP(U13) // Timer + LM555_DIP(U13) // Timer - CA3080_DIP(U14) // Op. Amp. + CA3080_DIP(U14) // Op. Amp. NET_C(U14.4, I_VM12) NET_C(U14.7, I_V12) - CA3080_DIP(U15) // Op. Amp. + CA3080_DIP(U15) // Op. Amp. NET_C(U15.4, I_VM12) NET_C(U15.7, I_V12) - TL082_DIP(U16) // Op. Amp. + TL082_DIP(U16) // Op. Amp. NET_C(U16.8, I_V12) NET_C(U16.4, I_VM12) - CD4011_DIP(U17) // Quad 2-Input NAND Gates + CD4011_DIP(U17) // Quad 2-Input NAND Gates NET_C(U17.7, GND) NET_C(U17.14, I_V12) - CD4011_DIP(U18) // Quad 2-Input NAND Gates + CD4011_DIP(U18) // Quad 2-Input NAND Gates NET_C(U18.7, GND) NET_C(U18.14, I_V12) - CD4011_DIP(U19) // Quad 2-Input NAND Gates + CD4011_DIP(U19) // Quad 2-Input NAND Gates NET_C(U19.7, GND) NET_C(U19.14, I_V12) - TL082_DIP(U20) // Op. Amp. + TL082_DIP(U20) // Op. Amp. NET_C(U20.8, I_V12) NET_C(U20.4, I_VM12) - CD4024_DIP(U21) // 7-Stage Ripple Binary Counter + CD4024_DIP(U21) // 7-Stage Ripple Binary Counter NET_C(U21.7, GND) NET_C(U21.14, I_V12) - CD4011_DIP(U22) // Quad 2-Input NAND Gates + CD4011_DIP(U22) // Quad 2-Input NAND Gates NET_C(U22.7, GND) NET_C(U22.14, I_V12) - CD4024_DIP(U23) // 7-Stage Ripple Binary Counter + CD4024_DIP(U23) // 7-Stage Ripple Binary Counter NET_C(U23.7, GND) NET_C(U23.14, I_V12) - TTL_7406_DIP(U24) // Hex inverter -- currently using a clone of 7416, no open collector behavior + TTL_7406_DIP(U24) // Hex inverter -- currently using a clone of 7416, no open collector behavior NET_C(U24.7, GND) NET_C(U24.14, I_V5) #if (!HLE_BACKGROUND_VCO) - LM566_DIP(U25) // Voltage-Controlled Oscillator + LM566_DIP(U25) // Voltage-Controlled Oscillator #endif - TTL_74LS00_DIP(U26) // Quad 4-Input NAND Gate - NET_C(U26.7, GND) - NET_C(U26.14, I_V5) + TTL_74LS00_DIP(U26) // Quad 4-Input NAND Gate + NET_C(U26.7, GND) + NET_C(U26.14, I_V5) - TTL_7407_DIP(U27) // Hex Buffers with High Votage Open-Collector Outputs - NET_C(U27.7, GND) - NET_C(U27.14, I_V5) + TTL_7407_DIP(U27) // Hex Buffers with High Votage Open-Collector Outputs + NET_C(U27.7, GND) + NET_C(U27.14, I_V5) - TTL_7407_DIP(U28) // Hex Buffers with High Votage Open-Collector Outputs - NET_C(U28.7, GND) - NET_C(U28.14, I_V5) + TTL_7407_DIP(U28) // Hex Buffers with High Votage Open-Collector Outputs + NET_C(U28.7, GND) + NET_C(U28.14, I_V5) - TL081_DIP(U29) // Op. Amp. + TL081_DIP(U29) // Op. Amp. NET_C(U29.7, I_V12) NET_C(U29.4, I_VM12) -// AY_3_8912_DIP(U30) // PSG -- emulated by MAME +// AY_3_8912_DIP(U30) // PSG -- emulated by MAME - CD4069_DIP(U31) // Hex Inverter + CD4069_DIP(U31) // Hex Inverter NET_C(U31.7, GND) NET_C(U31.14, I_V12) - CD4069_DIP(U32) // Hex Inverter + CD4069_DIP(U32) // Hex Inverter NET_C(U32.7, GND) NET_C(U32.14, I_V12) -// TTL_74LS125_DIP(U33) // Quad 3-state buffer -// NET_C(U33.7, GND) -// NET_C(U33.14, I_V5) +// TTL_74LS125_DIP(U33) // Quad 3-state buffer +// NET_C(U33.7, GND) +// NET_C(U33.14, I_V5) -// TTL_74LS374_DIP(U34) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop -// NET_C(U34.10, GND) -// NET_C(U34.20, I_V5) +// TTL_74LS374_DIP(U34) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop +// NET_C(U34.10, GND) +// NET_C(U34.20, I_V5) // -// TTL_74LS374_DIP(U35) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop -// NET_C(U34.10, GND) -// NET_C(U34.20, I_V5) +// TTL_74LS374_DIP(U35) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop +// NET_C(U34.10, GND) +// NET_C(U34.20, I_V5) // TTL_74LS74_DIP(U36) // Dual D Flip Flop // NET_C(U36.7, GND) // NET_C(U36.14, I_V5) -// TTL_74LS10_DIP(U37) // Triple 3-Input NAND Gate -// NET_C(U37.7, GND) -// NET_C(U37.14, I_V5) +// TTL_74LS10_DIP(U37) // Triple 3-Input NAND Gate +// NET_C(U37.7, GND) +// NET_C(U37.14, I_V5) -// TTL_74LS14_DIP(U38) -// NET_C(U38.7, GND) -// NET_C(U38.14, I_V5) +// TTL_74LS14_DIP(U38) +// NET_C(U38.7, GND) +// NET_C(U38.14, I_V5) -// TTL_74LS08_DIP(U39) // Quad 2-Input AND Gates -// NET_C(U39.7, GND) -// NET_C(U39.14, I_V5) +// TTL_74LS08_DIP(U39) // Quad 2-Input AND Gates +// NET_C(U39.7, GND) +// NET_C(U39.14, I_V5) -// TTL_74LS30_DIP(U40) // 8-Input NAND Gate -// NET_C(U40.7, GND) -// NET_C(U40.14, I_V5) +// TTL_74LS30_DIP(U40) // 8-Input NAND Gate +// NET_C(U40.7, GND) +// NET_C(U40.14, I_V5) -// TTL_74LS14_DIP(U41) -// NET_C(U41.7, GND) -// NET_C(U41.14, I_V5) +// TTL_74LS14_DIP(U41) +// NET_C(U41.7, GND) +// NET_C(U41.14, I_V5) // // Sheet 7, top-left/middle (Thrust) @@ -817,9 +817,9 @@ NETLIST_START(zektor) VARCLOCK(BGCLK, 1, "max(0.000001,min(0.1,(0.00000748879*A0*A0*A0*A0) - (0.000189174*A0*A0*A0) + (0.00180942*A0*A0) - (0.00759439*A0) + 0.0124560))") NET_C(BGCLK.GND, GND) NET_C(BGCLK.VCC, I_V5) - NET_C(BGCLK.A0, U16.1) - NET_C(BGCLK.Q, BGENV.A0) - NET_C(GND, C57.1, C57.2, C58.1, C58.2) + NET_C(BGCLK.A0, U16.1) + NET_C(BGCLK.Q, BGENV.A0) + NET_C(GND, C57.1, C57.2, C58.1, C58.2) AFUNC(BGENV, 1, "if(A0>2.5,2.5,-2.5)") NET_C(BGENV.Q, R106.1) #else @@ -867,7 +867,7 @@ NETLIST_START(zektor) HINT(U32.6, NC) HINT(U32.8, NC) - CLOCK(_200HZBCLK, 217.98) // tweak frequency so this is out of phase + CLOCK(_200HZBCLK, 217.98) // tweak frequency so this is out of phase NET_C(_200HZBCLK.VCC, I_V12) NET_C(_200HZBCLK.GND, GND) NET_C(_200HZB, _200HZBCLK.Q) @@ -1100,14 +1100,14 @@ NETLIST_START(zektor) VARCLOCK(TORP1CLK, 1, "max(0.000001,min(0.1,(0.00000342725*A0*A0*A0) + (0.000000183693*A0*A0) + (0.000079091*A0) + 0.0000157375))") NET_C(TORP1CLK.GND, GND) NET_C(TORP1CLK.VCC, I_V5) - NET_C(TORP1CLK.A0, D2.K) - NET_C(TORP1CLK.Q, T1ENV.A0) + NET_C(TORP1CLK.A0, D2.K) + NET_C(TORP1CLK.Q, T1ENV.A0) AFUNC(T1ENV, 1, "if(A0>2.5,11.1,-11.1)") NET_C(T1ENV.Q, U23.1) NET_C(D2.A, D3.K, R91.1) NET_C(C46.2, R90.1) NET_C(R90.2, R91.2, R146.1) - NET_C(GND, U20.3, U20.2) + NET_C(GND, U20.3, U20.2) #else NET_C(D2.A, D3.K, R91.1, U20.3) NET_C(U20.2, C46.2, R90.1) @@ -1129,9 +1129,9 @@ NETLIST_START(zektor) NET_C(WBN, R36.1) #if (DISABLE_TORPEDO2_NOISE) - NET_C(R36.2, GND) // noise source + NET_C(R36.2, GND) // noise source #else - NET_C(R36.2, D6.A) // noise source + NET_C(R36.2, D6.A) // noise source #endif #if (HLE_TORPEDO2_VCO) @@ -1145,14 +1145,14 @@ NETLIST_START(zektor) VARCLOCK(TORP2CLK, 1, "max(0.000001,min(0.1,(0.0000104419*A0*A0*A0) - (0.00000603211*A0*A0) + (0.000109865*A0) + 0.0000082421))") NET_C(TORP2CLK.GND, GND) NET_C(TORP2CLK.VCC, I_V5) - NET_C(TORP2CLK.A0, D6.K) - NET_C(TORP2CLK.Q, T2ENV.A0) + NET_C(TORP2CLK.A0, D6.K) + NET_C(TORP2CLK.Q, T2ENV.A0) AFUNC(T2ENV, 1, "if(A0>2.5,11.1,-11.1)") NET_C(T2ENV.Q, U21.1) NET_C(D6.A, D7.K, R93.1) NET_C(C43.2, R94.1) NET_C(R94.2, R93.2, R92.2) - NET_C(GND, U20.6, U20.5) + NET_C(GND, U20.6, U20.5) #else NET_C(D6.A, U20.5, D7.K, R93.1) NET_C(U20.6, C43.2, R94.1) diff --git a/src/mame/audio/nl_fireone.cpp b/src/mame/audio/nl_fireone.cpp index 3c0523cb36c..9b2c405535c 100644 --- a/src/mame/audio/nl_fireone.cpp +++ b/src/mame/audio/nl_fireone.cpp @@ -41,56 +41,56 @@ NETLIST_END() // static NETLIST_START(ICL8038_DIP) - VCVS(VI, 1) - CCCS(CI1, -1) - CCCS(CI2, 2) - SYS_COMPD(COMP) - SYS_DSW2(SW) - VCVS(VO, 1) - RES(R_SHUNT, RES_R(50)) - - PARAM(VO.RO, 50) - PARAM(COMP.MODEL, "FAMILY(TYPE=CUSTOM IVL=0.16 IVH=0.4 OVL=0.01 OVH=0.01 ORL=50 ORH=50)") - PARAM(SW.GOFF, 0) // This has to be zero to block current sources - - NET_C(VI.OP, CI1.IN, CI2.IN) - NET_C(CI1.OP, VO.IP) - NET_C(COMP.Q, SW.I) - NET_C(CI2.OP, SW.2) - NET_C(COMP.VCC, R_SHUNT.1) - NET_C(SW.1, R_SHUNT.2) - NET_C(SW.3, VO.IP) - NET_C(VO.OP, COMP.IN) - - // Avoid singular Matrix due to G=0 switch - RES(RX1, 1e10) - RES(RX2, 1e10) - NET_C(RX1.1, SW.1) - NET_C(RX2.1, SW.3) - - NET_C(COMP.GND, RX1.2, RX2.2) - - RES(R1, 5000) - RES(R2, 5000) - RES(R3, 5000) - - // Square output wave - VCVS(V_SQR, 1) - NET_C(COMP.Q, V_SQR.IP) - - NET_C(COMP.GND, SW.GND, VI.ON, VI.IN, CI1.ON, CI2.ON, VO.IN, VO.ON, R2.2, V_SQR.IN, V_SQR.ON) - NET_C(COMP.VCC, SW.VCC, R1.2) - NET_C(COMP.IP, R1.1, R2.1, R3.1) - NET_C(COMP.Q, R3.2) - - ALIAS(11, VI.ON) // GND - ALIAS(9, V_SQR.OP) // Square out - ALIAS(3, VO.OP) // Triag out - ALIAS(8, VI.IP) // VC - ALIAS(4, CI1.IP) // R1 - ALIAS(5, CI2.IP) // R2 - ALIAS(10, VO.IP) // C1 - ALIAS(6, COMP.VCC) // V+ + VCVS(VI, 1) + CCCS(CI1, -1) + CCCS(CI2, 2) + SYS_COMPD(COMP) + SYS_DSW2(SW) + VCVS(VO, 1) + RES(R_SHUNT, RES_R(50)) + + PARAM(VO.RO, 50) + PARAM(COMP.MODEL, "FAMILY(TYPE=CUSTOM IVL=0.16 IVH=0.4 OVL=0.01 OVH=0.01 ORL=50 ORH=50)") + PARAM(SW.GOFF, 0) // This has to be zero to block current sources + + NET_C(VI.OP, CI1.IN, CI2.IN) + NET_C(CI1.OP, VO.IP) + NET_C(COMP.Q, SW.I) + NET_C(CI2.OP, SW.2) + NET_C(COMP.VCC, R_SHUNT.1) + NET_C(SW.1, R_SHUNT.2) + NET_C(SW.3, VO.IP) + NET_C(VO.OP, COMP.IN) + + // Avoid singular Matrix due to G=0 switch + RES(RX1, 1e10) + RES(RX2, 1e10) + NET_C(RX1.1, SW.1) + NET_C(RX2.1, SW.3) + + NET_C(COMP.GND, RX1.2, RX2.2) + + RES(R1, 5000) + RES(R2, 5000) + RES(R3, 5000) + + // Square output wave + VCVS(V_SQR, 1) + NET_C(COMP.Q, V_SQR.IP) + + NET_C(COMP.GND, SW.GND, VI.ON, VI.IN, CI1.ON, CI2.ON, VO.IN, VO.ON, R2.2, V_SQR.IN, V_SQR.ON) + NET_C(COMP.VCC, SW.VCC, R1.2) + NET_C(COMP.IP, R1.1, R2.1, R3.1) + NET_C(COMP.Q, R3.2) + + ALIAS(11, VI.ON) // GND + ALIAS(9, V_SQR.OP) // Square out + ALIAS(3, VO.OP) // Triag out + ALIAS(8, VI.IP) // VC + ALIAS(4, CI1.IP) // R1 + ALIAS(5, CI2.IP) // R2 + ALIAS(10, VO.IP) // C1 + ALIAS(6, COMP.VCC) // V+ NETLIST_END() // @@ -109,19 +109,19 @@ NETLIST_START(fireone) NET_MODEL("PIT8253PORT FAMILY(TYPE=NMOS OVL=0.05 OVH=0.05 ORL=100.0 ORH=0.5k)") - TTL_INPUT(LTORP, 0) // active high - TTL_INPUT(LSHPHT, 0) // active high - TTL_INPUT(LBOOM, 0) // active high - TTL_INPUT(SOUND_OFF_L, 0) // active high - TTL_INPUT(SOUND_OFF_R, 0) // active high - TTL_INPUT(RTORP, 0) // active high - TTL_INPUT(RSHPHT, 0) // active high - TTL_INPUT(RBOOM, 0) // active high - TTL_INPUT(TORPCOLL, 0) // active high - TTL_INPUT(SUBENG, 0) // active high - TTL_INPUT(ALERT, 0) // active high - //TTL_INPUT(SONAR_ENABLE, 0) // active high - TTL_INPUT(SONAR_SYNC, 0) // active low + TTL_INPUT(LTORP, 0) // active high + TTL_INPUT(LSHPHT, 0) // active high + TTL_INPUT(LBOOM, 0) // active high + TTL_INPUT(SOUND_OFF_L, 0) // active high + TTL_INPUT(SOUND_OFF_R, 0) // active high + TTL_INPUT(RTORP, 0) // active high + TTL_INPUT(RSHPHT, 0) // active high + TTL_INPUT(RBOOM, 0) // active high + TTL_INPUT(TORPCOLL, 0) // active high + TTL_INPUT(SUBENG, 0) // active high + TTL_INPUT(ALERT, 0) // active high + //TTL_INPUT(SONAR_ENABLE, 0) // active high + TTL_INPUT(SONAR_SYNC, 0) // active low LOGIC_INPUT(MUSIC_A, 0, "PIT8253PORT") LOGIC_INPUT(MUSIC_B, 0, "PIT8253PORT") diff --git a/src/mame/audio/nl_mario.cpp b/src/mame/audio/nl_mario.cpp index a009988fff5..ddd1cc6866e 100644 --- a/src/mame/audio/nl_mario.cpp +++ b/src/mame/audio/nl_mario.cpp @@ -149,7 +149,7 @@ static NETLIST_START(nl_mario_snd7) NET_C(R65.2, 4K_A.FC, C44.1) NET_C(C44.2, GND) - CD4020_WI(3H, 4K_B.Y, ttllow, V5, GND) + CD4020(3H, 4K_B.Y, ttllow, V5, GND) TTL_7404_INVERT(4J_B, 3H.Q12) RES(R64, RES_K(20)) diff --git a/src/mame/audio/nl_segaspeech.cpp b/src/mame/audio/nl_segaspeech.cpp index 6b52f886df5..8dc301f2db6 100644 --- a/src/mame/audio/nl_segaspeech.cpp +++ b/src/mame/audio/nl_segaspeech.cpp @@ -45,7 +45,7 @@ NETLIST_START(segaspeech) // There are two schematic drawings of the speech board // that show fairly different outputs from the SP0250. // Both have their problems. - // + // // The simpler one is included in the Astro Blaster and // Space Fury manuals. This is largely correct, except // that it is believed (not verified) that R20 should be @@ -89,14 +89,14 @@ NETLIST_START(segaspeech) RES(R17, RES_K(10)) RES(R18, RES_K(22)) RES(R19, RES_K(250)) - RES(R20, RES_K(4.7)) // schematic shows 470Ohm, but a real PCB had 4.7k here + RES(R20, RES_K(4.7)) // schematic shows 470Ohm, but a real PCB had 4.7k here RES(R21, RES_K(10)) CAP(C9, CAP_U(0.1)) CAP(C10, CAP_U(0.047)) CAP(C50, CAP_U(0.003)) - TL081_DIP(U8) // Op. Amp. + TL081_DIP(U8) // Op. Amp. NET_C(U8.7, I_V5) NET_C(U8.4, I_VM5) diff --git a/src/mame/audio/nl_segausb.cpp b/src/mame/audio/nl_segausb.cpp index 179f9b4a211..ac03fac0662 100644 --- a/src/mame/audio/nl_segausb.cpp +++ b/src/mame/audio/nl_segausb.cpp @@ -42,33 +42,33 @@ NETLIST_START(segausb) PARAM(Solver.DYNAMIC_TS, 1) PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5) - ANALOG_INPUT(I_U12_DAC, 0) // AD7524 - ANALOG_INPUT(I_U13_DAC, 0) // AD7524 - ANALOG_INPUT(I_U14_DAC, 0) // AD7524 - TTL_INPUT(I_U2B_SEL, 0) // 74LS74 + ANALOG_INPUT(I_U12_DAC, 0) // AD7524 + ANALOG_INPUT(I_U13_DAC, 0) // AD7524 + ANALOG_INPUT(I_U14_DAC, 0) // AD7524 + TTL_INPUT(I_U2B_SEL, 0) // 74LS74 - ANALOG_INPUT(I_U24_DAC, 0) // AD7524 - ANALOG_INPUT(I_U25_DAC, 0) // AD7524 - ANALOG_INPUT(I_U26_DAC, 0) // AD7524 - TTL_INPUT(I_U38B_SEL, 0) // 74LS74 + ANALOG_INPUT(I_U24_DAC, 0) // AD7524 + ANALOG_INPUT(I_U25_DAC, 0) // AD7524 + ANALOG_INPUT(I_U26_DAC, 0) // AD7524 + TTL_INPUT(I_U38B_SEL, 0) // 74LS74 - ANALOG_INPUT(I_U27_DAC, 0) // AD7524 - ANALOG_INPUT(I_U28_DAC, 0) // AD7524 - ANALOG_INPUT(I_U29_DAC, 0) // AD7524 - TTL_INPUT(I_U2A_SEL, 0) // 74LS74 + ANALOG_INPUT(I_U27_DAC, 0) // AD7524 + ANALOG_INPUT(I_U28_DAC, 0) // AD7524 + ANALOG_INPUT(I_U29_DAC, 0) // AD7524 + TTL_INPUT(I_U2A_SEL, 0) // 74LS74 NET_C(GND, I_U2B_SEL.GND, I_U38B_SEL.GND, I_U2A_SEL.GND) NET_C(I_V5, I_U2B_SEL.VCC, I_U38B_SEL.VCC, I_U2A_SEL.VCC) - TTL_INPUT(I_U41_OUT0, 0) // 8253 PIT U41 + TTL_INPUT(I_U41_OUT0, 0) // 8253 PIT U41 TTL_INPUT(I_U41_OUT1, 0) TTL_INPUT(I_U41_OUT2, 0) - TTL_INPUT(I_U42_OUT0, 0) // 8253 PIT U42 + TTL_INPUT(I_U42_OUT0, 0) // 8253 PIT U42 TTL_INPUT(I_U42_OUT1, 0) TTL_INPUT(I_U42_OUT2, 0) - TTL_INPUT(I_U43_OUT0, 0) // 8253 PIT U43 + TTL_INPUT(I_U43_OUT0, 0) // 8253 PIT U43 TTL_INPUT(I_U43_OUT1, 0) TTL_INPUT(I_U43_OUT2, 0) @@ -142,21 +142,21 @@ NETLIST_START(segausb) RES(R64, RES_K(2.7)) RES(R65, RES_K(2.7)) -// CAP(C6, CAP_P(100)) -// CAP(C7, CAP_P(100)) -// CAP(C8, CAP_P(100)) +// CAP(C6, CAP_P(100)) +// CAP(C7, CAP_P(100)) +// CAP(C8, CAP_P(100)) CAP(C9, CAP_U(0.01)) CAP(C13, CAP_U(0.01)) CAP(C14, CAP_U(1)) CAP(C15, CAP_U(1)) CAP(C16, CAP_U(0.01)) CAP(C17, CAP_U(0.01)) -// CAP(C19, CAP_P(100)) -// CAP(C20, CAP_P(100)) -// CAP(C21, CAP_P(100)) -// CAP(C22, CAP_P(100)) -// CAP(C23, CAP_P(100)) -// CAP(C24, CAP_P(100)) +// CAP(C19, CAP_P(100)) +// CAP(C20, CAP_P(100)) +// CAP(C21, CAP_P(100)) +// CAP(C22, CAP_P(100)) +// CAP(C23, CAP_P(100)) +// CAP(C24, CAP_P(100)) CAP(C25, CAP_U(0.01)) CAP(C32, CAP_U(0.01)) CAP(C33, CAP_U(1)) @@ -170,143 +170,143 @@ NETLIST_START(segausb) CAP(C55, CAP_U(0.15)) CAP(C56, CAP_U(0.15)) -// TL082_DIP(U1) // Op. Amp. -// NET_C(U1.7, I_V12) -// NET_C(U1.4, I_VM12) +// TL082_DIP(U1) // Op. Amp. +// NET_C(U1.7, I_V12) +// NET_C(U1.4, I_VM12) -// TTL_74LS74(U2) // Dual D-Type Positive Edge-Triggered Flip-Flop -- not emulated -// NET_C(U2.7, GND) -// NET_C(U2.14, I_V5) +// TTL_74LS74(U2) // Dual D-Type Positive Edge-Triggered Flip-Flop -- not emulated +// NET_C(U2.7, GND) +// NET_C(U2.14, I_V5) - TL082_DIP(U3) // Op. Amp. + TL082_DIP(U3) // Op. Amp. NET_C(U3.8, I_V12) NET_C(U3.4, I_VM12) - TL082_DIP(U4) // Op. Amp. + TL082_DIP(U4) // Op. Amp. NET_C(U4.8, I_V12) NET_C(U4.4, I_VM12) - TL082_DIP(U5) // Op. Amp. + TL082_DIP(U5) // Op. Amp. NET_C(U5.8, I_V12) NET_C(U5.4, I_VM12) - TL082_DIP(U6) // Op. Amp. + TL082_DIP(U6) // Op. Amp. NET_C(U6.8, I_V12) NET_C(U6.4, I_VM12) - CD4053_DIP(U7) // 3x analog demuxer + CD4053_DIP(U7) // 3x analog demuxer NET_C(U7.16, I_V5) - NET_C(U7.6, GND) // INH - NET_C(U7.7, I_V12) // VEE + NET_C(U7.6, GND) // INH + NET_C(U7.7, I_V12) // VEE NET_C(U7.8, GND) - CD4053_DIP(U8) // 3x analog demuxer + CD4053_DIP(U8) // 3x analog demuxer NET_C(U8.16, I_V5) - NET_C(U8.6, GND) // INH - NET_C(U8.7, I_V12) // VEE + NET_C(U8.6, GND) // INH + NET_C(U8.7, I_V12) // VEE NET_C(U8.8, GND) - TL082_DIP(U9) // Op. Amp. + TL082_DIP(U9) // Op. Amp. NET_C(U9.8, I_V12) NET_C(U9.4, I_VM12) -// TTL_74LS139_DIP(U10) // Dual 1-of-4 Decoder -- not emulated +// TTL_74LS139_DIP(U10) // Dual 1-of-4 Decoder -- not emulated -// TTL_74LS139_DIP(U11) // Dual 1-of-4 Decoder -- not emulated +// TTL_74LS139_DIP(U11) // Dual 1-of-4 Decoder -- not emulated -// AD7524_DIP(U12) // DAC -- not emulated -// NET_C(U12.3, GND) -// NET_C(U12.14, I_V5) +// AD7524_DIP(U12) // DAC -- not emulated +// NET_C(U12.3, GND) +// NET_C(U12.14, I_V5) -// AD7524_DIP(U13) // DAC -- not emulated -// NET_C(U12.3, GND) -// NET_C(U12.14, I_V5) +// AD7524_DIP(U13) // DAC -- not emulated +// NET_C(U12.3, GND) +// NET_C(U12.14, I_V5) -// AD7524_DIP(U14) // DAC -- not emulated -// NET_C(U12.3, GND) -// NET_C(U12.14, I_V5) +// AD7524_DIP(U14) // DAC -- not emulated +// NET_C(U12.3, GND) +// NET_C(U12.14, I_V5) - CD4053_DIP(U15) // 3x analog demuxer + CD4053_DIP(U15) // 3x analog demuxer NET_C(U15.16, I_V5) - NET_C(U15.6, GND) // INH - NET_C(U15.7, I_V12) // VEE + NET_C(U15.6, GND) // INH + NET_C(U15.7, I_V12) // VEE NET_C(U15.8, GND) - CD4053_DIP(U16) // 3x analog demuxer + CD4053_DIP(U16) // 3x analog demuxer NET_C(U16.16, I_V5) - NET_C(U16.6, GND) // INH - NET_C(U16.7, I_V12) // VEE + NET_C(U16.6, GND) // INH + NET_C(U16.7, I_V12) // VEE NET_C(U16.8, GND) - TL082_DIP(U17) // Op. Amp. + TL082_DIP(U17) // Op. Amp. NET_C(U17.8, I_V12) NET_C(U17.4, I_VM12) - TL082_DIP(U18) // Op. Amp. + TL082_DIP(U18) // Op. Amp. NET_C(U18.8, I_V12) NET_C(U18.4, I_VM12) - TL082_DIP(U19) // Op. Amp. + TL082_DIP(U19) // Op. Amp. NET_C(U19.8, I_V12) NET_C(U19.4, I_VM12) - TL082_DIP(U20) // Op. Amp. + TL082_DIP(U20) // Op. Amp. NET_C(U20.8, I_V12) NET_C(U20.4, I_VM12) - TL082_DIP(U21) // Op. Amp. + TL082_DIP(U21) // Op. Amp. NET_C(U21.8, I_V12) NET_C(U21.4, I_VM12) - TL082_DIP(U22) // Op. Amp. + TL082_DIP(U22) // Op. Amp. NET_C(U22.8, I_V12) NET_C(U22.4, I_VM12) - TL082_DIP(U23) // Op. Amp. + TL082_DIP(U23) // Op. Amp. NET_C(U23.8, I_V12) NET_C(U23.4, I_VM12) -// AD7524_DIP(U24) // DAC -- not emulated -// NET_C(U24.3, GND) -// NET_C(U24.14, I_V5) +// AD7524_DIP(U24) // DAC -- not emulated +// NET_C(U24.3, GND) +// NET_C(U24.14, I_V5) -// AD7524_DIP(U25) // DAC -- not emulated -// NET_C(U25.3, GND) -// NET_C(U25.14, I_V5) +// AD7524_DIP(U25) // DAC -- not emulated +// NET_C(U25.3, GND) +// NET_C(U25.14, I_V5) -// AD7524_DIP(U26) // DAC -- not emulated -// NET_C(U26.3, GND) -// NET_C(U26.14, I_V5) +// AD7524_DIP(U26) // DAC -- not emulated +// NET_C(U26.3, GND) +// NET_C(U26.14, I_V5) -// AD7524_DIP(U27) // DAC -- not emulated -// NET_C(U27.3, GND) -// NET_C(U27.14, I_V5) +// AD7524_DIP(U27) // DAC -- not emulated +// NET_C(U27.3, GND) +// NET_C(U27.14, I_V5) -// AD7524_DIP(U28) // DAC -- not emulated -// NET_C(U28.3, GND) -// NET_C(U28.14, I_V5) +// AD7524_DIP(U28) // DAC -- not emulated +// NET_C(U28.3, GND) +// NET_C(U28.14, I_V5) -// AD7524_DIP(U29) // DAC -- not emulated -// NET_C(U29.3, GND) -// NET_C(U29.14, I_V5) +// AD7524_DIP(U29) // DAC -- not emulated +// NET_C(U29.3, GND) +// NET_C(U29.14, I_V5) - CD4053_DIP(U30) // 3x analog demuxer + CD4053_DIP(U30) // 3x analog demuxer NET_C(U30.16, I_V5) - NET_C(U30.6, GND) // INH - NET_C(U30.7, I_V12) // VEE + NET_C(U30.6, GND) // INH + NET_C(U30.7, I_V12) // VEE NET_C(U30.8, GND) - CD4053_DIP(U31) // 3x analog demuxer + CD4053_DIP(U31) // 3x analog demuxer NET_C(U31.16, I_V5) - NET_C(U31.6, GND) // INH - NET_C(U31.7, I_V12) // VEE + NET_C(U31.6, GND) // INH + NET_C(U31.7, I_V12) // VEE NET_C(U31.8, GND) -// TTL_74LS74(U38) // Dual D-Type Positive Edge-Triggered Flip-Flop -- not emulated -// NET_C(U38.7, GND) -// NET_C(U38.14, I_V5) +// TTL_74LS74(U38) // Dual D-Type Positive Edge-Triggered Flip-Flop -- not emulated +// NET_C(U38.7, GND) +// NET_C(U38.14, I_V5) - TL081_DIP(U49) // Op. Amp. + TL081_DIP(U49) // Op. Amp. NET_C(U49.7, I_V12) NET_C(U49.4, I_VM12) @@ -533,12 +533,12 @@ NETLIST_START(segausb) NET_C(GND, U15.2, U15.5, U16.2) NET_C(GND, U30.2, U30.5, U31.2) /* - OPTIMIZE_FRONTIER(R48.1, RES_M(1), 50) - OPTIMIZE_FRONTIER(R49.1, RES_M(1), 50) - OPTIMIZE_FRONTIER(R18.1, RES_M(1), 50) - OPTIMIZE_FRONTIER(R19.1, RES_M(1), 50) - OPTIMIZE_FRONTIER(R34.1, RES_M(1), 50) - OPTIMIZE_FRONTIER(R35.1, RES_M(1), 50) + OPTIMIZE_FRONTIER(R48.1, RES_M(1), 50) + OPTIMIZE_FRONTIER(R49.1, RES_M(1), 50) + OPTIMIZE_FRONTIER(R18.1, RES_M(1), 50) + OPTIMIZE_FRONTIER(R19.1, RES_M(1), 50) + OPTIMIZE_FRONTIER(R34.1, RES_M(1), 50) + OPTIMIZE_FRONTIER(R35.1, RES_M(1), 50) */ NETLIST_END() diff --git a/src/mame/audio/nl_spacfury.cpp b/src/mame/audio/nl_spacfury.cpp index 797185e9dd0..c1926f6f817 100644 --- a/src/mame/audio/nl_spacfury.cpp +++ b/src/mame/audio/nl_spacfury.cpp @@ -154,7 +154,7 @@ NETLIST_START(spacfury) // subtle but noticeable effect where the spin "whoosh" is missing // some upper harmonics at 4e-5; however, this is the most demanding // solver in the system and it keeps jumping around as I tweak things -// PARAM(Solver.Solver_21.DYNAMIC_MIN_TIMESTEP, 2e-5) +// PARAM(Solver.Solver_21.DYNAMIC_MIN_TIMESTEP, 2e-5) // Overwrite model - the default model uses minimum datasheet // specifications for 5V. These are for 10V and thus closer to the @@ -203,10 +203,10 @@ NETLIST_START(spacfury) ANALOG_INPUT(I_V12, 12) ANALOG_INPUT(I_VM12, -12) -// RES(R1, RES_K(2.2)) -- part of final amp (not emulated) -// RES(R2, RES_K(10)) -- part of final amp (not emulated) -// RES(R4, RES_K(330)) -- part of final amp (not emulated) -// RES(R5, RES_M(1)) -- part of final amp (not emulated) +// RES(R1, RES_K(2.2)) -- part of final amp (not emulated) +// RES(R2, RES_K(10)) -- part of final amp (not emulated) +// RES(R4, RES_K(330)) -- part of final amp (not emulated) +// RES(R5, RES_M(1)) -- part of final amp (not emulated) RES(R6, RES_K(680)) RES(R7, RES_K(680)) RES(R8, RES_K(10)) @@ -216,7 +216,7 @@ NETLIST_START(spacfury) RES(R12, RES_K(47)) RES(R13, RES_K(47)) RES(R14, RES_M(1)) -// RES(R15, RES_K(100)) -- part of final amp (not emulated) +// RES(R15, RES_K(100)) -- part of final amp (not emulated) RES(R18, RES_K(10)) RES(R19, RES_K(470)) RES(R20, RES_K(22)) @@ -349,23 +349,23 @@ NETLIST_START(spacfury) RES(R148, RES_K(10)) RES(R149, RES_K(220)) -// CAP(C1, CAP_U(4.7)) -- part of final amp (not emulated) -// CAP(C2, CAP_U(0.05)) -// CAP(C3, CAP_U(0.05)) -// CAP(C4, CAP_U(10)) -- part of final amp (not emulated) +// CAP(C1, CAP_U(4.7)) -- part of final amp (not emulated) +// CAP(C2, CAP_U(0.05)) +// CAP(C3, CAP_U(0.05)) +// CAP(C4, CAP_U(10)) -- part of final amp (not emulated) CAP(C5, CAP_U(0.01)) CAP(C6, CAP_U(0.01)) CAP(C7, CAP_U(4.7)) CAP(C8, CAP_U(0.047)) -// CAP(C9, CAP_U(0.05)) -// CAP(C10, CAP_U(0.05)) +// CAP(C9, CAP_U(0.05)) +// CAP(C10, CAP_U(0.05)) CAP(C11, CAP_U(0.01)) CAP(C12, CAP_U(0.01)) CAP(C13, CAP_U(0.01)) CAP(C14, CAP_U(0.01)) CAP(C15, CAP_U(0.01)) -// CAP(C16, CAP_U(0.05)) -// CAP(C17, CAP_U(0.05)) +// CAP(C16, CAP_U(0.05)) +// CAP(C17, CAP_U(0.05)) CAP(C18, CAP_U(0.01)) CAP(C19, CAP_U(0.047)) CAP(C20, CAP_U(0.01)) @@ -373,9 +373,9 @@ NETLIST_START(spacfury) CAP(C22, CAP_U(0.05)) CAP(C23, CAP_U(0.05)) CAP(C24, CAP_U(10)) -// CAP(C25, CAP_U(0.05)) +// CAP(C25, CAP_U(0.05)) CAP(C26, CAP_U(0.0033)) -// CAP(C27, CAP_U(0.05)) +// CAP(C27, CAP_U(0.05)) CAP(C28, CAP_U(0.1)) CAP(C29, CAP_U(0.001)) CAP(C30, CAP_U(0.0022)) @@ -386,15 +386,15 @@ NETLIST_START(spacfury) CAP(C35, CAP_U(0.0033)) CAP(C36, CAP_U(4.7)) CAP(C37, CAP_U(0.0022)) -// CAP(C38, CAP_U(0.05)) -// CAP(C39, CAP_U(0.05)) +// CAP(C38, CAP_U(0.05)) +// CAP(C39, CAP_U(0.05)) CAP(C40, CAP_U(0.047)) CAP(C41, CAP_U(0.0047)) CAP(C42, CAP_U(0.01)) CAP(C43, CAP_U(0.01)) CAP(C44, CAP_U(4.7)) -// CAP(C45, CAP_U(0.05)) -// CAP(C46, CAP_U(0.05)) +// CAP(C45, CAP_U(0.05)) +// CAP(C46, CAP_U(0.05)) CAP(C47, CAP_U(0.047)) CAP(C48, CAP_U(4.7)) CAP(C49, CAP_U(0.1)) @@ -404,30 +404,30 @@ NETLIST_START(spacfury) CAP(C53, CAP_U(10)) CAP(C54, CAP_U(0.1)) CAP(C55, CAP_U(100)) -// CAP(C56, CAP_U(0.05)) +// CAP(C56, CAP_U(0.05)) CAP(C57, CAP_U(4.7)) -// CAP(C58, CAP_U(0.05)) +// CAP(C58, CAP_U(0.05)) CAP(C59, CAP_U(0.01)) CAP(C60, CAP_U(0.01)) CAP(C61, CAP_U(0.047)) CAP(C62, CAP_U(0.047)) CAP(C63, CAP_U(0.05)) CAP(C64, CAP_U(0.05)) -// CAP(C65, CAP_U(0.05)) +// CAP(C65, CAP_U(0.05)) CAP(C66, CAP_U(0.033)) -// CAP(C67, CAP_U(0.05)) +// CAP(C67, CAP_U(0.05)) CAP(C68, CAP_U(0.1)) CAP(C69, CAP_U(0.1)) CAP(C70, CAP_U(0.1)) CAP(C71, CAP_U(0.047)) CAP(C72, CAP_P(100)) CAP(C73, CAP_U(0.1)) -// CAP(C75, CAP_U(10)) -// CAP(C76, CAP_U(10)) -// CAP(C77, CAP_U(0.1)) -// CAP(C78, CAP_U(0.1)) -// CAP(C79, CAP_U(0.1)) -// CAP(C80, CAP_U(0.1)) +// CAP(C75, CAP_U(10)) +// CAP(C76, CAP_U(10)) +// CAP(C77, CAP_U(0.1)) +// CAP(C78, CAP_U(0.1)) +// CAP(C79, CAP_U(0.1)) +// CAP(C80, CAP_U(0.1)) D_1N914(D1) D_1N914(D2) @@ -446,7 +446,7 @@ NETLIST_START(spacfury) D_1N914(D15) D_1N914(D16) -// Q_2N4093(Q1) -- part of final amp (not emulated) +// Q_2N4093(Q1) -- part of final amp (not emulated) Q_2N4093(Q2) Q_2N4093(Q3) Q_2N4403(Q4) @@ -460,39 +460,39 @@ NETLIST_START(spacfury) Q_2N4401(Q12) Q_2N4403(Q13) -// TL082_DIP(U1) // Op. Amp. -- part of final amp (not emulated) -// NET_C(U1.8, I_V12) -// NET_C(U1.4, I_VM12) +// TL082_DIP(U1) // Op. Amp. -- part of final amp (not emulated) +// NET_C(U1.8, I_V12) +// NET_C(U1.4, I_VM12) - TL082_DIP(U2) // Op. Amp. + TL082_DIP(U2) // Op. Amp. NET_C(U2.8, I_V12) NET_C(U2.4, I_VM12) - CD4069_DIP(U3) // Hex Inverter + CD4069_DIP(U3) // Hex Inverter NET_C(U3.7, GND) NET_C(U3.14, I_V12) - TL082_DIP(U4) // Op. Amp. + TL082_DIP(U4) // Op. Amp. NET_C(U4.8, I_V12) NET_C(U4.4, I_VM12) - TL082_DIP(U5) // Op. Amp. + TL082_DIP(U5) // Op. Amp. NET_C(U5.8, I_V12) NET_C(U5.4, I_VM12) - CD4011_DIP(U6) // Quad 2-Input NAND Gates + CD4011_DIP(U6) // Quad 2-Input NAND Gates NET_C(U6.7, GND) NET_C(U6.14, I_V12) - CA3080_SLOW_DIP(U7) // Op. Amp. + CA3080_SLOW_DIP(U7) // Op. Amp. NET_C(U7.4, I_VM12) NET_C(U7.7, I_V12) - TL082_DIP(U8) // Op. Amp. + TL082_DIP(U8) // Op. Amp. NET_C(U8.8, I_V12) NET_C(U8.4, I_VM12) - MM5837_DIP(U9) // Noise Generator + MM5837_DIP(U9) // Noise Generator #if (UNDERCLOCK_NOISE_GEN) // officially runs at 48-112kHz, but little noticeable difference // in exchange for a big performance boost @@ -502,99 +502,99 @@ NETLIST_START(spacfury) // MM5837 instance at a lower frequency to drive it; this // second instance doesn't really exist, it just allows us // a bit more performance - MM5837_DIP(U9B) // Noise Generator + MM5837_DIP(U9B) // Noise Generator PARAM(U9B.FREQ, 12000) #endif - TL082_DIP(U10) // Op. Amp. + TL082_DIP(U10) // Op. Amp. NET_C(U10.8, I_V12) NET_C(U10.4, I_VM12) - CD4024_DIP(U11) // 7-Stage Ripple Binary Counter + CD4024_DIP(U11) // 7-Stage Ripple Binary Counter NET_C(U11.7, GND) NET_C(U11.14, I_V12) - CA3080_SLOW_DIP(U12) // Op. Amp. + CA3080_SLOW_DIP(U12) // Op. Amp. NET_C(U12.4, I_VM12) NET_C(U12.7, I_V12) - TL082_DIP(U13) // Op. Amp. + TL082_DIP(U13) // Op. Amp. NET_C(U13.8, I_V12) NET_C(U13.4, I_VM12) - TL082_DIP(U14) // Op. Amp. + TL082_DIP(U14) // Op. Amp. NET_C(U14.8, I_V12) NET_C(U14.4, I_VM12) - TL082_DIP(U15) // Op. Amp. + TL082_DIP(U15) // Op. Amp. NET_C(U15.8, I_V12) NET_C(U15.4, I_VM12) - TL082_DIP(U16) // Op. Amp. + TL082_DIP(U16) // Op. Amp. NET_C(U16.8, I_V12) NET_C(U16.4, I_VM12) LM555_DIP(U17) - TL082_DIP(U18) // Op. Amp. + TL082_DIP(U18) // Op. Amp. NET_C(U18.8, I_V12) NET_C(U18.4, I_VM12) - CD4069_DIP(U19) // Hex Inverter + CD4069_DIP(U19) // Hex Inverter NET_C(U19.7, GND) NET_C(U19.14, I_V12) - CD4011_DIP(U20) // Quad 2-Input NAND Gates + CD4011_DIP(U20) // Quad 2-Input NAND Gates NET_C(U20.7, GND) NET_C(U20.14, I_V12) - TL082_DIP(U21) // Op. Amp. + TL082_DIP(U21) // Op. Amp. NET_C(U21.8, I_V12) NET_C(U21.4, I_VM12) - CD4011_DIP(U22) // Quad 2-Input NAND Gates + CD4011_DIP(U22) // Quad 2-Input NAND Gates NET_C(U22.7, GND) NET_C(U22.14, I_V12) - TL082_DIP(U23) // Op. Amp. + TL082_DIP(U23) // Op. Amp. NET_C(U23.8, I_V12) NET_C(U23.4, I_VM12) -// TTL_74LS08_DIP(U25) // Quad 2-Input AND Gates -// NET_C(U25.7, GND) -// NET_C(U25.14, I_V5) +// TTL_74LS08_DIP(U25) // Quad 2-Input AND Gates +// NET_C(U25.7, GND) +// NET_C(U25.14, I_V5) - TTL_7407_DIP(U26) // Hex Buffers with High Votage Open-Collector Outputs - NET_C(U26.7, GND) - NET_C(U26.14, I_V5) + TTL_7407_DIP(U26) // Hex Buffers with High Votage Open-Collector Outputs + NET_C(U26.7, GND) + NET_C(U26.14, I_V5) -// TTL_74LS10_DIP(U28) // Triple 3-Input NAND Gate -// NET_C(U28.7, GND) -// NET_C(U28.14, I_V5) +// TTL_74LS10_DIP(U28) // Triple 3-Input NAND Gate +// NET_C(U28.7, GND) +// NET_C(U28.14, I_V5) -// TTL_74LS14_DIP(U30) -// NET_C(U30.7, GND) -// NET_C(U30.14, I_V5) +// TTL_74LS14_DIP(U30) +// NET_C(U30.7, GND) +// NET_C(U30.14, I_V5) - TTL_7406_DIP(U31) // Hex inverter -- currently using a clone of 7416, no open collector behavior + TTL_7406_DIP(U31) // Hex inverter -- currently using a clone of 7416, no open collector behavior NET_C(U31.7, GND) NET_C(U31.14, I_V5) -// TTL_74LS374_DIP(U32) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop -// NET_C(U32.10, GND) -// NET_C(U32.20, I_V5) +// TTL_74LS374_DIP(U32) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop +// NET_C(U32.10, GND) +// NET_C(U32.20, I_V5) // -// TTL_74LS374_DIP(U33) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop -// NET_C(U33.10, GND) -// NET_C(U33.20, I_V5) +// TTL_74LS374_DIP(U33) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop +// NET_C(U33.10, GND) +// NET_C(U33.20, I_V5) -// TTL_74LS30_DIP(U34) // 8-Input NAND Gate -// NET_C(U34.7, GND) -// NET_C(U34.14, I_V5) +// TTL_74LS30_DIP(U34) // 8-Input NAND Gate +// NET_C(U34.7, GND) +// NET_C(U34.14, I_V5) -// TTL_74LS14_DIP(U35) -// NET_C(U35.7, GND) -// NET_C(U35.14, I_V5) +// TTL_74LS14_DIP(U35) +// NET_C(U35.7, GND) +// NET_C(U35.14, I_V5) // // Sheet 7, top (Moving) @@ -1009,7 +1009,7 @@ NETLIST_START(spacfury) NET_C(R140.2, D15.K, C68.2) NET_C(C68.1, C66.1, D13.A, GND) NET_C(D15.A, R102.1, D13.K) // and U21.3 - NET_C(C66.2, R103.1) // and U21.2 + NET_C(C66.2, R103.1) // and U21.2 NET_C(R103.2, R102.2, R84.1)// and U21.1 #if (HLE_SHOOT_VCO) @@ -1023,11 +1023,11 @@ NETLIST_START(spacfury) VARCLOCK(SHOOTCLK, 1, "max(0.000001,min(0.1,(0.0000152345*A0*A0*A0) - (0.0000278973*A0*A0) + (0.000132881*A0) - 0.00000173354))") NET_C(SHOOTCLK.GND, GND) NET_C(SHOOTCLK.VCC, I_V5) - NET_C(SHOOTCLK.A0, D15.K) - NET_C(SHOOTCLK.Q, SHOOTENV.A0) + NET_C(SHOOTCLK.A0, D15.K) + NET_C(SHOOTCLK.Q, SHOOTENV.A0) AFUNC(SHOOTENV, 1, "if(A0>2.5,11.1,-11.1)") NET_C(SHOOTENV.Q, U11.1) - NET_C(GND, U21.3, U21.2) + NET_C(GND, U21.3, U21.2) #else NET_C(D15.A, U21.3) NET_C(U21.2, C66.2) diff --git a/src/mame/audio/nl_starcrus.cpp b/src/mame/audio/nl_starcrus.cpp index 974e772ce98..f300cde61bd 100644 --- a/src/mame/audio/nl_starcrus.cpp +++ b/src/mame/audio/nl_starcrus.cpp @@ -25,12 +25,12 @@ NETLIST_START(starcrus) ANALOG_INPUT(VM5, -5) ALIAS(VCC, V5) - TTL_INPUT(EXPLODE_1, 1) // active low - TTL_INPUT(EXPLODE_2, 1) // active low - TTL_INPUT(LAUNCH_1, 1) // active low - TTL_INPUT(LAUNCH_2, 1) // active low - TTL_INPUT(ENGINE_1, 1) // active low - TTL_INPUT(ENGINE_2, 1) // active low + TTL_INPUT(EXPLODE_1, 1) // active low + TTL_INPUT(EXPLODE_2, 1) // active low + TTL_INPUT(LAUNCH_1, 1) // active low + TTL_INPUT(LAUNCH_2, 1) // active low + TTL_INPUT(ENGINE_1, 1) // active low + TTL_INPUT(ENGINE_2, 1) // active low NET_C(GND, EXPLODE_1.GND, EXPLODE_2.GND, LAUNCH_1.GND, LAUNCH_2.GND, ENGINE_1.GND, ENGINE_2.GND) NET_C(V5, EXPLODE_1.VCC, EXPLODE_2.VCC, LAUNCH_1.VCC, LAUNCH_2.VCC, ENGINE_1.VCC, ENGINE_2.VCC) @@ -151,7 +151,7 @@ NETLIST_START(starcrus) NET_C(LAUNCH_1, H6.1, H6.2) NET_C(LAUNCH_2, H6.12, H6.13) - TTL_7404_GATE(F8) + TTL_7404_INVERT(F8) NET_C(F8.GND, GND) NET_C(F8.VCC, V5) NET_C(H6.6, F8.A) diff --git a/src/mame/audio/nl_starfire.cpp b/src/mame/audio/nl_starfire.cpp index f2ed1546161..cf071f08e52 100644 --- a/src/mame/audio/nl_starfire.cpp +++ b/src/mame/audio/nl_starfire.cpp @@ -37,56 +37,56 @@ static NETLIST_START(NE556_DIP) NETLIST_END() static NETLIST_START(ICL8038_DIP) - VCVS(VI, 1) - CCCS(CI1, -1) - CCCS(CI2, 2) - SYS_COMPD(COMP) - SYS_DSW2(SW) - VCVS(VO, 1) - RES(R_SHUNT, RES_R(50)) - - PARAM(VO.RO, 50) - PARAM(COMP.MODEL, "FAMILY(TYPE=CUSTOM IVL=0.16 IVH=0.4 OVL=0.01 OVH=0.01 ORL=50 ORH=50)") - PARAM(SW.GOFF, 0) // This has to be zero to block current sources - - NET_C(VI.OP, CI1.IN, CI2.IN) - NET_C(CI1.OP, VO.IP) - NET_C(COMP.Q, SW.I) - NET_C(CI2.OP, SW.2) - NET_C(COMP.VCC, R_SHUNT.1) - NET_C(SW.1, R_SHUNT.2) - NET_C(SW.3, VO.IP) - NET_C(VO.OP, COMP.IN) - - // Avoid singular Matrix due to G=0 switch - RES(RX1, 1e10) - RES(RX2, 1e10) - NET_C(RX1.1, SW.1) - NET_C(RX2.1, SW.3) - - NET_C(COMP.GND, RX1.2, RX2.2) - - RES(R1, 5000) - RES(R2, 5000) - RES(R3, 5000) - - // Square output wave - VCVS(V_SQR, 1) - NET_C(COMP.Q, V_SQR.IP) - - NET_C(COMP.GND, SW.GND, VI.ON, VI.IN, CI1.ON, CI2.ON, VO.IN, VO.ON, R2.2, V_SQR.IN, V_SQR.ON) - NET_C(COMP.VCC, SW.VCC, R1.2) - NET_C(COMP.IP, R1.1, R2.1, R3.1) - NET_C(COMP.Q, R3.2) - - ALIAS(11, VI.ON) // GND - ALIAS(9, V_SQR.OP) // Square out - ALIAS(3, VO.OP) // Triag out - ALIAS(8, VI.IP) // VC - ALIAS(4, CI1.IP) // R1 - ALIAS(5, CI2.IP) // R2 - ALIAS(10, VO.IP) // C1 - ALIAS(6, COMP.VCC) // V+ + VCVS(VI, 1) + CCCS(CI1, -1) + CCCS(CI2, 2) + SYS_COMPD(COMP) + SYS_DSW2(SW) + VCVS(VO, 1) + RES(R_SHUNT, RES_R(50)) + + PARAM(VO.RO, 50) + PARAM(COMP.MODEL, "FAMILY(TYPE=CUSTOM IVL=0.16 IVH=0.4 OVL=0.01 OVH=0.01 ORL=50 ORH=50)") + PARAM(SW.GOFF, 0) // This has to be zero to block current sources + + NET_C(VI.OP, CI1.IN, CI2.IN) + NET_C(CI1.OP, VO.IP) + NET_C(COMP.Q, SW.I) + NET_C(CI2.OP, SW.2) + NET_C(COMP.VCC, R_SHUNT.1) + NET_C(SW.1, R_SHUNT.2) + NET_C(SW.3, VO.IP) + NET_C(VO.OP, COMP.IN) + + // Avoid singular Matrix due to G=0 switch + RES(RX1, 1e10) + RES(RX2, 1e10) + NET_C(RX1.1, SW.1) + NET_C(RX2.1, SW.3) + + NET_C(COMP.GND, RX1.2, RX2.2) + + RES(R1, 5000) + RES(R2, 5000) + RES(R3, 5000) + + // Square output wave + VCVS(V_SQR, 1) + NET_C(COMP.Q, V_SQR.IP) + + NET_C(COMP.GND, SW.GND, VI.ON, VI.IN, CI1.ON, CI2.ON, VO.IN, VO.ON, R2.2, V_SQR.IN, V_SQR.ON) + NET_C(COMP.VCC, SW.VCC, R1.2) + NET_C(COMP.IP, R1.1, R2.1, R3.1) + NET_C(COMP.Q, R3.2) + + ALIAS(11, VI.ON) // GND + ALIAS(9, V_SQR.OP) // Square out + ALIAS(3, VO.OP) // Triag out + ALIAS(8, VI.IP) // VC + ALIAS(4, CI1.IP) // R1 + ALIAS(5, CI2.IP) // R2 + ALIAS(10, VO.IP) // C1 + ALIAS(6, COMP.VCC) // V+ NETLIST_END() // @@ -106,14 +106,14 @@ NETLIST_START(starfire) ANALOG_INPUT(VM5, -5) ALIAS(VCC, V5) - TTL_INPUT(SIZE, 0) // active high - TTL_INPUT(SEXPLO, 0) // active high - TTL_INPUT(STIE, 0) // active high - TTL_INPUT(SLASER, 0) // active high - TTL_INPUT(TRACK, 0) // active high - TTL_INPUT(LOCK, 0) // active high - TTL_INPUT(SCANNER, 0) // active high - TTL_INPUT(OHEAT, 0) // active high + TTL_INPUT(SIZE, 0) // active high + TTL_INPUT(SEXPLO, 0) // active high + TTL_INPUT(STIE, 0) // active high + TTL_INPUT(SLASER, 0) // active high + TTL_INPUT(TRACK, 0) // active high + TTL_INPUT(LOCK, 0) // active high + TTL_INPUT(SCANNER, 0) // active high + TTL_INPUT(OHEAT, 0) // active high NET_C(VCC, SIZE.VCC, SEXPLO.VCC, STIE.VCC, SLASER.VCC, TRACK.VCC, LOCK.VCC, SCANNER.VCC, OHEAT.VCC) NET_C(GND, SIZE.GND, SEXPLO.GND, STIE.GND, SLASER.GND, TRACK.GND, LOCK.GND, SCANNER.GND, OHEAT.GND) diff --git a/src/mame/audio/nl_tankbatt.cpp b/src/mame/audio/nl_tankbatt.cpp index 0e2345e6db9..ac19ef51f4d 100644 --- a/src/mame/audio/nl_tankbatt.cpp +++ b/src/mame/audio/nl_tankbatt.cpp @@ -26,12 +26,12 @@ NETLIST_START(tankbatt) CLOCK(2V, 4000) // 18.432MHz / (3 * 384 * 2) CLOCK(4V, 2000) // 18.432MHz / (3 * 384 * 4) - TTL_INPUT(S1, 0) // active high - TTL_INPUT(S2, 0) // active high - TTL_INPUT(OFF, 1) // active high - TTL_INPUT(ENGINE_HI, 0) // active high - TTL_INPUT(SHOOT, 0) // active high - TTL_INPUT(HIT, 0) // active high + TTL_INPUT(S1, 0) // active high + TTL_INPUT(S2, 0) // active high + TTL_INPUT(OFF, 1) // active high + TTL_INPUT(ENGINE_HI, 0) // active high + TTL_INPUT(SHOOT, 0) // active high + TTL_INPUT(HIT, 0) // active high RES(R31, 470) RES(R32, 470) diff --git a/src/mame/audio/segaspeech.h b/src/mame/audio/segaspeech.h index a9905ce05f5..81894b2ce25 100644 --- a/src/mame/audio/segaspeech.h +++ b/src/mame/audio/segaspeech.h @@ -21,7 +21,7 @@ class sega_speech_device : public device_t, public device_mixer_interface public: sega_speech_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); -// auto int_cb() { return m_int_cb.bind(); } +// auto int_cb() { return m_int_cb.bind(); } void data_w(uint8_t data); void control_w(uint8_t data); diff --git a/src/mame/drivers/abc1600.cpp b/src/mame/drivers/abc1600.cpp index 89e2ab0bb6b..6c74c328f54 100644 --- a/src/mame/drivers/abc1600.cpp +++ b/src/mame/drivers/abc1600.cpp @@ -17,7 +17,7 @@ sa(40,0) y 5 - necd5126a + micr1325a How to install OS: ------------------ @@ -66,8 +66,6 @@ - CIO - optimize timers! - port C, open drain output bit PC1 (RTC/NVRAM data) - - hard disk - - 4105 SASI interface card - connect RS-232 printer port - Z80 SCC/DART interrupt chain - Z80 SCC DMA request @@ -463,19 +461,16 @@ void abc1600_state::spec_contr_reg_w(uint8_t data) m_sysscc = state; m_cio->pb5_w(!state); - m_bus1->pren_w(!state); - update_drdy1(); + update_drdy1(0); break; case 7: // SYSFS m_sysfs = state; m_cio->pb6_w(!state); - m_bus0i->pren_w(!state); - m_bus0x->pren_w(!state); - update_drdy0(); + update_drdy0(0); break; } } @@ -549,7 +544,23 @@ INPUT_PORTS_END // Z80DMA 0 //------------------------------------------------- -void abc1600_state::update_drdy0() +void abc1600_state::update_pren0(int state) +{ + if (m_sysfs) + { + // floppy + m_dma0->iei_w(0); + } + else + { + // BUS0I/BUS0X + bool pren0 = m_bus0i->pren_r() && m_bus0x->pren_r(); + + m_dma0->iei_w(!pren0); + } +} + +void abc1600_state::update_drdy0(int state) { if (m_sysfs) { @@ -574,28 +585,32 @@ WRITE_LINE_MEMBER( abc1600_state::dbrq_w ) // Z80DMA 1 //------------------------------------------------- -void abc1600_state::update_drdy1() +void abc1600_state::update_pren1(int state) { if (m_sysscc) { // SCC - m_dma1->rdy_w(1); + m_dma1->iei_w(1); } else { // BUS1 - m_dma1->rdy_w(m_bus1->trrq_r()); + m_dma1->iei_w(!m_bus1->pren_r()); } } -//------------------------------------------------- -// Z80DMA 2 -//------------------------------------------------- - -void abc1600_state::update_drdy2() +void abc1600_state::update_drdy1(int state) { - // Winchester - m_dma2->rdy_w(1); + if (m_sysscc) + { + // SCC + m_dma1->rdy_w(m_sccrq_a && m_sccrq_b); + } + else + { + // BUS1 + m_dma1->rdy_w(m_bus1->trrq_r()); + } } //------------------------------------------------- @@ -779,11 +794,6 @@ static void abc1600_floppies(device_slot_interface &device) device.option_add("525qd", FLOPPY_525_QD); } -WRITE_LINE_MEMBER( abc1600_state::fdc_drq_w ) -{ - update_drdy0(); -} - //------------------------------------------------- // ABC1600BUS_INTERFACE( abcbus_intf ) @@ -822,7 +832,10 @@ void abc1600_state::machine_start() save_item(NAME(m_bus0)); save_item(NAME(m_csb)); save_item(NAME(m_atce)); - save_item(NAME(m_btce)); + save_item(NAME(m_sccrq_a)); + save_item(NAME(m_sccrq_b)); + save_item(NAME(m_scc_irq)); + save_item(NAME(m_dart_irq)); } @@ -863,35 +876,39 @@ void abc1600_state::abc1600(machine_config &config) ABC1600_MOVER(config, ABC1600_MOVER_TAG, 0); // devices - abc1600_mac_device &mac(ABC1600_MAC(config, "mac", 0)); - mac.set_addrmap(AS_PROGRAM, &abc1600_state::mac_mem); - mac.set_cpu_tag(m_maincpu); + ABC1600_MAC(config, m_mac, 0); + m_mac->set_addrmap(AS_PROGRAM, &abc1600_state::mac_mem); + m_mac->set_cpu_tag(m_maincpu); Z80DMA(config, m_dma0, 64_MHz_XTAL / 16); m_dma0->out_busreq_callback().set(FUNC(abc1600_state::dbrq_w)); m_dma0->out_bao_callback().set(m_dma1, FUNC(z80dma_device::bai_w)); - m_dma0->in_mreq_callback().set(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::dma0_mreq_r)); - m_dma0->out_mreq_callback().set(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::dma0_mreq_w)); - m_dma0->in_iorq_callback().set(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::dma0_iorq_r)); - m_dma0->out_iorq_callback().set(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::dma0_iorq_w)); + m_dma0->in_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma0_mreq_r)); + m_dma0->out_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma0_mreq_w)); + m_dma0->out_ieo_callback().set(m_bus0i, FUNC(abcbus_slot_device::prac_w)); + //m_dma0->out_ieo_callback().set(m_bus0x, FUNC(abcbus_slot_device::prac_w)); + m_dma0->in_iorq_callback().set(FUNC(abc1600_state::dma0_iorq_r)); + m_dma0->out_iorq_callback().set(FUNC(abc1600_state::dma0_iorq_w)); Z80DMA(config, m_dma1, 64_MHz_XTAL / 16); m_dma1->out_busreq_callback().set(FUNC(abc1600_state::dbrq_w)); m_dma1->out_bao_callback().set(m_dma2, FUNC(z80dma_device::bai_w)); - m_dma1->in_mreq_callback().set(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::dma1_mreq_r)); - m_dma1->out_mreq_callback().set(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::dma1_mreq_w)); - m_dma1->in_iorq_callback().set(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::dma1_iorq_r)); - m_dma1->out_iorq_callback().set(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::dma1_iorq_w)); + m_dma1->in_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma1_mreq_r)); + m_dma1->out_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma1_mreq_w)); + m_dma1->out_ieo_callback().set(m_bus1, FUNC(abcbus_slot_device::prac_w)); + m_dma1->in_iorq_callback().set(FUNC(abc1600_state::dma1_iorq_r)); + m_dma1->out_iorq_callback().set(FUNC(abc1600_state::dma1_iorq_w)); Z80DMA(config, m_dma2, 64_MHz_XTAL / 16); m_dma2->out_busreq_callback().set(FUNC(abc1600_state::dbrq_w)); - m_dma2->in_mreq_callback().set(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::dma2_mreq_r)); - m_dma2->out_mreq_callback().set(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::dma2_mreq_w)); - m_dma2->in_iorq_callback().set(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::dma2_iorq_r)); - m_dma2->out_iorq_callback().set(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::dma2_iorq_w)); + m_dma2->in_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma2_mreq_r)); + m_dma2->out_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma2_mreq_w)); + m_dma2->out_ieo_callback().set(m_bus2, FUNC(abcbus_slot_device::prac_w)); + m_dma2->in_iorq_callback().set(m_bus2, FUNC(abcbus_slot_device::read_tren)); + m_dma2->out_iorq_callback().set(m_bus2, FUNC(abcbus_slot_device::write_tren)); Z80DART(config, m_dart, 64_MHz_XTAL / 16); - m_dart->out_int_callback().set_inputline(m_maincpu, M68K_IRQ_5); // shared with SCC + m_dart->out_int_callback().set(FUNC(abc1600_state::dart_irq_w)); m_dart->out_txda_callback().set(RS232_PR_TAG, FUNC(rs232_port_device::write_txd)); //m_dart->out_dtra_callback().set(RS232_PR_TAG, FUNC(rs232_port_device::write_dcd)); //m_dart->out_rtsa_callback().set(RS232_PR_TAG, FUNC(rs232_port_device::write_cts)); @@ -903,14 +920,14 @@ void abc1600_state::abc1600(machine_config &config) kb.out_keydown_handler().set(m_dart, FUNC(z80dart_device::dcdb_w)); rs232_port_device &rs232pr(RS232_PORT(config, RS232_PR_TAG, default_rs232_devices, nullptr)); - rs232pr.rxd_handler().set(Z8470AB1_TAG, FUNC(z80dart_device::rxa_w)); - //rs232pr.rts_handler().set(Z8470AB1_TAG, FUNC(z80dart_device::ctsa_w)); - //rs232pr.dtr_handler().set(Z8470AB1_TAG, FUNC(z80dart_device::dcda_w)); + rs232pr.rxd_handler().set(m_dart, FUNC(z80dart_device::rxa_w)); + //rs232pr.rts_handler().set(m_dart, FUNC(z80dart_device::ctsa_w)); + //rs232pr.dtr_handler().set(m_dart, FUNC(z80dart_device::dcda_w)); SCC8530N(config, m_scc, 64_MHz_XTAL / 16); - m_scc->out_int_callback().set_inputline(MC68008P8_TAG, M68K_IRQ_5); - //m_scc->out_wreqa_callback().set(FUNC(abc1600_state::sccrq_w)); - //m_scc->out_wreqb_callback().set(FUNC(abc1600_state::sccrq_w)); + m_scc->out_int_callback().set(FUNC(abc1600_state::scc_irq_w)); + m_scc->out_wreqa_callback().set(FUNC(abc1600_state::sccrq_a_w)); + m_scc->out_wreqb_callback().set(FUNC(abc1600_state::sccrq_b_w)); m_scc->out_txda_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_txd)); m_scc->out_dtra_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_dtr)); m_scc->out_rtsa_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_rts)); @@ -919,15 +936,16 @@ void abc1600_state::abc1600(machine_config &config) m_scc->out_rtsb_callback().set(RS232_B_TAG, FUNC(rs232_port_device::write_rts)); rs232_port_device &rs232a(RS232_PORT(config, RS232_A_TAG, default_rs232_devices, nullptr)); - rs232a.rxd_handler().set(Z8530B1_TAG, FUNC(scc8530_device::rxa_w)); - rs232a.cts_handler().set(Z8530B1_TAG, FUNC(scc8530_device::ctsa_w)); - rs232a.dcd_handler().set(Z8530B1_TAG, FUNC(scc8530_device::dcda_w)); - rs232a.ri_handler().set(Z8530B1_TAG, FUNC(scc8530_device::synca_w)); + rs232a.rxd_handler().set(m_scc, FUNC(scc8530_device::rxa_w)); + rs232a.cts_handler().set(m_scc, FUNC(scc8530_device::ctsa_w)); + rs232a.dcd_handler().set(m_scc, FUNC(scc8530_device::dcda_w)); + rs232a.ri_handler().set(m_scc, FUNC(scc8530_device::synca_w)); + rs232_port_device &rs232b(RS232_PORT(config, RS232_B_TAG, default_rs232_devices, nullptr)); - rs232b.rxd_handler().set(Z8530B1_TAG, FUNC(scc8530_device::rxb_w)); - rs232b.cts_handler().set(Z8530B1_TAG, FUNC(scc8530_device::ctsb_w)); - rs232b.dcd_handler().set(Z8530B1_TAG, FUNC(scc8530_device::dcdb_w)); - rs232b.ri_handler().set(Z8530B1_TAG, FUNC(scc8530_device::syncb_w)); + rs232b.rxd_handler().set(m_scc, FUNC(scc8530_device::rxb_w)); + rs232b.cts_handler().set(m_scc, FUNC(scc8530_device::ctsb_w)); + rs232b.dcd_handler().set(m_scc, FUNC(scc8530_device::dcdb_w)); + rs232b.ri_handler().set(m_scc, FUNC(scc8530_device::syncb_w)); Z8536(config, m_cio, 64_MHz_XTAL / 16); m_cio->irq_wr_cb().set_inputline(MC68008P8_TAG, M68K_IRQ_2); @@ -943,27 +961,36 @@ void abc1600_state::abc1600(machine_config &config) FD1797(config, m_fdc, 64_MHz_XTAL / 64); m_fdc->intrq_wr_callback().set(m_cio, FUNC(z8536_device::pb7_w)); - m_fdc->drq_wr_callback().set(FUNC(abc1600_state::fdc_drq_w)); + m_fdc->drq_wr_callback().set(FUNC(abc1600_state::update_drdy0)); FLOPPY_CONNECTOR(config, SAB1797_02P_TAG":0", abc1600_floppies, nullptr, floppy_image_device::default_floppy_formats); FLOPPY_CONNECTOR(config, SAB1797_02P_TAG":1", abc1600_floppies, nullptr, floppy_image_device::default_floppy_formats); FLOPPY_CONNECTOR(config, SAB1797_02P_TAG":2", abc1600_floppies, "525qd", floppy_image_device::default_floppy_formats); - abcbus_slot_device &bus0i(ABCBUS_SLOT(config, "bus0i", 64_MHz_XTAL / 16, abc1600bus_cards, nullptr)); - bus0i.irq_callback().set(m_cio, FUNC(z8536_device::pa7_w)); - abcbus_slot_device &bus0x(ABCBUS_SLOT(config, "bus0x", 64_MHz_XTAL / 16, abc1600bus_cards, nullptr)); - bus0x.irq_callback().set(m_cio, FUNC(z8536_device::pa6_w)); - bus0x.nmi_callback().set(FUNC(abc1600_state::nmi_w)); - bus0x.xint2_callback().set(m_cio, FUNC(z8536_device::pa2_w)); - bus0x.xint3_callback().set(m_cio, FUNC(z8536_device::pa3_w)); - bus0x.xint4_callback().set(m_cio, FUNC(z8536_device::pa4_w)); - bus0x.xint5_callback().set(m_cio, FUNC(z8536_device::pa5_w)); - abcbus_slot_device &bus1(ABCBUS_SLOT(config, "bus1", 64_MHz_XTAL / 16, abc1600bus_cards, nullptr)); - bus1.irq_callback().set(m_cio, FUNC(z8536_device::pa1_w)); - abcbus_slot_device &bus2(ABCBUS_SLOT(config, "bus2", 64_MHz_XTAL / 16, abc1600bus_cards, "4105")); - bus2.irq_callback().set(m_cio, FUNC(z8536_device::pa0_w)); - //bus2.pren_callback().set(Z8410AB1_2_TAG, FUNC(z80dma_device::iei_w)); - bus2.trrq_callback().set(Z8410AB1_2_TAG, FUNC(z80dma_device::rdy_w)); + ABCBUS_SLOT(config, m_bus0i, 64_MHz_XTAL / 16, abc1600bus_cards, nullptr); + m_bus0i->irq_callback().set(m_cio, FUNC(z8536_device::pa7_w)); + m_bus0i->pren_callback().set(FUNC(abc1600_state::update_pren0)); + m_bus0i->trrq_callback().set(FUNC(abc1600_state::update_drdy0)); + + ABCBUS_SLOT(config, m_bus0x, 64_MHz_XTAL / 16, abc1600bus_cards, nullptr); + m_bus0x->irq_callback().set(m_cio, FUNC(z8536_device::pa6_w)); + m_bus0x->nmi_callback().set(FUNC(abc1600_state::nmi_w)); + m_bus0x->xint2_callback().set(m_cio, FUNC(z8536_device::pa2_w)); + m_bus0x->xint3_callback().set(m_cio, FUNC(z8536_device::pa3_w)); + m_bus0x->xint4_callback().set(m_cio, FUNC(z8536_device::pa4_w)); + m_bus0x->xint5_callback().set(m_cio, FUNC(z8536_device::pa5_w)); + m_bus0x->pren_callback().set(FUNC(abc1600_state::update_pren0)); + m_bus0x->trrq_callback().set(FUNC(abc1600_state::update_drdy0)); + + ABCBUS_SLOT(config, m_bus1, 64_MHz_XTAL / 16, abc1600bus_cards, nullptr); + m_bus1->irq_callback().set(m_cio, FUNC(z8536_device::pa1_w)); + m_bus1->pren_callback().set(FUNC(abc1600_state::update_pren1)); + m_bus1->trrq_callback().set(FUNC(abc1600_state::update_drdy1)); + + ABCBUS_SLOT(config, m_bus2, 64_MHz_XTAL / 16, abc1600bus_cards, "4105"); + m_bus2->irq_callback().set(m_cio, FUNC(z8536_device::pa0_w)); + m_bus2->pren_callback().set(m_dma2, FUNC(z80dma_device::iei_w)); + m_bus2->trrq_callback().set(m_dma2, FUNC(z80dma_device::rdy_w)); // internal ram RAM(config, RAM_TAG).set_default_size("1M"); diff --git a/src/mame/drivers/apple2gs.cpp b/src/mame/drivers/apple2gs.cpp index f68c9534966..8eaeee9e18a 100644 --- a/src/mame/drivers/apple2gs.cpp +++ b/src/mame/drivers/apple2gs.cpp @@ -4568,7 +4568,7 @@ static void apple2_cards(device_slot_interface &device) // device.option_add("pcxport", A2BUS_PCXPORTER); /* Applied Engineering PC Transporter */ device.option_add("byte8251", A2BUS_BYTE8251); /* BYTE Magazine 8251 serial card */ // device.option_add("hostram", A2BUS_HOSTRAM); /* Slot 7 RAM for GS Plus host protocol */ -// device.option_add("ramfast", A2BUS_RAMFAST); /* C.V. Technologies RAMFast SCSI card */ +// device.option_add("ramfast", A2BUS_RAMFAST); /* C.V. Technologies RAMFast SCSI card */ device.option_add("cmsscsi", A2BUS_CMSSCSI); /* CMS Apple II SCSI Card */ } diff --git a/src/mame/drivers/astrocde.cpp b/src/mame/drivers/astrocde.cpp index cb8c2cb98ae..eda7f8b7c81 100644 --- a/src/mame/drivers/astrocde.cpp +++ b/src/mame/drivers/astrocde.cpp @@ -124,6 +124,7 @@ #include "machine/watchdog.h" #include "sound/ay8910.h" #include "sound/votrax.h" +#include "sound/flt_rc.h" #include "speaker.h" @@ -397,10 +398,11 @@ void tenpindx_state::lights_w(uint8_t data) void astrocde_state::votrax_speech_w(uint8_t data) { - m_votrax->inflection_w(data >> 6); + // Note that the frequency change is smooth, but we just can't + // handle that. + m_votrax->set_clock(data & 0x40 ? 782000 : 756000); + m_votrax->inflection_w(data & 0x80 ? 0 : 2); m_votrax->write(data & 0x3f); - - /* Note : We should really also use volume in this as well as frequency */ } @@ -1355,8 +1357,13 @@ void astrocde_state::wow(machine_config &config) m_astrocade_sound1->so_cb<5>().set("outlatch", FUNC(cd4099_device::write_nibble_d0)); m_astrocade_sound1->so_cb<7>().set(FUNC(astrocde_state::votrax_speech_w)); - VOTRAX_SC01(config, m_votrax, 720000); - m_votrax->add_route(ALL_OUTPUTS, "center", 0.85); + VOTRAX_SC01(config, m_votrax, 756000); + + m_votrax->add_route(0, "f1", 0.85); + FILTER_RC(config, "f1").set_lowpass(110e3, 560e-12).add_route(0, "f2", 1.00); + FILTER_RC(config, "f2").set_lowpass(110e3, 560e-12).add_route(0, "f3", 1.00); + FILTER_RC(config, "f3").set_lowpass(110e3, 560e-12).add_route(0, "f4", 1.00); + FILTER_RC(config, "f4").set_lowpass(110e3, 560e-12).add_route(0, "center", 1.00); } void astrocde_state::gorf(machine_config &config) @@ -1406,7 +1413,7 @@ void astrocde_state::gorf(machine_config &config) ASTROCADE_IO(config, "astrocade2", ASTROCADE_CLOCK/4).add_route(ALL_OUTPUTS, "lower", 1.0); - VOTRAX_SC01(config, m_votrax, 720000); + VOTRAX_SC01(config, m_votrax, 756000); m_votrax->add_route(ALL_OUTPUTS, "upper", 0.85); } diff --git a/src/mame/drivers/dpb7000.cpp b/src/mame/drivers/dpb7000.cpp index 7b9dd96bb17..7459e202056 100644 --- a/src/mame/drivers/dpb7000.cpp +++ b/src/mame/drivers/dpb7000.cpp @@ -11,7 +11,9 @@ #include "emu.h" #include "bus/rs232/rs232.h" #include "cpu/m68000/m68000.h" +#include "cpu/m6800/m6800.h" #include "cpu/m6800/m6801.h" +#include "cpu/mcs48/mcs48.h" #include "imagedev/floppy.h" #include "machine/6850acia.h" #include "machine/am25s55x.h" @@ -20,6 +22,7 @@ #include "machine/com8116.h" #include "machine/fdc_pll.h" #include "machine/input_merger.h" +#include "machine/mc68681.h" #include "machine/tdc1008.h" #include "video/mc6845.h" #include "emupal.h" @@ -42,10 +45,12 @@ #define LOG_COMBINER (1 << 13) #define LOG_SIZE_CARD (1 << 14) #define LOG_FILTER_CARD (1 << 15) +#define LOG_KEYBC (1 << 16) +#define LOG_TDS (1 << 17) #define LOG_ALL (LOG_UNKNOWN | LOG_CSR | LOG_CTRLBUS | LOG_SYS_CTRL | LOG_FDC_CTRL | LOG_FDC_PORT | LOG_FDC_CMD | LOG_FDC_MECH | LOG_BRUSH_ADDR | \ LOG_STORE_ADDR | LOG_COMBINER | LOG_SIZE_CARD | LOG_FILTER_CARD) -#define VERBOSE (0)//(LOG_ALL &~ LOG_FDC_CTRL) +#define VERBOSE (LOG_TDS) #include "logmacro.h" class dpb7000_state : public driver_device @@ -57,7 +62,7 @@ public: , m_acia(*this, "fd%u", 0U) , m_p_int(*this, "p_int") , m_brg(*this, "brg") - , m_rs232(*this, "rs232") + , m_rs232(*this, "rs232%u", 0U) , m_crtc(*this, "crtc") , m_palette(*this, "palette") , m_vdu_ram(*this, "vduram") @@ -73,6 +78,11 @@ public: , m_fdd_serial(*this, "fddserial") , m_floppy0(*this, "0") , m_floppy(nullptr) + , m_keybcpu(*this, "keybcpu") + , m_keybc_cols(*this, "KEYB_COL%u", 0U) + , m_tds_cpu(*this, "tds") + , m_tds_duart(*this, "tds_duart") + , m_tds_dips(*this, "TDSDIPS") , m_filter_signalprom(*this, "filter_signalprom") , m_filter_multprom(*this, "filter_multprom") , m_filter_signal(nullptr) @@ -99,6 +109,8 @@ private: void main_map(address_map &map); void fddcpu_map(address_map &map); + void keybcpu_map(address_map &map); + void tds_cpu_map(address_map &map); uint16_t bus_error_r(offs_t offset); void bus_error_w(offs_t offset, uint16_t data); @@ -152,7 +164,7 @@ private: required_device_array<acia6850_device, 3> m_acia; required_device<input_merger_device> m_p_int; required_device<com8116_device> m_brg; - required_device<rs232_port_device> m_rs232; + required_device_array<rs232_port_device, 2> m_rs232; required_device<sy6545_1_device> m_crtc; required_device<palette_device> m_palette; required_shared_ptr<uint16_t> m_vdu_ram; @@ -306,6 +318,36 @@ private: uint8_t m_matte_u[2]; uint8_t m_matte_v[2]; + // Keyboard + required_device<i8039_device> m_keybcpu; + required_ioport_array<8> m_keybc_cols; + uint8_t keyboard_p1_r(); + uint8_t keyboard_p2_r(); + void keyboard_p1_w(uint8_t data); + void keyboard_p2_w(uint8_t data); + DECLARE_READ_LINE_MEMBER(keyboard_t0_r); + DECLARE_READ_LINE_MEMBER(keyboard_t1_r); + uint8_t m_keybc_latched_bit; + uint8_t m_keybc_p1_data; + uint8_t m_keybc_tx; + + // TDS Box + required_device<m6803_cpu_device> m_tds_cpu; + required_device<scn2681_device> m_tds_duart; + required_ioport m_tds_dips; + uint8_t tds_p1_r(); + uint8_t tds_p2_r(); + void tds_p1_w(uint8_t data); + void tds_p2_w(uint8_t data); + void tds_dac_w(uint8_t data); + void tds_convert_w(uint8_t data); + uint8_t tds_adc_r(); + uint8_t tds_pen_switches_r(); + DECLARE_WRITE_LINE_MEMBER(duart_b_w); + uint8_t m_tds_dac_value; + uint8_t m_tds_adc_value; + uint8_t m_tds_p1_data; + // Filter Card required_memory_region m_filter_signalprom; required_memory_region m_filter_multprom; @@ -358,30 +400,135 @@ void dpb7000_state::fddcpu_map(address_map &map) map(0xf800, 0xffff).rom().region("fddprom", 0); } +void dpb7000_state::keybcpu_map(address_map &map) +{ + map(0x000, 0x7ff).rom().region("keyboard", 0); +} + +void dpb7000_state::tds_cpu_map(address_map &map) +{ + map(0x2000, 0x2000).w(FUNC(dpb7000_state::tds_dac_w)); + map(0x2001, 0x2001).w(FUNC(dpb7000_state::tds_convert_w)); + map(0x2003, 0x2003).r(FUNC(dpb7000_state::tds_adc_r)); + map(0x2007, 0x2007).r(FUNC(dpb7000_state::tds_pen_switches_r)); + map(0x4000, 0x400f).rw(m_tds_duart, FUNC(scn2681_device::read), FUNC(scn2681_device::write)); + map(0xe000, 0xffff).rom().region("tds", 0); +} + static INPUT_PORTS_START( dpb7000 ) + PORT_START("KEYB_COL0") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') + + PORT_START("KEYB_COL1") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("7 \' @") PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') PORT_CHAR('@') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') + + PORT_START("KEYB_COL2") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') + + PORT_START("KEYB_COL3") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(". : >") PORT_CODE(KEYCODE_STOP) PORT_CHAR ('.') PORT_CHAR(':') PORT_CHAR('>') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("\" = #") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\"') PORT_CHAR('=') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('d') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('-') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) // 0x16 - arrow key? + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') + + PORT_START("KEYB_COL4") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('\\') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("2 \" _") PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('\"') PORT_CHAR('_') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') + + PORT_START("KEYB_COL5") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_LCONTROL) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) // 0x1b - arrow key? + PORT_BIT(0xe0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KEYB_COL6") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_RSHIFT) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('^') PORT_CHAR('|') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('~') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) // 0x1a - arrow key? + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('\x19') PORT_CHAR('*') + + PORT_START("KEYB_COL7") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) // 0x0b + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNUSED) // 0x09 + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Esc") PORT_CODE(KEYCODE_ESC) // 0x7f + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Delete") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR('\x08') // 0x08 + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4_PAD) // 0x7f + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) //PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER) PORT_CHAR('\x0d') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER) PORT_CHAR('\x0d') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) // PORT_NAME("Carriage Return") PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR('\x0d') + + PORT_START("TDSDIPS") + PORT_DIPNAME(0x08, 0x00, "TDS Box Encoding") + PORT_DIPSETTING( 0x08, "Binary") + PORT_DIPSETTING( 0x00, "ASCII") + PORT_DIPNAME(0x10, 0x00, "TDS Box Mode") + PORT_DIPSETTING( 0x10, "Normal") + PORT_DIPSETTING( 0x00, "Monitor") + PORT_DIPNAME(0x40, 0x00, "TDS Box Standard") + PORT_DIPSETTING( 0x40, "NTSC") + PORT_DIPSETTING( 0x00, "PAL") + PORT_BIT(0xa7, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_START("BAUD") - PORT_DIPNAME( 0x0f, 0x0e, "Baud Rate for Terminal") - PORT_DIPSETTING( 0x00, "50") - PORT_DIPSETTING( 0x01, "75") - PORT_DIPSETTING( 0x02, "110") - PORT_DIPSETTING( 0x03, "134.5") - PORT_DIPSETTING( 0x04, "150") - PORT_DIPSETTING( 0x05, "300") - PORT_DIPSETTING( 0x06, "600") - PORT_DIPSETTING( 0x07, "1200") - PORT_DIPSETTING( 0x08, "1800") - PORT_DIPSETTING( 0x09, "2000") - PORT_DIPSETTING( 0x0a, "2400") - PORT_DIPSETTING( 0x0b, "3600") - PORT_DIPSETTING( 0x0c, "4800") - PORT_DIPSETTING( 0x0e, "9600") - PORT_DIPSETTING( 0x0f, "19200") + PORT_DIPNAME(0x0f, 0x0e, "Baud Rate for Terminal") + PORT_DIPSETTING( 0x00, "50") + PORT_DIPSETTING( 0x01, "75") + PORT_DIPSETTING( 0x02, "110") + PORT_DIPSETTING( 0x03, "134.5") + PORT_DIPSETTING( 0x04, "150") + PORT_DIPSETTING( 0x05, "300") + PORT_DIPSETTING( 0x06, "600") + PORT_DIPSETTING( 0x07, "1200") + PORT_DIPSETTING( 0x08, "1800") + PORT_DIPSETTING( 0x09, "2000") + PORT_DIPSETTING( 0x0a, "2400") + PORT_DIPSETTING( 0x0b, "3600") + PORT_DIPSETTING( 0x0c, "4800") + PORT_DIPSETTING( 0x0e, "9600") + PORT_DIPSETTING( 0x0f, "19200") PORT_START("AUTOSTART") - PORT_DIPNAME( 0x0001, 0x0000, "Auto-Start" ) - PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0001, DEF_STR( On ) ) - PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_DIPNAME(0x0001, 0x0000, "Auto-Start") + PORT_DIPSETTING( 0x0000, DEF_STR( Off )) + PORT_DIPSETTING( 0x0001, DEF_STR( On )) + PORT_BIT(0xfffe, IP_ACTIVE_HIGH, IPT_UNUSED) PORT_START("CONFIGSW12") PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) @@ -607,6 +754,15 @@ void dpb7000_state::machine_start() save_item(NAME(m_incoming_chr)); save_item(NAME(m_buffer_lum)); + // Keyboard + save_item(NAME(m_keybc_latched_bit)); + save_item(NAME(m_keybc_p1_data)); + save_item(NAME(m_keybc_tx)); + + // TDS Box + save_item(NAME(m_tds_dac_value)); + save_item(NAME(m_tds_adc_value)); + m_yuv_lut = std::make_unique<uint32_t[]>(0x1000000); for (uint16_t u = 0; u < 256; u++) { @@ -632,6 +788,11 @@ void dpb7000_state::machine_reset() m_brg->stt_w(m_baud_dip->read()); m_csr = 0; m_sys_ctrl = SYSCTRL_REQ_B_IN; + for (int i = 0; i < 3; i++) + { + m_acia[i]->write_cts(0); + m_acia[i]->write_dcd(0); + } m_field_in_clk->adjust(attotime::from_hz(59.94), 0, attotime::from_hz(59.94)); m_field_out_clk->adjust(attotime::from_hz(59.94) + attotime::from_hz(15734.0 / 1.0), 0, attotime::from_hz(59.94)); @@ -741,6 +902,15 @@ void dpb7000_state::machine_reset() // Size Card m_size_h = 0; m_size_v = 0; + + // Keyboard + m_keybc_latched_bit = 1; + m_keybc_p1_data = 0; + m_keybc_tx = 0; + + // TDS Box + m_tds_dac_value = 0; + m_tds_adc_value = 0; } void dpb7000_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) @@ -1846,6 +2016,117 @@ WRITE_LINE_MEMBER(dpb7000_state::fddcpu_debug_rx) } } +uint8_t dpb7000_state::keyboard_p1_r() +{ + LOGMASKED(LOG_KEYBC, "%s: Port 1 read\n", machine().describe_context()); + return 0; +} + +uint8_t dpb7000_state::keyboard_p2_r() +{ + LOGMASKED(LOG_KEYBC, "%s: Port 2 read\n", machine().describe_context()); + return 0; +} + +void dpb7000_state::keyboard_p1_w(uint8_t data) +{ + LOGMASKED(LOG_KEYBC, "%s: Port 1 write: %02x\n", machine().describe_context(), data); + const uint8_t old_data = m_keybc_p1_data; + m_keybc_p1_data = data; + const uint8_t col = data & 0x0f; + const uint8_t lowered = old_data & ~data; + if (BIT(lowered, 7)) + { + m_keybc_latched_bit = BIT(m_keybc_cols[col]->read(), (data >> 4) & 7); + } + else + { + m_keybc_latched_bit = 1; + } +} + +void dpb7000_state::keyboard_p2_w(uint8_t data) +{ + LOGMASKED(LOG_KEYBC, "%s: Port 2 write: %02x\n", machine().describe_context(), data); + m_keybc_tx = BIT(~data, 7); +} + +READ_LINE_MEMBER(dpb7000_state::keyboard_t0_r) +{ + LOGMASKED(LOG_KEYBC, "%s: T0 read\n", machine().describe_context()); + return 0; +} + +READ_LINE_MEMBER(dpb7000_state::keyboard_t1_r) +{ + uint8_t data = m_keybc_latched_bit; + //m_keybc_latched_bit = 0; + LOGMASKED(LOG_KEYBC, "%s: T1 read: %d\n", machine().describe_context(), data); + return data; +} + +void dpb7000_state::tds_dac_w(uint8_t data) +{ + LOGMASKED(LOG_TDS, "%s: TDS DAC Write: %02x\n", machine().describe_context(), data); + m_tds_dac_value = data; +} + +void dpb7000_state::tds_convert_w(uint8_t data) +{ + LOGMASKED(LOG_TDS, "%s: TDS ADC Convert Start\n", machine().describe_context()); + m_tds_adc_value = m_tds_dac_value; +} + +uint8_t dpb7000_state::tds_adc_r() +{ + LOGMASKED(LOG_TDS, "%s: TDS ADC Read: %02x\n", machine().describe_context(), m_tds_adc_value); + return m_tds_adc_value; +} + +uint8_t dpb7000_state::tds_pen_switches_r() +{ + uint8_t data = machine().input().code_pressed(KEYCODE_5_PAD) ? machine().rand() : 0; + LOGMASKED(LOG_TDS, "%s: TDS Pen Switches Read: %02x\n", machine().describe_context(), data); + return data; +} + +WRITE_LINE_MEMBER(dpb7000_state::duart_b_w) +{ + //printf("B%d ", state); +} + +uint8_t dpb7000_state::tds_p1_r() +{ + const uint8_t latched = m_tds_p1_data & 0x82; + const uint8_t adc_not_busy = (1 << 5); + uint8_t data = m_tds_dips->read() | adc_not_busy | latched; + LOGMASKED(LOG_TDS, "%s: TDS Port 1 Read, %02x\n", machine().describe_context(), data); + return data; +} + +uint8_t dpb7000_state::tds_p2_r() +{ + uint8_t data = 0x02 | (m_keybc_tx << 3); + LOGMASKED(LOG_TDS, "%s: TDS Port 2 Read, %02x\n", machine().describe_context(), data); + return data; +} + +void dpb7000_state::tds_p1_w(uint8_t data) +{ + LOGMASKED(LOG_TDS, "%s: TDS Port 1 Write = %02x\n", machine().describe_context(), data); + const uint8_t old = m_tds_p1_data; + m_tds_p1_data = data; + if (BIT(old & ~data, 0)) + { + m_tds_duart->reset(); + } +} + +void dpb7000_state::tds_p2_w(uint8_t data) +{ + LOGMASKED(LOG_TDS, "%s: TDS Port 2 Write = %02x\n", machine().describe_context(), data); +} + template <int StoreNum> uint32_t dpb7000_state::store_screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { @@ -1903,20 +2184,28 @@ void dpb7000_state::dpb7000(machine_config &config) INPUT_MERGER_ANY_HIGH(config, m_p_int).output_handler().set_inputline(m_maincpu, 3); ACIA6850(config, m_acia[0], 0); - m_acia[0]->txd_handler().set(m_rs232, FUNC(rs232_port_device::write_txd)); - m_acia[0]->rts_handler().set(m_rs232, FUNC(rs232_port_device::write_rts)); + m_acia[0]->txd_handler().set(m_rs232[0], FUNC(rs232_port_device::write_txd)); + m_acia[0]->rts_handler().set(m_rs232[0], FUNC(rs232_port_device::write_rts)); m_acia[0]->irq_handler().set_inputline(m_maincpu, 6); ACIA6850(config, m_acia[1], 0); + m_acia[1]->txd_handler().set(m_tds_duart, FUNC(scn2681_device::rx_a_w)); m_acia[1]->irq_handler().set(m_p_int, FUNC(input_merger_device::in_w<0>)); ACIA6850(config, m_acia[2], 0); + m_acia[2]->txd_handler().set(m_rs232[1], FUNC(rs232_port_device::write_txd)); + m_acia[2]->rts_handler().set(m_rs232[1], FUNC(rs232_port_device::write_rts)); m_acia[2]->irq_handler().set(m_p_int, FUNC(input_merger_device::in_w<1>)); - RS232_PORT(config, m_rs232, default_rs232_devices, nullptr); - m_rs232->rxd_handler().set(m_acia[0], FUNC(acia6850_device::write_rxd)); - m_rs232->dcd_handler().set(m_acia[0], FUNC(acia6850_device::write_dcd)); - m_rs232->cts_handler().set(m_acia[0], FUNC(acia6850_device::write_cts)); + RS232_PORT(config, m_rs232[0], default_rs232_devices, nullptr); + m_rs232[0]->rxd_handler().set(m_acia[0], FUNC(acia6850_device::write_rxd)); + m_rs232[0]->dsr_handler().set(m_acia[0], FUNC(acia6850_device::write_dcd)); + m_rs232[0]->cts_handler().set(m_acia[0], FUNC(acia6850_device::write_cts)); + + RS232_PORT(config, m_rs232[1], default_rs232_devices, nullptr); + m_rs232[1]->rxd_handler().set(m_acia[2], FUNC(acia6850_device::write_rxd)); + m_rs232[1]->dcd_handler().set(m_acia[2], FUNC(acia6850_device::write_dcd)); + m_rs232[1]->cts_handler().set(m_acia[2], FUNC(acia6850_device::write_cts)); COM8116(config, m_brg, 5.0688_MHz_XTAL); // K1355A/B m_brg->ft_handler().set(m_acia[0], FUNC(acia6850_device::write_txc)); @@ -1981,6 +2270,29 @@ void dpb7000_state::dpb7000(machine_config &config) AM2901B(config, m_size_yh); AM2901B(config, m_size_xl); AM2901B(config, m_size_xh); + + // Keyboard + I8039(config, m_keybcpu, 4.608_MHz_XTAL); + m_keybcpu->set_addrmap(AS_PROGRAM, &dpb7000_state::keybcpu_map); + m_keybcpu->p1_in_cb().set(FUNC(dpb7000_state::keyboard_p1_r)); + m_keybcpu->p2_in_cb().set(FUNC(dpb7000_state::keyboard_p2_r)); + m_keybcpu->p1_out_cb().set(FUNC(dpb7000_state::keyboard_p1_w)); + m_keybcpu->p2_out_cb().set(FUNC(dpb7000_state::keyboard_p2_w)); + m_keybcpu->t0_in_cb().set(FUNC(dpb7000_state::keyboard_t0_r)); + m_keybcpu->t1_in_cb().set(FUNC(dpb7000_state::keyboard_t1_r)); + + // TDS Box + M6803(config, m_tds_cpu, 4.9152_MHz_XTAL); + m_tds_cpu->set_addrmap(AS_PROGRAM, &dpb7000_state::tds_cpu_map); + m_tds_cpu->in_p1_cb().set(FUNC(dpb7000_state::tds_p1_r)); + m_tds_cpu->out_p1_cb().set(FUNC(dpb7000_state::tds_p1_w)); + m_tds_cpu->in_p2_cb().set(FUNC(dpb7000_state::tds_p2_r)); + m_tds_cpu->out_p2_cb().set(FUNC(dpb7000_state::tds_p2_w)); + + SCN2681(config, m_tds_duart, 3.6864_MHz_XTAL); + m_tds_duart->irq_cb().set_inputline(m_tds_cpu, M6803_IRQ_LINE); + m_tds_duart->a_tx_cb().set(m_acia[1], FUNC(acia6850_device::write_rxd)); + m_tds_duart->b_tx_cb().set(FUNC(dpb7000_state::duart_b_w)); } @@ -2031,10 +2343,10 @@ ROM_START( dpb7000 ) ROM_REGION(0x800, "keyboard", 0) ROM_LOAD("etc2716 63b2.bin", 0x000, 0x800, CRC(04614a50) SHA1(e547458f2c9cf29cf52f02b8824b32e5e91807fd)) - ROM_REGION(0x2000, "tablet", 0) + ROM_REGION(0x2000, "tds", 0) ROM_LOAD("hn482764g.bin", 0x0000, 0x2000, CRC(3626059c) SHA1(1a4f5c8b337f31c7b2b93096b59234ffbc2f1f00)) - ROM_REGION(0x2000, "tds", 0) + ROM_REGION(0x2000, "tablet", 0) ROM_LOAD("nmc27c64q.bin", 0x0000, 0x2000, CRC(a453928f) SHA1(f4a25298fb446f0046c6f9f3ce70e7169dcebd01)) ROM_REGION(0x200, "brushproc_prom", 0) diff --git a/src/mame/drivers/exidy.cpp b/src/mame/drivers/exidy.cpp index cadddab8bed..0ffecf4aa16 100644 --- a/src/mame/drivers/exidy.cpp +++ b/src/mame/drivers/exidy.cpp @@ -1383,7 +1383,7 @@ ROM_START( venture ) ROM_LOAD( "vea_7a-3.7a", 0x7800, 0x0800, CRC(466addc7) SHA1(0230b5365d6aeee3ca47666a9eadee4141de125b) ) ROM_REGION( 0x0800, "gfx1", 0 ) -// ROM_LOAD( "11d-cpu", 0x0000, 0x0800, BAD_DUMP CRC(b4bb2503) SHA1(67303603b7c5e6301e976ef19f81c7519648b179) ) // bytes 0x536 & 0x537 have the high bit set (IE:0x80 instead of 0x00 in vel_11d-2.11d) +// ROM_LOAD( "11d-cpu", 0x0000, 0x0800, BAD_DUMP CRC(b4bb2503) SHA1(67303603b7c5e6301e976ef19f81c7519648b179) ) // bytes 0x536 & 0x537 have the high bit set (IE:0x80 instead of 0x00 in vel_11d-2.11d) ROM_LOAD( "vel_11d-2.11d", 0x0000, 0x0800, CRC(ea6fd981) SHA1(46b1658e1607423d5a073f14097c2a48d59057c0) ) ROM_REGION( 0x140, "proms", 0 ) diff --git a/src/mame/drivers/funworld.cpp b/src/mame/drivers/funworld.cpp index 2d97088d3e2..c88c3901994 100644 --- a/src/mame/drivers/funworld.cpp +++ b/src/mame/drivers/funworld.cpp @@ -187,7 +187,7 @@ A) Encrypted CPU. At least five Fun World boards have custom encrypted CPUs: - Joker Card from Vesely Svet, Mega Card, Power Card and Multi Win, - use custom unknown CPUs and also encrypted/scrambled prg roms. + use custom unknown CPUs and also encrypted/scrambled prg roms. - Royal Card (slovak, encrypted) from Evona Electronic seems to use a block with CPU + extras (ICs, TTL, etc) to manage the encryption. @@ -683,17 +683,17 @@ void funworld_state::funworld_lamp_a_w(uint8_t data) -x-- ---- Hopper Motor (inverted). x--- ---- HOLD4 lamp. */ - m_lamps[0] = BIT(~data, 1); // Hold1 (inverted) - m_lamps[2] = BIT(~data, 1); // Hold3 (inverted, see pinouts) + m_lamps[0] = BIT(~data, 1); // Hold1 (inverted) + m_lamps[2] = BIT(~data, 1); // Hold3 (inverted, see pinouts) - m_lamps[1] = BIT(~data, 3); // Hold2 / Low (inverted) - m_lamps[3] = BIT(data, 7); // Hold4 / High - m_lamps[5] = BIT(~data, 5); // Cancel / Collect (inverted) + m_lamps[1] = BIT(~data, 3); // Hold2 / Low (inverted) + m_lamps[3] = BIT(data, 7); // Hold4 / High + m_lamps[5] = BIT(~data, 5); // Cancel / Collect (inverted) - machine().bookkeeping().coin_counter_w(0, data & 0x01); // Credit In counter - machine().bookkeeping().coin_counter_w(7, data & 0x04); // Credit Out counter, mapped as coin 8 + machine().bookkeeping().coin_counter_w(0, data & 0x01); // Credit In counter + machine().bookkeeping().coin_counter_w(7, data & 0x04); // Credit Out counter, mapped as coin 8 - m_lamps[7] = BIT(~data, 6); // Hopper Motor (inverted) + m_lamps[7] = BIT(~data, 6); // Hopper Motor (inverted) // popmessage("Lamps A: %02X", (data ^ 0xff)); } @@ -707,8 +707,8 @@ void funworld_state::funworld_lamp_b_w(uint8_t data) ---- -x-- Unknown (inverted). xxxx x--- Unknown. */ - m_lamps[4] = BIT(data, 0); // Hold5 / Bet - m_lamps[6] = BIT(data, 1); // Start / Deal / Draw + m_lamps[4] = BIT(data, 0); // Hold5 / Bet + m_lamps[6] = BIT(data, 1); // Start / Deal / Draw // popmessage("Lamps B: %02X", data); } @@ -789,9 +789,9 @@ void funworld_state::magicrd2_map(address_map &map) map(0x0c00, 0x0c01).w("ay8910", FUNC(ay8910_device::address_data_w)); map(0x0e00, 0x0e00).w("crtc", FUNC(mc6845_device::address_w)); map(0x0e01, 0x0e01).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); - map(0x2c00, 0x2cff).ram(); // range for protection - map(0x3600, 0x36ff).ram(); // some games use $3603-05 range for protection - map(0x3c00, 0x3cff).ram(); // range for protection + map(0x2c00, 0x2cff).ram(); // range for protection + map(0x3600, 0x36ff).ram(); // some games use $3603-05 range for protection + map(0x3c00, 0x3cff).ram(); // range for protection map(0x4000, 0x4fff).ram().w(FUNC(funworld_state::funworld_videoram_w)).share("videoram"); map(0x5000, 0x5fff).ram().w(FUNC(funworld_state::funworld_colorram_w)).share("colorram"); map(0x6000, 0xffff).rom(); @@ -806,9 +806,9 @@ void funworld_state::cuoreuno_map(address_map &map) map(0x0c00, 0x0c01).w("ay8910", FUNC(ay8910_device::address_data_w)); map(0x0e00, 0x0e00).w("crtc", FUNC(mc6845_device::address_w)); map(0x0e01, 0x0e01).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); - map(0x2000, 0x2000).nopr(); // some unknown reads - map(0x3e00, 0x3fff).ram(); // some games use $3e03-05 range for protection - map(0x4000, 0x5fff).rom(); // used by rcdino4 (dino4 hw ) + map(0x2000, 0x2000).nopr(); // some unknown reads + map(0x3e00, 0x3fff).ram(); // some games use $3e03-05 range for protection + map(0x4000, 0x5fff).rom(); // used by rcdino4 (dino4 hw ) map(0x6000, 0x6fff).ram().w(FUNC(funworld_state::funworld_videoram_w)).share("videoram"); map(0x7000, 0x7fff).ram().w(FUNC(funworld_state::funworld_colorram_w)).share("colorram"); map(0x8000, 0xffff).rom(); @@ -1184,7 +1184,7 @@ static INPUT_PORTS_START( jolycdit ) PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x20, 0x00, "Joker" ) PORT_DIPLOCATION("SW1:3") - PORT_DIPSETTING( 0x00, "With Joker" ) // also enables Five of a Kind + PORT_DIPSETTING( 0x00, "With Joker" ) // also enables Five of a Kind PORT_DIPSETTING( 0x20, "Without Joker" ) PORT_DIPNAME( 0x40, 0x00, "Hold" ) PORT_DIPLOCATION("SW1:2") PORT_DIPSETTING( 0x00, "Auto Hold" ) @@ -1246,11 +1246,11 @@ static INPUT_PORTS_START( jolycdib ) PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x20, 0x00, "Joker" ) PORT_DIPLOCATION("SW1:3") - PORT_DIPSETTING( 0x00, "With Joker" ) // also enables Five of a Kind + PORT_DIPSETTING( 0x00, "With Joker" ) // also enables Five of a Kind PORT_DIPSETTING( 0x20, "Without Joker" ) PORT_DIPNAME( 0x40, 0x00, "Auto Hold" ) PORT_DIPLOCATION("SW1:2") PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) // when is ON, allows the player to activate/deactivate the autohold through CANCEL button + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) // when is ON, allows the player to activate/deactivate the autohold through CANCEL button // after nvram init, set the following one to 'manual' // to allow the remote credits mode to work @@ -1308,11 +1308,11 @@ static INPUT_PORTS_START( jolycdic ) PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x20, 0x00, "Joker" ) PORT_DIPLOCATION("SW1:3") - PORT_DIPSETTING( 0x00, "With Joker" ) // also enables Five of a Kind + PORT_DIPSETTING( 0x00, "With Joker" ) // also enables Five of a Kind PORT_DIPSETTING( 0x20, "Without Joker" ) PORT_DIPNAME( 0x40, 0x00, "Auto Hold" ) PORT_DIPLOCATION("SW1:2") PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) // when is ON, allows the player to activate/deactivate the autohold through CANCEL button + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) // when is ON, allows the player to activate/deactivate the autohold through CANCEL button PORT_DIPNAME( 0x80, 0x00, "Payout" ) PORT_DIPLOCATION("SW1:1") PORT_DIPSETTING( 0x00, "Hopper" ) PORT_DIPSETTING( 0x80, "Manual Payout SW" ) @@ -1543,7 +1543,7 @@ static INPUT_PORTS_START( magicrd2 ) PORT_DIPNAME( 0x01, 0x01, "State" ) PORT_DIPLOCATION("SW1:8") PORT_DIPSETTING( 0x00, "Keyboard Test" ) PORT_DIPSETTING( 0x01, "Play" ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:7") // remote credits settings are always 10 points/pulse + PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:7") // remote credits settings are always 10 points/pulse PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x02, DEF_STR( On ) ) PORT_DIPNAME( 0x04, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:6") @@ -1605,7 +1605,7 @@ static INPUT_PORTS_START( royalcrd ) PORT_DIPNAME( 0x01, 0x01, "State" ) PORT_DIPLOCATION("SW1:8") PORT_DIPSETTING( 0x00, "Keyboard Test" ) PORT_DIPSETTING( 0x01, "Play" ) - PORT_DIPNAME( 0x02, 0x02, "Remote Value" ) PORT_DIPLOCATION("SW1:7") // listed as 'Coin-C' in some sources + PORT_DIPNAME( 0x02, 0x02, "Remote Value" ) PORT_DIPLOCATION("SW1:7") // listed as 'Coin-C' in some sources PORT_DIPSETTING( 0x00, "10 Points/Pulse" ) PORT_DIPSETTING( 0x02, "100 Points/Pulse" ) PORT_DIPNAME( 0x04, 0x04, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:6") @@ -1782,7 +1782,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( cuoreuno ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1 / Switch Bet (1-Max)") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Bet / Prendi (Take)") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Gioca (Play)") @@ -1843,7 +1843,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( pool10 ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1 / Switch Bet (1-Max)") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Bet / Prendi (Take)") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Gioca (Play)") @@ -1903,7 +1903,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( lunapark ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1 / Switch Bet (1-Max)") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Bet / Prendi (Take)") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Gioca (Play)") @@ -1960,8 +1960,8 @@ static INPUT_PORTS_START( lunapark ) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // the following one is connected to 1st DSW and is meant -// for switch between different programs stored in different -// halves of the program ROM +// for switch between different programs stored in different +// halves of the program ROM PORT_START("SELDSW") PORT_DIPNAME( 0x01, 0x00, "Game Selector" ) PORT_DIPLOCATION("SW1:1") PORT_DIPSETTING( 0x00, "PROGRAM 1, (5 TIRI LIRE 500, ABILITA VINTE)" ) @@ -2656,7 +2656,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( chinatow ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1 / Switch Bet (1-Max)") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Bet / Prendi (Take)") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Gioca (Play) / Gmable") @@ -2713,7 +2713,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( rcdino4 ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Bet") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start") @@ -2770,7 +2770,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( royal ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1 / Switch Bet (1-Max)") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Bet / Prendi (Take)") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Gioca (Play)") @@ -2920,11 +2920,11 @@ static const gfx_layout charlayout = in the first and second half of the bipolar PROM. */ -static GFXDECODE_START( gfx_fw1stpal ) // Adressing the first half of the palette +static GFXDECODE_START( gfx_fw1stpal ) // Adressing the first half of the palette GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 16 ) GFXDECODE_END -static GFXDECODE_START( gfx_fw2ndpal ) // Adressing the second half of the palette +static GFXDECODE_START( gfx_fw2ndpal ) // Adressing the second half of the palette GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0x100, 16 ) GFXDECODE_END @@ -3031,7 +3031,7 @@ void lunapark_state::machine_reset() void funworld_state::fw1stpal(machine_config &config) { // basic machine hardware - M65SC02(config, m_maincpu, CPU_CLOCK); // 2 MHz. + M65SC02(config, m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::funworld_map); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); @@ -3050,14 +3050,14 @@ void funworld_state::fw1stpal(machine_config &config) screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_refresh_hz(60); screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); - screen.set_size((124+1)*4, (30+1)*8); // Taken from MC6845 init, registers 00 & 04. Normally programmed with (value-1) - screen.set_visarea(0*4, 96*4-1, 0*8, 29*8-1); // Taken from MC6845 init, registers 01 & 06 + screen.set_size((124+1)*4, (30+1)*8); // Taken from MC6845 init, registers 00 & 04. Normally programmed with (value-1) + screen.set_visarea(0*4, 96*4-1, 0*8, 29*8-1); // Taken from MC6845 init, registers 01 & 06 screen.set_screen_update(FUNC(funworld_state::screen_update_funworld)); GFXDECODE(config, m_gfxdecode, m_palette, gfx_fw1stpal); PALETTE(config, m_palette, FUNC(funworld_state::funworld_palette), 0x200); - mc6845_device &crtc(MC6845(config, "crtc", CRTC_CLOCK)); // 2 MHz, verified on jollycrd & royalcrd + mc6845_device &crtc(MC6845(config, "crtc", CRTC_CLOCK)); // 2 MHz, verified on jollycrd & royalcrd crtc.set_screen("screen"); crtc.set_show_border_area(false); crtc.set_char_width(4); @@ -3066,10 +3066,10 @@ void funworld_state::fw1stpal(machine_config &config) // sound hardware SPEAKER(config, "mono").front_center(); - ay8910_device &ay8910(AY8910(config, "ay8910", SND_CLOCK)); // 2 MHz. + ay8910_device &ay8910(AY8910(config, "ay8910", SND_CLOCK)); // 2 MHz. ay8910.port_a_write_callback().set(FUNC(funworld_state::funworld_lamp_a_w)); ay8910.port_b_write_callback().set(FUNC(funworld_state::funworld_lamp_b_w)); - ay8910.add_route(ALL_OUTPUTS, "mono", 2.5); // analyzed to avoid clips + ay8910.add_route(ALL_OUTPUTS, "mono", 2.5); // analyzed to avoid clips } @@ -3077,7 +3077,7 @@ void funworld_state::fw2ndpal(machine_config &config) { fw1stpal(config); - R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. + R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::funworld_map); m_gfxdecode->set_info(gfx_fw2ndpal); @@ -3090,7 +3090,7 @@ void funworld_state::funquiz(machine_config &config) fw1stpal(config); // gray background. // fw2ndpal(config); // blue background. - R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. + R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::funquiz_map); subdevice<ay8910_device>("ay8910")->port_a_read_callback().set(FUNC(funworld_state::funquiz_ay8910_a_r)); @@ -3102,15 +3102,15 @@ void magicrd2_state::magicrd2(machine_config &config) { fw1stpal(config); - R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. + R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &magicrd2_state::magicrd2_map); subdevice<mc6845_device>("crtc")->set_visarea_adjust(0, -56, 0, 0); - ay8910_device &ay8910(AY8910(config.replace(), "ay8910", SND_CLOCK)); // 2 MHz. + ay8910_device &ay8910(AY8910(config.replace(), "ay8910", SND_CLOCK)); // 2 MHz. ay8910.port_a_write_callback().set(FUNC(magicrd2_state::funworld_lamp_a_w)); ay8910.port_b_write_callback().set(FUNC(magicrd2_state::funworld_lamp_b_w)); - ay8910.add_route(ALL_OUTPUTS, "mono", 1.5); // analyzed to avoid clips + ay8910.add_route(ALL_OUTPUTS, "mono", 1.5); // analyzed to avoid clips } @@ -3118,7 +3118,7 @@ void funworld_state::royalcd1(machine_config &config) { fw1stpal(config); - R65C02(config.replace(), m_maincpu, CPU_CLOCK); // (G65SC02P in pro version) 2 MHz. + R65C02(config.replace(), m_maincpu, CPU_CLOCK); // (G65SC02P in pro version) 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::magicrd2_map); } @@ -3127,7 +3127,7 @@ void funworld_state::royalcd2(machine_config &config) { fw2ndpal(config); - R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. + R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::magicrd2_map); } @@ -3136,7 +3136,7 @@ void funworld_state::cuoreuno(machine_config &config) { fw1stpal(config); - R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. + R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::cuoreuno_map); } @@ -3145,7 +3145,7 @@ void funworld_state::saloon(machine_config &config) { fw1stpal(config); - R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. + R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::saloon_map); config.device_remove("pia0"); @@ -3160,7 +3160,7 @@ void funworld_state::witchryl(machine_config &config) { fw1stpal(config); - R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. + R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::witchryl_map); } @@ -3169,7 +3169,7 @@ void lunapark_state::lunapark(machine_config &config) { fw1stpal(config); - R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. + R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &lunapark_state::lunapark_map); // mirrored video RAM (4000/5000 to 6000/7000). } @@ -3178,7 +3178,7 @@ void chinatow_state::chinatow(machine_config &config) { fw2ndpal(config); - R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. + R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &chinatow_state::chinatow_map); } @@ -3186,7 +3186,7 @@ void chinatow_state::rcdino4(machine_config &config) { fw1stpal(config); - R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. + R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &chinatow_state::chinatow_map); } @@ -3195,7 +3195,7 @@ void intergames_state::intrgmes(machine_config &config) { fw1stpal(config); - M65SC02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. + M65SC02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &intergames_state::intergames_map); //m_maincpu->set_periodic_int(FUNC(intergames_state::nmi_line_pulse), attotime::from_hz(60)); @@ -3207,7 +3207,7 @@ void funworld_state::fw_brick_1(machine_config &config) { fw1stpal(config); - R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. + R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::fw_brick_map); NVRAM(config, "nvram1", nvram_device::DEFAULT_ALL_0); @@ -3218,7 +3218,7 @@ void funworld_state::fw_brick_2(machine_config &config) { fw2ndpal(config); - R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. + R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz. m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::fw_brick_map); NVRAM(config, "nvram1", nvram_device::DEFAULT_ALL_0); @@ -3227,7 +3227,7 @@ void funworld_state::fw_brick_2(machine_config &config) void funworld_state::gratispk(machine_config &config) { -// fw1stpal(config); // card deck wrong colors. +// fw1stpal(config); // card deck wrong colors. fw2ndpal(config); // correct palette m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::gratispk_map); @@ -3831,7 +3831,7 @@ ROM_START( jollycrd ) ROM_LOAD( "jolycard.ch2", 0x0000, 0x8000, CRC(c512b103) SHA1(1f4e78e97855afaf0332fb75e1b5571aafd01c29) ) ROM_LOAD( "jolycard.ch1", 0x8000, 0x8000, CRC(0f24f39d) SHA1(ac1f6a8a4a2a37cbc0d45c15187b33c25371bffb) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jollycrd_nvram.bin", 0x0000, 0x0800, CRC(8f0a86c9) SHA1(467bd4f601ac6aa818c036f1269c2d43d27854f6) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -3867,13 +3867,13 @@ ROM_START( jollycrda ) ROM_LOAD( "tab3.bin", 0x0000, 0x8000, CRC(c512b103) SHA1(1f4e78e97855afaf0332fb75e1b5571aafd01c29) ) ROM_LOAD( "tab2.bin", 0x8000, 0x8000, CRC(0f24f39d) SHA1(ac1f6a8a4a2a37cbc0d45c15187b33c25371bffb) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM. the game doesn't work without it + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM. the game doesn't work without it ROM_LOAD( "jollycrda_nvram.bin", 0x0000, 0x0800, CRC(5cbb4d8f) SHA1(da5edbef20bb4f0c634939389b3a9744c5743641) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "jop.bin", 0x0000, 0x0200, CRC(5ebc5659) SHA1(8d59011a181399682ab6e8ed14f83101e9bfa0c6) ) - ROM_REGION( 0x0200, "plds", 0 ) // cracked PLD + ROM_REGION( 0x0200, "plds", 0 ) // cracked PLD ROM_LOAD( "tab1.0_gal16v8s.bin", 0x0000, 0x0117, CRC(574f9a48) SHA1(bb5e2e86da85130d92f61cc57038a844950f443e) ) ROM_END @@ -3886,7 +3886,7 @@ ROM_START( jolyc3x3 ) ROM_LOAD( "jolycard.ch2", 0x0000, 0x8000, CRC(c512b103) SHA1(1f4e78e97855afaf0332fb75e1b5571aafd01c29) ) ROM_LOAD( "jolycard.ch1", 0x8000, 0x8000, CRC(0f24f39d) SHA1(ac1f6a8a4a2a37cbc0d45c15187b33c25371bffb) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolyc3x3_nvram.bin", 0x0000, 0x0800, CRC(727c70cf) SHA1(3639b0891514064e21ebdb280791cc9c8f5ba481) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -3951,7 +3951,7 @@ ROM_END */ ROM_START( jolycmzs ) - ROM_REGION( 0x10000, "maincpu", 0 ) // MZS Tech + ROM_REGION( 0x10000, "maincpu", 0 ) // MZS Tech ROM_LOAD( "mzstech.bin", 0x8000, 0x8000, CRC(cebd1e56) SHA1(24d88b3383cecf3829556d75460053663aab4ef1) ) ROM_REGION( 0x10000, "gfx1", 0 ) @@ -3960,11 +3960,11 @@ ROM_START( jolycmzs ) /* Load a default NVRAM, otherwise an annoying password system appears generating a code that needs to be parsed by a PC-DOS program, that - is currently missing and never would appear. This program is supossed - to give back an hexa code to feed in the game through a combination - of inputs. + is currently missing and never would appear. This program is supossed + to give back an hexa code to feed in the game through a combination + of inputs. */ - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolycmzs_nvram.bin", 0x0000, 0x0800, CRC(828ffeef) SHA1(6a52282231f1944ba79049f267a9c1941373aea2) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -3972,7 +3972,7 @@ ROM_START( jolycmzs ) ROM_END ROM_START( jolyc980 ) - ROM_REGION( 0x10000, "maincpu", 0 ) // Spale Soft + ROM_REGION( 0x10000, "maincpu", 0 ) // Spale Soft ROM_LOAD( "j980.bin", 0x8000, 0x8000, CRC(48249fff) SHA1(390cd0eb3399446a66363dc6760458170e1970fd) ) ROM_REGION( 0x10000, "gfx1", 0 ) @@ -3981,11 +3981,11 @@ ROM_START( jolyc980 ) /* Load a default NVRAM, otherwise an annoying password system appears generating a code that needs to be parsed by a PC-DOS program, that - is currently missing and never would appear. This program is supossed - to give back an hexa code to feed in the game through a combination - of inputs. + is currently missing and never would appear. This program is supossed + to give back an hexa code to feed in the game through a combination + of inputs. */ - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolyc980_nvram.bin", 0x0000, 0x0800, CRC(ef2c89c7) SHA1(a286001e205dcd16d914e07ba2b7c820335ab9c2) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -3993,7 +3993,7 @@ ROM_START( jolyc980 ) ROM_END -ROM_START( jolycdev ) // Jolly Card (lipa) from Evona +ROM_START( jolycdev ) // Jolly Card (lipa) from Evona ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "lipa.bin", 0x8000, 0x8000, CRC(62657c98) SHA1(237466dde26540c119c631c75f51c87ea59d1a91) ) @@ -4001,7 +4001,7 @@ ROM_START( jolycdev ) // Jolly Card (lipa) from Evona ROM_LOAD( "jollyb.bin", 0x0000, 0x8000, CRC(c512b103) SHA1(1f4e78e97855afaf0332fb75e1b5571aafd01c29) ) ROM_LOAD( "jollya.bin", 0x8000, 0x8000, CRC(0f24f39d) SHA1(ac1f6a8a4a2a37cbc0d45c15187b33c25371bffb) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolycdev_nvram.bin", 0x0000, 0x0800, CRC(ae2c2fb8) SHA1(912d673ea8e26ff62520a7b86e702e5260cff4c0) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -4030,7 +4030,7 @@ ROM_END Only remote credits, as can be seen in test mode. */ -ROM_START( jolyccra ) // Jolly Card (Croatian, set 1) +ROM_START( jolyccra ) // Jolly Card (Croatian, set 1) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "jollyc.bin", 0x8000, 0x8000, CRC(8926d99d) SHA1(dd5d1ac03d30d823dfcfe1349328ecb7afbc37fa) ) @@ -4038,7 +4038,7 @@ ROM_START( jolyccra ) // Jolly Card (Croatian, set 1) ROM_LOAD( "jollyb.bin", 0x0000, 0x8000, CRC(c512b103) SHA1(1f4e78e97855afaf0332fb75e1b5571aafd01c29) ) ROM_LOAD( "jollya.bin", 0x8000, 0x8000, CRC(0f24f39d) SHA1(ac1f6a8a4a2a37cbc0d45c15187b33c25371bffb) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolyccra_nvram.bin", 0x0000, 0x0800, CRC(478ab0a9) SHA1(8c5160d2ac8d4a9db0ae1e478d3bb1513a04544f) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -4046,7 +4046,7 @@ ROM_START( jolyccra ) // Jolly Card (Croatian, set 1) ROM_END -ROM_START( jolyccrb ) // Jolly Card (Croatian, set 2) +ROM_START( jolyccrb ) // Jolly Card (Croatian, set 2) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "jollypkr.003", 0x8000, 0x8000, CRC(ea7340b4) SHA1(7dd468f28a488a4781521809d06db1d7917048ad) ) @@ -4054,7 +4054,7 @@ ROM_START( jolyccrb ) // Jolly Card (Croatian, set 2) ROM_LOAD( "jolycard.ch2", 0x0000, 0x8000, CRC(c512b103) SHA1(1f4e78e97855afaf0332fb75e1b5571aafd01c29) ) ROM_LOAD( "jolycard.ch1", 0x8000, 0x8000, CRC(0f24f39d) SHA1(ac1f6a8a4a2a37cbc0d45c15187b33c25371bffb) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolyccrb_nvram.bin", 0x0000, 0x0800, CRC(c1d49c88) SHA1(27ffdedfc7f09ff11c3b2537db3681473b776074) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -4084,7 +4084,7 @@ ROM_END - 1x trimmer (volume)(missing) */ -ROM_START( jolycdit ) // blue TAB PCB, encrypted graphics +ROM_START( jolycdit ) // blue TAB PCB, encrypted graphics ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "jn.bin", 0x8000, 0x8000, CRC(6ae00ed0) SHA1(5921c2882aeb5eadd0e04a477fa505ad35e9d98c) ) @@ -4092,7 +4092,7 @@ ROM_START( jolycdit ) // blue TAB PCB, encrypted graphics ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(46805150) SHA1(63687ac44f6ace6d8924b2629536bcc7d3979ed2) ) ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(43bcb2df) SHA1(5022bc3a0b852a7cd433e25c3c90a720e6328261) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolycdit_nvram.bin", 0x0000, 0x0800, CRC(c55c6706) SHA1(a38ae926f057fb47e48ca841b2d097fc4fd06416) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -4134,7 +4134,7 @@ ROM_END Only remote credits, as can be seen in test mode. */ -ROM_START( jolycdib ) // bootleg PCB, encrypted graphics +ROM_START( jolycdib ) // bootleg PCB, encrypted graphics ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "3.bin", 0x8000, 0x8000, CRC(c76fdc79) SHA1(fc75c274d64fa9c99a546d424f38e79f1acf2576) ) @@ -4142,7 +4142,7 @@ ROM_START( jolycdib ) // bootleg PCB, encrypted graphics ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(46805150) SHA1(63687ac44f6ace6d8924b2629536bcc7d3979ed2) ) // sldh ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(43bcb2df) SHA1(5022bc3a0b852a7cd433e25c3c90a720e6328261) ) // sldh - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolycdib_nvram.bin", 0x0000, 0x0800, CRC(038a71fe) SHA1(99d3befbee8f9f86ce7f074de7f16fb25053c077) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -4168,18 +4168,18 @@ ROM_END buttons. */ -ROM_START( jolycdic ) // another bootleg PCB, encrypted graphics +ROM_START( jolycdic ) // another bootleg PCB, encrypted graphics ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "3ss.bin", 0x8000, 0x8000, CRC(3d7cde61) SHA1(6154878491f4d2f1ea035d18cdf43154c550d509) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(32c24495) SHA1(0d78c4d2743401b5ec9919d09814064eeac8023f) ) // sldh - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(91093176) SHA1(b889c617f94161933c35c324c7d84fec182953d8) ) // sldh - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolycdic_nvram.bin", 0x0000, 0x0800, CRC(47a5890b) SHA1(6a6531fe5e8f6c1b5a9aac314b2cce6a0129f6da) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -4197,7 +4197,7 @@ ROM_END Encrypted GFX. Differences: 1 byte. - + jolycdib jolycdic C1D6: 0x60 0x10 @@ -4206,7 +4206,7 @@ ROM_END C1E7: sta $0000 sta $0000 C1EA: sta $0003 sta $0003 C1ED: sta $07f8 sta $07f8 - + */ ROM_START( jolycdii ) ROM_REGION( 0x10000, "maincpu", 0 ) @@ -4216,12 +4216,12 @@ ROM_START( jolycdii ) ROM_LOAD( "145-2.bin", 0x0000, 0x8000, CRC(46805150) SHA1(63687ac44f6ace6d8924b2629536bcc7d3979ed2) ) ROM_LOAD( "145-1.bin", 0x8000, 0x8000, CRC(43bcb2df) SHA1(5022bc3a0b852a7cd433e25c3c90a720e6328261) ) - ROM_REGION( 0x0800, "nvram", 0 ) // Default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // Default NVRAM ROM_LOAD( "jolycdii_nvram.bin", 0x0000, 0x0800, CRC(c2a138ad) SHA1(463fed8b495fa5286513f52fa09cf97f29e5f40e) ) - ROM_REGION( 0x0800, "proms", 0 ) // Not a bipolar PROM. Just a replacement. + ROM_REGION( 0x0800, "proms", 0 ) // Not a bipolar PROM. Just a replacement. ROM_LOAD( "ws57c291_d27hc65d.bin", 0x0000, 0x0200, CRC(d96f3760) SHA1(07e80baf9c6c08171195b7810261e043197a9c3c) ) - ROM_IGNORE( 0x0600 ) // empty + ROM_IGNORE( 0x0600 ) // empty ROM_REGION( 0x0200, "plds", 0 ) ROM_LOAD( "gal16v8b.bin", 0x0000, 0x0117, NO_DUMP ) @@ -4267,17 +4267,17 @@ ROM_END 1x Unknown POT between two caps, maybe for sound amp stage. */ -ROM_START( jolycdid ) // Altera EP910PC CPLD +ROM_START( jolycdid ) // Altera EP910PC CPLD ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "5.cpu", 0x8000, 0x8000, CRC(56158851) SHA1(abf1daad1198dcc017352742e3c00d57e8955bd4) ) ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "7.bin", 0x0000, 0x8000, CRC(a4452751) SHA1(a0b32a8801ebaee7ede7873b244f1a424433fe94) ) - ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL + ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL ROM_LOAD( "6.bin", 0x8000, 0x8000, CRC(8b64d4c6) SHA1(8106cba31cd3fbda0855e6070182d248e3d52495) ) - ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL + ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolycdid_nvram.bin", 0x0000, 0x0800, CRC(6eb66015) SHA1(39490cf5d404c9e9fb58439f6d9876a3e9b29ba0) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -4297,7 +4297,7 @@ ROM_END used by another program. */ -ROM_START( jolycdie ) // Bootleg PCB, NON encrypted graphics +ROM_START( jolycdie ) // Bootleg PCB, NON encrypted graphics ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "aic.cpu", 0x8000, 0x8000, CRC(56158851) SHA1(abf1daad1198dcc017352742e3c00d57e8955bd4) ) @@ -4305,7 +4305,7 @@ ROM_START( jolycdie ) // Bootleg PCB, NON encrypted graphics ROM_LOAD( "c.bin", 0x0000, 0x8000, CRC(eff5362c) SHA1(1c9a48866dc5ee37fad6d68465f326d243c821c3) ) ROM_LOAD( "b.bin", 0x8000, 0x8000, CRC(98309e14) SHA1(0d3e3766768fafc728a08668ad693f950d1fabab) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolycdie_nvram.bin", 0x0000, 0x0800, CRC(1b2fba44) SHA1(be5c956517072581edaebe9ae440a542964c8490) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -4321,15 +4321,15 @@ ROM_END 5 & 6 are coins. W is payout. */ -ROM_START( jolycdif ) // Altera EP910PC CPLD +ROM_START( jolycdif ) // Altera EP910PC CPLD ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(80983f6a) SHA1(222ce5d4800887de92a73decbad31e96f8da3b4a) ) ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(a4452751) SHA1(a0b32a8801ebaee7ede7873b244f1a424433fe94) ) - ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL + ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL ROM_LOAD( "3.bin", 0x8000, 0x8000, CRC(2856c82d) SHA1(7ce835bc2246ffede180cff0d8d0d4528afcc297) ) - ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL + ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "82s147.bin", 0x0000, 0x0200, CRC(5ebc5659) SHA1(8d59011a181399682ab6e8ed14f83101e9bfa0c6) ) // proper dump @@ -4390,9 +4390,9 @@ ROM_START( jolycdih ) ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "3.bin", 0x0000, 0x8000, CRC(a4452751) SHA1(a0b32a8801ebaee7ede7873b244f1a424433fe94) ) - ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL + ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL ROM_LOAD( "2.bin", 0x8000, 0x8000, CRC(8b64d4c6) SHA1(8106cba31cd3fbda0855e6070182d248e3d52495) ) - ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL + ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "dm74s472n.bin", 0x0000, 0x0200, CRC(5ebc5659) SHA1(8d59011a181399682ab6e8ed14f83101e9bfa0c6) ) @@ -4401,11 +4401,11 @@ ROM_START( jolycdih ) ROM_LOAD( "ep910.bin", 0x0000, 0x0884, CRC(aa62207e) SHA1(a2e51cf3617d07ff1ce42ee1d56e1c17b6fe71de) ) ROM_LOAD( "pal16v8h-25pc-4.bin", 0x0900, 0x0117, CRC(df5be97d) SHA1(8cd63d49ab7020cdec07c1198413dc7d93e90d35) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolycdih_nvram.bin", 0x0000, 0x0800, CRC(02b3b335) SHA1(207a1289e4298d942e4806adf8ffb87e0b9b4e58) ) ROM_END -ROM_START( sjcd2kx3 ) // Super Joly 2000 3x +ROM_START( sjcd2kx3 ) // Super Joly 2000 3x ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "sj3.bin", 0x8000, 0x8000, CRC(c530b518) SHA1(36934d8e1e2cb2f71eb44a05b86ec970c9f398cd) ) @@ -4413,7 +4413,7 @@ ROM_START( sjcd2kx3 ) // Super Joly 2000 3x ROM_LOAD( "sj2.bin", 0x0000, 0x8000, CRC(d7253325) SHA1(ad40e662519da9b11f77690b7d41c5007f74e280) ) ROM_LOAD( "sj1.bin", 0x8000, 0x8000, CRC(82741749) SHA1(d0bf3073dff9ba1c4913fd754f965951e9cb5b03) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "sjcd2kx3_nvram.bin", 0x0000, 0x0800, CRC(1141368b) SHA1(b4af2d59b5e8115440e1219a621cfd2fb8c2c978) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -4579,7 +4579,7 @@ ROM_START( bigdeal ) ROM_LOAD( "poker4.003", 0x0000, 0x8000, CRC(8c33a15f) SHA1(a1c8451c99a23eeffaedb21d1a1b69f54629f8ab) ) ROM_LOAD( "poker4.002", 0x8000, 0x8000, CRC(5f4e12d8) SHA1(014b2364879faaf4922cdb82ee07692389f20c2d) ) - ROM_REGION( 0x0200, "proms", 0 ) // using joker card palette till a correct dump appear + ROM_REGION( 0x0200, "proms", 0 ) // using joker card palette till a correct dump appear ROM_LOAD( "jokercrd_prom.bin", 0x0000, 0x0200, BAD_DUMP CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) ) ROM_END @@ -4592,7 +4592,7 @@ ROM_START( bigdealb ) ROM_LOAD( "poker4.003", 0x0000, 0x8000, CRC(8c33a15f) SHA1(a1c8451c99a23eeffaedb21d1a1b69f54629f8ab) ) ROM_LOAD( "poker4.002", 0x8000, 0x8000, CRC(5f4e12d8) SHA1(014b2364879faaf4922cdb82ee07692389f20c2d) ) - ROM_REGION( 0x0200, "proms", 0 ) // using joker card palette till a correct dump appear + ROM_REGION( 0x0200, "proms", 0 ) // using joker card palette till a correct dump appear ROM_LOAD( "jokercrd_prom.bin", 0x0000, 0x0200, BAD_DUMP CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) ) ROM_END @@ -4627,16 +4627,16 @@ ROM_START( cuoreuno ) ROM_LOAD( "cuore1b.u21", 0x0000, 0x8000, CRC(14eca2b8) SHA1(35cba415800c6cd3e6ed9946057f33510ad2bfc9) ) ROM_LOAD( "cuore1c.u22", 0x8000, 0x8000, CRC(253fac84) SHA1(1ad104ab8e8d73df6397a840a4b26565b245d7a3) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "cuoreuno_nvram.bin", 0x0000, 0x0800, CRC(b5a1bf25) SHA1(c2996a28c080debf10ab7a7dc47c305aed172a83) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "am27s29_cu.bin", 0x0000, 0x0200, CRC(7ea61749) SHA1(3167acd79f9bda2078c2af3e049ad6abf160aeae) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce16v8h_cu.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected - ROM_LOAD( "palce20v8h_cu.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "palce20v8h_cu.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h_cu.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce20v8h_cu.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce20v8h_cu.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected ROM_END @@ -4667,24 +4667,24 @@ ROM_END ROM_START( elephfam ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "eleph_a.u2", 0x8000, 0x8000, CRC(8392b842) SHA1(74c850c734ca8174167b2f826b9b1ac902669392) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "eleph_b.u21", 0x0000, 0x8000, CRC(e3612670) SHA1(beb65f7d2bd6d7bc68cfd876af51910cf6417bd0) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "eleph_c.u22", 0x8000, 0x8000, CRC(4b909bf3) SHA1(a822b12126bc58af6d3f999ab2117370015a039b) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "elephfam_nvram.bin", 0x0000, 0x0800, CRC(fb9b1100) SHA1(cf15ce55042f1c4399fec480c2f862622905a8b5) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "am27s29_ef.u25", 0x0000, 0x0200, CRC(bca8b82a) SHA1(4aa19f5ecd9953bf8792dceb075a746f77c01cfc) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce16v8h_ef.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected - ROM_LOAD( "palce20v8h_ef.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "palce20v8h_ef.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h_ef.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce20v8h_ef.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce20v8h_ef.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected ROM_END @@ -4696,16 +4696,16 @@ ROM_START( elephfmb ) ROM_LOAD( "elephb.u21", 0x0000, 0x8000, CRC(3c60549c) SHA1(c839b3ea415a877e5eac04e0522c342cce8d6e64) ) ROM_LOAD( "elephc.u20", 0x8000, 0x8000, CRC(448ba955) SHA1(2785cbc8cd42a7dda85bd8b81d5fbec01a1ba0bd) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "elephfmb_nvram.bin", 0x0000, 0x0800, CRC(13a0cfea) SHA1(9c8ce509ef1076e88ea853347b64c5591bc2e18c) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "am27s29_ef.u25", 0x0000, 0x0200, CRC(bca8b82a) SHA1(4aa19f5ecd9953bf8792dceb075a746f77c01cfc) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce16v8h_ef.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected - ROM_LOAD( "palce20v8h_ef.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "palce20v8h_ef.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h_ef.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce20v8h_ef.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce20v8h_ef.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected ROM_END @@ -4815,16 +4815,16 @@ ROM_START( pool10 ) ROM_LOAD( "2.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) ) ROM_LOAD( "1.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "pool10_nvram.bin", 0x0000, 0x0800, CRC(2f2fab43) SHA1(f815b70c171bad99fa6a60c256e4fdc85dd6b290) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "n82s147an_p10.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected ROM_END @@ -4835,28 +4835,28 @@ ROM_END u20.bin 1ST AND 2ND HALF IDENTICAL u21.bin 1ST AND 2ND HALF IDENTICAL */ - ROM_START( pool10b ) // 1st set nominated for parent + ROM_START( pool10b ) // 1st set nominated for parent ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "u2.bin", 0x8000, 0x8000, CRC(64fee38e) SHA1(8a624a0b6eb4a3ba09e5b396dc5a01994dfdf294) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half -// GFX ROMs are the same of pool10, but double sized with identical halves. +// GFX ROMs are the same of pool10, but double sized with identical halves. ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "u21.bin", 0x0000, 0x8000, CRC(581c4878) SHA1(5ae61af090feea1745e22f46b33b2c01e6013fbe) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "u20.bin", 0x8000, 0x8000, CRC(3bdf1106) SHA1(fa21cbd49bb27ea4a784cf4e4b3fbd52650a285b) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "pool10b_nvram.bin", 0x0000, 0x0800, CRC(d9f35299) SHA1(2c3608bc9c322a9cc86f74d8fa2f660804a8cf3c) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "n82s147an_p10.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce16v8h_p10b.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected - ROM_LOAD( "palce20v8h_p10b.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "palce20v8h_p10b.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h_p10b.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce20v8h_p10b.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce20v8h_p10b.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected ROM_END @@ -4868,16 +4868,16 @@ ROM_START( pool10c ) ROM_LOAD( "b.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) ) ROM_LOAD( "c.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "pool10c_nvram.bin", 0x0000, 0x0800, CRC(396aefed) SHA1(066b87ff054dfb37f733a812ad0dc1b1bd2478e6) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "n82s147an_p10.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected ROM_END @@ -4889,22 +4889,22 @@ ROM_END ROM_START( pool10d ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "3.50.u2", 0x8000, 0x8000, CRC(4c68e1f4) SHA1(bbab63a18e0c041ce519daa32e12dd1b6a672dce) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "2.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) ) // sldh ROM_LOAD( "1.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) ) // sldh - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "pool10d_nvram.bin", 0x0000, 0x0800, CRC(6b5984a0) SHA1(156a94e74e33b1a15222cffff9b62e65f6f5f2f5) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "n82s147an_p10.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected ROM_END @@ -4992,16 +4992,16 @@ ROM_START( pool10e ) ROM_LOAD( "2.u21", 0x0000, 0x8000, CRC(a0d54044) SHA1(c7be1f12f72095daee32ae41c3554d8ab4f99245) ) // sldh ROM_LOAD( "1.u20", 0x8000, 0x8000, CRC(55c9fcc8) SHA1(224bdf63ed345b1def4852af3b33f07790fbf123) ) // sldh - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "pool10e_nvram.bin", 0x0000, 0x0800, CRC(e20f9a14) SHA1(617ca53263a971c9f835a95737a66fac5b99780f) ) - ROM_REGION( 0x0200, "proms", 0 ) // Same as Pool 10, but the 1st half duplicated to cover any PLD addressing + ROM_REGION( 0x0200, "proms", 0 ) // Same as Pool 10, but the 1st half duplicated to cover any PLD addressing ROM_LOAD( "am27s29.u25", 0x0000, 0x0200, CRC(2c315cbf) SHA1(f3f91329f2b8388decf26a050f8fb7da38694218) ) ROM_REGION( 0x3000, "plds", 0 ) - ROM_LOAD( "palce16v8h.u5", 0x0000, 0x0892, BAD_DUMP CRC(123d539a) SHA1(cccf0cbae3175b091a998eedf4aa44a55b679400) ) // read protected - ROM_LOAD( "palce20v8h.u22", 0x1000, 0x0a92, BAD_DUMP CRC(ba2a021f) SHA1(e9c5970f80c7446c91282d53cfe97c92353dce7d) ) // read protected - ROM_LOAD( "palce20v8h.u23", 0x2000, 0x0a92, BAD_DUMP CRC(ba2a021f) SHA1(e9c5970f80c7446c91282d53cfe97c92353dce7d) ) // read protected + ROM_LOAD( "palce16v8h.u5", 0x0000, 0x0892, BAD_DUMP CRC(123d539a) SHA1(cccf0cbae3175b091a998eedf4aa44a55b679400) ) // read protected + ROM_LOAD( "palce20v8h.u22", 0x1000, 0x0a92, BAD_DUMP CRC(ba2a021f) SHA1(e9c5970f80c7446c91282d53cfe97c92353dce7d) ) // read protected + ROM_LOAD( "palce20v8h.u23", 0x2000, 0x0a92, BAD_DUMP CRC(ba2a021f) SHA1(e9c5970f80c7446c91282d53cfe97c92353dce7d) ) // read protected ROM_END @@ -5013,20 +5013,20 @@ ROM_START( pool10f ) ROM_LOAD( "cmc-pool10-b.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) ) ROM_LOAD( "cmc-pool10-c.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "pool10f_nvram.bin", 0x0000, 0x0800, CRC(75dd3562) SHA1(a359cada144e7c90946649f5dd0998d0ee48f4d2) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "27s29.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected ROM_END -ROM_START( pool10g ) // 2nd set nominated for parent +ROM_START( pool10g ) // 2nd set nominated for parent ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "3.u2", 0x8000, 0x8000, CRC(7b537ce6) SHA1(b221d08c53b9e14178335632420e78070b9cfb27) ) @@ -5034,7 +5034,7 @@ ROM_START( pool10g ) // 2nd set nominated for parent ROM_LOAD( "2.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) ) ROM_LOAD( "1.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "pool10h_nvram.bin", 0x0000, 0x0800, CRC(3ec39472) SHA1(aa2bb5abd16557560a19842929ad7dab852abbbf) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5050,7 +5050,7 @@ ROM_START( pool10h ) ROM_LOAD( "cmc-pool10+b+.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) ) ROM_LOAD( "cmc-pool10+c+.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "pool10i_nvram.bin", 0x0000, 0x0800, CRC(e93dee30) SHA1(195525e95a3bdc1b002b12fd27bc31c63d7a9276) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5061,15 +5061,15 @@ ROM_END ROM_START( pool10i ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "a.u2", 0x8000, 0x8000, CRC(566bc05d) SHA1(eec88c8ba6cb664f38ebf8b71f99b4e7d04a9601) ) // sldh - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "b.u21", 0x0000, 0x8000, CRC(581c4878) SHA1(5ae61af090feea1745e22f46b33b2c01e6013fbe) ) // sldh - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "c.u20", 0x8000, 0x8000, CRC(3bdf1106) SHA1(fa21cbd49bb27ea4a784cf4e4b3fbd52650a285b) ) // sldh - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "pool10l_nvram.bin", 0x0000, 0x0800, CRC(89cbee4b) SHA1(ff8031a96ee40e1e62abbae7a0b3d9dc2122759f) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5084,7 +5084,7 @@ ROM_START( pool10j ) ROM_LOAD( "cmcpool10.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) ) ROM_LOAD( "cmcpool10.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "pool10j_nvram.bin", 0x0000, 0x0800, CRC(48684b02) SHA1(6f2fbd0e2621e31b881edd8056ff93ee78f331ab) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5138,16 +5138,16 @@ ROM_START( biliard ) ROM_LOAD( "cmcpool10-b.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) ) ROM_LOAD( "biliard-c.u20", 0x8000, 0x8000, CRC(b15d10ec) SHA1(9b0f32ff791063cfb2d8339a4e8041e034e73eb7) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "biliard_nvram.bin", 0x0000, 0x0800, CRC(2f2fab43) SHA1(f815b70c171bad99fa6a60c256e4fdc85dd6b290) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "am27s29pc.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce16v8h-25pc-4.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8a-25lp.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8a-25lp.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h-25pc-4.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8a-25lp.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8a-25lp.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected ROM_END @@ -5156,18 +5156,18 @@ ROM_END This one seems to run in royalcd1 hardware. */ -ROM_START( royal ) // brute hack of pool 10 +ROM_START( royal ) // brute hack of pool 10 ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "3.u2", 0x8000, 0x8000, CRC(d4f36273) SHA1(2049257ea9ee52fde9cabfe40e809e00526a960e) ) // sldh -// GFX ROMs are the same of pool10, but double sized with identical halves. +// GFX ROMs are the same of pool10, but double sized with identical halves. ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "2.u21", 0x0000, 0x8000, CRC(439eec10) SHA1(500139c16a883f0a5b0b8d91f4f067ba428d2d11) ) // sldh - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "1.u20", 0x8000, 0x8000, CRC(9b59e72d) SHA1(96217272ce5abb78ff45ff116a5d921c57717ed9) ) // sldh - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "royal_nvram.bin", 0x0000, 0x0800, CRC(9df190d5) SHA1(4be0f5c6f89f822568e45e0e8457cf51ced2dcfe) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5204,16 +5204,16 @@ ROM_START( tortufam ) ROM_LOAD( "tortu.b.u21", 0x0000, 0x8000, CRC(e7b18584) SHA1(fa1c367469d4ced5d7c83c15a25ec5fd6afcca10) ) ROM_LOAD( "tortu.c.u20", 0x8000, 0x8000, CRC(3cda6f73) SHA1(b4f3d2d3c652ebf6973358ae33b7808de5939acd) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "tortufam_nvram.bin", 0x0000, 0x0800, CRC(e5a08b1b) SHA1(6575ed3ec66ef0e42129225fe1679519e5e1c946) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "am27s29pc_tf.u25", 0x0000, 0x0200, CRC(c6d433fb) SHA1(065de832bbe8765eb0aacc2029e587a4f5362f8a) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce20v8h_tf.u5", 0x0000, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "palce20v8h_tf.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "palce20v8h_tf.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce20v8h_tf.u5", 0x0000, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce20v8h_tf.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce20v8h_tf.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected ROM_END @@ -5225,16 +5225,16 @@ ROM_START( potgame ) ROM_LOAD( "potg.b.u21", 0x0000, 0x8000, CRC(32fc1d4f) SHA1(cc533a44498338bc0cbb7c7b9c42559ce7ff1337) ) ROM_LOAD( "potg.c.u20", 0x8000, 0x8000, CRC(0331eb42) SHA1(a8e838d644fc6d93a9632070b305e44e4242ce94) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "potgame_nvram.bin", 0x0000, 0x0800, CRC(2b07fb37) SHA1(9cbd3d8fb076d683a7853b3dd8a39a27f1c8872b) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "am27s29_pot.u25", 0x0000, 0x0200, CRC(a221f151) SHA1(270c57c9b7de912b136686bc6720eb8f12dbb805) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce16v8h_pot.u5", 0x0000, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "palce20v8h_pot.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "palce20v8h_pot.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h_pot.u5", 0x0000, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce20v8h_pot.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce20v8h_pot.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected ROM_END @@ -5246,16 +5246,16 @@ ROM_START( bottle10 ) ROM_LOAD( "boat_2.bin", 0x0000, 0x8000, CRC(a6b36c3f) SHA1(90b12d9552ad5dbf11a30fc7451da1f3e6763cc3) ) ROM_LOAD( "boat_1.bin", 0x8000, 0x8000, CRC(61fd8c19) SHA1(eb8fd8bd7de38a6c8a435e9e36daf699162138a5) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "bottle10_nvram.bin", 0x0000, 0x0800, CRC(82927c53) SHA1(8cde91588cb53fefc84f0b14fc5c0b26a3a445eb) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "n82s147an_p10.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected ROM_END @@ -5267,16 +5267,16 @@ ROM_START( bottl10b ) ROM_LOAD( "2.u21", 0x0000, 0x8000, CRC(9395c15b) SHA1(e4caefc6f55b07f5c4370a3b8652fa93e08987ce) ) ROM_LOAD( "1.u20", 0x8000, 0x8000, CRC(61fd8c19) SHA1(eb8fd8bd7de38a6c8a435e9e36daf699162138a5) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "bottl10b_nvram.bin", 0x0000, 0x0800, CRC(59976182) SHA1(f8d26169e86444607bc5a6649f41e7f5c05ddbb4) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "n82s147an_p10.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected - ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected + ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected ROM_END /* @@ -5310,16 +5310,16 @@ ROM_END */ // The following two have mirrored video RAM 4000/5000 to 6000/7000. ROM_START( lunapark ) - ROM_REGION( 0x10000, "maincpu", 0 ) // Two different programs. Selectable through a DIP switch + ROM_REGION( 0x10000, "maincpu", 0 ) // Two different programs. Selectable through a DIP switch ROM_LOAD( "lunapark-425-95n003.u2", 0x0000, 0x10000, CRC(b3a620ee) SHA1(67b3498edf7b536e22c4d97c1f6ad5a71521e68f) ) ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "lunapark-425-95n002.u21", 0x0000, 0x8000, CRC(2bededb7) SHA1(b8d7e6fe307d347d762adf35d361ade620aab37b) ) - ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half 0xff filled + ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half 0xff filled ROM_LOAD( "lunapark-425-95n001.u20", 0x8000, 0x8000, CRC(7d91ce1f) SHA1(7e9bfad76f305d5787faffe3a07b218beb37fda8) ) - ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half 0xff filled + ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half 0xff filled - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "lunapark_nvram.bin", 0x0000, 0x0800, CRC(f99e749b) SHA1(fafd4205dfaacb4c21215af6997d06ab419c9281) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5327,23 +5327,23 @@ ROM_START( lunapark ) ROM_END ROM_START( lunaparkb ) - ROM_REGION( 0x10000, "maincpu", 0 ) // Two different programs. Selectable through a DIP switch + ROM_REGION( 0x10000, "maincpu", 0 ) // Two different programs. Selectable through a DIP switch ROM_LOAD( "lunapark-number-03_lunaparkb.u2", 0x0000, 0x10000, CRC(cb819bb7) SHA1(c7fb25eab093de2f644445a713d99ee8024d8499) ) ROM_REGION( 0x10000, "gfx1", 0 ) - ROM_LOAD( "27512.u21", 0x0000, 0x8000, CRC(d64ac315) SHA1(c67d9e67a988036844efd4f980d47a90c022ba18) ) // only the first 2 bytes different - ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half 0xff filled + ROM_LOAD( "27512.u21", 0x0000, 0x8000, CRC(d64ac315) SHA1(c67d9e67a988036844efd4f980d47a90c022ba18) ) // only the first 2 bytes different + ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half 0xff filled ROM_LOAD( "27512.u20", 0x8000, 0x8000, CRC(7d91ce1f) SHA1(7e9bfad76f305d5787faffe3a07b218beb37fda8 ) ) - ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half 0xff filled + ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half 0xff filled - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "lunaparkb_nvram.bin", 0x0000, 0x0800, CRC(f99e749b) SHA1(fafd4205dfaacb4c21215af6997d06ab419c9281) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "82s147.u25", 0x0000, 0x0200, CRC(ddb74d72) SHA1(3d5dda3a935a3100cb86017f103b855d6449f73a) ) ROM_END -// This one hasn't mirrored video RAM, so could run in regular Cuore 1 hardware +// This one hasn't mirrored video RAM, so could run in regular Cuore 1 hardware ROM_START( lunaparkc ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "lunapark-number-03_lunaparkc.u2", 0x8000, 0x8000, CRC(fdbe49c3) SHA1(a2b14a6998d5a27fba7bc360a15f17a48c91194f) ) @@ -5352,7 +5352,7 @@ ROM_START( lunaparkc ) ROM_LOAD( "lunapark-number-01.u21", 0x0000, 0x8000, CRC(ee057944) SHA1(31b76dcadf1dd5aacac1dfed0c7c9f7190797ead) ) ROM_LOAD( "lunapark-number-02.u20", 0x8000, 0x8000, CRC(b8795aec) SHA1(5db2e64657dee7742eb9d11e65d29c83a93332b7) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "lunaparkc_nvram.bin", 0x0000, 0x0800, CRC(005b70fc) SHA1(682c2315b4fafb6255db989f0d49255fd8d7a1a9) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5371,7 +5371,7 @@ ROM_START( crystal ) ROM_LOAD( "425-1995-number-02.u21", 0x0000, 0x8000, CRC(1eaf1bd9) SHA1(eb392f4a8864c59c7792f905f165f543087cb4a0) ) ROM_LOAD( "425-1995-number-01.u20", 0x8000, 0x8000, CRC(d3972c19) SHA1(a84ae765eeae1f9d443b0c4941b6f93dcc540f8c) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "crystal_nvram.bin", 0x0000, 0x0800, CRC(21a712ee) SHA1(259d83b8268a93f96b53580562e9c6e835f7473e) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5399,7 +5399,7 @@ ROM_START( royalcrd ) ROM_LOAD( "3.bin", 0x0000, 0x8000, CRC(c46d804f) SHA1(b089821c7dae6714b49401d787f8bed859815763) ) ROM_LOAD( "2.bin", 0x8000, 0x8000, CRC(41f7a0b3) SHA1(9aff2b8832d2a4f868daa9849a0bfe5e44f88fc0) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "royalcrd_nvram.bin", 0x0000, 0x0800, CRC(1c775f61) SHA1(c810421eaa31a72e3f2fe9a1d82858e7cc2f6b93) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5424,7 +5424,7 @@ ROM_START( royalcrda ) ROM_LOAD( "r.2", 0x8000, 0x8000, CRC(8a66f22c) SHA1(67d6e8f8f5a0fd979dc498ba2cc67cf707ccdf95) ) ROM_IGNORE( 0x8000) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "royalcrda_nvram.bin", 0x0000, 0x0800, CRC(c42dbad4) SHA1(b38552192e3f5f6bc2a4b92bddd2f95ac17ecc8c) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5447,7 +5447,7 @@ ROM_START( royalcrdb ) ROM_LOAD( "rc_3_pl.bin", 0x0000, 0x8000, CRC(85e77661) SHA1(7d7a765c1bfcfeb9eb91d2519b22d734f20eab24) ) ROM_LOAD( "rc_2_pl.bin", 0x8000, 0x8000, CRC(41f7a0b3) SHA1(9aff2b8832d2a4f868daa9849a0bfe5e44f88fc0) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "royalcrdb_nvram.bin", 0x0000, 0x0800, CRC(19bb3dea) SHA1(0965fbcec48ded99c5f6793efffb1d9329cc00eb) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5522,15 +5522,15 @@ ROM_START( royalcrdd ) ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(85e77661) SHA1(7d7a765c1bfcfeb9eb91d2519b22d734f20eab24) ) // sldh ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(41f7a0b3) SHA1(9aff2b8832d2a4f868daa9849a0bfe5e44f88fc0) ) // sldh - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "royalcrdd_nvram.bin", 0x0000, 0x0800, CRC(335bfa5a) SHA1(7e9cbb502f450c515ea03ffcf4b7fbae60af4e73) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "n82s147.bin", 0x0000, 0x0200, CRC(8bc86f48) SHA1(4c677ab9314a1f571e35104b22659e6811aeb194) ) ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "palce16v8h-4.bin", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected - ROM_LOAD( "1-peel18cv8.bin", 0x0200, 0x0155, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h-4.bin", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "1-peel18cv8.bin", 0x0200, 0x0155, NO_DUMP ) // PLD is read protected ROM_LOAD( "2-peel18cv8.bin", 0x0400, 0x0155, CRC(8fdafd55) SHA1(fbb187ba682111648ea1586f400990cb81a3077a) ) ROM_END @@ -5554,24 +5554,24 @@ ROM_END - 1x trimmer (volume) */ -ROM_START( royalcrde ) // both halves have different programs. we're using the 2nd one. - ROM_REGION( 0x10000, "maincpu", 0 ) // 1st half prg is testing RAM in offset $8600-$BF00...?? +ROM_START( royalcrde ) // both halves have different programs. we're using the 2nd one. + ROM_REGION( 0x10000, "maincpu", 0 ) // 1st half prg is testing RAM in offset $8600-$BF00...?? ROM_LOAD( "rc.bin", 0x0000, 0x10000, CRC(8a9a6dd6) SHA1(04c3f9f17d5404ac1414c51ef8f930df54530e72) ) ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "2a.bin", 0x0000, 0x8000, CRC(3af71cf8) SHA1(3a0ce0d0abebf386573c5936545dada1d3558e55) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "1a.bin", 0x8000, 0x8000, CRC(8a66f22c) SHA1(67d6e8f8f5a0fd979dc498ba2cc67cf707ccdf95) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "royalcrde_nvram.bin", 0x0000, 0x0800, CRC(3b03440f) SHA1(49e51b8c9e1404d39c479a2d0619aab43f1a6529) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "n82s147.bin", 0x0000, 0x0200, CRC(8bc86f48) SHA1(4c677ab9314a1f571e35104b22659e6811aeb194) ) ROM_REGION( 0x0200, "plds", 0 ) - ROM_LOAD( "palce16v8h-4.bin", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h-4.bin", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected ROM_END @@ -5594,7 +5594,7 @@ ROM_START( royalcrdt ) ROM_REGION( 0x0800, "nvram", 0 ) ROM_LOAD( "royalcrdt_nv.bin", 0x0000, 0x0800, CRC(67a6e68b) SHA1(d7ab01c4d9bd4fe58b5d0f4a945c00c5c4906008) ) - ROM_REGION( 0x0200, "plds", 0 ) // Device type is 16L8 + ROM_REGION( 0x0200, "plds", 0 ) // Device type is 16L8 ROM_LOAD( "tab01_3.bin", 0x0000, 0x0104, CRC(a13a7a0a) SHA1(28e918ece4dcfa3883d2439c226b2f125d43f386) ) ROM_END @@ -5643,7 +5643,7 @@ ROM_START( royalcrdf ) // encrypted program rom ROM_END -ROM_START( royalcrdg ) // CMC C1030 PCB, EP910EC-30 CPLD, NON encrypted graphics +ROM_START( royalcrdg ) // CMC C1030 PCB, EP910EC-30 CPLD, NON encrypted graphics ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "3.cpu", 0x8000, 0x8000, CRC(829a6a1d) SHA1(b7064e4d60e33d0875eb73525230ea3b99f10542) ) @@ -5651,7 +5651,7 @@ ROM_START( royalcrdg ) // CMC C1030 PCB, EP910EC-30 CPLD, NON encrypted graphics ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(85e77661) SHA1(7d7a765c1bfcfeb9eb91d2519b22d734f20eab24) ) // sldh ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(41f7a0b3) SHA1(9aff2b8832d2a4f868daa9849a0bfe5e44f88fc0) ) // sldh - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "royalcrdg_nvram.bin", 0x0000, 0x0800, CRC(853c7da9) SHA1(e275b22a9f470672bfc71425fcc44f547ba38b6d) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5673,7 +5673,7 @@ ROM_START( royalcrdh ) ROM_LOAD( "145-2.bin", 0x0000, 0x8000, CRC(85e77661) SHA1(7d7a765c1bfcfeb9eb91d2519b22d734f20eab24) ) ROM_LOAD( "145-1.bin", 0x8000, 0x8000, CRC(41f7a0b3) SHA1(9aff2b8832d2a4f868daa9849a0bfe5e44f88fc0) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "royalcrdh_nvram.bin", 0x0000, 0x0800, CRC(7757d73a) SHA1(997bfbd847d1d21777694331be92a1a5e79e4faf) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5707,7 +5707,7 @@ ROM_END 1x battery (missing) */ -ROM_START( royalcdfr ) // Seems bootleg PCB, non encrypted graphics +ROM_START( royalcdfr ) // Seems bootleg PCB, non encrypted graphics ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "3.bin", 0x8000, 0x8000, CRC(69b944c1) SHA1(6ef76bff01f20376117dd7f67e5890eca754fcfb) ) // sldh @@ -5715,7 +5715,7 @@ ROM_START( royalcdfr ) // Seems bootleg PCB, non encrypted graphics ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(85e77661) SHA1(7d7a765c1bfcfeb9eb91d2519b22d734f20eab24) ) // sldh ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(41f7a0b3) SHA1(9aff2b8832d2a4f868daa9849a0bfe5e44f88fc0) ) // sldh - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "royalcdfr_nvram.bin", 0x0000, 0x0800, CRC(bda344d4) SHA1(7793d289147bf03c0d8256d4023252c9677ac8ff) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5734,7 +5734,7 @@ ROM_START( royalcrdp ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "n82s147a.bin", 0x0000, 0x0200, CRC(8bc86f48) SHA1(4c677ab9314a1f571e35104b22659e6811aeb194) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "royalcrdp_nvram.bin", 0x0000, 0x0800, BAD_DUMP CRC(553f8c66) SHA1(d2c21786d715f81c537d860d8515fda6d766f630) ) ROM_REGION( 0x0200, "plds", 0 ) @@ -5767,7 +5767,7 @@ ROM_START( royaljp ) ROM_REGION( 0x0800, "nvram", 0 ) ROM_LOAD( "royaljp_nvram.bin", 0x0000, 0x0800, CRC(48e51e2a) SHA1(b81a1741eef299384d4fa98a534099b2c0332074) ) - ROM_REGION( 0x0600, "plds", 0 ) // There are 3 GALs + ROM_REGION( 0x0600, "plds", 0 ) // There are 3 GALs ROM_LOAD( "gal20v8b.bin", 0x0000, 0x0157, NO_DUMP ) ROM_LOAD( "gal20v8a.bin", 0x0200, 0x0157, NO_DUMP ) ROM_LOAD( "gal16v8d.bin", 0x0400, 0x0117, NO_DUMP ) @@ -5784,7 +5784,7 @@ ROM_START( lluck3x3 ) ROM_LOAD( "l2.bin", 0x0000, 0x8000, CRC(8ca90a8f) SHA1(bc3db3f8c097f89eff488e3aca39bf24ff2b5cff) ) ROM_LOAD( "l1.bin", 0x8000, 0x8000, CRC(beadc35c) SHA1(8a6a5954a827def8c4c3b904d8ee58a4bde53d85) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "lluck3x3_nvram.bin", 0x0000, 0x0800, CRC(2fe79cff) SHA1(7839c04336b7702c7bdcd2b6917a353f4376f824) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5800,7 +5800,7 @@ ROM_START( lluck4x1 ) ROM_LOAD( "l2.bin", 0x0000, 0x8000, CRC(8ca90a8f) SHA1(bc3db3f8c097f89eff488e3aca39bf24ff2b5cff) ) ROM_LOAD( "l1.bin", 0x8000, 0x8000, CRC(beadc35c) SHA1(8a6a5954a827def8c4c3b904d8ee58a4bde53d85) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "lluck4x1_nvram.bin", 0x0000, 0x0800, CRC(05d2d7b8) SHA1(1188b2b4835cadd95b1e9160c2948a2e3457afd2) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5837,28 +5837,28 @@ ROM_END */ -ROM_START( magicrd2 ) // Impera... but seems Bulgarian hack, just for copyright - ROM_REGION( 0x10000, "maincpu", 0 ) // magicard.004 has extra code, and 2 different NVRAM contents harcoded +ROM_START( magicrd2 ) // Impera... but seems Bulgarian hack, just for copyright + ROM_REGION( 0x10000, "maincpu", 0 ) // magicard.004 has extra code, and 2 different NVRAM contents harcoded ROM_LOAD( "magicard.004", 0x0000, 0x8000, CRC(f6e948b8) SHA1(7d5983015a508ab135ccbf69b7f3c526c229e3ef) ) - ROM_LOAD( "magicard.01", 0x8000, 0x8000, CRC(c94767d4) SHA1(171ac946bdf2575f9e4a31e534a8e641597af519) ) // 1st and 2nd half identical - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_LOAD( "magicard.01", 0x8000, 0x8000, CRC(c94767d4) SHA1(171ac946bdf2575f9e4a31e534a8e641597af519) ) // 1st and 2nd half identical + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "mc2gr2.bin", 0x0000, 0x8000, CRC(733da697) SHA1(45122c64d5a371ec91cecc67b7faf179078e714d) ) ROM_LOAD( "mc2gr1.bin", 0x8000, 0x8000, CRC(2406b8d2) SHA1(e9d7a25562fd5adee351d7ef6ba02fff6aab021a) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "magicrd2_nvram.bin", 0x0000, 0x0800, CRC(343b3162) SHA1(1524959dbbc0c6d7c5c3a4a6b20976382cfbe88f) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "mc2-82s147.bin", 0x0000, 0x0200, CRC(aa91cc35) SHA1(79f9a755441500e618c4183f524f969fffd44100) ) ROM_REGION( 0x0200, "plds", 0 ) - ROM_LOAD( "gal16v8uni.bin", 0x0000, 0x0117, CRC(b81d7e0a) SHA1(7fef0b2bcea931a830d38ae0f1102434cf281d2d) ) // Universal GAL + ROM_LOAD( "gal16v8uni.bin", 0x0000, 0x0117, CRC(b81d7e0a) SHA1(7fef0b2bcea931a830d38ae0f1102434cf281d2d) ) // Universal GAL ROM_END -ROM_START( magicrd2a ) // Nov (new). Imatic Yugoslavian hack for green TAB or Impera boards +ROM_START( magicrd2a ) // Nov (new). Imatic Yugoslavian hack for green TAB or Impera boards ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "m3_nov.bin", 0x8000, 0x8000, CRC(ee5468e6) SHA1(f859adbad30e561fca86e60ff5b2e666d8bf4071) ) @@ -5866,7 +5866,7 @@ ROM_START( magicrd2a ) // Nov (new). Imatic Yugoslavian hack for green TAB or Im ROM_LOAD( "m2_nov.bin", 0x0000, 0x8000, CRC(684d71f2) SHA1(e4522844a0406b3e83fa723508a7c05dd21e7fb6) ) ROM_LOAD( "m1_nov.bin", 0x8000, 0x8000, CRC(96151034) SHA1(3107d353705c6240a71faf308e11c45a87d95cf4) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM (passed protection) + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM (passed protection) ROM_LOAD( "mc2_nvram.bin", 0x0000, 0x0800, CRC(2070d63d) SHA1(86c72a2e81651b0138d8551a0cfcd07176f8e7d2) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5877,7 +5877,7 @@ ROM_START( magicrd2a ) // Nov (new). Imatic Yugoslavian hack for green TAB or Im ROM_END -ROM_START( magicrd2b ) // Imatic Yugoslavian hack for green TAB or Impera boards +ROM_START( magicrd2b ) // Imatic Yugoslavian hack for green TAB or Impera boards ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "mc2prgv1.bin", 0x8000, 0x8000, CRC(7f759b70) SHA1(23a1a6e8eda57c4a90c51a970302f9a7bf590083) ) @@ -5885,7 +5885,7 @@ ROM_START( magicrd2b ) // Imatic Yugoslavian hack for green TAB or Impera boards ROM_LOAD( "mc2gr2.bin", 0x0000, 0x8000, CRC(733da697) SHA1(45122c64d5a371ec91cecc67b7faf179078e714d) ) ROM_LOAD( "mc2gr1.bin", 0x8000, 0x8000, CRC(2406b8d2) SHA1(e9d7a25562fd5adee351d7ef6ba02fff6aab021a) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM (passed protection) + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM (passed protection) ROM_LOAD( "mc2_v1-v2_nvram.bin", 0x0000, 0x0800, BAD_DUMP CRC(f88c493d) SHA1(8a5352b46ab68164cd7adaaad6f15f04327b7451) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5896,7 +5896,7 @@ ROM_START( magicrd2b ) // Imatic Yugoslavian hack for green TAB or Impera boards ROM_END -ROM_START( magicrd2c ) // Imatic Yugoslavian hack for blue TAB board (encrypted) +ROM_START( magicrd2c ) // Imatic Yugoslavian hack for blue TAB board (encrypted) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "mc2prgv2.bin", 0x8000, 0x8000, CRC(b0ed6b40) SHA1(7167e67608f1b0b1cd956c838dacc1310861cb4a) ) @@ -5904,7 +5904,7 @@ ROM_START( magicrd2c ) // Imatic Yugoslavian hack for blue TAB board (encrypted) ROM_LOAD( "mc2gr1b.bin", 0x0000, 0x8000, CRC(ce2629a7) SHA1(84767ed5da8dcee44a210255537e10372bcc264b) ) ROM_LOAD( "mc2gr2b.bin", 0x8000, 0x8000, CRC(d2bf8bde) SHA1(975b8f43a0396c09e357b96d5ae7381b12152b9e) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM (passed protection) + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM (passed protection) ROM_LOAD( "mc2_v1-v2_nvram.bin", 0x0000, 0x0800, BAD_DUMP CRC(f88c493d) SHA1(8a5352b46ab68164cd7adaaad6f15f04327b7451) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -5926,10 +5926,10 @@ ROM_START( vegasslw ) ROM_LOAD( "v2.bin", 0x0000, 0x8000, CRC(af7ab460) SHA1(01ea400424152c09c10eb83a1bd569019969ccb7) ) ROM_LOAD( "v1.bin", 0x8000, 0x8000, CRC(23e0d1c6) SHA1(98967b14d3264c444a1dfbd15c57cde70f41f09d) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "vegasslw_nvram.bin", 0x0000, 0x0800, CRC(1aa043e3) SHA1(c93d071effb2f2fe95e9dc751174c2c765595f74) ) - ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half + ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half ROM_LOAD( "jokercrd_prom.bin", 0x0000, 0x0200, CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) ) ROM_END @@ -5942,39 +5942,39 @@ ROM_START( vegasfst ) ROM_LOAD( "v2.bin", 0x0000, 0x8000, CRC(af7ab460) SHA1(01ea400424152c09c10eb83a1bd569019969ccb7) ) ROM_LOAD( "v1.bin", 0x8000, 0x8000, CRC(23e0d1c6) SHA1(98967b14d3264c444a1dfbd15c57cde70f41f09d) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "vegasfst_nvram.bin", 0x0000, 0x0800, CRC(5034de7a) SHA1(ab2077a49d94676531c73ad8d8ce9548bbfa2b81) ) - ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half + ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half ROM_LOAD( "jokercrd_prom.bin", 0x0000, 0x0200, CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) ) ROM_END -ROM_START( vegasfte ) // Royal Vegas Joker Card (fast deal, english gfx) +ROM_START( vegasfte ) // Royal Vegas Joker Card (fast deal, english gfx) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "ch3.bin", 0x8000, 0x8000, CRC(87dfb28d) SHA1(9a06e695e59722b6c97e5a9fd2c8b238661e5a4a) ) ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "ch2.bin", 0x0000, 0x8000, CRC(af7ab460) SHA1(01ea400424152c09c10eb83a1bd569019969ccb7) ) - ROM_LOAD( "ch1.bin", 0x8000, 0x8000, CRC(0a3679c0) SHA1(ce8a067e1a2eccf9fabb16733ef3a14e0e8129e5) ) // X & Y in txt layer + ROM_LOAD( "ch1.bin", 0x8000, 0x8000, CRC(0a3679c0) SHA1(ce8a067e1a2eccf9fabb16733ef3a14e0e8129e5) ) // X & Y in txt layer - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "vegasfte_nvram.bin", 0x0000, 0x0800, CRC(166c6055) SHA1(db2143a2a3adc92578bd3707391d2f5030cc6a6f) ) - ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half + ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half ROM_LOAD( "jokercrd_prom.bin", 0x0000, 0x0200, CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) ) ROM_END ROM_START( vegasmil ) - ROM_REGION( 0x10000, "maincpu", 0 ) // Mile + ROM_REGION( 0x10000, "maincpu", 0 ) // Mile ROM_LOAD( "mile.bin", 0x8000, 0x8000, CRC(ef7e02e2) SHA1(7432b0e723dc528901c422ab1d7d01fd1bc1eb20) ) ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "v2.bin", 0x0000, 0x8000, CRC(af7ab460) SHA1(01ea400424152c09c10eb83a1bd569019969ccb7) ) ROM_LOAD( "v1.bin", 0x8000, 0x8000, CRC(23e0d1c6) SHA1(98967b14d3264c444a1dfbd15c57cde70f41f09d) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "vegasmil_nvram.bin", 0x0000, 0x0800, CRC(d2608e5f) SHA1(ac936df71dbc0bfb811a3ba3c91444a2a3e7b036) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -6066,7 +6066,7 @@ ROM_END */ -ROM_START( jolyjokr ) // Jolly Joker (98bet, set 1) +ROM_START( jolyjokr ) // Jolly Joker (98bet, set 1) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "impera3orig.bin", 0x8000, 0x8000, CRC(ceb3a0d5) SHA1(25efae9f225abddfa663e6abcc91801996e5b0ea) ) @@ -6074,7 +6074,7 @@ ROM_START( jolyjokr ) // Jolly Joker (98bet, set 1) ROM_LOAD( "impera2.bin", 0x0000, 0x8000, CRC(f0fa5941) SHA1(1fcade31ed6893ffcfd4efe97dfaaa31d24283ec) ) ROM_LOAD( "impera1.bin", 0x8000, 0x8000, CRC(c3ab44dd) SHA1(e46c0fd94da561f57033647f1703fa135777ece5) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolyjokr_nvram.bin", 0x0000, 0x0800, CRC(f33e66ed) SHA1(7a4b9a1b2f976d5d26f54915a213d5ac5eca0a42) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -6082,7 +6082,7 @@ ROM_START( jolyjokr ) // Jolly Joker (98bet, set 1) ROM_END -ROM_START( jolyjokra ) // Jolly Joker (98bet, set 2) +ROM_START( jolyjokra ) // Jolly Joker (98bet, set 2) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "impera50.bin", 0x8000, 0x8000, CRC(7effc044) SHA1(961438e7fb8222296fb959b510cdf646e4ac3226) ) @@ -6090,7 +6090,7 @@ ROM_START( jolyjokra ) // Jolly Joker (98bet, set 2) ROM_LOAD( "impera2.bin", 0x0000, 0x8000, CRC(f0fa5941) SHA1(1fcade31ed6893ffcfd4efe97dfaaa31d24283ec) ) ROM_LOAD( "impera1.bin", 0x8000, 0x8000, CRC(c3ab44dd) SHA1(e46c0fd94da561f57033647f1703fa135777ece5) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolyjokra_nvram.bin", 0x0000, 0x0800, CRC(ed43693c) SHA1(d4aa4e539ab12c97bc9b9b1077997195a11d782b) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -6127,7 +6127,7 @@ ROM_END This change the paytable to the following values: Program #1 Program #2 - + Five of a Kind 1100 Five of a Kind 300 Royak Flush 500 Royak Flush 250 Street Flush 100 Street Flush 100 @@ -6144,17 +6144,17 @@ ROM_END */ ROM_START( jolyjokrb1 ) - ROM_REGION( 0x10000, "maincpu", 0 ) // Two different paytable programs. Using the 1st one (higher paytable) + ROM_REGION( 0x10000, "maincpu", 0 ) // Two different paytable programs. Using the 1st one (higher paytable) ROM_LOAD( "unbekannt.bin", 0x8000, 0x8000, CRC(327fa3d7) SHA1(2435aada2377b2f8f01d059a7aba9bc7a8993537) ) - ROM_IGNORE( 0x8000 ) // Using the 1st program. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Using the 1st program. Discarding 2nd half ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "ic26.bin", 0x0000, 0x8000, CRC(3e45dfc6) SHA1(8fd0b0cc00cdd96244ae7e7a91f6613b1c144ee0) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "ic25.bin", 0x8000, 0x8000, CRC(1bd067af) SHA1(9436fe085ba63c00a12ea80903470a84535e3dc1) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolyjokrb_nvram.bin", 0x0000, 0x0800, CRC(17007bb5) SHA1(72e08096293ce4fbde205a63b5ecd9641dbee017) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -6162,17 +6162,17 @@ ROM_START( jolyjokrb1 ) ROM_END ROM_START( jolyjokrb2 ) - ROM_REGION( 0x10000, "maincpu", 0 ) // Two different paytable programs. Using the 2nd one (lower paytable) + ROM_REGION( 0x10000, "maincpu", 0 ) // Two different paytable programs. Using the 2nd one (lower paytable) ROM_LOAD( "unbekannt.bin", 0x8000, 0x8000, CRC(327fa3d7) SHA1(2435aada2377b2f8f01d059a7aba9bc7a8993537) ) - ROM_CONTINUE( 0x8000, 0x8000) // overlapping with the 2nd program. + ROM_CONTINUE( 0x8000, 0x8000) // overlapping with the 2nd program. ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "ic26.bin", 0x0000, 0x8000, CRC(3e45dfc6) SHA1(8fd0b0cc00cdd96244ae7e7a91f6613b1c144ee0) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "ic25.bin", 0x8000, 0x8000, CRC(1bd067af) SHA1(9436fe085ba63c00a12ea80903470a84535e3dc1) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolyjokrb_nvram.bin", 0x0000, 0x0800, CRC(17007bb5) SHA1(72e08096293ce4fbde205a63b5ecd9641dbee017) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -6197,7 +6197,7 @@ ROM_START( jolyjokrc ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "tbp28s42.bin", 0x0000, 0x0200, CRC(0b671bba) SHA1(92d512e02b50f98b7bc5a60deee4fee722656c4f) ) - ROM_REGION( 0x0200, "plds", 0 ) // cracked PLD + ROM_REGION( 0x0200, "plds", 0 ) // cracked PLD ROM_LOAD( "jjpal.bin", 0x0000, 0x0117, CRC(3b084c34) SHA1(5d186b70317ef871c9a426eb420b66efcbd918de) ) ROM_END @@ -6207,7 +6207,7 @@ ROM_END The following two sets have the same program but different graphics system. - + Both sets have graphics ROMs data interleaved inside the second half of a 16bit 27C210 EPROM. The second set has some 8bits data in the first half. @@ -6229,15 +6229,15 @@ ROM_START( jolyjokro ) ROM_REGION( 0x10000, "gfxpool", 0 ) ROM_LOAD( "impera2.bin", 0x0000, 0x10000, CRC(aa86dba6) SHA1(fe189dde83bd855f4a0b34b20c161a9addc15017) ) - ROM_CONTINUE( 0x0000, 0x10000) // discarding 1nd empty half (0000-ffff) + ROM_CONTINUE( 0x0000, 0x10000) // discarding 1nd empty half (0000-ffff) ROM_REGION( 0x10000, "gfx1", 0 ) - ROM_FILL( 0x0000, 0x10000, 0xff) // deinterleaved GFX data will be placed here + ROM_FILL( 0x0000, 0x10000, 0xff) // deinterleaved GFX data will be placed here - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolyjokro_nvram.bin", 0x0000, 0x0800, CRC(1f69e567) SHA1(86695ca6f9f93c6badd092410611d8061edf8efa) ) - ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half + ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half ROM_LOAD( "1_impera_color_ii.bin", 0x0000, 0x0200, CRC(9d62f9f5) SHA1(68300c25c7eaa13a3fdbf91ab0711d0bc530543d) ) ROM_END @@ -6279,7 +6279,7 @@ ROM_END 1x 74LS139N. */ -ROM_START( jolyjokrm ) // Jolly Joker (Solid State module in suicide board) +ROM_START( jolyjokrm ) // Jolly Joker (Solid State module in suicide board) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "impera1.bin", 0x0000, 0x10000, CRC(3cad9fcf) SHA1(09f23ae8c04e6b461e17a8b3978fe44566ffc3aa) ) @@ -6287,7 +6287,7 @@ ROM_START( jolyjokrm ) // Jolly Joker (Solid State module in suicide board) ROM_LOAD( "02.bin", 0x0000, 0x8000, CRC(f0fa5941) SHA1(1fcade31ed6893ffcfd4efe97dfaaa31d24283ec) ) ROM_LOAD( "01.bin", 0x8000, 0x8000, CRC(c3ab44dd) SHA1(e46c0fd94da561f57033647f1703fa135777ece5) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "jolyjokrm_nvram.bin", 0x0000, 0x0800, CRC(f33e66ed) SHA1(7a4b9a1b2f976d5d26f54915a213d5ac5eca0a42) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -6315,7 +6315,7 @@ ROM_START( multiwin ) ROM_LOAD( "multiwin1.bin", 0x8000, 0x8000, CRC(97589aa6) SHA1(2486116637bd906cb3b32acd86fc861c48a0475e) ) ROM_REGION( 0x0200, "proms", 0 ) - ROM_LOAD( "multi_prom.bin", 0x0000, 0x0200, BAD_DUMP CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) ) // using the joker card one + ROM_LOAD( "multi_prom.bin", 0x0000, 0x0200, BAD_DUMP CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) ) // using the joker card one ROM_END @@ -6414,10 +6414,10 @@ ROM_END */ ROM_START( powercrd ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "263a1.bin", 0x8000, 0x8000, CRC(9e5e477d) SHA1(428464a64bea8cb478bc8033859baa47d7de0297) ) // just the 2nd half - ROM_LOAD( "263a2.bin", 0x0000, 0x8000, CRC(11b1a13f) SHA1(766c1a45c238467d6a292795f5a159187966ceec) ) // just the 2nd half + ROM_LOAD( "263a1.bin", 0x8000, 0x8000, CRC(9e5e477d) SHA1(428464a64bea8cb478bc8033859baa47d7de0297) ) // just the 2nd half + ROM_LOAD( "263a2.bin", 0x0000, 0x8000, CRC(11b1a13f) SHA1(766c1a45c238467d6a292795f5a159187966ceec) ) // just the 2nd half - ROM_REGION( 0x0800, "decode", 0 ) // from the CY7C291A inside of the custom CPU + ROM_REGION( 0x0800, "decode", 0 ) // from the CY7C291A inside of the custom CPU ROM_LOAD( "powercrd_cy7c291a.bin", 0x0000, 0x0800, CRC(f1d8f35d) SHA1(2b5f9222a81a627d43fd8448385f85c71c24b914) ) ROM_REGION( 0x10000, "gfx1", 0 ) @@ -6548,13 +6548,13 @@ ROM_END ROM_START( megacard ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "mega_mc3_210-f-1.ic37", 0x8000, 0x8000, CRC(747f5ed1) SHA1(06757bb6a792dca93978b17b54c28e413e3720b1) ) // just the 2nd half - ROM_LOAD( "mega_mc3_210-f-2.ic41", 0x0000, 0x8000, CRC(373094d2) SHA1(8aed2502e89b0e7522e88f351ac256f1afad7ee8) ) // just the 2nd half + ROM_LOAD( "mega_mc3_210-f-1.ic37", 0x8000, 0x8000, CRC(747f5ed1) SHA1(06757bb6a792dca93978b17b54c28e413e3720b1) ) // just the 2nd half + ROM_LOAD( "mega_mc3_210-f-2.ic41", 0x0000, 0x8000, CRC(373094d2) SHA1(8aed2502e89b0e7522e88f351ac256f1afad7ee8) ) // just the 2nd half - ROM_REGION( 0x0300, "die_65sc02", 0 ) // from the 65SC02 die inside of the custom CPU + ROM_REGION( 0x0300, "die_65sc02", 0 ) // from the 65SC02 die inside of the custom CPU ROM_LOAD( "gteu65decoderom.bin", 0x0000, 0x02f1, CRC(089af0c6) SHA1(0f46a73a7859a694a07ebe74d476fae80e57e329) ) - ROM_REGION( 0x0800, "decode", 0 ) // from the CY7C291A inside of the custom CPU + ROM_REGION( 0x0800, "decode", 0 ) // from the CY7C291A inside of the custom CPU ROM_LOAD( "megacard_cy7291a.bin", 0x0000, 0x0800, CRC(596f01ac) SHA1(a8606a1dd385fbb46b1a96f11a759fa6580803d8) ) ROM_REGION( 0x10000, "gfx1", 0 ) @@ -6638,9 +6638,9 @@ ROM_END ROM_START( jokercrd ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "ic41.bin", 0x4000, 0x4000, CRC(d36188b3) SHA1(3fb848fabbbde9fbb70875b3dfef62bfb3a8cbcb) ) - ROM_IGNORE( 0x4000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x4000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "ic37.bin", 0xc000, 0x4000, CRC(8e0d70c4) SHA1(018f92631acbe98e5826a41698f0e07b4b46cd71) ) - ROM_IGNORE( 0x4000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x4000 ) // Identical halves. Discarding 2nd half ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "vesely_zg_2.ic11", 0x0000, 0x8000, CRC(21d05a57) SHA1(156c18ec31b08e4c4af6f73b49cb5d5c68d1670f) ) @@ -6682,25 +6682,25 @@ ROM_END ROM_START( mongolnw ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "prgteov.2.3m.u16", 0x8000, 0x8000, CRC(996b851a) SHA1(ef4e3d036ca10b33c83749024d04c4d4c09feeb7) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x10000, "cpu1", 0 ) // TSC87C52-16CB MCU Code + ROM_REGION( 0x10000, "cpu1", 0 ) // TSC87C52-16CB MCU Code ROM_LOAD( "tsc87c52-mf.u40", 0x0000, 0x02000 , CRC(ae22e778) SHA1(0897e05967d68d7f23489e98717663e3a3176070) ) ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "mong.rc.b2.u3", 0x0000, 0x8000, CRC(5e019b73) SHA1(63a544dccb9589e5a6b938e604c09d4d8fc060fc) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "mong.rc.c1.u2", 0x8000, 0x8000, CRC(e3fc24c4) SHA1(ea4e67ace63b55a76365f7e11a67c7d420a52dd7) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "mongolnw_nvram.bin", 0x0000, 0x0800, CRC(700531fa) SHA1(a8bcf86df6bd06d2ee54b4898dd7822060b81dba) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "am27s29pc_mf.u24", 0x0000, 0x0200, CRC(da9181af) SHA1(1b30d992f3b2a4b3bd81e3f99632311988e2e8d1) ) ROM_REGION( 0x0200, "plds", 0 ) - ROM_LOAD( "palce16v8h_mf.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h_mf.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected ROM_END @@ -6742,25 +6742,25 @@ ROM_END ROM_START( soccernw ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "prgteo2gv2.3.u16", 0x8000, 0x8000, CRC(c61d1937) SHA1(c516f13a108da60b7ccee338b63a025009ef9099) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x10000, "cpu1", 0 ) // TSC87C52-16CB MCU Code + ROM_REGION( 0x10000, "cpu1", 0 ) // TSC87C52-16CB MCU Code ROM_LOAD( "tsc87c52-sn.u40", 0x0000, 0x02000 , CRC(af0bd35b) SHA1(c6613a7bcdec2fd6060d6dcf639654568de87e75) ) ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "soccer2.u3", 0x0000, 0x8000, CRC(db09b5bb) SHA1(a12bf2938f5482ea5ebc0db6fd6594e1beb97017) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "soccer1.u2", 0x8000, 0x8000, CRC(564cc467) SHA1(8f90c4bacd97484623666b25dae77e628908e243) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "soccernw_nvram.bin", 0x0000, 0x0800, CRC(607247bd) SHA1(06bbed08166d8930f14e1f41843ac7faeded263d) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "am27s29pc_sn.u24", 0x0000, 0x0200, CRC(d02894fc) SHA1(adcdc912cc0b7a7f67b122fa94fca921c957b282) ) ROM_REGION( 0x0200, "plds", 0 ) - ROM_LOAD( "palce16v8h_sn.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected + ROM_LOAD( "palce16v8h_sn.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected ROM_END @@ -6884,7 +6884,7 @@ ROM_END --+----------------------------------------------------------------------- */ -ROM_START( funquiz ) // Fun World Quiz +ROM_START( funquiz ) // Fun World Quiz ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "kqu_6.bin", 0xc000, 0x4000, CRC(50f0e586) SHA1(85ce5b95283113e2ac94fd882c57ce1b26135ed0) ) @@ -6894,7 +6894,7 @@ ROM_START( funquiz ) // Fun World Quiz ROM_FILL( 0x8000, 0x4000, 0xff) ROM_LOAD( "q_2.bin", 0xc000, 0x4000, CRC(ce07c6e1) SHA1(6b77a9198e29c195d983b856e8826e8174945321) ) -// One unpopulated questions socket... Maybe sport_1 is missing +// One unpopulated questions socket... Maybe sport_1 is missing ROM_REGION( 0x100000, "questions", ROMREGION_ERASEFF ) // 01 - Allgemein @@ -7041,11 +7041,11 @@ ROM_START( witchryl ) ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "2.u11", 0x0000, 0x8000, CRC(7edc8f44) SHA1(cabad613fa8a72dc12587d19a72bc9c6861486bd) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "3.u4", 0x8000, 0x8000, CRC(5e4a0d59) SHA1(08eb9b1a617a7b2e6f87377819dba07082cf38b4) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "witchryl_nvram.bin", 0x0000, 0x0800, CRC(98366bed) SHA1(279a5ce4639b8b2ac29146b32512615253c45991) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -7062,7 +7062,7 @@ ROM_END */ -ROM_START( novoplay ) // Similar to Royal Vegas Joker Card +ROM_START( novoplay ) // Similar to Royal Vegas Joker Card ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "np1_run.bin", 0x8000, 0x8000, CRC(4078d695) SHA1(d0e39064250733968044aec216040fe62fecc880) ) @@ -7070,10 +7070,10 @@ ROM_START( novoplay ) // Similar to Royal Vegas Joker Card ROM_LOAD( "np1_ch2.bin", 0x0000, 0x8000, CRC(188d6fad) SHA1(3bc9bab24d8c7beed0c5f491c19a004ca7d719a1) ) ROM_LOAD( "np1_ch1.bin", 0x8000, 0x8000, CRC(fdc3bd67) SHA1(0ec2d5e0b1937849934f98e253e18887af0331e8) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "novoplay_nvram.bin", 0x0000, 0x0800, CRC(92019972) SHA1(e6d1e231cd2ce27e718ed9482dbe9ddc8612eb67) ) - ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half + ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half ROM_LOAD( "np1_27s29.bin", 0x0000, 0x0200, CRC(8992aa4d) SHA1(5a0649bff66e7cab1bcbadcdfc74c77a747cc58f) ) ROM_END @@ -7093,7 +7093,7 @@ ROM_END */ -ROM_START( jolycdsp ) // Encrypted program in a module. Blue TAB PCB encrypted graphics +ROM_START( jolycdsp ) // Encrypted program in a module. Blue TAB PCB encrypted graphics ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "ct3.bin", 0x8000, 0x8000, CRC(0c9cbae6) SHA1(4f834370229797cac302a5185ed1e77ef2b7cabb) ) @@ -7101,10 +7101,10 @@ ROM_START( jolycdsp ) // Encrypted program in a module. Blue TAB PCB encrypted g ROM_LOAD( "ct2.bin", 0x0000, 0x8000, CRC(7569e719) SHA1(f96e1e72bc13d1888f3868f8d404fd3db94db7b2) ) ROM_LOAD( "ct1.bin", 0x8000, 0x8000, CRC(8f438635) SHA1(3200e20f4b28173cc2a68d0f87969627570418dc) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "ctunk_nvram.bin", 0x0000, 0x0800, CRC(c55c6706) SHA1(a38ae926f057fb47e48ca841b2d097fc4fd06416) ) - ROM_REGION( 0x0200, "proms", 0 ) // Borrowed from the parent set + ROM_REGION( 0x0200, "proms", 0 ) // Borrowed from the parent set ROM_LOAD( "82s147.bin", 0x0000, 0x0200, CRC(5ebc5659) SHA1(8d59011a181399682ab6e8ed14f83101e9bfa0c6) ) ROM_END @@ -7137,11 +7137,11 @@ ROM_START( rcdino4 ) ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "m27c512.u2", 0x0000, 0x8000, CRC(915f1e59) SHA1(2eb2a7acca50318eb1775b01a00b1d3c74e1522c) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "m27c512.u20", 0x8000, 0x8000, CRC(86e55f5a) SHA1(be71301b6887e8cc5924864d0f97b54e0668875e) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "rcdino4_nvram.bin", 0x0000, 0x0800, CRC(a2dc069e) SHA1(23e296cc0cc0c6f0c34eccffff8c78d2cef2dbae) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -7164,11 +7164,11 @@ ROM_START( chinatow ) ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "27c512.u2", 0x0000, 0x8000, CRC(6ace221f) SHA1(d35a6621d9d9231a844d7043da78035855ebf572) ) - ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half 0xff filled + ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half 0xff filled ROM_LOAD( "27c512.u20", 0x8000, 0x8000, CRC(efb7f1ec) SHA1(260005526fc9b4087ca03f7cc585e40b6fa007fb) ) - ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half 0xff filled + ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half 0xff filled - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "chinatow_nvram.bin", 0x0000, 0x0800, CRC(eef4c5e7) SHA1(a2d9a9f617d35ccb99236114e5ce3257ad572f49) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -7318,7 +7318,7 @@ ROM_START( fw_a7_11a ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "m3-7649a-5.bin", 0x0000, 0x0200, CRC(f990a9ae) SHA1(f7133798b5f20dd5b8dbe5d1a6876341710d93a8) ) - ROM_REGION( 0x0200, "plds", 0 ) // cracked PLD + ROM_REGION( 0x0200, "plds", 0 ) // cracked PLD ROM_LOAD( "pal16l8acn_block.bin", 0x0000, 0x0117, CRC(fcda7872) SHA1(60acdb968e6229a8f71c2e29d22e132906a65bd5) ) ROM_END @@ -7402,27 +7402,27 @@ ROM_END Gratis Poker Stmk Version: 004 - 29. Sept. 95 + 29. Sept. 95 */ -ROM_START( gratispk ) // Gratis Poker (V.204, Set 1) +ROM_START( gratispk ) // Gratis Poker (V.204, Set 1) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "gratis_poker_club_ver_204.bin", 0x8000, 0x8000, CRC(e53da78e) SHA1(6b87af4d66082f1a18e9e00a41df2484f5373cc7) ) ROM_REGION( 0x10000, "gfx1", 0 ) ROM_LOAD( "3.bin", 0x0000, 0x8000, CRC(daec20c7) SHA1(340bdb7749a7d898e96db5a470821cfe7216ea57) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half ROM_LOAD( "2.bin", 0x8000, 0x8000, CRC(112c5f33) SHA1(fffaa247a97f9bde7374cc80ab0bb9fb71bcc4b6) ) - ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half + ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "gratispk_nvram.bin", 0x0000, 0x0800, CRC(8fcad62f) SHA1(85def713ed5b9bbdbf0d077a38f779d6f4329a1c) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "tbp28s42n.bin", 0x0000, 0x0200, CRC(e92f74e0) SHA1(dfc4a9d140d21b990f769c10802c4d2c33dd4132) ) ROM_END -ROM_START( gratispka ) // Gratis Poker (V.204, Set 2) +ROM_START( gratispka ) // Gratis Poker (V.204, Set 2) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "35g_ver_204.bin", 0x8000, 0x8000, CRC(e53da78e) SHA1(6b87af4d66082f1a18e9e00a41df2484f5373cc7) ) @@ -7430,7 +7430,7 @@ ROM_START( gratispka ) // Gratis Poker (V.204, Set 2) ROM_LOAD( "3.bin", 0x0000, 0x8000, CRC(4f077fa3) SHA1(d65005b7111b77ac7c3707bd12bc376506d9477b) ) ROM_LOAD( "2.bin", 0x8000, 0x8000, CRC(0f3711b0) SHA1(ce874dbfc2d7171cff2be41d4a44fe8194526ef7) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "gratispk_nvram.bin", 0x0000, 0x0800, CRC(8fcad62f) SHA1(85def713ed5b9bbdbf0d077a38f779d6f4329a1c) ) ROM_REGION( 0x0200, "proms", 0 ) @@ -7442,7 +7442,7 @@ ROM_END Γκούλιτ Nkoúlit Gullit - + Greek hack of Royal Card. */ @@ -7454,14 +7454,14 @@ ROM_START( nkoulit ) ROM_LOAD( "27c256-2.bin", 0x0000, 0x8000, CRC(4a9ea5ad) SHA1(50504544265646e12ce769a1fd40d7afeae8b8d3) ) ROM_LOAD( "27c256-1.bin", 0x8000, 0x8000, CRC(7b3a6d1a) SHA1(b7f2e534ad4467cd0a9d86019be8110caf45c024) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "nkoulit_nvram.bin", 0x0000, 0x0800, CRC(73584f67) SHA1(4aab0d4fe846592e1cbc8b3c2411ddc1bf79fd95) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "am27s29pc.bin", 0x0000, 0x0200, CRC(8bc86f48) SHA1(4c677ab9314a1f571e35104b22659e6811aeb194) ) ROM_END - + /* Reflex Cards (English) Need special NVRAM to boot. @@ -7472,7 +7472,7 @@ ROM_END the secret number to continue: Serial: 00000000 - Key: FFFFFFFF + Key: FFFFFFFF The real serial number isn't shown. Just zeroes as mask. You must to enter digit by digit using the HOLD buttons, @@ -7484,7 +7484,7 @@ ROM_END The code and NVRAM were reversed to find the serial number and key offsets and the way they are stored, to construct a working default NVRAM. - + */ ROM_START( reflexcrd ) ROM_REGION( 0x10000, "maincpu", 0 ) @@ -7494,14 +7494,14 @@ ROM_START( reflexcrd ) ROM_LOAD( "27c256-2.bin", 0x0000, 0x8000, CRC(05fe86fc) SHA1(a58ab5d107936f7d462f8f748bb6ac27bd77429b) ) ROM_LOAD( "27c256-3.bin", 0x8000, 0x8000, CRC(1617ed13) SHA1(312065406ce1d1d7c4ad566e2b13268f7eb524bb) ) - ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM + ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM ROM_LOAD( "reflexcrd_nvram.bin", 0x0000, 0x0800, CRC(c2c69e5b) SHA1(e4abbf09abc044ba17e542cc8e1cfa16ee7cf776) ) ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "bipolar_prom.bin", 0x0000, 0x0200, CRC(8bc86f48) SHA1(4c677ab9314a1f571e35104b22659e6811aeb194) ) ROM_END - + /************************** * Driver Initialization * **************************/ @@ -7533,13 +7533,13 @@ void funworld_state::init_tabblue() for (x=0x0000; x < 0x10000; x++) { - na = src[x] & 0xf0; // nibble A - nb = src[x] << 4; // nibble B + na = src[x] & 0xf0; // nibble A + nb = src[x] << 4; // nibble B - nad = (na ^ (na >> 1)) << 1; // nibble A decrypted - nbd = ((nb ^ (nb >> 1)) >> 3) & 0x0f; // nibble B decrypted + nad = (na ^ (na >> 1)) << 1; // nibble A decrypted + nbd = ((nb ^ (nb >> 1)) >> 3) & 0x0f; // nibble B decrypted - src[x] = nad + nbd; // decrypted byte + src[x] = nad + nbd; // decrypted byte } } @@ -7567,20 +7567,20 @@ void magicrd2_state::init_magicd2b() void magicrd2_state::init_magicd2c() { -// *** same as blue TAB PCB, with the magicd2a patch *** +// *** same as blue TAB PCB, with the magicd2a patch *** int x, na, nb, nad, nbd; uint8_t *src = memregion( "gfx1" )->base(); uint8_t *ROM = memregion("maincpu")->base(); for (x=0x0000; x < 0x10000; x++) { - na = src[x] & 0xf0; // nibble A - nb = src[x] << 4; // nibble B + na = src[x] & 0xf0; // nibble A + nb = src[x] << 4; // nibble B - nad = (na ^ (na >> 1)) << 1; // nibble A decrypted - nbd = ((nb ^ (nb >> 1)) >> 3) & 0x0f; // nibble B decrypted + nad = (na ^ (na >> 1)) << 1; // nibble A decrypted + nbd = ((nb ^ (nb >> 1)) >> 3) & 0x0f; // nibble B decrypted - src[x] = nad + nbd; // decrypted byte + src[x] = nad + nbd; // decrypted byte } ROM[0xc1c6] = 0x92; @@ -7589,26 +7589,26 @@ void magicrd2_state::init_magicd2c() void funworld_state::init_mongolnw() { -// temporary patch to avoid hardware errors for debug purposes +// temporary patch to avoid hardware errors for debug purposes uint8_t *ROM = memregion("maincpu")->base(); ROM[0x9115] = 0xa5; -// prevents one test from triggering hardware error +// prevents one test from triggering hardware error ROM[0xb8f3] = 0xff; } void funworld_state::init_soccernw() { -// temporary patch to avoid hardware errors for debug purposes +// temporary patch to avoid hardware errors for debug purposes uint8_t *ROM = memregion("maincpu")->base(); ROM[0x80b2] = 0xa9; ROM[0x80b3] = 0x00; ROM[0x9115] = 0xa5; -// prevents one test from triggering hardware error +// prevents one test from triggering hardware error ROM[0xb8f3] = 0xff; } @@ -7825,13 +7825,13 @@ void funworld_state::init_ctunk() //uint8_t *ROM = memregion("maincpu")->base(); for (int x = 0x0000; x < 0x10000; x++) { - int na = src[x] & 0xf0; // nibble A - int nb = src[x] << 4; // nibble B + int na = src[x] & 0xf0; // nibble A + int nb = src[x] << 4; // nibble B - int nad = (na ^ (na >> 1)) << 1; // nibble A decrypted - int nbd = ((nb ^ (nb >> 1)) >> 3) & 0x0f; // nibble B decrypted + int nad = (na ^ (na >> 1)) << 1; // nibble A decrypted + int nbd = ((nb ^ (nb >> 1)) >> 3) & 0x0f; // nibble B decrypted - src[x] = nad + nbd; // decrypted byte + src[x] = nad + nbd; // decrypted byte } } @@ -8030,40 +8030,40 @@ void chinatow_state::init_rcdino4() int add = rcdino4_add[c]; if (((i == 0x81) - && (j >= 0xa3) && (j <= 0xb1) // text string + && (j >= 0xa3) && (j <= 0xb1) // text string ) || ((i == 0x82) - && (j >= 0x35) && (j <= 0x53) // table of addresses + && (j >= 0x35) && (j <= 0x53) // table of addresses ) || ((i == 0x85) - && (j >= 0x7e) && (j <= 0x8d) // '0'-'9', 'A'-'F' + && (j >= 0x7e) && (j <= 0x8d) // '0'-'9', 'A'-'F' ) || ((i == 0x94) - && (((j >= 0x4a) && (j <= 0x86)) // zeroes - || ((j >= 0xbf) && (j <= 0xc1)) // set of masks */ + && (((j >= 0x4a) && (j <= 0x86)) // zeroes + || ((j >= 0xbf) && (j <= 0xc1)) // set of masks */ ) ) || ((i == 0x96) - && (j >= 0x39) && (j <= 0x3e) // set of masks + && (j >= 0x39) && (j <= 0x3e) // set of masks ) || ((i == 0xa6) - && (j >= 0x30) && (j <= 0x32) // set of masks + && (j >= 0x30) && (j <= 0x32) // set of masks ) || ((i == 0xaa) - && (j >= 0xf2) // table of addresses + && (j >= 0xf2) // table of addresses ) || ((i == 0xc3) - && (j >= 0x70) && (j <= 0xaf) // set of masks + && (j >= 0x70) && (j <= 0xaf) // set of masks ) || ((i == 0xc4) - && (j >= 0xdc) // zeroes and things + && (j >= 0xdc) // zeroes and things ) || ((i == 0xd0) - && (j >= 0xd2) // text and zeroes + && (j >= 0xd2) // text and zeroes ) || ((i == 0xd2) - && ((j <= 0x2f) // text and zeroes - || ((j >= 0x84) && (j <= 0xaf)) // text and zeroes + && ((j <= 0x2f) // text and zeroes + || ((j >= 0x84) && (j <= 0xaf)) // text and zeroes ) ) || (add == 9) @@ -8094,7 +8094,7 @@ void chinatow_state::init_rcdino4() || (i == 0xf8) ) { - j = 0; // re-align offset after skipping some pages + j = 0; // re-align offset after skipping some pages } } while (1); diff --git a/src/mame/drivers/generalplus_gpl16250_nand.cpp b/src/mame/drivers/generalplus_gpl16250_nand.cpp index d0dafa01d39..f539ba42b62 100644 --- a/src/mame/drivers/generalplus_gpl16250_nand.cpp +++ b/src/mame/drivers/generalplus_gpl16250_nand.cpp @@ -749,18 +749,18 @@ void generalplus_gpac800_game_state::machine_reset() } /* these vectors must either directly point to RAM, or at least redirect there after some code - + kiugames has the startup code copied to 20xxx which is outside the scope of a 16-bit vector so these must trampoline (although 20xxx currently isn't handled as RAM, so that needs more thought anyway */ uint16_t* internal = (uint16_t*)memregion("maincpu:internal")->base(); - + int addr; addr = (m_vectorbase + 0x0a) & 0x000fffff; internal[0x7f00] = 0xfe80 | (addr >> 16); internal[0x7f01] = (addr & 0xffff); - + addr = (m_vectorbase + 0x0c) & 0x000fffff; internal[0x7f02] = 0xfe80 | (addr >> 16); internal[0x7f03] = (addr & 0xffff); diff --git a/src/mame/drivers/generalplus_gpl_unknown.cpp b/src/mame/drivers/generalplus_gpl_unknown.cpp index e8b41746bdd..fe1e118e5cf 100644 --- a/src/mame/drivers/generalplus_gpl_unknown.cpp +++ b/src/mame/drivers/generalplus_gpl_unknown.cpp @@ -262,7 +262,7 @@ void pcp8718_state::spi_process_tx_data(uint8_t data) case SPI_STATE_WAITING_DUMMY2_ADDR: { - // m_spistate = SPI_STATE_READY; + // m_spistate = SPI_STATE_READY; break; } } @@ -358,7 +358,7 @@ void pcp8718_state::map(address_map &map) map(0x007945, 0x007945).r(FUNC(pcp8718_state::spi_misc_control_r)); map(0x007abf, 0x007abf).r(FUNC(pcp8718_state::unk_7abf_r)); - + // registers at 7xxx are similar to GPL16250, but not identical? (different video system?) @@ -402,12 +402,12 @@ uint16_t pcp8718_state::simulate_f000_r(offs_t offset) logerror("call to 0xf58f - unknown function\n"); return 0x9a90; // retf } - else if (realpc == 0xfb26) // done with a call, and also a pc = + else if (realpc == 0xfb26) // done with a call, and also a pc = { logerror("call to 0xfb26 - unknown function\n"); return 0x9a90; // retf } - else if (realpc == 0xf56f) // done with a pc = + else if (realpc == 0xf56f) // done with a pc = { logerror("call to 0xf56f - unknown function\n"); return 0x9a90; // retf @@ -505,7 +505,7 @@ void pcp8718_state::machine_reset() m_maincpu->set_state_int(UNSP_SR, 0x0000); //uint16_t* ROM = (uint16_t*)memregion("maincpu")->base(); - //ROM[0x0000] = 0x9a90; // retf from internal ROM call to 0xf000 (unknown purpose) + //ROM[0x0000] = 0x9a90; // retf from internal ROM call to 0xf000 (unknown purpose) // there doesn't appear to be any code to set the SP, so it must be done by the internal ROM m_maincpu->set_state_int(UNSP_SP, 0x5fff); diff --git a/src/mame/drivers/gigatron.cpp b/src/mame/drivers/gigatron.cpp index f709b1980ac..3261208786b 100644 --- a/src/mame/drivers/gigatron.cpp +++ b/src/mame/drivers/gigatron.cpp @@ -2,10 +2,10 @@ // copyright-holders:Sterophonick, Phil Thomas /*************************************************************************** - Driver for Gigatron TTL Microcomputer by Sterophonick - - Based on Gigatron.js by Phil Thomas - https://github.com/PhilThomas/gigatron + Driver for Gigatron TTL Microcomputer by Sterophonick + + Based on Gigatron.js by Phil Thomas + https://github.com/PhilThomas/gigatron ***************************************************************************/ @@ -24,10 +24,10 @@ /*************************************************************************** - TODO - - Hook up a quikload for loading .gt1 files - HLE the keyboard and Pluggy McPlugface + TODO + + Hook up a quikload for loading .gt1 files + HLE the keyboard and Pluggy McPlugface ***************************************************************************/ @@ -73,19 +73,19 @@ private: int16_t m_row; int16_t m_col; uint8_t m_pixel; - + uint8_t m_dacoutput; void port_outx(uint8_t data); void port_out(uint8_t data); - + std::unique_ptr<bitmap_rgb32> m_bitmap_render; required_device<gigatron_cpu_device> m_maincpu; required_device<dac_byte_interface> m_dac; required_device<screen_device> m_screen; required_ioport m_io_inputs; - + output_finder<> m_blinken1; output_finder<> m_blinken2; output_finder<> m_blinken3; @@ -98,7 +98,7 @@ private: void gigatron_state::video_start() { - m_bitmap_render = std::make_unique<bitmap_rgb32>(640, 480); + m_bitmap_render = std::make_unique<bitmap_rgb32>(640, 480); } void gigatron_state::video_reset() @@ -110,52 +110,52 @@ void gigatron_state::video_reset() void gigatron_state::port_out(uint8_t data) { - m_pixel = data; - uint8_t out = m_pixel; - uint8_t falling = m_out & ~out; - - if (falling & VSYNC) - { - m_row = -36; - m_pixel = 0; - } - - if (falling & HSYNC) - { - m_col = -4; - m_row++; - } - - m_out = out; - - if ((out & (VSYNC | HSYNC)) != (VSYNC | HSYNC)) - { - return; - } - - if((m_row >= 0 && m_row < 480) && (m_col >= 0 && m_col < 640)) - { - uint8_t r = (out << 6) & 0xC0; - uint8_t g = (out << 4) & 0xC0; - uint8_t b = (out << 2) & 0xC0; - uint32_t *dest = &m_bitmap_render->pix32(m_row, m_col); - for(uint8_t i = 0; i < 4; i++) - *dest++ = b|(g<<8)|(r<<16); - } - m_col += 4; + m_pixel = data; + uint8_t out = m_pixel; + uint8_t falling = m_out & ~out; + + if (falling & VSYNC) + { + m_row = -36; + m_pixel = 0; + } + + if (falling & HSYNC) + { + m_col = -4; + m_row++; + } + + m_out = out; + + if ((out & (VSYNC | HSYNC)) != (VSYNC | HSYNC)) + { + return; + } + + if((m_row >= 0 && m_row < 480) && (m_col >= 0 && m_col < 640)) + { + uint8_t r = (out << 6) & 0xC0; + uint8_t g = (out << 4) & 0xC0; + uint8_t b = (out << 2) & 0xC0; + uint32_t *dest = &m_bitmap_render->pix32(m_row, m_col); + for(uint8_t i = 0; i < 4; i++) + *dest++ = b|(g<<8)|(r<<16); + } + m_col += 4; } //6-bit color, VGA uint32_t gigatron_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - copybitmap(bitmap, *m_bitmap_render, 0, 0, 0, 0, cliprect); + copybitmap(bitmap, *m_bitmap_render, 0, 0, 0, 0, cliprect); video_reset(); - + m_blinken1 = (m_lights >> 3) & 1; m_blinken2 = (m_lights >> 2) & 1; m_blinken3 = (m_lights >> 1) & 1; m_blinken4 = (m_lights >> 0) & 1; - return 0; + return 0; } //************************************************************************** @@ -195,7 +195,7 @@ void gigatron_state::machine_start() m_blinken2.resolve(); m_blinken3.resolve(); m_blinken4.resolve(); - + //Savestate stuff save_item(NAME(m_lights)); save_item(NAME(m_out)); @@ -221,7 +221,7 @@ void gigatron_state::port_outx(uint8_t data) //Write sound to DAC m_dacoutput = (data & 0xF0) >> 4; m_dac->write(m_dacoutput); - + //Blinkenlights m_lights = data & 0xF; } @@ -229,7 +229,7 @@ void gigatron_state::port_outx(uint8_t data) void gigatron_state::gigatron(machine_config &config) { config.set_default_layout(layout_gigatron); - + GTRON(config, m_maincpu, MAIN_CLOCK); m_maincpu->set_addrmap(AS_PROGRAM, &gigatron_state::prog_map); m_maincpu->set_addrmap(AS_DATA, &gigatron_state::data_map); diff --git a/src/mame/drivers/gnat10.cpp b/src/mame/drivers/gnat10.cpp index 71281562694..821bb249a7b 100644 --- a/src/mame/drivers/gnat10.cpp +++ b/src/mame/drivers/gnat10.cpp @@ -10,11 +10,26 @@ ****************************************************************************/ #include "emu.h" +//#include "bus/ieee488/ieee488.h" +//#include "bus/rs232/rs232.h" +//#include "machine/tms9914.h" #include "cpu/z80/z80.h" +#include "cpu/i8085/i8085.h" #include "imagedev/floppy.h" +//#include "machine/am9511.h" +//#include "machine/am9517a.h" +//#include "machine/i8155.h" +//#include "machine/i8251.h" #include "machine/com8116.h" +//#include "machine/mm58167.h" +//#include "machine/tms9914.h" #include "machine/wd_fdc.h" +//#include "machine/z80ctc.h" +//#include "machine/z80pio.h" #include "machine/z80sio.h" +//#include "video/mc6845.h" +//#include "screen.h" +//#include "speaker.h" class gnat10_state : public driver_device { @@ -28,6 +43,7 @@ public: , m_monitor(*this, "monitor") , m_ram(*this, "ram") , m_ram_on(false) + , m_prom_disable(false) { } @@ -38,14 +54,17 @@ protected: virtual void machine_reset() override; private: - u8 ram_r(offs_t offset); + u8 mem_r(offs_t offset); u8 floppy_status_r(); void floppy_latch_w(u8 data); + u8 rtc_r(offs_t offset); + void rtc_w(offs_t offset, u8 data); void baud0_w(u8 data); void baud1_w(u8 data); void mem_map(address_map &map); void io_map(address_map &map); + void video_map(address_map &map); required_device<cpu_device> m_maincpu; required_device<fd1793_device> m_fdc; @@ -55,11 +74,13 @@ private: required_shared_ptr<u8> m_ram; bool m_ram_on; + bool m_prom_disable; }; void gnat10_state::machine_start() { save_item(NAME(m_ram_on)); + save_item(NAME(m_prom_disable)); } void gnat10_state::machine_reset() @@ -69,9 +90,9 @@ void gnat10_state::machine_reset() } -u8 gnat10_state::ram_r(offs_t offset) +u8 gnat10_state::mem_r(offs_t offset) { - if (m_ram_on) + if (m_ram_on && (m_prom_disable || offset < 0xf800)) return m_ram[offset]; else return m_monitor[offset & 0x07ff]; @@ -79,6 +100,10 @@ u8 gnat10_state::ram_r(offs_t offset) u8 gnat10_state::floppy_status_r() { + if (!machine().side_effects_disabled()) + { + // TODO: this also forces the motor on (it turns off on a timeout) + } return m_fdc->drq_r() << 7 | m_fdc->intrq_r(); } @@ -93,9 +118,21 @@ void gnat10_state::floppy_latch_w(u8 data) if (floppy != nullptr) floppy->ss_w(BIT(data, 5)); + m_prom_disable = BIT(data, 6); + m_fdc->mr_w(BIT(data, 7)); } +u8 gnat10_state::rtc_r(offs_t offset) +{ + return 0; //m_rtc->read(offset ^ 0x10); +} + +void gnat10_state::rtc_w(offs_t offset, u8 data) +{ + //m_rtc->write(offset ^ 0x10, data); +} + void gnat10_state::baud0_w(u8 data) { m_brg->str_w(data & 0x0f); @@ -109,19 +146,42 @@ void gnat10_state::baud1_w(u8 data) void gnat10_state::mem_map(address_map &map) { - map(0x0000, 0xf7ff).r(FUNC(gnat10_state::ram_r)).writeonly().share("ram"); - map(0xf800, 0xffff).rom().region("monitor", 0); + map(0x0000, 0xffff).r(FUNC(gnat10_state::mem_r)).writeonly().share("ram"); } void gnat10_state::io_map(address_map &map) { map.global_mask(0xff); - map(0x60, 0x63).rw("sio1", FUNC(z80sio_device::ba_cd_r), FUNC(z80sio_device::ba_cd_w)); - map(0x70, 0x73).rw("sio0", FUNC(z80sio_device::ba_cd_r), FUNC(z80sio_device::ba_cd_w)); - map(0x80, 0x83).rw(m_fdc, FUNC(fd1793_device::read), FUNC(fd1793_device::write)); - map(0xa0, 0xa0).rw(FUNC(gnat10_state::floppy_status_r), FUNC(gnat10_state::floppy_latch_w)); - map(0xd0, 0xd0).w(FUNC(gnat10_state::baud0_w)); - map(0xe0, 0xe0).w(FUNC(gnat10_state::baud1_w)); + //map(0x00, 0x0f).rw("dmac", FUNC(am9517a_device::read), FUNC(am9517a_device::write)); + //map(0x10, 0x11).mirror(0xe).rw("apu", FUNC(am9511_device::read), FUNC(am9511_device::write)); + //map(0x20, 0x23).mirror(0xc).rw("ctc", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)); + //map(0x30, 0x3f).rw("488c", FUNC(tms9914_device::read), FUNC(tms9914_device::write)); + //map(0x40, 0x40).mirror(0xf).rw(FUNC(gnat10_state::pdma1_r), FUNC(gnat10_state::pdma1_w)); + //map(0x50, 0x53).mirror(0xc).rw("pio", FUNC(z80pio_device::read), FUNC(z80pio_device::write)); + map(0x60, 0x63).mirror(0xc).rw("sio1", FUNC(z80sio_device::ba_cd_r), FUNC(z80sio_device::ba_cd_w)); + map(0x70, 0x73).mirror(0xc).rw("sio0", FUNC(z80sio_device::ba_cd_r), FUNC(z80sio_device::ba_cd_w)); + map(0x80, 0x83).mirror(0xc).rw(m_fdc, FUNC(fd1793_device::read), FUNC(fd1793_device::write)); + //map(0x90, 0x90).mirror(0xf).rw(FUNC(gnat10_state::pdma0_r), FUNC(gnat10_state::pdma0_w)); + map(0xa0, 0xa0).mirror(0xf).rw(FUNC(gnat10_state::floppy_status_r), FUNC(gnat10_state::floppy_latch_w)); + map(0xb0, 0xcf).rw(FUNC(gnat10_state::rtc_r), FUNC(gnat10_state::rtc_w)); + map(0xd0, 0xd0).mirror(0xf).w(FUNC(gnat10_state::baud0_w)); + map(0xe0, 0xe0).mirror(0xf).w(FUNC(gnat10_state::baud1_w)); + //map(0xf0, 0xf0).r(?); // undocumented switches? +} + +void gnat10_state::video_map(address_map &map) +{ + map.global_mask(0x7fff); + map(0x0000, 0x07ff).mirror(0x800).rom().region("videocpu", 0); + map(0x1000, 0x13ff).mirror(0xc00).ram(); + map(0x2000, 0x27ff).mirror(0x800).ram().share("vram"); + //map(0x3000, 0x3000).mirror(0xfff).w(FUNC(gnat10_state::reset_out_w)); + //map(0x4000, 0x40ff).mirror(0x700).rw("videopio", FUNC(i8155_device::memory_r), FUNC(i8155_device::memory_w)); + //map(0x4800, 0x4807).mirror(0x7f8).rw("videopio", FUNC(i8155_device::io_r), FUNC(i8155_device::io_w)); + //map(0x5000, 0x5001).mirror(0xffe).rw("videosio", FUNC(i8251_device::read), FUNC(i8251_device::write)); + //map(0x6000, 0x6000).mirror(0xfff).w(FUNC(gnat10_state::bell_w)); + //map(0x7000, 0x7000).mirror(0xffe).w("crtc", FUNC(mc6845_device::address_w)); + //map(0x7001, 0x7001).mirror(0xffe).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); } @@ -146,19 +206,31 @@ void gnat10_state::gnat10(machine_config &config) FLOPPY_CONNECTOR(config, m_floppy[0], gnat_floppies, "525qd", floppy_image_device::default_floppy_formats); FLOPPY_CONNECTOR(config, m_floppy[1], gnat_floppies, "525qd", floppy_image_device::default_floppy_formats); - COM5016_5(config, m_brg, 4.9152_MHz_XTAL); // specific type unknown + COM5016_5(config, m_brg, 4.9152_MHz_XTAL); // BR1941-5 m_brg->fr_handler().set("sio0", FUNC(z80sio_device::rxca_w)); m_brg->fr_handler().append("sio0", FUNC(z80sio_device::txca_w)); m_brg->fr_handler().append("sio1", FUNC(z80sio_device::rxca_w)); m_brg->fr_handler().append("sio1", FUNC(z80sio_device::txca_w)); m_brg->ft_handler().set("sio1", FUNC(z80sio_device::rxtxcb_w)); - // TODO: video screen, peripheral ports + // TODO: DMAC, peripheral ports + + i8085a_cpu_device &videocpu(I8085A(config, "videocpu", 18.432_MHz_XTAL / 4)); + videocpu.set_addrmap(AS_PROGRAM, &gnat10_state::video_map); + videocpu.set_disable(); + + // TODO: 8155, 8251A, 6845, video screen } ROM_START(gnat10) ROM_REGION(0x800, "monitor", 0) ROM_LOAD("gnat-507", 0x000, 0x800, CRC(72baa750) SHA1(7b78324b90b8c6f78c88a7dde8d53ea612ea1f7f)) // LF patched back to CR/LF in four instances + + ROM_REGION(0x800, "videocpu", 0) + ROM_LOAD("videocpu.bin", 0x000, 0x800, NO_DUMP) // TMS2716 or TMS2732 + + ROM_REGION(0x800, "chargen", 0) + ROM_LOAD("chargen.bin", 0x000, 0x800, NO_DUMP) // TMS2716 or TMS2732 ROM_END COMP(1980, gnat10, 0, 0, gnat10, gnat10, gnat10_state, empty_init, "GNAT Computers", "GNAT System 10", MACHINE_IS_SKELETON) diff --git a/src/mame/drivers/goldnpkr.cpp b/src/mame/drivers/goldnpkr.cpp index ea2fa1cc8cb..353bd220102 100644 --- a/src/mame/drivers/goldnpkr.cpp +++ b/src/mame/drivers/goldnpkr.cpp @@ -487,16 +487,16 @@ Entering the service mode (key 0), you can enter to a submenu for settings pressing DEAL (key 2): - - Win Limit (0-9 the first time, then 3-9) - Payout Limit (0-2) - Double Odds % (0-9) - Payout % (0-9) - Hard Setting (0-4) - Note Value (fixed in 5) - Bonus (0 to 10000, step x100) - (if you rech 10000, settings exits and go to game. You can't change bonus anymore. + Win Limit (0-9 the first time, then 3-9) + Payout Limit (0-2) + Double Odds % (0-9) + Payout % (0-9) + Hard Setting (0-4) + Note Value (fixed in 5) + + Bonus (0 to 10000, step x100) + (if you rech 10000, settings exits and go to game. You can't change bonus anymore. Use HOLD keys (keys ZXCVB) to navigate through the menu and change the values. Press CANCEL to exit the settings menu. @@ -12177,8 +12177,8 @@ void goldnpkr_state::init_bonuspkr() The game takes 25 seconds to do all the checks. - E9F4: jmp $EA56 ; infinite loop / dead end. - E9F7: jmp $CEC6 ; the game continue executing... + E9F4: jmp $EA56 ; infinite loop / dead end. + E9F7: jmp $CEC6 ; the game continue executing... */ diff --git a/src/mame/drivers/goldstar.cpp b/src/mame/drivers/goldstar.cpp index 8d0519c7f07..dcae637a028 100644 --- a/src/mame/drivers/goldstar.cpp +++ b/src/mame/drivers/goldstar.cpp @@ -11247,7 +11247,7 @@ ROM_END The EPROMS devices only hold the second half of the needed program and regular tiles data. EPROMS are NMC27CP128Q that are sized 0x4000, when the real data should be 0x8000 for each position. - + *EDIT* Even when the NMC27CP128Q datasheet says that these devices are 128 Kbits (16k x8), we redumped them as 27c256, and got perfect complete 32k x8 dumps. @@ -11259,7 +11259,7 @@ ROM_END */ ROM_START( cmasteri ) - ROM_REGION( 0x10000, "maincpu", 0 ) // 32k x 8 data coming from a real NMC27CP128Q + ROM_REGION( 0x10000, "maincpu", 0 ) // 32k x 8 data coming from a real NMC27CP128Q ROM_LOAD( "9.u81", 0x0000, 0x1000, CRC(2738eb55) SHA1(95e420544f36e4ce6358f14fee7a6b7ecd4cc568) ) ROM_CONTINUE(0x4000,0x1000) ROM_CONTINUE(0x3000,0x1000) @@ -11269,7 +11269,7 @@ ROM_START( cmasteri ) ROM_CONTINUE(0x2000,0x1000) ROM_CONTINUE(0x5000,0x1000) - ROM_REGION( 0x18000, "gfx1", 0 ) // 32k x 8 data coming from real NMC27CP128Q devices + ROM_REGION( 0x18000, "gfx1", 0 ) // 32k x 8 data coming from real NMC27CP128Q devices ROM_LOAD( "7.u16", 0x00000, 0x8000, CRC(19cc1d67) SHA1(47487f9362bfb36a32100ed772960628844462bf) ) ROM_LOAD( "6.u11", 0x08000, 0x8000, CRC(63b3df4e) SHA1(9bacd23da598805ec18ec5ad15cab95d71eb9262) ) ROM_LOAD( "5.u4", 0x10000, 0x8000, CRC(e39fff9c) SHA1(22fdc517fa478441622c6245cecb5728c5595757) ) diff --git a/src/mame/drivers/guab.cpp b/src/mame/drivers/guab.cpp index be49d0256c0..193675652cc 100644 --- a/src/mame/drivers/guab.cpp +++ b/src/mame/drivers/guab.cpp @@ -28,7 +28,7 @@ Notes: * Toggle both 'Back door' and 'Key switch' to enter test mode - * Opening the back door will disable coinup + * Opening the back door will disable coinup * Video hardware seems to match JPM System 5 * IRQ 1 inits the PPIs, IRQ 2 does nothing @@ -505,7 +505,7 @@ void guab_state::guab(machine_config &config) ppi4.out_pc_callback().set(FUNC(guab_state::watchdog_w)); bacta_datalogger_device &bacta(BACTA_DATALOGGER(config, "bacta", 0)); - + acia6850_device &acia1(ACIA6850(config, "acia6850_1", 0)); acia1.txd_handler().set("bacta", FUNC(bacta_datalogger_device::write_txd)); acia1.irq_handler().set_inputline("maincpu", 4); diff --git a/src/mame/drivers/hec2hrp.cpp b/src/mame/drivers/hec2hrp.cpp index 36977c2e70e..a8a0fa64f45 100644 --- a/src/mame/drivers/hec2hrp.cpp +++ b/src/mame/drivers/hec2hrp.cpp @@ -121,7 +121,7 @@ void hec2hrp_state::hec2hrx_mem(address_map &map) { map.unmap_value_high(); hec2hrp_mem(map); - map(0x0000, 0x3fff).bankr("bank2"); /* Main ROM page*/ + map(0x0000, 0x3fff).bankr("bank2"); /* Main ROM page*/ map(0x3000, 0x3000).rw(FUNC(hec2hrp_state::cassette_r), FUNC(hec2hrp_state::sn_3000_w));/* Write necessary*/ map(0x3800, 0x3807).rw(FUNC(hec2hrp_state::keyboard_r), FUNC(hec2hrp_state::keyboard_w)); /* Keyboard*/ map(0xc000, 0xffff).bankrw("bank1").share("hector_videoram"); /* => Bank Ram for video and data */ diff --git a/src/mame/drivers/jpmsys5.cpp b/src/mame/drivers/jpmsys5.cpp index 38a1a4f67aa..b203c7d6330 100644 --- a/src/mame/drivers/jpmsys5.cpp +++ b/src/mame/drivers/jpmsys5.cpp @@ -449,7 +449,7 @@ static INPUT_PORTS_START( monopoly ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_NAME("50p") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN4 ) PORT_NAME("100p") PORT_BIT( 0xc3, IP_ACTIVE_LOW, IPT_UNUSED ) - + PORT_START("TOUCH_PUSH") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, jpmsys5v_state,touchscreen_press, 0) diff --git a/src/mame/drivers/karnov.cpp b/src/mame/drivers/karnov.cpp index 17cca757257..97b715a5fe0 100644 --- a/src/mame/drivers/karnov.cpp +++ b/src/mame/drivers/karnov.cpp @@ -766,10 +766,10 @@ void karnov_state::machine_reset() void karnov_state::karnov(machine_config &config) { /* basic machine hardware */ - M68000(config, m_maincpu, 10000000); /* 10 MHz */ + M68000(config, m_maincpu, 20_MHz_XTAL/2); /* 10 MHz */ m_maincpu->set_addrmap(AS_PROGRAM, &karnov_state::karnov_map); - M6502(config, m_audiocpu, 1500000); /* Accurate */ + M6502(config, m_audiocpu, 12_MHz_XTAL/8); /* Accurate */ m_audiocpu->set_addrmap(AS_PROGRAM, &karnov_state::karnov_sound_map); /* video hardware */ @@ -799,10 +799,10 @@ void karnov_state::karnov(machine_config &config) GENERIC_LATCH_8(config, m_soundlatch); m_soundlatch->data_pending_callback().set_inputline(m_audiocpu, INPUT_LINE_NMI); - ym2203_device &ym1(YM2203(config, "ym1", 1500000)); + ym2203_device &ym1(YM2203(config, "ym1", 12_MHz_XTAL/8)); // 1.5 MHz ym1.add_route(ALL_OUTPUTS, "mono", 0.25); - ym3526_device &ym2(YM3526(config, "ym2", 3000000)); + ym3526_device &ym2(YM3526(config, "ym2", 12_MHz_XTAL/4)); // 3 MHz ym2.irq_handler().set_inputline(m_audiocpu, M6502_IRQ_LINE); ym2.add_route(ALL_OUTPUTS, "mono", 1.0); } @@ -826,7 +826,7 @@ void karnov_state::chelnov(machine_config &config) karnov(config); m_maincpu->set_addrmap(AS_PROGRAM, &karnov_state::chelnov_map); - I8751(config, m_mcu, 8_MHz_XTAL); // unknown clock + I8751(config, m_mcu, 8_MHz_XTAL); // 8.000 MHz OSC next to MCU m_mcu->port_in_cb<0>().set([this](){ return m_mcu_p0; }); m_mcu->port_out_cb<0>().set([this](u8 data){ m_mcu_p0 = data; }); m_mcu->port_in_cb<1>().set([this](){ return m_mcu_p1; }); @@ -844,7 +844,7 @@ void karnov_state::chelnovjbl(machine_config &config) karnov(config); m_maincpu->set_addrmap(AS_PROGRAM, &karnov_state::chelnov_map); - I8031(config, m_mcu, 8_MHz_XTAL); // unknown clock + I8031(config, m_mcu, 8_MHz_XTAL); // info below states 8MHz for MCU m_mcu->set_addrmap(AS_PROGRAM, &karnov_state::chelnovjbl_mcu_map); m_mcu->set_addrmap(AS_IO, &karnov_state::chelnovjbl_mcu_io_map); m_mcu->port_out_cb<1>().set(FUNC(karnov_state::mcubl_p1_w)); @@ -856,10 +856,10 @@ void karnov_state::chelnovjbl(machine_config &config) void karnov_state::wndrplnt(machine_config &config) { /* basic machine hardware */ - M68000(config, m_maincpu, 10000000); /* 10 MHz */ + M68000(config, m_maincpu, 20_MHz_XTAL/2); /* 10 MHz */ m_maincpu->set_addrmap(AS_PROGRAM, &karnov_state::karnov_map); - M6502(config, m_audiocpu, 1500000); /* Accurate */ + M6502(config, m_audiocpu, 12_MHz_XTAL/8); /* Accurate */ m_audiocpu->set_addrmap(AS_PROGRAM, &karnov_state::karnov_sound_map); /* video hardware */ @@ -889,10 +889,10 @@ void karnov_state::wndrplnt(machine_config &config) GENERIC_LATCH_8(config, m_soundlatch); m_soundlatch->data_pending_callback().set_inputline(m_audiocpu, INPUT_LINE_NMI); - ym2203_device &ym1(YM2203(config, "ym1", 1500000)); + ym2203_device &ym1(YM2203(config, "ym1", 12_MHz_XTAL/8)); // 1.5 MHz ym1.add_route(ALL_OUTPUTS, "mono", 0.25); - ym3526_device &ym2(YM3526(config, "ym2", 3000000)); + ym3526_device &ym2(YM3526(config, "ym2", 12_MHz_XTAL/4)); // 3 MHz ym2.irq_handler().set_inputline(m_audiocpu, M6502_IRQ_LINE); ym2.add_route(ALL_OUTPUTS, "mono", 1.0); } @@ -904,7 +904,7 @@ void karnov_state::wndrplnt(machine_config &config) * *************************************/ -ROM_START( karnov ) +ROM_START( karnov ) /* DE-0248-3 main board, DE-259-0 sub/rom board */ ROM_REGION( 0x60000, "maincpu", 0 ) /* 6*64k for 68000 code */ ROM_LOAD16_BYTE( "dn08-6.j15", 0x00000, 0x10000, CRC(4c60837f) SHA1(6886e6ee1d1563c3011b8fea79e7435f983a3ee0) ) ROM_LOAD16_BYTE( "dn11-6.j20", 0x00001, 0x10000, CRC(cd4abb99) SHA1(b4482175f5d90941ad3aec6c2269a50f57a465ed) ) @@ -930,20 +930,20 @@ ROM_START( karnov ) ROM_REGION( 0x60000, "gfx3", 0 ) ROM_LOAD( "dn12-.f8", 0x00000, 0x10000, CRC(9806772c) SHA1(01f17fa033262a3e64e0675cc4e20b3c3f4b254d) ) /* Sprites - 2 sets of 4, interleaved here */ - ROM_LOAD( "dn14-5.f9", 0x10000, 0x08000, CRC(ac9e6732) SHA1(6f61344eb8a13349471145dee252a01aadb8cdf0) ) - ROM_LOAD( "dn13-.f13", 0x18000, 0x10000, CRC(a03308f9) SHA1(1d450725a5c488332c83d8f64a73a750ce7fe4c7) ) - ROM_LOAD( "dn15-5.f15", 0x28000, 0x08000, CRC(8933fcb8) SHA1(0dbda4b032ed3776d7633264f39e6f00ace7a238) ) - ROM_LOAD( "dn16-", 0x30000, 0x10000, CRC(55e63a11) SHA1(3ef0468fa02ac5382007428122216917ad5eaa0e) ) - ROM_LOAD( "dn17-5", 0x40000, 0x08000, CRC(b70ae950) SHA1(1ec833bdad12710ea846ef48dddbe2e1ae6b8ce1) ) - ROM_LOAD( "dn18-", 0x48000, 0x10000, CRC(2ad53213) SHA1(f22696920bf3d74fb0e28e2d7cb31be5e183c6b4) ) - ROM_LOAD( "dn19-5", 0x58000, 0x08000, CRC(8fd4fa40) SHA1(1870fb0c5c64fbc53a10115f0f3c7624cf2465db) ) + ROM_LOAD( "dn14-5.f11", 0x10000, 0x08000, CRC(ac9e6732) SHA1(6f61344eb8a13349471145dee252a01aadb8cdf0) ) + ROM_LOAD( "dn13-.f9", 0x18000, 0x10000, CRC(a03308f9) SHA1(1d450725a5c488332c83d8f64a73a750ce7fe4c7) ) + ROM_LOAD( "dn15-5.f12", 0x28000, 0x08000, CRC(8933fcb8) SHA1(0dbda4b032ed3776d7633264f39e6f00ace7a238) ) + ROM_LOAD( "dn16-.f13", 0x30000, 0x10000, CRC(55e63a11) SHA1(3ef0468fa02ac5382007428122216917ad5eaa0e) ) + ROM_LOAD( "dn17-5.f15", 0x40000, 0x08000, CRC(b70ae950) SHA1(1ec833bdad12710ea846ef48dddbe2e1ae6b8ce1) ) + ROM_LOAD( "dn18-.f16", 0x48000, 0x10000, CRC(2ad53213) SHA1(f22696920bf3d74fb0e28e2d7cb31be5e183c6b4) ) + ROM_LOAD( "dn19-5.f18", 0x58000, 0x08000, CRC(8fd4fa40) SHA1(1870fb0c5c64fbc53a10115f0f3c7624cf2465db) ) ROM_REGION( 0x0800, "proms", 0 ) ROM_LOAD( "dn-21.k8", 0x0000, 0x0400, CRC(aab0bb93) SHA1(545707fbb1007fca1fe297c5fce61e485e7084fc) ) /* MB7132E BPROM */ ROM_LOAD( "dn-20.l6", 0x0400, 0x0400, CRC(02f78ffb) SHA1(cb4dd8b0ce3c404195321b17e10f51352f506958) ) /* MB7122E BPROM */ ROM_END -ROM_START( karnova ) +ROM_START( karnova ) /* DE-0248-3 main board, DE-259-0 sub/rom board */ ROM_REGION( 0x60000, "maincpu", 0 ) /* 6*64k for 68000 code */ ROM_LOAD16_BYTE( "dn08-5.j15", 0x00000, 0x10000, CRC(db92c264) SHA1(bd4bcd984a3455eedd2b78dc2090c9d625025671) ) /* also known to be labeled DN08-5E */ ROM_LOAD16_BYTE( "dn11-5.j20", 0x00001, 0x10000, CRC(05669b4b) SHA1(c78d0da5afc66750dd9841a7d4f8f244d878c081) ) /* also known to be labeled DN11-5E */ @@ -969,20 +969,20 @@ ROM_START( karnova ) ROM_REGION( 0x60000, "gfx3", 0 ) ROM_LOAD( "dn12-.f8", 0x00000, 0x10000, CRC(9806772c) SHA1(01f17fa033262a3e64e0675cc4e20b3c3f4b254d) ) /* Sprites - 2 sets of 4, interleaved here */ - ROM_LOAD( "dn14-5.f9", 0x10000, 0x08000, CRC(ac9e6732) SHA1(6f61344eb8a13349471145dee252a01aadb8cdf0) ) - ROM_LOAD( "dn13-.f13", 0x18000, 0x10000, CRC(a03308f9) SHA1(1d450725a5c488332c83d8f64a73a750ce7fe4c7) ) - ROM_LOAD( "dn15-5.f15", 0x28000, 0x08000, CRC(8933fcb8) SHA1(0dbda4b032ed3776d7633264f39e6f00ace7a238) ) - ROM_LOAD( "dn16-", 0x30000, 0x10000, CRC(55e63a11) SHA1(3ef0468fa02ac5382007428122216917ad5eaa0e) ) - ROM_LOAD( "dn17-5", 0x40000, 0x08000, CRC(b70ae950) SHA1(1ec833bdad12710ea846ef48dddbe2e1ae6b8ce1) ) - ROM_LOAD( "dn18-", 0x48000, 0x10000, CRC(2ad53213) SHA1(f22696920bf3d74fb0e28e2d7cb31be5e183c6b4) ) - ROM_LOAD( "dn19-5", 0x58000, 0x08000, CRC(8fd4fa40) SHA1(1870fb0c5c64fbc53a10115f0f3c7624cf2465db) ) + ROM_LOAD( "dn14-5.f11", 0x10000, 0x08000, CRC(ac9e6732) SHA1(6f61344eb8a13349471145dee252a01aadb8cdf0) ) + ROM_LOAD( "dn13-.f9", 0x18000, 0x10000, CRC(a03308f9) SHA1(1d450725a5c488332c83d8f64a73a750ce7fe4c7) ) + ROM_LOAD( "dn15-5.f12", 0x28000, 0x08000, CRC(8933fcb8) SHA1(0dbda4b032ed3776d7633264f39e6f00ace7a238) ) + ROM_LOAD( "dn16-.f13", 0x30000, 0x10000, CRC(55e63a11) SHA1(3ef0468fa02ac5382007428122216917ad5eaa0e) ) + ROM_LOAD( "dn17-5.f15", 0x40000, 0x08000, CRC(b70ae950) SHA1(1ec833bdad12710ea846ef48dddbe2e1ae6b8ce1) ) + ROM_LOAD( "dn18-.f16", 0x48000, 0x10000, CRC(2ad53213) SHA1(f22696920bf3d74fb0e28e2d7cb31be5e183c6b4) ) + ROM_LOAD( "dn19-5.f18", 0x58000, 0x08000, CRC(8fd4fa40) SHA1(1870fb0c5c64fbc53a10115f0f3c7624cf2465db) ) ROM_REGION( 0x0800, "proms", 0 ) ROM_LOAD( "dn-21.k8", 0x0000, 0x0400, CRC(aab0bb93) SHA1(545707fbb1007fca1fe297c5fce61e485e7084fc) ) /* MB7132E BPROM */ ROM_LOAD( "dn-20.l6", 0x0400, 0x0400, CRC(02f78ffb) SHA1(cb4dd8b0ce3c404195321b17e10f51352f506958) ) /* MB7122E BPROM */ ROM_END -ROM_START( karnovj ) +ROM_START( karnovj ) /* DE-0248-3 main board, DE-259-0 sub/rom board */ ROM_REGION( 0x60000, "maincpu", 0 ) /* 6*64k for 68000 code */ ROM_LOAD16_BYTE( "kar8.j15", 0x00000, 0x10000, CRC(3e17e268) SHA1(3a63928bb0148175519540f9d891b03590094dfb) ) ROM_LOAD16_BYTE( "kar11.j20", 0x00001, 0x10000, CRC(417c936d) SHA1(d31f9291f18c3d5e3c4430768396e1ac10fd9ea3) ) @@ -1008,13 +1008,13 @@ ROM_START( karnovj ) ROM_REGION( 0x60000, "gfx3", 0 ) ROM_LOAD( "dn12-.f8", 0x00000, 0x10000, CRC(9806772c) SHA1(01f17fa033262a3e64e0675cc4e20b3c3f4b254d) ) /* Sprites - 2 sets of 4, interleaved here */ - ROM_LOAD( "kar14.f9", 0x10000, 0x08000, CRC(c6b39595) SHA1(3bc2d0a613cc1b5d255cccc3b26e21ea1c23e75b) ) - ROM_LOAD( "dn13-.f13", 0x18000, 0x10000, CRC(a03308f9) SHA1(1d450725a5c488332c83d8f64a73a750ce7fe4c7) ) - ROM_LOAD( "kar15.f15", 0x28000, 0x08000, CRC(2f72cac0) SHA1(a71e61eea77ecd3240c5217ae84e7aa3ef21288a) ) - ROM_LOAD( "dn16-", 0x30000, 0x10000, CRC(55e63a11) SHA1(3ef0468fa02ac5382007428122216917ad5eaa0e) ) - ROM_LOAD( "kar17", 0x40000, 0x08000, CRC(7851c70f) SHA1(47b7a64dd8230e95cd7ae7f661c7586c7598c356) ) - ROM_LOAD( "dn18-", 0x48000, 0x10000, CRC(2ad53213) SHA1(f22696920bf3d74fb0e28e2d7cb31be5e183c6b4) ) - ROM_LOAD( "kar19", 0x58000, 0x08000, CRC(7bc174bb) SHA1(d8bc320169fc3a9cdd3f271ea523fb0486abae2c) ) + ROM_LOAD( "kar14.f11", 0x10000, 0x08000, CRC(c6b39595) SHA1(3bc2d0a613cc1b5d255cccc3b26e21ea1c23e75b) ) + ROM_LOAD( "dn13-.f9", 0x18000, 0x10000, CRC(a03308f9) SHA1(1d450725a5c488332c83d8f64a73a750ce7fe4c7) ) + ROM_LOAD( "kar15.f12", 0x28000, 0x08000, CRC(2f72cac0) SHA1(a71e61eea77ecd3240c5217ae84e7aa3ef21288a) ) + ROM_LOAD( "dn16-.f13", 0x30000, 0x10000, CRC(55e63a11) SHA1(3ef0468fa02ac5382007428122216917ad5eaa0e) ) + ROM_LOAD( "kar17.f15", 0x40000, 0x08000, CRC(7851c70f) SHA1(47b7a64dd8230e95cd7ae7f661c7586c7598c356) ) + ROM_LOAD( "dn18-.f16", 0x48000, 0x10000, CRC(2ad53213) SHA1(f22696920bf3d74fb0e28e2d7cb31be5e183c6b4) ) + ROM_LOAD( "kar19.f18", 0x58000, 0x08000, CRC(7bc174bb) SHA1(d8bc320169fc3a9cdd3f271ea523fb0486abae2c) ) ROM_REGION( 0x0800, "proms", 0 ) ROM_LOAD( "dn-21.k8", 0x0000, 0x0400, CRC(aab0bb93) SHA1(545707fbb1007fca1fe297c5fce61e485e7084fc) ) /* MB7132E BPROM */ @@ -1105,7 +1105,7 @@ ROM_START( wndrplnt ) ROM_LOAD( "ea-20.l6", 0x0400, 0x0400, CRC(619f9d1e) SHA1(17fe49b6c9ce17be4a03e3400229e3ef4998a46f) ) /* MB7122E BPROM */ ROM_END -ROM_START( chelnov ) +ROM_START( chelnov ) /* DE-0248-1 main board, DE-259-0 sub/rom board */ ROM_REGION( 0x60000, "maincpu", 0 ) /* 6*64k for 68000 code */ ROM_LOAD16_BYTE( "ee08-e.j16", 0x00000, 0x10000, CRC(8275cc3a) SHA1(961166226b68744eef15fed6a306010757b83556) ) ROM_LOAD16_BYTE( "ee11-e.j19", 0x00001, 0x10000, CRC(889e40a0) SHA1(e927f32d9bc448a331fb7b3478b2d07154f5013b) ) @@ -1140,7 +1140,7 @@ ROM_START( chelnov ) ROM_LOAD( "ee-16.l6", 0x0400, 0x0400, CRC(41816132) SHA1(89a1194bd8bf39f13419df685e489440bdb05676) ) /* MB7122E BPROM */ ROM_END -ROM_START( chelnovu ) +ROM_START( chelnovu ) /* DE-0248-1 main board, DE-259-0 sub/rom board */ ROM_REGION( 0x60000, "maincpu", 0 ) /* 6*64k for 68000 code */ ROM_LOAD16_BYTE( "ee08-a.j15", 0x00000, 0x10000, CRC(2f2fb37b) SHA1(f89b424099097a95cf184d20a15b876c5b639552) ) ROM_LOAD16_BYTE( "ee11-a.j20", 0x00001, 0x10000, CRC(f306d05f) SHA1(e523ffd17fb0104fe28eac288b6ebf7fc0ea2908) ) @@ -1175,9 +1175,9 @@ ROM_START( chelnovu ) ROM_LOAD( "ee-16.l6", 0x0400, 0x0400, CRC(41816132) SHA1(89a1194bd8bf39f13419df685e489440bdb05676) ) /* MB7122E BPROM */ ROM_END -ROM_START( chelnovj ) /* at least 1 PCB found with all labels as 'EPR-EExx' like Sega labels */ +ROM_START( chelnovj ) /* DE-0248-1 main board, DE-259-0 sub/rom board */ ROM_REGION( 0x60000, "maincpu", 0 ) /* 6*64k for 68000 code */ - ROM_LOAD16_BYTE( "ee08-1.j15", 0x00000, 0x10000, CRC(1978cb52) SHA1(833b8e80445ec2384e0479afb7430b32d6a14441) ) + ROM_LOAD16_BYTE( "ee08-1.j15", 0x00000, 0x10000, CRC(1978cb52) SHA1(833b8e80445ec2384e0479afb7430b32d6a14441) )/* at least 1 PCB found with all labels as 'EPR-EExx' like Sega labels */ ROM_LOAD16_BYTE( "ee11-1.j20", 0x00001, 0x10000, CRC(e0ed3d99) SHA1(f47aaec5c72ecc308c32cdcf117ef4965ac5ea61) ) ROM_LOAD16_BYTE( "ee07.j14", 0x20000, 0x10000, CRC(51465486) SHA1(e165e754eb756db3abc1f8477171ab817d03a890) ) ROM_LOAD16_BYTE( "ee10.j18", 0x20001, 0x10000, CRC(d09dda33) SHA1(1764215606eec61e4fe30c0fc82ea2faf17821dc) ) @@ -1241,7 +1241,8 @@ ROM_START( chelnovjbl ) // code is the same as the regular chelnovj set ROM_LOAD( "5.bin", 0x38000, 0x08000, CRC(99cee6cd) SHA1(b2cd0a1aef04fd63ad27ac8a61d17a6bb4c8b600) ) ROM_REGION( 0x40000, "gfx3", 0 ) /* Sprites */ - ROM_LOAD( "17.bin", 0x00000, 0x10000, CRC(47c857f8) SHA1(59f50365cee266c0e4075c989dc7fde50e43667a) ) // probably bad (1st half is 99.996948% match) +// ROM_LOAD( "17.bin", 0x00000, 0x10000, CRC(47c857f8) SHA1(59f50365cee266c0e4075c989dc7fde50e43667a) ) // probably bad, 1 byte difference: byte 0x55CC == 0x30 vs 0xF0 in ee12-.f8 + ROM_LOAD( "ee12-.f8", 0x00000, 0x10000, CRC(9b1c53a5) SHA1(b0fdc89dc7fd0931fa4bca3bbc20fc88f637ec74) ) ROM_LOAD( "ee13-.f9", 0x10000, 0x10000, CRC(72b8ae3e) SHA1(535dfd70e6d13296342d96917a57d46bdb28a59e) ) ROM_LOAD( "ee14-.f13", 0x20000, 0x10000, CRC(d8f4bbde) SHA1(1f2d336dd97c9cc39e124c18cae634afb0ef3316) ) ROM_LOAD( "ee15-.f15", 0x30000, 0x10000, CRC(81e3e68b) SHA1(1059c70b8bfe09c212a19767cfe23efa22afc196) ) @@ -1261,7 +1262,6 @@ OSC: 20 mhz, 12 mhz,8 mhz (for mcu) */ - // same pcb as above? // this is a further hacked set of the above, with the copyright messages removed etc. (black screens for several seconds instead) ROM_START( chelnovjbla ) diff --git a/src/mame/drivers/lucky37.cpp b/src/mame/drivers/lucky37.cpp index fe0ad771fb6..9ec473804e8 100644 --- a/src/mame/drivers/lucky37.cpp +++ b/src/mame/drivers/lucky37.cpp @@ -226,7 +226,7 @@ ROM_START( lucky37 ) ROM_LOAD( "6.bin", 0xa0000, 0x20000, CRC(3283c1b7) SHA1(7a30dd55216b47332ea7c18c2378352f405b2f0a) ) ROM_END -ROM_START( bingo75 ) // runs on wing 8802-c board +ROM_START( bingo75 ) // runs on wing 8802-c board ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "a001-nomarks", 0x0000, 0x10000, NO_DUMP ) diff --git a/src/mame/drivers/mpu4vid.cpp b/src/mame/drivers/mpu4vid.cpp index 6eef9c89eae..c4f829b214b 100644 --- a/src/mame/drivers/mpu4vid.cpp +++ b/src/mame/drivers/mpu4vid.cpp @@ -171,8 +171,8 @@ TODO: * They have a slightly different 68k memory map. The 6850 is at e00000 and the 6840 is at e01000 They appear to hang on the handshake with the MPU4 board - Layouts needed for the other working games, and DIP switches need checking/altering (no test mode?) - - BWB Vid5 cabinets seem to have the speakers wired the other way according to test (left/right swapped) - - BWB sampled sound seems to not play despite hookup. + - BWB Vid5 cabinets seem to have the speakers wired the other way according to test (left/right swapped) + - BWB sampled sound seems to not play despite hookup. ***********************************************************************************************************/ #include "emu.h" #include "includes/mpu4.h" @@ -444,7 +444,7 @@ SCN2674_DRAW_CHARACTER_MEMBER(mpu4vid_state::display_pixels) uint16_t tile = m_vid_mainram[address & 0x7fff]; const uint8_t *line = m_gfxdecode->gfx(m_gfx_index+0)->get_data(tile & 0xfff); int offset = m_gfxdecode->gfx(m_gfx_index+0)->rowbytes() * linecount; - + for (int i = 0; i < 8; i++) { uint8_t pen = line[offset + i]; @@ -1477,7 +1477,7 @@ static INPUT_PORTS_START( v4bubbnk ) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Swop") PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("Hi") PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_NAME("Lo") - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_START1 ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_START1 ) PORT_MODIFY("DIL2") PORT_DIPNAME( 0x01, 0x00, "Clear MPU Memory" ) PORT_DIPLOCATION("DIL2:01") @@ -1516,7 +1516,7 @@ static INPUT_PORTS_START( v4dbltak ) // invalid settings PORT_CONFSETTING( 0x00, "Invalid (Not fitted)" ) PORT_CONFSETTING( 0x40, "Invalid" ) - + PORT_MODIFY("ORANGE2") PORT_CONFNAME( 0x0f, 0x07, "Jackpot / Prize Key" ) PORT_CONFSETTING( 0x08, "5 GBP" ) @@ -1545,7 +1545,7 @@ static INPUT_PORTS_START( v4dbltak ) PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED) PORT_MODIFY("BLACK2") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Cancel/Collect") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Cancel/Collect") PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Hold A") PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Hold B") PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Hold C") @@ -1622,7 +1622,7 @@ static INPUT_PORTS_START( v4mazbel ) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Hold/Swop") PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("Hi/Up") PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_NAME("Lo/Down") - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_START1 ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_START1 ) PORT_MODIFY("DIL2") PORT_DIPNAME( 0x01, 0x00, "Clear MPU Memory" ) PORT_DIPLOCATION("DIL2:01") @@ -1662,7 +1662,7 @@ static INPUT_PORTS_START( v4redhtp ) PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED) PORT_MODIFY("BLACK2") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Collect") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Collect") PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Hold A") PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Hold B") PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Hold C") @@ -1991,9 +1991,9 @@ void mpu4vid_state::mpu4_vid_bt_a00002_w(offs_t offset, uint8_t data) { switch (m_bt_which) { - case 0: m_btpal_r[m_bt_palbase] = data; - case 1: m_btpal_g[m_bt_palbase] = data; - case 2: m_btpal_b[m_bt_palbase] = data; + case 0: m_btpal_r[m_bt_palbase] = data; + case 1: m_btpal_g[m_bt_palbase] = data; + case 2: m_btpal_b[m_bt_palbase] = data; } m_bt_which++; @@ -9085,7 +9085,7 @@ GAME( 1990, v4bloxd, v4blox, bwbvid, v4tetris, mpu4vid_state, init_b GAME( 1994, v4pztet, 0, bwbvid, v4pztet, mpu4vid_state, init_bwbhack, ROT0, "BWB", "Prize Tetris (BWB) (MPU4 Video)",GAME_FLAGS_OK ) GAME( 1994, v4pzteta, v4pztet, bwbvid, v4pztet, mpu4vid_state, init_bwbhack, ROT0, "BWB", "Prize Tetris (BWB) (Datapak) (MPU4 Video)",GAME_FLAGS_OK ) GAME( 1994, v4pztetb, v4pztet, bwbvid, v4pztet, mpu4vid_state, init_bwbhack, ROT0, "BWB", "Prize Tetris (BWB) (Showcase) (MPU4 Video)",GAME_FLAGS_OK ) // screen telling you to exchange tickets for prizes in the 'showcase' during attract -GAME( 1994, v4pztetc, v4pztet, bwbvid, v4pztet, mpu4vid_state, init_bwbhack, ROT0, "BWB", "Prize Tetris (BWB) (Showcase) (Datapak) (MPU4 Video)",GAME_FLAGS ) +GAME( 1994, v4pztetc, v4pztet, bwbvid, v4pztet, mpu4vid_state, init_bwbhack, ROT0, "BWB", "Prize Tetris (BWB) (Showcase) (Datapak) (MPU4 Video)",GAME_FLAGS_OK ) // this appears to be a version of Prize Tetris without the Tetris license. These don't have proper alarms, eg coin1 stuck is 'undefined' GAME( 1994, v4bulblx, 0, bwbvid, v4bulblx, mpu4vid_state, init_bwbhack, ROT0, "BWB", "Bullion Blox (BWB) (set 1) (MPU4 Video)",GAME_FLAGS ) GAME( 1994, v4bulblxb, v4bulblx, bwbvid, v4bulblx, mpu4vid_state, init_bwbhack, ROT0, "BWB", "Bullion Blox (BWB) (set 2) (MPU4 Video)",GAME_FLAGS ) @@ -9494,7 +9494,7 @@ GAME( 199?, v4cybcas, 0, bwbvid_oki_bt471_german, v4cybcas, mpu4v GAME( 199?, v4missis, 0, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Mississippi Lady (Nova, German) (MPU4 Video)",GAME_FLAGS ) // different hardware type? extra ram on mpu4 side? -GAME( 199?, v4picdil, 0, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Piccadilly Night (Nova, German) (set 1) (MPU4 Video)",GAME_FLAGS ) -GAME( 199?, v4picdila, v4picdil, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Piccadilly Night (Nova, German) (set 2) (MPU4 Video)",GAME_FLAGS ) -GAME( 199?, v4picdilz, v4picdil, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Piccadilly Night (Nova, German) (set 3) (MPU4 Video)",GAME_FLAGS ) +GAME( 199?, v4picdil, 0, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Piccadilly Night (Nova, German) (set 1) (MPU4 Video)",GAME_FLAGS ) +GAME( 199?, v4picdila, v4picdil, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Piccadilly Night (Nova, German) (set 2) (MPU4 Video)",GAME_FLAGS ) +GAME( 199?, v4picdilz, v4picdil, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Piccadilly Night (Nova, German) (set 3) (MPU4 Video)",GAME_FLAGS ) diff --git a/src/mame/drivers/nes_sh6578.cpp b/src/mame/drivers/nes_sh6578.cpp index 497884a1bf1..caf03628290 100644 --- a/src/mame/drivers/nes_sh6578.cpp +++ b/src/mame/drivers/nes_sh6578.cpp @@ -429,7 +429,7 @@ void nes_sh6578_state::io_w(uint8_t data) void nes_sh6578_abl_wikid_state::io_w(uint8_t data) { nes_sh6578_state::io_w(data); - + if (m_isbanked) { m_bank->set_entry((data>>1)&1); diff --git a/src/mame/drivers/nes_vt.cpp b/src/mame/drivers/nes_vt.cpp index 1f99bc64541..f892527c485 100644 --- a/src/mame/drivers/nes_vt.cpp +++ b/src/mame/drivers/nes_vt.cpp @@ -1635,7 +1635,7 @@ ROM_END ROM_START( lxcmcypp ) ROM_REGION( 0x4000000, "mainrom", 0 ) // marked 512mbit, possible A22 / A23 are swapped as they were marked on the board in a different way. - ROM_LOAD( "pawpatrol_compact.bin", 0x00000, 0x4000000, CRC(bf536762) SHA1(80dde8426a636bae33a82d779e564fa743eb3776) ) + ROM_LOAD( "pawpatrol_compact.bin", 0x00000, 0x4000000, CRC(bf536762) SHA1(80dde8426a636bae33a82d779e564fa743eb3776) ) ROM_END ROM_START( lxcmc250 ) diff --git a/src/mame/drivers/odyssey2.cpp b/src/mame/drivers/odyssey2.cpp index 820c82a2c27..24980e784dd 100644 --- a/src/mame/drivers/odyssey2.cpp +++ b/src/mame/drivers/odyssey2.cpp @@ -1,6 +1,6 @@ // license:BSD-3-Clause // copyright-holders:Wilbert Pol, hap -/*************************************************************************** +/******************************************************************************* Driver file to handle emulation of the Magnavox Odyssey 2 (stylized Odyssey²), Philips Videopac G7000 and Philips Videopac+ G7400. @@ -11,7 +11,25 @@ halted due to a hardware defect, wide release continued in 1979. The 2 joysticks have no clear distinction between player 1 and 2, it differs per game. And in MAME it's extra awkward due to the default input mapping -conflicting with the keyboard. +conflicting with the keyboard. An easy way to work around this if you're only +playing 1-player games, is to map both joysticks to the same inputs. + +Videopac consoles: +- Philips Videopac G7000 (Europe, several models) +- Philips Videopac C52 (France) +- Philips Odyssey (Brazil) +- Magnavox Odyssey 2 (US) +- Radiola Jet 25 (France) +- Siera Videopac Computer G7000 (France) +- Schneider Videopac 7000 (Germany) +- Philips Videopac G7200 (Europe, Videopac with built-in screen) +- Philips Videojeu N60 (France) + +Videopac+ consoles: +- Philips Videopac+ G7400/G7401 (Europe) +- Magnavox Odyssey 3 Command Center (US, prototype) +- Brandt Jopac JO7400 (France) +- Schneider Videopac 74+ (Germany) Odyssey 2/Videopac hardware notes: - Intel 8048 (1KB internal ROM, 64 bytes internal RAM) @@ -28,9 +46,10 @@ Videopac+ G7400 hardware notes: XTAL notes (differs per model): - Odyssey 2: 7.15909MHz - G7000: 17.734476MHz -- C52/N60: 17.812 +- C52/N60: 17.812MHz - G7200: 5.911MHz + 3.547MHz - G7400: 5.911MHz + 8.867MHz +- JO7400: 5.911MHz + 3.5625MHz TODO: - backgamm doesn't draw all the chars/sprites, it does multiple screen updates @@ -46,7 +65,7 @@ TODO: - ppp(the tetris game) does not work properly on PAL, is this homebrew NTSC-only, or is PAL detection going wrong? It does look like PAL/NTSC detection is working, see internal RAM $3D d7. So maybe it is due to inaccurate PAL video timing. - The game does mid-scanline updates. + The game does mid-scanline video updates. - g7400 probably has different video timing too (not same as g7000) - g7400 helicopt sometimes locks up at the sea level, timing related? - 4in1 and musician are not supposed to work on g7400, but work fine on MAME, @@ -64,10 +83,12 @@ BTANB: - g7400 games don't look correct on odyssey3 and vice versa: ef934x graphics are placed lower on odyssey3 - Blackjack (Videopac 5) does not work on G7400, caused by a removed BIOS routine +- due to different XTAL ratio on Jopac JO7400, some games that do mid-screen video + updates will have glitches on this machine, notably backgamm Plenty games have minor bugs not worth mentioning here. -***************************************************************************/ +*******************************************************************************/ #include "emu.h" @@ -139,16 +160,17 @@ private: uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); }; -class g7400_state : public odyssey2_state +class videopacp_state : public odyssey2_state { public: - g7400_state(const machine_config &mconfig, device_type type, const char *tag) : + videopacp_state(const machine_config &mconfig, device_type type, const char *tag) : odyssey2_state(mconfig, type, tag), m_i8243(*this, "i8243"), m_ef934x(*this, "ef934x") { } void g7400(machine_config &config); + void jo7400(machine_config &config); void odyssey3(machine_config &config); protected: @@ -185,7 +207,7 @@ void odyssey2_state::machine_start() save_item(NAME(m_p2)); } -void g7400_state::machine_start() +void videopacp_state::machine_start() { odyssey2_state::machine_start(); memset(m_ef934x_extram, 0, sizeof(m_ef934x_extram)); @@ -244,7 +266,7 @@ uint32_t odyssey2_state::screen_update(screen_device &screen, bitmap_ind16 &bitm return 0; } -uint32_t g7400_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +uint32_t videopacp_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { u8 lum = ~m_p1 >> 4 & 0x08; bitmap_ind16 *ef934x_bitmap = m_ef934x->get_bitmap(); @@ -373,19 +395,19 @@ READ_LINE_MEMBER(odyssey2_state::t1_read) // G7400-specific -uint8_t g7400_state::io_read(offs_t offset) +uint8_t videopacp_state::io_read(offs_t offset) { u8 data = odyssey2_state::io_read(offset); return io_vpp(offset, data); } -void g7400_state::io_write(offs_t offset, uint8_t data) +void videopacp_state::io_write(offs_t offset, uint8_t data) { odyssey2_state::io_write(offset, data); io_vpp(offset, data); } -uint8_t g7400_state::io_vpp(offs_t offset, uint8_t data) +uint8_t videopacp_state::io_vpp(offs_t offset, uint8_t data) { if (!(m_p1 & 0x20)) { @@ -399,14 +421,14 @@ uint8_t g7400_state::io_vpp(offs_t offset, uint8_t data) return data; } -void g7400_state::p2_write(uint8_t data) +void videopacp_state::p2_write(uint8_t data) { odyssey2_state::p2_write(data); m_i8243->p2_w(m_p2 & 0x0f); } template<int P> -void g7400_state::i8243_port_w(uint8_t data) +void videopacp_state::i8243_port_w(uint8_t data) { // P4,P5: color mix I8244 side (IC674) // P6,P7: color mix EF9340 side (IC678) @@ -428,7 +450,7 @@ void g7400_state::i8243_port_w(uint8_t data) // EF9341 extended RAM -offs_t g7400_state::ef934x_extram_address(offs_t offset) +offs_t videopacp_state::ef934x_extram_address(offs_t offset) { u8 latch = (offset >> 12 & 0x80) | (offset >> 4 & 0x7f); u16 address = (latch & 0x1f) | (offset << 9 & 0x200) | (latch << 3 & 0x400); @@ -439,12 +461,12 @@ offs_t g7400_state::ef934x_extram_address(offs_t offset) return address | (offset << 4 & 0x60) | (latch << 2 & 0x180); } -uint8_t g7400_state::ef934x_extram_r(offs_t offset) +uint8_t videopacp_state::ef934x_extram_r(offs_t offset) { return m_ef934x_extram[ef934x_extram_address(offset)]; } -void g7400_state::ef934x_extram_w(offs_t offset, uint8_t data) +void videopacp_state::ef934x_extram_w(offs_t offset, uint8_t data) { m_ef934x_extram[ef934x_extram_address(offset)] = data; } @@ -644,7 +666,7 @@ INPUT_PORTS_END void odyssey2_state::odyssey2(machine_config &config) { /* basic machine hardware */ - I8048(config, m_maincpu, (XTAL(7'159'090) * 3) / 4); + I8048(config, m_maincpu, (7.15909_MHz_XTAL * 3) / 4); m_maincpu->set_addrmap(AS_PROGRAM, &odyssey2_state::odyssey2_mem); m_maincpu->set_addrmap(AS_IO, &odyssey2_state::odyssey2_io); m_maincpu->p1_out_cb().set(FUNC(odyssey2_state::p1_write)); @@ -662,7 +684,7 @@ void odyssey2_state::odyssey2(machine_config &config) PALETTE(config, "palette", FUNC(odyssey2_state::odyssey2_palette), 16); - I8244(config, m_i8244, XTAL(7'159'090) / 2); + I8244(config, m_i8244, 7.15909_MHz_XTAL / 2); m_i8244->set_screen("screen"); m_i8244->set_screen_size(360, 243); m_i8244->irq_cb().set_inputline(m_maincpu, MCS48_INPUT_IRQ); @@ -672,8 +694,8 @@ void odyssey2_state::odyssey2(machine_config &config) /* cartridge */ O2_CART_SLOT(config, m_cart, o2_cart, nullptr); - SOFTWARE_LIST(config, "cart_list").set_original("odyssey2").set_filter("O2"); - SOFTWARE_LIST(config, "g7400_list").set_compatible("g7400").set_filter("O2"); + SOFTWARE_LIST(config, "cart_list").set_original("videopac").set_filter("O2"); + SOFTWARE_LIST(config, "vpp_list").set_compatible("videopacp").set_filter("O2"); } void odyssey2_state::videopac(machine_config &config) @@ -681,16 +703,16 @@ void odyssey2_state::videopac(machine_config &config) odyssey2(config); // PAL video chip - I8245(config.replace(), m_i8244, XTAL(17'734'476) / 5); + I8245(config.replace(), m_i8244, 17.734476_MHz_XTAL / 5); m_i8244->set_screen("screen"); m_i8244->set_screen_size(360, 243); m_i8244->irq_cb().set_inputline(m_maincpu, MCS48_INPUT_IRQ); m_i8244->add_route(ALL_OUTPUTS, "mono", 0.40); - m_maincpu->set_clock(XTAL(17'734'476) / 3); + m_maincpu->set_clock(17.734476_MHz_XTAL / 3); subdevice<software_list_device>("cart_list")->set_filter("VP"); - subdevice<software_list_device>("g7400_list")->set_filter("VP"); + subdevice<software_list_device>("vpp_list")->set_filter("VP"); } void odyssey2_state::videopacf(machine_config &config) @@ -698,45 +720,45 @@ void odyssey2_state::videopacf(machine_config &config) videopac(config); // different master XTAL - m_maincpu->set_clock(XTAL(17'812'000) / 3); - m_i8244->set_clock(XTAL(17'812'000) / 5); + m_maincpu->set_clock(17.812_MHz_XTAL / 3); + m_i8244->set_clock(17.812_MHz_XTAL / 5); } -void g7400_state::g7400(machine_config &config) +void videopacp_state::g7400(machine_config &config) { /* basic machine hardware */ - I8048(config, m_maincpu, XTAL(5'911'000)); - m_maincpu->set_addrmap(AS_PROGRAM, &g7400_state::odyssey2_mem); - m_maincpu->set_addrmap(AS_IO, &g7400_state::odyssey2_io); - m_maincpu->p1_out_cb().set(FUNC(g7400_state::p1_write)); - m_maincpu->p2_in_cb().set(FUNC(g7400_state::p2_read)); - m_maincpu->p2_out_cb().set(FUNC(g7400_state::p2_write)); - m_maincpu->bus_in_cb().set(FUNC(g7400_state::bus_read)); + I8048(config, m_maincpu, 5.911_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &videopacp_state::odyssey2_mem); + m_maincpu->set_addrmap(AS_IO, &videopacp_state::odyssey2_io); + m_maincpu->p1_out_cb().set(FUNC(videopacp_state::p1_write)); + m_maincpu->p2_in_cb().set(FUNC(videopacp_state::p2_read)); + m_maincpu->p2_out_cb().set(FUNC(videopacp_state::p2_write)); + m_maincpu->bus_in_cb().set(FUNC(videopacp_state::bus_read)); m_maincpu->t0_in_cb().set("cartslot", FUNC(o2_cart_slot_device::t0_read)); - m_maincpu->t1_in_cb().set(FUNC(g7400_state::t1_read)); + m_maincpu->t1_in_cb().set(FUNC(videopacp_state::t1_read)); m_maincpu->prog_out_cb().set(m_i8243, FUNC(i8243_device::prog_w)); /* video hardware */ SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_screen_update(FUNC(g7400_state::screen_update)); + m_screen->set_screen_update(FUNC(videopacp_state::screen_update)); m_screen->set_video_attributes(VIDEO_ALWAYS_UPDATE); m_screen->set_palette("palette"); PALETTE(config, "palette", m_i8244, FUNC(i8244_device::i8244_palette), 16); I8243(config, m_i8243); - m_i8243->p4_out_cb().set(FUNC(g7400_state::i8243_port_w<0>)); - m_i8243->p5_out_cb().set(FUNC(g7400_state::i8243_port_w<1>)); - m_i8243->p6_out_cb().set(FUNC(g7400_state::i8243_port_w<2>)); - m_i8243->p7_out_cb().set(FUNC(g7400_state::i8243_port_w<3>)); + m_i8243->p4_out_cb().set(FUNC(videopacp_state::i8243_port_w<0>)); + m_i8243->p5_out_cb().set(FUNC(videopacp_state::i8243_port_w<1>)); + m_i8243->p6_out_cb().set(FUNC(videopacp_state::i8243_port_w<2>)); + m_i8243->p7_out_cb().set(FUNC(videopacp_state::i8243_port_w<3>)); - EF9340_1(config, m_ef934x, XTAL(8'867'000)/5 * 2, "screen"); + EF9340_1(config, m_ef934x, (8.867_MHz_XTAL * 2) / 5, "screen"); m_ef934x->set_offsets(15, 5); - m_ef934x->read_exram().set(FUNC(g7400_state::ef934x_extram_r)); - m_ef934x->write_exram().set(FUNC(g7400_state::ef934x_extram_w)); + m_ef934x->read_exram().set(FUNC(videopacp_state::ef934x_extram_r)); + m_ef934x->write_exram().set(FUNC(videopacp_state::ef934x_extram_w)); - I8245(config, m_i8244, XTAL(8'867'000)/5 * 2); + I8245(config, m_i8244, (8.867_MHz_XTAL * 2) / 5); m_i8244->set_screen("screen"); m_i8244->set_screen_size(360, 243); m_i8244->irq_cb().set_inputline(m_maincpu, MCS48_INPUT_IRQ); @@ -746,31 +768,40 @@ void g7400_state::g7400(machine_config &config) /* cartridge */ O2_CART_SLOT(config, m_cart, o2_cart, nullptr); - SOFTWARE_LIST(config, "cart_list").set_original("g7400").set_filter("VPP"); - SOFTWARE_LIST(config, "ody2_list").set_compatible("odyssey2").set_filter("VPP"); + SOFTWARE_LIST(config, "cart_list").set_original("videopacp").set_filter("VPP"); + SOFTWARE_LIST(config, "vp_list").set_compatible("videopac").set_filter("VPP"); } -void g7400_state::odyssey3(machine_config &config) +void videopacp_state::jo7400(machine_config &config) +{ + g7400(config); + + // different video clock + m_i8244->set_clock(3.5625_MHz_XTAL); + m_ef934x->set_clock(3.5625_MHz_XTAL); +} + +void videopacp_state::odyssey3(machine_config &config) { g7400(config); // NTSC video chip - I8244(config.replace(), m_i8244, XTAL(7'159'090) / 2); + I8244(config.replace(), m_i8244, 7.15909_MHz_XTAL / 2); m_i8244->set_screen("screen"); m_i8244->set_screen_size(360, 243); m_i8244->irq_cb().set_inputline(m_maincpu, MCS48_INPUT_IRQ); m_i8244->add_route(ALL_OUTPUTS, "mono", 0.40); - m_ef934x->set_clock(XTAL(7'159'090) / 2); + m_ef934x->set_clock(7.15909_MHz_XTAL / 2); m_ef934x->set_offsets(15, 15); - m_maincpu->set_clock((XTAL(7'159'090) * 3) / 4); + m_maincpu->set_clock((7.15909_MHz_XTAL * 3) / 4); // same color encoder as O2 (no RGB port) PALETTE(config.replace(), "palette", FUNC(odyssey2_state::odyssey2_palette), 16); subdevice<software_list_device>("cart_list")->set_filter("O3"); - subdevice<software_list_device>("ody2_list")->set_filter("O3"); + subdevice<software_list_device>("vp_list")->set_filter("O3"); } @@ -795,7 +826,7 @@ ROM_START (videopacf) ROM_END -ROM_START (g7400) +ROM_START (videopacp) ROM_REGION(0x0400,"maincpu",0) ROM_LOAD ("g7400.bin", 0x0000, 0x0400, CRC(e20a9f41) SHA1(5130243429b40b01a14e1304d0394b8459a6fbae)) ROM_END @@ -818,11 +849,11 @@ ROM_END Drivers ******************************************************************************/ -// YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS -COMP( 1979, odyssey2, 0, 0, odyssey2, odyssey2, odyssey2_state, empty_init, "Magnavox", "Odyssey 2 (US)", MACHINE_SUPPORTS_SAVE ) -COMP( 1978, videopac, odyssey2, 0, videopac, odyssey2, odyssey2_state, empty_init, "Philips", "Videopac G7000 (Europe)", MACHINE_SUPPORTS_SAVE ) -COMP( 1979, videopacf, odyssey2, 0, videopacf, odyssey2, odyssey2_state, empty_init, "Philips", "Videopac C52 (France)", MACHINE_SUPPORTS_SAVE ) +// YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS +COMP( 1979, odyssey2, 0, 0, odyssey2, odyssey2, odyssey2_state, empty_init, "Magnavox", "Odyssey 2 (US)", MACHINE_SUPPORTS_SAVE ) +COMP( 1978, videopac, odyssey2, 0, videopac, odyssey2, odyssey2_state, empty_init, "Philips", "Videopac G7000 (Europe)", MACHINE_SUPPORTS_SAVE ) +COMP( 1979, videopacf, odyssey2, 0, videopacf, odyssey2, odyssey2_state, empty_init, "Philips", "Videopac C52 (France)", MACHINE_SUPPORTS_SAVE ) -COMP( 1983, g7400, 0, 0, g7400, g7400, g7400_state, empty_init, "Philips", "Videopac+ G7400 (Europe)", MACHINE_SUPPORTS_SAVE ) -COMP( 1983, jopac, g7400, 0, g7400, g7400, g7400_state, empty_init, "Philips (Brandt license)", "Jopac JO7400 (France)", MACHINE_SUPPORTS_SAVE ) -COMP( 1983, odyssey3, g7400, 0, odyssey3, g7400, g7400_state, empty_init, "Magnavox", "Odyssey 3 Command Center (US, prototype)", MACHINE_SUPPORTS_SAVE ) +COMP( 1983, videopacp, 0, 0, g7400, g7400, videopacp_state, empty_init, "Philips", "Videopac+ G7400 (Europe)", MACHINE_SUPPORTS_SAVE ) +COMP( 1983, jopac, videopacp, 0, jo7400, g7400, videopacp_state, empty_init, "Philips (Brandt license)", "Jopac JO7400 (France)", MACHINE_SUPPORTS_SAVE ) +COMP( 1983, odyssey3, videopacp, 0, odyssey3, g7400, videopacp_state, empty_init, "Magnavox", "Odyssey 3 Command Center (US, prototype)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/photoply.cpp b/src/mame/drivers/photoply.cpp index 680ef32e967..e6a147d2c54 100644 --- a/src/mame/drivers/photoply.cpp +++ b/src/mame/drivers/photoply.cpp @@ -423,7 +423,7 @@ ROM_START(photoply2k4) ROM_LOAD("vga.bin", 0x000000, 0x8000, CRC(7a859659) BAD_DUMP SHA1(ff667218261969c48082ec12aa91088a01b0cb2a) ) DISK_REGION( "ide:0:hdd:image" ) -// CYLS:1023,HEADS:64,SECS:63,BPS:512. +// CYLS:1023,HEADS:64,SECS:63,BPS:512. DISK_IMAGE( "pp2004", 0, SHA1(a3f8861cf91cf7e7446ec931f812e774ada20802) ) ROM_END diff --git a/src/mame/drivers/qvt70.cpp b/src/mame/drivers/qvt70.cpp index 44a1e0bb9e9..e4cd22ee6fe 100644 --- a/src/mame/drivers/qvt70.cpp +++ b/src/mame/drivers/qvt70.cpp @@ -23,14 +23,14 @@ - 80/132 columns QVT-82: - - Z80 (Z0840008PSC) - - Z80 DART (Z0847006PSC) - - QUME 303489-01 QFP144 - - ROM 64k * 2 - - RAM 8k UM6264AK-10L (above Z80) + 8k UM6264K-70L * 3 (below Z80) - - DS1231 - - 54.2857MHz XTAL - - Battery + - Z80 (Z0840008PSC) + - Z80 DART (Z0847006PSC) + - QUME 303489-01 QFP144 + - ROM 64k * 2 + - RAM 8k UM6264AK-10L (above Z80) + 8k UM6264K-70L * 3 (below Z80) + - DS1231 + - 54.2857MHz XTAL + - Battery ****************************************************************************/ diff --git a/src/mame/drivers/renegade.cpp b/src/mame/drivers/renegade.cpp index 8c9e6613ec4..0e8eef9e9fc 100644 --- a/src/mame/drivers/renegade.cpp +++ b/src/mame/drivers/renegade.cpp @@ -195,7 +195,7 @@ WRITE_LINE_MEMBER(renegade_state::adpcm_int) void renegade_state::machine_start() { m_rombank->configure_entries(0, 2, memregion("maincpu")->base(), 0x4000); - + save_item(NAME(m_adpcm_pos)); save_item(NAME(m_adpcm_end)); save_item(NAME(m_adpcm_playing)); @@ -246,7 +246,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(renegade_state::interrupt) // nmi 8 lines before vsync if (scanline == 265) m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); - + // irq 16 clks per frame: once every 16 lines, but increases to 24 lines during vblank // (lines 16,40,56,72,88,104,120,136,152,168,184,200,216,232,248,264) if (scanline == 0x10 || (scanline > 0x20 && (scanline & 0xf) == 8)) diff --git a/src/mame/drivers/segag80v.cpp b/src/mame/drivers/segag80v.cpp index b8da53afa46..f251ba7f315 100644 --- a/src/mame/drivers/segag80v.cpp +++ b/src/mame/drivers/segag80v.cpp @@ -904,7 +904,7 @@ void segag80v_state::g80v_base(machine_config &config) m_maincpu->set_addrmap(AS_OPCODES, &segag80v_state::opcodes_map); m_maincpu->set_addrmap(AS_IO, &segag80v_state::main_portmap); m_maincpu->irqack_cb().set(FUNC(segag80v_state::irq_ack_w)); -// m_maincpu->set_vblank_int("screen", FUNC(segag80v_state::irq0_line_hold)); +// m_maincpu->set_vblank_int("screen", FUNC(segag80v_state::irq0_line_hold)); // video hardware SCREEN(config, m_screen, SCREEN_TYPE_VECTOR); diff --git a/src/mame/drivers/snesb51.cpp b/src/mame/drivers/snesb51.cpp index 7d44c11e308..0c83954f202 100644 --- a/src/mame/drivers/snesb51.cpp +++ b/src/mame/drivers/snesb51.cpp @@ -6,10 +6,10 @@ Skeleton driver - The following systems are dumped: - - Mortal Kombat 3 - - 4 Slot board - - 4 Slot board with built-in NBA Jam + The following systems are dumped: + - Mortal Kombat 3 + - 4 Slot board + - 4 Slot board with built-in NBA Jam Hardware (for the 4 slot switcher): - MCS-51 based CPU 44-pin (markings removed) diff --git a/src/mame/drivers/spg2xx_zone_32bit.cpp b/src/mame/drivers/spg2xx_zone_32bit.cpp index deec37e8ebe..9d21deab6dc 100644 --- a/src/mame/drivers/spg2xx_zone_32bit.cpp +++ b/src/mame/drivers/spg2xx_zone_32bit.cpp @@ -186,9 +186,9 @@ void mywicogt_state::porta_w(offs_t offset, uint16_t data, uint16_t mem_mask) (mem_mask & 0x0002) ? ((data & 0x0002) ? '1' : '0') : 'x', (mem_mask & 0x0001) ? ((data & 0x0001) ? '1' : '0') : 'x'); -//[:] ':maincpu' (000508): porta_w 0b00 (0f00) x x x x | 1 0 1 1 | x x x x | x x x x -//[:] ':maincpu' (000510): porta_w 0b00 (0f00) x x x x | 1 0 1 1 | x x x x | x x x x -//[:] ':maincpu' (000518): porta_w 0f00 (0f00) x x x x | 1 1 1 1 | x x x x | x x x x +//[:] ':maincpu' (000508): porta_w 0b00 (0f00) x x x x | 1 0 1 1 | x x x x | x x x x +//[:] ':maincpu' (000510): porta_w 0b00 (0f00) x x x x | 1 0 1 1 | x x x x | x x x x +//[:] ':maincpu' (000518): porta_w 0f00 (0f00) x x x x | 1 1 1 1 | x x x x | x x x x if (m_maincpu->pc() < 0x1000) { @@ -206,7 +206,7 @@ void mywicogt_state::porta_w(offs_t offset, uint16_t data, uint16_t mem_mask) logerror("changing to bank 0\n"); } } - + m_porta_dat = data; } @@ -649,6 +649,26 @@ static INPUT_PORTS_START( zon32bit ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) INPUT_PORTS_END +static INPUT_PORTS_START( mywicogt ) + PORT_START("P1") + PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("P2") + PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("P3") + PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Green / Left") + PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Red / Right") + PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Yellow") + PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Blue") + PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Orange") + PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) + PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) + PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_START1 ) PORT_NAME("Start / Pause / Menu") + PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("Back") + PORT_BIT( 0xfe00, IP_ACTIVE_HIGH, IPT_UNUSED ) +INPUT_PORTS_END + static INPUT_PORTS_START( oplayer ) PORT_START("P1") @@ -994,7 +1014,8 @@ CONS( 200?, zon32bit, 0, 0, zon32bit, zon32bit, zon32bit_state, empty_init, // The Mi Guitar menu contains 24 games, but they're dupes, and just counting those would exclude the other Mi Fit and Mi Papacon menus (which also contain dupes) CONS( 200?, mywicodx, 0, 0, zon32bit, zon32bit, mywicodx_state, empty_init, "<unknown>", "My Wico Deluxe (Family Sport 85-in-1)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) -CONS( 200?, mywicogt, 0, 0, zon32bit, zon32bit, mywicogt_state, empty_init, "<unknown>", "My Wico Guitar", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +// Shows Mi Guitar 2 in the menu, it seems likely that there was an earlier version on VT1682 hardware as there is a very similar Guitar game (with the same song selection) in those multigames +CONS( 200?, mywicogt, 0, 0, zon32bit, mywicogt, mywicogt_state, empty_init, "<unknown>", "My Wico Guitar", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // issues with 'low battery' always showing, but otherwise functional CONS( 200?, oplayer, 0, 0, zon32bit_bat, oplayer, oplayer_100in1_state, init_oplayer, "OPlayer", "OPlayer Mobile Game Console (MGS03-white) (Family Sport 100-in-1)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/drivers/splash.cpp b/src/mame/drivers/splash.cpp index 4e23648c097..40ee00b2ece 100644 --- a/src/mame/drivers/splash.cpp +++ b/src/mame/drivers/splash.cpp @@ -32,14 +32,16 @@ notes: Sound not working on Return of Lady Frog TS 2006.12.22: -- Funny Strip is runing on pSOS RTOS ( http://en.wikipedia.org/wiki/PSOS and http://dr-linux.net/newbase/reference/psosCD/ ) . - There's copyright text at $480 +- Funny Strip is running on pSOS RTOS ( http://en.wikipedia.org/wiki/PSOS and http://dr-linux.net/newbase/reference/psosCD/ ) . + There's copyright text at $480. In Ring & Ball the copyright text is at 0x7c7a0. Also Rebus and TRoLF are running on it (the same internal code structure - traps, interrupt vectors), but copyright messages are removed. - Rebus protection patch sits at the end of trap $b (rtos call) and in some cases returns 0 in D0. - It's not a real protection check i think. + It's not a real protection check I think. +- Ring & Ball is mostly decrypted, currently stops at 'scheda da inizializzare' (board must be initialized). Switching the dip to clear RAM it says + 'Inizializzazione ok, ver 2.6' (Initialization ok, ver 2.6) then stops. By switching DSW2.8 it's possible to enter test mode. -More notes about Funny Strip protection issues at the bottom of source file (DRIVER INIT) +More notes about Funny Strip protection issues at the bottom of source file (init_funystrp) ***************************************************************************/ @@ -1051,9 +1053,9 @@ no idea on this one... ROM_START( ringball ) ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code + gfx */ - // TODO: encrypted, there's a device with scratched part between 68k and roms. u87 looks to have standard 68k vectors with scrambled bits. - ROM_LOAD( "u87.bin", 0x000000, 0x040000, CRC(f8f21cfd) SHA1(c258689fc79195945db21663d2df0a33a4412618) ) - ROM_LOAD( "u111.bin", 0x040000, 0x040000, CRC(11e246b0) SHA1(b056bcaa52ab2898f470a29b0a5c2f3594e2522b) ) // actually "u101"? + // TODO: encrypted, there's a device with scratched part between 68k and roms + ROM_LOAD16_BYTE( "u87.bin", 0x000000, 0x040000, CRC(f8f21cfd) SHA1(c258689fc79195945db21663d2df0a33a4412618) ) + ROM_LOAD16_BYTE( "u111.bin", 0x000001, 0x040000, CRC(11e246b0) SHA1(b056bcaa52ab2898f470a29b0a5c2f3594e2522b) ) // actually "u101"? ROM_REGION( 0x080000, "audiocpu", 0 ) /* Z80 code + sound data */ ROM_LOAD( "u130.bin", 0x000000, 0x080000, CRC(892202ea) SHA1(10b5933b136a6595f739510d380d12c4cefd9f09) ) @@ -1440,6 +1442,35 @@ void funystrp_state::init_funystrp() m_maincpu->space(AS_PROGRAM).install_read_handler(0x100000, 0x1fffff, read16sm_delegate(*this, FUNC(funystrp_state::protection_r))); } +void funystrp_state::init_ringball() // decryption is preliminary, can probably be simplified / rearranged once completely figured out +{ + m_bitmap_type = 0; + m_sprite_attr2_shift = 0; + + uint16_t *audiorom = (uint16_t *)memregion("audiocpu")->base(); + + membank("sound_bank")->configure_entries(0, 16, &audiorom[0x00000], 0x8000); + + uint16_t *src = (uint16_t *)memregion("maincpu")->base(); + + for (int i = 0x0000; i < 0x2000 / 2; i++) // believed ok + src[i] = bitswap<16>(src[i] ^ 0x85cc, 12, 13, 15, 10, 9, 11, 8, 14, 5, 4, 3, 2, 1, 0, 7, 6); + + for (int i = 0x2000 / 2 ; i < 0x4000 / 2; i++) // believed ok + src[i] = bitswap<16>(src[i] ^ 0xb622, 5, 4, 3, 2, 1, 0, 7, 6, 9, 8, 15, 14, 13, 12, 11, 10); + + for (int i = 0x4000 / 2 ; i < 0x8000 / 2; i++) // probably + src[i] = bitswap<16>(src[i] ^ 0xb66d, 8, 9, 10, 11, 12, 13, 14, 15, 1, 0, 2, 3, 4, 5, 6, 7); + + for (int i = 0x8000 / 2; i < 0x10000 / 2; i++) // believed ok + src[i] = bitswap<16>(src[i] ^ 0xc8a6, 1, 3, 0, 5, 7, 9, 11, 13, 15, 14, 12, 8, 10, 6, 4, 2); + + // 0x10000 - 0x61817 is 0xff filled + + for (int i = 0x60000 / 2; i < 0x80000 / 2; i ++) // believed ok for 0x7c000 - 0x80000, probably ok for the rest (test mode doesn't appear otherwise) + src[i] ^= 0xffff; +} + GAME( 1992, splash, 0, splash, splash, splash_state, init_splash, ROT0, "Gaelco / OMK Software", "Splash! (Ver. 1.2 World)", MACHINE_SUPPORTS_SAVE ) GAME( 1992, splash10, splash, splash, splash, splash_state, init_splash10, ROT0, "Gaelco / OMK Software", "Splash! (Ver. 1.0 World)", MACHINE_SUPPORTS_SAVE ) GAME( 1992, paintlad, splash, splash, splash, splash_state, init_splash, ROT0, "Gaelco / OMK Software", "Painted Lady (Splash) (Ver. 1.3 US)", MACHINE_SUPPORTS_SAVE ) @@ -1449,4 +1480,4 @@ GAME( 1993, roldfroga,roldfrog, roldfrog, splash, splash_state, init_roldfro GAME( 1995, rebus, 0, roldfrog, splash, splash_state, init_rebus, ROT0, "Microhard", "Rebus", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 199?, funystrp, 0, funystrp, funystrp, funystrp_state, init_funystrp, ROT0, "Microhard / MagicGames", "Funny Strip", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE ) GAME( 199?, puckpepl, funystrp, funystrp, funystrp, funystrp_state, init_funystrp, ROT0, "Microhard", "Puck People", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE ) -GAME( 199?, ringball, funystrp, funystrp, funystrp, funystrp_state, init_funystrp, ROT0, "Microhard", "Ring & Ball (unknown title)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE ) // Wouldn't surprise me if in-game is actually called King & Bell ... +GAME( 1995, ringball, funystrp, funystrp, funystrp, funystrp_state, init_ringball, ROT0, "Microhard", "Ring Ball (Ver. 2.6)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE ) // Wouldn't surprise me if in-game is actually called King & Bell ... diff --git a/src/mame/drivers/sspeedr.cpp b/src/mame/drivers/sspeedr.cpp index 4cb44a5bac3..5daab48e2fd 100644 --- a/src/mame/drivers/sspeedr.cpp +++ b/src/mame/drivers/sspeedr.cpp @@ -278,7 +278,7 @@ void sspeedr_state::sspeedr(machine_config &config) NETLIST_LOGIC_INPUT(config, "sound_nl:lo_shift", "I_LO_SHIFT", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:boom", "I_BOOM", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:engine_sound_off", - "I_ENGINE_SOUND_OFF", 0); + "I_ENGINE_SOUND_OFF", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:noise_cr_1", "I_NOISE_CR_1", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:noise_cr_2", "I_NOISE_CR_2", 0); NETLIST_LOGIC_INPUT(config, "sound_nl:silence", "I_SILENCE", 0); diff --git a/src/mame/drivers/starcrus.cpp b/src/mame/drivers/starcrus.cpp index 5cbcb2e6ff5..4e1cc1c9e25 100644 --- a/src/mame/drivers/starcrus.cpp +++ b/src/mame/drivers/starcrus.cpp @@ -2,14 +2,14 @@ // copyright-holders:Frank Palazzolo, Ryan Holtz /*************************************************************************** - Ramtek Star Cruiser Driver + Ramtek Star Cruiser Driver - (no known issues) + (no known issues) - Frank Palazzolo - palazzol@home.com + Frank Palazzolo + palazzol@home.com - Netlist Audio by Ryan Holtz + Netlist Audio by Ryan Holtz ***************************************************************************/ diff --git a/src/mame/drivers/vegas.cpp b/src/mame/drivers/vegas.cpp index e6267db1295..7a0fbbd37b8 100644 --- a/src/mame/drivers/vegas.cpp +++ b/src/mame/drivers/vegas.cpp @@ -1619,9 +1619,9 @@ static INPUT_PORTS_START( nbashowt ) PORT_DIPNAME( 0x0040, 0x0040, "Select Game" ) PORT_DIPSETTING( 0x0040, DEF_STR(Yes)) PORT_DIPSETTING( 0x0000, DEF_STR(No)) - PORT_DIPNAME( 0x0080, 0x0080, "Game Powerup" ) - PORT_DIPSETTING( 0x0080, "NBA Showtime" ) - PORT_DIPSETTING( 0x0000, "NFL Blitz" ) + PORT_DIPNAME( 0x0080, 0x0000, "Game Powerup" ) + PORT_DIPSETTING( 0x0080, "NFL Blitz" ) + PORT_DIPSETTING( 0x0000, "NBA Showtime" ) PORT_DIPNAME( 0x0100, 0x0000, "Joysticks" ) PORT_DIPSETTING( 0x0100, "8-Way" ) PORT_DIPSETTING( 0x0000, "49-Way" ) @@ -2653,9 +2653,11 @@ GAME( 1999, roadburn, 0, roadburn, roadburn, vegas_state, init_roadbur GAME( 1999, roadburn1, roadburn, roadburn, roadburn, vegas_state, init_roadburn, ROT0, "Atari Games", "Road Burners (ver 1.0)", MACHINE_SUPPORTS_SAVE ) // Vegas/Durango + Vegas SIO + Voodoo banshee -GAME( 1998, nbashowt, 0, nbashowt, nbashowt, vegas_state, init_nbashowt, ROT0, "Midway Games", "NBA Showtime: NBA on NBC (ver 2.0)", MACHINE_SUPPORTS_SAVE ) -GAME( 1999, nbanfl, 0, nbanfl, nbashowt, vegas_state, init_nbanfl, ROT0, "Midway Games", "NBA Showtime / NFL Blitz 2000 (ver 2.1)", MACHINE_SUPPORTS_SAVE ) -GAME( 2000, nbagold , 0, nbagold, nbashowt, vegas_state, init_nbagold, ROT0, "Midway Games", "NBA Showtime Gold / NFL Blitz 2000 (ver 3.0) (SportsStation)", MACHINE_SUPPORTS_SAVE ) +// missing older versions of NBA Showtime? +GAME( 1998, nbashowt, 0, nbashowt, nbashowt, vegas_state, init_nbashowt, ROT0, "Midway Games", "NBA Showtime NBA on NBC (ver 2.0, Apr 25 1999)", MACHINE_SUPPORTS_SAVE ) +// the game select menu shows SportStation for both of these, was there ever a standalone NBA Showtime Gold? +GAME( 1999, nbanfl, 0, nbanfl, nbashowt, vegas_state, init_nbanfl, ROT0, "Midway Games", "SportStation: NBA Showtime NBA on NBC (ver 2.1, Sep 22 1999) / NFL Blitz 2000 Gold Edition (ver 1.5, Sep 22 1999)", MACHINE_SUPPORTS_SAVE ) // NBA Showtime titlescreen still shows Version 2.0 +GAME( 2000, nbagold, 0, nbagold, nbashowt, vegas_state, init_nbagold, ROT0, "Midway Games", "SportStation: NBA Showtime NBA on NBC Gold Edition (ver 3.0, Feb 18 2000) / NFL Blitz 2000 Gold Edition", MACHINE_SUPPORTS_SAVE ) // boot game dipswitch has no effect, so NFL Blitz 2000 version number not shown // Durango + Denver SIO + Voodoo 3 GAMEL( 1999, sf2049, 0, sf2049, sf2049, vegas_state, init_sf2049, ROT0, "Atari Games", "San Francisco Rush 2049", MACHINE_SUPPORTS_SAVE, layout_sf2049 ) diff --git a/src/mame/drivers/vp101.cpp b/src/mame/drivers/vp101.cpp index 78216735d6e..dc094bf91b7 100644 --- a/src/mame/drivers/vp101.cpp +++ b/src/mame/drivers/vp101.cpp @@ -106,7 +106,7 @@ Small outline design for easy kit retrofitting of existing cabinets. #include "imagedev/harddriv.h" #include "screen.h" -#define VERBOSE (0) +#define VERBOSE (0) #include "logmacro.h" class vp10x_state : public driver_device diff --git a/src/mame/drivers/vt1682.cpp b/src/mame/drivers/vt1682.cpp index 2edbf8008fd..4416ed7d129 100644 --- a/src/mame/drivers/vt1682.cpp +++ b/src/mame/drivers/vt1682.cpp @@ -6038,7 +6038,7 @@ void vt1682_lxts3_state::unk1682_init() uint8_t* ROM = memregion("mainrom")->base(); // this jumps to a function on startup that has a bunch of jumps / accesses to the 3xxx region, which is internal ROM - // but bypassing it allows the unit to boot. + // but bypassing it allows the unit to boot. ROM[0x7ef43] = 0xea; ROM[0x7ef44] = 0xea; ROM[0x7ef45] = 0xea; @@ -6143,7 +6143,7 @@ ROM_START( unk1682 ) ROM_END ROM_START( njp60in1 ) - ROM_REGION( 0x2000000, "mainrom", 0 ) // the 6Mbyte - 7Mbyte region of the ROM is missing, causing Extreme Power Soccer to fail + ROM_REGION( 0x2000000, "mainrom", 0 ) // the 6Mbyte - 7Mbyte region of the ROM is missing, causing Extreme Power Soccer to fail ROM_LOAD( "60-in-1.bin", 0x00000, 0x0800000, CRC(7b2ee951) SHA1(fc7c214704908b85676efc64a21930483d24a457) ) ROM_CONTINUE(0x0800000, 0x0800000) ROM_CONTINUE(0x1000000, 0x0800000) diff --git a/src/mame/drivers/williams.cpp b/src/mame/drivers/williams.cpp index 9aafc0dcb86..15f8b307cbf 100644 --- a/src/mame/drivers/williams.cpp +++ b/src/mame/drivers/williams.cpp @@ -2689,7 +2689,7 @@ There is known to be a "perfect" version of Sinistar, that being the original ve */ ROM_START( sinistar ) // rev. 3 ROM_REGION( 0x19000, "maincpu", 0 ) // solid RED labels with final production part numbers - ROM_LOAD( "sinistar_rom_10-b_16-3004-62.4c", 0x0e000, 0x1000, CRC(3d670417) SHA1(81802622bee8dbea5c0f08019d87d941dcdbe292) ) + ROM_LOAD( "sinistar_rom_10-b_16-3004-62.4c", 0x0e000, 0x1000, CRC(3d670417) SHA1(81802622bee8dbea5c0f08019d87d941dcdbe292) ) ROM_LOAD( "sinistar_rom_11-b_16-3004-63.4a", 0x0f000, 0x1000, CRC(3162bc50) SHA1(2f38e572ab9c731e38dfe9bad3cc8222a775c5ea) ) ROM_LOAD( "sinistar_rom_1-b_16-3004-53.1d", 0x10000, 0x1000, CRC(f6f3a22c) SHA1(026d8cab07734fa294a5645edbe65a904bcbc302) ) ROM_LOAD( "sinistar_rom_2-b_16-3004-54.1c", 0x11000, 0x1000, CRC(cab3185c) SHA1(423d1e3b0c07333ec582529bc4d0b7baf591820a) ) @@ -2709,12 +2709,12 @@ ROM_START( sinistar ) // rev. 3 ROM_LOAD( "video_sound_rom_9_std.808", 0xf000, 0x1000, CRC(b82f4ddb) SHA1(c70c7dd6e88897920d7709a260f27810f66aade1) ) /* - ROM_REGION( 0x10000, "soundcpu_b", 0 ) // Stereo sound requires 2nd sound board as used in the cockpit version - ROM_LOAD( "3004_speech_ic7_r1_16-3004-52.ic7", 0xb000, 0x1000, CRC(e1019568) SHA1(442f4f3ccd2e1db2136d2ffb121ea442921f87ca) ) - ROM_LOAD( "3004_speech_ic5_r1_16-3004-50.ic5", 0xc000, 0x1000, CRC(cf3b5ffd) SHA1(d5d51c550581c9d46ab331dd4fd32541a2ef598e) ) - ROM_LOAD( "3004_speech_ic6_r1_16-3004-51.ic6", 0xd000, 0x1000, CRC(ff8d2645) SHA1(16fa2a602acbbc182dd96bab113ab18356f3daf0) ) - ROM_LOAD( "3004_speech_ic4_r1_16-3004-49.ic4", 0xe000, 0x1000, CRC(4b56a626) SHA1(44430cd5c110ec751b0bfb8ae99b26d443350db1) ) - ROM_LOAD( "sinistar_stereo_18-a.ic12", 0xf000, 0x1000, CRC(b5c70082) SHA1(643af087b57da3a71c68372c79c5777e0c1fbef7) ) // not sure if all speech ROMs need to be here too + ROM_REGION( 0x10000, "soundcpu_b", 0 ) // Stereo sound requires 2nd sound board as used in the cockpit version + ROM_LOAD( "3004_speech_ic7_r1_16-3004-52.ic7", 0xb000, 0x1000, CRC(e1019568) SHA1(442f4f3ccd2e1db2136d2ffb121ea442921f87ca) ) + ROM_LOAD( "3004_speech_ic5_r1_16-3004-50.ic5", 0xc000, 0x1000, CRC(cf3b5ffd) SHA1(d5d51c550581c9d46ab331dd4fd32541a2ef598e) ) + ROM_LOAD( "3004_speech_ic6_r1_16-3004-51.ic6", 0xd000, 0x1000, CRC(ff8d2645) SHA1(16fa2a602acbbc182dd96bab113ab18356f3daf0) ) + ROM_LOAD( "3004_speech_ic4_r1_16-3004-49.ic4", 0xe000, 0x1000, CRC(4b56a626) SHA1(44430cd5c110ec751b0bfb8ae99b26d443350db1) ) + ROM_LOAD( "sinistar_stereo_18-a.ic12", 0xf000, 0x1000, CRC(b5c70082) SHA1(643af087b57da3a71c68372c79c5777e0c1fbef7) ) // not sure if all speech ROMs need to be here too */ ROM_REGION( 0x0400, "proms", 0 ) @@ -2744,12 +2744,12 @@ ROM_START( sinistar2 ) // rev. 2 ROM_LOAD( "video_sound_rom_9_std.808", 0xf000, 0x1000, CRC(b82f4ddb) SHA1(c70c7dd6e88897920d7709a260f27810f66aade1) ) /* - ROM_REGION( 0x10000, "soundcpu_b", 0 ) // Stereo sound requires 2nd sound board as used in the cockpit version - ROM_LOAD( "3004_speech_ic7_r1_16-3004-52.ic7", 0xb000, 0x1000, CRC(e1019568) SHA1(442f4f3ccd2e1db2136d2ffb121ea442921f87ca) ) - ROM_LOAD( "3004_speech_ic5_r1_16-3004-50.ic5", 0xc000, 0x1000, CRC(cf3b5ffd) SHA1(d5d51c550581c9d46ab331dd4fd32541a2ef598e) ) - ROM_LOAD( "3004_speech_ic6_r1_16-3004-51.ic6", 0xd000, 0x1000, CRC(ff8d2645) SHA1(16fa2a602acbbc182dd96bab113ab18356f3daf0) ) - ROM_LOAD( "3004_speech_ic4_r1_16-3004-49.ic4", 0xe000, 0x1000, CRC(4b56a626) SHA1(44430cd5c110ec751b0bfb8ae99b26d443350db1) ) - ROM_LOAD( "sinistar_stereo_18-a.ic12", 0xf000, 0x1000, CRC(b5c70082) SHA1(643af087b57da3a71c68372c79c5777e0c1fbef7) ) // not sure if all speech ROMs need to be here too + ROM_REGION( 0x10000, "soundcpu_b", 0 ) // Stereo sound requires 2nd sound board as used in the cockpit version + ROM_LOAD( "3004_speech_ic7_r1_16-3004-52.ic7", 0xb000, 0x1000, CRC(e1019568) SHA1(442f4f3ccd2e1db2136d2ffb121ea442921f87ca) ) + ROM_LOAD( "3004_speech_ic5_r1_16-3004-50.ic5", 0xc000, 0x1000, CRC(cf3b5ffd) SHA1(d5d51c550581c9d46ab331dd4fd32541a2ef598e) ) + ROM_LOAD( "3004_speech_ic6_r1_16-3004-51.ic6", 0xd000, 0x1000, CRC(ff8d2645) SHA1(16fa2a602acbbc182dd96bab113ab18356f3daf0) ) + ROM_LOAD( "3004_speech_ic4_r1_16-3004-49.ic4", 0xe000, 0x1000, CRC(4b56a626) SHA1(44430cd5c110ec751b0bfb8ae99b26d443350db1) ) + ROM_LOAD( "sinistar_stereo_18-a.ic12", 0xf000, 0x1000, CRC(b5c70082) SHA1(643af087b57da3a71c68372c79c5777e0c1fbef7) ) // not sure if all speech ROMs need to be here too */ ROM_REGION( 0x0400, "proms", 0 ) diff --git a/src/mame/includes/abc1600.h b/src/mame/includes/abc1600.h index 0165a8e83b4..9a060a4d71f 100644 --- a/src/mame/includes/abc1600.h +++ b/src/mame/includes/abc1600.h @@ -62,6 +62,7 @@ public: abc1600_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, MC68008P8_TAG), + m_mac(*this, ABC1600_MAC_TAG), m_dma0(*this, Z8410AB1_0_TAG), m_dma1(*this, Z8410AB1_1_TAG), m_dma2(*this, Z8410AB1_2_TAG), @@ -82,6 +83,7 @@ public: { } required_device<m68000_base_device> m_maincpu; + required_device<abc1600_mac_device> m_mac; required_device<z80dma_device> m_dma0; required_device<z80dma_device> m_dma1; required_device<z80dma_device> m_dma2; @@ -115,7 +117,11 @@ public: void fw1_w(uint8_t data); void spec_contr_reg_w(uint8_t data); - DECLARE_WRITE_LINE_MEMBER( dbrq_w ); + void dbrq_w(int state); + uint8_t dma0_iorq_r(offs_t offset) { return m_sysfs ? m_mac->dma0_iorq_r(offset) : (m_bus0i->read_tren() & m_bus0x->read_tren()); } + void dma0_iorq_w(offs_t offset, uint8_t data) { if (m_sysfs) m_mac->dma0_iorq_w(offset, data); else { m_bus0i->write_tren(data); m_bus0x->write_tren(data); }; } + uint8_t dma1_iorq_r(offs_t offset) { return m_sysscc ? m_mac->dma1_iorq_r(offset) : m_bus1->read_tren(); } + void dma1_iorq_w(offs_t offset, uint8_t data) { if (m_sysscc) m_mac->dma1_iorq_w(offset, data); else m_bus1->write_tren(data); } uint8_t cio_pa_r(); uint8_t cio_pb_r(); @@ -123,15 +129,18 @@ public: uint8_t cio_pc_r(); void cio_pc_w(uint8_t data); - DECLARE_WRITE_LINE_MEMBER( nmi_w ); + void nmi_w(int state); void cpu_space_map(address_map &map); - DECLARE_WRITE_LINE_MEMBER( fdc_drq_w ); - - void update_drdy0(); - void update_drdy1(); - void update_drdy2(); + void update_pren0(int state); + void update_pren1(int state); + void update_drdy0(int state); + void update_drdy1(int state); + void sccrq_a_w(int state) { m_sccrq_a = state; update_drdy1(0); } + void sccrq_b_w(int state) { m_sccrq_b = state; update_drdy1(0); } + void dart_irq_w(int state) { m_dart_irq = state; m_maincpu->set_input_line(M68K_IRQ_5, (m_dart_irq || m_scc_irq) ? ASSERT_LINE : CLEAR_LINE); } + void scc_irq_w(int state) { m_scc_irq = state; m_maincpu->set_input_line(M68K_IRQ_5, (m_dart_irq || m_scc_irq) ? ASSERT_LINE : CLEAR_LINE); } // DMA int m_dmadis; @@ -149,6 +158,10 @@ public: uint8_t m_csb; // card select int m_atce; // V.24 channel A external clock enable int m_btce; // V.24 channel B external clock enable + bool m_sccrq_a; + bool m_sccrq_b; + int m_dart_irq; + int m_scc_irq; }; diff --git a/src/mame/includes/spg2xx.h b/src/mame/includes/spg2xx.h index 8437dbb9d48..0dfb6c01f08 100644 --- a/src/mame/includes/spg2xx.h +++ b/src/mame/includes/spg2xx.h @@ -286,10 +286,10 @@ public: void wfcentro(machine_config &config); protected: -// virtual void machine_start() override; -// virtual void machine_reset() override; +// virtual void machine_start() override; +// virtual void machine_reset() override; -// virtual void portc_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; +// virtual void portc_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; private: diff --git a/src/mame/includes/splash.h b/src/mame/includes/splash.h index 74655605cf6..7c3a58433cc 100644 --- a/src/mame/includes/splash.h +++ b/src/mame/includes/splash.h @@ -130,6 +130,7 @@ public: void funystrp(machine_config &config); void init_funystrp(); + void init_ringball(); protected: virtual void machine_start() override; diff --git a/src/mame/layout/gigatron.lay b/src/mame/layout/gigatron.lay index dc7562db2f2..04d31602bfa 100644 --- a/src/mame/layout/gigatron.lay +++ b/src/mame/layout/gigatron.lay @@ -29,4 +29,4 @@ license:CC0 <bounds x="60" y="15" width="10" height="10" /> </bezel> </view> -</mamelayout>
\ No newline at end of file +</mamelayout> diff --git a/src/mame/machine/bacta_datalogger.cpp b/src/mame/machine/bacta_datalogger.cpp index 816c24ca095..64bcd8eb582 100644 --- a/src/mame/machine/bacta_datalogger.cpp +++ b/src/mame/machine/bacta_datalogger.cpp @@ -16,7 +16,7 @@ BACTA Datalogger emulation The British Amusement and Catering Trade Association created a standard for the tracking of statistics and other features on British AWPs across hardware manufacturers. - The specification is very simple, a 1200 baud null modem connection via RS232, with the logger sending an + The specification is very simple, a 1200 baud null modem connection via RS232, with the logger sending an ACK command (0x06) on receipt of a valid character, and NAK (0x15) on error. In this emulation, the simplest possible device is simulated here, derived from the RS232 null_modem. We only handle the feedback for acknowledgment, and limited logging. @@ -53,7 +53,7 @@ void bacta_datalogger_device::device_reset() int startbits = 1; int databits = 8; parity_t parity = device_serial_interface::PARITY_ODD; - stop_bits_t stopbits = device_serial_interface::STOP_BITS_1; + stop_bits_t stopbits = device_serial_interface::STOP_BITS_1; set_data_frame(startbits, databits, parity, stopbits); @@ -95,7 +95,7 @@ void bacta_datalogger_device::rcv_complete() receive_register_extract(); - data = get_received_char(); + data = get_received_char(); if (data != 0x00) { if (data > 0x80) @@ -106,7 +106,7 @@ void bacta_datalogger_device::rcv_complete() { return; } - } + } m_last_input = data; switch (data) { @@ -200,7 +200,7 @@ void bacta_datalogger_device::rcv_complete() case 0x7f: LOGDATA("(%c) User defined message (0x%x), next byte is message length\n",data,data); break; - + default: LOGDATA("(%c) Received: %02x\n",data, data); break; @@ -209,11 +209,11 @@ void bacta_datalogger_device::rcv_complete() tx_queue(); } else - { - if (data != 0x00) + { + if (data != 0x00) { m_output_char = 0x15;//NAK tx_queue(); } } -}
\ No newline at end of file +} diff --git a/src/mame/machine/nl_tank.cpp b/src/mame/machine/nl_tank.cpp index cf82f52ccf8..e956d12a09c 100644 --- a/src/mame/machine/nl_tank.cpp +++ b/src/mame/machine/nl_tank.cpp @@ -1928,4 +1928,4 @@ NETLIST_START(tank) NET_C(VCC, IC_J11.9, IC_J11.11, IC_J11.13) NET_C(VCC, IC_J3.9) NET_C(VCC, IC_N13.1, IC_N13.13) -NETLIST_END()
\ No newline at end of file +NETLIST_END() diff --git a/src/mame/machine/nl_tank.h b/src/mame/machine/nl_tank.h index fd480c03810..f3cc88d7cf1 100644 --- a/src/mame/machine/nl_tank.h +++ b/src/mame/machine/nl_tank.h @@ -9,4 +9,4 @@ NETLIST_EXTERNAL(tank) -#endif // MAME_MACHINE_NL_TANK_H
\ No newline at end of file +#endif // MAME_MACHINE_NL_TANK_H diff --git a/src/mame/mame.lst b/src/mame/mame.lst index bbb53c01b04..307f7ada49c 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -32591,12 +32591,12 @@ octopus // odyssey // (c) Silicon Gaming. @source:odyssey2.cpp -g7400 // 1983 Videopac Plus G7400 jopac // 1983 Jopac JO7400 odyssey2 // Magnavox Odyssey 2 - 1978-1983 odyssey3 // Magnavox Odyssey 3 / Command Center (prototype) videopac // 1979 Videopac G7000 videopacf // 1979 Videopac C52 +videopacp // 1983 Videopac Plus G7400 @source:offtwall.cpp offtwall // 136090 (c) 1991 diff --git a/src/mame/video/x1.cpp b/src/mame/video/x1.cpp index 8a457c3d68e..af20bf5577d 100644 --- a/src/mame/video/x1.cpp +++ b/src/mame/video/x1.cpp @@ -6,8 +6,8 @@ * * TODO: * - Rewrite drawing functions by taking scanline renderer into account - * * cfr. x1fdemo raster effect on first screen. - * - Use mc6845 internal functions instead of breaking encapsulation + * * cfr. x1fdemo raster effect on first screen. + * - Use mc6845 internal functions instead of breaking encapsulation * * annoying due of the double height/width stuff. * - Improve border drawing, pinpoint what are the visible limits for a mc6845; * - Move X1Turbo features into specific overrides; @@ -111,12 +111,12 @@ void x1_state::draw_fgtilemap(bitmap_rgb32 &bitmap, const rectangle &cliprect) attribute table: x--- ---- double width -x-- ---- double height - --x- ---- PCG select + --x- ---- PCG select ---x ---- color blinking (if 1 reverses color patterns rather than true blinking) ---- x--- reverse color ---- -xxx color pen - - X1 Turbo can also access an additional Kanji VRAM area + + X1 Turbo can also access an additional Kanji VRAM area x--- ---- select Kanji ROM -x-- ---- Kanji side (0=left, 1=right) --x- ---- Underline @@ -257,7 +257,7 @@ void x1_state::draw_fgtilemap(bitmap_rgb32 &bitmap, const rectangle &cliprect) // reverse attribute if(color & 8) pcg_pen ^= 7; - + // X1Turbo only: the black clip register overrides the pen with black if it's hit if((m_scrn_reg.blackclip & 8) && (color == (m_scrn_reg.blackclip & 7))) pcg_pen = 0; @@ -361,7 +361,7 @@ void x1_state::draw_gfxbitmap(bitmap_rgb32 &bitmap, const rectangle &cliprect, i // TODO: not working properly, see top of file if(y*(mc6845_tile_height)+yi < cliprect.min_y || y*(mc6845_tile_height)+yi > cliprect.max_y) continue; - + // TODO: call a fn subset instead of looping for a width/height that is never hit x1_draw_pixel(bitmap, y*(mc6845_tile_height)+yi, x*8+xi, color, 0, 0); } diff --git a/src/tools/chdman.cpp b/src/tools/chdman.cpp index d56fd7c1d25..0444bea3da1 100644 --- a/src/tools/chdman.cpp +++ b/src/tools/chdman.cpp @@ -38,8 +38,8 @@ //************************************************************************** // CONSTANTS & DEFINES //************************************************************************** -// MINGW has adopted the MSVC formatting for 64-bit ints as of GCC 4.4 and deprecated it as of GCC 10 -#if defined(WIN32) && defined(__GNUC__) && (__GNUC__ < 10) +// MINGW has adopted the MSVC formatting for 64-bit ints as of GCC 4.4 and deprecated it as of GCC 9.3 +#if defined(WIN32) && defined(__GNUC__) && ((__GNUC__ < 9) || ((__GNUC__ == 9) && (__GNUC_MINOR__ < 3))) #define I64FMT "I64" #elif !defined(__APPLE__) && defined(__LP64__) #define I64FMT "l" |