diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/devices/bus/ti99/peb/bwg.cpp | 342 | ||||
-rw-r--r-- | src/devices/bus/ti99/peb/bwg.h | 46 | ||||
-rw-r--r-- | src/devices/cpu/mips/mips3drc.cpp | 3 | ||||
-rw-r--r-- | src/mame/drivers/galaxian.cpp | 51 | ||||
-rw-r--r-- | src/mame/drivers/intellect02.cpp | 26 | ||||
-rw-r--r-- | src/mame/drivers/midzeus.cpp | 2 | ||||
-rw-r--r-- | src/mame/drivers/mk1.cpp | 137 | ||||
-rw-r--r-- | src/mame/drivers/pandoras.cpp | 3 | ||||
-rw-r--r-- | src/mame/drivers/pengo.cpp | 77 | ||||
-rw-r--r-- | src/mame/layout/cncchess.lay | 277 | ||||
-rw-r--r-- | src/mame/layout/intellect02.lay | 4 | ||||
-rw-r--r-- | src/mame/mame.lst | 1 |
12 files changed, 713 insertions, 256 deletions
diff --git a/src/devices/bus/ti99/peb/bwg.cpp b/src/devices/bus/ti99/peb/bwg.cpp index f2a23fea518..ffb3d5bc677 100644 --- a/src/devices/bus/ti99/peb/bwg.cpp +++ b/src/devices/bus/ti99/peb/bwg.cpp @@ -52,9 +52,9 @@ #define LOG_WARN (1U<<1) // Warnings #define LOG_RW (1U<<2) // Read and write accesses #define LOG_CRU (1U<<3) // Show CRU bit accesses -#define LOG_READY (1U<<4) // Show ready line activity -#define LOG_SIGNALS (1U<<5) // Show detailed signal activity -#define LOG_DATA (1U<<6) // Show sector data +#define LOG_CRUD (1U<<4) // Show CRU bit accesses (details) +#define LOG_READY (1U<<5) // Show ready line activity +#define LOG_SIGNALS (1U<<6) // Show detailed signal activity #define LOG_ADDRESS (1U<<7) // Show address bus operations #define LOG_MOTOR (1U<<8) // Show motor operations #define LOG_CONFIG (1U<<9) // Configuration @@ -81,14 +81,26 @@ namespace bus { namespace ti99 { namespace peb { snug_bwg_device::snug_bwg_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock): device_t(mconfig, TI99_BWG, tag, owner, clock), device_ti99_peribox_card_interface(mconfig, *this), - m_DRQ(), m_IRQ(), m_dip1(0), m_dip2(0), m_dip34(0), m_ram_page(0), - m_rom_page(0), m_WAITena(false), m_inDsrArea(false), m_WDsel(false), - m_WDsel0(false), m_RTCsel(false), m_lastK(false), m_dataregLB(false), - m_rtc_enabled(false), m_MOTOR_ON(), m_lastval(0), m_address(0), - m_DSEL(0), m_SIDSEL(), m_motor_on_timer(nullptr), m_dsrrom(nullptr), - m_buffer_ram(*this, BUFFER), m_current_floppy(nullptr), + m_DRQ(), m_IRQ(), + m_dip1(0), m_dip2(0), m_dip34(0), + m_inDsrArea(false), + m_WDsel(false), + m_WDsel0(false), + m_RTCsel(false), + m_lastK(false), + m_dataregLB(false), + m_MOTOR_ON(), + m_lastmop(0), + m_address(0), + m_motor_on_timer(nullptr), + m_dsrrom(nullptr), + m_buffer_ram(*this, BUFFER), + m_sel_floppy(0), m_wd1773(*this, FDC_TAG), - m_clock(*this, CLOCK_TAG) { } + m_clock(*this, CLOCK_TAG), + m_crulatch0_7(*this, "crulatch0_7"), + m_crulatch8_15(*this, "crulatch8_15") + { } /* Operate the wait state logic. @@ -98,7 +110,7 @@ void snug_bwg_device::operate_ready_line() // This is the wait state logic LOGMASKED(LOG_SIGNALS, "address=%04x, DRQ=%d, INTRQ=%d, MOTOR=%d\n", m_address & 0xffff, m_DRQ, m_IRQ, m_MOTOR_ON); line_state nready = (m_dataregLB && // Are we accessing 5ff7 - m_WAITena && // and the wait state generation is active (SBO 2) + m_crulatch0_7->q2_r() && // and the wait state generation is active (SBO 2) (m_DRQ==CLEAR_LINE) && // and we are waiting for a byte (m_IRQ==CLEAR_LINE) && // and there is no interrupt yet (m_MOTOR_ON==ASSERT_LINE) // and the motor is turning? @@ -147,14 +159,14 @@ SETADDRESS_DBIN_MEMBER( snug_bwg_device::setaddress_dbin ) // Is the WD chip on the card being selected? // We need the even and odd addresses for the wait state generation, // but only the even addresses when we access it - m_WDsel0 = m_inDsrArea && !m_rtc_enabled + m_WDsel0 = m_inDsrArea && m_crulatch8_15->q6_r()==CLEAR_LINE && ((state==ASSERT_LINE && ((m_address & 0x1ff8)==0x1ff0)) // read || (state==CLEAR_LINE && ((m_address & 0x1ff8)==0x1ff8))); // write m_WDsel = m_WDsel0 && WORD_ALIGNED(m_address); // Is the RTC selected on the card? (even addr) - m_RTCsel = m_inDsrArea && m_rtc_enabled && ((m_address & 0x1fe1)==0x1fe0); + m_RTCsel = m_inDsrArea && m_crulatch8_15->q6_r()==ASSERT_LINE && ((m_address & 0x1fe1)==0x1fe0); // RTC disabled: // 5c00 - 5fef: RAM @@ -189,10 +201,10 @@ void snug_bwg_device::debug_read(offs_t offset, uint8_t* value) if ((offset & 0x1c00)==0x1c00) { if ((offset & 0x1fe0)!=0x1fe0) - *value = m_buffer_ram->pointer()[(m_ram_page<<10) | (offset & 0x03ff)]; + *value = m_buffer_ram->pointer()[(m_crulatch8_15->q5_r()<<10) | (offset & 0x03ff)]; } else - *value = m_dsrrom[(m_rom_page<<13) | (offset & 0x1fff)]; + *value = m_dsrrom[(m_crulatch8_15->q7_r()<<14) | (m_crulatch8_15->q3_r()<<13) | (offset & 0x1fff)]; } } @@ -201,7 +213,7 @@ void snug_bwg_device::debug_write(offs_t offset, uint8_t data) if (((offset & m_select_mask)==m_select_value) && m_selected) { if (((offset & 0x1c00)==0x1c00) && ((offset & 0x1fe0)!=0x1fe0)) - m_buffer_ram->pointer()[(m_ram_page<<10) | (m_address & 0x03ff)] = data; + m_buffer_ram->pointer()[(m_crulatch8_15->q5_r()<<10) | (m_address & 0x03ff)] = data; } } @@ -223,7 +235,8 @@ READ8Z_MEMBER(snug_bwg_device::readz) if (m_lastK) { // ...1 11xx xxxx xxxx - if (m_rtc_enabled) + int rampage = m_crulatch8_15->q5_r(); + if (m_crulatch8_15->q6_r()==ASSERT_LINE) { if (m_RTCsel) { @@ -233,8 +246,8 @@ READ8Z_MEMBER(snug_bwg_device::readz) } else { - *value = m_buffer_ram->pointer()[(m_ram_page<<10) | (m_address & 0x03ff)]; - LOGMASKED(LOG_RW, "read ram: %04x (page %d)-> %02x\n", m_address & 0xffff, m_ram_page, *value); + *value = m_buffer_ram->pointer()[(rampage<<10) | (m_address & 0x03ff)]; + LOGMASKED(LOG_RW, "read ram: %04x (page %d)-> %02x\n", m_address & 0xffff, rampage, *value); } } else @@ -246,19 +259,19 @@ READ8Z_MEMBER(snug_bwg_device::readz) // so we can drop the inversion *value = m_wd1773->read((m_address >> 1)&0x03); LOGMASKED(LOG_RW, "read FDC: %04x -> %02x\n", m_address & 0xffff, *value); - LOGMASKED(LOG_DATA, "\n%04x: %02x", m_address&0xffff, *value); } else { - *value = m_buffer_ram->pointer()[(m_ram_page<<10) | (m_address & 0x03ff)]; - LOGMASKED(LOG_RW, "read ram: %04x (page %d)-> %02x\n", m_address & 0xffff, m_ram_page, *value); + *value = m_buffer_ram->pointer()[(rampage<<10) | (m_address & 0x03ff)]; + LOGMASKED(LOG_RW, "read ram: %04x (page %d)-> %02x\n", m_address & 0xffff, rampage, *value); } } } else { - *value = m_dsrrom[(m_rom_page<<13) | (m_address & 0x1fff)]; - LOGMASKED(LOG_RW, "read dsr: %04x (page %d)-> %02x\n", m_address & 0xffff, m_rom_page, *value); + int rompage = (m_crulatch8_15->q7_r()<<1) | m_crulatch8_15->q3_r(); + *value = m_dsrrom[(rompage << 13) | (m_address & 0x1fff)]; + LOGMASKED(LOG_RW, "read dsr: %04x (page %d)-> %02x\n", m_address & 0xffff, rompage, *value); } } } @@ -287,7 +300,8 @@ void snug_bwg_device::write(offs_t offset, uint8_t data) { if (m_lastK) { - if (m_rtc_enabled) + int rampage = m_crulatch8_15->q5_r(); + if (m_crulatch8_15->q6_r()==ASSERT_LINE) { if (m_RTCsel) { @@ -297,8 +311,8 @@ void snug_bwg_device::write(offs_t offset, uint8_t data) } else { - LOGMASKED(LOG_RW, "write ram: %04x (page %d) <- %02x\n", m_address & 0xffff, m_ram_page, data); - m_buffer_ram->pointer()[(m_ram_page<<10) | (m_address & 0x03ff)] = data; + LOGMASKED(LOG_RW, "write ram: %04x (page %d) <- %02x\n", m_address & 0xffff, rampage, data); + m_buffer_ram->pointer()[(rampage<<10) | (m_address & 0x03ff)] = data; } } else @@ -313,8 +327,8 @@ void snug_bwg_device::write(offs_t offset, uint8_t data) } else { - LOGMASKED(LOG_RW, "write ram: %04x (page %d) <- %02x\n", m_address & 0xffff, m_ram_page, data); - m_buffer_ram->pointer()[(m_ram_page<<10) | (m_address & 0x03ff)] = data; + LOGMASKED(LOG_RW, "write ram: %04x (page %d) <- %02x\n", m_address & 0xffff, rampage, data); + m_buffer_ram->pointer()[(rampage<<10) | (m_address & 0x03ff)] = data; } } } @@ -359,165 +373,126 @@ READ8Z_MEMBER(snug_bwg_device::crureadz) } else *value = 0; - LOGMASKED(LOG_CRU, "Read CRU = %02x\n", *value); + LOGMASKED(LOG_CRUD, "Read CRU = %02x\n", *value); } } void snug_bwg_device::cruwrite(offs_t offset, uint8_t data) { -// int drive, drivebit; - if ((offset & 0xff00)==m_cru_base) { - int bit = (offset >> 1) & 0x0f; - switch (bit) - { - case 0: - /* (De)select the card. Indicated by a LED on the board. */ - m_selected = (data != 0); - LOGMASKED(LOG_CRU, "Map DSR (bit 0) = %d\n", m_selected); - break; - - case 1: - // Activate motor - if (data==1 && m_lastval==0) - { // on rising edge, set motor_running for 4.23s - LOGMASKED(LOG_CRU, "trigger motor (bit 1)\n"); - set_floppy_motors_running(true); - } - m_lastval = data; - break; - - case 2: - /* Set disk ready/hold (bit 2) */ - // 0: ignore IRQ and DRQ - // 1: TMS9900 is stopped until IRQ or DRQ are set - // OR the motor stops rotating - rotates for 4.23s after write - // to CRU bit 1 - LOGMASKED(LOG_CRU, "arm wait state logic (bit 2) = %d\n", data); - m_WAITena = (data != 0); - break; - - case 3: - // Load disk heads (HLT pin) (bit 3). Not implemented. - LOGMASKED(LOG_CRU, "set head load (bit 3) = %d\n", data); - break; - - case 4: - // Select drive 0-2 (DSK1-DSK3) (bits 4-6) - m_DSEL = (data != 0)? (m_DSEL | 0x01) : (m_DSEL & 0xfe); - set_drive(); - break; - case 5: - m_DSEL = (data != 0)? (m_DSEL | 0x02) : (m_DSEL & 0xfd); - set_drive(); - break; - case 6: - m_DSEL = (data != 0)? (m_DSEL | 0x04) : (m_DSEL & 0xfb); - set_drive(); - break; - - case 7: - // Select side of disk (bit 7) - m_SIDSEL = (data==1)? ASSERT_LINE : CLEAR_LINE; - LOGMASKED(LOG_CRU, "set side (bit 7) = %d\n", data); - if (m_current_floppy != nullptr) m_current_floppy->ss_w(data); - break; - - case 8: - // Select drive 3 (DSK4) (bit 8) */ - m_DSEL = (data != 0)? (m_DSEL | 0x08) : (m_DSEL & 0xf7); - set_drive(); - break; - - case 10: - /* double density enable (active low) */ - LOGMASKED(LOG_CRU, "set double density (bit 10) = %d\n", data); - m_wd1773->dden_w(data != 0); - break; - - case 11: - /* EPROM A13 */ - if (data != 0) - m_rom_page |= 1; - else - m_rom_page &= 0xfe; // 11111110 - LOGMASKED(LOG_CRU, "set ROM page (bit 11) = %d, page = %d\n", bit, m_rom_page); - break; - - case 13: - /* RAM A10 */ - m_ram_page = data; - LOGMASKED(LOG_CRU, "set RAM page (bit 13) = %d, page = %d\n", bit, m_ram_page); - break; - - case 14: - /* Override FDC with RTC (active high) */ - LOGMASKED(LOG_CRU, "turn on RTC (bit 14) = %d\n", data); - m_rtc_enabled = (data != 0); - break; - - case 15: - /* EPROM A14 */ - if (data != 0) - m_rom_page |= 2; - else - m_rom_page &= 0xfd; // 11111101 - LOGMASKED(LOG_CRU, "set ROM page (bit 15) = %d, page = %d\n", bit, m_rom_page); - break; - - case 9: - case 12: - /* Unused (bit 3, 9 & 12) */ - LOGMASKED(LOG_CRU, "set unknown bit %d = %d\n", bit, data); - break; - } + LOGMASKED(LOG_CRUD, "Write CRU address %04x (bit %d) = %d\n", offset, (offset & 0xff)>>1, data); + int bitnumber = (offset >> 1) & 0x0f; + if (bitnumber < 8) + m_crulatch0_7->write_bit(bitnumber, BIT(data, 0)); + else + m_crulatch8_15->write_bit(bitnumber & 0x07, BIT(data, 0)); } } -/* - Set the current drive. See also ti_fdc.c -*/ -void snug_bwg_device::set_drive() +WRITE_LINE_MEMBER(snug_bwg_device::den_w) { - LOGMASKED(LOG_CRU, "new DSEL = %d\n", m_DSEL); + // (De)select the card. Indicated by a LED on the board. + m_selected = state; + LOGMASKED(LOG_CRU, "Map DSR (bit 0) = %d\n", m_selected); +} - int bits = m_DSEL & 0x0f; - int num = -1; +WRITE_LINE_MEMBER(snug_bwg_device::mop_w) +{ + // Activate motor on rising edge + if (state==ASSERT_LINE && m_lastmop==CLEAR_LINE) + { // Monoflop lets motor run for 4.23s + LOGMASKED(LOG_CRU, "Trigger motor (bit 1)\n"); + set_floppy_motors_running(true); + } + m_lastmop = state; +} - // If the selected floppy drive is not attached, remove that line - if (m_floppy[3] == nullptr) bits &= 0x07; // 0111 - if (m_floppy[2] == nullptr) bits &= 0x0b; // 1011 - if (m_floppy[1] == nullptr) bits &= 0x0d; // 1101 - if (m_floppy[0] == nullptr) bits &= 0x0e; // 1110 +WRITE_LINE_MEMBER(snug_bwg_device::waiten_w) +{ + /* Set disk ready/hold (bit 2) */ + // 0: ignore IRQ and DRQ + // 1: TMS9900 is stopped until IRQ or DRQ are set + // OR the motor stops rotating - rotates for 4.23s after write + // to CRU bit 1 + LOGMASKED(LOG_CRU, "Arm wait state logic (bit 2) = %d\n", state); +} + +WRITE_LINE_MEMBER(snug_bwg_device::hlt_w) +{ + // Load disk heads (HLT pin) (bit 3). Not implemented. + LOGMASKED(LOG_CRU, "Set head load (bit 3) = %d\n", state); +} + +/* Drive selects */ +WRITE_LINE_MEMBER(snug_bwg_device::dsel1_w) +{ + select_drive(1, state); +} + +WRITE_LINE_MEMBER(snug_bwg_device::dsel2_w) +{ + select_drive(2, state); +} - if ((bits != 0) && (bits != 1) && (bits != 2) && (bits != 4) && (bits != 8)) - LOGMASKED(LOG_WARN, "Warning - multiple drives selected\n"); +WRITE_LINE_MEMBER(snug_bwg_device::dsel3_w) +{ + select_drive(3, state); +} - // The schematics do not reveal any countermeasures against multiple selection - // so we assume that the highest value wins. +WRITE_LINE_MEMBER(snug_bwg_device::dsel4_w) +{ + select_drive(4, state); +} - if (bits==0) +void snug_bwg_device::select_drive(int n, int state) +{ + if (state == CLEAR_LINE) { - m_current_floppy = nullptr; - LOGMASKED(LOG_CRU, "All drives deselected\n"); + LOGMASKED(LOG_CRU, "Unselect drive DSK%d\n", n); + + // Only when no bit is set, unselect all drives. + // The DSR actually selects the new drive first, then unselects + // the old drive. + if ((m_crulatch0_7->q4_r() == 0) && (m_crulatch0_7->q5_r() == 0) + && (m_crulatch0_7->q6_r() == 0) && (m_crulatch8_15->q0_r() == 0)) + { + m_wd1773->set_floppy(nullptr); + m_sel_floppy = 0; + } } else { - if ((bits & 0x08)!=0) num = 3; - else + LOGMASKED(LOG_CRU, "Select drive DSK%d\n", n); + if (m_sel_floppy != 0 && m_sel_floppy != n) { - if ((bits & 0x04)!=0) num = 2; - else - { - if ((bits & 0x02)!=0) num = 1; - else num = 0; - } + LOGMASKED(LOG_WARN, "Warning: DSK%d selected while DSK%d not yet unselected\n", n, m_sel_floppy); } - LOGMASKED(LOG_CRU, "Selected floppy DSK%d\n", num+1); - m_current_floppy = m_floppy[num]; + + if (m_floppy[n-1] != nullptr) + { + m_sel_floppy = n; + m_wd1773->set_floppy(m_floppy[n-1]); + m_floppy[n-1]->ss_w(m_crulatch0_7->q7_r()); + } + } +} + +WRITE_LINE_MEMBER(snug_bwg_device::sidsel_w) +{ + // Select side of disk (bit 7) + if (m_sel_floppy != 0) + { + LOGMASKED(LOG_CRU, "Set side (bit 7) = %d on DSK%d\n", state, m_sel_floppy); + m_floppy[m_sel_floppy-1]->ss_w(m_crulatch0_7->q7_r()); } - m_wd1773->set_floppy(m_current_floppy); +} + +WRITE_LINE_MEMBER(snug_bwg_device::dden_w) +{ + /* double density enable (active low) */ + LOGMASKED(LOG_CRU, "Set density (bit 10) = %d (%s)\n", state, (state!=0)? "single" : "double"); + m_wd1773->dden_w(state != 0); } /* @@ -565,24 +540,15 @@ void snug_bwg_device::device_start() save_item(NAME(m_DRQ)); save_item(NAME(m_IRQ)); - save_item(NAME(m_dip1)); - save_item(NAME(m_dip2)); - save_item(NAME(m_dip34)); - save_item(NAME(m_ram_page)); - save_item(NAME(m_rom_page)); - save_item(NAME(m_WAITena)); save_item(NAME(m_inDsrArea)); save_item(NAME(m_WDsel)); save_item(NAME(m_WDsel0)); save_item(NAME(m_RTCsel)); save_item(NAME(m_lastK)); save_item(NAME(m_dataregLB)); - save_item(NAME(m_rtc_enabled)); save_item(NAME(m_MOTOR_ON)); - save_item(NAME(m_lastval)); + save_item(NAME(m_lastmop)); save_item(NAME(m_address)); - save_item(NAME(m_DSEL)); - save_item(NAME(m_SIDSEL)); } void snug_bwg_device::device_reset() @@ -598,20 +564,15 @@ void snug_bwg_device::device_reset() m_select_value = 0x74000; } - m_lastval = 0; + m_lastmop = 0; m_DRQ = CLEAR_LINE; m_IRQ = CLEAR_LINE; m_MOTOR_ON = CLEAR_LINE; - m_SIDSEL = CLEAR_LINE; - m_wd1773->set_force_ready(false); - m_DSEL = 0; - m_WAITena = false; m_selected = false; - m_rtc_enabled = false; m_dataregLB = false; m_lastK = false; m_RTCsel = false; @@ -628,14 +589,11 @@ void snug_bwg_device::device_reset() LOGMASKED(LOG_CONFIG, "Connector %d has no floppy attached\n", i); } - m_wd1773->set_floppy(m_current_floppy = m_floppy[0]); + m_wd1773->set_floppy(nullptr); m_dip1 = ioport("BWGDIP1")->read(); m_dip2 = ioport("BWGDIP2")->read(); m_dip34 = ioport("BWGDIP34")->read(); - - m_rom_page = 0; - m_ram_page = 0; } void snug_bwg_device::device_config_complete() @@ -700,6 +658,20 @@ void snug_bwg_device::device_add_mconfig(machine_config& config) FLOPPY_CONNECTOR(config, "3", bwg_floppies, nullptr, snug_bwg_device::floppy_formats).enable_sound(true); RAM(config, BUFFER).set_default_size("2K").set_default_value(0); + + LS259(config, m_crulatch0_7); // U13 + m_crulatch0_7->q_out_cb<0>().set(FUNC(snug_bwg_device::den_w)); + m_crulatch0_7->q_out_cb<1>().set(FUNC(snug_bwg_device::mop_w)); + m_crulatch0_7->q_out_cb<2>().set(FUNC(snug_bwg_device::waiten_w)); + m_crulatch0_7->q_out_cb<3>().set(FUNC(snug_bwg_device::hlt_w)); + m_crulatch0_7->q_out_cb<4>().set(FUNC(snug_bwg_device::dsel1_w)); + m_crulatch0_7->q_out_cb<5>().set(FUNC(snug_bwg_device::dsel2_w)); + m_crulatch0_7->q_out_cb<6>().set(FUNC(snug_bwg_device::dsel3_w)); + m_crulatch0_7->q_out_cb<7>().set(FUNC(snug_bwg_device::sidsel_w)); + + LS259(config, m_crulatch8_15); // U12 + m_crulatch8_15->q_out_cb<0>().set(FUNC(snug_bwg_device::dsel4_w)); + m_crulatch8_15->q_out_cb<2>().set(FUNC(snug_bwg_device::dden_w)); } ioport_constructor snug_bwg_device::device_input_ports() const diff --git a/src/devices/bus/ti99/peb/bwg.h b/src/devices/bus/ti99/peb/bwg.h index 2a53f45c75b..3f0f976b3ac 100644 --- a/src/devices/bus/ti99/peb/bwg.h +++ b/src/devices/bus/ti99/peb/bwg.h @@ -21,6 +21,7 @@ #include "machine/mm58274c.h" #include "machine/wd_fdc.h" #include "machine/ram.h" +#include "machine/74259.h" namespace bus { namespace ti99 { namespace peb { @@ -53,6 +54,20 @@ private: DECLARE_WRITE_LINE_MEMBER( fdc_irq_w ); DECLARE_WRITE_LINE_MEMBER( fdc_drq_w ); + // Latch callbacks + DECLARE_WRITE_LINE_MEMBER( den_w ); + DECLARE_WRITE_LINE_MEMBER( mop_w ); + DECLARE_WRITE_LINE_MEMBER( waiten_w ); + DECLARE_WRITE_LINE_MEMBER( hlt_w ); + DECLARE_WRITE_LINE_MEMBER( dsel1_w ); + DECLARE_WRITE_LINE_MEMBER( dsel2_w ); + DECLARE_WRITE_LINE_MEMBER( dsel3_w ); + DECLARE_WRITE_LINE_MEMBER( dsel4_w ); + DECLARE_WRITE_LINE_MEMBER( sidsel_w ); + DECLARE_WRITE_LINE_MEMBER( dden_w ); + + void select_drive(int n, int state); + // Debugger accessors void debug_read(offs_t offset, uint8_t* value); void debug_write(offs_t offset, uint8_t data); @@ -72,14 +87,6 @@ private: // DIP switch state int m_dip1, m_dip2, m_dip34; - // Page selection for ROM and RAM - int m_ram_page; // 0-1 - int m_rom_page; // 0-3 - - // When true, the READY line will be cleared (create wait states) when - // waiting for data from the controller. - bool m_WAITena; - // Address in card area bool m_inDsrArea; @@ -95,28 +102,15 @@ private: // Data register +1 selected bool m_dataregLB; - // Indicates whether the clock is mapped into the address space. - bool m_rtc_enabled; - // Signal motor_on. When true, makes all drives turning. int m_MOTOR_ON; // Needed for triggering the motor monoflop - uint8_t m_lastval; + uint8_t m_lastmop; // Recent address int m_address; - /* Indicates which drive has been selected. Values are 0, 1, 2, and 4. */ - // 000 = no drive - // 001 = drive 1 - // 010 = drive 2 - // 100 = drive 3 - int m_DSEL; - - // Signal SIDSEL. 0 or 1, indicates the selected head. - int m_SIDSEL; - // count 4.23s from rising edge of motor_on emu_timer* m_motor_on_timer; @@ -129,14 +123,18 @@ private: // Link to the attached floppy drives floppy_image_device* m_floppy[4]; - // Currently selected floppy drive - floppy_image_device* m_current_floppy; + // Currently selected floppy drive (1-4, 0=none) + int m_sel_floppy; // Link to the WD1773 controller on the board. required_device<wd1773_device> m_wd1773; // Link to the real-time clock on the board. required_device<mm58274c_device> m_clock; + + // Latched CRU outputs + required_device<ls259_device> m_crulatch0_7; + required_device<ls259_device> m_crulatch8_15; }; } } } // end namespace bus::ti99::peb diff --git a/src/devices/cpu/mips/mips3drc.cpp b/src/devices/cpu/mips/mips3drc.cpp index 7650627d503..26525186cc8 100644 --- a/src/devices/cpu/mips/mips3drc.cpp +++ b/src/devices/cpu/mips/mips3drc.cpp @@ -733,8 +733,7 @@ void mips3_device::static_generate_exception(uint8_t exception, int recover, con { /* set BadVAddr to the fault address */ UML_GETEXP(block, I0); // getexp i0 - UML_TEST(block, CPR032(COP0_Status), SR_EXL); // test [Status],SR_EXL - UML_MOVc(block, COND_Z, CPR032(COP0_BadVAddr), I0); // mov [BadVAddr],i0,Z + UML_MOV(block, CPR032(COP0_BadVAddr), I0); // mov [BadVAddr],i0 } if (exception == EXCEPTION_TLBLOAD || exception == EXCEPTION_TLBSTORE) diff --git a/src/mame/drivers/galaxian.cpp b/src/mame/drivers/galaxian.cpp index 151bbca6302..b6ba8784283 100644 --- a/src/mame/drivers/galaxian.cpp +++ b/src/mame/drivers/galaxian.cpp @@ -12191,6 +12191,13 @@ ROM_END /* +Moonwar + +Although the game displays Moonwar as the title the "original" Moon War is/was a prototype on Stern Berzerk/Frenzy hardware, +see berzerk.cpp So this version is commonly refered to as Moon War II becuase the ROMs & PCB were labeled as MOON WAR II + +NOTE: This version the title screen shows MOONWAR, on the prototype it specifically shows "MOON WAR" + A PCB picture shows the following label format: MOON WAR II @@ -12215,45 +12222,49 @@ MOON WAR II RA20 5C(--36) 1981 STERN MOON WAR II RA20 5D(--36) 1981 STERN - socket 5E NOT populated -Although the game displays Moon War as the title the "original" Moon War is/was a prototype on Stern Berzerk/Frenzy hardware, -see berzerk.cpp So this version is commonly refered to as Moon War II becuase the ROMs & PCB were labeled as MOON WAR II +NOTE: A PCB with ROMs at 2F & 2H specifically labeled as "RXA22" was dumped and verified to match the moonwara set below, + it is unknown if the data is different then the ROMs labeled as "RA22" as shown above. However, according to these + notes in the input code: + Player 1 Dial: P1 dial works normally, P2 dial is reversed, both share same port + Player 2 Dial: doesn't actually work due to bug in game code + It would seem to indicate the code is different becuase for moonwar the issue was corrected. */ ROM_START( moonwar ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "mw2.2c", 0x0000, 0x1000, CRC(7c11b4d9) SHA1(a27bdff6ce728647ec811df843ac235c32c293d6) ) /* Are these 4 the RA22 revision?? not verified */ - ROM_LOAD( "mw2.2e", 0x1000, 0x1000, CRC(1b6362be) SHA1(2fbd95869146adcc0c8be1df653251fda8849e8e) ) - ROM_LOAD( "mw2.2f", 0x2000, 0x1000, CRC(4fd8ba4b) SHA1(3da784267a96d05f66b00626a22cb3f06211d202) ) - ROM_LOAD( "mw2.2h", 0x3000, 0x1000, CRC(56879f0d) SHA1(d1e9932863aebc5761e71fca8d24f3c400e1250d) ) + ROM_LOAD( "mw2.2c", 0x0000, 0x1000, CRC(7c11b4d9) SHA1(a27bdff6ce728647ec811df843ac235c32c293d6) ) /* Are these 4 the RA20 revision or a latter version?? not verified */ + ROM_LOAD( "mw2.2e", 0x1000, 0x1000, CRC(1b6362be) SHA1(2fbd95869146adcc0c8be1df653251fda8849e8e) ) + ROM_LOAD( "mw2.2f", 0x2000, 0x1000, CRC(4fd8ba4b) SHA1(3da784267a96d05f66b00626a22cb3f06211d202) ) + ROM_LOAD( "mw2.2h", 0x3000, 0x1000, CRC(56879f0d) SHA1(d1e9932863aebc5761e71fca8d24f3c400e1250d) ) ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "mw2.5c", 0x0000, 0x0800, CRC(c26231eb) SHA1(5b19edfaefe1a535059311d067ea53405879d627) ) /* Are these 2 the RA20 revision?? not verified */ - ROM_LOAD( "mw2.5d", 0x0800, 0x0800, CRC(bb48a646) SHA1(cf51202d16b03bbed12ff24501be68683f28c992) ) + ROM_LOAD( "moon_war_ii_ra20_5c.5c", 0x0000, 0x0800, CRC(c26231eb) SHA1(5b19edfaefe1a535059311d067ea53405879d627) ) + ROM_LOAD( "moon_war_ii_ra20_5d.5d", 0x0800, 0x0800, CRC(bb48a646) SHA1(cf51202d16b03bbed12ff24501be68683f28c992) ) ROM_REGION( 0x1000, "gfx1", 0 ) - ROM_LOAD( "mw2.5f", 0x0000, 0x0800, CRC(c5fa1aa0) SHA1(6c6b5b2ce5de278ff436d3e7252ece5b086cc41d) ) /* Are these 2 the RA20 revision?? not verified */ - ROM_LOAD( "mw2.5h", 0x0800, 0x0800, CRC(a6ccc652) SHA1(286b3dc1f3a7da3ac66664e774b441ef075745f1) ) + ROM_LOAD( "moon_war_ii_ra20_5f.5f", 0x0000, 0x0800, CRC(c5fa1aa0) SHA1(6c6b5b2ce5de278ff436d3e7252ece5b086cc41d) ) + ROM_LOAD( "moon_war_ii_ra20_5h.5h", 0x0800, 0x0800, CRC(a6ccc652) SHA1(286b3dc1f3a7da3ac66664e774b441ef075745f1) ) ROM_REGION( 0x0020, "proms", 0 ) - ROM_LOAD( "mw2.clr", 0x0000, 0x0020, CRC(99614c6c) SHA1(f068985f3c5e0cd88551a02c32f9baeabfd50241) ) + ROM_LOAD( "moonwar_ii_color_6ea1.6e", 0x0000, 0x0020, CRC(99614c6c) SHA1(f068985f3c5e0cd88551a02c32f9baeabfd50241) ) /* Labeled MOONWAR II COLOR 6EA1 */ ROM_END ROM_START( moonwara ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "2c", 0x0000, 0x1000, CRC(bc20b734) SHA1(c6fe550987d0052979aad43c67aa1b9248049669) ) /* Are these 4 the RA20 revision?? not verified */ - ROM_LOAD( "2e", 0x1000, 0x1000, CRC(db6ffec2) SHA1(0fcd55b1e415e2e7041d10778052a235251f85fe) ) - ROM_LOAD( "2f", 0x2000, 0x1000, CRC(378931b8) SHA1(663f1eea9b0e8dc38de818df66c5211dac41c33b) ) - ROM_LOAD( "2h", 0x3000, 0x1000, CRC(031dbc2c) SHA1(5f2ca8b8763398bf161ee0c2c748a12d36cb40ec) ) + ROM_LOAD( "moon_war_ii_ra22_2c.2c", 0x0000, 0x1000, CRC(bc20b734) SHA1(c6fe550987d0052979aad43c67aa1b9248049669) ) /* These 4 are verified RA22, but all were "--36" if that makes a difference */ + ROM_LOAD( "moon_war_ii_ra22_2e.2e", 0x1000, 0x1000, CRC(db6ffec2) SHA1(0fcd55b1e415e2e7041d10778052a235251f85fe) ) + ROM_LOAD( "moon_war_ii_rxa22_2f.2f", 0x2000, 0x1000, CRC(378931b8) SHA1(663f1eea9b0e8dc38de818df66c5211dac41c33b) ) /* These 2 were specifically labeled as "RXA22" for the revision */ + ROM_LOAD( "moon_war_ii_rxa22_2h.2h", 0x3000, 0x1000, CRC(031dbc2c) SHA1(5f2ca8b8763398bf161ee0c2c748a12d36cb40ec) ) /* These 2 were specifically labeled as "RXA22" for the revision */ ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "mw2.5c", 0x0000, 0x0800, CRC(c26231eb) SHA1(5b19edfaefe1a535059311d067ea53405879d627) ) /* Are these 2 the RA20 revision?? not verified */ - ROM_LOAD( "mw2.5d", 0x0800, 0x0800, CRC(bb48a646) SHA1(cf51202d16b03bbed12ff24501be68683f28c992) ) + ROM_LOAD( "moon_war_ii_ra20_5c.5c", 0x0000, 0x0800, CRC(c26231eb) SHA1(5b19edfaefe1a535059311d067ea53405879d627) ) + ROM_LOAD( "moon_war_ii_ra20_5d.5d", 0x0800, 0x0800, CRC(bb48a646) SHA1(cf51202d16b03bbed12ff24501be68683f28c992) ) ROM_REGION( 0x1000, "gfx1", 0 ) - ROM_LOAD( "mw2.5f", 0x0000, 0x0800, CRC(c5fa1aa0) SHA1(6c6b5b2ce5de278ff436d3e7252ece5b086cc41d) ) /* Are these 2 the RA20 revision?? not verified */ - ROM_LOAD( "mw2.5h", 0x0800, 0x0800, CRC(a6ccc652) SHA1(286b3dc1f3a7da3ac66664e774b441ef075745f1) ) + ROM_LOAD( "moon_war_ii_ra20_5f.5f", 0x0000, 0x0800, CRC(c5fa1aa0) SHA1(6c6b5b2ce5de278ff436d3e7252ece5b086cc41d) ) + ROM_LOAD( "moon_war_ii_ra20_5h.5h", 0x0800, 0x0800, CRC(a6ccc652) SHA1(286b3dc1f3a7da3ac66664e774b441ef075745f1) ) ROM_REGION( 0x0020, "proms", 0 ) - ROM_LOAD( "moonwara.clr", 0x0000, 0x0020, CRC(f58d4f58) SHA1(12a80d1edf3c80dafa0e1e3622d2a03224b62f14) ) /* olive, instead of white */ + ROM_LOAD( "moonwar_ii_color_6ea1.6e", 0x0000, 0x0020, CRC(99614c6c) SHA1(f068985f3c5e0cd88551a02c32f9baeabfd50241) ) /* Labeled MOONWAR II COLOR 6EA1 */ ROM_END diff --git a/src/mame/drivers/intellect02.cpp b/src/mame/drivers/intellect02.cpp index 7cf0e1929fa..019a46b244b 100644 --- a/src/mame/drivers/intellect02.cpp +++ b/src/mame/drivers/intellect02.cpp @@ -35,9 +35,6 @@ keypad legend: ПП - просмотр позиции (view position) УИ - уровень игры (game level) -TODO: -- identify 0,9 buttons (unused on the chess games) - ******************************************************************************/ #include "emu.h" @@ -76,8 +73,7 @@ public: // machine configs void intel02(machine_config &config); - // reset button is tied directly to CPU RESET pin - DECLARE_INPUT_CHANGED_MEMBER(reset_button) { m_maincpu->set_input_line(INPUT_LINE_RESET, newval ? ASSERT_LINE : CLEAR_LINE); } + DECLARE_INPUT_CHANGED_MEMBER(reset_button); protected: virtual void machine_start() override; @@ -132,6 +128,14 @@ void intel02_state::machine_start() save_item(NAME(m_led_active)); } +INPUT_CHANGED_MEMBER(intel02_state::reset_button) +{ + // reset button goes to 8080/8255 RESET pins simultaneously (via 7474, and also a maze of NAND gates to who knows where) + m_maincpu->set_input_line(INPUT_LINE_RESET, newval ? ASSERT_LINE : CLEAR_LINE); + if (newval) + m_ppi8255->reset(); +} + /****************************************************************************** @@ -190,8 +194,8 @@ READ8_MEMBER(intel02_state::input_r) WRITE8_MEMBER(intel02_state::digit_w) { - // d0-d7: digit segment data - m_digit_data = bitswap<8>(data,7,0,1,2,3,4,5,6); + // d0-d6: digit segment data, d7: N/C + m_digit_data = bitswap<7>(data,0,1,2,3,4,5,6); update_display(); } @@ -246,10 +250,10 @@ void intel02_state::main_io(address_map &map) static INPUT_PORTS_START( intel02 ) PORT_START("IN.0") - PORT_BIT(0x0007, IP_ACTIVE_HIGH, IPT_UNKNOWN) + PORT_BIT(0x0007, IP_ACTIVE_HIGH, IPT_UNUSED) PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("View Position") PORT_CODE(KEYCODE_V) PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("Game Level") PORT_CODE(KEYCODE_L) - PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_UNKNOWN) + PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CODE(KEYCODE_9_PAD) PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("H8") PORT_CODE(KEYCODE_8) PORT_CODE(KEYCODE_8_PAD) PORT_CODE(KEYCODE_H) PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("G7") PORT_CODE(KEYCODE_7) PORT_CODE(KEYCODE_7_PAD) PORT_CODE(KEYCODE_G) PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("F6") PORT_CODE(KEYCODE_6) PORT_CODE(KEYCODE_6_PAD) PORT_CODE(KEYCODE_F) @@ -258,7 +262,7 @@ static INPUT_PORTS_START( intel02 ) PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("C3") PORT_CODE(KEYCODE_3) PORT_CODE(KEYCODE_3_PAD) PORT_CODE(KEYCODE_C) PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("B2") PORT_CODE(KEYCODE_2) PORT_CODE(KEYCODE_2_PAD) PORT_CODE(KEYCODE_B) PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("A1") PORT_CODE(KEYCODE_1) PORT_CODE(KEYCODE_1_PAD) PORT_CODE(KEYCODE_A) - PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_UNKNOWN) + PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CODE(KEYCODE_0_PAD) PORT_START("IN.1") PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED) @@ -288,7 +292,7 @@ void intel02_state::intel02(machine_config &config) m_ppi8255->out_pb_callback().set(FUNC(intel02_state::digit_w)); m_ppi8255->tri_pb_callback().set_constant(0); m_ppi8255->out_pc_callback().set(FUNC(intel02_state::control_w)); - m_ppi8255->tri_pc_callback().set_constant(0); + m_ppi8255->tri_pc_callback().set_constant(0x80); /* video hardware */ TIMER(config, m_delay_update).configure_generic(FUNC(intel02_state::delay_update)); diff --git a/src/mame/drivers/midzeus.cpp b/src/mame/drivers/midzeus.cpp index 2f0fc5f84e7..a34c61a00f0 100644 --- a/src/mame/drivers/midzeus.cpp +++ b/src/mame/drivers/midzeus.cpp @@ -1314,7 +1314,7 @@ void midzeus2_state::midzeus2(machine_config &config) m_screen->set_screen_update("zeus2", FUNC(zeus2_device::screen_update)); ZEUS2(config, m_zeus, ZEUS2_VIDEO_CLOCK); - m_zeus->vblank_callback().set(FUNC(midzeus2_state::zeus_irq)); + m_zeus->irq_callback().set(FUNC(midzeus2_state::zeus_irq)); /* sound hardware */ DCS2_AUDIO_2104(config, "dcs", 0); diff --git a/src/mame/drivers/mk1.cpp b/src/mame/drivers/mk1.cpp index e24794400da..4fa70565fed 100644 --- a/src/mame/drivers/mk1.cpp +++ b/src/mame/drivers/mk1.cpp @@ -1,10 +1,17 @@ // license:GPL-2.0+ // copyright-holders:Peter Trauner, Wilbert Pol, hap +// thanks-to:Sean Riddle /****************************************************************************** Driver file to handle emulation of the Novag/Videomaster Chess Champion MK I Initial version by PeT mess@utanet.at 2000,2001. +TODO: +- verify cncchess beeper duration/frequency +- cncchess middle leds + +******************************************************************************* + The MK I was a clone of Data Cash Systems's CompuChess (1977, one of the first chess computers). The ROM is identical. DCS sued Novag Industries for copyright infringement and somehow didn't manage to win the case. @@ -43,16 +50,31 @@ MK I hardware description: - Hardware addressing is controlled by a HBF4001AE. - No speaker. +******************************************************************************* + +Conic Computer Chess (aka Master I in Germany) is also based on DCS CompuChess, +probably the 2nd edition. Conic have done a few changes, not enough to hide that +they 'borrowed' code from CompuChess. They also added a piezo circuit. + +Fairchild 3850PK CPU @ 2MHz (LC circuit), 3853PK +2KB ROM (3216), 256 bytes RAM (2*2111A) +555, 4001, 4011 for display blinking and beeper + +"bP" buttons are F, G, H (instead of A, B, C) + ******************************************************************************/ #include "emu.h" #include "cpu/f8/f8.h" #include "machine/f3853.h" #include "machine/timer.h" +#include "sound/beep.h" +#include "speaker.h" // internal artwork #include "cmpchess.lh" // clickable #include "mk1.lh" // clickable +#include "cncchess.lh" // clickable namespace { @@ -63,6 +85,8 @@ public: mk1_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), + m_beeper_off(*this, "beeper_off"), + m_beeper(*this, "beeper"), m_keypad(*this, "LINE%u", 1U), m_delay_display(*this, "delay_display_%u", 0), m_out_digit(*this, "digit%u", 0U) @@ -70,6 +94,7 @@ public: void cmpchess(machine_config &config); void mk1(machine_config &config); + void cnc(machine_config &config); DECLARE_INPUT_CHANGED_MEMBER(reset_switch); @@ -79,21 +104,32 @@ protected: private: // devices/pointers required_device<cpu_device> m_maincpu; + optional_device<timer_device> m_beeper_off; + optional_device<beep_device> m_beeper; required_ioport_array<4> m_keypad; required_device_array<timer_device, 4> m_delay_display; output_finder<4> m_out_digit; - void main_io(address_map &map); void main_map(address_map &map); + void main_io(address_map &map); + void cnc_io(address_map &map); + TIMER_DEVICE_CALLBACK_MEMBER(beeper_off) { m_beeper->set_state(0); } TIMER_DEVICE_CALLBACK_MEMBER(blink) { m_blink = !m_blink; update_display(); } TIMER_DEVICE_CALLBACK_MEMBER(delay_display); void update_display(); + DECLARE_READ8_MEMBER(beeper_r); + DECLARE_WRITE8_MEMBER(input_w); DECLARE_READ8_MEMBER(input_r); DECLARE_WRITE8_MEMBER(digit_select_w); DECLARE_WRITE8_MEMBER(digit_data_w); + DECLARE_READ8_MEMBER(digit_data_r); + + DECLARE_WRITE8_MEMBER(input_digit_select_w) { input_w(space, offset, data); digit_select_w(space, offset, data); } + DECLARE_WRITE8_MEMBER(input_digit_data_w) { input_w(space, offset, data); digit_data_w(space, offset, data); } + u8 m_inp_mux; u8 m_digit_select; u8 m_digit_data; bool m_blink; @@ -105,11 +141,13 @@ void mk1_state::machine_start() m_out_digit.resolve(); // zerofill + m_inp_mux = 0; m_digit_select = 0; m_digit_data = 0; m_blink = false; // register for savestates + save_item(NAME(m_inp_mux)); save_item(NAME(m_digit_select)); save_item(NAME(m_digit_data)); save_item(NAME(m_blink)); @@ -161,13 +199,29 @@ void mk1_state::update_display() } -// F3850 ports +// I/O handlers + +READ8_MEMBER(mk1_state::beeper_r) +{ + // cncchess: trigger beeper + if (!machine().side_effects_disabled() && m_beeper != nullptr) + { + m_beeper->set_state(1); + m_beeper_off->adjust(attotime::from_msec(50)); // guessed + } + + return m_maincpu->space(AS_PROGRAM).read_byte(offset); +} WRITE8_MEMBER(mk1_state::digit_data_w) { - // digit segment data, and also input mux + // digit segment data m_digit_data = data; - update_display(); +} + +READ8_MEMBER(mk1_state::digit_data_r) +{ + return m_digit_data; } WRITE8_MEMBER(mk1_state::digit_select_w) @@ -182,18 +236,24 @@ WRITE8_MEMBER(mk1_state::digit_select_w) update_display(); } +WRITE8_MEMBER(mk1_state::input_w) +{ + // input matrix is shared with either digit_data_w, or digit_select_w + m_inp_mux = data; +} + READ8_MEMBER(mk1_state::input_r) { - u8 data = m_digit_data; + u8 data = m_inp_mux; // d0-d3: multiplexed inputs from d4-d7 for (int i = 0; i < 4; i++) - if (m_digit_data & m_keypad[i]->read()) + if (m_inp_mux & m_keypad[i]->read()) data |= 1 << i; // d4-d7: multiplexed inputs from d0-d3 for (int i = 0; i < 4; i++) - if (BIT(m_digit_data, i)) + if (BIT(m_inp_mux, i)) data |= m_keypad[i]->read(); return data; @@ -209,15 +269,23 @@ void mk1_state::main_map(address_map &map) { map(0x0000, 0x07ff).rom(); map(0x1800, 0x18ff).ram(); + map(0x8000, 0xffff).r(FUNC(mk1_state::beeper_r)); } void mk1_state::main_io(address_map &map) { - map(0x00, 0x00).rw(FUNC(mk1_state::input_r), FUNC(mk1_state::digit_data_w)); + map(0x00, 0x00).rw(FUNC(mk1_state::input_r), FUNC(mk1_state::input_digit_data_w)); map(0x01, 0x01).w(FUNC(mk1_state::digit_select_w)); map(0x0c, 0x0f).rw("smi", FUNC(f3853_device::read), FUNC(f3853_device::write)); } +void mk1_state::cnc_io(address_map &map) +{ + map(0x00, 0x00).rw(FUNC(mk1_state::digit_data_r), FUNC(mk1_state::digit_data_w)); + map(0x01, 0x01).rw(FUNC(mk1_state::input_r), FUNC(mk1_state::input_digit_select_w)); + map(0x0c, 0x0f).rw("smi", FUNC(f3853_device::read), FUNC(f3853_device::write)); +} + /****************************************************************************** @@ -253,6 +321,35 @@ static INPUT_PORTS_START( cmpchess ) PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_CODE(KEYCODE_R) PORT_TOGGLE PORT_CHANGED_MEMBER(DEVICE_SELF, mk1_state, reset_switch, nullptr) PORT_NAME("Reset Switch") // L.S. switch on the MK I INPUT_PORTS_END +static INPUT_PORTS_START( cncchess ) + PORT_START("LINE1") + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_1) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("1 / Black Pawn") + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_2) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("2 / Black Rook") + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_3) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("3 / Black Knight") + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_4) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("4 / Black Bishop") + + PORT_START("LINE2") + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_5) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("5 / Black Queen") + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_6) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("6 / Black King") + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_7) PORT_CODE(KEYCODE_7_PAD) PORT_CODE(KEYCODE_S) PORT_NAME("7 / SP") // search piece (same as fp) + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_8) PORT_CODE(KEYCODE_8_PAD) PORT_CODE(KEYCODE_I) PORT_NAME("8 / IP") // insert piece (same as ep) + + PORT_START("LINE3") + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_A) PORT_NAME("A / White Pawn") + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_B) PORT_NAME("B / White Rook") + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_C) PORT_NAME("C / White Knight") + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_D) PORT_NAME("D / White Bishop") + + PORT_START("LINE4") + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_E) PORT_NAME("E / White Queen") + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_F) PORT_NAME("F / White King") + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_G) PORT_CODE(KEYCODE_M) PORT_NAME("G / MD") // more data + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_H) PORT_CODE(KEYCODE_ENTER) PORT_CODE(KEYCODE_ENTER_PAD) PORT_NAME("H / GO") + + PORT_START("RESET") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_R) PORT_CHANGED_MEMBER(DEVICE_SELF, mk1_state, reset_switch, nullptr) PORT_NAME("Reset") +INPUT_PORTS_END + /****************************************************************************** @@ -289,6 +386,22 @@ void mk1_state::mk1(machine_config &config) config.set_default_layout(layout_mk1); } +void mk1_state::cnc(machine_config &config) +{ + mk1(config); + + /* basic machine hardware */ + m_maincpu->set_addrmap(AS_IO, &mk1_state::cnc_io); + + config.set_default_layout(layout_cncchess); + + /* sound hardware */ + SPEAKER(config, "speaker").front_center(); + BEEP(config, m_beeper, 2000); // guessed + m_beeper->add_route(ALL_OUTPUTS, "speaker", 0.25); + TIMER(config, "beeper_off").configure_generic(FUNC(mk1_state::beeper_off)); +} + /****************************************************************************** @@ -305,6 +418,12 @@ ROM_START( ccmk1 ) ROM_LOAD("82c210-1", 0x0000, 0x0800, CRC(278f7bf3) SHA1(b384c95ba691d52dfdddd35987a71e9746a46170) ) ROM_END + +ROM_START( cncchess ) + ROM_REGION( 0x0800, "maincpu", 0 ) + ROM_LOAD("c48170.u1", 0x0000, 0x0800, CRC(5beace32) SHA1(9df924037614831a86b73eb3a16bbc80c63257a2) ) // 2316B +ROM_END + } // anonymous namespace @@ -316,3 +435,5 @@ ROM_END // YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS CONS( 1977, cmpchess, 0, 0, cmpchess, cmpchess, mk1_state, empty_init, "Data Cash Systems", "CompuChess", MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) CONS( 1978, ccmk1, cmpchess, 0, mk1, cmpchess, mk1_state, empty_init, "Novag", "Chess Champion: MK I", MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) + +CONS( 1979, cncchess, 0, 0, cnc, cncchess, mk1_state, empty_init, "Conic", "Computer Chess (Conic)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) diff --git a/src/mame/drivers/pandoras.cpp b/src/mame/drivers/pandoras.cpp index 03b3357b3fa..ec84687a697 100644 --- a/src/mame/drivers/pandoras.cpp +++ b/src/mame/drivers/pandoras.cpp @@ -389,9 +389,8 @@ PANDORA'S PAL A1 9J PANDORA'S PAL A1 17J PANDORA'S PAL A1 18J PANDORA'S PAL A1 19J -PANDORA'S PAL A1 9J -PANDORA'S PAL A1 18J +PANDORA'S PAL A1 18A PANDORA'S PAL A1 19A PANDORA'S PAL A1 5J diff --git a/src/mame/drivers/pengo.cpp b/src/mame/drivers/pengo.cpp index 62ddcb73538..2bfa09d35b1 100644 --- a/src/mame/drivers/pengo.cpp +++ b/src/mame/drivers/pengo.cpp @@ -927,7 +927,7 @@ void pengo_state::init_penta() void pengo_state::decode_schick_extra(int size, uint8_t* rom) { // schick has an extra layer of encryption in addition to the penta encryption - for (int A = 0x0000; A < 0x10000; A++) + for (int A = 0x0000; A < 0x8000; A++) { uint8_t srcdec = rom[A]; @@ -943,6 +943,81 @@ void pengo_state::decode_schick_extra(int size, uint8_t* rom) rom[A] = srcdec; } + + for (int A = 0x8000; A < 0x10000; A++) + { + uint8_t srcdec = rom[A]; + + /* if we assume only bits we've seen changed by the 2nd layer are chagned by this then our bitswap possibilities are + + 6, 4, 0 + 6, 0, 4 + 4, 6, 0 + 4, 0, 6 + 0, 4, 6 + 0, 6, 4 + + and XOR possibilities are + + 00 + 01 + 10 + 11 + 40 + 41 + 50 + 51 + + */ + + // copy+paste these + modify + //rom[A] = bitswap<8>(srcdec ^ xx, 7, 0, 5, 6, 3, 2, 1, 4); + //rom[A] = bitswap<8>(srcdec ^ xx, 7, 0, 5, 4, 3, 2, 1, 6); + //rom[A] = bitswap<8>(srcdec ^ xx, 7, 4, 5, 0, 3, 2, 1, 6); + //rom[A] = bitswap<8>(srcdec ^ xx, 7, 4, 5, 6, 3, 2, 1, 0); + //rom[A] = bitswap<8>(srcdec ^ xx, 7, 6, 5, 0, 3, 2, 1, 4); + //rom[A] = bitswap<8>(srcdec ^ xx, 7, 6, 5, 4, 3, 2, 1, 0); // no swap + + if (rom == m_decrypted_opcodes) + { + // these are wrong + if (A & 0x1000) // might be more conditions too, but there's certainly a boundary at efff-f000 (jump table) + { + //rom[A] = bitswap<8>(srcdec ^ 0x10, 7, 0, 5, 6, 3, 2, 1, 4); // NO + rom[A] = bitswap<8>(srcdec ^ 0x10, 7, 0, 5, 4, 3, 2, 1, 6); // potential, but no + //rom[A] = bitswap<8>(srcdec ^ 0x10, 7, 4, 5, 0, 3, 2, 1, 6); // NO + //rom[A] = bitswap<8>(srcdec ^ 0x10, 7, 4, 5, 6, 3, 2, 1, 0); // NO + //rom[A] = bitswap<8>(srcdec ^ 0x10, 7, 6, 5, 0, 3, 2, 1, 4); // NO + //rom[A] = bitswap<8>(srcdec ^ 0x10, 7, 6, 5, 4, 3, 2, 1, 0); // potential, but no (no swap) + + //rom[A] = bitswap<8>(srcdec ^ 0x11, 7, 0, 5, 6, 3, 2, 1, 4); // NO(?) + //rom[A] = bitswap<8>(srcdec ^ 0x11, 7, 0, 5, 4, 3, 2, 1, 6); // NO + //rom[A] = bitswap<8>(srcdec ^ 0x11, 7, 4, 5, 0, 3, 2, 1, 6); // NO + //rom[A] = bitswap<8>(srcdec ^ 0x11, 7, 4, 5, 6, 3, 2, 1, 0); // NO + //rom[A] = bitswap<8>(srcdec ^ 0x11, 7, 6, 5, 0, 3, 2, 1, 4); // NO + //rom[A] = bitswap<8>(srcdec ^ 0x11, 7, 6, 5, 4, 3, 2, 1, 0); + } + else + { + //rom[A] = bitswap<8>(srcdec ^ 0x51, 7, 0, 5, 6, 3, 2, 1, 4); // NO + rom[A] = bitswap<8>(srcdec ^ 0x51, 7, 0, 5, 4, 3, 2, 1, 6); // promising, but no + //rom[A] = bitswap<8>(srcdec ^ 0x51, 7, 4, 5, 0, 3, 2, 1, 6); // NO + //rom[A] = bitswap<8>(srcdec ^ 0x51, 7, 4, 5, 6, 3, 2, 1, 0); // NO + //rom[A] = bitswap<8>(srcdec ^ 0x51, 7, 6, 5, 0, 3, 2, 1, 4); // NO + // rom[A] = bitswap<8>(srcdec ^ 0x51, 7, 6, 5, 4, 3, 2, 1, 0); promising, but no (no swap) + } + } + else + { + // these are correct(?) give good text, good jump locations etc. + if (A & 0x10) + srcdec = bitswap<8>(srcdec ^ 0x11, 7, 0, 5, 6, 3, 2, 1, 4); + else + srcdec = bitswap<8>(srcdec ^ 0x51, 7, 4, 5, 0, 3, 2, 1, 6); + + rom[A] = srcdec; + } + } } void pengo_state::init_schick() diff --git a/src/mame/layout/cncchess.lay b/src/mame/layout/cncchess.lay new file mode 100644 index 00000000000..0546d2e8a0e --- /dev/null +++ b/src/mame/layout/cncchess.lay @@ -0,0 +1,277 @@ +<?xml version="1.0"?> +<mamelayout version="2"> + +<!-- define elements --> + + <element name="blackb"><rect><color red="0" green="0" blue="0" /></rect></element> + <element name="disk_blackb"><disk><color red="0" green="0" blue="0" /></disk></element> + <element name="black"><rect><color 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a/src/mame/layout/intellect02.lay b/src/mame/layout/intellect02.lay index 31a6dfd3980..ad38bdadbea 100644 --- a/src/mame/layout/intellect02.lay +++ b/src/mame/layout/intellect02.lay @@ -99,8 +99,8 @@ <bezel element="button" inputtag="IN.0" inputmask="0x0100"><bounds x="21.57" y="26.7" width="3" height="2.5" /></bezel> <bezel element="button" inputtag="IN.0" inputmask="0x0080"><bounds x="25.93" y="26.7" width="3" height="2.5" /></bezel> <bezel element="button" inputtag="IN.0" inputmask="0x0040"><bounds x="30.27" y="26.7" width="3" height="2.5" /></bezel> - <bezel element="button" inputtag="IN.x" inputmask="0x01"><bounds x="34.64" y="26.7" width="3" height="2.5" /></bezel> - <bezel element="button" inputtag="IN.x" inputmask="0x01"><bounds x="39" y="26.7" width="3" height="2.5" /></bezel> + <bezel element="button" inputtag="IN.0" inputmask="0x0020"><bounds x="34.64" y="26.7" width="3" height="2.5" /></bezel> + <bezel element="button" inputtag="IN.0" inputmask="0x4000"><bounds x="39" y="26.7" width="3" height="2.5" /></bezel> </view> </mamelayout> diff --git a/src/mame/mame.lst b/src/mame/mame.lst index eab11fe6159..b6bacf23668 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -21743,6 +21743,7 @@ mjsister // (c) 1986 Toaplan @source:mk1.cpp ccmk1 // Chess Champion MK I cmpchess +cncchess @source:mk14.cpp mk14 // |