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-rw-r--r--src/devices/bus/isa/eis_twib.cpp259
-rw-r--r--src/devices/bus/isa/eis_twib.h52
-rw-r--r--src/devices/bus/isa/isa_cards.cpp3
-rw-r--r--src/devices/cpu/i86/i86.cpp2
-rw-r--r--src/devices/cpu/rsp/rsp_dasm.cpp2
-rw-r--r--src/devices/machine/spg2xx_io.cpp28
-rw-r--r--src/devices/machine/spg2xx_io.h5
-rw-r--r--src/devices/machine/z80sio.cpp121
-rw-r--r--src/emu/screen.cpp5
-rw-r--r--src/mame/drivers/eispc.cpp2
-rw-r--r--src/mame/drivers/inteladv.cpp7
-rw-r--r--src/mame/drivers/mephistp.cpp52
-rw-r--r--src/mame/drivers/prestige.cpp6
-rw-r--r--src/mame/drivers/vii.cpp280
-rw-r--r--src/mame/layout/pvmil.lay72
-rw-r--r--src/mame/mame.lst2
-rw-r--r--src/osd/modules/render/bgfx/chain.cpp1
17 files changed, 694 insertions, 205 deletions
diff --git a/src/devices/bus/isa/eis_twib.cpp b/src/devices/bus/isa/eis_twib.cpp
new file mode 100644
index 00000000000..8902ead74ef
--- /dev/null
+++ b/src/devices/bus/isa/eis_twib.cpp
@@ -0,0 +1,259 @@
+// license:BSD-3-Clause
+// copyright-holders:Joakim Larsson Edstrom
+/***********************************************************************************************************
+ *
+ * Ericsson Information Systems/Nokia Data/ICL, SAD 8852 IBM 3270/5250 terminal emulation adapter
+ *
+ * This board is a terminal adapter for XT class PC machines to be connected as a terminal to
+ * IBM mainframes. There are two on board connectors, a BNC connector to act as a 3270 terminal
+ * and a twinax connector for the older 5250 terminal.
+ *
+ * TODO:
+ * - Hook up 8274 fully
+ * - Add bitbanger device and hook it up to an (emulated?!) IBM mainframe
+ *
+ ************************************************************************************************************/
+/*
+ Links:
+ ------
+ https://github.com/MattisLind/alfaskop_emu
+
+ Ericsson manufactured board - marked 83016053-30, assembled in 1984 indicated by chip dates
+ +--------------------------------------------------------------------------------------+ ___
+ |O 83016053-30 IC11 IC20 X1 |o|_||
+ | IC14 IC15 74LS74 74S37 19.170MHz |____|
+ | NDK 4Y ||
+ | RS232 IC13 IC18 ||
+ | IC12 ULA 2C143E Ferranti ||---
+ | X.27 i8274 MPSC P1|| |= Twinax (5250)
+ | serial controller IC19 IC17 ||---
+ | P3 IC16 754528P LM339 1234567890 ||
+ | IC10 SW2 DIP ||
+ | 74LS08 IC21 RP2 Resistor SIL ||
+ | W2 74LS30 IC2 IC8 ||
+ | IC5 IC1 IC7 74LS125 74LS240 ||
+ | 74LS04 74LS244 RP1 74LS86 W1 CSA1 CSA2 ||---
+ | IC4 IC3 Resistor DIL IC6 ooooo o5 o5 IC9 P2|| |- BNC(3270)
+ | 74LS00 74LS00 1234567890 74LS86 ooooo 1o o4 1o o4 74LS245 ||---
+ | SW1 DIP 2o o3 2o o3 ____|
+ +----------------------------------------------------------------------------------|o___|
+ ||||||||||||||||||||||||| |
+ Notes |
+ ------------------------------------------------------------------------------ |
+ IC13-IC16 unpopulated IC:s
+ CSA1,CSA2 unpopulated jumper areas
+ W2 unpopulated jumper area
+ P3 unpopulated connector RS232/X.27(RS422)
+
+ General description
+ -------------------
+ This is a passive ISA8 board that should be fitted into an Ericsson PC (epc) and
+ driven by suitable software. It was replaced by the ISA16 SAD8852 intelligent TWIB
+ board for WS286 and higher a few years later.
+
+ */
+
+#include "emu.h"
+#include "eis_twib.h"
+#include "machine/z80sio.h"
+
+#define LOG_READ (1U << 1)
+#define LOG_IRQ (1U << 2)
+
+//#define VERBOSE (LOG_IRQ)
+//#define LOG_OUTPUT_STREAM std::cout
+
+#include "logmacro.h"
+
+#define LOGR(...) LOGMASKED(LOG_READ, __VA_ARGS__)
+#define LOGIRQ(...) LOGMASKED(LOG_IRQ, __VA_ARGS__)
+
+#ifdef _MSC_VER
+#define FUNCNAME __func__
+#else
+#define FUNCNAME __PRETTY_FUNCTION__
+#endif
+
+DEFINE_DEVICE_TYPE(ISA8_EIS_TWIB, isa8_eistwib_device, "eistwib", "EIS TWIB IBM mainframe terminal adapter")
+
+//-------------------------------------------------
+// Access methods from ISA bus
+//-------------------------------------------------
+READ8_MEMBER( isa8_eistwib_device::twib_r )
+{
+ LOGR("%s : offset=%d\n", FUNCNAME, offset);
+ return m_uart8274->cd_ba_r(offset);
+}
+
+WRITE8_MEMBER( isa8_eistwib_device::twib_w )
+{
+ LOG("%s : offset=%d data=0x%02x\n", FUNCNAME, offset, data);
+ m_uart8274->cd_ba_w(offset, data);
+}
+
+TIMER_DEVICE_CALLBACK_MEMBER(isa8_eistwib_device::tick_bitclock)
+{
+ m_uart8274->txca_w(m_bitclock);
+ m_uart8274->rxca_w(m_bitclock);
+ m_sdlclogger->clock_w(m_bitclock);
+ m_bitclock = !m_bitclock;
+}
+
+
+//----------------------------------------------------------
+// UI I/O
+//----------------------------------------------------------
+static INPUT_PORTS_START( eistwib_ports )
+ PORT_START("SW1")
+ PORT_DIPNAME( 0x3f0, 0x380, "I/O Base address" )
+ PORT_DIPSETTING( 0x000, "0x000" )
+ PORT_DIPSETTING( 0x010, "0x010" )
+ PORT_DIPSETTING( 0x020, "0x020" )
+ PORT_DIPSETTING( 0x030, "0x030" )
+ PORT_DIPSETTING( 0x040, "0x040" )
+ PORT_DIPSETTING( 0x050, "0x050" )
+ PORT_DIPSETTING( 0x060, "0x060" )
+ PORT_DIPSETTING( 0x070, "0x070" )
+ PORT_DIPSETTING( 0x080, "0x080" )
+ PORT_DIPSETTING( 0x090, "0x090" )
+ PORT_DIPSETTING( 0x0a0, "0x0a0" )
+ PORT_DIPSETTING( 0x0b0, "0x0b0" )
+ PORT_DIPSETTING( 0x0c0, "0x0c0" )
+ PORT_DIPSETTING( 0x0d0, "0x0d0" )
+ PORT_DIPSETTING( 0x0e0, "0x0e0" )
+ PORT_DIPSETTING( 0x0f0, "0x0f0" )
+ PORT_DIPSETTING( 0x100, "0x100" )
+ PORT_DIPSETTING( 0x110, "0x110" )
+ PORT_DIPSETTING( 0x120, "0x120" )
+ PORT_DIPSETTING( 0x130, "0x130" )
+ PORT_DIPSETTING( 0x140, "0x140" )
+ PORT_DIPSETTING( 0x150, "0x150" )
+ PORT_DIPSETTING( 0x160, "0x160" )
+ PORT_DIPSETTING( 0x170, "0x170" )
+ PORT_DIPSETTING( 0x180, "0x180" )
+ PORT_DIPSETTING( 0x190, "0x190" )
+ PORT_DIPSETTING( 0x1a0, "0x1a0" )
+ PORT_DIPSETTING( 0x1b0, "0x1b0" )
+ PORT_DIPSETTING( 0x1c0, "0x1c0" )
+ PORT_DIPSETTING( 0x1d0, "0x1d0" )
+ PORT_DIPSETTING( 0x1e0, "0x1e0" )
+ PORT_DIPSETTING( 0x1f0, "0x1f0" )
+ PORT_DIPSETTING( 0x200, "0x200" )
+ PORT_DIPSETTING( 0x210, "0x210" )
+ PORT_DIPSETTING( 0x220, "0x220" )
+ PORT_DIPSETTING( 0x230, "0x230" )
+ PORT_DIPSETTING( 0x240, "0x240" )
+ PORT_DIPSETTING( 0x250, "0x250" )
+ PORT_DIPSETTING( 0x260, "0x260" )
+ PORT_DIPSETTING( 0x270, "0x270" )
+ PORT_DIPSETTING( 0x280, "0x280" )
+ PORT_DIPSETTING( 0x290, "0x290" )
+ PORT_DIPSETTING( 0x2a0, "0x2a0" )
+ PORT_DIPSETTING( 0x2b0, "0x2b0" )
+ PORT_DIPSETTING( 0x2c0, "0x2c0" )
+ PORT_DIPSETTING( 0x2d0, "0x2d0" )
+ PORT_DIPSETTING( 0x2e0, "0x2e0" )
+ PORT_DIPSETTING( 0x2f0, "0x2f0" )
+ PORT_DIPSETTING( 0x300, "0x300" )
+ PORT_DIPSETTING( 0x310, "0x310" )
+ PORT_DIPSETTING( 0x320, "0x320" )
+ PORT_DIPSETTING( 0x330, "0x330" )
+ PORT_DIPSETTING( 0x340, "0x340" )
+ PORT_DIPSETTING( 0x350, "0x350" )
+ PORT_DIPSETTING( 0x360, "0x360" )
+ PORT_DIPSETTING( 0x370, "0x370" )
+ PORT_DIPSETTING( 0x380, "0x380" )
+ PORT_DIPSETTING( 0x390, "0x390" )
+ PORT_DIPSETTING( 0x3a0, "0x3a0" )
+ PORT_DIPSETTING( 0x3b0, "0x3b0" )
+ PORT_DIPSETTING( 0x3c0, "0x3c0" )
+ PORT_DIPSETTING( 0x3d0, "0x3d0" )
+ PORT_DIPSETTING( 0x3e0, "0x3e0" )
+ PORT_DIPSETTING( 0x3f0, "0x3f0" )
+
+ PORT_START("W1") // Jumper area, field 0=no jumper 1=LPT 2=COM 3=n/a
+ PORT_DIPNAME(0x01, 0x00, "ISA IRQ2")
+ PORT_DIPSETTING(0x00, "no jumper")
+ PORT_DIPSETTING(0x01, "8274 INT")
+ PORT_DIPNAME(0x02, 0x00, "ISA IRQ3")
+ PORT_DIPSETTING(0x00, "no jumper")
+ PORT_DIPSETTING(0x02, "8274 INT")
+ PORT_DIPNAME(0x04, 0x04, "ISA IRQ4")
+ PORT_DIPSETTING(0x00, "no jumper")
+ PORT_DIPSETTING(0x04, "8274 INT")
+ PORT_DIPNAME(0x08, 0x00, "ISA IRQ5")
+ PORT_DIPSETTING(0x00, "no jumper")
+ PORT_DIPSETTING(0x08, "8274 INT")
+ PORT_DIPNAME(0x10, 0x00, "ISA IRQ6")
+ PORT_DIPSETTING(0x00, "no jumper")
+ PORT_DIPSETTING(0x10, "8274 INT")
+INPUT_PORTS_END
+
+ioport_constructor isa8_eistwib_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME( eistwib_ports );
+}
+
+//-------------------------------------------------
+// Board configuration
+//-------------------------------------------------
+void isa8_eistwib_device::device_add_mconfig(machine_config &config)
+{
+ SDLC_LOGGER(config, m_sdlclogger, 0); // To decode the frames
+ I8274_NEW(config, m_uart8274, (XTAL(14'318'181)/ 3) / 2); // Half the 4,77 MHz ISA bus CLK signal
+ //m_uart8274->out_rtsa_callback().set([this] (int state) { m_rts = state; });
+ m_uart8274->out_txda_callback().set([this] (int state) { m_txd = state; m_sdlclogger->data_w(state); });
+ m_uart8274->out_int_callback().set([this] (int state)
+ { // Jumper field W1 decides what IRQs to pull
+ if (m_isairq->read() & 0x01) { LOGIRQ("TWIB IRQ2: %d\n", state); m_isa->irq2_w(state); }
+ if (m_isairq->read() & 0x02) { LOGIRQ("TWIB IRQ3: %d\n", state); m_isa->irq3_w(state); }
+ if (m_isairq->read() & 0x04) { LOGIRQ("TWIB IRQ4: %d\n", state); m_isa->irq4_w(state); }
+ if (m_isairq->read() & 0x08) { LOGIRQ("TWIB IRQ5: %d\n", state); m_isa->irq5_w(state); }
+ if (m_isairq->read() & 0x10) { LOGIRQ("TWIB IRQ6: %d\n", state); m_isa->irq6_w(state); }
+ });
+
+ TIMER(config, "bitclock").configure_periodic(FUNC(isa8_eistwib_device::tick_bitclock), attotime::from_hz(300000));
+}
+
+isa8_eistwib_device::isa8_eistwib_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, ISA8_EIS_TWIB, tag, owner, clock)
+ , device_isa8_card_interface(mconfig, *this)
+ , m_uart8274(*this, "terminal")
+ , m_sdlclogger(*this, "logger")
+ , m_bitclock(false)
+ , m_rts(false)
+ , m_txd(false)
+ , m_sw1(*this, "SW1")
+ , m_isairq(*this, "W1")
+ , m_installed(false)
+{
+}
+
+//-------------------------------------------------
+// Overloading methods
+//-------------------------------------------------
+void isa8_eistwib_device::device_start()
+{
+ set_isa_device();
+ m_installed = false;
+ m_bitclock = false;
+ save_item(NAME(m_installed));
+ save_item(NAME(m_bitclock));
+}
+
+void isa8_eistwib_device::device_reset()
+{
+ int base = m_sw1->read();
+ if (!m_installed)
+ {
+ LOG("Installing twib device at %04x\n", base);
+ m_isa->install_device(
+ base, base + 0x0f,
+ read8_delegate(*this, FUNC( isa8_eistwib_device::twib_r )),
+ write8_delegate(*this, FUNC( isa8_eistwib_device::twib_w )));
+ m_installed = true;
+ }
+ // CD and CTS input are tied to ground
+ m_uart8274->ctsa_w(0);
+ m_uart8274->dcda_w(0);
+}
diff --git a/src/devices/bus/isa/eis_twib.h b/src/devices/bus/isa/eis_twib.h
new file mode 100644
index 00000000000..368287483a6
--- /dev/null
+++ b/src/devices/bus/isa/eis_twib.h
@@ -0,0 +1,52 @@
+// license:BSD-3-Clause
+// copyright-holders: Joakim Larsson Edstrom
+#ifndef MAME_BUS_ISA_EIS_TWIB_H
+#define MAME_BUS_ISA_EIS_TWIB_H
+
+#pragma once
+
+#include "isa.h"
+#include "machine/z80sio.h"
+#include "machine/timer.h"
+#include "machine/sdlc.h"
+
+class isa8_eistwib_device :
+ public device_t,
+ public device_isa8_card_interface
+{
+public:
+ // construction/destruction
+ isa8_eistwib_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ DECLARE_READ8_MEMBER(twib_r);
+ DECLARE_WRITE8_MEMBER(twib_w);
+
+protected:
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
+ // devices
+ required_device<i8274_new_device> m_uart8274;
+ required_device<sdlc_logger_device> m_sdlclogger;
+
+ // optional information overrides
+ virtual void device_add_mconfig(machine_config &config) override;
+ virtual ioport_constructor device_input_ports() const override;
+
+ // Timers
+ TIMER_DEVICE_CALLBACK_MEMBER(tick_bitclock);
+ bool m_bitclock;
+ bool m_rts;
+ bool m_txd;
+
+ // helpers
+ required_ioport m_sw1;
+ required_ioport m_isairq;
+ bool m_installed;
+};
+
+// device type definition
+DECLARE_DEVICE_TYPE(ISA8_EIS_TWIB, isa8_eistwib_device)
+
+#endif // MAME_BUS_ISA_EIS_TWIB_H
diff --git a/src/devices/bus/isa/isa_cards.cpp b/src/devices/bus/isa/isa_cards.cpp
index 33973211c7d..8724327c94d 100644
--- a/src/devices/bus/isa/isa_cards.cpp
+++ b/src/devices/bus/isa/isa_cards.cpp
@@ -66,6 +66,7 @@
#include "ne2000.h"
#include "3c505.h"
#include "eis_sad8852.h"
+#include "eis_twib.h"
#include "np600.h"
// communication ports
@@ -129,6 +130,7 @@ void pc_isa8_cards(device_slot_interface &device)
device.option_add("chessmsr", ISA8_CHESSMSR);
device.option_add("finalchs", ISA8_FINALCHS);
device.option_add("epc_mda", ISA8_EPC_MDA);
+ device.option_add("epc_twib", ISA8_EIS_TWIB);
}
void pc_isa16_cards(device_slot_interface &device)
@@ -171,6 +173,7 @@ void pc_isa16_cards(device_slot_interface &device)
device.option_add("chessmsr", ISA8_CHESSMSR);
device.option_add("finalchs", ISA8_FINALCHS);
device.option_add("epc_mda", ISA8_EPC_MDA);
+ device.option_add("epc_twib", ISA8_EIS_TWIB);
// 16-bit
device.option_add("ide", ISA16_IDE);
device.option_add("ne2000", NE2000);
diff --git a/src/devices/cpu/i86/i86.cpp b/src/devices/cpu/i86/i86.cpp
index 619171b9cef..c6eca719146 100644
--- a/src/devices/cpu/i86/i86.cpp
+++ b/src/devices/cpu/i86/i86.cpp
@@ -2156,7 +2156,7 @@ bool i8086_common_cpu_device::common_op(uint8_t op)
case 0xf0: // i_lock
case 0xf1: // 0xf1 is 0xf0; verified on real CPU
- logerror("%06x: Warning - BUSLOCK\n", m_pc);
+ //logerror("%06x: Warning - BUSLOCK\n", m_pc); // Why warn for using lock instruction?
m_lock = true;
m_no_interrupt = 1;
CLK(NOP);
diff --git a/src/devices/cpu/rsp/rsp_dasm.cpp b/src/devices/cpu/rsp/rsp_dasm.cpp
index dec44596d45..6db58a28f4a 100644
--- a/src/devices/cpu/rsp/rsp_dasm.cpp
+++ b/src/devices/cpu/rsp/rsp_dasm.cpp
@@ -230,7 +230,7 @@ void rsp_disassembler::disasm_swc2(std::ostream &stream, uint32_t op)
u32 rsp_disassembler::opcode_alignment() const
{
- return 1;
+ return 4;
}
offs_t rsp_disassembler::dasm_one(std::ostream &stream, offs_t pc, u32 op)
diff --git a/src/devices/machine/spg2xx_io.cpp b/src/devices/machine/spg2xx_io.cpp
index f396567307a..37768895396 100644
--- a/src/devices/machine/spg2xx_io.cpp
+++ b/src/devices/machine/spg2xx_io.cpp
@@ -113,6 +113,9 @@ void spg2xx_io_device::device_start()
m_timer_src_c = timer_alloc(TIMER_SRC_C);
m_timer_src_c->adjust(attotime::never);
+ m_rng_timer = timer_alloc(TIMER_RNG);
+ m_rng_timer->adjust(attotime::never);
+
save_item(NAME(m_timer_a_preload));
save_item(NAME(m_timer_b_preload));
save_item(NAME(m_timer_b_divisor));
@@ -155,6 +158,9 @@ void spg2xx_io_device::device_reset()
m_4khz_timer->adjust(attotime::from_hz(4096), 0, attotime::from_hz(4096));
+ m_rng_timer->adjust(attotime::from_hz(1234), 0, attotime::from_hz(1234)); // timer value is arbitrary, maybe should match system clock, but that would result in heavy switching
+
+
m_2khz_divider = 0;
m_1khz_divider = 0;
m_4hz_divider = 0;
@@ -177,6 +183,15 @@ void spg2xx_io_device::uart_rx(uint8_t data)
}
}
+uint16_t spg2xx_io_device::clock_rng(int which)
+{
+ const uint16_t value = m_io_regs[0x2c + which];
+ m_io_regs[0x2c + which] = ((value << 1) | (BIT(value, 14) ^ BIT(value, 13))) & 0x7fff;
+ return value;
+}
+
+
+
READ16_MEMBER(spg2xx_io_device::io_r)
{
static const char *const gpioregs[] = { "GPIO Data Port", "GPIO Buffer Port", "GPIO Direction Port", "GPIO Attribute Port", "GPIO IRQ/Latch Port" };
@@ -256,16 +271,12 @@ READ16_MEMBER(spg2xx_io_device::io_r)
case 0x2c: // PRNG 0
{
- const uint16_t value = m_io_regs[0x2c];
- m_io_regs[0x2c] = ((value << 1) | (BIT(value, 14) ^ BIT(value, 13))) & 0x7fff;
- return value;
+ return clock_rng(0);
}
case 0x2d: // PRNG 1
{
- const uint16_t value = m_io_regs[0x2d];
- m_io_regs[0x2d] = ((value << 1) | (BIT(value, 14) ^ BIT(value, 13))) & 0x7fff;
- return value;
+ return clock_rng(1);
}
case 0x2e: // FIQ Source Select
@@ -1099,6 +1110,11 @@ void spg2xx_io_device::device_timer(emu_timer &timer, device_timer_id id, int pa
case TIMER_SRC_C:
update_timer_c_src();
break;
+
+ case TIMER_RNG:
+ clock_rng(0);
+ clock_rng(1);
+ break;
}
}
diff --git a/src/devices/machine/spg2xx_io.h b/src/devices/machine/spg2xx_io.h
index a077d8554be..d1ddd573283 100644
--- a/src/devices/machine/spg2xx_io.h
+++ b/src/devices/machine/spg2xx_io.h
@@ -66,11 +66,14 @@ protected:
static const device_timer_id TIMER_4KHZ = 6;
static const device_timer_id TIMER_SRC_AB = 7;
static const device_timer_id TIMER_SRC_C = 8;
+ static const device_timer_id TIMER_RNG = 9;
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
+ uint16_t clock_rng(int which);
+
void update_porta_special_modes();
void update_portb_special_modes();
void do_gpio(uint32_t offset, bool write);
@@ -135,6 +138,8 @@ protected:
emu_timer *m_uart_tx_timer;
emu_timer *m_uart_rx_timer;
+ emu_timer *m_rng_timer;
+
required_device<unsp_device> m_cpu;
required_device<screen_device> m_screen;
diff --git a/src/devices/machine/z80sio.cpp b/src/devices/machine/z80sio.cpp
index f0a867833b8..ae93bdd2848 100644
--- a/src/devices/machine/z80sio.cpp
+++ b/src/devices/machine/z80sio.cpp
@@ -68,8 +68,9 @@
#define LOG_DCD (1U << 8)
#define LOG_SYNC (1U << 9)
#define LOG_BIT (1U << 10)
+#define LOG_RTS (1U << 11)
-//#define VERBOSE (LOG_INT | LOG_READ | LOG_SETUP | LOG_TX | LOG_CMD | LOG_CTS)
+//#define VERBOSE (LOG_CMD | LOG_SETUP | LOG_SYNC | LOG_BIT | LOG_TX )
//#define LOG_OUTPUT_STREAM std::cout
#include "logmacro.h"
@@ -81,6 +82,7 @@
#define LOGTX(...) LOGMASKED(LOG_TX, __VA_ARGS__)
#define LOGRCV(...) LOGMASKED(LOG_RCV, __VA_ARGS__)
#define LOGCTS(...) LOGMASKED(LOG_CTS, __VA_ARGS__)
+#define LOGRTS(...) LOGMASKED(LOG_RTS, __VA_ARGS__)
#define LOGDCD(...) LOGMASKED(LOG_DCD, __VA_ARGS__)
#define LOGSYNC(...) LOGMASKED(LOG_SYNC, __VA_ARGS__)
#define LOGBIT(...) LOGMASKED(LOG_BIT, __VA_ARGS__)
@@ -297,7 +299,7 @@ inline void z80sio_channel::set_rts(int state)
{
if (bool(m_rts) != bool(state))
{
- LOG("%s(%d) \"%s\" Channel %c \n", FUNCNAME, state, owner()->tag(), 'A' + m_index);
+ LOGRTS("%s(%d) \"%s\" Channel %c \n", FUNCNAME, state, owner()->tag(), 'A' + m_index);
out_rts_cb(m_rts = state);
}
}
@@ -341,7 +343,9 @@ inline void z80sio_channel::tx_setup_idle()
break;
case WR4_SYNC_MODE_SDLC:
// SDLC transmit examples don't show flag being loaded, implying it's hard-coded on the transmit side
- tx_setup(0x7e, 8, true, false, false);
+ //tx_setup(0x7e, 8, true, false, false);
+ // Verified on a 8274, the 0x7e SYNC byte is required in CR7 to start transmitting, other values fails
+ tx_setup(m_wr7, 8, true, false, false);
break;
}
m_tx_in_pkt = false;
@@ -1073,6 +1077,8 @@ bool z80sio_channel::is_tx_idle() const
//-------------------------------------------------
void z80sio_channel::transmit_enable()
{
+ LOGTX("%s\n", FUNCNAME);
+
if (transmit_allowed())
{
if (is_tx_idle())
@@ -1113,7 +1119,7 @@ void z80sio_channel::transmit_enable()
//-------------------------------------------------
void z80sio_channel::transmit_complete()
{
- LOG("%s %s\n",FUNCNAME, tag());
+ if (!m_rts) LOGTX("%s %s\n",FUNCNAME, tag());
if ((m_wr4 & WR4_STOP_BITS_MASK) == WR4_STOP_BITS_SYNC)
sync_tx_sr_empty();
@@ -1131,7 +1137,7 @@ void z80sio_channel::sync_tx_sr_empty()
{
if (!transmit_allowed())
{
- LOGTX("%s() Channel %c Transmitter Disabled m_wr5:%02x\n", FUNCNAME, 'A' + m_index, m_wr5);
+ if (!m_rts) LOGTX("%s() Channel %c Transmitter Disabled m_wr5:%02x\n", FUNCNAME, 'A' + m_index, m_wr5);
m_tx_flags = 0;
}
else if (m_tx_forced_sync ||
@@ -1420,10 +1426,10 @@ int z80sio_channel::get_tx_word_length() const
* Break/Abort latch. */
uint8_t z80sio_channel::do_sioreg_rr0()
{
- LOGR("%s\n", FUNCNAME);
uint8_t tmp = m_rr0 & ~RR0_TX_BUFFER_EMPTY;
if (get_tx_empty())
tmp |= RR0_TX_BUFFER_EMPTY;
+ LOGR("%s: %02x\n", FUNCNAME, tmp);
return tmp;
}
@@ -1507,7 +1513,7 @@ void z80sio_channel::do_sioreg_wr0_resets(uint8_t data)
LOGCMD("Z80SIO Channel %c : CRC_RESET_NULL\n", 'A' + m_index);
break;
case WR0_CRC_RESET_RX: /* In Synchronous mode: all Os (zeros) (CCITT-O CRC-16) */
- LOGCMD("Z80SIO Channel %c : CRC_RESET_RX - not implemented\n", 'A' + m_index);
+ LOGCMD("Z80SIO Channel %c : CRC_RESET_RX\n", 'A' + m_index);
m_rx_crc = ((m_wr4 & WR4_SYNC_MODE_MASK) == WR4_SYNC_MODE_SDLC) ? ~uint16_t(0U) : uint16_t(0U);
m_rx_crc_en = false;
break;
@@ -1520,6 +1526,8 @@ void z80sio_channel::do_sioreg_wr0_resets(uint8_t data)
// Command is accepted in active part of packet only
if (m_tx_in_pkt)
m_rr0 &= ~RR0_TX_UNDERRUN;
+ else
+ LOGCMD(" - not accepted as not in active part of packet\n");
break;
default: /* Will not happen unless someone messes with the mask */
logerror("Z80SIO Channel %c : %s Wrong CRC reset/init command:%02x\n", 'A' + m_index, FUNCNAME, data & WR0_CRC_RESET_CODE_MASK);
@@ -1531,7 +1539,7 @@ void z80sio_channel::do_sioreg_wr0(uint8_t data)
m_wr0 = data;
if ((data & WR0_COMMAND_MASK) != WR0_NULL)
- LOGSETUP(" * %s %c Reg %02x <- %02x \n", owner()->tag(), 'A' + m_index, 0, data);
+ LOGSETUP("\n * %s %c Reg %02x <- %02x \n", owner()->tag(), 'A' + m_index, 0, data);
switch (data & WR0_COMMAND_MASK)
{
case WR0_NULL:
@@ -1601,31 +1609,15 @@ void z80sio_channel::do_sioreg_wr1(uint8_t data)
{
/* TODO: implement vector modifications when WR1 bit D2 is changed */
m_wr1 = data;
- LOG("Z80SIO \"%s\" Channel %c : External Interrupt Enable %u\n", owner()->tag(), 'A' + m_index, (data & WR1_EXT_INT_ENABLE) ? 1 : 0);
- LOG("Z80SIO \"%s\" Channel %c : Transmit Interrupt Enable %u\n", owner()->tag(), 'A' + m_index, (data & WR1_TX_INT_ENABLE) ? 1 : 0);
- LOG("Z80SIO \"%s\" Channel %c : Status Affects Vector %u\n", owner()->tag(), 'A' + m_index, (data & WR1_STATUS_VECTOR) ? 1 : 0);
- LOG("Z80SIO \"%s\" Channel %c : Wait/Ready Enable %u\n", owner()->tag(), 'A' + m_index, (data & WR1_WRDY_ENABLE) ? 1 : 0);
- LOG("Z80SIO \"%s\" Channel %c : Wait/Ready Function %s\n", owner()->tag(), 'A' + m_index, (data & WR1_WRDY_FUNCTION) ? "Ready" : "Wait");
- LOG("Z80SIO \"%s\" Channel %c : Wait/Ready on %s\n", owner()->tag(), 'A' + m_index, (data & WR1_WRDY_ON_RX_TX) ? "Receive" : "Transmit");
-
- switch (data & WR1_RX_INT_MODE_MASK)
- {
- case WR1_RX_INT_DISABLE:
- LOG("Z80SIO \"%s\" Channel %c : Receiver Interrupt Disabled\n", owner()->tag(), 'A' + m_index);
- break;
-
- case WR1_RX_INT_FIRST:
- LOG("Z80SIO \"%s\" Channel %c : Receiver Interrupt on First Character\n", owner()->tag(), 'A' + m_index);
- break;
-
- case WR1_RX_INT_ALL_PARITY:
- LOG("Z80SIO \"%s\" Channel %c : Receiver Interrupt on All Characters, Parity Affects Vector\n", owner()->tag(), 'A' + m_index);
- break;
-
- case WR1_RX_INT_ALL:
- LOG("Z80SIO \"%s\" Channel %c : Receiver Interrupt on All Characters\n", owner()->tag(), 'A' + m_index);
- break;
- }
+ LOGSETUP("Z80SIO \"%s\" Channel %c :\n", owner()->tag(), 'A' + m_index);
+ LOGSETUP(" - External Interrupt Enable %u\n", (data & WR1_EXT_INT_ENABLE) ? 1 : 0);
+ LOGSETUP(" - Transmit Interrupt Enable %u\n", (data & WR1_TX_INT_ENABLE) ? 1 : 0);
+ LOGSETUP(" - Status Affects Vector %u\n", (data & WR1_STATUS_VECTOR) ? 1 : 0);
+ LOGSETUP(" - Wait/Ready Enable %u\n", (data & WR1_WRDY_ENABLE) ? 1 : 0);
+ LOGSETUP(" - Wait/Ready Function %s\n", (data & WR1_WRDY_FUNCTION) ? "Ready" : "Wait");
+ LOGSETUP(" - Wait/Ready on %s\n", (data & WR1_WRDY_ON_RX_TX) ? "Rx" : "Tx");
+ LOGSETUP(" - Receiver Interrupt %s\n", std::array<char const *, 4>
+ {{"Disabled", "on First Character", "on All Characters, Parity Affects Vector", "on All Characters"}}[(m_wr2 >> 3) & 0x03]);
if (!(data & WR1_WRDY_ENABLE))
set_ready(false);
@@ -1638,7 +1630,19 @@ void z80sio_channel::do_sioreg_wr1(uint8_t data)
void z80sio_channel::do_sioreg_wr2(uint8_t data)
{
m_wr2 = data;
- LOG("Z80SIO \"%s\" Channel %c : Interrupt Vector %02x\n", owner()->tag(), 'A' + m_index, data);
+ LOGSETUP("Z80SIO \"%s\" Channel %c : ", owner()->tag(), 'A' + m_index);
+ if (m_index == 0)
+ {
+ LOGSETUP(" - INT/DMA priority and mode: %02x\n", m_wr2 & 0x07);
+ LOGSETUP(" - Interrupt mode: %s\n", std::array<char const *, 4> {{"85-1", "85-2", "85-3", "86"}}[(m_wr2 >> 3) & 0x03]);
+ LOGSETUP(" - Vector mode: %s\n", (m_wr2 & 0x20) ? "Vectored" : "Non-vectored");
+ LOGSETUP(" - Rx INT mask: %d\n", (m_wr2 >> 6) & 0x01 );
+ LOGSETUP(" - Pin 10: %s\n", (m_wr2 & 0x80) ? "SYNCB" : "RTSB");
+ }
+ else
+ {
+ LOGSETUP("Interrupt Vector %02x\n", m_wr2);
+ }
}
void z80sio_channel::do_sioreg_wr3(uint8_t data)
@@ -1647,12 +1651,13 @@ void z80sio_channel::do_sioreg_wr3(uint8_t data)
LOGSETUP("Z80SIO Channel %c : Sync Character Load Inhibit %u\n", 'A' + m_index, (data & WR3_SYNC_CHAR_LOAD_INHIBIT) ? 1 : 0);
LOGSETUP("Z80SIO Channel %c : Receive CRC Enable %u\n", 'A' + m_index, (data & WR3_RX_CRC_ENABLE) ? 1 : 0);
LOGSETUP("Z80SIO Channel %c : Auto Enables %u\n", 'A' + m_index, (data & WR3_AUTO_ENABLES) ? 1 : 0);
- LOGSETUP("Z80SIO Channel %c : Receiver Bits/Character %u\n", 'A' + m_index, get_rx_word_length());
- if (data & WR3_ENTER_HUNT_PHASE)
- LOGCMD("Z80SIO Channel %c : Enter Hunt Phase\n", 'A' + m_index);
+ LOGSETUP("Z80SIO Channel %c : Enter Hunt Phase %u\n", 'A' + m_index, (data & WR3_ENTER_HUNT_PHASE) ? 1 : 0);
+ //if (data & WR3_ENTER_HUNT_PHASE)
+ //LOGCMD("Z80SIO Channel %c : Enter Hunt Phase\n", 'A' + m_index);
bool const was_allowed(receive_allowed());
m_wr3 = data;
+ LOG("Z80SIO Channel %c : Receiver Bits/Character %u\n", 'A' + m_index, get_rx_word_length()); // depends on m_wr3 being updated
if (!was_allowed && receive_allowed())
{
@@ -1668,25 +1673,27 @@ void z80sio_channel::do_sioreg_wr3(uint8_t data)
void z80sio_channel::do_sioreg_wr4(uint8_t data)
{
m_wr4 = data;
- LOG("Z80SIO \"%s\" Channel %c : Parity Enable %u\n", owner()->tag(), 'A' + m_index, (data & WR4_PARITY_ENABLE) ? 1 : 0);
- LOG("Z80SIO \"%s\" Channel %c : Parity %s\n", owner()->tag(), 'A' + m_index, (data & WR4_PARITY_EVEN) ? "Even" : "Odd");
+ LOGSETUP("Z80SIO \"%s\" Channel %c : Parity Enable %u\n", owner()->tag(), 'A' + m_index, (data & WR4_PARITY_ENABLE) ? 1 : 0);
+ LOGSETUP("Z80SIO \"%s\" Channel %c : Parity %s\n", owner()->tag(), 'A' + m_index, (data & WR4_PARITY_EVEN) ? "Even" : "Odd");
if ((m_wr4 & WR4_STOP_BITS_MASK) == WR4_STOP_BITS_SYNC)
- LOG("Z80SIO \"%s\" Channel %c : Synchronous Mode\n", owner()->tag(), 'A' + m_index);
+ LOGSETUP("Z80SIO \"%s\" Channel %c : Synchronous Mode %s\n", owner()->tag(), 'A' + m_index,
+ std::array<char const *, 4> {{"Monosync", "Bisync", "HDLC/SDLC", "External"}}[(m_wr4 >> 4) & 0x03]);
else
- LOG("Z80SIO \"%s\" Channel %c : Stop Bits %g\n", owner()->tag(), 'A' + m_index, (((m_wr4 & WR4_STOP_BITS_MASK) >> 2) + 1) / 2.);
- LOG("Z80SIO \"%s\" Channel %c : Clock Mode %uX\n", owner()->tag(), 'A' + m_index, get_clock_mode());
+ LOGSETUP("Z80SIO \"%s\" Channel %c : Stop Bits %g\n", owner()->tag(), 'A' + m_index, (((m_wr4 & WR4_STOP_BITS_MASK) >> 2) + 1) / 2.);
+ LOGSETUP("Z80SIO \"%s\" Channel %c : Clock Mode %uX\n", owner()->tag(), 'A' + m_index, get_clock_mode());
}
void z80sio_channel::do_sioreg_wr5(uint8_t data)
{
m_wr5 = data;
- LOG("Z80SIO Channel %c : Transmitter Enable %u\n", 'A' + m_index, (data & WR5_TX_ENABLE) ? 1 : 0);
- LOG("Z80SIO Channel %c : Transmitter Bits/Character %u\n", 'A' + m_index, get_tx_word_length());
- LOG("Z80SIO Channel %c : Transmit CRC Enable %u\n", 'A' + m_index, (data & WR5_TX_CRC_ENABLE) ? 1 : 0);
- LOG("Z80SIO Channel %c : %s Frame Check Polynomial\n", 'A' + m_index, (data & WR5_CRC16) ? "CRC-16" : "SDLC");
- LOG("Z80SIO Channel %c : Send Break %u\n", 'A' + m_index, (data & WR5_SEND_BREAK) ? 1 : 0);
- LOG("Z80SIO Channel %c : Request to Send %u\n", 'A' + m_index, (data & WR5_RTS) ? 1 : 0);
- LOG("Z80SIO Channel %c : Data Terminal Ready %u\n", 'A' + m_index, (data & WR5_DTR) ? 1 : 0);
+ LOGSETUP("Z80SIO Channel %c\n", 'A' + m_index);
+ LOGSETUP(" - Transmitter Enable %u\n", (data & WR5_TX_ENABLE) ? 1 : 0);
+ LOGSETUP(" - Transmitter Bits/Character %u\n", get_tx_word_length());
+ LOGSETUP(" - Transmit CRC Enable %u\n", (data & WR5_TX_CRC_ENABLE) ? 1 : 0);
+ LOGSETUP(" - %s Frame Check Polynomial\n", (data & WR5_CRC16) ? "CRC-16" : "SDLC");
+ LOGSETUP(" - Send Break %u\n", (data & WR5_SEND_BREAK) ? 1 : 0);
+ LOGSETUP(" - Request to Send %u\n", (data & WR5_RTS) ? 1 : 0);
+ LOGSETUP(" - Data Terminal Ready %u\n", (data & WR5_DTR) ? 1 : 0);
if (~data & WR5_TX_ENABLE)
m_uart->clear_interrupt(m_index, INT_TRANSMIT);
@@ -1694,13 +1701,13 @@ void z80sio_channel::do_sioreg_wr5(uint8_t data)
void z80sio_channel::do_sioreg_wr6(uint8_t data)
{
- LOG("Z80SIO \"%s\" Channel %c : Transmit Sync/Sync 1/SDLC Address %02x\n", owner()->tag(), 'A' + m_index, data);
+ LOGSETUP("Z80SIO \"%s\" Channel %c : Transmit Sync/Sync 1/SDLC Address %02x\n", owner()->tag(), 'A' + m_index, data);
m_wr6 = data;
}
void z80sio_channel::do_sioreg_wr7(uint8_t data)
{
- LOG("Z80SIO \"%s\" Channel %c : Receive Sync/Sync 2/SDLC Flag %02x\n", owner()->tag(), 'A' + m_index, data);
+ LOGSETUP("Z80SIO \"%s\" Channel %c : Receive Sync/Sync 2/SDLC Flag %02x\n", owner()->tag(), 'A' + m_index, data);
m_wr7 = data;
}
@@ -1714,7 +1721,7 @@ void z80sio_channel::control_write(uint8_t data)
if (reg != 0)
{
LOGSETUP(" * %s %c Reg %02x <- %02x - %s\n", tag(), 'A' + m_index, reg, data, std::array<char const *, 8>
- {{"WR0", "WR1", "WR2", "WR3 - Async Rx setup", "WR4 - Async Clock, Parity and stop bits", "WR5 - Async Tx setup", "WR6", "WR7"}}[reg]);
+ {{"WR0", "WR1", "WR2", "WR3", "WR4", "WR5", "WR6", "WR7"}}[reg]);
// mask out register index
m_wr0 &= ~WR0_REGISTER_MASK;
}
@@ -1771,10 +1778,14 @@ void z80sio_channel::data_write(uint8_t data)
m_tx_data = data;
set_tx_empty(get_tx_empty() , false);
if ((m_wr4 & WR4_STOP_BITS_MASK) == WR4_STOP_BITS_SYNC)
+ {
+ LOGTX("Z80SIO: WR4_STOP_BITS_SYNC detected\n");
m_tx_in_pkt = true;
+ }
else
{
// ALL_SENT is only meaningful in async mode, in sync mode it's always 1
+ LOGTX("Z80SIO: WR4_STOP_BITS_SYNC *not* detected\n");
m_rr1 &= ~RR1_ALL_SENT;
m_all_sent_delay = 0;
}
@@ -2208,7 +2219,7 @@ WRITE_LINE_MEMBER( z80sio_channel::dcd_w )
{
if (bool(m_dcd) != bool(state))
{
- LOG("Z80SIO Channel %c : DCD %u\n", 'A' + m_index, state);
+ LOGDCD("Z80SIO Channel %c : DCD %u\n", 'A' + m_index, state);
bool const was_allowed(receive_allowed());
m_dcd = state;
@@ -2228,7 +2239,7 @@ WRITE_LINE_MEMBER( z80sio_channel::sync_w )
{
if (bool(m_sync) != bool(state))
{
- LOG("Z80SIO Channel %c : Sync %u\n", 'A' + m_index, state);
+ LOGSYNC("Z80SIO Channel %c : Sync %u\n", 'A' + m_index, state);
m_sync = state;
@@ -2389,9 +2400,9 @@ WRITE_LINE_MEMBER( z80sio_channel::txc_w )
m_tx_count = get_clock_mode() / 2;
// Send out a delayed half bit
bool new_txd = BIT(m_tx_delay , 3);
+ LOGBIT("%.6f TX %d DLY %x\n" , machine().time().as_double() , new_txd , m_tx_delay & 0xf);
if (new_txd != m_txd && !(m_wr5 & WR5_SEND_BREAK))
{
- LOGBIT("%.6f TX %d DLY %x\n" , machine().time().as_double() , new_txd , m_tx_delay & 0xf);
out_txd_cb(new_txd);
}
m_txd = new_txd;
diff --git a/src/emu/screen.cpp b/src/emu/screen.cpp
index 647bce77425..64af5b6f217 100644
--- a/src/emu/screen.cpp
+++ b/src/emu/screen.cpp
@@ -1041,11 +1041,6 @@ void screen_device::update_scan_bitmap_size(int y)
// determine effective size to allocate
s32 effwidth = std::max(m_max_width, m_visarea.right() + 1);
- if (machine().input().code_pressed(KEYCODE_Q))
- {
- printf("Updating scan bitmap %d to %d (%d vs. %d)\n", y, effwidth, m_max_width, m_visarea.right() + 1);
- }
-
if (m_scan_widths[y] == effwidth)
return;
diff --git a/src/mame/drivers/eispc.cpp b/src/mame/drivers/eispc.cpp
index 4a9636bfea4..a26462103d4 100644
--- a/src/mame/drivers/eispc.cpp
+++ b/src/mame/drivers/eispc.cpp
@@ -59,6 +59,7 @@
//#include "bus/isa/isa_cards.h"
#include "bus/isa/ega.h"
#include "bus/isa/mda.h"
+#include "bus/isa/eis_twib.h"
#include "machine/pc_lpt.h"
#include "machine/ram.h"
@@ -720,6 +721,7 @@ static void epc_isa8_cards(device_slot_interface &device)
{
device.option_add("epc_mda", ISA8_EPC_MDA);
device.option_add("ega", ISA8_EGA);
+ device.option_add("epc_twib", ISA8_EIS_TWIB);
// device.option_add("epc_hdc1065", ISA8_EPC_HDC1065);
// device.option_add("epc_mb1080", ISA8_EPC_MB1080);
}
diff --git a/src/mame/drivers/inteladv.cpp b/src/mame/drivers/inteladv.cpp
index cd18f857685..99f3dc6bb8c 100644
--- a/src/mame/drivers/inteladv.cpp
+++ b/src/mame/drivers/inteladv.cpp
@@ -108,5 +108,12 @@ ROM_START( inteladv )
ROM_LOAD( "vtechinteladv.bin", 0x000000, 0x800000, CRC(e24dbbcb) SHA1(7cb7f25f5eb123ae4c46cd4529aafd95508b2210) )
ROM_END
+ROM_START( cars2lap )
+ ROM_REGION( 0x200000, "maincpu", 0 )
+ // Flash dump contains some 65C02 code starting at $000D6A, but mostly appears to be custom bytecode or non-executable data banked in 32K blocks
+ ROM_LOAD("n25s16.u6", 0x00000, 0x200000, CRC(ec1ba96e) SHA1(51b8844ae77adf20f74f268d380d268c9ce19785))
+ROM_END
+
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
COMP( 1995, inteladv, 0, 0, inteladv, inteladv, inteladv_state, empty_init, "VTech", "Intelligence Advance E/R Lerncomputer", MACHINE_NOT_WORKING )
+COMP( 2012, cars2lap, 0, 0, inteladv, inteladv, inteladv_state, empty_init, "VTech", "CARS 2 Laptop (Germany)", MACHINE_IS_SKELETON ) // might not belong here
diff --git a/src/mame/drivers/mephistp.cpp b/src/mame/drivers/mephistp.cpp
index 54a408e480c..dc34d61c9e2 100644
--- a/src/mame/drivers/mephistp.cpp
+++ b/src/mame/drivers/mephistp.cpp
@@ -37,17 +37,18 @@ public:
void sport2k(machine_config &config);
private:
- DECLARE_WRITE8_MEMBER(shift_load_w);
- DECLARE_READ8_MEMBER(ay8910_read);
- DECLARE_WRITE8_MEMBER(ay8910_write);
- DECLARE_WRITE8_MEMBER(t0_t1_w);
- DECLARE_WRITE8_MEMBER(ay8910_columns_w);
- DECLARE_READ8_MEMBER(ay8910_inputs_r);
- DECLARE_WRITE8_MEMBER(sound_rombank_w);
+ void shift_load_w(u8 data);
+ u8 ay8910_read();
+ void ay8910_write(u8 data);
+ void t0_t1_w(u8 data);
+ void ay8910_columns_w(u8 data);
+ u8 ay8910_inputs_r();
+ void sound_rombank_w(u8 data);
void mephisto_8051_io(address_map &map);
void mephisto_8051_map(address_map &map);
void mephisto_map(address_map &map);
+ void sport2k_map(address_map &map);
void sport2k_8051_io(address_map &map);
u8 m_ay8910_data;
@@ -62,22 +63,22 @@ private:
};
-WRITE8_MEMBER(mephisto_pinball_state::shift_load_w)
+void mephisto_pinball_state::shift_load_w(u8 data)
{
}
-READ8_MEMBER(mephisto_pinball_state::ay8910_read)
+u8 mephisto_pinball_state::ay8910_read()
{
return m_ay8910_data;
}
-WRITE8_MEMBER(mephisto_pinball_state::ay8910_write)
+void mephisto_pinball_state::ay8910_write(u8 data)
{
m_ay8910_data = data;
ay8910_update();
}
-WRITE8_MEMBER(mephisto_pinball_state::t0_t1_w)
+void mephisto_pinball_state::t0_t1_w(u8 data)
{
m_ay8910_bdir = BIT(data, 4); // T0
m_ay8910_bc1 = BIT(data, 5); // T1
@@ -92,23 +93,23 @@ void mephisto_pinball_state::ay8910_update()
m_ay8910_data = m_aysnd->data_r();
}
-WRITE8_MEMBER(mephisto_pinball_state::ay8910_columns_w)
+void mephisto_pinball_state::ay8910_columns_w(u8 data)
{
}
-READ8_MEMBER(mephisto_pinball_state::ay8910_inputs_r)
+u8 mephisto_pinball_state::ay8910_inputs_r()
{
return 0xff;
}
-WRITE8_MEMBER(mephisto_pinball_state::sound_rombank_w)
+void mephisto_pinball_state::sound_rombank_w(u8 data)
{
m_soundbank->set_entry(data & 0xf);
}
void mephisto_pinball_state::mephisto_map(address_map &map)
{
- map(0x00000, 0x0ffff).rom().region("maincpu", 0);
+ map(0x00000, 0x07fff).rom().region("maincpu", 0).mirror(0x8000);
map(0x10000, 0x107ff).ram().share("nvram");
map(0x12000, 0x1201f).noprw(); //.rw("muart", FUNC(i8256_device::read), FUNC(i8256_device::write));
map(0x13000, 0x130ff).rw("ic20", FUNC(i8155_device::memory_r), FUNC(i8155_device::memory_w));
@@ -117,6 +118,20 @@ void mephisto_pinball_state::mephisto_map(address_map &map)
map(0x14800, 0x14807).rw("ic9", FUNC(i8155_device::io_r), FUNC(i8155_device::io_w));
map(0x16000, 0x16000).w(FUNC(mephisto_pinball_state::shift_load_w));
map(0x17000, 0x17001).nopw(); //???
+ map(0xf0000, 0xf7fff).rom().region("maincpu", 0).mirror(0x8000);
+}
+
+void mephisto_pinball_state::sport2k_map(address_map &map)
+{
+ map(0x00000, 0x0ffff).rom().region("maincpu", 0);
+ map(0x20000, 0x21fff).ram().share("nvram");
+ map(0x2a000, 0x2a01f).noprw(); //.rw("muart", FUNC(i8256_device::read), FUNC(i8256_device::write));
+ map(0x2b000, 0x2b0ff).rw("ic20", FUNC(i8155_device::memory_r), FUNC(i8155_device::memory_w));
+ map(0x2b800, 0x2b807).rw("ic20", FUNC(i8155_device::io_r), FUNC(i8155_device::io_w));
+ map(0x2c000, 0x2c0ff).rw("ic9", FUNC(i8155_device::memory_r), FUNC(i8155_device::memory_w));
+ map(0x2c800, 0x2c807).rw("ic9", FUNC(i8155_device::io_r), FUNC(i8155_device::io_w));
+ map(0x2e000, 0x2e000).w(FUNC(mephisto_pinball_state::shift_load_w));
+ map(0x2f000, 0x2f001).nopw(); //???
map(0xf0000, 0xfffff).rom().region("maincpu", 0);
}
@@ -206,6 +221,7 @@ void mephisto_pinball_state::mephisto(machine_config &config)
void mephisto_pinball_state::sport2k(machine_config &config)
{
mephisto(config);
+ m_maincpu->set_addrmap(AS_PROGRAM, &mephisto_pinball_state::sport2k_map);
subdevice<i8051_device>("soundcpu")->set_addrmap(AS_IO, &mephisto_pinball_state::sport2k_8051_io);
YM3812(config, "ymsnd", XTAL(14'318'181)/4).add_route(ALL_OUTPUTS, "mono", 0.5);
@@ -215,9 +231,8 @@ void mephisto_pinball_state::sport2k(machine_config &config)
/ Mephisto
/-------------------------------------------------------------------*/
ROM_START(mephistp)
- ROM_REGION(0x10000, "maincpu", 0)
+ ROM_REGION(0x8000, "maincpu", 0)
ROM_LOAD("cpu_ver1.2", 0x00000, 0x8000, CRC(845c8eb4) SHA1(2a705629990950d4e2d3a66a95e9516cf112cc88))
- ROM_RELOAD(0x08000, 0x8000)
ROM_REGION(0x08000, "soundcpu", 0)
ROM_LOAD("ic15_02", 0x00000, 0x8000, CRC(2accd446) SHA1(7297e4825c33e7cf23f86fe39a0242e74874b1e2))
@@ -234,9 +249,8 @@ ROM_START(mephistp)
ROM_END
ROM_START(mephistp1)
- ROM_REGION(0x10000, "maincpu", 0)
+ ROM_REGION(0x8000, "maincpu", 0)
ROM_LOAD("cpu_ver1.1", 0x00000, 0x8000, CRC(ce584902) SHA1(dd05d008bbd9b6588cb204e8d901537ffe7ddd43))
- ROM_RELOAD(0x08000, 0x8000)
ROM_REGION(0x08000, "soundcpu", 0)
ROM_LOAD("ic15_02", 0x00000, 0x8000, CRC(2accd446) SHA1(7297e4825c33e7cf23f86fe39a0242e74874b1e2))
diff --git a/src/mame/drivers/prestige.cpp b/src/mame/drivers/prestige.cpp
index 122666b83ac..ac766836dae 100644
--- a/src/mame/drivers/prestige.cpp
+++ b/src/mame/drivers/prestige.cpp
@@ -896,11 +896,6 @@ ROM_START( gkidabc )
ROM_LOAD("27-5730-00.bin", 0x00000, 0x20000, CRC(64664708) SHA1(74212c2dec1caa41dbc933b50f857904a8ac623b))
ROM_END
-ROM_START( cars2lap )
- ROM_REGION( 0x200000, "maincpu", 0 )
- ROM_LOAD("n25s16.u6", 0x00000, 0x200000, CRC(ec1ba96e) SHA1(51b8844ae77adf20f74f268d380d268c9ce19785))
-ROM_END
-
/* Driver */
@@ -921,4 +916,3 @@ COMP( 19??, gmmc, 0, 0, prestige, prestige, prestige_state, empty
// these systems need to be moved into a separate driver
COMP( 1996, gkidabc, 0, 0, prestige, prestige, prestige_state, empty_init, "VTech", "Genius KID ABC Fan (Germany)", MACHINE_IS_SKELETON )
-COMP( 2012, cars2lap, 0, 0, prestige, prestige, prestige_state, empty_init, "VTech", "CARS 2 Laptop (Germany)", MACHINE_IS_SKELETON )
diff --git a/src/mame/drivers/vii.cpp b/src/mame/drivers/vii.cpp
index 216289a4138..1f3f7ab8ea8 100644
--- a/src/mame/drivers/vii.cpp
+++ b/src/mame/drivers/vii.cpp
@@ -109,6 +109,8 @@
lexizeus:
Some corrupt sound effects and a few corrupt ground tiles a few minutes in. (checksum is good, and a video recorded
from one of these doesn't exhibit these problems, so either emulation issue or alt revision?)
+ pvmil:
+ Question order depends on SoC RNG, only reads when it wants a new value, so unless RNG runs on a timer question order ends up the same
vii:
When loading a cart from file manager, sometimes MAME will crash.
@@ -162,6 +164,8 @@
#include "softlist.h"
#include "speaker.h"
+#include "pvmil.lh"
+
class spg2xx_game_state : public driver_device
{
public:
@@ -188,7 +192,6 @@ public:
void rad_crik(machine_config &config);
void non_spg_base(machine_config &config);
void lexizeus(machine_config &config);
- void pvmil(machine_config &config);
void taikeegr(machine_config &config);
void init_crc();
@@ -217,10 +220,6 @@ protected:
DECLARE_WRITE16_MEMBER(jakks_porta_w);
DECLARE_WRITE16_MEMBER(jakks_portb_w);
- DECLARE_WRITE16_MEMBER(pvmil_porta_w);
- DECLARE_WRITE16_MEMBER(pvmil_portb_w);
- DECLARE_WRITE16_MEMBER(pvmil_portc_w);
-
required_device<spg2xx_device> m_maincpu;
required_device<screen_device> m_screen;
optional_memory_bank m_bank;
@@ -247,6 +246,39 @@ protected:
optional_device<nvram_device> m_nvram;
};
+class pvmil_state : public spg2xx_game_state
+{
+public:
+ pvmil_state(const machine_config &mconfig, device_type type, const char *tag)
+ : spg2xx_game_state(mconfig, type, tag)
+ , m_portcdata(0x0000)
+ , m_latchcount(0)
+ , m_latchbit(0)
+ , m_outdat(0)
+ , m_p4inputs(*this, "EXTRA")
+ , m_leds(*this, "led%u", 0U)
+ { }
+
+ void pvmil(machine_config &config);
+
+ DECLARE_READ_LINE_MEMBER(pvmil_p4buttons_r);
+
+protected:
+ virtual void machine_start() override;
+
+ DECLARE_WRITE16_MEMBER(pvmil_porta_w);
+ DECLARE_WRITE16_MEMBER(pvmil_portb_w);
+ DECLARE_WRITE16_MEMBER(pvmil_portc_w);
+
+private:
+ uint16_t m_portcdata;
+ int m_latchcount;
+ int m_latchbit;
+ uint16_t m_outdat;
+ required_ioport m_p4inputs;
+ output_finder<4> m_leds;
+};
+
class jakks_gkr_state : public spg2xx_game_state
{
public:
@@ -610,23 +642,126 @@ READ16_MEMBER(spg2xx_game_state::rad_portc_r)
return data;
}
-WRITE16_MEMBER(spg2xx_game_state::pvmil_porta_w)
+void pvmil_state::machine_start()
+{
+ spg2xx_game_state::machine_start();
+
+ m_leds.resolve();
+ save_item(NAME(m_portcdata));
+ save_item(NAME(m_latchcount));
+ save_item(NAME(m_latchbit));
+ save_item(NAME(m_outdat));
+}
+
+
+WRITE16_MEMBER(pvmil_state::pvmil_porta_w)
{
logerror("%s: pvmil_porta_w %04x\n", machine().describe_context(), data);
}
-WRITE16_MEMBER(spg2xx_game_state::pvmil_portb_w)
+WRITE16_MEMBER(pvmil_state::pvmil_portb_w)
{
logerror("%s: pvmil_portb_w %04x\n", machine().describe_context(), data);
}
-WRITE16_MEMBER(spg2xx_game_state::pvmil_portc_w)
+
+READ_LINE_MEMBER(pvmil_state::pvmil_p4buttons_r)
{
- // related to P4 inputs?
- logerror("%s: pvmil_portc_w %04x\n", machine().describe_context(), data);
+ return m_latchbit;
}
+WRITE16_MEMBER(pvmil_state::pvmil_portc_w)
+{
+ // ---- -432 1--- r-?c
+ // 4,3,2,1 = player controller LEDs
+ // r = reset input multiplexer
+ // ? = unknown
+ // m = input multiplexer clock
+
+ // p4 input reading
+ // the code to read them is interesting tho, it even includes loops that poll port a 16 times before/after, why?
+ logerror("%s: pvmil_portc_w %04x\n", machine().describe_context(), data);
+
+ uint16_t bit;
+
+ // for logging bits changed on the port
+ if (0)
+ {
+ for (int i = 0; i < 16; i++)
+ {
+ bit = 1 << i;
+ if ((m_portcdata & bit) != (data & bit))
+ {
+ if (data & bit)
+ {
+ logerror("port c %04x low to high\n", bit);
+ }
+ else
+ {
+ logerror("port c %04x high to low\n", bit);
+ }
+ }
+
+ if ((m_portcdata & 0x0400) != (data & 0x0400))
+ {
+ logerror("-------------------------------------------------\n");
+ }
+ }
+ }
+
+ // happens on startup, before it starts reading inputs for the first time, assume 'reset counter'
+ bit = 0x0008;
+ if ((m_portcdata & bit) != (data & bit))
+ {
+ if (data & bit)
+ {
+ logerror("reset read counter\n");
+ m_latchcount = 0;
+ }
+ }
+
+ bit = 0x0001;
+ if ((m_portcdata & bit) != (data & bit))
+ {
+ if (!(data & bit))
+ {
+ //logerror("latch with count of %d (outbit is %d)\n", m_latchcount, (m_portcdata & 0x0002)>>1 );
+ // what is bit 0x0002? it gets flipped in the same code as the inputs are read.
+ // it doesn't follow any obvious pattern
+ m_outdat &= ~(1 << m_latchcount);
+ m_outdat |= ((data & 0x0002) >> 1) << m_latchcount;
+ if (0)
+ popmessage("%d %d %d %d %d %d %d %d %d %d %d %d %d %d %d %d",
+ (m_outdat & 0x8000) ? 1 : 0, (m_outdat & 0x4000) ? 1 : 0, (m_outdat & 0x2000) ? 1 : 0, (m_outdat & 0x1000) ? 1 : 0,
+ (m_outdat & 0x0800) ? 1 : 0, (m_outdat & 0x0400) ? 1 : 0, (m_outdat & 0x0200) ? 1 : 0, (m_outdat & 0x0100) ? 1 : 0,
+ (m_outdat & 0x0080) ? 1 : 0, (m_outdat & 0x0040) ? 1 : 0, (m_outdat & 0x0020) ? 1 : 0, (m_outdat & 0x0010) ? 1 : 0,
+ (m_outdat & 0x0008) ? 1 : 0, (m_outdat & 0x0004) ? 1 : 0, (m_outdat & 0x0002) ? 1 : 0, (m_outdat & 0x0001) ? 1 : 0);
+
+
+ m_latchbit = (((m_p4inputs->read()) << m_latchcount) & 0x8000) ? 1 : 0;
+
+ m_latchcount++;
+ if (m_latchcount == 16)
+ m_latchcount = 0;
+ }
+ }
+
+ m_portcdata = data;
+
+ if (0)
+ popmessage("%d %d %d %d %d %d %d %d %d %d %d %d %d %d %d %d",
+ (m_portcdata & 0x8000) ? 1 : 0, (m_portcdata & 0x4000) ? 1 : 0, (m_portcdata & 0x2000) ? 1 : 0, (m_portcdata & 0x1000) ? 1 : 0,
+ (m_portcdata & 0x0800) ? 1 : 0, (m_portcdata & 0x0400) ? 1 : 0, (m_portcdata & 0x0200) ? 1 : 0, (m_portcdata & 0x0100) ? 1 : 0,
+ (m_portcdata & 0x0080) ? 1 : 0, (m_portcdata & 0x0040) ? 1 : 0, (m_portcdata & 0x0020) ? 1 : 0, (m_portcdata & 0x0010) ? 1 : 0,
+ (m_portcdata & 0x0008) ? 1 : 0, (m_portcdata & 0x0004) ? 1 : 0, (m_portcdata & 0x0002) ? 1 : 0, (m_portcdata & 0x0001) ? 1 : 0);
+
+ m_leds[0] = (m_portcdata & 0x0080) ? 0 : 1;
+ m_leds[1] = (m_portcdata & 0x0100) ? 0 : 1;
+ m_leds[2] = (m_portcdata & 0x0200) ? 0 : 1;
+ m_leds[3] = (m_portcdata & 0x0400) ? 0 : 1;
+}
+
void spg2xx_game_state::mem_map_4m(address_map &map)
{
@@ -1708,108 +1843,29 @@ static INPUT_PORTS_START( pvmil ) // hold "console start" + "console select" on
PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(3) PORT_NAME("Player 3 D")
PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_PLAYER(1) PORT_NAME("Player 1 Lifeline")
PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_START ) PORT_CODE(KEYCODE_1) PORT_NAME("Console Start")
- PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_START ) PORT_CODE(KEYCODE_5) PORT_NAME("Console Select")
+ PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_UNUSED )
+ PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_SELECT ) PORT_CODE(KEYCODE_5) PORT_NAME("Console Select")
PORT_START("P2")
- PORT_DIPNAME( 0x0001, 0x0001, "P2" )
- PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("P3") // Player 4 buttons are read with some kind of serial / multiplexing protocol?
- PORT_DIPNAME( 0x0001, 0x0001, "P3" )
- PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) // this triggers all P4 buttons, must be some multiplexing (or a core bug)
- PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_START("P3")
+ PORT_BIT( 0x0003, IP_ACTIVE_HIGH, IPT_UNUSED )
+ PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(pvmil_state, pvmil_p4buttons_r) // Player 4 buttons read through here
+ PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_PLAYER(2) PORT_NAME("Player 2 Lifeline")
PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_PLAYER(3) PORT_NAME("Player 3 Lifeline")
PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_PLAYER(4) PORT_NAME("Player 4 Lifeline")
- PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_BIT( 0xff80, IP_ACTIVE_HIGH, IPT_UNUSED )
+
+ PORT_START("EXTRA")
+ PORT_BIT( 0x0fff, IP_ACTIVE_HIGH, IPT_UNUSED )
+ PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(4) PORT_NAME("Player 4 A")
+ PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(4) PORT_NAME("Player 4 B")
+ PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(4) PORT_NAME("Player 4 C")
+ PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(4) PORT_NAME("Player 4 D")
INPUT_PORTS_END
-
-
static INPUT_PORTS_START( taikeegr )
PORT_START("P1")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_NAME("Strum Bar Down")
@@ -2526,10 +2582,10 @@ void spg2xx_game_state::rad_crik(machine_config &config)
NVRAM(config, m_nvram, nvram_device::DEFAULT_ALL_1);
}
-void spg2xx_game_state::pvmil(machine_config &config)
+void pvmil_state::pvmil(machine_config &config)
{
SPG24X(config, m_maincpu, XTAL(27'000'000), m_screen);
- m_maincpu->set_addrmap(AS_PROGRAM, &spg2xx_game_state::mem_map_4m);
+ m_maincpu->set_addrmap(AS_PROGRAM, &pvmil_state::mem_map_4m);
m_maincpu->set_pal(true);
spg2xx_base(config);
@@ -2540,11 +2596,13 @@ void spg2xx_game_state::pvmil(machine_config &config)
m_maincpu->porta_in().set_ioport("P1");
m_maincpu->portb_in().set_ioport("P2");
m_maincpu->portc_in().set_ioport("P3");
- m_maincpu->porta_out().set(FUNC(spg2xx_game_state::pvmil_porta_w));
- m_maincpu->portb_out().set(FUNC(spg2xx_game_state::pvmil_portb_w));
- m_maincpu->portc_out().set(FUNC(spg2xx_game_state::pvmil_portc_w));
+ m_maincpu->porta_out().set(FUNC(pvmil_state::pvmil_porta_w));
+ m_maincpu->portb_out().set(FUNC(pvmil_state::pvmil_portb_w));
+ m_maincpu->portc_out().set(FUNC(pvmil_state::pvmil_portc_w));
- NVRAM(config, m_nvram, nvram_device::DEFAULT_ALL_1);
+// NVRAM(config, m_nvram, nvram_device::DEFAULT_ALL_1);
+
+ config.set_default_layout(layout_pvmil);
}
void spg2xx_game_state::taikeegr(machine_config &config)
@@ -2935,7 +2993,7 @@ CONS( 2009, zone40, 0, 0, non_spg_base, wirels60, spg2xx_game_st
CONS( 200?, lexizeus, 0, 0, lexizeus, lexizeus, spg2xx_game_state, init_zeus, "Lexibook", "Zeus IG900 20-in-1 (US?)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING )
// there are other regions of this, including a Finnish version "Haluatko miljonääriksi?" (see https://millionaire.fandom.com/wiki/Haluatko_miljon%C3%A4%C3%A4riksi%3F_(Play_Vision_game) )
-CONS( 2006, pvmil, 0, 0, pvmil, pvmil, spg2xx_game_state, empty_init, "Play Vision", "Who Wants to Be a Millionaire (Play Vision, Plug and Play, UK)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // p4 inputs need mapping
+CONS( 2006, pvmil, 0, 0, pvmil, pvmil, pvmil_state, empty_init, "Play Vision", "Who Wants to Be a Millionaire? (Play Vision, Plug and Play, UK)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS )
// there are multiple versions of this with different songs, was also sold by dreamGEAR as 'Shredmaster Jr.' (different title screen)
// for the UK version the title screen always shows "Guitar Rock", however there are multiple boxes with different titles and song selections.
diff --git a/src/mame/layout/pvmil.lay b/src/mame/layout/pvmil.lay
new file mode 100644
index 00000000000..fca2cf88503
--- /dev/null
+++ b/src/mame/layout/pvmil.lay
@@ -0,0 +1,72 @@
+<?xml version="1.0"?>
+<mamelayout version="2">
+ <element name="red_led_p1" defstate="0">
+ <disk state="1">
+ <color red="1.0" green="0.0" blue="0.0" />
+ </disk>
+ <disk state="0">
+ <color red="0.2" green="0.0" blue="0.0" />
+ </disk>
+ <text string="P1">
+ <color red="0.0" green="0.0" blue="0.0" />
+ <bounds x="0" y="0.0" width="1" height="1" />
+ </text>
+ </element>
+
+ <element name="red_led_p2" defstate="0">
+ <disk state="1">
+ <color red="1.0" green="0.0" blue="0.0" />
+ </disk>
+ <disk state="0">
+ <color red="0.2" green="0.0" blue="0.0" />
+ </disk>
+ <text string="P2">
+ <color red="0.0" green="0.0" blue="0.0" />
+ <bounds x="0" y="0.0" width="1" height="1" />
+ </text>
+ </element>
+
+ <element name="red_led_p3" defstate="0">
+ <disk state="1">
+ <color red="1.0" green="0.0" blue="0.0" />
+ </disk>
+ <disk state="0">
+ <color red="0.2" green="0.0" blue="0.0" />
+ </disk>
+ <text string="P3">
+ <color red="0.0" green="0.0" blue="0.0" />
+ <bounds x="0" y="0.0" width="1" height="1" />
+ </text>
+ </element>
+
+ <element name="red_led_p4" defstate="0">
+ <disk state="1">
+ <color red="1.0" green="0.0" blue="0.0" />
+ </disk>
+ <disk state="0">
+ <color red="0.2" green="0.0" blue="0.0" />
+ </disk>
+ <text string="P4">
+ <color red="0.0" green="0.0" blue="0.0" />
+ <bounds x="0" y="0.0" width="1" height="1" />
+ </text>
+ </element>
+
+ <view name="Player LEDs">
+ <screen index="0">
+ <bounds left="0" top="0" right="4" bottom="3" />
+ </screen>
+ <bezel name="led0" element="red_led_p1">
+ <bounds x="0.45" y="3.00" width="0.10" height="0.10" />
+ </bezel>
+ <bezel name="led1" element="red_led_p2">
+ <bounds x="1.45" y="3.00" width="0.10" height="0.10" />
+ </bezel>
+ <bezel name="led2" element="red_led_p3">
+ <bounds x="2.45" y="3.00" width="0.10" height="0.10" />
+ </bezel>
+ <bezel name="led3" element="red_led_p4">
+ <bounds x="3.45" y="3.00" width="0.10" height="0.10" />
+ </bezel>
+ </view>
+</mamelayout>
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index 753a74041d2..ec5227d906d 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -16185,6 +16185,7 @@ instantm //
instruct //
@source:inteladv.cpp
+cars2lap // CARS 2 Laptop (Germany)
inteladv
@source:intellec4.cpp
@@ -33343,7 +33344,6 @@ prehisleu // A8003 'GT' (c) 1989
prehisleb // bootleg
@source:prestige.cpp
-cars2lap // CARS 2 Laptop (Germany)
gkidabc // Genius KID ABC Fan (Germany)
gl6000sl // Genius Leader 6000SL (Germany)
gl7007sl // Genius Leader 7007SL (Germany)
diff --git a/src/osd/modules/render/bgfx/chain.cpp b/src/osd/modules/render/bgfx/chain.cpp
index 906e715e177..940bf85d81d 100644
--- a/src/osd/modules/render/bgfx/chain.cpp
+++ b/src/osd/modules/render/bgfx/chain.cpp
@@ -168,5 +168,6 @@ void bgfx_chain::prepend_converter(bgfx_effect *effect, chain_manager &chains)
const uint32_t screen_width = chains.targets().width(TARGET_STYLE_GUEST, m_screen_index);
const uint32_t screen_height = chains.targets().height(TARGET_STYLE_GUEST, m_screen_index);
+ m_targets.destroy_target("screen", m_screen_index);
m_targets.create_target("screen", bgfx::TextureFormat::RGBA8, screen_width, screen_height, TARGET_STYLE_GUEST, true, false, 1, m_screen_index);
}