diff options
Diffstat (limited to 'src/emu')
| -rw-r--r-- | src/emu/cheat.c | 12 | ||||
| -rw-r--r-- | src/emu/cpu/pic16c5x/pic16c5x.c | 2 | ||||
| -rw-r--r-- | src/emu/cpu/z8/z8.c | 98 | ||||
| -rw-r--r-- | src/emu/cpu/z8/z8.h | 2 | ||||
| -rw-r--r-- | src/emu/cpu/z8/z8dasm.c | 50 | ||||
| -rw-r--r-- | src/emu/cpu/z8/z8ops.c | 36 | ||||
| -rw-r--r-- | src/emu/crsshair.c | 2 | ||||
| -rw-r--r-- | src/emu/debug/debugcmd.c | 26 | ||||
| -rw-r--r-- | src/emu/debug/debugcpu.c | 4 | ||||
| -rw-r--r-- | src/emu/debug/debughlp.c | 2 | ||||
| -rw-r--r-- | src/emu/fileio.c | 6 | ||||
| -rw-r--r-- | src/emu/inptport.c | 2 | ||||
| -rw-r--r-- | src/emu/machine/68681.c | 30 | ||||
| -rw-r--r-- | src/emu/sound/disc_flt.c | 12 | ||||
| -rw-r--r-- | src/emu/sound/disc_inp.c | 6 | ||||
| -rw-r--r-- | src/emu/sound/disc_sys.c | 14 | ||||
| -rw-r--r-- | src/emu/sound/discrete.c | 36 | ||||
| -rw-r--r-- | src/emu/sound/discrete.h | 2 | ||||
| -rw-r--r-- | src/emu/uimenu.c | 16 |
19 files changed, 179 insertions, 179 deletions
diff --git a/src/emu/cheat.c b/src/emu/cheat.c index 3affd417534..1f5686c46f5 100644 --- a/src/emu/cheat.c +++ b/src/emu/cheat.c @@ -381,7 +381,7 @@ void cheat_init(running_machine *machine) /* allocate memory */ cheatinfo = auto_alloc_clear(machine, cheat_private); machine->cheat_data = cheatinfo; - + /* load the cheats */ cheat_reload(machine); @@ -403,7 +403,7 @@ void cheat_reload(running_machine *machine) /* free everything */ cheat_exit(machine); - + /* reset our memory */ memset(cheatinfo, 0, sizeof(*cheatinfo)); @@ -972,7 +972,7 @@ static cheat_entry *cheat_list_load(running_machine *machine, const char *filena /* open the file with the proper name */ fname = astring_assemble_2(astring_alloc(), filename, ".xml"); filerr = mame_fopen(SEARCHPATH_CHEAT, astring_c(fname), OPEN_FLAG_READ, &cheatfile); - + /* loop over all instrances of the files found in our search paths */ while (filerr == FILERR_NONE) { @@ -983,7 +983,7 @@ static cheat_entry *cheat_list_load(running_machine *machine, const char *filena int version; mame_printf_verbose("Loading cheats file from %s\n", mame_file_full_name(cheatfile)); - + /* read the XML file into internal data structures */ memset(&options, 0, sizeof(options)); options.error = &error; @@ -1019,7 +1019,7 @@ static cheat_entry *cheat_list_load(running_machine *machine, const char *filena cheat_entry *curcheat = cheat_entry_load(machine, filename, cheatnode); if (curcheat == NULL) goto error; - + /* make sure we're not a duplicate */ scannode = NULL; if (REMOVE_DUPLICATE_CHEATS) @@ -1040,7 +1040,7 @@ static cheat_entry *cheat_list_load(running_machine *machine, const char *filena /* free the file and loop for the next one */ xml_file_free(rootnode); - + /* open the next file in sequence */ filerr = mame_fclose_and_open_next(&cheatfile, astring_c(fname), OPEN_FLAG_READ); } diff --git a/src/emu/cpu/pic16c5x/pic16c5x.c b/src/emu/cpu/pic16c5x/pic16c5x.c index 9834df7eff4..dec6545887b 100644 --- a/src/emu/cpu/pic16c5x/pic16c5x.c +++ b/src/emu/cpu/pic16c5x/pic16c5x.c @@ -287,7 +287,7 @@ INLINE void PUSH_STACK(pic16c5x_state *cpustate, UINT16 data) INLINE UINT8 GET_REGFILE(pic16c5x_state *cpustate, offs_t addr) /* Read from internal memory */ { UINT8 data; - + if (addr == 0) { /* Indirect addressing */ addr = (cpustate->FSR & cpustate->picRAMmask); } diff --git a/src/emu/cpu/z8/z8.c b/src/emu/cpu/z8/z8.c index 052518be668..a899375fd68 100644 --- a/src/emu/cpu/z8/z8.c +++ b/src/emu/cpu/z8/z8.c @@ -9,15 +9,15 @@ /* - TODO: + TODO: - - strobed I/O - - interrupts - - expose register file to disassembler - - decimal adjust instruction - - timer Tin/Tout modes - - serial - - instruction pipeline + - strobed I/O + - interrupts + - expose register file to disassembler + - decimal adjust instruction + - timer Tin/Tout modes + - serial + - instruction pipeline */ @@ -241,7 +241,7 @@ INLINE z8_state *get_safe_token(const device_config *device) assert(device != NULL); assert(device->token != NULL); assert(device->type == CPU); - assert((cpu_get_type(device) == CPU_Z8601) || + assert((cpu_get_type(device) == CPU_Z8601) || (cpu_get_type(device) == CPU_UB8830D) || (cpu_get_type(device) == CPU_Z8611)); return (z8_state *)device->token; @@ -341,7 +341,7 @@ INLINE UINT8 register_read(z8_state *cpustate, UINT8 offset) case Z8_REGISTER_IPR: /* write only */ break; - + default: data = cpustate->r[offset]; break; @@ -382,7 +382,7 @@ INLINE void register_write(z8_state *cpustate, UINT8 offset, UINT8 data) case Z8_REGISTER_P3: cpustate->output[offset] = data; - + // TODO: special port 3 modes if (!(P3M & 0x7c)) { @@ -394,10 +394,10 @@ INLINE void register_write(z8_state *cpustate, UINT8 offset, UINT8 data) case Z8_REGISTER_SIO: break; - + case Z8_REGISTER_TMR: if (data & Z8_TMR_LOAD_T0) - { + { cpustate->t0 = T0; timer_adjust_periodic(cpustate->t0_timer, attotime_zero, 0, ATTOTIME_IN_HZ(cpustate->clock / 2 / 4 / ((PRE0 >> 2) + 1))); } @@ -405,7 +405,7 @@ INLINE void register_write(z8_state *cpustate, UINT8 offset, UINT8 data) timer_enable(cpustate->t0_timer, data & Z8_TMR_ENABLE_T0); if (data & Z8_TMR_LOAD_T1) - { + { cpustate->t1 = T1; timer_adjust_periodic(cpustate->t1_timer, attotime_zero, 0, ATTOTIME_IN_HZ(cpustate->clock / 2 / 4 / ((PRE1 >> 2) + 1))); } @@ -597,53 +597,53 @@ struct _z8_opcode_map static const z8_opcode_map Z8601_OPCODE_MAP[] = { - { dec_R1, 6, 5 }, { dec_IR1, 6, 5 }, { add_r1_r2, 10, 5 }, { add_r1_Ir2, 10, 5 }, { add_R2_R1, 10, 5 }, { add_IR2_R1, 10, 5 }, { add_R1_IM, 10, 5 }, { add_IR1_IM, 10, 5 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, + { dec_R1, 6, 5 }, { dec_IR1, 6, 5 }, { add_r1_r2, 10, 5 }, { add_r1_Ir2, 10, 5 }, { add_R2_R1, 10, 5 }, { add_IR2_R1, 10, 5 }, { add_R1_IM, 10, 5 }, { add_IR1_IM, 10, 5 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, - { rlc_R1, 6, 5 }, { rlc_IR1, 6, 5 }, { adc_r1_r2, 6, 5 }, { adc_r1_Ir2, 6, 5 }, { adc_R2_R1, 10, 5 }, { adc_IR2_R1, 10, 5 }, { adc_R1_IM, 10, 5 }, { adc_IR1_IM, 10, 5 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, + { rlc_R1, 6, 5 }, { rlc_IR1, 6, 5 }, { adc_r1_r2, 6, 5 }, { adc_r1_Ir2, 6, 5 }, { adc_R2_R1, 10, 5 }, { adc_IR2_R1, 10, 5 }, { adc_R1_IM, 10, 5 }, { adc_IR1_IM, 10, 5 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, - { inc_R1, 6, 5 }, { inc_IR1, 6, 5 }, { sub_r1_r2, 6, 5 }, { sub_r1_Ir2, 6, 5 }, { sub_R2_R1, 10, 5 }, { sub_IR2_R1, 10, 5 }, { sub_R1_IM, 10, 5 }, { sub_IR1_IM, 10, 5 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, + { inc_R1, 6, 5 }, { inc_IR1, 6, 5 }, { sub_r1_r2, 6, 5 }, { sub_r1_Ir2, 6, 5 }, { sub_R2_R1, 10, 5 }, { sub_IR2_R1, 10, 5 }, { sub_R1_IM, 10, 5 }, { sub_IR1_IM, 10, 5 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, - { jp_IRR1, 8, 0 }, { srp_IM, 6, 1 }, { sbc_r1_r2, 6, 5 }, { sbc_r1_Ir2, 6, 5 }, { sbc_R2_R1, 10, 5 }, { sbc_IR2_R1, 10, 5 }, { sbc_R1_IM, 10, 5 }, { sbc_IR1_IM, 10, 5 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, + { jp_IRR1, 8, 0 }, { srp_IM, 6, 1 }, { sbc_r1_r2, 6, 5 }, { sbc_r1_Ir2, 6, 5 }, { sbc_R2_R1, 10, 5 }, { sbc_IR2_R1, 10, 5 }, { sbc_R1_IM, 10, 5 }, { sbc_IR1_IM, 10, 5 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, - { da_R1, 8, 5 }, { da_IR1, 8, 5 }, { or_r1_r2, 6, 5 }, { or_r1_Ir2, 6, 5 }, { or_R2_R1, 10, 5 }, { or_IR2_R1, 10, 5 }, { or_R1_IM, 10, 5 }, { or_IR1_IM, 10, 5 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, + { da_R1, 8, 5 }, { da_IR1, 8, 5 }, { or_r1_r2, 6, 5 }, { or_r1_Ir2, 6, 5 }, { or_R2_R1, 10, 5 }, { or_IR2_R1, 10, 5 }, { or_R1_IM, 10, 5 }, { or_IR1_IM, 10, 5 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, - { pop_R1, 10, 5 }, { pop_IR1, 10, 5 }, { and_r1_r2, 6, 5 }, { and_r1_Ir2, 6, 5 }, { and_R2_R1, 10, 5 }, { and_IR2_R1, 10, 5 }, { and_R1_IM, 10, 5 }, { and_IR1_IM, 10, 5 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, + { pop_R1, 10, 5 }, { pop_IR1, 10, 5 }, { and_r1_r2, 6, 5 }, { and_r1_Ir2, 6, 5 }, { and_R2_R1, 10, 5 }, { and_IR2_R1, 10, 5 }, { and_R1_IM, 10, 5 }, { and_IR1_IM, 10, 5 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, - { com_R1, 6, 5 }, { com_IR1, 6, 5 }, { tcm_r1_r2, 6, 5 }, { tcm_r1_Ir2, 6, 5 }, { tcm_R2_R1, 10, 5 }, { tcm_IR2_R1, 10, 5 }, { tcm_R1_IM, 10, 5 }, { tcm_IR1_IM, 10, 5 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, + { com_R1, 6, 5 }, { com_IR1, 6, 5 }, { tcm_r1_r2, 6, 5 }, { tcm_r1_Ir2, 6, 5 }, { tcm_R2_R1, 10, 5 }, { tcm_IR2_R1, 10, 5 }, { tcm_R1_IM, 10, 5 }, { tcm_IR1_IM, 10, 5 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, - { push_R2, 10, 1 }, { push_IR2, 12, 1 },{ tm_r1_r2, 6, 5 }, { tm_r1_Ir2, 6, 5 }, { tm_R2_R1, 10, 5 }, { tm_IR2_R1, 10, 5 }, { tm_R1_IM, 10, 5 }, { tm_IR1_IM, 10, 5 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, + { push_R2, 10, 1 }, { push_IR2, 12, 1 },{ tm_r1_r2, 6, 5 }, { tm_r1_Ir2, 6, 5 }, { tm_R2_R1, 10, 5 }, { tm_IR2_R1, 10, 5 }, { tm_R1_IM, 10, 5 }, { tm_IR1_IM, 10, 5 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 }, - { decw_RR1, 10, 5 },{ decw_IR1, 10, 5 },{ lde_r1_Irr2, 12, 0 }, { ldei_Ir1_Irr2, 18, 0 },{ illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { di, 6, 1 }, + { decw_RR1, 10, 5 },{ decw_IR1, 10, 5 },{ lde_r1_Irr2, 12, 0 }, { ldei_Ir1_Irr2, 18, 0 },{ illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { di, 6, 1 }, - { rl_R1, 6, 5 }, { rl_IR1, 6, 5 }, { lde_r2_Irr1, 12, 0 }, { ldei_Ir2_Irr1, 18, 0 },{ illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { ei, 6, 1 }, + { rl_R1, 6, 5 }, { rl_IR1, 6, 5 }, { lde_r2_Irr1, 12, 0 }, { ldei_Ir2_Irr1, 18, 0 },{ illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { ei, 6, 1 }, - { incw_RR1, 10, 5 },{ incw_IR1, 10, 5 },{ cp_r1_r2, 6, 5 }, { cp_r1_Ir2, 6, 5 }, { cp_R2_R1, 10, 5 }, { cp_IR2_R1, 10, 5 }, { cp_R1_IM, 10, 5 }, { cp_IR1_IM, 10, 5 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { ret, 14, 0 }, + { incw_RR1, 10, 5 },{ incw_IR1, 10, 5 },{ cp_r1_r2, 6, 5 }, { cp_r1_Ir2, 6, 5 }, { cp_R2_R1, 10, 5 }, { cp_IR2_R1, 10, 5 }, { cp_R1_IM, 10, 5 }, { cp_IR1_IM, 10, 5 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { ret, 14, 0 }, - { clr_R1, 6, 5 }, { clr_IR1, 6, 5 }, { xor_r1_r2, 6, 5 }, { xor_r1_Ir2, 6, 5 }, { xor_R2_R1, 10, 5 }, { xor_IR2_R1, 10, 5 }, { xor_R1_IM, 10, 5 }, { xor_IR1_IM, 10, 5 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { iret, 16, 0 }, + { clr_R1, 6, 5 }, { clr_IR1, 6, 5 }, { xor_r1_r2, 6, 5 }, { xor_r1_Ir2, 6, 5 }, { xor_R2_R1, 10, 5 }, { xor_IR2_R1, 10, 5 }, { xor_R1_IM, 10, 5 }, { xor_IR1_IM, 10, 5 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { iret, 16, 0 }, - { rrc_R1, 6, 5 }, { rrc_IR1, 6, 5 }, { ldc_r1_Irr2, 12, 0 }, { ldci_Ir1_Irr2, 18, 0 },{ illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, { ld_r1_x_R2, 10, 5 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { rcf, 6, 5 }, + { rrc_R1, 6, 5 }, { rrc_IR1, 6, 5 }, { ldc_r1_Irr2, 12, 0 }, { ldci_Ir1_Irr2, 18, 0 },{ illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, { ld_r1_x_R2, 10, 5 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { rcf, 6, 5 }, - { sra_R1, 6, 5 }, { sra_IR1, 6, 5 }, { ldc_r2_Irr1, 12, 0 }, { ldci_Ir2_Irr1, 18, 0 },{ call_IRR1, 20, 0 }, { illegal, 0, 0 }, { call_DA, 20, 0 }, { ld_r2_x_R1, 10, 5 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { scf, 6, 5 }, + { sra_R1, 6, 5 }, { sra_IR1, 6, 5 }, { ldc_r2_Irr1, 12, 0 }, { ldci_Ir2_Irr1, 18, 0 },{ call_IRR1, 20, 0 }, { illegal, 0, 0 }, { call_DA, 20, 0 }, { ld_r2_x_R1, 10, 5 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { scf, 6, 5 }, - { rr_R1, 6, 5 }, { rr_IR1, 6, 5 }, { illegal, 0, 0 }, { ld_r1_Ir2, 6, 5 }, { ld_R2_R1, 10, 5 }, { ld_IR2_R1, 10, 5 }, { ld_R1_IM, 10, 5 }, { ld_IR1_IM, 10, 5 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { ccf, 6, 5 }, + { rr_R1, 6, 5 }, { rr_IR1, 6, 5 }, { illegal, 0, 0 }, { ld_r1_Ir2, 6, 5 }, { ld_R2_R1, 10, 5 }, { ld_IR2_R1, 10, 5 }, { ld_R1_IM, 10, 5 }, { ld_IR1_IM, 10, 5 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { ccf, 6, 5 }, { swap_R1, 8, 5 }, { swap_IR1, 8, 5 }, { illegal, 0, 0 }, { ld_Ir1_r2, 6, 5 }, { illegal, 0, 0 }, { ld_R2_IR1, 10, 5 }, { illegal, 0, 0 }, { illegal, 0, 0 }, - { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { nop, 6, 0 }, + { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { nop, 6, 0 }, }; /*************************************************************************** @@ -728,17 +728,17 @@ static CPU_EXECUTE( z8 ) int cycles; debugger_instruction_hook(device, cpustate->pc); - + /* TODO: sample interrupts */ cpustate->input[3] = memory_read_byte_8be(cpustate->io, 3); - + /* fetch opcode */ opcode = fetch(cpustate); cycles = Z8601_OPCODE_MAP[opcode].execution_cycles; /* execute instruction */ (*(Z8601_OPCODE_MAP[opcode].function))(cpustate, opcode, &cycles); - + cpustate->icount -= cycles; } while (cpustate->icount > 0); @@ -793,7 +793,7 @@ static CPU_IMPORT_STATE( z8 ) cpustate->r[Z8_REGISTER_SPH] = cpustate->fake_sp >> 8; cpustate->r[Z8_REGISTER_SPL] = cpustate->fake_sp & 0xff; break; - + case Z8_R0: case Z8_R1: case Z8_R2: case Z8_R3: case Z8_R4: case Z8_R5: case Z8_R6: case Z8_R7: case Z8_R8: case Z8_R9: case Z8_R10: case Z8_R11: case Z8_R12: case Z8_R13: case Z8_R14: case Z8_R15: cpustate->r[cpustate->r[Z8_REGISTER_RP] + (entry->index - Z8_R0)] = cpustate->fake_r[entry->index - Z8_R0]; break; diff --git a/src/emu/cpu/z8/z8.h b/src/emu/cpu/z8/z8.h index 0f0bc364df6..5467a6f744e 100644 --- a/src/emu/cpu/z8/z8.h +++ b/src/emu/cpu/z8/z8.h @@ -18,7 +18,7 @@ enum { Z8_PC, Z8_SP, Z8_RP, Z8_T0, Z8_T1, - Z8_R0, Z8_R1, Z8_R2, Z8_R3, Z8_R4, Z8_R5, Z8_R6, Z8_R7, Z8_R8, Z8_R9, Z8_R10, Z8_R11, Z8_R12, Z8_R13, Z8_R14, Z8_R15, + Z8_R0, Z8_R1, Z8_R2, Z8_R3, Z8_R4, Z8_R5, Z8_R6, Z8_R7, Z8_R8, Z8_R9, Z8_R10, Z8_R11, Z8_R12, Z8_R13, Z8_R14, Z8_R15, Z8_GENPC = REG_GENPC, Z8_GENSP = REG_GENSP diff --git a/src/emu/cpu/z8/z8dasm.c b/src/emu/cpu/z8/z8dasm.c index 07aef5bf9b2..5a3ca6ad099 100644 --- a/src/emu/cpu/z8/z8dasm.c +++ b/src/emu/cpu/z8/z8dasm.c @@ -9,27 +9,27 @@ static const char* REGISTER_NAME[256] = { "P0", "P1", "P2", "P3", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "SIO", "TMR", "T1", "PRE1", "T0", "PRE0", "P2M", "P3M", "P01M", "IPR", "IRQ", "IMR", "FLAGS", "RP", "SPH", "SPL" }; static const char* CONDITION_CODE[16] = { - "F", "LT", "LE", "ULE", "OV", "MI", "Z", "C", - "", "GE", "GT", "UGT", "NOV", "PL", "NZ", "NC" + "F", "LT", "LE", "ULE", "OV", "MI", "Z", "C", + "", "GE", "GT", "UGT", "NOV", "PL", "NZ", "NC" }; /*************************************************************************** @@ -90,7 +90,7 @@ CPU_DISASSEMBLE( z8 ) switch (pc) { - case 0x0000: + case 0x0000: case 0x0002: case 0x0004: case 0x0006: @@ -235,7 +235,7 @@ CPU_DISASSEMBLE( z8 ) case 0x7d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; case 0x7e: mnemonic("INC"); arg_r(OPH); break; case 0x7f: illegal; /* mnemonic("HALT"); */ break; - + case 0x80: mnemonic("DECW"); arg_RR(*oprom++); break; case 0x81: mnemonic("DECW"); arg_IR(B0); bytes(2); break; case 0x82: mnemonic("LDE"); arg_r(B0H); arg_Irr(B0L); bytes(2); break; @@ -252,7 +252,7 @@ CPU_DISASSEMBLE( z8 ) case 0x8d: mnemonic("JP"); arg_DA; bytes(3); break; case 0x8e: mnemonic("INC"); arg_r(OPH); break; case 0x8f: mnemonic("DI"); break; - + case 0x90: mnemonic("RL"); arg_R(B0); bytes(2); break; case 0x91: mnemonic("RL"); arg_IR(B0); bytes(2); break; case 0x92: mnemonic("LDE"); arg_r(B0L); arg_Irr(B0H); bytes(2); break; @@ -269,7 +269,7 @@ CPU_DISASSEMBLE( z8 ) case 0x9d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; case 0x9e: mnemonic("INC"); arg_r(OPH); break; case 0x9f: mnemonic("EI"); break; - + case 0xa0: mnemonic("INCW"); arg_RR(B0); bytes(2); break; case 0xa1: mnemonic("INCW"); arg_IR(B0); bytes(2); break; case 0xa2: mnemonic("CP"); arg_r(B0H); arg_r(B0L); bytes(2); break; @@ -286,7 +286,7 @@ CPU_DISASSEMBLE( z8 ) case 0xad: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; case 0xae: mnemonic("INC"); arg_r(OPH); break; case 0xaf: mnemonic("RET"); step_out; break; - + case 0xb0: mnemonic("CLR"); arg_R(B0); bytes(2); break; case 0xb1: mnemonic("XOR"); arg_IR(B0); bytes(2); break; case 0xb2: mnemonic("XOR"); arg_r(B0H); arg_r(B0L); bytes(2); break; @@ -303,7 +303,7 @@ CPU_DISASSEMBLE( z8 ) case 0xbd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; case 0xbe: mnemonic("INC"); arg_r(OPH); break; case 0xbf: mnemonic("IRET"); step_out; break; - + case 0xc0: mnemonic("RRC"); arg_R(B0); bytes(2); break; case 0xc1: mnemonic("RRC"); arg_IR(B0); bytes(2); break; case 0xc2: mnemonic("LDC"); arg_r(B0H); arg_Irr(B0L); bytes(2); break; @@ -320,7 +320,7 @@ CPU_DISASSEMBLE( z8 ) case 0xcd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; case 0xce: mnemonic("INC"); arg_r(OPH); break; case 0xcf: mnemonic("RCF"); break; - + case 0xd0: mnemonic("SRA"); arg_R(B0); bytes(2); break; case 0xd1: mnemonic("SRA"); arg_IR(B0); bytes(2); break; case 0xd2: mnemonic("LDC"); arg_Irr(B0L); arg_r(B0H); bytes(2); break; @@ -337,7 +337,7 @@ CPU_DISASSEMBLE( z8 ) case 0xdd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; case 0xde: mnemonic("INC"); arg_r(OPH); break; case 0xdf: mnemonic("SCF"); break; - + case 0xe0: mnemonic("RR"); arg_R(B0); bytes(2); break; case 0xe1: mnemonic("RR"); arg_IR(B0); bytes(2); break; case 0xe2: illegal; break; @@ -354,7 +354,7 @@ CPU_DISASSEMBLE( z8 ) case 0xed: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break; case 0xee: mnemonic("INC"); arg_r(OPH); break; case 0xef: mnemonic("CCF"); break; - + case 0xf0: mnemonic("SWAP"); arg_R(B0); bytes(2); break; case 0xf1: mnemonic("SWAP"); arg_IR(B0); bytes(2); break; case 0xf2: illegal; break; diff --git a/src/emu/cpu/z8/z8ops.c b/src/emu/cpu/z8/z8ops.c index fd9a7467674..9c014dd4cda 100644 --- a/src/emu/cpu/z8/z8ops.c +++ b/src/emu/cpu/z8/z8ops.c @@ -148,7 +148,7 @@ static void load_from_memory(z8_state *cpustate, const address_space *space) UINT16 address = register_pair_read(cpustate, src); UINT8 data = memory_decrypted_read_byte(cpustate->program, address); - + register_write(cpustate, dst, data); } @@ -173,9 +173,9 @@ static void load_from_memory_autoinc(z8_state *cpustate, const address_space *sp UINT16 address = register_pair_read(cpustate, src); UINT8 data = memory_decrypted_read_byte(cpustate->program, address); - + register_write(cpustate, real_dst, data); - + register_write(cpustate, dst, real_dst + 1); register_pair_write(cpustate, src, address + 1); } @@ -191,7 +191,7 @@ static void load_to_memory_autoinc(z8_state *cpustate, const address_space *spac UINT8 data = register_read(cpustate, real_src); memory_write_byte(cpustate->program, address, data); - + register_pair_write(cpustate, dst, address + 1); register_write(cpustate, src, real_src + 1); } @@ -208,7 +208,7 @@ INSTRUCTION( ldei_Ir2_Irr1 ) { load_to_memory_autoinc(cpustate, cpustate->data); static void pop(z8_state *cpustate, UINT8 dst) { /* dst <- @SP - SP <- SP + 1 */ + SP <- SP + 1 */ register_write(cpustate, dst, stack_pop_byte(cpustate)); } @@ -218,7 +218,7 @@ INSTRUCTION( pop_IR1 ) { mode_IR1(pop) } static void push(z8_state *cpustate, UINT8 src) { /* SP <- SP - 1 - @SP <- src */ + @SP <- src */ stack_push_byte(cpustate, read(src)); } @@ -495,7 +495,7 @@ INSTRUCTION( call_DA ) { UINT16 dst = (fetch(cpustate) << 8) | fetch(cpustate) INSTRUCTION( djnz_r1_RA ) { - INT8 ra = (INT8)fetch(cpustate); + INT8 ra = (INT8)fetch(cpustate); /* r <- r - 1 */ int r = get_working_register(cpustate, opcode >> 4); @@ -513,13 +513,13 @@ INSTRUCTION( djnz_r1_RA ) INSTRUCTION( iret ) { /* FLAGS <- @SP - SP <- SP + 1 */ + SP <- SP + 1 */ register_write(cpustate, Z8_REGISTER_FLAGS, stack_pop_byte(cpustate)); /* PC <- @SP - SP <- SP + 2 */ + SP <- SP + 2 */ cpustate->pc = stack_pop_word(cpustate); - + /* IMR (7) <- 1 */ cpustate->r[Z8_REGISTER_IMR] |= Z8_IMR_ENABLE; } @@ -527,7 +527,7 @@ INSTRUCTION( iret ) INSTRUCTION( ret ) { /* PC <- @SP - SP <- SP + 2 */ + SP <- SP + 2 */ cpustate->pc = stack_pop_word(cpustate); } @@ -562,14 +562,14 @@ static int check_condition_code(z8_state *cpustate, int cc) case CC_NZ: truth = !flag(Z); break; case CC_NC: truth = !flag(C); break; } - + return truth; } INSTRUCTION( jp_cc_DA ) { - UINT16 dst = (fetch(cpustate) << 8) | fetch(cpustate); - + UINT16 dst = (fetch(cpustate) << 8) | fetch(cpustate); + /* if cc is true, then PC <- dst */ if (check_condition_code(cpustate, opcode >> 4)) { @@ -581,7 +581,7 @@ INSTRUCTION( jp_cc_DA ) INSTRUCTION( jr_cc_RA ) { INT8 ra = (INT8)fetch(cpustate); - UINT16 dst = cpustate->pc + ra; + UINT16 dst = cpustate->pc + ra; /* if cc is true, then PC <- dst */ if (check_condition_code(cpustate, opcode >> 4)) @@ -599,7 +599,7 @@ static void test_complement_under_mask(z8_state *cpustate, UINT8 dst, UINT8 src) { /* NOT(dst) AND src */ UINT8 data = (register_read(cpustate, dst) ^ 0xff) & src; - + set_flag_z(data == 0); set_flag_s(data & 0x80); set_flag_v(0); @@ -616,7 +616,7 @@ static void test_under_mask(z8_state *cpustate, UINT8 dst, UINT8 src) { /* dst AND src */ UINT8 data = register_read(cpustate, dst) & src; - + set_flag_z(data == 0); set_flag_s(data & 0x80); set_flag_v(0); @@ -727,7 +727,7 @@ static void swap(z8_state *cpustate, UINT8 dst) set_flag_z(data == 0); set_flag_s(data & 0x80); -// set_flag_v(0); undefined +// set_flag_v(0); undefined } INSTRUCTION( swap_R1 ) { mode_R1(swap) } diff --git a/src/emu/crsshair.c b/src/emu/crsshair.c index 2b1fb1674a4..f7a218e0ff7 100644 --- a/src/emu/crsshair.c +++ b/src/emu/crsshair.c @@ -332,7 +332,7 @@ void crosshair_set_user_settings(running_machine *machine, UINT8 player, crossha static void animate(const device_config *device, void *param, int vblank_state) { int player; - + /* only animate once per frame, when vblank_state is 1 */ if (!vblank_state) return; diff --git a/src/emu/debug/debugcmd.c b/src/emu/debug/debugcmd.c index 75814dde444..31989f72c70 100644 --- a/src/emu/debug/debugcmd.c +++ b/src/emu/debug/debugcmd.c @@ -1825,7 +1825,7 @@ static void execute_cheatinit(running_machine *machine, int ref, int params, con if (!debug_command_parameter_number(machine, param[(ref == 0) ? 1 : 0], &offset)) return; if (!debug_command_parameter_number(machine, param[(ref == 0) ? 2 : 1], &length)) - return; + return; } else { @@ -1847,7 +1847,7 @@ static void execute_cheatinit(running_machine *machine, int ref, int params, con debug_console_printf(machine, "No writable bytes found in this area\n"); return; } - + if (ref == 0) { /* initialize new cheat system */ @@ -1917,8 +1917,8 @@ static void execute_cheatnext(running_machine *machine, int ref, int params, con UINT32 active_cheat = 0; UINT8 condition; UINT64 comp_value = 0; - - enum + + enum { CHEAT_ALL = 0, CHEAT_EQUAL, @@ -1960,7 +1960,7 @@ static void execute_cheatnext(running_machine *machine, int ref, int params, con else if (!strcmp(param[0], "smallerof") || !strcmp(param[0], "lt") || !strcmp(param[0], "<")) condition = CHEAT_SMALLEROF; else if (!strcmp(param[0], "greaterof") || !strcmp(param[0], "gt") || !strcmp(param[0], ">")) - condition = CHEAT_GREATEROF; + condition = CHEAT_GREATEROF; else { debug_console_printf(machine, "Invalid condition type\n"); @@ -1976,7 +1976,7 @@ static void execute_cheatnext(running_machine *machine, int ref, int params, con UINT64 cheat_value = cheat_read_extended(&cheat, space, cheat.cheatmap[cheatindex].offset); UINT64 comp_byte = (ref == 0) ? cheat.cheatmap[cheatindex].previous_value : cheat.cheatmap[cheatindex].first_value; UINT8 disable_byte = FALSE; - + switch (condition) { case CHEAT_ALL: @@ -2069,10 +2069,10 @@ static void execute_cheatlist(running_machine *machine, int ref, int params, con if (!debug_command_parameter_cpu_space(machine, &cheat.cpu, ADDRESS_SPACE_PROGRAM, &space)) return; - + if (params > 0) f = fopen(param[0], "w"); - + switch (space->spacenum) { default: @@ -2080,7 +2080,7 @@ static void execute_cheatlist(running_machine *machine, int ref, int params, con case ADDRESS_SPACE_DATA: spaceletter = 'd'; break; case ADDRESS_SPACE_IO: spaceletter = 'i'; break; } - + switch (cheat.width) { default: @@ -2097,14 +2097,14 @@ static void execute_cheatlist(running_machine *machine, int ref, int params, con { UINT64 value = cheat_read_extended(&cheat, space, cheat.cheatmap[cheatindex].offset) & sizemask; offs_t address = memory_byte_to_address(space, cheat.cheatmap[cheatindex].offset); - + if (params > 0) { active_cheat++; fprintf(f, " <cheat desc=\"Possibility %d : %0*X (%0*" I64FMT "X)\">\n", active_cheat, space->logaddrchars, address, cheat.width * 2, value); - fprintf(f, " <script state=\"run\">\n"); + fprintf(f, " <script state=\"run\">\n"); fprintf(f, " <action>maincpu.%c%c@%0*X=%0*" I64FMT "X</action>\n", spaceletter, sizeletter, space->logaddrchars, address, cheat.width * 2, cheat.cheatmap[cheatindex].first_value & sizemask); - fprintf(f, " </script>\n"); + fprintf(f, " </script>\n"); fprintf(f, " </cheat>\n\n"); } else @@ -2135,7 +2135,7 @@ static void execute_cheatundo(running_machine *machine, int ref, int params, con cheat.cheatmap[cheatindex].undo = 0; undo_count++; } - } + } cheat.undo--; debug_console_printf(machine, "%u cheat reactivated\n", undo_count); diff --git a/src/emu/debug/debugcpu.c b/src/emu/debug/debugcpu.c index d8a6c659a75..76ff505e38c 100644 --- a/src/emu/debug/debugcpu.c +++ b/src/emu/debug/debugcpu.c @@ -1531,7 +1531,7 @@ UINT64 debug_read_qword(const address_space *space, offs_t address, int apply_tr /*------------------------------------------------- - debug_read_memory - return 1,2,4 or 8 bytes + debug_read_memory - return 1,2,4 or 8 bytes from the specified memory space -------------------------------------------------*/ @@ -1746,7 +1746,7 @@ void debug_write_qword(const address_space *space, offs_t address, UINT64 data, /*------------------------------------------------- - debug_write_memory - write 1,2,4 or 8 bytes + debug_write_memory - write 1,2,4 or 8 bytes to the specified memory space -------------------------------------------------*/ diff --git a/src/emu/debug/debughlp.c b/src/emu/debug/debughlp.c index f82c610c0ea..05a3c0a2cfd 100644 --- a/src/emu/debug/debughlp.c +++ b/src/emu/debug/debughlp.c @@ -1083,7 +1083,7 @@ static const help_item static_help_list[] = " cheatrange <address>,<length>\n" "\n" "The cheatrange command adds the selected memory area to the cheat search.\n" - "Before using cheatrange it is necessary to initialize the cheat search with cheatinit.\n" + "Before using cheatrange it is necessary to initialize the cheat search with cheatinit.\n" "\n" "Examples:\n" "\n" diff --git a/src/emu/fileio.c b/src/emu/fileio.c index 9540d62a1fc..c551ab1fce7 100644 --- a/src/emu/fileio.c +++ b/src/emu/fileio.c @@ -263,7 +263,7 @@ static file_error fopen_internal(core_options *opts, path_iterator *iterator, co break; } } - + /* if we succeeded, save the iterator */ if (filerr == FILERR_NONE) (*file)->iterator = *iterator; @@ -394,8 +394,8 @@ void mame_fclose(mame_file *file) /*------------------------------------------------- - mame_fclose_and_open_next - close an open - file, and open the next entry in the original + mame_fclose_and_open_next - close an open + file, and open the next entry in the original searchpath -------------------------------------------------*/ diff --git a/src/emu/inptport.c b/src/emu/inptport.c index 98b6a68eef1..de514345804 100644 --- a/src/emu/inptport.c +++ b/src/emu/inptport.c @@ -1320,7 +1320,7 @@ int input_port_get_crosshair_position(running_machine *machine, int player, floa else value *= field->crossscale; value += field->crossoffset; - + /* apply custom mapping if necessary */ if (field->crossmapper != NULL) value = (*field->crossmapper)(field, value); diff --git a/src/emu/machine/68681.c b/src/emu/machine/68681.c index 2ff96d1bc1b..8b7f6ab9d24 100644 --- a/src/emu/machine/68681.c +++ b/src/emu/machine/68681.c @@ -111,20 +111,20 @@ INLINE duart68681_state *get_safe_token(const device_config *device) static void duart68681_update_interrupts(duart68681_state *duart68681) { /* update SR state and update interrupt ISR state for the following bits: - SRn: bits 7-4: handled elsewhere. - SRn: bit 3 (TxEMTn) (we can assume since we're not actually emulating the delay/timing of sending bits, that as long as TxRDYn is set, TxEMTn is also set since the transmit byte has 'already happened', therefore TxEMTn is always 1 assuming tx is enabled on channel n and the MSR2n mode is 0 or 2; in mode 1 it is explicitly zeroed, and mode 3 is undefined) - SRn: bit 2 (TxRDYn) (we COULD assume since we're not emulating delay and timing output, that as long as tx is enabled on channel n, TxRDY is 1 for channel n and the MSR2n mode is 0 or 2; in mode 1 it is explicitly zeroed, and mode 3 is undefined; however, tx_ready is already nicely handled for us elsewhere, so we can use that instead for now, though we may need to retool that code as well) - SRn: bit 1 (FFULLn) (this bit we actually emulate; if the recieve fifo for channel n is full, this bit is 1, otherwise it is 0. the recieve fifo should be three words long.) - SRn: bit 0 (RxRDYn) (this bit we also emulate; the bit is always asserted if the recieve fifo is not empty) - ISR: bit 7: Input Port change; this should be handled elsewhere, on the input port handler - ISR: bit 6: Delta Break B; this should be handled elsewhere, on the data recieve handler - ISR: bit 5: RxRDYB/FFULLB: this is handled here; depending on whether MSR1B bit 6 is 0 or 1, this bit holds the state of SRB bit 0 or bit 1 respectively - ISR: bit 4: TxRDYB: this is handled here; it mirrors SRB bit 2 - ISR: bit 3: Counter ready; this should be handled by the timer generator - ISR: bit 2: Delta Break A; this should be handled elsewhere, on the data recieve handler - ISR: bit 1: RxRDYA/FFULLA: this is handled here; depending on whether MSR1A bit 6 is 0 or 1, this bit holds the state of SRA bit 0 or bit 1 respectively - ISR: bit 0: TxRDYA: this is handled here; it mirrors SRA bit 2 - */ + SRn: bits 7-4: handled elsewhere. + SRn: bit 3 (TxEMTn) (we can assume since we're not actually emulating the delay/timing of sending bits, that as long as TxRDYn is set, TxEMTn is also set since the transmit byte has 'already happened', therefore TxEMTn is always 1 assuming tx is enabled on channel n and the MSR2n mode is 0 or 2; in mode 1 it is explicitly zeroed, and mode 3 is undefined) + SRn: bit 2 (TxRDYn) (we COULD assume since we're not emulating delay and timing output, that as long as tx is enabled on channel n, TxRDY is 1 for channel n and the MSR2n mode is 0 or 2; in mode 1 it is explicitly zeroed, and mode 3 is undefined; however, tx_ready is already nicely handled for us elsewhere, so we can use that instead for now, though we may need to retool that code as well) + SRn: bit 1 (FFULLn) (this bit we actually emulate; if the recieve fifo for channel n is full, this bit is 1, otherwise it is 0. the recieve fifo should be three words long.) + SRn: bit 0 (RxRDYn) (this bit we also emulate; the bit is always asserted if the recieve fifo is not empty) + ISR: bit 7: Input Port change; this should be handled elsewhere, on the input port handler + ISR: bit 6: Delta Break B; this should be handled elsewhere, on the data recieve handler + ISR: bit 5: RxRDYB/FFULLB: this is handled here; depending on whether MSR1B bit 6 is 0 or 1, this bit holds the state of SRB bit 0 or bit 1 respectively + ISR: bit 4: TxRDYB: this is handled here; it mirrors SRB bit 2 + ISR: bit 3: Counter ready; this should be handled by the timer generator + ISR: bit 2: Delta Break A; this should be handled elsewhere, on the data recieve handler + ISR: bit 1: RxRDYA/FFULLA: this is handled here; depending on whether MSR1A bit 6 is 0 or 1, this bit holds the state of SRA bit 0 or bit 1 respectively + ISR: bit 0: TxRDYA: this is handled here; it mirrors SRA bit 2 + */ UINT8 ch = 0; //logerror("DEBUG: 68681 int check: upon func call, SRA is %02X, SRB is %02X, ISR is %02X\n", duart68681->channel[0].SR, duart68681->channel[1].SR, duart68681->ISR); for (ch = 0; ch < 2; ch++) @@ -156,7 +156,7 @@ static void duart68681_update_interrupts(duart68681_state *duart68681) // Handle the TxEMT and TxRDY bits based on mode switch( duart68681->channel[ch].MR2&0xC0) // what mode are we in? { - case 0x00: // normal mode + case 0x00: // normal mode if ( duart68681->channel[ch].tx_enabled ) { duart68681->channel[ch].SR |= STATUS_TRANSMITTER_EMPTY; diff --git a/src/emu/sound/disc_flt.c b/src/emu/sound/disc_flt.c index 9478a59073b..24febd33852 100644 --- a/src/emu/sound/disc_flt.c +++ b/src/emu/sound/disc_flt.c @@ -681,7 +681,7 @@ static DISCRETE_STEP(dst_rcdisc3) if (diff > 0) { diff = diff * context->exponent0; - } + } else if (diff < -context->v_diode) { diff = diff * context->exponent1; @@ -696,7 +696,7 @@ static DISCRETE_STEP(dst_rcdisc3) if (diff < 0) { diff = diff * context->exponent0; - } + } else if (diff > -context->v_diode) { diff = diff * context->exponent1; @@ -1069,7 +1069,7 @@ static DISCRETE_RESET(dst_rcfilter) * 74VHC4066 : 15 * UTC4066 : 270 @ 5VCC, 80 @ 15VCC * CD4066BC : 270 (Fairchild) - * + * * The choice below makes scramble sound about "right". For future error reports, * we need the exact type of switch and at which voltage (5, 12?) it is operated. */ @@ -1134,7 +1134,7 @@ static DISCRETE_RESET(dst_rcfilter_sw) for (bits=0; bits < 15; bits++) { double rs = 0; - + for (i = 0; i < 4; i++) { if (( bits & (1 << i)) != 0) @@ -1144,12 +1144,12 @@ static DISCRETE_RESET(dst_rcfilter_sw) context->f2[bits] = DST_RCFILTER_SW__R / (CD4066_ON_RES + rs); } - + /* fast cases */ context->exp0 = RC_CHARGE_EXP(node, (CD4066_ON_RES + DST_RCFILTER_SW__R) * DST_RCFILTER_SW__C(0)); context->exp1 = RC_CHARGE_EXP(node, (CD4066_ON_RES + DST_RCFILTER_SW__R) * DST_RCFILTER_SW__C(1)); context->factor = RES_VOLTAGE_DIVIDER(DST_RCFILTER_SW__R, CD4066_ON_RES); - + node->output[0] = 0; } diff --git a/src/emu/sound/disc_inp.c b/src/emu/sound/disc_inp.c index 05e6759def3..f354adc6133 100644 --- a/src/emu/sound/disc_inp.c +++ b/src/emu/sound/disc_inp.c @@ -315,7 +315,7 @@ static DISCRETE_START(dss_input_stream) struct dss_input_context *context = (struct dss_input_context *)node->context; assert(DSS_INPUT_STREAM__STREAM < linked_list_count(node->info->input_list)); - + context->is_stream = TRUE; /* Stream out number is set during start */ context->stream_in_number = DSS_INPUT_STREAM__STREAM; @@ -323,13 +323,13 @@ static DISCRETE_START(dss_input_stream) context->offset = DSS_INPUT_STREAM__OFFSET; context->ptr = NULL; //context->data = 0; - + if (node->block->type == DSS_INPUT_BUFFER) { context->is_buffered = TRUE; context->buffer_stream = stream_create(node->info->device, 0, 1, node->info->sample_rate, (void *) node, buffer_stream_update); - stream_set_input(node->info->discrete_stream, context->stream_in_number, + stream_set_input(node->info->discrete_stream, context->stream_in_number, context->buffer_stream, 0, 1.0); } else diff --git a/src/emu/sound/disc_sys.c b/src/emu/sound/disc_sys.c index 724fd33fedd..a57d00bf5a4 100644 --- a/src/emu/sound/disc_sys.c +++ b/src/emu/sound/disc_sys.c @@ -13,7 +13,7 @@ * DSO_TASK - Task node * * Task and list routines - * + * ************************************************************************/ struct dso_csvlog_context @@ -44,8 +44,8 @@ static DISCRETE_START( dso_task ) const linked_list_entry *step_entry; /* Determine, which nodes in the task are referenced in the main task - * and add them to the list of nodes to be buffered for further processing - */ + * and add them to the list of nodes to be buffered for further processing + */ for (node_entry = task->list; node_entry != NULL; node_entry = node_entry->next) { node_description *node = (node_description *) node_entry->ptr; @@ -54,7 +54,7 @@ static DISCRETE_START( dso_task ) for (step_entry = node->info->step_list; step_entry != NULL; step_entry = step_entry->next) { node_description *snode = (node_description *) step_entry->ptr; - + /* loop over all active inputs */ for (inputnum = 0; inputnum < snode->active_inputs; inputnum++) { @@ -90,7 +90,7 @@ static DISCRETE_STEP( dso_task ) { discrete_task_context *task = (discrete_task_context *) node->context; int i; - + for (i = 0; i < task->numbuffered; i++) *(task->ptr[i]++) = **task->dest[i]; //DISCRETE_INPUT(i); } @@ -143,7 +143,7 @@ static DISCRETE_START( dso_csvlog ) static DISCRETE_STOP( dso_csvlog ) { struct dso_csvlog_context *context = (struct dso_csvlog_context *) node->context; - + /* close any csv files */ if (context->csv_file) fclose(context->csv_file); @@ -179,7 +179,7 @@ static DISCRETE_STOP( dso_wavelog ) /* close any wave files */ if (context->wav_file) - wav_close(context->wav_file); + wav_close(context->wav_file); } static DISCRETE_STEP( dso_wavelog ) diff --git a/src/emu/sound/discrete.c b/src/emu/sound/discrete.c index fe3388a9682..15c7e9bdba6 100644 --- a/src/emu/sound/discrete.c +++ b/src/emu/sound/discrete.c @@ -294,11 +294,11 @@ INLINE void step_nodes_in_list(const linked_list_entry *list) if (DISCRETE_PROFILING) { osd_ticks_t last = get_profile_ticks(); - + for (entry = list; entry != NULL; entry = entry->next) { node_description *node = (node_description *) entry->ptr; - + node->run_time -= last; (*node->module->step)(node); last = get_profile_ticks(); @@ -310,7 +310,7 @@ INLINE void step_nodes_in_list(const linked_list_entry *list) for (entry = list; entry != NULL; entry = entry->next) { node_description *node = (node_description *) entry->ptr; - + /* Now step the node */ (*node->module->step)(node); } @@ -497,21 +497,21 @@ static DEVICE_START( discrete ) /* initialize the stream(s) */ info->discrete_stream = stream_create(device,linked_list_count(info->input_list), linked_list_count(info->output_list), info->sample_rate, info, discrete_stream_update); - + /* allocate a queue */ info->queue = osd_work_queue_alloc(WORK_QUEUE_FLAG_MULTI | WORK_QUEUE_FLAG_HIGH_FREQ); /* Process nodes which have a start func */ - + for (entry = info->node_list; entry != NULL; entry = entry->next) { node_description *node = (node_description *) entry->ptr; - + if (node->module->start) (*node->module->start)(node); } - + } @@ -526,7 +526,7 @@ static UINT64 list_run_time(const linked_list_entry *list) { const linked_list_entry *entry; UINT64 total = 0; - + for (entry = list; entry != NULL; entry = entry->next) { node_description *node = (node_description *) entry->ptr; @@ -570,7 +570,7 @@ static void display_profiling(const discrete_info *info) tt = list_run_time(info->step_list); printf("Main: %8.2f %15.2f\n", tt / (double) total * 100.0, tt / (double) info->total_samples); - + printf("Average samples/stream_update: %8.2f\n", (double) info->total_samples / (double) info->total_stream_updates); } @@ -578,20 +578,20 @@ static DEVICE_STOP( discrete ) { discrete_info *info = get_safe_token(device); linked_list_entry *entry; - + osd_work_queue_free(info->queue); if (DISCRETE_PROFILING) { display_profiling(info); } - + /* Process nodes which have a stop func */ - + for (entry = info->node_list; entry != NULL; entry = entry->next) { node_description *node = (node_description *) entry->ptr; - + if (node->module->stop) (*node->module->stop)(node); } @@ -649,7 +649,7 @@ static void *task_callback(void *param, int threadid) /* set up task buffers */ for (i = 0; i < ti->context->numbuffered; i++) ti->context->ptr[i] = &ti->context->node_buf[i][0]; - + samples = ti->samples; while (samples-- > 0) { @@ -675,7 +675,7 @@ INLINE void discrete_stream_update_nodes(discrete_info *info) { discrete_task_context *task = (discrete_task_context *) entry->ptr; int i; - + for (i = task->numbuffered - 1; i >= 0 ; i--) **task->dest[i] = *task->ptr[i]++; } @@ -737,7 +737,7 @@ static STREAM_UPDATE( discrete_stream_update ) /* Now we must do samples iterations of the node list, one output for each step */ for (samplenum = 0; samplenum < samples; samplenum++) discrete_stream_update_nodes(info); - + if (DISCRETE_PROFILING) info->total_stream_updates++; @@ -764,7 +764,7 @@ static void init_nodes(discrete_info *info, linked_list_entry *block_list, const linked_list_entry **task_list_ptr = &info->task_list; linked_list_entry **output_list_ptr = &info->output_list; linked_list_entry **input_list_ptr = &info->input_list; - + /* loop over all nodes */ for (entry = block_list; entry != NULL; entry = entry->next) { @@ -902,7 +902,7 @@ static void find_input_nodes(discrete_info *info) { int inputnum; linked_list_entry *entry; - + /* loop over all nodes */ for (entry = info->node_list; entry != NULL; entry = entry->next) { diff --git a/src/emu/sound/discrete.h b/src/emu/sound/discrete.h index 0d3f16dc08c..dec75379755 100644 --- a/src/emu/sound/discrete.h +++ b/src/emu/sound/discrete.h @@ -3682,7 +3682,7 @@ struct _discrete_task_context double *node_buf[DISCRETE_MAX_TASK_OUTPUTS]; node_description *nodes[DISCRETE_MAX_TASK_OUTPUTS]; double **dest[DISCRETE_MAX_TASK_OUTPUTS]; - + }; struct _discrete_info diff --git a/src/emu/uimenu.c b/src/emu/uimenu.c index 66e1aec6b42..80a6e1ec1b3 100644 --- a/src/emu/uimenu.c +++ b/src/emu/uimenu.c @@ -2493,7 +2493,7 @@ static void menu_cheat(running_machine *machine, ui_menu *menu, void *parameter, if (event != NULL && event->itemref != NULL) { int changed = FALSE; - + /* clear cheat comment on any movement or keypress */ popmessage(NULL); @@ -2508,7 +2508,7 @@ static void menu_cheat(running_machine *machine, ui_menu *menu, void *parameter, changed |= cheat_select_default_state(machine, curcheat); } } - + /* handle individual cheats */ else if ((FPTR)event->itemref > 2) @@ -2534,24 +2534,24 @@ static void menu_cheat(running_machine *machine, ui_menu *menu, void *parameter, case IPT_UI_RIGHT: changed = cheat_select_next_state(machine, event->itemref); break; - + /* bring up display comment if one exists */ case IPT_UI_DISPLAY_COMMENT: case IPT_UI_UP: case IPT_UI_DOWN: if (cheat_get_comment(event->itemref) != NULL) popmessage("Cheat Comment:\n%s", astring_c(cheat_get_comment(event->itemref))); - break; + break; } } - + /* handle reload all */ if ((FPTR)event->itemref == 2 && event->iptkey == IPT_UI_SELECT) { /* re-init cheat engine and thus reload cheats/cheats have already been turned off by here */ cheat_reload(machine); - - /* display the reloaded cheats */ + + /* display the reloaded cheats */ ui_menu_reset(menu, UI_MENU_RESET_REMEMBER_REF); popmessage("All cheats reloaded"); } @@ -2586,7 +2586,7 @@ static void menu_cheat_populate(running_machine *machine, ui_menu *menu) /* add a reset all option */ ui_menu_item_append(menu, "Reset All", NULL, 0, (void *)1); - + /* add a reload all cheats option */ ui_menu_item_append(menu, "Reload All", NULL, 0, (void *)2); } |
