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-rw-r--r--src/emu/bus/c64/c128_partner.c18
-rw-r--r--src/emu/bus/c64/c128_partner.h4
-rw-r--r--src/emu/bus/cbmiec/c1526.h4
-rw-r--r--src/emu/bus/cbmiec/vic1515.h2
-rw-r--r--src/emu/bus/cbmiec/vic1520.h2
-rw-r--r--src/emu/bus/cpc/ddi1.c3
-rw-r--r--src/emu/bus/msx_cart/ascii.c1
-rw-r--r--src/emu/bus/msx_cart/moonsound.c9
-rw-r--r--src/emu/cpu/hphybrid/hphybrid.c1620
-rw-r--r--src/emu/cpu/hphybrid/hphybrid.h4
-rw-r--r--src/emu/cpu/m68000/m68kcpu.c12
-rw-r--r--src/emu/cpu/rsp/rsp.c8
-rw-r--r--src/emu/cpu/rsp/rspcp2.c258
-rw-r--r--src/emu/cpu/rsp/rspcp2.h20
-rw-r--r--src/emu/cpu/rsp/vadd.h1
-rw-r--r--src/emu/cpu/rsp/vcl.h2
-rw-r--r--src/emu/cpu/rsp/vmudh.h1
-rw-r--r--src/emu/cpu/rsp/vmulh.h1
-rw-r--r--src/emu/cpu/rsp/vrcpsq.h2
-rw-r--r--src/emu/cpu/rsp/vrsq.h2
-rw-r--r--src/emu/cpu/sh2/sh2.c20
-rw-r--r--src/emu/cpu/sh2/sh2.h12
-rw-r--r--src/emu/cpu/sh2/sh2comn.c9
-rw-r--r--src/emu/cpu/sm510/sm510.c30
-rw-r--r--src/emu/cpu/sm510/sm510.h10
-rw-r--r--src/emu/cpu/sm510/sm510d.c8
-rw-r--r--src/emu/cpu/sm510/sm510op.c4
-rw-r--r--src/emu/cpu/sm510/sm511core.c8
-rw-r--r--src/emu/cpu/ucom4/ucom4.h2
-rw-r--r--src/emu/cpu/ucom4/ucom4op.c2
-rw-r--r--src/emu/machine/68230pit.c214
-rw-r--r--src/emu/machine/68230pit.h4
-rw-r--r--src/emu/machine/atapihle.c2
-rw-r--r--src/emu/machine/nvram.c1
-rw-r--r--src/emu/machine/pci.c2
-rw-r--r--src/emu/machine/saturn.c2
-rw-r--r--src/emu/machine/smpc.c4
-rw-r--r--src/emu/machine/stvcd.c2
-rw-r--r--src/emu/machine/tms6100.c4
-rw-r--r--src/emu/machine/wd_fdc.h2
-rw-r--r--src/emu/mconfig.h2
-rw-r--r--src/emu/netlist/analog/nld_opamps.c27
-rw-r--r--src/emu/netlist/devices/net_lib.c4
-rw-r--r--src/emu/netlist/devices/nld_log.h2
-rw-r--r--src/emu/netlist/devices/nld_system.h6
-rw-r--r--src/emu/netlist/macro/nlm_cd4xxx.c14
-rw-r--r--src/emu/netlist/macro/nlm_opamp.c4
-rw-r--r--src/emu/netlist/macro/nlm_opamp.h6
-rw-r--r--src/emu/netlist/macro/nlm_other.c4
-rw-r--r--src/emu/netlist/macro/nlm_other.h4
-rw-r--r--src/emu/netlist/macro/nlm_ttl74xx.c4
-rw-r--r--src/emu/netlist/macro/nlm_ttl74xx.h4
-rw-r--r--src/emu/netlist/nl_base.c2
-rw-r--r--src/emu/netlist/nl_base.h6
-rw-r--r--src/emu/netlist/nl_factory.c2
-rw-r--r--src/emu/netlist/nl_setup.h2
-rw-r--r--src/emu/netlist/plib/palloc.h4
-rw-r--r--src/emu/netlist/plib/pconfig.h3
-rw-r--r--src/emu/netlist/plib/plists.h24
-rw-r--r--src/emu/netlist/plib/pstate.c1
-rw-r--r--src/emu/netlist/solver/mat_cr.h2
-rw-r--r--src/emu/netlist/solver/vector_base.h1
-rw-r--r--src/emu/netlist/tools/nl_convert.c2
-rw-r--r--src/emu/schedule.c1
-rw-r--r--src/emu/screen.h10
-rw-r--r--src/emu/sound/c140.c6
-rw-r--r--src/emu/sound/discrete.c1
-rw-r--r--src/emu/sound/scsp.c2
-rw-r--r--src/emu/sound/tms36xx.c2
-rw-r--r--src/emu/sound/ymf278b.c2
-rw-r--r--src/emu/video/hd44780.h16
-rw-r--r--src/emu/video/i82730.c6
-rw-r--r--src/emu/video/i82730.h4
-rw-r--r--src/emu/video/mb_vcu.c2
-rw-r--r--src/emu/video/rgbsse.h4
-rw-r--r--src/emu/video/vooddefs.h10
76 files changed, 1248 insertions, 1264 deletions
diff --git a/src/emu/bus/c64/c128_partner.c b/src/emu/bus/c64/c128_partner.c
index 3b261d24796..07848e1c7d9 100644
--- a/src/emu/bus/c64/c128_partner.c
+++ b/src/emu/bus/c64/c128_partner.c
@@ -11,15 +11,15 @@
PCB Layout
----------
- |---------------|
- |LS74 SW CN|
- |LS09 LS273|
- |LS139 RAM |
- |LS133 |
- | LS240 |
- |LS33 ROM |
- |LS09 |
- |||||||||||||||
+ |---------------|
+ |LS74 SW CN|
+ |LS09 LS273|
+ |LS139 RAM |
+ |LS133 |
+ | LS240 |
+ |LS33 ROM |
+ |LS09 |
+ |||||||||||||||
ROM - Toshiba TMM24128AP 16Kx8 EPROM (blank label)
RAM - Sony CXK5864PN-15L 8Kx8 SRAM
diff --git a/src/emu/bus/c64/c128_partner.h b/src/emu/bus/c64/c128_partner.h
index 442557cb4ec..b91c92026dd 100644
--- a/src/emu/bus/c64/c128_partner.h
+++ b/src/emu/bus/c64/c128_partner.h
@@ -24,8 +24,8 @@
// ======================> partner128_t
class partner128_t : public device_t,
- public device_c64_expansion_card_interface,
- public device_vcs_control_port_interface
+ public device_c64_expansion_card_interface,
+ public device_vcs_control_port_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/cbmiec/c1526.h b/src/emu/bus/cbmiec/c1526.h
index 7296f10630a..c6389bf4662 100644
--- a/src/emu/bus/cbmiec/c1526.h
+++ b/src/emu/bus/cbmiec/c1526.h
@@ -40,7 +40,7 @@ protected:
// ======================> c1526_t
class c1526_t : public c1526_base_t,
- public device_cbm_iec_interface
+ public device_cbm_iec_interface
{
public:
// construction/destruction
@@ -62,7 +62,7 @@ protected:
// ======================> c4023_t
class c4023_t : public c1526_base_t,
- public device_ieee488_interface
+ public device_ieee488_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/cbmiec/vic1515.h b/src/emu/bus/cbmiec/vic1515.h
index 109255aa147..cd3d4554994 100644
--- a/src/emu/bus/cbmiec/vic1515.h
+++ b/src/emu/bus/cbmiec/vic1515.h
@@ -24,7 +24,7 @@
// ======================> vic1515_t
class vic1515_t : public device_t,
- public device_cbm_iec_interface
+ public device_cbm_iec_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/cbmiec/vic1520.h b/src/emu/bus/cbmiec/vic1520.h
index 6fd404fc391..4169164d0ae 100644
--- a/src/emu/bus/cbmiec/vic1520.h
+++ b/src/emu/bus/cbmiec/vic1520.h
@@ -24,7 +24,7 @@
// ======================> vic1520_t
class vic1520_t : public device_t,
- public device_cbm_iec_interface
+ public device_cbm_iec_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/cpc/ddi1.c b/src/emu/bus/cpc/ddi1.c
index b2440021310..b7d7e5a74de 100644
--- a/src/emu/bus/cpc/ddi1.c
+++ b/src/emu/bus/cpc/ddi1.c
@@ -125,7 +125,7 @@ WRITE8_MEMBER(cpc_ddi1_device::fdc_w)
READ8_MEMBER(cpc_ddi1_device::fdc_r)
{
UINT8 data = 0xff;
-
+
switch(offset)
{
case 0x00:
@@ -137,4 +137,3 @@ READ8_MEMBER(cpc_ddi1_device::fdc_r)
}
return data;
}
-
diff --git a/src/emu/bus/msx_cart/ascii.c b/src/emu/bus/msx_cart/ascii.c
index c4b21fa8f86..cb3aebf0d4d 100644
--- a/src/emu/bus/msx_cart/ascii.c
+++ b/src/emu/bus/msx_cart/ascii.c
@@ -533,4 +533,3 @@ WRITE8_MEMBER(msx_cart_msxwrite::write_cart)
break;
}
}
-
diff --git a/src/emu/bus/msx_cart/moonsound.c b/src/emu/bus/msx_cart/moonsound.c
index 244226bf367..d2b222f07de 100644
--- a/src/emu/bus/msx_cart/moonsound.c
+++ b/src/emu/bus/msx_cart/moonsound.c
@@ -41,10 +41,10 @@ static MACHINE_CONFIG_FRAGMENT( moonsound )
MCFG_YMF278B_IRQ_HANDLER(WRITELINE(msx_cart_moonsound,irq_w))
MCFG_SOUND_ROUTE(0, "lspeaker", 0.50)
MCFG_SOUND_ROUTE(1, "rspeaker", 0.50)
- MCFG_SOUND_ROUTE(2, "lspeaker", 0.40)
- MCFG_SOUND_ROUTE(3, "rspeaker", 0.40)
- MCFG_SOUND_ROUTE(4, "lspeaker", 0.40)
- MCFG_SOUND_ROUTE(5, "rspeaker", 0.40)
+ MCFG_SOUND_ROUTE(2, "lspeaker", 0.40)
+ MCFG_SOUND_ROUTE(3, "rspeaker", 0.40)
+ MCFG_SOUND_ROUTE(4, "lspeaker", 0.40)
+ MCFG_SOUND_ROUTE(5, "rspeaker", 0.40)
MACHINE_CONFIG_END
@@ -124,4 +124,3 @@ READ8_MEMBER(msx_cart_moonsound::read_c0)
LOG(("moonsound: read 0xc0\n"));
return 0x00;
}
-
diff --git a/src/emu/cpu/hphybrid/hphybrid.c b/src/emu/cpu/hphybrid/hphybrid.c
index 03a36549b60..027a37e03ed 100644
--- a/src/emu/cpu/hphybrid/hphybrid.c
+++ b/src/emu/cpu/hphybrid/hphybrid.c
@@ -6,18 +6,18 @@
#include "hphybrid.h"
enum {
- HPHYBRID_A,
- HPHYBRID_B,
- HPHYBRID_C,
- HPHYBRID_D,
- HPHYBRID_P,
- HPHYBRID_R,
- HPHYBRID_IV,
- HPHYBRID_PA,
- HPHYBRID_DMAPA,
- HPHYBRID_DMAMA,
- HPHYBRID_DMAC,
- HPHYBRID_I
+ HPHYBRID_A,
+ HPHYBRID_B,
+ HPHYBRID_C,
+ HPHYBRID_D,
+ HPHYBRID_P,
+ HPHYBRID_R,
+ HPHYBRID_IV,
+ HPHYBRID_PA,
+ HPHYBRID_DMAPA,
+ HPHYBRID_DMAMA,
+ HPHYBRID_DMAC,
+ HPHYBRID_I
};
#define BIT_MASK(n) (1U << (n))
@@ -51,111 +51,111 @@ const device_type HP_5061_3011 = &device_creator<hp_5061_3011_cpu_device>;
WRITE_LINE_MEMBER(hp_hybrid_cpu_device::dmar_w)
{
- if (state) {
- BIT_SET(m_flags , HPHYBRID_DMAR_BIT);
- } else {
- BIT_CLR(m_flags , HPHYBRID_DMAR_BIT);
- }
+ if (state) {
+ BIT_SET(m_flags , HPHYBRID_DMAR_BIT);
+ } else {
+ BIT_CLR(m_flags , HPHYBRID_DMAR_BIT);
+ }
}
hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__),
- m_program_config("program", ENDIANNESS_BIG, 16, 16, -1),
- m_io_config("io", ENDIANNESS_BIG, 16, 6, -1)
+ m_program_config("program", ENDIANNESS_BIG, 16, 16, -1),
+ m_io_config("io", ENDIANNESS_BIG, 16, 6, -1)
{
}
void hp_hybrid_cpu_device::device_start()
{
- m_reg_A = 0;
- m_reg_B = 0;
- m_reg_P = HP_RESET_ADDR;
- m_reg_R = 0;
- m_reg_C = 0;
- m_reg_D = 0;
- m_reg_IV = 0;
- m_reg_PA[ 0 ] = 0;
- m_reg_PA[ 1 ] = 0;
- m_reg_PA[ 2 ] = 0;
- m_flags = 0;
- m_dmapa = 0;
- m_dmama = 0;
- m_dmac = 0;
- m_reg_I = 0;
-
- {
- state_add(HPHYBRID_A, "A", m_reg_A);
- state_add(HPHYBRID_B, "B", m_reg_B);
- state_add(HPHYBRID_C, "C", m_reg_C);
- state_add(HPHYBRID_D, "D", m_reg_D);
- state_add(HPHYBRID_P, "P", m_reg_P);
- state_add(STATE_GENPC, "GENPC", m_reg_P).noshow();
- state_add(HPHYBRID_R, "R", m_reg_R);
- state_add(STATE_GENSP, "GENSP", m_reg_R).noshow();
- state_add(HPHYBRID_IV, "IV", m_reg_IV);
- state_add(HPHYBRID_PA, "PA", m_reg_PA[ 0 ]);
- state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%9s");
- state_add(HPHYBRID_DMAPA , "DMAPA" , m_dmapa).noshow();
- state_add(HPHYBRID_DMAMA , "DMAMA" , m_dmama).noshow();
- state_add(HPHYBRID_DMAC , "DMAC" , m_dmac).noshow();
- state_add(HPHYBRID_I , "I" , m_reg_I).noshow();
- }
-
- m_program = &space(AS_PROGRAM);
- m_direct = &m_program->direct();
- m_io = &space(AS_IO);
-
- save_item(NAME(m_reg_A));
- save_item(NAME(m_reg_B));
- save_item(NAME(m_reg_C));
- save_item(NAME(m_reg_D));
- save_item(NAME(m_reg_P));
- save_item(NAME(m_reg_R));
- save_item(NAME(m_reg_IV));
- save_item(NAME(m_reg_PA[0]));
- save_item(NAME(m_reg_PA[1]));
- save_item(NAME(m_reg_PA[2]));
- save_item(NAME(m_flags));
- save_item(NAME(m_dmapa));
- save_item(NAME(m_dmama));
- save_item(NAME(m_dmac));
- save_item(NAME(m_reg_I));
-
- m_icountptr = &m_icount;
+ m_reg_A = 0;
+ m_reg_B = 0;
+ m_reg_P = HP_RESET_ADDR;
+ m_reg_R = 0;
+ m_reg_C = 0;
+ m_reg_D = 0;
+ m_reg_IV = 0;
+ m_reg_PA[ 0 ] = 0;
+ m_reg_PA[ 1 ] = 0;
+ m_reg_PA[ 2 ] = 0;
+ m_flags = 0;
+ m_dmapa = 0;
+ m_dmama = 0;
+ m_dmac = 0;
+ m_reg_I = 0;
+
+ {
+ state_add(HPHYBRID_A, "A", m_reg_A);
+ state_add(HPHYBRID_B, "B", m_reg_B);
+ state_add(HPHYBRID_C, "C", m_reg_C);
+ state_add(HPHYBRID_D, "D", m_reg_D);
+ state_add(HPHYBRID_P, "P", m_reg_P);
+ state_add(STATE_GENPC, "GENPC", m_reg_P).noshow();
+ state_add(HPHYBRID_R, "R", m_reg_R);
+ state_add(STATE_GENSP, "GENSP", m_reg_R).noshow();
+ state_add(HPHYBRID_IV, "IV", m_reg_IV);
+ state_add(HPHYBRID_PA, "PA", m_reg_PA[ 0 ]);
+ state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%9s");
+ state_add(HPHYBRID_DMAPA , "DMAPA" , m_dmapa).noshow();
+ state_add(HPHYBRID_DMAMA , "DMAMA" , m_dmama).noshow();
+ state_add(HPHYBRID_DMAC , "DMAC" , m_dmac).noshow();
+ state_add(HPHYBRID_I , "I" , m_reg_I).noshow();
+ }
+
+ m_program = &space(AS_PROGRAM);
+ m_direct = &m_program->direct();
+ m_io = &space(AS_IO);
+
+ save_item(NAME(m_reg_A));
+ save_item(NAME(m_reg_B));
+ save_item(NAME(m_reg_C));
+ save_item(NAME(m_reg_D));
+ save_item(NAME(m_reg_P));
+ save_item(NAME(m_reg_R));
+ save_item(NAME(m_reg_IV));
+ save_item(NAME(m_reg_PA[0]));
+ save_item(NAME(m_reg_PA[1]));
+ save_item(NAME(m_reg_PA[2]));
+ save_item(NAME(m_flags));
+ save_item(NAME(m_dmapa));
+ save_item(NAME(m_dmama));
+ save_item(NAME(m_dmac));
+ save_item(NAME(m_reg_I));
+
+ m_icountptr = &m_icount;
}
void hp_hybrid_cpu_device::device_reset()
{
- m_reg_P = HP_RESET_ADDR;
- m_reg_I = RM(m_reg_P);
- m_flags = 0;
+ m_reg_P = HP_RESET_ADDR;
+ m_reg_I = RM(m_reg_P);
+ m_flags = 0;
}
void hp_hybrid_cpu_device::execute_run()
{
- do {
- if (BIT(m_flags , HPHYBRID_DMAEN_BIT) && BIT(m_flags , HPHYBRID_DMAR_BIT)) {
- handle_dma();
- } else {
- debugger_instruction_hook(this, m_reg_P);
-
- // Check for interrupts
- check_for_interrupts();
-
- m_reg_I = execute_one(m_reg_I);
- }
- } while (m_icount > 0);
+ do {
+ if (BIT(m_flags , HPHYBRID_DMAEN_BIT) && BIT(m_flags , HPHYBRID_DMAR_BIT)) {
+ handle_dma();
+ } else {
+ debugger_instruction_hook(this, m_reg_P);
+
+ // Check for interrupts
+ check_for_interrupts();
+
+ m_reg_I = execute_one(m_reg_I);
+ }
+ } while (m_icount > 0);
}
void hp_hybrid_cpu_device::execute_set_input(int inputnum, int state)
{
- if (inputnum < HPHYBRID_INT_LVLS) {
- if (state) {
- BIT_SET(m_flags , HPHYBRID_IRH_BIT + inputnum);
- } else {
- BIT_CLR(m_flags , HPHYBRID_IRH_BIT + inputnum);
- }
- }
+ if (inputnum < HPHYBRID_INT_LVLS) {
+ if (state) {
+ BIT_SET(m_flags , HPHYBRID_IRH_BIT + inputnum);
+ } else {
+ BIT_CLR(m_flags , HPHYBRID_IRH_BIT + inputnum);
+ }
+ }
}
/**
@@ -167,14 +167,14 @@ void hp_hybrid_cpu_device::execute_set_input(int inputnum, int state)
*/
UINT16 hp_hybrid_cpu_device::execute_one(UINT16 opcode)
{
- if ((opcode & 0x7fe0) == 0x7000) {
- // EXE
- m_icount -= 8;
- return RM(opcode & 0x1f);
- } else {
- m_reg_P = execute_one_sub(opcode);
- return RM(m_reg_P);
- }
+ if ((opcode & 0x7fe0) == 0x7000) {
+ // EXE
+ m_icount -= 8;
+ return RM(opcode & 0x1f);
+ } else {
+ m_reg_P = execute_one_sub(opcode);
+ return RM(m_reg_P);
+ }
}
/**
@@ -186,773 +186,773 @@ UINT16 hp_hybrid_cpu_device::execute_one(UINT16 opcode)
*/
UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode)
{
- UINT16 ea;
- UINT16 tmp;
-
- switch (opcode & 0x7800) {
- case 0x0000:
- // LDA
- m_icount -= 13;
- m_reg_A = RM(get_ea(opcode));
- break;
-
- case 0x0800:
- // LDB
- m_icount -= 13;
- m_reg_B = RM(get_ea(opcode));
- break;
-
- case 0x1000:
- // CPA
- m_icount -= 16;
- if (m_reg_A != RM(get_ea(opcode))) {
- // Skip next instruction
- return m_reg_P + 2;
- }
- break;
-
- case 0x1800:
- // CPB
- m_icount -= 16;
- if (m_reg_B != RM(get_ea(opcode))) {
- // Skip next instruction
- return m_reg_P + 2;
- }
- break;
-
- case 0x2000:
- // ADA
- m_icount -= 13;
- do_add(m_reg_A , RM(get_ea(opcode)));
- break;
-
- case 0x2800:
- // ADB
- m_icount -= 13;
- do_add(m_reg_B , RM(get_ea(opcode)));
- break;
-
- case 0x3000:
- // STA
- m_icount -= 13;
- WM(get_ea(opcode) , m_reg_A);
- break;
-
- case 0x3800:
- // STB
- m_icount -= 13;
- WM(get_ea(opcode) , m_reg_B);
- break;
-
- case 0x4000:
- // JSM
- m_icount -= 17;
- WM(++m_reg_R , m_reg_P);
- return get_ea(opcode);
-
- case 0x4800:
- // ISZ
- m_icount -= 19;
- ea = get_ea(opcode);
- tmp = RM(ea) + 1;
- WM(ea , tmp);
- if (tmp == 0) {
- // Skip next instruction
- return m_reg_P + 2;
- }
- break;
-
- case 0x5000:
- // AND
- m_icount -= 13;
- m_reg_A &= RM(get_ea(opcode));
- break;
-
- case 0x5800:
- // DSZ
- m_icount -= 19;
- ea = get_ea(opcode);
- tmp = RM(ea) - 1;
- WM(ea , tmp);
- if (tmp == 0) {
- // Skip next instruction
- return m_reg_P + 2;
- }
- break;
-
- case 0x6000:
- // IOR
- m_icount -= 13;
- m_reg_A |= RM(get_ea(opcode));
- break;
-
- case 0x6800:
- // JMP
- m_icount -= 8;
- return get_ea(opcode);
-
- default:
- switch (opcode & 0xfec0) {
- case 0x7400:
- // RZA
- // SZA
- m_icount -= 14;
- return get_skip_addr(opcode , m_reg_A == 0);
-
- case 0x7440:
- // RIA
- // SIA
- m_icount -= 14;
- return get_skip_addr(opcode , m_reg_A++ == 0);
-
- case 0x7480:
- // SFS
- // SFC
- m_icount -= 14;
- // TODO: read flag bit
- return get_skip_addr(opcode , true);
-
- case 0x7C00:
- // RZB
- // SZB
- m_icount -= 14;
- return get_skip_addr(opcode , m_reg_B == 0);
-
- case 0x7C40:
- // RIB
- // SIB
- m_icount -= 14;
- return get_skip_addr(opcode , m_reg_B++ == 0);
-
- case 0x7c80:
- // SSS
- // SSC
- m_icount -= 14;
- // TODO: read status bit
- return get_skip_addr(opcode , true);
-
- case 0x7cc0:
- // SHS
- // SHC
- m_icount -= 14;
- return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_HALT_BIT));
-
- default:
- switch (opcode & 0xfe00) {
- case 0x7600:
- // SLA
- // RLA
- m_icount -= 14;
- return get_skip_addr_sc(opcode , m_reg_A , 0);
-
- case 0x7e00:
- // SLB
- // RLB
- m_icount -= 14;
- return get_skip_addr_sc(opcode , m_reg_B , 0);
-
- case 0xf400:
- // SAP
- // SAM
- m_icount -= 14;
- return get_skip_addr_sc(opcode , m_reg_A , 15);
-
- case 0xf600:
- // SOC
- // SOS
- m_icount -= 14;
- return get_skip_addr_sc(opcode , m_flags , HPHYBRID_O_BIT);
-
- case 0xfc00:
- // SBP
- // SBM
- m_icount -= 14;
- return get_skip_addr_sc(opcode , m_reg_B , 15);
-
- case 0xfe00:
- // SEC
- // SES
- m_icount -= 14;
- return get_skip_addr_sc(opcode , m_flags , HPHYBRID_C_BIT);
-
- default:
- switch (opcode & 0xfff0) {
- case 0xf100:
- // AAR
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- // A shift by 16 positions is equivalent to a shift by 15
- tmp = tmp > 15 ? 15 : tmp;
- m_reg_A = ((m_reg_A ^ 0x8000) >> tmp) - (0x8000 >> tmp);
- break;
-
- case 0xf900:
- // ABR
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- tmp = tmp > 15 ? 15 : tmp;
- m_reg_B = ((m_reg_B ^ 0x8000) >> tmp) - (0x8000 >> tmp);
- break;
-
- case 0xf140:
- // SAR
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- m_reg_A >>= tmp;
- break;
-
- case 0xf940:
- // SBR
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- m_reg_B >>= tmp;
- break;
-
- case 0xf180:
- // SAL
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- m_reg_A <<= tmp;
- break;
-
- case 0xf980:
- // SBL
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- m_reg_B <<= tmp;
- break;
-
- case 0xf1c0:
- // RAR
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- m_reg_A = (m_reg_A >> tmp) | (m_reg_A << (16 - tmp));
- break;
-
- case 0xf9c0:
- // RBR
- tmp = (opcode & 0xf) + 1;
- m_icount -= (9 + tmp);
- m_reg_B = (m_reg_B >> tmp) | (m_reg_B << (16 - tmp));
- break;
-
- default:
- if ((opcode & 0xf760) == 0x7160) {
- // Place/withdraw instructions
- m_icount -= 23;
- do_pw(opcode);
- } else if ((opcode & 0xff80) == 0xf080) {
- // RET
- m_icount -= 16;
- if (BIT(opcode , 6)) {
- // Pop PA stack
- if (BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) {
- BIT_CLR(m_flags , HPHYBRID_IRH_SVC_BIT);
- memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS);
- } else if (BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
- BIT_CLR(m_flags , HPHYBRID_IRL_SVC_BIT);
- memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS);
- }
- }
- tmp = RM(m_reg_R--) + (opcode & 0x1f);
- return BIT(opcode , 5) ? tmp - 0x20 : tmp;
- } else {
- switch (opcode) {
- case 0x7100:
- // SDO
- m_icount -= 12;
- BIT_SET(m_flags , HPHYBRID_DMADIR_BIT);
- break;
-
- case 0x7108:
- // SDI
- m_icount -= 12;
- BIT_CLR(m_flags , HPHYBRID_DMADIR_BIT);
- break;
-
- case 0x7110:
- // EIR
- m_icount -= 12;
- BIT_SET(m_flags , HPHYBRID_INTEN_BIT);
- break;
-
- case 0x7118:
- // DIR
- m_icount -= 12;
- BIT_CLR(m_flags , HPHYBRID_INTEN_BIT);
- break;
-
- case 0x7120:
- // DMA
- m_icount -= 12;
- BIT_SET(m_flags , HPHYBRID_DMAEN_BIT);
- break;
-
- case 0x7138:
- // DDR
- m_icount -= 12;
- BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT);
- break;
-
- case 0x7140:
- // DBL
- m_icount -= 12;
- BIT_CLR(m_flags , HPHYBRID_DB_BIT);
- break;
-
- case 0x7148:
- // CBL
- m_icount -= 12;
- BIT_CLR(m_flags , HPHYBRID_CB_BIT);
- break;
-
- case 0x7150:
- // DBU
- m_icount -= 12;
- BIT_SET(m_flags , HPHYBRID_DB_BIT);
- break;
-
- case 0x7158:
- // CBU
- m_icount -= 12;
- BIT_SET(m_flags , HPHYBRID_CB_BIT);
- break;
-
- case 0xf020:
- // TCA
- m_icount -= 9;
- m_reg_A = ~m_reg_A;
- do_add(m_reg_A , 1);
- break;
-
- case 0xf060:
- // CMA
- m_icount -= 9;
- m_reg_A = ~m_reg_A;
- break;
-
- case 0xf820:
- // TCB
- m_icount -= 9;
- m_reg_B = ~m_reg_B;
- do_add(m_reg_B , 1);
- break;
-
- case 0xf860:
- // CMB
- m_icount -= 9;
- m_reg_B = ~m_reg_B;
- break;
-
- default:
- // Unrecognized instructions: NOP
- // Execution time is fictional
- m_icount -= 6;
- }
- }
- }
- }
- }
- }
-
- return m_reg_P + 1;
+ UINT16 ea;
+ UINT16 tmp;
+
+ switch (opcode & 0x7800) {
+ case 0x0000:
+ // LDA
+ m_icount -= 13;
+ m_reg_A = RM(get_ea(opcode));
+ break;
+
+ case 0x0800:
+ // LDB
+ m_icount -= 13;
+ m_reg_B = RM(get_ea(opcode));
+ break;
+
+ case 0x1000:
+ // CPA
+ m_icount -= 16;
+ if (m_reg_A != RM(get_ea(opcode))) {
+ // Skip next instruction
+ return m_reg_P + 2;
+ }
+ break;
+
+ case 0x1800:
+ // CPB
+ m_icount -= 16;
+ if (m_reg_B != RM(get_ea(opcode))) {
+ // Skip next instruction
+ return m_reg_P + 2;
+ }
+ break;
+
+ case 0x2000:
+ // ADA
+ m_icount -= 13;
+ do_add(m_reg_A , RM(get_ea(opcode)));
+ break;
+
+ case 0x2800:
+ // ADB
+ m_icount -= 13;
+ do_add(m_reg_B , RM(get_ea(opcode)));
+ break;
+
+ case 0x3000:
+ // STA
+ m_icount -= 13;
+ WM(get_ea(opcode) , m_reg_A);
+ break;
+
+ case 0x3800:
+ // STB
+ m_icount -= 13;
+ WM(get_ea(opcode) , m_reg_B);
+ break;
+
+ case 0x4000:
+ // JSM
+ m_icount -= 17;
+ WM(++m_reg_R , m_reg_P);
+ return get_ea(opcode);
+
+ case 0x4800:
+ // ISZ
+ m_icount -= 19;
+ ea = get_ea(opcode);
+ tmp = RM(ea) + 1;
+ WM(ea , tmp);
+ if (tmp == 0) {
+ // Skip next instruction
+ return m_reg_P + 2;
+ }
+ break;
+
+ case 0x5000:
+ // AND
+ m_icount -= 13;
+ m_reg_A &= RM(get_ea(opcode));
+ break;
+
+ case 0x5800:
+ // DSZ
+ m_icount -= 19;
+ ea = get_ea(opcode);
+ tmp = RM(ea) - 1;
+ WM(ea , tmp);
+ if (tmp == 0) {
+ // Skip next instruction
+ return m_reg_P + 2;
+ }
+ break;
+
+ case 0x6000:
+ // IOR
+ m_icount -= 13;
+ m_reg_A |= RM(get_ea(opcode));
+ break;
+
+ case 0x6800:
+ // JMP
+ m_icount -= 8;
+ return get_ea(opcode);
+
+ default:
+ switch (opcode & 0xfec0) {
+ case 0x7400:
+ // RZA
+ // SZA
+ m_icount -= 14;
+ return get_skip_addr(opcode , m_reg_A == 0);
+
+ case 0x7440:
+ // RIA
+ // SIA
+ m_icount -= 14;
+ return get_skip_addr(opcode , m_reg_A++ == 0);
+
+ case 0x7480:
+ // SFS
+ // SFC
+ m_icount -= 14;
+ // TODO: read flag bit
+ return get_skip_addr(opcode , true);
+
+ case 0x7C00:
+ // RZB
+ // SZB
+ m_icount -= 14;
+ return get_skip_addr(opcode , m_reg_B == 0);
+
+ case 0x7C40:
+ // RIB
+ // SIB
+ m_icount -= 14;
+ return get_skip_addr(opcode , m_reg_B++ == 0);
+
+ case 0x7c80:
+ // SSS
+ // SSC
+ m_icount -= 14;
+ // TODO: read status bit
+ return get_skip_addr(opcode , true);
+
+ case 0x7cc0:
+ // SHS
+ // SHC
+ m_icount -= 14;
+ return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_HALT_BIT));
+
+ default:
+ switch (opcode & 0xfe00) {
+ case 0x7600:
+ // SLA
+ // RLA
+ m_icount -= 14;
+ return get_skip_addr_sc(opcode , m_reg_A , 0);
+
+ case 0x7e00:
+ // SLB
+ // RLB
+ m_icount -= 14;
+ return get_skip_addr_sc(opcode , m_reg_B , 0);
+
+ case 0xf400:
+ // SAP
+ // SAM
+ m_icount -= 14;
+ return get_skip_addr_sc(opcode , m_reg_A , 15);
+
+ case 0xf600:
+ // SOC
+ // SOS
+ m_icount -= 14;
+ return get_skip_addr_sc(opcode , m_flags , HPHYBRID_O_BIT);
+
+ case 0xfc00:
+ // SBP
+ // SBM
+ m_icount -= 14;
+ return get_skip_addr_sc(opcode , m_reg_B , 15);
+
+ case 0xfe00:
+ // SEC
+ // SES
+ m_icount -= 14;
+ return get_skip_addr_sc(opcode , m_flags , HPHYBRID_C_BIT);
+
+ default:
+ switch (opcode & 0xfff0) {
+ case 0xf100:
+ // AAR
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ // A shift by 16 positions is equivalent to a shift by 15
+ tmp = tmp > 15 ? 15 : tmp;
+ m_reg_A = ((m_reg_A ^ 0x8000) >> tmp) - (0x8000 >> tmp);
+ break;
+
+ case 0xf900:
+ // ABR
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ tmp = tmp > 15 ? 15 : tmp;
+ m_reg_B = ((m_reg_B ^ 0x8000) >> tmp) - (0x8000 >> tmp);
+ break;
+
+ case 0xf140:
+ // SAR
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ m_reg_A >>= tmp;
+ break;
+
+ case 0xf940:
+ // SBR
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ m_reg_B >>= tmp;
+ break;
+
+ case 0xf180:
+ // SAL
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ m_reg_A <<= tmp;
+ break;
+
+ case 0xf980:
+ // SBL
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ m_reg_B <<= tmp;
+ break;
+
+ case 0xf1c0:
+ // RAR
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ m_reg_A = (m_reg_A >> tmp) | (m_reg_A << (16 - tmp));
+ break;
+
+ case 0xf9c0:
+ // RBR
+ tmp = (opcode & 0xf) + 1;
+ m_icount -= (9 + tmp);
+ m_reg_B = (m_reg_B >> tmp) | (m_reg_B << (16 - tmp));
+ break;
+
+ default:
+ if ((opcode & 0xf760) == 0x7160) {
+ // Place/withdraw instructions
+ m_icount -= 23;
+ do_pw(opcode);
+ } else if ((opcode & 0xff80) == 0xf080) {
+ // RET
+ m_icount -= 16;
+ if (BIT(opcode , 6)) {
+ // Pop PA stack
+ if (BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) {
+ BIT_CLR(m_flags , HPHYBRID_IRH_SVC_BIT);
+ memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS);
+ } else if (BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
+ BIT_CLR(m_flags , HPHYBRID_IRL_SVC_BIT);
+ memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS);
+ }
+ }
+ tmp = RM(m_reg_R--) + (opcode & 0x1f);
+ return BIT(opcode , 5) ? tmp - 0x20 : tmp;
+ } else {
+ switch (opcode) {
+ case 0x7100:
+ // SDO
+ m_icount -= 12;
+ BIT_SET(m_flags , HPHYBRID_DMADIR_BIT);
+ break;
+
+ case 0x7108:
+ // SDI
+ m_icount -= 12;
+ BIT_CLR(m_flags , HPHYBRID_DMADIR_BIT);
+ break;
+
+ case 0x7110:
+ // EIR
+ m_icount -= 12;
+ BIT_SET(m_flags , HPHYBRID_INTEN_BIT);
+ break;
+
+ case 0x7118:
+ // DIR
+ m_icount -= 12;
+ BIT_CLR(m_flags , HPHYBRID_INTEN_BIT);
+ break;
+
+ case 0x7120:
+ // DMA
+ m_icount -= 12;
+ BIT_SET(m_flags , HPHYBRID_DMAEN_BIT);
+ break;
+
+ case 0x7138:
+ // DDR
+ m_icount -= 12;
+ BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT);
+ break;
+
+ case 0x7140:
+ // DBL
+ m_icount -= 12;
+ BIT_CLR(m_flags , HPHYBRID_DB_BIT);
+ break;
+
+ case 0x7148:
+ // CBL
+ m_icount -= 12;
+ BIT_CLR(m_flags , HPHYBRID_CB_BIT);
+ break;
+
+ case 0x7150:
+ // DBU
+ m_icount -= 12;
+ BIT_SET(m_flags , HPHYBRID_DB_BIT);
+ break;
+
+ case 0x7158:
+ // CBU
+ m_icount -= 12;
+ BIT_SET(m_flags , HPHYBRID_CB_BIT);
+ break;
+
+ case 0xf020:
+ // TCA
+ m_icount -= 9;
+ m_reg_A = ~m_reg_A;
+ do_add(m_reg_A , 1);
+ break;
+
+ case 0xf060:
+ // CMA
+ m_icount -= 9;
+ m_reg_A = ~m_reg_A;
+ break;
+
+ case 0xf820:
+ // TCB
+ m_icount -= 9;
+ m_reg_B = ~m_reg_B;
+ do_add(m_reg_B , 1);
+ break;
+
+ case 0xf860:
+ // CMB
+ m_icount -= 9;
+ m_reg_B = ~m_reg_B;
+ break;
+
+ default:
+ // Unrecognized instructions: NOP
+ // Execution time is fictional
+ m_icount -= 6;
+ }
+ }
+ }
+ }
+ }
+ }
+
+ return m_reg_P + 1;
}
void hp_hybrid_cpu_device::state_string_export(const device_state_entry &entry, std::string &str)
{
- if (entry.index() == STATE_GENFLAGS) {
- strprintf(str, "%s %s %c %c",
- BIT(m_flags , HPHYBRID_DB_BIT) ? "Db":"..",
- BIT(m_flags , HPHYBRID_CB_BIT) ? "Cb":"..",
- BIT(m_flags , HPHYBRID_O_BIT) ? 'O':'.',
- BIT(m_flags , HPHYBRID_C_BIT) ? 'E':'.');
- }
+ if (entry.index() == STATE_GENFLAGS) {
+ strprintf(str, "%s %s %c %c",
+ BIT(m_flags , HPHYBRID_DB_BIT) ? "Db":"..",
+ BIT(m_flags , HPHYBRID_CB_BIT) ? "Cb":"..",
+ BIT(m_flags , HPHYBRID_O_BIT) ? 'O':'.',
+ BIT(m_flags , HPHYBRID_C_BIT) ? 'E':'.');
+ }
}
offs_t hp_hybrid_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
{
- extern CPU_DISASSEMBLE(hp_hybrid);
- return CPU_DISASSEMBLE_NAME(hp_hybrid)(this, buffer, pc, oprom, opram, options);
+ extern CPU_DISASSEMBLE(hp_hybrid);
+ return CPU_DISASSEMBLE_NAME(hp_hybrid)(this, buffer, pc, oprom, opram, options);
}
UINT16 hp_hybrid_cpu_device::get_ea(UINT16 opcode)
{
- UINT16 base;
- UINT16 off;
-
- if (BIT(opcode , 10)) {
- // Current page
- base = m_reg_P;
- } else {
- // Base page
- base = 0;
- }
-
- off = opcode & 0x3ff;
- if (off & 0x200) {
- off -= 0x400;
- }
-
- base += off;
-
- if (BIT(opcode , 15)) {
- // Indirect addressing
- m_icount -= 6;
- return RM(base);
- } else {
- // Direct addressing
- return base;
- }
+ UINT16 base;
+ UINT16 off;
+
+ if (BIT(opcode , 10)) {
+ // Current page
+ base = m_reg_P;
+ } else {
+ // Base page
+ base = 0;
+ }
+
+ off = opcode & 0x3ff;
+ if (off & 0x200) {
+ off -= 0x400;
+ }
+
+ base += off;
+
+ if (BIT(opcode , 15)) {
+ // Indirect addressing
+ m_icount -= 6;
+ return RM(base);
+ } else {
+ // Direct addressing
+ return base;
+ }
}
void hp_hybrid_cpu_device::do_add(UINT16& addend1 , UINT16 addend2)
{
- UINT32 tmp = addend1 + addend2;
+ UINT32 tmp = addend1 + addend2;
- if (BIT(tmp , 16)) {
- // Carry
- BIT_SET(m_flags , HPHYBRID_C_BIT);
- }
+ if (BIT(tmp , 16)) {
+ // Carry
+ BIT_SET(m_flags , HPHYBRID_C_BIT);
+ }
- if (BIT((tmp ^ addend1) & (tmp ^ addend2) , 15)) {
- // Overflow
- BIT_SET(m_flags , HPHYBRID_O_BIT);
- }
+ if (BIT((tmp ^ addend1) & (tmp ^ addend2) , 15)) {
+ // Overflow
+ BIT_SET(m_flags , HPHYBRID_O_BIT);
+ }
- addend1 = (UINT16)tmp;
+ addend1 = (UINT16)tmp;
}
UINT16 hp_hybrid_cpu_device::get_skip_addr(UINT16 opcode , bool condition) const
{
- bool skip_val = BIT(opcode , 8) != 0;
-
- if (condition == skip_val) {
- UINT16 off = opcode & 0x1f;
-
- if (BIT(opcode , 5)) {
- off -= 0x20;
- }
- return m_reg_P + off;
- } else {
- return m_reg_P + 1;
- }
+ bool skip_val = BIT(opcode , 8) != 0;
+
+ if (condition == skip_val) {
+ UINT16 off = opcode & 0x1f;
+
+ if (BIT(opcode , 5)) {
+ off -= 0x20;
+ }
+ return m_reg_P + off;
+ } else {
+ return m_reg_P + 1;
+ }
}
UINT16 hp_hybrid_cpu_device::get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n)
{
- bool val = BIT(v , n);
+ bool val = BIT(v , n);
- if (BIT(opcode , 7)) {
- if (BIT(opcode , 6)) {
- BIT_SET(v , n);
- } else {
- BIT_CLR(v , n);
- }
- }
+ if (BIT(opcode , 7)) {
+ if (BIT(opcode , 6)) {
+ BIT_SET(v , n);
+ } else {
+ BIT_CLR(v , n);
+ }
+ }
- return get_skip_addr(opcode , val);
+ return get_skip_addr(opcode , val);
}
void hp_hybrid_cpu_device::do_pw(UINT16 opcode)
{
- UINT16 tmp;
- UINT16 reg_addr = opcode & 7;
- UINT16 *ptr_reg;
- UINT16 b_mask;
-
- if (BIT(opcode , 3)) {
- ptr_reg = &m_reg_D;
- b_mask = BIT_MASK(HPHYBRID_DB_BIT);
- } else {
- ptr_reg = &m_reg_C;
- b_mask = BIT_MASK(HPHYBRID_CB_BIT);
- }
-
- if (BIT(opcode , 4)) {
- // Withdraw
- if (BIT(opcode , 11)) {
- // Byte
- UINT32 tmp_addr = (UINT32)(*ptr_reg);
- if (m_flags & b_mask) {
- tmp_addr |= 0x10000;
- }
- tmp = RM((UINT16)(tmp_addr >> 1));
- if (BIT(tmp_addr , 0)) {
- tmp &= 0xff;
- } else {
- tmp >>= 8;
- }
- } else {
- // Word
- tmp = RM(*ptr_reg);
- }
- WM(reg_addr , tmp);
-
- if (BIT(opcode , 7)) {
- // Post-decrement
- if ((*ptr_reg)-- == 0) {
- m_flags ^= b_mask;
- }
- } else {
- // Post-increment
- if (++(*ptr_reg) == 0) {
- m_flags ^= b_mask;
- }
- }
- } else {
- // Place
- if (BIT(opcode , 7)) {
- // Pre-decrement
- if ((*ptr_reg)-- == 0) {
- m_flags ^= b_mask;
- }
- } else {
- // Pre-increment
- if (++(*ptr_reg) == 0) {
- m_flags ^= b_mask;
- }
- }
- tmp = RM(reg_addr);
- if (BIT(opcode , 11)) {
- // Byte
- UINT32 tmp_addr = (UINT32)(*ptr_reg);
- if (m_flags & b_mask) {
- tmp_addr |= 0x10000;
- }
- WMB(tmp_addr , (UINT8)tmp);
- } else {
- // Word
- WM(*ptr_reg , tmp);
- }
- }
+ UINT16 tmp;
+ UINT16 reg_addr = opcode & 7;
+ UINT16 *ptr_reg;
+ UINT16 b_mask;
+
+ if (BIT(opcode , 3)) {
+ ptr_reg = &m_reg_D;
+ b_mask = BIT_MASK(HPHYBRID_DB_BIT);
+ } else {
+ ptr_reg = &m_reg_C;
+ b_mask = BIT_MASK(HPHYBRID_CB_BIT);
+ }
+
+ if (BIT(opcode , 4)) {
+ // Withdraw
+ if (BIT(opcode , 11)) {
+ // Byte
+ UINT32 tmp_addr = (UINT32)(*ptr_reg);
+ if (m_flags & b_mask) {
+ tmp_addr |= 0x10000;
+ }
+ tmp = RM((UINT16)(tmp_addr >> 1));
+ if (BIT(tmp_addr , 0)) {
+ tmp &= 0xff;
+ } else {
+ tmp >>= 8;
+ }
+ } else {
+ // Word
+ tmp = RM(*ptr_reg);
+ }
+ WM(reg_addr , tmp);
+
+ if (BIT(opcode , 7)) {
+ // Post-decrement
+ if ((*ptr_reg)-- == 0) {
+ m_flags ^= b_mask;
+ }
+ } else {
+ // Post-increment
+ if (++(*ptr_reg) == 0) {
+ m_flags ^= b_mask;
+ }
+ }
+ } else {
+ // Place
+ if (BIT(opcode , 7)) {
+ // Pre-decrement
+ if ((*ptr_reg)-- == 0) {
+ m_flags ^= b_mask;
+ }
+ } else {
+ // Pre-increment
+ if (++(*ptr_reg) == 0) {
+ m_flags ^= b_mask;
+ }
+ }
+ tmp = RM(reg_addr);
+ if (BIT(opcode , 11)) {
+ // Byte
+ UINT32 tmp_addr = (UINT32)(*ptr_reg);
+ if (m_flags & b_mask) {
+ tmp_addr |= 0x10000;
+ }
+ WMB(tmp_addr , (UINT8)tmp);
+ } else {
+ // Word
+ WM(*ptr_reg , tmp);
+ }
+ }
}
void hp_hybrid_cpu_device::check_for_interrupts(void)
{
- if (!BIT(m_flags , HPHYBRID_INTEN_BIT) || BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) {
- return;
- }
-
- int irqline;
-
- if (BIT(m_flags , HPHYBRID_IRH_BIT)) {
- // Service high-level interrupt
- BIT_SET(m_flags , HPHYBRID_IRH_SVC_BIT);
- irqline = HPHYBRID_IRH;
- } else if (BIT(m_flags , HPHYBRID_IRL_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
- // Service low-level interrupt
- BIT_SET(m_flags , HPHYBRID_IRL_SVC_BIT);
- irqline = HPHYBRID_IRL;
- } else {
- return;
- }
-
- // Get interrupt vector in low byte
- UINT8 vector = (UINT8)standard_irq_callback(irqline);
- UINT8 new_PA;
-
- // Get highest numbered 1
- // Don't know what happens if vector is 0, here we assume bit 7 = 1
- if (vector == 0) {
- new_PA = 7;
- } else {
- for (new_PA = 7; new_PA && !BIT(vector , 7); new_PA--, vector <<= 1) {
- }
- }
- if (irqline == HPHYBRID_IRH) {
- BIT_SET(new_PA , 3);
- }
-
- // Push PA stack
- memmove(&m_reg_PA[ 1 ] , &m_reg_PA[ 0 ] , HPHYBRID_INT_LVLS);
-
- CURRENT_PA = new_PA;
-
- // Is this correct? Patent @ pg 210 suggests that the whole interrupt recognition sequence
- // lasts for 32 cycles (6 are already accounted for in get_ea for one indirection)
- m_icount -= 26;
-
- // Do a double-indirect JSM IV,I instruction
- WM(++m_reg_R , m_reg_P);
- m_reg_P = RM(get_ea(0xc008));
- m_reg_I = RM(m_reg_P);
+ if (!BIT(m_flags , HPHYBRID_INTEN_BIT) || BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) {
+ return;
+ }
+
+ int irqline;
+
+ if (BIT(m_flags , HPHYBRID_IRH_BIT)) {
+ // Service high-level interrupt
+ BIT_SET(m_flags , HPHYBRID_IRH_SVC_BIT);
+ irqline = HPHYBRID_IRH;
+ } else if (BIT(m_flags , HPHYBRID_IRL_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
+ // Service low-level interrupt
+ BIT_SET(m_flags , HPHYBRID_IRL_SVC_BIT);
+ irqline = HPHYBRID_IRL;
+ } else {
+ return;
+ }
+
+ // Get interrupt vector in low byte
+ UINT8 vector = (UINT8)standard_irq_callback(irqline);
+ UINT8 new_PA;
+
+ // Get highest numbered 1
+ // Don't know what happens if vector is 0, here we assume bit 7 = 1
+ if (vector == 0) {
+ new_PA = 7;
+ } else {
+ for (new_PA = 7; new_PA && !BIT(vector , 7); new_PA--, vector <<= 1) {
+ }
+ }
+ if (irqline == HPHYBRID_IRH) {
+ BIT_SET(new_PA , 3);
+ }
+
+ // Push PA stack
+ memmove(&m_reg_PA[ 1 ] , &m_reg_PA[ 0 ] , HPHYBRID_INT_LVLS);
+
+ CURRENT_PA = new_PA;
+
+ // Is this correct? Patent @ pg 210 suggests that the whole interrupt recognition sequence
+ // lasts for 32 cycles (6 are already accounted for in get_ea for one indirection)
+ m_icount -= 26;
+
+ // Do a double-indirect JSM IV,I instruction
+ WM(++m_reg_R , m_reg_P);
+ m_reg_P = RM(get_ea(0xc008));
+ m_reg_I = RM(m_reg_P);
}
void hp_hybrid_cpu_device::handle_dma(void)
{
- // Patent hints at the fact that terminal count is detected by bit 15 of dmac being 1 after decrementing
- bool tc = BIT(--m_dmac , 15) != 0;
- UINT16 tmp;
-
- if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) {
- // "Outward" DMA: memory -> peripheral
- tmp = RM(m_dmama++);
- WIO(m_dmapa , tc ? 2 : 0 , tmp);
- m_icount -= 10;
- } else {
- // "Inward" DMA: peripheral -> memory
- tmp = RIO(m_dmapa , tc ? 2 : 0);
- WM(m_dmama++ , tmp);
- m_icount -= 9;
- }
-
- // This is the one of the biggest question marks: is the DMA automatically disabled on TC?
- // Here we assume it is. After all it would make no difference because there is no way
- // to read the DMA enable flag back, so each time the DMA is needed it has to be enabled again.
- if (tc) {
- BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT);
- }
+ // Patent hints at the fact that terminal count is detected by bit 15 of dmac being 1 after decrementing
+ bool tc = BIT(--m_dmac , 15) != 0;
+ UINT16 tmp;
+
+ if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) {
+ // "Outward" DMA: memory -> peripheral
+ tmp = RM(m_dmama++);
+ WIO(m_dmapa , tc ? 2 : 0 , tmp);
+ m_icount -= 10;
+ } else {
+ // "Inward" DMA: peripheral -> memory
+ tmp = RIO(m_dmapa , tc ? 2 : 0);
+ WM(m_dmama++ , tmp);
+ m_icount -= 9;
+ }
+
+ // This is the one of the biggest question marks: is the DMA automatically disabled on TC?
+ // Here we assume it is. After all it would make no difference because there is no way
+ // to read the DMA enable flag back, so each time the DMA is needed it has to be enabled again.
+ if (tc) {
+ BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT);
+ }
}
UINT16 hp_hybrid_cpu_device::RM(UINT16 addr)
{
- UINT16 tmp;
-
- if (addr <= HP_REG_LAST_ADDR) {
- // Memory mapped registers
- switch (addr) {
- case HP_REG_A_ADDR:
- return m_reg_A;
-
- case HP_REG_B_ADDR:
- return m_reg_B;
-
- case HP_REG_P_ADDR:
- return m_reg_P;
-
- case HP_REG_R_ADDR:
- return m_reg_R;
-
- case HP_REG_R4_ADDR:
- case HP_REG_R5_ADDR:
- case HP_REG_R6_ADDR:
- case HP_REG_R7_ADDR:
- return RIO(CURRENT_PA , addr - HP_REG_R4_ADDR);
-
- case HP_REG_IV_ADDR:
- // Correct?
- if (!BIT(m_flags , HPHYBRID_IRH_SVC_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
- return m_reg_IV;
- } else {
- return m_reg_IV | CURRENT_PA;
- }
-
- case HP_REG_PA_ADDR:
- return CURRENT_PA;
-
- case HP_REG_DMAPA_ADDR:
- tmp = m_dmapa & HP_REG_PA_MASK;
- if (BIT(m_flags , HPHYBRID_CB_BIT)) {
- BIT_SET(tmp , 15);
- }
- if (BIT(m_flags , HPHYBRID_DB_BIT)) {
- BIT_SET(tmp , 14);
- }
- return tmp;
-
- case HP_REG_DMAMA_ADDR:
- return m_dmama;
-
- case HP_REG_DMAC_ADDR:
- return m_dmac;
-
- case HP_REG_C_ADDR:
- return m_reg_C;
-
- case HP_REG_D_ADDR:
- return m_reg_D;
-
- default:
- // Unknown registers are returned as 0
- return 0;
- }
- } else {
- return m_direct->read_word((offs_t)addr << 1);
- }
+ UINT16 tmp;
+
+ if (addr <= HP_REG_LAST_ADDR) {
+ // Memory mapped registers
+ switch (addr) {
+ case HP_REG_A_ADDR:
+ return m_reg_A;
+
+ case HP_REG_B_ADDR:
+ return m_reg_B;
+
+ case HP_REG_P_ADDR:
+ return m_reg_P;
+
+ case HP_REG_R_ADDR:
+ return m_reg_R;
+
+ case HP_REG_R4_ADDR:
+ case HP_REG_R5_ADDR:
+ case HP_REG_R6_ADDR:
+ case HP_REG_R7_ADDR:
+ return RIO(CURRENT_PA , addr - HP_REG_R4_ADDR);
+
+ case HP_REG_IV_ADDR:
+ // Correct?
+ if (!BIT(m_flags , HPHYBRID_IRH_SVC_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
+ return m_reg_IV;
+ } else {
+ return m_reg_IV | CURRENT_PA;
+ }
+
+ case HP_REG_PA_ADDR:
+ return CURRENT_PA;
+
+ case HP_REG_DMAPA_ADDR:
+ tmp = m_dmapa & HP_REG_PA_MASK;
+ if (BIT(m_flags , HPHYBRID_CB_BIT)) {
+ BIT_SET(tmp , 15);
+ }
+ if (BIT(m_flags , HPHYBRID_DB_BIT)) {
+ BIT_SET(tmp , 14);
+ }
+ return tmp;
+
+ case HP_REG_DMAMA_ADDR:
+ return m_dmama;
+
+ case HP_REG_DMAC_ADDR:
+ return m_dmac;
+
+ case HP_REG_C_ADDR:
+ return m_reg_C;
+
+ case HP_REG_D_ADDR:
+ return m_reg_D;
+
+ default:
+ // Unknown registers are returned as 0
+ return 0;
+ }
+ } else {
+ return m_direct->read_word((offs_t)addr << 1);
+ }
}
void hp_hybrid_cpu_device::WM(UINT16 addr , UINT16 v)
{
- if (addr <= HP_REG_LAST_ADDR) {
- // Memory mapped registers
- switch (addr) {
- case HP_REG_A_ADDR:
- m_reg_A = v;
- break;
-
- case HP_REG_B_ADDR:
- m_reg_B = v;
- break;
-
- case HP_REG_P_ADDR:
- m_reg_P = v;
- break;
-
- case HP_REG_R_ADDR:
- m_reg_R = v;
- break;
-
- case HP_REG_R4_ADDR:
- case HP_REG_R5_ADDR:
- case HP_REG_R6_ADDR:
- case HP_REG_R7_ADDR:
- WIO(CURRENT_PA , addr - HP_REG_R4_ADDR , v);
- break;
-
- case HP_REG_IV_ADDR:
- m_reg_IV = v & HP_REG_IV_MASK;
- break;
-
- case HP_REG_PA_ADDR:
- CURRENT_PA = v & HP_REG_PA_MASK;
- break;
-
- case HP_REG_DMAPA_ADDR:
- m_dmapa = v & HP_REG_PA_MASK;
- break;
-
- case HP_REG_DMAMA_ADDR:
- m_dmama = v;
- break;
-
- case HP_REG_DMAC_ADDR:
- m_dmac = v;
- break;
-
- case HP_REG_C_ADDR:
- m_reg_C = v;
- break;
-
- case HP_REG_D_ADDR:
- m_reg_D = v;
- break;
-
- default:
- // Unknown registers are silently discarded
- break;
- }
- } else {
- m_program->write_word((offs_t)addr << 1 , v);
- }
+ if (addr <= HP_REG_LAST_ADDR) {
+ // Memory mapped registers
+ switch (addr) {
+ case HP_REG_A_ADDR:
+ m_reg_A = v;
+ break;
+
+ case HP_REG_B_ADDR:
+ m_reg_B = v;
+ break;
+
+ case HP_REG_P_ADDR:
+ m_reg_P = v;
+ break;
+
+ case HP_REG_R_ADDR:
+ m_reg_R = v;
+ break;
+
+ case HP_REG_R4_ADDR:
+ case HP_REG_R5_ADDR:
+ case HP_REG_R6_ADDR:
+ case HP_REG_R7_ADDR:
+ WIO(CURRENT_PA , addr - HP_REG_R4_ADDR , v);
+ break;
+
+ case HP_REG_IV_ADDR:
+ m_reg_IV = v & HP_REG_IV_MASK;
+ break;
+
+ case HP_REG_PA_ADDR:
+ CURRENT_PA = v & HP_REG_PA_MASK;
+ break;
+
+ case HP_REG_DMAPA_ADDR:
+ m_dmapa = v & HP_REG_PA_MASK;
+ break;
+
+ case HP_REG_DMAMA_ADDR:
+ m_dmama = v;
+ break;
+
+ case HP_REG_DMAC_ADDR:
+ m_dmac = v;
+ break;
+
+ case HP_REG_C_ADDR:
+ m_reg_C = v;
+ break;
+
+ case HP_REG_D_ADDR:
+ m_reg_D = v;
+ break;
+
+ default:
+ // Unknown registers are silently discarded
+ break;
+ }
+ } else {
+ m_program->write_word((offs_t)addr << 1 , v);
+ }
}
void hp_hybrid_cpu_device::WMB(UINT32 addr , UINT8 v)
{
- if (addr <= (HP_REG_LAST_ADDR * 2 + 1)) {
- // Cannot write bytes to registers
- } else {
- m_program->write_byte(addr , v);
- }
+ if (addr <= (HP_REG_LAST_ADDR * 2 + 1)) {
+ // Cannot write bytes to registers
+ } else {
+ m_program->write_byte(addr , v);
+ }
}
UINT16 hp_hybrid_cpu_device::RIO(UINT8 pa , UINT8 ic)
{
- return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1);
+ return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1);
}
void hp_hybrid_cpu_device::WIO(UINT8 pa , UINT8 ic , UINT16 v)
{
- m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v);
+ m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v);
}
hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
diff --git a/src/emu/cpu/hphybrid/hphybrid.h b/src/emu/cpu/hphybrid/hphybrid.h
index 5ef9f927d0e..7683cce28b6 100644
--- a/src/emu/cpu/hphybrid/hphybrid.h
+++ b/src/emu/cpu/hphybrid/hphybrid.h
@@ -65,7 +65,7 @@
class hp_hybrid_cpu_device : public cpu_device
{
public:
- DECLARE_WRITE_LINE_MEMBER(dmar_w);
+ DECLARE_WRITE_LINE_MEMBER(dmar_w);
protected:
hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname);
@@ -126,7 +126,7 @@ private:
UINT16 get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n);
void do_pw(UINT16 opcode);
void check_for_interrupts(void);
- void handle_dma(void);
+ void handle_dma(void);
UINT16 RM(UINT16 addr);
void WM(UINT16 addr , UINT16 v);
diff --git a/src/emu/cpu/m68000/m68kcpu.c b/src/emu/cpu/m68000/m68kcpu.c
index b925594825d..bc5e7bc9b3d 100644
--- a/src/emu/cpu/m68000/m68kcpu.c
+++ b/src/emu/cpu/m68000/m68kcpu.c
@@ -2336,8 +2336,8 @@ const device_type M68K = &device_creator<m68000_base_device>;
m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, M68K, "M68K", tag, owner, clock, "m68k", __FILE__),
- m_program_config("program", ENDIANNESS_BIG, 16, 24),
- m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, 16, 24)
+ m_program_config("program", ENDIANNESS_BIG, 16, 24),
+ m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, 16, 24)
{
clear_all();
}
@@ -2348,8 +2348,8 @@ m68000_base_device::m68000_base_device(const machine_config &mconfig, const char
m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
- m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map),
- m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map)
+ m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map),
+ m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map)
{
clear_all();
}
@@ -2358,8 +2358,8 @@ m68000_base_device::m68000_base_device(const machine_config &mconfig, const char
m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
- m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits),
- m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits)
+ m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits),
+ m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits)
{
clear_all();
}
diff --git a/src/emu/cpu/rsp/rsp.c b/src/emu/cpu/rsp/rsp.c
index edea79ac688..6419282a598 100644
--- a/src/emu/cpu/rsp/rsp.c
+++ b/src/emu/cpu/rsp/rsp.c
@@ -801,9 +801,9 @@ void rsp_device::execute_run()
m_rsp_state->icount = MIN(m_rsp_state->icount, 0);
}
/*m_cop2->dump(op);
- if (((op >> 26) & 0x3f) == 0x3a)
- {
- m_cop2->dump_dmem();
- }*/
+ if (((op >> 26) & 0x3f) == 0x3a)
+ {
+ m_cop2->dump_dmem();
+ }*/
}
}
diff --git a/src/emu/cpu/rsp/rspcp2.c b/src/emu/cpu/rsp/rspcp2.c
index cde6f3b5be8..ab6afed4cbc 100644
--- a/src/emu/cpu/rsp/rspcp2.c
+++ b/src/emu/cpu/rsp/rspcp2.c
@@ -206,9 +206,9 @@ const rsp_cop2::vec_helpers_t rsp_cop2::m_vec_helpers = {
{ 0xffff, 0xffff, 0x0000, 0x0000 }, // L
{ 0xffff, 0xffff, 0xffff, 0xffff } // D
},
- { // word_reverse
- 0x0203, 0x0001, 0x0607, 0x0405, 0x0a0b, 0x0809, 0x0e0f, 0x0c0d
- }
+ { // word_reverse
+ 0x0203, 0x0001, 0x0607, 0x0405, 0x0a0b, 0x0809, 0x0e0f, 0x0c0d
+ }
};
#if !(defined(__SSSE3__) || defined(_MSC_VER))
@@ -322,7 +322,7 @@ void rsp_cop2::vec_load_group1(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
dqm = _mm_shuffle_epi8(dqm, ekey);
#endif
- // Align the data to the DQM so we can mask it in.
+ // Align the data to the DQM so we can mask it in.
#if !(defined(__SSSE3__) || defined(_MSC_VER))
data = sse2_pshufb(data, m_vec_helpers.ror_b2l_keys[ror & 0xF]);
#else
@@ -330,7 +330,7 @@ void rsp_cop2::vec_load_group1(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
data = _mm_shuffle_epi8(data, ekey);
#endif
- // Mask and mux in the data.
+ // Mask and mux in the data.
#if (defined(__SSE4_1__) || defined(_MSC_VER))
reg = _mm_blendv_epi8(reg, data, dqm);
#else
@@ -377,7 +377,7 @@ void rsp_cop2::vec_load_group2(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
}
// "Unpack" the data.
- rsp_vec_t zero = _mm_setzero_si128();
+ rsp_vec_t zero = _mm_setzero_si128();
data = _mm_unpacklo_epi8(zero, data);
if (request_type != RSP_MEM_REQUEST_PACK)
@@ -385,10 +385,10 @@ void rsp_cop2::vec_load_group2(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
data = _mm_srli_epi16(data, 1);
}
- data = _mm_shufflehi_epi16(data, _MM_SHUFFLE(0, 1, 2, 3));
- data = _mm_shufflelo_epi16(data, _MM_SHUFFLE(0, 1, 2, 3));
+ data = _mm_shufflehi_epi16(data, _MM_SHUFFLE(0, 1, 2, 3));
+ data = _mm_shufflelo_epi16(data, _MM_SHUFFLE(0, 1, 2, 3));
- _mm_store_si128((rsp_vec_t *) regp, data);
+ _mm_store_si128((rsp_vec_t *) regp, data);
}
//
@@ -403,7 +403,7 @@ void rsp_cop2::vec_load_group4(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
{
UINT32 aligned_addr = addr & 0xFF0;
UINT32 offset = addr & 0xF;
- static UINT32 call_count = 0;
+ static UINT32 call_count = 0;
rsp_vec_t data = _mm_load_si128((rsp_vec_t *) (m_rsp.get_dmem() + aligned_addr));
@@ -439,7 +439,7 @@ void rsp_cop2::vec_load_group4(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
_mm_store_si128((rsp_vec_t *) regp, data);
- call_count++;
+ call_count++;
}
//
@@ -542,7 +542,7 @@ void rsp_cop2::vec_store_group2(UINT32 addr, UINT32 element, UINT16 *regp, rsp_v
reg = _mm_shuffle_epi8(reg, dkey);
#endif
- // TODO: Always store in 8-byte chunks to emulate wraparound.
+ // TODO: Always store in 8-byte chunks to emulate wraparound.
_mm_storel_epi64((rsp_vec_t *) (m_rsp.get_dmem() + addr), reg);
}
@@ -574,7 +574,7 @@ void rsp_cop2::vec_store_group4(UINT32 addr, UINT32 element, UINT16 *regp, rsp_v
reg = _mm_shuffle_epi8(reg, ekey);
#endif
- // Mask and mux out the data, write.
+ // Mask and mux out the data, write.
#if (defined(__SSE4_1__) || defined(_MSC_VER))
data = _mm_blendv_epi8(data, reg, dqm);
#else
@@ -702,10 +702,10 @@ rsp_cop2::rsp_cop2(rsp_device &rsp, running_machine &machine)
memset(m_vflag, 0, sizeof(m_vflag));
memset(m_accum, 0, sizeof(m_accum));
#if USE_SIMD
- memset(&m_acc, 0, sizeof(m_acc));
- memset(&m_flags, 0, sizeof(aligned_rsp_2vect_t) * 3);
- m_div_out = 0;
- m_div_in = 0;
+ memset(&m_acc, 0, sizeof(m_acc));
+ memset(&m_flags, 0, sizeof(aligned_rsp_2vect_t) * 3);
+ m_div_out = 0;
+ m_div_in = 0;
#endif
m_rspcop2_state = (internal_rspcop2_state *)rsp.m_cache.alloc_near(sizeof(internal_rspcop2_state));
}
@@ -877,7 +877,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Load 1 byte to vector byte index
- //printf("LBV ");
+ //printf("LBV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -896,7 +896,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads 2 bytes starting from vector byte index
- //printf("LSV ");
+ //printf("LSV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -922,7 +922,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads 4 bytes starting from vector byte index
- //printf("LLV ");
+ //printf("LLV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -948,7 +948,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads 8 bytes starting from vector byte index
- //printf("LDV ");
+ //printf("LDV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -974,7 +974,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads up to 16 bytes starting from vector byte index
- //printf("LQV ");
+ //printf("LQV ");
#if USE_SIMD
vec_lqrv_sqrv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1001,7 +1001,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Stores up to 16 bytes starting from right side until 16-byte boundary
- //printf("LRV ");
+ //printf("LRV ");
#if USE_SIMD
vec_lqrv_sqrv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1029,7 +1029,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads a byte as the upper 8 bits of each element
- //printf("LPV ");
+ //printf("LPV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1052,7 +1052,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads a byte as the bits 14-7 of each element
- //printf("LUV ");
+ //printf("LUV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1075,7 +1075,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads a byte as the bits 14-7 of each element, with 2-byte stride
- //printf("LHV ");
+ //printf("LHV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1098,7 +1098,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//
// Loads a byte as the bits 14-7 of upper or lower quad, with 4-byte stride
- //printf("LFV ");
+ //printf("LFV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1127,7 +1127,7 @@ void rsp_cop2::handle_lwc2(UINT32 op)
// Loads the full 128-bit vector starting from vector byte index and wrapping to index 0
// after byte index 15
- //printf("LWV ");
+ //printf("LWV ");
#if USE_SIMD
#else
ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
@@ -1154,15 +1154,15 @@ void rsp_cop2::handle_lwc2(UINT32 op)
// FIXME: has a small problem with odd indices
- //printf("LTV ");
+ //printf("LTV ");
#if 0
#else
- INT32 index = (op >> 7) & 0xf;
- INT32 offset = (op & 0x7f);
- if (offset & 0x40)
- offset |= 0xffffffc0;
+ INT32 index = (op >> 7) & 0xf;
+ INT32 offset = (op & 0x7f);
+ if (offset & 0x40)
+ offset |= 0xffffffc0;
- INT32 vs = (op >> 16) & 0x1f;
+ INT32 vs = (op >> 16) & 0x1f;
INT32 ve = vs + 8;
if (ve > 32)
ve = 32;
@@ -1225,7 +1225,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores 1 byte from vector byte index
- //printf("SBV ");
+ //printf("SBV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1244,7 +1244,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores 2 bytes starting from vector byte index
- //printf("SSV ");
+ //printf("SSV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1270,7 +1270,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores 4 bytes starting from vector byte index
- //printf("SLV ");
+ //printf("SLV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1296,7 +1296,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores 8 bytes starting from vector byte index
- //printf("SDV ");
+ //printf("SDV ");
#if USE_SIMD
vec_lbdlsv_sbdlsv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1322,7 +1322,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores up to 16 bytes starting from vector byte index until 16-byte boundary
- //printf("SQV ");
+ //printf("SQV ");
#if USE_SIMD
vec_lqrv_sqrv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1348,7 +1348,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores up to 16 bytes starting from right side until 16-byte boundary
- //printf("SRV ");
+ //printf("SRV ");
#if USE_SIMD
vec_lqrv_sqrv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1377,7 +1377,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores upper 8 bits of each element
- //printf("SPV ");
+ //printf("SPV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1409,7 +1409,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores bits 14-7 of each element
- //printf("SUV ");
+ //printf("SUV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1441,7 +1441,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores bits 14-7 of each element, with 2-byte stride
- //printf("SHV ");
+ //printf("SHV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1470,7 +1470,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
// FIXME: only works for index 0 and index 8
- //printf("SFV ");
+ //printf("SFV ");
#if USE_SIMD
vec_lfhpuv_sfhpuv(op, m_rsp.m_rsp_state->r[base]);
#else
@@ -1500,7 +1500,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
// Stores the full 128-bit vector starting from vector byte index and wrapping to index 0
// after byte index 15
- //printf("SWV ");
+ //printf("SWV ");
#if USE_SIMD
#else
ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
@@ -1528,13 +1528,13 @@ void rsp_cop2::handle_swc2(UINT32 op)
//
// Stores one element from maximum of 8 vectors, while incrementing element index
- //printf("STV ");
+ //printf("STV ");
#if 0
#else
- INT32 index = (op >> 7) & 0xf;
- INT32 offset = (op & 0x7f);
- if (offset & 0x40)
- offset |= 0xffffffc0;
+ INT32 index = (op >> 7) & 0xf;
+ INT32 offset = (op & 0x7f);
+ if (offset & 0x40)
+ offset |= 0xffffffc0;
INT32 vs = (op >> 16) & 0x1f;
INT32 ve = vs + 8;
@@ -1548,7 +1548,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
INT32 eaoffset = (ea & 0xf) + (element * 2);
ea &= ~0xf;
- for (INT32 i = vs; i < ve; i++)
+ for (INT32 i = vs; i < ve; i++)
{
m_rsp.WRITE16(ea + (eaoffset & 0xf), VREG_S(i, element & 0x7));
eaoffset += 2;
@@ -1654,7 +1654,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Multiplies signed integer by signed integer * 2
- //printf("MULF ");
+ //printf("MULF ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -1706,7 +1706,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// ------------------------------------------------------
//
- //printf("MULU ");
+ //printf("MULU ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -1762,7 +1762,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Stores the higher 16 bits of the 32-bit result to accumulator
// The low slice of accumulator is stored into destination element
- //printf("MUDL ");
+ //printf("MUDL ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -1809,7 +1809,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// The result is stored into accumulator
// The middle slice of accumulator is stored into destination element
- //printf("MUDM ");
+ //printf("MUDM ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -1857,7 +1857,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// The result is stored into accumulator
// The low slice of accumulator is stored into destination element
- //printf("MUDN ");
+ //printf("MUDN ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo = read_acc_lo(acc);
@@ -1902,7 +1902,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// The result is stored into highest 32 bits of accumulator, the low slice is zero
// The highest 32 bits of accumulator is saturated into destination element
- //printf("MUDH ");
+ //printf("MUDH ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -1950,7 +1950,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Multiplies signed integer by signed integer * 2
// The result is added to accumulator
- //printf("MACF ");
+ //printf("MACF ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -2001,7 +2001,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// ------------------------------------------------------
//
- //printf("MACU ");
+ //printf("MACU ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -2071,7 +2071,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Adds the higher 16 bits of the 32-bit result to accumulator
// The low slice of accumulator is stored into destination element
- //printf("MADL ");
+ //printf("MADL ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -2120,7 +2120,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// The result is added into accumulator
// The middle slice of accumulator is stored into destination element
- //printf("MADM ");
+ //printf("MADM ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -2171,7 +2171,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// The result is added into accumulator
// The low slice of accumulator is stored into destination element
- //printf("MADN ");
+ //printf("MADN ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -2225,7 +2225,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// The result is added into highest 32 bits of accumulator, the low slice is zero
// The highest 32 bits of accumulator is saturated into destination element
- //printf("MADH ");
+ //printf("MADH ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
@@ -2275,7 +2275,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// TODO: check VS2REG == VDREG
- //printf("ADD ");
+ //printf("ADD ");
#if USE_SIMD
rsp_vec_t acc_lo;
UINT16 *acc = m_acc.s;
@@ -2321,7 +2321,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// TODO: check VS2REG == VDREG
- //printf("SUB ");
+ //printf("SUB ");
#if USE_SIMD
rsp_vec_t acc_lo;
UINT16 *acc = m_acc.s;
@@ -2367,7 +2367,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Changes the sign of source register 2 if source register 1 is negative and stores
// the result to destination register
- //printf("ABS ");
+ //printf("ABS ");
#if USE_SIMD
rsp_vec_t acc_lo;
UINT16 *acc = m_acc.s;
@@ -2423,7 +2423,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// TODO: check VS2REG = VDREG
- //printf("ADDC ");
+ //printf("ADDC ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t sn;
@@ -2471,7 +2471,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// TODO: check VS2REG = VDREG
- //printf("SUBC ");
+ //printf("SUBC ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t eq, sn;
@@ -2521,7 +2521,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Stores high, middle or low slice of accumulator to destination vector
- //printf("SAW ");
+ //printf("SAW ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
switch (EL)
@@ -2586,7 +2586,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Sets compare flags if elements in VS1 are less than VS2
// Moves the element in VS2 to destination vector
- //printf("LT ");
+ //printf("LT ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t le;
@@ -2655,7 +2655,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Sets compare flags if elements in VS1 are equal with VS2
// Moves the element in VS2 to destination vector
- //printf("EQ ");
+ //printf("EQ ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t le;
@@ -2712,7 +2712,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Sets compare flags if elements in VS1 are not equal with VS2
// Moves the element in VS2 to destination vector
- //printf("NE ");
+ //printf("NE ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t le;
@@ -2770,7 +2770,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
// Sets compare flags if elements in VS1 are greater or equal with VS2
// Moves the element in VS2 to destination vector
- //printf("GE ");
+ //printf("GE ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t le;
@@ -2827,7 +2827,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Vector clip low
- //printf("CL ");
+ //printf("CL ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -2944,7 +2944,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Vector clip high
- //printf("CH ");
+ //printf("CH ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t ge, le, sign, eq, vce;
@@ -3047,7 +3047,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Vector clip reverse
- //printf("CR ");
+ //printf("CR ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t ge, le;
@@ -3125,7 +3125,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Merges two vectors according to compare flags
- //printf("MRG ");
+ //printf("MRG ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
rsp_vec_t le = read_vcc_lo(m_flags[RSP_VCC].s);
@@ -3166,7 +3166,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Bitwise AND of two vector registers
- //printf("AND ");
+ //printf("AND ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -3196,7 +3196,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Bitwise NOT AND of two vector registers
- //printf("NAND ");
+ //printf("NAND ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -3226,7 +3226,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Bitwise OR of two vector registers
- //printf("OR ");
+ //printf("OR ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -3256,7 +3256,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Bitwise NOT OR of two vector registers
- //printf("NOR ");
+ //printf("NOR ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -3286,7 +3286,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Bitwise XOR of two vector registers
- //printf("XOR ");
+ //printf("XOR ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -3316,7 +3316,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Bitwise NOT XOR of two vector registers
- //printf("NXOR ");
+ //printf("NXOR ");
#if USE_SIMD
UINT16 *acc = m_acc.s;
@@ -3347,7 +3347,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Calculates reciprocal
- //printf("RCP ");
+ //printf("RCP ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
@@ -3418,7 +3418,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Calculates reciprocal low part
- //printf("RCPL ");
+ //printf("RCPL ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
@@ -3505,7 +3505,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Calculates reciprocal high part
- //printf("RCPH ");
+ //printf("RCPH ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
@@ -3537,7 +3537,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Moves element from vector to destination vector
- //printf("MOV ");
+ //printf("MOV ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
m_v[VDREG].v = vec_vmov(VS2REG, EL, VDREG, VS1REG);
@@ -3561,7 +3561,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Calculates reciprocal square-root
- //printf("RSQ ");
+ //printf("RSQ ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
@@ -3633,7 +3633,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Calculates reciprocal square-root low part
- //printf("RSQL ");
+ //printf("RSQL ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
@@ -3723,7 +3723,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Calculates reciprocal square-root high part
- //printf("RSQH ");
+ //printf("RSQH ");
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
@@ -3754,7 +3754,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//
// Vector null instruction
- //printf("NOP ");
+ //printf("NOP ");
break;
}
@@ -3777,7 +3777,7 @@ void rsp_cop2::handle_cop2(UINT32 op)
// | 010010 | 00000 | TTTTT | DDDDD | IIII | 0000000 |
// ---------------------------------------------------
//
- //printf("MFC2 ");
+ //printf("MFC2 ");
int el = (op >> 7) & 0xf;
UINT16 b1 = VREG_B(RDREG, (el+0) & 0xf);
UINT16 b2 = VREG_B(RDREG, (el+1) & 0xf);
@@ -3792,15 +3792,15 @@ void rsp_cop2::handle_cop2(UINT32 op)
// | 010010 | 00010 | TTTTT | DDDDD | 00000000000 |
// ------------------------------------------------
//
- //printf("CFC2 ");
+ //printf("CFC2 ");
if (RTREG)
{
#if USE_SIMD
- INT32 src = RDREG & 3;
- if (src == 3) {
- src = 2;
- }
- RTVAL = get_flags(m_flags[src].s);
+ INT32 src = RDREG & 3;
+ if (src == 3) {
+ src = 2;
+ }
+ RTVAL = get_flags(m_flags[src].s);
#else
switch(RDREG)
{
@@ -3865,7 +3865,7 @@ void rsp_cop2::handle_cop2(UINT32 op)
// | 010010 | 00100 | TTTTT | DDDDD | IIII | 0000000 |
// ---------------------------------------------------
//
- //printf("MTC2 ");
+ //printf("MTC2 ");
int el = (op >> 7) & 0xf;
W_VREG_B(RDREG, (el+0) & 0xf, (RTVAL >> 8) & 0xff);
W_VREG_B(RDREG, (el+1) & 0xf, (RTVAL >> 0) & 0xff);
@@ -3966,7 +3966,7 @@ void rsp_cop2::handle_cop2(UINT32 op)
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
{
- //printf("V");
+ //printf("V");
handle_vector_ops(op);
break;
}
@@ -4185,38 +4185,38 @@ void rsp_cop2::dump(UINT32 op)
}
#if USE_SIMD
- printf("acc_h: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_acc.s[0], m_acc.s[1], m_acc.s[2], m_acc.s[3], m_acc.s[4], m_acc.s[5], m_acc.s[6], m_acc.s[7]);
- printf("acc_m: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_acc.s[8], m_acc.s[9], m_acc.s[10], m_acc.s[11], m_acc.s[12], m_acc.s[13], m_acc.s[14], m_acc.s[15]);
- printf("acc_l: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_acc.s[16], m_acc.s[17], m_acc.s[18], m_acc.s[19], m_acc.s[20], m_acc.s[21], m_acc.s[22], m_acc.s[23]);
- printf("vcc_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCC].s[0], m_flags[RSP_VCC].s[1], m_flags[RSP_VCC].s[2], m_flags[RSP_VCC].s[3], m_flags[RSP_VCC].s[4], m_flags[RSP_VCC].s[5], m_flags[RSP_VCC].s[6], m_flags[RSP_VCC].s[7]);
- printf("vcc_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCC].s[8], m_flags[RSP_VCC].s[9], m_flags[RSP_VCC].s[10], m_flags[RSP_VCC].s[11], m_flags[RSP_VCC].s[12], m_flags[RSP_VCC].s[13], m_flags[RSP_VCC].s[14], m_flags[RSP_VCC].s[15]);
- printf("vco_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCO].s[0], m_flags[RSP_VCO].s[1], m_flags[RSP_VCO].s[2], m_flags[RSP_VCO].s[3], m_flags[RSP_VCO].s[4], m_flags[RSP_VCO].s[5], m_flags[RSP_VCO].s[6], m_flags[RSP_VCO].s[7]);
- printf("vco_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCO].s[8], m_flags[RSP_VCO].s[9], m_flags[RSP_VCO].s[10], m_flags[RSP_VCO].s[11], m_flags[RSP_VCO].s[12], m_flags[RSP_VCO].s[13], m_flags[RSP_VCO].s[14], m_flags[RSP_VCO].s[15]);
- printf("vce: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCE].s[0], m_flags[RSP_VCE].s[1], m_flags[RSP_VCE].s[2], m_flags[RSP_VCE].s[3], m_flags[RSP_VCE].s[4], m_flags[RSP_VCE].s[5], m_flags[RSP_VCE].s[6], m_flags[RSP_VCE].s[7]);
+ printf("acc_h: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_acc.s[0], m_acc.s[1], m_acc.s[2], m_acc.s[3], m_acc.s[4], m_acc.s[5], m_acc.s[6], m_acc.s[7]);
+ printf("acc_m: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_acc.s[8], m_acc.s[9], m_acc.s[10], m_acc.s[11], m_acc.s[12], m_acc.s[13], m_acc.s[14], m_acc.s[15]);
+ printf("acc_l: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_acc.s[16], m_acc.s[17], m_acc.s[18], m_acc.s[19], m_acc.s[20], m_acc.s[21], m_acc.s[22], m_acc.s[23]);
+ printf("vcc_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCC].s[0], m_flags[RSP_VCC].s[1], m_flags[RSP_VCC].s[2], m_flags[RSP_VCC].s[3], m_flags[RSP_VCC].s[4], m_flags[RSP_VCC].s[5], m_flags[RSP_VCC].s[6], m_flags[RSP_VCC].s[7]);
+ printf("vcc_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCC].s[8], m_flags[RSP_VCC].s[9], m_flags[RSP_VCC].s[10], m_flags[RSP_VCC].s[11], m_flags[RSP_VCC].s[12], m_flags[RSP_VCC].s[13], m_flags[RSP_VCC].s[14], m_flags[RSP_VCC].s[15]);
+ printf("vco_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCO].s[0], m_flags[RSP_VCO].s[1], m_flags[RSP_VCO].s[2], m_flags[RSP_VCO].s[3], m_flags[RSP_VCO].s[4], m_flags[RSP_VCO].s[5], m_flags[RSP_VCO].s[6], m_flags[RSP_VCO].s[7]);
+ printf("vco_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCO].s[8], m_flags[RSP_VCO].s[9], m_flags[RSP_VCO].s[10], m_flags[RSP_VCO].s[11], m_flags[RSP_VCO].s[12], m_flags[RSP_VCO].s[13], m_flags[RSP_VCO].s[14], m_flags[RSP_VCO].s[15]);
+ printf("vce: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_flags[RSP_VCE].s[0], m_flags[RSP_VCE].s[1], m_flags[RSP_VCE].s[2], m_flags[RSP_VCE].s[3], m_flags[RSP_VCE].s[4], m_flags[RSP_VCE].s[5], m_flags[RSP_VCE].s[6], m_flags[RSP_VCE].s[7]);
#else
- printf("acc_h: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", ACCUM_H(0), ACCUM_H(1), ACCUM_H(2), ACCUM_H(3), ACCUM_H(4), ACCUM_H(5), ACCUM_H(6), ACCUM_H(7));
- printf("acc_m: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", ACCUM_M(0), ACCUM_M(1), ACCUM_M(2), ACCUM_M(3), ACCUM_M(4), ACCUM_M(5), ACCUM_M(6), ACCUM_M(7));
- printf("acc_l: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", ACCUM_L(0), ACCUM_L(1), ACCUM_L(2), ACCUM_L(3), ACCUM_L(4), ACCUM_L(5), ACCUM_L(6), ACCUM_L(7));
- printf("vcc_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[4][0], m_vflag[4][1], m_vflag[4][2], m_vflag[4][3], m_vflag[4][4], m_vflag[4][5], m_vflag[4][6], m_vflag[4][7]);
- printf("vcc_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[1][0], m_vflag[1][1], m_vflag[1][2], m_vflag[1][3], m_vflag[1][4], m_vflag[1][5], m_vflag[1][6], m_vflag[1][7]);
- printf("vco_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[3][0], m_vflag[3][1], m_vflag[3][2], m_vflag[3][3], m_vflag[3][4], m_vflag[3][5], m_vflag[3][6], m_vflag[3][7]);
- printf("vco_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[0][0], m_vflag[0][1], m_vflag[0][2], m_vflag[0][3], m_vflag[0][4], m_vflag[0][5], m_vflag[0][6], m_vflag[0][7]);
- printf("vce: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[2][0], m_vflag[2][1], m_vflag[2][2], m_vflag[2][3], m_vflag[2][4], m_vflag[2][5], m_vflag[2][6], m_vflag[2][7]);
+ printf("acc_h: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", ACCUM_H(0), ACCUM_H(1), ACCUM_H(2), ACCUM_H(3), ACCUM_H(4), ACCUM_H(5), ACCUM_H(6), ACCUM_H(7));
+ printf("acc_m: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", ACCUM_M(0), ACCUM_M(1), ACCUM_M(2), ACCUM_M(3), ACCUM_M(4), ACCUM_M(5), ACCUM_M(6), ACCUM_M(7));
+ printf("acc_l: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", ACCUM_L(0), ACCUM_L(1), ACCUM_L(2), ACCUM_L(3), ACCUM_L(4), ACCUM_L(5), ACCUM_L(6), ACCUM_L(7));
+ printf("vcc_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[4][0], m_vflag[4][1], m_vflag[4][2], m_vflag[4][3], m_vflag[4][4], m_vflag[4][5], m_vflag[4][6], m_vflag[4][7]);
+ printf("vcc_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[1][0], m_vflag[1][1], m_vflag[1][2], m_vflag[1][3], m_vflag[1][4], m_vflag[1][5], m_vflag[1][6], m_vflag[1][7]);
+ printf("vco_hi: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[3][0], m_vflag[3][1], m_vflag[3][2], m_vflag[3][3], m_vflag[3][4], m_vflag[3][5], m_vflag[3][6], m_vflag[3][7]);
+ printf("vco_lo: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[0][0], m_vflag[0][1], m_vflag[0][2], m_vflag[0][3], m_vflag[0][4], m_vflag[0][5], m_vflag[0][6], m_vflag[0][7]);
+ printf("vce: %04x|%04x|%04x|%04x|%04x|%04x|%04x|%04x\n", m_vflag[2][0], m_vflag[2][1], m_vflag[2][2], m_vflag[2][3], m_vflag[2][4], m_vflag[2][5], m_vflag[2][6], m_vflag[2][7]);
#endif
}
void rsp_cop2::dump_dmem()
{
- UINT8* dmem = m_rsp.get_dmem();
- printf("\n");
- for (int i = 0; i < 0x1000; i += 32)
- {
- printf("%04x: ", i);
- for (int j = 0; j < 32; j++)
- {
- printf("%02x ", dmem[i + j]);
- }
- printf("\n");
- }
- printf("\n");
-} \ No newline at end of file
+ UINT8* dmem = m_rsp.get_dmem();
+ printf("\n");
+ for (int i = 0; i < 0x1000; i += 32)
+ {
+ printf("%04x: ", i);
+ for (int j = 0; j < 32; j++)
+ {
+ printf("%02x ", dmem[i + j]);
+ }
+ printf("\n");
+ }
+ printf("\n");
+}
diff --git a/src/emu/cpu/rsp/rspcp2.h b/src/emu/cpu/rsp/rspcp2.h
index 25ed0013e2a..909b0ae4172 100644
--- a/src/emu/cpu/rsp/rspcp2.h
+++ b/src/emu/cpu/rsp/rspcp2.h
@@ -17,18 +17,18 @@
#include "rsp.h"
#include "rspdiv.h"
-#define SIMD_OFF (1)
+#define SIMD_OFF (1)
#if (defined(__SSE2__) || defined(__SSE3__) || defined(__SSSE3__) || defined(__SSE4_1__) || defined(__SSE4_2__))
-#define SSE_AVAILABLE (1)
+#define SSE_AVAILABLE (1)
#else
-#define SSE_AVAILABLE (0)
+#define SSE_AVAILABLE (0)
#endif
#if (SSE_AVAILABLE || defined(_MSC_VER)) && defined(PTR64) && !SIMD_OFF
-#define USE_SIMD (1)
+#define USE_SIMD (1)
#else
-#define USE_SIMD (0)
+#define USE_SIMD (0)
#endif
#if USE_SIMD
@@ -167,8 +167,8 @@ public:
void log_instruction_execution();
virtual void cfunc_unimplemented_opcode() { }
- void dump(UINT32 op);
- void dump_dmem();
+ void dump(UINT32 op);
+ void dump_dmem();
protected:
virtual int generate_vector_opcode(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc) { return TRUE; }
@@ -342,7 +342,7 @@ protected:
static inline INT16 get_flags(const UINT16 *flags)
{
- return _mm_movemask_epi8(_mm_packs_epi16(_mm_load_si128((rsp_vec_t*) (flags + (sizeof(rsp_vec_t) >> 1))), _mm_load_si128((rsp_vec_t*) flags)));
+ return _mm_movemask_epi8(_mm_packs_epi16(_mm_load_si128((rsp_vec_t*) (flags + (sizeof(rsp_vec_t) >> 1))), _mm_load_si128((rsp_vec_t*) flags)));
}
static inline rsp_vec_t vec_zero()
@@ -389,8 +389,8 @@ private:
void handle_swc2(UINT32 op);
void handle_vector_ops(UINT32 op);
- UINT32 m_div_in;
- UINT32 m_div_out;
+ UINT32 m_div_in;
+ UINT32 m_div_out;
};
#endif /* __RSPCP2_H__ */
diff --git a/src/emu/cpu/rsp/vadd.h b/src/emu/cpu/rsp/vadd.h
index 33b21fd7312..16009e53287 100644
--- a/src/emu/cpu/rsp/vadd.h
+++ b/src/emu/cpu/rsp/vadd.h
@@ -14,4 +14,3 @@ inline rsp_vec_t vec_vadd(rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t carry, rsp_vec_t
minimum = _mm_subs_epi16(minimum, carry);
return _mm_adds_epi16(minimum, maximum);
}
-
diff --git a/src/emu/cpu/rsp/vcl.h b/src/emu/cpu/rsp/vcl.h
index e82a7fde162..e09a13d5a8e 100644
--- a/src/emu/cpu/rsp/vcl.h
+++ b/src/emu/cpu/rsp/vcl.h
@@ -46,7 +46,7 @@ inline rsp_vec_t vec_vcl(rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *
*ge = _mm_or_si128(ge_eq, *ge);
#endif
- // Mux the result based on the value of sign.
+ // Mux the result based on the value of sign.
#if (defined(__SSE4_1__) || defined(_MSC_VER))
rsp_vec_t mux_mask = _mm_blendv_epi8(*ge, *le, sign);
#else
diff --git a/src/emu/cpu/rsp/vmudh.h b/src/emu/cpu/rsp/vmudh.h
index 6ae77e2ef7e..71c3a38f4fb 100644
--- a/src/emu/cpu/rsp/vmudh.h
+++ b/src/emu/cpu/rsp/vmudh.h
@@ -8,4 +8,3 @@ inline rsp_vec_t rsp_vmudh(rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t *acc_md, rsp_ve
return sclamp_acc_to_mid(*acc_md, *acc_hi);
}
-
diff --git a/src/emu/cpu/rsp/vmulh.h b/src/emu/cpu/rsp/vmulh.h
index 61140f4744c..aaccf9d41b3 100644
--- a/src/emu/cpu/rsp/vmulh.h
+++ b/src/emu/cpu/rsp/vmulh.h
@@ -28,4 +28,3 @@ inline rsp_vec_t vec_vmadh_vmudh(UINT32 iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_
return sclamp_acc_to_mid(*acc_md, *acc_hi);
}
-
diff --git a/src/emu/cpu/rsp/vrcpsq.h b/src/emu/cpu/rsp/vrcpsq.h
index 2e2434863e9..930d8237853 100644
--- a/src/emu/cpu/rsp/vrcpsq.h
+++ b/src/emu/cpu/rsp/vrcpsq.h
@@ -26,7 +26,7 @@ inline rsp_vec_t vec_vrcp_vrsq(UINT32 iw, INT32 dp, UINT32 src, UINT32 e, UINT32
}
else if (input == -32768)
{
- result = 0xffff0000;
+ result = 0xffff0000;
}
else // Main case: compute the reciprocal.
{
diff --git a/src/emu/cpu/rsp/vrsq.h b/src/emu/cpu/rsp/vrsq.h
index 140e46dcd01..f657bc42554 100644
--- a/src/emu/cpu/rsp/vrsq.h
+++ b/src/emu/cpu/rsp/vrsq.h
@@ -26,7 +26,7 @@ rsp_vec_t vec_vrsq(INT32 dp, UINT32 src, UINT32 e, UINT32 dest, UINT32 de)
}
else if (input == -32768)
{
- result = 0xffff0000;
+ result = 0xffff0000;
}
else // Main case: compute the reciprocal.
{
diff --git a/src/emu/cpu/sh2/sh2.c b/src/emu/cpu/sh2/sh2.c
index b2ea57f60d4..629d447323e 100644
--- a/src/emu/cpu/sh2/sh2.c
+++ b/src/emu/cpu/sh2/sh2.c
@@ -143,11 +143,11 @@ READ32_MEMBER(sh2_device::sh2_internal_a5)
static ADDRESS_MAP_START( sh7604_map, AS_PROGRAM, 32, sh2_device )
AM_RANGE(0x40000000, 0xbfffffff) AM_READ(sh2_internal_a5)
-/*!
+/*!
@todo: cps3boot breaks with this enabled. Needs customization ...
*/
-// AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM // cache data array
-// AM_RANGE(0xffffff88, 0xffffff8b) AM_READWRITE(dma_dtcr0_r,dma_dtcr0_w)
+// AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM // cache data array
+// AM_RANGE(0xffffff88, 0xffffff8b) AM_READWRITE(dma_dtcr0_r,dma_dtcr0_w)
AM_RANGE(0xe0000000, 0xe00001ff) AM_MIRROR(0x1ffffe00) AM_READWRITE(sh7604_r, sh7604_w)
ADDRESS_MAP_END
@@ -159,14 +159,14 @@ static ADDRESS_MAP_START( sh7021_map, AS_PROGRAM, 32, sh2a_device )
AM_RANGE(0x05ffff48, 0x05ffff4b) AM_READWRITE16(dma_tcr0_r, dma_tcr0_w,0x0000ffff)
AM_RANGE(0x05ffff4c, 0x05ffff4f) AM_READWRITE16(dma_chcr0_r, dma_chcr0_w, 0x0000ffff)
// fall-back
- AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7021_r,sh7021_w,0xffffffff) // SH-7032H internal i/o
-// AM_RANGE(0x07000000, 0x070003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
-// AM_RANGE(0x0f000000, 0x0f0003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
+ AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7021_r,sh7021_w,0xffffffff) // SH-7032H internal i/o
+// AM_RANGE(0x07000000, 0x070003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
+// AM_RANGE(0x0f000000, 0x0f0003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sh7032_map, AS_PROGRAM, 32, sh1_device )
// fall-back
- AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7032_r,sh7032_w,0xffffffff) // SH-7032H internal i/o
+ AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7032_r,sh7032_w,0xffffffff) // SH-7032H internal i/o
ADDRESS_MAP_END
sh2_device::sh2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
@@ -300,7 +300,7 @@ void sh2_device::WB(offs_t A, UINT8 V)
m_program->write_byte(A & AM,V);
return;
}
-
+
m_program->write_byte(A,V);
}
@@ -311,7 +311,7 @@ void sh2_device::WW(offs_t A, UINT16 V)
m_program->write_word(A & AM,V);
return;
}
-
+
m_program->write_word(A,V);
}
@@ -322,7 +322,7 @@ void sh2_device::WL(offs_t A, UINT32 V)
m_program->write_dword(A & AM,V);
return;
}
-
+
/* 0x20000000 no Cache */
/* 0x00000000 read thru Cache if CE bit is 1 */
m_program->write_dword(A,V);
diff --git a/src/emu/cpu/sh2/sh2.h b/src/emu/cpu/sh2/sh2.h
index c53b6baad59..9724c1f51b0 100644
--- a/src/emu/cpu/sh2/sh2.h
+++ b/src/emu/cpu/sh2/sh2.h
@@ -513,17 +513,17 @@ public:
DECLARE_READ16_MEMBER(sh7021_r);
DECLARE_WRITE16_MEMBER(sh7021_w);
void sh7032_dma_exec(int ch);
-
+
private:
UINT16 m_sh7021_regs[0x200];
struct
{
- UINT32 sar; /**< Source Address Register */
- UINT32 dar; /**< Destination Address Register */
- UINT16 tcr; /**< Transfer Count Register */
- UINT16 chcr; /**< Channel Control Register */
+ UINT32 sar; /**< Source Address Register */
+ UINT32 dar; /**< Destination Address Register */
+ UINT16 tcr; /**< Transfer Count Register */
+ UINT16 chcr; /**< Channel Control Register */
} m_dma[4];
- UINT16 m_dmaor; /**< DMA Operation Register (status flags) */
+ UINT16 m_dmaor; /**< DMA Operation Register (status flags) */
};
diff --git a/src/emu/cpu/sh2/sh2comn.c b/src/emu/cpu/sh2/sh2comn.c
index 38b6d633c22..1080203494f 100644
--- a/src/emu/cpu/sh2/sh2comn.c
+++ b/src/emu/cpu/sh2/sh2comn.c
@@ -899,7 +899,7 @@ void sh2_device::sh2_exception(const char *message, int irqline)
void sh2a_device::sh7032_dma_exec(int ch)
{
const short dma_word_size[4] = { 0, +1, -1, 0 };
- UINT8 rs = (m_dma[ch].chcr >> 8) & 0xf; /**< Resource Select bits */
+ UINT8 rs = (m_dma[ch].chcr >> 8) & 0xf; /**< Resource Select bits */
if(rs != 0xc) // Auto-Request
{
logerror("Warning: SH7032 DMA enables non auto-request transfer\n");
@@ -911,9 +911,9 @@ void sh2a_device::sh7032_dma_exec(int ch)
return;
printf("%08x %08x %04x\n",m_dma[ch].sar,m_dma[ch].dar,m_dma[ch].chcr);
- UINT8 dm = (m_dma[ch].chcr >> 14) & 3; /**< Destination Address Mode bits */
- UINT8 sm = (m_dma[ch].chcr >> 12) & 3; /**< Source Address Mode bits */
- bool ts = (m_dma[ch].chcr & 8); /**< Transfer Size bit */
+ UINT8 dm = (m_dma[ch].chcr >> 14) & 3; /**< Destination Address Mode bits */
+ UINT8 sm = (m_dma[ch].chcr >> 12) & 3; /**< Source Address Mode bits */
+ bool ts = (m_dma[ch].chcr & 8); /**< Transfer Size bit */
int src_word_size = dma_word_size[sm] * ((ts == true) ? 2 : 1);
int dst_word_size = dma_word_size[dm] * ((ts == true) ? 2 : 1);
UINT32 src_addr = m_dma[ch].sar;
@@ -1025,4 +1025,3 @@ WRITE16_MEMBER(sh2a_device::sh7021_w)
#if (defined(__MINGW32__) && (__GNUC__ >= 5))
#pragma GCC diagnostic pop
#endif
-
diff --git a/src/emu/cpu/sm510/sm510.c b/src/emu/cpu/sm510/sm510.c
index 09029709849..ef4f704590b 100644
--- a/src/emu/cpu/sm510/sm510.c
+++ b/src/emu/cpu/sm510/sm510.c
@@ -6,14 +6,14 @@
- SM510: 2.7Kx8 ROM, 128x4 RAM(32x4 for LCD)
- SM511: 4Kx8 ROM, 128x4 RAM(32x4 for LCD), melody controller
- SM512: 4Kx8 ROM, 128x4 RAM(48x4 for LCD), melody controller
-
+
Other chips that may be in the same family, investigate more when one of
them needs to get emulated: SM500, SM530/31, SM4A, SM3903, ..
References:
- 1990 Sharp Microcomputers Data Book
- 1996 Sharp Microcomputer Databook
-
+
TODO:
- proper support for LFSR program counter in debugger
- callback for lcd screen as MAME bitmap (when needed)
@@ -146,12 +146,12 @@ void sm510_base_device::device_reset()
m_op = m_prev_op = 0;
do_branch(3, 7, 0);
m_prev_pc = m_pc;
-
+
// lcd is on (Bp on, BC off, bs(y) off)
m_bp = true;
m_bc = false;
m_y = 0;
-
+
m_r = 0;
m_write_r(0, 0, 0xff);
m_melody_rd &= ~1;
@@ -168,11 +168,11 @@ inline UINT16 sm510_base_device::get_lcd_row(int column, UINT8* ram)
// output 0 if lcd blackpate/bleeder is off, or in case row doesn't exist
if (ram == NULL || m_bc || !m_bp)
return 0;
-
+
UINT16 rowdata = 0;
for (int i = 0; i < 0x10; i++)
rowdata |= (ram[i] >> column & 1) << i;
-
+
return rowdata;
}
@@ -185,12 +185,12 @@ TIMER_CALLBACK_MEMBER(sm510_base_device::lcd_timer_cb)
m_write_sega(h | SM510_PORT_SEGA, get_lcd_row(h, m_lcd_ram_a), 0xffff);
m_write_segb(h | SM510_PORT_SEGB, get_lcd_row(h, m_lcd_ram_b), 0xffff);
m_write_segc(h | SM510_PORT_SEGC, get_lcd_row(h, m_lcd_ram_c), 0xffff);
-
+
// bs output from L/X and Y regs
UINT8 bs = (m_l >> h & 1) | ((m_x*2) >> h & 2);
m_write_segbs(h | SM510_PORT_SEGBS, (m_bc || !m_bp) ? 0 : bs, 0xffff);
}
-
+
// schedule next timeout
m_lcd_timer->adjust(attotime::from_ticks(0x200, unscaled_clock()));
}
@@ -222,10 +222,10 @@ void sm510_base_device::clock_melody()
0, 0, 8, 8, 9, 9, 10,10,11,12,12,13,14,15, 8*2, 8*2,
0, 0, 8, 9, 9, 10,10,11,11,12,13,14,14,15, 8*2, 9*2
};
-
+
UINT8 cmd = m_melody_rom[m_melody_address] & 0x3f;
UINT8 out = 0;
-
+
// clock duty cycle if tone is active
if ((cmd & 0xf) > 1)
{
@@ -245,7 +245,7 @@ void sm510_base_device::clock_melody()
// rest tell signal
m_melody_rd |= 2;
}
-
+
// clock time base on F8(d7)
if ((m_div & 0x7f) == 0)
{
@@ -255,7 +255,7 @@ void sm510_base_device::clock_melody()
if (m_melody_step_count == 0)
m_melody_address++;
}
-
+
// output to R pin
if (out != m_r)
{
@@ -293,7 +293,7 @@ bool sm510_base_device::wake_me_up()
// after waking up, but we leave it unchanged
m_halt = false;
do_branch(1, 0, 0);
-
+
standard_irq_callback(0);
return true;
}
@@ -305,7 +305,7 @@ void sm510_base_device::execute_set_input(int line, int state)
{
if (line != SM510_INPUT_LINE_K)
return;
-
+
// set K input lines active state
m_k_active = (state != 0);
}
@@ -317,7 +317,7 @@ TIMER_CALLBACK_MEMBER(sm510_base_device::div_timer_cb)
// 1S signal on overflow(falling edge of f1)
if (m_div == 0)
m_1s = true;
-
+
clock_melody();
}
diff --git a/src/emu/cpu/sm510/sm510.h b/src/emu/cpu/sm510/sm510.h
index b50cea20957..8dd7446b884 100644
--- a/src/emu/cpu/sm510/sm510.h
+++ b/src/emu/cpu/sm510/sm510.h
@@ -134,7 +134,7 @@ protected:
int m_stack_levels;
UINT16 m_stack[2];
int m_icount;
-
+
UINT8 m_acc;
UINT8 m_bl;
UINT8 m_bm;
@@ -177,7 +177,7 @@ protected:
bool wake_me_up();
void init_divider();
TIMER_CALLBACK_MEMBER(div_timer_cb);
-
+
// other i/o handlers
devcb_read8 m_read_k;
devcb_read_line m_read_ba;
@@ -251,12 +251,12 @@ protected:
void op_rm();
void op_sm();
-
+
void op_pre();
void op_sme();
void op_rme();
void op_tmel();
-
+
void op_skip();
void op_cend();
void op_idiv();
@@ -274,7 +274,7 @@ protected:
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
virtual void execute_one();
virtual void get_opcode_param();
-
+
virtual void update_w_latch() { m_write_s(0, m_w, 0xff); } // W is connected directly to S
};
diff --git a/src/emu/cpu/sm510/sm510d.c b/src/emu/cpu/sm510/sm510d.c
index fec8bc44bbd..70e6b2c8ed6 100644
--- a/src/emu/cpu/sm510/sm510d.c
+++ b/src/emu/cpu/sm510/sm510d.c
@@ -103,7 +103,7 @@ static offs_t sm510_common_disasm(const UINT8 *lut_mnemonic, const UINT8 *lut_ex
param = oprom[s_next_pc[pc & 0x3f]];
len++;
}
-
+
// extended opcode
bool is_extended = (instr == mEXT);
if (is_extended)
@@ -131,12 +131,12 @@ static offs_t sm510_common_disasm(const UINT8 *lut_mnemonic, const UINT8 *lut_ex
UINT16 address = (param << 4 & 0xc00) | (mask << 6 & 0x3c0) | (param & 0x03f);
dst += sprintf(dst, "$%03X", address);
}
-
+
// show param offset
if (bits >= 8)
dst += sprintf(dst, " [$%03X]", pc + s_next_pc[pc & 0x3f]);
}
-
+
return len | s_flags[instr] | DASMFLAG_SUPPORTED;
}
@@ -210,6 +210,6 @@ CPU_DISASSEMBLE(sm511)
UINT8 ext[0x100];
memset(ext, 0, 0x100);
memcpy(ext + 0x30, sm511_extended, 0x10);
-
+
return sm510_common_disasm(sm511_mnemonic, ext, buffer, pc, oprom, opram);
}
diff --git a/src/emu/cpu/sm510/sm510op.c b/src/emu/cpu/sm510/sm510op.c
index bb0f4975511..cf99cbc5ae4 100644
--- a/src/emu/cpu/sm510/sm510op.c
+++ b/src/emu/cpu/sm510/sm510op.c
@@ -57,12 +57,12 @@ inline UINT8 sm510_base_device::bitmask(UINT16 param)
void sm510_base_device::op_lb()
{
// LB x: load BM/BL with 4-bit immediate value (partial)
-
+
// SM510 WIP..
// bm and bl(low) are probably ok!
m_bm = (m_bm & 4) | (m_op & 3);
m_bl = (m_op >> 2 & 3);
-
+
// bl(high) is still unclear, official doc is confusing
UINT8 hi = 0;
switch (m_bl)
diff --git a/src/emu/cpu/sm510/sm511core.c b/src/emu/cpu/sm510/sm511core.c
index d5dcf94cc7c..2347721ff90 100644
--- a/src/emu/cpu/sm510/sm511core.c
+++ b/src/emu/cpu/sm510/sm511core.c
@@ -102,7 +102,7 @@ void sm511_device::execute_one()
switch (m_op)
{
case 0x00: op_rot(); break;
-// case 0x01: op_xxx(); break; // ?
+// case 0x01: op_xxx(); break; // ?
case 0x02: op_sbm(); break;
case 0x03: op_atpl(); break;
case 0x08: op_add(); break;
@@ -119,7 +119,7 @@ void sm511_device::execute_one()
case 0x5a: op_ta0(); break;
case 0x5b: op_tabl(); break;
case 0x5c: op_atx(); break;
-// case 0x5d: op_cend(); break;
+// case 0x5d: op_cend(); break;
case 0x5e: op_tal(); break;
case 0x5f: op_lbl(); break;
@@ -127,14 +127,14 @@ void sm511_device::execute_one()
case 0x62: op_wr(); break;
case 0x63: op_ws(); break;
case 0x64: op_incb(); break;
-// case 0x65: op_idiv(); break;
+// case 0x65: op_idiv(); break;
case 0x66: op_rc(); break;
case 0x67: op_sc(); break;
case 0x6c: op_decb(); break;
case 0x6d: op_ptw(); break;
case 0x6e: op_rtn0(); break;
case 0x6f: op_rtn1(); break;
-
+
// extended opcodes
case 0x60:
m_op = m_op << 8 | m_param;
diff --git a/src/emu/cpu/ucom4/ucom4.h b/src/emu/cpu/ucom4/ucom4.h
index ed317fe9806..47305a4638a 100644
--- a/src/emu/cpu/ucom4/ucom4.h
+++ b/src/emu/cpu/ucom4/ucom4.h
@@ -323,7 +323,7 @@ class upd650_cpu_device : public ucom4_cpu_device
public:
upd650_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-protected:
+protected:
virtual UINT8 input_r(int index);
};
diff --git a/src/emu/cpu/ucom4/ucom4op.c b/src/emu/cpu/ucom4/ucom4op.c
index c42a2814022..d208fcaf80f 100644
--- a/src/emu/cpu/ucom4/ucom4op.c
+++ b/src/emu/cpu/ucom4/ucom4op.c
@@ -59,7 +59,7 @@ UINT8 upd650_cpu_device::input_r(int index)
// bidirectional ports are 'push-pull', meaning it will output 0 when it's read
if ((index & 0xf) == NEC_UCOM4_PORTC || (index & 0xf) == NEC_UCOM4_PORTD)
output_w(index, 0);
-
+
return ucom4_cpu_device::input_r(index);
}
diff --git a/src/emu/machine/68230pit.c b/src/emu/machine/68230pit.c
index 9c99baa4f16..d0c50a2c535 100644
--- a/src/emu/machine/68230pit.c
+++ b/src/emu/machine/68230pit.c
@@ -1,5 +1,5 @@
// license:BSD-3-Clause
-// copyright-holders:Joakim Larsson Edström
+// copyright-holders:Joakim Larsson Edstr??m
/**********************************************************************
Motorola MC68230 PI/T Parallell Interface and Timer
@@ -46,130 +46,128 @@ const device_type PIT68230 = &device_creator<pit68230_device>;
//-------------------------------------------------
pit68230_device::pit68230_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, PIT68230, "Motorola 68230 PI/T", tag, owner, clock, "pit68230", __FILE__)
+ : device_t(mconfig, PIT68230, "Motorola 68230 PI/T", tag, owner, clock, "pit68230", __FILE__)
{
}
void pit68230_device::device_start()
{
- printf("PIT68230 device started\n");
+ printf("PIT68230 device started\n");
}
void pit68230_device::device_reset()
{
- printf("PIT68230 device reseted\n");
- m_pgcr = 0;
- m_psrr = 0;
- m_paddr = 0;
- m_pbddr = 0;
- m_pcddr = 0;
- m_pacr = 0;
- m_pbcr = 0;
- m_padr = 0;
- m_pbdr = 0;
- m_psr = 0;
+ printf("PIT68230 device reseted\n");
+ m_pgcr = 0;
+ m_psrr = 0;
+ m_paddr = 0;
+ m_pbddr = 0;
+ m_pcddr = 0;
+ m_pacr = 0;
+ m_pbcr = 0;
+ m_padr = 0;
+ m_pbdr = 0;
+ m_psr = 0;
}
WRITE8_MEMBER( pit68230_device::data_w )
{
- printf("data_w: %04x -> ", data);
- switch (offset)
- {
- case PIT_68230_PGCR:
- printf("PGCR");
- m_pgcr = data;
- break;
- case PIT_68230_PSRR:
- printf("PSRR");
- m_psrr = data;
- break;
- case PIT_68230_PADDR:
- printf("PADDR");
- m_paddr = data;
- break;
- case PIT_68230_PBDDR:
- printf("PBDDR");
- m_pbddr = data;
- break;
- case PIT_68230_PACR:
- printf("PACR");
- m_pacr = data;
- break;
- case PIT_68230_PBCR:
- printf("PBCR");
- m_pbcr = data;
- break;
- case PIT_68230_PADR:
- printf("PADR");
- m_padr = data;
- break;
- case PIT_68230_PSR:
- printf("PSR");
- m_padr = data;
- break;
- default:
- printf("unhandled register %02x", offset);
- }
- printf("\n");
+ printf("data_w: %04x -> ", data);
+ switch (offset)
+ {
+ case PIT_68230_PGCR:
+ printf("PGCR");
+ m_pgcr = data;
+ break;
+ case PIT_68230_PSRR:
+ printf("PSRR");
+ m_psrr = data;
+ break;
+ case PIT_68230_PADDR:
+ printf("PADDR");
+ m_paddr = data;
+ break;
+ case PIT_68230_PBDDR:
+ printf("PBDDR");
+ m_pbddr = data;
+ break;
+ case PIT_68230_PACR:
+ printf("PACR");
+ m_pacr = data;
+ break;
+ case PIT_68230_PBCR:
+ printf("PBCR");
+ m_pbcr = data;
+ break;
+ case PIT_68230_PADR:
+ printf("PADR");
+ m_padr = data;
+ break;
+ case PIT_68230_PSR:
+ printf("PSR");
+ m_padr = data;
+ break;
+ default:
+ printf("unhandled register %02x", offset);
+ }
+ printf("\n");
}
READ8_MEMBER( pit68230_device::data_r )
{
- UINT8 data = 0;
-
- printf("data_r: ");
- switch (offset)
- {
- case PIT_68230_PGCR:
- printf("PGCR");
- data = m_pgcr;
- break;
- case PIT_68230_PSRR:
- printf("PSRR");
- data = m_psrr;
- break;
- case PIT_68230_PADDR:
- printf("PADDR");
- data = m_paddr;
- break;
- case PIT_68230_PBDDR:
- printf("PBDDR");
- data = m_pbddr;
- break;
- case PIT_68230_PACR:
- printf("PACR");
- data = m_pacr;
- break;
- case PIT_68230_PBCR:
- printf("PBCR");
- data = m_pbcr;
- break;
- case PIT_68230_PADR:
- printf("PADR");
- data = m_padr;
- break;
- case PIT_68230_PBDR:
- /* 4.6.2. PORT B DATA REGISTER (PBDR). The port B data register is a holding register for moving data
+ UINT8 data = 0;
+
+ printf("data_r: ");
+ switch (offset)
+ {
+ case PIT_68230_PGCR:
+ printf("PGCR");
+ data = m_pgcr;
+ break;
+ case PIT_68230_PSRR:
+ printf("PSRR");
+ data = m_psrr;
+ break;
+ case PIT_68230_PADDR:
+ printf("PADDR");
+ data = m_paddr;
+ break;
+ case PIT_68230_PBDDR:
+ printf("PBDDR");
+ data = m_pbddr;
+ break;
+ case PIT_68230_PACR:
+ printf("PACR");
+ data = m_pacr;
+ break;
+ case PIT_68230_PBCR:
+ printf("PBCR");
+ data = m_pbcr;
+ break;
+ case PIT_68230_PADR:
+ printf("PADR");
+ data = m_padr;
+ break;
+ case PIT_68230_PBDR:
+ /* 4.6.2. PORT B DATA REGISTER (PBDR). The port B data register is a holding register for moving data
to and from port B pins. The port B data direction register determines whether each pin is an input (zero)
-or an output (one). This register is readable and writable at all times. Depending on the chosen mode/submode,
+or an output (one). This register is readable and writable at all times. Depending on the chosen mode/submode,
reading or writing may affect the double-buffered handshake mechanism. The port B data register is not affected
-by the assertion of the RESET pin. PB0-PB7 sits on pins 17-24 on a 48 pin DIP package */
- printf("PBDR");
- data = m_pbdr;
- // data = (m_pbdr & 0xfc) | 1; // CPU-1 centronics interface expects to see 2 lowest bits equal 1 for printer
- break;
- case PIT_68230_PSR:
- printf("PSR");
- data = m_psr;
- // data = m_psr | 1; // CPU-1 centronics interface expects status to be non zero
- break;
- default:
- printf("unhandled register %02x", offset);
- data = 0;
- }
- printf("\n");
-
- return data;
+by the assertion of the RESET pin. PB0-PB7 sits on pins 17-24 on a 48 pin DIP package */
+ printf("PBDR");
+ data = m_pbdr;
+ // data = (m_pbdr & 0xfc) | 1; // CPU-1 centronics interface expects to see 2 lowest bits equal 1 for printer
+ break;
+ case PIT_68230_PSR:
+ printf("PSR");
+ data = m_psr;
+ // data = m_psr | 1; // CPU-1 centronics interface expects status to be non zero
+ break;
+ default:
+ printf("unhandled register %02x", offset);
+ data = 0;
+ }
+ printf("\n");
+
+ return data;
}
-
-
diff --git a/src/emu/machine/68230pit.h b/src/emu/machine/68230pit.h
index b299ca868f9..dcb5b81bb88 100644
--- a/src/emu/machine/68230pit.h
+++ b/src/emu/machine/68230pit.h
@@ -1,5 +1,5 @@
// license:BSD-3-Clause
-// copyright-holders:Joakim Larsson Edström
+// copyright-holders:Joakim Larsson Edstr??m
/**********************************************************************
Motorola MC68230 PI/T Parallell Interface and Timer
@@ -56,7 +56,7 @@ protected:
virtual void device_reset();
private:
- UINT8 m_pgcr; // Port General Control register
+ UINT8 m_pgcr; // Port General Control register
UINT8 m_psrr; // Port Service Request register
UINT8 m_paddr; // Port A Data Direction register
UINT8 m_pbddr; // Port B Data Direction register
diff --git a/src/emu/machine/atapihle.c b/src/emu/machine/atapihle.c
index 4b749ee36e6..dcbc00fb26c 100644
--- a/src/emu/machine/atapihle.c
+++ b/src/emu/machine/atapihle.c
@@ -246,7 +246,7 @@ void atapi_hle_device::process_command()
case IDE_COMMAND_CHECK_POWER_MODE:
m_status = IDE_STATUS_DRDY;
- m_sector_count = 0xff; // Power mode: 0x00 = Standby, 0x80 = Idle mode, 0xff = Active mode or Idle mode
+ m_sector_count = 0xff; // Power mode: 0x00 = Standby, 0x80 = Idle mode, 0xff = Active mode or Idle mode
set_irq(ASSERT_LINE);
break;
diff --git a/src/emu/machine/nvram.c b/src/emu/machine/nvram.c
index 343d246176c..a1c9d734e2e 100644
--- a/src/emu/machine/nvram.c
+++ b/src/emu/machine/nvram.c
@@ -179,4 +179,3 @@ void nvram_device::determine_final_base()
#if (defined(__MINGW32__) && (__GNUC__ >= 5))
#pragma GCC diagnostic pop
#endif
-
diff --git a/src/emu/machine/pci.c b/src/emu/machine/pci.c
index ef2e0f4ee0e..a5c95198c75 100644
--- a/src/emu/machine/pci.c
+++ b/src/emu/machine/pci.c
@@ -905,4 +905,4 @@ void pci_root_device::device_reset()
#if (defined(__MINGW32__) && (__GNUC__ >= 5))
#pragma GCC diagnostic pop
-#endif \ No newline at end of file
+#endif
diff --git a/src/emu/machine/saturn.c b/src/emu/machine/saturn.c
index a9ad0638c68..cf79fdc26a2 100644
--- a/src/emu/machine/saturn.c
+++ b/src/emu/machine/saturn.c
@@ -38,7 +38,7 @@
H counter value 0x0ec (236) -> 0xe0
H counter value 0x12c (300) -> 0x100
- Timer 1 seems to count backwards compared to Timer 0 from setting 0x6b onward.
- - Yabause claims that if VDP2 DISP bit isn't enabled then vblank irqs (hblank too?)
+ - Yabause claims that if VDP2 DISP bit isn't enabled then vblank irqs (hblank too?)
doesn't happen.
**************************************************************************************/
diff --git a/src/emu/machine/smpc.c b/src/emu/machine/smpc.c
index effb6ba9841..caf0834da5a 100644
--- a/src/emu/machine/smpc.c
+++ b/src/emu/machine/smpc.c
@@ -686,7 +686,7 @@ void saturn_state::smpc_comreg_exec(address_space &space, UINT8 data, UINT8 is_s
case 0x0a:
case 0x0b:
popmessage ("SMPC: NETLINK %s, contact MAMEdev",(data & 1) ? "off" : "on");
- break; case 0x0d:
+ break; case 0x0d:
if(LOG_SMPC) printf ("SMPC: System Reset\n");
smpc_system_reset();
break;
@@ -943,7 +943,7 @@ UINT8 saturn_state::smpc_th_control_mode(UINT8 pad_n)
res|= 0xc;
break;
}
-
+
return res;
}
diff --git a/src/emu/machine/stvcd.c b/src/emu/machine/stvcd.c
index 2c2422cfde4..eebb8d11cb4 100644
--- a/src/emu/machine/stvcd.c
+++ b/src/emu/machine/stvcd.c
@@ -866,7 +866,7 @@ void saturn_state::cd_exec_command( void )
if(cr4 == 0)
hirqreg |= (CMOK);
else
- hirqreg |= (CMOK|DRDY);
+ hirqreg |= (CMOK|DRDY);
status_type = 1;
}
break;
diff --git a/src/emu/machine/tms6100.c b/src/emu/machine/tms6100.c
index c0b355feee5..9cedc12c10a 100644
--- a/src/emu/machine/tms6100.c
+++ b/src/emu/machine/tms6100.c
@@ -201,11 +201,11 @@ WRITE_LINE_MEMBER(tms6100_device::tms6100_romclock_w)
/* read bit at address */
/* if (m_variant == TMS6110_IS_M58819)
{
- m_data = (m_rom[m_address >> 3] >> (7-(m_address & 0x07))) & 1;
+ m_data = (m_rom[m_address >> 3] >> (7-(m_address & 0x07))) & 1;
}
else // m_variant == (TMS6110_IS_TMS6100 || TMS6110_IS_TMS6125)
{
- */
+ */
m_data = (m_rom[m_address >> 3] >> (m_address & 0x07)) & 1;
/* } */
m_address++;
diff --git a/src/emu/machine/wd_fdc.h b/src/emu/machine/wd_fdc.h
index 1aa0e1b13dc..7af735a7bef 100644
--- a/src/emu/machine/wd_fdc.h
+++ b/src/emu/machine/wd_fdc.h
@@ -179,7 +179,7 @@ public:
void hlt_w(bool state);
bool enp_r();
-
+
void index_callback(floppy_image_device *floppy, int state);
protected:
diff --git a/src/emu/mconfig.h b/src/emu/mconfig.h
index f17ea06e632..280866cf96a 100644
--- a/src/emu/mconfig.h
+++ b/src/emu/mconfig.h
@@ -62,7 +62,7 @@ public:
std::string m_perfect_cpu_quantum; // tag of CPU to use for "perfect" scheduling
INT32 m_watchdog_vblank_count; // number of VBLANKs until the watchdog kills us
attotime m_watchdog_time; // length of time until the watchdog kills us
- bool m_force_no_drc; // whether or not to force DRC off
+ bool m_force_no_drc; // whether or not to force DRC off
// other parameters
const char * m_default_layout; // default layout for this machine
diff --git a/src/emu/netlist/analog/nld_opamps.c b/src/emu/netlist/analog/nld_opamps.c
index e54883151db..00eb9984cc5 100644
--- a/src/emu/netlist/analog/nld_opamps.c
+++ b/src/emu/netlist/analog/nld_opamps.c
@@ -42,10 +42,10 @@ NETLIB_NAMESPACE_DEVICES_START()
/*
* Type = 0: Impedance changer
- * 1; Ideal opamp
- * 2; opamp with first pole
- * 3: opamp with first pole + output limit
- * 4: opamp with input stage, first pole + output limit
+ * 1; Ideal opamp
+ * 2; opamp with first pole
+ * 3: opamp with first pole + output limit
+ * 4: opamp with input stage, first pole + output limit
*/
NETLIB_START(OPAMP)
@@ -141,17 +141,16 @@ NETLIB_UPDATE_PARAM(OPAMP)
/*
NETLIB_DEVICE_WITH_PARAMS(OPAMPx,
- NETLIB_NAME(R) m_RP;
- NETLIB_NAME(C) m_CP;
- NETLIB_NAME(VCCS) m_G1;
- NETLIB_NAME(VCVS) m_EBUF;
-
- param_model_t m_model;
- analog_input_t m_VH;
- analog_input_t m_VL;
- analog_input_t m_VREF;
+ NETLIB_NAME(R) m_RP;
+ NETLIB_NAME(C) m_CP;
+ NETLIB_NAME(VCCS) m_G1;
+ NETLIB_NAME(VCVS) m_EBUF;
+
+ param_model_t m_model;
+ analog_input_t m_VH;
+ analog_input_t m_VL;
+ analog_input_t m_VREF;
);
*/
NETLIB_NAMESPACE_DEVICES_END()
-
diff --git a/src/emu/netlist/devices/net_lib.c b/src/emu/netlist/devices/net_lib.c
index 89829620448..b33a069a832 100644
--- a/src/emu/netlist/devices/net_lib.c
+++ b/src/emu/netlist/devices/net_lib.c
@@ -72,12 +72,12 @@ void initialize_factory(factory_list_t &factory)
ENTRY(VCCS, VCCS, "-")
ENTRY(CCCS, CCCS, "-")
ENTRY(LVCCS, LVCCS, "-")
- ENTRY(VS, VS, "V")
+ ENTRY(VS, VS, "V")
ENTRY(CS, CS, "I")
ENTRY(OPAMP, OPAMP, "MODEL")
ENTRY(dummy_input, DUMMY_INPUT, "-")
ENTRY(frontier, FRONTIER_DEV, "+I,G,Q") // not intended to be used directly
- ENTRY(function, AFUNC, "N,FUNC") // only for macro devices - NO FEEDBACK loops
+ ENTRY(function, AFUNC, "N,FUNC") // only for macro devices - NO FEEDBACK loops
ENTRY(QBJT_EB, QBJT_EB, "MODEL")
ENTRY(QBJT_switch, QBJT_SW, "MODEL")
ENTRY(logic_input, TTL_INPUT, "IN")
diff --git a/src/emu/netlist/devices/nld_log.h b/src/emu/netlist/devices/nld_log.h
index 4b768b66b82..9f7431ed1ee 100644
--- a/src/emu/netlist/devices/nld_log.h
+++ b/src/emu/netlist/devices/nld_log.h
@@ -21,7 +21,7 @@
#include "../nl_base.h"
#define LOG(_name, _I) \
- NET_REGISTER_DEV(ÖPG, _name) \
+ NET_REGISTER_DEV(??PG, _name) \
NET_CONNECT(_name, I, _I)
NETLIB_NAMESPACE_DEVICES_START()
diff --git a/src/emu/netlist/devices/nld_system.h b/src/emu/netlist/devices/nld_system.h
index 3f8de7bc2fc..27ed157b3f2 100644
--- a/src/emu/netlist/devices/nld_system.h
+++ b/src/emu/netlist/devices/nld_system.h
@@ -24,7 +24,7 @@
#define LOGIC_INPUT(_name, _v, _family) \
NET_REGISTER_DEV(LOGIC_INPUT, _name) \
- PARAM(_name.IN, _v) \
+ PARAM(_name.IN, _v) \
PARAM(_name.FAMILY, _family)
#define ANALOG_INPUT(_name, _v) \
@@ -70,9 +70,9 @@
#define PARAMETERS(_name) \
NET_REGISTER_DEV(PARAMETERS, _name)
-#define AFUNC(_name, _N, _F) \
+#define AFUNC(_name, _N, _F) \
NET_REGISTER_DEV(AFUNC, _name) \
- PARAM(_name.N, _N) \
+ PARAM(_name.N, _N) \
PARAM(_name.FUNC, _F)
NETLIB_NAMESPACE_DEVICES_START()
diff --git a/src/emu/netlist/macro/nlm_cd4xxx.c b/src/emu/netlist/macro/nlm_cd4xxx.c
index 97777b193aa..e8ffede2aa8 100644
--- a/src/emu/netlist/macro/nlm_cd4xxx.c
+++ b/src/emu/netlist/macro/nlm_cd4xxx.c
@@ -38,7 +38,7 @@ NETLIST_START(CD4001_DIP)
s2.A, /* A3 |5 10| Y5 */ s3.Q,
s2.B, /* Y3 |6 9| A4 */ s3.B,
VDD.I, /* GND |7 8| Y4 */ s3.A
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -74,10 +74,10 @@ NETLIST_START(CD4020_DIP)
s1.Q7, /* Q7 |6 11| RESET */ s1.RESET,
s1.Q4, /* Q4 |7 10| IP */ s1.IP,
s1.VSS, /* VSS |8 9| Q1 */ s1.Q1
- /* +--------------+ */
+ /* +--------------+ */
)
/*
- * IP = (Input pulses)
+ * IP = (Input pulses)
*/
NETLIST_END()
@@ -117,12 +117,12 @@ NETLIST_START(CD4066_DIP)
DIPPINS( /* +--------------+ */
A.R.1, /* INOUTA |1 ++ 14| VDD */ A.PS.VDD,
A.R.2, /* OUTINA |2 13| CONTROLA */ A.CTL,
- B.R.1, /* OUTINB |3 12| CONTROLD */ D.CTL,
+ B.R.1, /* OUTINB |3 12| CONTROLD */ D.CTL,
B.R.2, /* INOUTB |4 4066 11| INOUTD */ D.R.1,
B.CTL, /* CONTROLB |5 10| OUTIND */ D.R.2,
C.CTL, /* CONTROLC |6 9| OUTINC */ C.R.1,
A.PS.VSS, /* VSS |7 8| INOUTC */ C.R.2
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -143,12 +143,12 @@ NETLIST_START(CD4016_DIP)
DIPPINS( /* +--------------+ */
A.R.1, /* INOUTA |1 ++ 14| VDD */ A.PS.VDD,
A.R.2, /* OUTINA |2 13| CONTROLA */ A.CTL,
- B.R.1, /* OUTINB |3 12| CONTROLD */ D.CTL,
+ B.R.1, /* OUTINB |3 12| CONTROLD */ D.CTL,
B.R.2, /* INOUTB |4 4016 11| INOUTD */ D.R.1,
B.CTL, /* CONTROLB |5 10| OUTIND */ D.R.2,
C.CTL, /* CONTROLC |6 9| OUTINC */ C.R.1,
A.PS.VSS, /* VSS |7 8| INOUTC */ C.R.2
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
diff --git a/src/emu/netlist/macro/nlm_opamp.c b/src/emu/netlist/macro/nlm_opamp.c
index c2038d19a28..bb160848b38 100644
--- a/src/emu/netlist/macro/nlm_opamp.c
+++ b/src/emu/netlist/macro/nlm_opamp.c
@@ -17,7 +17,7 @@ NETLIST_START(opamp_layout_4_4_11)
B.PLUS, /* |5 10| */ C.PLUS,
B.MINUS, /* |6 9| */ C.MINUS,
B.OUT, /* |7 8| */ C.OUT
- /* +--------------+ */
+ /* +--------------+ */
)
NET_C(A.GND, B.GND, C.GND, D.GND)
NET_C(A.VCC, B.VCC, C.VCC, D.VCC)
@@ -33,7 +33,7 @@ NETLIST_START(opamp_layout_2_8_4)
A.MINUS, /* |2 7| */ B.OUT,
A.PLUS, /* |3 6| */ B.MINUS,
A.GND, /* |4 5| */ B.PLUS
- /* +--------------+ */
+ /* +--------------+ */
)
NET_C(A.GND, B.GND)
NET_C(A.VCC, B.VCC)
diff --git a/src/emu/netlist/macro/nlm_opamp.h b/src/emu/netlist/macro/nlm_opamp.h
index f9ed62d71b3..5b24ffc4842 100644
--- a/src/emu/netlist/macro/nlm_opamp.h
+++ b/src/emu/netlist/macro/nlm_opamp.h
@@ -9,13 +9,13 @@
* Netlist Macros
* ---------------------------------------------------------------------------*/
-#define MB3614_DIP(_name) \
+#define MB3614_DIP(_name) \
NET_REGISTER_DEV(MB3614_DIP, _name)
-#define LM324_DIP(_name) \
+#define LM324_DIP(_name) \
NET_REGISTER_DEV(LM324_DIP, _name)
-#define LM358_DIP(_name) \
+#define LM358_DIP(_name) \
NET_REGISTER_DEV(LM358_DIP, _name)
/* ----------------------------------------------------------------------------
diff --git a/src/emu/netlist/macro/nlm_other.c b/src/emu/netlist/macro/nlm_other.c
index 33747ed6780..e3d53def922 100644
--- a/src/emu/netlist/macro/nlm_other.c
+++ b/src/emu/netlist/macro/nlm_other.c
@@ -6,7 +6,7 @@
/*
* MC14584B: Hex Schmitt Trigger
- * ON Semiconductor
+ * ON Semiconductor
*
* +--------------+
* A1 |1 ++ 14| VCC
@@ -39,7 +39,7 @@ NETLIST_START(MC14584B_DIP)
s3.A, /* A3 |5 10| Y5 */ s5.Q,
s3.Q, /* Y3 |6 9| A4 */ s4.A,
GND.I, /* GND |7 8| Y4 */ s4.Q
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
diff --git a/src/emu/netlist/macro/nlm_other.h b/src/emu/netlist/macro/nlm_other.h
index c658b0dfbb3..3bf574d6973 100644
--- a/src/emu/netlist/macro/nlm_other.h
+++ b/src/emu/netlist/macro/nlm_other.h
@@ -9,10 +9,10 @@
* Netlist Macros
* ---------------------------------------------------------------------------*/
-#define MC14584B_GATE(_name) \
+#define MC14584B_GATE(_name) \
NET_REGISTER_DEV(MC14584B_GATE, _name)
-#define MC14584B_DIP(_name) \
+#define MC14584B_DIP(_name) \
NET_REGISTER_DEV(MC14584B_DIP, _name)
diff --git a/src/emu/netlist/macro/nlm_ttl74xx.c b/src/emu/netlist/macro/nlm_ttl74xx.c
index 75e865b1fe1..c9c33aceaeb 100644
--- a/src/emu/netlist/macro/nlm_ttl74xx.c
+++ b/src/emu/netlist/macro/nlm_ttl74xx.c
@@ -6,7 +6,7 @@
/*
* DM7416: Hex Inverting Buffers with
- * High Voltage Open-Collector Outputs
+ * High Voltage Open-Collector Outputs
*
* +--------------+
* A1 |1 ++ 14| VCC
@@ -39,7 +39,7 @@ NETLIST_START(TTL_7416_DIP)
s3.A, /* A3 |5 10| Y5 */ s5.Q,
s3.Q, /* Y3 |6 9| A4 */ s4.A,
GND.I, /* GND |7 8| Y4 */ s4.Q
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
diff --git a/src/emu/netlist/macro/nlm_ttl74xx.h b/src/emu/netlist/macro/nlm_ttl74xx.h
index 91f757dbf7d..d322588eb52 100644
--- a/src/emu/netlist/macro/nlm_ttl74xx.h
+++ b/src/emu/netlist/macro/nlm_ttl74xx.h
@@ -9,10 +9,10 @@
* Netlist Macros
* ---------------------------------------------------------------------------*/
-#define TTL_7416_GATE(_name) \
+#define TTL_7416_GATE(_name) \
NET_REGISTER_DEV(TTL_7416_GATE, _name)
-#define TTL_7416_DIP(_name) \
+#define TTL_7416_DIP(_name) \
NET_REGISTER_DEV(TTL7416_DIP, _name)
/* ----------------------------------------------------------------------------
diff --git a/src/emu/netlist/nl_base.c b/src/emu/netlist/nl_base.c
index 129bdd2db44..0c0b8e4d0fd 100644
--- a/src/emu/netlist/nl_base.c
+++ b/src/emu/netlist/nl_base.c
@@ -535,7 +535,7 @@ ATTR_COLD void device_t::register_subalias(const pstring &name, const pstring &a
// FIXME: make this working again
//if (term.isType(terminal_t::INPUT) || term.isType(terminal_t::TERMINAL))
- // m_terminals.add(name);
+ // m_terminals.add(name);
}
ATTR_COLD void device_t::register_terminal(const pstring &name, terminal_t &port)
diff --git a/src/emu/netlist/nl_base.h b/src/emu/netlist/nl_base.h
index d1329a5e5d6..940c5f54052 100644
--- a/src/emu/netlist/nl_base.h
+++ b/src/emu/netlist/nl_base.h
@@ -241,7 +241,7 @@ typedef UINT8 netlist_sig_t;
, _priv)
#define NETLIB_LOGIC_FAMILY(_fam) \
-virtual logic_family_desc_t *default_logic_family() \
+virtual logic_family_desc_t *default_logic_family() \
{ \
return netlist_family_ ## _fam; \
}
@@ -394,8 +394,8 @@ namespace netlist
VCCS, // Voltage controlled current source
LVCCS, // Voltage controlled current source (Current limited)
CCCS, // Current controlled current source
- VS, // Voltage Source
- CS, // Current Source
+ VS, // Voltage Source
+ CS, // Current Source
GND // GND device
};
diff --git a/src/emu/netlist/nl_factory.c b/src/emu/netlist/nl_factory.c
index f4e75b0ab41..edc55af9732 100644
--- a/src/emu/netlist/nl_factory.c
+++ b/src/emu/netlist/nl_factory.c
@@ -34,7 +34,7 @@ ATTR_COLD const pstring_list_t base_factory_t::def_params()
}
-factory_list_t::factory_list_t( setup_t &setup)
+factory_list_t::factory_list_t( setup_t &setup)
: m_setup(setup)
{
}
diff --git a/src/emu/netlist/nl_setup.h b/src/emu/netlist/nl_setup.h
index a38aa7229ef..900fb810878 100644
--- a/src/emu/netlist/nl_setup.h
+++ b/src/emu/netlist/nl_setup.h
@@ -58,7 +58,7 @@ ATTR_COLD void NETLIST_NAME(_name)(netlist::setup_t &setup) \
setup.register_source(palloc(netlist::source_proc_t(# _name, &NETLIST_NAME(_name))));
#define LOCAL_LIB_ENTRY(_name) \
- LOCAL_SOURCE(_name) \
+ LOCAL_SOURCE(_name) \
setup.register_lib_entry(# _name);
#define INCLUDE(_name) \
diff --git a/src/emu/netlist/plib/palloc.h b/src/emu/netlist/plib/palloc.h
index c80265c8105..badbc681486 100644
--- a/src/emu/netlist/plib/palloc.h
+++ b/src/emu/netlist/plib/palloc.h
@@ -79,7 +79,7 @@ inline void pfree_array_t(T *p)
pfree_raw(s);
}
-#define palloc(T) new(ppool) T
+#define palloc(T) new(ppool) T
#define pfree(_ptr) pfree_t(_ptr)
#if 1
@@ -94,7 +94,7 @@ inline void pfree_array_t(T *p)
#define ATTR_ALIGN
-#define palloc(T) global_alloc(T)
+#define palloc(T) global_alloc(T)
#define pfree(_ptr) global_free(_ptr)
#define palloc_array(T, N) global_alloc_array(T, N)
diff --git a/src/emu/netlist/plib/pconfig.h b/src/emu/netlist/plib/pconfig.h
index 45958b85468..c06fe3e3d2f 100644
--- a/src/emu/netlist/plib/pconfig.h
+++ b/src/emu/netlist/plib/pconfig.h
@@ -40,7 +40,7 @@
//============================================================
// prevent implicit copying
-#define P_PREVENT_COPYING(_name) \
+#define P_PREVENT_COPYING(_name) \
private: \
_name(const _name &); \
_name &operator=(const _name &);
@@ -234,4 +234,3 @@ private:
#if (defined(__MINGW32__) && (__GNUC__ >= 5))
#pragma GCC diagnostic pop
#endif
-
diff --git a/src/emu/netlist/plib/plists.h b/src/emu/netlist/plib/plists.h
index 8f4914145b5..bbb553eb12a 100644
--- a/src/emu/netlist/plib/plists.h
+++ b/src/emu/netlist/plib/plists.h
@@ -657,7 +657,7 @@ private:
#if 0
unsigned hash(const pstring &v) const
{
- /* Fowler–Noll–Vo hash - FNV-1 */
+ /* Fowler???Noll???Vo hash - FNV-1 */
const char *string = v.cstr();
unsigned result = 2166136261;
for (UINT8 c = *string++; c != 0; c = *string++)
@@ -671,17 +671,17 @@ private:
/* jenkins one at a time algo */
unsigned result = 0;
const char *string = v.cstr();
- while (*string)
- {
- result += *string;
- string++;
- result += (result << 10);
- result ^= (result >> 6);
- }
- result += (result << 3);
- result ^= (result >> 11);
- result += (result << 15);
- return result;
+ while (*string)
+ {
+ result += *string;
+ string++;
+ result += (result << 10);
+ result ^= (result >> 6);
+ }
+ result += (result << 3);
+ result ^= (result >> 11);
+ result += (result << 15);
+ return result;
}
#endif
#endif
diff --git a/src/emu/netlist/plib/pstate.c b/src/emu/netlist/plib/pstate.c
index 909bfcb2e58..326eb13fe49 100644
--- a/src/emu/netlist/plib/pstate.c
+++ b/src/emu/netlist/plib/pstate.c
@@ -75,4 +75,3 @@ template<> ATTR_COLD void pstate_manager_t::save_item(pstate_callback_t &state,
m_save.add(p);
state.register_state(*this, stname);
}
-
diff --git a/src/emu/netlist/solver/mat_cr.h b/src/emu/netlist/solver/mat_cr.h
index 708833f2625..195e856784b 100644
--- a/src/emu/netlist/solver/mat_cr.h
+++ b/src/emu/netlist/solver/mat_cr.h
@@ -92,7 +92,7 @@ struct mat_cr_t
*
* ==> LUx = r
*
- * ==> Ux = L⁻¹r = w
+ * ==> Ux = L?????r = w
*
* ==> r = Lw
*
diff --git a/src/emu/netlist/solver/vector_base.h b/src/emu/netlist/solver/vector_base.h
index c180b080338..c5b86cdb5e8 100644
--- a/src/emu/netlist/solver/vector_base.h
+++ b/src/emu/netlist/solver/vector_base.h
@@ -42,7 +42,6 @@ inline void vec_set (const std::size_t n, const double &scalar, double * RESTRIC
}
inline double vecmult (const std::size_t n, const double * RESTRICT a1, const double * RESTRICT a2 )
{
-
double value = 0.0;
for ( std::size_t i = 0; i < n; i++ )
value = value + a1[i] * a2[i];
diff --git a/src/emu/netlist/tools/nl_convert.c b/src/emu/netlist/tools/nl_convert.c
index bee0c2e8c36..59871b96bdf 100644
--- a/src/emu/netlist/tools/nl_convert.c
+++ b/src/emu/netlist/tools/nl_convert.c
@@ -188,7 +188,7 @@ nl_convert_base_t::unit_t nl_convert_base_t::m_units[] = {
{"M", "CAP_M(%g)", 1.0e-3 },
{"u", "CAP_U(%g)", 1.0e-6 }, /* eagle */
{"U", "CAP_U(%g)", 1.0e-6 },
- {"μ", "CAP_U(%g)", 1.0e-6 },
+ {"??", "CAP_U(%g)", 1.0e-6 },
{"N", "CAP_N(%g)", 1.0e-9 },
{"P", "CAP_P(%g)", 1.0e-12},
{"F", "%ge-15", 1.0e-15},
diff --git a/src/emu/schedule.c b/src/emu/schedule.c
index 46aae22c078..dbd22f24960 100644
--- a/src/emu/schedule.c
+++ b/src/emu/schedule.c
@@ -993,4 +993,3 @@ void device_scheduler::dump_timers() const
#if (defined(__MINGW32__) && (__GNUC__ >= 5))
#pragma GCC diagnostic pop
#endif
-
diff --git a/src/emu/screen.h b/src/emu/screen.h
index d91328cb1e9..682dd0ce049 100644
--- a/src/emu/screen.h
+++ b/src/emu/screen.h
@@ -355,7 +355,7 @@ typedef device_type_iterator<&device_creator<screen_device>, screen_device> scre
/*!
@brief Configures screen parameters for the given screen.
-
+
@param _pixclock Pixel Clock frequency value
@param _htotal Total number of horizontal pixels, including hblank period.
@param _hbend Horizontal pixel position for HBlank end event, also first pixel where screen rectangle is visible.
@@ -369,7 +369,7 @@ typedef device_type_iterator<&device_creator<screen_device>, screen_device> scre
/*!
@brief Sets the number of Frames Per Second for this screen
-
+
@param _rate FPS number
@deprecated Please use MCFG_SCREEN_RAW_PARAMS instead. Gives imprecise timings.
*/
@@ -378,7 +378,7 @@ typedef device_type_iterator<&device_creator<screen_device>, screen_device> scre
/*!
@brief Sets the vblank time of the given screen
-
+
@param _time Time parameter, in attotime value\
@deprecated Please use MCFG_SCREEN_RAW_PARAMS instead. Gives imprecise timings.
*/
@@ -387,7 +387,7 @@ typedef device_type_iterator<&device_creator<screen_device>, screen_device> scre
/*!
@brief Sets total screen size, including H/V-Blanks
-
+
@param _width Screen horizontal size
@param _height Screen vertical size
@deprecated Please use MCFG_SCREEN_RAW_PARAMS instead. Gives imprecise timings.
@@ -397,7 +397,7 @@ typedef device_type_iterator<&device_creator<screen_device>, screen_device> scre
/*!
@brief Sets screen visible area
-
+
@param _minx Screen left border
@param _maxx Screen right border, must be in N-1 format
@param _miny Screen top border
diff --git a/src/emu/sound/c140.c b/src/emu/sound/c140.c
index da659b1cad1..6649f53616a 100644
--- a/src/emu/sound/c140.c
+++ b/src/emu/sound/c140.c
@@ -134,11 +134,11 @@ void c140_device::device_start()
/* allocate a pair of buffers to mix into - 1 second's worth should be more than enough */
m_mixer_buffer_left = auto_alloc_array(machine(), INT16, 2 * m_sample_rate);
m_mixer_buffer_right = m_mixer_buffer_left + m_sample_rate;
-
+
save_item(NAME(m_REG));
-
+
for (int i = 0; i < C140_MAX_VOICE; i++)
- {
+ {
save_item(NAME(m_voi[i].ptoffset), i);
save_item(NAME(m_voi[i].pos), i);
save_item(NAME(m_voi[i].key), i);
diff --git a/src/emu/sound/discrete.c b/src/emu/sound/discrete.c
index 637ad167f64..ae278d503db 100644
--- a/src/emu/sound/discrete.c
+++ b/src/emu/sound/discrete.c
@@ -1146,4 +1146,3 @@ WRITE8_MEMBER( discrete_device::write )
#if (defined(__MINGW32__) && (__GNUC__ >= 5))
#pragma GCC diagnostic pop
#endif
-
diff --git a/src/emu/sound/scsp.c b/src/emu/sound/scsp.c
index b7c0e82feff..df2a5ef0143 100644
--- a/src/emu/sound/scsp.c
+++ b/src/emu/sound/scsp.c
@@ -1051,7 +1051,7 @@ unsigned short scsp_device::r16(address_space &space, unsigned int addr)
*/
logerror("SCSP: Reading from EXTS register %08x\n",addr);
if(addr == 0xee0)
- v = space.machine().device<cdda_device>("cdda")->get_channel_volume(0);
+ v = space.machine().device<cdda_device>("cdda")->get_channel_volume(0);
if(addr == 0xee2)
v = space.machine().device<cdda_device>("cdda")->get_channel_volume(1);
}
diff --git a/src/emu/sound/tms36xx.c b/src/emu/sound/tms36xx.c
index c170b1305b1..18c55ce6235 100644
--- a/src/emu/sound/tms36xx.c
+++ b/src/emu/sound/tms36xx.c
@@ -375,7 +375,7 @@ void tms36xx_device::device_start()
m_decay[0], m_decay[1], m_decay[2],
m_decay[3], m_decay[4], m_decay[5]));
LOG(("TMS36xx speed %d\n", m_speed));
-
+
save_item(NAME(m_octave));
save_item(NAME(m_tune_counter));
save_item(NAME(m_note_counter));
diff --git a/src/emu/sound/ymf278b.c b/src/emu/sound/ymf278b.c
index 38e0a0ae29c..60097767655 100644
--- a/src/emu/sound/ymf278b.c
+++ b/src/emu/sound/ymf278b.c
@@ -1011,7 +1011,7 @@ void ymf278b_device::device_start()
// Register state for saving
register_save_state();
- // YMF262 related
+ // YMF262 related
/* stream system initialize */
int ymf262_clock = clock() / (19/8.0);
diff --git a/src/emu/video/hd44780.h b/src/emu/video/hd44780.h
index f98bc01806b..c175ccb9e47 100644
--- a/src/emu/video/hd44780.h
+++ b/src/emu/video/hd44780.h
@@ -70,14 +70,14 @@ protected:
{
CHARSET_HD44780_A00,
CHARSET_KS0066_F05 /*,
- CHARSET_HD44780_A01,
- CHARSET_HD44780_A02,
- CHARSET_KS0066_F00,
- CHARSET_KS0066_F03,
- CHARSET_KS0066_F04,
- CHARSET_KS0066_F06,
- CHARSET_KS0066_F59
- */
+ CHARSET_HD44780_A01,
+ CHARSET_HD44780_A02,
+ CHARSET_KS0066_F00,
+ CHARSET_KS0066_F03,
+ CHARSET_KS0066_F04,
+ CHARSET_KS0066_F06,
+ CHARSET_KS0066_F59
+ */
};
void set_charset_type(int type);
diff --git a/src/emu/video/i82730.c b/src/emu/video/i82730.c
index 5bcc3240a35..d90a79d04ee 100644
--- a/src/emu/video/i82730.c
+++ b/src/emu/video/i82730.c
@@ -15,9 +15,9 @@
// CONSTANTS
//**************************************************************************
-#define VERBOSE 1
-#define VERBOSE_COMMANDS 1
-#define VERBOSE_DATASTREAM 0
+#define VERBOSE 1
+#define VERBOSE_COMMANDS 1
+#define VERBOSE_DATASTREAM 0
//**************************************************************************
diff --git a/src/emu/video/i82730.h b/src/emu/video/i82730.h
index 5df4e46a5de..ff2602d2307 100644
--- a/src/emu/video/i82730.h
+++ b/src/emu/video/i82730.h
@@ -35,9 +35,9 @@
// TYPE DEFINITIONS
//**************************************************************************
-typedef device_delegate<void (bitmap_rgb32 &bitmap, UINT16 *data, UINT8 lc, UINT16 y, int x_count)> i82730_update_row_delegate;
+typedef device_delegate<void (bitmap_rgb32 &bitmap, UINT16 *data, UINT8 lc, UINT16 y, int x_count)> i82730_update_row_delegate;
-#define I82730_UPDATE_ROW(name) \
+#define I82730_UPDATE_ROW(name) \
void name(bitmap_rgb32 &bitmap, UINT16 *data, UINT8 lc, UINT16 y, int x_count)
diff --git a/src/emu/video/mb_vcu.c b/src/emu/video/mb_vcu.c
index a5ff14230bf..0ad568976f8 100644
--- a/src/emu/video/mb_vcu.c
+++ b/src/emu/video/mb_vcu.c
@@ -191,7 +191,7 @@ void mb_vcu_device::device_start()
3, resistances_gb, m_weights_b, 3600, 0,
2, resistances_r, m_weights_r, 3600, 0);
}
-
+
save_item(NAME(m_status));
save_pointer(NAME(m_ram), 0x800);
save_pointer(NAME(m_palram), 0x100);
diff --git a/src/emu/video/rgbsse.h b/src/emu/video/rgbsse.h
index a29dd879ec8..0b729fabe46 100644
--- a/src/emu/video/rgbsse.h
+++ b/src/emu/video/rgbsse.h
@@ -349,7 +349,7 @@ public:
add(other);
clamp_to_uint8();
}
-
+
inline void scale_add_and_clamp(const rgbaint_t& scale, const rgbaint_t& other)
{
mul(scale);
@@ -362,7 +362,7 @@ public:
{
rgbaint_t color2(other);
color2.mul(scale2);
-
+
mul(scale);
add(color2);
sra_imm(8);
diff --git a/src/emu/video/vooddefs.h b/src/emu/video/vooddefs.h
index 1fe157888f0..f98aece2110 100644
--- a/src/emu/video/vooddefs.h
+++ b/src/emu/video/vooddefs.h
@@ -3209,7 +3209,7 @@ do
INT32 smax, tmax; \
UINT32 texbase; \
rgb_union c_local; \
- \
+ \
/* determine the S/T/LOD values for this texture */ \
if (TEXMODE_ENABLE_PERSPECTIVE(TEXMODE)) \
{ \
@@ -4743,10 +4743,10 @@ INLINE void ATTR_FORCE_INLINE multi_reciplog(INT64 valueA, INT64 valueB, INT64 v
double recip = double(1ULL<<(47-39))/valueC;
double resAD = valueA * recip;
double resBD = valueB * recip;
- log = new_log2(recip);
- log += 56<<8;
- resA = resAD;
- resB = resBD;
+ log = new_log2(recip);
+ log += 56<<8;
+ resA = resAD;
+ resB = resBD;
}