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-rw-r--r--src/emu/cpu/adsp2100/2100dasm.c2
-rw-r--r--src/emu/cpu/adsp2100/adsp2100.c78
-rw-r--r--src/emu/cpu/adsp2100/adsp2100.h12
-rw-r--r--src/emu/cpu/alph8201/8201dasm.c2
-rw-r--r--src/emu/cpu/alph8201/alph8201.c24
-rw-r--r--src/emu/cpu/alph8201/alph8201.h6
-rw-r--r--src/emu/cpu/apexc/apexc.c16
-rw-r--r--src/emu/cpu/apexc/apexc.h4
-rw-r--r--src/emu/cpu/apexc/apexcdsm.c2
-rw-r--r--src/emu/cpu/arm/arm.c18
-rw-r--r--src/emu/cpu/arm/arm.h2
-rw-r--r--src/emu/cpu/arm7/arm7.c18
-rw-r--r--src/emu/cpu/arm7/arm7.h2
-rw-r--r--src/emu/cpu/asap/asap.c18
-rw-r--r--src/emu/cpu/asap/asap.h2
-rw-r--r--src/emu/cpu/asap/asapdasm.c2
-rw-r--r--src/emu/cpu/ccpu/ccpu.c16
-rw-r--r--src/emu/cpu/ccpu/ccpu.h4
-rw-r--r--src/emu/cpu/ccpu/ccpudasm.c2
-rw-r--r--src/emu/cpu/cdp1802/1802dasm.c26
-rw-r--r--src/emu/cpu/cdp1802/cdp1802.c16
-rw-r--r--src/emu/cpu/cdp1802/cdp1802.h4
-rw-r--r--src/emu/cpu/cop400/cop400.h32
-rw-r--r--src/emu/cpu/cop400/cop410.c28
-rw-r--r--src/emu/cpu/cop400/cop410ds.c2
-rw-r--r--src/emu/cpu/cop400/cop420.c52
-rw-r--r--src/emu/cpu/cop400/cop420ds.c2
-rw-r--r--src/emu/cpu/cp1610/1610dasm.c2
-rw-r--r--src/emu/cpu/cp1610/cp1610.c16
-rw-r--r--src/emu/cpu/cp1610/cp1610.h4
-rw-r--r--src/emu/cpu/cubeqcpu/cubeqcpu.c54
-rw-r--r--src/emu/cpu/dsp32/dsp32.c18
-rw-r--r--src/emu/cpu/dsp32/dsp32.h2
-rw-r--r--src/emu/cpu/dsp56k/dsp56dsm.c2
-rw-r--r--src/emu/cpu/dsp56k/dsp56k.c20
-rw-r--r--src/emu/cpu/dsp56k/dsp56k.h2
-rw-r--r--src/emu/cpu/e132xs/e132xs.c82
-rw-r--r--src/emu/cpu/e132xs/e132xs.h28
-rw-r--r--src/emu/cpu/f8/f8.c18
-rw-r--r--src/emu/cpu/f8/f8.h2
-rw-r--r--src/emu/cpu/f8/f8dasm.c2
-rw-r--r--src/emu/cpu/g65816/g65816.c30
-rw-r--r--src/emu/cpu/g65816/g65816.h2
-rw-r--r--src/emu/cpu/h6280/6280dasm.c2
-rw-r--r--src/emu/cpu/h6280/h6280.c22
-rw-r--r--src/emu/cpu/h6280/h6280.h4
-rw-r--r--src/emu/cpu/h83002/h83002.c36
-rw-r--r--src/emu/cpu/h83002/h83002.h2
-rw-r--r--src/emu/cpu/h83002/h8disasm.c442
-rw-r--r--src/emu/cpu/hd6309/6309dasm.c2
-rw-r--r--src/emu/cpu/hd6309/hd6309.c18
-rw-r--r--src/emu/cpu/hd6309/hd6309.h2
-rw-r--r--src/emu/cpu/i386/i386.c78
-rw-r--r--src/emu/cpu/i8085/8085dasm.c1026
-rw-r--r--src/emu/cpu/i8085/i8085.c26
-rw-r--r--src/emu/cpu/i8085/i8085.h6
-rw-r--r--src/emu/cpu/i86/i186intf.h2
-rw-r--r--src/emu/cpu/i86/i188intf.h2
-rw-r--r--src/emu/cpu/i86/i286.c18
-rw-r--r--src/emu/cpu/i86/i286intf.h2
-rw-r--r--src/emu/cpu/i86/i86.c38
-rw-r--r--src/emu/cpu/i86/i86intf.h2
-rw-r--r--src/emu/cpu/i86/i88intf.h2
-rw-r--r--src/emu/cpu/i86/v20intf.h2
-rw-r--r--src/emu/cpu/i86/v30intf.h2
-rw-r--r--src/emu/cpu/i86/v33intf.h2
-rw-r--r--src/emu/cpu/i8x41/8x41dasm.c234
-rw-r--r--src/emu/cpu/i8x41/i8x41.c16
-rw-r--r--src/emu/cpu/i8x41/i8x41.h4
-rw-r--r--src/emu/cpu/i960/i960.c28
-rw-r--r--src/emu/cpu/i960/i960.h2
-rw-r--r--src/emu/cpu/jaguar/jaguar.c32
-rw-r--r--src/emu/cpu/jaguar/jaguar.h4
-rw-r--r--src/emu/cpu/konami/knmidasm.c2
-rw-r--r--src/emu/cpu/konami/konami.c16
-rw-r--r--src/emu/cpu/konami/konami.h4
-rw-r--r--src/emu/cpu/lh5801/5801dasm.c42
-rw-r--r--src/emu/cpu/lh5801/lh5801.c16
-rw-r--r--src/emu/cpu/lh5801/lh5801.h4
-rw-r--r--src/emu/cpu/lr35902/lr35902.c20
-rw-r--r--src/emu/cpu/lr35902/lr35902.h4
-rw-r--r--src/emu/cpu/lr35902/lr35902d.c2
-rw-r--r--src/emu/cpu/m37710/m37710.c26
-rw-r--r--src/emu/cpu/m37710/m37710.h2
-rw-r--r--src/emu/cpu/m6502/6502dasm.c14
-rw-r--r--src/emu/cpu/m6502/m4510.c22
-rw-r--r--src/emu/cpu/m6502/m4510.h4
-rw-r--r--src/emu/cpu/m6502/m6502.c74
-rw-r--r--src/emu/cpu/m6502/m6502.h28
-rw-r--r--src/emu/cpu/m6502/m6509.c16
-rw-r--r--src/emu/cpu/m6502/m6509.h2
-rw-r--r--src/emu/cpu/m6502/m65ce02.c16
-rw-r--r--src/emu/cpu/m6502/m65ce02.h4
-rw-r--r--src/emu/cpu/m6800/6800dasm.c14
-rw-r--r--src/emu/cpu/m6800/m6800.c52
-rw-r--r--src/emu/cpu/m6800/m6800.h28
-rw-r--r--src/emu/cpu/m68000/m68000.h12
-rw-r--r--src/emu/cpu/m68000/m68kmame.c100
-rw-r--r--src/emu/cpu/m6805/6805dasm.c22
-rw-r--r--src/emu/cpu/m6805/m6805.c36
-rw-r--r--src/emu/cpu/m6805/m6805.h8
-rw-r--r--src/emu/cpu/m6809/6809dasm.c2
-rw-r--r--src/emu/cpu/m6809/m6809.c22
-rw-r--r--src/emu/cpu/m6809/m6809.h4
-rw-r--r--src/emu/cpu/mb86233/mb86233.c18
-rw-r--r--src/emu/cpu/mb86233/mb86233.h2
-rw-r--r--src/emu/cpu/mb88xx/mb88dasm.c2
-rw-r--r--src/emu/cpu/mb88xx/mb88xx.c32
-rw-r--r--src/emu/cpu/mb88xx/mb88xx.h12
-rw-r--r--src/emu/cpu/mc68hc11/mc68hc11.c14
-rw-r--r--src/emu/cpu/mc68hc11/mc68hc11.h2
-rw-r--r--src/emu/cpu/mcs48/mcs48.c60
-rw-r--r--src/emu/cpu/mcs48/mcs48.h24
-rw-r--r--src/emu/cpu/mcs48/mcs48dsm.c2
-rw-r--r--src/emu/cpu/mcs51/mcs51.c94
-rw-r--r--src/emu/cpu/mcs51/mcs51.h38
-rw-r--r--src/emu/cpu/mcs51/mcs51dasm.c20
-rw-r--r--src/emu/cpu/minx/minx.c10
-rw-r--r--src/emu/cpu/minx/minx.h2
-rw-r--r--src/emu/cpu/minx/minxd.c3
-rw-r--r--src/emu/cpu/mips/mips3.c46
-rw-r--r--src/emu/cpu/mips/mips3.h20
-rw-r--r--src/emu/cpu/mips/mips3drc.c70
-rw-r--r--src/emu/cpu/mips/psx.c26
-rw-r--r--src/emu/cpu/mips/psx.h2
-rw-r--r--src/emu/cpu/mips/r3000.c34
-rw-r--r--src/emu/cpu/mips/r3000.h8
-rw-r--r--src/emu/cpu/nec/nec.c38
-rw-r--r--src/emu/cpu/nec/necintrf.h6
-rw-r--r--src/emu/cpu/pdp1/pdp1.c16
-rw-r--r--src/emu/cpu/pdp1/pdp1.h4
-rw-r--r--src/emu/cpu/pdp1/pdp1dasm.c2
-rw-r--r--src/emu/cpu/pdp1/tx0.c26
-rw-r--r--src/emu/cpu/pdp1/tx0.h8
-rw-r--r--src/emu/cpu/pdp1/tx0dasm.c4
-rw-r--r--src/emu/cpu/pic16c5x/16c5xdsm.c16
-rw-r--r--src/emu/cpu/pic16c5x/pic16c5x.c36
-rw-r--r--src/emu/cpu/pic16c5x/pic16c5x.h12
-rw-r--r--src/emu/cpu/powerpc/ppc.c80
-rw-r--r--src/emu/cpu/powerpc/ppc.h18
-rw-r--r--src/emu/cpu/powerpc/ppc_mem.c8
-rw-r--r--src/emu/cpu/powerpc/ppcdrc.c70
-rw-r--r--src/emu/cpu/rsp/rsp.c18
-rw-r--r--src/emu/cpu/rsp/rsp.h2
-rw-r--r--src/emu/cpu/s2650/2650dasm.c328
-rw-r--r--src/emu/cpu/s2650/s2650.c16
-rw-r--r--src/emu/cpu/s2650/s2650.h4
-rw-r--r--src/emu/cpu/saturn/saturn.c16
-rw-r--r--src/emu/cpu/saturn/saturn.h4
-rw-r--r--src/emu/cpu/saturn/saturnds.c76
-rw-r--r--src/emu/cpu/sc61860/sc61860.c16
-rw-r--r--src/emu/cpu/sc61860/sc61860.h4
-rw-r--r--src/emu/cpu/sc61860/scdasm.c24
-rw-r--r--src/emu/cpu/se3208/se3208.c16
-rw-r--r--src/emu/cpu/se3208/se3208.h4
-rw-r--r--src/emu/cpu/se3208/se3208dis.c6
-rw-r--r--src/emu/cpu/sh2/sh2.c20
-rw-r--r--src/emu/cpu/sh2/sh2.h2
-rw-r--r--src/emu/cpu/sh2/sh2drc.c22
-rw-r--r--src/emu/cpu/sh4/sh4.c18
-rw-r--r--src/emu/cpu/sh4/sh4.h2
-rw-r--r--src/emu/cpu/sharc/sharc.c44
-rw-r--r--src/emu/cpu/sharc/sharc.h2
-rw-r--r--src/emu/cpu/sharc/sharcops.c2
-rw-r--r--src/emu/cpu/sm8500/sm8500.c20
-rw-r--r--src/emu/cpu/sm8500/sm8500.h4
-rw-r--r--src/emu/cpu/sm8500/sm8500d.c2
-rw-r--r--src/emu/cpu/spc700/spc700.c30
-rw-r--r--src/emu/cpu/spc700/spc700.h4
-rw-r--r--src/emu/cpu/spc700/spc700ds.c6
-rw-r--r--src/emu/cpu/spc700/spc700ds.h2
-rw-r--r--src/emu/cpu/ssp1601/ssp1601.c26
-rw-r--r--src/emu/cpu/ssp1601/ssp1601.h2
-rw-r--r--src/emu/cpu/t11/t11.c16
-rw-r--r--src/emu/cpu/t11/t11.h4
-rw-r--r--src/emu/cpu/t11/t11dasm.c2
-rw-r--r--src/emu/cpu/tlcs90/tlcs90.c42
-rw-r--r--src/emu/cpu/tlcs90/tlcs90.h2
-rw-r--r--src/emu/cpu/tms32010/32010dsm.c16
-rw-r--r--src/emu/cpu/tms32010/tms32010.c16
-rw-r--r--src/emu/cpu/tms32010/tms32010.h4
-rw-r--r--src/emu/cpu/tms32025/32025dsm.c16
-rw-r--r--src/emu/cpu/tms32025/tms32025.c50
-rw-r--r--src/emu/cpu/tms32025/tms32025.h6
-rw-r--r--src/emu/cpu/tms32031/tms32031.c22
-rw-r--r--src/emu/cpu/tms32031/tms32031.h4
-rw-r--r--src/emu/cpu/tms32051/dis32051.c2
-rw-r--r--src/emu/cpu/tms32051/tms32051.c28
-rw-r--r--src/emu/cpu/tms32051/tms32051.h4
-rw-r--r--src/emu/cpu/tms34010/34010dsm.c4
-rw-r--r--src/emu/cpu/tms34010/34010gfx.c112
-rw-r--r--src/emu/cpu/tms34010/34010ops.c176
-rw-r--r--src/emu/cpu/tms34010/34010ops.h4
-rw-r--r--src/emu/cpu/tms34010/tms34010.c412
-rw-r--r--src/emu/cpu/tms34010/tms34010.h8
-rw-r--r--src/emu/cpu/tms7000/7000dasm.c2
-rw-r--r--src/emu/cpu/tms7000/tms7000.c24
-rw-r--r--src/emu/cpu/tms7000/tms7000.h6
-rw-r--r--src/emu/cpu/tms9900/99xxcore.h27
-rw-r--r--src/emu/cpu/tms9900/tms9900.h20
-rw-r--r--src/emu/cpu/upd7810/7810dasm.c10
-rw-r--r--src/emu/cpu/upd7810/upd7810.c38
-rw-r--r--src/emu/cpu/upd7810/upd7810.h18
-rw-r--r--src/emu/cpu/v30mz/necintrf.h2
-rw-r--r--src/emu/cpu/v30mz/v30mz.c18
-rw-r--r--src/emu/cpu/v60/v60.c26
-rw-r--r--src/emu/cpu/v60/v60.h4
-rw-r--r--src/emu/cpu/v60/v60d.c4
-rw-r--r--src/emu/cpu/v810/v810.c16
-rw-r--r--src/emu/cpu/v810/v810.h2
-rw-r--r--src/emu/cpu/v810/v810dasm.c3
-rw-r--r--src/emu/cpu/z180/z180.c30
-rw-r--r--src/emu/cpu/z180/z180.h4
-rw-r--r--src/emu/cpu/z180/z180dasm.c2
-rw-r--r--src/emu/cpu/z180/z180ops.h2
-rw-r--r--src/emu/cpu/z80/z80.c22
-rw-r--r--src/emu/cpu/z80/z80.h4
-rw-r--r--src/emu/cpu/z80/z80dasm.c2
-rw-r--r--src/emu/cpu/z8000/8000dasm.c4
-rw-r--r--src/emu/cpu/z8000/z8000.c16
-rw-r--r--src/emu/cpu/z8000/z8000.h4
221 files changed, 3122 insertions, 3117 deletions
diff --git a/src/emu/cpu/adsp2100/2100dasm.c b/src/emu/cpu/adsp2100/2100dasm.c
index 8baeecdf6c7..75ead4fad40 100644
--- a/src/emu/cpu/adsp2100/2100dasm.c
+++ b/src/emu/cpu/adsp2100/2100dasm.c
@@ -230,7 +230,7 @@ static int aluconst(char *buffer, int dest, int op)
/* execute instructions on this CPU until icount expires */
-offs_t adsp21xx_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( adsp21xx )
{
unsigned int op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16);
unsigned dasmflags = 0;
diff --git a/src/emu/cpu/adsp2100/adsp2100.c b/src/emu/cpu/adsp2100/adsp2100.c
index 11412137f68..b79298ecf48 100644
--- a/src/emu/cpu/adsp2100/adsp2100.c
+++ b/src/emu/cpu/adsp2100/adsp2100.c
@@ -550,12 +550,12 @@ static void set_irq_line(adsp2100_state *adsp, int irqline, int state)
CONTEXT SWITCHING
***************************************************************************/
-static void adsp21xx_get_context(void *dst)
+static CPU_GET_CONTEXT( adsp21xx )
{
}
-static void adsp21xx_set_context(void *src)
+static CPU_SET_CONTEXT( adsp21xx )
{
/* copy the context */
if (src)
@@ -1669,7 +1669,7 @@ static CPU_EXECUTE( adsp21xx )
DEBUGGER DEFINITIONS
***************************************************************************/
-extern offs_t adsp21xx_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( adsp21xx );
@@ -1677,7 +1677,7 @@ extern offs_t adsp21xx_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const U
* Generic set_info
**************************************************************************/
-static void adsp21xx_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( adsp21xx )
{
adsp2100_state *adsp = token;
switch (state)
@@ -1790,7 +1790,7 @@ static void adsp21xx_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-static void adsp21xx_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( adsp21xx )
{
adsp2100_state *adsp = token;
switch (state)
@@ -1919,14 +1919,14 @@ static void adsp21xx_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_SET_INFO: /* set per CPU */ break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = adsp21xx_set_context;break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = adsp21xx_get_context;break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(adsp21xx);break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(adsp21xx);break;
case CPUINFO_PTR_INIT: /* set per CPU */ break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(adsp21xx); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(adsp21xx); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(adsp21xx); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = adsp21xx_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(adsp21xx); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &adsp->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -2074,7 +2074,7 @@ static CPU_INIT( adsp2100 )
adsp->imask_mask = 0x0f;
}
-static void adsp2100_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( adsp2100 )
{
adsp2100_state *adsp = token;
switch (state)
@@ -2086,12 +2086,12 @@ static void adsp2100_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_INPUT_STATE + ADSP2100_IRQ3: set_irq_line(adsp, ADSP2100_IRQ3, info->i); break;
default:
- adsp21xx_set_info(state, info);
+ CPU_SET_INFO_CALL(adsp21xx);
break;
}
}
-void adsp2100_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( adsp2100 )
{
adsp2100_state *adsp = token;
switch (state)
@@ -2105,14 +2105,14 @@ void adsp2100_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(adsp2100); break;
- case CPUINFO_PTR_SET_INFO: info->setinfo = adsp2100_set_info; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = adsp21xx_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp2100); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(adsp21xx); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2100"); break;
default:
- adsp21xx_get_info(state, info);
+ CPU_GET_INFO_CALL(adsp21xx);
break;
}
}
@@ -2132,7 +2132,7 @@ static CPU_INIT( adsp2101 )
adsp->imask_mask = 0x3f;
}
-static void adsp2101_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( adsp2101 )
{
adsp2100_state *adsp = token;
switch (state)
@@ -2151,12 +2151,12 @@ static void adsp2101_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_ADSP2100_TIMER_HANDLER: adsp->timer_fired_func = (ADSP2100_TIMER_CALLBACK)info->f; break;
default:
- adsp21xx_set_info(state, info);
+ CPU_SET_INFO_CALL(adsp21xx);
break;
}
}
-void adsp2101_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( adsp2101 )
{
adsp2100_state *adsp = token;
switch (state)
@@ -2172,7 +2172,7 @@ void adsp2101_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(adsp2101); break;
- case CPUINFO_PTR_SET_INFO: info->setinfo = adsp2101_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp2101); break;
case CPUINFO_PTR_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break;
case CPUINFO_PTR_ADSP2100_TX_HANDLER: info->f = (genf *)adsp->sport_tx_callback; break;
@@ -2182,7 +2182,7 @@ void adsp2101_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2101"); break;
default:
- adsp21xx_get_info(state, info);
+ CPU_GET_INFO_CALL(adsp21xx);
break;
}
}
@@ -2207,7 +2207,7 @@ void adsp2104_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
adsp21xx_load_boot_data(srcdata, dstdata);
}
-static void adsp2104_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( adsp2104 )
{
adsp2100_state *adsp = token;
switch (state)
@@ -2226,12 +2226,12 @@ static void adsp2104_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_ADSP2100_TIMER_HANDLER: adsp->timer_fired_func = (ADSP2100_TIMER_CALLBACK)info->f; break;
default:
- adsp21xx_set_info(state, info);
+ CPU_SET_INFO_CALL(adsp21xx);
break;
}
}
-void adsp2104_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( adsp2104 )
{
adsp2100_state *adsp = token;
switch (state)
@@ -2247,7 +2247,7 @@ void adsp2104_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(adsp2104); break;
- case CPUINFO_PTR_SET_INFO: info->setinfo = adsp2104_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp2104); break;
case CPUINFO_PTR_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break;
case CPUINFO_PTR_ADSP2100_TX_HANDLER: info->f = (genf *)adsp->sport_tx_callback; break;
@@ -2257,7 +2257,7 @@ void adsp2104_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2104"); break;
default:
- adsp21xx_get_info(state, info);
+ CPU_GET_INFO_CALL(adsp21xx);
break;
}
}
@@ -2282,7 +2282,7 @@ void adsp2105_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
adsp21xx_load_boot_data(srcdata, dstdata);
}
-static void adsp2105_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( adsp2105 )
{
adsp2100_state *adsp = token;
switch (state)
@@ -2298,12 +2298,12 @@ static void adsp2105_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_ADSP2100_TIMER_HANDLER: adsp->timer_fired_func = (ADSP2100_TIMER_CALLBACK)info->f; break;
default:
- adsp21xx_set_info(state, info);
+ CPU_SET_INFO_CALL(adsp21xx);
break;
}
}
-void adsp2105_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( adsp2105 )
{
adsp2100_state *adsp = token;
switch (state)
@@ -2316,7 +2316,7 @@ void adsp2105_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(adsp2105); break;
- case CPUINFO_PTR_SET_INFO: info->setinfo = adsp2105_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp2105); break;
case CPUINFO_PTR_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break;
case CPUINFO_PTR_ADSP2100_TX_HANDLER: info->f = (genf *)adsp->sport_tx_callback; break;
@@ -2326,7 +2326,7 @@ void adsp2105_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2105"); break;
default:
- adsp21xx_get_info(state, info);
+ CPU_GET_INFO_CALL(adsp21xx);
break;
}
}
@@ -2351,7 +2351,7 @@ void adsp2115_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
adsp21xx_load_boot_data(srcdata, dstdata);
}
-static void adsp2115_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( adsp2115 )
{
adsp2100_state *adsp = token;
switch (state)
@@ -2370,12 +2370,12 @@ static void adsp2115_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_ADSP2100_TIMER_HANDLER: adsp->timer_fired_func = (ADSP2100_TIMER_CALLBACK)info->f; break;
default:
- adsp21xx_set_info(state, info);
+ CPU_SET_INFO_CALL(adsp21xx);
break;
}
}
-void adsp2115_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( adsp2115 )
{
adsp2100_state *adsp = token;
switch (state)
@@ -2391,7 +2391,7 @@ void adsp2115_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(adsp2115); break;
- case CPUINFO_PTR_SET_INFO: info->setinfo = adsp2115_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp2115); break;
case CPUINFO_PTR_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break;
case CPUINFO_PTR_ADSP2100_TX_HANDLER: info->f = (genf *)adsp->sport_tx_callback; break;
@@ -2401,7 +2401,7 @@ void adsp2115_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2115"); break;
default:
- adsp21xx_get_info(state, info);
+ CPU_GET_INFO_CALL(adsp21xx);
break;
}
}
@@ -2426,7 +2426,7 @@ void adsp2181_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
adsp21xx_load_boot_data(srcdata, dstdata);
}
-static void adsp2181_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( adsp2181 )
{
adsp2100_state *adsp = token;
switch (state)
@@ -2448,12 +2448,12 @@ static void adsp2181_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_ADSP2100_TIMER_HANDLER: adsp->timer_fired_func = (ADSP2100_TIMER_CALLBACK)info->f; break;
default:
- adsp21xx_set_info(state, info);
+ CPU_SET_INFO_CALL(adsp21xx);
break;
}
}
-void adsp2181_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( adsp2181 )
{
adsp2100_state *adsp = token;
switch (state)
@@ -2476,7 +2476,7 @@ void adsp2181_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(adsp2181); break;
- case CPUINFO_PTR_SET_INFO: info->setinfo = adsp2181_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp2181); break;
case CPUINFO_PTR_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break;
case CPUINFO_PTR_ADSP2100_TX_HANDLER: info->f = (genf *)adsp->sport_tx_callback; break;
@@ -2486,7 +2486,7 @@ void adsp2181_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2181"); break;
default:
- adsp21xx_get_info(state, info);
+ CPU_GET_INFO_CALL(adsp21xx);
break;
}
}
diff --git a/src/emu/cpu/adsp2100/adsp2100.h b/src/emu/cpu/adsp2100/adsp2100.h
index 53d060ef8e7..d2e07578c26 100644
--- a/src/emu/cpu/adsp2100/adsp2100.h
+++ b/src/emu/cpu/adsp2100/adsp2100.h
@@ -66,7 +66,7 @@ enum
#define ADSP2100_IRQ3 3 /* IRQ3 */
#if (HAS_ADSP2100)
-extern void adsp2100_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( adsp2100 );
#endif
/**************************************************************************
@@ -83,7 +83,7 @@ extern void adsp2100_get_info(UINT32 state, cpuinfo *info);
#define ADSP2101_TIMER 5 /* internal timer IRQ */
#if (HAS_ADSP2101)
-extern void adsp2101_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( adsp2101 );
#endif
#if (HAS_ADSP2104)
@@ -100,7 +100,7 @@ extern void adsp2101_get_info(UINT32 state, cpuinfo *info);
#define ADSP2104_SPORT0_TX 4 /* SPORT0 transmit IRQ */
#define ADSP2104_TIMER 5 /* internal timer IRQ */
-extern void adsp2104_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( adsp2104 );
extern void adsp2104_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
#endif /* (HAS_ADSP2104) */
@@ -116,7 +116,7 @@ extern void adsp2104_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
#define ADSP2105_IRQ2 2 /* IRQ2 */
#define ADSP2105_TIMER 5 /* internal timer IRQ */
-extern void adsp2105_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( adsp2105 );
extern void adsp2105_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
#endif /* (HAS_ADSP2105) */
@@ -134,7 +134,7 @@ extern void adsp2105_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
#define ADSP2115_SPORT0_TX 4 /* SPORT0 transmit IRQ */
#define ADSP2115_TIMER 5 /* internal timer IRQ */
-extern void adsp2115_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( adsp2115 );
extern void adsp2115_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
#endif /* (HAS_ADSP2115) */
@@ -155,7 +155,7 @@ extern void adsp2115_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
#define ADSP2181_IRQL1 7 /* IRQL1 */
#define ADSP2181_IRQL2 8 /* IRQL2 */
-extern void adsp2181_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( adsp2181 );
extern void adsp2181_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
extern void adsp2181_idma_addr_w(UINT16 data);
extern UINT16 adsp2181_idma_addr_r(void);
diff --git a/src/emu/cpu/alph8201/8201dasm.c b/src/emu/cpu/alph8201/8201dasm.c
index 96cff9a6b58..926c14a288d 100644
--- a/src/emu/cpu/alph8201/8201dasm.c
+++ b/src/emu/cpu/alph8201/8201dasm.c
@@ -336,7 +336,7 @@ static void InitDasm8201(void)
OpInizialized = 1;
}
-offs_t ALPHA8201_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( ALPHA8201 )
{
offs_t dasmflags = 0;
int i;
diff --git a/src/emu/cpu/alph8201/alph8201.c b/src/emu/cpu/alph8201/alph8201.c
index b2751aa2d8c..b8704afc22f 100644
--- a/src/emu/cpu/alph8201/alph8201.c
+++ b/src/emu/cpu/alph8201/alph8201.c
@@ -812,7 +812,7 @@ static CPU_EXECUTE( ALPHA8301 ) { return alpha8xxx_execute(opcode_8301,cycles);
/****************************************************************************
* Get all registers in given buffer
****************************************************************************/
-static void ALPHA8201_get_context (void *dst)
+static CPU_GET_CONTEXT( ALPHA8201 )
{
if( dst )
*(ALPHA8201_Regs*)dst = R;
@@ -821,7 +821,7 @@ static void ALPHA8201_get_context (void *dst)
/****************************************************************************
* Set all registers to given values
****************************************************************************/
-static void ALPHA8201_set_context (void *src)
+static CPU_SET_CONTEXT( ALPHA8201 )
{
if( src )
R = *(ALPHA8201_Regs*)src;
@@ -846,7 +846,7 @@ static void set_irq_line(int irqline, int state)
* Generic set_info
**************************************************************************/
-static void ALPHA8201_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( ALPHA8201 )
{
switch (state)
{
@@ -889,7 +889,7 @@ static void ALPHA8201_set_info(UINT32 state, cpuinfo *info)
**************************************************************************/
/* 8201 and 8301 */
-static void alpha8xxx_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( alpha8xxx )
{
switch (state)
{
@@ -944,14 +944,14 @@ static void alpha8xxx_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + ALPHA8201_R7: info->i = RD_REG(7); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = ALPHA8201_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = ALPHA8201_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = ALPHA8201_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ALPHA8201); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(ALPHA8201); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(ALPHA8201); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ALPHA8201); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ALPHA8201); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ALPHA8201); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = ALPHA8201_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ALPHA8201); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ALPHA8201_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -987,7 +987,7 @@ static void alpha8xxx_get_info(UINT32 state, cpuinfo *info)
}
}
#if (HAS_ALPHA8201)
-void alpha8201_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( alpha8201 )
{
switch (state)
{
@@ -995,13 +995,13 @@ void alpha8201_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ALPHA8201); break;
default:
/* 8201 / 8301 */
- alpha8xxx_get_info(state,info);
+ CPU_GET_INFO_CALL(alpha8xxx);
}
}
#endif
#if (HAS_ALPHA8301)
-void alpha8301_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( alpha8301 )
{
switch (state)
{
@@ -1009,7 +1009,7 @@ void alpha8301_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ALPHA8301); break;
default:
/* 8201 / 8301 */
- alpha8xxx_get_info(state,info);
+ CPU_GET_INFO_CALL(alpha8xxx);
}
}
#endif
diff --git a/src/emu/cpu/alph8201/alph8201.h b/src/emu/cpu/alph8201/alph8201.h
index 32e11965bd8..34940f3b184 100644
--- a/src/emu/cpu/alph8201/alph8201.h
+++ b/src/emu/cpu/alph8201/alph8201.h
@@ -41,8 +41,8 @@ enum
ALPHA8201_R4,ALPHA8201_R5,ALPHA8201_R6,ALPHA8201_R7
};
-extern void alpha8201_get_info(UINT32 state, cpuinfo *info);
-extern void alpha8301_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( alpha8201 );
+extern CPU_GET_INFO( alpha8301 );
/*
* Read a UINT8 from given memory location
@@ -68,6 +68,6 @@ extern void alpha8301_get_info(UINT32 state, cpuinfo *info);
*/
#define ALPHA8201_RDOP_ARG(A) ((unsigned)cpu_readop_arg(A))
-offs_t ALPHA8201_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( ALPHA8201 );
#endif /* __ALPH8201_H__ */
diff --git a/src/emu/cpu/apexc/apexc.c b/src/emu/cpu/apexc/apexc.c
index feb02f8c84a..7afd689290e 100644
--- a/src/emu/cpu/apexc/apexc.c
+++ b/src/emu/cpu/apexc/apexc.c
@@ -785,13 +785,13 @@ static CPU_RESET( apexc )
which enables easy booting (just press run on the panel) */
}
-static void apexc_get_context(void *dst)
+static CPU_GET_CONTEXT( apexc )
{
if (dst)
* ((apexc_regs*) dst) = apexc;
}
-static void apexc_set_context(void *src)
+static CPU_SET_CONTEXT( apexc )
{
if (src)
apexc = * ((apexc_regs*)src);
@@ -816,7 +816,7 @@ static CPU_EXECUTE( apexc )
return cycles - apexc_ICount;
}
-static void apexc_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( apexc )
{
switch (state)
{
@@ -849,7 +849,7 @@ static void apexc_set_info(UINT32 state, cpuinfo *info)
}
}
-void apexc_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( apexc )
{
switch (state)
{
@@ -892,14 +892,14 @@ void apexc_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + APEXC_STATE: info->i = apexc.running; break;
case CPUINFO_INT_REGISTER + APEXC_ML_FULL: info->i = effective_address(apexc.ml); break;
- case CPUINFO_PTR_SET_INFO: info->setinfo = apexc_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = apexc_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = apexc_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(apexc); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(apexc); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(apexc); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(apexc); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(apexc); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(apexc); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = apexc_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(apexc); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &apexc_ICount; break;
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "APEXC"); break;
diff --git a/src/emu/cpu/apexc/apexc.h b/src/emu/cpu/apexc/apexc.h
index eb3bbcac088..25f9429034d 100644
--- a/src/emu/cpu/apexc/apexc.h
+++ b/src/emu/cpu/apexc/apexc.h
@@ -18,7 +18,7 @@ enum
from the contents of ML and WS */
};
-void apexc_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( apexc );
#ifndef SUPPORT_ODD_WORD_SIZES
#define apexc_readmem(address) program_read_dword_32be((address)<<2)
@@ -33,7 +33,7 @@ without danger */
#define apexc_writemem_masked(address, data, mask) cpu_writemem13_32masked((address), (data), (mask))
#endif
-unsigned apexc_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( apexc );
#define apexc_readop(address) apexc_readmem(address)
diff --git a/src/emu/cpu/apexc/apexcdsm.c b/src/emu/cpu/apexc/apexcdsm.c
index a9b99c52927..672f67db878 100644
--- a/src/emu/cpu/apexc/apexcdsm.c
+++ b/src/emu/cpu/apexc/apexcdsm.c
@@ -70,7 +70,7 @@ static const instr_desc instructions[16] =
{ "A", store }, { "S", swap }
};
-unsigned apexc_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( apexc )
{
UINT32 instruction; /* 32-bit machine instruction */
int x, y, function, c6, vector; /* instruction fields */
diff --git a/src/emu/cpu/arm/arm.c b/src/emu/cpu/arm/arm.c
index edf1060c578..6380b513b59 100644
--- a/src/emu/cpu/arm/arm.c
+++ b/src/emu/cpu/arm/arm.c
@@ -434,7 +434,7 @@ static CPU_EXECUTE( arm )
} /* arm_execute */
-static void arm_get_context(void *dst)
+static CPU_GET_CONTEXT( arm )
{
if( dst )
{
@@ -442,7 +442,7 @@ static void arm_get_context(void *dst)
}
}
-static void arm_set_context(void *src)
+static CPU_SET_CONTEXT( arm )
{
if (src)
{
@@ -506,7 +506,7 @@ static void set_irq_line(int irqline, int state)
arm_check_irq_state();
}
-static offs_t arm_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( arm )
{
UINT32 opcode = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
return 4 | arm_disasm(buffer, pc, opcode);
@@ -1414,7 +1414,7 @@ static void HandleCoPro( UINT32 insn)
* Generic set_info
**************************************************************************/
-static void arm_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( arm )
{
switch (state)
{
@@ -1462,7 +1462,7 @@ static void arm_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void arm_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( arm )
{
switch (state)
{
@@ -1526,15 +1526,15 @@ void arm_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + ARM32_SR14: info->i = arm.sArmRegister[eR14_SVC]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = arm_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = arm_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = arm_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(arm); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(arm); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(arm); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(arm); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(arm); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(arm); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(arm); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = arm_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(arm); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &arm_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/arm/arm.h b/src/emu/cpu/arm/arm.h
index 5819207d619..69701599cea 100644
--- a/src/emu/cpu/arm/arm.h
+++ b/src/emu/cpu/arm/arm.h
@@ -16,7 +16,7 @@
* PUBLIC FUNCTIONS
***************************************************************************************************/
-extern void arm_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( arm );
extern UINT32 arm_disasm(char *pBuf, UINT32 pc, UINT32 opcode);
diff --git a/src/emu/cpu/arm7/arm7.c b/src/emu/cpu/arm7/arm7.c
index ab27a245b8f..76c0ec96b7a 100644
--- a/src/emu/cpu/arm7/arm7.c
+++ b/src/emu/cpu/arm7/arm7.c
@@ -124,7 +124,7 @@ static void set_irq_line(int irqline, int state)
arm7_core_set_irq_line(irqline,state);
}
-static void arm7_get_context(void *dst)
+static CPU_GET_CONTEXT( arm7 )
{
if (dst)
{
@@ -132,7 +132,7 @@ static void arm7_get_context(void *dst)
}
}
-static void arm7_set_context(void *src)
+static CPU_SET_CONTEXT( arm7 )
{
if (src)
{
@@ -140,7 +140,7 @@ static void arm7_set_context(void *src)
}
}
-static offs_t arm7_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( arm7 )
{
if (T_IS_SET(GET_CPSR))
{
@@ -157,7 +157,7 @@ static offs_t arm7_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8
* Generic set_info
**************************************************************************/
-static void arm7_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( arm7 )
{
switch (state)
{
@@ -231,7 +231,7 @@ static void arm7_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void arm7_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( arm7 )
{
switch (state)
{
@@ -320,15 +320,15 @@ void arm7_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + ARM7_USPSR: info->i = ARM7REG(eSPSR_UND); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = arm7_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = arm7_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = arm7_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(arm7); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(arm7); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(arm7); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(arm7); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(arm7); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(arm7); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(arm7); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = arm7_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(arm7); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ARM7_ICOUNT; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/arm7/arm7.h b/src/emu/cpu/arm7/arm7.h
index ee7d3347c1e..b03896d66cc 100644
--- a/src/emu/cpu/arm7/arm7.h
+++ b/src/emu/cpu/arm7/arm7.h
@@ -38,6 +38,6 @@
/****************************************************************************************************
* PUBLIC FUNCTIONS
***************************************************************************************************/
-extern void arm7_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( arm7 );
#endif /* __ARM7_H__ */
diff --git a/src/emu/cpu/asap/asap.c b/src/emu/cpu/asap/asap.c
index 0925fa76cfa..40f967acac6 100644
--- a/src/emu/cpu/asap/asap.c
+++ b/src/emu/cpu/asap/asap.c
@@ -397,7 +397,7 @@ static void set_irq_line(int irqline, int state)
CONTEXT SWITCHING
***************************************************************************/
-static void asap_get_context(void *dst)
+static CPU_GET_CONTEXT( asap )
{
/* copy the context */
if (dst)
@@ -409,7 +409,7 @@ static void asap_get_context(void *dst)
}
-static void asap_set_context(void *src)
+static CPU_SET_CONTEXT( asap )
{
/* copy the context */
if (src)
@@ -604,7 +604,7 @@ static CPU_EXECUTE( asap )
DISASSEMBLY HOOK
***************************************************************************/
-extern offs_t asap_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( asap );
@@ -1715,7 +1715,7 @@ static void trapf(void)
* Generic set_info
**************************************************************************/
-static void asap_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( asap )
{
switch (state)
{
@@ -1768,7 +1768,7 @@ static void asap_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void asap_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( asap )
{
switch (state)
{
@@ -1836,15 +1836,15 @@ void asap_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + ASAP_R31: info->i = src2val[REGBASE + 31]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = asap_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = asap_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = asap_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(asap); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(asap); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(asap); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(asap); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(asap); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(asap); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(asap); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = asap_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(asap); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &asap_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/asap/asap.h b/src/emu/cpu/asap/asap.h
index 1a5e537798c..16997543da4 100644
--- a/src/emu/cpu/asap/asap.h
+++ b/src/emu/cpu/asap/asap.h
@@ -39,6 +39,6 @@ enum
PUBLIC FUNCTIONS
***************************************************************************/
-extern void asap_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( asap );
#endif /* __ASAP_H__ */
diff --git a/src/emu/cpu/asap/asapdasm.c b/src/emu/cpu/asap/asapdasm.c
index 4397dc56fb7..6d27d6f20c8 100644
--- a/src/emu/cpu/asap/asapdasm.c
+++ b/src/emu/cpu/asap/asapdasm.c
@@ -49,7 +49,7 @@ INLINE char *src2(UINT32 op, int scale)
return temp;
}
-offs_t asap_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( asap )
{
UINT32 op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
int opcode = op >> 27;
diff --git a/src/emu/cpu/ccpu/ccpu.c b/src/emu/cpu/ccpu/ccpu.c
index a72828545b5..42f916d7809 100644
--- a/src/emu/cpu/ccpu/ccpu.c
+++ b/src/emu/cpu/ccpu/ccpu.c
@@ -96,14 +96,14 @@ do { \
CONTEXT SWITCHING
***************************************************************************/
-static void ccpu_get_context(void *dst)
+static CPU_GET_CONTEXT( ccpu )
{
/* copy the context */
*(ccpuRegs *)dst = ccpu;
}
-static void ccpu_set_context(void *src)
+static CPU_SET_CONTEXT( ccpu )
{
/* copy the context */
if (src)
@@ -697,7 +697,7 @@ static CPU_EXECUTE( ccpu )
INFORMATION SETTERS
***************************************************************************/
-static void ccpu_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( ccpu )
{
switch (state)
{
@@ -730,7 +730,7 @@ static void ccpu_set_info(UINT32 state, cpuinfo *info)
INFORMATION GETTERS
***************************************************************************/
-void ccpu_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ccpu )
{
switch (state)
{
@@ -779,15 +779,15 @@ void ccpu_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + CCPU_T: info->i = ccpu.T; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = ccpu_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = ccpu_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = ccpu_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ccpu); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(ccpu); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(ccpu); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ccpu); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ccpu); break;
case CPUINFO_PTR_EXIT: info->exit = NULL; break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ccpu); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = ccpu_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ccpu); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ccpu_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/ccpu/ccpu.h b/src/emu/cpu/ccpu/ccpu.h
index 895614ffa4f..a0efd899f6d 100644
--- a/src/emu/cpu/ccpu/ccpu.h
+++ b/src/emu/cpu/ccpu/ccpu.h
@@ -53,9 +53,9 @@ struct _ccpu_config
PUBLIC FUNCTIONS
***************************************************************************/
-void ccpu_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( ccpu );
void ccpu_wdt_timer_trigger(void);
-offs_t ccpu_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( ccpu );
#endif /* __CCPU_H__ */
diff --git a/src/emu/cpu/ccpu/ccpudasm.c b/src/emu/cpu/ccpu/ccpudasm.c
index c51f2c7ca84..2388c52cbb9 100644
--- a/src/emu/cpu/ccpu/ccpudasm.c
+++ b/src/emu/cpu/ccpu/ccpudasm.c
@@ -11,7 +11,7 @@
#include "ccpu.h"
-offs_t ccpu_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( ccpu )
{
unsigned startpc = pc;
UINT8 opcode = oprom[pc++ - startpc];
diff --git a/src/emu/cpu/cdp1802/1802dasm.c b/src/emu/cpu/cdp1802/1802dasm.c
index 2f017e2eef2..0851998ebf2 100644
--- a/src/emu/cpu/cdp1802/1802dasm.c
+++ b/src/emu/cpu/cdp1802/1802dasm.c
@@ -96,10 +96,10 @@ static const struct { const char *mnemonic; Adr adr; } table[]={
};
-offs_t cdp1802_dasm(char *dst, offs_t oldpc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( cdp1802 )
{
UINT32 flags = 0;
- int pc;
+ int oldpc = pc;
int oper;
UINT16 absolut;
oldpc&=0xffff;
@@ -109,9 +109,9 @@ offs_t cdp1802_dasm(char *dst, offs_t oldpc, const UINT8 *oprom, const UINT8 *op
switch(oper&0xf0) {
case 0:
if (oper==0) {
- sprintf(dst,"%-5s",table[oper].mnemonic);
+ sprintf(buffer,"%-5s",table[oper].mnemonic);
} else {
- sprintf(dst,"%-5sR%.1x",table[(oper&0xf0)|1].mnemonic, oper&0x0f);
+ sprintf(buffer,"%-5sR%.1x",table[(oper&0xf0)|1].mnemonic, oper&0x0f);
}
break;
case 0xd0:
@@ -126,42 +126,42 @@ offs_t cdp1802_dasm(char *dst, offs_t oldpc, const UINT8 *oprom, const UINT8 *op
case 0xa0:
case 0xb0:
case 0xe0:
- sprintf(dst,"%-5sR%.1x",table[oper&0xf0].mnemonic, oper&0x0f);
+ sprintf(buffer,"%-5sR%.1x",table[oper&0xf0].mnemonic, oper&0x0f);
break;
default:
switch(oper&0xf8) {
case 0x60:
if (oper==0x60) {
- sprintf(dst,"%-5s",table[oper].mnemonic);
+ sprintf(buffer,"%-5s",table[oper].mnemonic);
} else {
- sprintf(dst,"%-5s%d",table[(oper&0xf8)|1].mnemonic, oper&0x7);
+ sprintf(buffer,"%-5s%d",table[(oper&0xf8)|1].mnemonic, oper&0x7);
}
break;
case 0x68:
- sprintf(dst,"%-5s%d",table[(oper&0xf8)|1].mnemonic, oper&0x7);
+ sprintf(buffer,"%-5s%d",table[(oper&0xf8)|1].mnemonic, oper&0x7);
break;
default:
switch (table[oper].adr) {
case Imp:
- sprintf(dst,"%-5s",table[oper].mnemonic);
+ sprintf(buffer,"%-5s",table[oper].mnemonic);
if (oper == 0x70 || oper == 0x71)
flags = DASMFLAG_STEP_OUT;
break;
case Imm:
- sprintf(dst,"%-5s#%.2x",table[oper].mnemonic,oprom[pc++ - oldpc]);
+ sprintf(buffer,"%-5s#%.2x",table[oper].mnemonic,oprom[pc++ - oldpc]);
break;
case Low:
absolut=oprom[pc++ - oldpc];
absolut|=pc&0xff00;
- sprintf(dst,"%-5s%.4x",table[oper].mnemonic,absolut);
+ sprintf(buffer,"%-5s%.4x",table[oper].mnemonic,absolut);
break;
case Abs:
absolut=oprom[pc++ - oldpc]<<8;
absolut|=oprom[pc++ - oldpc];
- sprintf(dst,"%-5s%.4x",table[oper].mnemonic,absolut);
+ sprintf(buffer,"%-5s%.4x",table[oper].mnemonic,absolut);
break;
default:
- sprintf(dst,"%-5s%.2x","ill",oper);
+ sprintf(buffer,"%-5s%.2x","ill",oper);
break;
}
break;
diff --git a/src/emu/cpu/cdp1802/cdp1802.c b/src/emu/cpu/cdp1802/cdp1802.c
index dff9ac4ce21..d7ba4e91b33 100644
--- a/src/emu/cpu/cdp1802/cdp1802.c
+++ b/src/emu/cpu/cdp1802/cdp1802.c
@@ -55,12 +55,12 @@ static int cdp1802_ICount;
static CDP1802_Regs cdp1802;
-static void cdp1802_get_context (void *dst)
+static CPU_GET_CONTEXT( cdp1802 )
{
*(CDP1802_Regs *)dst = cdp1802;
}
-static void cdp1802_set_context (void *src)
+static CPU_SET_CONTEXT( cdp1802 )
{
cdp1802 = *(CDP1802_Regs *)src;
}
@@ -914,7 +914,7 @@ static CPU_RESET( cdp1802 )
* Generic set_info
**************************************************************************/
-static void cdp1802_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( cdp1802 )
{
switch (state)
{
@@ -956,7 +956,7 @@ static void cdp1802_set_info(UINT32 state, cpuinfo *info)
/****************************************************************************
* Return a formatted string for a register
****************************************************************************/
-void cdp1802_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cdp1802 )
{
switch(state)
{
@@ -1019,14 +1019,14 @@ void cdp1802_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + CDP1802_PC: info->i = cdp1802.r[cdp1802.p]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = cdp1802_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cdp1802_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cdp1802_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cdp1802); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(cdp1802); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(cdp1802); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cdp1802); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cdp1802); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cdp1802); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cdp1802_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cdp1802); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cdp1802_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/cdp1802/cdp1802.h b/src/emu/cpu/cdp1802/cdp1802.h
index 19cc7701c1a..c3e30b68a41 100644
--- a/src/emu/cpu/cdp1802/cdp1802.h
+++ b/src/emu/cpu/cdp1802/cdp1802.h
@@ -71,7 +71,7 @@ enum
CDP1802_I, // Holds High-Order Instruction Digit
};
-void cdp1802_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( cdp1802 );
typedef cdp1802_control_mode (*cdp1802_mode_read_func)(running_machine *machine);
#define CDP1802_MODE_READ(name) cdp1802_control_mode name(running_machine *machine)
@@ -115,6 +115,6 @@ struct _cdp1802_interface
};
#define CDP1802_INTERFACE(name) const cdp1802_interface (name) =
-offs_t cdp1802_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( cdp1802 );
#endif /* __CDP1802_H__ */
diff --git a/src/emu/cpu/cop400/cop400.h b/src/emu/cpu/cop400/cop400.h
index 9fe7430a27a..aade3162890 100644
--- a/src/emu/cpu/cop400/cop400.h
+++ b/src/emu/cpu/cop400/cop400.h
@@ -82,25 +82,25 @@ struct _cop400_interface
*/
/* COP 41x */
-extern void cop401_get_info(UINT32 state, cpuinfo *info);
-extern void cop410_get_info(UINT32 state, cpuinfo *info);
-extern void cop411_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( cop401 );
+extern CPU_GET_INFO( cop410 );
+extern CPU_GET_INFO( cop411 );
/* COP 42x */
-extern void cop402_get_info(UINT32 state, cpuinfo *info);
-extern void cop420_get_info(UINT32 state, cpuinfo *info);
-extern void cop421_get_info(UINT32 state, cpuinfo *info);
-extern void cop422_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( cop402 );
+extern CPU_GET_INFO( cop420 );
+extern CPU_GET_INFO( cop421 );
+extern CPU_GET_INFO( cop422 );
/* COP 44x */
-extern void cop404_get_info(UINT32 state, cpuinfo *info);
-extern void cop424_get_info(UINT32 state, cpuinfo *info);
-extern void cop425_get_info(UINT32 state, cpuinfo *info);
-extern void cop426_get_info(UINT32 state, cpuinfo *info);
-extern void cop444_get_info(UINT32 state, cpuinfo *info);
-extern void cop445_get_info(UINT32 state, cpuinfo *info);
-
-offs_t cop410_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t cop420_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_GET_INFO( cop404 );
+extern CPU_GET_INFO( cop424 );
+extern CPU_GET_INFO( cop425 );
+extern CPU_GET_INFO( cop426 );
+extern CPU_GET_INFO( cop444 );
+extern CPU_GET_INFO( cop445 );
+
+CPU_DISASSEMBLE( cop410 );
+CPU_DISASSEMBLE( cop420 );
#endif /* __COP400__ */
diff --git a/src/emu/cpu/cop400/cop410.c b/src/emu/cpu/cop400/cop410.c
index fb3928e51f1..0454f39ec6c 100644
--- a/src/emu/cpu/cop400/cop410.c
+++ b/src/emu/cpu/cop400/cop410.c
@@ -375,7 +375,7 @@ static CPU_EXECUTE( cop410 )
/****************************************************************************
* Get all registers in given buffer
****************************************************************************/
-static void cop410_get_context (void *dst)
+static CPU_GET_CONTEXT( cop410 )
{
if( dst )
*(COP410_Regs*)dst = R;
@@ -385,7 +385,7 @@ static void cop410_get_context (void *dst)
/****************************************************************************
* Set all registers to given values
****************************************************************************/
-static void cop410_set_context (void *src)
+static CPU_SET_CONTEXT( cop410 )
{
if( src )
R = *(COP410_Regs*)src;
@@ -394,7 +394,7 @@ static void cop410_set_context (void *src)
/**************************************************************************
* Validity check
**************************************************************************/
-static int cop410_validity_check(const game_driver *driver, const void *config)
+static CPU_VALIDITY_CHECK( cop410 )
{
int error = FALSE;
const cop400_interface *intf = (const cop400_interface *) config;
@@ -412,7 +412,7 @@ static int cop410_validity_check(const game_driver *driver, const void *config)
* Generic set_info
**************************************************************************/
-static void cop410_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( cop410 )
{
switch (state)
{
@@ -437,7 +437,7 @@ static void cop410_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void cop410_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cop410 )
{
switch (state)
{
@@ -481,16 +481,16 @@ void cop410_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + COP400_SKL: info->i = SKL; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = cop410_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cop410_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cop410_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cop410); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(cop410); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(cop410); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cop410); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cop410); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cop410); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cop410_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cop410); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cop410_ICount; break;
- case CPUINFO_PTR_VALIDITY_CHECK: info->validity_check = cop410_validity_check; break;
+ case CPUINFO_PTR_VALIDITY_CHECK: info->validity_check = CPU_VALIDITY_CHECK_NAME(cop410); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
info->internal_map8 = address_map_cop410_internal_rom; break;
@@ -522,7 +522,7 @@ void cop410_get_info(UINT32 state, cpuinfo *info)
}
}
-void cop411_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cop411 )
{
// COP411 is a 20-pin package version of the COP410, missing D2/D3/G3/CKO
@@ -535,11 +535,11 @@ void cop411_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "COP411"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "National Semiconductor COPS"); break;
- default: cop410_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(cop410); break;
}
}
-void cop401_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cop401 )
{
// COP401 is a ROMless version of the COP410
@@ -551,6 +551,6 @@ void cop401_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
info->internal_map8 = NULL; break;
- default: cop410_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(cop410); break;
}
}
diff --git a/src/emu/cpu/cop400/cop410ds.c b/src/emu/cpu/cop400/cop410ds.c
index d08cdc37220..2fb7975d2e5 100644
--- a/src/emu/cpu/cop400/cop410ds.c
+++ b/src/emu/cpu/cop400/cop410ds.c
@@ -11,7 +11,7 @@
#include "cpuintrf.h"
-offs_t cop410_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( cop410 )
{
UINT8 opcode = oprom[0];
UINT8 next_opcode = oprom[1];
diff --git a/src/emu/cpu/cop400/cop420.c b/src/emu/cpu/cop400/cop420.c
index bbad6c68bf8..87c8904861b 100644
--- a/src/emu/cpu/cop400/cop420.c
+++ b/src/emu/cpu/cop400/cop420.c
@@ -545,7 +545,7 @@ static CPU_EXECUTE( cop420 )
/****************************************************************************
* Get all registers in given buffer
****************************************************************************/
-static void cop420_get_context (void *dst)
+static CPU_GET_CONTEXT( cop420 )
{
if( dst )
*(COP420_Regs*)dst = R;
@@ -555,7 +555,7 @@ static void cop420_get_context (void *dst)
/****************************************************************************
* Set all registers to given values
****************************************************************************/
-static void cop420_set_context (void *src)
+static CPU_SET_CONTEXT( cop420 )
{
if( src )
R = *(COP420_Regs*)src;
@@ -565,7 +565,7 @@ static void cop420_set_context (void *src)
* Generic set_info
**************************************************************************/
-static void cop420_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( cop420 )
{
switch (state)
{
@@ -591,7 +591,7 @@ static void cop420_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void cop420_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cop420 )
{
switch (state)
{
@@ -636,14 +636,14 @@ void cop420_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + COP400_SKL: info->i = SKL; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = cop420_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cop420_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cop420_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cop420); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(cop420); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(cop420); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cop420); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cop420); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cop420); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cop420_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cop420); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cop420_ICount; break;
/* case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
@@ -677,7 +677,7 @@ void cop420_get_info(UINT32 state, cpuinfo *info)
}
}
-void cop421_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cop421 )
{
// COP421 is a 24-pin package version of the COP420, lacking the IN ports
@@ -690,11 +690,11 @@ void cop421_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "COP421"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "National Semiconductor COPS"); break;
- default: cop420_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(cop420); break;
}
}
-void cop422_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cop422 )
{
// COP422 is a 20-pin package version of the COP420, lacking G0/G1, D0/D1, and the IN ports
@@ -707,11 +707,11 @@ void cop422_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "COP422"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "National Semiconductor COPS"); break;
- default: cop420_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(cop420); break;
}
}
-void cop402_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cop402 )
{
// COP402 is a ROMless version of the COP420
@@ -725,7 +725,7 @@ void cop402_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "COP402"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "National Semiconductor COPS"); break;
- default: cop420_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(cop420); break;
}
}
@@ -763,7 +763,7 @@ static ADDRESS_MAP_START( cop444_internal_ram, ADDRESS_SPACE_DATA, 8 )
AM_RANGE(0x00, 0x7f) AM_RAM
ADDRESS_MAP_END
-void cop444_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cop444 )
{
switch (state)
{
@@ -777,11 +777,11 @@ void cop444_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "COP444"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "National Semiconductor COPS"); break;
- default: cop420_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(cop420); break;
}
}
-void cop445_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cop445 )
{
// COP445 is a 24-pin package version of the COP444, lacking the IN ports
@@ -794,11 +794,11 @@ void cop445_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "COP445"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "National Semiconductor COPS"); break;
- default: cop444_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(cop444); break;
}
}
-void cop424_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cop424 )
{
// COP424 is functionally equivalent to COP444, with only 1K ROM and 64x4 bytes RAM
@@ -814,11 +814,11 @@ void cop424_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "COP424"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "National Semiconductor COPS"); break;
- default: cop444_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(cop444); break;
}
}
-void cop425_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cop425 )
{
// COP425 is a 24-pin package version of the COP424, lacking the IN ports
@@ -828,11 +828,11 @@ void cop425_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "COP425"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "National Semiconductor COPS"); break;
- default: cop444_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(cop444); break;
}
}
-void cop426_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cop426 )
{
// COP426 is a 20-pin package version of the COP424, with only L0-L7, G2-G3, D2-D3 ports
@@ -845,11 +845,11 @@ void cop426_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "COP426"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "National Semiconductor COPS"); break;
- default: cop444_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(cop444); break;
}
}
-void cop404_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cop404 )
{
// COP404 is a ROMless version of the COP444, which can emulate a COP410 or a COP424
@@ -863,6 +863,6 @@ void cop404_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "COP404"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "National Semiconductor COPS"); break;
- default: cop444_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(cop444); break;
}
}
diff --git a/src/emu/cpu/cop400/cop420ds.c b/src/emu/cpu/cop400/cop420ds.c
index 82fafe91947..038cb432e43 100644
--- a/src/emu/cpu/cop400/cop420ds.c
+++ b/src/emu/cpu/cop400/cop420ds.c
@@ -11,7 +11,7 @@
#include "cpuintrf.h"
-offs_t cop420_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( cop420 )
{
UINT8 opcode = oprom[0];
UINT8 next_opcode = oprom[1];
diff --git a/src/emu/cpu/cp1610/1610dasm.c b/src/emu/cpu/cp1610/1610dasm.c
index ce131b7f70d..8706c8d32b6 100644
--- a/src/emu/cpu/cp1610/1610dasm.c
+++ b/src/emu/cpu/cp1610/1610dasm.c
@@ -2,7 +2,7 @@
#include "debugger.h"
#include "cp1610.h"
-unsigned cp1610_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( cp1610 )
{
UINT16 op = oprom[0];
UINT16 subop;
diff --git a/src/emu/cpu/cp1610/cp1610.c b/src/emu/cpu/cp1610/cp1610.c
index 2e9ee62c125..d66196f76cd 100644
--- a/src/emu/cpu/cp1610/cp1610.c
+++ b/src/emu/cpu/cp1610/cp1610.c
@@ -3373,13 +3373,13 @@ static CPU_EXECUTE( cp1610 )
return cycles - cp1610_icount;
}
-static void cp1610_get_context (void *dst)
+static CPU_GET_CONTEXT( cp1610 )
{
if (dst)
*(cp1610_Regs *) dst = cp1610;
}
-static void cp1610_set_context (void *src)
+static CPU_SET_CONTEXT( cp1610 )
{
if (src)
cp1610 = *(cp1610_Regs *) src;
@@ -3417,7 +3417,7 @@ static void cp1610_set_irq_line(UINT32 irqline, int state)
}
}
-static void cp1610_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( cp1610 )
{
switch (state)
{
@@ -3442,7 +3442,7 @@ static void cp1610_set_info(UINT32 state, cpuinfo *info)
return;
}
-void cp1610_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cp1610 )
{
switch (state)
{
@@ -3486,15 +3486,15 @@ void cp1610_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + CP1610_R7: info->i = cp1610.r[7]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = cp1610_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cp1610_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cp1610_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cp1610); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(cp1610); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(cp1610); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cp1610); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cp1610); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cp1610); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cp1610_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cp1610); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cp1610_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/cp1610/cp1610.h b/src/emu/cpu/cp1610/cp1610.h
index 2b98041b67b..cc1d86eb5f7 100644
--- a/src/emu/cpu/cp1610/cp1610.h
+++ b/src/emu/cpu/cp1610/cp1610.h
@@ -36,9 +36,9 @@ enum
#define CP1610_INT_INTR INPUT_LINE_NMI /* Non-Maskable */
-void cp1610_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( cp1610 );
-unsigned cp1610_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( cp1610 );
// Temporary
#define cp1610_readop(A) program_read_word_16be((A)<<1)
diff --git a/src/emu/cpu/cubeqcpu/cubeqcpu.c b/src/emu/cpu/cubeqcpu/cubeqcpu.c
index cb187fa38ca..488dbadc0ba 100644
--- a/src/emu/cpu/cubeqcpu/cubeqcpu.c
+++ b/src/emu/cpu/cubeqcpu/cubeqcpu.c
@@ -257,7 +257,7 @@ READ16_HANDLER( read_rotram )
CONTEXT SWITCHING
***************************************************************************/
-static void cquestsnd_get_context(void *dst)
+static CPU_GET_CONTEXT( cquestsnd )
{
/* Copy the context */
if (dst)
@@ -265,7 +265,7 @@ static void cquestsnd_get_context(void *dst)
}
-static void cquestsnd_set_context(void *src)
+static CPU_SET_CONTEXT( cquestsnd )
{
/* Copy the context */
if (src)
@@ -273,7 +273,7 @@ static void cquestsnd_set_context(void *src)
}
-static void cquestrot_get_context(void *dst)
+static CPU_GET_CONTEXT( cquestrot )
{
/* Copy the context */
if (dst)
@@ -281,7 +281,7 @@ static void cquestrot_get_context(void *dst)
}
-static void cquestrot_set_context(void *src)
+static CPU_SET_CONTEXT( cquestrot )
{
/* Copy the context */
if (src)
@@ -289,7 +289,7 @@ static void cquestrot_set_context(void *src)
}
-static void cquestlin_get_context(void *dst)
+static CPU_GET_CONTEXT( cquestlin )
{
/* Copy the context */
if (dst)
@@ -297,7 +297,7 @@ static void cquestlin_get_context(void *dst)
}
-static void cquestlin_set_context(void *src)
+static CPU_SET_CONTEXT( cquestlin )
{
/* Copy the context */
if (src)
@@ -747,7 +747,7 @@ static CPU_EXECUTE( cquestsnd )
SOUND DISASSEMBLY HOOK
***************************************************************************/
-static offs_t cquestsnd_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( cquestsnd )
{
static const char *const jmps[] =
{
@@ -1200,7 +1200,7 @@ static CPU_EXECUTE( cquestrot )
ROTATE DISASSEMBLY HOOK
***************************************************************************/
-static offs_t cquestrot_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( cquestrot )
{
static const char *const jmps[] =
{
@@ -1758,7 +1758,7 @@ static CPU_EXECUTE( cquestlin )
LINE DRAWER DISASSEMBLY HOOK
***************************************************************************/
-static offs_t cquestlin_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( cquestlin )
{
static const char *const jmps[] =
{
@@ -1843,7 +1843,7 @@ static offs_t cquestlin_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const
* Sound set_info
**************************************************************************/
-static void cquestsnd_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( cquestsnd )
{
switch (state)
{
@@ -1878,7 +1878,7 @@ static void cquestsnd_set_info(UINT32 state, cpuinfo *info)
* Sound get_info
**************************************************************************/
-void cquestsnd_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cquestsnd )
{
switch (state)
{
@@ -1908,15 +1908,15 @@ void cquestsnd_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + CQUESTSND_ADRCNTR: info->i = cquestsnd.adrcntr; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = cquestsnd_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cquestsnd_get_context;break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cquestsnd_set_context;break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cquestsnd); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(cquestsnd);break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(cquestsnd);break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cquestsnd); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cquestsnd); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(cquestsnd); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cquestsnd); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cquestsnd_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cquestsnd); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cquestsnd_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -1956,7 +1956,7 @@ void cquestsnd_get_info(UINT32 state, cpuinfo *info)
* Rotate set_info
**************************************************************************/
-static void cquestrot_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( cquestrot )
{
switch (state)
{
@@ -1996,7 +1996,7 @@ static void cquestrot_set_info(UINT32 state, cpuinfo *info)
* Rotate get_info
**************************************************************************/
-void cquestrot_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cquestrot )
{
switch (state)
{
@@ -2024,15 +2024,15 @@ void cquestrot_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + CQUESTROT_PC: info->i = cquestrot.pc; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = cquestrot_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cquestrot_get_context;break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cquestrot_set_context;break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cquestrot); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(cquestrot);break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(cquestrot);break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cquestrot); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cquestrot); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(cquestrot); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cquestrot); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cquestrot_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cquestrot); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cquestrot_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -2081,7 +2081,7 @@ void cquestrot_get_info(UINT32 state, cpuinfo *info)
* Line drawer set_info
**************************************************************************/
-static void cquestlin_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( cquestlin )
{
switch (state)
{
@@ -2114,7 +2114,7 @@ static void cquestlin_set_info(UINT32 state, cpuinfo *info)
* Line drawer get_info
**************************************************************************/
-void cquestlin_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cquestlin )
{
switch (state)
{
@@ -2142,15 +2142,15 @@ void cquestlin_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + CQUESTLIN_FGPC: info->i = cquestlin.pc[cquestlin.clkcnt & 3 ? BACKGROUND : FOREGROUND]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = cquestlin_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = cquestlin_get_context;break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = cquestlin_set_context;break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cquestlin); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(cquestlin);break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(cquestlin);break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(cquestlin); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(cquestlin); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(cquestlin); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cquestlin); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = cquestlin_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cquestlin); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cquestlin_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/dsp32/dsp32.c b/src/emu/cpu/dsp32/dsp32.c
index 585aff5425f..f02e6806e49 100644
--- a/src/emu/cpu/dsp32/dsp32.c
+++ b/src/emu/cpu/dsp32/dsp32.c
@@ -322,7 +322,7 @@ static void update_pcr(UINT16 newval)
CONTEXT SWITCHING
***************************************************************************/
-static void dsp32c_get_context(void *dst)
+static CPU_GET_CONTEXT( dsp32c )
{
/* copy the context */
if (dst)
@@ -330,7 +330,7 @@ static void dsp32c_get_context(void *dst)
}
-static void dsp32c_set_context(void *src)
+static CPU_SET_CONTEXT( dsp32c )
{
/* copy the context */
if (src)
@@ -440,7 +440,7 @@ static CPU_EXECUTE( dsp32c )
DISASSEMBLY HOOK
***************************************************************************/
-static offs_t dsp32c_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( dsp32c )
{
extern unsigned dasm_dsp32(char *, unsigned, UINT32);
return dasm_dsp32(buffer, pc, oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24));
@@ -712,7 +712,7 @@ int dsp32c_pio_r(int cpunum, int reg)
* Generic set_info
**************************************************************************/
-static void dsp32c_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( dsp32c )
{
switch (state)
{
@@ -783,7 +783,7 @@ static void dsp32c_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void dsp32c_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( dsp32c )
{
switch (state)
{
@@ -870,15 +870,15 @@ void dsp32c_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + DSP32_IOC: info->i = dsp32.IOC; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = dsp32c_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = dsp32c_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = dsp32c_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(dsp32c); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(dsp32c); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(dsp32c); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(dsp32c); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(dsp32c); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(dsp32c); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(dsp32c); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = dsp32c_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(dsp32c); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &dsp32_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/dsp32/dsp32.h b/src/emu/cpu/dsp32/dsp32.h
index c52df8cd0af..6f61bad2e80 100644
--- a/src/emu/cpu/dsp32/dsp32.h
+++ b/src/emu/cpu/dsp32/dsp32.h
@@ -79,7 +79,7 @@ struct _dsp32_config
PUBLIC FUNCTIONS
***************************************************************************/
-extern void dsp32c_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( dsp32c );
extern void dsp32c_pio_w(int cpunum, int reg, int data);
extern int dsp32c_pio_r(int cpunum, int reg);
diff --git a/src/emu/cpu/dsp56k/dsp56dsm.c b/src/emu/cpu/dsp56k/dsp56dsm.c
index 59e51dde150..6af8ce7c4e2 100644
--- a/src/emu/cpu/dsp56k/dsp56dsm.c
+++ b/src/emu/cpu/dsp56k/dsp56dsm.c
@@ -208,7 +208,7 @@ enum bbbType { BBB_UPPER, BBB_MIDDLE, BBB_LOWER };
/*****************************/
/* Main disassembly function */
/*****************************/
-offs_t dsp56k_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( dsp56k )
{
/* ORDER: Handle parallel types in the ALU */
/* Handle the rest */
diff --git a/src/emu/cpu/dsp56k/dsp56k.c b/src/emu/cpu/dsp56k/dsp56k.c
index 299e1ba66d3..26d32260531 100644
--- a/src/emu/cpu/dsp56k/dsp56k.c
+++ b/src/emu/cpu/dsp56k/dsp56k.c
@@ -358,14 +358,14 @@ static void set_irq_line(int irqline, int state)
CONTEXT SWITCHING
***************************************************************************/
-static void dsp56k_get_context(void *dst)
+static CPU_GET_CONTEXT( dsp56k )
{
if (dst)
*(dsp56k_core *)dst = core;
}
-static void dsp56k_set_context(void *src)
+static CPU_SET_CONTEXT( dsp56k )
{
if (src)
core = *(dsp56k_core *)src;
@@ -501,7 +501,7 @@ static CPU_EXECUTE( dsp56k )
/***************************************************************************
DISASSEMBLY HOOK
***************************************************************************/
-extern offs_t dsp56k_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( dsp56k );
/****************************************************************************
@@ -522,7 +522,7 @@ ADDRESS_MAP_END
* Generic set_info/get_info
**************************************************************************/
-static void dsp56k_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( dsp56k )
{
switch (state)
{
@@ -588,7 +588,7 @@ static void dsp56k_set_info(UINT32 state, cpuinfo *info)
}
-void dsp56k_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( dsp56k )
{
switch (state)
{
@@ -674,16 +674,16 @@ void dsp56k_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + DSP56K_ST15: info->i = ST15; break;
// --- the following bits of info are returned as pointers to data or functions ---
- case CPUINFO_PTR_SET_INFO: info->setinfo = dsp56k_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = dsp56k_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = dsp56k_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(dsp56k); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(dsp56k); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(dsp56k); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(dsp56k); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(dsp56k); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(dsp56k); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(dsp56k); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = dsp56k_dasm; break;
- case CPUINFO_PTR_DEBUG_SETUP_COMMANDS: info->setup_commands = NULL; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(dsp56k); break;
+ case CPUINFO_PTR_DEBUG_INIT: info->debug_init = NULL; break;
case CPUINFO_PTR_TRANSLATE: info->translate = NULL; break;
case CPUINFO_PTR_READ: info->read = NULL; break;
case CPUINFO_PTR_WRITE: info->write = NULL; break;
diff --git a/src/emu/cpu/dsp56k/dsp56k.h b/src/emu/cpu/dsp56k/dsp56k.h
index f17c4fcad3b..86e5d1b4826 100644
--- a/src/emu/cpu/dsp56k/dsp56k.h
+++ b/src/emu/cpu/dsp56k/dsp56k.h
@@ -76,7 +76,7 @@ enum _parallel_move_type
};
typedef enum _parallelMoveType parallelMoveType;
-extern void dsp56k_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( dsp56k );
void dsp56k_host_interface_write(UINT8 offset, UINT8 data);
UINT8 dsp56k_host_interface_read(UINT8 offset);
diff --git a/src/emu/cpu/e132xs/e132xs.c b/src/emu/cpu/e132xs/e132xs.c
index 2e284b88ef4..11810cdb167 100644
--- a/src/emu/cpu/e132xs/e132xs.c
+++ b/src/emu/cpu/e132xs/e132xs.c
@@ -1766,21 +1766,21 @@ static CPU_EXIT( hyperstone )
// nothing to do
}
-static void hyperstone_get_context(void *regs)
+static CPU_GET_CONTEXT( hyperstone )
{
/* copy the context */
- if( regs )
- *(hyperstone_regs *)regs = hyperstone;
+ if( dst )
+ *(hyperstone_regs *)dst = hyperstone;
}
-static void hyperstone_set_context(void *regs)
+static CPU_SET_CONTEXT( hyperstone )
{
/* copy the context */
- if (regs)
- hyperstone = *(hyperstone_regs *)regs;
+ if (src)
+ hyperstone = *(hyperstone_regs *)src;
}
-static offs_t hyperstone_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( hyperstone )
{
return dasm_hyperstone( buffer, pc, oprom, GET_H, GET_FP );
}
@@ -4800,7 +4800,7 @@ static CPU_EXECUTE( hyperstone )
* Generic set_info
**************************************************************************/
-static void hyperstone_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( hyperstone )
{
switch (state)
{
@@ -4936,7 +4936,7 @@ static void hyperstone_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-static void hyperstone_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( hyperstone )
{
switch (state)
{
@@ -5080,15 +5080,15 @@ static void hyperstone_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + E132XS_L63: info->i = hyperstone.local_regs[63]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = hyperstone_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = hyperstone_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = hyperstone_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(hyperstone); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(hyperstone); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(hyperstone); break;
case CPUINFO_PTR_INIT: info->init = NULL; break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(hyperstone); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(hyperstone); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(hyperstone); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = hyperstone_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hyperstone); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &hyperstone_ICount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map16 = NULL; break;
@@ -5238,7 +5238,7 @@ static void hyperstone_get_info(UINT32 state, cpuinfo *info)
#if (HAS_E116T)
-void e116t_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( e116t )
{
switch (state)
{
@@ -5255,13 +5255,13 @@ void e116t_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "E1-16T"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
#if (HAS_E116XT)
-void e116xt_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( e116xt )
{
switch (state)
{
@@ -5278,13 +5278,13 @@ void e116xt_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "E1-16XT"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
#if (HAS_E116XS)
-void e116xs_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( e116xs )
{
switch (state)
{
@@ -5301,13 +5301,13 @@ void e116xs_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "E1-16XS"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
#if (HAS_E116XSR)
-void e116xsr_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( e116xsr )
{
switch (state)
{
@@ -5324,13 +5324,13 @@ void e116xsr_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "E1-16XSR"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
#if (HAS_E132N)
-void e132n_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( e132n )
{
switch (state)
{
@@ -5347,13 +5347,13 @@ void e132n_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "E1-32N"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
#if (HAS_E132T)
-void e132t_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( e132t )
{
switch (state)
{
@@ -5370,13 +5370,13 @@ void e132t_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "E1-32T"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
#if (HAS_E132XN)
-void e132xn_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( e132xn )
{
switch (state)
{
@@ -5393,13 +5393,13 @@ void e132xn_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "E1-32XN"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
#if (HAS_E132XT)
-void e132xt_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( e132xt )
{
switch (state)
{
@@ -5416,13 +5416,13 @@ void e132xt_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "E1-32XT"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
#if (HAS_E132XS)
-void e132xs_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( e132xs )
{
switch (state)
{
@@ -5439,13 +5439,13 @@ void e132xs_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "E1-32XS"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
#if (HAS_E132XSR)
-void e132xsr_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( e132xsr )
{
switch (state)
{
@@ -5462,13 +5462,13 @@ void e132xsr_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "E1-32XSR"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
#if (HAS_GMS30C2116)
-void gms30c2116_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( gms30c2116 )
{
switch (state)
{
@@ -5485,13 +5485,13 @@ void gms30c2116_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "GMS30C2116"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
#if (HAS_GMS30C2132)
-void gms30c2132_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( gms30c2132 )
{
switch (state)
{
@@ -5508,13 +5508,13 @@ void gms30c2132_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "GMS30C2132"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
#if (HAS_GMS30C2216)
-void gms30c2216_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( gms30c2216 )
{
switch (state)
{
@@ -5531,13 +5531,13 @@ void gms30c2216_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "GMS30C2216"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
#if (HAS_GMS30C2232)
-void gms30c2232_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( gms30c2232 )
{
switch (state)
{
@@ -5554,7 +5554,7 @@ void gms30c2232_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "GMS30C2232"); break;
default:
- hyperstone_get_info(state, info);
+ CPU_GET_INFO_CALL(hyperstone);
}
}
#endif
diff --git a/src/emu/cpu/e132xs/e132xs.h b/src/emu/cpu/e132xs/e132xs.h
index ed435117bab..0726e58a62d 100644
--- a/src/emu/cpu/e132xs/e132xs.h
+++ b/src/emu/cpu/e132xs/e132xs.h
@@ -24,59 +24,59 @@
/* Functions */
#if (HAS_E116T)
-void e116t_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( e116t );
#endif
#if (HAS_E116XT)
-void e116xt_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( e116xt );
#endif
#if (HAS_E116XS)
-void e116xs_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( e116xs );
#endif
#if (HAS_E116XSR)
-void e116xsr_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( e116xsr );
#endif
#if (HAS_E132N)
-void e132n_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( e132n );
#endif
#if (HAS_E132T)
-void e132t_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( e132t );
#endif
#if (HAS_E132XN)
-void e132xn_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( e132xn );
#endif
#if (HAS_E132XT)
-void e132xt_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( e132xt );
#endif
#if (HAS_E132XS)
-void e132xs_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( e132xs );
#endif
#if (HAS_E132XSR)
-void e132xsr_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( e132xsr );
#endif
#if (HAS_GMS30C2116)
-void gms30c2116_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( gms30c2116 );
#endif
#if (HAS_GMS30C2132)
-void gms30c2132_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( gms30c2132 );
#endif
#if (HAS_GMS30C2216)
-void gms30c2216_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( gms30c2216 );
#endif
#if (HAS_GMS30C2232)
-void gms30c2232_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( gms30c2232 );
#endif
extern unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned h_flag, int private_fp);
diff --git a/src/emu/cpu/f8/f8.c b/src/emu/cpu/f8/f8.c
index e369128154d..fcc995a4c2e 100644
--- a/src/emu/cpu/f8/f8.c
+++ b/src/emu/cpu/f8/f8.c
@@ -1883,19 +1883,19 @@ static CPU_EXECUTE( f8 )
return cycles - f8_icount;
}
-static void f8_get_context (void *dst)
+static CPU_GET_CONTEXT( f8 )
{
if (dst)
*(f8_Regs *) dst = f8;
}
-static void f8_set_context (void *src)
+static CPU_SET_CONTEXT( f8 )
{
if (src)
f8 = *(f8_Regs *) src;
}
-unsigned f8_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( f8 );
static CPU_INIT( f8 )
{
@@ -1903,7 +1903,7 @@ static CPU_INIT( f8 )
f8.device = device;
}
-static void f8_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( f8 )
{
switch (state)
{
@@ -2001,7 +2001,7 @@ static void f8_set_info(UINT32 state, cpuinfo *info)
return;
}
-void f8_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( f8 )
{
switch (state)
{
@@ -2111,15 +2111,15 @@ void f8_get_info(UINT32 state, cpuinfo *info)
info->i = f8.r[state - (CPUINFO_INT_REGISTER + F8_R16) + 16]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = f8_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = f8_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = f8_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(f8); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(f8); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(f8); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(f8); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(f8); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(f8); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = f8_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(f8); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &f8_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/f8/f8.h b/src/emu/cpu/f8/f8.h
index a74262f0ea7..9f277490187 100644
--- a/src/emu/cpu/f8/f8.h
+++ b/src/emu/cpu/f8/f8.h
@@ -47,7 +47,7 @@ enum
#define F8_INT_NONE 0
#define F8_INT_INTR 1
-void f8_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( f8 );
#ifdef __cplusplus
}
diff --git a/src/emu/cpu/f8/f8dasm.c b/src/emu/cpu/f8/f8dasm.c
index 2c226a41e7a..a037792248b 100644
--- a/src/emu/cpu/f8/f8dasm.c
+++ b/src/emu/cpu/f8/f8dasm.c
@@ -7,7 +7,7 @@ static const char *const rname[16] = {
"R8", "J", "HU", "HL", "KU", "KL", "QU", "QL"
};
-unsigned f8_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( f8 )
{
unsigned size = 0;
UINT8 op = oprom[size++];
diff --git a/src/emu/cpu/g65816/g65816.c b/src/emu/cpu/g65816/g65816.c
index 062ca43220b..6dd44828da9 100644
--- a/src/emu/cpu/g65816/g65816.c
+++ b/src/emu/cpu/g65816/g65816.c
@@ -95,7 +95,7 @@ int g65816_ICount = 0;
uint g65816i_source;
uint g65816i_destination;
-static int g65816_readop(UINT32 offset, int size, UINT64 *value)
+static CPU_READOP( g65816 )
{
*value = g65816_read_8_immediate(offset);
@@ -238,18 +238,18 @@ static CPU_EXECUTE( g65816 )
/* Get the current CPU context */
-static void g65816_get_context(void *dst_context)
+static CPU_GET_CONTEXT( g65816 )
{
- if(dst_context)
- *(g65816i_cpu_struct*)dst_context = g65816i_cpu;
+ if(dst)
+ *(g65816i_cpu_struct*)dst = g65816i_cpu;
}
/* Set the current CPU context */
-static void g65816_set_context(void *src_context)
+static CPU_SET_CONTEXT( g65816 )
{
- if(src_context)
+ if(src)
{
- g65816i_cpu = *(g65816i_cpu_struct*)src_context;
+ g65816i_cpu = *(g65816i_cpu_struct*)src;
g65816i_jumping(REGISTER_PB | REGISTER_PC);
}
}
@@ -312,7 +312,7 @@ static void g65816_set_irq_callback(cpu_irq_callback callback)
/* Disassemble an instruction */
#include "g65816ds.h"
-static offs_t g65816_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( g65816 )
{
return g65816_disassemble(buffer, (pc & 0x00ffff), (pc & 0xff0000) >> 16, oprom, FLAG_M, FLAG_X);
}
@@ -363,7 +363,7 @@ static CPU_INIT( g65816 )
* Generic set_info
**************************************************************************/
-static void g65816_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( g65816 )
{
switch (state)
{
@@ -402,7 +402,7 @@ static void g65816_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void g65816_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( g65816 )
{
switch (state)
{
@@ -454,19 +454,19 @@ void g65816_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + G65816_IRQ_STATE: info->i = g65816_get_reg(G65816_IRQ_STATE); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = g65816_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = g65816_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = g65816_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(g65816); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(g65816); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(g65816); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(g65816); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(g65816); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(g65816); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(g65816); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = g65816_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(g65816); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &g65816_ICount; break;
case CPUINFO_PTR_G65816_READVECTOR_CALLBACK: info->f = (genf *) READ_VECTOR; break;
- case CPUINFO_PTR_READOP: info->readop = g65816_readop; break;
+ case CPUINFO_PTR_READOP: info->readop = CPU_READOP_NAME(g65816); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "G65C816"); break;
diff --git a/src/emu/cpu/g65816/g65816.h b/src/emu/cpu/g65816/g65816.h
index cfd6c258758..40f147e9b94 100644
--- a/src/emu/cpu/g65816/g65816.h
+++ b/src/emu/cpu/g65816/g65816.h
@@ -89,7 +89,7 @@ enum
};
/* Main interface function */
-void g65816_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( g65816 );
#undef G65816_CALL_DEBUGGER
#define G65816_CALL_DEBUGGER(x) debugger_instruction_hook(Machine, x)
diff --git a/src/emu/cpu/h6280/6280dasm.c b/src/emu/cpu/h6280/6280dasm.c
index 99f2562163f..5dc8d15f528 100644
--- a/src/emu/cpu/h6280/6280dasm.c
+++ b/src/emu/cpu/h6280/6280dasm.c
@@ -140,7 +140,7 @@ static const unsigned char op6280[512]=
/*****************************************************************************
* Disassemble a single command and return the number of bytes it uses.
*****************************************************************************/
-offs_t h6280_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( h6280 )
{
UINT32 flags = 0;
int PC, OP, opc, arg;
diff --git a/src/emu/cpu/h6280/h6280.c b/src/emu/cpu/h6280/h6280.c
index 77c757b3628..5058b92df8e 100644
--- a/src/emu/cpu/h6280/h6280.c
+++ b/src/emu/cpu/h6280/h6280.c
@@ -285,13 +285,13 @@ static CPU_EXECUTE( h6280 )
return cycles - h6280_ICount;
}
-static void h6280_get_context (void *dst)
+static CPU_GET_CONTEXT( h6280 )
{
if( dst )
*(h6280_Regs*)dst = h6280;
}
-static void h6280_set_context (void *src)
+static CPU_SET_CONTEXT( h6280 )
{
if( src )
h6280 = *(h6280_Regs*)src;
@@ -385,10 +385,10 @@ WRITE8_HANDLER( h6280_timer_w )
}
}
-static int h6280_translate(int space, int intention, offs_t *addr)
+static CPU_TRANSLATE( h6280 )
{
if (space == ADDRESS_SPACE_PROGRAM)
- *addr = TRANSLATED(*addr);
+ *address = TRANSLATED(*address);
return TRUE;
}
@@ -408,7 +408,7 @@ void h6280io_set_buffer(UINT8 data)
* Generic set_info
**************************************************************************/
-static void h6280_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( h6280 )
{
switch (state)
{
@@ -449,7 +449,7 @@ static void h6280_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void h6280_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( h6280 )
{
switch (state)
{
@@ -507,17 +507,17 @@ void h6280_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + H6280_M8: info->i = h6280.mmr[7]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = h6280_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = h6280_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = h6280_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(h6280); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(h6280); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(h6280); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(h6280); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(h6280); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(h6280); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(h6280); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = h6280_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(h6280); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &h6280_ICount; break;
- case CPUINFO_PTR_TRANSLATE: info->translate = h6280_translate; break;
+ case CPUINFO_PTR_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(h6280); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "HuC6280"); break;
diff --git a/src/emu/cpu/h6280/h6280.h b/src/emu/cpu/h6280/h6280.h
index fbfea140d25..18a0a397a6e 100644
--- a/src/emu/cpu/h6280/h6280.h
+++ b/src/emu/cpu/h6280/h6280.h
@@ -34,7 +34,7 @@ enum
#define H6280_IRQ1_VEC 0xfff8
#define H6280_IRQ2_VEC 0xfff6 /* Aka BRK vector */
-void h6280_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( h6280 );
READ8_HANDLER( h6280_irq_status_r );
@@ -47,6 +47,6 @@ WRITE8_HANDLER( h6280_timer_w );
UINT8 h6280io_get_buffer(void);
void h6280io_set_buffer(UINT8);
-offs_t h6280_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( h6280 );
#endif /* __H6280_H__ */
diff --git a/src/emu/cpu/h83002/h83002.c b/src/emu/cpu/h83002/h83002.c
index 120b7fa5fd6..03cf602d062 100644
--- a/src/emu/cpu/h83002/h83002.c
+++ b/src/emu/cpu/h83002/h83002.c
@@ -181,7 +181,7 @@ static UINT32 h8_divxs16(INT16 src, INT32 dst);
/* implementation */
-extern offs_t h8_disasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( h8 );
void h8_3002_InterruptRequest(UINT8 source)
{
@@ -3895,17 +3895,17 @@ static int h8_branch(UINT8 condition)
// MAME interface stuff
-static void h8_get_context(void *context)
+static CPU_GET_CONTEXT( h8 )
{
- *(h83002_state *)context = h8;
+ *(h83002_state *)dst = h8;
}
-static void h8_set_context(void *context)
+static CPU_SET_CONTEXT( h8 )
{
- h8 = *(h83002_state *)context;
+ h8 = *(h83002_state *)src;
}
-static void h8_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( h8 )
{
switch(state) {
case CPUINFO_INT_PC: h8.pc = info->i; change_pc(h8.pc); break;
@@ -4064,19 +4064,19 @@ static ADDRESS_MAP_START( h8_3007_internal_map, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_END
-void h8_3002_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( h8_3002 )
{
switch(state) {
// Interface functions and variables
- case CPUINFO_PTR_SET_INFO: info->setinfo = h8_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = h8_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext= h8_set_context; break;
- case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(h8); break;
- case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(h8); break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(h8); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(h8); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(h8); break;
+ case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(h8); break;
+ case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(h8); break;
case CPUINFO_PTR_EXIT: info->exit = 0; break;
- case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(h8); break;
+ case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(h8); break;
case CPUINFO_PTR_BURN: info->burn = 0; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = h8_disasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(h8); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &h8_cyccnt; break;
case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(h83002_state); break;
case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
@@ -4139,18 +4139,18 @@ void h8_3002_get_info(UINT32 state, cpuinfo *info)
}
}
-void h8_3044_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( h8_3044 )
{
switch (state)
{
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_h8_3044_internal_map; break;
case CPUINFO_STR_NAME: strcpy(info->s, "H8/3044"); break;
default:
- h8_3002_get_info(state,info);
+ CPU_GET_INFO_CALL(h8_3002);
}
}
-void h8_3007_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( h8_3007 )
{
switch (state)
{
@@ -4158,6 +4158,6 @@ void h8_3007_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(h8_3007); break;
case CPUINFO_STR_NAME: strcpy(info->s, "H8/3007"); break;
default:
- h8_3002_get_info(state,info);
+ CPU_GET_INFO_CALL(h8_3002);
}
}
diff --git a/src/emu/cpu/h83002/h83002.h b/src/emu/cpu/h83002/h83002.h
index 1adb631eddb..d37a580b80e 100644
--- a/src/emu/cpu/h83002/h83002.h
+++ b/src/emu/cpu/h83002/h83002.h
@@ -73,7 +73,7 @@ enum
H8_SERIAL_B
};
-void h8_3002_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( h8_3002 );
void h8_3002_InterruptRequest(UINT8 source);
diff --git a/src/emu/cpu/h83002/h8disasm.c b/src/emu/cpu/h83002/h8disasm.c
index 7811b7f251c..fceb7d9b76f 100644
--- a/src/emu/cpu/h83002/h8disasm.c
+++ b/src/emu/cpu/h83002/h8disasm.c
@@ -20,16 +20,16 @@ static const char *const reg_names32[8] = {"ER0", "ER1", "ER2", "ER3", "ER4", "
static const char *const reg_names16[16] = {"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "E0", "E1", "E2", "E3", "E4", "E5", "E6", "E7"};
static const char *const reg_names8[16] = {"R0H", "R1H", "R2H", "R3H", "R4H", "R5H", "R6H", "R7H","R0L", "R1L", "R2L", "R3L", "R4L", "R5L", "R6L", "R7L"};
-static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom);
-static UINT32 h8disasm_1(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom);
-static UINT32 h8disasm_5(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom);
-static UINT32 h8disasm_6(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom);
-static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom);
+static UINT32 h8disasm_0(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *oprom);
+static UINT32 h8disasm_1(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *oprom);
+static UINT32 h8disasm_5(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *oprom);
+static UINT32 h8disasm_6(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *oprom);
+static UINT32 h8disasm_7(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *oprom);
#define h8_mem_read16(x) ((oprom[x] << 8) | oprom[(x) + 1])
#define h8_mem_read32(x) ((oprom[x] << 24) | (oprom[(x) + 1] << 16) | (oprom[(x) + 2] << 8) | oprom[(x) + 3])
-offs_t h8_disasm(char *output, offs_t address, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( h8 )
{
UINT32 size = 0;
UINT16 opcode;
@@ -39,79 +39,79 @@ offs_t h8_disasm(char *output, offs_t address, const UINT8 *oprom, const UINT8 *
switch((opcode>>12) & 0xf)
{
case 0x0:
- size = h8disasm_0(address, opcode, output, oprom);
+ size = h8disasm_0(pc, opcode, buffer, oprom);
break;
case 0x1:
- size = h8disasm_1(address, opcode, output, oprom);
+ size = h8disasm_1(pc, opcode, buffer, oprom);
break;
// mov.b @xx:8, Rd (abs)
case 0x2:
- sprintf(output, "%4.4x mov.b @%8.8x, %s", opcode, 0xffff00 | (opcode & 0xff), reg_names8[(opcode>>8) & 0xf]);
+ sprintf(buffer, "%4.4x mov.b @%8.8x, %s", opcode, 0xffff00 | (opcode & 0xff), reg_names8[(opcode>>8) & 0xf]);
size = 2;
break;
// mov.b Rs, @xx:8 (abs)
case 0x3:
- sprintf(output, "%4.4x mov.b %s, @%8.8x", opcode, reg_names8[(opcode>>8) & 0xf], 0xfffff00 | (opcode & 0xff));
+ sprintf(buffer, "%4.4x mov.b %s, @%8.8x", opcode, reg_names8[(opcode>>8) & 0xf], 0xfffff00 | (opcode & 0xff));
size = 2;
break;
// bcc @xx:8
case 0x4:
- address += 2;
- sprintf(output, "%4.4x %s %8.8x", opcode, branch_instr[(opcode >> 8) & 0xf], address + (INT8)(opcode &0xff));
+ pc += 2;
+ sprintf(buffer, "%4.4x %s %8.8x", opcode, branch_instr[(opcode >> 8) & 0xf], pc + (INT8)(opcode &0xff));
size = 2;
break;
// group 5
case 0x5:
- size = h8disasm_5(address, opcode, output, oprom);
+ size = h8disasm_5(pc, opcode, buffer, oprom);
break;
case 0x6:
- size = h8disasm_6(address, opcode, output, oprom);
+ size = h8disasm_6(pc, opcode, buffer, oprom);
break;
case 0x7:
- size = h8disasm_7(address, opcode, output, oprom);
+ size = h8disasm_7(pc, opcode, buffer, oprom);
break;
case 0x8:
// add.b #xx:8, Rd
- sprintf(output, "%4.4x add.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
+ sprintf(buffer, "%4.4x add.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
size = 2;
break;
case 0x9:
// addx.b #xx:8, Rd
- sprintf(output, "%4.4x addx.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
+ sprintf(buffer, "%4.4x addx.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
size = 2;
break;
case 0xa:
// cmp.b #xx:8, Rd
- sprintf(output, "%4.4x cmp.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
+ sprintf(buffer, "%4.4x cmp.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
size = 2;
break;
case 0xb:
// subx.b #xx:8, Rd
- sprintf(output, "%4.4x subx.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
+ sprintf(buffer, "%4.4x subx.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
size = 2;
break;
case 0xc:
// or.b #xx:8, Rd
- sprintf(output, "%4.4x or.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
+ sprintf(buffer, "%4.4x or.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
size = 2;
break;
case 0xd:
// xor.b #xx:8, Rd
- sprintf(output, "%4.4x xor.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
+ sprintf(buffer, "%4.4x xor.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
size = 2;
break;
case 0xe:
// and.b #xx:8, Rd
- sprintf(output, "%4.4x and.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
+ sprintf(buffer, "%4.4x and.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
size = 2;
break;
// mov.b #xx:8, Rd
case 0xf:
- sprintf(output, "%4.4x mov.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
+ sprintf(buffer, "%4.4x mov.b #%2.2x, %s", opcode, opcode & 0xff, reg_names8[(opcode>>8) & 0xf]);
size = 2;
break;
default:
- sprintf(output, "%4.4x", opcode);
+ sprintf(buffer, "%4.4x", opcode);
size = 2;
break;
}
@@ -119,7 +119,7 @@ offs_t h8_disasm(char *output, offs_t address, const UINT8 *oprom, const UINT8 *
return size | DASMFLAG_SUPPORTED;
}
-static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom)
+static UINT32 h8disasm_0(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *oprom)
{
UINT32 size = 2;
UINT16 data16;
@@ -131,14 +131,14 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT
{
// nop
case 0:
- sprintf(output, "%4.4x nop", opcode);
+ sprintf(buffer, "%4.4x nop", opcode);
size = 2;
break;
case 0x1:
// 010x where x should always be 0!
if((opcode & 0xf) != 0)
{
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
break;
}
switch((opcode>>4) & 0xf)
@@ -152,11 +152,11 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT
// mov.l @rx, rx
if((data16 & 0x80) == 0x80)
{
- sprintf(output, "%4.4x mov.l %s, @%s", opcode, reg_names32[data16&7], reg_names32[(data16>>4)&7]);
+ sprintf(buffer, "%4.4x mov.l %s, @%s", opcode, reg_names32[data16&7], reg_names32[(data16>>4)&7]);
}
else
{
- sprintf(output, "%4.4x mov.l @%s, %s", opcode, reg_names32[(data16>>4)&7], reg_names32[data16&7]);
+ sprintf(buffer, "%4.4x mov.l @%s, %s", opcode, reg_names32[(data16>>4)&7], reg_names32[data16&7]);
}
size = 4;
break;
@@ -177,22 +177,22 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT
}
if((data16 & 0x80) == 0x80)
{
- sprintf(output, "%4.4x %x mov.l %s, @%x", opcode, data16, reg_names32[data16&7], sdata32);
+ sprintf(buffer, "%4.4x %x mov.l %s, @%x", opcode, data16, reg_names32[data16&7], sdata32);
}
else
{
- sprintf(output, "%4.4x %x mov.l @%x, %s", opcode, data16, sdata32, reg_names32[data16&7]);
+ sprintf(buffer, "%4.4x %x mov.l @%x, %s", opcode, data16, sdata32, reg_names32[data16&7]);
}
break;
case 0x6d:
// mov.l @(Ers+), rd
if((data16 & 0x80) == 0x80)
{
- sprintf(output, "%4.4x mov.l %s, @-%s", opcode, reg_names32[data16 & 0x7], reg_names32[(data16>>4)&7]);
+ sprintf(buffer, "%4.4x mov.l %s, @-%s", opcode, reg_names32[data16 & 0x7], reg_names32[(data16>>4)&7]);
}
else
{
- sprintf(output, "%4.4x mov.l @%s+, %s", opcode, reg_names32[(data16>>4)&7], reg_names32[data16 & 0x7]);
+ sprintf(buffer, "%4.4x mov.l @%s+, %s", opcode, reg_names32[(data16>>4)&7], reg_names32[data16 & 0x7]);
}
size = 4;
break;
@@ -201,11 +201,11 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT
sdata16=h8_mem_read16(4);
if((data16 & 0x80) == 0x80)
{
- sprintf(output, "%4.4x mov.l %s,@(%x, %s)", opcode, reg_names32[data16 &0x7], sdata16, reg_names32[(data16>>4)&7]);
+ sprintf(buffer, "%4.4x mov.l %s,@(%x, %s)", opcode, reg_names32[data16 &0x7], sdata16, reg_names32[(data16>>4)&7]);
}
else
{
- sprintf(output, "%4.4x mov.l @(%x, %s), %s", opcode, sdata16, reg_names32[(data16>>4)&7], reg_names32[data16 &0x7]);
+ sprintf(buffer, "%4.4x mov.l @(%x, %s), %s", opcode, sdata16, reg_names32[(data16>>4)&7], reg_names32[data16 &0x7]);
}
size = 6;
break;
@@ -216,20 +216,20 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT
sdata32 = h8_mem_read32(6) & 0xffffff;
if ( (data16 & 0x80) && ((ext16 & ~7) == 0x6ba0) )
{
- sprintf(output, "%4.4x mov.l %s,@(%x, %s)", opcode, reg_names32[ext16&7], sdata32, reg_names32[(data16>>4)&7]);
+ sprintf(buffer, "%4.4x mov.l %s,@(%x, %s)", opcode, reg_names32[ext16&7], sdata32, reg_names32[(data16>>4)&7]);
}
else if ( (!(data16 & 0x80)) && ((ext16 & ~7) == 0x6b20) )
{
- sprintf(output, "%4.4x mov.l @(%x, %s), %s", opcode, sdata32, reg_names32[(data16>>4)&7], reg_names32[ext16&7]);
+ sprintf(buffer, "%4.4x mov.l @(%x, %s), %s", opcode, sdata32, reg_names32[(data16>>4)&7], reg_names32[ext16&7]);
}
else
{
- sprintf(output, "%4.4x ? %x", opcode, data16);
+ sprintf(buffer, "%4.4x ? %x", opcode, data16);
}
break;
default:
- sprintf(output, "%4.4x ? %x", opcode, data16);
+ sprintf(buffer, "%4.4x ? %x", opcode, data16);
break;
}
break;
@@ -238,7 +238,7 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT
break;
// sleep
case 0x8:
- sprintf(output, "%4.4x sleep", opcode);
+ sprintf(buffer, "%4.4x sleep", opcode);
size = 2;
break;
// mulxs
@@ -255,21 +255,21 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT
switch((data16>>8)&0xff)
{
case 0x64: // or.l ERs, ERd
- sprintf(output, "%4.4x or.l %s, %s", opcode, reg_names32[(data16>>4) & 0x7], reg_names32[data16 & 0x7]);
+ sprintf(buffer, "%4.4x or.l %s, %s", opcode, reg_names32[(data16>>4) & 0x7], reg_names32[data16 & 0x7]);
break;
case 0x65: // xor.l ERs, ERd
- sprintf(output, "%4.4x xor.l %s, %s", opcode, reg_names32[(data16>>4) & 0x7], reg_names32[data16 & 0x7]);
+ sprintf(buffer, "%4.4x xor.l %s, %s", opcode, reg_names32[(data16>>4) & 0x7], reg_names32[data16 & 0x7]);
break;
case 0x66: // and.l ERs, ERd
- sprintf(output, "%4.4x and.l %s, %s", opcode, reg_names32[(data16>>4) & 0x7], reg_names32[data16 & 0x7]);
+ sprintf(buffer, "%4.4x and.l %s, %s", opcode, reg_names32[(data16>>4) & 0x7], reg_names32[data16 & 0x7]);
break;
default:
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
break;
}
break;
default:
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
break;
}
break;
@@ -277,11 +277,11 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT
case 0x2:
if(((opcode>>4) & 0xf) == 0)
{
- sprintf(output, "%4.4x stc ccr, %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x stc ccr, %s", opcode, reg_names8[opcode & 0xf]);
}
else
{
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
}
size = 2;
break;
@@ -289,42 +289,42 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT
case 0x3:
if(((opcode>>4) & 0xf) == 0)
{
- sprintf(output, "%4.4x ldc %s, ccr", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x ldc %s, ccr", opcode, reg_names8[opcode & 0xf]);
}
else
{
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
}
size = 2;
break;
// orc
case 0x4:
- sprintf(output, "%4.4x orc #%2.2x, ccr", opcode, opcode & 0xff);
+ sprintf(buffer, "%4.4x orc #%2.2x, ccr", opcode, opcode & 0xff);
size = 2;
break;
// xorc
case 0x5:
- sprintf(output, "%4.4x xorc #%2.2x, ccr", opcode, opcode & 0xff);
+ sprintf(buffer, "%4.4x xorc #%2.2x, ccr", opcode, opcode & 0xff);
size = 2;
break;
// andc
case 0x6:
- sprintf(output, "%4.4x andc #%2.2x, ccr", opcode, opcode & 0xff);
+ sprintf(buffer, "%4.4x andc #%2.2x, ccr", opcode, opcode & 0xff);
size = 2;
break;
// ldc
case 0x7:
- sprintf(output, "%4.4x ldc #%2.2x, ccr", opcode, opcode & 0xff);
+ sprintf(buffer, "%4.4x ldc #%2.2x, ccr", opcode, opcode & 0xff);
size = 2;
break;
// add.b rx, ry
case 0x8:
- sprintf(output, "%4.4x add.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x add.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
size = 2;
break;
// add.w rx, ry
case 0x9:
- sprintf(output, "%4.4x add.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x add.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
size = 2;
break;
// inc.b rx
@@ -333,22 +333,22 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT
{
if(opcode & 0x8)
{
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
}
else
{
- sprintf(output, "%4.4x add.l %s, %s", opcode, reg_names32[(opcode>>4) & 7], reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x add.l %s, %s", opcode, reg_names32[(opcode>>4) & 7], reg_names32[opcode & 7]);
}
}
else
{
if(opcode & 0xf0)
{
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
}
else
{
- sprintf(output, "%4.4x inc.b %s", opcode, reg_names8[(opcode & 0xf)]);
+ sprintf(buffer, "%4.4x inc.b %s", opcode, reg_names8[(opcode & 0xf)]);
}
}
size = 2;
@@ -358,45 +358,45 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT
switch((opcode>>4)& 0xf)
{
case 0:
- sprintf(output, "%4.4x adds.l #1, %s", opcode, reg_names32[opcode & 0x7]);
+ sprintf(buffer, "%4.4x adds.l #1, %s", opcode, reg_names32[opcode & 0x7]);
break;
case 5:
- sprintf(output, "%4.4x inc.w #1, %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x inc.w #1, %s", opcode, reg_names16[opcode & 0xf]);
break;
case 7:
- sprintf(output, "%4.4x inc.l #1, %s", opcode, reg_names32[opcode & 0x7]);
+ sprintf(buffer, "%4.4x inc.l #1, %s", opcode, reg_names32[opcode & 0x7]);
break;
case 8:
- sprintf(output, "%4.4x adds.l #2, %s", opcode, reg_names32[opcode & 0x7]);
+ sprintf(buffer, "%4.4x adds.l #2, %s", opcode, reg_names32[opcode & 0x7]);
break;
case 9:
- sprintf(output, "%4.4x adds.l #4, %s", opcode, reg_names32[opcode & 0x7]);
+ sprintf(buffer, "%4.4x adds.l #4, %s", opcode, reg_names32[opcode & 0x7]);
break;
case 0xd:
- sprintf(output, "%4.4x inc.w #2, %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x inc.w #2, %s", opcode, reg_names16[opcode & 0xf]);
break;
case 0xf:
- sprintf(output, "%4.4x inc.l #2, %s", opcode, reg_names32[opcode & 0x7]);
+ sprintf(buffer, "%4.4x inc.l #2, %s", opcode, reg_names32[opcode & 0x7]);
break;
default:
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
break;
}
size = 2;
break;
// mov.b rx, ry
case 0xc:
- sprintf(output, "%4.4x mov.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x mov.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
size = 2;
break;
// mov.w rx, ry
case 0xd:
- sprintf(output, "%4.4x mov.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x mov.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
size = 2;
break;
// addx.b rx, ry
case 0xe:
- sprintf(output, "%4.4x addx.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x addx.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
size = 2;
break;
case 0xf:
@@ -404,34 +404,34 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT
{
if(opcode & 8)
{
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
}
else
{
- sprintf(output, "%4.4x mov.l %s, %s", opcode, reg_names32[(opcode>>4) & 0x7], reg_names32[opcode & 0x7]);
+ sprintf(buffer, "%4.4x mov.l %s, %s", opcode, reg_names32[(opcode>>4) & 0x7], reg_names32[opcode & 0x7]);
}
}
else
{
if((opcode & 0xf0) !=0)
{
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
}
else
{
- sprintf(output, "%4.4x daa.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x daa.b %s", opcode, reg_names8[opcode & 0xf]);
}
}
size = 2;
break;
default:
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
break;
}
return size;
}
-static UINT32 h8disasm_1(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom)
+static UINT32 h8disasm_1(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *oprom)
{
UINT32 size = 2; //, mode8;
switch((opcode>>8)&0xf)
@@ -441,36 +441,36 @@ static UINT32 h8disasm_1(UINT32 address, UINT32 opcode, char *output, const UINT
{
// shll.b Rx
case 0x0:
- sprintf(output, "%4.4x shll.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x shll.b %s", opcode, reg_names8[opcode & 0xf]);
size = 2;
break;
// shll.w Rx
case 0x1:
- sprintf(output, "%4.4x shll.w %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x shll.w %s", opcode, reg_names16[opcode & 0xf]);
size = 2;
break;
// shll.l Rx
case 0x3:
- sprintf(output, "%4.4x shll.l %s", opcode, reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x shll.l %s", opcode, reg_names32[opcode & 7]);
size = 2;
break;
// shal.b Rx
case 0x8:
- sprintf(output, "%4.4x shal.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x shal.b %s", opcode, reg_names8[opcode & 0xf]);
size = 2;
break;
// shal.w Rx
case 0x9:
- sprintf(output, "%4.4x shal.w %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x shal.w %s", opcode, reg_names16[opcode & 0xf]);
size = 2;
break;
// shal.l Rx
case 0xb:
- sprintf(output, "%4.4x shal.l %s", opcode, reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x shal.l %s", opcode, reg_names32[opcode & 7]);
size = 2;
break;
default:
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
size = 2;
break;
}
@@ -481,36 +481,36 @@ static UINT32 h8disasm_1(UINT32 address, UINT32 opcode, char *output, const UINT
{
// shlr.b rx
case 0x0:
- sprintf(output, "%4.4x shlr.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x shlr.b %s", opcode, reg_names8[opcode & 0xf]);
size = 2;
break;
// shlr.w rx
case 0x1:
- sprintf(output, "%4.4x shlr.w %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x shlr.w %s", opcode, reg_names16[opcode & 0xf]);
size = 2;
break;
// shlr.l rx
case 0x3:
- sprintf(output, "%4.4x shlr.l %s", opcode, reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x shlr.l %s", opcode, reg_names32[opcode & 7]);
size = 2;
break;
// shar.b rx
case 0x8:
- sprintf(output, "%4.4x shar.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x shar.b %s", opcode, reg_names8[opcode & 0xf]);
size = 2;
break;
// shar.w rx
case 0x9:
- sprintf(output, "%4.4x shar.w %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x shar.w %s", opcode, reg_names16[opcode & 0xf]);
size = 2;
break;
// shar.l rx
case 0xb:
- sprintf(output, "%4.4x shar.l %s", opcode, reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x shar.l %s", opcode, reg_names32[opcode & 7]);
size = 2;
break;
default:
- sprintf(output, "%4.4x illegal ", opcode);
+ sprintf(buffer, "%4.4x illegal ", opcode);
size = 2;
break;
}
@@ -520,36 +520,36 @@ static UINT32 h8disasm_1(UINT32 address, UINT32 opcode, char *output, const UINT
{
// rotxl.b Rx
case 0x0:
- sprintf(output, "%4.4x rotxl.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x rotxl.b %s", opcode, reg_names8[opcode & 0xf]);
size = 2;
break;
// rotxl.w Rx
case 0x1:
- sprintf(output, "%4.4x rotxl.w %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x rotxl.w %s", opcode, reg_names16[opcode & 0xf]);
size = 2;
break;
// rotxl.l Rx
case 0x3:
- sprintf(output, "%4.4x rotxl.l %s", opcode, reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x rotxl.l %s", opcode, reg_names32[opcode & 7]);
size = 2;
break;
// rotl.b Rx
case 0x8:
- sprintf(output, "%4.4x rotl.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x rotl.b %s", opcode, reg_names8[opcode & 0xf]);
size = 2;
break;
// rotl.w Rx
case 0x9:
- sprintf(output, "%4.4x rotl.w %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x rotl.w %s", opcode, reg_names16[opcode & 0xf]);
size = 2;
break;
// rotl.l Rx
case 0xb:
- sprintf(output, "%4.4x rotl.l %s", opcode, reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x rotl.l %s", opcode, reg_names32[opcode & 7]);
size = 2;
break;
default:
- sprintf(output, "%4.4x ? ", opcode);
+ sprintf(buffer, "%4.4x ? ", opcode);
size = 2;
break;
}
@@ -559,53 +559,53 @@ static UINT32 h8disasm_1(UINT32 address, UINT32 opcode, char *output, const UINT
{
// rotxr.b Rx
case 0x0:
- sprintf(output, "%4.4x rotxr.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x rotxr.b %s", opcode, reg_names8[opcode & 0xf]);
size = 2;
break;
// rotxr.w Rx
case 0x1:
- sprintf(output, "%4.4x rotxr.w %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x rotxr.w %s", opcode, reg_names16[opcode & 0xf]);
size = 2;
break;
// rotxr.l Rx
case 0x3:
- sprintf(output, "%4.4x rotxr.l %s", opcode, reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x rotxr.l %s", opcode, reg_names32[opcode & 7]);
size = 2;
break;
// rotr.b Rx
case 0x8:
- sprintf(output, "%4.4x rotr.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x rotr.b %s", opcode, reg_names8[opcode & 0xf]);
size = 2;
break;
// rotr.w Rx
case 0x9:
- sprintf(output, "%4.4x rotr.w %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x rotr.w %s", opcode, reg_names16[opcode & 0xf]);
size = 2;
break;
// rotr.l Rx
case 0xb:
- sprintf(output, "%4.4x rotr.l %s", opcode, reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x rotr.l %s", opcode, reg_names32[opcode & 7]);
size = 2;
break;
default:
- sprintf(output, "%4.4x ? ", opcode);
+ sprintf(buffer, "%4.4x ? ", opcode);
size = 2;
break;
}
break;
// or.b rs, rd
case 0x4:
- sprintf(output, "%4.4x or.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x or.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
size = 2;
break;
// xor.b rs, rd
case 0x5:
- sprintf(output, "%4.4x xor.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x xor.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
size = 2;
break;
// and.b rs, rd
case 0x6:
- sprintf(output, "%4.4x and.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x and.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
size = 2;
break;
// not
@@ -614,78 +614,78 @@ static UINT32 h8disasm_1(UINT32 address, UINT32 opcode, char *output, const UINT
{
// not.b Rx
case 0x0:
- sprintf(output, "%4.4x not.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x not.b %s", opcode, reg_names8[opcode & 0xf]);
size = 2;
break;
// not.w Rx
case 0x1:
- sprintf(output, "%4.4x not.w %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x not.w %s", opcode, reg_names16[opcode & 0xf]);
size = 2;
break;
// not.l Rx
case 0x3:
- sprintf(output, "%4.4x not.l %s", opcode, reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x not.l %s", opcode, reg_names32[opcode & 7]);
size = 2;
break;
// extu.b Rx
case 0x4:
- sprintf(output, "%4.4x extu.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x extu.b %s", opcode, reg_names8[opcode & 0xf]);
size = 2;
break;
// extu.w Rx
case 0x5:
- sprintf(output, "%4.4x extu.w %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x extu.w %s", opcode, reg_names16[opcode & 0xf]);
size = 2;
break;
// extu.l Rx
case 0x7:
- sprintf(output, "%4.4x extu.l %s", opcode, reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x extu.l %s", opcode, reg_names32[opcode & 7]);
size = 2;
break;
// neg.b Rx
case 0x8:
- sprintf(output, "%4.4x neg.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x neg.b %s", opcode, reg_names8[opcode & 0xf]);
size = 2;
break;
// neg.w Rx
case 0x9:
- sprintf(output, "%4.4x neg.w %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x neg.w %s", opcode, reg_names16[opcode & 0xf]);
size = 2;
break;
// neg.l Rx
case 0xb:
- sprintf(output, "%4.4x neg.l %s", opcode, reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x neg.l %s", opcode, reg_names32[opcode & 7]);
size = 2;
break;
// exts.b Rx
case 0xc:
- sprintf(output, "%4.4x exts.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x exts.b %s", opcode, reg_names8[opcode & 0xf]);
size = 2;
break;
// exts.w Rx
case 0xd:
- sprintf(output, "%4.4x exts.w %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x exts.w %s", opcode, reg_names16[opcode & 0xf]);
size = 2;
break;
// exts.l Rx
case 0xf:
- sprintf(output, "%4.4x exts.l %s", opcode, reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x exts.l %s", opcode, reg_names32[opcode & 7]);
size = 2;
break;
default:
- sprintf(output, "%4.4x default ", opcode);
+ sprintf(buffer, "%4.4x default ", opcode);
size = 2;
break;
}
break;
// sub.b rs, rd
case 0x8:
- sprintf(output, "%4.4x sub.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x sub.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
size = 2;
break;
// sub.w rs, rd
case 0x9:
- sprintf(output, "%4.4x sub.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x sub.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
size = 2;
break;
// sub.b rx
@@ -694,22 +694,22 @@ static UINT32 h8disasm_1(UINT32 address, UINT32 opcode, char *output, const UINT
{
if(opcode & 0x8)
{
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
}
else
{
- sprintf(output, "%4.4x sub.l %s, %s", opcode, reg_names32[(opcode>>4) & 7], reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x sub.l %s, %s", opcode, reg_names32[(opcode>>4) & 7], reg_names32[opcode & 7]);
}
}
else
{
if(opcode & 0xf0)
{
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
}
else
{
- sprintf(output, "%4.4x dec.b %s", opcode, reg_names8[(opcode & 0xf)]);
+ sprintf(buffer, "%4.4x dec.b %s", opcode, reg_names8[(opcode & 0xf)]);
}
}
size = 2;
@@ -719,45 +719,45 @@ static UINT32 h8disasm_1(UINT32 address, UINT32 opcode, char *output, const UINT
switch((opcode>>4)& 0xf)
{
case 0:
- sprintf(output, "%4.4x subs.l #1, %s", opcode, reg_names32[opcode & 0x7]);
+ sprintf(buffer, "%4.4x subs.l #1, %s", opcode, reg_names32[opcode & 0x7]);
break;
case 5:
- sprintf(output, "%4.4x dec.w #1, %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x dec.w #1, %s", opcode, reg_names16[opcode & 0xf]);
break;
case 7:
- sprintf(output, "%4.4x dec.l #1, %s", opcode, reg_names32[opcode & 0x7]);
+ sprintf(buffer, "%4.4x dec.l #1, %s", opcode, reg_names32[opcode & 0x7]);
break;
case 8:
- sprintf(output, "%4.4x subs.l #2, %s", opcode, reg_names32[opcode & 0x7]);
+ sprintf(buffer, "%4.4x subs.l #2, %s", opcode, reg_names32[opcode & 0x7]);
break;
case 9:
- sprintf(output, "%4.4x subs.l #4, %s", opcode, reg_names32[opcode & 0x7]);
+ sprintf(buffer, "%4.4x subs.l #4, %s", opcode, reg_names32[opcode & 0x7]);
break;
case 0xd:
- sprintf(output, "%4.4x dec.w #2, %s", opcode, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x dec.w #2, %s", opcode, reg_names16[opcode & 0xf]);
break;
case 0xf:
- sprintf(output, "%4.4x dec.l #2, %s", opcode, reg_names32[opcode & 0x7]);
+ sprintf(buffer, "%4.4x dec.l #2, %s", opcode, reg_names32[opcode & 0x7]);
break;
default:
- sprintf(output, "%4.4x ?", opcode);
+ sprintf(buffer, "%4.4x ?", opcode);
break;
}
size = 2;
break;
// cmp.b rs, rd
case 0xc:
- sprintf(output, "%4.4x cmp.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x cmp.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
size = 2;
break;
// cmp.w rx, ry
case 0xd:
- sprintf(output, "%4.4x cmp.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x cmp.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
size = 2;
break;
// subx.b rx, ry
case 0xe:
- sprintf(output, "%4.4x subx.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x subx.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
size = 2;
break;
case 0xf:
@@ -765,35 +765,35 @@ static UINT32 h8disasm_1(UINT32 address, UINT32 opcode, char *output, const UINT
{
if(opcode & 8)
{
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
}
else
{
- sprintf(output, "%4.4x cmp.l %s, %s", opcode, reg_names32[(opcode>>4) & 0x7], reg_names32[opcode & 0x7]);
+ sprintf(buffer, "%4.4x cmp.l %s, %s", opcode, reg_names32[(opcode>>4) & 0x7], reg_names32[opcode & 0x7]);
}
}
else
{
if((opcode & 0xf0) !=0)
{
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
}
else
{
- sprintf(output, "%4.4x das.b %s", opcode, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x das.b %s", opcode, reg_names8[opcode & 0xf]);
}
}
size = 2;
break;
default:
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
break;
}
return size;
}
-static UINT32 h8disasm_5(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom)
+static UINT32 h8disasm_5(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *oprom)
{
UINT32 size = 2;
UINT32 data32;
@@ -803,50 +803,50 @@ static UINT32 h8disasm_5(UINT32 address, UINT32 opcode, char *output, const UINT
{
// mulxu.b
case 0x0:
- sprintf(output, "%4.4x mulxu.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x mulxu.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
size = 2;
break;
// divxu.b
case 0x1:
- sprintf(output, "%4.4x divxu.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x divxu.b %s, %s", opcode, reg_names8[(opcode>>4) & 0xf], reg_names8[opcode & 0xf]);
size = 2;
break;
// mulxu.w
case 0x2:
- sprintf(output, "%4.4x mulxu.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x mulxu.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names32[opcode & 7]);
size = 2;
break;
// divxu.w
case 0x3:
- sprintf(output, "%4.4x divxu.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names32[opcode & 7]);
+ sprintf(buffer, "%4.4x divxu.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names32[opcode & 7]);
size = 2;
break;
// rts
case 0x4:
if(opcode == 0x5470)
{
- sprintf(output, "%4.4x rts", opcode);
+ sprintf(buffer, "%4.4x rts", opcode);
}
else
{
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
}
size = 2 | DASMFLAG_STEP_OUT;
break;
// bsr 8
case 0x5:
- sprintf(output, "%4.4x bsr %x", opcode, address+2 + ((INT8)opcode& 0xff));
+ sprintf(buffer, "%4.4x bsr %x", opcode, pc+2 + ((INT8)opcode& 0xff));
size = 2 | DASMFLAG_STEP_OVER;
break;
// rte
case 0x6:
if(opcode == 0x5670)
{
- sprintf(output, "%4.4x rte", opcode);
+ sprintf(buffer, "%4.4x rte", opcode);
}
else
{
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
}
size = 2 | DASMFLAG_STEP_OUT;
break;
@@ -854,11 +854,11 @@ static UINT32 h8disasm_5(UINT32 address, UINT32 opcode, char *output, const UINT
case 0x7:
if(opcode & 0xcf)
{
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
}
else
{
- sprintf(output, "%4.4x trapa #%x", opcode, (opcode >> 4) & 3);
+ sprintf(buffer, "%4.4x trapa #%x", opcode, (opcode >> 4) & 3);
}
size = 2 | DASMFLAG_STEP_OVER;
break;
@@ -866,71 +866,71 @@ static UINT32 h8disasm_5(UINT32 address, UINT32 opcode, char *output, const UINT
case 0x8:
if(opcode & 0xf)
{
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
size = 2;
}
else
{
data16 = h8_mem_read16(2);
- address += 4;
- sprintf(output, "%4.4x %s %8.8x", opcode, branch_instr[(opcode >> 4) & 0xf], address + (INT16)(data16));
+ pc += 4;
+ sprintf(buffer, "%4.4x %s %8.8x", opcode, branch_instr[(opcode >> 4) & 0xf], pc + (INT16)(data16));
size = 4;
}
break;
// jmp @erd
case 0x9:
- sprintf(output, "%4.4x jmp @%s", opcode, reg_names32[(opcode>>4) &7]);
+ sprintf(buffer, "%4.4x jmp @%s", opcode, reg_names32[(opcode>>4) &7]);
size = 2;
break;
// jmp @aa:24
case 0xa:
data32=h8_mem_read32(0);
- sprintf(output, "%4.4x jmp %8.8x", opcode, (data32& 0xffffff));
+ sprintf(buffer, "%4.4x jmp %8.8x", opcode, (data32& 0xffffff));
size = 4;
break;
// jmp @aa:8
case 0xb:
- sprintf(output, "%4.4x jmp %8.8x", opcode, (opcode & 0xff));
+ sprintf(buffer, "%4.4x jmp %8.8x", opcode, (opcode & 0xff));
size = 2;
break;
// bsr @aa:16
case 0xc:
if(opcode & 0xff)
{
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
size = 2;
}
else
{
data16=h8_mem_read16(2);
- sprintf(output, "%4.4x bsr %8.8x", opcode, data16+address+4);
+ sprintf(buffer, "%4.4x bsr %8.8x", opcode, data16+pc+4);
size = 4 | DASMFLAG_STEP_OVER;
}
break;
// jsr @erd
case 0xd:
- sprintf(output, "%4.4x jsr @%s", opcode, reg_names32[(opcode>>4) &7]);
+ sprintf(buffer, "%4.4x jsr @%s", opcode, reg_names32[(opcode>>4) &7]);
size = 2 | DASMFLAG_STEP_OVER;
break;
// jsr @aa:24
case 0xe:
data32=h8_mem_read32(0);
- sprintf(output, "%4.4x jsr %8.8x", opcode, (data32& 0xffffff));
+ sprintf(buffer, "%4.4x jsr %8.8x", opcode, (data32& 0xffffff));
size = 4 | DASMFLAG_STEP_OVER;
break;
// jsr @aa:8
case 0xf:
- sprintf(output, "%4.4x jsr %8.8x", opcode, (opcode & 0xff));
+ sprintf(buffer, "%4.4x jsr %8.8x", opcode, (opcode & 0xff));
size = 2 | DASMFLAG_STEP_OVER;
break;
default:
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
break;
}
return size;
}
-static UINT32 h8disasm_6(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom)
+static UINT32 h8disasm_6(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *oprom)
{
UINT32 size = 2;
UINT32 data32;
@@ -941,62 +941,62 @@ static UINT32 h8disasm_6(UINT32 address, UINT32 opcode, char *output, const UINT
case 0:case 1:case 2:case 3:
if(((opcode>>4)&0x8) == 0)
{
- sprintf(output, "%4.4x %s.b %s, %s", opcode, bit_instr[(opcode>>8)&7], reg_names8[(opcode>>4)&0xf], reg_names8[(opcode & 0xf)]);
+ sprintf(buffer, "%4.4x %s.b %s, %s", opcode, bit_instr[(opcode>>8)&7], reg_names8[(opcode>>4)&0xf], reg_names8[(opcode & 0xf)]);
}
else
{
- sprintf(output, "%4.4x %s.b %s, %s", opcode, bit_instr2[(opcode>>8)&7], reg_names8[(opcode>>4)&0xf], reg_names8[(opcode & 0xf)]);
+ sprintf(buffer, "%4.4x %s.b %s, %s", opcode, bit_instr2[(opcode>>8)&7], reg_names8[(opcode>>4)&0xf], reg_names8[(opcode & 0xf)]);
}
size = 2;
break;
// or.w rs, rd
case 0x4:
- sprintf(output, "%4.4x or.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x or.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
size = 2;
break;
// xor.w rs, rd
case 0x5:
- sprintf(output, "%4.4x xor.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x xor.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
size = 2;
break;
// and.w rs, rd
case 0x6:
- sprintf(output, "%4.4x and.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x and.w %s, %s", opcode, reg_names16[(opcode>>4) & 0xf], reg_names16[opcode & 0xf]);
size = 2;
break;
// bst/bist #imm, rd
case 0x7:
if(opcode & 0x80)
{
- sprintf(output, "%4.4x bist.b #%1.1x, %s", opcode, (opcode>>4)&7, reg_names8[(opcode & 0xf)]);
+ sprintf(buffer, "%4.4x bist.b #%1.1x, %s", opcode, (opcode>>4)&7, reg_names8[(opcode & 0xf)]);
}
else
{
- sprintf(output, "%4.4x bst.b #%1.1x, %s", opcode, (opcode>>4)&7, reg_names8[(opcode & 0xf)]);
+ sprintf(buffer, "%4.4x bst.b #%1.1x, %s", opcode, (opcode>>4)&7, reg_names8[(opcode & 0xf)]);
}
size = 2;
break;
case 0x8:
if(opcode & 0x80)
{
- sprintf(output, "%4.4x mov.b %s, @%s", opcode, reg_names8[opcode & 0xf], reg_names32[(opcode >> 4) & 7]);
+ sprintf(buffer, "%4.4x mov.b %s, @%s", opcode, reg_names8[opcode & 0xf], reg_names32[(opcode >> 4) & 7]);
size = 2;
}
else
{
- sprintf(output, "%4.4x mov.b @%s, %s", opcode, reg_names32[(opcode >> 4) & 7], reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x mov.b @%s, %s", opcode, reg_names32[(opcode >> 4) & 7], reg_names8[opcode & 0xf]);
size = 2;
}
break;
case 0x9:
if(opcode & 0x80)
{
- sprintf(output, "%4.4x mov.w %s, @%s", opcode, reg_names16[opcode & 0xf], reg_names32[(opcode >> 4) & 7]);
+ sprintf(buffer, "%4.4x mov.w %s, @%s", opcode, reg_names16[opcode & 0xf], reg_names32[(opcode >> 4) & 7]);
size = 2;
}
else
{
- sprintf(output, "%4.4x mov.w @%s, %s", opcode, reg_names32[(opcode >> 4) & 7], reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x mov.w @%s, %s", opcode, reg_names32[(opcode >> 4) & 7], reg_names16[opcode & 0xf]);
size = 2;
}
break;
@@ -1006,26 +1006,26 @@ static UINT32 h8disasm_6(UINT32 address, UINT32 opcode, char *output, const UINT
{
case 0x0:
data16=h8_mem_read16(2);
- sprintf(output, "%4.4x mov.b @%x, %s", opcode, data16, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x mov.b @%x, %s", opcode, data16, reg_names8[opcode & 0xf]);
size = 4;
break;
case 0x2:
data32=h8_mem_read32(2);
- sprintf(output, "%4.4x mov.b @%8.8x, %s", opcode, data32, reg_names8[opcode & 0xf]);
+ sprintf(buffer, "%4.4x mov.b @%8.8x, %s", opcode, data32, reg_names8[opcode & 0xf]);
size = 6;
break;
case 0x8:
data16=h8_mem_read16(2);
- sprintf(output, "%4.4x mov.b %s, @%8.8x", opcode, reg_names8[opcode & 0xf], data16);
+ sprintf(buffer, "%4.4x mov.b %s, @%8.8x", opcode, reg_names8[opcode & 0xf], data16);
size = 4;
break;
case 0xa:
data32=h8_mem_read32(2);
- sprintf(output, "%4.4x mov.b %s, @%8.8x", opcode, reg_names8[opcode & 0xf], data32);
+ sprintf(buffer, "%4.4x mov.b %s, @%8.8x", opcode, reg_names8[opcode & 0xf], data32);
size = 6;
break;
default:
- sprintf(output, "%4.4x 0x6a ? ", opcode);
+ sprintf(buffer, "%4.4x 0x6a ? ", opcode);
size = 2;
break;
}
@@ -1036,26 +1036,26 @@ static UINT32 h8disasm_6(UINT32 address, UINT32 opcode, char *output, const UINT
{
case 0x0:
data16=h8_mem_read16(2);
- sprintf(output, "%4.4x mov.w @%8.8x, %s", opcode, data16, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x mov.w @%8.8x, %s", opcode, data16, reg_names16[opcode & 0xf]);
size = 4;
break;
case 0x2:
data32=h8_mem_read32(2);
- sprintf(output, "%4.4x mov.w @%8.8x, %s", opcode, data32, reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x mov.w @%8.8x, %s", opcode, data32, reg_names16[opcode & 0xf]);
size = 6;
break;
case 0x8:
data16=h8_mem_read16(2);
- sprintf(output, "%4.4x mov.w %s, @%8.8x", opcode, reg_names16[opcode & 0xf], data16);
+ sprintf(buffer, "%4.4x mov.w %s, @%8.8x", opcode, reg_names16[opcode & 0xf], data16);
size = 4;
break;
case 0xa:
data32=h8_mem_read32(2);
- sprintf(output, "%4.4x mov.w %s, @%8.8x", opcode, reg_names16[opcode & 0xf], data32);
+ sprintf(buffer, "%4.4x mov.w %s, @%8.8x", opcode, reg_names16[opcode & 0xf], data32);
size = 6;
break;
default:
- sprintf(output, "%4.4x 0x6b ? ", opcode);
+ sprintf(buffer, "%4.4x 0x6b ? ", opcode);
size = 2;
break;
}
@@ -1064,11 +1064,11 @@ static UINT32 h8disasm_6(UINT32 address, UINT32 opcode, char *output, const UINT
// mov.b @erx+,rx / mov.b @-erx, rx
if(opcode & 0x80)
{
- sprintf(output, "%4.4x mov.b %s, @(-%s)", opcode, reg_names8[opcode &0xf], reg_names32[(opcode>>4)&7]);
+ sprintf(buffer, "%4.4x mov.b %s, @(-%s)", opcode, reg_names8[opcode &0xf], reg_names32[(opcode>>4)&7]);
}
else
{
- sprintf(output, "%4.4x mov.b @(%s+), %s", opcode, reg_names32[(opcode>>4)&7], reg_names8[opcode &0xf]);
+ sprintf(buffer, "%4.4x mov.b @(%s+), %s", opcode, reg_names32[(opcode>>4)&7], reg_names8[opcode &0xf]);
}
size = 2;
break;
@@ -1076,11 +1076,11 @@ static UINT32 h8disasm_6(UINT32 address, UINT32 opcode, char *output, const UINT
// mov.w @ers+, rd / mov.w rs, @-erd
if(opcode & 0x80)
{
- sprintf(output, "%4.4x mov.w %s, @-%s", opcode, reg_names16[opcode&0xf], reg_names32[(opcode>>4)&7]);
+ sprintf(buffer, "%4.4x mov.w %s, @-%s", opcode, reg_names16[opcode&0xf], reg_names32[(opcode>>4)&7]);
}
else
{
- sprintf(output, "%4.4x mov.w @%s+, %s", opcode, reg_names32[(opcode>>4)&7], reg_names16[opcode & 0xf]);
+ sprintf(buffer, "%4.4x mov.w @%s+, %s", opcode, reg_names32[(opcode>>4)&7], reg_names16[opcode & 0xf]);
}
size = 2;
break;
@@ -1089,11 +1089,11 @@ static UINT32 h8disasm_6(UINT32 address, UINT32 opcode, char *output, const UINT
data16=h8_mem_read16(2);
if(opcode & 0x80)
{
- sprintf(output, "%4.4x mov.b %s,@(%x, %s)", opcode, reg_names8[opcode &0xf], data16, reg_names32[(opcode>>4)&7]);
+ sprintf(buffer, "%4.4x mov.b %s,@(%x, %s)", opcode, reg_names8[opcode &0xf], data16, reg_names32[(opcode>>4)&7]);
}
else
{
- sprintf(output, "%4.4x mov.b @(%x, %s), %s", opcode, data16, reg_names32[(opcode>>4)&7], reg_names8[opcode &0xf]);
+ sprintf(buffer, "%4.4x mov.b @(%x, %s), %s", opcode, data16, reg_names32[(opcode>>4)&7], reg_names8[opcode &0xf]);
}
size = 4;
break;
@@ -1102,22 +1102,22 @@ static UINT32 h8disasm_6(UINT32 address, UINT32 opcode, char *output, const UINT
data16=h8_mem_read16(2);
if(opcode & 0x80)
{
- sprintf(output, "%4.4x mov.w %s,@(%x, %s)", opcode, reg_names16[opcode &0xf], data16, reg_names32[(opcode>>4)&7]);
+ sprintf(buffer, "%4.4x mov.w %s,@(%x, %s)", opcode, reg_names16[opcode &0xf], data16, reg_names32[(opcode>>4)&7]);
}
else
{
- sprintf(output, "%4.4x mov.w @(%x, %s), %s", opcode, data16, reg_names32[(opcode>>4)&7], reg_names16[opcode &0xf]);
+ sprintf(buffer, "%4.4x mov.w @(%x, %s), %s", opcode, data16, reg_names32[(opcode>>4)&7], reg_names16[opcode &0xf]);
}
size = 4;
break;
default:
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
break;
}
return size;
}
-static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom)
+static UINT32 h8disasm_7(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *oprom)
{
UINT32 size = 2;
UINT32 data32;
@@ -1128,11 +1128,11 @@ static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *output, const UINT
case 0:case 1:case 2:case 3:case 4:case 5:case 6:case 7:
if(((opcode>>4)&0x8) == 0)
{
- sprintf(output, "%4.4x %s.b #%1.1x, %s", opcode, bit_instr[(opcode>>8)&7], (opcode>>4)&7, reg_names8[(opcode & 0xf)]);
+ sprintf(buffer, "%4.4x %s.b #%1.1x, %s", opcode, bit_instr[(opcode>>8)&7], (opcode>>4)&7, reg_names8[(opcode & 0xf)]);
}
else
{
- sprintf(output, "%4.4x %s.b #%1.1x, %s", opcode, bit_instr2[(opcode>>8)&7], (opcode>>4)&7, reg_names8[(opcode & 0xf)]);
+ sprintf(buffer, "%4.4x %s.b #%1.1x, %s", opcode, bit_instr2[(opcode>>8)&7], (opcode>>4)&7, reg_names8[(opcode & 0xf)]);
}
size = 2;
break;
@@ -1143,22 +1143,22 @@ static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *output, const UINT
{
if(((data16>>4) & 0xf) == 0xa)
{
- sprintf(output, "%4.4x mov.b %s, @(%x, %s)", opcode, reg_names8[(data16 & 0xf)], data32, reg_names32[(opcode>>4)&7]);
+ sprintf(buffer, "%4.4x mov.b %s, @(%x, %s)", opcode, reg_names8[(data16 & 0xf)], data32, reg_names32[(opcode>>4)&7]);
}
else
{
- sprintf(output, "%4.4x mov.b @(%x, %s), %s", opcode, data32, reg_names32[(opcode>>4) & 7], reg_names8[(data16 & 0xf)]);
+ sprintf(buffer, "%4.4x mov.b @(%x, %s), %s", opcode, data32, reg_names32[(opcode>>4) & 7], reg_names8[(data16 & 0xf)]);
}
}
else
{
if(((data16>>4) & 0xf) == 0xa)
{
- sprintf(output, "%4.4x mov.w %s, @(%x, %s)", opcode, reg_names16[(data16 & 0xf)], data32, reg_names32[(opcode>>4)&7]);
+ sprintf(buffer, "%4.4x mov.w %s, @(%x, %s)", opcode, reg_names16[(data16 & 0xf)], data32, reg_names32[(opcode>>4)&7]);
}
else
{
- sprintf(output, "%4.4x mov.w @(%x, %s), %s", opcode, data32, reg_names32[(opcode>>4) & 7], reg_names16[(data16 & 0xf)]);
+ sprintf(buffer, "%4.4x mov.w @(%x, %s), %s", opcode, data32, reg_names32[(opcode>>4) & 7], reg_names16[(data16 & 0xf)]);
}
}
size = 8;
@@ -1167,13 +1167,13 @@ static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *output, const UINT
case 0x9:
if( ((opcode>>4) & 0xf) > 0x6)
{
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
size = 2;
}
else
{
data16 = h8_mem_read16(2);
- sprintf(output, "%4.4x %s.w #%x, %s", opcode, imm32l_instr[(opcode>>4)&7], data16, reg_names16[opcode&0xf]);
+ sprintf(buffer, "%4.4x %s.w #%x, %s", opcode, imm32l_instr[(opcode>>4)&7], data16, reg_names16[opcode&0xf]);
size = 4;
}
break;
@@ -1181,13 +1181,13 @@ static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *output, const UINT
case 0xa:
if( (((opcode>>4) & 0xf) > 0x6) || (opcode & 0x8))
{
- sprintf(output, "%4.4x illegal", opcode);
+ sprintf(buffer, "%4.4x illegal", opcode);
size = 2;
}
else
{
data32 = h8_mem_read32(2);
- sprintf(output, "%4.4x %s.l #%x, %s", opcode, imm32l_instr[(opcode>>4)&7], data32, reg_names32[opcode&0x7]);
+ sprintf(buffer, "%4.4x %s.l #%x, %s", opcode, imm32l_instr[(opcode>>4)&7], data32, reg_names32[opcode&0x7]);
size = 6;
}
break;
@@ -1196,13 +1196,13 @@ static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *output, const UINT
switch (opcode & 0x00ff)
{
case 0x5c:
- sprintf(output, "%4.4x eepmov.b", opcode);
+ sprintf(buffer, "%4.4x eepmov.b", opcode);
break;
case 0xd4:
- sprintf(output, "%4.4x eepmov.w", opcode);
+ sprintf(buffer, "%4.4x eepmov.w", opcode);
break;
default:
- sprintf(output, "%4.4x eepmov UNK!", opcode);
+ sprintf(buffer, "%4.4x eepmov UNK!", opcode);
break;
}
size = 4;
@@ -1219,22 +1219,22 @@ static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *output, const UINT
case 0x62:
if (((opcode & 0x8f)!=0)||((data16 & 0x0f)!=0))
{
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
break;
}
- sprintf(output, "%4.4x %s.b %s, @%s", opcode, bit_instr[(data16>>8)&7], reg_names16[(data16>>4)&0xf], reg_names32[(opcode>>4) & 0x7]);
+ sprintf(buffer, "%4.4x %s.b %s, @%s", opcode, bit_instr[(data16>>8)&7], reg_names16[(data16>>4)&0xf], reg_names32[(opcode>>4) & 0x7]);
break;
case 0x67: // bst/bist.b #xx:3, @erd
if (((opcode & 0x8f)!=0)||((data16 & 0x0f)!=0))
{
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
break;
}
if ((data16 & 0x80)!=0)
- sprintf(output, "%4.4x bist.b #%1.1x, @%s", opcode, (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]);
+ sprintf(buffer, "%4.4x bist.b #%1.1x, @%s", opcode, (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]);
else
- sprintf(output, "%4.4x bst.b #%1.1x, @%s", opcode, (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]);
+ sprintf(buffer, "%4.4x bst.b #%1.1x, @%s", opcode, (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]);
break;
case 0x70: // bset/bnot/bclr.b #xx:3, @erd
@@ -1242,10 +1242,10 @@ static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *output, const UINT
case 0x72:
if (((opcode & 0x8f)!=0)||((data16 & 0x8f)!=0))
{
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
break;
}
- sprintf(output, "%4.4x %s.b #%1.1x, @%s", opcode, bit_instr[(data16>>8)&7], (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]);
+ sprintf(buffer, "%4.4x %s.b #%1.1x, @%s", opcode, bit_instr[(data16>>8)&7], (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]);
break;
}
break;
@@ -1255,16 +1255,16 @@ static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *output, const UINT
data16 = h8_mem_read16(2);
if(((data16>>4)&0x8) == 0)
{
- sprintf(output, "%4.4x %4.4x %s.b #%1.1x, @%x", opcode, data16, bit_instr[(data16>>8)&7], (data16>>4)&7, 0xffffff00 + (opcode & 0xff));
+ sprintf(buffer, "%4.4x %4.4x %s.b #%1.1x, @%x", opcode, data16, bit_instr[(data16>>8)&7], (data16>>4)&7, 0xffffff00 + (opcode & 0xff));
}
else
{
- sprintf(output, "%4.4x %4.4x %s.b #%1.1x, @%x", opcode, data16, bit_instr2[(data16>>8)&7], (data16>>4)&7, 0xffffff00 + (opcode & 0xff));
+ sprintf(buffer, "%4.4x %4.4x %s.b #%1.1x, @%x", opcode, data16, bit_instr2[(data16>>8)&7], (data16>>4)&7, 0xffffff00 + (opcode & 0xff));
}
size = 4;
break;
default:
- sprintf(output, "%4.4x default", opcode);
+ sprintf(buffer, "%4.4x default", opcode);
break;
}
return size;
diff --git a/src/emu/cpu/hd6309/6309dasm.c b/src/emu/cpu/hd6309/6309dasm.c
index 460c6614c7f..dda24be2645 100644
--- a/src/emu/cpu/hd6309/6309dasm.c
+++ b/src/emu/cpu/hd6309/6309dasm.c
@@ -603,7 +603,7 @@ static const char *const hd6309_tfmregs[16] = {
static const char *const tfm_s[] = { "%s+,%s+", "%s-,%s-", "%s+,%s", "%s,%s+" };
-offs_t hd6309_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( hd6309 )
{
UINT8 opcode, mode, pb, pbm, reg;
const UINT8 *operandarray;
diff --git a/src/emu/cpu/hd6309/hd6309.c b/src/emu/cpu/hd6309/hd6309.c
index 8d801f6cd53..48e118a36dd 100644
--- a/src/emu/cpu/hd6309/hd6309.c
+++ b/src/emu/cpu/hd6309/hd6309.c
@@ -118,7 +118,7 @@
#define false 0
#endif
-extern offs_t hd6309_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( hd6309 );
/*#define BIG_SWITCH*/
@@ -494,7 +494,7 @@ static void CHECK_IRQ_LINES( void )
/****************************************************************************
* Get all registers in given buffer
****************************************************************************/
-static void hd6309_get_context(void *dst)
+static CPU_GET_CONTEXT( hd6309 )
{
if( dst )
*(hd6309_Regs*)dst = hd6309;
@@ -503,7 +503,7 @@ static void hd6309_get_context(void *dst)
/****************************************************************************
* Set all registers to given values
****************************************************************************/
-static void hd6309_set_context(void *src)
+static CPU_SET_CONTEXT( hd6309 )
{
if( src )
hd6309 = *(hd6309_Regs*)src;
@@ -1209,7 +1209,7 @@ INLINE void fetch_effective_address( void )
* Generic set_info
**************************************************************************/
-static void hd6309_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( hd6309 )
{
switch (state)
{
@@ -1242,7 +1242,7 @@ static void hd6309_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void hd6309_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( hd6309 )
{
switch (state)
{
@@ -1291,15 +1291,15 @@ void hd6309_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + HD6309_DP: info->i = DP; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = hd6309_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = hd6309_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = hd6309_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(hd6309); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(hd6309); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(hd6309); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(hd6309); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(hd6309); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(hd6309); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(hd6309); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = hd6309_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hd6309); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &hd6309_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/hd6309/hd6309.h b/src/emu/cpu/hd6309/hd6309.h
index 491ad3d1350..30df269d95b 100644
--- a/src/emu/cpu/hd6309/hd6309.h
+++ b/src/emu/cpu/hd6309/hd6309.h
@@ -18,7 +18,7 @@ enum
/* PUBLIC FUNCTIONS */
-void hd6309_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( hd6309 );
/****************************************************************************/
/* Read a byte from given memory location */
diff --git a/src/emu/cpu/i386/i386.c b/src/emu/cpu/i386/i386.c
index 6986a5e8250..f933b59a9e9 100644
--- a/src/emu/cpu/i386/i386.c
+++ b/src/emu/cpu/i386/i386.c
@@ -478,7 +478,7 @@ static UINT64 i386_debug_seglimit(void *ref, UINT32 params, const UINT64 *param)
return result;
}
-static void i386_debug_setup(void)
+static CPU_DEBUG_INIT( i386 )
{
symtable_add_function(global_symtable, "segbase", NULL, 1, 1, i386_debug_segbase);
symtable_add_function(global_symtable, "seglimit", NULL, 1, 1, i386_debug_seglimit);
@@ -651,14 +651,14 @@ static CPU_RESET( i386 )
CHANGE_PC(I.eip);
}
-static void i386_get_context(void *dst)
+static CPU_GET_CONTEXT( i386 )
{
if(dst) {
*(I386_REGS *)dst = I;
}
}
-static void i386_set_context(void *src)
+static CPU_SET_CONTEXT( i386 )
{
if(src) {
I = *(I386_REGS *)src;
@@ -730,24 +730,24 @@ static CPU_EXECUTE( i386 )
/*************************************************************************/
-static int translate_address_cb(int space, int intention, offs_t *addr)
+static CPU_TRANSLATE( i386 )
{
int result = 1;
if (space == ADDRESS_SPACE_PROGRAM)
{
if (I.cr[0] & 0x80000000)
- result = translate_address(addr);
- *addr &= I.a20_mask;
+ result = translate_address(address);
+ *address &= I.a20_mask;
}
return result;
}
-static offs_t i386_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( i386 )
{
return i386_dasm_one(buffer, pc, oprom, I.sreg[CS].d ? 32 : 16);
}
-static void i386_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( i386 )
{
if (state == CPUINFO_INT_INPUT_STATE+INPUT_LINE_A20)
{
@@ -846,7 +846,7 @@ static void i386_set_info(UINT32 state, cpuinfo *info)
}
}
-void i386_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i386 )
{
switch (state)
{
@@ -959,17 +959,17 @@ void i386_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + I386_LDTR_FLAGS: info->i = I.ldtr.flags; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = i386_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = i386_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = i386_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i386); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(i386); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(i386); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i386); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i386); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i386); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &I.cycles; break;
- case CPUINFO_PTR_TRANSLATE: info->translate = translate_address_cb; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i386_dasm; break;
- case CPUINFO_PTR_DEBUG_SETUP_COMMANDS: info->setup_commands = i386_debug_setup; break;
+ case CPUINFO_PTR_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(i386); break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i386); break;
+ case CPUINFO_PTR_DEBUG_INIT: info->debug_init = CPU_DEBUG_INIT_NAME(i386); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "I386"); break;
@@ -1114,7 +1114,7 @@ static CPU_EXIT( i486 )
{
}
-static void i486_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( i486 )
{
switch (state)
{
@@ -1129,18 +1129,18 @@ static void i486_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + X87_ST6: ST(6).f = info->i; break;
case CPUINFO_INT_REGISTER + X87_ST7: ST(7).f = info->i; break;
- default: i386_set_info(state, info); break;
+ default: CPU_SET_INFO_CALL(i386); break;
}
}
-void i486_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i486 )
{
switch (state)
{
- case CPUINFO_PTR_SET_INFO: info->setinfo = i486_set_info; break;
- case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i486); break;
- case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i486); break;
- case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(i486); break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i486);break;
+ case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i486); break;
+ case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i486); break;
+ case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(i486); break;
case CPUINFO_INT_REGISTER + X87_CTRL: info->i = I.fpu_control_word; break;
case CPUINFO_INT_REGISTER + X87_STATUS: info->i = I.fpu_status_word; break;
@@ -1166,7 +1166,7 @@ void i486_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_REGISTER + X87_ST6: sprintf(info->s, "ST6: %f", ST(6).f); break;
case CPUINFO_STR_REGISTER + X87_ST7: sprintf(info->s, "ST7: %f", ST(7).f); break;
- default: i386_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(i386); break;
}
}
#endif
@@ -1244,7 +1244,7 @@ static CPU_EXIT( pentium )
{
}
-static void pentium_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( pentium )
{
switch (state)
{
@@ -1259,18 +1259,18 @@ static void pentium_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + X87_ST6: ST(6).f = info->i; break;
case CPUINFO_INT_REGISTER + X87_ST7: ST(7).f = info->i; break;
- default: i386_set_info(state, info); break;
+ default: CPU_SET_INFO_CALL(i386); break;
}
}
-void pentium_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( pentium )
{
switch (state)
{
- case CPUINFO_PTR_SET_INFO: info->setinfo = pentium_set_info; break;
- case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(pentium); break;
- case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(pentium); break;
- case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(pentium); break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium); break;
+ case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(pentium); break;
+ case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(pentium); break;
+ case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(pentium); break;
case CPUINFO_INT_REGISTER + X87_CTRL: info->i = I.fpu_control_word; break;
case CPUINFO_INT_REGISTER + X87_STATUS: info->i = I.fpu_status_word; break;
@@ -1296,7 +1296,7 @@ void pentium_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_REGISTER + X87_ST6: sprintf(info->s, "ST6: %f", ST(6).f); break;
case CPUINFO_STR_REGISTER + X87_ST7: sprintf(info->s, "ST7: %f", ST(7).f); break;
- default: i386_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(i386); break;
}
}
#endif
@@ -1374,7 +1374,7 @@ static CPU_EXIT( mediagx )
{
}
-static void mediagx_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( mediagx )
{
switch (state)
{
@@ -1389,18 +1389,18 @@ static void mediagx_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + X87_ST6: ST(6).f = info->i; break;
case CPUINFO_INT_REGISTER + X87_ST7: ST(7).f = info->i; break;
- default: i386_set_info(state, info); break;
+ default: CPU_SET_INFO_CALL(i386); break;
}
}
-void mediagx_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( mediagx )
{
switch (state)
{
- case CPUINFO_PTR_SET_INFO: info->setinfo = mediagx_set_info; break;
- case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mediagx); break;
- case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mediagx); break;
- case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(mediagx); break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mediagx); break;
+ case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mediagx); break;
+ case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mediagx); break;
+ case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(mediagx); break;
case CPUINFO_INT_REGISTER + X87_CTRL: info->i = I.fpu_control_word; break;
case CPUINFO_INT_REGISTER + X87_STATUS: info->i = I.fpu_status_word; break;
@@ -1426,7 +1426,7 @@ void mediagx_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_REGISTER + X87_ST6: sprintf(info->s, "ST6: %f", ST(6).f); break;
case CPUINFO_STR_REGISTER + X87_ST7: sprintf(info->s, "ST7: %f", ST(7).f); break;
- default: i386_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(i386); break;
}
}
#endif
diff --git a/src/emu/cpu/i8085/8085dasm.c b/src/emu/cpu/i8085/8085dasm.c
index 73e3dfd7215..53a871d61f3 100644
--- a/src/emu/cpu/i8085/8085dasm.c
+++ b/src/emu/cpu/i8085/8085dasm.c
@@ -53,7 +53,7 @@
#define ARG(A) opram[(A) - PC]
#define ARGW(A) (opram[(A) - PC] | (opram[(A) + 1 - PC] << 8))
-offs_t i8085_dasm(char *buff, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( i8085 )
{
UINT32 flags = 0;
UINT8 op;
@@ -61,519 +61,519 @@ offs_t i8085_dasm(char *buff, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
switch (op = OP(pc++))
{
#ifdef Z80_MNEMONICS
- case 0x00: sprintf (buff,"nop"); break;
- case 0x01: sprintf (buff,"ld bc,$%04x", ARGW(pc)); pc+=2; break;
- case 0x02: sprintf (buff,"ld (bc),a"); break;
- case 0x03: sprintf (buff,"inc bc"); break;
- case 0x04: sprintf (buff,"inc b"); break;
- case 0x05: sprintf (buff,"dec b"); break;
- case 0x06: sprintf (buff,"ld b,$%02x", ARG(pc)); pc++; break;
- case 0x07: sprintf (buff,"rlca"); break;
- case 0x08: sprintf (buff,"sub hl,bc (*)"); break;
- case 0x09: sprintf (buff,"add hl,bc"); break;
- case 0x0a: sprintf (buff,"ld a,(bc)"); break;
- case 0x0b: sprintf (buff,"dec bc"); break;
- case 0x0c: sprintf (buff,"inc c"); break;
- case 0x0d: sprintf (buff,"dec c"); break;
- case 0x0e: sprintf (buff,"ld c,$%02x", ARG(pc)); pc++; break;
- case 0x0f: sprintf (buff,"rrca"); break;
- case 0x10: sprintf (buff,"sra hl (*)"); break;
- case 0x11: sprintf (buff,"ld de,$%04x", ARGW(pc)); pc+=2; break;
- case 0x12: sprintf (buff,"ld (de),a"); break;
- case 0x13: sprintf (buff,"inc de"); break;
- case 0x14: sprintf (buff,"inc d"); break;
- case 0x15: sprintf (buff,"dec d"); break;
- case 0x16: sprintf (buff,"ld d,$%02x", ARG(pc)); pc++; break;
- case 0x17: sprintf (buff,"rla"); break;
- case 0x18: sprintf (buff,"rl de (*)"); break;
- case 0x19: sprintf (buff,"add hl,de"); break;
- case 0x1a: sprintf (buff,"ld a,(de)"); break;
- case 0x1b: sprintf (buff,"dec de"); break;
- case 0x1c: sprintf (buff,"inc e"); break;
- case 0x1d: sprintf (buff,"dec e"); break;
- case 0x1e: sprintf (buff,"ld e,$%02x", ARG(pc)); pc++; break;
- case 0x1f: sprintf (buff,"rra"); break;
- case 0x20: sprintf (buff,"rim"); break;
- case 0x21: sprintf (buff,"ld hl,$%04x", ARGW(pc)); pc+=2; break;
- case 0x22: sprintf (buff,"ld ($%04x),hl", ARGW(pc)); pc+=2;break;
- case 0x23: sprintf (buff,"inc hl"); break;
- case 0x24: sprintf (buff,"inc h"); break;
- case 0x25: sprintf (buff,"dec h"); break;
- case 0x26: sprintf (buff,"ld h,$%02x", ARG(pc)); pc++; break;
- case 0x27: sprintf (buff,"daa"); break;
- case 0x28: sprintf (buff,"ld de,hl+$%02x (*)",ARG(pc));pc++;break;
- case 0x29: sprintf (buff,"add hl,hl"); break;
- case 0x2a: sprintf (buff,"ld hl,($%04x)", ARGW(pc)); pc+=2;break;
- case 0x2b: sprintf (buff,"dec hl"); break;
- case 0x2c: sprintf (buff,"inc l"); break;
- case 0x2d: sprintf (buff,"dec l"); break;
- case 0x2e: sprintf (buff,"ld l,$%02x", ARG(pc)); pc++; break;
- case 0x2f: sprintf (buff,"cpl"); break;
- case 0x30: sprintf (buff,"sim"); break;
- case 0x31: sprintf (buff,"ld sp,$%04x", ARGW(pc)); pc+=2; break;
- case 0x32: sprintf (buff,"ld ($%04x),a", ARGW(pc)); pc+=2; break;
- case 0x33: sprintf (buff,"inc sp"); break;
- case 0x34: sprintf (buff,"inc (hl)"); break;
- case 0x35: sprintf (buff,"dec (hl)"); break;
- case 0x36: sprintf (buff,"ld (hl),$%02x", ARG(pc)); pc++; break;
- case 0x37: sprintf (buff,"scf"); break;
- case 0x38: sprintf (buff,"ld de,sp+$%02x (*)",ARG(pc));pc++;break;
- case 0x39: sprintf (buff,"add hl,sp"); break;
- case 0x3a: sprintf (buff,"ld a,($%04x)", ARGW(pc)); pc+=2; break;
- case 0x3b: sprintf (buff,"dec sp"); break;
- case 0x3c: sprintf (buff,"inc a"); break;
- case 0x3d: sprintf (buff,"dec a"); break;
- case 0x3e: sprintf (buff,"ld a,$%02x", ARG(pc)); pc++; break;
- case 0x3f: sprintf (buff,"ccf"); break;
- case 0x40: sprintf (buff,"ld b,b"); break;
- case 0x41: sprintf (buff,"ld b,c"); break;
- case 0x42: sprintf (buff,"ld b,d"); break;
- case 0x43: sprintf (buff,"ld b,e"); break;
- case 0x44: sprintf (buff,"ld b,h"); break;
- case 0x45: sprintf (buff,"ld b,l"); break;
- case 0x46: sprintf (buff,"ld b,(hl)"); break;
- case 0x47: sprintf (buff,"ld b,a"); break;
- case 0x48: sprintf (buff,"ld c,b"); break;
- case 0x49: sprintf (buff,"ld c,c"); break;
- case 0x4a: sprintf (buff,"ld c,d"); break;
- case 0x4b: sprintf (buff,"ld c,e"); break;
- case 0x4c: sprintf (buff,"ld c,h"); break;
- case 0x4d: sprintf (buff,"ld c,l"); break;
- case 0x4e: sprintf (buff,"ld c,(hl)"); break;
- case 0x4f: sprintf (buff,"ld c,a"); break;
- case 0x50: sprintf (buff,"ld d,b"); break;
- case 0x51: sprintf (buff,"ld d,c"); break;
- case 0x52: sprintf (buff,"ld d,d"); break;
- case 0x53: sprintf (buff,"ld d,e"); break;
- case 0x54: sprintf (buff,"ld d,h"); break;
- case 0x55: sprintf (buff,"ld d,l"); break;
- case 0x56: sprintf (buff,"ld d,(hl)"); break;
- case 0x57: sprintf (buff,"ld d,a"); break;
- case 0x58: sprintf (buff,"ld e,b"); break;
- case 0x59: sprintf (buff,"ld e,c"); break;
- case 0x5a: sprintf (buff,"ld e,d"); break;
- case 0x5b: sprintf (buff,"ld e,e"); break;
- case 0x5c: sprintf (buff,"ld e,h"); break;
- case 0x5d: sprintf (buff,"ld e,l"); break;
- case 0x5e: sprintf (buff,"ld e,(hl)"); break;
- case 0x5f: sprintf (buff,"ld e,a"); break;
- case 0x60: sprintf (buff,"ld h,b"); break;
- case 0x61: sprintf (buff,"ld h,c"); break;
- case 0x62: sprintf (buff,"ld h,d"); break;
- case 0x63: sprintf (buff,"ld h,e"); break;
- case 0x64: sprintf (buff,"ld h,h"); break;
- case 0x65: sprintf (buff,"ld h,l"); break;
- case 0x66: sprintf (buff,"ld h,(hl)"); break;
- case 0x67: sprintf (buff,"ld h,a"); break;
- case 0x68: sprintf (buff,"ld l,b"); break;
- case 0x69: sprintf (buff,"ld l,c"); break;
- case 0x6a: sprintf (buff,"ld l,d"); break;
- case 0x6b: sprintf (buff,"ld l,e"); break;
- case 0x6c: sprintf (buff,"ld l,h"); break;
- case 0x6d: sprintf (buff,"ld l,l"); break;
- case 0x6e: sprintf (buff,"ld l,(hl)"); break;
- case 0x6f: sprintf (buff,"ld l,a"); break;
- case 0x70: sprintf (buff,"ld (hl),b"); break;
- case 0x71: sprintf (buff,"ld (hl),c"); break;
- case 0x72: sprintf (buff,"ld (hl),d"); break;
- case 0x73: sprintf (buff,"ld (hl),e"); break;
- case 0x74: sprintf (buff,"ld (hl),h"); break;
- case 0x75: sprintf (buff,"ld (hl),l"); break;
- case 0x76: sprintf (buff,"halt"); break;
- case 0x77: sprintf (buff,"ld (hl),a"); break;
- case 0x78: sprintf (buff,"ld a,b"); break;
- case 0x79: sprintf (buff,"ld a,c"); break;
- case 0x7a: sprintf (buff,"ld a,d"); break;
- case 0x7b: sprintf (buff,"ld a,e"); break;
- case 0x7c: sprintf (buff,"ld a,h"); break;
- case 0x7d: sprintf (buff,"ld a,l"); break;
- case 0x7e: sprintf (buff,"ld a,(hl)"); break;
- case 0x7f: sprintf (buff,"ld a,a"); break;
- case 0x80: sprintf (buff,"add a,b"); break;
- case 0x81: sprintf (buff,"add a,c"); break;
- case 0x82: sprintf (buff,"add a,d"); break;
- case 0x83: sprintf (buff,"add a,e"); break;
- case 0x84: sprintf (buff,"add a,h"); break;
- case 0x85: sprintf (buff,"add a,l"); break;
- case 0x86: sprintf (buff,"add a,(hl)"); break;
- case 0x87: sprintf (buff,"add a,a"); break;
- case 0x88: sprintf (buff,"adc a,b"); break;
- case 0x89: sprintf (buff,"adc a,c"); break;
- case 0x8a: sprintf (buff,"adc a,d"); break;
- case 0x8b: sprintf (buff,"adc a,e"); break;
- case 0x8c: sprintf (buff,"adc a,h"); break;
- case 0x8d: sprintf (buff,"adc a,l"); break;
- case 0x8e: sprintf (buff,"adc a,(hl)"); break;
- case 0x8f: sprintf (buff,"adc a,a"); break;
- case 0x90: sprintf (buff,"sub b"); break;
- case 0x91: sprintf (buff,"sub c"); break;
- case 0x92: sprintf (buff,"sub d"); break;
- case 0x93: sprintf (buff,"sub e"); break;
- case 0x94: sprintf (buff,"sub h"); break;
- case 0x95: sprintf (buff,"sub l"); break;
- case 0x96: sprintf (buff,"sub (hl)"); break;
- case 0x97: sprintf (buff,"sub a"); break;
- case 0x98: sprintf (buff,"sbc a,b"); break;
- case 0x99: sprintf (buff,"sbc a,c"); break;
- case 0x9a: sprintf (buff,"sbc a,d"); break;
- case 0x9b: sprintf (buff,"sbc a,e"); break;
- case 0x9c: sprintf (buff,"sbc a,h"); break;
- case 0x9d: sprintf (buff,"sbc a,l"); break;
- case 0x9e: sprintf (buff,"sbc a,(hl)"); break;
- case 0x9f: sprintf (buff,"sbc a,a"); break;
- case 0xa0: sprintf (buff,"and b"); break;
- case 0xa1: sprintf (buff,"and c"); break;
- case 0xa2: sprintf (buff,"and d"); break;
- case 0xa3: sprintf (buff,"and e"); break;
- case 0xa4: sprintf (buff,"and h"); break;
- case 0xa5: sprintf (buff,"and l"); break;
- case 0xa6: sprintf (buff,"and (hl)"); break;
- case 0xa7: sprintf (buff,"and a"); break;
- case 0xa8: sprintf (buff,"xor b"); break;
- case 0xa9: sprintf (buff,"xor c"); break;
- case 0xaa: sprintf (buff,"xor d"); break;
- case 0xab: sprintf (buff,"xor e"); break;
- case 0xac: sprintf (buff,"xor h"); break;
- case 0xad: sprintf (buff,"xor l"); break;
- case 0xae: sprintf (buff,"xor (hl)"); break;
- case 0xaf: sprintf (buff,"xor a"); break;
- case 0xb0: sprintf (buff,"or b"); break;
- case 0xb1: sprintf (buff,"or c"); break;
- case 0xb2: sprintf (buff,"or d"); break;
- case 0xb3: sprintf (buff,"or e"); break;
- case 0xb4: sprintf (buff,"or h"); break;
- case 0xb5: sprintf (buff,"or l"); break;
- case 0xb6: sprintf (buff,"or (hl)"); break;
- case 0xb7: sprintf (buff,"or a"); break;
- case 0xb8: sprintf (buff,"cp b"); break;
- case 0xb9: sprintf (buff,"cp c"); break;
- case 0xba: sprintf (buff,"cp d"); break;
- case 0xbb: sprintf (buff,"cp e"); break;
- case 0xbc: sprintf (buff,"cp h"); break;
- case 0xbd: sprintf (buff,"cp l"); break;
- case 0xbe: sprintf (buff,"cp (hl)"); break;
- case 0xbf: sprintf (buff,"cp a"); break;
- case 0xc0: sprintf (buff,"ret nz"); flags = DASMFLAG_STEP_OUT; break;
- case 0xc1: sprintf (buff,"pop bc"); break;
- case 0xc2: sprintf (buff,"jp nz,$%04x", ARGW(pc)); pc+=2; break;
- case 0xc3: sprintf (buff,"jp $%04x", ARGW(pc)); pc+=2; break;
- case 0xc4: sprintf (buff,"call nz,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xc5: sprintf (buff,"push bc"); break;
- case 0xc6: sprintf (buff,"add a,$%02x", ARG(pc)); pc++; break;
- case 0xc7: sprintf (buff,"rst $00"); flags = DASMFLAG_STEP_OVER; break;
- case 0xc8: sprintf (buff,"ret z"); flags = DASMFLAG_STEP_OUT; break;
- case 0xc9: sprintf (buff,"ret"); flags = DASMFLAG_STEP_OUT; break;
- case 0xca: sprintf (buff,"jp z,$%04x", ARGW(pc)); pc+=2; break;
- case 0xcb: sprintf (buff,"rst v,$40 (*)"); flags = DASMFLAG_STEP_OVER; break;
- case 0xcc: sprintf (buff,"call z,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xcd: sprintf (buff,"call $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xce: sprintf (buff,"adc a,$%02x", ARG(pc)); pc++; break;
- case 0xcf: sprintf (buff,"rst $08"); flags = DASMFLAG_STEP_OVER; break;
- case 0xd0: sprintf (buff,"ret nc"); flags = DASMFLAG_STEP_OUT; break;
- case 0xd1: sprintf (buff,"pop de"); break;
- case 0xd2: sprintf (buff,"jp nc,$%04x", ARGW(pc)); pc+=2; break;
- case 0xd3: sprintf (buff,"out ($%02x),a", ARG(pc)); pc++; break;
- case 0xd4: sprintf (buff,"call nc,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xd5: sprintf (buff,"push de"); break;
- case 0xd6: sprintf (buff,"sub $%02x", ARG(pc)); pc++; break;
- case 0xd7: sprintf (buff,"rst $10"); flags = DASMFLAG_STEP_OVER; break;
- case 0xd8: sprintf (buff,"ret c"); break;
- case 0xd9: sprintf (buff,"ld (de),hl (*)"); break;
- case 0xda: sprintf (buff,"jp c,$%04x", ARGW(pc)); pc+=2; break;
- case 0xdb: sprintf (buff,"in a,($%02x)", ARG(pc)); pc++; break;
- case 0xdc: sprintf (buff,"call c,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xdd: sprintf (buff,"jp nx,$%04x (*)",ARGW(pc));pc+=2;break;
- case 0xde: sprintf (buff,"sub $%02x", ARG(pc)); pc++; break;
- case 0xdf: sprintf (buff,"rst $18"); flags = DASMFLAG_STEP_OVER; break;
- case 0xe0: sprintf (buff,"ret pe"); break;
- case 0xe1: sprintf (buff,"pop hl"); break;
- case 0xe2: sprintf (buff,"jp pe,$%04x", ARGW(pc)); pc+=2; break;
- case 0xe3: sprintf (buff,"ex (sp),hl"); break;
- case 0xe4: sprintf (buff,"call pe,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xe5: sprintf (buff,"push hl"); break;
- case 0xe6: sprintf (buff,"and $%02x", ARG(pc)); pc++; break;
- case 0xe7: sprintf (buff,"rst $20"); flags = DASMFLAG_STEP_OVER; break;
- case 0xe8: sprintf (buff,"ret po"); break;
- case 0xe9: sprintf (buff,"jp (hl)"); break;
- case 0xea: sprintf (buff,"jp po,$%04x", ARGW(pc)); pc+=2; break;
- case 0xeb: sprintf (buff,"ex de,hl"); break;
- case 0xec: sprintf (buff,"call po,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xed: sprintf (buff,"ld hl,(de) (*)"); break;
- case 0xee: sprintf (buff,"xor $%02x", ARG(pc)); pc++; break;
- case 0xef: sprintf (buff,"rst $28"); flags = DASMFLAG_STEP_OVER; break;
- case 0xf0: sprintf (buff,"ret p"); break;
- case 0xf1: sprintf (buff,"pop af"); break;
- case 0xf2: sprintf (buff,"jp p,$%04x", ARGW(pc)); pc+=2; break;
- case 0xf3: sprintf (buff,"di"); break;
- case 0xf4: sprintf (buff,"cp $%04x", ARGW(pc)); pc+=2; break;
- case 0xf5: sprintf (buff,"push af"); break;
- case 0xf6: sprintf (buff,"or $%02x", ARG(pc)); pc++; break;
- case 0xf7: sprintf (buff,"rst $30"); flags = DASMFLAG_STEP_OVER; break;
- case 0xf8: sprintf (buff,"ret m"); break;
- case 0xf9: sprintf (buff,"ld sp,hl"); break;
- case 0xfa: sprintf (buff,"jp m,$%04x", ARGW(pc)); pc+=2; break;
- case 0xfb: sprintf (buff,"ei"); break;
- case 0xfc: sprintf (buff,"call m,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xfd: sprintf (buff,"jp x,$%04x (*)",ARGW(pc));pc+=2; break;
- case 0xfe: sprintf (buff,"cp $%02x", ARG(pc)); pc++; break;
- case 0xff: sprintf (buff,"rst $38"); flags = DASMFLAG_STEP_OVER; break;
+ case 0x00: sprintf (buffer,"nop"); break;
+ case 0x01: sprintf (buffer,"ld bc,$%04x", ARGW(pc)); pc+=2; break;
+ case 0x02: sprintf (buffer,"ld (bc),a"); break;
+ case 0x03: sprintf (buffer,"inc bc"); break;
+ case 0x04: sprintf (buffer,"inc b"); break;
+ case 0x05: sprintf (buffer,"dec b"); break;
+ case 0x06: sprintf (buffer,"ld b,$%02x", ARG(pc)); pc++; break;
+ case 0x07: sprintf (buffer,"rlca"); break;
+ case 0x08: sprintf (buffer,"sub hl,bc (*)"); break;
+ case 0x09: sprintf (buffer,"add hl,bc"); break;
+ case 0x0a: sprintf (buffer,"ld a,(bc)"); break;
+ case 0x0b: sprintf (buffer,"dec bc"); break;
+ case 0x0c: sprintf (buffer,"inc c"); break;
+ case 0x0d: sprintf (buffer,"dec c"); break;
+ case 0x0e: sprintf (buffer,"ld c,$%02x", ARG(pc)); pc++; break;
+ case 0x0f: sprintf (buffer,"rrca"); break;
+ case 0x10: sprintf (buffer,"sra hl (*)"); break;
+ case 0x11: sprintf (buffer,"ld de,$%04x", ARGW(pc)); pc+=2; break;
+ case 0x12: sprintf (buffer,"ld (de),a"); break;
+ case 0x13: sprintf (buffer,"inc de"); break;
+ case 0x14: sprintf (buffer,"inc d"); break;
+ case 0x15: sprintf (buffer,"dec d"); break;
+ case 0x16: sprintf (buffer,"ld d,$%02x", ARG(pc)); pc++; break;
+ case 0x17: sprintf (buffer,"rla"); break;
+ case 0x18: sprintf (buffer,"rl de (*)"); break;
+ case 0x19: sprintf (buffer,"add hl,de"); break;
+ case 0x1a: sprintf (buffer,"ld a,(de)"); break;
+ case 0x1b: sprintf (buffer,"dec de"); break;
+ case 0x1c: sprintf (buffer,"inc e"); break;
+ case 0x1d: sprintf (buffer,"dec e"); break;
+ case 0x1e: sprintf (buffer,"ld e,$%02x", ARG(pc)); pc++; break;
+ case 0x1f: sprintf (buffer,"rra"); break;
+ case 0x20: sprintf (buffer,"rim"); break;
+ case 0x21: sprintf (buffer,"ld hl,$%04x", ARGW(pc)); pc+=2; break;
+ case 0x22: sprintf (buffer,"ld ($%04x),hl", ARGW(pc)); pc+=2;break;
+ case 0x23: sprintf (buffer,"inc hl"); break;
+ case 0x24: sprintf (buffer,"inc h"); break;
+ case 0x25: sprintf (buffer,"dec h"); break;
+ case 0x26: sprintf (buffer,"ld h,$%02x", ARG(pc)); pc++; break;
+ case 0x27: sprintf (buffer,"daa"); break;
+ case 0x28: sprintf (buffer,"ld de,hl+$%02x (*)",ARG(pc));pc++;break;
+ case 0x29: sprintf (buffer,"add hl,hl"); break;
+ case 0x2a: sprintf (buffer,"ld hl,($%04x)", ARGW(pc)); pc+=2;break;
+ case 0x2b: sprintf (buffer,"dec hl"); break;
+ case 0x2c: sprintf (buffer,"inc l"); break;
+ case 0x2d: sprintf (buffer,"dec l"); break;
+ case 0x2e: sprintf (buffer,"ld l,$%02x", ARG(pc)); pc++; break;
+ case 0x2f: sprintf (buffer,"cpl"); break;
+ case 0x30: sprintf (buffer,"sim"); break;
+ case 0x31: sprintf (buffer,"ld sp,$%04x", ARGW(pc)); pc+=2; break;
+ case 0x32: sprintf (buffer,"ld ($%04x),a", ARGW(pc)); pc+=2; break;
+ case 0x33: sprintf (buffer,"inc sp"); break;
+ case 0x34: sprintf (buffer,"inc (hl)"); break;
+ case 0x35: sprintf (buffer,"dec (hl)"); break;
+ case 0x36: sprintf (buffer,"ld (hl),$%02x", ARG(pc)); pc++; break;
+ case 0x37: sprintf (buffer,"scf"); break;
+ case 0x38: sprintf (buffer,"ld de,sp+$%02x (*)",ARG(pc));pc++;break;
+ case 0x39: sprintf (buffer,"add hl,sp"); break;
+ case 0x3a: sprintf (buffer,"ld a,($%04x)", ARGW(pc)); pc+=2; break;
+ case 0x3b: sprintf (buffer,"dec sp"); break;
+ case 0x3c: sprintf (buffer,"inc a"); break;
+ case 0x3d: sprintf (buffer,"dec a"); break;
+ case 0x3e: sprintf (buffer,"ld a,$%02x", ARG(pc)); pc++; break;
+ case 0x3f: sprintf (buffer,"ccf"); break;
+ case 0x40: sprintf (buffer,"ld b,b"); break;
+ case 0x41: sprintf (buffer,"ld b,c"); break;
+ case 0x42: sprintf (buffer,"ld b,d"); break;
+ case 0x43: sprintf (buffer,"ld b,e"); break;
+ case 0x44: sprintf (buffer,"ld b,h"); break;
+ case 0x45: sprintf (buffer,"ld b,l"); break;
+ case 0x46: sprintf (buffer,"ld b,(hl)"); break;
+ case 0x47: sprintf (buffer,"ld b,a"); break;
+ case 0x48: sprintf (buffer,"ld c,b"); break;
+ case 0x49: sprintf (buffer,"ld c,c"); break;
+ case 0x4a: sprintf (buffer,"ld c,d"); break;
+ case 0x4b: sprintf (buffer,"ld c,e"); break;
+ case 0x4c: sprintf (buffer,"ld c,h"); break;
+ case 0x4d: sprintf (buffer,"ld c,l"); break;
+ case 0x4e: sprintf (buffer,"ld c,(hl)"); break;
+ case 0x4f: sprintf (buffer,"ld c,a"); break;
+ case 0x50: sprintf (buffer,"ld d,b"); break;
+ case 0x51: sprintf (buffer,"ld d,c"); break;
+ case 0x52: sprintf (buffer,"ld d,d"); break;
+ case 0x53: sprintf (buffer,"ld d,e"); break;
+ case 0x54: sprintf (buffer,"ld d,h"); break;
+ case 0x55: sprintf (buffer,"ld d,l"); break;
+ case 0x56: sprintf (buffer,"ld d,(hl)"); break;
+ case 0x57: sprintf (buffer,"ld d,a"); break;
+ case 0x58: sprintf (buffer,"ld e,b"); break;
+ case 0x59: sprintf (buffer,"ld e,c"); break;
+ case 0x5a: sprintf (buffer,"ld e,d"); break;
+ case 0x5b: sprintf (buffer,"ld e,e"); break;
+ case 0x5c: sprintf (buffer,"ld e,h"); break;
+ case 0x5d: sprintf (buffer,"ld e,l"); break;
+ case 0x5e: sprintf (buffer,"ld e,(hl)"); break;
+ case 0x5f: sprintf (buffer,"ld e,a"); break;
+ case 0x60: sprintf (buffer,"ld h,b"); break;
+ case 0x61: sprintf (buffer,"ld h,c"); break;
+ case 0x62: sprintf (buffer,"ld h,d"); break;
+ case 0x63: sprintf (buffer,"ld h,e"); break;
+ case 0x64: sprintf (buffer,"ld h,h"); break;
+ case 0x65: sprintf (buffer,"ld h,l"); break;
+ case 0x66: sprintf (buffer,"ld h,(hl)"); break;
+ case 0x67: sprintf (buffer,"ld h,a"); break;
+ case 0x68: sprintf (buffer,"ld l,b"); break;
+ case 0x69: sprintf (buffer,"ld l,c"); break;
+ case 0x6a: sprintf (buffer,"ld l,d"); break;
+ case 0x6b: sprintf (buffer,"ld l,e"); break;
+ case 0x6c: sprintf (buffer,"ld l,h"); break;
+ case 0x6d: sprintf (buffer,"ld l,l"); break;
+ case 0x6e: sprintf (buffer,"ld l,(hl)"); break;
+ case 0x6f: sprintf (buffer,"ld l,a"); break;
+ case 0x70: sprintf (buffer,"ld (hl),b"); break;
+ case 0x71: sprintf (buffer,"ld (hl),c"); break;
+ case 0x72: sprintf (buffer,"ld (hl),d"); break;
+ case 0x73: sprintf (buffer,"ld (hl),e"); break;
+ case 0x74: sprintf (buffer,"ld (hl),h"); break;
+ case 0x75: sprintf (buffer,"ld (hl),l"); break;
+ case 0x76: sprintf (buffer,"halt"); break;
+ case 0x77: sprintf (buffer,"ld (hl),a"); break;
+ case 0x78: sprintf (buffer,"ld a,b"); break;
+ case 0x79: sprintf (buffer,"ld a,c"); break;
+ case 0x7a: sprintf (buffer,"ld a,d"); break;
+ case 0x7b: sprintf (buffer,"ld a,e"); break;
+ case 0x7c: sprintf (buffer,"ld a,h"); break;
+ case 0x7d: sprintf (buffer,"ld a,l"); break;
+ case 0x7e: sprintf (buffer,"ld a,(hl)"); break;
+ case 0x7f: sprintf (buffer,"ld a,a"); break;
+ case 0x80: sprintf (buffer,"add a,b"); break;
+ case 0x81: sprintf (buffer,"add a,c"); break;
+ case 0x82: sprintf (buffer,"add a,d"); break;
+ case 0x83: sprintf (buffer,"add a,e"); break;
+ case 0x84: sprintf (buffer,"add a,h"); break;
+ case 0x85: sprintf (buffer,"add a,l"); break;
+ case 0x86: sprintf (buffer,"add a,(hl)"); break;
+ case 0x87: sprintf (buffer,"add a,a"); break;
+ case 0x88: sprintf (buffer,"adc a,b"); break;
+ case 0x89: sprintf (buffer,"adc a,c"); break;
+ case 0x8a: sprintf (buffer,"adc a,d"); break;
+ case 0x8b: sprintf (buffer,"adc a,e"); break;
+ case 0x8c: sprintf (buffer,"adc a,h"); break;
+ case 0x8d: sprintf (buffer,"adc a,l"); break;
+ case 0x8e: sprintf (buffer,"adc a,(hl)"); break;
+ case 0x8f: sprintf (buffer,"adc a,a"); break;
+ case 0x90: sprintf (buffer,"sub b"); break;
+ case 0x91: sprintf (buffer,"sub c"); break;
+ case 0x92: sprintf (buffer,"sub d"); break;
+ case 0x93: sprintf (buffer,"sub e"); break;
+ case 0x94: sprintf (buffer,"sub h"); break;
+ case 0x95: sprintf (buffer,"sub l"); break;
+ case 0x96: sprintf (buffer,"sub (hl)"); break;
+ case 0x97: sprintf (buffer,"sub a"); break;
+ case 0x98: sprintf (buffer,"sbc a,b"); break;
+ case 0x99: sprintf (buffer,"sbc a,c"); break;
+ case 0x9a: sprintf (buffer,"sbc a,d"); break;
+ case 0x9b: sprintf (buffer,"sbc a,e"); break;
+ case 0x9c: sprintf (buffer,"sbc a,h"); break;
+ case 0x9d: sprintf (buffer,"sbc a,l"); break;
+ case 0x9e: sprintf (buffer,"sbc a,(hl)"); break;
+ case 0x9f: sprintf (buffer,"sbc a,a"); break;
+ case 0xa0: sprintf (buffer,"and b"); break;
+ case 0xa1: sprintf (buffer,"and c"); break;
+ case 0xa2: sprintf (buffer,"and d"); break;
+ case 0xa3: sprintf (buffer,"and e"); break;
+ case 0xa4: sprintf (buffer,"and h"); break;
+ case 0xa5: sprintf (buffer,"and l"); break;
+ case 0xa6: sprintf (buffer,"and (hl)"); break;
+ case 0xa7: sprintf (buffer,"and a"); break;
+ case 0xa8: sprintf (buffer,"xor b"); break;
+ case 0xa9: sprintf (buffer,"xor c"); break;
+ case 0xaa: sprintf (buffer,"xor d"); break;
+ case 0xab: sprintf (buffer,"xor e"); break;
+ case 0xac: sprintf (buffer,"xor h"); break;
+ case 0xad: sprintf (buffer,"xor l"); break;
+ case 0xae: sprintf (buffer,"xor (hl)"); break;
+ case 0xaf: sprintf (buffer,"xor a"); break;
+ case 0xb0: sprintf (buffer,"or b"); break;
+ case 0xb1: sprintf (buffer,"or c"); break;
+ case 0xb2: sprintf (buffer,"or d"); break;
+ case 0xb3: sprintf (buffer,"or e"); break;
+ case 0xb4: sprintf (buffer,"or h"); break;
+ case 0xb5: sprintf (buffer,"or l"); break;
+ case 0xb6: sprintf (buffer,"or (hl)"); break;
+ case 0xb7: sprintf (buffer,"or a"); break;
+ case 0xb8: sprintf (buffer,"cp b"); break;
+ case 0xb9: sprintf (buffer,"cp c"); break;
+ case 0xba: sprintf (buffer,"cp d"); break;
+ case 0xbb: sprintf (buffer,"cp e"); break;
+ case 0xbc: sprintf (buffer,"cp h"); break;
+ case 0xbd: sprintf (buffer,"cp l"); break;
+ case 0xbe: sprintf (buffer,"cp (hl)"); break;
+ case 0xbf: sprintf (buffer,"cp a"); break;
+ case 0xc0: sprintf (buffer,"ret nz"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xc1: sprintf (buffer,"pop bc"); break;
+ case 0xc2: sprintf (buffer,"jp nz,$%04x", ARGW(pc)); pc+=2; break;
+ case 0xc3: sprintf (buffer,"jp $%04x", ARGW(pc)); pc+=2; break;
+ case 0xc4: sprintf (buffer,"call nz,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xc5: sprintf (buffer,"push bc"); break;
+ case 0xc6: sprintf (buffer,"add a,$%02x", ARG(pc)); pc++; break;
+ case 0xc7: sprintf (buffer,"rst $00"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xc8: sprintf (buffer,"ret z"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xc9: sprintf (buffer,"ret"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xca: sprintf (buffer,"jp z,$%04x", ARGW(pc)); pc+=2; break;
+ case 0xcb: sprintf (buffer,"rst v,$40 (*)"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xcc: sprintf (buffer,"call z,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xcd: sprintf (buffer,"call $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xce: sprintf (buffer,"adc a,$%02x", ARG(pc)); pc++; break;
+ case 0xcf: sprintf (buffer,"rst $08"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xd0: sprintf (buffer,"ret nc"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xd1: sprintf (buffer,"pop de"); break;
+ case 0xd2: sprintf (buffer,"jp nc,$%04x", ARGW(pc)); pc+=2; break;
+ case 0xd3: sprintf (buffer,"out ($%02x),a", ARG(pc)); pc++; break;
+ case 0xd4: sprintf (buffer,"call nc,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xd5: sprintf (buffer,"push de"); break;
+ case 0xd6: sprintf (buffer,"sub $%02x", ARG(pc)); pc++; break;
+ case 0xd7: sprintf (buffer,"rst $10"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xd8: sprintf (buffer,"ret c"); break;
+ case 0xd9: sprintf (buffer,"ld (de),hl (*)"); break;
+ case 0xda: sprintf (buffer,"jp c,$%04x", ARGW(pc)); pc+=2; break;
+ case 0xdb: sprintf (buffer,"in a,($%02x)", ARG(pc)); pc++; break;
+ case 0xdc: sprintf (buffer,"call c,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xdd: sprintf (buffer,"jp nx,$%04x (*)",ARGW(pc));pc+=2;break;
+ case 0xde: sprintf (buffer,"sub $%02x", ARG(pc)); pc++; break;
+ case 0xdf: sprintf (buffer,"rst $18"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xe0: sprintf (buffer,"ret pe"); break;
+ case 0xe1: sprintf (buffer,"pop hl"); break;
+ case 0xe2: sprintf (buffer,"jp pe,$%04x", ARGW(pc)); pc+=2; break;
+ case 0xe3: sprintf (buffer,"ex (sp),hl"); break;
+ case 0xe4: sprintf (buffer,"call pe,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xe5: sprintf (buffer,"push hl"); break;
+ case 0xe6: sprintf (buffer,"and $%02x", ARG(pc)); pc++; break;
+ case 0xe7: sprintf (buffer,"rst $20"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xe8: sprintf (buffer,"ret po"); break;
+ case 0xe9: sprintf (buffer,"jp (hl)"); break;
+ case 0xea: sprintf (buffer,"jp po,$%04x", ARGW(pc)); pc+=2; break;
+ case 0xeb: sprintf (buffer,"ex de,hl"); break;
+ case 0xec: sprintf (buffer,"call po,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xed: sprintf (buffer,"ld hl,(de) (*)"); break;
+ case 0xee: sprintf (buffer,"xor $%02x", ARG(pc)); pc++; break;
+ case 0xef: sprintf (buffer,"rst $28"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xf0: sprintf (buffer,"ret p"); break;
+ case 0xf1: sprintf (buffer,"pop af"); break;
+ case 0xf2: sprintf (buffer,"jp p,$%04x", ARGW(pc)); pc+=2; break;
+ case 0xf3: sprintf (buffer,"di"); break;
+ case 0xf4: sprintf (buffer,"cp $%04x", ARGW(pc)); pc+=2; break;
+ case 0xf5: sprintf (buffer,"push af"); break;
+ case 0xf6: sprintf (buffer,"or $%02x", ARG(pc)); pc++; break;
+ case 0xf7: sprintf (buffer,"rst $30"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xf8: sprintf (buffer,"ret m"); break;
+ case 0xf9: sprintf (buffer,"ld sp,hl"); break;
+ case 0xfa: sprintf (buffer,"jp m,$%04x", ARGW(pc)); pc+=2; break;
+ case 0xfb: sprintf (buffer,"ei"); break;
+ case 0xfc: sprintf (buffer,"call m,$%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xfd: sprintf (buffer,"jp x,$%04x (*)",ARGW(pc));pc+=2; break;
+ case 0xfe: sprintf (buffer,"cp $%02x", ARG(pc)); pc++; break;
+ case 0xff: sprintf (buffer,"rst $38"); flags = DASMFLAG_STEP_OVER; break;
#else
- case 0x00: sprintf (buff,"nop"); break;
- case 0x01: sprintf (buff,"lxi b,$%04x", ARGW(pc)); pc+=2; break;
- case 0x02: sprintf (buff,"stax b"); break;
- case 0x03: sprintf (buff,"inx b"); break;
- case 0x04: sprintf (buff,"inr b"); break;
- case 0x05: sprintf (buff,"dcr b"); break;
- case 0x06: sprintf (buff,"mvi b,$%02x", ARG(pc)); pc++; break;
- case 0x07: sprintf (buff,"rlc"); break;
- case 0x08: sprintf (buff,"dsub (*)"); break;
- case 0x09: sprintf (buff,"dad b"); break;
- case 0x0a: sprintf (buff,"ldax b"); break;
- case 0x0b: sprintf (buff,"dcx b"); break;
- case 0x0c: sprintf (buff,"inr c"); break;
- case 0x0d: sprintf (buff,"dcr c"); break;
- case 0x0e: sprintf (buff,"mvi c,$%02x", ARG(pc)); pc++; break;
- case 0x0f: sprintf (buff,"rrc"); break;
- case 0x10: sprintf (buff,"asrh (*)"); break;
- case 0x11: sprintf (buff,"lxi d,$%04x", ARGW(pc)); pc+=2; break;
- case 0x12: sprintf (buff,"stax d"); break;
- case 0x13: sprintf (buff,"inx d"); break;
- case 0x14: sprintf (buff,"inr d"); break;
- case 0x15: sprintf (buff,"dcr d"); break;
- case 0x16: sprintf (buff,"mvi d,$%02x", ARG(pc)); pc++; break;
- case 0x17: sprintf (buff,"ral"); break;
- case 0x18: sprintf (buff,"rlde (*)"); break;
- case 0x19: sprintf (buff,"dad d"); break;
- case 0x1a: sprintf (buff,"ldax d"); break;
- case 0x1b: sprintf (buff,"dcx d"); break;
- case 0x1c: sprintf (buff,"inr e"); break;
- case 0x1d: sprintf (buff,"dcr e"); break;
- case 0x1e: sprintf (buff,"mvi e,$%02x", ARG(pc)); pc++; break;
- case 0x1f: sprintf (buff,"rar"); break;
- case 0x20: sprintf (buff,"rim"); break;
- case 0x21: sprintf (buff,"lxi h,$%04x", ARGW(pc)); pc+=2; break;
- case 0x22: sprintf (buff,"shld $%04x", ARGW(pc)); pc+=2; break;
- case 0x23: sprintf (buff,"inx h"); break;
- case 0x24: sprintf (buff,"inr h"); break;
- case 0x25: sprintf (buff,"dcr h"); break;
- case 0x26: sprintf (buff,"mvi h,$%02x", ARG(pc)); pc++; break;
- case 0x27: sprintf (buff,"daa"); break;
- case 0x28: sprintf (buff,"ldeh $%02x (*)", ARG(pc)); pc++; break;
- case 0x29: sprintf (buff,"dad h"); break;
- case 0x2a: sprintf (buff,"lhld $%04x", ARGW(pc)); pc+=2; break;
- case 0x2b: sprintf (buff,"dcx h"); break;
- case 0x2c: sprintf (buff,"inr l"); break;
- case 0x2d: sprintf (buff,"dcr l"); break;
- case 0x2e: sprintf (buff,"mvi l,$%02x", ARG(pc)); pc++; break;
- case 0x2f: sprintf (buff,"cma"); break;
- case 0x30: sprintf (buff,"sim"); break;
- case 0x31: sprintf (buff,"lxi sp,$%04x", ARGW(pc)); pc+=2; break;
- case 0x32: sprintf (buff,"stax $%04x", ARGW(pc)); pc+=2; break;
- case 0x33: sprintf (buff,"inx sp"); break;
- case 0x34: sprintf (buff,"inr m"); break;
- case 0x35: sprintf (buff,"dcr m"); break;
- case 0x36: sprintf (buff,"mvi m,$%02x", ARG(pc)); pc++; break;
- case 0x37: sprintf (buff,"stc"); break;
- case 0x38: sprintf (buff,"ldes $%02x", ARG(pc)); pc++; break;
- case 0x39: sprintf (buff,"dad sp"); break;
- case 0x3a: sprintf (buff,"ldax $%04x", ARGW(pc)); pc+=2; break;
- case 0x3b: sprintf (buff,"dcx sp"); break;
- case 0x3c: sprintf (buff,"inr a"); break;
- case 0x3d: sprintf (buff,"dcr a"); break;
- case 0x3e: sprintf (buff,"mvi a,$%02x", ARG(pc)); pc++; break;
- case 0x3f: sprintf (buff,"cmf"); break;
- case 0x40: sprintf (buff,"mov b,b"); break;
- case 0x41: sprintf (buff,"mov b,c"); break;
- case 0x42: sprintf (buff,"mov b,d"); break;
- case 0x43: sprintf (buff,"mov b,e"); break;
- case 0x44: sprintf (buff,"mov b,h"); break;
- case 0x45: sprintf (buff,"mov b,l"); break;
- case 0x46: sprintf (buff,"mov b,m"); break;
- case 0x47: sprintf (buff,"mov b,a"); break;
- case 0x48: sprintf (buff,"mov c,b"); break;
- case 0x49: sprintf (buff,"mov c,c"); break;
- case 0x4a: sprintf (buff,"mov c,d"); break;
- case 0x4b: sprintf (buff,"mov c,e"); break;
- case 0x4c: sprintf (buff,"mov c,h"); break;
- case 0x4d: sprintf (buff,"mov c,l"); break;
- case 0x4e: sprintf (buff,"mov c,m"); break;
- case 0x4f: sprintf (buff,"mov c,a"); break;
- case 0x50: sprintf (buff,"mov d,b"); break;
- case 0x51: sprintf (buff,"mov d,c"); break;
- case 0x52: sprintf (buff,"mov d,d"); break;
- case 0x53: sprintf (buff,"mov d,e"); break;
- case 0x54: sprintf (buff,"mov d,h"); break;
- case 0x55: sprintf (buff,"mov d,l"); break;
- case 0x56: sprintf (buff,"mov d,m"); break;
- case 0x57: sprintf (buff,"mov d,a"); break;
- case 0x58: sprintf (buff,"mov e,b"); break;
- case 0x59: sprintf (buff,"mov e,c"); break;
- case 0x5a: sprintf (buff,"mov e,d"); break;
- case 0x5b: sprintf (buff,"mov e,e"); break;
- case 0x5c: sprintf (buff,"mov e,h"); break;
- case 0x5d: sprintf (buff,"mov e,l"); break;
- case 0x5e: sprintf (buff,"mov e,m"); break;
- case 0x5f: sprintf (buff,"mov e,a"); break;
- case 0x60: sprintf (buff,"mov h,b"); break;
- case 0x61: sprintf (buff,"mov h,c"); break;
- case 0x62: sprintf (buff,"mov h,d"); break;
- case 0x63: sprintf (buff,"mov h,e"); break;
- case 0x64: sprintf (buff,"mov h,h"); break;
- case 0x65: sprintf (buff,"mov h,l"); break;
- case 0x66: sprintf (buff,"mov h,m"); break;
- case 0x67: sprintf (buff,"mov h,a"); break;
- case 0x68: sprintf (buff,"mov l,b"); break;
- case 0x69: sprintf (buff,"mov l,c"); break;
- case 0x6a: sprintf (buff,"mov l,d"); break;
- case 0x6b: sprintf (buff,"mov l,e"); break;
- case 0x6c: sprintf (buff,"mov l,h"); break;
- case 0x6d: sprintf (buff,"mov l,l"); break;
- case 0x6e: sprintf (buff,"mov l,m"); break;
- case 0x6f: sprintf (buff,"mov l,a"); break;
- case 0x70: sprintf (buff,"mov m,b"); break;
- case 0x71: sprintf (buff,"mov m,c"); break;
- case 0x72: sprintf (buff,"mov m,d"); break;
- case 0x73: sprintf (buff,"mov m,e"); break;
- case 0x74: sprintf (buff,"mov m,h"); break;
- case 0x75: sprintf (buff,"mov m,l"); break;
- case 0x76: sprintf (buff,"hlt"); break;
- case 0x77: sprintf (buff,"mov m,a"); break;
- case 0x78: sprintf (buff,"mov a,b"); break;
- case 0x79: sprintf (buff,"mov a,c"); break;
- case 0x7a: sprintf (buff,"mov a,d"); break;
- case 0x7b: sprintf (buff,"mov a,e"); break;
- case 0x7c: sprintf (buff,"mov a,h"); break;
- case 0x7d: sprintf (buff,"mov a,l"); break;
- case 0x7e: sprintf (buff,"mov a,m"); break;
- case 0x7f: sprintf (buff,"mov a,a"); break;
- case 0x80: sprintf (buff,"add b"); break;
- case 0x81: sprintf (buff,"add c"); break;
- case 0x82: sprintf (buff,"add d"); break;
- case 0x83: sprintf (buff,"add e"); break;
- case 0x84: sprintf (buff,"add h"); break;
- case 0x85: sprintf (buff,"add l"); break;
- case 0x86: sprintf (buff,"add m"); break;
- case 0x87: sprintf (buff,"add a"); break;
- case 0x88: sprintf (buff,"adc b"); break;
- case 0x89: sprintf (buff,"adc c"); break;
- case 0x8a: sprintf (buff,"adc d"); break;
- case 0x8b: sprintf (buff,"adc e"); break;
- case 0x8c: sprintf (buff,"adc h"); break;
- case 0x8d: sprintf (buff,"adc l"); break;
- case 0x8e: sprintf (buff,"adc m"); break;
- case 0x8f: sprintf (buff,"adc a"); break;
- case 0x90: sprintf (buff,"sub b"); break;
- case 0x91: sprintf (buff,"sub c"); break;
- case 0x92: sprintf (buff,"sub d"); break;
- case 0x93: sprintf (buff,"sub e"); break;
- case 0x94: sprintf (buff,"sub h"); break;
- case 0x95: sprintf (buff,"sub l"); break;
- case 0x96: sprintf (buff,"sub m"); break;
- case 0x97: sprintf (buff,"sub a"); break;
- case 0x98: sprintf (buff,"sbb b"); break;
- case 0x99: sprintf (buff,"sbb c"); break;
- case 0x9a: sprintf (buff,"sbb d"); break;
- case 0x9b: sprintf (buff,"sbb e"); break;
- case 0x9c: sprintf (buff,"sbb h"); break;
- case 0x9d: sprintf (buff,"sbb l"); break;
- case 0x9e: sprintf (buff,"sbb m"); break;
- case 0x9f: sprintf (buff,"sbb a"); break;
- case 0xa0: sprintf (buff,"ana b"); break;
- case 0xa1: sprintf (buff,"ana c"); break;
- case 0xa2: sprintf (buff,"ana d"); break;
- case 0xa3: sprintf (buff,"ana e"); break;
- case 0xa4: sprintf (buff,"ana h"); break;
- case 0xa5: sprintf (buff,"ana l"); break;
- case 0xa6: sprintf (buff,"ana m"); break;
- case 0xa7: sprintf (buff,"ana a"); break;
- case 0xa8: sprintf (buff,"xra b"); break;
- case 0xa9: sprintf (buff,"xra c"); break;
- case 0xaa: sprintf (buff,"xra d"); break;
- case 0xab: sprintf (buff,"xra e"); break;
- case 0xac: sprintf (buff,"xra h"); break;
- case 0xad: sprintf (buff,"xra l"); break;
- case 0xae: sprintf (buff,"xra m"); break;
- case 0xaf: sprintf (buff,"xra a"); break;
- case 0xb0: sprintf (buff,"ora b"); break;
- case 0xb1: sprintf (buff,"ora c"); break;
- case 0xb2: sprintf (buff,"ora d"); break;
- case 0xb3: sprintf (buff,"ora e"); break;
- case 0xb4: sprintf (buff,"ora h"); break;
- case 0xb5: sprintf (buff,"ora l"); break;
- case 0xb6: sprintf (buff,"ora m"); break;
- case 0xb7: sprintf (buff,"ora a"); break;
- case 0xb8: sprintf (buff,"cmp b"); break;
- case 0xb9: sprintf (buff,"cmp c"); break;
- case 0xba: sprintf (buff,"cmp d"); break;
- case 0xbb: sprintf (buff,"cmp e"); break;
- case 0xbc: sprintf (buff,"cmp h"); break;
- case 0xbd: sprintf (buff,"cmp l"); break;
- case 0xbe: sprintf (buff,"cmp m"); break;
- case 0xbf: sprintf (buff,"cmp a"); break;
- case 0xc0: sprintf (buff,"rnz"); flags = DASMFLAG_STEP_OUT; break;
- case 0xc1: sprintf (buff,"pop b"); break;
- case 0xc2: sprintf (buff,"jnz $%04x", ARGW(pc)); pc+=2; break;
- case 0xc3: sprintf (buff,"jmp $%04x", ARGW(pc)); pc+=2; break;
- case 0xc4: sprintf (buff,"cnz $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xc5: sprintf (buff,"push b"); break;
- case 0xc6: sprintf (buff,"adi $%02x", ARG(pc)); pc++; break;
- case 0xc7: sprintf (buff,"rst 0"); flags = DASMFLAG_STEP_OVER; break;
- case 0xc8: sprintf (buff,"rz"); flags = DASMFLAG_STEP_OUT; break;
- case 0xc9: sprintf (buff,"ret"); flags = DASMFLAG_STEP_OUT; break;
- case 0xca: sprintf (buff,"jz $%04x", ARGW(pc)); pc+=2; break;
- case 0xcb: sprintf (buff,"rstv 8 (*)"); flags = DASMFLAG_STEP_OVER; break;
- case 0xcc: sprintf (buff,"cz $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xcd: sprintf (buff,"call $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xce: sprintf (buff,"aci $%02x", ARG(pc)); pc++; break;
- case 0xcf: sprintf (buff,"rst 1"); flags = DASMFLAG_STEP_OVER; break;
- case 0xd0: sprintf (buff,"rnc"); flags = DASMFLAG_STEP_OUT; break;
- case 0xd1: sprintf (buff,"pop d"); break;
- case 0xd2: sprintf (buff,"jnc $%04x", ARGW(pc)); pc+=2; break;
- case 0xd3: sprintf (buff,"out $%02x", ARG(pc)); pc++; break;
- case 0xd4: sprintf (buff,"cnc $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xd5: sprintf (buff,"push d"); break;
- case 0xd6: sprintf (buff,"sui $%02x", ARG(pc)); pc++; break;
- case 0xd7: sprintf (buff,"rst 2"); flags = DASMFLAG_STEP_OVER; break;
- case 0xd8: sprintf (buff,"rc"); flags = DASMFLAG_STEP_OUT; break;
- case 0xd9: sprintf (buff,"shlx d (*)"); break;
- case 0xda: sprintf (buff,"jc $%04x", ARGW(pc)); pc+=2; break;
- case 0xdb: sprintf (buff,"in $%02x", ARG(pc)); pc++; break;
- case 0xdc: sprintf (buff,"cc $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xdd: sprintf (buff,"jnx $%04x (*)", ARGW(pc)); pc+=2; break;
- case 0xde: sprintf (buff,"sbi $%02x", ARG(pc)); pc++; break;
- case 0xdf: sprintf (buff,"rst 3"); flags = DASMFLAG_STEP_OVER; break;
- case 0xe0: sprintf (buff,"rpo"); flags = DASMFLAG_STEP_OUT; break;
- case 0xe1: sprintf (buff,"pop h"); break;
- case 0xe2: sprintf (buff,"jpo $%04x", ARGW(pc)); pc+=2; break;
- case 0xe3: sprintf (buff,"xthl"); break;
- case 0xe4: sprintf (buff,"cpo $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xe5: sprintf (buff,"push h"); break;
- case 0xe6: sprintf (buff,"ani $%02x", ARG(pc)); pc++; break;
- case 0xe7: sprintf (buff,"rst 4"); flags = DASMFLAG_STEP_OVER; break;
- case 0xe8: sprintf (buff,"rpe"); flags = DASMFLAG_STEP_OUT; break;
- case 0xe9: sprintf (buff,"pchl"); break;
- case 0xea: sprintf (buff,"jpe $%04x", ARGW(pc)); pc+=2; break;
- case 0xeb: sprintf (buff,"xchg"); break;
- case 0xec: sprintf (buff,"cpe $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xed: sprintf (buff,"lhlx d (*)"); break;
- case 0xee: sprintf (buff,"xri $%02x", ARG(pc)); pc++; break;
- case 0xef: sprintf (buff,"rst 5"); flags = DASMFLAG_STEP_OVER; break;
- case 0xf0: sprintf (buff,"rp"); flags = DASMFLAG_STEP_OUT; break;
- case 0xf1: sprintf (buff,"pop a"); break;
- case 0xf2: sprintf (buff,"jp $%04x", ARGW(pc)); pc+=2; break;
- case 0xf3: sprintf (buff,"di"); break;
- case 0xf4: sprintf (buff,"cp $%04x", ARGW(pc)); pc+=2; break;
- case 0xf5: sprintf (buff,"push a"); break;
- case 0xf6: sprintf (buff,"ori $%02x", ARG(pc)); pc++; break;
- case 0xf7: sprintf (buff,"rst 6"); flags = DASMFLAG_STEP_OVER; break;
- case 0xf8: sprintf (buff,"rm"); flags = DASMFLAG_STEP_OUT; break;
- case 0xf9: sprintf (buff,"sphl"); break;
- case 0xfa: sprintf (buff,"jm $%04x", ARGW(pc)); pc+=2; break;
- case 0xfb: sprintf (buff,"ei"); break;
- case 0xfc: sprintf (buff,"cm $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
- case 0xfd: sprintf (buff,"jx $%04x (*)", ARGW(pc)); pc+=2; break;
- case 0xfe: sprintf (buff,"cpi $%02x", ARG(pc)); pc++; break;
- case 0xff: sprintf (buff,"rst 7"); flags = DASMFLAG_STEP_OVER; break;
+ case 0x00: sprintf (buffer,"nop"); break;
+ case 0x01: sprintf (buffer,"lxi b,$%04x", ARGW(pc)); pc+=2; break;
+ case 0x02: sprintf (buffer,"stax b"); break;
+ case 0x03: sprintf (buffer,"inx b"); break;
+ case 0x04: sprintf (buffer,"inr b"); break;
+ case 0x05: sprintf (buffer,"dcr b"); break;
+ case 0x06: sprintf (buffer,"mvi b,$%02x", ARG(pc)); pc++; break;
+ case 0x07: sprintf (buffer,"rlc"); break;
+ case 0x08: sprintf (buffer,"dsub (*)"); break;
+ case 0x09: sprintf (buffer,"dad b"); break;
+ case 0x0a: sprintf (buffer,"ldax b"); break;
+ case 0x0b: sprintf (buffer,"dcx b"); break;
+ case 0x0c: sprintf (buffer,"inr c"); break;
+ case 0x0d: sprintf (buffer,"dcr c"); break;
+ case 0x0e: sprintf (buffer,"mvi c,$%02x", ARG(pc)); pc++; break;
+ case 0x0f: sprintf (buffer,"rrc"); break;
+ case 0x10: sprintf (buffer,"asrh (*)"); break;
+ case 0x11: sprintf (buffer,"lxi d,$%04x", ARGW(pc)); pc+=2; break;
+ case 0x12: sprintf (buffer,"stax d"); break;
+ case 0x13: sprintf (buffer,"inx d"); break;
+ case 0x14: sprintf (buffer,"inr d"); break;
+ case 0x15: sprintf (buffer,"dcr d"); break;
+ case 0x16: sprintf (buffer,"mvi d,$%02x", ARG(pc)); pc++; break;
+ case 0x17: sprintf (buffer,"ral"); break;
+ case 0x18: sprintf (buffer,"rlde (*)"); break;
+ case 0x19: sprintf (buffer,"dad d"); break;
+ case 0x1a: sprintf (buffer,"ldax d"); break;
+ case 0x1b: sprintf (buffer,"dcx d"); break;
+ case 0x1c: sprintf (buffer,"inr e"); break;
+ case 0x1d: sprintf (buffer,"dcr e"); break;
+ case 0x1e: sprintf (buffer,"mvi e,$%02x", ARG(pc)); pc++; break;
+ case 0x1f: sprintf (buffer,"rar"); break;
+ case 0x20: sprintf (buffer,"rim"); break;
+ case 0x21: sprintf (buffer,"lxi h,$%04x", ARGW(pc)); pc+=2; break;
+ case 0x22: sprintf (buffer,"shld $%04x", ARGW(pc)); pc+=2; break;
+ case 0x23: sprintf (buffer,"inx h"); break;
+ case 0x24: sprintf (buffer,"inr h"); break;
+ case 0x25: sprintf (buffer,"dcr h"); break;
+ case 0x26: sprintf (buffer,"mvi h,$%02x", ARG(pc)); pc++; break;
+ case 0x27: sprintf (buffer,"daa"); break;
+ case 0x28: sprintf (buffer,"ldeh $%02x (*)", ARG(pc)); pc++; break;
+ case 0x29: sprintf (buffer,"dad h"); break;
+ case 0x2a: sprintf (buffer,"lhld $%04x", ARGW(pc)); pc+=2; break;
+ case 0x2b: sprintf (buffer,"dcx h"); break;
+ case 0x2c: sprintf (buffer,"inr l"); break;
+ case 0x2d: sprintf (buffer,"dcr l"); break;
+ case 0x2e: sprintf (buffer,"mvi l,$%02x", ARG(pc)); pc++; break;
+ case 0x2f: sprintf (buffer,"cma"); break;
+ case 0x30: sprintf (buffer,"sim"); break;
+ case 0x31: sprintf (buffer,"lxi sp,$%04x", ARGW(pc)); pc+=2; break;
+ case 0x32: sprintf (buffer,"stax $%04x", ARGW(pc)); pc+=2; break;
+ case 0x33: sprintf (buffer,"inx sp"); break;
+ case 0x34: sprintf (buffer,"inr m"); break;
+ case 0x35: sprintf (buffer,"dcr m"); break;
+ case 0x36: sprintf (buffer,"mvi m,$%02x", ARG(pc)); pc++; break;
+ case 0x37: sprintf (buffer,"stc"); break;
+ case 0x38: sprintf (buffer,"ldes $%02x", ARG(pc)); pc++; break;
+ case 0x39: sprintf (buffer,"dad sp"); break;
+ case 0x3a: sprintf (buffer,"ldax $%04x", ARGW(pc)); pc+=2; break;
+ case 0x3b: sprintf (buffer,"dcx sp"); break;
+ case 0x3c: sprintf (buffer,"inr a"); break;
+ case 0x3d: sprintf (buffer,"dcr a"); break;
+ case 0x3e: sprintf (buffer,"mvi a,$%02x", ARG(pc)); pc++; break;
+ case 0x3f: sprintf (buffer,"cmf"); break;
+ case 0x40: sprintf (buffer,"mov b,b"); break;
+ case 0x41: sprintf (buffer,"mov b,c"); break;
+ case 0x42: sprintf (buffer,"mov b,d"); break;
+ case 0x43: sprintf (buffer,"mov b,e"); break;
+ case 0x44: sprintf (buffer,"mov b,h"); break;
+ case 0x45: sprintf (buffer,"mov b,l"); break;
+ case 0x46: sprintf (buffer,"mov b,m"); break;
+ case 0x47: sprintf (buffer,"mov b,a"); break;
+ case 0x48: sprintf (buffer,"mov c,b"); break;
+ case 0x49: sprintf (buffer,"mov c,c"); break;
+ case 0x4a: sprintf (buffer,"mov c,d"); break;
+ case 0x4b: sprintf (buffer,"mov c,e"); break;
+ case 0x4c: sprintf (buffer,"mov c,h"); break;
+ case 0x4d: sprintf (buffer,"mov c,l"); break;
+ case 0x4e: sprintf (buffer,"mov c,m"); break;
+ case 0x4f: sprintf (buffer,"mov c,a"); break;
+ case 0x50: sprintf (buffer,"mov d,b"); break;
+ case 0x51: sprintf (buffer,"mov d,c"); break;
+ case 0x52: sprintf (buffer,"mov d,d"); break;
+ case 0x53: sprintf (buffer,"mov d,e"); break;
+ case 0x54: sprintf (buffer,"mov d,h"); break;
+ case 0x55: sprintf (buffer,"mov d,l"); break;
+ case 0x56: sprintf (buffer,"mov d,m"); break;
+ case 0x57: sprintf (buffer,"mov d,a"); break;
+ case 0x58: sprintf (buffer,"mov e,b"); break;
+ case 0x59: sprintf (buffer,"mov e,c"); break;
+ case 0x5a: sprintf (buffer,"mov e,d"); break;
+ case 0x5b: sprintf (buffer,"mov e,e"); break;
+ case 0x5c: sprintf (buffer,"mov e,h"); break;
+ case 0x5d: sprintf (buffer,"mov e,l"); break;
+ case 0x5e: sprintf (buffer,"mov e,m"); break;
+ case 0x5f: sprintf (buffer,"mov e,a"); break;
+ case 0x60: sprintf (buffer,"mov h,b"); break;
+ case 0x61: sprintf (buffer,"mov h,c"); break;
+ case 0x62: sprintf (buffer,"mov h,d"); break;
+ case 0x63: sprintf (buffer,"mov h,e"); break;
+ case 0x64: sprintf (buffer,"mov h,h"); break;
+ case 0x65: sprintf (buffer,"mov h,l"); break;
+ case 0x66: sprintf (buffer,"mov h,m"); break;
+ case 0x67: sprintf (buffer,"mov h,a"); break;
+ case 0x68: sprintf (buffer,"mov l,b"); break;
+ case 0x69: sprintf (buffer,"mov l,c"); break;
+ case 0x6a: sprintf (buffer,"mov l,d"); break;
+ case 0x6b: sprintf (buffer,"mov l,e"); break;
+ case 0x6c: sprintf (buffer,"mov l,h"); break;
+ case 0x6d: sprintf (buffer,"mov l,l"); break;
+ case 0x6e: sprintf (buffer,"mov l,m"); break;
+ case 0x6f: sprintf (buffer,"mov l,a"); break;
+ case 0x70: sprintf (buffer,"mov m,b"); break;
+ case 0x71: sprintf (buffer,"mov m,c"); break;
+ case 0x72: sprintf (buffer,"mov m,d"); break;
+ case 0x73: sprintf (buffer,"mov m,e"); break;
+ case 0x74: sprintf (buffer,"mov m,h"); break;
+ case 0x75: sprintf (buffer,"mov m,l"); break;
+ case 0x76: sprintf (buffer,"hlt"); break;
+ case 0x77: sprintf (buffer,"mov m,a"); break;
+ case 0x78: sprintf (buffer,"mov a,b"); break;
+ case 0x79: sprintf (buffer,"mov a,c"); break;
+ case 0x7a: sprintf (buffer,"mov a,d"); break;
+ case 0x7b: sprintf (buffer,"mov a,e"); break;
+ case 0x7c: sprintf (buffer,"mov a,h"); break;
+ case 0x7d: sprintf (buffer,"mov a,l"); break;
+ case 0x7e: sprintf (buffer,"mov a,m"); break;
+ case 0x7f: sprintf (buffer,"mov a,a"); break;
+ case 0x80: sprintf (buffer,"add b"); break;
+ case 0x81: sprintf (buffer,"add c"); break;
+ case 0x82: sprintf (buffer,"add d"); break;
+ case 0x83: sprintf (buffer,"add e"); break;
+ case 0x84: sprintf (buffer,"add h"); break;
+ case 0x85: sprintf (buffer,"add l"); break;
+ case 0x86: sprintf (buffer,"add m"); break;
+ case 0x87: sprintf (buffer,"add a"); break;
+ case 0x88: sprintf (buffer,"adc b"); break;
+ case 0x89: sprintf (buffer,"adc c"); break;
+ case 0x8a: sprintf (buffer,"adc d"); break;
+ case 0x8b: sprintf (buffer,"adc e"); break;
+ case 0x8c: sprintf (buffer,"adc h"); break;
+ case 0x8d: sprintf (buffer,"adc l"); break;
+ case 0x8e: sprintf (buffer,"adc m"); break;
+ case 0x8f: sprintf (buffer,"adc a"); break;
+ case 0x90: sprintf (buffer,"sub b"); break;
+ case 0x91: sprintf (buffer,"sub c"); break;
+ case 0x92: sprintf (buffer,"sub d"); break;
+ case 0x93: sprintf (buffer,"sub e"); break;
+ case 0x94: sprintf (buffer,"sub h"); break;
+ case 0x95: sprintf (buffer,"sub l"); break;
+ case 0x96: sprintf (buffer,"sub m"); break;
+ case 0x97: sprintf (buffer,"sub a"); break;
+ case 0x98: sprintf (buffer,"sbb b"); break;
+ case 0x99: sprintf (buffer,"sbb c"); break;
+ case 0x9a: sprintf (buffer,"sbb d"); break;
+ case 0x9b: sprintf (buffer,"sbb e"); break;
+ case 0x9c: sprintf (buffer,"sbb h"); break;
+ case 0x9d: sprintf (buffer,"sbb l"); break;
+ case 0x9e: sprintf (buffer,"sbb m"); break;
+ case 0x9f: sprintf (buffer,"sbb a"); break;
+ case 0xa0: sprintf (buffer,"ana b"); break;
+ case 0xa1: sprintf (buffer,"ana c"); break;
+ case 0xa2: sprintf (buffer,"ana d"); break;
+ case 0xa3: sprintf (buffer,"ana e"); break;
+ case 0xa4: sprintf (buffer,"ana h"); break;
+ case 0xa5: sprintf (buffer,"ana l"); break;
+ case 0xa6: sprintf (buffer,"ana m"); break;
+ case 0xa7: sprintf (buffer,"ana a"); break;
+ case 0xa8: sprintf (buffer,"xra b"); break;
+ case 0xa9: sprintf (buffer,"xra c"); break;
+ case 0xaa: sprintf (buffer,"xra d"); break;
+ case 0xab: sprintf (buffer,"xra e"); break;
+ case 0xac: sprintf (buffer,"xra h"); break;
+ case 0xad: sprintf (buffer,"xra l"); break;
+ case 0xae: sprintf (buffer,"xra m"); break;
+ case 0xaf: sprintf (buffer,"xra a"); break;
+ case 0xb0: sprintf (buffer,"ora b"); break;
+ case 0xb1: sprintf (buffer,"ora c"); break;
+ case 0xb2: sprintf (buffer,"ora d"); break;
+ case 0xb3: sprintf (buffer,"ora e"); break;
+ case 0xb4: sprintf (buffer,"ora h"); break;
+ case 0xb5: sprintf (buffer,"ora l"); break;
+ case 0xb6: sprintf (buffer,"ora m"); break;
+ case 0xb7: sprintf (buffer,"ora a"); break;
+ case 0xb8: sprintf (buffer,"cmp b"); break;
+ case 0xb9: sprintf (buffer,"cmp c"); break;
+ case 0xba: sprintf (buffer,"cmp d"); break;
+ case 0xbb: sprintf (buffer,"cmp e"); break;
+ case 0xbc: sprintf (buffer,"cmp h"); break;
+ case 0xbd: sprintf (buffer,"cmp l"); break;
+ case 0xbe: sprintf (buffer,"cmp m"); break;
+ case 0xbf: sprintf (buffer,"cmp a"); break;
+ case 0xc0: sprintf (buffer,"rnz"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xc1: sprintf (buffer,"pop b"); break;
+ case 0xc2: sprintf (buffer,"jnz $%04x", ARGW(pc)); pc+=2; break;
+ case 0xc3: sprintf (buffer,"jmp $%04x", ARGW(pc)); pc+=2; break;
+ case 0xc4: sprintf (buffer,"cnz $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xc5: sprintf (buffer,"push b"); break;
+ case 0xc6: sprintf (buffer,"adi $%02x", ARG(pc)); pc++; break;
+ case 0xc7: sprintf (buffer,"rst 0"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xc8: sprintf (buffer,"rz"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xc9: sprintf (buffer,"ret"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xca: sprintf (buffer,"jz $%04x", ARGW(pc)); pc+=2; break;
+ case 0xcb: sprintf (buffer,"rstv 8 (*)"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xcc: sprintf (buffer,"cz $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xcd: sprintf (buffer,"call $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xce: sprintf (buffer,"aci $%02x", ARG(pc)); pc++; break;
+ case 0xcf: sprintf (buffer,"rst 1"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xd0: sprintf (buffer,"rnc"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xd1: sprintf (buffer,"pop d"); break;
+ case 0xd2: sprintf (buffer,"jnc $%04x", ARGW(pc)); pc+=2; break;
+ case 0xd3: sprintf (buffer,"out $%02x", ARG(pc)); pc++; break;
+ case 0xd4: sprintf (buffer,"cnc $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xd5: sprintf (buffer,"push d"); break;
+ case 0xd6: sprintf (buffer,"sui $%02x", ARG(pc)); pc++; break;
+ case 0xd7: sprintf (buffer,"rst 2"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xd8: sprintf (buffer,"rc"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xd9: sprintf (buffer,"shlx d (*)"); break;
+ case 0xda: sprintf (buffer,"jc $%04x", ARGW(pc)); pc+=2; break;
+ case 0xdb: sprintf (buffer,"in $%02x", ARG(pc)); pc++; break;
+ case 0xdc: sprintf (buffer,"cc $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xdd: sprintf (buffer,"jnx $%04x (*)", ARGW(pc)); pc+=2; break;
+ case 0xde: sprintf (buffer,"sbi $%02x", ARG(pc)); pc++; break;
+ case 0xdf: sprintf (buffer,"rst 3"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xe0: sprintf (buffer,"rpo"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xe1: sprintf (buffer,"pop h"); break;
+ case 0xe2: sprintf (buffer,"jpo $%04x", ARGW(pc)); pc+=2; break;
+ case 0xe3: sprintf (buffer,"xthl"); break;
+ case 0xe4: sprintf (buffer,"cpo $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xe5: sprintf (buffer,"push h"); break;
+ case 0xe6: sprintf (buffer,"ani $%02x", ARG(pc)); pc++; break;
+ case 0xe7: sprintf (buffer,"rst 4"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xe8: sprintf (buffer,"rpe"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xe9: sprintf (buffer,"pchl"); break;
+ case 0xea: sprintf (buffer,"jpe $%04x", ARGW(pc)); pc+=2; break;
+ case 0xeb: sprintf (buffer,"xchg"); break;
+ case 0xec: sprintf (buffer,"cpe $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xed: sprintf (buffer,"lhlx d (*)"); break;
+ case 0xee: sprintf (buffer,"xri $%02x", ARG(pc)); pc++; break;
+ case 0xef: sprintf (buffer,"rst 5"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xf0: sprintf (buffer,"rp"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xf1: sprintf (buffer,"pop a"); break;
+ case 0xf2: sprintf (buffer,"jp $%04x", ARGW(pc)); pc+=2; break;
+ case 0xf3: sprintf (buffer,"di"); break;
+ case 0xf4: sprintf (buffer,"cp $%04x", ARGW(pc)); pc+=2; break;
+ case 0xf5: sprintf (buffer,"push a"); break;
+ case 0xf6: sprintf (buffer,"ori $%02x", ARG(pc)); pc++; break;
+ case 0xf7: sprintf (buffer,"rst 6"); flags = DASMFLAG_STEP_OVER; break;
+ case 0xf8: sprintf (buffer,"rm"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xf9: sprintf (buffer,"sphl"); break;
+ case 0xfa: sprintf (buffer,"jm $%04x", ARGW(pc)); pc+=2; break;
+ case 0xfb: sprintf (buffer,"ei"); break;
+ case 0xfc: sprintf (buffer,"cm $%04x", ARGW(pc)); pc+=2; flags = DASMFLAG_STEP_OVER; break;
+ case 0xfd: sprintf (buffer,"jx $%04x (*)", ARGW(pc)); pc+=2; break;
+ case 0xfe: sprintf (buffer,"cpi $%02x", ARG(pc)); pc++; break;
+ case 0xff: sprintf (buffer,"rst 7"); flags = DASMFLAG_STEP_OVER; break;
#endif
}
return (pc - PC) | flags | DASMFLAG_SUPPORTED;
diff --git a/src/emu/cpu/i8085/i8085.c b/src/emu/cpu/i8085/i8085.c
index 33ca1780320..01674da0b64 100644
--- a/src/emu/cpu/i8085/i8085.c
+++ b/src/emu/cpu/i8085/i8085.c
@@ -1418,7 +1418,7 @@ static CPU_EXIT( i8085 )
/****************************************************************************
* Get the current 8085 context
****************************************************************************/
-static void i8085_get_context(void *dst)
+static CPU_GET_CONTEXT( i8085 )
{
if( dst )
*(i8085_Regs*)dst = I;
@@ -1427,7 +1427,7 @@ static void i8085_get_context(void *dst)
/****************************************************************************
* Set the current 8085 context
****************************************************************************/
-static void i8085_set_context(void *src)
+static CPU_SET_CONTEXT( i8085 )
{
if( src )
{
@@ -1649,7 +1649,7 @@ static void i8080_set_irq_line(int irqline, int state)
* Generic set_info
**************************************************************************/
-static void i8085_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( i8085 )
{
switch (state)
{
@@ -1689,7 +1689,7 @@ static void i8085_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void i8085_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8085 )
{
switch (state)
{
@@ -1739,15 +1739,15 @@ void i8085_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + I8085_STATUS: info->i = I.STATUS; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = i8085_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = i8085_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = i8085_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i8085); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(i8085); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(i8085); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8085); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i8085); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(i8085); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i8085); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i8085_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8085); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i8085_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -1790,7 +1790,7 @@ void i8085_get_info(UINT32 state, cpuinfo *info)
* CPU-specific get_info/set_info
**************************************************************************/
-static void i8080_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( i8080 )
{
switch (state)
{
@@ -1798,11 +1798,11 @@ static void i8080_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_INPUT_STATE + I8080_INTR_LINE: i8080_set_irq_line(I8080_INTR_LINE, info->i); break;
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: i8080_set_irq_line(INPUT_LINE_NMI, info->i); break;
- default: i8085_set_info(state, info); break;
+ default: CPU_SET_INFO_CALL(i8085); break;
}
}
-void i8080_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8080 )
{
switch (state)
{
@@ -1813,13 +1813,13 @@ void i8080_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = (I.IREQ & IM_TRAP) ? ASSERT_LINE : CLEAR_LINE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = i8080_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i8080); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8080); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "8080"); break;
- default: i8085_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(i8085); break;
}
}
#endif
diff --git a/src/emu/cpu/i8085/i8085.h b/src/emu/cpu/i8085/i8085.h
index 0ced6706c47..4458f64df87 100644
--- a/src/emu/cpu/i8085/i8085.h
+++ b/src/emu/cpu/i8085/i8085.h
@@ -23,7 +23,7 @@ enum
#define I8085_RST65_LINE 2
#define I8085_RST75_LINE 3
-void i8085_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i8085 );
/**************************************************************************
* I8080 section
@@ -50,9 +50,9 @@ void i8085_get_info(UINT32 state, cpuinfo *info);
#define I8080_INTR_LINE I8085_INTR_LINE
-void i8080_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i8080 );
#endif
-offs_t i8085_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( i8085 );
#endif
diff --git a/src/emu/cpu/i86/i186intf.h b/src/emu/cpu/i86/i186intf.h
index 2597b7df59c..7bbf3f4e28d 100644
--- a/src/emu/cpu/i86/i186intf.h
+++ b/src/emu/cpu/i86/i186intf.h
@@ -5,6 +5,6 @@
#include "i86intf.h"
/* Public functions */
-void i80186_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i80186 );
#endif /* __I186INTF_H__ */
diff --git a/src/emu/cpu/i86/i188intf.h b/src/emu/cpu/i86/i188intf.h
index 5947b2bf5b8..73524c50b4f 100644
--- a/src/emu/cpu/i86/i188intf.h
+++ b/src/emu/cpu/i86/i188intf.h
@@ -6,6 +6,6 @@
#include "i186intf.h"
/* Public functions */
-void i80188_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i80188 );
#endif /* __I186INTF_H__ */
diff --git a/src/emu/cpu/i86/i286.c b/src/emu/cpu/i86/i286.c
index ec4b728cac3..c6a73558600 100644
--- a/src/emu/cpu/i86/i286.c
+++ b/src/emu/cpu/i86/i286.c
@@ -167,13 +167,13 @@ static CPU_RESET( i80286 )
/* ASG 971222 -- added these interface functions */
-static void i80286_get_context(void *dst)
+static CPU_GET_CONTEXT( i80286 )
{
if( dst )
*(i80286_Regs*)dst = I;
}
-static void i80286_set_context(void *src)
+static CPU_SET_CONTEXT( i80286 )
{
if( src )
{
@@ -244,7 +244,7 @@ static CPU_EXECUTE( i80286 )
extern int i386_dasm_one(char *buffer, UINT32 eip, const UINT8 *oprom, int mode);
-static offs_t i80286_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( i80286 )
{
return i386_dasm_one(buffer, pc, oprom, 16);
}
@@ -307,7 +307,7 @@ static CPU_INIT( i80286 )
* Generic set_info
**************************************************************************/
-static void i80286_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( i80286 )
{
switch (state)
{
@@ -378,7 +378,7 @@ static void i80286_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
****************************************************************************/
-void i80286_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i80286 )
{
switch (state)
{
@@ -438,15 +438,15 @@ void i80286_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + I80286_TR_LIMIT: info->i = I.tr.limit; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = i80286_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = i80286_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = i80286_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i80286); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(i80286); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(i80286); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80286); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i80286); break;
case CPUINFO_PTR_EXIT: info->exit = NULL; break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80286); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i80286_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80286); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i80286_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/i86/i286intf.h b/src/emu/cpu/i86/i286intf.h
index 7a6f25094b6..3237d8a0d91 100644
--- a/src/emu/cpu/i86/i286intf.h
+++ b/src/emu/cpu/i86/i286intf.h
@@ -43,6 +43,6 @@ enum
};
/* Public functions */
-void i80286_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i80286 );
#endif /* __I286INTF_H__ */
diff --git a/src/emu/cpu/i86/i86.c b/src/emu/cpu/i86/i86.c
index b44080f9a1b..6f37409756c 100644
--- a/src/emu/cpu/i86/i86.c
+++ b/src/emu/cpu/i86/i86.c
@@ -186,13 +186,13 @@ static CPU_EXIT( i8086 )
/* ASG 971222 -- added these interface functions */
-static void i8086_get_context(void *dst)
+static CPU_GET_CONTEXT( i8086 )
{
if (dst)
*(i8086_Regs *) dst = I;
}
-static void i8086_set_context(void *src)
+static CPU_SET_CONTEXT( i8086 )
{
if (src)
{
@@ -265,7 +265,7 @@ static CPU_EXECUTE( i8086 )
}
-static offs_t i8086_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( i8086 )
{
return i386_dasm_one(buffer, pc, oprom, 16);
}
@@ -325,7 +325,7 @@ static CPU_EXECUTE( i80186 )
* Generic set_info
**************************************************************************/
-static void i8086_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( i8086 )
{
switch (state)
{
@@ -379,7 +379,7 @@ static void i8086_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void i8086_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8086 )
{
switch (state)
{
@@ -432,15 +432,15 @@ void i8086_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + I8086_VECTOR: info->i = I.int_vector; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = i8086_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = i8086_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = i8086_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i8086); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(i8086); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(i8086); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8086); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i8086); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(i8086); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i8086); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i8086_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8086); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i8086_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -496,7 +496,7 @@ void i8086_get_info(UINT32 state, cpuinfo *info)
* CPU-specific get_info/set_info
**************************************************************************/
-void i8088_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8088 )
{
switch (state)
{
@@ -505,12 +505,12 @@ void i8088_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8088); break;
+ case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8088); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "8088"); break;
- default: i8086_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(i8086); break;
}
}
#endif
@@ -521,7 +521,7 @@ void i8088_get_info(UINT32 state, cpuinfo *info)
* CPU-specific get_info/set_info
**************************************************************************/
-void i80186_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i80186 )
{
switch (state)
{
@@ -530,12 +530,12 @@ void i80186_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80186); break;
+ case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80186);break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "80186"); break;
- default: i8086_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(i8086); break;
}
}
#endif
@@ -546,7 +546,7 @@ void i80186_get_info(UINT32 state, cpuinfo *info)
* CPU-specific get_info/set_info
**************************************************************************/
-void i80188_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i80188 )
{
switch (state)
{
@@ -555,13 +555,13 @@ void i80188_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8088); break;
- case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80186); break;
+ case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8088); break;
+ case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80186);break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "80188"); break;
- default: i8086_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(i8086); break;
}
}
#endif
diff --git a/src/emu/cpu/i86/i86intf.h b/src/emu/cpu/i86/i86intf.h
index 4fc194d2ec6..7a566bdfd25 100644
--- a/src/emu/cpu/i86/i86intf.h
+++ b/src/emu/cpu/i86/i86intf.h
@@ -27,6 +27,6 @@ enum
};
/* Public functions */
-void i8086_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i8086 );
#endif /* __I86INTF_H__ */
diff --git a/src/emu/cpu/i86/i88intf.h b/src/emu/cpu/i86/i88intf.h
index 71a76d83a46..38844c63792 100644
--- a/src/emu/cpu/i86/i88intf.h
+++ b/src/emu/cpu/i86/i88intf.h
@@ -6,6 +6,6 @@
#include "i86intf.h"
/* Public functions */
-void i8088_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i8088 );
#endif /* __I88INTF_H__ */
diff --git a/src/emu/cpu/i86/v20intf.h b/src/emu/cpu/i86/v20intf.h
index 0afd287d8c4..6c8a8714859 100644
--- a/src/emu/cpu/i86/v20intf.h
+++ b/src/emu/cpu/i86/v20intf.h
@@ -8,6 +8,6 @@
#include "v30intrf.h"
/* Public functions */
-void v20_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( v20 );
#endif /* __V20INTF_H__ */
diff --git a/src/emu/cpu/i86/v30intf.h b/src/emu/cpu/i86/v30intf.h
index 2355c36df0e..9b8310966f6 100644
--- a/src/emu/cpu/i86/v30intf.h
+++ b/src/emu/cpu/i86/v30intf.h
@@ -6,6 +6,6 @@
#include "i86intf.h"
/* Public functions */
-void v30_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( v30 );
#endif /* __V30INTF_H__ */
diff --git a/src/emu/cpu/i86/v33intf.h b/src/emu/cpu/i86/v33intf.h
index 50c4e501db4..8a0a66fb9c6 100644
--- a/src/emu/cpu/i86/v33intf.h
+++ b/src/emu/cpu/i86/v33intf.h
@@ -5,6 +5,6 @@
#include "v30intrf.h"
/* Public functions */
-void v33_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( v33 );
#endif /* __V33INTF_H__ */
diff --git a/src/emu/cpu/i8x41/8x41dasm.c b/src/emu/cpu/i8x41/8x41dasm.c
index d13a0750999..ccc3f3be13f 100644
--- a/src/emu/cpu/i8x41/8x41dasm.c
+++ b/src/emu/cpu/i8x41/8x41dasm.c
@@ -1,7 +1,7 @@
#include "debugger.h"
#include "i8x41.h"
-offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( i8x41 )
{
UINT32 flags = 0;
unsigned PC = pc;
@@ -12,16 +12,16 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
switch( op )
{
case 0x00: /* 1: 0000 0000 */
- sprintf(dst, "nop");
+ sprintf(buffer, "nop");
break;
case 0x01: /* 1: 0000 0001 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0x02: /* 1: 0000 0010 */
- sprintf(dst, "out dbb,a");
+ sprintf(buffer, "out dbb,a");
break;
case 0x03: /* 2: 0000 0011 */
- sprintf(dst, "add a,#$%02X", opram[PC++ - pc]);
+ sprintf(buffer, "add a,#$%02X", opram[PC++ - pc]);
break;
case 0x04: /* 2: aaa0 0100 */
case 0x24: /* 2: aaa0 0100 */
@@ -31,32 +31,32 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0xa4: /* 2: aaa0 0100 */
case 0xc4: /* 2: aaa0 0100 */
case 0xe4: /* 2: aaa0 0100 */
- sprintf(dst, "jmp $%04X", ((op<<3) & 0x700) | opram[PC++ - pc]);
+ sprintf(buffer, "jmp $%04X", ((op<<3) & 0x700) | opram[PC++ - pc]);
break;
case 0x05: /* 1: 0000 0101 */
- sprintf(dst, "en i");
+ sprintf(buffer, "en i");
break;
case 0x06: /* 1: 0000 0110 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0x07: /* 1: 0000 0111 */
- sprintf(dst, "dec a");
+ sprintf(buffer, "dec a");
break;
case 0x08: /* 2: 0000 10pp */
case 0x09: /* 2: 0000 10pp */
case 0x0a: /* 2: 0000 10pp */
case 0x0b: /* 2: 0000 10pp */
- sprintf(dst, "in a,p%d", op&3);
+ sprintf(buffer, "in a,p%d", op&3);
break;
case 0x0c: /* 2: 0000 11pp */
case 0x0d: /* 2: 0000 11pp */
case 0x0e: /* 2: 0000 11pp */
case 0x0f: /* 2: 0000 11pp */
- sprintf(dst, "movd a,p%d", op&3);
+ sprintf(buffer, "movd a,p%d", op&3);
break;
case 0x10: /* 1: 0001 000r */
case 0x11: /* 1: 0001 000r */
- sprintf(dst, "inc @r%d", op&1);
+ sprintf(buffer, "inc @r%d", op&1);
break;
case 0x12: /* 2: bbb1 0010 */
case 0x32: /* 2: bbb1 0010 */
@@ -67,10 +67,10 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0xd2: /* 2: bbb1 0010 */
case 0xf2: /* 2: bbb1 0010 */
arg = opram[PC++ - pc];
- sprintf(dst, "jb%d $%04X", op >> 5, (PC & 0x700) | arg);
+ sprintf(buffer, "jb%d $%04X", op >> 5, (PC & 0x700) | arg);
break;
case 0x13: /* 2: 0001 0011 */
- sprintf(dst, "addc $%02X", opram[PC++ - pc]);
+ sprintf(buffer, "addc $%02X", opram[PC++ - pc]);
break;
case 0x14: /* 2: aaa1 0100 */
case 0x34: /* 2: aaa1 0100 */
@@ -80,18 +80,18 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0xb4: /* 2: aaa1 0100 */
case 0xd4: /* 2: aaa1 0100 */
case 0xf4: /* 2: aaa1 0100 */
- sprintf(dst, "call $%04X", ((op<<3) & 0x700) | opram[PC++ - pc]);
+ sprintf(buffer, "call $%04X", ((op<<3) & 0x700) | opram[PC++ - pc]);
flags = DASMFLAG_STEP_OVER;
break;
case 0x15: /* 1: 0001 0101 */
- sprintf(dst, "dis i");
+ sprintf(buffer, "dis i");
break;
case 0x16: /* 2: 0001 0110 */
arg = opram[PC++ - pc];
- sprintf(dst, "jtf $%04X", (PC & 0x700) | arg);
+ sprintf(buffer, "jtf $%04X", (PC & 0x700) | arg);
break;
case 0x17: /* 1: 0001 0111 */
- sprintf(dst, "inc a");
+ sprintf(buffer, "inc a");
break;
case 0x18: /* 1: 0001 1rrr */
case 0x19: /* 1: 0001 1rrr */
@@ -101,27 +101,27 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0x1d: /* 1: 0001 1rrr */
case 0x1e: /* 1: 0001 1rrr */
case 0x1f: /* 1: 0001 1rrr */
- sprintf(dst, "inc r%d", op&7);
+ sprintf(buffer, "inc r%d", op&7);
break;
case 0x20: /* 1: 0010 000r */
case 0x21: /* 1: 0010 000r */
- sprintf(dst, "xch a,@r%d", op&1);
+ sprintf(buffer, "xch a,@r%d", op&1);
break;
case 0x22: /* 1: 0010 0010 */
- sprintf(dst, "in a,ddb");
+ sprintf(buffer, "in a,ddb");
break;
case 0x23: /* 2: 0010 0011 */
- sprintf(dst, "mov a,#$%02X", opram[PC++ - pc]);
+ sprintf(buffer, "mov a,#$%02X", opram[PC++ - pc]);
break;
case 0x25: /* 1: 0010 0101 */
- sprintf(dst, "en tcnti");
+ sprintf(buffer, "en tcnti");
break;
case 0x26: /* 2: 0010 0110 */
arg = opram[PC++ - pc];
- sprintf(dst, "jnt0 $%04X", (PC & 0x700) | arg);
+ sprintf(buffer, "jnt0 $%04X", (PC & 0x700) | arg);
break;
case 0x27: /* 1: 0010 0111 */
- sprintf(dst, "clr a");
+ sprintf(buffer, "clr a");
break;
case 0x28: /* 1: 0010 1rrr */
case 0x29: /* 1: 0010 1rrr */
@@ -131,56 +131,56 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0x2d: /* 1: 0010 1rrr */
case 0x2e: /* 1: 0010 1rrr */
case 0x2f: /* 1: 0010 1rrr */
- sprintf(dst, "xch a,r%d", op&7);
+ sprintf(buffer, "xch a,r%d", op&7);
break;
case 0x30: /* 1: 0011 000r */
case 0x31: /* 1: 0011 000r */
- sprintf(dst, "xchd a,@r%d", op&1);
+ sprintf(buffer, "xchd a,@r%d", op&1);
break;
case 0x33: /* 1: 0011 0101 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0x35: /* 1: 0000 0101 */
- sprintf(dst, "dis tcnti");
+ sprintf(buffer, "dis tcnti");
break;
case 0x36: /* 2: 0011 0110 */
arg = opram[PC++ - pc];
- sprintf(dst, "jt0 $%04X", (PC & 0x700) | arg);
+ sprintf(buffer, "jt0 $%04X", (PC & 0x700) | arg);
break;
case 0x37: /* 1: 0011 0111 */
- sprintf(dst, "cpl a");
+ sprintf(buffer, "cpl a");
break;
case 0x38: /* 2: 0011 10pp */
case 0x39: /* 2: 0011 10pp */
case 0x3a: /* 2: 0011 10pp */
case 0x3b: /* 2: 0011 10pp */
- sprintf(dst, "out p%d,a", op&3);
+ sprintf(buffer, "out p%d,a", op&3);
break;
case 0x3c: /* 2: 0011 11pp */
case 0x3d: /* 2: 0011 11pp */
case 0x3e: /* 2: 0011 11pp */
case 0x3f: /* 2: 0011 11pp */
- sprintf(dst, "movd p%d,a", op&7);
+ sprintf(buffer, "movd p%d,a", op&7);
break;
case 0x40: /* 1: 0100 000r */
case 0x41: /* 1: 0100 000r */
- sprintf(dst, "orl a,@r%d", op&1);
+ sprintf(buffer, "orl a,@r%d", op&1);
break;
case 0x42: /* 1: 0100 0010 */
- sprintf(dst, "mov a,t");
+ sprintf(buffer, "mov a,t");
break;
case 0x43: /* 2: 0100 0011 */
- sprintf(dst, "orl a,#$%02X", opram[PC++ - pc]);
+ sprintf(buffer, "orl a,#$%02X", opram[PC++ - pc]);
break;
case 0x45: /* 1: 0100 0101 */
- sprintf(dst, "strt cnt");
+ sprintf(buffer, "strt cnt");
break;
case 0x46: /* 2: 0100 0110 */
arg = opram[PC++ - pc];
- sprintf(dst, "jnt1 $%04X", (PC & 0x700) | arg);
+ sprintf(buffer, "jnt1 $%04X", (PC & 0x700) | arg);
break;
case 0x47: /* 1: 0100 0111 */
- sprintf(dst, "swap a");
+ sprintf(buffer, "swap a");
break;
case 0x48: /* 1: 0100 1rrr */
case 0x49: /* 1: 0100 1rrr */
@@ -190,24 +190,24 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0x4d: /* 1: 0100 1rrr */
case 0x4e: /* 1: 0100 1rrr */
case 0x4f: /* 1: 0100 1rrr */
- sprintf(dst, "orl a,r%d", op&7);
+ sprintf(buffer, "orl a,r%d", op&7);
break;
case 0x50: /* 1: 0101 000r */
case 0x51: /* 1: 0101 000r */
- sprintf(dst, "anl a,@r%d", op&1);
+ sprintf(buffer, "anl a,@r%d", op&1);
break;
case 0x53: /* 2: 0101 0011 */
- sprintf(dst, "anl a,#$%02X", opram[PC++ - pc]);
+ sprintf(buffer, "anl a,#$%02X", opram[PC++ - pc]);
break;
case 0x55: /* 1: 0101 0101 */
- sprintf(dst, "strt t");
+ sprintf(buffer, "strt t");
break;
case 0x56: /* 2: 0101 0110 */
arg = opram[PC++ - pc];
- sprintf(dst, "jt1 $%04X", (PC & 0x700) | arg);
+ sprintf(buffer, "jt1 $%04X", (PC & 0x700) | arg);
break;
case 0x57: /* 1: 0101 0111 */
- sprintf(dst, "da a");
+ sprintf(buffer, "da a");
break;
case 0x58: /* 1: 0101 1rrr */
case 0x59: /* 1: 0101 1rrr */
@@ -217,26 +217,26 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0x5d: /* 1: 0101 1rrr */
case 0x5e: /* 1: 0101 1rrr */
case 0x5f: /* 1: 0101 1rrr */
- sprintf(dst, "anl a,r%d", op&7);
+ sprintf(buffer, "anl a,r%d", op&7);
break;
case 0x60: /* 1: 0110 000r */
case 0x61: /* 1: 0110 000r */
- sprintf(dst, "add a,@r%d", op&1);
+ sprintf(buffer, "add a,@r%d", op&1);
break;
case 0x62: /* 1: 0110 0010 */
- sprintf(dst, "mov t,a");
+ sprintf(buffer, "mov t,a");
break;
case 0x63: /* 1: 0110 0011 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0x65: /* 1: 0110 0101 */
- sprintf(dst, "stop tcnt");
+ sprintf(buffer, "stop tcnt");
break;
case 0x66: /* 1: 0110 0110 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0x67: /* 1: 0110 0111 */
- sprintf(dst, "rrc a");
+ sprintf(buffer, "rrc a");
break;
case 0x68: /* 1: 0110 1rrr */
case 0x69: /* 1: 0110 1rrr */
@@ -246,24 +246,24 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0x6d: /* 1: 0110 1rrr */
case 0x6e: /* 1: 0110 1rrr */
case 0x6f: /* 1: 0110 1rrr */
- sprintf(dst, "add a,r%d", op&7);
+ sprintf(buffer, "add a,r%d", op&7);
break;
case 0x70: /* 1: 0111 000r */
case 0x71: /* 1: 0111 000r */
- sprintf(dst, "addc a,@r%d", op&1);
+ sprintf(buffer, "addc a,@r%d", op&1);
break;
case 0x73: /* 1: 0111 0011 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0x75: /* 1: 0111 0101 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0x76: /* 2: 0111 0110 */
arg = opram[PC++ - pc];
- sprintf(dst, "jf1 $%04X", (PC & 0x700) | arg);
+ sprintf(buffer, "jf1 $%04X", (PC & 0x700) | arg);
break;
case 0x77: /* 1: 0111 0111 */
- sprintf(dst, "rl a");
+ sprintf(buffer, "rl a");
break;
case 0x78: /* 1: 0111 1rrr */
case 0x79: /* 1: 0111 1rrr */
@@ -273,93 +273,93 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0x7d: /* 1: 0111 1rrr */
case 0x7e: /* 1: 0111 1rrr */
case 0x7f: /* 1: 0111 1rrr */
- sprintf(dst, "addc a,r%d", op&7);
+ sprintf(buffer, "addc a,r%d", op&7);
break;
case 0x80: /* 1: 1000 0000 */
- sprintf(dst, "ill ");
+ sprintf(buffer, "ill ");
break;
case 0x81: /* 1: 1000 0001 */
- sprintf(dst, "ill ");
+ sprintf(buffer, "ill ");
break;
case 0x82: /* 1: 1000 0010 */
- sprintf(dst, "ill ");
+ sprintf(buffer, "ill ");
break;
case 0x83: /* 2: 1000 0011 */
- sprintf(dst, "ret");
+ sprintf(buffer, "ret");
flags = DASMFLAG_STEP_OUT;
break;
case 0x85: /* 1: 1000 0101 */
- sprintf(dst, "clr f0");
+ sprintf(buffer, "clr f0");
break;
case 0x86: /* 2: 1000 0110 */
arg = opram[PC++ - pc];
- sprintf(dst, "jobf $%04X", (PC & 0x700) | arg);
+ sprintf(buffer, "jobf $%04X", (PC & 0x700) | arg);
break;
case 0x87: /* 1: 1000 0111 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0x88: /* 2: 1000 10pp */
case 0x89: /* 2: 1000 10pp */
case 0x8a: /* 2: 1000 10pp */
case 0x8b: /* 2: 1000 10pp */
- sprintf(dst, "orl p%d,#$%02X", op&3, opram[PC++ - pc]);
+ sprintf(buffer, "orl p%d,#$%02X", op&3, opram[PC++ - pc]);
break;
case 0x8c: /* 2: 1000 11pp */
case 0x8d: /* 2: 1000 11pp */
case 0x8e: /* 2: 1000 11pp */
case 0x8f: /* 2: 1000 11pp */
- sprintf(dst, "orld p%d,a", op&7);
+ sprintf(buffer, "orld p%d,a", op&7);
break;
case 0x90: /* 1: 1001 0000 */
- sprintf(dst, "mov sts,a");
+ sprintf(buffer, "mov sts,a");
break;
case 0x91: /* 1: 1001 0001 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0x93: /* 2: 1001 0011 */
- sprintf(dst, "retr");
+ sprintf(buffer, "retr");
flags = DASMFLAG_STEP_OVER;
break;
case 0x95: /* 1: 1001 0101 */
- sprintf(dst, "cpl f0");
+ sprintf(buffer, "cpl f0");
break;
case 0x96: /* 2: 1001 0110 */
arg = opram[PC++ - pc];
- sprintf(dst, "jnz $%04X", (PC & 0x700) | arg);
+ sprintf(buffer, "jnz $%04X", (PC & 0x700) | arg);
break;
case 0x97: /* 1: 1001 0111 */
- sprintf(dst, "clr c");
+ sprintf(buffer, "clr c");
break;
case 0x98: /* 2: 1001 10pp */
case 0x99: /* 2: 1001 10pp */
case 0x9a: /* 2: 1001 10pp */
case 0x9b: /* 2: 1001 10pp */
- sprintf(dst, "anl p%d,#$%02X", op&3, opram[PC++ - pc]);
+ sprintf(buffer, "anl p%d,#$%02X", op&3, opram[PC++ - pc]);
break;
case 0x9c: /* 2: 1001 11pp */
case 0x9d: /* 2: 1001 11pp */
case 0x9e: /* 2: 1001 11pp */
case 0x9f: /* 2: 1001 11pp */
- sprintf(dst, "anld p%d,a", op&7);
+ sprintf(buffer, "anld p%d,a", op&7);
break;
case 0xa0: /* 1: 1010 000r */
case 0xa1: /* 1: 1010 000r */
- sprintf(dst, "mov @r%d,a", op&1);
+ sprintf(buffer, "mov @r%d,a", op&1);
break;
case 0xa2: /* 1: 1010 0010 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0xa3: /* 2: 1010 0011 */
- sprintf(dst, "movp a,@a");
+ sprintf(buffer, "movp a,@a");
break;
case 0xa5: /* 1: 1010 0101 */
- sprintf(dst, "clr f1");
+ sprintf(buffer, "clr f1");
break;
case 0xa6: /* 1: 1010 0110 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0xa7: /* 1: 1010 0111 */
- sprintf(dst, "cpl c");
+ sprintf(buffer, "cpl c");
break;
case 0xa8: /* 1: 1010 1rrr */
case 0xa9: /* 1: 1010 1rrr */
@@ -369,24 +369,24 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0xad: /* 1: 1010 1rrr */
case 0xae: /* 1: 1010 1rrr */
case 0xaf: /* 1: 1010 1rrr */
- sprintf(dst, "mov r%d,a", op&7);
+ sprintf(buffer, "mov r%d,a", op&7);
break;
case 0xb0: /* 2: 1011 000r */
case 0xb1: /* 2: 1011 000r */
- sprintf(dst, "mov @r%d,#$%02X", op&1, opram[PC++ - pc]);
+ sprintf(buffer, "mov @r%d,#$%02X", op&1, opram[PC++ - pc]);
break;
case 0xb3: /* 2: 1011 0011 */
- sprintf(dst, "jmpp @a");
+ sprintf(buffer, "jmpp @a");
break;
case 0xb5: /* 1: 1011 0101 */
- sprintf(dst, "cpl f1");
+ sprintf(buffer, "cpl f1");
break;
case 0xb6: /* 2: 1011 0110 */
arg = opram[PC++ - pc];
- sprintf(dst, "jf0 $%04X", (PC & 0x700) | arg);
+ sprintf(buffer, "jf0 $%04X", (PC & 0x700) | arg);
break;
case 0xb7: /* 1: 1011 0111 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0xb8: /* 1: 1011 1rrr */
case 0xb9: /* 1: 1011 1rrr */
@@ -396,29 +396,29 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0xbd: /* 1: 1011 1rrr */
case 0xbe: /* 1: 1011 1rrr */
case 0xbf: /* 1: 1011 1rrr */
- sprintf(dst, "mov r%d,#$%02X", op&7, opram[PC++ - pc]);
+ sprintf(buffer, "mov r%d,#$%02X", op&7, opram[PC++ - pc]);
break;
case 0xc0: /* 1: 1100 0000 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0xc1: /* 1: 1100 0001 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0xc2: /* 1: 1100 0010 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0xc3: /* 1: 1100 0011 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0xc5: /* 1: 1100 0101 */
- sprintf(dst, "sel rb0");
+ sprintf(buffer, "sel rb0");
break;
case 0xc6: /* 2: 1100 0110 */
arg = opram[PC++ - pc];
- sprintf(dst, "jz $%04X", (PC & 0x700) | arg);
+ sprintf(buffer, "jz $%04X", (PC & 0x700) | arg);
break;
case 0xc7: /* 1: 1100 0111 */
- sprintf(dst, "mov a,psw");
+ sprintf(buffer, "mov a,psw");
break;
case 0xc8: /* 1: 1100 1rrr */
case 0xc9: /* 1: 1100 1rrr */
@@ -428,24 +428,24 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0xcd: /* 1: 1100 1rrr */
case 0xce: /* 1: 1100 1rrr */
case 0xcf: /* 1: 1100 1rrr */
- sprintf(dst, "dec r%d", op&7);
+ sprintf(buffer, "dec r%d", op&7);
break;
case 0xd0: /* 1: 1101 000r */
case 0xd1: /* 1: 1101 000r */
- sprintf(dst, "xrl a,@r%d", op&1);
+ sprintf(buffer, "xrl a,@r%d", op&1);
break;
case 0xd3: /* 1: 1101 0011 */
- sprintf(dst, "xrl a,#$%02X", opram[PC++ - pc]);
+ sprintf(buffer, "xrl a,#$%02X", opram[PC++ - pc]);
break;
case 0xd5: /* 1: 1101 0101 */
- sprintf(dst, "sel rb1");
+ sprintf(buffer, "sel rb1");
break;
case 0xd6: /* 2: 1101 0110 */
arg = opram[PC++ - pc];
- sprintf(dst, "jnibf $%04X", (PC & 0x700) | arg);
+ sprintf(buffer, "jnibf $%04X", (PC & 0x700) | arg);
break;
case 0xd7: /* 1: 1101 0111 */
- sprintf(dst, "mov psw,a");
+ sprintf(buffer, "mov psw,a");
break;
case 0xd8: /* 1: 1101 1rrr */
case 0xd9: /* 1: 1101 1rrr */
@@ -455,29 +455,29 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0xdd: /* 1: 1101 1rrr */
case 0xde: /* 1: 1101 1rrr */
case 0xdf: /* 1: 1101 1rrr */
- sprintf(dst, "xrl a,r%d", op&7);
+ sprintf(buffer, "xrl a,r%d", op&7);
break;
case 0xe0: /* 1: 1110 0000 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0xe1: /* 1: 1110 0001 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0xe2: /* 1: 1110 0010 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0xe3: /* 2: 1110 0011 */
- sprintf(dst, "movp3 a,@a");
+ sprintf(buffer, "movp3 a,@a");
break;
case 0xe5: /* 1: 1110 0101 */
- sprintf(dst, "en dma");
+ sprintf(buffer, "en dma");
break;
case 0xe6: /* 2: 1110 0110 */
arg = opram[PC++ - pc];
- sprintf(dst, "jnc $%04X", (PC & 0x700) | arg);
+ sprintf(buffer, "jnc $%04X", (PC & 0x700) | arg);
break;
case 0xe7: /* 1: 1110 0111 */
- sprintf(dst, "rl a");
+ sprintf(buffer, "rl a");
break;
case 0xe8: /* 2: 1110 1rrr */
case 0xe9: /* 2: 1110 1rrr */
@@ -488,25 +488,25 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0xee: /* 2: 1110 1rrr */
case 0xef: /* 2: 1110 1rrr */
arg = opram[PC++ - pc];
- sprintf(dst, "djnz r%d,$%04X", op&7, (PC & 0x700) | arg);
+ sprintf(buffer, "djnz r%d,$%04X", op&7, (PC & 0x700) | arg);
flags = DASMFLAG_STEP_OVER;
break;
case 0xf0: /* 1: 1111 000r */
case 0xf1: /* 1: 1111 000r */
- sprintf(dst, "mov a,@r%d", op&1);
+ sprintf(buffer, "mov a,@r%d", op&1);
break;
case 0xf3: /* 1: 1111 0011 */
- sprintf(dst, "ill");
+ sprintf(buffer, "ill");
break;
case 0xf5: /* 1: 1111 0101 */
- sprintf(dst, "en flags");
+ sprintf(buffer, "en flags");
break;
case 0xf6: /* 2: 1111 0110 */
arg = opram[PC++ - pc];
- sprintf(dst, "jc $%04X", (PC & 0x700) | arg);
+ sprintf(buffer, "jc $%04X", (PC & 0x700) | arg);
break;
case 0xf7: /* 1: 1111 0111 */
- sprintf(dst, "rlc a");
+ sprintf(buffer, "rlc a");
break;
case 0xf8: /* 1: 1111 1rrr */
case 0xf9: /* 1: 1111 1rrr */
@@ -516,7 +516,7 @@ offs_t i8x41_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
case 0xfd: /* 1: 1111 1rrr */
case 0xfe: /* 1: 1111 1rrr */
case 0xff: /* 1: 1111 1rrr */
- sprintf(dst, "mov a,r%d", op&7);
+ sprintf(buffer, "mov a,r%d", op&7);
break;
}
return (PC - pc) | flags | DASMFLAG_SUPPORTED;
diff --git a/src/emu/cpu/i8x41/i8x41.c b/src/emu/cpu/i8x41/i8x41.c
index 6334b262bc5..ff000b69cd9 100644
--- a/src/emu/cpu/i8x41/i8x41.c
+++ b/src/emu/cpu/i8x41/i8x41.c
@@ -2045,7 +2045,7 @@ static CPU_EXECUTE( i8x41 )
* Get all registers in given buffer
****************************************************************************/
-static void i8x41_get_context(void *dst)
+static CPU_GET_CONTEXT( i8x41 )
{
if( dst )
memcpy(dst, &i8x41, sizeof(I8X41));
@@ -2056,7 +2056,7 @@ static void i8x41_get_context(void *dst)
* Set all registers to given values
****************************************************************************/
-static void i8x41_set_context(void *src)
+static CPU_SET_CONTEXT( i8x41 )
{
if( src )
memcpy(&i8x41, src, sizeof(I8X41));
@@ -2117,7 +2117,7 @@ static void set_irq_line(int irqline, int state)
* Generic set_info
**************************************************************************/
-static void i8x41_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( i8x41 )
{
switch (state)
{
@@ -2207,7 +2207,7 @@ static void i8x41_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void i8x41_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8x41 )
{
switch (state)
{
@@ -2280,15 +2280,15 @@ void i8x41_get_info(UINT32 state, cpuinfo *info)
break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = i8x41_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = i8x41_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = i8x41_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i8x41); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(i8x41); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(i8x41); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8x41); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i8x41); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(i8x41); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i8x41); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i8x41_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8x41); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i8x41_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/i8x41/i8x41.h b/src/emu/cpu/i8x41/i8x41.h
index cfefeb40c3e..9bda5084748 100644
--- a/src/emu/cpu/i8x41/i8x41.h
+++ b/src/emu/cpu/i8x41/i8x41.h
@@ -96,8 +96,8 @@ enum
* Public Functions
*/
-extern void i8x41_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( i8x41 );
-extern offs_t i8x41_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( i8x41 );
#endif /* __I8X41_H__ */
diff --git a/src/emu/cpu/i960/i960.c b/src/emu/cpu/i960/i960.c
index 3fd80b11606..d4c8421593f 100644
--- a/src/emu/cpu/i960/i960.c
+++ b/src/emu/cpu/i960/i960.c
@@ -1964,14 +1964,14 @@ static CPU_EXECUTE( i960 )
return cycles - i960_icount;
}
-static void i960_get_context(void *context)
+static CPU_GET_CONTEXT( i960 )
{
- *(i960_state *)context = i960;
+ *(i960_state *)dst = i960;
}
-static void i960_set_context(void *context)
+static CPU_SET_CONTEXT( i960 )
{
- i960 = *(i960_state *)context;
+ i960 = *(i960_state *)src;
}
static void set_irq_line(int irqline, int state)
@@ -2042,7 +2042,7 @@ static void set_irq_line(int irqline, int state)
}
}
-static void i960_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( i960 )
{
if(state >= CPUINFO_INT_REGISTER+I960_R0 && state <= CPUINFO_INT_REGISTER + I960_G15) {
i960.r[state - (CPUINFO_INT_REGISTER + I960_R0)] = info->i;
@@ -2080,7 +2080,7 @@ static CPU_INIT( i960 )
state_save_register_item_array("i960", index, i960.rcache_frame_addr);
}
-static offs_t i960_disasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( i960 )
{
disassemble_t dis;
@@ -2112,7 +2112,7 @@ static CPU_RESET( i960 )
i960.rcache_pos = 0;
}
-void i960_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i960 )
{
if(state >= CPUINFO_INT_REGISTER+I960_R0 && state <= CPUINFO_INT_REGISTER + I960_G15) {
info->i = i960.r[state - (CPUINFO_INT_REGISTER + I960_R0)];
@@ -2121,15 +2121,15 @@ void i960_get_info(UINT32 state, cpuinfo *info)
switch(state) {
// Interface functions and variables
- case CPUINFO_PTR_SET_INFO: info->setinfo = i960_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = i960_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = i960_set_context; break;
- case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i960); break;
- case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i960); break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i960); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(i960); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(i960); break;
+ case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i960); break;
+ case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(i960); break;
case CPUINFO_PTR_EXIT: info->exit = 0; break;
- case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i960); break;
+ case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(i960); break;
case CPUINFO_PTR_BURN: info->burn = 0; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i960_disasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i960); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i960_icount; break;
case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i960_state); break;
case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
diff --git a/src/emu/cpu/i960/i960.h b/src/emu/cpu/i960/i960.h
index 25501eb4d9a..46a2f6930d0 100644
--- a/src/emu/cpu/i960/i960.h
+++ b/src/emu/cpu/i960/i960.h
@@ -61,7 +61,7 @@ enum
I960_IRQ3 = 3
};
-void i960_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i960 );
void i960_noburst(void);
void i960_stall(void);
diff --git a/src/emu/cpu/jaguar/jaguar.c b/src/emu/cpu/jaguar/jaguar.c
index 30bd2a547cb..135381ce77e 100644
--- a/src/emu/cpu/jaguar/jaguar.c
+++ b/src/emu/cpu/jaguar/jaguar.c
@@ -353,7 +353,7 @@ static void set_irq_line(int irqline, int state)
CONTEXT SWITCHING
***************************************************************************/
-static void jaguar_get_context(void *dst)
+static CPU_GET_CONTEXT( jaguar )
{
/* copy the context */
if (dst)
@@ -361,7 +361,7 @@ static void jaguar_get_context(void *dst)
}
-static void jaguar_set_context(void *src)
+static CPU_SET_CONTEXT( jaguar )
{
/* copy the context */
if (src)
@@ -599,13 +599,13 @@ static CPU_EXECUTE( jaguardsp )
DISASSEMBLY HOOK
***************************************************************************/
-static offs_t jaguargpu_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( jaguargpu )
{
extern unsigned dasmjag(int, char *, unsigned, const UINT8 *);
return dasmjag(JAGUAR_VARIANT_GPU, buffer, pc, oprom);
}
-static offs_t jaguardsp_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( jaguardsp )
{
extern unsigned dasmjag(int, char *, unsigned, const UINT8 *);
return dasmjag(JAGUAR_VARIANT_DSP, buffer, pc, oprom);
@@ -1515,7 +1515,7 @@ void jaguardsp_ctrl_w(int cpunum, offs_t offset, UINT32 data, UINT32 mem_mask)
* Generic set_info
**************************************************************************/
-static void jaguargpu_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( jaguargpu )
{
switch (state)
{
@@ -1572,7 +1572,7 @@ static void jaguargpu_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void jaguargpu_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( jaguargpu )
{
switch (state)
{
@@ -1645,15 +1645,15 @@ void jaguargpu_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_SP: info->i = jaguar.b0[31]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = jaguargpu_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = jaguar_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = jaguar_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(jaguargpu); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(jaguar); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(jaguar); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(jaguargpu); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(jaguargpu); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(jaguar); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(jaguargpu); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = jaguargpu_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(jaguargpu); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &jaguar_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -1718,7 +1718,7 @@ void jaguargpu_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-static void jaguardsp_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( jaguardsp )
{
switch (state)
{
@@ -1728,12 +1728,12 @@ static void jaguardsp_set_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are set as pointers to data or functions --- */
default:
- jaguargpu_set_info(state, info);
+ CPU_SET_INFO_CALL(jaguargpu);
break;
}
}
-void jaguardsp_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( jaguardsp )
{
switch (state)
{
@@ -1742,17 +1742,17 @@ void jaguardsp_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ5: info->i = (jaguar.ctrl[G_CTRL] & 0x10000) ? ASSERT_LINE : CLEAR_LINE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = jaguardsp_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(jaguardsp); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(jaguardsp); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(jaguardsp); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(jaguardsp); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = jaguardsp_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(jaguardsp); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "Jaguar DSP"); break;
default:
- jaguargpu_get_info(state, info);
+ CPU_GET_INFO_CALL(jaguargpu);
break;
}
}
diff --git a/src/emu/cpu/jaguar/jaguar.h b/src/emu/cpu/jaguar/jaguar.h
index ba4c60c1d56..0c518199964 100644
--- a/src/emu/cpu/jaguar/jaguar.h
+++ b/src/emu/cpu/jaguar/jaguar.h
@@ -98,11 +98,11 @@ struct _jaguar_cpu_core
PUBLIC FUNCTIONS
***************************************************************************/
-extern void jaguargpu_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( jaguargpu );
extern void jaguargpu_ctrl_w(int cpunum, offs_t offset, UINT32 data, UINT32 mem_mask);
extern UINT32 jaguargpu_ctrl_r(int cpunum, offs_t offset);
-extern void jaguardsp_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( jaguardsp );
extern void jaguardsp_ctrl_w(int cpunum, offs_t offset, UINT32 data, UINT32 mem_mask);
extern UINT32 jaguardsp_ctrl_r(int cpunum, offs_t offset);
diff --git a/src/emu/cpu/konami/knmidasm.c b/src/emu/cpu/konami/knmidasm.c
index 6d42110ae84..14672795924 100644
--- a/src/emu/cpu/konami/knmidasm.c
+++ b/src/emu/cpu/konami/knmidasm.c
@@ -1859,7 +1859,7 @@ static const konami_opcode_def op_table[256] = {
/* ff */ { illegal, 0 }
};
-offs_t konami_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( konami )
{
buffer[0] = '\0';
diff --git a/src/emu/cpu/konami/konami.c b/src/emu/cpu/konami/konami.c
index 0cfc44946cc..c2683ad9a4f 100644
--- a/src/emu/cpu/konami/konami.c
+++ b/src/emu/cpu/konami/konami.c
@@ -368,7 +368,7 @@ INLINE void WM16( UINT32 Addr, PAIR *p )
/****************************************************************************
* Get all registers in given buffer
****************************************************************************/
-static void konami_get_context(void *dst)
+static CPU_GET_CONTEXT( konami )
{
if( dst )
*(konami_Regs*)dst = konami;
@@ -377,7 +377,7 @@ static void konami_get_context(void *dst)
/****************************************************************************
* Set all registers to given values
****************************************************************************/
-static void konami_set_context(void *src)
+static CPU_SET_CONTEXT( konami )
{
if( src )
konami = *(konami_Regs*)src;
@@ -522,7 +522,7 @@ static CPU_EXECUTE( konami )
* Generic set_info
**************************************************************************/
-static void konami_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( konami )
{
switch (state)
{
@@ -554,7 +554,7 @@ static void konami_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void konami_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( konami )
{
switch (state)
{
@@ -599,15 +599,15 @@ void konami_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + KONAMI_DP: info->i = DP; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = konami_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = konami_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = konami_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(konami); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(konami); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(konami); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(konami); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(konami); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(konami); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(konami); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = konami_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(konami); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &konami_ICount; break;
case CPUINFO_PTR_KONAMI_SETLINES_CALLBACK: info->f = (genf *)konami.setlines_callback; break;
diff --git a/src/emu/cpu/konami/konami.h b/src/emu/cpu/konami/konami.h
index 571518e7255..71637e16201 100644
--- a/src/emu/cpu/konami/konami.h
+++ b/src/emu/cpu/konami/konami.h
@@ -22,7 +22,7 @@ enum
#define KONAMI_FIRQ_LINE 1 /* FIRQ line number */
/* PUBLIC FUNCTIONS */
-void konami_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( konami );
/****************************************************************************/
/* Read a byte from given memory location */
@@ -55,6 +55,6 @@ void konami_get_info(UINT32 state, cpuinfo *info);
# define TRUE (!FALSE)
#endif
-offs_t konami_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( konami );
#endif /* __KONAMI_H__ */
diff --git a/src/emu/cpu/lh5801/5801dasm.c b/src/emu/cpu/lh5801/5801dasm.c
index 2216b801cef..63112920184 100644
--- a/src/emu/cpu/lh5801/5801dasm.c
+++ b/src/emu/cpu/lh5801/5801dasm.c
@@ -650,7 +650,7 @@ static const Entry table_fd[0x100]={
{ ILL2 }
};
-offs_t lh5801_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( lh5801 )
{
int pos = 0;
int oper;
@@ -667,67 +667,67 @@ offs_t lh5801_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
}
switch (entry->ins) {
case ILL:
- sprintf(dst,"%s %.2x", InsNames[entry->ins], oper);break;
+ sprintf(buffer,"%s %.2x", InsNames[entry->ins], oper);break;
case ILL2:
- sprintf(dst,"%s fd%.2x", InsNames[entry->ins], oper);break;
+ sprintf(buffer,"%s fd%.2x", InsNames[entry->ins], oper);break;
default:
switch(entry->adr) {
case Imp:
- sprintf(dst,"%s", InsNames[entry->ins]);break;
+ sprintf(buffer,"%s", InsNames[entry->ins]);break;
case Reg:
- sprintf(dst,"%s %s", InsNames[entry->ins],RegNames[entry->reg]);break;
+ sprintf(buffer,"%s %s", InsNames[entry->ins],RegNames[entry->reg]);break;
case RegImm:
- sprintf(dst,"%s %s,%.2x", InsNames[entry->ins],
+ sprintf(buffer,"%s %s,%.2x", InsNames[entry->ins],
RegNames[entry->reg], oprom[pos++]);
break;
case RegImm16:
absolut=oprom[pos++]<<8;
absolut|=oprom[pos++];
- sprintf(dst,"%s %s,%.4x", InsNames[entry->ins],RegNames[entry->reg],absolut );
+ sprintf(buffer,"%s %s,%.4x", InsNames[entry->ins],RegNames[entry->reg],absolut );
break;
case Vec:
- sprintf(dst,"%s (ff%.2x)", InsNames[entry->ins],oprom[pos++]);break;
+ sprintf(buffer,"%s (ff%.2x)", InsNames[entry->ins],oprom[pos++]);break;
case Vej:
- sprintf(dst,"%s (ff%.2x)", InsNames[entry->ins], oper);break;
+ sprintf(buffer,"%s (ff%.2x)", InsNames[entry->ins], oper);break;
case Imm:
- sprintf(dst,"%s %.2x", InsNames[entry->ins],oprom[pos++]);break;
+ sprintf(buffer,"%s %.2x", InsNames[entry->ins],oprom[pos++]);break;
case Imm16:
absolut=oprom[pos++]<<8;
absolut|=oprom[pos++];
- sprintf(dst,"%s %.4x", InsNames[entry->ins],absolut );break;
+ sprintf(buffer,"%s %.4x", InsNames[entry->ins],absolut );break;
case RelP:
temp=oprom[pos++];
- sprintf(dst,"%s %.4x", InsNames[entry->ins],pc+pos+temp );break;
+ sprintf(buffer,"%s %.4x", InsNames[entry->ins],pc+pos+temp );break;
case RelM:
temp=oprom[pos++];
- sprintf(dst,"%s %.4x", InsNames[entry->ins],pc+pos-temp );break;
+ sprintf(buffer,"%s %.4x", InsNames[entry->ins],pc+pos-temp );break;
case Abs:
absolut=oprom[pos++]<<8;
absolut|=oprom[pos++];
- sprintf(dst,"%s (%.4x)", InsNames[entry->ins],absolut );break;
+ sprintf(buffer,"%s (%.4x)", InsNames[entry->ins],absolut );break;
case ME1Abs:
absolut=oprom[pos++]<<8;
absolut|=oprom[pos++];
- sprintf(dst,"%s #(%.4x)", InsNames[entry->ins],absolut );break;
+ sprintf(buffer,"%s #(%.4x)", InsNames[entry->ins],absolut );break;
case AbsImm:
absolut=oprom[pos++]<<8;
absolut|=oprom[pos++];
- sprintf(dst,"%s (%.4x),%.2x", InsNames[entry->ins],absolut,
+ sprintf(buffer,"%s (%.4x),%.2x", InsNames[entry->ins],absolut,
oprom[pos++]);break;
case ME1AbsImm:
absolut=oprom[pos++]<<8;
absolut|=oprom[pos++];
- sprintf(dst,"%s #(%.4x),%.2x", InsNames[entry->ins],absolut,
+ sprintf(buffer,"%s #(%.4x),%.2x", InsNames[entry->ins],absolut,
oprom[pos++]);break;
case ME0:
- sprintf(dst,"%s (%s)", InsNames[entry->ins],RegNames[entry->reg] );break;
+ sprintf(buffer,"%s (%s)", InsNames[entry->ins],RegNames[entry->reg] );break;
case ME0Imm:
- sprintf(dst,"%s (%s),%.2x", InsNames[entry->ins],RegNames[entry->reg],oprom[pos++] );
+ sprintf(buffer,"%s (%s),%.2x", InsNames[entry->ins],RegNames[entry->reg],oprom[pos++] );
break;
case ME1:
- sprintf(dst,"%s #(%s)", InsNames[entry->ins],RegNames[entry->reg] );break;
+ sprintf(buffer,"%s #(%s)", InsNames[entry->ins],RegNames[entry->reg] );break;
case ME1Imm:
- sprintf(dst,"%s #(%s),%.2x", InsNames[entry->ins],RegNames[entry->reg],oprom[pos++] );
+ sprintf(buffer,"%s #(%s),%.2x", InsNames[entry->ins],RegNames[entry->reg],oprom[pos++] );
break;
}
}
diff --git a/src/emu/cpu/lh5801/lh5801.c b/src/emu/cpu/lh5801/lh5801.c
index a5c355dbd63..b4f377573c9 100644
--- a/src/emu/cpu/lh5801/lh5801.c
+++ b/src/emu/cpu/lh5801/lh5801.c
@@ -105,13 +105,13 @@ static CPU_RESET( lh5801 )
lh5801.idle=0;
}
-static void lh5801_get_context (void *dst)
+static CPU_GET_CONTEXT( lh5801 )
{
if( dst )
*(LH5801_Regs*)dst = lh5801;
}
-static void lh5801_set_context (void *src)
+static CPU_SET_CONTEXT( lh5801 )
{
if( src )
{
@@ -153,7 +153,7 @@ static void set_irq_line(int irqline, int state)
* Generic set_info
**************************************************************************/
-static void lh5801_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( lh5801 )
{
switch (state)
{
@@ -182,7 +182,7 @@ static void lh5801_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void lh5801_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( lh5801 )
{
switch (state)
{
@@ -228,15 +228,15 @@ void lh5801_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + LH5801_DP: info->i = lh5801.dp; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = lh5801_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = lh5801_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = lh5801_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(lh5801); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(lh5801); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(lh5801); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(lh5801); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(lh5801); break;
case CPUINFO_PTR_EXIT: info->exit = NULL; break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(lh5801); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = lh5801_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(lh5801); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &lh5801_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/lh5801/lh5801.h b/src/emu/cpu/lh5801/lh5801.h
index 1eddc2c6ac9..3beacbc0fb2 100644
--- a/src/emu/cpu/lh5801/lh5801.h
+++ b/src/emu/cpu/lh5801/lh5801.h
@@ -75,7 +75,7 @@ struct _lh5801_cpu_core
#define LH5801_INT_NONE 0
#define LH5801_IRQ 1
-void lh5801_get_info(UINT32 state, cpuinfo *info);
-extern offs_t lh5801_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_GET_INFO( lh5801 );
+extern CPU_DISASSEMBLE( lh5801 );
#endif /* __LH5801_H__ */
diff --git a/src/emu/cpu/lr35902/lr35902.c b/src/emu/cpu/lr35902/lr35902.c
index 6b4ef9cbaca..f891c535455 100644
--- a/src/emu/cpu/lr35902/lr35902.c
+++ b/src/emu/cpu/lr35902/lr35902.c
@@ -328,7 +328,7 @@ static CPU_EXECUTE( lr35902 )
return cycles - lr35902_ICount;
}
-static void lr35902_burn(int cycles)
+static CPU_BURN( lr35902 )
{
if( cycles > 0 )
{
@@ -341,7 +341,7 @@ static void lr35902_burn(int cycles)
/****************************************************************************/
/* Set all registers to given values */
/****************************************************************************/
-static void lr35902_set_context (void *src)
+static CPU_SET_CONTEXT( lr35902 )
{
if( src )
Regs = *(lr35902_regs *)src;
@@ -351,7 +351,7 @@ static void lr35902_set_context (void *src)
/****************************************************************************/
/* Get all registers in given buffer */
/****************************************************************************/
-static void lr35902_get_context (void *dst)
+static CPU_GET_CONTEXT( lr35902 )
{
if( dst )
*(lr35902_regs *)dst = Regs;
@@ -389,7 +389,7 @@ static void lr35902_clear_pending_interrupts (void)
}
#endif
-static void lr35902_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( lr35902 )
{
switch (state)
{
@@ -415,7 +415,7 @@ static void lr35902_set_info(UINT32 state, cpuinfo *info)
}
}
-void lr35902_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( lr35902 )
{
switch (state)
{
@@ -462,14 +462,14 @@ void lr35902_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + LR35902_SPEED: info->i = 0x7E | ( ( Regs.w.gb_speed - 1 ) << 7 ) | Regs.w.gb_speed_change_pending; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = lr35902_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = lr35902_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = lr35902_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(lr35902); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(lr35902); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(lr35902); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(lr35902); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(lr35902); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(lr35902); break;
- case CPUINFO_PTR_BURN: info->burn = lr35902_burn; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = lr35902_dasm; break;
+ case CPUINFO_PTR_BURN: info->burn = CPU_BURN_NAME(lr35902); break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(lr35902); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &lr35902_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/lr35902/lr35902.h b/src/emu/cpu/lr35902/lr35902.h
index dd7ae9fe75d..ae35f59f0c6 100644
--- a/src/emu/cpu/lr35902/lr35902.h
+++ b/src/emu/cpu/lr35902/lr35902.h
@@ -28,8 +28,8 @@ enum
/****************************************************************************/
/* Return register contents */
/****************************************************************************/
-extern void lr35902_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( lr35902 );
-extern unsigned lr35902_dasm( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram );
+extern CPU_DISASSEMBLE( lr35902 );
#endif /* __LR35902_H__ */
diff --git a/src/emu/cpu/lr35902/lr35902d.c b/src/emu/cpu/lr35902/lr35902d.c
index e62e466084a..aac11e2aa38 100644
--- a/src/emu/cpu/lr35902/lr35902d.c
+++ b/src/emu/cpu/lr35902/lr35902d.c
@@ -201,7 +201,7 @@ static const lr35902dasm mnemonic_main[256]= {
* Disassemble opcode at PC and return number of bytes it takes
****************************************************************************/
-unsigned lr35902_dasm( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram )
+CPU_DISASSEMBLE( lr35902 )
{
const lr35902dasm *d;
const char *symbol, *src;
diff --git a/src/emu/cpu/m37710/m37710.c b/src/emu/cpu/m37710/m37710.c
index 89eda3a23dc..64c823a0ee1 100644
--- a/src/emu/cpu/m37710/m37710.c
+++ b/src/emu/cpu/m37710/m37710.c
@@ -881,15 +881,15 @@ static CPU_EXECUTE( m37710 )
/* Get the current CPU context */
-static void m37710_get_context(void *dst_context)
+static CPU_GET_CONTEXT( m37710 )
{
- *(m37710i_cpu_struct*)dst_context = m37710i_cpu;
+ *(m37710i_cpu_struct*)dst = m37710i_cpu;
}
/* Set the current CPU context */
-static void m37710_set_context(void *src_context)
+static CPU_SET_CONTEXT( m37710 )
{
- m37710i_cpu = *(m37710i_cpu_struct*)src_context;
+ m37710i_cpu = *(m37710i_cpu_struct*)src;
m37710i_jumping(REG_PB | REG_PC);
}
@@ -959,7 +959,7 @@ void m37710_set_irq_callback(cpu_irq_callback callback)
/* Disassemble an instruction */
#include "m7700ds.h"
-static offs_t m37710_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( m37710 )
{
return m7700_disassemble(buffer, (pc&0xffff), pc>>16, oprom, FLAG_M, FLAG_X);
}
@@ -1047,7 +1047,7 @@ static CPU_INIT( m37710 )
* Generic set_info
**************************************************************************/
-static void m37710_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m37710 )
{
switch (state)
{
@@ -1094,7 +1094,7 @@ ADDRESS_MAP_END
* Generic get_info
**************************************************************************/
-void m37710_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m37710 )
{
switch (state)
{
@@ -1144,15 +1144,15 @@ void m37710_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + M37710_IRQ_STATE: info->i = m37710_get_reg(M37710_IRQ_STATE); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m37710_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m37710_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m37710_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m37710); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(m37710); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(m37710); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m37710); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m37710); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m37710); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m37710); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m37710_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m37710); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m37710_ICount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_m37710_internal_map; break;
@@ -1202,7 +1202,7 @@ void m37710_get_info(UINT32 state, cpuinfo *info)
}
// 37702 is identical except with an internal ROM, so just change the name
-void m37702_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m37702 )
{
if (state == CPUINFO_STR_NAME)
{
@@ -1210,7 +1210,7 @@ void m37702_get_info(UINT32 state, cpuinfo *info)
return;
}
- m37710_get_info(state, info);
+ CPU_GET_INFO_CALL(m37710);
}
/* ======================================================================== */
diff --git a/src/emu/cpu/m37710/m37710.h b/src/emu/cpu/m37710/m37710.h
index cf8c39f512d..8d7a34b3b74 100644
--- a/src/emu/cpu/m37710/m37710.h
+++ b/src/emu/cpu/m37710/m37710.h
@@ -116,7 +116,7 @@ void m37710_state_load(void *file);
#define m37710_branching(A)
-void m37710_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( m37710 );
/* ======================================================================== */
/* ============================== END OF FILE ============================= */
diff --git a/src/emu/cpu/m6502/6502dasm.c b/src/emu/cpu/m6502/6502dasm.c
index d324894d641..3c000ac91dc 100644
--- a/src/emu/cpu/m6502/6502dasm.c
+++ b/src/emu/cpu/m6502/6502dasm.c
@@ -742,48 +742,48 @@ static unsigned internal_m6502_dasm(const struct op6502_info *opinfo, char *buff
return (pc - PC) | flags;
}
-unsigned m6502_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( m6502 )
{
return internal_m6502_dasm(op6502, buffer, pc, oprom, opram);
}
#if (HAS_M65SC02)
-unsigned m65sc02_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( m65sc02 )
{
return internal_m6502_dasm(op65sc02, buffer, pc, oprom, opram);
}
#endif
#if (HAS_M65C02||HAS_M65SC02||HAS_DECO16)
-unsigned m65c02_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( m65c02 )
{
return internal_m6502_dasm(op65c02, buffer, pc, oprom, opram);
}
#endif
#if (HAS_M65CE02)
-unsigned m65ce02_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( m65ce02 )
{
return internal_m6502_dasm(op65ce02, buffer, pc, oprom, opram);
}
#endif
#if (HAS_M6510)
-unsigned m6510_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( m6510 )
{
return internal_m6502_dasm(op6502, buffer, pc, oprom, opram);
}
#endif
#if (HAS_DECO16)
-unsigned deco16_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( deco16 )
{
return internal_m6502_dasm(opdeco16, buffer, pc, oprom, opram);
}
#endif
#if (HAS_M4510)
-unsigned m4510_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( m4510 )
{
return internal_m6502_dasm(op4510, buffer, pc, oprom, opram);
}
diff --git a/src/emu/cpu/m6502/m4510.c b/src/emu/cpu/m6502/m4510.c
index 83563f25b78..ab733fd5092 100644
--- a/src/emu/cpu/m6502/m4510.c
+++ b/src/emu/cpu/m6502/m4510.c
@@ -237,11 +237,11 @@ static CPU_EXIT( m4510 )
/* nothing to do yet */
}
-static void m4510_get_context (void *dst)
+static CPU_GET_CONTEXT( m4510 )
{
}
-static void m4510_set_context (void *src)
+static CPU_SET_CONTEXT( m4510 )
{
m4510_Regs *m4510;
if( src )
@@ -397,12 +397,12 @@ static ADDRESS_MAP_START(m4510_mem, ADDRESS_SPACE_PROGRAM, 8)
AM_RANGE(0x0000, 0x0001) AM_READWRITE(m4510_read_0000, m4510_write_0000)
ADDRESS_MAP_END
-static int m4510_translate(int space, int intention, offs_t *addr)
+static CPU_TRANSLATE( m4510 )
{
m4510_Regs *m4510 = token;
if (space == ADDRESS_SPACE_PROGRAM)
- *addr = M4510_MEM(*addr);
+ *address = M4510_MEM(*address);
return TRUE;
}
@@ -410,7 +410,7 @@ static int m4510_translate(int space, int intention, offs_t *addr)
* Generic set_info
**************************************************************************/
-static void m4510_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m4510 )
{
m4510_Regs *m4510 = token;
@@ -457,7 +457,7 @@ static void m4510_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void m4510_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m4510 )
{
m4510_Regs *m4510 = token;
@@ -517,18 +517,18 @@ void m4510_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_M6510_PORT: info->i = m4510_get_port(m4510); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m4510_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m4510_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m4510_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m4510); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(m4510); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(m4510); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m4510); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m4510); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m4510); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m4510); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m4510_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m4510); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m4510->icount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP: info->internal_map8 = address_map_m4510_mem; break;
- case CPUINFO_PTR_TRANSLATE: info->translate = m4510_translate; break;
+ case CPUINFO_PTR_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(m4510); break;
case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: info->f = (genf *) m4510->rdmem_id; break;
case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: info->f = (genf *) m4510->wrmem_id; break;
case CPUINFO_PTR_M6510_PORTREAD: info->f = (genf *) m4510->port_read; break;
diff --git a/src/emu/cpu/m6502/m4510.h b/src/emu/cpu/m6502/m4510.h
index 6400cbb0b26..59c9d61c96d 100644
--- a/src/emu/cpu/m6502/m4510.h
+++ b/src/emu/cpu/m6502/m4510.h
@@ -39,9 +39,9 @@ enum
#define M4510_IRQ_LINE M6502_IRQ_LINE
-void m4510_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( m4510 );
-extern unsigned m4510_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( m4510 );
#endif /* __M4510_H__ */
diff --git a/src/emu/cpu/m6502/m6502.c b/src/emu/cpu/m6502/m6502.c
index 98402922995..4d6f0721c55 100644
--- a/src/emu/cpu/m6502/m6502.c
+++ b/src/emu/cpu/m6502/m6502.c
@@ -194,11 +194,11 @@ static CPU_EXIT( m6502 )
/* nothing to do yet */
}
-static void m6502_get_context (void *dst)
+static CPU_GET_CONTEXT( m6502 )
{
}
-static void m6502_set_context (void *src)
+static CPU_SET_CONTEXT( m6502 )
{
m6502_Regs *m6502;
@@ -690,7 +690,7 @@ static CPU_EXECUTE( deco16 )
* Generic set_info
**************************************************************************/
-static void m6502_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m6502 )
{
m6502_Regs *m6502 = token;
@@ -724,7 +724,7 @@ static void m6502_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void m6502_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m6502 )
{
m6502_Regs *m6502 = token;
@@ -771,15 +771,15 @@ void m6502_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + M6502_SUBTYPE: info->i = m6502->subtype; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m6502_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m6502_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m6502_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m6502); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(m6502); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(m6502); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6502); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m6502); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m6502); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6502); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6502_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6502); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m6502->icount; break;
case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: info->f = (genf *) m6502->rdmem_id; break;
case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: info->f = (genf *) m6502->wrmem_id; break;
@@ -820,7 +820,7 @@ void m6502_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void n2a03_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( n2a03 )
{
switch (state)
{
@@ -830,7 +830,7 @@ void n2a03_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "N2A03"); break;
- default: m6502_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6502); break;
}
}
#endif
@@ -841,7 +841,7 @@ void n2a03_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-static void m6510_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m6510 )
{
m6502_Regs *m6502 = token;
@@ -851,21 +851,21 @@ static void m6510_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_M6510_PORTREAD: m6502->port_read = (UINT8 (*)(UINT8)) info->f; break;
case CPUINFO_PTR_M6510_PORTWRITE: m6502->port_write = (void (*)(UINT8,UINT8)) info->f; break;
- default: m6502_set_info(state, info); break;
+ default: CPU_SET_INFO_CALL(m6502); break;
}
}
-void m6510_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m6510 )
{
m6502_Regs *m6502 = token;
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m6510_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m6510); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6510); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m6510); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6510_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6510); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP: info->internal_map8 = address_map_m6510_mem; break;
case CPUINFO_PTR_M6510_PORTREAD: info->f = (genf *) m6502->port_read; break;
case CPUINFO_PTR_M6510_PORTWRITE: info->f = (genf *) m6502->port_write; break;
@@ -876,7 +876,7 @@ void m6510_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_M6510_PORT: info->i = m6510_get_port(m6502); break;
- default: m6502_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6502); break;
}
}
#endif
@@ -887,14 +887,14 @@ void m6510_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void m6510t_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m6510t )
{
switch (state)
{
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "M6510T"); break;
- default: m6510_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6510); break;
}
}
#endif
@@ -905,14 +905,14 @@ void m6510t_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void m7501_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m7501 )
{
switch (state)
{
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "M7501"); break;
- default: m6510_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6510); break;
}
}
#endif
@@ -923,14 +923,14 @@ void m7501_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void m8502_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m8502 )
{
switch (state)
{
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "M8502"); break;
- default: m6510_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6510); break;
}
}
#endif
@@ -941,7 +941,7 @@ void m8502_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-static void m65c02_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m65c02 )
{
m6502_Regs *m6502 = token;
@@ -950,25 +950,25 @@ static void m65c02_set_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: m65c02_set_irq_line(m6502, INPUT_LINE_NMI, info->i); break;
- default: m6502_set_info(state, info); break;
+ default: CPU_SET_INFO_CALL(m6502); break;
}
}
-void m65c02_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m65c02 )
{
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m65c02_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m65c02); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m65c02); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m65c02); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m65c02); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m65c02_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m65c02); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "M65C02"); break;
- default: m6502_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6502); break;
}
}
#endif
@@ -979,13 +979,13 @@ void m65c02_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void m65sc02_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m65sc02 )
{
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m65sc02); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m65sc02_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m65sc02); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "M65SC02"); break;
@@ -994,7 +994,7 @@ void m65sc02_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller\nCopyright Peter Trauner\nall rights reserved."); break;
- default: m65c02_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m65c02); break;
}
}
#endif
@@ -1005,7 +1005,7 @@ void m65sc02_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-static void deco16_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( deco16 )
{
m6502_Regs *m6502 = token;
@@ -1016,11 +1016,11 @@ static void deco16_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_INPUT_STATE + M6502_SET_OVERFLOW: deco16_set_irq_line(m6502, M6502_SET_OVERFLOW, info->i); break;
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: deco16_set_irq_line(m6502, INPUT_LINE_NMI, info->i); break;
- default: m6502_set_info(state, info); break;
+ default: CPU_SET_INFO_CALL(m6502); break;
}
}
-void deco16_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( deco16 )
{
switch (state)
{
@@ -1029,11 +1029,11 @@ void deco16_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = deco16_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(deco16); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(deco16); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(deco16); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(deco16); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = deco16_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(deco16); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "DECO CPU16"); break;
@@ -1042,7 +1042,7 @@ void deco16_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller\nCopyright Bryan McPhail\nall rights reserved."); break;
- default: m6502_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6502); break;
}
}
#endif
diff --git a/src/emu/cpu/m6502/m6502.h b/src/emu/cpu/m6502/m6502.h
index 783203e70fd..d5250fd7f52 100644
--- a/src/emu/cpu/m6502/m6502.h
+++ b/src/emu/cpu/m6502/m6502.h
@@ -72,9 +72,9 @@ enum
CPUINFO_INT_M6510_PORT = CPUINFO_INT_CPU_SPECIFIC
};
-extern void m6502_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m6502 );
-extern unsigned m6502_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( m6502 );
/****************************************************************************
* The 6510
@@ -93,9 +93,9 @@ extern unsigned m6502_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UI
#define M6510_IRQ_LINE M6502_IRQ_LINE
-extern void m6510_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m6510 );
-extern unsigned m6510_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( m6510 );
#endif
@@ -113,7 +113,7 @@ extern unsigned m6510_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UI
#define M6510T_IRQ_LINE M6502_IRQ_LINE
-extern void m6510t_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m6510t );
#endif
@@ -131,7 +131,7 @@ extern void m6510t_get_info(UINT32 state, cpuinfo *info);
#define M7501_IRQ_LINE M6502_IRQ_LINE
-extern void m7501_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m7501 );
#endif
#if (HAS_M8502)
@@ -148,7 +148,7 @@ extern void m7501_get_info(UINT32 state, cpuinfo *info);
#define M8502_IRQ_LINE M6502_IRQ_LINE
-extern void m8502_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m8502 );
#endif
@@ -169,7 +169,7 @@ extern void m8502_get_info(UINT32 state, cpuinfo *info);
#define N2A03_IRQ_LINE M6502_IRQ_LINE
-extern void n2a03_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( n2a03 );
#define N2A03_DEFAULTCLOCK (21477272.724 / 12)
@@ -198,9 +198,9 @@ extern void n2a03_irq(void);
#define M65C02_IRQ_LINE M6502_IRQ_LINE
-extern void m65c02_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m65c02 );
-extern unsigned m65c02_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( m65c02 );
#endif
@@ -221,9 +221,9 @@ extern unsigned m65c02_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const U
#define M65SC02_IRQ_LINE M6502_IRQ_LINE
-extern void m65sc02_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m65sc02 );
-extern unsigned m65sc02_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( m65sc02 );
#endif
/****************************************************************************
@@ -243,9 +243,9 @@ extern unsigned m65sc02_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const
#define DECO16_IRQ_LINE M6502_IRQ_LINE
-extern void deco16_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( deco16 );
#endif
-extern unsigned deco16_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( deco16 );
#endif /* __M6502_H__ */
diff --git a/src/emu/cpu/m6502/m6509.c b/src/emu/cpu/m6502/m6509.c
index 4881d70cecd..52780a0448c 100644
--- a/src/emu/cpu/m6502/m6509.c
+++ b/src/emu/cpu/m6502/m6509.c
@@ -175,11 +175,11 @@ static CPU_EXIT( m6509 )
/* nothing to do yet */
}
-static void m6509_get_context (void *dst)
+static CPU_GET_CONTEXT( m6509 )
{
}
-static void m6509_set_context (void *src)
+static CPU_SET_CONTEXT( m6509 )
{
m6509_Regs *m6502;
@@ -311,7 +311,7 @@ static void m6509_set_irq_line(m6509_Regs *m6509, int irqline, int state)
* Generic set_info
**************************************************************************/
-static void m6509_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m6509 )
{
m6509_Regs *m6509 = token;
m6509_Regs *m6502 = m6509;
@@ -348,7 +348,7 @@ static void m6509_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void m6509_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m6509 )
{
m6509_Regs *m6502 = token;
m6509_Regs *m6509 = m6502;
@@ -397,15 +397,15 @@ void m6509_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + M6509_ZP: info->i = m6509->zp.w.l; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m6509_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m6509_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m6509_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m6509); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(m6509); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(m6509); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6509); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m6509); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m6509); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6509); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6502_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6502); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m6502->icount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP: info->internal_map8 = address_map_m6509_mem; break;
case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: info->f = (genf *) m6509->rdmem_id; break;
diff --git a/src/emu/cpu/m6502/m6509.h b/src/emu/cpu/m6502/m6509.h
index 12d689c8b6e..490c295c955 100644
--- a/src/emu/cpu/m6502/m6509.h
+++ b/src/emu/cpu/m6502/m6509.h
@@ -39,6 +39,6 @@ enum
positiv edge sets overflow flag */
#define M6509_SET_OVERFLOW 3
-void m6509_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( m6509 );
#endif /* __M6509_H__ */
diff --git a/src/emu/cpu/m6502/m65ce02.c b/src/emu/cpu/m6502/m65ce02.c
index 3f54184faec..29d7d876334 100644
--- a/src/emu/cpu/m6502/m65ce02.c
+++ b/src/emu/cpu/m6502/m65ce02.c
@@ -124,13 +124,13 @@ static CPU_EXIT( m65ce02 )
/* nothing to do yet */
}
-static void m65ce02_get_context (void *dst)
+static CPU_GET_CONTEXT( m65ce02 )
{
if( dst )
*(m65ce02_Regs*)dst = m65ce02;
}
-static void m65ce02_set_context (void *src)
+static CPU_SET_CONTEXT( m65ce02 )
{
if( src )
{
@@ -239,7 +239,7 @@ static void m65ce02_set_irq_line(int irqline, int state)
* Generic set_info
**************************************************************************/
-static void m65ce02_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m65ce02 )
{
switch( state )
{
@@ -270,7 +270,7 @@ static void m65ce02_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void m65ce02_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m65ce02 )
{
switch( state )
{
@@ -317,15 +317,15 @@ void m65ce02_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER+M65CE02_ZP: info->i = m65ce02.zp.w.l; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m65ce02_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m65ce02_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m65ce02_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m65ce02); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(m65ce02); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(m65ce02); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m65ce02); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m65ce02); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m65ce02); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m65ce02); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m65ce02_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m65ce02); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m65ce02->icount; break;
case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: info->f = (genf *) m65ce02.rdmem_id; break;
case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: info->f = (genf *) m65ce02.wrmem_id; break;
diff --git a/src/emu/cpu/m6502/m65ce02.h b/src/emu/cpu/m6502/m65ce02.h
index 145a1c6aeb3..8f7519d0ddf 100644
--- a/src/emu/cpu/m6502/m65ce02.h
+++ b/src/emu/cpu/m6502/m65ce02.h
@@ -35,8 +35,8 @@ enum
#define M65CE02_IRQ_LINE M6502_IRQ_LINE
-void m65ce02_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( m65ce02 );
-extern unsigned m65ce02_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( m65ce02 );
#endif /* __M65CE02_H__ */
diff --git a/src/emu/cpu/m6800/6800dasm.c b/src/emu/cpu/m6800/6800dasm.c
index 5caa6c6a9a4..90c8cb50999 100644
--- a/src/emu/cpu/m6800/6800dasm.c
+++ b/src/emu/cpu/m6800/6800dasm.c
@@ -238,37 +238,37 @@ static unsigned Dasm680x (int subtype, char *buf, unsigned pc, const UINT8 *opro
}
}
-offs_t m6800_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( m6800 )
{
return Dasm680x(6800,buffer,pc,oprom,opram);
}
-offs_t m6801_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( m6801 )
{
return Dasm680x(6801,buffer,pc,oprom,opram);
}
-offs_t m6802_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( m6802 )
{
return Dasm680x(6802,buffer,pc,oprom,opram);
}
-offs_t m6803_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( m6803 )
{
return Dasm680x(6803,buffer,pc,oprom,opram);
}
-offs_t m6808_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( m6808 )
{
return Dasm680x(6808,buffer,pc,oprom,opram);
}
-offs_t hd63701_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( hd63701 )
{
return Dasm680x(63701,buffer,pc,oprom,opram);
}
-offs_t nsc8105_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( nsc8105 )
{
return Dasm680x(8105,buffer,pc,oprom,opram);
}
diff --git a/src/emu/cpu/m6800/m6800.c b/src/emu/cpu/m6800/m6800.c
index 10bb59b6362..229f94ff76a 100644
--- a/src/emu/cpu/m6800/m6800.c
+++ b/src/emu/cpu/m6800/m6800.c
@@ -903,7 +903,7 @@ static CPU_EXIT( m6800 )
/****************************************************************************
* Get all registers in given buffer
****************************************************************************/
-static void m6800_get_context(void *dst)
+static CPU_GET_CONTEXT( m6800 )
{
if( dst )
*(m6800_Regs*)dst = m68xx;
@@ -913,7 +913,7 @@ static void m6800_get_context(void *dst)
/****************************************************************************
* Set all registers to given values
****************************************************************************/
-static void m6800_set_context(void *src)
+static CPU_SET_CONTEXT( m6800 )
{
if( src )
m68xx = *(m6800_Regs*)src;
@@ -2580,7 +2580,7 @@ static WRITE8_HANDLER( m6803_internal_registers_w )
* Generic set_info
**************************************************************************/
-static void m6800_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m6800 )
{
switch (state)
{
@@ -2606,7 +2606,7 @@ static void m6800_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void m6800_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m6800 )
{
switch (state)
{
@@ -2649,15 +2649,15 @@ void m6800_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + M6800_WAI_STATE: info->i = m68xx.wai_state; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m6800_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m6800_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m6800_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m6800); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(m6800); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(m6800); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6800); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m6800); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m6800); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6800); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6800_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6800); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m6800_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -2695,7 +2695,7 @@ void m6800_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void m6801_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m6801 )
{
switch (state)
{
@@ -2707,12 +2707,12 @@ void m6801_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6801); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6803); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6801_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6801); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "M6801"); break;
- default: m6800_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
#endif
@@ -2723,7 +2723,7 @@ void m6801_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void m6802_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m6802 )
{
switch (state)
{
@@ -2732,12 +2732,12 @@ void m6802_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6802); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6802_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6802); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "M6802"); break;
- default: m6800_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
#endif
@@ -2748,7 +2748,7 @@ void m6802_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void m6803_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m6803 )
{
switch (state)
{
@@ -2760,14 +2760,14 @@ void m6803_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6803); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6803); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6803_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6803); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_m6803_mem; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "M6803"); break;
- default: m6800_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
#endif
@@ -2778,7 +2778,7 @@ void m6803_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void m6808_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m6808 )
{
switch (state)
{
@@ -2787,12 +2787,12 @@ void m6808_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6808); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6808_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6808); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "M6808"); break;
- default: m6800_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
#endif
@@ -2803,7 +2803,7 @@ void m6808_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void hd63701_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( hd63701 )
{
switch (state)
{
@@ -2815,12 +2815,12 @@ void hd63701_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(hd63701); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(hd63701); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = hd63701_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hd63701); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "HD63701"); break;
- default: m6800_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
#endif
@@ -2831,7 +2831,7 @@ void hd63701_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void nsc8105_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( nsc8105 )
{
switch (state)
{
@@ -2841,12 +2841,12 @@ void nsc8105_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(nsc8105); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(nsc8105); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = nsc8105_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(nsc8105); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "NSC8105"); break;
- default: m6800_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
#endif
diff --git a/src/emu/cpu/m6800/m6800.h b/src/emu/cpu/m6800/m6800.h
index c65c897be06..8fcbb0af643 100644
--- a/src/emu/cpu/m6800/m6800.h
+++ b/src/emu/cpu/m6800/m6800.h
@@ -24,7 +24,7 @@ enum
/* fall eddge : ASSERT_LINE -> CLEAR_LINE */
/* it is usuali to use PULSE_LINE state */
-extern void m6800_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m6800 );
/****************************************************************************
* For now make the 6801 using the m6800 variables and functions
@@ -43,7 +43,7 @@ extern void m6800_get_info(UINT32 state, cpuinfo *info);
#define M6801_WAI M6800_WAI
#define M6801_IRQ_LINE M6800_IRQ_LINE
-extern void m6801_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m6801 );
#endif
/****************************************************************************
@@ -63,7 +63,7 @@ extern void m6801_get_info(UINT32 state, cpuinfo *info);
#define M6802_WAI M6800_WAI
#define M6802_IRQ_LINE M6800_IRQ_LINE
-extern void m6802_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m6802 );
#endif
/****************************************************************************
@@ -84,7 +84,7 @@ extern void m6802_get_info(UINT32 state, cpuinfo *info);
#define M6803_IRQ_LINE M6800_IRQ_LINE
#define M6803_TIN_LINE M6800_TIN_LINE
-extern void m6803_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m6803 );
#endif
#if (HAS_M6801||HAS_M6803||HAS_HD63701)
@@ -120,7 +120,7 @@ extern void m6803_get_info(UINT32 state, cpuinfo *info);
#define M6808_WAI M6800_WAI
#define M6808_IRQ_LINE M6800_IRQ_LINE
-extern void m6808_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m6808 );
#endif
/****************************************************************************
@@ -142,7 +142,7 @@ extern void m6808_get_info(UINT32 state, cpuinfo *info);
#define HD63701_IRQ_LINE M6800_IRQ_LINE
#define HD63701_TIN_LINE M6800_TIN_LINE
-extern void hd63701_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( hd63701 );
void hd63701_trap_pc(void);
@@ -179,7 +179,7 @@ WRITE8_HANDLER( hd63701_internal_registers_w );
#define NSC8105_IRQ_LINE M6800_IRQ_LINE
#define NSC8105_TIN_LINE M6800_TIN_LINE
-extern void nsc8105_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( nsc8105 );
#endif
/****************************************************************************/
@@ -214,12 +214,12 @@ extern void nsc8105_get_info(UINT32 state, cpuinfo *info);
# define TRUE (!FALSE)
#endif
-offs_t m6800_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t m6801_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t m6802_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t m6803_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t m6808_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t hd63701_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t nsc8105_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( m6800 );
+CPU_DISASSEMBLE( m6801 );
+CPU_DISASSEMBLE( m6802 );
+CPU_DISASSEMBLE( m6803 );
+CPU_DISASSEMBLE( m6808 );
+CPU_DISASSEMBLE( hd63701 );
+CPU_DISASSEMBLE( nsc8105 );
#endif /* __M6800_H__ */
diff --git a/src/emu/cpu/m68000/m68000.h b/src/emu/cpu/m68000/m68000.h
index 46beaa62cec..00a92d04fb2 100644
--- a/src/emu/cpu/m68000/m68000.h
+++ b/src/emu/cpu/m68000/m68000.h
@@ -72,7 +72,7 @@ struct _m68k_encryption_interface
#define MC68000_INT_ACK_AUTOVECTOR -1
#define MC68000_INT_ACK_SPURIOUS -2
-void m68000_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( m68000 );
extern void m68000_memory_interface_set(int Entry,void * memory_routine);
/****************************************************************************
@@ -89,7 +89,7 @@ extern void m68000_memory_interface_set(int Entry,void * memory_routine);
#define MC68008_INT_ACK_AUTOVECTOR MC68000_INT_ACK_AUTOVECTOR
#define MC68008_INT_ACK_SPURIOUS MC68000_INT_ACK_SPURIOUS
-void m68008_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( m68008 );
#endif
/****************************************************************************
@@ -106,7 +106,7 @@ void m68008_get_info(UINT32 state, cpuinfo *info);
#define MC68010_INT_ACK_AUTOVECTOR MC68000_INT_ACK_AUTOVECTOR
#define MC68010_INT_ACK_SPURIOUS MC68000_INT_ACK_SPURIOUS
-void m68010_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( m68010 );
#endif
/****************************************************************************
@@ -123,7 +123,7 @@ void m68010_get_info(UINT32 state, cpuinfo *info);
#define MC68EC020_INT_ACK_AUTOVECTOR MC68000_INT_ACK_AUTOVECTOR
#define MC68EC020_INT_ACK_SPURIOUS MC68000_INT_ACK_SPURIOUS
-void m68ec020_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( m68ec020 );
#endif
/****************************************************************************
@@ -140,7 +140,7 @@ void m68ec020_get_info(UINT32 state, cpuinfo *info);
#define MC68020_INT_ACK_AUTOVECTOR MC68000_INT_ACK_AUTOVECTOR
#define MC68020_INT_ACK_SPURIOUS MC68000_INT_ACK_SPURIOUS
-void m68020_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( m68020 );
#endif
/****************************************************************************
@@ -157,7 +157,7 @@ void m68020_get_info(UINT32 state, cpuinfo *info);
#define MC68040_INT_ACK_AUTOVECTOR MC68000_INT_ACK_AUTOVECTOR
#define MC68040_INT_ACK_SPURIOUS MC68000_INT_ACK_SPURIOUS
-void m68040_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( m68040 );
#endif
// C Core header
diff --git a/src/emu/cpu/m68000/m68kmame.c b/src/emu/cpu/m68000/m68kmame.c
index f7fa78a5c8c..bf945e6822a 100644
--- a/src/emu/cpu/m68000/m68kmame.c
+++ b/src/emu/cpu/m68000/m68kmame.c
@@ -179,18 +179,18 @@ static CPU_EXECUTE( m68000 )
return m68k_execute(device->token, cycles);
}
-static void m68000_get_context(void *dst)
+static CPU_GET_CONTEXT( m68000 )
{
}
-static void m68000_set_context(void *src)
+static CPU_SET_CONTEXT( m68000 )
{
if (m68k_memory_intf.read8 != program_read_byte_16be)
m68k_memory_intf = interface_d16;
token = src;
}
-static offs_t m68000_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( m68000 )
{
return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_68000);
}
@@ -226,18 +226,18 @@ static CPU_EXECUTE( m68008 )
return m68k_execute(device->token, cycles);
}
-static void m68008_get_context(void *dst)
+static CPU_GET_CONTEXT( m68008 )
{
}
-static void m68008_set_context(void *src)
+static CPU_SET_CONTEXT( m68008 )
{
if (m68k_memory_intf.read8 != program_read_byte_8be)
m68k_memory_intf = interface_d8;
token = src;
}
-static offs_t m68008_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( m68008 )
{
return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_68008);
}
@@ -260,7 +260,7 @@ static CPU_INIT( m68010 )
m68k_set_int_ack_callback(m68k, (void *)device, (int (*)(void *param, int int_level)) irqcallback);
}
-static offs_t m68010_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( m68010 )
{
return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_68010);
}
@@ -297,18 +297,18 @@ static CPU_EXECUTE( m68020 )
return m68k_execute(device->token, cycles);
}
-static void m68020_get_context(void *dst)
+static CPU_GET_CONTEXT( m68020 )
{
}
-static void m68020_set_context(void *src)
+static CPU_SET_CONTEXT( m68020 )
{
if (m68k_memory_intf.read8 != program_read_byte_32be)
m68k_memory_intf = interface_d32;
token = src;
}
-static offs_t m68020_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( m68020 )
{
return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_68020);
}
@@ -330,7 +330,7 @@ static CPU_INIT( m68ec020 )
m68k_set_int_ack_callback(m68k, (void *)device, (int (*)(void *param, int int_level)) irqcallback);
}
-static offs_t m68ec020_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( m68ec020 )
{
return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_68EC020);
}
@@ -368,18 +368,18 @@ static CPU_EXECUTE( m68040 )
return m68k_execute(device->token, cycles);
}
-static void m68040_get_context(void *dst)
+static CPU_GET_CONTEXT( m68040 )
{
}
-static void m68040_set_context(void *src)
+static CPU_SET_CONTEXT( m68040 )
{
if (m68k_memory_intf.read8 != program_read_byte_32be)
m68k_memory_intf = interface_d32;
token = src;
}
-static offs_t m68040_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( m68040 )
{
return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_68040);
}
@@ -390,7 +390,7 @@ static offs_t m68040_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UIN
* Generic set_info
**************************************************************************/
-static void m68000_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m68000 )
{
m68ki_cpu_core *m68k = token;
switch (state)
@@ -442,7 +442,7 @@ static void m68000_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void m68000_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m68000 )
{
m68ki_cpu_core *m68k = token;
int sr;
@@ -509,15 +509,15 @@ void m68000_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + M68K_PREF_DATA: info->i = m68k_get_reg(m68k, M68K_REG_PREF_DATA); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m68000_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m68000_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m68000_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m68000); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(m68000); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(m68000); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68000); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m68000); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m68000); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m68000); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m68000_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m68000); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68k->remaining_cycles; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -576,7 +576,7 @@ void m68000_get_info(UINT32 state, cpuinfo *info)
#if HAS_M68008
-static void m68008_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m68008 )
{
m68ki_cpu_core *m68k = token;
switch (state)
@@ -622,7 +622,7 @@ static void m68008_set_info(UINT32 state, cpuinfo *info)
}
}
-void m68008_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m68008 )
{
m68ki_cpu_core *m68k = token;
int sr;
@@ -689,15 +689,15 @@ void m68008_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + M68K_PREF_DATA: info->i = m68k_get_reg(m68k, M68K_REG_PREF_DATA); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m68008_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m68008_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m68008_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m68008); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(m68008); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(m68008); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68008); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m68008); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m68008); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m68008); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m68008_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m68008); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68k->remaining_cycles; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -761,7 +761,7 @@ void m68008_get_info(UINT32 state, cpuinfo *info)
**************************************************************************/
#if HAS_M68010
-static void m68010_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m68010 )
{
m68ki_cpu_core *m68k = token;
switch (state)
@@ -771,11 +771,11 @@ static void m68010_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + M68K_SFC: m68k_set_reg(m68k, M68K_REG_SFC, info->i); break;
case CPUINFO_INT_REGISTER + M68K_DFC: m68k_set_reg(m68k, M68K_REG_DFC, info->i); break;
- default: m68000_set_info(state, info); break;
+ default: CPU_SET_INFO_CALL(m68000); break;
}
}
-void m68010_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m68010 )
{
m68ki_cpu_core *m68k = token;
switch (state)
@@ -786,9 +786,9 @@ void m68010_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + M68K_DFC: info->i = m68k_get_reg(m68k, M68K_REG_DFC); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m68010_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m68010); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68010); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m68010_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m68010); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "68010"); break;
@@ -796,7 +796,7 @@ void m68010_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_REGISTER + M68K_DFC: sprintf(info->s, "DFC:%X", m68k_get_reg(m68k, M68K_REG_DFC)); break;
case CPUINFO_STR_REGISTER + M68K_VBR: sprintf(info->s, "VBR:%08X", m68k_get_reg(m68k, M68K_REG_VBR)); break;
- default: m68000_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m68000); break;
}
}
@@ -806,7 +806,7 @@ void m68010_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-static void m68020_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m68020 )
{
m68ki_cpu_core *m68k = token;
switch (state)
@@ -858,7 +858,7 @@ static void m68020_set_info(UINT32 state, cpuinfo *info)
}
}
-void m68020_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m68020 )
{
m68ki_cpu_core *m68k = token;
int sr;
@@ -931,15 +931,15 @@ void m68020_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + M68K_DFC: info->i = m68k_get_reg(m68k, M68K_REG_DFC); /* 68010+ */ break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m68020_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m68020_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m68020_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m68020); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(m68020); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(m68020); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68020); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m68020); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m68020); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m68020); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m68020_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m68020); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68k->remaining_cycles; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -1008,7 +1008,7 @@ void m68020_get_info(UINT32 state, cpuinfo *info)
**************************************************************************/
#if HAS_M68EC020
-static void m68ec020_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m68ec020 )
{
m68ki_cpu_core *m68k = token;
switch (state)
@@ -1016,11 +1016,11 @@ static void m68ec020_set_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_PC: m68k_set_reg(m68k, M68K_REG_PC, info->i&0x00ffffff); break;
- default: m68020_set_info(state, info); break;
+ default: CPU_SET_INFO_CALL(m68020); break;
}
}
-void m68ec020_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m68ec020 )
{
m68ki_cpu_core *m68k = token;
switch (state)
@@ -1030,14 +1030,14 @@ void m68ec020_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_PC: info->i = m68k_get_reg(m68k, M68K_REG_PC)&0x00ffffff; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m68ec020_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m68ec020); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68ec020); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m68ec020_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m68ec020); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "68EC020"); break;
- default: m68020_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m68020); break;
}
}
@@ -1048,7 +1048,7 @@ void m68ec020_get_info(UINT32 state, cpuinfo *info)
**************************************************************************/
#if HAS_M68040
-static void m68040_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m68040 )
{
m68ki_cpu_core *m68k = token;
switch (state)
@@ -1100,7 +1100,7 @@ static void m68040_set_info(UINT32 state, cpuinfo *info)
}
}
-void m68040_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m68040 )
{
m68ki_cpu_core *m68k = token;
int sr;
@@ -1173,15 +1173,15 @@ void m68040_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + M68K_DFC: info->i = m68k_get_reg(m68k, M68K_REG_DFC); /* 68010+ */ break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m68040_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m68040_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m68040_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m68040); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(m68040); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(m68040); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68040); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m68040); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m68040); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m68040); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m68040_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m68040); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68k->remaining_cycles; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/m6805/6805dasm.c b/src/emu/cpu/m6805/6805dasm.c
index 079c5f0370c..29f23b26c92 100644
--- a/src/emu/cpu/m6805/6805dasm.c
+++ b/src/emu/cpu/m6805/6805dasm.c
@@ -157,7 +157,7 @@ static const char *const opcode_strings[0x0100] =
};
#endif
-offs_t m6805_dasm(char *buf, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( m6805 )
{
int code, bit;
UINT16 ea;
@@ -170,40 +170,40 @@ offs_t m6805_dasm(char *buf, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
else if (disasm[code][0] == rts || disasm[code][0] == rti)
flags = DASMFLAG_STEP_OUT;
- buf += sprintf(buf, "%-6s", op_name_str[disasm[code][0]]);
+ buffer += sprintf(buffer, "%-6s", op_name_str[disasm[code][0]]);
switch( disasm[code][1] )
{
case _btr: /* bit test and relative branch */
bit = (code >> 1) & 7;
- sprintf (buf, "%d,$%02X,$%03X", bit, opram[1], pc + 3 + (INT8)opram[2]);
+ sprintf (buffer, "%d,$%02X,$%03X", bit, opram[1], pc + 3 + (INT8)opram[2]);
return 3 | flags | DASMFLAG_SUPPORTED;
case _bit: /* bit test */
bit = (code >> 1) & 7;
- sprintf (buf, "%d,$%03X", bit, opram[1]);
+ sprintf (buffer, "%d,$%03X", bit, opram[1]);
return 2 | flags | DASMFLAG_SUPPORTED;
case _rel: /* relative */
- sprintf (buf, "$%03X", pc + 2 + (INT8)opram[1]);
+ sprintf (buffer, "$%03X", pc + 2 + (INT8)opram[1]);
return 2 | flags | DASMFLAG_SUPPORTED;
case _imm: /* immediate */
- sprintf (buf, "#$%02X", opram[1]);
+ sprintf (buffer, "#$%02X", opram[1]);
return 2 | flags | DASMFLAG_SUPPORTED;
case _dir: /* direct (zero page address) */
- sprintf (buf, "$%02X", opram[1]);
+ sprintf (buffer, "$%02X", opram[1]);
return 2 | flags | DASMFLAG_SUPPORTED;
case _ext: /* extended (16 bit address) */
ea = (opram[1] << 8) + opram[2];
- sprintf (buf, "$%04X", ea);
+ sprintf (buffer, "$%04X", ea);
return 3 | flags | DASMFLAG_SUPPORTED;
case _idx: /* indexed */
- sprintf (buf, "(x)");
+ sprintf (buffer, "(x)");
return 1 | flags | DASMFLAG_SUPPORTED;
case _ix1: /* indexed + byte (zero page) */
- sprintf (buf, "(x+$%02X)", opram[1]);
+ sprintf (buffer, "(x+$%02X)", opram[1]);
return 2 | flags | DASMFLAG_SUPPORTED;
case _ix2: /* indexed + word (16 bit address) */
ea = (opram[1] << 8) + opram[2];
- sprintf (buf, "(x+$%04X)", ea);
+ sprintf (buffer, "(x+$%04X)", ea);
return 3 | flags | DASMFLAG_SUPPORTED;
default: /* implicit */
return 1 | flags | DASMFLAG_SUPPORTED;
diff --git a/src/emu/cpu/m6805/m6805.c b/src/emu/cpu/m6805/m6805.c
index f0068f7fbcd..214617e6e25 100644
--- a/src/emu/cpu/m6805/m6805.c
+++ b/src/emu/cpu/m6805/m6805.c
@@ -475,7 +475,7 @@ static CPU_EXIT( m6805 )
/****************************************************************************
* Get all registers in given buffer
****************************************************************************/
-static void m6805_get_context(void *dst)
+static CPU_GET_CONTEXT( m6805 )
{
if( dst )
*(m6805_Regs*)dst = m6805;
@@ -485,7 +485,7 @@ static void m6805_get_context(void *dst)
/****************************************************************************
* Set all registers to given values
****************************************************************************/
-static void m6805_set_context(void *src)
+static CPU_SET_CONTEXT( m6805 )
{
if( src )
{
@@ -880,7 +880,7 @@ static void hd63705_set_irq_line(int irqline, int state)
* Generic set_info
**************************************************************************/
-static void m6805_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m6805 )
{
switch (state)
{
@@ -903,7 +903,7 @@ static void m6805_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void m6805_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m6805 )
{
switch (state)
{
@@ -942,15 +942,15 @@ void m6805_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + M6805_CC: info->i = CC; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m6805_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m6805_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m6805_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m6805); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(m6805); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(m6805); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6805); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m6805); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m6805); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6805); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6805_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6805); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m6805_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -985,18 +985,18 @@ void m6805_get_info(UINT32 state, cpuinfo *info)
/**************************************************************************
* CPU-specific set_info
**************************************************************************/
-static void m68705_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m68705 )
{
switch(state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_INPUT_STATE + M68705_INT_TIMER: m68705_set_irq_line(M68705_INT_TIMER, info->i); break;
- default: m6805_set_info(state,info); break;
+ default: CPU_SET_INFO_CALL(m6805); break;
}
}
-void m68705_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m68705 )
{
switch (state)
{
@@ -1004,14 +1004,14 @@ void m68705_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_INPUT_STATE + M68705_INT_TIMER: info->i = m6805.irq_state[M68705_INT_TIMER]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m68705_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m68705); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m68705); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m68705); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "M68705"); break;
- default: m6805_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6805); break;
}
}
#endif
@@ -1022,7 +1022,7 @@ void m68705_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-static void hd63705_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( hd63705 )
{
switch (state)
{
@@ -1037,11 +1037,11 @@ static void hd63705_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_INPUT_STATE + HD63705_INT_ADCONV: hd63705_set_irq_line(HD63705_INT_ADCONV, info->i); break;
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: hd63705_set_irq_line(INPUT_LINE_NMI, info->i); break;
- default: m6805_set_info(state, info); break;
+ default: CPU_SET_INFO_CALL(m6805); break;
}
}
-void hd63705_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( hd63705 )
{
switch (state)
{
@@ -1059,7 +1059,7 @@ void hd63705_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = hd63705_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(hd63705); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(hd63705); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(hd63705); break;
@@ -1068,7 +1068,7 @@ void hd63705_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Keith Wilkins, Juergen Buchmueller"); break;
- default: m6805_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6805); break;
}
}
#endif
diff --git a/src/emu/cpu/m6805/m6805.h b/src/emu/cpu/m6805/m6805.h
index 8fc9ad35037..6e50ab02c6e 100644
--- a/src/emu/cpu/m6805/m6805.h
+++ b/src/emu/cpu/m6805/m6805.h
@@ -11,7 +11,7 @@ enum { M6805_PC=1, M6805_S, M6805_CC, M6805_A, M6805_X, M6805_IRQ_STATE };
#define M6805_IRQ_LINE 0
-extern void m6805_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m6805 );
/****************************************************************************
* 68705 section
@@ -28,7 +28,7 @@ extern void m6805_get_info(UINT32 state, cpuinfo *info);
#define M68705_IRQ_LINE M6805_IRQ_LINE
#define M68705_INT_TIMER 0x01
-extern void m68705_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( m68705 );
#endif
/****************************************************************************
@@ -57,7 +57,7 @@ extern void m68705_get_info(UINT32 state, cpuinfo *info);
#define HD63705_INT_ADCONV 0x07
#define HD63705_INT_NMI 0x08
-extern void hd63705_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( hd63705 );
#endif
/****************************************************************************/
@@ -84,6 +84,6 @@ extern void hd63705_get_info(UINT32 state, cpuinfo *info);
/****************************************************************************/
#define M6805_RDOP_ARG(Addr) ((unsigned)cpu_readop_arg(Addr))
-offs_t m6805_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( m6805 );
#endif /* __M6805_H__ */
diff --git a/src/emu/cpu/m6809/6809dasm.c b/src/emu/cpu/m6809/6809dasm.c
index 3a0ae198ede..32d26b67eff 100644
--- a/src/emu/cpu/m6809/6809dasm.c
+++ b/src/emu/cpu/m6809/6809dasm.c
@@ -362,7 +362,7 @@ static const char *const m6809_regs_te[16] =
"A", "B", "CC", "DP", "inv", "inv", "inv", "inv"
};
-offs_t m6809_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( m6809 )
{
UINT8 opcode, mode, pb, pbm, reg;
const UINT8 *operandarray;
diff --git a/src/emu/cpu/m6809/m6809.c b/src/emu/cpu/m6809/m6809.c
index 7cf0bd3ef65..3ffafa5eba4 100644
--- a/src/emu/cpu/m6809/m6809.c
+++ b/src/emu/cpu/m6809/m6809.c
@@ -83,7 +83,7 @@
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
-extern offs_t m6809_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( m6809 );
INLINE void fetch_effective_address( void );
@@ -396,7 +396,7 @@ INLINE void WM16( UINT32 Addr, PAIR *p )
/****************************************************************************
* Get all registers in given buffer
****************************************************************************/
-static void m6809_get_context(void *dst)
+static CPU_GET_CONTEXT( m6809 )
{
if( dst )
*(m6809_Regs*)dst = m6809;
@@ -405,7 +405,7 @@ static void m6809_get_context(void *dst)
/****************************************************************************
* Set all registers to given values
****************************************************************************/
-static void m6809_set_context(void *src)
+static CPU_SET_CONTEXT( m6809 )
{
if( src )
m6809 = *(m6809_Regs*)src;
@@ -1095,7 +1095,7 @@ INLINE void fetch_effective_address( void )
* Generic set_info
**************************************************************************/
-static void m6809_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( m6809 )
{
switch (state)
{
@@ -1124,7 +1124,7 @@ static void m6809_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void m6809_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m6809 )
{
switch (state)
{
@@ -1169,15 +1169,15 @@ void m6809_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + M6809_DP: info->i = DP; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = m6809_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = m6809_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = m6809_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m6809); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(m6809); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(m6809); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(m6809); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m6809); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(m6809); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6809); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = m6809_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6809); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m6809_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -1216,7 +1216,7 @@ void m6809_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void m6809e_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m6809e )
{
switch (state)
{
@@ -1227,6 +1227,6 @@ void m6809e_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "M6809E"); break;
- default: m6809_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(m6809); break;
}
}
diff --git a/src/emu/cpu/m6809/m6809.h b/src/emu/cpu/m6809/m6809.h
index 13ac4569210..1b6c7972989 100644
--- a/src/emu/cpu/m6809/m6809.h
+++ b/src/emu/cpu/m6809/m6809.h
@@ -16,8 +16,8 @@ enum
#define M6809_IRQ_LINE 0 /* IRQ line number */
#define M6809_FIRQ_LINE 1 /* FIRQ line number */
-void m6809_get_info(UINT32 state, cpuinfo *info);
-void m6809e_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( m6809 );
+CPU_GET_INFO( m6809e );
/****************************************************************************/
/* Read a byte from given memory location */
diff --git a/src/emu/cpu/mb86233/mb86233.c b/src/emu/cpu/mb86233/mb86233.c
index 3ff24dea6c9..bfa46cefaf8 100644
--- a/src/emu/cpu/mb86233/mb86233.c
+++ b/src/emu/cpu/mb86233/mb86233.c
@@ -96,13 +96,13 @@ static int mb86233_icount;
Context Switching
***************************************************************************/
-static void mb86233_get_context(void *dst)
+static CPU_GET_CONTEXT( mb86233 )
{
/* copy the context */
*(MB86233_REGS *)dst = mb86233;
}
-static void mb86233_set_context(void *src)
+static CPU_SET_CONTEXT( mb86233 )
{
/* copy the context */
if (src)
@@ -1598,7 +1598,7 @@ static CPU_EXECUTE( mb86233 )
DISASSEMBLY HOOK
***************************************************************************/
-static offs_t mb86233_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( mb86233 )
{
extern UINT32 dasm_mb86233(char *, UINT32);
@@ -1612,7 +1612,7 @@ static offs_t mb86233_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UI
Information Setters
***************************************************************************/
-static void mb86233_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( mb86233 )
{
switch (state)
{
@@ -1651,7 +1651,7 @@ static void mb86233_set_info(UINT32 state, cpuinfo *info)
Information Getters
***************************************************************************/
-void mb86233_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( mb86233 )
{
switch (state)
{
@@ -1709,15 +1709,15 @@ void mb86233_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + MB86233_R15: info->i = GETGPR(15); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = mb86233_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mb86233_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mb86233_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mb86233); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(mb86233); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(mb86233); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mb86233); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mb86233); break;
case CPUINFO_PTR_EXIT: info->exit = NULL; break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mb86233); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = mb86233_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mb86233); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mb86233_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/mb86233/mb86233.h b/src/emu/cpu/mb86233/mb86233.h
index 2472c5ff3d9..a3a5ea73496 100644
--- a/src/emu/cpu/mb86233/mb86233.h
+++ b/src/emu/cpu/mb86233/mb86233.h
@@ -51,6 +51,6 @@ struct _mb86233_cpu_core
const char *tablergn;
};
-extern void mb86233_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( mb86233 );
#endif /* __MB86233_H__ */
diff --git a/src/emu/cpu/mb88xx/mb88dasm.c b/src/emu/cpu/mb88xx/mb88dasm.c
index f2c6326046c..570827954df 100644
--- a/src/emu/cpu/mb88xx/mb88dasm.c
+++ b/src/emu/cpu/mb88xx/mb88dasm.c
@@ -10,7 +10,7 @@
#include "mb88xx.h"
-offs_t mb88_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( mb88 )
{
unsigned startpc = pc;
UINT8 op = oprom[pc++ - startpc];
diff --git a/src/emu/cpu/mb88xx/mb88xx.c b/src/emu/cpu/mb88xx/mb88xx.c
index de659242301..eb369452f7e 100644
--- a/src/emu/cpu/mb88xx/mb88xx.c
+++ b/src/emu/cpu/mb88xx/mb88xx.c
@@ -100,14 +100,14 @@ static int mb88_icount;
CONTEXT SWITCHING
***************************************************************************/
-static void mb88_get_context(void *dst)
+static CPU_GET_CONTEXT( mb88 )
{
/* copy the context */
*(mb88Regs *)dst = mb88;
}
-static void mb88_set_context(void *src)
+static CPU_SET_CONTEXT( mb88 )
{
/* copy the context */
if (src)
@@ -755,7 +755,7 @@ static CPU_EXECUTE( mb88 )
INFORMATION SETTERS
***************************************************************************/
-static void mb88_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( mb88 )
{
switch (state)
{
@@ -793,7 +793,7 @@ static void mb88_set_info(UINT32 state, cpuinfo *info)
INFORMATION GETTERS
***************************************************************************/
-void mb88_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( mb88 )
{
switch (state)
{
@@ -845,15 +845,15 @@ void mb88_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + MB88_SB: info->i = mb88.SB; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = mb88_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mb88_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mb88_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mb88); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(mb88); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(mb88); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mb88); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mb88); break;
case CPUINFO_PTR_EXIT: info->exit = NULL; break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mb88); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = mb88_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mb88); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mb88_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -896,7 +896,7 @@ void mb88_get_info(UINT32 state, cpuinfo *info)
}
}
-void mb8841_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( mb8841 )
{
switch (state)
{
@@ -907,11 +907,11 @@ void mb8841_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "MB8841"); break;
- default: mb88_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mb88); break;
}
}
-void mb8842_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( mb8842 )
{
switch (state)
{
@@ -922,11 +922,11 @@ void mb8842_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "MB8842"); break;
- default: mb88_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mb88); break;
}
}
-void mb8843_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( mb8843 )
{
switch (state)
{
@@ -937,11 +937,11 @@ void mb8843_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "MB8843"); break;
- default: mb88_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mb88); break;
}
}
-void mb8844_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( mb8844 )
{
switch (state)
{
@@ -952,6 +952,6 @@ void mb8844_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "MB8844"); break;
- default: mb88_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mb88); break;
}
}
diff --git a/src/emu/cpu/mb88xx/mb88xx.h b/src/emu/cpu/mb88xx/mb88xx.h
index 81633ceaa77..f2fd26ff17e 100644
--- a/src/emu/cpu/mb88xx/mb88xx.h
+++ b/src/emu/cpu/mb88xx/mb88xx.h
@@ -68,12 +68,12 @@ struct _mb88_cpu_core
PUBLIC FUNCTIONS
***************************************************************************/
-void mb88_get_info(UINT32 state, cpuinfo *info);
-void mb8841_get_info(UINT32 state, cpuinfo *info);
-void mb8842_get_info(UINT32 state, cpuinfo *info);
-void mb8843_get_info(UINT32 state, cpuinfo *info);
-void mb8844_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( mb88 );
+CPU_GET_INFO( mb8841 );
+CPU_GET_INFO( mb8842 );
+CPU_GET_INFO( mb8843 );
+CPU_GET_INFO( mb8844 );
-offs_t mb88_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( mb88 );
#endif /* __MB88XX_H__ */
diff --git a/src/emu/cpu/mc68hc11/mc68hc11.c b/src/emu/cpu/mc68hc11/mc68hc11.c
index 6376b651a9f..7ceb8f1b50c 100644
--- a/src/emu/cpu/mc68hc11/mc68hc11.c
+++ b/src/emu/cpu/mc68hc11/mc68hc11.c
@@ -364,14 +364,14 @@ static CPU_EXIT( hc11 )
}
-static void hc11_get_context(void *dst)
+static CPU_GET_CONTEXT( hc11 )
{
if (dst) {
*(HC11_REGS*)dst = hc11;
}
}
-static void hc11_set_context(void *src)
+static CPU_SET_CONTEXT( hc11 )
{
if (src) {
hc11 = *(HC11_REGS*)src;
@@ -399,7 +399,7 @@ static CPU_EXECUTE( hc11 )
/*****************************************************************************/
-static void mc68hc11_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( mc68hc11 )
{
switch (state)
{
@@ -414,7 +414,7 @@ static void mc68hc11_set_info(UINT32 state, cpuinfo *info)
}
}
-void mc68hc11_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( mc68hc11 )
{
switch(state)
{
@@ -453,9 +453,9 @@ void mc68hc11_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + HC11_IY: info->i = hc11.iy; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = mc68hc11_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = hc11_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = hc11_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mc68hc11); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(hc11); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(hc11); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(hc11); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(hc11); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(hc11); break;
diff --git a/src/emu/cpu/mc68hc11/mc68hc11.h b/src/emu/cpu/mc68hc11/mc68hc11.h
index 5b6b7f89726..5eececf36f9 100644
--- a/src/emu/cpu/mc68hc11/mc68hc11.h
+++ b/src/emu/cpu/mc68hc11/mc68hc11.h
@@ -7,7 +7,7 @@
offs_t hc11_disasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-void mc68hc11_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( mc68hc11 );
#define MC68HC11_IO_PORTA 0x00
diff --git a/src/emu/cpu/mcs48/mcs48.c b/src/emu/cpu/mcs48/mcs48.c
index 18176caae2c..56f1af53b71 100644
--- a/src/emu/cpu/mcs48/mcs48.c
+++ b/src/emu/cpu/mcs48/mcs48.c
@@ -992,7 +992,7 @@ ADDRESS_MAP_END
destination
-------------------------------------------------*/
-static void mcs48_get_context(void *dst)
+static CPU_GET_CONTEXT( mcs48 )
{
}
@@ -1002,7 +1002,7 @@ static void mcs48_get_context(void *dst)
from the source
-------------------------------------------------*/
-static void mcs48_set_context(void *src)
+static CPU_SET_CONTEXT( mcs48 )
{
mcs48_state *mcs48;
if( src )
@@ -1017,7 +1017,7 @@ static void mcs48_set_context(void *src)
on the CPU core
-------------------------------------------------*/
-static void mcs48_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( mcs48 )
{
mcs48_state *mcs48 = token;
@@ -1053,7 +1053,7 @@ static void mcs48_set_info(UINT32 state, cpuinfo *info)
information from the CPU core
-------------------------------------------------*/
-static void mcs48_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( mcs48 )
{
mcs48_state *mcs48 = token;
@@ -1104,14 +1104,14 @@ static void mcs48_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + MCS48_EA: info->i = mcs48->ea; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = mcs48_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mcs48_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mcs48_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mcs48); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(mcs48); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(mcs48); break;
case CPUINFO_PTR_INIT: /*info->init = CPU_INIT_NAME(i8039);*/ break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mcs48); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mcs48); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = mcs48_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mcs48); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mcs48->icount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: /*info->internal_map8 = address_map_program_10bit;*/ break;
@@ -1163,7 +1163,7 @@ static void mcs48_get_info(UINT32 state, cpuinfo *info)
***************************************************************************/
#if (HAS_I8035)
-void i8035_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8035 )
{
switch (state)
{
@@ -1171,13 +1171,13 @@ void i8035_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8035); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8035"); break;
- default: mcs48_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs48); break;
}
}
#endif
#if (HAS_I8041)
-void i8041_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8041 )
{
switch (state)
{
@@ -1186,13 +1186,13 @@ void i8041_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8041); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8041"); break;
- default: mcs48_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs48); break;
}
}
#endif
#if (HAS_I8048)
-void i8048_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8048 )
{
switch (state)
{
@@ -1201,13 +1201,13 @@ void i8048_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8041); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8048"); break;
- default: mcs48_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs48); break;
}
}
#endif
#if (HAS_I8648)
-void i8648_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8648 )
{
switch (state)
{
@@ -1216,13 +1216,13 @@ void i8648_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8041); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8648"); break;
- default: mcs48_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs48); break;
}
}
#endif
#if (HAS_I8748)
-void i8748_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8748 )
{
switch (state)
{
@@ -1231,13 +1231,13 @@ void i8748_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8041); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8748"); break;
- default: mcs48_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs48); break;
}
}
#endif
#if (HAS_MB8884)
-void mb8884_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( mb8884 )
{
switch (state)
{
@@ -1245,13 +1245,13 @@ void mb8884_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8035); break;
case CPUINFO_STR_NAME: strcpy(info->s, "MB8884"); break;
- default: mcs48_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs48); break;
}
}
#endif
#if (HAS_N7751)
-void n7751_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( n7751 )
{
switch (state)
{
@@ -1260,7 +1260,7 @@ void n7751_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_6bit; break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8041); break;
case CPUINFO_STR_NAME: strcpy(info->s, "N7751"); break;
- default: mcs48_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs48); break;
}
}
#endif
@@ -1268,7 +1268,7 @@ void n7751_get_info(UINT32 state, cpuinfo *info)
#if (HAS_I8039)
-void i8039_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8039 )
{
switch (state)
{
@@ -1276,13 +1276,13 @@ void i8039_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_7bit; break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8039); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8039"); break;
- default: mcs48_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs48); break;
}
}
#endif
#if (HAS_I8049)
-void i8049_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8049 )
{
switch (state)
{
@@ -1291,13 +1291,13 @@ void i8049_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_7bit; break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8049); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8049"); break;
- default: mcs48_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs48); break;
}
}
#endif
#if (HAS_I8749)
-void i8749_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8749 )
{
switch (state)
{
@@ -1306,13 +1306,13 @@ void i8749_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_7bit; break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8049); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8749"); break;
- default: mcs48_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs48); break;
}
}
#endif
#if (HAS_M58715)
-void m58715_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( m58715 )
{
switch (state)
{
@@ -1321,7 +1321,7 @@ void m58715_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_7bit; break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8049); break;
case CPUINFO_STR_NAME: strcpy(info->s, "M58715"); break;
- default: mcs48_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs48); break;
}
}
#endif
diff --git a/src/emu/cpu/mcs48/mcs48.h b/src/emu/cpu/mcs48/mcs48.h
index 00c097a0354..0ed3995000e 100644
--- a/src/emu/cpu/mcs48/mcs48.h
+++ b/src/emu/cpu/mcs48/mcs48.h
@@ -72,21 +72,21 @@ enum
***************************************************************************/
/* variants with 64 bytes of internal RAM and up to 1k of internal ROM */
-void i8035_get_info(UINT32 state, cpuinfo *info);
-void i8041_get_info(UINT32 state, cpuinfo *info);
-void i8048_get_info(UINT32 state, cpuinfo *info);
-void i8648_get_info(UINT32 state, cpuinfo *info);
-void i8748_get_info(UINT32 state, cpuinfo *info);
-void mb8884_get_info(UINT32 state, cpuinfo *info);
-void n7751_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i8035 );
+CPU_GET_INFO( i8041 );
+CPU_GET_INFO( i8048 );
+CPU_GET_INFO( i8648 );
+CPU_GET_INFO( i8748 );
+CPU_GET_INFO( mb8884 );
+CPU_GET_INFO( n7751 );
/* variants with 128 bytes of internal RAM and up to 2k of internal ROM */
-void i8039_get_info(UINT32 state, cpuinfo *info);
-void i8049_get_info(UINT32 state, cpuinfo *info);
-void i8749_get_info(UINT32 state, cpuinfo *info);
-void m58715_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i8039 );
+CPU_GET_INFO( i8049 );
+CPU_GET_INFO( i8749 );
+CPU_GET_INFO( m58715 );
/* disassembler */
-offs_t mcs48_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( mcs48 );
#endif /* __I8039_H__ */
diff --git a/src/emu/cpu/mcs48/mcs48dsm.c b/src/emu/cpu/mcs48/mcs48dsm.c
index aad9f7304d2..63b7d978ad3 100644
--- a/src/emu/cpu/mcs48/mcs48dsm.c
+++ b/src/emu/cpu/mcs48/mcs48dsm.c
@@ -203,7 +203,7 @@ static void InitDasm8039(void)
OpInizialized = 1;
}
-offs_t mcs48_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( mcs48 )
{
int b, a, d, r, p; /* these can all be filled in by parsing an instruction */
int i;
diff --git a/src/emu/cpu/mcs51/mcs51.c b/src/emu/cpu/mcs51/mcs51.c
index e203ad74fdd..862426d5e9d 100644
--- a/src/emu/cpu/mcs51/mcs51.c
+++ b/src/emu/cpu/mcs51/mcs51.c
@@ -2413,11 +2413,11 @@ ADDRESS_MAP_END
GENERAL CONTEXT ACCESS
***************************************************************************/
-static void mcs51_get_context(void *dst)
+static CPU_GET_CONTEXT( mcs51 )
{
}
-static void mcs51_set_context(void *src)
+static CPU_SET_CONTEXT( mcs51 )
{
mcs51_regs *mcs51;
@@ -2433,7 +2433,7 @@ static void mcs51_set_context(void *src)
* Generic set_info
**************************************************************************/
-static void mcs51_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( mcs51 )
{
mcs51_regs *mcs51 = token;
@@ -2475,7 +2475,7 @@ static void mcs51_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-static void mcs51_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( mcs51 )
{
mcs51_regs *mcs51 = token;
@@ -2526,15 +2526,15 @@ static void mcs51_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + MCS51_RB: info->i = R_REG(8); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = mcs51_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mcs51_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mcs51_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mcs51); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(mcs51); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(mcs51); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mcs51); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mcs51); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(mcs51); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mcs51); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i8051_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8051); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mcs51->icount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = NULL; break;
@@ -2583,75 +2583,75 @@ static void mcs51_get_info(UINT32 state, cpuinfo *info)
* Specific get_info
**************************************************************************/
-void i8031_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8031 )
{
switch (state)
{
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_7bit; break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8031"); break;
- default: mcs51_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs51); break;
}
/* --- the following bits of info are returned as NULL-terminated strings --- */
}
-void i8051_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8051 )
{
switch (state)
{
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_12bit; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_7bit; break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8051"); break;
- default: mcs51_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs51); break;
}
/* --- the following bits of info are returned as NULL-terminated strings --- */
}
-void i8032_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8032 )
{
switch (state)
{
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8052); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_8bit; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i8052_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8052); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8032"); break;
- default: mcs51_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs51); break;
}
}
-void i8052_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8052 )
{
switch (state)
{
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8052); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_13bit; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_8bit; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i8052_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8052); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8052"); break;
- default: mcs51_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs51); break;
}
}
-void i8751_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8751 )
{
switch (state)
{
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_12bit; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_7bit; break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8751"); break;
- default: mcs51_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs51); break;
}
}
-void i8752_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i8752 )
{
switch (state)
{
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i8052); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_program_13bit; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_8bit; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i8052_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8052); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I8752"); break;
- default: mcs51_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mcs51); break;
}
}
@@ -2659,7 +2659,7 @@ void i8752_get_info(UINT32 state, cpuinfo *info)
* CMOS get_info
**************************************************************************/
-void i80c31_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i80c31 )
{
/* according to PHILIPS datasheet this is a stripped down version
* of i80c52 with 128 bytes internal ram */
@@ -2668,64 +2668,64 @@ void i80c31_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c31); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = NULL; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = address_map_data_7bit; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i80c51_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c51); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I80C31"); break;
- default: i8031_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(i8031); break;
}
}
-void i80c51_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i80c51 )
{
switch (state)
{
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c51); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i80c51_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c51); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I80C51"); break;
- default: i8051_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(i8051); break;
}
}
-void i80c32_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i80c32 )
{
switch (state)
{
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c52); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i80c52_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c52); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I80C32"); break;
- default: i8032_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(i8032); break;
}
}
-void i80c52_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i80c52 )
{
switch (state)
{
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c52); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I80C52"); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i80c52_dasm; break;
- default: i8052_get_info(state, info); break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c52); break;
+ default: CPU_GET_INFO_CALL(i8052); break;
}
}
-void i87c51_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i87c51 )
{
switch (state)
{
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c51); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I87C51"); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i80c51_dasm; break;
- default: i8751_get_info(state, info); break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c51); break;
+ default: CPU_GET_INFO_CALL(i8751); break;
}
}
-void i87c52_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( i87c52 )
{
switch (state)
{
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c52); break;
case CPUINFO_STR_NAME: strcpy(info->s, "I87C52"); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i80c52_dasm; break;
- default: i8752_get_info(state, info); break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c52); break;
+ default: CPU_GET_INFO_CALL(i8752); break;
}
}
@@ -2733,18 +2733,18 @@ void i87c52_get_info(UINT32 state, cpuinfo *info)
* Other variants get_info
**************************************************************************/
-void at89c4051_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( at89c4051 )
{
switch (state)
{
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(i80c51); break;
case CPUINFO_STR_NAME: strcpy(info->s, "AT89C4051"); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = i80c51_dasm; break;
- default: i8051_get_info(state, info); break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c51); break;
+ default: CPU_GET_INFO_CALL(i8051); break;
}
}
-void ds5002fp_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ds5002fp )
{
switch (state)
{
@@ -2754,7 +2754,7 @@ void ds5002fp_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Manuel Abadia"); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = ds5002fp_dasm; break;
- default: i8051_get_info(state, info); break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ds5002fp); break;
+ default: CPU_GET_INFO_CALL(i8051); break;
}
}
diff --git a/src/emu/cpu/mcs51/mcs51.h b/src/emu/cpu/mcs51/mcs51.h
index 06ba1e98595..252bacc5750 100644
--- a/src/emu/cpu/mcs51/mcs51.h
+++ b/src/emu/cpu/mcs51/mcs51.h
@@ -94,30 +94,30 @@ extern void i8051_set_serial_tx_callback(void (*callback)(int data));
extern void i8051_set_serial_rx_callback(int (*callback)(void));
/* variants with no internal rom and 128 byte internal memory */
-void i8031_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i8031 );
/* variants with no internal rom and 256 byte internal memory */
-void i8032_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i8032 );
/* variants 4k internal rom and 128 byte internal memory */
-void i8051_get_info(UINT32 state, cpuinfo *info);
-void i8751_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i8051 );
+CPU_GET_INFO( i8751 );
/* variants 8k internal rom and 256 byte internal memory and more registers */
-void i8052_get_info(UINT32 state, cpuinfo *info);
-void i8752_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i8052 );
+CPU_GET_INFO( i8752 );
/* cmos variants */
-void i80c31_get_info(UINT32 state, cpuinfo *info);
-void i80c51_get_info(UINT32 state, cpuinfo *info);
-void i87c51_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i80c31 );
+CPU_GET_INFO( i80c51 );
+CPU_GET_INFO( i87c51 );
-void i80c32_get_info(UINT32 state, cpuinfo *info);
-void i80c52_get_info(UINT32 state, cpuinfo *info);
-void i87c52_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( i80c32 );
+CPU_GET_INFO( i80c52 );
+CPU_GET_INFO( i87c52 );
/* 4k internal perom and 128 internal ram and 2 analog comparators */
-void at89c4051_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( at89c4051 );
/*
* The DS5002FP has 2 16 bits data address buses (the byte-wide bus and the expanded bus). The exact memory position accessed depends on the
@@ -135,17 +135,17 @@ void at89c4051_get_info(UINT32 state, cpuinfo *info);
* Internal ram 128k and security features
*/
-void ds5002fp_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( ds5002fp );
/****************************************************************************
* Disassembler
****************************************************************************/
-offs_t i8051_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t i80c51_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t i8052_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t i80c52_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t ds5002fp_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( i8051 );
+CPU_DISASSEMBLE( i80c51 );
+CPU_DISASSEMBLE( i8052 );
+CPU_DISASSEMBLE( i80c52 );
+CPU_DISASSEMBLE( ds5002fp );
#endif /* __MCS51_H__ */
diff --git a/src/emu/cpu/mcs51/mcs51dasm.c b/src/emu/cpu/mcs51/mcs51dasm.c
index aca0b7d4cbd..b7f1e01df70 100644
--- a/src/emu/cpu/mcs51/mcs51dasm.c
+++ b/src/emu/cpu/mcs51/mcs51dasm.c
@@ -1154,7 +1154,7 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
}
-offs_t i8051_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( i8051 )
{
static const char *mem_names[0x200];
static int mem_names_initialized = 0;
@@ -1164,10 +1164,10 @@ offs_t i8051_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
init_mem_names( FEATURE_NONE, mem_names);
mem_names_initialized = 1;
}
- return mcs51_dasm(mem_names, dst, pc, oprom, opram);
+ return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
}
-offs_t i8052_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( i8052 )
{
static const char *mem_names[0x200];
static int mem_names_initialized = 0;
@@ -1177,10 +1177,10 @@ offs_t i8052_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
init_mem_names( FEATURE_I8052, mem_names);
mem_names_initialized = 1;
}
- return mcs51_dasm(mem_names, dst, pc, oprom, opram);
+ return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
}
-offs_t i80c51_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( i80c51 )
{
static const char *mem_names[0x200];
static int mem_names_initialized = 0;
@@ -1190,10 +1190,10 @@ offs_t i80c51_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
init_mem_names( FEATURE_CMOS, mem_names);
mem_names_initialized = 1;
}
- return mcs51_dasm(mem_names, dst, pc, oprom, opram);
+ return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
}
-offs_t i80c52_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( i80c52 )
{
static const char *mem_names[0x200];
static int mem_names_initialized = 0;
@@ -1203,10 +1203,10 @@ offs_t i80c52_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
init_mem_names( FEATURE_I8052 | FEATURE_CMOS | FEATURE_I80C52, mem_names);
mem_names_initialized = 1;
}
- return mcs51_dasm(mem_names, dst, pc, oprom, opram);
+ return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
}
-offs_t ds5002fp_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( ds5002fp )
{
static const char *mem_names[0x200];
static int mem_names_initialized = 0;
@@ -1216,5 +1216,5 @@ offs_t ds5002fp_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opra
init_mem_names( FEATURE_DS5002FP | FEATURE_CMOS, mem_names);
mem_names_initialized = 1;
}
- return mcs51_dasm(mem_names, dst, pc, oprom, opram);
+ return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
}
diff --git a/src/emu/cpu/minx/minx.c b/src/emu/cpu/minx/minx.c
index 017c3f20f88..e6f05cd0434 100644
--- a/src/emu/cpu/minx/minx.c
+++ b/src/emu/cpu/minx/minx.c
@@ -349,15 +349,15 @@ void minx_get_info( UINT32 state, cpuinfo *info )
case CPUINFO_INT_REGISTER + MINX_XI:
case CPUINFO_INT_REGISTER + MINX_YI: info->i = minx_get_reg( state - CPUINFO_INT_REGISTER ); break;
case CPUINFO_INT_PREVIOUSPC: info->i = 0x0000; break;
- case CPUINFO_PTR_SET_INFO: info->setinfo = minx_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = minx_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = minx_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(minx); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(minx); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(minx); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(minx); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(minx); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(minx); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(minx); break;
- case CPUINFO_PTR_BURN: info->burn = minx_burn; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = minx_dasm; break;
+ case CPUINFO_PTR_BURN: info->burn = CPU_GET_BURN_NAME(minx); break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(minx); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &minx_icount; break;
case CPUINFO_STR_NAME: strcpy( info->s = cpuintrf_temp_str(), "Minx" ); break;
case CPUINFO_STR_CORE_FAMILY: strcpy( info->s = cpuintrf_temp_str(), "Nintendo Minx" ); break;
diff --git a/src/emu/cpu/minx/minx.h b/src/emu/cpu/minx/minx.h
index 7cb04b4133b..7b4fdd1bc4b 100644
--- a/src/emu/cpu/minx/minx.h
+++ b/src/emu/cpu/minx/minx.h
@@ -15,6 +15,6 @@ enum
MINX_XI, MINX_YI,
};
-extern unsigned minx_dasm( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram );
+extern CPU_DISASSEMBLE( minx );
#endif /* __MINX_H__ */
diff --git a/src/emu/cpu/minx/minxd.c b/src/emu/cpu/minx/minxd.c
index d8490c52afc..52632aab57e 100644
--- a/src/emu/cpu/minx/minxd.c
+++ b/src/emu/cpu/minx/minxd.c
@@ -417,7 +417,8 @@ case M_HL: dst += sprintf( dst, "%c[HL]", fill ); break; \
case OP: dst += sprintf( dst, "%c$%02X", fill, op ); break; \
case OP1: dst += sprintf( dst, "%c$%02X", fill, op1 ); break;
-unsigned minx_dasm( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram ) {
+CPU_DISASSEMBLE( minx )
+{
const minxdasm *instr;
UINT8 op, op1;
INT8 ofs8 = 0;
diff --git a/src/emu/cpu/mips/mips3.c b/src/emu/cpu/mips/mips3.c
index 9041f4950dc..a6c98daf7ab 100644
--- a/src/emu/cpu/mips/mips3.c
+++ b/src/emu/cpu/mips/mips3.c
@@ -244,14 +244,14 @@ static void check_irqs(void)
CORE CALLBACKS
***************************************************************************/
-static void mips3_get_context(void *dst)
+static CPU_GET_CONTEXT( mips3 )
{
if (dst != NULL)
*(mips3_regs *)dst = mips3;
}
-static void mips3_set_context(void *src)
+static CPU_SET_CONTEXT( mips3 )
{
if (src != NULL)
mips3 = *(mips3_regs *)src;
@@ -290,14 +290,14 @@ static CPU_RESET( mips3 )
}
-static int mips3_translate(int space, int intention, offs_t *address)
+static CPU_TRANSLATE( mips3 )
{
/* common translate */
return mips3com_translate_address(&mips3.core, space, intention, address);
}
-offs_t mips3_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( mips3 )
{
/* common disassemble */
return mips3com_dasm(&mips3.core, buffer, pc, oprom, opram);
@@ -2112,14 +2112,14 @@ static void sdr_le(UINT32 op)
GENERIC GET/SET INFO
***************************************************************************/
-static void mips3_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( mips3 )
{
/* everything is handled generically here */
mips3com_set_info(&mips3.core, state, info);
}
-void mips3_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( mips3 )
{
switch (state)
{
@@ -2128,14 +2128,14 @@ void mips3_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_PREVIOUSPC: info->i = mips3.ppc; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = mips3_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mips3_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mips3_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mips3); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(mips3); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(mips3); break;
case CPUINFO_PTR_INIT: /* provided per-CPU */ break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mips3); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mips3); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = mips3_dasm; break;
- case CPUINFO_PTR_TRANSLATE: info->translate = mips3_translate; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mips3); break;
+ case CPUINFO_PTR_TRANSLATE: info->translate = CPU_GET_TRANSLATE_NAME(mips3); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
@@ -2166,7 +2166,7 @@ static CPU_INIT( r4600le )
mips3com_init(&mips3.core, MIPS3_TYPE_R4600, FALSE, index, clock, config, irqcallback, memory);
}
-void r4600be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r4600be )
{
switch (state)
{
@@ -2184,7 +2184,7 @@ void r4600be_get_info(UINT32 state, cpuinfo *info)
}
}
-void r4600le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r4600le )
{
switch (state)
{
@@ -2224,7 +2224,7 @@ static CPU_INIT( r4650le )
mips3com_init(&mips3.core, MIPS3_TYPE_R4650, FALSE, index, clock, config, irqcallback, memory);
}
-void r4650be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r4650be )
{
switch (state)
{
@@ -2242,7 +2242,7 @@ void r4650be_get_info(UINT32 state, cpuinfo *info)
}
}
-void r4650le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r4650le )
{
switch (state)
{
@@ -2282,7 +2282,7 @@ static CPU_INIT( r4700le )
mips3com_init(&mips3.core, MIPS3_TYPE_R4700, FALSE, index, clock, config, irqcallback, memory);
}
-void r4700be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r4700be )
{
switch (state)
{
@@ -2301,7 +2301,7 @@ void r4700be_get_info(UINT32 state, cpuinfo *info)
}
-void r4700le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r4700le )
{
switch (state)
{
@@ -2341,7 +2341,7 @@ static CPU_INIT( r5000le )
mips3com_init(&mips3.core, MIPS3_TYPE_R5000, FALSE, index, clock, config, irqcallback, memory);
}
-void r5000be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r5000be )
{
switch (state)
{
@@ -2359,7 +2359,7 @@ void r5000be_get_info(UINT32 state, cpuinfo *info)
}
}
-void r5000le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r5000le )
{
switch (state)
{
@@ -2399,7 +2399,7 @@ static CPU_INIT( qed5271le )
mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, FALSE, index, clock, config, irqcallback, memory);
}
-void qed5271be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( qed5271be )
{
switch (state)
{
@@ -2417,7 +2417,7 @@ void qed5271be_get_info(UINT32 state, cpuinfo *info)
}
}
-void qed5271le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( qed5271le )
{
switch (state)
{
@@ -2457,7 +2457,7 @@ static CPU_INIT( rm7000le )
mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, FALSE, index, clock, config, irqcallback, memory);
}
-void rm7000be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( rm7000be )
{
switch (state)
{
@@ -2475,7 +2475,7 @@ void rm7000be_get_info(UINT32 state, cpuinfo *info)
}
}
-void rm7000le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( rm7000le )
{
switch (state)
{
diff --git a/src/emu/cpu/mips/mips3.h b/src/emu/cpu/mips/mips3.h
index ef7f990c028..ffc130cb52f 100644
--- a/src/emu/cpu/mips/mips3.h
+++ b/src/emu/cpu/mips/mips3.h
@@ -226,28 +226,28 @@ struct _mips3_config
***************************************************************************/
#if (HAS_R4600)
-void r4600be_get_info(UINT32 state, cpuinfo *info);
-void r4600le_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( r4600be );
+CPU_GET_INFO( r4600le );
#endif
#if (HAS_R4700)
-void r4700be_get_info(UINT32 state, cpuinfo *info);
-void r4700le_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( r4700be );
+CPU_GET_INFO( r4700le );
#endif
#if (HAS_R5000)
-void r5000be_get_info(UINT32 state, cpuinfo *info);
-void r5000le_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( r5000be );
+CPU_GET_INFO( r5000le );
#endif
#if (HAS_QED5271)
-void qed5271be_get_info(UINT32 state, cpuinfo *info);
-void qed5271le_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( qed5271be );
+CPU_GET_INFO( qed5271le );
#endif
#if (HAS_RM7000)
-void rm7000be_get_info(UINT32 state, cpuinfo *info);
-void rm7000le_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( rm7000be );
+CPU_GET_INFO( rm7000le );
#endif
diff --git a/src/emu/cpu/mips/mips3drc.c b/src/emu/cpu/mips/mips3drc.c
index 8293da00a62..35313aa5c1a 100644
--- a/src/emu/cpu/mips/mips3drc.c
+++ b/src/emu/cpu/mips/mips3drc.c
@@ -540,7 +540,7 @@ static CPU_EXIT( mips3 )
current context
-------------------------------------------------*/
-static void mips3_get_context(void *dst)
+static CPU_GET_CONTEXT( mips3 )
{
if (dst != NULL)
*(mips3_state **)dst = mips3;
@@ -552,7 +552,7 @@ static void mips3_get_context(void *dst)
into the global state
-------------------------------------------------*/
-static void mips3_set_context(void *src)
+static CPU_SET_CONTEXT( mips3 )
{
if (src != NULL)
mips3 = *(mips3_state **)src;
@@ -564,7 +564,7 @@ static void mips3_set_context(void *src)
address translation
-------------------------------------------------*/
-static int mips3_translate(int space, int intention, offs_t *address)
+static CPU_TRANSLATE( mips3 )
{
return mips3com_translate_address(mips3, space, intention, address);
}
@@ -574,7 +574,7 @@ static int mips3_translate(int space, int intention, offs_t *address)
mips3_dasm - disassemble an instruction
-------------------------------------------------*/
-static offs_t mips3_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( mips3 )
{
return mips3com_dasm(mips3, buffer, pc, oprom, opram);
}
@@ -585,7 +585,7 @@ static offs_t mips3_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT
CPU instance
-------------------------------------------------*/
-static void mips3_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( mips3 )
{
switch (state)
{
@@ -616,7 +616,7 @@ static void mips3_set_info(UINT32 state, cpuinfo *info)
given CPU instance
-------------------------------------------------*/
-static void mips3_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( mips3 )
{
switch (state)
{
@@ -625,15 +625,15 @@ static void mips3_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = mips3_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mips3_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mips3_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mips3); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(mips3); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(mips3); break;
case CPUINFO_PTR_INIT: /* provided per-CPU */ break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mips3); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(mips3); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mips3); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = mips3_dasm; break;
- case CPUINFO_PTR_TRANSLATE: info->translate = mips3_translate; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mips3); break;
+ case CPUINFO_PTR_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(mips3); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
@@ -3629,7 +3629,7 @@ static CPU_INIT( r4600le )
mips3_init(MIPS3_TYPE_R4600, FALSE, device, index, clock, config, irqcallback);
}
-void r4600be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r4600be )
{
switch (state)
{
@@ -3643,11 +3643,11 @@ void r4600be_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (big)"); break;
/* --- everything else is handled generically --- */
- default: mips3_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
-void r4600le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r4600le )
{
switch (state)
{
@@ -3661,7 +3661,7 @@ void r4600le_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (little)"); break;
/* --- everything else is handled generically --- */
- default: mips3_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
#endif
@@ -3683,7 +3683,7 @@ static CPU_INIT( r4650le )
mips3_init(MIPS3_TYPE_R4650, FALSE, device, index, clock, config, irqcallback);
}
-void r4650be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r4650be )
{
switch (state)
{
@@ -3697,11 +3697,11 @@ void r4650be_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (big)"); break;
/* --- everything else is handled generically --- */
- default: mips3_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
-void r4650le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r4650le )
{
switch (state)
{
@@ -3715,7 +3715,7 @@ void r4650le_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (little)"); break;
/* --- everything else is handled generically --- */
- default: mips3_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
#endif
@@ -3737,7 +3737,7 @@ static CPU_INIT( r4700le )
mips3_init(MIPS3_TYPE_R4700, FALSE, device, index, clock, config, irqcallback);
}
-void r4700be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r4700be )
{
switch (state)
{
@@ -3751,11 +3751,11 @@ void r4700be_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (big)"); break;
/* --- everything else is handled generically --- */
- default: mips3_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
-void r4700le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r4700le )
{
switch (state)
{
@@ -3769,7 +3769,7 @@ void r4700le_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (little)"); break;
/* --- everything else is handled generically --- */
- default: mips3_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
#endif
@@ -3791,7 +3791,7 @@ static CPU_INIT( r5000le )
mips3_init(MIPS3_TYPE_R5000, FALSE, device, index, clock, config, irqcallback);
}
-void r5000be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r5000be )
{
switch (state)
{
@@ -3805,11 +3805,11 @@ void r5000be_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (big)"); break;
/* --- everything else is handled generically --- */
- default: mips3_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
-void r5000le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r5000le )
{
switch (state)
{
@@ -3823,7 +3823,7 @@ void r5000le_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (little)"); break;
/* --- everything else is handled generically --- */
- default: mips3_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
#endif
@@ -3845,7 +3845,7 @@ static CPU_INIT( qed5271le )
mips3_init(MIPS3_TYPE_QED5271, FALSE, device, index, clock, config, irqcallback);
}
-void qed5271be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( qed5271be )
{
switch (state)
{
@@ -3859,11 +3859,11 @@ void qed5271be_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (big)"); break;
/* --- everything else is handled generically --- */
- default: mips3_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
-void qed5271le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( qed5271le )
{
switch (state)
{
@@ -3877,7 +3877,7 @@ void qed5271le_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (little)"); break;
/* --- everything else is handled generically --- */
- default: mips3_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
#endif
@@ -3899,7 +3899,7 @@ static CPU_INIT( rm7000le )
mips3_init(MIPS3_TYPE_RM7000, FALSE, device, index, clock, config, irqcallback);
}
-void rm7000be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( rm7000be )
{
switch (state)
{
@@ -3913,11 +3913,11 @@ void rm7000be_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (big)"); break;
/* --- everything else is handled generically --- */
- default: mips3_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
-void rm7000le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( rm7000le )
{
switch (state)
{
@@ -3931,7 +3931,7 @@ void rm7000le_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (little)"); break;
/* --- everything else is handled generically --- */
- default: mips3_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
#endif
diff --git a/src/emu/cpu/mips/psx.c b/src/emu/cpu/mips/psx.c
index 74cfcbb68cb..29b49f835be 100644
--- a/src/emu/cpu/mips/psx.c
+++ b/src/emu/cpu/mips/psx.c
@@ -2788,7 +2788,7 @@ static CPU_EXECUTE( mips )
return cycles - mips_ICount;
}
-static void mips_get_context( void *dst )
+static CPU_GET_CONTEXT( mips )
{
if( dst )
{
@@ -2796,7 +2796,7 @@ static void mips_get_context( void *dst )
}
}
-static void mips_set_context( void *src )
+static CPU_SET_CONTEXT( mips )
{
if( src )
{
@@ -2904,7 +2904,7 @@ ADDRESS_MAP_END
* Return a formatted string for a register
****************************************************************************/
-static offs_t mips_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( mips )
{
return DasmMIPS( buffer, pc, opram );
}
@@ -3857,7 +3857,7 @@ static void docop2( int gteop )
* Generic set_info
**************************************************************************/
-static void mips_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( mips )
{
switch (state)
{
@@ -3998,7 +3998,7 @@ static void mips_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-static void mips_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( mips )
{
switch (state)
{
@@ -4159,15 +4159,15 @@ static void mips_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + MIPS_CP2CR31: info->i = mipscpu.cp2cr[ 31 ].d; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = mips_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = mips_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = mips_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mips); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(mips); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(mips); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mips); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(mips); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(mips); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(mips); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = mips_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mips); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mips_ICount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = address_map_psxcpu_internal_map; break;
@@ -4310,7 +4310,7 @@ static void mips_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void psxcpu_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( psxcpu )
{
switch (state)
{
@@ -4318,7 +4318,7 @@ void psxcpu_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "PSX CPU"); break;
default:
- mips_get_info(state, info);
+ CPU_GET_INFO_CALL(mips);
break;
}
}
@@ -4326,7 +4326,7 @@ void psxcpu_get_info(UINT32 state, cpuinfo *info)
#if (HAS_CXD8661R)
-void cxd8661r_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( cxd8661r )
{
switch (state)
{
@@ -4336,7 +4336,7 @@ void cxd8661r_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "CXD8661R"); break;
default:
- mips_get_info(state, info);
+ CPU_GET_INFO_CALL(mips);
break;
}
}
diff --git a/src/emu/cpu/mips/psx.h b/src/emu/cpu/mips/psx.h
index 0c8197f7d56..c8361d72e5e 100644
--- a/src/emu/cpu/mips/psx.h
+++ b/src/emu/cpu/mips/psx.h
@@ -208,7 +208,7 @@ enum
extern unsigned DasmMIPS( char *buffer, UINT32 pc, const UINT8 *opram );
#if (HAS_PSXCPU)
-extern void psxcpu_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( psxcpu );
#endif
#endif /* __PSX_H__ */
diff --git a/src/emu/cpu/mips/r3000.c b/src/emu/cpu/mips/r3000.c
index 2ede60b3786..5e42d29cdd1 100644
--- a/src/emu/cpu/mips/r3000.c
+++ b/src/emu/cpu/mips/r3000.c
@@ -314,12 +314,12 @@ static void set_irq_line(r3000_state *r3000, int irqline, int state)
CONTEXT SWITCHING
***************************************************************************/
-static void r3000_get_context(void *dst)
+static CPU_GET_CONTEXT( r3000 )
{
}
-static void r3000_set_context(void *src)
+static CPU_SET_CONTEXT( r3000 )
{
r3000_state *r3000;
@@ -934,7 +934,7 @@ static CPU_EXECUTE( r3000 )
DISASSEMBLY HOOK
***************************************************************************/
-static offs_t r3000_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( r3000 )
{
extern unsigned dasmr3k(char *, unsigned, UINT32);
r3000_state *r3000 = token;
@@ -1160,7 +1160,7 @@ static void swr_le(r3000_state *r3000, UINT32 op)
* Generic set_info
**************************************************************************/
-static void r3000_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( r3000 )
{
r3000_state *r3000 = token;
switch (state)
@@ -1219,7 +1219,7 @@ static void r3000_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-static void r3000_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( r3000 )
{
r3000_state *r3000 = token;
switch (state)
@@ -1294,15 +1294,15 @@ static void r3000_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + R3000_R31: info->i = r3000->r[31]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = r3000_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = r3000_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = r3000_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(r3000); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(r3000); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(r3000); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(r3000); break;
case CPUINFO_PTR_RESET: /* provided per-CPU */ break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(r3000); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(r3000); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = r3000_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(r3000); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &r3000->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -1357,7 +1357,7 @@ static void r3000_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void r3000be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r3000be )
{
switch (state)
{
@@ -1370,12 +1370,12 @@ void r3000be_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "R3000 (big)"); break;
- default: r3000_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(r3000); break;
}
}
-void r3000le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r3000le )
{
switch (state)
{
@@ -1388,12 +1388,12 @@ void r3000le_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "R3000 (little)"); break;
- default: r3000_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(r3000); break;
}
}
-void r3041be_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r3041be )
{
switch (state)
{
@@ -1406,12 +1406,12 @@ void r3041be_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "R3041 (big)"); break;
- default: r3000_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(r3000); break;
}
}
-void r3041le_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( r3041le )
{
switch (state)
{
@@ -1424,6 +1424,6 @@ void r3041le_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "R3041 (little)"); break;
- default: r3000_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(r3000); break;
}
}
diff --git a/src/emu/cpu/mips/r3000.h b/src/emu/cpu/mips/r3000.h
index 2ccd86a9aec..0a55b2a1db2 100644
--- a/src/emu/cpu/mips/r3000.h
+++ b/src/emu/cpu/mips/r3000.h
@@ -60,10 +60,10 @@ struct _r3000_cpu_core
PUBLIC FUNCTIONS
***************************************************************************/
-extern void r3000be_get_info(UINT32 state, cpuinfo *info);
-extern void r3000le_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( r3000be );
+extern CPU_GET_INFO( r3000le );
-extern void r3041be_get_info(UINT32 state, cpuinfo *info);
-extern void r3041le_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( r3041be );
+extern CPU_GET_INFO( r3041le );
#endif /* __R3000_H__ */
diff --git a/src/emu/cpu/nec/nec.c b/src/emu/cpu/nec/nec.c
index b120ab8efb1..73a47871dc8 100644
--- a/src/emu/cpu/nec/nec.c
+++ b/src/emu/cpu/nec/nec.c
@@ -1056,13 +1056,13 @@ static void i_invalid(void)
/*****************************************************************************/
-static void nec_get_context(void *dst)
+static CPU_GET_CONTEXT( nec )
{
if( dst )
*(nec_Regs*)dst = I;
}
-static void nec_set_context(void *src)
+static CPU_SET_CONTEXT( nec )
{
if( src )
{
@@ -1103,7 +1103,7 @@ static void set_poll_line(int state)
I.poll_state = state;
}
-static offs_t nec_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( nec )
{
return necv_dasm_one(buffer, pc, oprom, I.config);
}
@@ -1300,7 +1300,7 @@ static CPU_INIT( v33 )
* Generic set_info
**************************************************************************/
-static void nec_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( nec )
{
switch (state)
{
@@ -1356,7 +1356,7 @@ static void nec_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-static void nec_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( nec )
{
int flags;
@@ -1411,15 +1411,15 @@ static void nec_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + NEC_PENDING: info->i = I.pending_irq; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = nec_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = nec_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = nec_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(nec); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(nec); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(nec); break;
case CPUINFO_PTR_INIT: /* set per-CPU */ break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(nec); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(nec); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(necv); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = nec_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(nec); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &nec_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -1475,7 +1475,7 @@ static void nec_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void v20_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( v20 )
{
switch (state)
{
@@ -1489,7 +1489,7 @@ void v20_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "V20"); break;
- default: nec_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(nec); break;
}
}
#endif
@@ -1500,7 +1500,7 @@ void v20_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void v25_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( v25 )
{
switch (state)
{
@@ -1514,7 +1514,7 @@ void v25_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "V25"); break;
- default: nec_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(nec); break;
}
}
#endif
@@ -1525,7 +1525,7 @@ void v25_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void v30_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( v30 )
{
switch (state)
{
@@ -1535,7 +1535,7 @@ void v30_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "V30"); break;
- default: nec_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(nec); break;
}
}
#endif
@@ -1546,7 +1546,7 @@ void v30_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void v33_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( v33 )
{
switch (state)
{
@@ -1556,7 +1556,7 @@ void v33_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "V33"); break;
- default: nec_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(nec); break;
}
}
#endif
@@ -1567,7 +1567,7 @@ void v33_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void v35_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( v35 )
{
switch (state)
{
@@ -1577,7 +1577,7 @@ void v35_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "V35"); break;
- default: nec_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(nec); break;
}
}
#endif
diff --git a/src/emu/cpu/nec/necintrf.h b/src/emu/cpu/nec/necintrf.h
index 19fa1c60829..552647b51f3 100644
--- a/src/emu/cpu/nec/necintrf.h
+++ b/src/emu/cpu/nec/necintrf.h
@@ -13,8 +13,8 @@ enum
};
/* Public functions */
-extern void v20_get_info(UINT32 state, cpuinfo *info);
-extern void v30_get_info(UINT32 state, cpuinfo *info);
-extern void v33_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( v20 );
+extern CPU_GET_INFO( v30 );
+extern CPU_GET_INFO( v33 );
#endif
diff --git a/src/emu/cpu/pdp1/pdp1.c b/src/emu/cpu/pdp1/pdp1.c
index 555b757f1f2..771e286f4d2 100644
--- a/src/emu/cpu/pdp1/pdp1.c
+++ b/src/emu/cpu/pdp1/pdp1.c
@@ -585,13 +585,13 @@ static CPU_RESET( pdp1 )
/* nothing to do */
}
-static void pdp1_get_context (void *dst)
+static CPU_GET_CONTEXT( pdp1 )
{
if (dst)
*(pdp1_Regs *) dst = pdp1;
}
-static void pdp1_set_context (void *src)
+static CPU_SET_CONTEXT( pdp1 )
{
if (src)
pdp1 = *(pdp1_Regs *) src;
@@ -864,7 +864,7 @@ static CPU_EXECUTE( pdp1 )
}
-static void pdp1_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( pdp1 )
{
switch (state)
{
@@ -930,7 +930,7 @@ static void pdp1_set_info(UINT32 state, cpuinfo *info)
}
-void pdp1_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( pdp1 )
{
switch (state)
{
@@ -1015,15 +1015,15 @@ void pdp1_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + PDP1_IOS: info->i = pdp1.ios; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = pdp1_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = pdp1_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = pdp1_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pdp1); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(pdp1); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(pdp1); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(pdp1); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(pdp1); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(pdp1); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = pdp1_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(pdp1); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &pdp1_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/pdp1/pdp1.h b/src/emu/cpu/pdp1/pdp1.h
index a34a2606c40..bd441a5bc43 100644
--- a/src/emu/cpu/pdp1/pdp1.h
+++ b/src/emu/cpu/pdp1/pdp1.h
@@ -44,7 +44,7 @@ struct _pdp1_reset_param_t
#define IOT_NO_COMPLETION_PULSE -1
/* PUBLIC FUNCTIONS */
-void pdp1_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( pdp1 );
#define READ_PDP_18BIT(A) ((signed)program_read_dword_32be((A)<<2))
#define WRITE_PDP_18BIT(A,V) (program_write_dword_32be((A)<<2,(V)))
@@ -77,6 +77,6 @@ void pdp1_get_info(UINT32 state, cpuinfo *info);
#define IOT 035
#define OPR 037
-unsigned pdp1_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( pdp1 );
#endif /* __PDP1_H__ */
diff --git a/src/emu/cpu/pdp1/pdp1dasm.c b/src/emu/cpu/pdp1/pdp1dasm.c
index dc9aa19f16f..3c0ca1b0d4d 100644
--- a/src/emu/cpu/pdp1/pdp1dasm.c
+++ b/src/emu/cpu/pdp1/pdp1dasm.c
@@ -19,7 +19,7 @@ INLINE void ea (void)
#define IN if (ib) sprintf(buffer+strlen(buffer)," i")
-unsigned pdp1_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( pdp1 )
{
int md;
int etime = 0;
diff --git a/src/emu/cpu/pdp1/tx0.c b/src/emu/cpu/pdp1/tx0.c
index 1774c743d0d..6ed1e6b8951 100644
--- a/src/emu/cpu/pdp1/tx0.c
+++ b/src/emu/cpu/pdp1/tx0.c
@@ -163,13 +163,13 @@ static CPU_RESET( tx0 )
tx0.gbl_cm_sel = 1; /* HACK */
}
-static void tx0_get_context(void *dst)
+static CPU_GET_CONTEXT( tx0 )
{
if (dst)
*(tx0_Regs *) dst = tx0;
}
-static void tx0_set_context(void *src)
+static CPU_SET_CONTEXT( tx0 )
{
if (src)
tx0 = *(tx0_Regs *) src;
@@ -393,7 +393,7 @@ static CPU_EXECUTE( tx0_8kw )
}
-static void tx0_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( tx0 )
{
switch (state)
{
@@ -442,7 +442,7 @@ static void tx0_set_info(UINT32 state, cpuinfo *info)
}
-void tx0_64kw_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( tx0_64kw )
{
switch (state)
{
@@ -510,14 +510,14 @@ void tx0_64kw_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + TX0_IOS: info->i = tx0.ios; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = tx0_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tx0_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tx0_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tx0); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(tx0); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(tx0); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tx0_64kw); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tx0); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tx0_64kw); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tx0_dasm_64kw; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tx0_64kw); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tx0_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -568,7 +568,7 @@ void tx0_64kw_get_info(UINT32 state, cpuinfo *info)
}
}
-void tx0_8kw_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( tx0_8kw )
{
switch (state)
{
@@ -636,14 +636,14 @@ void tx0_8kw_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + TX0_IOS: info->i = tx0.ios; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = tx0_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tx0_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tx0_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tx0); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(tx0); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(tx0); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tx0_8kw); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tx0); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tx0_8kw); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tx0_dasm_8kw; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tx0_8kw); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tx0_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/pdp1/tx0.h b/src/emu/cpu/pdp1/tx0.h
index 17e7a8325f1..109c71720cc 100644
--- a/src/emu/cpu/pdp1/tx0.h
+++ b/src/emu/cpu/pdp1/tx0.h
@@ -44,13 +44,13 @@ struct _tx0_reset_param_t
};
/* PUBLIC FUNCTIONS */
-void tx0_64kw_get_info(UINT32 state, cpuinfo *info);
-void tx0_8kw_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( tx0_64kw );
+CPU_GET_INFO( tx0_8kw );
#define READ_TX0_18BIT(A) ((signed)program_read_dword_32be((A)<<2))
#define WRITE_TX0_18BIT(A,V) (program_write_dword_32be((A)<<2,(V)))
-unsigned tx0_dasm_64kw(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-unsigned tx0_dasm_8kw(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( tx0_64kw );
+CPU_DISASSEMBLE( tx0_8kw );
#endif /* __TX0_H__ */
diff --git a/src/emu/cpu/pdp1/tx0dasm.c b/src/emu/cpu/pdp1/tx0dasm.c
index 46ca60334da..08bf935e4fd 100644
--- a/src/emu/cpu/pdp1/tx0dasm.c
+++ b/src/emu/cpu/pdp1/tx0dasm.c
@@ -2,7 +2,7 @@
#include <string.h>
#include "cpu/pdp1/tx0.h"
-unsigned tx0_dasm_64kw(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( tx0_64kw )
{
int md;
int x;
@@ -28,7 +28,7 @@ unsigned tx0_dasm_64kw(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8
return 1;
}
-unsigned tx0_dasm_8kw(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( tx0_8kw )
{
int md;
int x;
diff --git a/src/emu/cpu/pic16c5x/16c5xdsm.c b/src/emu/cpu/pic16c5x/16c5xdsm.c
index 87e13a51b71..ac36a6918ca 100644
--- a/src/emu/cpu/pic16c5x/16c5xdsm.c
+++ b/src/emu/cpu/pic16c5x/16c5xdsm.c
@@ -150,7 +150,7 @@ static void InitDasm16C5x(void)
OpInizialized = 1;
}
-offs_t pic16C5x_dasm(char *str, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( pic16C5x )
{
int a, b, d, f, k; /* these can all be filled in by parsing an instruction */
int i;
@@ -158,7 +158,7 @@ offs_t pic16C5x_dasm(char *str, offs_t pc, const UINT8 *oprom, const UINT8 *opra
int cnt = 1;
int code;
int bit;
- char *strtmp;
+ char *buffertmp;
const char *cp; /* character pointer in OpFormats */
UINT32 flags = 0;
@@ -184,10 +184,10 @@ offs_t pic16C5x_dasm(char *str, offs_t pc, const UINT8 *oprom, const UINT8 *opra
}
if (op == -1)
{
- sprintf(str,"???? dw %04Xh",code);
+ sprintf(buffer,"???? dw %04Xh",code);
return cnt;
}
- strtmp = str;
+ buffertmp = buffer;
if (Op[op].extcode) /* Actually, theres no double length opcodes */
{
bit = 27;
@@ -244,13 +244,13 @@ offs_t pic16C5x_dasm(char *str, offs_t pc, const UINT8 *oprom, const UINT8 *opra
default:
fatalerror("illegal escape character in format '%s'",Op[op].fmt);
}
- q = num; while (*q) *str++ = *q++;
- *str = '\0';
+ q = num; while (*q) *buffer++ = *q++;
+ *buffer = '\0';
}
else
{
- *str++ = *cp++;
- *str = '\0';
+ *buffer++ = *cp++;
+ *buffer = '\0';
}
}
return cnt | flags | DASMFLAG_SUPPORTED;
diff --git a/src/emu/cpu/pic16c5x/pic16c5x.c b/src/emu/cpu/pic16c5x/pic16c5x.c
index 6a3990ae49e..ab2a959f233 100644
--- a/src/emu/cpu/pic16c5x/pic16c5x.c
+++ b/src/emu/cpu/pic16c5x/pic16c5x.c
@@ -904,7 +904,7 @@ static CPU_EXECUTE( pic16C5x )
* Get all registers in given buffer
****************************************************************************/
-static void pic16C5x_get_context (void *dst)
+static CPU_GET_CONTEXT( pic16C5x )
{
if( dst )
*(pic16C5x_Regs*)dst = R;
@@ -915,7 +915,7 @@ static void pic16C5x_get_context (void *dst)
* Set all registers to given values
****************************************************************************/
-static void pic16C5x_set_context (void *src)
+static CPU_SET_CONTEXT( pic16C5x )
{
if (src)
R = *(pic16C5x_Regs*)src;
@@ -926,7 +926,7 @@ static void pic16C5x_set_context (void *src)
* Generic set_info
**************************************************************************/
-static void pic16C5x_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( pic16C5x )
{
switch (state)
{
@@ -958,7 +958,7 @@ static void pic16C5x_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-static void pic16C5x_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( pic16C5x )
{
switch (state)
{
@@ -1005,15 +1005,15 @@ static void pic16C5x_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + PIC16C5x_FSR: info->i = (R.FSR & picRAMmask); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = pic16C5x_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = pic16C5x_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = pic16C5x_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pic16C5x); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(pic16C5x); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(pic16C5x); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(pic16C5x); break;
case CPUINFO_PTR_RESET: /* set per-CPU */ break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(pic16C5x); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(pic16C5x); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = pic16C5x_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(pic16C5x); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &pic16C5x_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -1094,7 +1094,7 @@ static CPU_RESET( pic16C54 )
* CPU-specific get_info
**************************************************************************/
-void pic16C54_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( pic16C54 )
{
switch (state)
{
@@ -1106,7 +1106,7 @@ void pic16C54_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C54"); break;
- default: pic16C5x_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(pic16C5x); break;
}
}
#endif
@@ -1146,7 +1146,7 @@ static CPU_RESET( pic16C55 )
* CPU-specific get_info
**************************************************************************/
-void pic16C55_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( pic16C55 )
{
switch (state)
{
@@ -1158,7 +1158,7 @@ void pic16C55_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C55"); break;
- default: pic16C5x_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(pic16C5x); break;
}
}
#endif
@@ -1198,7 +1198,7 @@ static CPU_RESET( pic16C56 )
* CPU-specific get_info
**************************************************************************/
-void pic16C56_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( pic16C56 )
{
switch (state)
{
@@ -1212,7 +1212,7 @@ void pic16C56_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C56"); break;
- default: pic16C5x_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(pic16C5x); break;
}
}
#endif
@@ -1255,7 +1255,7 @@ static CPU_RESET( pic16C57 )
* CPU-specific get_info
**************************************************************************/
-void pic16C57_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( pic16C57 )
{
switch (state)
{
@@ -1270,7 +1270,7 @@ void pic16C57_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C57"); break;
- default: pic16C5x_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(pic16C5x); break;
}
}
#endif
@@ -1313,7 +1313,7 @@ static CPU_RESET( pic16C58 )
* CPU-specific get_info
**************************************************************************/
-void pic16C58_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( pic16C58 )
{
switch (state)
{
@@ -1328,7 +1328,7 @@ void pic16C58_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C58"); break;
- default: pic16C5x_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(pic16C5x); break;
}
}
#endif
diff --git a/src/emu/cpu/pic16c5x/pic16c5x.h b/src/emu/cpu/pic16c5x/pic16c5x.h
index a185e5e4520..7bbbabe4210 100644
--- a/src/emu/cpu/pic16c5x/pic16c5x.h
+++ b/src/emu/cpu/pic16c5x/pic16c5x.h
@@ -104,32 +104,32 @@ void pic16c5x_config(int data);
#if (HAS_PIC16C54)
-void pic16C54_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( pic16C54 );
#endif
#if (HAS_PIC16C55)
-void pic16C55_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( pic16C55 );
#endif
#if (HAS_PIC16C56)
-void pic16C56_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( pic16C56 );
#endif
#if (HAS_PIC16C57)
-void pic16C57_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( pic16C57 );
#endif
#if (HAS_PIC16C58)
-void pic16C58_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( pic16C58 );
#endif
#if (HAS_PIC16C54) || (HAS_PIC16C55) || (HAS_PIC16C56) || (HAS_PIC16C57) || (HAS_PIC16C58)
-offs_t pic16C5x_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( pic16C5x );
#endif
diff --git a/src/emu/cpu/powerpc/ppc.c b/src/emu/cpu/powerpc/ppc.c
index d2c52ab0af8..f39f7842bea 100644
--- a/src/emu/cpu/powerpc/ppc.c
+++ b/src/emu/cpu/powerpc/ppc.c
@@ -1706,7 +1706,7 @@ static CPU_EXIT( ppc604 )
-static void ppc_get_context(void *dst)
+static CPU_GET_CONTEXT( ppc )
{
/* copy the context */
if (dst)
@@ -1714,7 +1714,7 @@ static void ppc_get_context(void *dst)
}
-static void ppc_set_context(void *src)
+static CPU_SET_CONTEXT( ppc )
{
/* copy the context */
if (src)
@@ -1727,7 +1727,7 @@ static void ppc_set_context(void *src)
* Generic set_info
**************************************************************************/
-static void ppc_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( ppc )
{
switch (state)
{
@@ -1777,7 +1777,7 @@ static void ppc_set_info(UINT32 state, cpuinfo *info)
}
#if (HAS_PPC403)
-static void ppc403_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( ppc403 )
{
if (state >= CPUINFO_INT_INPUT_STATE && state <= CPUINFO_INT_INPUT_STATE + 8)
{
@@ -1794,7 +1794,7 @@ static void ppc403_set_info(UINT32 state, cpuinfo *info)
#endif
#if (HAS_PPC603)
-static void ppc603_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( ppc603 )
{
if (state >= CPUINFO_INT_INPUT_STATE && state <= CPUINFO_INT_INPUT_STATE + 5)
{
@@ -1810,7 +1810,7 @@ static void ppc603_set_info(UINT32 state, cpuinfo *info)
}
#endif
-static void ppc_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( ppc )
{
switch(state)
{
@@ -1886,10 +1886,10 @@ static void ppc_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = ppc_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = ppc_set_context; break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(ppc); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(ppc); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = ppc_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ppc); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ppc_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -1946,7 +1946,7 @@ static void ppc_get_info(UINT32 state, cpuinfo *info)
}
#if (HAS_PPC403)
-void ppc403_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ppc403 )
{
switch(state)
{
@@ -1957,7 +1957,7 @@ void ppc403_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + PPC_EXISR: info->i = EXISR; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = ppc403_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc403); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc403); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppc403); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ppc403); break;
@@ -1974,7 +1974,7 @@ void ppc403_get_info(UINT32 state, cpuinfo *info)
#endif
#if (HAS_PPC603)
-void ppc603_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ppc603 )
{
switch(state)
{
@@ -1989,14 +1989,14 @@ void ppc603_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + PPC_DEC: info->i = read_decrementer(); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = ppc603_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc603); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc603); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppc603); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ppc603); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break;
- case CPUINFO_PTR_READ: info->read = ppc_read; break;
- case CPUINFO_PTR_WRITE: info->write = ppc_write; break;
- case CPUINFO_PTR_READOP: info->readop = ppc_readop; break;
+ case CPUINFO_PTR_READ: info->read = CPU_GET_READ_NAME(ppc); break;
+ case CPUINFO_PTR_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
+ case CPUINFO_PTR_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
case CPUINFO_PTR_TRANSLATE: info->translate = ppc_translate_address_cb; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -2011,7 +2011,7 @@ void ppc603_get_info(UINT32 state, cpuinfo *info)
/* PowerPC 602 */
#if (HAS_PPC602)
-static void ppc602_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( ppc602 )
{
if (state >= CPUINFO_INT_INPUT_STATE && state <= CPUINFO_INT_INPUT_STATE + 5)
{
@@ -2025,7 +2025,7 @@ static void ppc602_set_info(UINT32 state, cpuinfo *info)
}
}
-void ppc602_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ppc602 )
{
switch(state)
{
@@ -2038,14 +2038,14 @@ void ppc602_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = ppc602_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc602); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc602); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppc602); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ppc602); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc602); break;
- case CPUINFO_PTR_READ: info->read = ppc_read; break;
- case CPUINFO_PTR_WRITE: info->write = ppc_write; break;
- case CPUINFO_PTR_READOP: info->readop = ppc_readop; break;
+ case CPUINFO_PTR_READ: info->read = CPU_GET_READ_NAME(ppc); break;
+ case CPUINFO_PTR_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
+ case CPUINFO_PTR_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
case CPUINFO_PTR_TRANSLATE: info->translate = ppc_translate_address_cb; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -2060,7 +2060,7 @@ void ppc602_get_info(UINT32 state, cpuinfo *info)
/* Motorola MPC8240 */
#if (HAS_MPC8240)
-static void mpc8240_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( mpc8240 )
{
if (state >= CPUINFO_INT_INPUT_STATE && state <= CPUINFO_INT_INPUT_STATE + 5)
{
@@ -2073,7 +2073,7 @@ static void mpc8240_set_info(UINT32 state, cpuinfo *info)
}
}
-void mpc8240_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( mpc8240 )
{
switch(state)
{
@@ -2085,14 +2085,14 @@ void mpc8240_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = mpc8240_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mpc8240); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(mpc8240); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppc603); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(mpc8240); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break;
- case CPUINFO_PTR_READ: info->read = ppc_read; break;
- case CPUINFO_PTR_WRITE: info->write = ppc_write; break;
- case CPUINFO_PTR_READOP: info->readop = ppc_readop; break;
+ case CPUINFO_PTR_READ: info->read = CPU_GET_READ_NAME(ppc); break;
+ case CPUINFO_PTR_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
+ case CPUINFO_PTR_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "MPC8240"); break;
@@ -2105,7 +2105,7 @@ void mpc8240_get_info(UINT32 state, cpuinfo *info)
/* PPC601 */
#if (HAS_PPC601)
-static void ppc601_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( ppc601 )
{
if (state >= CPUINFO_INT_INPUT_STATE && state <= CPUINFO_INT_INPUT_STATE + 5)
{
@@ -2118,7 +2118,7 @@ static void ppc601_set_info(UINT32 state, cpuinfo *info)
}
}
-void ppc601_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ppc601 )
{
switch(state)
{
@@ -2130,14 +2130,14 @@ void ppc601_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = ppc601_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc601); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc601); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppc603); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ppc601); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break;
- case CPUINFO_PTR_READ: info->read = ppc_read; break;
- case CPUINFO_PTR_WRITE: info->write = ppc_write; break;
- case CPUINFO_PTR_READOP: info->readop = ppc_readop; break;
+ case CPUINFO_PTR_READ: info->read = CPU_GET_READ_NAME(ppc); break;
+ case CPUINFO_PTR_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
+ case CPUINFO_PTR_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "PPC601"); break;
@@ -2150,7 +2150,7 @@ void ppc601_get_info(UINT32 state, cpuinfo *info)
/* PPC604 */
#if (HAS_PPC604)
-static void ppc604_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( ppc604 )
{
if (state >= CPUINFO_INT_INPUT_STATE && state <= CPUINFO_INT_INPUT_STATE + 5)
{
@@ -2163,7 +2163,7 @@ static void ppc604_set_info(UINT32 state, cpuinfo *info)
}
}
-void ppc604_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ppc604 )
{
switch(state)
{
@@ -2175,14 +2175,14 @@ void ppc604_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = ppc604_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc604); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc604); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppc603); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ppc604); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break;
- case CPUINFO_PTR_READ: info->read = ppc_read; break;
- case CPUINFO_PTR_WRITE: info->write = ppc_write; break;
- case CPUINFO_PTR_READOP: info->readop = ppc_readop; break;
+ case CPUINFO_PTR_READ: info->read = CPU_GET_READ_NAME(ppc); break;
+ case CPUINFO_PTR_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
+ case CPUINFO_PTR_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "PPC604"); break;
diff --git a/src/emu/cpu/powerpc/ppc.h b/src/emu/cpu/powerpc/ppc.h
index 8d8bda25b05..6aa5c44c964 100644
--- a/src/emu/cpu/powerpc/ppc.h
+++ b/src/emu/cpu/powerpc/ppc.h
@@ -151,39 +151,39 @@ struct _powerpc_config
***************************************************************************/
#if (HAS_PPC403GA)
-void ppc403ga_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( ppc403ga );
#endif
#if (HAS_PPC403GCX)
-void ppc403gcx_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( ppc403gcx );
#endif
#if (HAS_PPC601)
-void ppc601_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( ppc601 );
#endif
#if (HAS_PPC602)
-void ppc602_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( ppc602 );
#endif
#if (HAS_PPC603)
-void ppc603_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( ppc603 );
#endif
#if (HAS_PPC603E)
-void ppc603e_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( ppc603e );
#endif
#if (HAS_PPC603R)
-void ppc603r_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( ppc603r );
#endif
#if (HAS_PPC604)
-void ppc604_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( ppc604 );
#endif
#if (HAS_MPC8240)
-void mpc8240_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( mpc8240 );
#endif
diff --git a/src/emu/cpu/powerpc/ppc_mem.c b/src/emu/cpu/powerpc/ppc_mem.c
index f04b3d73e7b..ebbb1ac76dd 100644
--- a/src/emu/cpu/powerpc/ppc_mem.c
+++ b/src/emu/cpu/powerpc/ppc_mem.c
@@ -371,7 +371,7 @@ static UINT32 ppc_readop_translated(offs_t address)
/***********************************************************************/
-static offs_t ppc_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( ppc )
{
UINT32 op;
op = BIG_ENDIANIZE_INT32(*((UINT32 *) oprom));
@@ -381,7 +381,7 @@ static offs_t ppc_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8
/***********************************************************************/
#if (HAS_PPC601||HAS_PPC602||HAS_PPC603||HAS_PPC604||HAS_MPC8240)
-static int ppc_readop(UINT32 offset, int size, UINT64 *value)
+static CPU_READOP( ppc )
{
if (!(ppc.msr & MSR_IR))
return 0;
@@ -402,7 +402,7 @@ static int ppc_readop(UINT32 offset, int size, UINT64 *value)
return 1;
}
-static int ppc_read(int space, UINT32 offset, int size, UINT64 *value)
+static CPU_READ( ppc )
{
if (!(ppc.msr & MSR_DR))
return 0;
@@ -423,7 +423,7 @@ static int ppc_read(int space, UINT32 offset, int size, UINT64 *value)
return 1;
}
-static int ppc_write(int space, UINT32 offset, int size, UINT64 value)
+static CPU_WRITE( ppc )
{
if (!(ppc.msr & MSR_DR))
return 0;
diff --git a/src/emu/cpu/powerpc/ppcdrc.c b/src/emu/cpu/powerpc/ppcdrc.c
index c8abec59af4..988715edc4a 100644
--- a/src/emu/cpu/powerpc/ppcdrc.c
+++ b/src/emu/cpu/powerpc/ppcdrc.c
@@ -736,7 +736,7 @@ static CPU_EXIT( ppcdrc )
current context
-------------------------------------------------*/
-static void ppcdrc_get_context(void *dst)
+static CPU_GET_CONTEXT( ppcdrc )
{
if (dst != NULL)
*(powerpc_state **)dst = ppc;
@@ -748,7 +748,7 @@ static void ppcdrc_get_context(void *dst)
into the global state
-------------------------------------------------*/
-static void ppcdrc_set_context(void *src)
+static CPU_SET_CONTEXT( ppcdrc )
{
if (src != NULL)
ppc = *(powerpc_state **)src;
@@ -760,7 +760,7 @@ static void ppcdrc_set_context(void *src)
address translation
-------------------------------------------------*/
-static int ppcdrc_translate(int space, int intention, offs_t *address)
+static CPU_TRANSLATE( ppcdrc )
{
return ppccom_translate_address(ppc, space, intention, address);
}
@@ -770,7 +770,7 @@ static int ppcdrc_translate(int space, int intention, offs_t *address)
ppcdrc_dasm - disassemble an instruction
-------------------------------------------------*/
-static offs_t ppcdrc_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( ppcdrc )
{
return ppccom_dasm(ppc, buffer, pc, oprom, opram);
}
@@ -781,7 +781,7 @@ static offs_t ppcdrc_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UIN
CPU instance
-------------------------------------------------*/
-static void ppcdrc_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( ppcdrc )
{
switch (state)
{
@@ -812,7 +812,7 @@ static void ppcdrc_set_info(UINT32 state, cpuinfo *info)
CPU instance
-------------------------------------------------*/
-static void ppcdrc_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( ppcdrc )
{
switch (state)
{
@@ -821,15 +821,15 @@ static void ppcdrc_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = ppcdrc_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = ppcdrc_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = ppcdrc_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppcdrc); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(ppcdrc); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(ppcdrc); break;
case CPUINFO_PTR_INIT: /* provided per-CPU */ break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ppcdrc); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ppcdrc); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppcdrc); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = ppcdrc_dasm; break;
- case CPUINFO_PTR_TRANSLATE: info->translate = ppcdrc_translate; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ppcdrc); break;
+ case CPUINFO_PTR_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(ppcdrc); break;
case CPUINFO_PTR_CONTEXT: info->p = ppc; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -4190,9 +4190,9 @@ static void log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, i
information getter
-------------------------------------------------*/
-static void ppcdrc4xx_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( ppcdrc4xx )
{
- ppcdrc_get_info(state, info);
+ CPU_GET_INFO_CALL(ppcdrc);
ppc4xx_get_info(ppc, state, info);
}
@@ -4202,9 +4202,9 @@ static void ppcdrc4xx_get_info(UINT32 state, cpuinfo *info)
information setter
-------------------------------------------------*/
-static void ppcdrc4xx_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( ppcdrc4xx )
{
- ppcdrc_set_info(state, info);
+ CPU_SET_INFO_CALL(ppcdrc);
ppc4xx_set_info(ppc, state, info);
}
@@ -4229,7 +4229,7 @@ static CPU_INIT( ppc403ga )
information getter
-------------------------------------------------*/
-void ppc403ga_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ppc403ga )
{
switch (state)
{
@@ -4237,13 +4237,13 @@ void ppc403ga_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc403ga); break;
- case CPUINFO_PTR_SET_INFO: info->setinfo = ppcdrc4xx_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppcdrc4xx); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 403GA"); break;
/* --- everything else is handled generically --- */
- default: ppcdrc4xx_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(ppcdrc4xx); break;
}
}
@@ -4268,7 +4268,7 @@ static CPU_INIT( ppc403gcx )
information getter
-------------------------------------------------*/
-void ppc403gcx_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ppc403gcx )
{
switch (state)
{
@@ -4276,13 +4276,13 @@ void ppc403gcx_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ppc403gcx); break;
- case CPUINFO_PTR_SET_INFO: info->setinfo = ppcdrc4xx_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppcdrc4xx); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 403GCX"); break;
/* --- everything else is handled generically --- */
- default: ppcdrc4xx_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(ppcdrc4xx); break;
}
}
@@ -4312,7 +4312,7 @@ static CPU_INIT( ppc601 )
information getter
-------------------------------------------------*/
-void ppc601_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ppc601 )
{
switch (state)
{
@@ -4325,7 +4325,7 @@ void ppc601_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 601"); break;
/* --- everything else is handled generically --- */
- default: ppcdrc_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
@@ -4350,7 +4350,7 @@ static CPU_INIT( ppc602 )
information getter
-------------------------------------------------*/
-void ppc602_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ppc602 )
{
switch (state)
{
@@ -4363,7 +4363,7 @@ void ppc602_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 602"); break;
/* --- everything else is handled generically --- */
- default: ppcdrc_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
@@ -4388,7 +4388,7 @@ static CPU_INIT( ppc603 )
information getter
-------------------------------------------------*/
-void ppc603_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ppc603 )
{
switch (state)
{
@@ -4401,7 +4401,7 @@ void ppc603_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 603"); break;
/* --- everything else is handled generically --- */
- default: ppcdrc_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
@@ -4426,7 +4426,7 @@ static CPU_INIT( ppc603e )
information getter
-------------------------------------------------*/
-void ppc603e_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ppc603e )
{
switch (state)
{
@@ -4439,7 +4439,7 @@ void ppc603e_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 603e"); break;
/* --- everything else is handled generically --- */
- default: ppcdrc_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
@@ -4464,7 +4464,7 @@ static CPU_INIT( ppc603r )
information getter
-------------------------------------------------*/
-void ppc603r_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ppc603r )
{
switch (state)
{
@@ -4477,7 +4477,7 @@ void ppc603r_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 603R"); break;
/* --- everything else is handled generically --- */
- default: ppcdrc_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
@@ -4502,7 +4502,7 @@ static CPU_INIT( ppc604 )
information getter
-------------------------------------------------*/
-void ppc604_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ppc604 )
{
switch (state)
{
@@ -4515,7 +4515,7 @@ void ppc604_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 604"); break;
/* --- everything else is handled generically --- */
- default: ppcdrc_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
@@ -4545,7 +4545,7 @@ static CPU_INIT( mpc8240 )
information getter
-------------------------------------------------*/
-void mpc8240_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( mpc8240 )
{
switch (state)
{
@@ -4558,7 +4558,7 @@ void mpc8240_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC MPC8240"); break;
/* --- everything else is handled generically --- */
- default: ppcdrc_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
diff --git a/src/emu/cpu/rsp/rsp.c b/src/emu/cpu/rsp/rsp.c
index 00e5eb1e01a..d720eee4bf2 100644
--- a/src/emu/cpu/rsp/rsp.c
+++ b/src/emu/cpu/rsp/rsp.c
@@ -2855,7 +2855,7 @@ static CPU_EXECUTE( rsp )
/*****************************************************************************/
-static void rsp_get_context(void *dst)
+static CPU_GET_CONTEXT( rsp )
{
/* copy the context */
if (dst)
@@ -2863,7 +2863,7 @@ static void rsp_get_context(void *dst)
}
-static void rsp_set_context(void *src)
+static CPU_SET_CONTEXT( rsp )
{
/* copy the context */
if (src)
@@ -2873,7 +2873,7 @@ static void rsp_set_context(void *src)
/*****************************************************************************/
-static offs_t rsp_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( rsp )
{
UINT32 op = LITTLE_ENDIANIZE_INT32(*(UINT32 *)opram);
return rsp_dasm_one(buffer, pc, op);
@@ -2881,7 +2881,7 @@ static offs_t rsp_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8
/*****************************************************************************/
-static void rsp_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( rsp )
{
switch (state)
{
@@ -2927,7 +2927,7 @@ static void rsp_set_info(UINT32 state, cpuinfo *info)
}
}
-void rsp_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( rsp )
{
switch(state)
{
@@ -2998,15 +2998,15 @@ void rsp_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + RSP_STEPCNT: info->i = rsp.step_count; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = rsp_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = rsp_set_context; break;
- case CPUINFO_PTR_SET_INFO: info->setinfo = rsp_set_info; break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(rsp); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(rsp); break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(rsp); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(rsp); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(rsp); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(rsp); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(rsp); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = rsp_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(rsp); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &rsp_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/rsp/rsp.h b/src/emu/cpu/rsp/rsp.h
index a78cf528c0b..816028da1c3 100644
--- a/src/emu/cpu/rsp/rsp.h
+++ b/src/emu/cpu/rsp/rsp.h
@@ -69,7 +69,7 @@ enum
#define RSP_STATUS_SIGNAL6 0x2000
#define RSP_STATUS_SIGNAL7 0x4000
-void rsp_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( rsp );
extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
diff --git a/src/emu/cpu/s2650/2650dasm.c b/src/emu/cpu/s2650/2650dasm.c
index 92fb0560c01..c52319cfd5b 100644
--- a/src/emu/cpu/s2650/2650dasm.c
+++ b/src/emu/cpu/s2650/2650dasm.c
@@ -221,10 +221,10 @@ static char *ADR(int pc)
}
/* disassemble one instruction at PC into buff. return byte size of instr */
-offs_t s2650_dasm(char *buff, offs_t PC, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( s2650 )
{
UINT32 flags = 0;
- int pc = PC;
+ int PC = pc;
int op = oprom[0];
int rv = op & 3;
@@ -236,146 +236,146 @@ offs_t s2650_dasm(char *buff, offs_t PC, const UINT8 *oprom, const UINT8 *opram)
{
case 0x00: case 0x01: case 0x02: case 0x03:
#if HJB
- sprintf(buff, "ld r0,r%d", rv);
+ sprintf(buffer, "ld r0,r%d", rv);
#else
- sprintf(buff, "lodz,%d", rv);
+ sprintf(buffer, "lodz,%d", rv);
#endif
break;
case 0x04: case 0x05: case 0x06: case 0x07:
#if HJB
- sprintf(buff, "ld r%d,%s", rv, IMM(pc));
+ sprintf(buffer, "ld r%d,%s", rv, IMM(pc));
#else
- sprintf(buff, "lodi,%d %s", rv, IMM(pc));
+ sprintf(buffer, "lodi,%d %s", rv, IMM(pc));
#endif
pc+=1;
break;
case 0x08: case 0x09: case 0x0a: case 0x0b:
#if HJB
- sprintf(buff, "ld r%d,(%s)", rv, REL(pc));
+ sprintf(buffer, "ld r%d,(%s)", rv, REL(pc));
#else
- sprintf(buff, "lodr,%d %s", rv, REL(pc));
+ sprintf(buffer, "lodr,%d %s", rv, REL(pc));
#endif
pc+=1;
break;
case 0x0c: case 0x0d: case 0x0e: case 0x0f:
#if HJB
- sprintf(buff, "ld %s", ABS(1,rv,pc));
+ sprintf(buffer, "ld %s", ABS(1,rv,pc));
#else
- sprintf(buff, "loda,%s", ABS(1,rv,pc));
+ sprintf(buffer, "loda,%s", ABS(1,rv,pc));
#endif
pc+=2;
break;
case 0x10: case 0x11:
#if HJB
- sprintf(buff, "**** $%02X",op);
+ sprintf(buffer, "**** $%02X",op);
#else
- sprintf(buff, "**** $%02X",op);
+ sprintf(buffer, "**** $%02X",op);
#endif
break;
case 0x12:
#if HJB
- sprintf(buff, "ld psu,r0");
+ sprintf(buffer, "ld psu,r0");
#else
- sprintf(buff, "spsu");
+ sprintf(buffer, "spsu");
#endif
break;
case 0x13:
#if HJB
- sprintf(buff, "ld psl,r0");
+ sprintf(buffer, "ld psl,r0");
#else
- sprintf(buff, "spsl");
+ sprintf(buffer, "spsl");
#endif
break;
case 0x14: case 0x15: case 0x16: case 0x17:
#if HJB
if (rv == 3)
- sprintf(buff, "ret");
+ sprintf(buffer, "ret");
else
- sprintf(buff, "ret %c", cc[rv]);
+ sprintf(buffer, "ret %c", cc[rv]);
#else
- sprintf(buff, "retc %c", cc[rv]);
+ sprintf(buffer, "retc %c", cc[rv]);
#endif
flags = DASMFLAG_STEP_OUT;
break;
case 0x18: case 0x19: case 0x1a: case 0x1b:
#if HJB
if (rv == 3)
- sprintf(buff, "jr %s", REL(pc));
+ sprintf(buffer, "jr %s", REL(pc));
else
- sprintf(buff, "jr %c,%s", cc[rv], REL(pc));
+ sprintf(buffer, "jr %c,%s", cc[rv], REL(pc));
#else
- sprintf(buff, "bctr,%c %s", cc[rv], REL(pc));
+ sprintf(buffer, "bctr,%c %s", cc[rv], REL(pc));
#endif
pc+=1;
break;
case 0x1c: case 0x1d: case 0x1e: case 0x1f:
#if HJB
if (rv == 3)
- sprintf(buff, "jp %s", ADR(pc));
+ sprintf(buffer, "jp %s", ADR(pc));
else
- sprintf(buff, "jp %c,%s", cc[rv], ADR(pc));
+ sprintf(buffer, "jp %c,%s", cc[rv], ADR(pc));
#else
- sprintf(buff, "bcta,%c %s", cc[rv], ADR(pc));
+ sprintf(buffer, "bcta,%c %s", cc[rv], ADR(pc));
#endif
pc+=2;
break;
case 0x20: case 0x21: case 0x22: case 0x23:
#if HJB
- sprintf(buff, "xor r0,r%d", rv);
+ sprintf(buffer, "xor r0,r%d", rv);
#else
- sprintf(buff, "eorz,%d", rv);
+ sprintf(buffer, "eorz,%d", rv);
#endif
break;
case 0x24: case 0x25: case 0x26: case 0x27:
#if HJB
- sprintf(buff, "xor r%d,%s", rv, IMM(pc));
+ sprintf(buffer, "xor r%d,%s", rv, IMM(pc));
#else
- sprintf(buff, "eori,%d %s", rv, IMM(pc));
+ sprintf(buffer, "eori,%d %s", rv, IMM(pc));
#endif
pc+=1;
break;
case 0x28: case 0x29: case 0x2a: case 0x2b:
#if HJB
- sprintf(buff, "xor r%d,(%s)", rv, REL(pc));
+ sprintf(buffer, "xor r%d,(%s)", rv, REL(pc));
#else
- sprintf(buff, "eorr,%d %s", rv, REL(pc));
+ sprintf(buffer, "eorr,%d %s", rv, REL(pc));
#endif
pc+=1;
break;
case 0x2c: case 0x2d: case 0x2e: case 0x2f:
#if HJB
- sprintf(buff, "xor %s", ABS(1,rv,pc));
+ sprintf(buffer, "xor %s", ABS(1,rv,pc));
#else
- sprintf(buff, "eora,%s", ABS(1,rv,pc));
+ sprintf(buffer, "eora,%s", ABS(1,rv,pc));
#endif
pc+=2;
break;
case 0x30: case 0x31: case 0x32: case 0x33:
#if HJB
- sprintf(buff, "in r%d,(ctrl)", rv);
+ sprintf(buffer, "in r%d,(ctrl)", rv);
#else
- sprintf(buff, "redc,%d", rv);
+ sprintf(buffer, "redc,%d", rv);
#endif
break;
case 0x34: case 0x35: case 0x36: case 0x37:
#if HJB
if (rv == 3)
- sprintf(buff, "iret");
+ sprintf(buffer, "iret");
else
- sprintf(buff, "iret %c", cc[rv]);
+ sprintf(buffer, "iret %c", cc[rv]);
#else
- sprintf(buff, "rete %c", cc[rv]);
+ sprintf(buffer, "rete %c", cc[rv]);
#endif
flags = DASMFLAG_STEP_OUT;
break;
case 0x38: case 0x39: case 0x3a: case 0x3b:
#if HJB
if (rv == 3)
- sprintf(buff, "calr %s", REL(pc));
+ sprintf(buffer, "calr %s", REL(pc));
else
- sprintf(buff, "calr %c,%s", cc[rv], REL(pc));
+ sprintf(buffer, "calr %c,%s", cc[rv], REL(pc));
#else
- sprintf(buff, "bstr,%c %s", cc[rv], REL(pc));
+ sprintf(buffer, "bstr,%c %s", cc[rv], REL(pc));
#endif
pc+=1;
flags = DASMFLAG_STEP_OVER;
@@ -383,482 +383,482 @@ offs_t s2650_dasm(char *buff, offs_t PC, const UINT8 *oprom, const UINT8 *opram)
case 0x3c: case 0x3d: case 0x3e: case 0x3f:
#if HJB
if (rv == 3)
- sprintf(buff, "call %s", ADR(pc));
+ sprintf(buffer, "call %s", ADR(pc));
else
- sprintf(buff, "call %c,%s", cc[rv], ADR(pc));
+ sprintf(buffer, "call %c,%s", cc[rv], ADR(pc));
#else
- sprintf(buff, "bsta,%c %s", cc[rv], ADR(pc));
+ sprintf(buffer, "bsta,%c %s", cc[rv], ADR(pc));
#endif
pc+=2;
flags = DASMFLAG_STEP_OVER;
break;
case 0x40:
- sprintf(buff, "halt");
+ sprintf(buffer, "halt");
break;
case 0x41: case 0x42: case 0x43:
#if HJB
- sprintf(buff, "and r0,r%d", rv);
+ sprintf(buffer, "and r0,r%d", rv);
#else
- sprintf(buff, "andz,%d", rv);
+ sprintf(buffer, "andz,%d", rv);
#endif
break;
case 0x44: case 0x45: case 0x46: case 0x47:
#if HJB
- sprintf(buff, "and r%d,%s", rv, IMM(pc));
+ sprintf(buffer, "and r%d,%s", rv, IMM(pc));
#else
- sprintf(buff, "andi,%d %s", rv, IMM(pc));
+ sprintf(buffer, "andi,%d %s", rv, IMM(pc));
#endif
pc+=1;
break;
case 0x48: case 0x49: case 0x4a: case 0x4b:
#if HJB
- sprintf(buff, "and r%d,(%s)", rv, REL(pc));
+ sprintf(buffer, "and r%d,(%s)", rv, REL(pc));
#else
- sprintf(buff, "andr,%d %s", rv, REL(pc));
+ sprintf(buffer, "andr,%d %s", rv, REL(pc));
#endif
pc+=1;
break;
case 0x4c: case 0x4d: case 0x4e: case 0x4f:
#if HJB
- sprintf(buff, "and %s", ABS(1,rv,pc));
+ sprintf(buffer, "and %s", ABS(1,rv,pc));
#else
- sprintf(buff, "anda,%s", ABS(1,rv,pc));
+ sprintf(buffer, "anda,%s", ABS(1,rv,pc));
#endif
pc+=2;
break;
case 0x50: case 0x51: case 0x52: case 0x53:
#if HJB
- sprintf(buff, "ror r%d", rv);
+ sprintf(buffer, "ror r%d", rv);
#else
- sprintf(buff, "rrr,%d", rv);
+ sprintf(buffer, "rrr,%d", rv);
#endif
break;
case 0x54: case 0x55: case 0x56: case 0x57:
#if HJB
- sprintf(buff, "in r%d,(%s)", rv, IMM(pc));
+ sprintf(buffer, "in r%d,(%s)", rv, IMM(pc));
#else
- sprintf(buff, "rede,%d %s", rv, IMM(pc));
+ sprintf(buffer, "rede,%d %s", rv, IMM(pc));
#endif
pc+=1;
break;
case 0x58: case 0x59: case 0x5a: case 0x5b:
#if HJB
- sprintf(buff, "jrnz r%d,%s", rv, REL(pc));
+ sprintf(buffer, "jrnz r%d,%s", rv, REL(pc));
#else
- sprintf(buff, "brnr,%d %s", rv, REL(pc));
+ sprintf(buffer, "brnr,%d %s", rv, REL(pc));
#endif
pc+=1;
break;
case 0x5c: case 0x5d: case 0x5e: case 0x5f:
#if HJB
- sprintf(buff, "jpnz r%d,%s", rv, ADR(pc));
+ sprintf(buffer, "jpnz r%d,%s", rv, ADR(pc));
#else
- sprintf(buff, "brna,%d %s", rv, ADR(pc));
+ sprintf(buffer, "brna,%d %s", rv, ADR(pc));
#endif
pc+=2;
break;
case 0x60: case 0x61: case 0x62: case 0x63:
#if HJB
- sprintf(buff, "or r0,r%d", rv);
+ sprintf(buffer, "or r0,r%d", rv);
#else
- sprintf(buff, "iorz,%d", rv);
+ sprintf(buffer, "iorz,%d", rv);
#endif
break;
case 0x64: case 0x65: case 0x66: case 0x67:
#if HJB
- sprintf(buff, "or r%d,%s", rv, IMM(pc));
+ sprintf(buffer, "or r%d,%s", rv, IMM(pc));
#else
- sprintf(buff, "iori,%d %s", rv, IMM(pc));
+ sprintf(buffer, "iori,%d %s", rv, IMM(pc));
#endif
pc+=1;
break;
case 0x68: case 0x69: case 0x6a: case 0x6b:
#if HJB
- sprintf(buff, "or r%d,(%s)", rv, REL(pc));
+ sprintf(buffer, "or r%d,(%s)", rv, REL(pc));
#else
- sprintf(buff, "iorr,%d %s", rv, REL(pc));
+ sprintf(buffer, "iorr,%d %s", rv, REL(pc));
#endif
pc+=1;
break;
case 0x6c: case 0x6d: case 0x6e: case 0x6f:
#if HJB
- sprintf(buff, "or %s", ABS(1,rv,pc));
+ sprintf(buffer, "or %s", ABS(1,rv,pc));
#else
- sprintf(buff, "iora,%s", ABS(1,rv,pc));
+ sprintf(buffer, "iora,%s", ABS(1,rv,pc));
#endif
pc+=2;
break;
case 0x70: case 0x71: case 0x72: case 0x73:
#if HJB
- sprintf(buff, "in r%d,(data)", rv);
+ sprintf(buffer, "in r%d,(data)", rv);
#else
- sprintf(buff, "redd,%d", rv);
+ sprintf(buffer, "redd,%d", rv);
#endif
break;
case 0x74:
#if HJB
- sprintf(buff, "res psu,%s", IMM_PSU(pc));
+ sprintf(buffer, "res psu,%s", IMM_PSU(pc));
#else
- sprintf(buff, "cpsu %s", IMM_PSU(pc));
+ sprintf(buffer, "cpsu %s", IMM_PSU(pc));
#endif
pc+=1;
break;
case 0x75:
#if HJB
- sprintf(buff, "res psl,%s", IMM_PSL(pc));
+ sprintf(buffer, "res psl,%s", IMM_PSL(pc));
#else
- sprintf(buff, "cpsl %s", IMM_PSL(pc));
+ sprintf(buffer, "cpsl %s", IMM_PSL(pc));
#endif
pc+=1;
break;
case 0x76:
#if HJB
- sprintf(buff, "set psu,%s", IMM_PSU(pc));
+ sprintf(buffer, "set psu,%s", IMM_PSU(pc));
#else
- sprintf(buff, "ppsu %s", IMM_PSU(pc));
+ sprintf(buffer, "ppsu %s", IMM_PSU(pc));
#endif
pc+=1;
break;
case 0x77:
#if HJB
- sprintf(buff, "set psl,%s", IMM_PSL(pc));
+ sprintf(buffer, "set psl,%s", IMM_PSL(pc));
#else
- sprintf(buff, "ppsl %s", IMM_PSL(pc));
+ sprintf(buffer, "ppsl %s", IMM_PSL(pc));
#endif
pc+=1;
break;
case 0x78: case 0x79: case 0x7a: case 0x7b:
#if HJB
- sprintf(buff, "call r%d-nz,%s", rv, REL(pc));
+ sprintf(buffer, "call r%d-nz,%s", rv, REL(pc));
#else
- sprintf(buff, "bsnr,%d %s", rv, REL(pc));
+ sprintf(buffer, "bsnr,%d %s", rv, REL(pc));
#endif
pc+=1;
flags = DASMFLAG_STEP_OVER;
break;
case 0x7c: case 0x7d: case 0x7e: case 0x7f:
#if HJB
- sprintf(buff, "call r%d-nz,%s", rv, ADR(pc));
+ sprintf(buffer, "call r%d-nz,%s", rv, ADR(pc));
#else
- sprintf(buff, "bsna,%d %s", rv, ADR(pc));
+ sprintf(buffer, "bsna,%d %s", rv, ADR(pc));
#endif
pc+=2;
flags = DASMFLAG_STEP_OVER;
break;
case 0x80: case 0x81: case 0x82: case 0x83:
#if HJB
- sprintf(buff, "add r0,r%d", rv);
+ sprintf(buffer, "add r0,r%d", rv);
#else
- sprintf(buff, "addz,%d", rv);
+ sprintf(buffer, "addz,%d", rv);
#endif
break;
case 0x84: case 0x85: case 0x86: case 0x87:
#if HJB
- sprintf(buff, "add r%d,%s", rv, IMM(pc));
+ sprintf(buffer, "add r%d,%s", rv, IMM(pc));
#else
- sprintf(buff, "addi,%d %s", rv, IMM(pc));
+ sprintf(buffer, "addi,%d %s", rv, IMM(pc));
#endif
pc+=1;
break;
case 0x88: case 0x89: case 0x8a: case 0x8b:
#if HJB
- sprintf(buff, "add r%d,(%s)", rv, REL(pc));
+ sprintf(buffer, "add r%d,(%s)", rv, REL(pc));
#else
- sprintf(buff, "addr,%d %s", rv, REL(pc));
+ sprintf(buffer, "addr,%d %s", rv, REL(pc));
#endif
pc+=1;
break;
case 0x8c: case 0x8d: case 0x8e: case 0x8f:
#if HJB
- sprintf(buff, "add %s", ABS(1,rv,pc));
+ sprintf(buffer, "add %s", ABS(1,rv,pc));
#else
- sprintf(buff, "adda,%s", ABS(1,rv,pc));
+ sprintf(buffer, "adda,%s", ABS(1,rv,pc));
#endif
pc+=2;
break;
case 0x90: case 0x91:
#if HJB
- sprintf(buff, "**** $%02X",op);
+ sprintf(buffer, "**** $%02X",op);
#else
- sprintf(buff, "**** $%02X",op);
+ sprintf(buffer, "**** $%02X",op);
#endif
break;
case 0x92:
#if HJB
- sprintf(buff, "ld r0,psu");
+ sprintf(buffer, "ld r0,psu");
#else
- sprintf(buff, "lpsu");
+ sprintf(buffer, "lpsu");
#endif
break;
case 0x93:
#if HJB
- sprintf(buff, "ld r0,psl");
+ sprintf(buffer, "ld r0,psl");
#else
- sprintf(buff, "lpsl");
+ sprintf(buffer, "lpsl");
#endif
break;
case 0x94: case 0x95: case 0x96: case 0x97:
#if HJB
- sprintf(buff, "daa r%d", rv);
+ sprintf(buffer, "daa r%d", rv);
#else
- sprintf(buff, "dar,%d", rv);
+ sprintf(buffer, "dar,%d", rv);
#endif
break;
case 0x98: case 0x99: case 0x9a:
#if HJB
- sprintf(buff, "jr n%c,%s", cc[rv], REL(pc));
+ sprintf(buffer, "jr n%c,%s", cc[rv], REL(pc));
#else
- sprintf(buff, "bcfr,%c %s", cc[rv], REL(pc));
+ sprintf(buffer, "bcfr,%c %s", cc[rv], REL(pc));
#endif
pc+=1;
break;
case 0x9b:
#if HJB
- sprintf(buff, "jr0 %s", REL0(pc));
+ sprintf(buffer, "jr0 %s", REL0(pc));
#else
- sprintf(buff, "zbrr %s", REL0(pc));
+ sprintf(buffer, "zbrr %s", REL0(pc));
#endif
pc+=1;
break;
case 0x9c: case 0x9d: case 0x9e:
#if HJB
- sprintf(buff, "jp n%c,%s", cc[rv], ADR(pc));
+ sprintf(buffer, "jp n%c,%s", cc[rv], ADR(pc));
#else
- sprintf(buff, "bcfa,%c %s", cc[rv], ADR(pc));
+ sprintf(buffer, "bcfa,%c %s", cc[rv], ADR(pc));
#endif
pc+=2;
break;
case 0x9f:
#if HJB
- sprintf(buff, "jp %s+r3", ADR(pc));
+ sprintf(buffer, "jp %s+r3", ADR(pc));
#else
- sprintf(buff, "bxa %s", ADR(pc));
+ sprintf(buffer, "bxa %s", ADR(pc));
#endif
pc+=2;
break;
case 0xa0: case 0xa1: case 0xa2: case 0xa3:
#if HJB
- sprintf(buff, "sub r0,r%d", rv);
+ sprintf(buffer, "sub r0,r%d", rv);
#else
- sprintf(buff, "subz,%d", rv);
+ sprintf(buffer, "subz,%d", rv);
#endif
break;
case 0xa4: case 0xa5: case 0xa6: case 0xa7:
#if HJB
- sprintf(buff, "sub r%d,%s", rv, IMM(pc));
+ sprintf(buffer, "sub r%d,%s", rv, IMM(pc));
#else
- sprintf(buff, "subi,%d %s", rv, IMM(pc));
+ sprintf(buffer, "subi,%d %s", rv, IMM(pc));
#endif
pc+=1;
break;
case 0xa8: case 0xa9: case 0xaa: case 0xab:
#if HJB
- sprintf(buff, "sub r%d,(%s)", rv, REL(pc));
+ sprintf(buffer, "sub r%d,(%s)", rv, REL(pc));
#else
- sprintf(buff, "subr,%d %s", rv, REL(pc));
+ sprintf(buffer, "subr,%d %s", rv, REL(pc));
#endif
pc+=1;
break;
case 0xac: case 0xad: case 0xae: case 0xaf:
#if HJB
- sprintf(buff, "sub %s", ABS(1,rv,pc));
+ sprintf(buffer, "sub %s", ABS(1,rv,pc));
#else
- sprintf(buff, "suba,%s", ABS(1,rv,pc));
+ sprintf(buffer, "suba,%s", ABS(1,rv,pc));
#endif
pc+=2;
break;
case 0xb0: case 0xb1: case 0xb2: case 0xb3:
#if HJB
- sprintf(buff, "out (ctrl),r%d", rv);
+ sprintf(buffer, "out (ctrl),r%d", rv);
#else
- sprintf(buff, "wrtc,%d", rv);
+ sprintf(buffer, "wrtc,%d", rv);
#endif
break;
case 0xb4:
#if HJB
- sprintf(buff, "bit psu,%s", IMM_PSU(pc));
+ sprintf(buffer, "bit psu,%s", IMM_PSU(pc));
#else
- sprintf(buff, "tpsu %s", IMM_PSU(pc));
+ sprintf(buffer, "tpsu %s", IMM_PSU(pc));
#endif
pc+=1;
break;
case 0xb5:
#if HJB
- sprintf(buff, "bit psl,%s", IMM_PSL(pc));
+ sprintf(buffer, "bit psl,%s", IMM_PSL(pc));
#else
- sprintf(buff, "tpsl %s", IMM_PSL(pc));
+ sprintf(buffer, "tpsl %s", IMM_PSL(pc));
#endif
pc+=1;
break;
case 0xb6: case 0xb7:
#if HJB
- sprintf(buff, "**** $%02X",op);
+ sprintf(buffer, "**** $%02X",op);
#else
- sprintf(buff, "**** $%02X",op);
+ sprintf(buffer, "**** $%02X",op);
#endif
break;
case 0xb8: case 0xb9: case 0xba:
#if HJB
- sprintf(buff, "calr n%c,%s", cc[rv], REL(pc));
+ sprintf(buffer, "calr n%c,%s", cc[rv], REL(pc));
#else
- sprintf(buff, "bsfr,%c %s", cc[rv], REL(pc));
+ sprintf(buffer, "bsfr,%c %s", cc[rv], REL(pc));
#endif
pc+=1;
flags = DASMFLAG_STEP_OVER;
break;
case 0xbb:
#if HJB
- sprintf(buff, "cal0 %s", REL0(pc));
+ sprintf(buffer, "cal0 %s", REL0(pc));
#else
- sprintf(buff, "zbsr %s", REL0(pc));
+ sprintf(buffer, "zbsr %s", REL0(pc));
#endif
pc+=1;
flags = DASMFLAG_STEP_OVER;
break;
case 0xbc: case 0xbd: case 0xbe:
#if HJB
- sprintf(buff, "call n%c,%s", cc[rv], ADR(pc));
+ sprintf(buffer, "call n%c,%s", cc[rv], ADR(pc));
#else
- sprintf(buff, "bsfa,%c %s", cc[rv], ADR(pc));
+ sprintf(buffer, "bsfa,%c %s", cc[rv], ADR(pc));
#endif
pc+=2;
flags = DASMFLAG_STEP_OVER;
break;
case 0xbf:
#if HJB
- sprintf(buff, "call %s+r3", ADR(pc));
+ sprintf(buffer, "call %s+r3", ADR(pc));
#else
- sprintf(buff, "bsxa %s", ADR(pc));
+ sprintf(buffer, "bsxa %s", ADR(pc));
#endif
pc+=2;
flags = DASMFLAG_STEP_OVER;
break;
case 0xc0:
- sprintf(buff, "nop");
+ sprintf(buffer, "nop");
break;
case 0xc1: case 0xc2: case 0xc3:
#if HJB
- sprintf(buff, "ld r%d,r0", rv);
+ sprintf(buffer, "ld r%d,r0", rv);
#else
- sprintf(buff, "strz,%d", rv);
+ sprintf(buffer, "strz,%d", rv);
#endif
break;
case 0xc4: case 0xc5: case 0xc6: case 0xc7:
#if HJB
- sprintf(buff, "**** $%02X",op);
+ sprintf(buffer, "**** $%02X",op);
#else
- sprintf(buff, "**** $%02X",op);
+ sprintf(buffer, "**** $%02X",op);
#endif
break;
case 0xc8: case 0xc9: case 0xca: case 0xcb:
#if HJB
- sprintf(buff, "ld (%s),r%d", REL(pc), rv);
+ sprintf(buffer, "ld (%s),r%d", REL(pc), rv);
#else
- sprintf(buff, "strr,%d %s", rv, REL(pc));
+ sprintf(buffer, "strr,%d %s", rv, REL(pc));
#endif
pc+=1;
break;
case 0xcc: case 0xcd: case 0xce: case 0xcf:
#if HJB
- sprintf(buff, "ld %s", ABS(0,rv,pc));
+ sprintf(buffer, "ld %s", ABS(0,rv,pc));
#else
- sprintf(buff, "stra,%s", ABS(1,rv,pc));
+ sprintf(buffer, "stra,%s", ABS(1,rv,pc));
#endif
pc+=2;
break;
case 0xd0: case 0xd1: case 0xd2: case 0xd3:
#if HJB
- sprintf(buff, "rol r%d", rv);
+ sprintf(buffer, "rol r%d", rv);
#else
- sprintf(buff, "rrl,%d", rv);
+ sprintf(buffer, "rrl,%d", rv);
#endif
break;
case 0xd4: case 0xd5: case 0xd6: case 0xd7:
#if HJB
- sprintf(buff, "out (%s),r%d", IMM(pc), rv);
+ sprintf(buffer, "out (%s),r%d", IMM(pc), rv);
#else
- sprintf(buff, "wrte,%d %s", rv, IMM(pc));
+ sprintf(buffer, "wrte,%d %s", rv, IMM(pc));
#endif
pc+=1;
break;
case 0xd8: case 0xd9: case 0xda: case 0xdb:
#if HJB
- sprintf(buff, "ijnz r%d,%s", rv, REL(pc));
+ sprintf(buffer, "ijnz r%d,%s", rv, REL(pc));
#else
- sprintf(buff, "birr,%d %s", rv, REL(pc));
+ sprintf(buffer, "birr,%d %s", rv, REL(pc));
#endif
pc+=1;
flags = DASMFLAG_STEP_OVER;
break;
case 0xdc: case 0xdd: case 0xde: case 0xdf:
#if HJB
- sprintf(buff, "ijnz r%d,%s", rv, ADR(pc));
+ sprintf(buffer, "ijnz r%d,%s", rv, ADR(pc));
#else
- sprintf(buff, "bira,%d %s", rv, ADR(pc));
+ sprintf(buffer, "bira,%d %s", rv, ADR(pc));
#endif
pc+=2;
flags = DASMFLAG_STEP_OVER;
break;
case 0xe0: case 0xe1: case 0xe2: case 0xe3:
#if HJB
- sprintf(buff, "cp r0,%d", rv);
+ sprintf(buffer, "cp r0,%d", rv);
#else
- sprintf(buff, "comz,%d", rv);
+ sprintf(buffer, "comz,%d", rv);
#endif
break;
case 0xe4: case 0xe5: case 0xe6: case 0xe7:
#if HJB
- sprintf(buff, "cp r%d,%s", rv, IMM(pc));
+ sprintf(buffer, "cp r%d,%s", rv, IMM(pc));
#else
- sprintf(buff, "comi,%d %s", rv, IMM(pc));
+ sprintf(buffer, "comi,%d %s", rv, IMM(pc));
#endif
pc+=1;
break;
case 0xe8: case 0xe9: case 0xea: case 0xeb:
#if HJB
- sprintf(buff, "cp r%d,(%s)", rv, REL(pc));
+ sprintf(buffer, "cp r%d,(%s)", rv, REL(pc));
#else
- sprintf(buff, "comr,%d %s", rv, REL(pc));
+ sprintf(buffer, "comr,%d %s", rv, REL(pc));
#endif
pc+=1;
break;
case 0xec: case 0xed: case 0xee: case 0xef:
#if HJB
- sprintf(buff, "cp %s", ABS(1,rv,pc));
+ sprintf(buffer, "cp %s", ABS(1,rv,pc));
#else
- sprintf(buff, "coma,%s", ABS(1,rv,pc));
+ sprintf(buffer, "coma,%s", ABS(1,rv,pc));
#endif
pc+=2;
break;
case 0xf0: case 0xf1: case 0xf2: case 0xf3:
#if HJB
- sprintf(buff, "out (data),r%d", rv);
+ sprintf(buffer, "out (data),r%d", rv);
#else
- sprintf(buff, "wrtd,%d", rv);
+ sprintf(buffer, "wrtd,%d", rv);
#endif
break;
case 0xf4: case 0xf5: case 0xf6: case 0xf7:
#if HJB
- sprintf(buff, "test r%d,%s", rv, IMM(pc));
+ sprintf(buffer, "test r%d,%s", rv, IMM(pc));
#else
- sprintf(buff, "tmi,%d %s", rv, IMM(pc));
+ sprintf(buffer, "tmi,%d %s", rv, IMM(pc));
#endif
pc+=1;
break;
case 0xf8: case 0xf9: case 0xfa: case 0xfb:
#if HJB
- sprintf(buff, "djnz r%d,%s", rv, REL(pc));
+ sprintf(buffer, "djnz r%d,%s", rv, REL(pc));
#else
- sprintf(buff, "bdrr,%d %s", rv, REL(pc));
+ sprintf(buffer, "bdrr,%d %s", rv, REL(pc));
#endif
pc+=1;
flags = DASMFLAG_STEP_OVER;
break;
case 0xfc: case 0xfd: case 0xfe: case 0xff:
#if HJB
- sprintf(buff, "djnz r%d,%s", rv, ADR(pc));
+ sprintf(buffer, "djnz r%d,%s", rv, ADR(pc));
#else
- sprintf(buff, "bdra,%d %s", rv, ADR(pc));
+ sprintf(buffer, "bdra,%d %s", rv, ADR(pc));
#endif
pc+=2;
flags = DASMFLAG_STEP_OVER;
diff --git a/src/emu/cpu/s2650/s2650.c b/src/emu/cpu/s2650/s2650.c
index b3c2c58d487..d778f2d7dab 100644
--- a/src/emu/cpu/s2650/s2650.c
+++ b/src/emu/cpu/s2650/s2650.c
@@ -802,13 +802,13 @@ static CPU_EXIT( s2650 )
/* nothing to do */
}
-static void s2650_get_context(void *dst)
+static CPU_GET_CONTEXT( s2650 )
{
if( dst )
*(s2650_Regs*)dst = S;
}
-static void s2650_set_context(void *src)
+static CPU_SET_CONTEXT( s2650 )
{
if( src )
{
@@ -1479,7 +1479,7 @@ static CPU_EXECUTE( s2650 )
* Generic set_info
**************************************************************************/
-static void s2650_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( s2650 )
{
switch (state)
{
@@ -1515,7 +1515,7 @@ static void s2650_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void s2650_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( s2650 )
{
switch (state)
{
@@ -1565,15 +1565,15 @@ void s2650_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + S2650_FO: info->i = s2650_get_flag(); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = s2650_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = s2650_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = s2650_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(s2650); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(s2650); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(s2650); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(s2650); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(s2650); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(s2650); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(s2650); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = s2650_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(s2650); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &s2650_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/s2650/s2650.h b/src/emu/cpu/s2650/s2650.h
index 2c92c6c82e6..43d0b18d63f 100644
--- a/src/emu/cpu/s2650/s2650.h
+++ b/src/emu/cpu/s2650/s2650.h
@@ -24,8 +24,8 @@ enum
/* Fake Sense Line */
#define S2650_SENSE_PORT 0x102
-extern void s2650_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( s2650 );
-extern offs_t s2650_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( s2650 );
#endif /* __S2650_H__ */
diff --git a/src/emu/cpu/saturn/saturn.c b/src/emu/cpu/saturn/saturn.c
index 3d78a4eff82..e6750e35285 100644
--- a/src/emu/cpu/saturn/saturn.c
+++ b/src/emu/cpu/saturn/saturn.c
@@ -138,13 +138,13 @@ static CPU_RESET( saturn )
change_pc(saturn.pc);
}
-static void saturn_get_context (void *dst)
+static CPU_GET_CONTEXT( saturn )
{
if( dst )
*(Saturn_Regs*)dst = saturn;
}
-static void saturn_set_context (void *src)
+static CPU_SET_CONTEXT( saturn )
{
if( src )
{
@@ -248,7 +248,7 @@ static void IntReg64(Saturn64 r, INT64 d)
}
-static void saturn_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( saturn )
{
switch (state)
{
@@ -303,7 +303,7 @@ static INT64 Reg64Int(Saturn64 r)
return x;
}
-void saturn_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( saturn )
{
switch (state)
{
@@ -365,14 +365,14 @@ void saturn_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + SATURN_SLEEPING: info->i = saturn.sleeping;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = saturn_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = saturn_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = saturn_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(saturn); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(saturn); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(saturn); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(saturn); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(saturn); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(saturn); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = saturn_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(saturn); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &saturn_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/saturn/saturn.h b/src/emu/cpu/saturn/saturn.h
index 002a9d71829..6ad4a96221e 100644
--- a/src/emu/cpu/saturn/saturn.h
+++ b/src/emu/cpu/saturn/saturn.h
@@ -86,8 +86,8 @@ enum
#define SATURN_NMI_LINE 1
#define SATURN_WAKEUP_LINE 2
-unsigned saturn_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( saturn );
-void saturn_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( saturn );
#endif /* __SATURN_H__ */
diff --git a/src/emu/cpu/saturn/saturnds.c b/src/emu/cpu/saturn/saturnds.c
index 4f8254f9d93..d2ad8441cfd 100644
--- a/src/emu/cpu/saturn/saturnds.c
+++ b/src/emu/cpu/saturn/saturnds.c
@@ -1277,7 +1277,7 @@ static const int field_adr_a[]=
static const int field_adr_b[]=
{ FieldP, FieldWP, FieldXS, FieldX, FieldS, FieldM, FieldB, FieldW };
-unsigned saturn_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( saturn )
{
int adr=0;
@@ -1299,7 +1299,7 @@ unsigned saturn_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opra
cont=0;
bin[binsize++]=number_2_hex[op];
bin[binsize]=0;
- sprintf(dst, "???%s",bin);
+ sprintf(buffer, "???%s",bin);
break;
default:
bin[binsize++]=number_2_hex[op];
@@ -1318,7 +1318,7 @@ unsigned saturn_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opra
cont = 0;
bin[binsize++]=number_2_hex[op];
bin[binsize]=0;
- sprintf(dst, "???%s",bin);
+ sprintf(buffer, "???%s",bin);
break;
}
break;
@@ -1326,32 +1326,32 @@ unsigned saturn_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opra
cont=0;
switch (level->adr==AdrNone?adr:level->adr) {
case AdrNone:
- strcpy(dst, mnemonics[level->mnemonic].name[set]);
+ strcpy(buffer, mnemonics[level->mnemonic].name[set]);
break;
case Imm:
- sprintf(dst, mnemonics[level->mnemonic].name[set], oprom[pos++]);
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], oprom[pos++]);
break;
case ImmCount:
- sprintf(dst, mnemonics[level->mnemonic].name[set], oprom[pos++]+1);
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], oprom[pos++]+1);
break;
case AdrImmCount:
- sprintf(dst, mnemonics[level->mnemonic].name[set], field_2_string(adr), oprom[pos++]+1);
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], field_2_string(adr), oprom[pos++]+1);
break;
case AdrCount: // mnemonics have string %s for address field
snprintf(number,sizeof(number),"%x",oprom[pos++]+1);
- sprintf(dst, mnemonics[level->mnemonic].name[set], number);
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], number);
break;
case Imm2:
v=oprom[pos++];
v|=oprom[pos++]<<4;
- sprintf(dst, mnemonics[level->mnemonic].name[set], v);
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], v);
break;
case Imm4:
v=oprom[pos++];
v|=oprom[pos++]<<4;
v|=oprom[pos++]<<8;
v|=oprom[pos++]<<12;
- sprintf(dst, mnemonics[level->mnemonic].name[set], v);
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], v);
break;
case Imm5:
v=oprom[pos++];
@@ -1359,116 +1359,116 @@ unsigned saturn_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opra
v|=oprom[pos++]<<8;
v|=oprom[pos++]<<12;
v|=oprom[pos++]<<16;
- sprintf(dst, mnemonics[level->mnemonic].name[set], v);
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], v);
break;
case ImmCload:
c=i=oprom[pos++] & 0xf;
number[i+1]=0;
for (;i>=0; i--) number[i]=number_2_hex[oprom[pos++] & 0xf];
- sprintf(dst, mnemonics[level->mnemonic].name[set], c+1, number);
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], c+1, number);
break;
case Dis3:
SATURN_PEEKOP_DIS12(v);
c=(pc+pos-3+v)&0xfffff;
- sprintf(dst, mnemonics[level->mnemonic].name[set], c );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], c );
break;
case Dis3Call:
SATURN_PEEKOP_DIS12(v);
c=(pc+pos+v)&0xfffff;
- sprintf(dst, mnemonics[level->mnemonic].name[set], c );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], c );
break;
case Dis4:
SATURN_PEEKOP_DIS16(v);
c=(pc+pos-4+v)&0xfffff;
- sprintf(dst, mnemonics[level->mnemonic].name[set], c );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], c );
break;
case Dis4Call:
SATURN_PEEKOP_DIS16(v);
c=(pc+pos+v)&0xfffff;
- sprintf(dst, mnemonics[level->mnemonic].name[set], c );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], c );
break;
case Abs:
SATURN_PEEKOP_ADR(v);
- sprintf(dst, mnemonics[level->mnemonic].name[set], v );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], v );
break;
case BranchReturn:
SATURN_PEEKOP_DIS8(v);
if (v==0) {
- strcpy(dst, mnemonics[level->mnemonic+1].name[set]);
+ strcpy(buffer, mnemonics[level->mnemonic+1].name[set]);
} else {
c=(pc+pos-2+v)&0xfffff;
- sprintf(dst, mnemonics[level->mnemonic].name[set], c);
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], c);
}
break;
case ABranchReturn:
SATURN_PEEKOP_DIS8(v);
if (v==0) {
- sprintf(dst, mnemonics[level->mnemonic+1].name[set], A);
+ sprintf(buffer, mnemonics[level->mnemonic+1].name[set], A);
} else {
c=(pc+pos-2+v)&0xfffff;
- sprintf(dst, mnemonics[level->mnemonic].name[set], A, c);
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], A, c);
}
break;
case xBranchReturn:
SATURN_PEEKOP_DIS8(v);
if (v==0) {
- sprintf(dst, mnemonics[level->mnemonic+1].name[set], field_2_string(adr));
+ sprintf(buffer, mnemonics[level->mnemonic+1].name[set], field_2_string(adr));
} else {
c=(pc+pos-2+v)&0xfffff;
- sprintf(dst, mnemonics[level->mnemonic].name[set], field_2_string(adr), c);
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], field_2_string(adr), c);
}
break;
case TestBranchRet:
i=oprom[pos++];
SATURN_PEEKOP_DIS8(v);
if (v==0) {
- sprintf(dst, mnemonics[level->mnemonic+1].name[set], i);
+ sprintf(buffer, mnemonics[level->mnemonic+1].name[set], i);
} else {
c=(pc+pos-2+v)&0xfffff;
- sprintf(dst, mnemonics[level->mnemonic].name[set], i, c);
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], i, c);
}
break;
case ImmBranch:
i=oprom[pos++];
SATURN_PEEKOP_DIS8(v);
c=(pc+pos-2+v)&0xfffff;
- sprintf(dst, mnemonics[level->mnemonic].name[set], i, c);
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], i, c);
break;
case FieldP:
- sprintf(dst, mnemonics[level->mnemonic].name[set], P );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], P );
break;
case FieldWP:
- sprintf(dst, mnemonics[level->mnemonic].name[set], WP );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], WP );
break;
case FieldXS:
- sprintf(dst, mnemonics[level->mnemonic].name[set], XS );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], XS );
break;
case FieldX:
- sprintf(dst, mnemonics[level->mnemonic].name[set], X );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], X );
break;
case FieldS:
- sprintf(dst, mnemonics[level->mnemonic].name[set], S );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], S );
break;
case FieldM:
- sprintf(dst, mnemonics[level->mnemonic].name[set], M );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], M );
break;
case FieldB:
- sprintf(dst, mnemonics[level->mnemonic].name[set], B );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], B );
break;
case FieldA:
- sprintf(dst, mnemonics[level->mnemonic].name[set], A );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], A );
break;
case FieldW:
- sprintf(dst, mnemonics[level->mnemonic].name[set], W );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], W );
break;
case AdrA:
- sprintf(dst, mnemonics[level->mnemonic].name[set], adr_a[oprom[pos++] & 0x7] );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], adr_a[oprom[pos++] & 0x7] );
break;
case AdrAF:
- sprintf(dst, mnemonics[level->mnemonic].name[set], adr_af[oprom[pos++] & 0xf] );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], adr_af[oprom[pos++] & 0xf] );
break;
case AdrB:
- sprintf(dst, mnemonics[level->mnemonic].name[set], adr_b[oprom[pos++] & 0x7] );
+ sprintf(buffer, mnemonics[level->mnemonic].name[set], adr_b[oprom[pos++] & 0x7] );
break;
}
break;
diff --git a/src/emu/cpu/sc61860/sc61860.c b/src/emu/cpu/sc61860/sc61860.c
index 4a9e88fc59f..42218bac42e 100644
--- a/src/emu/cpu/sc61860/sc61860.c
+++ b/src/emu/cpu/sc61860/sc61860.c
@@ -92,13 +92,13 @@ static CPU_INIT( sc61860 )
timer_pulse(ATTOTIME_IN_HZ(500), NULL, 0, sc61860_2ms_tick);
}
-static void sc61860_get_context (void *dst)
+static CPU_GET_CONTEXT( sc61860 )
{
if( dst )
*(SC61860_Regs*)dst = sc61860;
}
-static void sc61860_set_context (void *src)
+static CPU_SET_CONTEXT( sc61860 )
{
if( src )
{
@@ -145,7 +145,7 @@ static CPU_EXECUTE( sc61860 )
* Generic set_info
**************************************************************************/
-static void sc61860_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( sc61860 )
{
switch (state)
{
@@ -168,7 +168,7 @@ static void sc61860_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void sc61860_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( sc61860 )
{
switch (state)
{
@@ -207,14 +207,14 @@ void sc61860_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + SC61860_ZERO: info->i = sc61860.zero; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = sc61860_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = sc61860_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = sc61860_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sc61860); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(sc61860); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(sc61860); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(sc61860); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sc61860); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(sc61860); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = sc61860_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sc61860); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sc61860_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/sc61860/sc61860.h b/src/emu/cpu/sc61860/sc61860.h
index 12aa3ef2b5f..2c4011b5658 100644
--- a/src/emu/cpu/sc61860/sc61860.h
+++ b/src/emu/cpu/sc61860/sc61860.h
@@ -51,11 +51,11 @@ struct _sc61860_cpu_core
void (*outc)(int);
};
-unsigned sc61860_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( sc61860 );
/* this is though for power on/off of the sharps */
UINT8 *sc61860_internal_ram(void);
-void sc61860_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( sc61860 );
#endif /* __SC61860_H__ */
diff --git a/src/emu/cpu/sc61860/scdasm.c b/src/emu/cpu/sc61860/scdasm.c
index 422bec9a3b4..768afab12a6 100644
--- a/src/emu/cpu/sc61860/scdasm.c
+++ b/src/emu/cpu/sc61860/scdasm.c
@@ -163,7 +163,7 @@ static const struct { const char *mnemonic; Adr adr; } table[]={
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
};
-unsigned sc61860_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( sc61860 )
{
const UINT8 *base_oprom = oprom;
int oper=*(oprom++);
@@ -172,42 +172,42 @@ unsigned sc61860_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opr
switch(oper&0xc0) {
case 0x80:
- sprintf(dst,"%-6s%.2x",table[oper&0x80].mnemonic, oper&0x3f);
+ sprintf(buffer,"%-6s%.2x",table[oper&0x80].mnemonic, oper&0x3f);
break;
default:
switch(oper&0xe0) {
case 0xe0:
- sprintf(dst,"%-6s%.4x",table[oper&0xe0].mnemonic,
+ sprintf(buffer,"%-6s%.4x",table[oper&0xe0].mnemonic,
*(oprom++)|((oper&0x1f)<<8));
break;
default:
switch (table[oper].adr) {
- case Ill: sprintf(dst,"?%.2x",oper);break;
- case Imp: sprintf(dst,"%s",table[oper].mnemonic); break;
- case Imm: sprintf(dst,"%-6s%.2x",table[oper].mnemonic, *(oprom++)); break;
+ case Ill: sprintf(buffer,"?%.2x",oper);break;
+ case Imp: sprintf(buffer,"%s",table[oper].mnemonic); break;
+ case Imm: sprintf(buffer,"%-6s%.2x",table[oper].mnemonic, *(oprom++)); break;
case ImmW:
adr=(oprom[0]<<8)|oprom[1];oprom+=2;
- sprintf(dst,"%-6s%.4x",table[oper].mnemonic, adr);
+ sprintf(buffer,"%-6s%.4x",table[oper].mnemonic, adr);
break;
case Abs:
adr=(oprom[0]<<8)|oprom[1];oprom+=2;
- sprintf(dst,"%-6s%.4x",table[oper].mnemonic, adr);
+ sprintf(buffer,"%-6s%.4x",table[oper].mnemonic, adr);
break;
case RelM:
adr=pc-*(oprom++);
- sprintf(dst,"%-6s%.4x",table[oper].mnemonic, adr&0xffff);
+ sprintf(buffer,"%-6s%.4x",table[oper].mnemonic, adr&0xffff);
break;
case RelP:
adr=pc+*(oprom++);
- sprintf(dst,"%-6s%.4x",table[oper].mnemonic, adr&0xffff);
+ sprintf(buffer,"%-6s%.4x",table[oper].mnemonic, adr&0xffff);
break;
case Ptc:
t=*(oprom++);
adr=(oprom[0]<<8)|oprom[1];oprom+=2;
- sprintf(dst,"%-6s%.2x,%.4x",table[oper].mnemonic,t, adr);
+ sprintf(buffer,"%-6s%.2x,%.4x",table[oper].mnemonic,t, adr);
break;
case Etc:
- sprintf(dst,"%-6s",table[oper].mnemonic);
+ sprintf(buffer,"%-6s",table[oper].mnemonic);
/*H imm, abs */
/* abs */
break;
diff --git a/src/emu/cpu/se3208/se3208.c b/src/emu/cpu/se3208/se3208.c
index 1dab90ea2f4..38a1d4a7f98 100644
--- a/src/emu/cpu/se3208/se3208.c
+++ b/src/emu/cpu/se3208/se3208.c
@@ -1809,13 +1809,13 @@ static CPU_EXIT( SE3208 )
}
-static void SE3208_get_context(void *dst)
+static CPU_GET_CONTEXT( SE3208 )
{
if(dst)
memcpy(dst,&Context,sizeof(Context));
}
-static void SE3208_set_context(void *src)
+static CPU_SET_CONTEXT( SE3208 )
{
if(src)
memcpy(&Context,src,sizeof(Context));
@@ -1830,7 +1830,7 @@ static void set_irq_line(int line,int state)
}
-static void SE3208_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( SE3208 )
{
switch (state)
{
@@ -1856,7 +1856,7 @@ static void SE3208_set_info(UINT32 state, cpuinfo *info)
}
-void SE3208_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( SE3208 )
{
switch (state)
{
@@ -1903,15 +1903,15 @@ void SE3208_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + SE3208_R7: info->i = Context.R[ 7]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = SE3208_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = SE3208_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = SE3208_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(SE3208); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(SE3208); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(SE3208); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(SE3208); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(SE3208); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(SE3208); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(SE3208);break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = SE3208_Dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(SE3208); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &SE3208_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/se3208/se3208.h b/src/emu/cpu/se3208/se3208.h
index a8b4bb3be49..0d23d7faa68 100644
--- a/src/emu/cpu/se3208/se3208.h
+++ b/src/emu/cpu/se3208/se3208.h
@@ -8,6 +8,6 @@ enum
#define SE3208_INT 0
-extern void SE3208_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( SE3208 );
-offs_t SE3208_Dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( SE3208 );
diff --git a/src/emu/cpu/se3208/se3208dis.c b/src/emu/cpu/se3208/se3208dis.c
index 03b344d0564..1a7299066be 100644
--- a/src/emu/cpu/se3208/se3208dis.c
+++ b/src/emu/cpu/se3208/se3208dis.c
@@ -1400,14 +1400,14 @@ static _OP DecodeOp(UINT16 Opcode)
}
-offs_t SE3208_Dasm(char *Buffer, offs_t PC, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( SE3208 )
{
UINT16 Opcode;
CLRFLAG(FLAG_E);
Context.ER=0;
- Context.PC=PC;
+ Context.PC=pc;
Opcode=oprom[0] | (oprom[1] << 8);
- return 2 | ((*DecodeOp(Opcode))(Opcode,Buffer)) | DASMFLAG_SUPPORTED;
+ return 2 | ((*DecodeOp(Opcode))(Opcode,buffer)) | DASMFLAG_SUPPORTED;
}
diff --git a/src/emu/cpu/sh2/sh2.c b/src/emu/cpu/sh2/sh2.c
index 15c3ef19e77..f1fd4fc5420 100644
--- a/src/emu/cpu/sh2/sh2.c
+++ b/src/emu/cpu/sh2/sh2.c
@@ -2252,20 +2252,20 @@ static CPU_EXECUTE( sh2 )
}
/* Get registers, return context size */
-static void sh2_get_context(void *dst)
+static CPU_GET_CONTEXT( sh2 )
{
if( dst )
*(SH2 **)dst = sh2;
}
/* Set registers */
-static void sh2_set_context(void *src)
+static CPU_SET_CONTEXT( sh2 )
{
if( src )
sh2 = *(SH2 **)src;
}
-static offs_t sh2_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( sh2 )
{
return DasmSH2( buffer, pc, (oprom[0] << 8) | oprom[1] );
}
@@ -2284,7 +2284,7 @@ static CPU_INIT( sh2 )
* Generic set_info
**************************************************************************/
-static void sh2_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( sh2 )
{
switch (state)
{
@@ -2348,7 +2348,7 @@ static void sh2_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void sh2_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( sh2 )
{
switch (state)
{
@@ -2423,14 +2423,14 @@ void sh2_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + SH2_EA: info->i = sh2->ea; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = sh2_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = sh2_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = sh2_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sh2); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(sh2); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(sh2); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(sh2); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sh2); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh2); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = sh2_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh2); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh2_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -2479,7 +2479,7 @@ void sh2_get_info(UINT32 state, cpuinfo *info)
}
}
-void sh1_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( sh1 )
{
switch (state)
{
diff --git a/src/emu/cpu/sh2/sh2.h b/src/emu/cpu/sh2/sh2.h
index a3eed573105..7436b1b24ae 100644
--- a/src/emu/cpu/sh2/sh2.h
+++ b/src/emu/cpu/sh2/sh2.h
@@ -92,7 +92,7 @@ struct _sh2_cpu_core
int (*dma_callback_kludge)(UINT32 src, UINT32 dst, UINT32 data, int size);
};
-extern void sh2_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( sh2 );
WRITE32_HANDLER( sh2_internal_w );
READ32_HANDLER( sh2_internal_r );
diff --git a/src/emu/cpu/sh2/sh2drc.c b/src/emu/cpu/sh2/sh2drc.c
index ad53b40d9ce..40d8270607a 100644
--- a/src/emu/cpu/sh2/sh2drc.c
+++ b/src/emu/cpu/sh2/sh2drc.c
@@ -3288,7 +3288,7 @@ static int generate_group_12(drcuml_block *block, compiler_state *compiler, cons
current context
-------------------------------------------------*/
-static void sh2_get_context(void *dst)
+static CPU_GET_CONTEXT( sh2 )
{
if( dst )
*(SH2 **)dst = sh2;
@@ -3299,7 +3299,7 @@ static void sh2_get_context(void *dst)
into the global state
-------------------------------------------------*/
-static void sh2_set_context(void *src)
+static CPU_SET_CONTEXT( sh2 )
{
if( src )
sh2 = *(SH2 **)src;
@@ -3309,7 +3309,7 @@ static void sh2_set_context(void *src)
sh2_dasm - disassemble an instruction
-------------------------------------------------*/
-static offs_t sh2_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( sh2 )
{
return DasmSH2( buffer, pc, (oprom[0] << 8) | oprom[1] );
}
@@ -3339,7 +3339,7 @@ ADDRESS_MAP_END
CPU instance
-------------------------------------------------*/
-static void sh2_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( sh2 )
{
switch (state)
{
@@ -3407,7 +3407,7 @@ static void sh2_set_info(UINT32 state, cpuinfo *info)
given CPU instance
-------------------------------------------------*/
-void sh2_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( sh2 )
{
switch (state)
{
@@ -3487,15 +3487,15 @@ void sh2_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + SH2_EA: info->i = sh2->ea; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = sh2_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = sh2_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = sh2_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sh2); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(sh2); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(sh2); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(sh2); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sh2); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(sh2); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh2); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = sh2_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh2); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh2->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -3549,7 +3549,7 @@ void sh2_get_info(UINT32 state, cpuinfo *info)
given CPU instance
-------------------------------------------------*/
-void sh1_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( sh1 )
{
switch (state)
{
@@ -3559,7 +3559,7 @@ void sh1_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "SH-1"); break;
- default: sh2_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(sh2); break;
}
}
diff --git a/src/emu/cpu/sh4/sh4.c b/src/emu/cpu/sh4/sh4.c
index fd9c4afa106..64e999f1add 100644
--- a/src/emu/cpu/sh4/sh4.c
+++ b/src/emu/cpu/sh4/sh4.c
@@ -3374,20 +3374,20 @@ static CPU_EXECUTE( sh4 )
}
/* Get registers, return context size */
-static void sh4_get_context(void *dst)
+static CPU_GET_CONTEXT( sh4 )
{
if( dst )
memcpy(dst, &sh4, sizeof(SH4));
}
/* Set registers */
-static void sh4_set_context(void *src)
+static CPU_SET_CONTEXT( sh4 )
{
if( src )
memcpy(&sh4, src, sizeof(SH4));
}
-static offs_t sh4_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( sh4 )
{
return DasmSH4( buffer, pc, (oprom[1] << 8) | oprom[0] );
}
@@ -3478,7 +3478,7 @@ static CPU_INIT( sh4 )
* Generic set_info
**************************************************************************/
-static void sh4_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( sh4 )
{
switch (state)
{
@@ -3640,7 +3640,7 @@ ADDRESS_MAP_END
* Generic get_info
**************************************************************************/
-void sh4_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( sh4 )
{
switch (state)
{
@@ -3705,14 +3705,14 @@ void sh4_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + SH4_EA: info->i = sh4.ea; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = sh4_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = sh4_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = sh4_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sh4); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(sh4); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(sh4); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(sh4); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sh4); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh4); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = sh4_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh4); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh4.sh4_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/sh4/sh4.h b/src/emu/cpu/sh4/sh4.h
index c9956d4494c..769ceb1d9d2 100644
--- a/src/emu/cpu/sh4/sh4.h
+++ b/src/emu/cpu/sh4/sh4.h
@@ -101,7 +101,7 @@ struct sh4_ddt_dma
int mode;
};
-extern void sh4_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( sh4 );
WRITE32_HANDLER( sh4_internal_w );
READ32_HANDLER( sh4_internal_r );
diff --git a/src/emu/cpu/sharc/sharc.c b/src/emu/cpu/sharc/sharc.c
index b1e33cd50d7..c5434bd35df 100644
--- a/src/emu/cpu/sharc/sharc.c
+++ b/src/emu/cpu/sharc/sharc.c
@@ -7,7 +7,7 @@
#include "debugger.h"
#include "deprecat.h"
-static offs_t sharc_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+static CPU_DISASSEMBLE( sharc );
static void sharc_dma_exec(int channel);
static void check_interrupts(void);
@@ -405,7 +405,7 @@ void sharc_external_dma_write(UINT32 address, UINT64 data)
}
}
-static offs_t sharc_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( sharc )
{
UINT64 op = 0;
UINT32 flags = 0;
@@ -598,7 +598,7 @@ static CPU_EXIT( sharc )
/* TODO */
}
-static void sharc_get_context(void *dst)
+static CPU_GET_CONTEXT( sharc )
{
/* copy the context */
if (dst)
@@ -607,7 +607,7 @@ static void sharc_get_context(void *dst)
}
}
-static void sharc_set_context(void *src)
+static CPU_SET_CONTEXT( sharc )
{
/* copy the context */
if (src)
@@ -863,7 +863,7 @@ static CPU_EXECUTE( sharc )
* Generic set_info
**************************************************************************/
-static void sharc_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( sharc )
{
switch (state)
{
@@ -960,7 +960,7 @@ static void sharc_set_info(UINT32 state, cpuinfo *info)
}
#if (HAS_ADSP21062)
-static void adsp21062_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( adsp21062 )
{
if (state >= CPUINFO_INT_INPUT_STATE && state <= CPUINFO_INT_INPUT_STATE + 2)
{
@@ -974,13 +974,13 @@ static void adsp21062_set_info(UINT32 state, cpuinfo *info)
}
switch(state)
{
- default: sharc_set_info(state, info); break;
+ default: CPU_SET_INFO_CALL(sharc); break;
}
}
#endif
-static int sharc_debug_read(int space, UINT32 offset, int size, UINT64 *value)
+static CPU_READ( sharc )
{
if (space == ADDRESS_SPACE_PROGRAM)
{
@@ -1042,7 +1042,7 @@ static int sharc_debug_read(int space, UINT32 offset, int size, UINT64 *value)
return 1;
}
-static int sharc_debug_readop(UINT32 offset, int size, UINT64 *value)
+static CPU_READOP( sharc )
{
UINT64 mask = (size < 8) ? (((UINT64)1 << (8 * size)) - 1) : ~(UINT64)0;
int shift = 8 * (offset & 7);
@@ -1071,7 +1071,7 @@ static ADDRESS_MAP_START( internal_pgm, ADDRESS_SPACE_PROGRAM, 64 )
AM_RANGE(0x20000, 0x7ffff) AM_RAM
ADDRESS_MAP_END
-static void sharc_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( sharc )
{
switch(state)
{
@@ -1203,17 +1203,17 @@ static void sharc_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + SHARC_B15: info->i = sharc.dag2.b[7]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = sharc_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = sharc_set_context; break;
- case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(sharc); break;
- case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sharc); break;
- case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(sharc); break;
- case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(sharc); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(sharc); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(sharc); break;
+ case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(sharc); break;
+ case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sharc); break;
+ case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(sharc); break;
+ case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(sharc);break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = sharc_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sharc); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sharc_icount; break;
- case CPUINFO_PTR_READ: info->read = sharc_debug_read; break;
- case CPUINFO_PTR_READOP: info->readop = sharc_debug_readop; break;
+ case CPUINFO_PTR_READ: info->read = CPU_READ_NAME(sharc); break;
+ case CPUINFO_PTR_READOP: info->readop = CPU_READOP_NAME(sharc); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map64 = address_map_internal_pgm; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -1327,17 +1327,17 @@ static void sharc_get_info(UINT32 state, cpuinfo *info)
}
#if (HAS_ADSP21062)
-void adsp21062_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( adsp21062 )
{
switch(state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = adsp21062_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp21062); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP21062"); break;
- default: sharc_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(sharc); break;
}
}
#endif
diff --git a/src/emu/cpu/sharc/sharc.h b/src/emu/cpu/sharc/sharc.h
index aa16b26e018..9e9a2f6081f 100644
--- a/src/emu/cpu/sharc/sharc.h
+++ b/src/emu/cpu/sharc/sharc.h
@@ -28,7 +28,7 @@ extern void sharc_external_iop_write(UINT32 address, UINT32 data);
extern void sharc_external_dma_write(UINT32 address, UINT64 data);
#if (HAS_ADSP21062)
-void adsp21062_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( adsp21062 );
#endif
extern UINT32 sharc_dasm_one(char *buffer, offs_t pc, UINT64 opcode);
diff --git a/src/emu/cpu/sharc/sharcops.c b/src/emu/cpu/sharc/sharcops.c
index 0a7c5de4c25..28c3a22cde0 100644
--- a/src/emu/cpu/sharc/sharcops.c
+++ b/src/emu/cpu/sharc/sharcops.c
@@ -2748,7 +2748,7 @@ static void sharcop_idle(void)
static void sharcop_unimplemented(void)
{
char dasm[1000];
- sharc_dasm(dasm, sharc.pc, NULL, NULL);
+ CPU_DISASSEMBLE_NAME(sharc)(dasm, sharc.pc, NULL, NULL);
mame_printf_debug("SHARC: %08X: %s\n", sharc.pc, dasm);
fatalerror("SHARC: Unimplemented opcode %04X%08X at %08X", (UINT16)(sharc.opcode >> 32), (UINT32)(sharc.opcode), sharc.pc);
}
diff --git a/src/emu/cpu/sm8500/sm8500.c b/src/emu/cpu/sm8500/sm8500.c
index df09630bc63..ff9936a0cfd 100644
--- a/src/emu/cpu/sm8500/sm8500.c
+++ b/src/emu/cpu/sm8500/sm8500.c
@@ -243,7 +243,7 @@ static CPU_EXECUTE( sm8500 )
return cycles - sm8500_icount;
}
-static void sm8500_burn( int cycles )
+static CPU_BURN( sm8500 )
{
if ( cycles > 0 ) {
/* burn a number of 4 cycles */
@@ -252,11 +252,11 @@ static void sm8500_burn( int cycles )
}
}
-static void sm8500_set_context( void *src )
+static CPU_SET_CONTEXT( sm8500 )
{
}
-static void sm8500_get_context( void *dst )
+static CPU_GET_CONTEXT( sm8500 )
{
}
@@ -372,7 +372,7 @@ static void sm8500_set_irq_line( int irqline, int state )
}
}
-static void sm8500_set_info( UINT32 state, cpuinfo *info )
+static CPU_SET_INFO( sm8500 )
{
switch(state)
{
@@ -424,7 +424,7 @@ static void sm8500_set_info( UINT32 state, cpuinfo *info )
}
}
-void sm8500_get_info( UINT32 state, cpuinfo *info )
+CPU_GET_INFO( sm8500 )
{
switch(state)
{
@@ -491,15 +491,15 @@ void sm8500_get_info( UINT32 state, cpuinfo *info )
case CPUINFO_INT_PREVIOUSPC: info->i = 0x0000; break;
- case CPUINFO_PTR_SET_INFO: info->setinfo = sm8500_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = sm8500_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = sm8500_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sm8500); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(sm8500); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(sm8500); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(sm8500); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(sm8500); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(sm8500); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(sm8500); break;
- case CPUINFO_PTR_BURN: info->burn = sm8500_burn; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = sm8500_dasm; break;
+ case CPUINFO_PTR_BURN: info->burn = CPU_BURN_NAME(sm8500); break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sm8500); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sm8500_icount; break;
case CPUINFO_STR_NAME: strcpy( info->s = cpuintrf_temp_str(), "sm8500" ); break;
diff --git a/src/emu/cpu/sm8500/sm8500.h b/src/emu/cpu/sm8500/sm8500.h
index c5a6b73c4cf..e38f4bb6de6 100644
--- a/src/emu/cpu/sm8500/sm8500.h
+++ b/src/emu/cpu/sm8500/sm8500.h
@@ -35,7 +35,7 @@ enum
extern UINT8* sm8500_internal_ram( void ) ;
extern unsigned sm8500_get_reg( int regnum );
-extern void sm8500_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( sm8500 );
UINT8 sm85cpu_mem_readbyte( UINT32 offset );
void sm85cpu_mem_writebyte( UINT32 offset, UINT8 data );
@@ -53,6 +53,6 @@ INLINE void sm85cpu_mem_writeword( UINT32 address, UINT16 value )
sm85cpu_mem_writebyte( ( address + 1 ) & 0xffff, value & 0xff );
}
-extern unsigned sm8500_dasm( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram );
+extern CPU_DISASSEMBLE( sm8500 );
#endif /* __SM8500_H__ */
diff --git a/src/emu/cpu/sm8500/sm8500d.c b/src/emu/cpu/sm8500/sm8500d.c
index bd84f860f62..1a7ab4e9237 100644
--- a/src/emu/cpu/sm8500/sm8500d.c
+++ b/src/emu/cpu/sm8500/sm8500d.c
@@ -171,7 +171,7 @@ static const sm8500dasm mnemonic[256] = {
};
-unsigned sm8500_dasm( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram )
+CPU_DISASSEMBLE( sm8500 )
{
const sm8500dasm *instr;
char *dst;
diff --git a/src/emu/cpu/spc700/spc700.c b/src/emu/cpu/spc700/spc700.c
index 4c6aaeede08..e7eade3d743 100644
--- a/src/emu/cpu/spc700/spc700.c
+++ b/src/emu/cpu/spc700/spc700.c
@@ -1290,24 +1290,18 @@ CPU_EXIT( spc700 )
/* Get the current CPU context */
-unsigned spc700_get_context(void *dst_context)
+CPU_GET_CONTEXT( spc700 )
{
- if(dst_context)
- *(spc700i_cpu_struct*)dst_context = spc700i_cpu;
- return sizeof(spc700i_cpu);
-}
-
-static void spc700_get_context_mame(void *dst_context)
-{
- spc700_get_context(dst_context);
+ if(dst)
+ *(spc700i_cpu_struct*)dst = spc700i_cpu;
}
/* Set the current CPU context */
-void spc700_set_context(void *src_context)
+CPU_SET_CONTEXT( spc700 )
{
- if(src_context)
+ if(src)
{
- spc700i_cpu = *(spc700i_cpu_struct*)src_context;
+ spc700i_cpu = *(spc700i_cpu_struct*)src;
JUMP(REG_PC);
}
}
@@ -1715,7 +1709,7 @@ CPU_EXECUTE( spc700 )
* Generic set_info
**************************************************************************/
-static void spc700_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( spc700 )
{
switch (state)
{
@@ -1740,7 +1734,7 @@ static void spc700_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void spc700_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( spc700 )
{
uint p = ((spc700i_cpu.flag_n & 0x80) |
((spc700i_cpu.flag_v & 0x80) >> 1) |
@@ -1789,15 +1783,15 @@ void spc700_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + SPC700_Y: info->i = REG_Y; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = spc700_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = spc700_get_context_mame; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = spc700_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(spc700); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(spc700); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(spc700); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(spc700); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(spc700); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(spc700); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(spc700); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = spc700_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(spc700); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &spc700_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/spc700/spc700.h b/src/emu/cpu/spc700/spc700.h
index 78f6da2caf1..7b3e5426bc8 100644
--- a/src/emu/cpu/spc700/spc700.h
+++ b/src/emu/cpu/spc700/spc700.h
@@ -53,7 +53,7 @@ CPU_EXIT( spc700 );
unsigned spc700_get_context(void *dst);
/* Set the current CPU context */
-void spc700_set_context(void *src);
+CPU_SET_CONTEXT( spc700 );
/* Get the current Program Counter */
unsigned spc700_get_pc(void);
@@ -130,7 +130,7 @@ void spc700_branching(unsigned int new_pc);
#include "cpuintrf.h"
-extern void spc700_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( spc700 );
#define spc700_read_8(addr) program_read_byte_8le(addr)
#define spc700_write_8(addr,data) program_write_byte_8le(addr,data)
diff --git a/src/emu/cpu/spc700/spc700ds.c b/src/emu/cpu/spc700/spc700ds.c
index 690b6f44732..af4cbf7d684 100644
--- a/src/emu/cpu/spc700/spc700ds.c
+++ b/src/emu/cpu/spc700/spc700ds.c
@@ -344,7 +344,7 @@ INLINE unsigned int read_16_immediate(void)
return result | (*rombase++ << 8);
}
-offs_t spc700_dasm(char *buff, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( spc700 )
{
const opcode_struct* opcode;
UINT32 flags = 0;
@@ -356,8 +356,8 @@ offs_t spc700_dasm(char *buff, offs_t pc, const UINT8 *oprom, const UINT8 *opram
rombase = oprom;
opcode = g_opcodes + read_8_immediate();
- sprintf(buff, "%s ", g_opnames[opcode->name]);
- ptr = buff + strlen(buff);
+ sprintf(buffer, "%s ", g_opnames[opcode->name]);
+ ptr = buffer + strlen(buffer);
if (opcode->name == CALL)
flags = DASMFLAG_STEP_OVER;
diff --git a/src/emu/cpu/spc700/spc700ds.h b/src/emu/cpu/spc700/spc700ds.h
index 0129de7e0ca..e231273f8d0 100644
--- a/src/emu/cpu/spc700/spc700ds.h
+++ b/src/emu/cpu/spc700/spc700ds.h
@@ -21,7 +21,7 @@ author (Karl Stenerud) at karl@higashiyama-unet.ocn.ne.jp.
#include "cpuintrf.h"
-offs_t spc700_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( spc700 );
#define spc700_read_8_disassembler(addr) program_read_byte_8(addr)
diff --git a/src/emu/cpu/ssp1601/ssp1601.c b/src/emu/cpu/ssp1601/ssp1601.c
index 315fdfa8907..bb86d2a7cd4 100644
--- a/src/emu/cpu/ssp1601/ssp1601.c
+++ b/src/emu/cpu/ssp1601/ssp1601.c
@@ -743,28 +743,28 @@ static CPU_EXECUTE( ssp1601 )
* MAME interface
**************************************************************************/
-static void ssp1601_get_context(void *regs)
+static CPU_GET_CONTEXT( ssp1601 )
{
/* copy the context */
- if (regs)
- *(ssp1601_regs *)regs = ssp1601;
+ if (dst)
+ *(ssp1601_regs *)dst = ssp1601;
}
-static void ssp1601_set_context(void *regs)
+static CPU_SET_CONTEXT( ssp1601 )
{
/* copy the context */
- if (regs)
- ssp1601 = *(ssp1601_regs *)regs;
+ if (src)
+ ssp1601 = *(ssp1601_regs *)src;
}
-static offs_t ssp1601_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( ssp1601 )
{
return dasm_ssp1601(buffer, pc, oprom);
}
#if (HAS_SSP1601)
-static void ssp1601_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( ssp1601 )
{
switch (state)
{
@@ -803,7 +803,7 @@ static void ssp1601_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void ssp1601_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( ssp1601 )
{
switch (state)
{
@@ -858,15 +858,15 @@ void ssp1601_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + SSP_PR7: info->i = ssp1601.r[7]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = ssp1601_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = ssp1601_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = ssp1601_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ssp1601); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(ssp1601); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(ssp1601); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(ssp1601); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(ssp1601); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(ssp1601); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(ssp1601); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = ssp1601_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ssp1601); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &g_cycles; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map16 = NULL; break;
diff --git a/src/emu/cpu/ssp1601/ssp1601.h b/src/emu/cpu/ssp1601/ssp1601.h
index 60700d3aa1b..60384f064a1 100644
--- a/src/emu/cpu/ssp1601/ssp1601.h
+++ b/src/emu/cpu/ssp1601/ssp1601.h
@@ -17,7 +17,7 @@ enum
};
#if (HAS_SSP1601)
-void ssp1601_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( ssp1601 );
#endif
extern unsigned dasm_ssp1601(char *buffer, unsigned pc, const UINT8 *oprom);
diff --git a/src/emu/cpu/t11/t11.c b/src/emu/cpu/t11/t11.c
index 47aee0531e2..4e0d312f478 100644
--- a/src/emu/cpu/t11/t11.c
+++ b/src/emu/cpu/t11/t11.c
@@ -255,7 +255,7 @@ static void t11_check_irqs(void)
*
*************************************/
-static void t11_get_context(void *dst)
+static CPU_GET_CONTEXT( t11 )
{
if (dst)
*(t11_Regs *)dst = t11;
@@ -269,7 +269,7 @@ static void t11_get_context(void *dst)
*
*************************************/
-static void t11_set_context(void *src)
+static CPU_SET_CONTEXT( t11 )
{
if (src)
t11 = *(t11_Regs *)src;
@@ -421,7 +421,7 @@ getout:
* Generic set_info
**************************************************************************/
-static void t11_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( t11 )
{
switch (state)
{
@@ -451,7 +451,7 @@ static void t11_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void t11_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( t11 )
{
switch (state)
{
@@ -497,15 +497,15 @@ void t11_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + T11_R5: info->i = REGD(5); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = t11_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = t11_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = t11_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(t11); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(t11); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(t11); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(t11); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(t11); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(t11); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(t11); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = t11_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(t11); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &t11_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/t11/t11.h b/src/emu/cpu/t11/t11.h
index a05968d1be3..dbb8dcb1810 100644
--- a/src/emu/cpu/t11/t11.h
+++ b/src/emu/cpu/t11/t11.h
@@ -33,7 +33,7 @@ struct t11_setup
};
-extern void t11_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( t11 );
/****************************************************************************/
/* Read a byte from given memory location */
@@ -47,6 +47,6 @@ extern void t11_get_info(UINT32 state, cpuinfo *info);
#define T11_WRMEM(A,V) (program_write_byte_16le(A,V))
#define T11_WRMEM_WORD(A,V) (program_write_word_16le(A,V))
-offs_t t11_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( t11 );
#endif /* __T11_H__ */
diff --git a/src/emu/cpu/t11/t11dasm.c b/src/emu/cpu/t11/t11dasm.c
index f2331c434cc..2cd615268f7 100644
--- a/src/emu/cpu/t11/t11dasm.c
+++ b/src/emu/cpu/t11/t11dasm.c
@@ -83,7 +83,7 @@ static unsigned MakeEA (char **ea, int lo, unsigned pc, int width)
}
-offs_t t11_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( t11 )
{
char *ea1, *ea2;
unsigned PC = pc;
diff --git a/src/emu/cpu/tlcs90/tlcs90.c b/src/emu/cpu/tlcs90/tlcs90.c
index 4c5cc5deff2..0cf8e7b3a60 100644
--- a/src/emu/cpu/tlcs90/tlcs90.c
+++ b/src/emu/cpu/tlcs90/tlcs90.c
@@ -989,21 +989,21 @@ static int sprint_arg(char *buffer, UINT32 pc, const char *pre, const e_mode mod
return 0;
}
-unsigned t90_dasm(char *buffer, UINT32 oldpc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( t90 )
{
int len;
- addr = oldpc;
+ addr = pc;
decode();
op &= ~OP_16;
buffer += sprintf ( buffer, "%-5s", op_names[ op ] ); // strlen("callr") == 5
- len = sprint_arg ( buffer, oldpc, " ", mode1, r1, r1b );
+ len = sprint_arg ( buffer, pc, " ", mode1, r1, r1b );
buffer += len;
- buffer += sprint_arg ( buffer, oldpc, (len>1)?",":"", mode2, r2, r2b );
+ buffer += sprint_arg ( buffer, pc, (len>1)?",":"", mode2, r2, r2b );
- return (addr - oldpc) | DASMFLAG_SUPPORTED;
+ return (addr - pc) | DASMFLAG_SUPPORTED;
}
@@ -1985,18 +1985,18 @@ static CPU_EXIT( t90 )
{
}
-static void t90_burn(int cycles)
+static CPU_BURN( t90 )
{
t90_ICount -= 4 * ((cycles + 3) / 4);
}
-static void t90_get_context (void *dst)
+static CPU_GET_CONTEXT( t90 )
{
if( dst )
*(t90_Regs*)dst = T90;
}
-static void t90_set_context (void *src)
+static CPU_SET_CONTEXT( t90 )
{
if( src )
T90 = *(t90_Regs*)src;
@@ -2692,7 +2692,7 @@ static ADDRESS_MAP_START(tmp91641_mem, ADDRESS_SPACE_PROGRAM, 8)
AM_RANGE( T90_IOBASE, T90_IOBASE+47 ) AM_READWRITE( t90_internal_registers_r, t90_internal_registers_w )
ADDRESS_MAP_END
-static void t90_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( t90 )
{
switch (state)
{
@@ -2723,7 +2723,7 @@ static void t90_set_info(UINT32 state, cpuinfo *info)
}
}
-void tmp90840_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( tmp90840 )
{
switch (state)
{
@@ -2778,15 +2778,15 @@ void tmp90840_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = t90_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = t90_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = t90_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(t90); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(t90); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(t90); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(t90); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(t90); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(t90); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(t90); break;
- case CPUINFO_PTR_BURN: info->burn = t90_burn; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = t90_dasm; break;
+ case CPUINFO_PTR_BURN: info->burn = CPU_BURN_NAME(t90); break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(t90); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &t90_ICount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_tmp90840_mem; break;
@@ -2828,7 +2828,7 @@ void tmp90840_get_info(UINT32 state, cpuinfo *info)
}
}
-void tmp90841_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( tmp90841 )
{
switch (state)
{
@@ -2841,10 +2841,10 @@ void tmp90841_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "TMP90841"); return;
}
- tmp90840_get_info(state,info);
+ CPU_GET_INFO_CALL(tmp90840);
}
-void tmp91640_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( tmp91640 )
{
switch (state)
{
@@ -2857,10 +2857,10 @@ void tmp91640_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "TMP91640"); return;
}
- tmp90840_get_info(state,info);
+ CPU_GET_INFO_CALL(tmp90840);
}
-void tmp91641_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( tmp91641 )
{
switch (state)
{
@@ -2873,5 +2873,5 @@ void tmp91641_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "TMP91641"); return;
}
- tmp90840_get_info(state,info);
+ CPU_GET_INFO_CALL(tmp90840);
}
diff --git a/src/emu/cpu/tlcs90/tlcs90.h b/src/emu/cpu/tlcs90/tlcs90.h
index 129a97a718c..a16a374edfd 100644
--- a/src/emu/cpu/tlcs90/tlcs90.h
+++ b/src/emu/cpu/tlcs90/tlcs90.h
@@ -10,7 +10,7 @@ void tmp90841_get_info(UINT32, cpuinfo*);
void tmp91640_get_info(UINT32, cpuinfo*);
void tmp91641_get_info(UINT32, cpuinfo*);
-unsigned t90_dasm(char *buffer, UINT32 oldpc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( t90 );
#define T90_IOBASE 0xffc0
diff --git a/src/emu/cpu/tms32010/32010dsm.c b/src/emu/cpu/tms32010/32010dsm.c
index bf8224fff3d..722685fa078 100644
--- a/src/emu/cpu/tms32010/32010dsm.c
+++ b/src/emu/cpu/tms32010/32010dsm.c
@@ -225,7 +225,7 @@ static void InitDasm32010(void)
OpInizialized = 1;
}
-offs_t tms32010_dasm(char *str, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( tms32010 )
{
UINT32 flags = 0;
int a, b, d, k, m, n, p, r, s, w; /* these can all be filled in by parsing an instruction */
@@ -234,7 +234,7 @@ offs_t tms32010_dasm(char *str, offs_t pc, const UINT8 *oprom, const UINT8 *opra
int cnt = 1;
int code;
int bit;
- char *strtmp;
+ char *buffertmp;
const char *cp; /* character pointer in OpFormats */
if (!OpInizialized) InitDasm32010();
@@ -255,10 +255,10 @@ offs_t tms32010_dasm(char *str, offs_t pc, const UINT8 *oprom, const UINT8 *opra
}
if (op == -1)
{
- sprintf(str,"???? dw %04Xh",code);
+ sprintf(buffer,"???? dw %04Xh",code);
return cnt | DASMFLAG_SUPPORTED;
}
- strtmp = str;
+ buffertmp = buffer;
if (Op[op].extcode)
{
bit = 31;
@@ -326,13 +326,13 @@ offs_t tms32010_dasm(char *str, offs_t pc, const UINT8 *oprom, const UINT8 *opra
default:
fatalerror("illegal escape character in format '%s'",Op[op].fmt);
}
- q = num; while (*q) *str++ = *q++;
- *str = '\0';
+ q = num; while (*q) *buffer++ = *q++;
+ *buffer = '\0';
}
else
{
- *str++ = *cp++;
- *str = '\0';
+ *buffer++ = *cp++;
+ *buffer = '\0';
}
}
return cnt | flags | DASMFLAG_SUPPORTED;
diff --git a/src/emu/cpu/tms32010/tms32010.c b/src/emu/cpu/tms32010/tms32010.c
index 6009f86063a..cfd5811770d 100644
--- a/src/emu/cpu/tms32010/tms32010.c
+++ b/src/emu/cpu/tms32010/tms32010.c
@@ -811,7 +811,7 @@ static CPU_EXECUTE( tms32010 )
/****************************************************************************
* Get all registers in given buffer
****************************************************************************/
-static void tms32010_get_context (void *dst)
+static CPU_GET_CONTEXT( tms32010 )
{
if( dst )
*(tms32010_Regs*)dst = R;
@@ -820,7 +820,7 @@ static void tms32010_get_context (void *dst)
/****************************************************************************
* Set all registers to given values
****************************************************************************/
-static void tms32010_set_context (void *src)
+static CPU_SET_CONTEXT( tms32010 )
{
if (src)
R = *(tms32010_Regs*)src;
@@ -851,7 +851,7 @@ ADDRESS_MAP_END
* Generic set_info
**************************************************************************/
-static void tms32010_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( tms32010 )
{
switch (state)
{
@@ -879,7 +879,7 @@ static void tms32010_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void tms32010_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( tms32010 )
{
switch (state)
{
@@ -922,15 +922,15 @@ void tms32010_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + TMS32010_AR1: info->i = R.AR[1]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = tms32010_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms32010_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms32010_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms32010); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(tms32010); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(tms32010); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms32010); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms32010); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(tms32010); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms32010); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms32010_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32010); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms32010_icount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map16 = address_map_tms32010_ram; break;
diff --git a/src/emu/cpu/tms32010/tms32010.h b/src/emu/cpu/tms32010/tms32010.h
index ec998187bf1..ad5d1b88cb3 100644
--- a/src/emu/cpu/tms32010/tms32010.h
+++ b/src/emu/cpu/tms32010/tms32010.h
@@ -51,7 +51,7 @@ enum
* Public Functions
*/
-void tms32010_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( tms32010 );
@@ -126,6 +126,6 @@ void tms32010_get_info(UINT32 state, cpuinfo *info);
-offs_t tms32010_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( tms32010 );
#endif /* __TMS32010_H__ */
diff --git a/src/emu/cpu/tms32025/32025dsm.c b/src/emu/cpu/tms32025/32025dsm.c
index 2ec30994328..8d5aee11805 100644
--- a/src/emu/cpu/tms32025/32025dsm.c
+++ b/src/emu/cpu/tms32025/32025dsm.c
@@ -392,7 +392,7 @@ static void InitDasm32025(void)
OpInizialized = 1;
}
-offs_t tms32025_dasm(char *str, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( tms32025 )
{
UINT32 flags = 0;
int a, b, c, d, k, m, n, p, r, s, t, w, x; /* these can all be filled in by parsing an instruction */
@@ -401,7 +401,7 @@ offs_t tms32025_dasm(char *str, offs_t pc, const UINT8 *oprom, const UINT8 *opra
int cnt = 1;
int code;
int bit;
- char *strtmp;
+ char *buffertmp;
const char *cp; /* character pointer in OpFormats */
if (!OpInizialized) InitDasm32025();
@@ -422,10 +422,10 @@ offs_t tms32025_dasm(char *str, offs_t pc, const UINT8 *oprom, const UINT8 *opra
}
if (op == -1)
{
- sprintf(str,"???? dw %04Xh",code);
+ sprintf(buffer,"???? dw %04Xh",code);
return cnt | DASMFLAG_SUPPORTED;
}
- strtmp = str;
+ buffertmp = buffer;
if (Op[op].extcode)
{
bit = 31;
@@ -499,13 +499,13 @@ offs_t tms32025_dasm(char *str, offs_t pc, const UINT8 *oprom, const UINT8 *opra
default:
fatalerror("illegal escape character in format '%s'",Op[op].fmt);
}
- q = num; while (*q) *str++ = *q++;
- *str = '\0';
+ q = num; while (*q) *buffer++ = *q++;
+ *buffer = '\0';
}
else
{
- *str++ = *cp++;
- *str = '\0';
+ *buffer++ = *cp++;
+ *buffer = '\0';
}
}
return cnt | flags | DASMFLAG_SUPPORTED;
diff --git a/src/emu/cpu/tms32025/tms32025.c b/src/emu/cpu/tms32025/tms32025.c
index 72b32bbdd72..9cb562b55d7 100644
--- a/src/emu/cpu/tms32025/tms32025.c
+++ b/src/emu/cpu/tms32025/tms32025.c
@@ -2093,7 +2093,7 @@ static CPU_EXECUTE( tms32025 )
/****************************************************************************
* Get all registers in given buffer
****************************************************************************/
-static void tms32025_get_context (void *dst)
+static CPU_GET_CONTEXT( tms32025 )
{
if (dst)
{
@@ -2107,7 +2107,7 @@ static void tms32025_get_context (void *dst)
/****************************************************************************
* Set all registers to given values
****************************************************************************/
-static void tms32025_set_context (void *src)
+static CPU_SET_CONTEXT( tms32025 )
{
if (src)
{
@@ -2136,7 +2136,7 @@ static void set_irq_line(int irqline, int state)
/****************************************************************************
* Opcode fetcher
****************************************************************************/
-static int tms32025_readop(UINT32 offset, int size, UINT64 *value)
+static CPU_READOP( tms32025 )
{
void *ptr;
@@ -2159,7 +2159,7 @@ static int tms32025_readop(UINT32 offset, int size, UINT64 *value)
/****************************************************************************
* Memory reader
****************************************************************************/
-static int tms32025_read(int space, UINT32 offset, int size, UINT64 *value)
+static CPU_READ( tms32025 )
{
void *ptr = NULL;
UINT64 temp = 0;
@@ -2191,15 +2191,15 @@ static int tms32025_read(int space, UINT32 offset, int size, UINT64 *value)
*value = ((UINT16 *)ptr)[(offset & 0xff) / 2];
break;
case 4:
- tms32025_read(space, offset + 0, 2, &temp);
+ CPU_READ_NAME(tms32025)(space, offset + 0, 2, &temp);
*value = temp << 16;
- tms32025_read(space, offset + 2, 2, &temp);
+ CPU_READ_NAME(tms32025)(space, offset + 2, 2, &temp);
*value |= temp & 0xffff;
break;
case 8:
- tms32025_read(space, offset + 0, 4, &temp);
+ CPU_READ_NAME(tms32025)(space, offset + 0, 4, &temp);
*value = temp << 32;
- tms32025_read(space, offset + 4, 4, &temp);
+ CPU_READ_NAME(tms32025)(space, offset + 4, 4, &temp);
*value |= temp & 0xffffffff;
break;
}
@@ -2210,7 +2210,7 @@ static int tms32025_read(int space, UINT32 offset, int size, UINT64 *value)
/****************************************************************************
* Memory writer
****************************************************************************/
-static int tms32025_write(int space, UINT32 offset, int size, UINT64 value)
+static CPU_WRITE( tms32025 )
{
void *ptr = NULL;
@@ -2241,12 +2241,12 @@ static int tms32025_write(int space, UINT32 offset, int size, UINT64 value)
((UINT16 *)ptr)[(offset & 0xff) / 2] = value;
break;
case 4:
- tms32025_write(space, offset + 0, 2, value >> 16);
- tms32025_write(space, offset + 2, 2, value);
+ CPU_WRITE_NAME(tms32025)(space, offset + 0, 2, value >> 16);
+ CPU_WRITE_NAME(tms32025)(space, offset + 2, 2, value);
break;
case 8:
- tms32025_write(space, offset + 0, 4, value >> 32);
- tms32025_write(space, offset + 4, 4, value);
+ CPU_WRITE_NAME(tms32025)(space, offset + 0, 4, value >> 32);
+ CPU_WRITE_NAME(tms32025)(space, offset + 4, 4, value);
break;
}
return 1;
@@ -2257,7 +2257,7 @@ static int tms32025_write(int space, UINT32 offset, int size, UINT64 value)
* Generic set_info
**************************************************************************/
-static void tms32025_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( tms32025 )
{
switch (state)
{
@@ -2311,7 +2311,7 @@ static void tms32025_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void tms32025_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( tms32025 )
{
switch (state)
{
@@ -2381,18 +2381,18 @@ void tms32025_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + TMS32025_GREG: info->i = M_RDRAM(5); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = tms32025_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms32025_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms32025_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms32025); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(tms32025); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(tms32025); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms32025); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms32025); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(tms32025); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms32025); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms32025_dasm; break;
- case CPUINFO_PTR_READ: info->read = tms32025_read; break;
- case CPUINFO_PTR_WRITE: info->write = tms32025_write; break;
- case CPUINFO_PTR_READOP: info->readop = tms32025_readop; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32025); break;
+ case CPUINFO_PTR_READ: info->read = CPU_READ_NAME(tms32025); break;
+ case CPUINFO_PTR_WRITE: info->write = CPU_WRITE_NAME(tms32025); break;
+ case CPUINFO_PTR_READOP: info->readop = CPU_READOP_NAME(tms32025); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms32025_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -2465,9 +2465,9 @@ void tms32025_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void tms32026_get_info(UINT32 _state, cpuinfo *info)
+CPU_GET_INFO( tms32026 )
{
- switch (_state)
+ switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms32026); break;
@@ -2475,7 +2475,7 @@ void tms32026_get_info(UINT32 _state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "TMS32026"); break;
- default: tms32025_get_info(_state, info); break;
+ default: CPU_GET_INFO_CALL(tms32025); break;
}
}
#endif
diff --git a/src/emu/cpu/tms32025/tms32025.h b/src/emu/cpu/tms32025/tms32025.h
index 543d2eeffde..632a74b828b 100644
--- a/src/emu/cpu/tms32025/tms32025.h
+++ b/src/emu/cpu/tms32025/tms32025.h
@@ -70,10 +70,10 @@ enum
* Public Functions
*/
-extern void tms32025_get_info(UINT32 state, cpuinfo *info);
-extern void tms32026_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( tms32025 );
+extern CPU_GET_INFO( tms32026 );
-offs_t tms32025_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( tms32025 );
#endif /* __TMS32025_H__ */
diff --git a/src/emu/cpu/tms32031/tms32031.c b/src/emu/cpu/tms32031/tms32031.c
index aaf44974d46..98b2f073909 100644
--- a/src/emu/cpu/tms32031/tms32031.c
+++ b/src/emu/cpu/tms32031/tms32031.c
@@ -386,7 +386,7 @@ static void set_irq_line(int irqline, int state)
CONTEXT SWITCHING
***************************************************************************/
-static void tms32031_get_context(void *dst)
+static CPU_GET_CONTEXT( tms32031 )
{
/* copy the context */
if (dst)
@@ -394,7 +394,7 @@ static void tms32031_get_context(void *dst)
}
-static void tms32031_set_context(void *src)
+static CPU_SET_CONTEXT( tms32031 )
{
/* copy the context */
if (src)
@@ -591,7 +591,7 @@ static CPU_EXECUTE( tms32031 )
DISASSEMBLY HOOK
***************************************************************************/
-static offs_t tms32031_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( tms32031 )
{
UINT32 op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
extern unsigned dasm_tms32031(char *, unsigned, UINT32);
@@ -672,7 +672,7 @@ static UINT32 boot_loader(UINT32 boot_rom_addr)
* Generic set_info
**************************************************************************/
-static void tms32031_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( tms32031 )
{
switch (state)
{
@@ -750,7 +750,7 @@ ADDRESS_MAP_END
* Generic get_info
**************************************************************************/
-void tms32031_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( tms32031 )
{
float ftemp;
@@ -835,15 +835,15 @@ void tms32031_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + TMS32031_RC: info->i = IREG(TMR_RC); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = tms32031_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms32031_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms32031_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms32031); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(tms32031); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(tms32031); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms32031); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms32031); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(tms32031); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms32031); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms32031_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32031); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms32031_icount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = address_map_internal_32031; break;
@@ -910,7 +910,7 @@ void tms32031_get_info(UINT32 state, cpuinfo *info)
}
}
-void tms32032_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( tms32032 )
{
switch (state)
{
@@ -921,6 +921,6 @@ void tms32032_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "TMS32032"); break;
- default: tms32031_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(tms32031); break;
}
}
diff --git a/src/emu/cpu/tms32031/tms32031.h b/src/emu/cpu/tms32031/tms32031.h
index 80f96b82edd..12d7691b749 100644
--- a/src/emu/cpu/tms32031/tms32031.h
+++ b/src/emu/cpu/tms32031/tms32031.h
@@ -69,8 +69,8 @@ enum
PUBLIC FUNCTIONS
***************************************************************************/
-extern void tms32031_get_info(UINT32 state, cpuinfo *info);
-extern void tms32032_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( tms32031 );
+extern CPU_GET_INFO( tms32032 );
extern float convert_tms3203x_fp_to_float(UINT32 floatdata);
extern double convert_tms3203x_fp_to_double(UINT32 floatdata);
diff --git a/src/emu/cpu/tms32051/dis32051.c b/src/emu/cpu/tms32051/dis32051.c
index 2448c8c1448..2b49e25ed6c 100644
--- a/src/emu/cpu/tms32051/dis32051.c
+++ b/src/emu/cpu/tms32051/dis32051.c
@@ -257,7 +257,7 @@ static void dasm_group_bf(UINT16 opcode)
}
}
-offs_t tms32051_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( tms32051 )
{
UINT32 flags = 0;
UINT16 opcode;
diff --git a/src/emu/cpu/tms32051/tms32051.c b/src/emu/cpu/tms32051/tms32051.c
index 7a44cbc1079..87fac1d6aed 100644
--- a/src/emu/cpu/tms32051/tms32051.c
+++ b/src/emu/cpu/tms32051/tms32051.c
@@ -320,14 +320,14 @@ static CPU_EXIT( tms )
/* TODO */
}
-static void tms_get_context(void *dst)
+static CPU_GET_CONTEXT( tms )
{
/* copy the context */
if (dst)
*(TMS_REGS *)dst = tms;
}
-static void tms_set_context(void *src)
+static CPU_SET_CONTEXT( tms )
{
/* copy the context */
if (src)
@@ -544,7 +544,7 @@ ADDRESS_MAP_END
* Generic set_info
**************************************************************************/
-static void tms_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( tms )
{
switch (state)
{
@@ -553,7 +553,7 @@ static void tms_set_info(UINT32 state, cpuinfo *info)
}
}
-static int tms_debug_read(int space, UINT32 offset, int size, UINT64 *value)
+static CPU_READ( tms )
{
if (space == ADDRESS_SPACE_PROGRAM)
{
@@ -566,7 +566,7 @@ static int tms_debug_read(int space, UINT32 offset, int size, UINT64 *value)
return 1;
}
-static void tms_get_info(UINT32 state, cpuinfo *info)
+static CPU_GET_INFO( tms )
{
switch(state)
{
@@ -623,15 +623,15 @@ static void tms_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + TMS32051_AR7: info->i = tms.ar[7]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms_set_context; break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(tms); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(tms); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(tms); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms32051_dasm; break;
- case CPUINFO_PTR_READ: info->read = tms_debug_read; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32051); break;
+ case CPUINFO_PTR_READ: info->read = CPU_READ_NAME(tms); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms_icount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_internal_pgm; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map16 = address_map_internal_data; break;
@@ -672,7 +672,7 @@ static void tms_get_info(UINT32 state, cpuinfo *info)
}
#if (HAS_TMS32051)
-static void tms32051_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( tms32051 )
{
if (state >= CPUINFO_INT_INPUT_STATE && state <= CPUINFO_INT_INPUT_STATE + 5)
{
@@ -705,21 +705,21 @@ static void tms32051_set_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + TMS32051_AR6: tms.ar[6] = info->i; break;
case CPUINFO_INT_REGISTER + TMS32051_AR7: tms.ar[7] = info->i; break;
- default: tms_set_info(state, info); break;
+ default: CPU_SET_INFO_CALL(tms); break;
}
}
-void tms32051_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( tms32051 )
{
switch(state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = tms32051_set_info; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms32051); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "TMS32051"); break;
- default: tms_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(tms); break;
}
}
#endif
diff --git a/src/emu/cpu/tms32051/tms32051.h b/src/emu/cpu/tms32051/tms32051.h
index f616878a825..332708c93e1 100644
--- a/src/emu/cpu/tms32051/tms32051.h
+++ b/src/emu/cpu/tms32051/tms32051.h
@@ -4,9 +4,9 @@
#define __TMS32051_H__
#if (HAS_TMS32051)
-void tms32051_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( tms32051 );
#endif
-offs_t tms32051_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( tms32051 );
#endif /* __TMS32051_H__ */
diff --git a/src/emu/cpu/tms34010/34010dsm.c b/src/emu/cpu/tms34010/34010dsm.c
index 7bc2bf8922e..d4b719e5fe8 100644
--- a/src/emu/cpu/tms34010/34010dsm.c
+++ b/src/emu/cpu/tms34010/34010dsm.c
@@ -1742,7 +1742,7 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
return (_pc - __pc) | flags | DASMFLAG_SUPPORTED;
}
-offs_t tms34010_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( tms34010 )
{
rombase = oprom;
rambase = opram;
@@ -1750,7 +1750,7 @@ offs_t tms34010_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *o
return Dasm340x0(buffer, pc, 0);
}
-offs_t tms34020_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( tms34020 )
{
rombase = oprom;
rambase = opram;
diff --git a/src/emu/cpu/tms34010/34010gfx.c b/src/emu/cpu/tms34010/34010gfx.c
index ffe03c8cb7f..7e6c51f84b8 100644
--- a/src/emu/cpu/tms34010/34010gfx.c
+++ b/src/emu/cpu/tms34010/34010gfx.c
@@ -22,9 +22,9 @@ static void line(void)
if (WINDOW_CHECKING != 0 && WINDOW_CHECKING != 3)
logerror("LINE XY %08X - Window Checking Mode %d not supported\n", PC, WINDOW_CHECKING);
- state.st |= STBIT_P;
- TEMP = (state.op & 0x80) ? 1 : 0; /* boundary value depends on the algorithm */
- LOGGFX(("%08X(%3d):LINE (%d,%d)-(%d,%d)\n", PC, video_screen_get_vpos(state.screen), DADDR_X, DADDR_Y, DADDR_X + DYDX_X, DADDR_Y + DYDX_Y));
+ tms.st |= STBIT_P;
+ TEMP = (tms.op & 0x80) ? 1 : 0; /* boundary value depends on the algorithm */
+ LOGGFX(("%08X(%3d):LINE (%d,%d)-(%d,%d)\n", PC, video_screen_get_vpos(tms.screen), DADDR_X, DADDR_Y, DADDR_X + DYDX_X, DADDR_Y + DYDX_Y));
}
if (COUNT > 0)
@@ -56,7 +56,7 @@ static void line(void)
PC -= 0x10; /* not done yet, check for interrupts and restart instruction */
return;
}
- state.st &= ~STBIT_P;
+ tms.st &= ~STBIT_P;
}
@@ -202,24 +202,24 @@ static int compute_pixblt_b_cycles(int left_partials, int right_partials, int fu
/* Shift register handling */
static void shiftreg_w(offs_t offset,UINT16 data)
{
- if (state.config->from_shiftreg)
- (*state.config->from_shiftreg)((UINT32)(offset << 3) & ~15, &state.shiftreg[0]);
+ if (tms.config->from_shiftreg)
+ (*tms.config->from_shiftreg)((UINT32)(offset << 3) & ~15, &tms.shiftreg[0]);
else
logerror("From ShiftReg function not set. PC = %08X\n", PC);
}
static UINT16 shiftreg_r(offs_t offset)
{
- if (state.config->to_shiftreg)
- (*state.config->to_shiftreg)((UINT32)(offset << 3) & ~15, &state.shiftreg[0]);
+ if (tms.config->to_shiftreg)
+ (*tms.config->to_shiftreg)((UINT32)(offset << 3) & ~15, &tms.shiftreg[0]);
else
logerror("To ShiftReg function not set. PC = %08X\n", PC);
- return state.shiftreg[0];
+ return tms.shiftreg[0];
}
static UINT16 dummy_shiftreg_r(offs_t offset)
{
- return state.shiftreg[0];
+ return tms.shiftreg[0];
}
@@ -902,7 +902,7 @@ static void pixblt_b_l(void)
int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
int ix = trans | (rop << 1) | (psize << 6);
- if (!P_FLAG) LOGGFX(("%08X(%3d):PIXBLT B,L (%dx%d) depth=%d\n", PC, video_screen_get_vpos(state.screen), DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
+ if (!P_FLAG) LOGGFX(("%08X(%3d):PIXBLT B,L (%dx%d) depth=%d\n", PC, video_screen_get_vpos(tms.screen), DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
pixel_op = pixel_op_table[rop];
pixel_op_timing = pixel_op_timing_table[rop];
(*pixblt_b_op_table[ix])(1);
@@ -914,7 +914,7 @@ static void pixblt_b_xy(void)
int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
int ix = trans | (rop << 1) | (psize << 6);
- if (!P_FLAG) LOGGFX(("%08X(%3d):PIXBLT B,XY (%d,%d) (%dx%d) depth=%d\n", PC, video_screen_get_vpos(state.screen), DADDR_X, DADDR_Y, DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
+ if (!P_FLAG) LOGGFX(("%08X(%3d):PIXBLT B,XY (%d,%d) (%dx%d) depth=%d\n", PC, video_screen_get_vpos(tms.screen), DADDR_X, DADDR_Y, DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
pixel_op = pixel_op_table[rop];
pixel_op_timing = pixel_op_timing_table[rop];
(*pixblt_b_op_table[ix])(0);
@@ -927,7 +927,7 @@ static void pixblt_l_l(void)
int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
int pbh = (IOREG(REG_CONTROL) >> 8) & 1;
int ix = trans | (rop << 1) | (psize << 6);
- if (!P_FLAG) LOGGFX(("%08X(%3d):PIXBLT L,L (%dx%d) depth=%d\n", PC, video_screen_get_vpos(state.screen), DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
+ if (!P_FLAG) LOGGFX(("%08X(%3d):PIXBLT L,L (%dx%d) depth=%d\n", PC, video_screen_get_vpos(tms.screen), DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
pixel_op = pixel_op_table[rop];
pixel_op_timing = pixel_op_timing_table[rop];
if (!pbh)
@@ -943,7 +943,7 @@ static void pixblt_l_xy(void)
int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
int pbh = (IOREG(REG_CONTROL) >> 8) & 1;
int ix = trans | (rop << 1) | (psize << 6);
- if (!P_FLAG) LOGGFX(("%08X(%3d):PIXBLT L,XY (%d,%d) (%dx%d) depth=%d\n", PC, video_screen_get_vpos(state.screen), DADDR_X, DADDR_Y, DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
+ if (!P_FLAG) LOGGFX(("%08X(%3d):PIXBLT L,XY (%d,%d) (%dx%d) depth=%d\n", PC, video_screen_get_vpos(tms.screen), DADDR_X, DADDR_Y, DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
pixel_op = pixel_op_table[rop];
pixel_op_timing = pixel_op_timing_table[rop];
if (!pbh)
@@ -959,7 +959,7 @@ static void pixblt_xy_l(void)
int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
int pbh = (IOREG(REG_CONTROL) >> 8) & 1;
int ix = trans | (rop << 1) | (psize << 6);
- if (!P_FLAG) LOGGFX(("%08X(%3d):PIXBLT XY,L (%dx%d) depth=%d\n", PC, video_screen_get_vpos(state.screen), DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
+ if (!P_FLAG) LOGGFX(("%08X(%3d):PIXBLT XY,L (%dx%d) depth=%d\n", PC, video_screen_get_vpos(tms.screen), DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
pixel_op = pixel_op_table[rop];
pixel_op_timing = pixel_op_timing_table[rop];
if (!pbh)
@@ -975,7 +975,7 @@ static void pixblt_xy_xy(void)
int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
int pbh = (IOREG(REG_CONTROL) >> 8) & 1;
int ix = trans | (rop << 1) | (psize << 6);
- if (!P_FLAG) LOGGFX(("%08X(%3d):PIXBLT XY,XY (%dx%d) depth=%d\n", PC, video_screen_get_vpos(state.screen), DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
+ if (!P_FLAG) LOGGFX(("%08X(%3d):PIXBLT XY,XY (%dx%d) depth=%d\n", PC, video_screen_get_vpos(tms.screen), DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
pixel_op = pixel_op_table[rop];
pixel_op_timing = pixel_op_timing_table[rop];
if (!pbh)
@@ -990,7 +990,7 @@ static void fill_l(void)
int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
int ix = trans | (rop << 1) | (psize << 6);
- if (!P_FLAG) LOGGFX(("%08X(%3d):FILL L (%dx%d) depth=%d\n", PC, video_screen_get_vpos(state.screen), DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
+ if (!P_FLAG) LOGGFX(("%08X(%3d):FILL L (%dx%d) depth=%d\n", PC, video_screen_get_vpos(tms.screen), DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
pixel_op = pixel_op_table[rop];
pixel_op_timing = pixel_op_timing_table[rop];
(*fill_op_table[ix])(1);
@@ -1002,7 +1002,7 @@ static void fill_xy(void)
int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
int ix = trans | (rop << 1) | (psize << 6);
- if (!P_FLAG) LOGGFX(("%08X(%3d):FILL XY (%d,%d) (%dx%d) depth=%d\n", PC, video_screen_get_vpos(state.screen), DADDR_X, DADDR_Y, DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
+ if (!P_FLAG) LOGGFX(("%08X(%3d):FILL XY (%d,%d) (%dx%d) depth=%d\n", PC, video_screen_get_vpos(tms.screen), DADDR_X, DADDR_Y, DYDX_X, DYDX_Y, IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
pixel_op = pixel_op_table[rop];
pixel_op_timing = pixel_op_timing_table[rop];
(*fill_op_table[ix])(0);
@@ -1050,11 +1050,11 @@ static void FUNCTION_NAME(pixblt)(int src_is_linear, int dst_is_linear)
dy = (INT16)DYDX_Y;
/* apply the window for non-linear destinations */
- state.gfxcycles = 7 + (src_is_linear ? 0 : 2);
+ tms.gfxcycles = 7 + (src_is_linear ? 0 : 2);
if (!dst_is_linear)
{
dstxy = DADDR_XY;
- state.gfxcycles += 2 + (!src_is_linear) + apply_window("PIXBLT", BITS_PER_PIXEL, &saddr, &dstxy, &dx, &dy);
+ tms.gfxcycles += 2 + (!src_is_linear) + apply_window("PIXBLT", BITS_PER_PIXEL, &saddr, &dstxy, &dx, &dy);
daddr = DXYTOL(dstxy);
}
else
@@ -1087,7 +1087,7 @@ static void FUNCTION_NAME(pixblt)(int src_is_linear, int dst_is_linear)
daddr += (dy - 1) * DPTCH;
}
- state.st |= STBIT_P;
+ tms.st |= STBIT_P;
/* loop over rows */
for (y = 0; y < dy; y++)
@@ -1194,7 +1194,7 @@ static void FUNCTION_NAME(pixblt)(int src_is_linear, int dst_is_linear)
full_words /= PIXELS_PER_WORD;
/* compute cycles */
- state.gfxcycles += compute_pixblt_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING);
+ tms.gfxcycles += compute_pixblt_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING);
/* use word addresses each row */
swordaddr = saddr >> 4;
@@ -1336,22 +1336,22 @@ static void FUNCTION_NAME(pixblt)(int src_is_linear, int dst_is_linear)
}
}
- state.gfxcycles += readwrites * 2 + dx * dy * (PIXEL_OP_TIMING - 2);
+ tms.gfxcycles += readwrites * 2 + dx * dy * (PIXEL_OP_TIMING - 2);
- LOGGFX((" (%d cycles)\n", state.gfxcycles));
+ LOGGFX((" (%d cycles)\n", tms.gfxcycles));
}
/* eat cycles */
- if (state.gfxcycles > tms34010_ICount)
+ if (tms.gfxcycles > tms34010_ICount)
{
- state.gfxcycles -= tms34010_ICount;
+ tms.gfxcycles -= tms34010_ICount;
tms34010_ICount = 0;
PC -= 0x10;
}
else
{
- tms34010_ICount -= state.gfxcycles;
- state.st &= ~STBIT_P;
+ tms34010_ICount -= tms.gfxcycles;
+ tms.st &= ~STBIT_P;
if (src_is_linear && dst_is_linear)
SADDR += DYDX_Y * SPTCH;
else if (src_is_linear)
@@ -1398,11 +1398,11 @@ if ((saddr & (BITS_PER_PIXEL - 1)) != 0) mame_printf_debug("PIXBLT_R%d with odd
dy = (INT16)DYDX_Y;
/* apply the window for non-linear destinations */
- state.gfxcycles = 7 + (src_is_linear ? 0 : 2);
+ tms.gfxcycles = 7 + (src_is_linear ? 0 : 2);
if (!dst_is_linear)
{
dstxy = DADDR_XY;
- state.gfxcycles += 2 + (!src_is_linear) + apply_window("PIXBLT R", BITS_PER_PIXEL, &saddr, &dstxy, &dx, &dy);
+ tms.gfxcycles += 2 + (!src_is_linear) + apply_window("PIXBLT R", BITS_PER_PIXEL, &saddr, &dstxy, &dx, &dy);
daddr = DXYTOL(dstxy);
}
else
@@ -1440,7 +1440,7 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) mame_printf_debug("PIXBLT_R%d with odd
}
}
- state.st |= STBIT_P;
+ tms.st |= STBIT_P;
/* loop over rows */
for (y = 0; y < dy; y++)
@@ -1463,7 +1463,7 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) mame_printf_debug("PIXBLT_R%d with odd
full_words /= PIXELS_PER_WORD;
/* compute cycles */
- state.gfxcycles += compute_pixblt_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING);
+ tms.gfxcycles += compute_pixblt_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING);
/* use word addresses each row */
swordaddr = (saddr + 15) >> 4;
@@ -1603,20 +1603,20 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) mame_printf_debug("PIXBLT_R%d with odd
daddr -= DPTCH;
}
}
- LOGGFX((" (%d cycles)\n", state.gfxcycles));
+ LOGGFX((" (%d cycles)\n", tms.gfxcycles));
}
/* eat cycles */
- if (state.gfxcycles > tms34010_ICount)
+ if (tms.gfxcycles > tms34010_ICount)
{
- state.gfxcycles -= tms34010_ICount;
+ tms.gfxcycles -= tms34010_ICount;
tms34010_ICount = 0;
PC -= 0x10;
}
else
{
- tms34010_ICount -= state.gfxcycles;
- state.st &= ~STBIT_P;
+ tms34010_ICount -= tms.gfxcycles;
+ tms.st &= ~STBIT_P;
if (src_is_linear && dst_is_linear)
SADDR += DYDX_Y * SPTCH;
else if (src_is_linear)
@@ -1661,11 +1661,11 @@ static void FUNCTION_NAME(pixblt_b)(int dst_is_linear)
dy = (INT16)DYDX_Y;
/* apply the window for non-linear destinations */
- state.gfxcycles = 4;
+ tms.gfxcycles = 4;
if (!dst_is_linear)
{
dstxy = DADDR_XY;
- state.gfxcycles += 2 + apply_window("PIXBLT B", 1, &saddr, &dstxy, &dx, &dy);
+ tms.gfxcycles += 2 + apply_window("PIXBLT B", 1, &saddr, &dstxy, &dx, &dy);
daddr = DXYTOL(dstxy);
}
else
@@ -1699,8 +1699,8 @@ static void FUNCTION_NAME(pixblt_b)(int dst_is_linear)
full_words /= PIXELS_PER_WORD;
/* compute cycles */
- state.gfxcycles += compute_pixblt_b_cycles(left_partials, right_partials, full_words, dy, PIXEL_OP_TIMING, BITS_PER_PIXEL);
- state.st |= STBIT_P;
+ tms.gfxcycles += compute_pixblt_b_cycles(left_partials, right_partials, full_words, dy, PIXEL_OP_TIMING, BITS_PER_PIXEL);
+ tms.st |= STBIT_P;
/* loop over rows */
for (y = 0; y < dy; y++)
@@ -1822,20 +1822,20 @@ static void FUNCTION_NAME(pixblt_b)(int dst_is_linear)
saddr += SPTCH;
daddr += DPTCH;
}
- LOGGFX((" (%d cycles)\n", state.gfxcycles));
+ LOGGFX((" (%d cycles)\n", tms.gfxcycles));
}
/* eat cycles */
- if (state.gfxcycles > tms34010_ICount)
+ if (tms.gfxcycles > tms34010_ICount)
{
- state.gfxcycles -= tms34010_ICount;
+ tms.gfxcycles -= tms34010_ICount;
tms34010_ICount = 0;
PC -= 0x10;
}
else
{
- tms34010_ICount -= state.gfxcycles;
- state.st &= ~STBIT_P;
+ tms34010_ICount -= tms.gfxcycles;
+ tms.st &= ~STBIT_P;
SADDR += DYDX_Y * SPTCH;
if (dst_is_linear)
DADDR += DYDX_Y * DPTCH;
@@ -1872,11 +1872,11 @@ static void FUNCTION_NAME(fill)(int dst_is_linear)
dy = (INT16)DYDX_Y;
/* apply the window for non-linear destinations */
- state.gfxcycles = 4;
+ tms.gfxcycles = 4;
if (!dst_is_linear)
{
dstxy = DADDR_XY;
- state.gfxcycles += 2 + apply_window("FILL", 0, NULL, &dstxy, &dx, &dy);
+ tms.gfxcycles += 2 + apply_window("FILL", 0, NULL, &dstxy, &dx, &dy);
daddr = DXYTOL(dstxy);
}
else
@@ -1910,8 +1910,8 @@ static void FUNCTION_NAME(fill)(int dst_is_linear)
full_words /= PIXELS_PER_WORD;
/* compute cycles */
- state.gfxcycles += 2;
- state.st |= STBIT_P;
+ tms.gfxcycles += 2;
+ tms.st |= STBIT_P;
/* loop over rows */
for (y = 0; y < dy; y++)
@@ -1923,7 +1923,7 @@ static void FUNCTION_NAME(fill)(int dst_is_linear)
dwordaddr = daddr >> 4;
/* compute cycles */
- state.gfxcycles += compute_fill_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING);
+ tms.gfxcycles += compute_fill_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING);
/* handle the left partial word */
if (left_partials != 0)
@@ -2004,20 +2004,20 @@ static void FUNCTION_NAME(fill)(int dst_is_linear)
daddr += DPTCH;
}
- LOGGFX((" (%d cycles)\n", state.gfxcycles));
+ LOGGFX((" (%d cycles)\n", tms.gfxcycles));
}
/* eat cycles */
- if (state.gfxcycles > tms34010_ICount)
+ if (tms.gfxcycles > tms34010_ICount)
{
- state.gfxcycles -= tms34010_ICount;
+ tms.gfxcycles -= tms34010_ICount;
tms34010_ICount = 0;
PC -= 0x10;
}
else
{
- tms34010_ICount -= state.gfxcycles;
- state.st &= ~STBIT_P;
+ tms34010_ICount -= tms.gfxcycles;
+ tms.st &= ~STBIT_P;
if (dst_is_linear)
DADDR += DYDX_Y * DPTCH;
else
diff --git a/src/emu/cpu/tms34010/34010ops.c b/src/emu/cpu/tms34010/34010ops.c
index 4ff1019ad74..6022c1a72cd 100644
--- a/src/emu/cpu/tms34010/34010ops.c
+++ b/src/emu/cpu/tms34010/34010ops.c
@@ -16,9 +16,9 @@
#define ZEXTEND(val,width) if (width) (val) &= ((UINT32)0xffffffff >> (32 - (width)))
#define SEXTEND(val,width) if (width) (val) = (INT32)((val) << (32 - (width))) >> (32 - (width))
-#define SXYTOL(val) ((((INT16)(val).y * state.convsp) + ((INT16)(val).x << state.pixelshift)) + OFFSET)
-#define DXYTOL(val) ((((INT16)(val).y * state.convdp) + ((INT16)(val).x << state.pixelshift)) + OFFSET)
-#define MXYTOL(val) ((((INT16)(val).y * state.convmp) + ((INT16)(val).x << state.pixelshift)) + OFFSET)
+#define SXYTOL(val) ((((INT16)(val).y * tms.convsp) + ((INT16)(val).x << tms.pixelshift)) + OFFSET)
+#define DXYTOL(val) ((((INT16)(val).y * tms.convdp) + ((INT16)(val).x << tms.pixelshift)) + OFFSET)
+#define MXYTOL(val) ((((INT16)(val).y * tms.convmp) + ((INT16)(val).x << tms.pixelshift)) + OFFSET)
#define COUNT_CYCLES(x) tms34010_ICount -= x
#define COUNT_UNKNOWN_CYCLES(x) COUNT_CYCLES(x)
@@ -33,28 +33,28 @@
#define SIGN(val) ((val) & 0x80000000)
-#define CLR_Z state.st &= ~STBIT_Z
-#define CLR_V state.st &= ~STBIT_V
-#define CLR_C state.st &= ~STBIT_C
-#define CLR_N state.st &= ~STBIT_N
-#define CLR_NZ state.st &= ~(STBIT_N | STBIT_Z)
-#define CLR_CZ state.st &= ~(STBIT_C | STBIT_Z)
-#define CLR_ZV state.st &= ~(STBIT_Z | STBIT_V)
-#define CLR_NZV state.st &= ~(STBIT_N | STBIT_Z | STBIT_V)
-#define CLR_NCZ state.st &= ~(STBIT_N | STBIT_C | STBIT_Z)
-#define CLR_NCZV state.st &= ~(STBIT_N | STBIT_C | STBIT_Z | STBIT_V)
-
-#define SET_V_BIT_LO(val,bit) state.st |= ((val) << (28 - (bit))) & STBIT_V
-#define SET_V_BIT_HI(val,bit) state.st |= ((val) >> ((bit) - 28)) & STBIT_V
-#define SET_V_LOG(val) state.st |= (val) << 28
-#define SET_Z_BIT_LO(val,bit) state.st |= ((val) << (29 - (bit))) & STBIT_Z
-#define SET_Z_BIT_HI(val,bit) state.st |= ((val) >> ((bit) - 29)) & STBIT_Z
-#define SET_Z_LOG(val) state.st |= (val) << 29
-#define SET_C_BIT_LO(val,bit) state.st |= ((val) << (30 - (bit))) & STBIT_C
-#define SET_C_BIT_HI(val,bit) state.st |= ((val) >> ((bit) - 30)) & STBIT_C
-#define SET_C_LOG(val) state.st |= (val) << 30
-#define SET_N_BIT(val,bit) state.st |= ((val) << (31 - (bit))) & STBIT_N
-#define SET_N_LOG(val) state.st |= (val) << 31
+#define CLR_Z tms.st &= ~STBIT_Z
+#define CLR_V tms.st &= ~STBIT_V
+#define CLR_C tms.st &= ~STBIT_C
+#define CLR_N tms.st &= ~STBIT_N
+#define CLR_NZ tms.st &= ~(STBIT_N | STBIT_Z)
+#define CLR_CZ tms.st &= ~(STBIT_C | STBIT_Z)
+#define CLR_ZV tms.st &= ~(STBIT_Z | STBIT_V)
+#define CLR_NZV tms.st &= ~(STBIT_N | STBIT_Z | STBIT_V)
+#define CLR_NCZ tms.st &= ~(STBIT_N | STBIT_C | STBIT_Z)
+#define CLR_NCZV tms.st &= ~(STBIT_N | STBIT_C | STBIT_Z | STBIT_V)
+
+#define SET_V_BIT_LO(val,bit) tms.st |= ((val) << (28 - (bit))) & STBIT_V
+#define SET_V_BIT_HI(val,bit) tms.st |= ((val) >> ((bit) - 28)) & STBIT_V
+#define SET_V_LOG(val) tms.st |= (val) << 28
+#define SET_Z_BIT_LO(val,bit) tms.st |= ((val) << (29 - (bit))) & STBIT_Z
+#define SET_Z_BIT_HI(val,bit) tms.st |= ((val) >> ((bit) - 29)) & STBIT_Z
+#define SET_Z_LOG(val) tms.st |= (val) << 29
+#define SET_C_BIT_LO(val,bit) tms.st |= ((val) << (30 - (bit))) & STBIT_C
+#define SET_C_BIT_HI(val,bit) tms.st |= ((val) >> ((bit) - 30)) & STBIT_C
+#define SET_C_LOG(val) tms.st |= (val) << 30
+#define SET_N_BIT(val,bit) tms.st |= ((val) << (31 - (bit))) & STBIT_N
+#define SET_N_LOG(val) tms.st |= (val) << 31
#define SET_Z_VAL(val) SET_Z_LOG((val) == 0)
#define SET_N_VAL(val) SET_N_BIT(val, 31)
@@ -97,8 +97,8 @@ static void unimpl(void)
/* extra check to prevent bad things */
if (PC == 0 || opcode_table[cpu_readop16(TOBYTE(PC)) >> 4] == unimpl)
{
- cpunum_set_input_line(state.screen->machine, cpu_getactivecpu(), INPUT_LINE_HALT, ASSERT_LINE);
- debugger_break(state.screen->machine);
+ cpunum_set_input_line(tms.screen->machine, cpu_getactivecpu(), INPUT_LINE_HALT, ASSERT_LINE);
+ debugger_break(tms.screen->machine);
}
}
@@ -499,7 +499,7 @@ static void cmpi_l_b(void) { CMPI_L(B); }
static void dint(void)
{
- state.st &= ~STBIT_IE;
+ tms.st &= ~STBIT_IE;
COUNT_CYCLES(3);
}
@@ -599,7 +599,7 @@ static void divu_b(void) { DIVU(B); }
static void eint(void)
{
- state.st |= STBIT_IE;
+ tms.st |= STBIT_IE;
check_interrupt();
COUNT_CYCLES(3);
}
@@ -608,9 +608,9 @@ static void eint(void)
{ \
UINT8 shift = F ? 6 : 0; \
INT32 *rd = &R##REG(DSTREG); \
- UINT32 temp = (state.st >> shift) & 0x3f; \
- state.st &= ~(0x3f << shift); \
- state.st |= (*rd & 0x3f) << shift; \
+ UINT32 temp = (tms.st >> shift) & 0x3f; \
+ tms.st &= ~(0x3f << shift); \
+ tms.st |= (*rd & 0x3f) << shift; \
*rd = temp; \
COUNT_CYCLES(1); \
}
@@ -669,7 +669,7 @@ static void mmfm_b(void) { MMFM(B); }
COUNT_CYCLES(2); \
{ \
INT32 rd = DSTREG; \
- if (state.is_34020) \
+ if (tms.is_34020) \
{ \
CLR_N; \
SET_N_VAL(R##REG(rd) ^ 0x80000000); \
@@ -834,8 +834,8 @@ static void setc(void)
#define SETF(F) \
{ \
UINT8 shift = F ? 6 : 0; \
- state.st &= ~(0x3f << shift); \
- state.st |= (state.op & 0x3f) << shift; \
+ tms.st &= ~(0x3f << shift); \
+ tms.st |= (tms.op & 0x3f) << shift; \
COUNT_CYCLES(1+F); \
}
static void setf0(void) { SETF(0); }
@@ -1513,7 +1513,7 @@ static void dsjne_b (void) { DSJNE(B); }
#define DSJS(R) \
{ \
- if (state.op & 0x0400) \
+ if (tms.op & 0x0400) \
{ \
if (--R##REG(DSTREG)) \
{ \
@@ -2040,12 +2040,12 @@ New 34020 ops:
}
static void addxyi_a(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
ADD_XYI(A);
}
static void addxyi_b(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
ADD_XYI(B);
}
@@ -2055,7 +2055,7 @@ static void blmove(void)
offs_t dst = BREG(2);
offs_t bits = BREG(7);
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
/* src and dst are aligned */
if (!(src & 0x0f) && !(dst & 0x0f))
@@ -2108,91 +2108,91 @@ static void blmove(void)
static void cexec_l(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cexec_l\n");
}
static void cexec_s(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cexec_s\n");
}
static void clip(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:clip\n");
}
static void cmovcg_a(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cmovcg_a\n");
}
static void cmovcg_b(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cmovcg_b\n");
}
static void cmovcm_f(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cmovcm_f\n");
}
static void cmovcm_b(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cmovcm_b\n");
}
static void cmovgc_a(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cmovgc_a\n");
}
static void cmovgc_b(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cmovgc_b\n");
}
static void cmovgc_a_s(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cmovgc_a_s\n");
}
static void cmovgc_b_s(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cmovgc_b_s\n");
}
static void cmovmc_f(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cmovmc_f\n");
}
static void cmovmc_f_va(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cmovmc_f_va\n");
}
static void cmovmc_f_vb(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cmovmc_f_vb\n");
}
static void cmovmc_b(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cmovmc_b\n");
}
@@ -2208,125 +2208,125 @@ static void cmovmc_b(void)
}
static void cmp_k_a(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
CMPK(A);
}
static void cmp_k_b(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
CMPK(B);
}
static void cvdxyl_a(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cvdxyl_a\n");
}
static void cvdxyl_b(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cvdxyl_b\n");
}
static void cvmxyl_a(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cvmxyl_a\n");
}
static void cvmxyl_b(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cvmxyl_b\n");
}
static void cvsxyl_a(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cvsxyl_a\n");
}
static void cvsxyl_b(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:cvsxyl_b\n");
}
static void exgps_a(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:exgps_a\n");
}
static void exgps_b(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:exgps_b\n");
}
static void fline(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:fline\n");
}
static void fpixeq(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:fpixeq\n");
}
static void fpixne(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:fpixne\n");
}
static void getps_a(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:getps_a\n");
}
static void getps_b(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:getps_b\n");
}
static void idle(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:idle\n");
}
static void linit(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:linit\n");
}
static void mwait(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
}
static void pfill_xy(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:pfill_xy\n");
}
static void pixblt_l_m_l(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:pixblt_l_m_l\n");
}
static void retm(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:retm\n");
}
@@ -2355,7 +2355,7 @@ static void rmo_b(void) { RMO(B); }
#define RPIX(R) \
{ \
UINT32 v = R##REG(DSTREG); \
- switch (state.pixelshift) \
+ switch (tms.pixelshift) \
{ \
case 0: \
v = (v & 1) ? 0xffffffff : 0x00000000;\
@@ -2396,72 +2396,72 @@ static void rmo_b(void) { RMO(B); }
static void rpix_a(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
RPIX(A);
}
static void rpix_b(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
RPIX(B);
}
static void setcdp(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:setcdp\n");
}
static void setcmp(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:setcmp\n");
}
static void setcsp(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:setcsp\n");
}
static void swapf_a(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:swapf_a\n");
}
static void swapf_b(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:swapf_b\n");
}
static void tfill_xy(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:tfill_xy\n");
}
static void trapl(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:trapl\n");
}
static void vblt_b_l(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:vblt_b_l\n");
}
static void vfill_l(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:vfill_l\n");
}
static void vlcol(void)
{
- if (!state.is_34020) { unimpl(); return; }
+ if (!tms.is_34020) { unimpl(); return; }
logerror("020:vlcol\n");
}
diff --git a/src/emu/cpu/tms34010/34010ops.h b/src/emu/cpu/tms34010/34010ops.h
index a10662d4eb4..0f4a5c28131 100644
--- a/src/emu/cpu/tms34010/34010ops.h
+++ b/src/emu/cpu/tms34010/34010ops.h
@@ -165,8 +165,8 @@ enum
#define TMS34010_WV 0x0800 /* Window Violation Interrupt */
/* IO registers accessor */
-#define IOREG(reg) (state.IOregs[reg])
-#define SMART_IOREG(reg) (state.IOregs[state.is_34020 ? REG020_##reg : REG_##reg])
+#define IOREG(reg) (tms.IOregs[reg])
+#define SMART_IOREG(reg) (tms.IOregs[tms.is_34020 ? REG020_##reg : REG_##reg])
#define PBH (IOREG(REG_CONTROL) & 0x0100)
#define PBV (IOREG(REG_CONTROL) & 0x0200)
diff --git a/src/emu/cpu/tms34010/tms34010.c b/src/emu/cpu/tms34010/tms34010.c
index 9c5ea9bd50a..7df5d2d4c29 100644
--- a/src/emu/cpu/tms34010/tms34010.c
+++ b/src/emu/cpu/tms34010/tms34010.c
@@ -90,7 +90,7 @@ typedef struct tms34010_regs
static int tms34010_ICount;
/* internal state */
-static tms34010_regs state;
+static tms34010_regs tms;
static UINT8 external_host_access;
static const device_config *screen_to_cpu[MAX_CPU];
static UINT8 executing_cpu = 0xff;
@@ -131,46 +131,46 @@ extern UINT32 (*tms34010_rfield_functions[64])(offs_t offset);
#define STBITS_F0 (0x1f << 0)
/* register definitions and shortcuts */
-#define PC (state.pc)
-#define ST (state.st)
-#define N_FLAG (state.st & STBIT_N)
-#define Z_FLAG (state.st & STBIT_Z)
-#define C_FLAG (state.st & STBIT_C)
-#define V_FLAG (state.st & STBIT_V)
-#define P_FLAG (state.st & STBIT_P)
-#define IE_FLAG (state.st & STBIT_IE)
-#define FE0_FLAG (state.st & STBIT_FE0)
-#define FE1_FLAG (state.st & STBIT_FE1)
+#define PC (tms.pc)
+#define ST (tms.st)
+#define N_FLAG (tms.st & STBIT_N)
+#define Z_FLAG (tms.st & STBIT_Z)
+#define C_FLAG (tms.st & STBIT_C)
+#define V_FLAG (tms.st & STBIT_V)
+#define P_FLAG (tms.st & STBIT_P)
+#define IE_FLAG (tms.st & STBIT_IE)
+#define FE0_FLAG (tms.st & STBIT_FE0)
+#define FE1_FLAG (tms.st & STBIT_FE1)
/* register file access */
-#define AREG(i) (state.regs[i].reg)
-#define AREG_XY(i) (state.regs[i].xy)
-#define AREG_X(i) (state.regs[i].xy.x)
-#define AREG_Y(i) (state.regs[i].xy.y)
-#define BREG(i) (state.regs[30 - (i)].reg)
-#define BREG_XY(i) (state.regs[30 - (i)].xy)
-#define BREG_X(i) (state.regs[30 - (i)].xy.x)
-#define BREG_Y(i) (state.regs[30 - (i)].xy.y)
+#define AREG(i) (tms.regs[i].reg)
+#define AREG_XY(i) (tms.regs[i].xy)
+#define AREG_X(i) (tms.regs[i].xy.x)
+#define AREG_Y(i) (tms.regs[i].xy.y)
+#define BREG(i) (tms.regs[30 - (i)].reg)
+#define BREG_XY(i) (tms.regs[30 - (i)].xy)
+#define BREG_X(i) (tms.regs[30 - (i)].xy.x)
+#define BREG_Y(i) (tms.regs[30 - (i)].xy.y)
#define SP AREG(15)
-#define FW(i) ((state.st >> (i ? 6 : 0)) & 0x1f)
-#define FWEX(i) ((state.st >> (i ? 6 : 0)) & 0x3f)
+#define FW(i) ((tms.st >> (i ? 6 : 0)) & 0x1f)
+#define FWEX(i) ((tms.st >> (i ? 6 : 0)) & 0x3f)
/* opcode decode helpers */
-#define SRCREG ((state.op >> 5) & 0x0f)
-#define DSTREG (state.op & 0x0f)
+#define SRCREG ((tms.op >> 5) & 0x0f)
+#define DSTREG (tms.op & 0x0f)
#define SKIP_WORD (PC += (2 << 3))
#define SKIP_LONG (PC += (4 << 3))
-#define PARAM_K ((state.op >> 5) & 0x1f)
-#define PARAM_N (state.op & 0x1f)
-#define PARAM_REL8 ((INT8)state.op)
+#define PARAM_K ((tms.op >> 5) & 0x1f)
+#define PARAM_N (tms.op & 0x1f)
+#define PARAM_REL8 ((INT8)tms.op)
/* memory I/O */
#define WFIELD0(a,b) (*tms34010_wfield_functions[FW(0)])(a,b)
#define WFIELD1(a,b) (*tms34010_wfield_functions[FW(1)])(a,b)
#define RFIELD0(a) (*tms34010_rfield_functions[FWEX(0)])(a)
#define RFIELD1(a) (*tms34010_rfield_functions[FWEX(1)])(a)
-#define WPIXEL(a,b) state.pixel_write(a,b)
-#define RPIXEL(a) state.pixel_read(a)
+#define WPIXEL(a,b) tms.pixel_write(a,b)
+#define RPIXEL(a) tms.pixel_read(a)
/* Implied Operands */
#define SADDR BREG(0)
@@ -212,13 +212,13 @@ extern UINT32 (*tms34010_rfield_functions[64])(offs_t offset);
/* Combine indiviual flags into the Status Register */
INLINE UINT32 GET_ST(void)
{
- return state.st;
+ return tms.st;
}
/* Break up Status Register into indiviual flags */
INLINE void SET_ST(UINT32 st)
{
- state.st = st;
+ tms.st = st;
/* interrupts might have been enabled, check it */
check_interrupt();
}
@@ -330,11 +330,11 @@ static UINT32 read_pixel_32(offs_t offset)
/* Shift register read */
static UINT32 read_pixel_shiftreg(offs_t offset)
{
- if (state.config->to_shiftreg)
- state.config->to_shiftreg(offset, &state.shiftreg[0]);
+ if (tms.config->to_shiftreg)
+ tms.config->to_shiftreg(offset, &tms.shiftreg[0]);
else
fatalerror("To ShiftReg function not set. PC = %08X\n", PC);
- return state.shiftreg[0];
+ return tms.shiftreg[0];
}
@@ -376,7 +376,7 @@ static UINT32 read_pixel_shiftreg(offs_t offset)
UINT32 shiftcount = offset & m1; \
\
/* TODO: plane masking */ \
- data = state.raster_op(data & m2, (pix >> shiftcount) & m2) & m2; \
+ data = tms.raster_op(data & m2, (pix >> shiftcount) & m2) & m2; \
pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \
TMS34010_WRMEM_WORD(a, pix); \
@@ -387,7 +387,7 @@ static UINT32 read_pixel_shiftreg(offs_t offset)
UINT32 shiftcount = offset & m1; \
\
/* TODO: plane masking */ \
- data = state.raster_op(data & m2, (pix >> shiftcount) & m2) & m2; \
+ data = tms.raster_op(data & m2, (pix >> shiftcount) & m2) & m2; \
if (data) \
{ \
pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \
@@ -438,13 +438,13 @@ static void write_pixel_r_16(offs_t offset, UINT32 data)
{
/* TODO: plane masking */
UINT32 a = TOBYTE(offset & 0xfffffff0);
- TMS34010_WRMEM_WORD(a, state.raster_op(data, TMS34010_RDMEM_WORD(a)));
+ TMS34010_WRMEM_WORD(a, tms.raster_op(data, TMS34010_RDMEM_WORD(a)));
}
static void write_pixel_r_32(offs_t offset, UINT32 data)
{
/* TODO: plane masking */
UINT32 a = TOBYTE(offset & 0xffffffe0);
- TMS34010_WRMEM_DWORD(a, state.raster_op(data, TMS34010_RDMEM_DWORD(a)));
+ TMS34010_WRMEM_DWORD(a, tms.raster_op(data, TMS34010_RDMEM_DWORD(a)));
}
/* Raster Op + Transparency */
@@ -456,7 +456,7 @@ static void write_pixel_r_t_16(offs_t offset, UINT32 data)
{
/* TODO: plane masking */
UINT32 a = TOBYTE(offset & 0xfffffff0);
- data = state.raster_op(data, TMS34010_RDMEM_WORD(a));
+ data = tms.raster_op(data, TMS34010_RDMEM_WORD(a));
if (data)
TMS34010_WRMEM_WORD(a, data);
@@ -465,7 +465,7 @@ static void write_pixel_r_t_32(offs_t offset, UINT32 data)
{
/* TODO: plane masking */
UINT32 a = TOBYTE(offset & 0xffffffe0);
- data = state.raster_op(data, TMS34010_RDMEM_DWORD(a));
+ data = tms.raster_op(data, TMS34010_RDMEM_DWORD(a));
if (data)
TMS34010_WRMEM_DWORD(a, data);
@@ -474,8 +474,8 @@ static void write_pixel_r_t_32(offs_t offset, UINT32 data)
/* Shift register write */
static void write_pixel_shiftreg(offs_t offset, UINT32 data)
{
- if (state.config->from_shiftreg)
- state.config->from_shiftreg(offset, &state.shiftreg[0]);
+ if (tms.config->from_shiftreg)
+ tms.config->from_shiftreg(offset, &tms.shiftreg[0]);
else
fatalerror("From ShiftReg function not set. PC = %08X\n", PC);
}
@@ -621,7 +621,7 @@ static void check_interrupt(void)
/* call the callback for externals */
if (irqline >= 0)
- (void)(*state.irq_callback)(state.device, irqline);
+ (void)(*tms.irq_callback)(tms.device, irqline);
}
}
@@ -637,10 +637,10 @@ static CPU_INIT( tms34010 )
external_host_access = FALSE;
- state.config = configdata;
- state.irq_callback = irqcallback;
- state.device = device;
- state.screen = device_list_find_by_tag(device->machine->config->devicelist, VIDEO_SCREEN, configdata->screen_tag);
+ tms.config = configdata;
+ tms.irq_callback = irqcallback;
+ tms.device = device;
+ tms.screen = device_list_find_by_tag(device->machine->config->devicelist, VIDEO_SCREEN, configdata->screen_tag);
/* if we have a scanline callback, make us the owner of this screen */
if (configdata->scanline_callback != NULL)
@@ -652,49 +652,49 @@ static CPU_INIT( tms34010 )
break;
assert(i != MAX_CPU);
- screen_to_cpu[i] = state.screen;
+ screen_to_cpu[i] = tms.screen;
}
/* allocate a scanline timer and set it to go off at the start */
- state.scantimer = timer_alloc(scanline_callback, NULL);
- timer_adjust_oneshot(state.scantimer, attotime_zero, index);
+ tms.scantimer = timer_alloc(scanline_callback, NULL);
+ timer_adjust_oneshot(tms.scantimer, attotime_zero, index);
/* allocate the shiftreg */
- state.shiftreg = auto_malloc(SHIFTREG_SIZE);
-
- state_save_register_item("tms34010", index, state.op);
- state_save_register_item("tms34010", index, state.pc);
- state_save_register_item("tms34010", index, state.st);
- state_save_register_item("tms34010", index, state.reset_deferred);
- state_save_register_item_pointer("tms34010", index, state.shiftreg, SHIFTREG_SIZE / 2);
- state_save_register_item_array("tms34010", index, state.IOregs);
- state_save_register_item("tms34010", index, state.convsp);
- state_save_register_item("tms34010", index, state.convdp);
- state_save_register_item("tms34010", index, state.convmp);
- state_save_register_item("tms34010", index, state.pixelshift);
- state_save_register_item("tms34010", index, state.gfxcycles);
- state_save_register_item_pointer("tms34010", index, (&state.regs[0].reg), ARRAY_LENGTH(state.regs));
+ tms.shiftreg = auto_malloc(SHIFTREG_SIZE);
+
+ state_save_register_item("tms34010", index, tms.op);
+ state_save_register_item("tms34010", index, tms.pc);
+ state_save_register_item("tms34010", index, tms.st);
+ state_save_register_item("tms34010", index, tms.reset_deferred);
+ state_save_register_item_pointer("tms34010", index, tms.shiftreg, SHIFTREG_SIZE / 2);
+ state_save_register_item_array("tms34010", index, tms.IOregs);
+ state_save_register_item("tms34010", index, tms.convsp);
+ state_save_register_item("tms34010", index, tms.convdp);
+ state_save_register_item("tms34010", index, tms.convmp);
+ state_save_register_item("tms34010", index, tms.pixelshift);
+ state_save_register_item("tms34010", index, tms.gfxcycles);
+ state_save_register_item_pointer("tms34010", index, (&tms.regs[0].reg), ARRAY_LENGTH(tms.regs));
state_save_register_postload(Machine, tms34010_state_postload, NULL);
}
static CPU_RESET( tms34010 )
{
/* zap the state and copy in the config pointer */
- const tms34010_config *config = state.config;
- const device_config *screen = state.screen;
- UINT16 *shiftreg = state.shiftreg;
- cpu_irq_callback save_irqcallback = state.irq_callback;
- const device_config *save_device = state.device;
- emu_timer *save_scantimer = state.scantimer;
-
- memset(&state, 0, sizeof(state));
-
- state.config = config;
- state.screen = screen;
- state.shiftreg = shiftreg;
- state.irq_callback = save_irqcallback;
- state.device = save_device;
- state.scantimer = save_scantimer;
+ const tms34010_config *config = tms.config;
+ const device_config *screen = tms.screen;
+ UINT16 *shiftreg = tms.shiftreg;
+ cpu_irq_callback save_irqcallback = tms.irq_callback;
+ const device_config *save_device = tms.device;
+ emu_timer *save_scantimer = tms.scantimer;
+
+ memset(&tms, 0, sizeof(tms));
+
+ tms.config = config;
+ tms.screen = screen;
+ tms.shiftreg = shiftreg;
+ tms.irq_callback = save_irqcallback;
+ tms.device = save_device;
+ tms.scantimer = save_scantimer;
/* fetch the initial PC and reset the state */
PC = RLONG(0xffffffe0) & 0xfffffff0;
@@ -703,8 +703,8 @@ static CPU_RESET( tms34010 )
/* HALT the CPU if requested, and remember to re-read the starting PC */
/* the first time we are run */
- state.reset_deferred = state.config->halt_on_reset;
- if (state.config->halt_on_reset)
+ tms.reset_deferred = tms.config->halt_on_reset;
+ if (tms.config->halt_on_reset)
tms34010_io_register_w(Machine, REG_HSTCTLH, 0x8000, 0xffff);
}
@@ -712,7 +712,7 @@ static CPU_RESET( tms34010 )
static CPU_RESET( tms34020 )
{
CPU_RESET_CALL(tms34010);
- state.is_34020 = 1;
+ tms.is_34020 = 1;
}
#endif
@@ -724,7 +724,7 @@ static CPU_RESET( tms34020 )
static CPU_EXIT( tms34010 )
{
- state.shiftreg = NULL;
+ tms.shiftreg = NULL;
}
@@ -733,17 +733,17 @@ static CPU_EXIT( tms34010 )
Get all registers in given buffer
***************************************************************************/
-static void tms34010_get_context(void *dst)
+static CPU_GET_CONTEXT( tms34010 )
{
if (dst)
- memcpy(dst, &state, TMS34010_STATE_SIZE);
+ memcpy(dst, &tms, TMS34010_STATE_SIZE);
}
#if (HAS_TMS34020)
-static void tms34020_get_context(void *dst)
+static CPU_GET_CONTEXT( tms34020 )
{
if (dst)
- memcpy(dst, &state, TMS34020_STATE_SIZE);
+ memcpy(dst, &tms, TMS34020_STATE_SIZE);
}
#endif
@@ -753,18 +753,18 @@ static void tms34020_get_context(void *dst)
Set all registers to given values
***************************************************************************/
-static void tms34010_set_context(void *src)
+static CPU_SET_CONTEXT( tms34010 )
{
if (src)
- memcpy(&state, src, TMS34010_STATE_SIZE);
+ memcpy(&tms, src, TMS34010_STATE_SIZE);
change_pc(TOBYTE(PC));
}
#if (HAS_TMS34020)
-static void tms34020_set_context(void *src)
+static CPU_SET_CONTEXT( tms34020 )
{
if (src)
- memcpy(&state, src, TMS34020_STATE_SIZE);
+ memcpy(&tms, src, TMS34020_STATE_SIZE);
change_pc(TOBYTE(PC));
}
#endif
@@ -832,9 +832,9 @@ static CPU_EXECUTE( tms34010 )
return cycles;
/* if the CPU's reset was deferred, do it now */
- if (state.reset_deferred)
+ if (tms.reset_deferred)
{
- state.reset_deferred = 0;
+ tms.reset_deferred = 0;
PC = RLONG(0xffffffe0);
}
@@ -845,25 +845,25 @@ static CPU_EXECUTE( tms34010 )
/* check interrupts first */
executing_cpu = cpu_getactivecpu();
check_interrupt();
- if ((state.screen->machine->debug_flags & DEBUG_FLAG_ENABLED) == 0)
+ if ((tms.screen->machine->debug_flags & DEBUG_FLAG_ENABLED) == 0)
{
do
{
- state.op = ROPCODE();
- (*opcode_table[state.op >> 4])();
+ tms.op = ROPCODE();
+ (*opcode_table[tms.op >> 4])();
} while (tms34010_ICount > 0);
}
else
{
do
{
- if ((state.screen->machine->debug_flags & DEBUG_FLAG_CALL_HOOK) != 0)
+ if ((tms.screen->machine->debug_flags & DEBUG_FLAG_CALL_HOOK) != 0)
{
- state.st = GET_ST();
+ tms.st = GET_ST();
debugger_instruction_hook(Machine, PC);
}
- state.op = ROPCODE();
- (*opcode_table[state.op >> 4])();
+ tms.op = ROPCODE();
+ (*opcode_table[tms.op >> 4])();
} while (tms34010_ICount > 0);
}
executing_cpu = 0xff;
@@ -898,8 +898,8 @@ static void set_pixel_function(void)
if (IOREG(REG_DPYCTL) & 0x0800)
{
/* Shift Register Transfer */
- state.pixel_write = write_pixel_shiftreg;
- state.pixel_read = read_pixel_shiftreg;
+ tms.pixel_write = write_pixel_shiftreg;
+ tms.pixel_read = read_pixel_shiftreg;
return;
}
@@ -915,12 +915,12 @@ static void set_pixel_function(void)
}
if (IOREG(REG_CONTROL) & 0x20)
- i1 = state.raster_op ? 3 : 2;
+ i1 = tms.raster_op ? 3 : 2;
else
- i1 = state.raster_op ? 1 : 0;
+ i1 = tms.raster_op ? 1 : 0;
- state.pixel_write = pixel_write_ops[i1][i2];
- state.pixel_read = pixel_read_ops [i2];
+ tms.pixel_write = pixel_write_ops[i1][i2];
+ tms.pixel_read = pixel_read_ops [i2];
}
@@ -944,7 +944,7 @@ static UINT32 (*const raster_ops[32]) (UINT32 newpix, UINT32 oldpix) =
static void set_raster_op(void)
{
- state.raster_op = raster_ops[(IOREG(REG_CONTROL) >> 10) & 0x1f];
+ tms.raster_op = raster_ops[(IOREG(REG_CONTROL) >> 10) & 0x1f];
}
@@ -966,16 +966,16 @@ static TIMER_CALLBACK( scanline_callback )
cpuintrf_push_context(cpunum);
/* fetch the core timing parameters */
- current_visarea = video_screen_get_visible_area(state.screen);
+ current_visarea = video_screen_get_visible_area(tms.screen);
enabled = SMART_IOREG(DPYCTL) & 0x8000;
- master = (state.is_34020 || (SMART_IOREG(DPYCTL) & 0x2000));
+ master = (tms.is_34020 || (SMART_IOREG(DPYCTL) & 0x2000));
vsblnk = SMART_IOREG(VSBLNK);
veblnk = SMART_IOREG(VEBLNK);
vtotal = SMART_IOREG(VTOTAL);
if (!master)
{
- vtotal = MIN(video_screen_get_height(state.screen) - 1, vtotal);
- vcount = video_screen_get_vpos(state.screen);
+ vtotal = MIN(video_screen_get_height(tms.screen) - 1, vtotal);
+ vcount = video_screen_get_vpos(tms.screen);
}
/* update the VCOUNT */
@@ -992,7 +992,7 @@ static TIMER_CALLBACK( scanline_callback )
if (vcount == vsblnk)
{
/* 34010 loads DPYADR with DPYSTRT, and inverts if the origin is 0 */
- if (!state.is_34020)
+ if (!tms.is_34020)
{
IOREG(REG_DPYADR) = IOREG(REG_DPYSTRT);
LOG(("Start of VBLANK, DPYADR = %04X\n", IOREG(REG_DPYADR)));
@@ -1011,19 +1011,19 @@ static TIMER_CALLBACK( scanline_callback )
{
/* only do this if we have an incoming pixel clock */
/* also, only do it if the HEBLNK/HSBLNK values are stable */
- if (master && state.config->scanline_callback != NULL)
+ if (master && tms.config->scanline_callback != NULL)
{
int htotal = SMART_IOREG(HTOTAL);
if (htotal > 0 && vtotal > 0)
{
- attoseconds_t refresh = HZ_TO_ATTOSECONDS(state.config->pixclock) * (htotal + 1) * (vtotal + 1);
- int width = (htotal + 1) * state.config->pixperclock;
+ attoseconds_t refresh = HZ_TO_ATTOSECONDS(tms.config->pixclock) * (htotal + 1) * (vtotal + 1);
+ int width = (htotal + 1) * tms.config->pixperclock;
int height = vtotal + 1;
rectangle visarea;
/* extract the visible area */
- visarea.min_x = SMART_IOREG(HEBLNK) * state.config->pixperclock;
- visarea.max_x = SMART_IOREG(HSBLNK) * state.config->pixperclock - 1;
+ visarea.min_x = SMART_IOREG(HEBLNK) * tms.config->pixperclock;
+ visarea.max_x = SMART_IOREG(HSBLNK) * tms.config->pixperclock - 1;
visarea.min_y = veblnk;
visarea.max_y = vsblnk - 1;
@@ -1033,15 +1033,15 @@ static TIMER_CALLBACK( scanline_callback )
/* because many games play with the HEBLNK/HSBLNK for effects, we don't change
if they are the only thing that has changed, unless they are stable for a couple
of frames */
- int current_width = video_screen_get_width(state.screen);
- int current_height = video_screen_get_height(state.screen);
+ int current_width = video_screen_get_width(tms.screen);
+ int current_height = video_screen_get_height(tms.screen);
if (width != current_width || height != current_height || visarea.min_y != current_visarea->min_y || visarea.max_y != current_visarea->max_y ||
- (state.hblank_stable > 2 && (visarea.min_x != current_visarea->min_x || visarea.max_x != current_visarea->max_x)))
+ (tms.hblank_stable > 2 && (visarea.min_x != current_visarea->min_x || visarea.max_x != current_visarea->max_x)))
{
- video_screen_configure(state.screen, width, height, &visarea, refresh);
+ video_screen_configure(tms.screen, width, height, &visarea, refresh);
}
- state.hblank_stable++;
+ tms.hblank_stable++;
}
LOG(("Configuring screen: HTOTAL=%3d BLANK=%3d-%3d VTOTAL=%3d BLANK=%3d-%3d refresh=%f\n",
@@ -1055,14 +1055,14 @@ static TIMER_CALLBACK( scanline_callback )
}
/* force a partial update within the visible area */
- if (vcount >= current_visarea->min_y && vcount <= current_visarea->max_y && state.config->scanline_callback != NULL)
- video_screen_update_partial(state.screen, vcount);
+ if (vcount >= current_visarea->min_y && vcount <= current_visarea->max_y && tms.config->scanline_callback != NULL)
+ video_screen_update_partial(tms.screen, vcount);
/* if we are in the visible area, increment DPYADR by DUDATE */
if (vcount >= veblnk && vcount < vsblnk)
{
/* 34010 increments by the DUDATE field in DPYCTL */
- if (!state.is_34020)
+ if (!tms.is_34020)
{
UINT16 dpyadr = IOREG(REG_DPYADR);
if ((dpyadr & 3) == 0)
@@ -1092,7 +1092,7 @@ static TIMER_CALLBACK( scanline_callback )
/* note that we add !master (0 or 1) as a attoseconds value; this makes no practical difference */
/* but helps ensure that masters are updated first before slaves */
- timer_adjust_oneshot(state.scantimer, attotime_add_attoseconds(video_screen_get_time_until_pos(state.screen, vcount, 0), !master), cpunum | (vcount << 8));
+ timer_adjust_oneshot(tms.scantimer, attotime_add_attoseconds(video_screen_get_time_until_pos(tms.screen, vcount, 0), !master), cpunum | (vcount << 8));
/* restore the context */
cpuintrf_pop_context();
@@ -1107,11 +1107,11 @@ void tms34010_get_display_params(int cpunum, tms34010_display_params *params)
params->vcount = SMART_IOREG(VCOUNT);
params->veblnk = SMART_IOREG(VEBLNK);
params->vsblnk = SMART_IOREG(VSBLNK);
- params->heblnk = SMART_IOREG(HEBLNK) * state.config->pixperclock;
- params->hsblnk = SMART_IOREG(HSBLNK) * state.config->pixperclock;
+ params->heblnk = SMART_IOREG(HEBLNK) * tms.config->pixperclock;
+ params->hsblnk = SMART_IOREG(HSBLNK) * tms.config->pixperclock;
/* 34010 gets its address from DPYADR and DPYTAP */
- if (!state.is_34020)
+ if (!tms.is_34020)
{
UINT16 dpyadr = IOREG(REG_DPYADR);
if (!(IOREG(REG_DPYCTL) & 0x0400))
@@ -1157,7 +1157,7 @@ VIDEO_UPDATE( tms340x0 )
{
/* call through to the callback */
LOG((" Update: scan=%3d ROW=%04X COL=%04X\n", cliprect->min_y, params.rowaddr, params.coladdr));
- (*state.config->scanline_callback)(screen, bitmap, cliprect->min_y, &params);
+ (*tms.config->scanline_callback)(screen, bitmap, cliprect->min_y, &params);
}
/* otherwise, just blank the current scanline */
@@ -1224,11 +1224,11 @@ WRITE16_HANDLER( tms34010_io_register_w )
switch (data)
{
default:
- case 0x01: state.pixelshift = 0; break;
- case 0x02: state.pixelshift = 1; break;
- case 0x04: state.pixelshift = 2; break;
- case 0x08: state.pixelshift = 3; break;
- case 0x10: state.pixelshift = 4; break;
+ case 0x01: tms.pixelshift = 0; break;
+ case 0x02: tms.pixelshift = 1; break;
+ case 0x04: tms.pixelshift = 2; break;
+ case 0x08: tms.pixelshift = 3; break;
+ case 0x10: tms.pixelshift = 4; break;
}
break;
@@ -1244,7 +1244,7 @@ WRITE16_HANDLER( tms34010_io_register_w )
/* if the CPU is halting itself, stop execution right away */
if ((data & 0x8000) && !external_host_access)
tms34010_ICount = 0;
- cpunum_set_input_line(state.screen->machine, cpunum, INPUT_LINE_HALT, (data & 0x8000) ? ASSERT_LINE : CLEAR_LINE);
+ cpunum_set_input_line(tms.screen->machine, cpunum, INPUT_LINE_HALT, (data & 0x8000) ? ASSERT_LINE : CLEAR_LINE);
/* NMI issued? */
if (data & 0x0100)
@@ -1272,13 +1272,13 @@ WRITE16_HANDLER( tms34010_io_register_w )
/* the TMS34010 can set output interrupt? */
if (!(oldreg & 0x0080) && (newreg & 0x0080))
{
- if (state.config->output_int)
- (*state.config->output_int)(1);
+ if (tms.config->output_int)
+ (*tms.config->output_int)(1);
}
else if ((oldreg & 0x0080) && !(newreg & 0x0080))
{
- if (state.config->output_int)
- (*state.config->output_int)(0);
+ if (tms.config->output_int)
+ (*tms.config->output_int)(0);
}
/* input interrupt? (should really be state-based, but the functions don't exist!) */
@@ -1289,11 +1289,11 @@ WRITE16_HANDLER( tms34010_io_register_w )
break;
case REG_CONVSP:
- state.convsp = 1 << (~data & 0x1f);
+ tms.convsp = 1 << (~data & 0x1f);
break;
case REG_CONVDP:
- state.convdp = 1 << (~data & 0x1f);
+ tms.convdp = 1 << (~data & 0x1f);
break;
case REG_INTENB:
@@ -1313,12 +1313,12 @@ WRITE16_HANDLER( tms34010_io_register_w )
case REG_HEBLNK:
case REG_HSBLNK:
if (oldreg != data)
- state.hblank_stable = 0;
+ tms.hblank_stable = 0;
break;
}
if (LOG_CONTROL_REGS)
- logerror("CPU#%d@%08X: %s = %04X (%d)\n", cpunum, activecpu_get_pc(), ioreg_name[offset], IOREG(offset), video_screen_get_vpos(state.screen));
+ logerror("CPU#%d@%08X: %s = %04X (%d)\n", cpunum, activecpu_get_pc(), ioreg_name[offset], IOREG(offset), video_screen_get_vpos(tms.screen));
}
@@ -1355,7 +1355,7 @@ WRITE16_HANDLER( tms34020_io_register_w )
IOREG(offset) = data;
if (LOG_CONTROL_REGS)
- logerror("CPU#%d@%08X: %s = %04X (%d)\n", cpunum, activecpu_get_pc(), ioreg020_name[offset], IOREG(offset), video_screen_get_vpos(state.screen));
+ logerror("CPU#%d@%08X: %s = %04X (%d)\n", cpunum, activecpu_get_pc(), ioreg020_name[offset], IOREG(offset), video_screen_get_vpos(tms.screen));
switch (offset)
{
@@ -1373,12 +1373,12 @@ WRITE16_HANDLER( tms34020_io_register_w )
switch (data)
{
default:
- case 0x01: state.pixelshift = 0; break;
- case 0x02: state.pixelshift = 1; break;
- case 0x04: state.pixelshift = 2; break;
- case 0x08: state.pixelshift = 3; break;
- case 0x10: state.pixelshift = 4; break;
- case 0x20: state.pixelshift = 5; break;
+ case 0x01: tms.pixelshift = 0; break;
+ case 0x02: tms.pixelshift = 1; break;
+ case 0x04: tms.pixelshift = 2; break;
+ case 0x08: tms.pixelshift = 3; break;
+ case 0x10: tms.pixelshift = 4; break;
+ case 0x20: tms.pixelshift = 5; break;
}
break;
@@ -1395,7 +1395,7 @@ WRITE16_HANDLER( tms34020_io_register_w )
/* if the CPU is halting itself, stop execution right away */
if ((data & 0x8000) && !external_host_access)
tms34010_ICount = 0;
- cpunum_set_input_line(state.screen->machine, cpunum, INPUT_LINE_HALT, (data & 0x8000) ? ASSERT_LINE : CLEAR_LINE);
+ cpunum_set_input_line(tms.screen->machine, cpunum, INPUT_LINE_HALT, (data & 0x8000) ? ASSERT_LINE : CLEAR_LINE);
/* NMI issued? */
if (data & 0x0100)
@@ -1423,13 +1423,13 @@ WRITE16_HANDLER( tms34020_io_register_w )
/* the TMS34010 can set output interrupt? */
if (!(oldreg & 0x0080) && (newreg & 0x0080))
{
- if (state.config->output_int)
- (*state.config->output_int)(1);
+ if (tms.config->output_int)
+ (*tms.config->output_int)(1);
}
else if ((oldreg & 0x0080) && !(newreg & 0x0080))
{
- if (state.config->output_int)
- (*state.config->output_int)(0);
+ if (tms.config->output_int)
+ (*tms.config->output_int)(0);
}
/* input interrupt? (should really be state-based, but the functions don't exist!) */
@@ -1457,36 +1457,36 @@ WRITE16_HANDLER( tms34020_io_register_w )
if (data & 0x001f)
{
if (data & 0x1f00)
- state.convsp = (1 << (~data & 0x1f)) + (1 << (~(data >> 8) & 0x1f));
+ tms.convsp = (1 << (~data & 0x1f)) + (1 << (~(data >> 8) & 0x1f));
else
- state.convsp = 1 << (~data & 0x1f);
+ tms.convsp = 1 << (~data & 0x1f);
}
else
- state.convsp = data;
+ tms.convsp = data;
break;
case REG020_CONVDP:
if (data & 0x001f)
{
if (data & 0x1f00)
- state.convdp = (1 << (~data & 0x1f)) + (1 << (~(data >> 8) & 0x1f));
+ tms.convdp = (1 << (~data & 0x1f)) + (1 << (~(data >> 8) & 0x1f));
else
- state.convdp = 1 << (~data & 0x1f);
+ tms.convdp = 1 << (~data & 0x1f);
}
else
- state.convdp = data;
+ tms.convdp = data;
break;
case REG020_CONVMP:
if (data & 0x001f)
{
if (data & 0x1f00)
- state.convmp = (1 << (~data & 0x1f)) + (1 << (~(data >> 8) & 0x1f));
+ tms.convmp = (1 << (~data & 0x1f)) + (1 << (~(data >> 8) & 0x1f));
else
- state.convmp = 1 << (~data & 0x1f);
+ tms.convmp = 1 << (~data & 0x1f);
}
else
- state.convmp = data;
+ tms.convmp = data;
break;
case REG020_DPYSTRT:
@@ -1497,7 +1497,7 @@ WRITE16_HANDLER( tms34020_io_register_w )
case REG020_HEBLNK:
case REG020_HSBLNK:
if (oldreg != data)
- state.hblank_stable = 0;
+ tms.hblank_stable = 0;
break;
}
}
@@ -1520,9 +1520,9 @@ READ16_HANDLER( tms34010_io_register_r )
{
case REG_HCOUNT:
/* scale the horizontal position from screen width to HTOTAL */
- result = video_screen_get_hpos(state.screen);
+ result = video_screen_get_hpos(tms.screen);
total = IOREG(REG_HTOTAL) + 1;
- result = result * total / video_screen_get_width(state.screen);
+ result = result * total / video_screen_get_width(tms.screen);
/* offset by the HBLANK end */
result += IOREG(REG_HEBLNK);
@@ -1542,7 +1542,7 @@ READ16_HANDLER( tms34010_io_register_r )
/* have an IRQ handler. For this reason, we return it signalled a bit early in order */
/* to make it past these loops. */
if (SMART_IOREG(VCOUNT) + 1 == SMART_IOREG(DPYINT) &&
- attotime_compare(timer_timeleft(state.scantimer), ATTOTIME_IN_HZ(40000000/8/3)) < 0)
+ attotime_compare(timer_timeleft(tms.scantimer), ATTOTIME_IN_HZ(40000000/8/3)) < 0)
result |= TMS34010_DI;
return result;
}
@@ -1563,9 +1563,9 @@ READ16_HANDLER( tms34020_io_register_r )
{
case REG020_HCOUNT:
/* scale the horizontal position from screen width to HTOTAL */
- result = video_screen_get_hpos(state.screen);
+ result = video_screen_get_hpos(tms.screen);
total = IOREG(REG020_HTOTAL) + 1;
- result = result * total / video_screen_get_width(state.screen);
+ result = result * total / video_screen_get_width(tms.screen);
/* offset by the HBLANK end */
result += IOREG(REG020_HEBLNK);
@@ -1688,8 +1688,8 @@ void tms34010_host_w(int cpunum, int reg, int data)
/* control register */
case TMS34010_HOST_CONTROL:
external_host_access = TRUE;
- tms34010_io_register_w(state.screen->machine, REG_HSTCTLH, data & 0xff00, 0xffff);
- tms34010_io_register_w(state.screen->machine, REG_HSTCTLL, data & 0x00ff, 0xffff);
+ tms34010_io_register_w(tms.screen->machine, REG_HSTCTLH, data & 0xff00, 0xffff);
+ tms34010_io_register_w(tms.screen->machine, REG_HSTCTLL, data & 0x00ff, 0xffff);
external_host_access = FALSE;
break;
@@ -1771,9 +1771,9 @@ int tms34010_host_r(int cpunum, int reg)
* Generic set_info
**************************************************************************/
-static void tms34010_set_info(UINT32 _state, cpuinfo *info)
+static CPU_SET_INFO( tms34010 )
{
- switch (_state)
+ switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(0, info->i); break;
@@ -1823,9 +1823,9 @@ static void tms34010_set_info(UINT32 _state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void tms34010_get_info(UINT32 _state, cpuinfo *info)
+CPU_GET_INFO( tms34010 )
{
- switch (_state)
+ switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
case CPUINFO_INT_CONTEXT_SIZE: info->i = TMS34010_STATE_SIZE; break;
@@ -1891,15 +1891,15 @@ void tms34010_get_info(UINT32 _state, cpuinfo *info)
case CPUINFO_INT_REGISTER + TMS34010_B14: info->i = BREG(14); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = tms34010_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms34010_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms34010_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms34010); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(tms34010); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(tms34010); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms34010); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms34010); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(tms34010); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms34010); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms34010_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms34010); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms34010_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -1911,29 +1911,29 @@ void tms34010_get_info(UINT32 _state, cpuinfo *info)
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
- state.st & 0x80000000 ? 'N':'.',
- state.st & 0x40000000 ? 'C':'.',
- state.st & 0x20000000 ? 'Z':'.',
- state.st & 0x10000000 ? 'V':'.',
- state.st & 0x02000000 ? 'P':'.',
- state.st & 0x00200000 ? 'I':'.',
- state.st & 0x00000800 ? 'E':'.',
- state.st & 0x00000400 ? 'F':'.',
- state.st & 0x00000200 ? 'F':'.',
- state.st & 0x00000100 ? 'F':'.',
- state.st & 0x00000080 ? 'F':'.',
- state.st & 0x00000040 ? 'F':'.',
- state.st & 0x00000020 ? 'E':'.',
- state.st & 0x00000010 ? 'F':'.',
- state.st & 0x00000008 ? 'F':'.',
- state.st & 0x00000004 ? 'F':'.',
- state.st & 0x00000002 ? 'F':'.',
- state.st & 0x00000001 ? 'F':'.');
+ tms.st & 0x80000000 ? 'N':'.',
+ tms.st & 0x40000000 ? 'C':'.',
+ tms.st & 0x20000000 ? 'Z':'.',
+ tms.st & 0x10000000 ? 'V':'.',
+ tms.st & 0x02000000 ? 'P':'.',
+ tms.st & 0x00200000 ? 'I':'.',
+ tms.st & 0x00000800 ? 'E':'.',
+ tms.st & 0x00000400 ? 'F':'.',
+ tms.st & 0x00000200 ? 'F':'.',
+ tms.st & 0x00000100 ? 'F':'.',
+ tms.st & 0x00000080 ? 'F':'.',
+ tms.st & 0x00000040 ? 'F':'.',
+ tms.st & 0x00000020 ? 'E':'.',
+ tms.st & 0x00000010 ? 'F':'.',
+ tms.st & 0x00000008 ? 'F':'.',
+ tms.st & 0x00000004 ? 'F':'.',
+ tms.st & 0x00000002 ? 'F':'.',
+ tms.st & 0x00000001 ? 'F':'.');
break;
- case CPUINFO_STR_REGISTER + TMS34010_PC: sprintf(info->s, "PC :%08X", state.pc); break;
+ case CPUINFO_STR_REGISTER + TMS34010_PC: sprintf(info->s, "PC :%08X", tms.pc); break;
case CPUINFO_STR_REGISTER + TMS34010_SP: sprintf(info->s, "SP :%08X", AREG(15)); break;
- case CPUINFO_STR_REGISTER + TMS34010_ST: sprintf(info->s, "ST :%08X", state.st); break;
+ case CPUINFO_STR_REGISTER + TMS34010_ST: sprintf(info->s, "ST :%08X", tms.st); break;
case CPUINFO_STR_REGISTER + TMS34010_A0: sprintf(info->s, "A0 :%08X", AREG( 0)); break;
case CPUINFO_STR_REGISTER + TMS34010_A1: sprintf(info->s, "A1 :%08X", AREG( 1)); break;
case CPUINFO_STR_REGISTER + TMS34010_A2: sprintf(info->s, "A2 :%08X", AREG( 2)); break;
@@ -1973,9 +1973,9 @@ void tms34010_get_info(UINT32 _state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void tms34020_get_info(UINT32 _state, cpuinfo *info)
+CPU_GET_INFO( tms34020 )
{
- switch (_state)
+ switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
case CPUINFO_INT_CONTEXT_SIZE: info->i = TMS34020_STATE_SIZE; break;
@@ -1983,15 +1983,15 @@ void tms34020_get_info(UINT32 _state, cpuinfo *info)
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms34020_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms34020_set_context; break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(tms34020); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(tms34020); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms34020); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms34020_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms34020); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "TMS34020"); break;
- default: tms34010_get_info(_state, info); break;
+ default: CPU_GET_INFO_CALL(tms34010); break;
}
}
#endif
diff --git a/src/emu/cpu/tms34010/tms34010.h b/src/emu/cpu/tms34010/tms34010.h
index 7ffa9b94011..61e495f6dce 100644
--- a/src/emu/cpu/tms34010/tms34010.h
+++ b/src/emu/cpu/tms34010/tms34010.h
@@ -86,14 +86,14 @@ struct _tms34010_config
VIDEO_UPDATE( tms340x0 );
void tms34010_get_display_params(int cpunum, tms34010_display_params *params);
-void tms34010_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( tms34010 );
int tms34010_io_display_blanked(int cpu);
int tms34010_get_DPYSTRT(int cpu);
/* PUBLIC FUNCTIONS - 34020 */
-void tms34020_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( tms34020 );
int tms34020_io_display_blanked(int cpu);
int tms34020_get_DPYSTRT(int cpu);
@@ -124,7 +124,7 @@ READ16_HANDLER( tms34020_io_register_r );
#define TOWORD(bitaddr) ((offs_t)(bitaddr) >> 4)
-offs_t tms34010_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t tms34020_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( tms34010 );
+CPU_DISASSEMBLE( tms34020 );
#endif /* __TMS34010_H__ */
diff --git a/src/emu/cpu/tms7000/7000dasm.c b/src/emu/cpu/tms7000/7000dasm.c
index 358c5bcce0d..b86843aac8b 100644
--- a/src/emu/cpu/tms7000/7000dasm.c
+++ b/src/emu/cpu/tms7000/7000dasm.c
@@ -358,7 +358,7 @@ static const opcodeinfo opcodes[] = {
{0x00, "NOP", 23, 0 }
};
-unsigned tms7000_dasm( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram )
+CPU_DISASSEMBLE( tms7000 )
{
int opcode, i, size = 1;
int pos = 0;
diff --git a/src/emu/cpu/tms7000/tms7000.c b/src/emu/cpu/tms7000/tms7000.c
index 8e0dd1ca3a0..78d7a1d3ead 100644
--- a/src/emu/cpu/tms7000/tms7000.c
+++ b/src/emu/cpu/tms7000/tms7000.c
@@ -40,8 +40,8 @@
/* Private prototypes */
static void tms7000_set_irq_line(int irqline, int state);
-static void tms7000_get_context(void *dst);
-static void tms7000_set_context(void *src);
+static CPU_GET_CONTEXT( tms7000 );
+static CPU_SET_CONTEXT( tms7000 );
static void tms7000_check_IRQ_lines( void );
static void tms7000_do_interrupt( UINT16 address, UINT8 line );
static CPU_EXECUTE( tms7000 );
@@ -167,7 +167,7 @@ ADDRESS_MAP_END
* Get all registers in given buffer
****************************************************************************/
-static void tms7000_get_context(void *dst)
+static CPU_GET_CONTEXT( tms7000 )
{
if( dst )
*(tms7000_Regs*)dst = tms7000;
@@ -176,7 +176,7 @@ static void tms7000_get_context(void *dst)
/****************************************************************************
* Set all registers to given values
****************************************************************************/
-static void tms7000_set_context(void *src)
+static CPU_SET_CONTEXT( tms7000 )
{
if( src )
tms7000 = *(tms7000_Regs*)src;
@@ -257,7 +257,7 @@ static CPU_RESET( tms7000 )
* Generic set_info
**************************************************************************/
-static void tms7000_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( tms7000 )
{
switch (state)
{
@@ -282,7 +282,7 @@ static void tms7000_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void tms7000_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( tms7000 )
{
switch( state )
@@ -326,14 +326,14 @@ void tms7000_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + TMS7000_T1_DEC: info->i = tms7000.t1_decrementer; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = tms7000_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms7000_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms7000_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms7000); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(tms7000); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(tms7000); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms7000); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms7000); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms7000); break;
case CPUINFO_PTR_BURN: info->burn = NULL; /* Not supported */break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms7000_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms7000); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms7000_icount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP: info->internal_map8 = address_map_tms7000_mem; break;
@@ -367,7 +367,7 @@ void tms7000_get_info(UINT32 state, cpuinfo *info)
}
}
-void tms7000_exl_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( tms7000_exl )
{
switch( state )
{
@@ -375,7 +375,7 @@ void tms7000_exl_get_info(UINT32 state, cpuinfo *info)
info->execute = CPU_EXECUTE_NAME(tms7000_exl);
break;
default:
- tms7000_get_info(state, info);
+ CPU_GET_INFO_CALL(tms7000);
break;
}
}
diff --git a/src/emu/cpu/tms7000/tms7000.h b/src/emu/cpu/tms7000/tms7000.h
index 541dcc1f79b..5536f896773 100644
--- a/src/emu/cpu/tms7000/tms7000.h
+++ b/src/emu/cpu/tms7000/tms7000.h
@@ -48,9 +48,9 @@ enum
/* PUBLIC FUNCTIONS */
extern void tms7000_A6EC1( void ); /* External event counter */
-extern void tms7000_get_info(UINT32 state, cpuinfo *info);
-extern void tms7000_exl_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( tms7000 );
+extern CPU_GET_INFO( tms7000_exl );
-extern unsigned tms7000_dasm( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram );
+extern CPU_DISASSEMBLE( tms7000 );
#endif /* __TMS7000_H__ */
diff --git a/src/emu/cpu/tms9900/99xxcore.h b/src/emu/cpu/tms9900/99xxcore.h
index fa830d66022..d63aa7589d2 100644
--- a/src/emu/cpu/tms9900/99xxcore.h
+++ b/src/emu/cpu/tms9900/99xxcore.h
@@ -94,16 +94,19 @@ Other references can be found on spies.com:
#if (TMS99XX_MODEL == TI990_10_ID)
#define TMS99XX_PREFIX ti990_10
+ #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( ti990_10 )
#define TMS99XX_CPU_NAME "TI990/10"
#elif (TMS99XX_MODEL == TMS9900_ID)
#define TMS99XX_PREFIX tms9900
+ #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms9900 )
#define TMS99XX_CPU_NAME "TMS9900"
#elif (TMS99XX_MODEL == TMS9940_ID)
#define TMS99XX_PREFIX tms9940
+ #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms9940 )
#define TMS99XX_CPU_NAME "TMS9940"
#error "tms9940 is not yet supported"
@@ -111,11 +114,13 @@ Other references can be found on spies.com:
#elif (TMS99XX_MODEL == TMS9980_ID)
#define TMS99XX_PREFIX tms9980a
+ #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms9980a )
#define TMS99XX_CPU_NAME "TMS9980A/TMS9981"
#elif (TMS99XX_MODEL == TMS9985_ID)
#define TMS99XX_PREFIX tms9985
+ #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms9985 )
#define TMS99XX_CPU_NAME "TMS9985"
#error "tms9985 is not yet supported"
@@ -123,6 +128,7 @@ Other references can be found on spies.com:
#elif (TMS99XX_MODEL == TMS9989_ID)
#define TMS99XX_PREFIX tms9989
+ #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms9989 )
#define TMS99XX_CPU_NAME "TMS9989"
#error "tms9989 is not yet supported"
@@ -130,11 +136,13 @@ Other references can be found on spies.com:
#elif (TMS99XX_MODEL == TMS9995_ID)
#define TMS99XX_PREFIX tms9995
+ #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms9995 )
#define TMS99XX_CPU_NAME "TMS9995"
#elif (TMS99XX_MODEL == TMS99000_ID)
#define TMS99XX_PREFIX tms99000
+ #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms99000 )
#define TMS99XX_CPU_NAME "TMS99000"
#error "tms99000 is not yet supported"
@@ -142,6 +150,7 @@ Other references can be found on spies.com:
#elif (TMS99XX_MODEL == TMS99105A_ID)
#define TMS99XX_PREFIX tms99105a
+ #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms99105a )
#define TMS99XX_CPU_NAME "TMS99105A"
#error "tms99105a is not yet supported"
@@ -149,6 +158,7 @@ Other references can be found on spies.com:
#elif (TMS99XX_MODEL == TMS99110A_ID)
#define TMS99XX_PREFIX tms99110a
+ #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms99110a )
#define TMS99XX_CPU_NAME "TMS99110A"
#error "tms99110a is not yet supported"
@@ -165,7 +175,6 @@ Other references can be found on spies.com:
#define RESET_PARAM(prefix) concat2(prefix,reset_param)
#define TMS99XX_ICOUNT ICOUNT(TMS99XX_PREFIX)
-#define TMS99XX_GET_INFO GET_INFO(TMS99XX_PREFIX)
#define TMS99XX_RESET_PARAM RESET_PARAM(TMS99XX_PREFIX)
@@ -1551,7 +1560,7 @@ static CPU_EXECUTE( tms99xx )
return cycles - TMS99XX_ICOUNT;
}
-static void tms99xx_get_context(void *dst)
+static CPU_GET_CONTEXT( tms99xx )
{
setstat();
@@ -1559,7 +1568,7 @@ static void tms99xx_get_context(void *dst)
*(tms99xx_Regs*)dst = I;
}
-static void tms99xx_set_context(void *src)
+static CPU_SET_CONTEXT( tms99xx )
{
if( src )
{
@@ -1959,7 +1968,7 @@ static void field_interrupt(void)
#endif
-static unsigned tms99xx_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( tms99xx )
{
return Dasm9900(buffer, pc, TMS99XX_MODEL, oprom, opram);
}
@@ -4589,7 +4598,7 @@ INLINE void execute(UINT16 opcode)
* Generic set_info
**************************************************************************/
-static void tms99xx_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( tms99xx )
{
switch (state)
{
@@ -4794,15 +4803,15 @@ void TMS99XX_GET_INFO(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + TMS9900_R15: info->i = READREG_DEBUG(R15); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = tms99xx_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = tms99xx_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = tms99xx_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms99xx); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(tms99xx); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(tms99xx); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms99xx); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms99xx); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(tms99xx); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms99xx); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = tms99xx_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms99xx); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &TMS99XX_ICOUNT; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/tms9900/tms9900.h b/src/emu/cpu/tms9900/tms9900.h
index 4a025efbeb2..cceb2747c65 100644
--- a/src/emu/cpu/tms9900/tms9900.h
+++ b/src/emu/cpu/tms9900/tms9900.h
@@ -48,7 +48,7 @@ enum
#if (HAS_TI990_10)
-extern void ti990_10_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( ti990_10 );
/*
structure with the parameters ti990_10_reset wants.
@@ -77,7 +77,7 @@ extern WRITE8_HANDLER(ti990_10_eir_cru_w);
#if (HAS_TMS9900)
-extern void tms9900_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( tms9900 );
/*
structure with optional parameters for tms9900_reset.
@@ -91,7 +91,7 @@ typedef struct tms9900reset_param
#if (HAS_TMS9940)
-extern void tms9940_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( tms9940 );
/*
structure with optional parameters for tms9940_reset.
@@ -105,7 +105,7 @@ typedef struct tms9940reset_param
#if (HAS_TMS9980)
-extern void tms9980a_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( tms9980a );
/*
structure with optional parameters for tms9980a_reset.
@@ -119,7 +119,7 @@ typedef struct tms9980areset_param
#if (HAS_TMS9985)
-extern void tms9985_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( tms9985 );
/*
structure with optional parameters for tms9985_reset.
@@ -133,7 +133,7 @@ typedef struct tms9985reset_param
#if (HAS_TMS9989)
-extern void tms9989_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( tms9989 );
/*
structure with optional parameters for tms9989_reset.
@@ -147,7 +147,7 @@ typedef struct tms9989reset_param
#if (HAS_TMS9995)
-extern void tms9995_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( tms9995 );
/*
structure with the parameters tms9995_reset wants.
@@ -177,7 +177,7 @@ extern WRITE8_HANDLER(tms9995_internal2_w);
#if (HAS_TMS99000)
-extern void tms99000_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( tms99000 );
/*
structure with optional parameters for tms99000_reset.
@@ -191,7 +191,7 @@ typedef struct tms99000reset_param
#if (HAS_TMS99105A)
-extern void tms99105a_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( tms99105a );
/*
structure with optional parameters for tms99105a_reset.
@@ -205,7 +205,7 @@ typedef struct tms99105areset_param
#if (HAS_TMS99110A)
-extern void tms99110a_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( tms99110a );
/*
structure with optional parameters for tms99110a_reset.
diff --git a/src/emu/cpu/upd7810/7810dasm.c b/src/emu/cpu/upd7810/7810dasm.c
index fcb8014e096..d71adc8247b 100644
--- a/src/emu/cpu/upd7810/7810dasm.c
+++ b/src/emu/cpu/upd7810/7810dasm.c
@@ -5442,21 +5442,23 @@ static offs_t Dasm( char *buffer, offs_t pc, const struct dasm_s *dasmXX, const
return idx | flags | DASMFLAG_SUPPORTED;
}
-offs_t upd7810_dasm( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram )
+CPU_DISASSEMBLE( upd7810 )
{
return Dasm( buffer, pc, dasmXX_7810, oprom, opram, 1 );
}
-offs_t upd7807_dasm( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram )
+CPU_DISASSEMBLE( upd7807 )
{
return Dasm( buffer, pc, dasmXX_7807, oprom, opram, 1 );
}
-offs_t upd7801_dasm( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram ) {
+CPU_DISASSEMBLE( upd7801 )
+{
return Dasm( buffer, pc, dasmXX_7801, oprom, opram, 0 );
}
-offs_t upd78c05_dasm( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram ) {
+CPU_DISASSEMBLE( upd78c05 )
+{
return Dasm( buffer, pc, dasmXX_78c05, oprom, opram, 0 );
}
diff --git a/src/emu/cpu/upd7810/upd7810.c b/src/emu/cpu/upd7810/upd7810.c
index 592ed74e7d0..731fa82dbfc 100644
--- a/src/emu/cpu/upd7810/upd7810.c
+++ b/src/emu/cpu/upd7810/upd7810.c
@@ -1785,13 +1785,13 @@ static CPU_EXECUTE( upd7810 )
return cycles - upd7810_icount;
}
-static void upd7810_get_context (void *dst)
+static CPU_GET_CONTEXT( upd7810 )
{
if (dst)
memcpy(dst, &upd7810, sizeof(upd7810));
}
-static void upd7810_set_context (void *src)
+static CPU_SET_CONTEXT( upd7810 )
{
if (src)
memcpy(&upd7810, src, sizeof(upd7810));
@@ -1840,7 +1840,7 @@ static void set_irq_line(int irqline, int state)
* Generic set_info
**************************************************************************/
-static void upd7810_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( upd7810 )
{
switch (state)
{
@@ -1913,7 +1913,7 @@ static void upd7810_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void upd7810_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( upd7810 )
{
switch (state)
{
@@ -2000,15 +2000,15 @@ void upd7810_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + UPD7810_CO1: info->i = CO1; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = upd7810_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = upd7810_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = upd7810_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(upd7810); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(upd7810); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(upd7810); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(upd7810); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(upd7810); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(upd7810); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(upd7810); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = upd7810_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(upd7810); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &upd7810_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -2088,38 +2088,38 @@ void upd7810_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void upd7807_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( upd7807 )
{
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(upd7807); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = upd7807_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(upd7807); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "uPD7807"); break;
- default: upd7810_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(upd7810); break;
}
}
-void upd7801_get_info(UINT32 state, cpuinfo *info) {
+CPU_GET_INFO( upd7801 ) {
switch( state ) {
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(upd7801); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = upd7801_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(upd7801); break;
case CPUINFO_STR_NAME: strcpy(info->s, "uPD7801"); break;
- default: upd7810_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(upd7810); break;
}
}
-void upd78c05_get_info(UINT32 state, cpuinfo *info ) {
+CPU_GET_INFO( upd78c05 ) {
switch ( state ) {
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(upd78c05); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = upd78c05_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(upd78c05); break;
case CPUINFO_STR_NAME: strcpy(info->s, "uPD78C05"); break;
@@ -2157,16 +2157,16 @@ void upd78c05_get_info(UINT32 state, cpuinfo *info ) {
case CPUINFO_STR_REGISTER + UPD7810_CO0:
case CPUINFO_STR_REGISTER + UPD7810_CO1: break;
- default: upd7801_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(upd7801); break;
}
}
-void upd78c06_get_info(UINT32 state, cpuinfo *info ) {
+CPU_GET_INFO( upd78c06 ) {
switch ( state ) {
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(upd78c06); break;
case CPUINFO_STR_NAME: strcpy(info->s, "uPD78C06"); break;
- default: upd78c05_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(upd78c05); break;
}
}
diff --git a/src/emu/cpu/upd7810/upd7810.h b/src/emu/cpu/upd7810/upd7810.h
index 950162dcf6f..1f6fce2d5bb 100644
--- a/src/emu/cpu/upd7810/upd7810.h
+++ b/src/emu/cpu/upd7810/upd7810.h
@@ -71,11 +71,11 @@ enum
#define UPD7810_INTF2 1
#define UPD7810_INTFE1 4
-void upd7810_get_info(UINT32 state, cpuinfo *info);
-void upd7807_get_info(UINT32 state, cpuinfo *info);
-void upd7801_get_info(UINT32 state, cpuinfo *info);
-void upd78c05_get_info(UINT32 state, cpuinfo *info);
-void upd78c06_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( upd7810 );
+CPU_GET_INFO( upd7807 );
+CPU_GET_INFO( upd7801 );
+CPU_GET_INFO( upd78c05 );
+CPU_GET_INFO( upd78c06 );
typedef struct {
PAIR ppc; /* previous program counter */
@@ -167,9 +167,9 @@ typedef struct {
const device_config *device;
} UPD7810;
-offs_t upd7810_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t upd7807_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t upd7801_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t upd78c05_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( upd7810 );
+CPU_DISASSEMBLE( upd7807 );
+CPU_DISASSEMBLE( upd7801 );
+CPU_DISASSEMBLE( upd78c05 );
#endif /* __UPD7810_H__ */
diff --git a/src/emu/cpu/v30mz/necintrf.h b/src/emu/cpu/v30mz/necintrf.h
index 0bc97f84d88..188b42bf16a 100644
--- a/src/emu/cpu/v30mz/necintrf.h
+++ b/src/emu/cpu/v30mz/necintrf.h
@@ -13,6 +13,6 @@ enum
};
/* Public functions */
-extern void v30mz_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( v30mz );
#endif /* __NECINTRF_H__ */
diff --git a/src/emu/cpu/v30mz/v30mz.c b/src/emu/cpu/v30mz/v30mz.c
index 6fe7f128444..c0c4478eb55 100644
--- a/src/emu/cpu/v30mz/v30mz.c
+++ b/src/emu/cpu/v30mz/v30mz.c
@@ -879,13 +879,13 @@ static void i_invalid(void)
/*****************************************************************************/
-static void nec_get_context(void *dst)
+static CPU_GET_CONTEXT( nec )
{
if( dst )
*(nec_Regs*)dst = I;
}
-static void nec_set_context(void *src)
+static CPU_SET_CONTEXT( nec )
{
if( src )
{
@@ -921,7 +921,7 @@ static void set_irq_line(int irqline, int state)
}
}
-static offs_t nec_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static CPU_DISASSEMBLE( nec )
{
return necv_dasm_one(buffer, pc, oprom);
}
@@ -985,7 +985,7 @@ static CPU_EXECUTE( v30mz )
* Generic set_info
**************************************************************************/
-static void nec_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( nec )
{
switch (state)
{
@@ -1040,7 +1040,7 @@ static void nec_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void v30mz_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( v30mz )
{
int flags;
@@ -1094,13 +1094,13 @@ void v30mz_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + NEC_PENDING: info->i = I.pending_irq; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = nec_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = nec_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = nec_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(nec); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(nec); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(nec); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(nec); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(nec); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = nec_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(nec); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &nec_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/v60/v60.c b/src/emu/cpu/v60/v60.c
index e0a07e5141b..6ddcab45dd4 100644
--- a/src/emu/cpu/v60/v60.c
+++ b/src/emu/cpu/v60/v60.c
@@ -439,13 +439,13 @@ static CPU_EXECUTE( v60 )
return cycles - v60_ICount;
}
-static void v60_get_context(void *dst)
+static CPU_GET_CONTEXT( v60 )
{
if(dst)
*(struct v60info *)dst = v60;
}
-static void v60_set_context(void *src)
+static CPU_SET_CONTEXT( v60 )
{
if(src)
{
@@ -455,15 +455,15 @@ static void v60_set_context(void *src)
}
-offs_t v60_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
-offs_t v70_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( v60 );
+CPU_DISASSEMBLE( v70 );
/**************************************************************************
* Generic set_info
**************************************************************************/
-static void v60_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( v60 )
{
switch (state)
{
@@ -541,7 +541,7 @@ static void v60_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void v60_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( v60 )
{
switch (state)
{
@@ -634,15 +634,15 @@ void v60_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + V60_ADTMR1: info->i = ADTMR1; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = v60_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = v60_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = v60_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(v60); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(v60); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(v60); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(v60); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(v60); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(v60); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(v60); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = v60_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(v60); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &v60_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
@@ -720,7 +720,7 @@ void v60_get_info(UINT32 state, cpuinfo *info)
* CPU-specific set_info
**************************************************************************/
-void v70_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( v70 )
{
switch (state)
{
@@ -731,11 +731,11 @@ void v70_get_info(UINT32 state, cpuinfo *info)
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(v70); break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = v70_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(v70); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "V70"); break;
- default: v60_get_info(state, info); break;
+ default: CPU_GET_INFO_CALL(v60); break;
}
}
diff --git a/src/emu/cpu/v60/v60.h b/src/emu/cpu/v60/v60.h
index 98c4fe4c06e..e7c8f0ac90a 100644
--- a/src/emu/cpu/v60/v60.h
+++ b/src/emu/cpu/v60/v60.h
@@ -82,11 +82,11 @@ extern const char *const v60_reg_names[];
void v60_stall(void);
#if HAS_V60
-void v60_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( v60 );
#endif /* HAS_V60 */
#if HAS_V70
-void v70_get_info(UINT32 state, cpuinfo *info);
+CPU_GET_INFO( v70 );
#endif /* HAS_V70 */
#endif /* __V60_H__ */
diff --git a/src/emu/cpu/v60/v60d.c b/src/emu/cpu/v60/v60d.c
index e56150f6b95..ccfb8ed7a9a 100644
--- a/src/emu/cpu/v60/v60d.c
+++ b/src/emu/cpu/v60/v60d.c
@@ -1460,14 +1460,14 @@ static int (*const dasm_optable[256])(unsigned ipc, unsigned pc, char *out) =
/* 0xFF */ dopCLRTLB
};
-offs_t v60_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( v60 )
{
rombase = oprom;
pcbase = pc;
return dasm_optable[oprom[0]](pc, pc+1, buffer) | DASMFLAG_SUPPORTED;
}
-offs_t v70_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( v70 )
{
rombase = oprom;
pcbase = pc;
diff --git a/src/emu/cpu/v810/v810.c b/src/emu/cpu/v810/v810.c
index 16051434aea..6592f1ca423 100644
--- a/src/emu/cpu/v810/v810.c
+++ b/src/emu/cpu/v810/v810.c
@@ -984,13 +984,13 @@ static CPU_EXECUTE( v810 )
return cycles-v810_ICount;
}
-static void v810_get_context(void *dst)
+static CPU_GET_CONTEXT( v810 )
{
if(dst)
*(v810info *)dst = v810;
}
-static void v810_set_context(void *src)
+static CPU_SET_CONTEXT( v810 )
{
if(src)
v810 = *(v810info *)src;
@@ -1004,7 +1004,7 @@ static void set_irq_line(int irqline, int state)
* Generic set_info
**************************************************************************/
-static void v810_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( v810 )
{
switch (state)
{
@@ -1085,7 +1085,7 @@ static void v810_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void v810_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( v810 )
{
switch (state)
{
@@ -1177,15 +1177,15 @@ void v810_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + V810_ADTRE: info->i = ADTRE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = v810_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = v810_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = v810_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(v810); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(v810); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(v810); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(v810); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(v810); break;
case CPUINFO_PTR_EXIT: info->exit = NULL; break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(v810); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = v810_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(v810); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &v810_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/v810/v810.h b/src/emu/cpu/v810/v810.h
index 6860d54f035..744dfbfd048 100644
--- a/src/emu/cpu/v810/v810.h
+++ b/src/emu/cpu/v810/v810.h
@@ -48,7 +48,7 @@ void v810_get_info(UINT32, cpuinfo*);
#define ADD(dst, src) { UINT64 res=(UINT64)(dst)+(UINT64)(src); SetCF(res); SetOF_Add(res,src,dst); SetSZPF(res); dst=(UINT32)res; }
#define SUB(dst, src) { UINT64 res=(UINT64)(dst)-(INT64)(src); SetCF(res); SetOF_Sub(res,src,dst); SetSZPF(res); dst=(UINT32)res; }
-offs_t v810_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( v810 );
enum
{
diff --git a/src/emu/cpu/v810/v810dasm.c b/src/emu/cpu/v810/v810dasm.c
index 9d1f4475e41..910467f3f04 100644
--- a/src/emu/cpu/v810/v810dasm.c
+++ b/src/emu/cpu/v810/v810dasm.c
@@ -29,11 +29,10 @@ static const char *const dRegs[]=
#define GET2s(opcode) dRegs[((opcode)>>5)&0x1f]
#define GETRs(opcode) dRegs[32+((opcode)&0x1f)]
-offs_t v810_dasm(char *buffer, offs_t oldpc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( v810 )
{
UINT32 flags = 0;
UINT32 opc,opc2;
- UINT32 pc=oldpc;
unsigned size;
opc = R_OP(pc);
opc2 = R_OP(pc+2);
diff --git a/src/emu/cpu/z180/z180.c b/src/emu/cpu/z180/z180.c
index 5603f82324d..cd1f38e322b 100644
--- a/src/emu/cpu/z180/z180.c
+++ b/src/emu/cpu/z180/z180.c
@@ -796,8 +796,8 @@ static UINT8 z180_readcontrol(offs_t port);
static void z180_writecontrol(offs_t port, UINT8 data);
static void z180_dma0(void);
static void z180_dma1(void);
-static void z180_burn(int cycles);
-static void z180_set_info(UINT32 state, cpuinfo *info);
+static CPU_BURN( z180 );
+static CPU_SET_INFO( z180 );
#include "z180daa.h"
#include "z180ops.h"
@@ -2277,7 +2277,7 @@ again:
/****************************************************************************
* Burn 'cycles' T-states. Adjust R register for the lost time
****************************************************************************/
-static void z180_burn(int cycles)
+static CPU_BURN( z180 )
{
if( cycles > 0 )
{
@@ -2291,7 +2291,7 @@ static void z180_burn(int cycles)
/****************************************************************************
* Get all registers in given buffer
****************************************************************************/
-static void z180_get_context (void *dst)
+static CPU_GET_CONTEXT( z180 )
{
if( dst )
*(Z180_Regs*)dst = Z180;
@@ -2300,7 +2300,7 @@ static void z180_get_context (void *dst)
/****************************************************************************
* Set all registers to given values
****************************************************************************/
-static void z180_set_context (void *src)
+static CPU_SET_CONTEXT( z180 )
{
if( src )
Z180 = *(Z180_Regs*)src;
@@ -2347,11 +2347,11 @@ static void set_irq_line(int irqline, int state)
}
/* logical to physical address translation */
-static int z180_translate(int space, int intention, offs_t *addr)
+static CPU_TRANSLATE( z180 )
{
if (space == ADDRESS_SPACE_PROGRAM)
{
- *addr = MMU_REMAP_ADDR(*addr);
+ *address = MMU_REMAP_ADDR(*address);
}
return TRUE;
}
@@ -2360,7 +2360,7 @@ static int z180_translate(int space, int intention, offs_t *addr)
* Generic set_info
**************************************************************************/
-static void z180_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( z180 )
{
switch (state)
{
@@ -2471,7 +2471,7 @@ static void z180_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void z180_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( z180 )
{
switch (state)
{
@@ -2591,16 +2591,16 @@ void z180_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + Z180_IOLINES: info->i = Z180.iol; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = z180_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = z180_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = z180_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z180); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(z180); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(z180); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(z180); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(z180); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(z180); break;
- case CPUINFO_PTR_BURN: info->burn = z180_burn; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = z180_dasm; break;
+ case CPUINFO_PTR_BURN: info->burn = CPU_BURN_NAME(z180); break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z180); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &z180_icount; break;
- case CPUINFO_PTR_TRANSLATE: info->translate = z180_translate; break;
+ case CPUINFO_PTR_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(z180); break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: info->p = (void *)cc[Z180_TABLE_op]; break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: info->p = (void *)cc[Z180_TABLE_cb]; break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: info->p = (void *)cc[Z180_TABLE_ed]; break;
diff --git a/src/emu/cpu/z180/z180.h b/src/emu/cpu/z180/z180.h
index c7744f87ceb..ff1b88041ae 100644
--- a/src/emu/cpu/z180/z180.h
+++ b/src/emu/cpu/z180/z180.h
@@ -129,8 +129,8 @@ extern UINT8 z180_readmem(offs_t offset);
extern void z180_writemem(offs_t offset, UINT8 data);
extern void z180_setOPbase(int pc);
-extern void z180_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( z180 );
-offs_t z180_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( z180 );
#endif /* __Z180_H__ */
diff --git a/src/emu/cpu/z180/z180dasm.c b/src/emu/cpu/z180/z180dasm.c
index ff718e51092..c04e6f51628 100644
--- a/src/emu/cpu/z180/z180dasm.c
+++ b/src/emu/cpu/z180/z180dasm.c
@@ -426,7 +426,7 @@ static int offs(INT8 offset)
/****************************************************************************
* Disassemble opcode at PC and return number of bytes it takes
****************************************************************************/
-offs_t z180_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( z180 )
{
const z80dasm *d;
const char *src, *ixy;
diff --git a/src/emu/cpu/z180/z180ops.h b/src/emu/cpu/z180/z180ops.h
index b3ef914b920..53a537a91ab 100644
--- a/src/emu/cpu/z180/z180ops.h
+++ b/src/emu/cpu/z180/z180ops.h
@@ -5,7 +5,7 @@
_PC--; \
_HALT = 1; \
if( !Z180.after_EI ) \
- z180_burn( z180_icount ); \
+ CPU_BURN_NAME(z180)( NULL, z180_icount ); \
}
/***************************************************************
diff --git a/src/emu/cpu/z80/z80.c b/src/emu/cpu/z80/z80.c
index 053a2215b8f..437602598c7 100644
--- a/src/emu/cpu/z80/z80.c
+++ b/src/emu/cpu/z80/z80.c
@@ -334,7 +334,7 @@ static const UINT8 *cc[6];
#define Z80_TABLE_fd Z80_TABLE_xy
static void take_interrupt(z80_state *z80);
-static void z80_burn(int cycles);
+static CPU_BURN( z80 );
typedef void (*funcptr)(z80_state *z80);
@@ -563,7 +563,7 @@ INLINE void BURNODD(z80_state *z80, int cycles, int opcodes, int cyclesum)
PC--; \
HALT = 1; \
if( z80->irq_state == CLEAR_LINE ) \
- z80_burn( z80->icount ); \
+ CPU_BURN_NAME(z80)( z80->device, z80->icount ); \
}
/***************************************************************
@@ -3638,7 +3638,7 @@ static CPU_EXECUTE( z80 )
/****************************************************************************
* Burn 'cycles' T-states. Adjust R register for the lost time
****************************************************************************/
-static void z80_burn(int cycles)
+static CPU_BURN( z80 )
{
z80_state *z80 = token;
@@ -3654,14 +3654,14 @@ static void z80_burn(int cycles)
/****************************************************************************
* Get all registers in given buffer
****************************************************************************/
-static void z80_get_context (void *dst)
+static CPU_GET_CONTEXT( z80 )
{
}
/****************************************************************************
* Set all registers to given values
****************************************************************************/
-static void z80_set_context (void *src)
+static CPU_SET_CONTEXT( z80 )
{
z80_state *z80;
if( src )
@@ -3699,7 +3699,7 @@ static void set_irq_line(z80_state *z80, int irqline, int state)
* Generic set_info
**************************************************************************/
-static void z80_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( z80 )
{
z80_state *z80 = token;
switch (state)
@@ -3753,7 +3753,7 @@ static void z80_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void z80_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( z80 )
{
z80_state *z80 = token;
switch (state)
@@ -3815,15 +3815,15 @@ void z80_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + Z80_HALT: info->i = z80->halt; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = z80_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = z80_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = z80_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z80); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(z80); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(z80); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(z80); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(z80); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(z80); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(z80); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = z80_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z80); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &z80->icount; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_op: info->p = (void *)cc[Z80_TABLE_op]; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_cb: info->p = (void *)cc[Z80_TABLE_cb]; break;
diff --git a/src/emu/cpu/z80/z80.h b/src/emu/cpu/z80/z80.h
index 4ebd916bab3..4bb881e2355 100644
--- a/src/emu/cpu/z80/z80.h
+++ b/src/emu/cpu/z80/z80.h
@@ -31,8 +31,8 @@ enum
CPUINFO_PTR_Z80_CYCLE_TABLE_LAST = CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_ex
};
-extern void z80_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( z80 );
-extern unsigned z80_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+extern CPU_DISASSEMBLE( z80 );
#endif /* __Z80_H__ */
diff --git a/src/emu/cpu/z80/z80dasm.c b/src/emu/cpu/z80/z80dasm.c
index 356db73c6d2..89a42bd2d41 100644
--- a/src/emu/cpu/z80/z80dasm.c
+++ b/src/emu/cpu/z80/z80dasm.c
@@ -424,7 +424,7 @@ static int offs(INT8 offset)
/****************************************************************************
* Disassemble opcode at PC and return number of bytes it takes
****************************************************************************/
-unsigned z80_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( z80 )
{
const z80dasm *d;
const char *src, *ixy;
diff --git a/src/emu/cpu/z8000/8000dasm.c b/src/emu/cpu/z8000/8000dasm.c
index cc8c4a4fa67..af090569a3f 100644
--- a/src/emu/cpu/z8000/8000dasm.c
+++ b/src/emu/cpu/z8000/8000dasm.c
@@ -78,10 +78,10 @@ static const char *const ints[4] = {
"", "vi", "nvi", "vi,nvi"
};
-offs_t z8000_dasm(char *buff, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+CPU_DISASSEMBLE( z8000 )
{
int new_pc = pc, i, tmp;
- char *dst = buff;
+ char *dst = buffer;
const char *src;
Z8000_exec *o;
UINT32 flags = 0;
diff --git a/src/emu/cpu/z8000/z8000.c b/src/emu/cpu/z8000/z8000.c
index a721d44691d..1bf52075871 100644
--- a/src/emu/cpu/z8000/z8000.c
+++ b/src/emu/cpu/z8000/z8000.c
@@ -514,13 +514,13 @@ static CPU_EXECUTE( z8000 )
}
-static void z8000_get_context(void *dst)
+static CPU_GET_CONTEXT( z8000 )
{
if( dst )
*(z8000_Regs*)dst = Z;
}
-static void z8000_set_context(void *src)
+static CPU_SET_CONTEXT( z8000 )
{
if( src )
{
@@ -584,7 +584,7 @@ static void set_irq_line(int irqline, int state)
* Generic set_info
**************************************************************************/
-static void z8000_set_info(UINT32 state, cpuinfo *info)
+static CPU_SET_INFO( z8000 )
{
switch (state)
{
@@ -628,7 +628,7 @@ static void z8000_set_info(UINT32 state, cpuinfo *info)
* Generic get_info
**************************************************************************/
-void z8000_get_info(UINT32 state, cpuinfo *info)
+CPU_GET_INFO( z8000 )
{
switch (state)
{
@@ -688,15 +688,15 @@ void z8000_get_info(UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + Z8000_R15: info->i = RW(15); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_SET_INFO: info->setinfo = z8000_set_info; break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = z8000_get_context; break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = z8000_set_context; break;
+ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z8000); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(z8000); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(z8000); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(z8000); break;
case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(z8000); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(z8000); break;
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(z8000); break;
case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = z8000_dasm; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z8000); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &z8000_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
diff --git a/src/emu/cpu/z8000/z8000.h b/src/emu/cpu/z8000/z8000.h
index 1cbe19aab8f..ea3ca3433ae 100644
--- a/src/emu/cpu/z8000/z8000.h
+++ b/src/emu/cpu/z8000/z8000.h
@@ -25,8 +25,8 @@ enum
#define Z8000_HALT 0x0100 /* halted flag */
/* PUBLIC FUNCTIONS */
-extern void z8000_get_info(UINT32 state, cpuinfo *info);
+extern CPU_GET_INFO( z8000 );
-offs_t z8000_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+CPU_DISASSEMBLE( z8000 );
#endif /* __Z8000_H__ */