diff options
Diffstat (limited to 'src/devices')
25 files changed, 222 insertions, 227 deletions
diff --git a/src/devices/bus/cbm2/hrg.cpp b/src/devices/bus/cbm2/hrg.cpp index e0e9bf667ba..bb0e38a22cb 100644 --- a/src/devices/bus/cbm2/hrg.cpp +++ b/src/devices/bus/cbm2/hrg.cpp @@ -90,7 +90,7 @@ static MACHINE_CONFIG_FRAGMENT( cbm2_hrg_a ) MCFG_SCREEN_SIZE(512, 512) MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 512-1) MCFG_SCREEN_REFRESH_RATE(25) - MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette") + MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette") MCFG_DEVICE_ADD(EF9365_TAG, EF9365, 1750000) MCFG_VIDEO_SET_SCREEN(SCREEN_TAG) @@ -111,7 +111,7 @@ static MACHINE_CONFIG_FRAGMENT( cbm2_hrg_b ) MCFG_SCREEN_SIZE(512, 256) MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1) MCFG_SCREEN_REFRESH_RATE(50) - MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette") + MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette") MCFG_DEVICE_ADD(EF9366_TAG, EF9365, 1750000) MCFG_VIDEO_SET_SCREEN(SCREEN_TAG) diff --git a/src/devices/bus/cbm2/hrg.h b/src/devices/bus/cbm2/hrg.h index 67e0f25ad90..c93b806b3e1 100644 --- a/src/devices/bus/cbm2/hrg.h +++ b/src/devices/bus/cbm2/hrg.h @@ -24,7 +24,7 @@ // ======================> cbm2_hrg_t class cbm2_hrg_t : public device_t, - public device_cbm2_expansion_card_interface + public device_cbm2_expansion_card_interface { public: // construction/destruction diff --git a/src/devices/bus/pet/hsg.cpp b/src/devices/bus/pet/hsg.cpp index 2a90008c307..d0bd43d0020 100644 --- a/src/devices/bus/pet/hsg.cpp +++ b/src/devices/bus/pet/hsg.cpp @@ -92,7 +92,7 @@ static MACHINE_CONFIG_FRAGMENT( cbm8000_hsg_a ) MCFG_SCREEN_SIZE(512, 512) MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 512-1) MCFG_SCREEN_REFRESH_RATE(25) - MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette") + MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette") MCFG_DEVICE_ADD(EF9365_TAG, EF9365, 1750000) MCFG_VIDEO_SET_SCREEN(SCREEN_TAG) @@ -113,7 +113,7 @@ static MACHINE_CONFIG_FRAGMENT( cbm8000_hsg_b ) MCFG_SCREEN_SIZE(512, 256) MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1) MCFG_SCREEN_REFRESH_RATE(50) - MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette") + MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette") MCFG_DEVICE_ADD(EF9366_TAG, EF9365, 1750000) MCFG_VIDEO_SET_SCREEN(SCREEN_TAG) diff --git a/src/devices/bus/pet/hsg.h b/src/devices/bus/pet/hsg.h index abe9067c498..c8d81463b5b 100644 --- a/src/devices/bus/pet/hsg.h +++ b/src/devices/bus/pet/hsg.h @@ -24,7 +24,7 @@ // ======================> cbm8000_hsg_t class cbm8000_hsg_t : public device_t, - public device_pet_expansion_card_interface + public device_pet_expansion_card_interface { public: // construction/destruction diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp index 3d9c9631c5d..052c7058604 100644 --- a/src/devices/cpu/hphybrid/hphybrid.cpp +++ b/src/devices/cpu/hphybrid/hphybrid.cpp @@ -1485,20 +1485,20 @@ UINT32 hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , UINT16 addr) bsc_reg = HP_REG_R37_ADDR; break; - case AEC_CASE_I: - // Behaviour of AEC during interrupt vector fetch is undocumented but it can be guessed from 9845B firmware. - // Basically in this case the integrated AEC seems to do what the discrete implementation in 9845A does: - // top half of memory is mapped to block 0 (fixed) and bottom half is mapped according to content of R35 - // (see pg 334 of patent). - bsc_reg = top_half ? 0 : HP_REG_R35_ADDR; - break; - - default: - logerror("hphybrid: aec_case=%d\n" , aec_case); - return 0; - } - - UINT16 aec_reg = (bsc_reg != 0) ? (m_reg_aec[ bsc_reg - HP_REG_R32_ADDR ] & BSC_REG_MASK) : 0; + case AEC_CASE_I: + // Behaviour of AEC during interrupt vector fetch is undocumented but it can be guessed from 9845B firmware. + // Basically in this case the integrated AEC seems to do what the discrete implementation in 9845A does: + // top half of memory is mapped to block 0 (fixed) and bottom half is mapped according to content of R35 + // (see pg 334 of patent). + bsc_reg = top_half ? 0 : HP_REG_R35_ADDR; + break; + + default: + logerror("hphybrid: aec_case=%d\n" , aec_case); + return 0; + } + + UINT16 aec_reg = (bsc_reg != 0) ? (m_reg_aec[ bsc_reg - HP_REG_R32_ADDR ] & BSC_REG_MASK) : 0; if (m_forced_bsc_25) { aec_reg = (aec_reg & 0xf) | 0x20; diff --git a/src/devices/cpu/hphybrid/hphybrid.h b/src/devices/cpu/hphybrid/hphybrid.h index 8baeeb66c1d..97aea0febce 100644 --- a/src/devices/cpu/hphybrid/hphybrid.h +++ b/src/devices/cpu/hphybrid/hphybrid.h @@ -90,83 +90,83 @@ public: template<class _Object> static devcb_base &set_pa_changed_func(device_t &device, _Object object) { return downcast<hp_hybrid_cpu_device &>(device).m_pa_changed_func.set_callback(object); } protected: - hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth); - - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - - // device_execute_interface overrides - virtual UINT32 execute_min_cycles() const override { return 6; } - virtual UINT32 execute_input_lines() const override { return 2; } - virtual UINT32 execute_default_irq_vector() const override { return 0xffff; } - virtual void execute_run() override; - virtual void execute_set_input(int inputnum, int state) override; - - UINT16 execute_one(UINT16 opcode); - UINT16 execute_one_sub(UINT16 opcode); - // Execute an instruction that doesn't belong to either BPC or IOC - virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) = 0; - - // device_memory_interface overrides - virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); } - - // device_state_interface overrides - void state_string_export(const device_state_entry &entry, std::string &str) const override; - - // device_disasm_interface overrides - virtual UINT32 disasm_min_opcode_bytes() const override { return 2; } - virtual UINT32 disasm_max_opcode_bytes() const override { return 2; } - virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override; - - // Different cases of memory access - // See patent @ pg 361 - typedef enum { - AEC_CASE_A, // Instr. fetches, non-base page fetches of link pointers, BPC direct non-base page accesses - AEC_CASE_B, // Base page fetches of link pointers, BPC direct base page accesses - AEC_CASE_C, // IOC, EMC & BPC indirect final destination accesses - AEC_CASE_D, // DMA accesses - AEC_CASE_I // Interrupt vector fetches - } aec_cases_t; - - // do memory address extension - virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) = 0; - - UINT16 remove_mae(UINT32 addr); - - UINT16 RM(aec_cases_t aec_case , UINT16 addr); - UINT16 RM(UINT32 addr); - virtual UINT16 read_non_common_reg(UINT16 addr) = 0; - - void WM(aec_cases_t aec_case , UINT16 addr , UINT16 v); - void WM(UINT32 addr , UINT16 v); - virtual void write_non_common_reg(UINT16 addr , UINT16 v) = 0; - - UINT16 fetch(void); - - UINT16 get_skip_addr(UINT16 opcode , bool condition) const; - - devcb_write8 m_pa_changed_func; - - int m_icount; - bool m_forced_bsc_25; - - // State of processor - UINT16 m_reg_A; // Register A - UINT16 m_reg_B; // Register B - UINT16 m_reg_P; // Register P - UINT16 m_reg_R; // Register R - UINT16 m_reg_C; // Register C - UINT16 m_reg_D; // Register D - UINT16 m_reg_IV; // Register IV - UINT16 m_reg_W; // Register W - UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long) - UINT16 m_flags; // Flags - UINT8 m_dmapa; // DMA peripheral address (4 bits) - UINT16 m_dmama; // DMA address - UINT16 m_dmac; // DMA counter - UINT16 m_reg_I; // Instruction register - UINT32 m_genpc; // Full PC + hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth); + + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + // device_execute_interface overrides + virtual UINT32 execute_min_cycles() const override { return 6; } + virtual UINT32 execute_input_lines() const override { return 2; } + virtual UINT32 execute_default_irq_vector() const override { return 0xffff; } + virtual void execute_run() override; + virtual void execute_set_input(int inputnum, int state) override; + + UINT16 execute_one(UINT16 opcode); + UINT16 execute_one_sub(UINT16 opcode); + // Execute an instruction that doesn't belong to either BPC or IOC + virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) = 0; + + // device_memory_interface overrides + virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); } + + // device_state_interface overrides + void state_string_export(const device_state_entry &entry, std::string &str) const override; + + // device_disasm_interface overrides + virtual UINT32 disasm_min_opcode_bytes() const override { return 2; } + virtual UINT32 disasm_max_opcode_bytes() const override { return 2; } + virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override; + + // Different cases of memory access + // See patent @ pg 361 + typedef enum { + AEC_CASE_A, // Instr. fetches, non-base page fetches of link pointers, BPC direct non-base page accesses + AEC_CASE_B, // Base page fetches of link pointers, BPC direct base page accesses + AEC_CASE_C, // IOC, EMC & BPC indirect final destination accesses + AEC_CASE_D, // DMA accesses + AEC_CASE_I // Interrupt vector fetches + } aec_cases_t; + + // do memory address extension + virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) = 0; + + UINT16 remove_mae(UINT32 addr); + + UINT16 RM(aec_cases_t aec_case , UINT16 addr); + UINT16 RM(UINT32 addr); + virtual UINT16 read_non_common_reg(UINT16 addr) = 0; + + void WM(aec_cases_t aec_case , UINT16 addr , UINT16 v); + void WM(UINT32 addr , UINT16 v); + virtual void write_non_common_reg(UINT16 addr , UINT16 v) = 0; + + UINT16 fetch(void); + + UINT16 get_skip_addr(UINT16 opcode , bool condition) const; + + devcb_write8 m_pa_changed_func; + + int m_icount; + bool m_forced_bsc_25; + + // State of processor + UINT16 m_reg_A; // Register A + UINT16 m_reg_B; // Register B + UINT16 m_reg_P; // Register P + UINT16 m_reg_R; // Register R + UINT16 m_reg_C; // Register C + UINT16 m_reg_D; // Register D + UINT16 m_reg_IV; // Register IV + UINT16 m_reg_W; // Register W + UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long) + UINT16 m_flags; // Flags + UINT8 m_dmapa; // DMA peripheral address (4 bits) + UINT16 m_dmama; // DMA address + UINT16 m_dmac; // DMA counter + UINT16 m_reg_I; // Instruction register + UINT32 m_genpc; // Full PC private: address_space_config m_program_config; diff --git a/src/devices/cpu/i86/i86.cpp b/src/devices/cpu/i86/i86.cpp index 398d93ee987..28669d16563 100644 --- a/src/devices/cpu/i86/i86.cpp +++ b/src/devices/cpu/i86/i86.cpp @@ -159,7 +159,7 @@ void i8086_cpu_device::execute_run() } } - /* Trap should allow one instruction to be executed. + /* Trap should allow one instruction to be executed. CPUID.ASM (by Bob Smith, 1985) suggests that in situations where m_no_interrupt is 1, (directly after POP SS / MOV_SREG), single step IRQs don't fire. */ @@ -167,7 +167,7 @@ void i8086_cpu_device::execute_run() { if ( (m_fire_trap >= 2) && (m_no_interrupt == 0) ) { - m_fire_trap = 0; // reset trap flag upon entry + m_fire_trap = 0; // reset trap flag upon entry interrupt(1); } else @@ -1408,7 +1408,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op) m_src = GetRMWord(); m_sregs[(m_modrm & 0x18) >> 3] = m_src; // confirmed on hw: modrm bit 5 ignored CLKM(MOV_SR,MOV_SM); - m_no_interrupt = 1; // Disable IRQ after load segment register. + m_no_interrupt = 1; // Disable IRQ after load segment register. break; case 0x8f: // i_popw diff --git a/src/devices/cpu/m68000/m68kops.cpp b/src/devices/cpu/m68000/m68kops.cpp index 4cbeb42d78c..0505f863c73 100644 --- a/src/devices/cpu/m68000/m68kops.cpp +++ b/src/devices/cpu/m68000/m68kops.cpp @@ -34872,5 +34872,3 @@ void m68ki_build_opcode_table(void) /* ======================================================================== */ /* ============================== END OF FILE ============================= */ /* ======================================================================== */ - - diff --git a/src/devices/cpu/tlcs900/tlcs900.cpp b/src/devices/cpu/tlcs900/tlcs900.cpp index 4ac6f8b07a3..2b5d45d7757 100644 --- a/src/devices/cpu/tlcs900/tlcs900.cpp +++ b/src/devices/cpu/tlcs900/tlcs900.cpp @@ -1748,62 +1748,62 @@ void tmp95c063_device::tlcs900_handle_ad() int ad_value; /* Store A/D converted value */ - if ((m_reg[TMP95C063_ADMOD1] & 0x10) == 0) // conversion channel fixed + if ((m_reg[TMP95C063_ADMOD1] & 0x10) == 0) // conversion channel fixed { switch( m_reg[TMP95C063_ADMOD2] & 0x07 ) { - case 0x00: // AN0 + case 0x00: // AN0 ad_value = m_an0_read(0) & 0x3ff; m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff; break; - case 0x01: // AN1 + case 0x01: // AN1 ad_value = m_an1_read(0) & 0x3ff; m_reg[TMP95C063_ADREG15L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG15H] = (ad_value >> 2) & 0xff; break; - case 0x02: // AN2 + case 0x02: // AN2 ad_value = m_an2_read(0) & 0x3ff; m_reg[TMP95C063_ADREG26L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG26H] = (ad_value >> 2) & 0xff; break; - case 0x03: // AN3 + case 0x03: // AN3 ad_value = m_an3_read(0) & 0x3ff; m_reg[TMP95C063_ADREG37L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG37H] = (ad_value >> 2) & 0xff; break; - case 0x04: // AN4 + case 0x04: // AN4 ad_value = m_an4_read(0) & 0x3ff; m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff; break; - case 0x05: // AN5 + case 0x05: // AN5 ad_value = m_an5_read(0) & 0x3ff; m_reg[TMP95C063_ADREG15L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG15H] = (ad_value >> 2) & 0xff; break; - case 0x06: // AN6 + case 0x06: // AN6 ad_value = m_an6_read(0) & 0x3ff; m_reg[TMP95C063_ADREG26L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG26H] = (ad_value >> 2) & 0xff; break; - case 0x07: // AN7 + case 0x07: // AN7 ad_value = m_an7_read(0) & 0x3ff; m_reg[TMP95C063_ADREG37L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG37H] = (ad_value >> 2) & 0xff; break; } } - else // conversion channel sweep + else // conversion channel sweep { switch( m_reg[TMP95C063_ADMOD2] & 0x07 ) { - case 0x00: // AN0 + case 0x00: // AN0 ad_value = m_an0_read(0) & 0x3ff; m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff; break; - case 0x01: // AN0 -> AN1 + case 0x01: // AN0 -> AN1 ad_value = m_an0_read(0) & 0x3ff; m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff; @@ -1811,7 +1811,7 @@ void tmp95c063_device::tlcs900_handle_ad() m_reg[TMP95C063_ADREG15L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG15H] = (ad_value >> 2) & 0xff; break; - case 0x02: // AN0 -> AN1 -> AN2 + case 0x02: // AN0 -> AN1 -> AN2 ad_value = m_an0_read(0) & 0x3ff; m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff; @@ -1822,7 +1822,7 @@ void tmp95c063_device::tlcs900_handle_ad() m_reg[TMP95C063_ADREG26L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG26H] = (ad_value >> 2) & 0xff; break; - case 0x03: // AN0 -> AN1 -> AN2 -> AN3 + case 0x03: // AN0 -> AN1 -> AN2 -> AN3 ad_value = m_an0_read(0) & 0x3ff; m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff; @@ -1836,12 +1836,12 @@ void tmp95c063_device::tlcs900_handle_ad() m_reg[TMP95C063_ADREG37L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG37H] = (ad_value >> 2) & 0xff; break; - case 0x04: // AN4 + case 0x04: // AN4 ad_value = m_an4_read(0) & 0x3ff; m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff; break; - case 0x05: // AN4 -> AN5 + case 0x05: // AN4 -> AN5 ad_value = m_an4_read(0) & 0x3ff; m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff; @@ -1849,7 +1849,7 @@ void tmp95c063_device::tlcs900_handle_ad() m_reg[TMP95C063_ADREG15L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG15H] = (ad_value >> 2) & 0xff; break; - case 0x06: // AN4 -> AN5 -> AN6 + case 0x06: // AN4 -> AN5 -> AN6 ad_value = m_an4_read(0) & 0x3ff; m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff; @@ -1860,7 +1860,7 @@ void tmp95c063_device::tlcs900_handle_ad() m_reg[TMP95C063_ADREG26L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG26H] = (ad_value >> 2) & 0xff; break; - case 0x07: // AN4 -> AN5 -> AN6 -> AN7 + case 0x07: // AN4 -> AN5 -> AN6 -> AN7 ad_value = m_an4_read(0) & 0x3ff; m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6; m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff; diff --git a/src/devices/cpu/tlcs900/tlcs900.h b/src/devices/cpu/tlcs900/tlcs900.h index 0dcf3d84994..54b68a090d5 100644 --- a/src/devices/cpu/tlcs900/tlcs900.h +++ b/src/devices/cpu/tlcs900/tlcs900.h @@ -852,14 +852,14 @@ private: devcb_write8 m_porte_write; // analogue inputs, sampled at 10 bits - devcb_read16 m_an0_read; - devcb_read16 m_an1_read; - devcb_read16 m_an2_read; - devcb_read16 m_an3_read; - devcb_read16 m_an4_read; - devcb_read16 m_an5_read; - devcb_read16 m_an6_read; - devcb_read16 m_an7_read; + devcb_read16 m_an0_read; + devcb_read16 m_an1_read; + devcb_read16 m_an2_read; + devcb_read16 m_an3_read; + devcb_read16 m_an4_read; + devcb_read16 m_an5_read; + devcb_read16 m_an6_read; + devcb_read16 m_an7_read; }; #endif diff --git a/src/devices/cpu/tms32051/32051ops.inc b/src/devices/cpu/tms32051/32051ops.inc index 52519c7f692..83e769416a1 100644 --- a/src/devices/cpu/tms32051/32051ops.inc +++ b/src/devices/cpu/tms32051/32051ops.inc @@ -198,39 +198,39 @@ UINT16 tms32051_device::GET_ADDRESS() bool tms32051_device::GET_ZLVC_CONDITION(int zlvc, int zlvc_mask) { - if (zlvc_mask & 0x2) // OV-bit + if (zlvc_mask & 0x2) // OV-bit { - if ((zlvc & 0x2) && m_st0.ov == 0) // OV + if ((zlvc & 0x2) && m_st0.ov == 0) // OV return false; - if (((zlvc & 0x2) == 0) && m_st0.ov != 0) // NOV + if (((zlvc & 0x2) == 0) && m_st0.ov != 0) // NOV return false; } - if (zlvc_mask & 0x1) // C-bit + if (zlvc_mask & 0x1) // C-bit { - if ((zlvc & 0x1) && m_st1.c == 0) // C + if ((zlvc & 0x1) && m_st1.c == 0) // C return false; - if (((zlvc & 0x1) == 0) && m_st1.c != 0) // NC + if (((zlvc & 0x1) == 0) && m_st1.c != 0) // NC return false; } switch ((zlvc_mask & 0xc) | ((zlvc >> 2) & 0x3)) { - case 0x00: break; // MZ=0, ML=0, Z=0, L=0 - case 0x01: break; // MZ=0, ML=0, Z=0, L=1 - case 0x02: break; // MZ=0, ML=0, Z=1, L=0 - case 0x03: break; // MZ=0, ML=0, Z=1, L=1 - case 0x04: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=0, L=0 (GT) - case 0x05: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=0, L=1 (LT) - case 0x06: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=1, L=0 (GT) - case 0x07: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=1, L=1 (LT) - case 0x08: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=0 (NEQ) - case 0x09: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=1 (NEQ) - case 0x0a: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=0 (EQ) - case 0x0b: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=1 (EQ) - case 0x0c: if ((INT32)(m_acc) <= 0) return false; break; // MZ=1, ML=1, Z=0, L=0 (GT) - case 0x0d: if ((INT32)(m_acc) >= 0) return false; break; // MZ=1, ML=1, Z=0, L=1 (LT) - case 0x0e: if ((INT32)(m_acc) < 0) return false; break; // MZ=1, ML=1, Z=1, L=0 (GEQ) - case 0x0f: if ((INT32)(m_acc) > 0) return false; break; // MZ=1, ML=1, Z=1, L=1 (LEQ) + case 0x00: break; // MZ=0, ML=0, Z=0, L=0 + case 0x01: break; // MZ=0, ML=0, Z=0, L=1 + case 0x02: break; // MZ=0, ML=0, Z=1, L=0 + case 0x03: break; // MZ=0, ML=0, Z=1, L=1 + case 0x04: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=0, L=0 (GT) + case 0x05: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=0, L=1 (LT) + case 0x06: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=1, L=0 (GT) + case 0x07: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=1, L=1 (LT) + case 0x08: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=0 (NEQ) + case 0x09: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=1 (NEQ) + case 0x0a: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=0 (EQ) + case 0x0b: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=1 (EQ) + case 0x0c: if ((INT32)(m_acc) <= 0) return false; break; // MZ=1, ML=1, Z=0, L=0 (GT) + case 0x0d: if ((INT32)(m_acc) >= 0) return false; break; // MZ=1, ML=1, Z=0, L=1 (LT) + case 0x0e: if ((INT32)(m_acc) < 0) return false; break; // MZ=1, ML=1, Z=1, L=0 (GEQ) + case 0x0f: if ((INT32)(m_acc) > 0) return false; break; // MZ=1, ML=1, Z=1, L=1 (LEQ) } return true; } @@ -239,14 +239,14 @@ bool tms32051_device::GET_TP_CONDITION(int tp) { switch (tp) { - case 0: // BIO pin low + case 0: // BIO pin low // TODO return false; - - case 1: // TC == 1 + + case 1: // TC == 1 return m_st1.tc != 0; - case 2: // TC == 0 + case 2: // TC == 0 return m_st1.tc == 0; case 3: @@ -1376,7 +1376,7 @@ void tms32051_device::op_out() { UINT16 port = ROPCODE(); UINT16 ea = GET_ADDRESS(); - + UINT16 data = DM_READ16(ea); m_io->write_word(port << 1, data); @@ -1438,7 +1438,7 @@ void tms32051_device::op_apl_dbmr() { UINT16 ea = GET_ADDRESS(); UINT16 data = DM_READ16(ea); - + data &= m_dbmr; m_st1.tc = (data == 0) ? 1 : 0; @@ -1452,7 +1452,7 @@ void tms32051_device::op_apl_imm() UINT16 ea = GET_ADDRESS(); UINT16 imm = ROPCODE(); UINT16 data = DM_READ16(ea); - + data &= imm; m_st1.tc = (data == 0) ? 1 : 0; diff --git a/src/devices/machine/tms6100.cpp b/src/devices/machine/tms6100.cpp index 67eb9d17a14..7242ca1312d 100644 --- a/src/devices/machine/tms6100.cpp +++ b/src/devices/machine/tms6100.cpp @@ -3,7 +3,7 @@ /********************************************************************************************** Texas Instruments TMS6100 Voice Synthesis Memory (VSM) - + References: - TMS 6100 Voice Synthesis Memory Data Manual - TMS 6125 Voice Synthesis Memory Data Manual @@ -147,11 +147,11 @@ WRITE_LINE_MEMBER(tms6100_device::clk_w) UINT8 m = m_m1 << 1 | m_m0; if ((m & ~m_prev_m & 1) || (m & ~m_prev_m & 2)) handle_command(m); - + m_prev_m = m; } } - + m_clk = (state) ? 1 : 0; } @@ -190,7 +190,7 @@ void tms6100_device::handle_command(UINT8 cmd) // or shift(rotate) right m_sa = (m_sa >> 1) | (m_sa << 7 & 0x80); } - + // output to DATA pin(s) if (!m_4bit_mode) { @@ -205,16 +205,16 @@ void tms6100_device::handle_command(UINT8 cmd) else m_data = m_sa & 0xf; } - + // 8 bits in 1-bit mode, otherwise 2 nybbles m_count = (m_count + 1) & (m_4bit_mode ? 1 : 7); - + // TB8 if (m_count == 0) m_address++; // CS bits too } break; - + // LA: load address case M_LA: if (m_prev_cmd == M_TB) @@ -232,7 +232,7 @@ void tms6100_device::handle_command(UINT8 cmd) const UINT8 shift = 4 * (m_count+1); m_address = (m_address & ~(0xf << shift)) | (m_add << shift); } - + m_count = (m_count + 1) & 7; } break; @@ -251,10 +251,10 @@ void tms6100_device::handle_command(UINT8 cmd) m_address = (m_address & ~0x3fff) | (rb & 0x3fff); } break; - + default: break; } - + m_prev_cmd = cmd; } diff --git a/src/devices/machine/tms6100.h b/src/devices/machine/tms6100.h index cd802bab7d2..ae295dec4b2 100644 --- a/src/devices/machine/tms6100.h +++ b/src/devices/machine/tms6100.h @@ -56,7 +56,7 @@ DATA/ADD8 | 6 11 | CS NC | 6 11 | /CS NC | 7 10 | M1 NC | 7 10 | M1 M0 | 8 9 | VSS M0 | 8 9 | VSS - +---------+ +---------+ + +---------+ +---------+ Mitsubishi M58819S EPROM Interface: @@ -112,14 +112,14 @@ public: protected: // device-level overrides virtual void device_start() override; - + void handle_command(UINT8 cmd); // internal state required_region_ptr<UINT8> m_rom; bool m_reverse_bits; bool m_4bit_mode; - + UINT32 m_rommask; UINT32 m_address; // internal address + chipselect UINT8 m_sa; // romdata shift register diff --git a/src/devices/sound/beep.cpp b/src/devices/sound/beep.cpp index a6dd5226453..7997b590a86 100644 --- a/src/devices/sound/beep.cpp +++ b/src/devices/sound/beep.cpp @@ -50,7 +50,7 @@ void beep_device::device_start() m_stream = stream_alloc(0, 1, BEEP_RATE); m_enable = 0; m_signal = 0x07fff; - + // register for savestates save_item(NAME(m_enable)); save_item(NAME(m_frequency)); diff --git a/src/devices/sound/fm.cpp b/src/devices/sound/fm.cpp index fbc45073060..ee74c47fd97 100644 --- a/src/devices/sound/fm.cpp +++ b/src/devices/sound/fm.cpp @@ -2423,7 +2423,7 @@ struct YM2610 UINT8 flagmask; /* YM2608 only */ UINT8 irqmask; /* YM2608 only */ - device_t *device; + device_t *device; }; /* here is the virtual YM2608 */ diff --git a/src/devices/sound/rf5c400.cpp b/src/devices/sound/rf5c400.cpp index e652dda3056..6eaa2245ca9 100644 --- a/src/devices/sound/rf5c400.cpp +++ b/src/devices/sound/rf5c400.cpp @@ -355,7 +355,7 @@ READ16_MEMBER( rf5c400_device::rf5c400_r ) return 0; } - case 0x13: // memory read + case 0x13: // memory read { return m_rom[m_ext_mem_address]; } diff --git a/src/devices/sound/s14001a.cpp b/src/devices/sound/s14001a.cpp index 3dae9652297..627d3214b10 100644 --- a/src/devices/sound/s14001a.cpp +++ b/src/devices/sound/s14001a.cpp @@ -132,11 +132,11 @@ void s14001a_device::device_start() // resolve callbacks m_ext_read_handler.resolve(); m_bsy_handler.resolve(); - + // note: zerofill is done already by MAME core ClearStatistics(); m_uOutputP1 = m_uOutputP2 = 7; - + // register for savestates save_item(NAME(m_bPhase1)); save_item(NAME(m_uStateP1)); diff --git a/src/devices/sound/s14001a.h b/src/devices/sound/s14001a.h index 7a690cbbc02..97025b8c3c1 100644 --- a/src/devices/sound/s14001a.h +++ b/src/devices/sound/s14001a.h @@ -30,7 +30,7 @@ public: DECLARE_READ_LINE_MEMBER(romen_r); // ROM /EN (pin 9) DECLARE_WRITE_LINE_MEMBER(start_w); // START (pin 10) DECLARE_WRITE8_MEMBER(data_w); // 6-bit word - + void set_clock(UINT32 clock); // set new CLK frequency void force_update(); // update stream, eg. before external ROM bankswitch @@ -80,10 +80,10 @@ private: UINT16 m_uDAR13To05P1; // 9 MSBs of delta address register UINT16 m_uDAR13To05P2; // incrementing uDAR05To13 advances ROM address by 8 bytes - + UINT16 m_uDAR04To00P1; // 5 LSBs of delta address register UINT16 m_uDAR04To00P2; // 3 address ROM, 2 mux 8 bits of data into 2 bit delta - // carry indicates end of quarter pitch period (32 cycles) + // carry indicates end of quarter pitch period (32 cycles) UINT16 m_uCWARP1; // 12 bits Control Word Address Register (syllable) UINT16 m_uCWARP2; @@ -96,9 +96,9 @@ private: bool m_bSilenceP2; UINT8 m_uLengthP1; // 7 bits, upper three loaded from ROM length UINT8 m_uLengthP2; // middle two loaded from ROM repeat and/or uXRepeat - // bit 0 indicates mirror in voiced mode - // bit 1 indicates internal silence in voiced mode - // incremented each pitch period quarter + // bit 0 indicates mirror in voiced mode + // bit 1 indicates internal silence in voiced mode + // incremented each pitch period quarter UINT8 m_uXRepeatP1; // 2 bits, loaded from ROM repeat UINT8 m_uXRepeatP2; diff --git a/src/devices/sound/scsp.cpp b/src/devices/sound/scsp.cpp index 6dfacfa9a6b..1acf90f2c22 100644 --- a/src/devices/sound/scsp.cpp +++ b/src/devices/sound/scsp.cpp @@ -516,7 +516,7 @@ void scsp_device::init() } memory_region* ram_region = memregion(tag()); - + // coolridr.c defines a region for the RAM, stv.c doesn't (uses set_ram_base instead, which seems to be more correct anyway?) if (ram_region != NULL) { diff --git a/src/devices/sound/sn76477.cpp b/src/devices/sound/sn76477.cpp index f94bf98d1e3..e1fe3f4d3fc 100644 --- a/src/devices/sound/sn76477.cpp +++ b/src/devices/sound/sn76477.cpp @@ -957,17 +957,17 @@ WRITE_LINE_MEMBER(sn76477_device::enable_w) { m_channel->update(); - m_enable = state; + m_enable = state; - /* if falling edge */ - if (!m_enable) - { - /* start the attack phase */ - m_attack_decay_cap_voltage = AD_CAP_VOLTAGE_MIN; + /* if falling edge */ + if (!m_enable) + { + /* start the attack phase */ + m_attack_decay_cap_voltage = AD_CAP_VOLTAGE_MIN; - /* one-shot runs regardless of envelope mode */ - m_one_shot_running_ff = 1; - } + /* one-shot runs regardless of envelope mode */ + m_one_shot_running_ff = 1; + } log_enable_line(); } @@ -1392,16 +1392,16 @@ void sn76477_device::noise_clock_res_w(double data) { m_channel->update(); - if (data == 0) - { - m_noise_clock_ext = 1; - } - else - { - m_noise_clock_ext = 0; + if (data == 0) + { + m_noise_clock_ext = 1; + } + else + { + m_noise_clock_ext = 0; - m_noise_clock_res = data; - } + m_noise_clock_res = data; + } log_noise_gen_freq(); } @@ -1711,7 +1711,7 @@ void sn76477_device::sound_stream_update(sound_stream &stream, stream_sample_t * stream_sample_t *buffer = outputs[0]; - /* compute charging values, doing it here ensures that we always use the latest values */ + /* compute charging values, doing it here ensures that we always use the latest values */ one_shot_cap_charging_step = compute_one_shot_cap_charging_rate() / m_our_sample_rate; one_shot_cap_discharging_step = compute_one_shot_cap_discharging_rate() / m_our_sample_rate; diff --git a/src/devices/sound/upd7759.h b/src/devices/sound/upd7759.h index 5dbd03dd2ac..6828810e4eb 100644 --- a/src/devices/sound/upd7759.h +++ b/src/devices/sound/upd7759.h @@ -95,7 +95,7 @@ protected: INT16 m_sample; /* current sample value */ /* ROM access */ - optional_region_ptr<UINT8> m_rombase; /* pointer to ROM data or NULL for slave mode */ + optional_region_ptr<UINT8> m_rombase; /* pointer to ROM data or NULL for slave mode */ UINT8 * m_rom; /* pointer to ROM data or NULL for slave mode */ UINT32 m_romoffset; /* ROM offset to make save/restore easier */ UINT32 m_rommask; /* maximum address offset */ diff --git a/src/devices/video/pcd8544.cpp b/src/devices/video/pcd8544.cpp index ce0a57067a5..a0de1762fa9 100644 --- a/src/devices/video/pcd8544.cpp +++ b/src/devices/video/pcd8544.cpp @@ -61,8 +61,8 @@ void pcd8544_device::device_start() void pcd8544_device::device_reset() { - m_mode = 0x04; // PD=1, V=0, H=0 - m_control = 0x00; // E=0, D=0 + m_mode = 0x04; // PD=1, V=0, H=0 + m_control = 0x00; // E=0, D=0 m_addr_y = 0; m_addr_x = 0; m_bias = 0; @@ -207,13 +207,13 @@ UINT32 pcd8544_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap { switch (m_control) { - case 0: // display blank - case 1: // all display segments on + case 0: // display blank + case 1: // all display segments on bitmap.fill(m_control & 1, cliprect); break; - case 2: // normal mode - case 3: // inverse video mode + case 2: // normal mode + case 3: // inverse video mode if (!m_screen_update_cb.isnull()) m_screen_update_cb(screen, bitmap, cliprect, m_vram, m_control & 1); break; diff --git a/src/devices/video/pcd8544.h b/src/devices/video/pcd8544.h index 2a4639d5a27..bfcd802823b 100644 --- a/src/devices/video/pcd8544.h +++ b/src/devices/video/pcd8544.h @@ -50,20 +50,20 @@ protected: void write_data(UINT8 data); private: - pcd8544_screen_update_delegate m_screen_update_cb; // screen update callback - int m_sdin; - int m_sclk; - int m_dc; - int m_bits; - UINT8 m_mode; - UINT8 m_control; - UINT8 m_op_vol; - UINT8 m_bias; - UINT8 m_temp_coef; - UINT8 m_indata; - UINT8 m_addr_y; - UINT8 m_addr_x; - UINT8 m_vram[6*84]; // 4032 bit video ram + pcd8544_screen_update_delegate m_screen_update_cb; // screen update callback + int m_sdin; + int m_sclk; + int m_dc; + int m_bits; + UINT8 m_mode; + UINT8 m_control; + UINT8 m_op_vol; + UINT8 m_bias; + UINT8 m_temp_coef; + UINT8 m_indata; + UINT8 m_addr_y; + UINT8 m_addr_x; + UINT8 m_vram[6*84]; // 4032 bit video ram }; // device type definition diff --git a/src/devices/video/voodoo.cpp b/src/devices/video/voodoo.cpp index 66571bdceba..4304b5ebf32 100644 --- a/src/devices/video/voodoo.cpp +++ b/src/devices/video/voodoo.cpp @@ -3326,7 +3326,7 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask) rgbaint_t color, preFog; rgbaint_t iterargb(0); - + /* pixel pipeline part 1 handles depth testing and stippling */ //PIXEL_PIPELINE_BEGIN(v, stats, x, y, v->reg[fbzColorPath].u, v->reg[fbzMode].u, iterz, iterw); @@ -3387,7 +3387,7 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask) /* handle alpha test */ if (!alphaTest(v, stats, v->reg[alphaMode].u, color.get_a())) goto nextpixel; - + /* wait for any outstanding work to finish */ poly_wait(v->poly, "LFB Write"); @@ -6016,5 +6016,3 @@ RASTERIZER(generic_1tmu, 1, v->reg[fbzColorPath].u, v->reg[fbzMode].u, v->reg[al RASTERIZER(generic_2tmu, 2, v->reg[fbzColorPath].u, v->reg[fbzMode].u, v->reg[alphaMode].u, v->reg[fogMode].u, v->tmu[0].reg[textureMode].u, v->tmu[1].reg[textureMode].u) - - diff --git a/src/devices/video/voodoo_rast.inc b/src/devices/video/voodoo_rast.inc index d2ee6e9930b..e7251bf9a01 100644 --- a/src/devices/video/voodoo_rast.inc +++ b/src/devices/video/voodoo_rast.inc @@ -491,4 +491,3 @@ RASTERIZER_ENTRY( 0x00482405, 0x00045110, 0x00000000, 0x000B073B, 0x0C261A0F, 0x //RASTERIZER_ENTRY( 0x00000001, 0x00000000, 0x00000000, 0x00000300, 0x00000800, 0x00000800 ) /* * 87 2 72 */ //RASTERIZER_ENTRY( 0x00000001, 0x00000000, 0x00000000, 0x00000200, 0x08241A00, 0x08241A00 ) /* * 92 2 8 */ //RASTERIZER_ENTRY( 0x00000001, 0x00000000, 0x00000000, 0x00000200, 0x00000000, 0x08241A00 ) /* * 93 2 8 */ - |