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-rw-r--r--src/devices/cpu/drcbec.cpp4
-rw-r--r--src/devices/cpu/drcbex64.cpp36
-rw-r--r--src/devices/cpu/drcbex86.cpp32
-rw-r--r--src/devices/cpu/h8/h8.cpp6
-rw-r--r--src/devices/cpu/h8/h8_dma.cpp6
-rw-r--r--src/devices/cpu/h8/h8_dma.h2
-rw-r--r--src/devices/cpu/h8/h8_dtc.cpp7
-rw-r--r--src/devices/cpu/h8/h8_sci.cpp30
-rw-r--r--src/devices/cpu/h8/h8_timer16.cpp14
-rw-r--r--src/devices/cpu/h8/h8_timer8.cpp6
-rw-r--r--src/devices/cpu/h8/h8_watchdog.cpp8
-rw-r--r--src/devices/cpu/h8/h8_watchdog.h2
-rw-r--r--src/devices/cpu/hphybrid/hphybrid.cpp4
-rw-r--r--src/devices/cpu/hphybrid/hphybrid.h2
-rw-r--r--src/devices/cpu/tms1000/tms1k_base.h2
15 files changed, 80 insertions, 81 deletions
diff --git a/src/devices/cpu/drcbec.cpp b/src/devices/cpu/drcbec.cpp
index c48bb990f82..193512feb88 100644
--- a/src/devices/cpu/drcbec.cpp
+++ b/src/devices/cpu/drcbec.cpp
@@ -1070,7 +1070,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_TZCNT, 4, 0): // TZCNT dst,src
+ case MAKE_OPCODE_SHORT(OP_TZCNT, 4, 0): // TZCNT dst,src
PARAM0 = tzcount32(PARAM1);
break;
@@ -1689,7 +1689,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_TZCNT, 8, 0): // DTZCNT dst,src
+ case MAKE_OPCODE_SHORT(OP_TZCNT, 8, 0): // DTZCNT dst,src
DPARAM0 = tzcount64(DPARAM1);
break;
diff --git a/src/devices/cpu/drcbex64.cpp b/src/devices/cpu/drcbex64.cpp
index 39863b42f15..b6a5e67732b 100644
--- a/src/devices/cpu/drcbex64.cpp
+++ b/src/devices/cpu/drcbex64.cpp
@@ -4303,7 +4303,7 @@ void drcbe_x64::op_add(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_add_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // add [dstp],src1p
+ emit_add_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // add [dstp],src1p
// reg = reg + imm
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && inst.flags() == 0)
@@ -4331,7 +4331,7 @@ void drcbe_x64::op_add(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_add_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // add [dstp],src1p
+ emit_add_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // add [dstp],src1p
// reg = reg + imm
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && short_immediate(src2p.immediate()) && inst.flags() == 0)
@@ -5216,7 +5216,7 @@ void drcbe_x64::op_or(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_or_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // or [dstp],src1p
+ emit_or_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // or [dstp],src1p
// general case
else
@@ -5236,7 +5236,7 @@ void drcbe_x64::op_or(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_or_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // or [dstp],src1p
+ emit_or_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // or [dstp],src1p
// general case
else
@@ -5278,11 +5278,11 @@ void drcbe_x64::op_xor(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_xor_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // xor [dstp],src1p
+ emit_xor_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // xor [dstp],src1p
// dstp == src1p register
else if (dstp.is_int_register() && dstp == src1p)
- emit_xor_r32_p32(dst, dstp.ireg(), src2p, inst); // xor dstp,src2p
+ emit_xor_r32_p32(dst, dstp.ireg(), src2p, inst); // xor dstp,src2p
// general case
else
@@ -5302,11 +5302,11 @@ void drcbe_x64::op_xor(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_xor_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // xor [dstp],src1p
+ emit_xor_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // xor [dstp],src1p
// dstp == src1p register
else if (dstp.is_int_register() && dstp == src1p)
- emit_xor_r64_p64(dst, dstp.ireg(), src2p, inst); // xor dstp,src2p
+ emit_xor_r64_p64(dst, dstp.ireg(), src2p, inst); // xor dstp,src2p
// general case
else
@@ -5374,16 +5374,16 @@ void drcbe_x64::op_tzcnt(x86code *&dst, const instruction &inst)
// normalize parameters
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
- be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
// 32-bit form
if (inst.size() == 4)
{
int dstreg = dstp.select_register(REG_EAX);
- emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,srcp
- emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
- emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
- emit_cmovcc_r32_r32(dst, x64emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
+ emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,srcp
+ emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
+ emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
+ emit_cmovcc_r32_r32(dst, x64emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
@@ -5391,11 +5391,11 @@ void drcbe_x64::op_tzcnt(x86code *&dst, const instruction &inst)
else if (inst.size() == 8)
{
int dstreg = dstp.select_register(REG_RAX);
- emit_mov_r64_p64(dst, dstreg, srcp); // mov dstreg,srcp
- emit_mov_r64_imm(dst, REG_RCX, 64); // mov rcx,64
- emit_bsf_r64_r64(dst, dstreg, dstreg); // bsf dstreg,dstreg
- emit_cmovcc_r64_r64(dst, x64emit::COND_Z, dstreg, REG_RCX); // cmovz dstreg,rcx
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, srcp); // mov dstreg,srcp
+ emit_mov_r64_imm(dst, REG_RCX, 64); // mov rcx,64
+ emit_bsf_r64_r64(dst, dstreg, dstreg); // bsf dstreg,dstreg
+ emit_cmovcc_r64_r64(dst, x64emit::COND_Z, dstreg, REG_RCX); // cmovz dstreg,rcx
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
diff --git a/src/devices/cpu/drcbex86.cpp b/src/devices/cpu/drcbex86.cpp
index 2613028d03b..e4d40ecfd0e 100644
--- a/src/devices/cpu/drcbex86.cpp
+++ b/src/devices/cpu/drcbex86.cpp
@@ -5492,31 +5492,31 @@ void drcbe_x86::op_tzcnt(x86code *&dst, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
int dstreg = dstp.select_register(REG_EAX);
-
+
// 32-bit form
if (inst.size() == 4)
{
- emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
- emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
- emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
- emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
+ emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
+ emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
+ emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
emit_link skip;
- emit_mov_r64_p64(dst, REG_EDX, dstreg, srcp); // mov dstreg:edx,srcp
- emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
- emit_jcc_short_link(dst, x86emit::COND_NZ, skip); // jnz skip
- emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
- emit_bsf_r32_r32(dst, dstreg, REG_EDX); // bsf dstreg,edx
- emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
- emit_add_r32_imm(dst, dstreg, 32); // add dstreg,32
- track_resolve_link(dst, skip); // skip:
- emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
+ emit_mov_r64_p64(dst, REG_EDX, dstreg, srcp); // mov dstreg:edx,srcp
+ emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
+ emit_jcc_short_link(dst, x86emit::COND_NZ, skip); // jnz skip
+ emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
+ emit_bsf_r32_r32(dst, dstreg, REG_EDX); // bsf dstreg,edx
+ emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
+ emit_add_r32_imm(dst, dstreg, 32); // add dstreg,32
+ track_resolve_link(dst, skip); // skip:
+ emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
}
}
diff --git a/src/devices/cpu/h8/h8.cpp b/src/devices/cpu/h8/h8.cpp
index a92143e5680..bd53761bb6a 100644
--- a/src/devices/cpu/h8/h8.cpp
+++ b/src/devices/cpu/h8/h8.cpp
@@ -146,9 +146,9 @@ void h8_device::set_current_dma(h8_dma_state *state)
logerror("DMA done\n");
else
logerror("New current dma s=%x d=%x is=%d id=%d count=%x m=%d\n",
- state->source, state->dest, state->incs, state->incd,
- state->count, state->mode_16 ? 16 : 8);
-
+ state->source, state->dest, state->incs, state->incd,
+ state->count, state->mode_16 ? 16 : 8);
+
}
void h8_device::set_current_dtc(h8_dtc_state *state)
diff --git a/src/devices/cpu/h8/h8_dma.cpp b/src/devices/cpu/h8/h8_dma.cpp
index 637e1a98b5c..fb907ffcef1 100644
--- a/src/devices/cpu/h8/h8_dma.cpp
+++ b/src/devices/cpu/h8/h8_dma.cpp
@@ -277,7 +277,7 @@ bool h8_dma_channel_device::start_test(int vector)
if(dte == 0)
return false;
- throw emu_fatalerror("%s: DMA startup test in short address mode unimplemented.\n", tag());
+ throw emu_fatalerror("%s: DMA startup test in short address mode unimplemented.\n", tag());
}
}
@@ -297,7 +297,7 @@ void h8_dma_channel_device::start(int submodule)
cpu->set_current_dma(state + submodule);
}
} else {
- throw emu_fatalerror("%s: DMA start in short address mode unimplemented.\n", tag());
+ throw emu_fatalerror("%s: DMA start in short address mode unimplemented.\n", tag());
}
}
@@ -315,6 +315,6 @@ void h8_dma_channel_device::count_done(int submodule)
throw emu_fatalerror("%s: DMA end-of-transfer interrupt in full address/normal mode unimplemented.\n", tag());
}
} else {
- throw emu_fatalerror("%s: DMA count done in short address mode unimplemented.\n", tag());
+ throw emu_fatalerror("%s: DMA count done in short address mode unimplemented.\n", tag());
}
}
diff --git a/src/devices/cpu/h8/h8_dma.h b/src/devices/cpu/h8/h8_dma.h
index e241fb5653e..c561f15aea8 100644
--- a/src/devices/cpu/h8/h8_dma.h
+++ b/src/devices/cpu/h8/h8_dma.h
@@ -25,7 +25,7 @@ struct h8_dma_state {
#define MCFG_H8_DMA_ADD( _tag ) \
MCFG_DEVICE_ADD( _tag, H8_DMA, 0 )
-#define MCFG_H8_DMA_CHANNEL_ADD( _tag, intc, irq_base, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, va, vb, vc, vd, ve, vf ) \
+#define MCFG_H8_DMA_CHANNEL_ADD( _tag, intc, irq_base, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, va, vb, vc, vd, ve, vf ) \
MCFG_DEVICE_ADD( _tag, H8_DMA_CHANNEL, 0 ) \
downcast<h8_dma_channel_device *>(device)->set_info(intc, irq_base, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, va, vb, vc, vd, ve, vf);
diff --git a/src/devices/cpu/h8/h8_dtc.cpp b/src/devices/cpu/h8/h8_dtc.cpp
index 0efb6200a54..12cd8155773 100644
--- a/src/devices/cpu/h8/h8_dtc.cpp
+++ b/src/devices/cpu/h8/h8_dtc.cpp
@@ -131,7 +131,7 @@ void h8_dtc_device::vector_done(int vector)
UINT32 mode = sra & 0x0c000000;
if(V>=1) logerror("regs at %08x sra=%08x dar=%08x cr=%08x %s mode\n", state->base, sra, dar, cr,
- mode == 0x00000000 || mode == 0x0c000000 ? "normal" : mode == 0x04000000 ? "repeat" : "block");
+ mode == 0x00000000 || mode == 0x0c000000 ? "normal" : mode == 0x04000000 ? "repeat" : "block");
state->incs = sra & 0x80000000 ?
sra & 0x40000000 ? sra & 0x01000000 ? -2 : -1 :
sra & 0x01000000 ? 2 : 1 :
@@ -140,7 +140,7 @@ void h8_dtc_device::vector_done(int vector)
sra & 0x10000000 ? sra & 0x01000000 ? -2 : -1 :
sra & 0x01000000 ? 2 : 1 :
0;
-
+
switch(mode) {
case 0x00000000: case 0x0c0000000:
state->count = 1;
@@ -215,7 +215,7 @@ bool h8_dtc_device::trigger_dtc(int vector)
{
int slot = vector_to_enable[vector];
if(slot == -1)
- return false;
+ return false;
if(dtcer[slot >> 3] & (0x01 << (7-(slot & 7)))) {
edge(vector);
return true;
@@ -266,4 +266,3 @@ void h8_dtc_device::count_done(int id)
cpu->request_state(h8_device::STATE_DTC_WRITEBACK);
waiting_writeback.push_back(id);
}
-
diff --git a/src/devices/cpu/h8/h8_sci.cpp b/src/devices/cpu/h8/h8_sci.cpp
index e4806fa4138..e07cca2722b 100644
--- a/src/devices/cpu/h8/h8_sci.cpp
+++ b/src/devices/cpu/h8/h8_sci.cpp
@@ -44,13 +44,13 @@ WRITE8_MEMBER(h8_sci_device::smr_w)
{
smr = data;
if(V>=2) logerror("smr_w %02x %s %c%c%c%s /%d (%06x)\n", data,
- data & SMR_CA ? "sync" : "async",
- data & SMR_CHR ? '7' : '8',
- data & SMR_PE ? data & SMR_OE ? 'o' : 'e' : 'n',
- data & SMR_STOP ? '2' : '1',
- data & SMR_MP ? " mp" : "",
- 1 << 2*(data & SMR_CKS),
- cpu->pc());
+ data & SMR_CA ? "sync" : "async",
+ data & SMR_CHR ? '7' : '8',
+ data & SMR_PE ? data & SMR_OE ? 'o' : 'e' : 'n',
+ data & SMR_STOP ? '2' : '1',
+ data & SMR_MP ? " mp" : "",
+ 1 << 2*(data & SMR_CKS),
+ cpu->pc());
clock_update();
}
@@ -86,14 +86,14 @@ bool h8_sci_device::has_recv_error() const
WRITE8_MEMBER(h8_sci_device::scr_w)
{
if(V>=2) logerror("scr_w %02x%s%s%s%s%s%s clk=%d (%06x)\n", data,
- data & SCR_TIE ? " txi" : "",
- data & SCR_RIE ? " rxi" : "",
- data & SCR_TE ? " tx" : "",
- data & SCR_RE ? " rx" : "",
- data & SCR_MPIE ? " mpi" : "",
- data & SCR_TEIE ? " tei" : "",
- data & SCR_CKE,
- cpu->pc());
+ data & SCR_TIE ? " txi" : "",
+ data & SCR_RIE ? " rxi" : "",
+ data & SCR_TE ? " tx" : "",
+ data & SCR_RE ? " rx" : "",
+ data & SCR_MPIE ? " mpi" : "",
+ data & SCR_TEIE ? " tei" : "",
+ data & SCR_CKE,
+ cpu->pc());
UINT8 delta = scr ^ data;
scr = data;
diff --git a/src/devices/cpu/h8/h8_timer16.cpp b/src/devices/cpu/h8/h8_timer16.cpp
index 4c7bec631a5..796a26c0fef 100644
--- a/src/devices/cpu/h8/h8_timer16.cpp
+++ b/src/devices/cpu/h8/h8_timer16.cpp
@@ -103,13 +103,13 @@ WRITE8_MEMBER(h8_timer16_channel_device::tier_w)
tier = data;
tier_update();
if(V>=1) logerror("irq %c%c%c%c%c%c trigger=%d\n",
- ier & IRQ_A ? 'a' : '.',
- ier & IRQ_B ? 'b' : '.',
- ier & IRQ_C ? 'c' : '.',
- ier & IRQ_D ? 'd' : '.',
- ier & IRQ_V ? 'v' : '.',
- ier & IRQ_U ? 'u' : '.',
- ier & IRQ_TRIG ? 1 : 0);
+ ier & IRQ_A ? 'a' : '.',
+ ier & IRQ_B ? 'b' : '.',
+ ier & IRQ_C ? 'c' : '.',
+ ier & IRQ_D ? 'd' : '.',
+ ier & IRQ_V ? 'v' : '.',
+ ier & IRQ_U ? 'u' : '.',
+ ier & IRQ_TRIG ? 1 : 0);
recalc_event();
}
diff --git a/src/devices/cpu/h8/h8_timer8.cpp b/src/devices/cpu/h8/h8_timer8.cpp
index 0b9d5da933c..671170e1cab 100644
--- a/src/devices/cpu/h8/h8_timer8.cpp
+++ b/src/devices/cpu/h8/h8_timer8.cpp
@@ -130,9 +130,9 @@ void h8_timer8_channel_device::update_tcr()
}
if(V>=1) p += sprintf(p, ", irq=%c%c%c\n",
- tcr & TCR_CMIEB ? 'b' : '-',
- tcr & TCR_CMIEA ? 'a' : '-',
- tcr & TCR_OVIE ? 'o' : '-');
+ tcr & TCR_CMIEB ? 'b' : '-',
+ tcr & TCR_CMIEA ? 'a' : '-',
+ tcr & TCR_OVIE ? 'o' : '-');
logerror(buf);
}
diff --git a/src/devices/cpu/h8/h8_watchdog.cpp b/src/devices/cpu/h8/h8_watchdog.cpp
index 91c097b8db1..19d9131819a 100644
--- a/src/devices/cpu/h8/h8_watchdog.cpp
+++ b/src/devices/cpu/h8/h8_watchdog.cpp
@@ -27,7 +27,7 @@ UINT64 h8_watchdog_device::internal_update(UINT64 current_time)
int shift = (type == S ? div_s : div_bh)[tcsr & TCSR_CKS];
UINT64 spos = tcnt_cycle_base >> shift;
return (spos + 0x100 - tcnt) << shift;
-
+
} else
return 0;
}
@@ -44,7 +44,7 @@ void h8_watchdog_device::tcnt_update(UINT64 cur_time)
int next_tcnt = tcnt + int(epos - spos);
tcnt = next_tcnt;
tcnt_cycle_base = cur_time;
- // logerror("%10lld tcnt %02x -> %03x shift=%d\n", cur_time, tcnt, next_tcnt, shift);
+ // logerror("%10lld tcnt %02x -> %03x shift=%d\n", cur_time, tcnt, next_tcnt, shift);
if(next_tcnt >= 0x100) {
logerror("watchdog triggered\n");
@@ -57,7 +57,7 @@ void h8_watchdog_device::tcnt_update(UINT64 cur_time)
if(!(tcsr & TCSR_OVF)) {
tcsr |= TCSR_OVF;
intc->internal_interrupt(irq);
- }
+ }
}
}
} else
@@ -91,7 +91,7 @@ WRITE16_MEMBER(h8_watchdog_device::wd_w)
if(tcsr & TCSR_TME) {
tcnt = data & 0xff;
tcnt_cycle_base = cpu->total_cycles();
- // logerror("%10lld tcnt = %02x\n", tcnt_cycle_base, tcnt);
+ // logerror("%10lld tcnt = %02x\n", tcnt_cycle_base, tcnt);
}
cpu->internal_update();
}
diff --git a/src/devices/cpu/h8/h8_watchdog.h b/src/devices/cpu/h8/h8_watchdog.h
index d5c0d5d21a1..efb77b29c05 100644
--- a/src/devices/cpu/h8/h8_watchdog.h
+++ b/src/devices/cpu/h8/h8_watchdog.h
@@ -43,7 +43,7 @@
#include "h8.h"
#include "h8_intc.h"
-#define MCFG_H8_WATCHDOG_ADD( _tag, intc, irq, type ) \
+#define MCFG_H8_WATCHDOG_ADD( _tag, intc, irq, type ) \
MCFG_DEVICE_ADD( _tag, H8_WATCHDOG, 0 ) \
downcast<h8_watchdog_device *>(device)->set_info(intc, irq, type);
diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp
index 5c731378093..52b3c405c87 100644
--- a/src/devices/cpu/hphybrid/hphybrid.cpp
+++ b/src/devices/cpu/hphybrid/hphybrid.cpp
@@ -133,7 +133,7 @@ WRITE_LINE_MEMBER(hp_hybrid_cpu_device::flag_w)
UINT8 hp_hybrid_cpu_device::pa_r(void) const
{
- return CURRENT_PA;
+ return CURRENT_PA;
}
hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth)
@@ -1092,7 +1092,7 @@ void hp_hybrid_cpu_device::handle_dma(void)
m_icount -= 9;
}
- // Mystery solved: DMA is not automatically disabled at TC (test of 9845's graphic memory relies on this to work)
+ // Mystery solved: DMA is not automatically disabled at TC (test of 9845's graphic memory relies on this to work)
}
UINT16 hp_hybrid_cpu_device::RIO(UINT8 pa , UINT8 ic)
diff --git a/src/devices/cpu/hphybrid/hphybrid.h b/src/devices/cpu/hphybrid/hphybrid.h
index aeb5de6586b..c34d6f0b252 100644
--- a/src/devices/cpu/hphybrid/hphybrid.h
+++ b/src/devices/cpu/hphybrid/hphybrid.h
@@ -87,7 +87,7 @@ public:
DECLARE_WRITE_LINE_MEMBER(status_w);
DECLARE_WRITE_LINE_MEMBER(flag_w);
- UINT8 pa_r(void) const;
+ UINT8 pa_r(void) const;
template<class _Object> static devcb_base &set_pa_changed_func(device_t &device, _Object object) { return downcast<hp_hybrid_cpu_device &>(device).m_pa_changed_func.set_callback(object); }
diff --git a/src/devices/cpu/tms1000/tms1k_base.h b/src/devices/cpu/tms1000/tms1k_base.h
index c1649f406be..aecbd041557 100644
--- a/src/devices/cpu/tms1000/tms1k_base.h
+++ b/src/devices/cpu/tms1000/tms1k_base.h
@@ -110,7 +110,7 @@ public:
template<class _Object> static devcb_base &set_write_r_callback(device_t &device, _Object object) { return downcast<tms1k_base_device &>(device).m_write_r.set_callback(object); }
template<class _Object> static devcb_base &set_power_off_callback(device_t &device, _Object object) { return downcast<tms1k_base_device &>(device).m_power_off.set_callback(object); }
static void set_output_pla(device_t &device, const UINT16 *output_pla) { downcast<tms1k_base_device &>(device).m_output_pla_table = output_pla; }
-
+
UINT8 debug_peek_o_index() { return m_o_index; } // get output PLA index, for debugging (don't use in emulation)
// microinstructions