diff options
Diffstat (limited to 'src/devices/cpu/m68000/m68kcpu.h')
-rw-r--r-- | src/devices/cpu/m68000/m68kcpu.h | 57 |
1 files changed, 54 insertions, 3 deletions
diff --git a/src/devices/cpu/m68000/m68kcpu.h b/src/devices/cpu/m68000/m68kcpu.h index aebe498f899..93507a2a283 100644 --- a/src/devices/cpu/m68000/m68kcpu.h +++ b/src/devices/cpu/m68000/m68kcpu.h @@ -8,7 +8,7 @@ * Version 4.50 * * A portable Motorola M680x0 processor emulation engine. - * Copyright Karl Stenerud. All rights reserved. + * Copyright Karl Stenerud * */ @@ -604,11 +604,14 @@ inline u32 m68ki_read_imm_16() result = MASK_OUT_ABOVE_16(m_pref_data); m_pc += 2; if (!m_mmu_tmp_buserror_occurred) { + // prefetch only if no bus error occurred in opcode fetch m_pref_data = m68ki_ic_readimm16(m_pc); m_pref_addr = m_mmu_tmp_buserror_occurred ? ~0 : m_pc; - // ignore bus error on prefetch - m_mmu_tmp_buserror_occurred = 0; + if (!CPU_TYPE_IS_010()) + { + m_mmu_tmp_buserror_occurred = 0; + } } return result; @@ -656,6 +659,16 @@ inline u32 m68ki_read_8_fc(u32 address, u32 fc) m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 1; m_mmu_tmp_sz = M68K_SZ_BYTE; + // Check for reading the FPU's CIRs if this is an '020 or '030. + // In CPU space (FC 7), addresses 0x0002xxxx are coprocessor interface registers. + // Bits 15-13 are the coprocessor ID, and bits 0-4 are the register select. + if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS()) + { + if ((address & 0xffffeff0) == 0x00022000) + { + return m6888x_read_cir(address); + } + } return m_read8(address); } inline u32 m68ki_read_16_fc(u32 address, u32 fc) @@ -667,6 +680,13 @@ inline u32 m68ki_read_16_fc(u32 address, u32 fc) m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 1; m_mmu_tmp_sz = M68K_SZ_WORD; + if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS()) + { + if ((address & 0xffffeff0) == 0x00022000) + { + return m6888x_read_cir(address); + } + } return m_read16(address); } inline u32 m68ki_read_32_fc(u32 address, u32 fc) @@ -678,6 +698,13 @@ inline u32 m68ki_read_32_fc(u32 address, u32 fc) m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 1; m_mmu_tmp_sz = M68K_SZ_LONG; + if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS()) + { + if ((address & 0xffffeff0) == 0x00022000) + { + return m6888x_read_cir(address); + } + } return m_read32(address); } @@ -686,6 +713,14 @@ inline void m68ki_write_8_fc(u32 address, u32 fc, u32 value) m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 0; m_mmu_tmp_sz = M68K_SZ_BYTE; + if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS()) + { + if ((address & 0xffffeff0) == 0x00022000) + { + m6888x_write_cir(address, value); + return; + } + } m_write8(address, value); } inline void m68ki_write_16_fc(u32 address, u32 fc, u32 value) @@ -697,6 +732,14 @@ inline void m68ki_write_16_fc(u32 address, u32 fc, u32 value) m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 0; m_mmu_tmp_sz = M68K_SZ_WORD; + if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS()) + { + if ((address & 0xffffeff0) == 0x00022000) + { + m6888x_write_cir(address, value); + return; + } + } m_write16(address, value); } inline void m68ki_write_32_fc(u32 address, u32 fc, u32 value) @@ -708,6 +751,14 @@ inline void m68ki_write_32_fc(u32 address, u32 fc, u32 value) m_mmu_tmp_fc = fc; m_mmu_tmp_rw = 0; m_mmu_tmp_sz = M68K_SZ_LONG; + if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS()) + { + if ((address & 0xffffeff0) == 0x00022000) + { + m6888x_write_cir(address, value); + return; + } + } m_write32(address, value); } |