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-rw-r--r--src/emu/cpu/h8/h8make.py6
-rw-r--r--src/emu/cpu/mcs96/mcs96make.py10
2 files changed, 8 insertions, 8 deletions
diff --git a/src/emu/cpu/h8/h8make.py b/src/emu/cpu/h8/h8make.py
index 35cda51b86d..8328ddb56b1 100644
--- a/src/emu/cpu/h8/h8make.py
+++ b/src/emu/cpu/h8/h8make.py
@@ -222,8 +222,8 @@ class Macro:
values.append(lval)
for i in range(0, len(self.source)):
line = self.source[i]
- for i in range(0, len(self.params)):
- line = line.replace(self.params[i], values[i])
+ for j in range(0, len(self.params)):
+ line = line.replace(self.params[j], values[j])
target.add_source_line(line)
class DispatchStep:
@@ -275,7 +275,7 @@ class OpcodeList:
if not line:
continue
if line.startswith(" ") or line.startswith("\t"):
- if inf != None:
+ if inf is not None:
# append instruction to last opcode, maybe expand a macro
tokens = line.split()
if tokens[0] in self.macros:
diff --git a/src/emu/cpu/mcs96/mcs96make.py b/src/emu/cpu/mcs96/mcs96make.py
index fdc8da6c877..8381e63dc2f 100644
--- a/src/emu/cpu/mcs96/mcs96make.py
+++ b/src/emu/cpu/mcs96/mcs96make.py
@@ -58,8 +58,8 @@ class Macro:
values.append(tokens[i])
for i in range(0, len(self.source)):
line = self.source[i]
- for i in range(0, len(self.params)):
- line = line.replace(self.params[i], values[i])
+ for j in range(0, len(self.params)):
+ line = line.replace(self.params[j], values[j])
target.add_source_line(line)
class OpcodeList:
@@ -153,12 +153,12 @@ class OpcodeList:
opc = None
if i >= 0x100 and i-0x100+0xfe00 in self.opcode_per_id:
opc = self.opcode_per_id[i-0x100+0xfe00]
- if opc == None and (i & 0xff) in self.opcode_per_id:
+ if opc is None and (i & 0xff) in self.opcode_per_id:
opc = self.opcode_per_id[i & 0xff]
- if opc != None:
+ if opc is not None:
nm = opc.name + "_" + opc.amode
if opc.is_196:
- nm += "_196"
+ nm += "_196"
print >>f, "\tcase 0x%03x: %s_full(); break;" % (i, nm)
print >>f, "\tcase 0x200: fetch_full(); break;"
print >>f, "\tcase 0x201: fetch_noirq_full(); break;"