diff options
-rw-r--r-- | src/devices/cpu/mcs96/i8x9x.cpp | 78 | ||||
-rw-r--r-- | src/devices/cpu/mcs96/i8x9x.h | 26 | ||||
-rw-r--r-- | src/devices/cpu/mcs96/i8xc196.cpp | 2 | ||||
-rw-r--r-- | src/devices/cpu/mcs96/mcs96.cpp | 37 | ||||
-rw-r--r-- | src/devices/cpu/mcs96/mcs96.h | 13 |
5 files changed, 109 insertions, 47 deletions
diff --git a/src/devices/cpu/mcs96/i8x9x.cpp b/src/devices/cpu/mcs96/i8x9x.cpp index 9c3b6dcc68f..1ab58371f3d 100644 --- a/src/devices/cpu/mcs96/i8x9x.cpp +++ b/src/devices/cpu/mcs96/i8x9x.cpp @@ -19,9 +19,18 @@ i8x9x_device::i8x9x_device(const machine_config &mconfig, device_type type, cons m_in_p0_cb(*this), m_out_p1_cb(*this), m_in_p1_cb(*this), m_out_p2_cb(*this), m_in_p2_cb(*this), - base_timer2(0), ad_done(0), hso_command(0), ad_command(0), hso_time(0), ad_result(0), - ios0(0), ios1(0), ioc0(0), ioc1(0), sbuf(0), sp_stat(0), serial_send_buf(0), serial_send_timer(0) + base_timer2(0), ad_done(0), hsi_mode(0), hso_command(0), ad_command(0), hso_time(0), ad_result(0), pwm_control(0), + ios0(0), ios1(0), ioc0(0), ioc1(0), sbuf(0), sp_con(0), sp_stat(0), serial_send_buf(0), serial_send_timer(0) { + for (auto &hso : hso_info) + { + hso.active = false; + hso.command = 0; + hso.time = 0; + } + hso_cam_hold.active = false; + hso_cam_hold.command = 0; + hso_cam_hold.time = 0; } std::unique_ptr<util::disasm_interface> i8x9x_device::create_disassembler() @@ -45,20 +54,40 @@ void i8x9x_device::device_start() { mcs96_device::device_start(); cycles_scaling = 3; + + state_add(I8X9X_HSI_MODE, "HSI_MODE", hsi_mode); + state_add(I8X9X_HSO_TIME, "HSO_TIME", hso_time); + state_add(I8X9X_HSO_COMMAND, "HSO_COMMAND", hso_command); + state_add(I8X9X_AD_COMMAND, "AD_COMMAND", ad_command).mask(0xf); + state_add(I8X9X_AD_RESULT, "AD_RESULT", ad_result); + state_add(I8X9X_PWM_CONTROL, "PWM_CONTROL", pwm_control); + state_add(I8X9X_SBUF_RX, "SBUF_RX", sbuf); + state_add(I8X9X_SBUF_TX, "SBUF_TX", serial_send_buf); + state_add(I8X9X_SP_CON, "SP_CON", sp_con).mask(0x1f); + state_add(I8X9X_SP_STAT, "SP_STAT", sp_stat).mask(0xe0); + state_add(I8X9X_IOC0, "IOC0", ioc0); + state_add(I8X9X_IOC1, "IOC1", ioc1); + state_add(I8X9X_IOS0, "IOS0", ios0); + state_add(I8X9X_IOS1, "IOS1", ios1); } void i8x9x_device::device_reset() { mcs96_device::device_reset(); - memset(hso_info, 0, sizeof(hso_info)); - memset(&hso_cam_hold, 0, sizeof(hso_cam_hold)); + for (auto &hso : hso_info) + hso.active = false; + hso_cam_hold.active = false; hso_command = 0; hso_time = 0; base_timer2 = 0; - ios0 = ios1 = ioc0 = ioc1 = 0x00; + ios0 = ios1 = 0x00; + ioc0 &= 0xaa; + ioc1 = (ioc1 & 0xae) | 0x01; ad_result = 0; ad_done = 0; - sp_stat = 0; + pwm_control = 0x00; + sp_con &= 0x17; + sp_stat &= 0x80; serial_send_timer = 0; } @@ -126,7 +155,7 @@ void i8x9x_device::internal_regs(address_map &map) void i8x9x_device::ad_command_w(u8 data) { - ad_command = data; + ad_command = data & 0xf; if (ad_command & 8) ad_start(total_cycles()); } @@ -138,6 +167,7 @@ u8 i8x9x_device::ad_result_r(offs_t offset) void i8x9x_device::hsi_mode_w(u8 data) { + hsi_mode = data; logerror("hsi_mode %02x (%04x)\n", data, PPC); } @@ -179,30 +209,6 @@ u8 i8x9x_device::sbuf_r() return sbuf; } -void i8x9x_device::int_mask_w(u8 data) -{ - PSW = (PSW & 0xff00) | data; - check_irq(); -} - -u8 i8x9x_device::int_mask_r() -{ - return PSW; -} - -void i8x9x_device::int_pending_w(u8 data) -{ - pending_irq = data; - logerror("int_pending %02x (%04x)\n", data, PPC); -} - -u8 i8x9x_device::int_pending_r() -{ - if (!machine().side_effects_disabled()) - logerror("read int pending (%04x)\n", PPC); - return pending_irq; -} - void i8x9x_device::watchdog_w(u8 data) { logerror("watchdog %02x (%04x)\n", data, PPC); @@ -264,7 +270,7 @@ u8 i8x9x_device::port2_r() void i8x9x_device::sp_con_w(u8 data) { - logerror("sp con %02x (%04x)\n", data, PPC); + sp_con = data & 0x1f; } u8 i8x9x_device::sp_stat_r() @@ -280,7 +286,7 @@ u8 i8x9x_device::sp_stat_r() void i8x9x_device::ioc0_w(u8 data) { - logerror("ioc0 %02x (%04x)\n", data, PPC); + ioc0 = data; } u8 i8x9x_device::ios0_r() @@ -292,7 +298,7 @@ u8 i8x9x_device::ios0_r() void i8x9x_device::ioc1_w(u8 data) { - logerror("ioc1 %02x (%04x)\n", data, PPC); + ioc1 = data; } u8 i8x9x_device::ios1_r() @@ -305,7 +311,7 @@ u8 i8x9x_device::ios1_r() void i8x9x_device::pwm_control_w(u8 data) { - logerror("pwm control %02x (%04x)\n", data, PPC); + pwm_control = data; } void i8x9x_device::do_exec_partial() @@ -372,7 +378,7 @@ void i8x9x_device::internal_update(uint64_t current_time) } } - if(current_time == ad_done) { + if(ad_done && current_time >= ad_done) { ad_done = 0; ad_result &= ~8; } diff --git a/src/devices/cpu/mcs96/i8x9x.h b/src/devices/cpu/mcs96/i8x9x.h index 1fac066c5b1..6938a83d779 100644 --- a/src/devices/cpu/mcs96/i8x9x.h +++ b/src/devices/cpu/mcs96/i8x9x.h @@ -16,9 +16,20 @@ class i8x9x_device : public mcs96_device { public: enum { - A0, A1, A2, A3, A4, A5, A6, A7, - SERIAL, - P0, P1, P2 + I8X9X_HSI_MODE = MCS96_LAST_REG + 1, + I8X9X_HSO_TIME, + I8X9X_HSO_COMMAND, + I8X9X_AD_COMMAND, + I8X9X_AD_RESULT, + I8X9X_PWM_CONTROL, + I8X9X_SBUF_RX, + I8X9X_SBUF_TX, + I8X9X_SP_CON, + I8X9X_SP_STAT, + I8X9X_IOC0, + I8X9X_IOC1, + I8X9X_IOS0, + I8X9X_IOS1 }; auto ach0_cb() { return m_ach_cb[0].bind(); } @@ -62,10 +73,6 @@ protected: u8 hsi_status_r(); void sbuf_w(u8 data); u8 sbuf_r(); - void int_mask_w(u8 data); - u8 int_mask_r(); - void int_pending_w(u8 data); - u8 int_pending_r(); void watchdog_w(u8 data); u16 timer1_r(); u16 timer2_r(); @@ -116,10 +123,11 @@ private: hso_cam_entry hso_cam_hold; uint64_t base_timer2, ad_done; - uint8_t hso_command, ad_command; + uint8_t hsi_mode, hso_command, ad_command; uint16_t hso_time, ad_result; + uint8_t pwm_control; uint8_t ios0, ios1, ioc0, ioc1; - uint8_t sbuf, sp_stat; + uint8_t sbuf, sp_con, sp_stat; uint8_t serial_send_buf; uint64_t serial_send_timer; diff --git a/src/devices/cpu/mcs96/i8xc196.cpp b/src/devices/cpu/mcs96/i8xc196.cpp index 4fa9b251c43..3a9e657baa2 100644 --- a/src/devices/cpu/mcs96/i8xc196.cpp +++ b/src/devices/cpu/mcs96/i8xc196.cpp @@ -25,6 +25,8 @@ std::unique_ptr<util::disasm_interface> i8xc196_device::create_disassembler() void i8xc196_device::internal_regs(address_map &map) { map(0x00, 0x01).lr16("r0", []() -> u16 { return 0; }).nopw(); + map(0x08, 0x08).rw(FUNC(i8xc196_device::int_mask_r), FUNC(i8xc196_device::int_mask_w)); + map(0x09, 0x09).rw(FUNC(i8xc196_device::int_pending_r), FUNC(i8xc196_device::int_pending_w)); map(0x18, 0xff).ram().share("register_file"); } diff --git a/src/devices/cpu/mcs96/mcs96.cpp b/src/devices/cpu/mcs96/mcs96.cpp index a6f5ecd9638..877fff833bd 100644 --- a/src/devices/cpu/mcs96/mcs96.cpp +++ b/src/devices/cpu/mcs96/mcs96.cpp @@ -42,7 +42,20 @@ void mcs96_device::device_start() state_add(STATE_GENFLAGS, "GENFLAGS", PSW).formatstr("%16s").noshow(); state_add(MCS96_PC, "PC", PC); state_add(MCS96_PSW, "PSW", PSW); - state_add(MCS96_R, "SP", register_file[0]); + state_add(MCS96_INT_PENDING, "INT_PENDING", pending_irq); + state_add(MCS96_SP, "SP", register_file[0]); + state_add(MCS96_AX, "AX", register_file[2]); + state_add(MCS96_DX, "DX", register_file[3]); + state_add(MCS96_BX, "BX", register_file[4]); + state_add(MCS96_CX, "CX", register_file[5]); + state_add(MCS96_AL, "AL", reinterpret_cast<u8 *>(®ister_file[2])[BYTE_XOR_LE(0)]).noshow(); + state_add(MCS96_AH, "AH", reinterpret_cast<u8 *>(®ister_file[2])[BYTE_XOR_LE(1)]).noshow(); + state_add(MCS96_DL, "DL", reinterpret_cast<u8 *>(®ister_file[3])[BYTE_XOR_LE(0)]).noshow(); + state_add(MCS96_DH, "DH", reinterpret_cast<u8 *>(®ister_file[3])[BYTE_XOR_LE(1)]).noshow(); + state_add(MCS96_BL, "BL", reinterpret_cast<u8 *>(®ister_file[4])[BYTE_XOR_LE(0)]).noshow(); + state_add(MCS96_BH, "BH", reinterpret_cast<u8 *>(®ister_file[4])[BYTE_XOR_LE(1)]).noshow(); + state_add(MCS96_CL, "CL", reinterpret_cast<u8 *>(®ister_file[5])[BYTE_XOR_LE(0)]).noshow(); + state_add(MCS96_CH, "CH", reinterpret_cast<u8 *>(®ister_file[5])[BYTE_XOR_LE(1)]).noshow(); } void mcs96_device::device_reset() @@ -84,6 +97,28 @@ void mcs96_device::check_irq() irq_requested = (PSW & pending_irq) && (PSW & F_I); } +void mcs96_device::int_mask_w(u8 data) +{ + PSW = (PSW & 0xff00) | data; + check_irq(); +} + +u8 mcs96_device::int_mask_r() +{ + return PSW; +} + +void mcs96_device::int_pending_w(u8 data) +{ + pending_irq = data; + check_irq(); +} + +u8 mcs96_device::int_pending_r() +{ + return pending_irq; +} + void mcs96_device::execute_run() { internal_update(total_cycles()); diff --git a/src/devices/cpu/mcs96/mcs96.h b/src/devices/cpu/mcs96/mcs96.h index aeac4c2d82d..52700c1c03a 100644 --- a/src/devices/cpu/mcs96/mcs96.h +++ b/src/devices/cpu/mcs96/mcs96.h @@ -22,7 +22,13 @@ public: enum { MCS96_PC = 1, MCS96_PSW, - MCS96_R // 0x74 entries + MCS96_INT_PENDING, + MCS96_SP, + MCS96_AX, MCS96_AL, MCS96_AH, + MCS96_DX, MCS96_DL, MCS96_DH, + MCS96_BX, MCS96_BL, MCS96_BH, + MCS96_CX, MCS96_CL, MCS96_CH, + MCS96_LAST_REG = MCS96_CH }; protected: @@ -87,6 +93,11 @@ protected: void check_irq(); inline uint8_t read_pc() { return m_pr8(PC++); } + void int_mask_w(u8 data); + u8 int_mask_r(); + void int_pending_w(u8 data); + u8 int_pending_r(); + void reg_w8(uint8_t adr, uint8_t data); void reg_w16(uint8_t adr, uint16_t data); void any_w8(uint16_t adr, uint8_t data); |