summaryrefslogtreecommitdiffstatshomepage
diff options
context:
space:
mode:
-rw-r--r--scripts/src/bus.lua2
-rw-r--r--scripts/target/mame/mess.lua1
-rw-r--r--src/devices/bus/vme/vme_cp31.cpp318
-rw-r--r--src/devices/bus/vme/vme_cp31.h70
-rw-r--r--src/mame/drivers/besta.cpp164
-rw-r--r--src/mame/drivers/miniforce.cpp2
-rw-r--r--src/mame/mame.lst3
-rw-r--r--src/mame/mess.flt1
8 files changed, 392 insertions, 169 deletions
diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua
index b2b59336d1a..385312f48f1 100644
--- a/scripts/src/bus.lua
+++ b/scripts/src/bus.lua
@@ -2382,6 +2382,8 @@ if (BUSES["VME"]~=null) then
files {
MAME_DIR .. "src/devices/bus/vme/vme.cpp",
MAME_DIR .. "src/devices/bus/vme/vme.h",
+ MAME_DIR .. "src/devices/bus/vme/vme_cp31.cpp",
+ MAME_DIR .. "src/devices/bus/vme/vme_cp31.h",
MAME_DIR .. "src/devices/bus/vme/vme_mzr8300.cpp",
MAME_DIR .. "src/devices/bus/vme/vme_mzr8300.h",
MAME_DIR .. "src/devices/bus/vme/vme_mvme120.cpp",
diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua
index e7a4e71e41a..09246a3a806 100644
--- a/scripts/target/mame/mess.lua
+++ b/scripts/target/mame/mess.lua
@@ -4532,7 +4532,6 @@ files {
MAME_DIR .. "src/mame/machine/basf7100_kbd.h",
MAME_DIR .. "src/mame/drivers/binbug.cpp",
MAME_DIR .. "src/mame/drivers/bert.cpp",
- MAME_DIR .. "src/mame/drivers/besta.cpp",
MAME_DIR .. "src/mame/drivers/bitgraph.cpp",
MAME_DIR .. "src/mame/drivers/blit.cpp",
MAME_DIR .. "src/mame/drivers/bpmmicro.cpp",
diff --git a/src/devices/bus/vme/vme_cp31.cpp b/src/devices/bus/vme/vme_cp31.cpp
new file mode 100644
index 00000000000..7c4659d2bdd
--- /dev/null
+++ b/src/devices/bus/vme/vme_cp31.cpp
@@ -0,0 +1,318 @@
+// license:BSD-3-Clause
+// copyright-holders:Sergey Svishchev
+
+/*
+ * Besta CP31 board, possibly a customized version of Force CPU30.
+ *
+ * Supported by SysV R3 "Bestix" port and also by Linux port,
+ * see https://github.com/shattered/linux-m68k
+ *
+ * Chips:
+ *
+ * 68030 @ 25 MHz - CPU
+ * 68882 @ 25 MHz - FPU
+ * 68561 - MPCC (serial port)
+ * 68230 - PI/T (parallel interface and timer)
+ * 68153 - BIM (interrupt router)
+ * 62421 - RTC
+ *
+ * To do:
+ *
+ * - pass functional test
+ * - boot to multiuser (SysV and Linux) (requires ISCSI-1)
+ *
+ */
+
+#include "emu.h"
+
+#include "vme_cp31.h"
+
+
+//#define LOG_GENERAL (1U << 0)
+#define LOG_SETUP (1U << 1)
+#define LOG_INT (1U << 2)
+
+//#define VERBOSE (LOG_GENERAL | LOG_SETUP | LOG_INT)
+//#define LOG_OUTPUT_FUNC printf
+
+#include "logmacro.h"
+
+#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
+#define LOGINT(...) LOGMASKED(LOG_INT, __VA_ARGS__)
+
+
+#ifdef _MSC_VER
+#define FUNCNAME __func__
+#else
+#define FUNCNAME __PRETTY_FUNCTION__
+#endif
+
+
+#define CLOCK50 XTAL(50'000'000) /* HCJ */
+#define CLOCK40 XTAL(40'000'000) /* HCJ */
+#define CLOCK32 XTAL(32'000'000) /* HCJ */
+
+#define RS232P1_TAG "rs232p1"
+
+
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
+
+DEFINE_DEVICE_TYPE(VME_CP31, vme_cp31_card_device, "cp31", "Besta CP31 CPU board")
+
+void vme_cp31_card_device::cp31_mem(address_map &map)
+{
+ map.unmap_value_high();
+ map(0x00000000, 0x001fffff).ram().share("dram"); // local bus DRAM, 4 MB
+// map(0x08010000, 0x08011fff).ram(); // unknown -- accessed by cp31dssp
+// map(0xfca03500, 0xfca0350f).unmaprw(); // ISCSI-1 board on VME bus
+ map(0xff000000, 0xff03ffff).rom().region("user1", 0);
+ map(0xff040000, 0xff07ffff).ram(); // onboard SRAM
+ map(0xff800000, 0xff80001f).rw(m_mpcc, FUNC(mpcc68561_device::read), FUNC(mpcc68561_device::write));
+ map(0xff800200, 0xff8003ff).rw(m_pit2, FUNC(pit68230_device::read), FUNC(pit68230_device::write));
+ map(0xff800800, 0xff80080f).rw(m_bim, FUNC(bim68153_device::read), FUNC(bim68153_device::write)).umask32(0xff00ff00);
+ map(0xff800a00, 0xff800a1f).rw(m_rtc, FUNC(rtc62421_device::read), FUNC(rtc62421_device::write));
+ map(0xff800c00, 0xff800dff).rw(m_pit1, FUNC(pit68230_device::read), FUNC(pit68230_device::write));
+// map(0xff800400, 0xff800xxx) // TIC? -- shows up in cp31dssp log
+// map(0xff800e00, 0xff800xxx) // PIT3?
+}
+
+static DEVICE_INPUT_DEFAULTS_START( terminal )
+ DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_9600 )
+ DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_9600 )
+ DEVICE_INPUT_DEFAULTS( "RS232_DATABITS", 0xff, RS232_DATABITS_8 )
+ DEVICE_INPUT_DEFAULTS( "RS232_PARITY", 0xff, RS232_PARITY_NONE )
+ DEVICE_INPUT_DEFAULTS( "RS232_STOPBITS", 0xff, RS232_STOPBITS_1 )
+DEVICE_INPUT_DEFAULTS_END
+
+// FIXME unverified
+static INPUT_PORTS_START(cp31)
+ PORT_START("SA1")
+ PORT_DIPNAME(0x01, 0x00, "Clear macros on reset")
+ PORT_DIPSETTING(0x00, "On")
+ PORT_DIPSETTING(0x01, "Off")
+ PORT_DIPNAME(0x02, 0x00, "VME bus width")
+ PORT_DIPSETTING(0x00, "16 bits")
+ PORT_DIPSETTING(0x02, "32 bits")
+ PORT_DIPNAME(0x0c, 0x0c, "Boot into...")
+ PORT_DIPSETTING(0x00, "UNIX")
+ PORT_DIPSETTING(0x0c, "Monitor")
+ PORT_DIPNAME(0x10, 0x10, "Console port setup")
+ PORT_DIPSETTING(0x00, "Custom")
+ PORT_DIPSETTING(0x10, "Standard")
+ PORT_DIPNAME(0x20, 0x20, "Console port bits")
+ PORT_DIPSETTING(0x00, "7N1")
+ PORT_DIPSETTING(0x20, "8N2")
+ PORT_DIPNAME(0xc0, 0xc0, "Console port speed")
+ PORT_DIPSETTING(0xc0, "9600")
+ PORT_DIPSETTING(0x80, "4800")
+ PORT_DIPSETTING(0x40, "2400")
+ PORT_DIPSETTING(0x00, "1200")
+INPUT_PORTS_END
+
+ROM_START(cp31)
+ ROM_REGION32_BE(0x40000, "user1", ROMREGION_ERASEFF)
+
+ ROM_DEFAULT_BIOS("cp31dssp")
+ ROM_SYSTEM_BIOS(0, "cp31dbg", "CP31 Debug")
+ ROMX_LOAD( "cp31dbgboot.27c512", 0x0000, 0x10000, CRC(9bf057de) SHA1(b13cb16042e4c6ca63ae26058a78259c0849d0b6), ROM_BIOS(0))
+ ROM_SYSTEM_BIOS(1, "cp31dssp", "CP31 DSSP")
+ ROMX_LOAD( "cp31dsspboot.27c512", 0x0000, 0x10000, CRC(607a0a55) SHA1(c257a88672ab39d2f3fad681d22e062182b0236d), ROM_BIOS(1))
+ ROM_SYSTEM_BIOS(2, "cp31os9", "CP31 OS9")
+ ROMX_LOAD( "cp31os9.27c512", 0x0000, 0x10000, CRC(607a0a55) SHA1(c257a88672ab39d2f3fad681d22e062182b0236d), ROM_BIOS(2))
+ROM_END
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+const tiny_rom_entry *vme_cp31_card_device::device_rom_region() const
+{
+ return ROM_NAME(cp31);
+}
+
+//-------------------------------------------------
+// input_ports - device-specific input ports
+//-------------------------------------------------
+
+ioport_constructor vme_cp31_card_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME(cp31);
+}
+
+
+void vme_cp31_card_device::cpu_space_map(address_map &map)
+{
+ map(0xfffffff2, 0xffffffff).lr16(NAME([this](offs_t offset) -> u16 { return m_bim->iack(offset+1); }));
+}
+
+
+//-------------------------------------------------
+// device_add_mconfig - add device configuration
+//-------------------------------------------------
+
+void vme_cp31_card_device::device_add_mconfig(machine_config &config)
+{
+ M68030(config, m_maincpu, CLOCK50 / 2);
+ m_maincpu->set_addrmap(AS_PROGRAM, &vme_cp31_card_device::cp31_mem);
+ m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &vme_cp31_card_device::cpu_space_map);
+
+ MC68153(config, m_bim, CLOCK32 / 8);
+ m_bim->out_int_callback().set(FUNC(vme_cp31_card_device::bim_irq_callback));
+
+ MPCC68561(config, m_mpcc, 1392000, 0, 0); // FIXME: XTAL unknown
+ m_mpcc->out_txd_cb().set(RS232P1_TAG, FUNC(rs232_port_device::write_txd));
+ m_mpcc->out_dtr_cb().set(RS232P1_TAG, FUNC(rs232_port_device::write_dtr));
+ m_mpcc->out_rts_cb().set(RS232P1_TAG, FUNC(rs232_port_device::write_rts));
+ m_mpcc->out_int_cb().set(m_bim, FUNC(bim68153_device::int1_w));
+
+ rs232_port_device &rs232p1(RS232_PORT(config, RS232P1_TAG, default_rs232_devices, "terminal"));
+ rs232p1.rxd_handler().set(m_mpcc, FUNC(mpcc68561_device::write_rx));
+ rs232p1.cts_handler().set(m_mpcc, FUNC(mpcc68561_device::cts_w));
+ rs232p1.set_option_device_input_defaults("terminal", DEVICE_INPUT_DEFAULTS_NAME(terminal));
+
+ RTC62421(config, m_rtc, 32.768_kHz_XTAL);
+ m_rtc->out_int_handler().set(m_pit1, FUNC(pit68230_device::h2_w));
+
+ // H1 is SYSFAIL and H3 is ACFAIL
+ PIT68230(config, m_pit1, 8064000); // via c33_txt
+ m_pit1->pa_in_callback().set_ioport("SA1");
+ m_pit1->pb_out_callback().set(*this, FUNC(vme_cp31_card_device::pit1_pb_w));
+ m_pit1->pc_in_callback().set(*this, FUNC(vme_cp31_card_device::pit1_pc_r));
+// m_pit1->pc_out_callback().set(*this, FUNC(vme_cp31_card_device::pit1_pc_w));
+ m_pit1->timer_irq_callback().set(m_bim, FUNC(bim68153_device::int2_w));
+ m_pit1->port_irq_callback().set(m_bim, FUNC(bim68153_device::int3_w));
+
+ PIT68230(config, m_pit2, 8064000); // via c33_txt
+ m_pit2->port_irq_callback().set(m_pit1, FUNC(pit68230_device::h4_w));
+}
+
+uint32_t vme_cp31_card_device::trap_r(offs_t offset, uint32_t mem_mask)
+{
+ if (!machine().side_effects_disabled()) set_bus_error((offset << 2), true, mem_mask);
+
+ return 0xffffffff;
+}
+
+WRITE_LINE_MEMBER(vme_cp31_card_device::bim_irq_callback)
+{
+ LOGINT("%s(%02x)\n", FUNCNAME, state);
+
+ bim_irq_state = state;
+ bim_irq_level = m_bim->get_irq_level();
+ LOGINT(" - BIM irq level %s\n", bim_irq_level == CLEAR_LINE ? "Cleared" : "Asserted");
+ update_irq_to_maincpu();
+}
+
+// TODO: IRQ masking
+void vme_cp31_card_device::update_irq_to_maincpu()
+{
+ LOGINT("%s()\n", FUNCNAME);
+ LOGINT(" - bim_irq_level: %02x\n", bim_irq_level);
+ LOGINT(" - bim_irq_state: %02x\n", bim_irq_state);
+ switch (bim_irq_level & 0x07)
+ {
+ case 1: m_maincpu->set_input_line(M68K_IRQ_1, bim_irq_state); break;
+ case 2: m_maincpu->set_input_line(M68K_IRQ_2, bim_irq_state); break;
+ case 3: m_maincpu->set_input_line(M68K_IRQ_3, bim_irq_state); break;
+ case 4: m_maincpu->set_input_line(M68K_IRQ_4, bim_irq_state); break;
+ case 5: m_maincpu->set_input_line(M68K_IRQ_5, bim_irq_state); break;
+ case 6: m_maincpu->set_input_line(M68K_IRQ_6, bim_irq_state); break;
+ case 7: m_maincpu->set_input_line(M68K_IRQ_7, bim_irq_state); break;
+ default: logerror("Programmatic error in %s, please report\n", FUNCNAME);
+ }
+}
+
+
+void vme_cp31_card_device::trap_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ LOG("%s(%08x,%08X)\n", FUNCNAME, offset << 2, data);
+ if (!machine().side_effects_disabled()) set_bus_error((offset << 2), false, mem_mask);
+}
+
+// PC4 - IRQ7 state, PC6 - FPCP SENSE (0 = FPCP installed)
+uint8_t vme_cp31_card_device::pit1_pc_r()
+{
+ uint8_t data = 0;
+
+ LOG("%s(%02X)\n", FUNCNAME, data);
+
+ return data;
+}
+
+// IRQ masking
+void vme_cp31_card_device::pit1_pb_w(uint8_t data)
+{
+ LOG("%s(%02X)\n", FUNCNAME, data);
+}
+
+void vme_cp31_card_device::set_bus_error(uint32_t address, bool rw, uint32_t mem_mask)
+{
+ if (m_bus_error)
+ {
+ return;
+ }
+ LOG("bus error at %08x & %08x (%s)\n", address, mem_mask, rw ? "read" : "write");
+ if (!ACCESSING_BITS_16_31)
+ {
+ address++;
+ }
+ m_bus_error = true;
+ m_maincpu->set_buserror_details(address, rw, m_maincpu->get_fc());
+ m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
+ m_bus_error_timer->adjust(m_maincpu->cycles_to_attotime(16)); // let rmw cycles complete
+}
+
+vme_cp31_card_device::vme_cp31_card_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+ : device_t(mconfig, type, tag, owner, clock)
+ , device_vme_card_interface(mconfig, *this)
+ , m_maincpu(*this, "maincpu")
+ , m_bim(*this, "bim")
+ , m_mpcc(*this, "mpcc")
+ , m_rtc(*this, "rtc")
+ , m_pit1(*this, "pit1")
+ , m_pit2(*this, "pit2")
+ , m_p_ram(*this, "dram")
+ , m_sysrom(*this, "user1")
+{
+ m_slot = 1;
+}
+
+//
+
+vme_cp31_card_device::vme_cp31_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : vme_cp31_card_device(mconfig, VME_CP31, tag, owner, clock)
+{
+}
+
+void vme_cp31_card_device::device_start()
+{
+ m_bus_error_timer = timer_alloc(0);
+}
+
+void vme_cp31_card_device::device_reset()
+{
+ address_space &program = m_maincpu->space(AS_PROGRAM);
+
+ program.install_rom(0x00000000, 0x00000007, m_sysrom); // do it here for F3
+ m_rom_shadow_tap = program.install_read_tap(0xff000000, 0xff007fff, "rom_shadow_r", [this](offs_t offset, u32 &data, u32 mem_mask)
+ {
+ if (!machine().side_effects_disabled())
+ {
+ // delete this tap
+ m_rom_shadow_tap->remove();
+
+ // reinstall ram over the rom shadow
+ m_maincpu->space(AS_PROGRAM).install_ram(0x00000000, 0x00000007, m_p_ram);
+ }
+
+ // return the original data
+ return data;
+ });
+}
+
+void vme_cp31_card_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
+{
+ m_bus_error = false;
+}
diff --git a/src/devices/bus/vme/vme_cp31.h b/src/devices/bus/vme/vme_cp31.h
new file mode 100644
index 00000000000..f3ca8898d78
--- /dev/null
+++ b/src/devices/bus/vme/vme_cp31.h
@@ -0,0 +1,70 @@
+// license:BSD-3-Clause
+// copyright-holders:Sergey Svishchev
+#ifndef MAME_BUS_VME_VME_CP31_H
+#define MAME_BUS_VME_VME_CP31_H
+
+#pragma once
+
+#include "bus/rs232/rs232.h"
+#include "bus/vme/vme.h"
+#include "cpu/m68000/m68000.h"
+#include "machine/68153bim.h"
+#include "machine/68230pit.h"
+#include "machine/68561mpcc.h"
+#include "machine/clock.h"
+#include "machine/msm6242.h"
+
+DECLARE_DEVICE_TYPE(VME_CP31, vme_cp31_card_device)
+
+class vme_cp31_card_device : public device_t, public device_vme_card_interface
+{
+public:
+ vme_cp31_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+ vme_cp31_card_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
+ // optional information overrides
+ virtual void device_add_mconfig(machine_config &config) override;
+ virtual const tiny_rom_entry *device_rom_region() const override;
+ virtual ioport_constructor device_input_ports() const override;
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
+
+private:
+ required_device<m68000_base_device> m_maincpu;
+ required_device<bim68153_device> m_bim;
+ required_device<mpcc68561_device> m_mpcc;
+ required_device<rtc62421_device> m_rtc;
+ required_device<pit68230_device> m_pit1;
+ required_device<pit68230_device> m_pit2;
+ required_shared_ptr<uint32_t> m_p_ram;
+ required_region_ptr<uint32_t> m_sysrom;
+
+ // Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
+ memory_passthrough_handler *m_rom_shadow_tap;
+ bool m_bus_error;
+ emu_timer *m_bus_error_timer;
+
+ uint8_t bim_irq_state;
+ int bim_irq_level;
+
+ DECLARE_WRITE_LINE_MEMBER(bim_irq_callback);
+ void update_irq_to_maincpu();
+
+ void pit1_pb_w(uint8_t data);
+ uint8_t pit1_pc_r();
+ void pit1_pc_w(uint8_t data);
+
+ uint32_t trap_r(offs_t offset, uint32_t mem_mask);
+ void trap_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+
+ void set_bus_error(uint32_t address, bool write, uint32_t mem_mask);
+
+ void cp31_mem(address_map &map);
+ void cpu_space_map(address_map &map);
+};
+
+#endif // MAME_BUS_VME_VME_CP31_H
diff --git a/src/mame/drivers/besta.cpp b/src/mame/drivers/besta.cpp
deleted file mode 100644
index 29d5158b678..00000000000
--- a/src/mame/drivers/besta.cpp
+++ /dev/null
@@ -1,164 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Sergey Svishchev
-/***************************************************************************
-
- Besta-88 and Besta-90 engineering workstations.
-
- Derived (OEMd?) from Force Computers' SYS68K series.
-
-****************************************************************************/
-
-#include "emu.h"
-#include "cpu/m68000/m68000.h"
-#include "machine/68230pit.h"
-#include "machine/terminal.h"
-
-
-namespace {
-
-class besta_state : public driver_device
-{
-public:
- besta_state(const machine_config &mconfig, device_type type, const char *tag)
- : driver_device(mconfig, type, tag)
- , m_maincpu(*this, "maincpu")
- , m_pit1 (*this, "pit1")
- , m_pit2 (*this, "pit2")
- , m_terminal(*this, "terminal")
- , m_p_ram(*this, "p_ram")
- { }
-
- void besta(machine_config &config);
-
-protected:
- virtual void machine_start() override;
- virtual void machine_reset() override;
-
-private:
- void besta_mem(address_map &map);
- uint8_t mpcc_reg_r(offs_t offset);
- void mpcc_reg_w(offs_t offset, uint8_t data);
- void kbd_put(u8 data);
-
- uint8_t m_term_data;
- uint8_t m_mpcc_regs[32];
-
- required_device<cpu_device> m_maincpu;
- required_device<pit68230_device> m_pit1;
- required_device<pit68230_device> m_pit2;
-
- required_device<generic_terminal_device> m_terminal;
- required_shared_ptr<uint32_t> m_p_ram;
-};
-
-uint8_t besta_state::mpcc_reg_r(offs_t offset)
-{
- uint8_t ret;
-
- switch (offset) {
- case 0: /* r_stat aka ... */
- return (m_term_data) ? 0x80 : 0;
- case 2: /* r_data aka ... */
- ret = m_term_data;
- m_term_data = 0;
- return ret;
- default:
- return m_mpcc_regs[offset];
- }
-}
-
-void besta_state::mpcc_reg_w(offs_t offset, uint8_t data)
-{
- switch (offset) {
- case 2:
- kbd_put(data);
- break;
- case 10:
- m_terminal->write(data);
- [[fallthrough]]; // FIXME: really?
- default:
- m_mpcc_regs[offset] = data;
- break;
- }
-}
-
-void besta_state::kbd_put(u8 data)
-{
- m_term_data = data;
-}
-
-void besta_state::besta_mem(address_map &map)
-{
- map(0x00000000, 0x001fffff).ram().share("p_ram"); // local bus DRAM, 4MB
-// map(0x08010000, 0x08011fff).ram(); // unknown -- accessed by cp31dssp
-// map(0xfca03500, 0xfca0350f).rw(FUNC(besta_state::iscsi_reg_r), FUNC(besta_state::iscsi_reg_w));
- map(0xff000000, 0xff00ffff).rom().region("user1", 0); // actual mapping is up to 0xff03ffff
- map(0xff040000, 0xff07ffff).ram(); // onboard SRAM
-// map(0xff800000, 0xff80001f).rw("mpcc", FUNC(mpcc68561_t::reg_r), FUNC(mpcc68561_t::reg_w));
- map(0xff800000, 0xff80001f).rw(FUNC(besta_state::mpcc_reg_r), FUNC(besta_state::mpcc_reg_w)); // console
- map(0xff800200, 0xff800237).rw(m_pit2, FUNC(pit68230_device::read), FUNC(pit68230_device::write));
-// map(0xff800400, 0xff800xxx) // ??? -- shows up in cp31dssp log
-// map(0xff800800, 0xff800xxx) // 68153 BIM
-// map(0xff800a00, 0xff800xxx) // 62421 RTC
- map(0xff800c00, 0xff800c37).rw(m_pit1, FUNC(pit68230_device::read), FUNC(pit68230_device::write));
-// map(0xff800e00, 0xff800xxx) // PIT3?
-}
-
-/* Input ports */
-static INPUT_PORTS_START( besta )
-INPUT_PORTS_END
-
-void besta_state::machine_start()
-{
- m_term_data = 0;
-
- save_item(NAME(m_term_data));
- save_item(NAME(m_mpcc_regs));
-}
-
-void besta_state::machine_reset()
-{
- uint8_t* user1 = memregion("user1")->base();
-
- memcpy((uint8_t*)m_p_ram.target(),user1,0x10000); // not really what happens but...
- memset(m_mpcc_regs, 0, sizeof(m_mpcc_regs)); // should initialize to defined values
- m_mpcc_regs[8] = 0x80; // always ready to transmit
-
- m_maincpu->reset();
-}
-
-/* CP31 processor board */
-void besta_state::besta(machine_config &config)
-{
- /* basic machine hardware */
- M68030(config, m_maincpu, 2*16670000);
- m_maincpu->set_addrmap(AS_PROGRAM, &besta_state::besta_mem);
-
- PIT68230(config, m_pit1, 16670000 / 2); // XXX verify clock
-
- PIT68230(config, m_pit2, 16670000 / 2); // XXX verify clock
-
- GENERIC_TERMINAL(config, m_terminal, 0);
- m_terminal->set_keyboard_callback(FUNC(besta_state::kbd_put));
-}
-
-/* ROM definition */
-
-ROM_START( besta88 )
- ROM_REGION32_BE( 0x10000, "user1", ROMREGION_ERASEFF )
-
- ROM_SYSTEM_BIOS(0, "cp31dbg", "CP31 Debug")
- ROMX_LOAD( "cp31dbgboot.27c512", 0x0000, 0x10000, CRC(9bf057de) SHA1(b13cb16042e4c6ca63ae26058a78259c0849d0b6), ROM_BIOS(0))
- ROM_SYSTEM_BIOS(1, "cp31dssp", "CP31 DSSP")
- ROMX_LOAD( "cp31dsspboot.27c512", 0x0000, 0x10000, CRC(607a0a55) SHA1(c257a88672ab39d2f3fad681d22e062182b0236d), ROM_BIOS(1))
- ROM_SYSTEM_BIOS(2, "cp31os9", "CP31 OS9")
- ROMX_LOAD( "cp31os9.27c512", 0x0000, 0x10000, CRC(607a0a55) SHA1(c257a88672ab39d2f3fad681d22e062182b0236d), ROM_BIOS(2))
-ROM_END
-
-} // Anonymous namespace
-
-
-/* Driver */
-
-// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
-COMP( 1988, besta88, 0, 0, besta, besta, besta_state, empty_init, "Sapsan", "Besta-88", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW )
diff --git a/src/mame/drivers/miniforce.cpp b/src/mame/drivers/miniforce.cpp
index 2c8c6d5ad8e..8c2283a2a11 100644
--- a/src/mame/drivers/miniforce.cpp
+++ b/src/mame/drivers/miniforce.cpp
@@ -97,6 +97,7 @@
*/
#include "emu.h"
#include "bus/vme/vme.h"
+#include "bus/vme/vme_cp31.h"
#include "bus/vme/vme_fccpu20.h"
#include "bus/vme/vme_fcisio.h"
#include "bus/vme/vme_fcscsi.h"
@@ -173,6 +174,7 @@ INPUT_PORTS_END
static void miniforce_vme_cards(device_slot_interface &device)
{
+ device.option_add("cp31", VME_CP31);
device.option_add("fccpu21", VME_FCCPU21);
device.option_add("fcisio", VME_FCISIO1);
device.option_add("fcscsi", VME_FCSCSI1);
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index 9d5a662c3ee..04a0075ddc2 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -3486,9 +3486,6 @@ berzerks // (c) 1980 Sonic license(Spanish speech)
frenzy // (c) 1982
moonwarp // (c) 1982 - prototype
-@source:besta.cpp
-besta88 //
-
@source:bestleag.cpp
bestleag // bootleg, by Playmark?
bestleaw // bootleg
diff --git a/src/mame/mess.flt b/src/mame/mess.flt
index d922d0119fa..31cec02f629 100644
--- a/src/mame/mess.flt
+++ b/src/mame/mess.flt
@@ -117,7 +117,6 @@ bbcbc.cpp
bcs3.cpp
bebox.cpp
bert.cpp
-besta.cpp
beta.cpp
betacam.cpp
bigbord2.cpp