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author Aaron Giles <aaron@aarongiles.com>2008-01-29 19:35:27 +0000
committer Aaron Giles <aaron@aarongiles.com>2008-01-29 19:35:27 +0000
commitdbf80b011ccb7d43ff75bf4f8cae982c71e94559 (patch)
tree967c01b641edd700e16cfc61555d053afb250b64 /src/emu
parentacd05b666f71a59aaec51e314a1d9d0182e73f8c (diff)
Removed distinction between *_gettotalcycles() and *_gettotalcycles64().
All functions now return 64-bit results. Updated all call sites appropriately.
Diffstat (limited to 'src/emu')
-rw-r--r--src/emu/cpu/e132xs/e132xs.c8
-rw-r--r--src/emu/cpu/mips/mdrc64.c10
-rw-r--r--src/emu/cpu/mips/mdrcold.c4
-rw-r--r--src/emu/cpu/mips/mips3.c6
-rw-r--r--src/emu/cpu/mips/mips3com.c10
-rw-r--r--src/emu/cpu/sh2/sh2.c4
-rw-r--r--src/emu/cpuexec.c37
-rw-r--r--src/emu/cpuexec.h6
8 files changed, 25 insertions, 60 deletions
diff --git a/src/emu/cpu/e132xs/e132xs.c b/src/emu/cpu/e132xs/e132xs.c
index 09e403a4341..3aae28b34e2 100644
--- a/src/emu/cpu/e132xs/e132xs.c
+++ b/src/emu/cpu/e132xs/e132xs.c
@@ -603,7 +603,7 @@ static void hyperstone_set_trap_entry(int which)
static UINT32 compute_tr(void)
{
- UINT64 cycles_since_base = activecpu_gettotalcycles64() - hyperstone.tr_base_cycles;
+ UINT64 cycles_since_base = activecpu_gettotalcycles() - hyperstone.tr_base_cycles;
UINT64 clocks_since_base = cycles_since_base >> hyperstone.clock_scale;
return hyperstone.tr_base_value + (clocks_since_base / hyperstone.tr_clocks_per_tick);
}
@@ -619,12 +619,12 @@ static void update_timer_prescale(void)
hyperstone.clock_cycles_6 = 6 << hyperstone.clock_scale;
hyperstone.tr_clocks_per_tick = ((TPR >> 16) & 0xff) + 2;
hyperstone.tr_base_value = prevtr;
- hyperstone.tr_base_cycles = activecpu_gettotalcycles64();
+ hyperstone.tr_base_cycles = activecpu_gettotalcycles();
}
static void adjust_timer_interrupt(void)
{
- UINT64 cycles_since_base = activecpu_gettotalcycles64() - hyperstone.tr_base_cycles;
+ UINT64 cycles_since_base = activecpu_gettotalcycles() - hyperstone.tr_base_cycles;
UINT64 clocks_since_base = cycles_since_base >> hyperstone.clock_scale;
UINT64 cycles_until_next_clock = cycles_since_base - (clocks_since_base << hyperstone.clock_scale);
int cpunum = cpu_getactivecpu();
@@ -799,7 +799,7 @@ INLINE void set_global_register(UINT8 code, UINT32 val)
*/
case TR_REGISTER:
hyperstone.tr_base_value = val;
- hyperstone.tr_base_cycles = activecpu_gettotalcycles64();
+ hyperstone.tr_base_cycles = activecpu_gettotalcycles();
adjust_timer_interrupt();
break;
diff --git a/src/emu/cpu/mips/mdrc64.c b/src/emu/cpu/mips/mdrc64.c
index a6200a3d324..60419808e95 100644
--- a/src/emu/cpu/mips/mdrc64.c
+++ b/src/emu/cpu/mips/mdrc64.c
@@ -229,7 +229,7 @@ struct _mips3drc_data
UINT32 abs32mask[4];
/* C functions */
- x86code * activecpu_gettotalcycles64;
+ x86code * activecpu_gettotalcycles;
x86code * mips3com_update_cycle_counting;
x86code * mips3com_tlbr;
x86code * mips3com_tlbwi;
@@ -441,7 +441,7 @@ static void mips3drc_init(void)
mips3.drcdata->abs32mask[0] = 0x7fffffff;
/* get pointers to C functions */
- mips3.drcdata->activecpu_gettotalcycles64 = (x86code *)activecpu_gettotalcycles64;
+ mips3.drcdata->activecpu_gettotalcycles = (x86code *)activecpu_gettotalcycles;
mips3.drcdata->mips3com_update_cycle_counting = (x86code *)mips3com_update_cycle_counting;
mips3.drcdata->mips3com_tlbr = (x86code *)mips3com_tlbr;
mips3.drcdata->mips3com_tlbwi = (x86code *)mips3com_tlbwi;
@@ -3049,7 +3049,7 @@ static int compile_set_cop0_reg(drc_core *drc, compiler_state *compiler, const o
case COP0_Count:
emit_flush_cycles_before_instruction(drc, compiler, desc, 1);
emit_mov_m32_r32(DRCTOP, CPR0ADDR(COP0_Count), REG_EAX); // mov [Count],eax
- emit_call_m64(DRCTOP, MDRC(&mips3.drcdata->activecpu_gettotalcycles64)); // call activecpu_gettotalcycles64
+ emit_call_m64(DRCTOP, MDRC(&mips3.drcdata->activecpu_gettotalcycles)); // call activecpu_gettotalcycles
emit_mov_r32_m32(DRCTOP, REG_EDX, CPR0ADDR(COP0_Count)); // mov edx,[Count]
emit_sub_r64_r64(DRCTOP, REG_RAX, REG_RDX); // sub rax,rdx
emit_sub_r64_r64(DRCTOP, REG_RAX, REG_RDX); // sub rax,rdx
@@ -3099,7 +3099,7 @@ static int compile_get_cop0_reg(drc_core *drc, compiler_state *compiler, const o
case COP0_Count:
compiler->cycles += MIPS3_COUNT_READ_CYCLES;
emit_flush_cycles_before_instruction(drc, compiler, desc, MIPS3_COUNT_READ_CYCLES);
- emit_call_m64(DRCTOP, MDRC(&mips3.drcdata->activecpu_gettotalcycles64)); // call activecpu_gettotalcycles64
+ emit_call_m64(DRCTOP, MDRC(&mips3.drcdata->activecpu_gettotalcycles)); // call activecpu_gettotalcycles
emit_sub_r64_m64(DRCTOP, REG_RAX, MDRC(&mips3.core->count_zero_time)); // sub rax,[count_zero_time]
emit_shr_r64_imm(DRCTOP, REG_RAX, 1); // shr rax,1
emit_movsxd_r64_r32(DRCTOP, REG_RAX, REG_EAX); // movsxd rax,eax
@@ -3112,7 +3112,7 @@ static int compile_get_cop0_reg(drc_core *drc, compiler_state *compiler, const o
case COP0_Random:
emit_flush_cycles_before_instruction(drc, compiler, desc, 1);
- emit_call_m64(DRCTOP, MDRC(&mips3.drcdata->activecpu_gettotalcycles64)); // call activecpu_gettotalcycles64
+ emit_call_m64(DRCTOP, MDRC(&mips3.drcdata->activecpu_gettotalcycles)); // call activecpu_gettotalcycles
emit_mov_r32_m32(DRCTOP, REG_ECX, CPR0ADDR(COP0_Wired)); // mov ecx,[Wired]
emit_mov_r32_imm(DRCTOP, REG_R8D, 48); // mov r8d,48
emit_and_r32_imm(DRCTOP, REG_ECX, 0x3f); // and ecx,0x3f
diff --git a/src/emu/cpu/mips/mdrcold.c b/src/emu/cpu/mips/mdrcold.c
index e5b635c2e81..2b70d7f86be 100644
--- a/src/emu/cpu/mips/mdrcold.c
+++ b/src/emu/cpu/mips/mdrcold.c
@@ -3594,7 +3594,7 @@ static UINT32 recompile_set_cop0_reg(drc_core *drc, UINT8 reg)
emit_mov_m32_r32(DRCTOP, ICOUNTADDR, REG_EBP); // mov [icount],ebp
emit_sub_r32_imm(DRCTOP, REG_ESP, 8); // sub esp,8
emit_push_r32(DRCTOP, REG_EAX); // push eax
- emit_call(DRCTOP, (x86code *)activecpu_gettotalcycles64); // call activecpu_gettotalcycles64
+ emit_call(DRCTOP, (x86code *)activecpu_gettotalcycles); // call activecpu_gettotalcycles
emit_pop_r32(DRCTOP, REG_EBX); // pop ebx
emit_add_r32_imm(DRCTOP, REG_ESP, 8); // add esp,8
emit_sub_r32_r32(DRCTOP, REG_EAX, REG_EBX); // sub eax,ebx
@@ -3647,7 +3647,7 @@ static UINT32 recompile_get_cop0_reg(drc_core *drc, UINT8 reg)
resolve_link(DRCTOP, &link1); // notneg:
emit_mov_m32_r32(DRCTOP, ICOUNTADDR, REG_EBP); // mov [icount],ebp
emit_sub_r32_imm(DRCTOP, REG_ESP, 12); // sub esp,12
- emit_call(DRCTOP, (x86code *)activecpu_gettotalcycles64); // call activecpu_gettotalcycles64
+ emit_call(DRCTOP, (x86code *)activecpu_gettotalcycles); // call activecpu_gettotalcycles
emit_add_r32_imm(DRCTOP, REG_ESP, 12); // add esp,12
emit_sub_r32_m32(DRCTOP, REG_EAX, MABS(LO(&mips3.core->count_zero_time))); // sub eax,[mips3.core->count_zero_time+0]
emit_sbb_r32_m32(DRCTOP, REG_EDX, MABS(HI(&mips3.core->count_zero_time))); // sbb edx,[mips3.core->count_zero_time+4]
diff --git a/src/emu/cpu/mips/mips3.c b/src/emu/cpu/mips/mips3.c
index 18ed34b9e84..cf978c63e7f 100644
--- a/src/emu/cpu/mips/mips3.c
+++ b/src/emu/cpu/mips/mips3.c
@@ -479,7 +479,7 @@ INLINE UINT64 get_cop0_reg(int idx)
mips3.core.icount -= MIPS3_COUNT_READ_CYCLES;
else
mips3.core.icount = 0;
- return (UINT32)((activecpu_gettotalcycles64() - mips3.core.count_zero_time) / 2);
+ return (UINT32)((activecpu_gettotalcycles() - mips3.core.count_zero_time) / 2);
}
else if (idx == COP0_Cause)
{
@@ -495,7 +495,7 @@ INLINE UINT64 get_cop0_reg(int idx)
int wired = mips3.core.cpr[0][COP0_Wired] & 0x3f;
int range = 48 - wired;
if (range > 0)
- return ((activecpu_gettotalcycles64() - mips3.core.count_zero_time) % range + wired) & 0x3f;
+ return ((activecpu_gettotalcycles() - mips3.core.count_zero_time) % range + wired) & 0x3f;
else
return 47;
}
@@ -535,7 +535,7 @@ INLINE void set_cop0_reg(int idx, UINT64 val)
case COP0_Count:
mips3.core.cpr[0][idx] = val;
- mips3.core.count_zero_time = activecpu_gettotalcycles64() - ((UINT64)(UINT32)val * 2);
+ mips3.core.count_zero_time = activecpu_gettotalcycles() - ((UINT64)(UINT32)val * 2);
mips3com_update_cycle_counting(&mips3.core);
break;
diff --git a/src/emu/cpu/mips/mips3com.c b/src/emu/cpu/mips/mips3com.c
index 7f616251ef2..49a74e2056a 100644
--- a/src/emu/cpu/mips/mips3com.c
+++ b/src/emu/cpu/mips/mips3com.c
@@ -144,7 +144,7 @@ void mips3com_reset(mips3_state *mips)
mips->cpr[0][COP0_Count] = 0;
mips->cpr[0][COP0_Config] = compute_config_register(mips);
mips->cpr[0][COP0_PRId] = compute_prid_register(mips);
- mips->count_zero_time = activecpu_gettotalcycles64();
+ mips->count_zero_time = activecpu_gettotalcycles();
/* recompute the TLB table */
mips3com_recompute_tlb_table(mips);
@@ -181,7 +181,7 @@ void mips3com_update_cycle_counting(mips3_state *mips)
/* modify the timer to go off */
if ((mips->cpr[0][COP0_Status] & SR_IMEX5) && mips->cpr[0][COP0_Compare] != 0xffffffff)
{
- UINT32 count = (activecpu_gettotalcycles64() - mips->count_zero_time) / 2;
+ UINT32 count = (activecpu_gettotalcycles() - mips->count_zero_time) / 2;
UINT32 compare = mips->cpr[0][COP0_Compare];
UINT32 cyclesleft = compare - count;
attotime newtime = ATTOTIME_IN_CYCLES(((INT64)cyclesleft * 2), cpu_getactivecpu());
@@ -362,7 +362,7 @@ void mips3com_tlbwr(mips3_state *mips)
/* "random" is based off of the current cycle counting through the non-wired pages */
if (unwired > 0)
- index = ((activecpu_gettotalcycles64() - mips->count_zero_time) % unwired + wired) & 0x3f;
+ index = ((activecpu_gettotalcycles() - mips->count_zero_time) % unwired + wired) & 0x3f;
/* use the common handler to write to this index */
tlb_write_common(mips, index);
@@ -559,7 +559,7 @@ void mips3com_get_info(mips3_state *mips, UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + MIPS3_SR: info->i = mips->cpr[0][COP0_Status]; break;
case CPUINFO_INT_REGISTER + MIPS3_EPC: info->i = mips->cpr[0][COP0_EPC]; break;
case CPUINFO_INT_REGISTER + MIPS3_CAUSE: info->i = mips->cpr[0][COP0_Cause]; break;
- case CPUINFO_INT_REGISTER + MIPS3_COUNT: info->i = ((activecpu_gettotalcycles64() - mips->count_zero_time) / 2); break;
+ case CPUINFO_INT_REGISTER + MIPS3_COUNT: info->i = ((activecpu_gettotalcycles() - mips->count_zero_time) / 2); break;
case CPUINFO_INT_REGISTER + MIPS3_COMPARE: info->i = mips->cpr[0][COP0_Compare]; break;
case CPUINFO_INT_REGISTER + MIPS3_INDEX: info->i = mips->cpr[0][COP0_Index]; break;
case CPUINFO_INT_REGISTER + MIPS3_RANDOM: info->i = mips->cpr[0][COP0_Random]; break;
@@ -631,7 +631,7 @@ void mips3com_get_info(mips3_state *mips, UINT32 state, cpuinfo *info)
case CPUINFO_STR_REGISTER + MIPS3_SR: sprintf(info->s, "SR: %08X", (UINT32)mips->cpr[0][COP0_Status]); break;
case CPUINFO_STR_REGISTER + MIPS3_EPC: sprintf(info->s, "EPC:%08X", (UINT32)mips->cpr[0][COP0_EPC]); break;
case CPUINFO_STR_REGISTER + MIPS3_CAUSE: sprintf(info->s, "Cause:%08X", (UINT32)mips->cpr[0][COP0_Cause]); break;
- case CPUINFO_STR_REGISTER + MIPS3_COUNT: sprintf(info->s, "Count:%08X", (UINT32)((activecpu_gettotalcycles64() - mips->count_zero_time) / 2)); break;
+ case CPUINFO_STR_REGISTER + MIPS3_COUNT: sprintf(info->s, "Count:%08X", (UINT32)((activecpu_gettotalcycles() - mips->count_zero_time) / 2)); break;
case CPUINFO_STR_REGISTER + MIPS3_COMPARE: sprintf(info->s, "Compare:%08X", (UINT32)mips->cpr[0][COP0_Compare]); break;
case CPUINFO_STR_REGISTER + MIPS3_INDEX: sprintf(info->s, "Index:%08X", (UINT32)mips->cpr[0][COP0_Index]); break;
case CPUINFO_STR_REGISTER + MIPS3_RANDOM: sprintf(info->s, "Random:%08X", (UINT32)mips->cpr[0][COP0_Random]); break;
diff --git a/src/emu/cpu/sh2/sh2.c b/src/emu/cpu/sh2/sh2.c
index 0ceb32235c7..84930bcc68f 100644
--- a/src/emu/cpu/sh2/sh2.c
+++ b/src/emu/cpu/sh2/sh2.c
@@ -141,7 +141,7 @@ typedef struct
UINT16 frc;
UINT16 ocra, ocrb, icr;
- UINT32 frc_base;
+ UINT64 frc_base;
int frt_input;
int internal_irq_level;
@@ -2396,7 +2396,7 @@ static void sh2_set_context(void *src)
static void sh2_timer_resync(void)
{
int divider = div_tab[(sh2.m[5] >> 8) & 3];
- UINT32 cur_time = cpunum_gettotalcycles(sh2.cpu_number);
+ UINT64 cur_time = cpunum_gettotalcycles(sh2.cpu_number);
if(divider)
sh2.frc += (cur_time - sh2.frc_base) >> divider;
diff --git a/src/emu/cpuexec.c b/src/emu/cpuexec.c
index cf6d8c1a73a..c7b2ae04cbf 100644
--- a/src/emu/cpuexec.c
+++ b/src/emu/cpuexec.c
@@ -792,21 +792,7 @@ int cycles_currently_ran(void)
*
*************************************/
-/*--------------------------------------------------------------
-
- IMPORTANT: this value wraps around in a relatively short
- time. For example, for a 6MHz CPU, it will wrap around in
- 2^32/6000000 = 716 seconds = 12 minutes.
-
- Make sure you don't do comparisons between values returned
- by this function, but only use the difference (which will
- be correct regardless of wraparound).
-
- Alternatively, use the new 64-bit variants instead.
-
---------------------------------------------------------------*/
-
-UINT32 activecpu_gettotalcycles(void)
+UINT64 activecpu_gettotalcycles(void)
{
VERIFY_ACTIVECPU(activecpu_gettotalcycles);
if (activecpu == cpu_getexecutingcpu())
@@ -815,7 +801,7 @@ UINT32 activecpu_gettotalcycles(void)
return cpu[activecpu].totalcycles;
}
-UINT32 cpunum_gettotalcycles(int cpunum)
+UINT64 cpunum_gettotalcycles(int cpunum)
{
VERIFY_CPUNUM(cpunum_gettotalcycles);
if (cpunum == cpu_getexecutingcpu())
@@ -825,25 +811,6 @@ UINT32 cpunum_gettotalcycles(int cpunum)
}
-UINT64 activecpu_gettotalcycles64(void)
-{
- VERIFY_ACTIVECPU(activecpu_gettotalcycles64);
- if (activecpu == cpu_getexecutingcpu())
- return cpu[activecpu].totalcycles + cycles_currently_ran();
- else
- return cpu[activecpu].totalcycles;
-}
-
-UINT64 cpunum_gettotalcycles64(int cpunum)
-{
- VERIFY_CPUNUM(cpunum_gettotalcycles64);
- if (cpunum == cpu_getexecutingcpu())
- return cpu[cpunum].totalcycles + cycles_currently_ran();
- else
- return cpu[cpunum].totalcycles;
-}
-
-
/*************************************
*
diff --git a/src/emu/cpuexec.h b/src/emu/cpuexec.h
index 7c277098f02..5edf502f804 100644
--- a/src/emu/cpuexec.h
+++ b/src/emu/cpuexec.h
@@ -343,12 +343,10 @@ void cpu_boost_interleave(attotime timeslice_time, attotime boost_duration);
int cycles_currently_ran(void);
/* Returns the total number of CPU cycles */
-UINT32 activecpu_gettotalcycles(void);
-UINT64 activecpu_gettotalcycles64(void);
+UINT64 activecpu_gettotalcycles(void);
/* Returns the total number of CPU cycles for a given CPU */
-UINT32 cpunum_gettotalcycles(int cpunum);
-UINT64 cpunum_gettotalcycles64(int cpunum);
+UINT64 cpunum_gettotalcycles(int cpunum);
/* Safely eats cycles so we don't cross a timeslice boundary */
void activecpu_eat_cycles(int cycles);