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author Aaron Giles <aaron@aarongiles.com>2009-12-23 18:10:25 +0000
committer Aaron Giles <aaron@aarongiles.com>2009-12-23 18:10:25 +0000
commitc285eb9bcd3505c14a338e29f251ba00776cc75c (patch)
tree9387be1ac019ec1aadb83b22715651bd8b173d4b /src/emu
parent79b8f09ad84aa2b0010562c6afac4ae1f6983759 (diff)
Cleanups and version bump.mame0135u4
Diffstat (limited to 'src/emu')
-rw-r--r--src/emu/clifront.c6
-rw-r--r--src/emu/cpu/drcbex86.c12
-rw-r--r--src/emu/cpu/i386/i386op16.c2
-rw-r--r--src/emu/cpu/pic16c62x/16c62xdsm.c6
-rw-r--r--src/emu/cpu/pic16c62x/pic16c62x.c12
-rw-r--r--src/emu/cpu/pic16c62x/pic16c62x.h2
-rw-r--r--src/emu/cpu/rsp/rspdrc.c90
-rw-r--r--src/emu/cpu/x86emit.h2
-rw-r--r--src/emu/debug/debugvw.c2
-rw-r--r--src/emu/machine/eepromdev.c8
-rw-r--r--src/emu/sound/ics2115.c58
-rw-r--r--src/emu/sound/k056800.c2
-rw-r--r--src/emu/tilemap.c2
-rw-r--r--src/emu/video/saa5050.c14
14 files changed, 109 insertions, 109 deletions
diff --git a/src/emu/clifront.c b/src/emu/clifront.c
index 37355ab0b42..a8ab2ea61ef 100644
--- a/src/emu/clifront.c
+++ b/src/emu/clifront.c
@@ -636,7 +636,7 @@ int cli_info_listsamples(core_options *options, const char *gamename)
/*-------------------------------------------------
cli_info_listdevices - output the list of
- devices referenced by a given game or set of
+ devices referenced by a given game or set of
games
-------------------------------------------------*/
@@ -654,11 +654,11 @@ int cli_info_listdevices(core_options *options, const char *gamename)
{
machine_config *config = machine_config_alloc(drivers[drvindex]->machine_config);
const device_config *device;
-
+
if (count != 0)
printf("\n");
printf("Driver %s (%s):\n", drivers[drvindex]->name, drivers[drvindex]->description);
-
+
/* iterate through devices */
for (device = config->devicelist.head; device != NULL; device = device->next)
{
diff --git a/src/emu/cpu/drcbex86.c b/src/emu/cpu/drcbex86.c
index beafe283055..d35c5132b82 100644
--- a/src/emu/cpu/drcbex86.c
+++ b/src/emu/cpu/drcbex86.c
@@ -528,7 +528,7 @@ INLINE void emit_combine_z_shl_flags(x86code **dst)
/*-------------------------------------------------
- reset_last_upper_lower_reg - reset the last
+ reset_last_upper_lower_reg - reset the last
upper/lower register state
-------------------------------------------------*/
@@ -575,7 +575,7 @@ INLINE void set_last_upper_reg(drcbe_state *drcbe, x86code *dst, const drcuml_pa
INLINE int can_skip_lower_load(drcbe_state *drcbe, x86code *dst, UINT32 *memptr, UINT8 reglo)
{
-// return FALSE;
+// return FALSE;
return (dst == drcbe->last_lower_pc && memptr == drcbe->last_lower_addr && reglo == drcbe->last_lower_reg);
}
@@ -587,7 +587,7 @@ INLINE int can_skip_lower_load(drcbe_state *drcbe, x86code *dst, UINT32 *memptr,
INLINE int can_skip_upper_load(drcbe_state *drcbe, x86code *dst, UINT32 *memptr, UINT8 reghi)
{
-// return FALSE;
+// return FALSE;
return (dst == drcbe->last_upper_pc && memptr == drcbe->last_upper_addr && reghi == drcbe->last_upper_reg);
}
@@ -5658,7 +5658,7 @@ static x86code *op_and(drcbe_state *drcbe, x86code *dst, const drcuml_instructio
else if (dstp.type == DRCUML_PTYPE_MEMORY)
emit_mov_m32_imm(&dst, MABS(dstp.value + 4), 0); // mov dsthi,0
}
-
+
/* AND with immediate 0xffffffff00000000 */
else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == U64(0xffffffff00000000) && inst->flags == 0)
{
@@ -5672,7 +5672,7 @@ static x86code *op_and(drcbe_state *drcbe, x86code *dst, const drcuml_instructio
else if (dstp.type == DRCUML_PTYPE_MEMORY)
emit_mov_m32_imm(&dst, MABS(dstp.value), 0); // mov dstlo,0
}
-
+
/* AND with immediate <= 0xffffffff */
else if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value <= 0xffffffff && inst->flags == 0)
{
@@ -5684,7 +5684,7 @@ static x86code *op_and(drcbe_state *drcbe, x86code *dst, const drcuml_instructio
else if (dstp.type == DRCUML_PTYPE_MEMORY)
emit_mov_m32_imm(&dst, MABS(dstp.value + 4), 0); // mov dsthi,0
}
-
+
/* general case */
else
{
diff --git a/src/emu/cpu/i386/i386op16.c b/src/emu/cpu/i386/i386op16.c
index 66bc15587d9..1d32a623410 100644
--- a/src/emu/cpu/i386/i386op16.c
+++ b/src/emu/cpu/i386/i386op16.c
@@ -3110,7 +3110,7 @@ static void I386OP(lsl_r16_rm16)(i386_state *cpustate) // Opcode 0x0f 0x03
UINT8 modrm = FETCH(cpustate);
UINT32 limit;
I386_SREG seg;
-
+
if(PROTECTED_MODE)
{
memset(&seg, 0, sizeof(seg));
diff --git a/src/emu/cpu/pic16c62x/16c62xdsm.c b/src/emu/cpu/pic16c62x/16c62xdsm.c
index 6f18d73e60f..0ef3fe1351f 100644
--- a/src/emu/cpu/pic16c62x/16c62xdsm.c
+++ b/src/emu/cpu/pic16c62x/16c62xdsm.c
@@ -52,9 +52,9 @@ static const char *const regfile[32] = { "Reg$00 (INDF)", "Reg$01 (TMR0/OPTIO
"Reg$18", "Reg$19", "Reg$1A", "Reg$1B", "Reg$1C", "Reg$1D", "Reg$1E", "Reg$1F (CMCON/VRCON)" };
/* Registers bank 1 */
/*static const char *const regfile1[32] = { "Reg$00 (INDF)", "Reg$01 (OPTION)", "Reg$02 (PCL)", "Reg$03 (STATUS)", "Reg$04 (FSR)", "Reg$05 (TRISA)", "Reg$06 (TRISB)", "Reg$07",
- "Reg$08", "Reg$09", "Reg$0A (PCLATH)", "Reg$0B (INTCON)", "Reg$0C (PIE1)", "Reg$0D", "Reg$0E (PCON)", "Reg$0F",
- "Reg$10", "Reg$11", "Reg$12", "Reg$13", "Reg$14", "Reg$15", "Reg$16", "Reg$17",
- "Reg$18", "Reg$19", "Reg$1A", "Reg$1B", "Reg$1C", "Reg$1D", "Reg$1E", "Reg$1F (VRCON)" };
+ "Reg$08", "Reg$09", "Reg$0A (PCLATH)", "Reg$0B (INTCON)", "Reg$0C (PIE1)", "Reg$0D", "Reg$0E (PCON)", "Reg$0F",
+ "Reg$10", "Reg$11", "Reg$12", "Reg$13", "Reg$14", "Reg$15", "Reg$16", "Reg$17",
+ "Reg$18", "Reg$19", "Reg$1A", "Reg$1B", "Reg$1C", "Reg$1D", "Reg$1E", "Reg$1F (VRCON)" };
static const char **regfile[2] = { regfile0, regfile1 };*/
static const char *const dest[2] = { "W", "Reg" };
diff --git a/src/emu/cpu/pic16c62x/pic16c62x.c b/src/emu/cpu/pic16c62x/pic16c62x.c
index 24c7a2c3eb8..ec3d986d5b7 100644
--- a/src/emu/cpu/pic16c62x/pic16c62x.c
+++ b/src/emu/cpu/pic16c62x/pic16c62x.c
@@ -99,7 +99,7 @@ INLINE pic16c62x_state *get_safe_token(const device_config *device)
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_PIC16C620 ||
cpu_get_type(device) == CPU_PIC16C620A ||
-// cpu_get_type(device) == CPU_PIC16CR620A ||
+// cpu_get_type(device) == CPU_PIC16CR620A ||
cpu_get_type(device) == CPU_PIC16C621 ||
cpu_get_type(device) == CPU_PIC16C621A ||
cpu_get_type(device) == CPU_PIC16C622 ||
@@ -391,7 +391,7 @@ INLINE void STORE_REGFILE(pic16c62x_state *cpustate, offs_t addr, UINT8 data) /*
M_WRTRAM(0x81, data);
break;
case 0x85: if (cpustate->TRISA != data)
- {
+ {
cpustate->TRISA = data | 0xf0;
P_OUT(2,cpustate->TRISA);
P_OUT(0,cpustate->PORTA & (UINT8)(~cpustate->TRISA) & 0x0f);
@@ -399,11 +399,11 @@ INLINE void STORE_REGFILE(pic16c62x_state *cpustate, offs_t addr, UINT8 data) /*
}
break;
case 0x86: if (cpustate->TRISB != data)
- {
- cpustate->TRISB = data;
+ {
+ cpustate->TRISB = data;
P_OUT(3,cpustate->TRISB);
- P_OUT(1,cpustate->PORTB & (UINT8)(~cpustate->TRISB));
- M_WRTRAM(addr, data);
+ P_OUT(1,cpustate->PORTB & (UINT8)(~cpustate->TRISB));
+ M_WRTRAM(addr, data);
}
break;
default: M_WRTRAM(addr, data);
diff --git a/src/emu/cpu/pic16c62x/pic16c62x.h b/src/emu/cpu/pic16c62x/pic16c62x.h
index 712ff9c1452..1b591e28df3 100644
--- a/src/emu/cpu/pic16c62x/pic16c62x.h
+++ b/src/emu/cpu/pic16c62x/pic16c62x.h
@@ -34,7 +34,7 @@ enum
PIC16C62x_STK3, PIC16C62x_STK4, PIC16C62x_STK5, PIC16C62x_STK6,
PIC16C62x_STK7, PIC16C62x_FSR, PIC16C62x_W, PIC16C62x_ALU,
PIC16C62x_STR, PIC16C62x_OPT, PIC16C62x_TMR0, PIC16C62x_PRTA,
- PIC16C62x_PRTB, PIC16C62x_WDT, PIC16C62x_TRSA, PIC16C62x_TRSB,
+ PIC16C62x_PRTB, PIC16C62x_WDT, PIC16C62x_TRSA, PIC16C62x_TRSB,
PIC16C62x_PSCL
};
diff --git a/src/emu/cpu/rsp/rspdrc.c b/src/emu/cpu/rsp/rspdrc.c
index 5a65a76c2fa..c3dd4ac1c7d 100644
--- a/src/emu/cpu/rsp/rspdrc.c
+++ b/src/emu/cpu/rsp/rspdrc.c
@@ -2,8 +2,8 @@
rspdrc.c
- Universal machine language-based Nintendo/SGI RSP emulator.
- Written by Harmony of the MESS team.
+ Universal machine language-based Nintendo/SGI RSP emulator.
+ Written by Harmony of the MESS team.
Copyright the MESS team.
Released for general non-commercial use under the MAME license
@@ -2394,41 +2394,41 @@ INLINE void rsp_vcr(rsp_state *rsp, UINT32 op, INT16 *vres)
WRITEBACK_RESULT();
}
-// switch(EL)
-// {
-// case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */
-// break;
-// case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */
-// break;
-// case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */
-// break;
-// case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */
-// break;
-// case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */
-// break;
-// case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */
-// break;
-// case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */
-// break;
-// case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */
-// break;
-// case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */
-// break;
-// case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */
-// break;
-// case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */
-// break;
-// case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */
-// break;
-// case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */
-// break;
-// case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */
-// break;
-// case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */
-// break;
-// case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */
-// break;
-// }
+// switch(EL)
+// {
+// case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */
+// break;
+// case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */
+// break;
+// case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */
+// break;
+// case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */
+// break;
+// case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */
+// break;
+// case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */
+// break;
+// case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */
+// break;
+// case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */
+// break;
+// case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */
+// break;
+// case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */
+// break;
+// case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */
+// break;
+// case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */
+// break;
+// case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */
+// break;
+// case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */
+// break;
+// case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */
+// break;
+// case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */
+// break;
+// }
#define RSP_VMRG(E10, E11, E12, E13, E14, E15, E16, E17, E20, E21, E22, E23, E24, E25, E26, E27) \
if (COMPARE_FLAG(E10)) \
@@ -3622,7 +3622,7 @@ static void code_compile_block(rsp_state *rsp, offs_t pc)
int override = FALSE;
drcuml_block *block;
jmp_buf errorbuf;
-
+
profiler_mark_start(PROFILER_DRC_COMPILE);
/* get a description of this sequence */
@@ -3893,7 +3893,7 @@ static void static_generate_memory_accessor(rsp_state *rsp, int size, int iswrit
UML_DLOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), QWORD_x1); // dload i3,dmem,i0,qword_x1
UML_DROL(block, IREG(3), IREG(3), IREG(2)); // drol i3,i3,i2
UML_DAND(block, IREG(1), IREG(1), IMM(0xffff)); // dand i1,i1,0xffff
- UML_DAND(block, IREG(3), IREG(3), IMM(U64(0xffffffffffff0000))); // dand i3,i3,~0xffff
+ UML_DAND(block, IREG(3), IREG(3), IMM(U64(0xffffffffffff0000))); // dand i3,i3,~0xffff
UML_DOR(block, IREG(1), IREG(1), IREG(3)); // dor i1,i1,i3
UML_DROR(block, IREG(1), IREG(1), IREG(2)); // dror i1,i1,i2
UML_DSTORE(block, rsp->impstate->dmem, IREG(0), IREG(1), QWORD_x1); // dstore dmem,i0,i1,qword_x1
@@ -3915,7 +3915,7 @@ static void static_generate_memory_accessor(rsp_state *rsp, int size, int iswrit
UML_DLOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), QWORD_x1); // dload i3,dmem,i0,qword_x1
UML_DROL(block, IREG(3), IREG(3), IREG(2)); // drol i3,i3,i2
UML_DAND(block, IREG(1), IREG(1), IMM(0xffffffff)); // dand i1,i1,0xffffffff
- UML_DAND(block, IREG(3), IREG(3), IMM(U64(0xffffffff00000000))); // dand i3,i3,~0xffffffff
+ UML_DAND(block, IREG(3), IREG(3), IMM(U64(0xffffffff00000000))); // dand i3,i3,~0xffffffff
UML_DOR(block, IREG(1), IREG(1), IREG(3)); // dor i1,i1,i3
UML_DROR(block, IREG(1), IREG(1), IREG(2)); // dror i1,i1,i2
UML_DSTORE(block, rsp->impstate->dmem, IREG(0), IREG(1), QWORD_x1); // dstore dmem,i0,i1,qword_x1
@@ -4076,9 +4076,9 @@ static void generate_sequence_instruction(rsp_state *rsp, drcuml_block *block, c
/* if we hit an unmapped address, fatal error */
//if (desc->flags & OPFLAG_COMPILER_UNMAPPED)
//{
- // UML_MOV(block, MEM(&rsp->pc), IMM(desc->pc)); // mov [pc],desc->pc
- // save_fast_iregs(rsp, block);
- // UML_EXIT(block, IMM(EXECUTE_UNMAPPED_CODE)); // exit EXECUTE_UNMAPPED_CODE
+ // UML_MOV(block, MEM(&rsp->pc), IMM(desc->pc)); // mov [pc],desc->pc
+ // save_fast_iregs(rsp, block);
+ // UML_EXIT(block, IMM(EXECUTE_UNMAPPED_CODE)); // exit EXECUTE_UNMAPPED_CODE
//}
/* otherwise, unless this is a virtual no-op, it's a regular instruction */
@@ -4587,7 +4587,7 @@ static int generate_cop2(rsp_state *rsp, drcuml_block *block, compiler_state *co
{
UML_MOV(block, MEM(&rsp->impstate->arg0), IMM(desc->opptr.l[0])); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_mfc2, rsp); // callc cfunc_mfc2
- //UML_SEXT(block, R32(RTREG), IREG(0), DWORD); // dsext <rtreg>,i0,dword
+ //UML_SEXT(block, R32(RTREG), IREG(0), DWORD); // dsext <rtreg>,i0,dword
}
return TRUE;
@@ -4596,7 +4596,7 @@ static int generate_cop2(rsp_state *rsp, drcuml_block *block, compiler_state *co
{
UML_MOV(block, MEM(&rsp->impstate->arg0), IMM(desc->opptr.l[0])); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_cfc2, rsp); // callc cfunc_cfc2
- //UML_SEXT(block, R32(RTREG), IREG(0), DWORD); // dsext <rtreg>,i0,dword
+ //UML_SEXT(block, R32(RTREG), IREG(0), DWORD); // dsext <rtreg>,i0,dword
}
return TRUE;
diff --git a/src/emu/cpu/x86emit.h b/src/emu/cpu/x86emit.h
index 10395c52d4a..007d3600c1a 100644
--- a/src/emu/cpu/x86emit.h
+++ b/src/emu/cpu/x86emit.h
@@ -1900,7 +1900,7 @@ INLINE void emit_movsx_r32_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) {
INLINE void emit_movsx_r32_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_32BIT, dreg, MEMPARAMS); }
INLINE void emit_movsx_r32_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Ew, OP_32BIT, dreg, sreg); }
INLINE void emit_movsx_r32_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Ew, OP_32BIT, dreg, MEMPARAMS); }
-INLINE void emit_movzx_r32_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg)
+INLINE void emit_movzx_r32_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg)
{
#ifndef PTR64
if (sreg >= 4)
diff --git a/src/emu/debug/debugvw.c b/src/emu/debug/debugvw.c
index bd10dbe0afc..a2900c76c05 100644
--- a/src/emu/debug/debugvw.c
+++ b/src/emu/debug/debugvw.c
@@ -2518,7 +2518,7 @@ static int memory_view_alloc(debug_view *view)
/* allocate memory */
memdata = alloc_clear_or_die(debug_view_memory);
memdata->subviewlist = subviews;
-
+
/* allocate the expression data */
debug_view_expression_alloc(&memdata->expression);
diff --git a/src/emu/machine/eepromdev.c b/src/emu/machine/eepromdev.c
index a8a5ac06191..77a9b8bab5a 100644
--- a/src/emu/machine/eepromdev.c
+++ b/src/emu/machine/eepromdev.c
@@ -343,7 +343,7 @@ void eepromdev_set_data(const device_config *device, const UINT8 *data, int leng
assert(length <= ((1 << eestate->intf->address_bits) * eestate->intf->data_bits / 8));
memcpy(eestate->data, data, length);
-/* temporary: write data to eeprom.bin when this happens so we capture it
+/* temporary: write data to eeprom.bin when this happens so we capture it
for adding to a region */
{
FILE *f = fopen("eeprom.bin", "wb");
@@ -402,13 +402,13 @@ static DEVICE_START(eeprom)
memset(eestate->data, 0xff, (1 << eestate->intf->address_bits) * eestate->intf->data_bits / 8);
if ((config->default_data != NULL) && (config->default_data_size != 0))
eepromdev_set_data(device, config->default_data, config->default_data_size);
-
+
region_base = memory_region(device->machine, device->tag);
if (region_base != NULL)
{
UINT32 region_length = memory_region_length(device->machine, device->tag);
UINT32 region_flags = memory_region_flags(device->machine, device->tag);
-
+
if (region_length != (1 << eestate->intf->address_bits) * eestate->intf->data_bits / 8)
fatalerror("eeprom region '%s' wrong size (expected size = 0x%X)", device->tag, (1 << eestate->intf->address_bits) * eestate->intf->data_bits / 8);
if (eestate->intf->data_bits == 8 && (region_flags & ROMREGION_WIDTHMASK) != ROMREGION_8BIT)
@@ -417,7 +417,7 @@ static DEVICE_START(eeprom)
fatalerror("eeprom region '%s' needs to be a 16-bit big-endian region (flags=%08x)", device->tag, region_flags);
memcpy(eestate->data, region_base, region_length);
}
-
+
eestate->serial_count = 0;
eestate->latch = 0;
eestate->reset_line = ASSERT_LINE;
diff --git a/src/emu/sound/ics2115.c b/src/emu/sound/ics2115.c
index 175017945c6..7e90da435e7 100644
--- a/src/emu/sound/ics2115.c
+++ b/src/emu/sound/ics2115.c
@@ -86,7 +86,7 @@ static void recalc_irq(ics2115_state *chip)
for (i = 0; !irq && i<32; i++)
if (chip->voice[i].state & V_DONE)
irq = 1;
- if (irq != chip->irq_on)
+ if (irq != chip->irq_on)
{
chip->irq_on = irq;
if (chip->intf->irq_cb)
@@ -105,7 +105,7 @@ static STREAM_UPDATE( update )
memset(outputs[1], 0, samples*sizeof(*outputs[0]));
for (osc = 0; osc < 32; osc++)
- if (chip->voice[osc].state & V_ON)
+ if (chip->voice[osc].state & V_ON)
{
UINT32 adr = (chip->voice[osc].addrh << 16) | chip->voice[osc].addrl;
UINT32 end = (chip->voice[osc].endh << 16) | (chip->voice[osc].endl << 8);
@@ -119,7 +119,7 @@ static STREAM_UPDATE( update )
if (ICS2115LOGERROR) logerror("ICS2115: KEYRUN %02d adr=%08x end=%08x delta=%08x\n",
osc, adr, end, delta);
- for (i = 0; i < samples; i++)
+ for (i = 0; i < samples; i++)
{
INT32 v = chip->rom[badr|(adr >> 12)];
if (conf & 1)
@@ -131,7 +131,7 @@ static STREAM_UPDATE( update )
outputs[0][i] += v;
outputs[1][i] += v;
adr += delta;
- if (adr >= end)
+ if (adr >= end)
{
if (ICS2115LOGERROR) logerror("ICS2115: KEYDONE %2d\n", osc);
adr -= (end-loop);
@@ -195,7 +195,7 @@ static void recalc_timer(ics2115_state *chip, int timer)
if (ICS2115LOGERROR) logerror("ICS2115: timer %d off\n", timer);
}
- if (chip->timer[timer].period != period)
+ if (chip->timer[timer].period != period)
{
chip->timer[timer].period = period;
if (period)
@@ -210,10 +210,10 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
{
running_machine *machine = chip->device->machine;
- switch (reg)
+ switch (reg)
{
case 0x00: // [osc] Oscillator Configuration
- if (msb)
+ if (msb)
{
chip->voice[chip->osc].conf = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: conf = %02x\n", cpuexec_describe_context(machine), chip->osc,
@@ -241,7 +241,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
break;
case 0x03: // [osc] Wavesample loop start address 3-0.3-0
- if (msb)
+ if (msb)
{
chip->voice[chip->osc].strtl = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: strtl = %02x\n", cpuexec_describe_context(machine), chip->osc,
@@ -259,7 +259,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
break;
case 0x05: // [osc] Wavesample loop end address 3-0.3-0
- if (msb)
+ if (msb)
{
chip->voice[chip->osc].endl = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: endl = %02x\n", cpuexec_describe_context(machine), chip->osc,
@@ -268,7 +268,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
break;
case 0x07: // [osc] Volume Start
- if (msb)
+ if (msb)
{
chip->voice[chip->osc].vstart = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: vstart = %02x\n", cpuexec_describe_context(machine), chip->osc,
@@ -277,7 +277,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
break;
case 0x08: // [osc] Volume End
- if (msb)
+ if (msb)
{
chip->voice[chip->osc].vend = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: vend = %02x\n", cpuexec_describe_context(machine), chip->osc,
@@ -314,7 +314,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
case 0x0c: // [osc] Pan
- if (msb)
+ if (msb)
{
chip->voice[chip->osc].pan = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: pan = %02x\n", cpuexec_describe_context(machine), chip->osc,
@@ -323,7 +323,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
break;
case 0x0d: // [osc] Volume Enveloppe Control
- if (msb)
+ if (msb)
{
chip->voice[chip->osc].vctl = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: vctl = %02x\n", cpuexec_describe_context(machine), chip->osc,
@@ -332,7 +332,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
break;
case 0x10: // [osc] Oscillator Control
- if (msb)
+ if (msb)
{
chip->voice[chip->osc].ctl = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: ctl = %02x\n", cpuexec_describe_context(machine), chip->osc,
@@ -343,7 +343,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
break;
case 0x11: // [osc] Wavesample static address 27-20
- if (msb)
+ if (msb)
{
chip->voice[chip->osc].saddr = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: saddr = %02x\n", cpuexec_describe_context(machine), chip->osc,
@@ -352,7 +352,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
break;
case 0x40: // Timer 1 Preset
- if (!msb)
+ if (!msb)
{
chip->timer[0].preset = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: t1preset = %d\n", cpuexec_describe_context(machine), chip->timer[0].preset);
@@ -361,7 +361,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
break;
case 0x41: // Timer 2 Preset
- if (!msb)
+ if (!msb)
{
chip->timer[1].preset = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: t2preset = %d\n", cpuexec_describe_context(machine), chip->timer[1].preset);
@@ -370,7 +370,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
break;
case 0x42: // Timer 1 Prescaler
- if (!msb)
+ if (!msb)
{
chip->timer[0].scale = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: t1scale = %d\n", cpuexec_describe_context(machine), chip->timer[0].scale);
@@ -379,7 +379,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
break;
case 0x43: // Timer 2 Prescaler
- if (!msb)
+ if (!msb)
{
chip->timer[1].scale = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: t2scale = %d\n", cpuexec_describe_context(machine), chip->timer[1].scale);
@@ -388,7 +388,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
break;
case 0x4a: // IRQ Enable
- if (!msb)
+ if (!msb)
{
chip->irq_en = data;
if (ICS2115LOGERROR) logerror("%s:ICS2115: irq_en = %02x\n", cpuexec_describe_context(machine), chip->irq_en);
@@ -397,7 +397,7 @@ static void ics2115_reg_w(ics2115_state *chip, UINT8 reg, UINT8 data, int msb)
break;
case 0x4f: // Oscillator Address being Programmed
- if (!msb)
+ if (!msb)
{
chip->osc = data & 31;
if (ICS2115LOGERROR) logerror("%s:ICS2115: oscnumber = %d\n", cpuexec_describe_context(machine), chip->osc);
@@ -413,7 +413,7 @@ static UINT16 ics2115_reg_r(ics2115_state *chip, UINT8 reg)
{
running_machine *machine = chip->device->machine;
- switch (reg)
+ switch (reg)
{
case 0x0d: // [osc] Volume Enveloppe Control
if (ICS2115LOGERROR) logerror("%s:ICS2115: %2d: read vctl\n", cpuexec_describe_context(machine), chip->osc);
@@ -426,7 +426,7 @@ static UINT16 ics2115_reg_r(ics2115_state *chip, UINT8 reg)
int osc;
UINT8 res = 0xff;
for (osc = 0; osc < 32; osc++)
- if (chip->voice[osc].state & V_DONE)
+ if (chip->voice[osc].state & V_DONE)
{
chip->voice[osc].state &= ~V_DONE;
if (ICS2115LOGERROR) logerror("ICS2115: KEYOFF %2d\n", osc);
@@ -486,7 +486,7 @@ static DEVICE_START( ics2115 )
chip->ulaw = auto_alloc_array(device->machine, INT16, 256);
chip->stream = stream_create(device, 0, 2, 33075, chip, update);
- for (i = 0; i < 256; i++)
+ for (i = 0; i < 256; i++)
{
UINT8 c = ~i;
int v;
@@ -534,19 +534,19 @@ static DEVICE_START( ics2115 )
READ8_DEVICE_HANDLER( ics2115_r )
{
ics2115_state *chip = get_safe_token(device);
- switch (offset)
+ switch (offset)
{
- case 0:
+ case 0:
{
UINT8 res = 0;
- if (chip->irq_on)
+ if (chip->irq_on)
{
int i;
res |= 0x80;
if (chip->irq_en & chip->irq_pend & 3)
res |= 1; // Timer irq
for (i = 0; i < 32; i++)
- if (chip->voice[i].state & V_DONE)
+ if (chip->voice[i].state & V_DONE)
{
res |= 2;
break;
@@ -569,7 +569,7 @@ READ8_DEVICE_HANDLER( ics2115_r )
WRITE8_DEVICE_HANDLER( ics2115_w )
{
ics2115_state *chip = get_safe_token(device);
- switch (offset)
+ switch (offset)
{
case 1:
chip->reg = data;
diff --git a/src/emu/sound/k056800.c b/src/emu/sound/k056800.c
index 235b33f21e9..8bb57570024 100644
--- a/src/emu/sound/k056800.c
+++ b/src/emu/sound/k056800.c
@@ -49,7 +49,7 @@ static UINT8 k056800_host_reg_r( const device_config *device, int reg )
{
k056800_state *k056800 = k056800_get_safe_token(device);
UINT8 value = k056800->host_reg[reg];
- if (reg == 2)
+ if (reg == 2)
value &= ~3; // suppress VOLWR busy flags
return value;
diff --git a/src/emu/tilemap.c b/src/emu/tilemap.c
index 3077069e2d6..dbafd80414b 100644
--- a/src/emu/tilemap.c
+++ b/src/emu/tilemap.c
@@ -291,7 +291,7 @@ void tilemap_init(running_machine *machine)
if (machine->primary_screen == NULL)
return;
-
+
screen_width = video_screen_get_width(machine->primary_screen);
screen_height = video_screen_get_height(machine->primary_screen);
diff --git a/src/emu/video/saa5050.c b/src/emu/video/saa5050.c
index d8d39328267..d84a148ba02 100644
--- a/src/emu/video/saa5050.c
+++ b/src/emu/video/saa5050.c
@@ -9,7 +9,7 @@
- Implement BOX and dirtybuffer
- Add support for non-English version (SAA505x), possibly merging
src/mess/video/saa505x.c unsed by bbc.c in MESS
- - Investigate why supporting code 0 behavior breaks p2000t vscroll
+ - Investigate why supporting code 0 behavior breaks p2000t vscroll
in MESS (but not supporting breaks malzak title background)
- x,y sizes should probably be calculated from the screen parameters
rather than passed in the device interface
@@ -40,7 +40,7 @@ struct _saa5050_state
int size;
int rev;
- UINT8 * videoram;
+ UINT8 * videoram;
UINT16 flags;
UINT8 forecol;
UINT8 backcol;
@@ -159,8 +159,8 @@ PALETTE_INIT( saa5050 )
for ( i = 0; i < 8; i++ )
{
- r = saa5050_colors[i * 3];
- g = saa5050_colors[i * 3 + 1];
+ r = saa5050_colors[i * 3];
+ g = saa5050_colors[i * 3 + 1];
b = saa5050_colors[i * 3 + 2];
colortable_palette_set_color(machine->colortable, i, MAKE_RGB(r, g, b));
}
@@ -195,8 +195,8 @@ READ8_DEVICE_HANDLER( saa5050_videoram_r )
*************************************/
-/* this should probably be put at the end of saa5050 update,
-but p2000t in MESS does not seem to currently support it.
+/* this should probably be put at the end of saa5050 update,
+but p2000t in MESS does not seem to currently support it.
Hence, we leave it independent for the moment */
void saa5050_frame_advance( const device_config *device )
{
@@ -231,7 +231,7 @@ void saa5050_update( const device_config *device, bitmap_t *bitmap, const rectan
code = saa5050->videoram[ssy * saa5050->size + sx];
if (code < 32)
{
- switch (code)
+ switch (code)
{
case 0x00:
#ifndef MESS