summaryrefslogtreecommitdiffstatshomepage
path: root/src/emu
diff options
context:
space:
mode:
author Aaron Giles <aaron@aarongiles.com>2011-01-24 05:09:05 +0000
committer Aaron Giles <aaron@aarongiles.com>2011-01-24 05:09:05 +0000
commitb3d7e09292e4e9995349a4605177ce66a5afa696 (patch)
tree8aa035366d5f0670286f8be9202553adfc1f2a0a /src/emu
parent8a8b7d7a52862fcad86a93fba9c6d5814dff59b5 (diff)
Cleanups and version bump.mame0141u1
Diffstat (limited to 'src/emu')
-rw-r--r--src/emu/clifront.c6
-rw-r--r--src/emu/cpu/drcbec.c338
-rw-r--r--src/emu/cpu/drcbec.h2
-rw-r--r--src/emu/cpu/drcbeut.c20
-rw-r--r--src/emu/cpu/drcbeut.h4
-rw-r--r--src/emu/cpu/drcbex64.c156
-rw-r--r--src/emu/cpu/drcbex64.h12
-rw-r--r--src/emu/cpu/drcbex86.c152
-rw-r--r--src/emu/cpu/drcbex86.h14
-rw-r--r--src/emu/cpu/drccache.c6
-rw-r--r--src/emu/cpu/drccache.h6
-rw-r--r--src/emu/cpu/drcfe.c6
-rw-r--r--src/emu/cpu/drcfe.h4
-rw-r--r--src/emu/cpu/drcuml.c48
-rw-r--r--src/emu/cpu/drcuml.h14
-rw-r--r--src/emu/cpu/i386/i386.h38
-rw-r--r--src/emu/cpu/i86/i86.h130
-rw-r--r--src/emu/cpu/i86/instr86.c26
-rw-r--r--src/emu/cpu/m6800/m6800.c62
-rw-r--r--src/emu/cpu/mips/mips3fe.c16
-rw-r--r--src/emu/cpu/nec/nec.h74
-rw-r--r--src/emu/cpu/nec/v25instr.c2
-rw-r--r--src/emu/cpu/powerpc/ppcfe.c2
-rw-r--r--src/emu/cpu/pps4/pps4.c52
-rw-r--r--src/emu/cpu/pps4/pps4dasm.c14
-rw-r--r--src/emu/cpu/rsp/rspdrc.c54
-rw-r--r--src/emu/cpu/rsp/rspfe.c10
-rw-r--r--src/emu/cpu/sh2/sh2comn.h2
-rw-r--r--src/emu/cpu/sh2/sh2drc.c54
-rw-r--r--src/emu/cpu/sh4/sh4.h2
-rw-r--r--src/emu/cpu/sh4/sh4comn.h10
-rw-r--r--src/emu/cpu/uml.c68
-rw-r--r--src/emu/cpu/uml.h182
-rwxr-xr-xsrc/emu/cpu/upd7725/upd7725.c32
-rwxr-xr-xsrc/emu/cpu/upd7725/upd7725.h8
-rw-r--r--src/emu/cpu/x86emit.h14
-rw-r--r--src/emu/devimage.c2
-rw-r--r--src/emu/drivers/xtal.h2
-rw-r--r--src/emu/emuopts.c2
-rw-r--r--src/emu/imagedev/cartslot.c4
-rw-r--r--src/emu/imagedev/chd_cd.c4
-rw-r--r--src/emu/imagedev/snapquik.h2
-rw-r--r--src/emu/info.c2
-rw-r--r--src/emu/mame.c4
-rw-r--r--src/emu/romload.c16
-rw-r--r--src/emu/softlist.c12
-rw-r--r--src/emu/sound/bsmt2000.c20
-rw-r--r--src/emu/sound/bsmt2000.h6
-rw-r--r--src/emu/sound/disc_cls.h14
-rw-r--r--src/emu/sound/disc_dev.h4
-rw-r--r--src/emu/sound/disc_flt.h60
-rw-r--r--src/emu/sound/disc_inp.c2
-rw-r--r--src/emu/sound/disc_mth.c6
-rw-r--r--src/emu/sound/disc_mth.h10
-rw-r--r--src/emu/sound/disc_wav.h14
-rw-r--r--src/emu/sound/discrete.c6
-rw-r--r--src/emu/sound/discrete.h10
-rw-r--r--src/emu/sound/okim6295.c2
-rw-r--r--src/emu/sound/segapcm.c38
59 files changed, 941 insertions, 941 deletions
diff --git a/src/emu/clifront.c b/src/emu/clifront.c
index 58bc7eb3d4e..62cbc6aab9b 100644
--- a/src/emu/clifront.c
+++ b/src/emu/clifront.c
@@ -162,7 +162,7 @@ int cli_execute(int argc, char **argv, osd_interface &osd, const options_entry *
core_filename_extract_base(&gamename, gamename_option, TRUE);
driver = driver_get_name(gamename);
- /* execute any commands specified */
+ /* execute any commands specified */
result = execute_commands(options, exename, driver);
if (result != -1)
goto error;
@@ -181,7 +181,7 @@ int cli_execute(int argc, char **argv, osd_interface &osd, const options_entry *
result = MAMERR_INVALID_CONFIG;
goto error;
}
-
+
/* run the game */
result = mame_execute(osd, options);
@@ -882,7 +882,7 @@ static int info_listsoftware(core_options *options, const char *gamename)
"<softwarelists>\n"
);
}
-
+
for ( int drvindex = 0; drivers[drvindex] != NULL; drvindex++ )
{
if ( mame_strwildcmp( gamename, drivers[drvindex]->name ) == 0 )
diff --git a/src/emu/cpu/drcbec.c b/src/emu/cpu/drcbec.c
index f40ec76f9db..65c8c2fc396 100644
--- a/src/emu/cpu/drcbec.c
+++ b/src/emu/cpu/drcbec.c
@@ -455,7 +455,7 @@ void drcbe_c::generate(drcuml_block &block, const instruction *instlist, UINT32
// count how many bytes of immediates we need
int immedbytes = 0;
for (int pnum = 0; pnum < inst.numparams(); pnum++)
- if (inst.param(pnum).is_mapvar() ||
+ if (inst.param(pnum).is_mapvar() ||
(inst.param(pnum).is_immediate() && inst.param(pnum).immediate() != 0) ||
(inst.param(pnum).is_size_space() && inst.param(pnum).space() != 0))
immedbytes += psize[pnum];
@@ -491,7 +491,7 @@ void drcbe_c::generate(drcuml_block &block, const instruction *instlist, UINT32
//-------------------------------------------------
-// hash_exists - return true if the given mode/pc
+// hash_exists - return true if the given mode/pc
// exists in the hash table
//-------------------------------------------------
@@ -502,7 +502,7 @@ bool drcbe_c::hash_exists(UINT32 mode, UINT32 pc)
//-------------------------------------------------
-// get_info - return information about the
+// get_info - return information about the
// back-end implementation
//-------------------------------------------------
@@ -514,7 +514,7 @@ void drcbe_c::get_info(drcbe_info &info)
//-------------------------------------------------
-// execute - execute a block of code registered
+// execute - execute a block of code registered
// at the given mode/pc
//-------------------------------------------------
@@ -540,21 +540,21 @@ int drcbe_c::execute(code_handle &entry)
{
// ----------------------- Control Flow Operations -----------------------
- case MAKE_OPCODE_SHORT(OP_HANDLE, 4, 0): // HANDLE handle
- case MAKE_OPCODE_SHORT(OP_HASH, 4, 0): // HASH mode,pc
- case MAKE_OPCODE_SHORT(OP_LABEL, 4, 0): // LABEL imm
- case MAKE_OPCODE_SHORT(OP_COMMENT, 4, 0): // COMMENT string
- case MAKE_OPCODE_SHORT(OP_MAPVAR, 4, 0): // MAPVAR mapvar,value
+ case MAKE_OPCODE_SHORT(OP_HANDLE, 4, 0): // HANDLE handle
+ case MAKE_OPCODE_SHORT(OP_HASH, 4, 0): // HASH mode,pc
+ case MAKE_OPCODE_SHORT(OP_LABEL, 4, 0): // LABEL imm
+ case MAKE_OPCODE_SHORT(OP_COMMENT, 4, 0): // COMMENT string
+ case MAKE_OPCODE_SHORT(OP_MAPVAR, 4, 0): // MAPVAR mapvar,value
// these opcodes should be processed at compile-time only
fatalerror("Unexpected opcode");
break;
- case MAKE_OPCODE_SHORT(OP_DEBUG, 4, 0): // DEBUG pc
+ case MAKE_OPCODE_SHORT(OP_DEBUG, 4, 0): // DEBUG pc
debugger_instruction_hook(&m_device, PARAM0);
break;
- case MAKE_OPCODE_SHORT(OP_HASHJMP, 4, 0): // HASHJMP mode,pc,handle
+ case MAKE_OPCODE_SHORT(OP_HASHJMP, 4, 0): // HASHJMP mode,pc,handle
sp = 0;
newinst = (const drcbec_instruction *)m_hash.get_codeptr(PARAM0, PARAM1);
if (newinst == NULL)
@@ -568,7 +568,7 @@ int drcbe_c::execute(code_handle &entry)
inst = newinst;
continue;
- case MAKE_OPCODE_SHORT(OP_EXIT, 4, 1): // EXIT src1[,c]
+ case MAKE_OPCODE_SHORT(OP_EXIT, 4, 1): // EXIT src1[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -576,7 +576,7 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_EXIT, 4, 0):
return PARAM0;
- case MAKE_OPCODE_SHORT(OP_JMP, 4, 1): // JMP imm[,c]
+ case MAKE_OPCODE_SHORT(OP_JMP, 4, 1): // JMP imm[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -587,7 +587,7 @@ int drcbe_c::execute(code_handle &entry)
inst = newinst;
continue;
- case MAKE_OPCODE_SHORT(OP_CALLH, 4, 1): // CALLH handle[,c]
+ case MAKE_OPCODE_SHORT(OP_CALLH, 4, 1): // CALLH handle[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -600,7 +600,7 @@ int drcbe_c::execute(code_handle &entry)
inst = newinst;
continue;
- case MAKE_OPCODE_SHORT(OP_RET, 4, 1): // RET [c]
+ case MAKE_OPCODE_SHORT(OP_RET, 4, 1): // RET [c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -612,7 +612,7 @@ int drcbe_c::execute(code_handle &entry)
inst = newinst;
continue;
- case MAKE_OPCODE_SHORT(OP_EXH, 4, 1): // EXH handle,param[,c]
+ case MAKE_OPCODE_SHORT(OP_EXH, 4, 1): // EXH handle,param[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -626,7 +626,7 @@ int drcbe_c::execute(code_handle &entry)
inst = newinst;
continue;
- case MAKE_OPCODE_SHORT(OP_CALLC, 4, 1): // CALLC func,ptr[,c]
+ case MAKE_OPCODE_SHORT(OP_CALLC, 4, 1): // CALLC func,ptr[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -635,7 +635,7 @@ int drcbe_c::execute(code_handle &entry)
(*inst[0].cfunc)(inst[1].v);
break;
- case MAKE_OPCODE_SHORT(OP_RECOVER, 4, 0): // RECOVER dst,mapvar
+ case MAKE_OPCODE_SHORT(OP_RECOVER, 4, 0): // RECOVER dst,mapvar
assert(sp > 0);
PARAM0 = m_map.get_value((drccodeptr)callstack[0], PARAM1);
break;
@@ -643,29 +643,29 @@ int drcbe_c::execute(code_handle &entry)
// ----------------------- Internal Register Operations -----------------------
- case MAKE_OPCODE_SHORT(OP_SETFMOD, 4, 0): // SETFMOD src
+ case MAKE_OPCODE_SHORT(OP_SETFMOD, 4, 0): // SETFMOD src
m_state.fmod = PARAM0;
break;
- case MAKE_OPCODE_SHORT(OP_GETFMOD, 4, 0): // GETFMOD dst
+ case MAKE_OPCODE_SHORT(OP_GETFMOD, 4, 0): // GETFMOD dst
PARAM0 = m_state.fmod;
break;
- case MAKE_OPCODE_SHORT(OP_GETEXP, 4, 0): // GETEXP dst
+ case MAKE_OPCODE_SHORT(OP_GETEXP, 4, 0): // GETEXP dst
PARAM0 = m_state.exp;
break;
- case MAKE_OPCODE_SHORT(OP_GETFLGS, 4, 0): // GETFLGS dst[,f]
+ case MAKE_OPCODE_SHORT(OP_GETFLGS, 4, 0): // GETFLGS dst[,f]
PARAM0 = flags & PARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_SAVE, 4, 0): // SAVE dst
+ case MAKE_OPCODE_SHORT(OP_SAVE, 4, 0): // SAVE dst
*inst[0].state = m_state;
inst[0].state->flags = flags;
break;
- case MAKE_OPCODE_SHORT(OP_RESTORE, 4, 0): // RESTORE dst
- case MAKE_OPCODE_SHORT(OP_RESTORE, 4, 1): // RESTORE dst
+ case MAKE_OPCODE_SHORT(OP_RESTORE, 4, 0): // RESTORE dst
+ case MAKE_OPCODE_SHORT(OP_RESTORE, 4, 1): // RESTORE dst
m_state = *inst[0].state;
flags = inst[0].state->flags;
break;
@@ -673,7 +673,7 @@ int drcbe_c::execute(code_handle &entry)
// ----------------------- 32-Bit Integer Operations -----------------------
- case MAKE_OPCODE_SHORT(OP_LOAD1, 4, 0): // LOAD dst,base,index,BYTE
+ case MAKE_OPCODE_SHORT(OP_LOAD1, 4, 0): // LOAD dst,base,index,BYTE
PARAM0 = inst[1].puint8[PARAM2];
break;
@@ -693,7 +693,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = *(UINT16 *)&inst[1].puint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD2, 4, 0): // LOAD dst,base,index,WORD
+ case MAKE_OPCODE_SHORT(OP_LOAD2, 4, 0): // LOAD dst,base,index,WORD
PARAM0 = inst[1].puint16[PARAM2];
break;
@@ -713,7 +713,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = *(UINT32 *)&inst[1].puint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD4, 4, 0): // LOAD dst,base,index,DWORD
+ case MAKE_OPCODE_SHORT(OP_LOAD4, 4, 0): // LOAD dst,base,index,DWORD
PARAM0 = inst[1].puint32[PARAM2];
break;
@@ -721,7 +721,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = *(UINT32 *)&inst[1].puint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS1, 4, 0): // LOADS dst,base,index,BYTE
+ case MAKE_OPCODE_SHORT(OP_LOADS1, 4, 0): // LOADS dst,base,index,BYTE
PARAM0 = inst[1].pint8[PARAM2];
break;
@@ -740,8 +740,8 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_LOADS2x1, 4, 0): // LOADS dst,base,index,WORD_x1
PARAM0 = *(INT16 *)&inst[1].pint8[PARAM2];
break;
-
- case MAKE_OPCODE_SHORT(OP_LOADS2, 4, 0): // LOADS dst,base,index,WORD
+
+ case MAKE_OPCODE_SHORT(OP_LOADS2, 4, 0): // LOADS dst,base,index,WORD
PARAM0 = inst[1].pint16[PARAM2];
break;
@@ -761,7 +761,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = *(INT32 *)&inst[1].pint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS4, 4, 0): // LOADS dst,base,index,DWORD
+ case MAKE_OPCODE_SHORT(OP_LOADS4, 4, 0): // LOADS dst,base,index,DWORD
PARAM0 = inst[1].pint32[PARAM2];
break;
@@ -769,7 +769,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = *(INT32 *)&inst[1].pint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_STORE1, 4, 0): // STORE dst,base,index,BYTE
+ case MAKE_OPCODE_SHORT(OP_STORE1, 4, 0): // STORE dst,base,index,BYTE
inst[0].puint8[PARAM1] = PARAM2;
break;
@@ -789,7 +789,7 @@ int drcbe_c::execute(code_handle &entry)
*(UINT16 *)&inst[0].puint8[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE2, 4, 0): // STORE dst,base,index,WORD
+ case MAKE_OPCODE_SHORT(OP_STORE2, 4, 0): // STORE dst,base,index,WORD
inst[0].puint16[PARAM1] = PARAM2;
break;
@@ -809,7 +809,7 @@ int drcbe_c::execute(code_handle &entry)
*(UINT32 *)&inst[0].puint16[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE4, 4, 0): // STORE dst,base,index,DWORD
+ case MAKE_OPCODE_SHORT(OP_STORE4, 4, 0): // STORE dst,base,index,DWORD
inst[0].puint32[PARAM1] = PARAM2;
break;
@@ -817,15 +817,15 @@ int drcbe_c::execute(code_handle &entry)
*(UINT32 *)&inst[0].puint64[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_READ1, 4, 0): // READ dst,src1,space_BYTE
+ case MAKE_OPCODE_SHORT(OP_READ1, 4, 0): // READ dst,src1,space_BYTE
PARAM0 = m_space[PARAM2]->read_byte(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_READ2, 4, 0): // READ dst,src1,space_WORD
+ case MAKE_OPCODE_SHORT(OP_READ2, 4, 0): // READ dst,src1,space_WORD
PARAM0 = m_space[PARAM2]->read_word(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_READ4, 4, 0): // READ dst,src1,space_DWORD
+ case MAKE_OPCODE_SHORT(OP_READ4, 4, 0): // READ dst,src1,space_DWORD
PARAM0 = m_space[PARAM2]->read_dword(PARAM1);
break;
@@ -837,15 +837,15 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = m_space[PARAM3]->read_dword(PARAM1, PARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE1, 4, 0): // WRITE dst,src1,space_BYTE
+ case MAKE_OPCODE_SHORT(OP_WRITE1, 4, 0): // WRITE dst,src1,space_BYTE
m_space[PARAM2]->write_byte(PARAM0, PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE2, 4, 0): // WRITE dst,src1,space_WORD
+ case MAKE_OPCODE_SHORT(OP_WRITE2, 4, 0): // WRITE dst,src1,space_WORD
m_space[PARAM2]->write_word(PARAM0, PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE4, 4, 0): // WRITE dst,src1,space_DWORD
+ case MAKE_OPCODE_SHORT(OP_WRITE4, 4, 0): // WRITE dst,src1,space_DWORD
m_space[PARAM2]->write_dword(PARAM0, PARAM1);
break;
@@ -857,11 +857,11 @@ int drcbe_c::execute(code_handle &entry)
m_space[PARAM3]->write_dword(PARAM0, PARAM1, PARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_CARRY, 4, 1): // CARRY src,bitnum
+ case MAKE_OPCODE_SHORT(OP_CARRY, 4, 1): // CARRY src,bitnum
flags = (flags & ~FLAG_C) | ((PARAM0 >> (PARAM1 & 31)) & FLAG_C);
break;
- case MAKE_OPCODE_SHORT(OP_MOV, 4, 1): // MOV dst,src[,c]
+ case MAKE_OPCODE_SHORT(OP_MOV, 4, 1): // MOV dst,src[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -870,11 +870,11 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = PARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_SET, 4, 1): // SET dst,c
+ case MAKE_OPCODE_SHORT(OP_SET, 4, 1): // SET dst,c
PARAM0 = OPCODE_FAIL_CONDITION(opcode, flags) ? 0 : 1;
break;
- case MAKE_OPCODE_SHORT(OP_SEXT1, 4, 0): // SEXT1 dst,src
+ case MAKE_OPCODE_SHORT(OP_SEXT1, 4, 0): // SEXT1 dst,src
PARAM0 = (INT8)PARAM1;
break;
@@ -884,7 +884,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_SEXT2, 4, 0): // SEXT2 dst,src
+ case MAKE_OPCODE_SHORT(OP_SEXT2, 4, 0): // SEXT2 dst,src
PARAM0 = (INT16)PARAM1;
break;
@@ -918,7 +918,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_ADD, 4, 0): // ADD dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_ADD, 4, 0): // ADD dst,src1,src2[,f]
PARAM0 = PARAM1 + PARAM2;
break;
@@ -928,7 +928,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_ADDC, 4, 0): // ADDC dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_ADDC, 4, 0): // ADDC dst,src1,src2[,f]
PARAM0 = PARAM1 + PARAM2 + (flags & FLAG_C);
break;
@@ -941,7 +941,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_SUB, 4, 0): // SUB dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_SUB, 4, 0): // SUB dst,src1,src2[,f]
PARAM0 = PARAM1 - PARAM2;
break;
@@ -951,7 +951,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_SUBB, 4, 0): // SUBB dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_SUBB, 4, 0): // SUBB dst,src1,src2[,f]
PARAM0 = PARAM1 - PARAM2 - (flags & FLAG_C);
break;
@@ -964,7 +964,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_CMP, 4, 1): // CMP src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_CMP, 4, 1): // CMP src1,src2[,f]
temp32 = PARAM0 - PARAM1;
flags = FLAGS32_NZCV_SUB(temp32, PARAM0, PARAM1);
break;
@@ -1041,7 +1041,7 @@ int drcbe_c::execute(code_handle &entry)
flags = FLAG_V;
break;
- case MAKE_OPCODE_SHORT(OP_AND, 4, 0): // AND dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_AND, 4, 0): // AND dst,src1,src2[,f]
PARAM0 = PARAM1 & PARAM2;
break;
@@ -1051,12 +1051,12 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_TEST, 4, 1): // TEST src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_TEST, 4, 1): // TEST src1,src2[,f]
temp32 = PARAM0 & PARAM1;
flags = FLAGS32_NZ(temp32);
break;
- case MAKE_OPCODE_SHORT(OP_OR, 4, 0): // OR dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_OR, 4, 0): // OR dst,src1,src2[,f]
PARAM0 = PARAM1 | PARAM2;
break;
@@ -1066,7 +1066,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_XOR, 4, 0): // XOR dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_XOR, 4, 0): // XOR dst,src1,src2[,f]
PARAM0 = PARAM1 ^ PARAM2;
break;
@@ -1076,7 +1076,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_LZCNT, 4, 0): // LZCNT dst,src
+ case MAKE_OPCODE_SHORT(OP_LZCNT, 4, 0): // LZCNT dst,src
PARAM0 = count_leading_zeros(PARAM1);
break;
@@ -1086,7 +1086,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_BSWAP, 4, 0): // BSWAP dst,src
+ case MAKE_OPCODE_SHORT(OP_BSWAP, 4, 0): // BSWAP dst,src
temp32 = PARAM1;
PARAM0 = FLIPENDIAN_INT32(temp32);
break;
@@ -1097,7 +1097,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = FLIPENDIAN_INT32(temp32);
break;
- case MAKE_OPCODE_SHORT(OP_SHL, 4, 0): // SHL dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_SHL, 4, 0): // SHL dst,src,count[,f]
PARAM0 = PARAM1 << (PARAM2 & 31);
break;
@@ -1109,7 +1109,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_SHR, 4, 0): // SHR dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_SHR, 4, 0): // SHR dst,src,count[,f]
PARAM0 = PARAM1 >> (PARAM2 & 31);
break;
@@ -1121,7 +1121,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_SAR, 4, 0): // SAR dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_SAR, 4, 0): // SAR dst,src,count[,f]
PARAM0 = (INT32)PARAM1 >> (PARAM2 & 31);
break;
@@ -1133,7 +1133,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_ROL, 4, 0): // ROL dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_ROL, 4, 0): // ROL dst,src,count[,f]
shift = PARAM2 & 31;
PARAM0 = (PARAM1 << shift) | (PARAM1 >> ((32 - shift) & 31));
break;
@@ -1146,7 +1146,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_ROLC, 4, 0): // ROLC dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_ROLC, 4, 0): // ROLC dst,src,count[,f]
shift = PARAM2 & 31;
if (shift > 1)
PARAM0 = (PARAM1 << shift) | ((flags & FLAG_C) << (shift - 1)) | (PARAM1 >> (33 - shift));
@@ -1167,7 +1167,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_ROR, 4, 0): // ROR dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_ROR, 4, 0): // ROR dst,src,count[,f]
shift = PARAM2 & 31;
PARAM0 = (PARAM1 >> shift) | (PARAM1 << ((32 - shift) & 31));
break;
@@ -1180,7 +1180,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_RORC, 4, 0): // RORC dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_RORC, 4, 0): // RORC dst,src,count[,f]
shift = PARAM2 & 31;
if (shift > 1)
PARAM0 = (PARAM1 >> shift) | (((flags & FLAG_C) << 31) >> (shift - 1)) | (PARAM1 << (33 - shift));
@@ -1204,7 +1204,7 @@ int drcbe_c::execute(code_handle &entry)
// ----------------------- 64-Bit Integer Operations -----------------------
- case MAKE_OPCODE_SHORT(OP_LOAD1, 8, 0): // DLOAD dst,base,index,BYTE
+ case MAKE_OPCODE_SHORT(OP_LOAD1, 8, 0): // DLOAD dst,base,index,BYTE
DPARAM0 = inst[1].puint8[PARAM2];
break;
@@ -1224,7 +1224,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = *(UINT16 *)&inst[1].puint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD2, 8, 0): // DLOAD dst,base,index,WORD
+ case MAKE_OPCODE_SHORT(OP_LOAD2, 8, 0): // DLOAD dst,base,index,WORD
DPARAM0 = inst[1].puint16[PARAM2];
break;
@@ -1244,7 +1244,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = *(UINT32 *)&inst[1].puint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD4, 8, 0): // DLOAD dst,base,index,DWORD
+ case MAKE_OPCODE_SHORT(OP_LOAD4, 8, 0): // DLOAD dst,base,index,DWORD
DPARAM0 = inst[1].puint32[PARAM2];
break;
@@ -1268,7 +1268,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = inst[1].puint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS1, 8, 0): // DLOADS dst,base,index,BYTE
+ case MAKE_OPCODE_SHORT(OP_LOADS1, 8, 0): // DLOADS dst,base,index,BYTE
DPARAM0 = inst[1].pint8[PARAM2];
break;
@@ -1288,7 +1288,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = *(INT16 *)&inst[1].pint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS2, 8, 0): // DLOADS dst,base,index,WORD
+ case MAKE_OPCODE_SHORT(OP_LOADS2, 8, 0): // DLOADS dst,base,index,WORD
DPARAM0 = inst[1].pint16[PARAM2];
break;
@@ -1308,7 +1308,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = *(INT32 *)&inst[1].pint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS4, 8, 0): // DLOADS dst,base,index,DWORD
+ case MAKE_OPCODE_SHORT(OP_LOADS4, 8, 0): // DLOADS dst,base,index,DWORD
DPARAM0 = inst[1].pint32[PARAM2];
break;
@@ -1328,11 +1328,11 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = *(INT64 *)&inst[1].pint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS8, 8, 0): // DLOADS dst,base,index,QWORD
+ case MAKE_OPCODE_SHORT(OP_LOADS8, 8, 0): // DLOADS dst,base,index,QWORD
DPARAM0 = inst[1].pint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_STORE1, 8, 0): // DSTORE dst,base,index,BYTE
+ case MAKE_OPCODE_SHORT(OP_STORE1, 8, 0): // DSTORE dst,base,index,BYTE
inst[0].puint8[PARAM1] = DPARAM2;
break;
@@ -1352,7 +1352,7 @@ int drcbe_c::execute(code_handle &entry)
*(UINT16 *)&inst[0].puint8[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE2, 8, 0): // DSTORE dst,base,index,WORD
+ case MAKE_OPCODE_SHORT(OP_STORE2, 8, 0): // DSTORE dst,base,index,WORD
inst[0].puint16[PARAM1] = DPARAM2;
break;
@@ -1372,7 +1372,7 @@ int drcbe_c::execute(code_handle &entry)
*(UINT32 *)&inst[0].puint16[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE4, 8, 0): // DSTORE dst,base,index,DWORD
+ case MAKE_OPCODE_SHORT(OP_STORE4, 8, 0): // DSTORE dst,base,index,DWORD
inst[0].puint32[PARAM1] = DPARAM2;
break;
@@ -1392,23 +1392,23 @@ int drcbe_c::execute(code_handle &entry)
*(UINT64 *)&inst[0].puint32[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE8, 8, 0): // DSTORE dst,base,index,QWORD
+ case MAKE_OPCODE_SHORT(OP_STORE8, 8, 0): // DSTORE dst,base,index,QWORD
inst[0].puint64[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_READ1, 8, 0): // DREAD dst,src1,space_BYTE
+ case MAKE_OPCODE_SHORT(OP_READ1, 8, 0): // DREAD dst,src1,space_BYTE
DPARAM0 = m_space[PARAM2]->read_byte(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_READ2, 8, 0): // DREAD dst,src1,space_WORD
+ case MAKE_OPCODE_SHORT(OP_READ2, 8, 0): // DREAD dst,src1,space_WORD
DPARAM0 = m_space[PARAM2]->read_word(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_READ4, 8, 0): // DREAD dst,src1,space_DWORD
+ case MAKE_OPCODE_SHORT(OP_READ4, 8, 0): // DREAD dst,src1,space_DWORD
DPARAM0 = m_space[PARAM2]->read_dword(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_READ8, 8, 0): // DREAD dst,src1,space_QOWRD
+ case MAKE_OPCODE_SHORT(OP_READ8, 8, 0): // DREAD dst,src1,space_QOWRD
DPARAM0 = m_space[PARAM2]->read_qword(PARAM1);
break;
@@ -1424,19 +1424,19 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = m_space[PARAM3]->read_qword(PARAM1, PARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE1, 8, 0): // DWRITE dst,src1,space_BYTE
+ case MAKE_OPCODE_SHORT(OP_WRITE1, 8, 0): // DWRITE dst,src1,space_BYTE
m_space[PARAM2]->write_byte(PARAM0, PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE2, 8, 0): // DWRITE dst,src1,space_WORD
+ case MAKE_OPCODE_SHORT(OP_WRITE2, 8, 0): // DWRITE dst,src1,space_WORD
m_space[PARAM2]->write_word(PARAM0, PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE4, 8, 0): // DWRITE dst,src1,space_DWORD
+ case MAKE_OPCODE_SHORT(OP_WRITE4, 8, 0): // DWRITE dst,src1,space_DWORD
m_space[PARAM2]->write_dword(PARAM0, PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE8, 8, 0): // DWRITE dst,src1,space_QWORD
+ case MAKE_OPCODE_SHORT(OP_WRITE8, 8, 0): // DWRITE dst,src1,space_QWORD
m_space[PARAM2]->write_qword(PARAM0, DPARAM1);
break;
@@ -1452,11 +1452,11 @@ int drcbe_c::execute(code_handle &entry)
m_space[PARAM3]->write_qword(PARAM0, DPARAM1, DPARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_CARRY, 8, 0): // DCARRY src,bitnum
+ case MAKE_OPCODE_SHORT(OP_CARRY, 8, 0): // DCARRY src,bitnum
flags = (flags & ~FLAG_C) | ((DPARAM0 >> (DPARAM1 & 63)) & FLAG_C);
break;
- case MAKE_OPCODE_SHORT(OP_MOV, 8, 1): // DMOV dst,src[,c]
+ case MAKE_OPCODE_SHORT(OP_MOV, 8, 1): // DMOV dst,src[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -1465,11 +1465,11 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = DPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_SET, 8, 1): // DSET dst,c
+ case MAKE_OPCODE_SHORT(OP_SET, 8, 1): // DSET dst,c
DPARAM0 = OPCODE_FAIL_CONDITION(opcode, flags) ? 0 : 1;
break;
- case MAKE_OPCODE_SHORT(OP_SEXT1, 8, 0): // DSEXT dst,src,BYTE
+ case MAKE_OPCODE_SHORT(OP_SEXT1, 8, 0): // DSEXT dst,src,BYTE
DPARAM0 = (INT8)PARAM1;
break;
@@ -1479,7 +1479,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_SEXT2, 8, 0): // DSEXT dst,src,WORD
+ case MAKE_OPCODE_SHORT(OP_SEXT2, 8, 0): // DSEXT dst,src,WORD
DPARAM0 = (INT16)PARAM1;
break;
@@ -1489,7 +1489,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_SEXT4, 8, 0): // DSEXT dst,src,DWORD
+ case MAKE_OPCODE_SHORT(OP_SEXT4, 8, 0): // DSEXT dst,src,DWORD
DPARAM0 = (INT32)PARAM1;
break;
@@ -1523,7 +1523,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_ADD, 8, 0): // DADD dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_ADD, 8, 0): // DADD dst,src1,src2[,f]
DPARAM0 = DPARAM1 + DPARAM2;
break;
@@ -1533,7 +1533,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_ADDC, 8, 0): // DADDC dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_ADDC, 8, 0): // DADDC dst,src1,src2[,f]
DPARAM0 = DPARAM1 + DPARAM2 + (flags & FLAG_C);
break;
@@ -1546,7 +1546,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_SUB, 8, 0): // DSUB dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_SUB, 8, 0): // DSUB dst,src1,src2[,f]
DPARAM0 = DPARAM1 - DPARAM2;
break;
@@ -1556,7 +1556,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_SUBB, 8, 0): // DSUBB dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_SUBB, 8, 0): // DSUBB dst,src1,src2[,f]
DPARAM0 = DPARAM1 - DPARAM2 - (flags & FLAG_C);
break;
@@ -1569,7 +1569,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_CMP, 8, 1): // DCMP src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_CMP, 8, 1): // DCMP src1,src2[,f]
temp64 = DPARAM0 - DPARAM1;
flags = FLAGS64_NZCV_SUB(temp64, DPARAM0, DPARAM1);
break;
@@ -1632,7 +1632,7 @@ int drcbe_c::execute(code_handle &entry)
flags = FLAG_V;
break;
- case MAKE_OPCODE_SHORT(OP_AND, 8, 0): // DAND dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_AND, 8, 0): // DAND dst,src1,src2[,f]
DPARAM0 = DPARAM1 & DPARAM2;
break;
@@ -1642,12 +1642,12 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_TEST, 8, 1): // DTEST src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_TEST, 8, 1): // DTEST src1,src2[,f]
temp64 = DPARAM1 & DPARAM2;
flags = FLAGS64_NZ(temp64);
break;
- case MAKE_OPCODE_SHORT(OP_OR, 8, 0): // DOR dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_OR, 8, 0): // DOR dst,src1,src2[,f]
DPARAM0 = DPARAM1 | DPARAM2;
break;
@@ -1657,7 +1657,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_XOR, 8, 0): // DXOR dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_XOR, 8, 0): // DXOR dst,src1,src2[,f]
DPARAM0 = DPARAM1 ^ DPARAM2;
break;
@@ -1667,7 +1667,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_LZCNT, 8, 0): // DLZCNT dst,src
+ case MAKE_OPCODE_SHORT(OP_LZCNT, 8, 0): // DLZCNT dst,src
if ((UINT32)(DPARAM1 >> 32) != 0)
DPARAM0 = count_leading_zeros(DPARAM1 >> 32);
else
@@ -1683,7 +1683,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_BSWAP, 8, 0): // DBSWAP dst,src
+ case MAKE_OPCODE_SHORT(OP_BSWAP, 8, 0): // DBSWAP dst,src
temp64 = DPARAM1;
DPARAM0 = FLIPENDIAN_INT64(temp64);
break;
@@ -1694,7 +1694,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = FLIPENDIAN_INT64(temp64);
break;
- case MAKE_OPCODE_SHORT(OP_SHL, 8, 0): // DSHL dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_SHL, 8, 0): // DSHL dst,src,count[,f]
DPARAM0 = DPARAM1 << (DPARAM2 & 63);
break;
@@ -1706,7 +1706,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_SHR, 8, 0): // DSHR dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_SHR, 8, 0): // DSHR dst,src,count[,f]
DPARAM0 = DPARAM1 >> (DPARAM2 & 63);
break;
@@ -1718,7 +1718,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_SAR, 8, 0): // DSAR dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_SAR, 8, 0): // DSAR dst,src,count[,f]
DPARAM0 = (INT64)DPARAM1 >> (DPARAM2 & 63);
break;
@@ -1730,7 +1730,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_ROL, 8, 0): // DROL dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_ROL, 8, 0): // DROL dst,src,count[,f]
shift = DPARAM2 & 31;
DPARAM0 = (DPARAM1 << shift) | (DPARAM1 >> ((64 - shift) & 63));
break;
@@ -1743,7 +1743,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_ROLC, 8, 0): // DROLC dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_ROLC, 8, 0): // DROLC dst,src,count[,f]
shift = DPARAM2 & 63;
if (shift > 1)
DPARAM0 = (DPARAM1 << shift) | ((flags & FLAG_C) << (shift - 1)) | (DPARAM1 >> (65 - shift));
@@ -1764,7 +1764,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_ROR, 8, 0): // DROR dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_ROR, 8, 0): // DROR dst,src,count[,f]
shift = DPARAM2 & 63;
DPARAM0 = (DPARAM1 >> shift) | (DPARAM1 << ((64 - shift) & 63));
break;
@@ -1777,7 +1777,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_RORC, 8, 0): // DRORC dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_RORC, 8, 0): // DRORC dst,src,count[,f]
shift = DPARAM2 & 63;
if (shift > 1)
DPARAM0 = (DPARAM1 >> shift) | ((((UINT64)flags & FLAG_C) << 63) >> (shift - 1)) | (DPARAM1 << (65 - shift));
@@ -1801,23 +1801,23 @@ int drcbe_c::execute(code_handle &entry)
// ----------------------- 32-Bit Floating Point Operations -----------------------
- case MAKE_OPCODE_SHORT(OP_FLOAD, 4, 0): // FSLOAD dst,base,index
+ case MAKE_OPCODE_SHORT(OP_FLOAD, 4, 0): // FSLOAD dst,base,index
FSPARAM0 = inst[1].pfloat[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_FSTORE, 4, 0): // FSSTORE dst,base,index
+ case MAKE_OPCODE_SHORT(OP_FSTORE, 4, 0): // FSSTORE dst,base,index
inst[0].pfloat[PARAM1] = FSPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FREAD, 4, 0): // FSREAD dst,src1,space
+ case MAKE_OPCODE_SHORT(OP_FREAD, 4, 0): // FSREAD dst,src1,space
PARAM0 = m_space[PARAM2]->read_dword(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FWRITE, 4, 0): // FSWRITE dst,src1,space
+ case MAKE_OPCODE_SHORT(OP_FWRITE, 4, 0): // FSWRITE dst,src1,space
m_space[PARAM2]->write_dword(PARAM0, PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FMOV, 4, 1): // FSMOV dst,src[,c]
+ case MAKE_OPCODE_SHORT(OP_FMOV, 4, 1): // FSMOV dst,src[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -1826,133 +1826,133 @@ int drcbe_c::execute(code_handle &entry)
FSPARAM0 = FSPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4T, 4, 0): // FSTOI4T dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4T, 4, 0): // FSTOI4T dst,src1
if (FSPARAM1 >= 0)
*inst[0].pint32 = floor(FSPARAM1);
else
*inst[0].pint32 = ceil(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4R, 4, 0): // FSTOI4R dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4R, 4, 0): // FSTOI4R dst,src1
if (FSPARAM1 >= 0)
*inst[0].pint32 = floor(FSPARAM1 + 0.5f);
else
*inst[0].pint32 = ceil(FSPARAM1 - 0.5f);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4F, 4, 0): // FSTOI4F dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4F, 4, 0): // FSTOI4F dst,src1
*inst[0].pint32 = floor(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4C, 4, 0): // FSTOI4C dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4C, 4, 0): // FSTOI4C dst,src1
*inst[0].pint32 = ceil(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4, 4, 0): // FSTOI4 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4, 4, 0): // FSTOI4 dst,src1
*inst[0].pint32 = FSPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8T, 4, 0): // FSTOI8T dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8T, 4, 0): // FSTOI8T dst,src1
if (FSPARAM1 >= 0)
*inst[0].pint64 = floor(FSPARAM1);
else
*inst[0].pint64 = ceil(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8R, 4, 0): // FSTOI8R dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8R, 4, 0): // FSTOI8R dst,src1
if (FSPARAM1 >= 0)
*inst[0].pint64 = floor(FSPARAM1 + 0.5f);
else
*inst[0].pint64 = ceil(FSPARAM1 - 0.5f);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8F, 4, 0): // FSTOI8F dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8F, 4, 0): // FSTOI8F dst,src1
*inst[0].pint64 = floor(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8C, 4, 0): // FSTOI8C dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8C, 4, 0): // FSTOI8C dst,src1
*inst[0].pint64 = ceil(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8, 4, 0): // FSTOI8 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8, 4, 0): // FSTOI8 dst,src1
*inst[0].pint64 = FSPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FFRI4, 4, 0): // FSFRI4 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FFRI4, 4, 0): // FSFRI4 dst,src1
FSPARAM0 = *inst[1].pint32;
break;
- case MAKE_OPCODE_SHORT(OP_FFRI8, 4, 0): // FSFRI8 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FFRI8, 4, 0): // FSFRI8 dst,src1
FSPARAM0 = *inst[1].pint64;
break;
- case MAKE_OPCODE_SHORT(OP_FFRFD, 4, 0): // FSFRFD dst,src1
+ case MAKE_OPCODE_SHORT(OP_FFRFD, 4, 0): // FSFRFD dst,src1
FSPARAM0 = FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FADD, 4, 0): // FSADD dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FADD, 4, 0): // FSADD dst,src1,src2
FSPARAM0 = FSPARAM1 + FSPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FSUB, 4, 0): // FSSUB dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FSUB, 4, 0): // FSSUB dst,src1,src2
FSPARAM0 = FSPARAM1 - FSPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FCMP, 4, 1): // FSCMP src1,src2
+ case MAKE_OPCODE_SHORT(OP_FCMP, 4, 1): // FSCMP src1,src2
if (isnan(FSPARAM0) || isnan(FSPARAM1))
flags = FLAG_U;
else
flags = (FSPARAM0 < FSPARAM1) | ((FSPARAM0 == FSPARAM1) << 2);
break;
- case MAKE_OPCODE_SHORT(OP_FMUL, 4, 0): // FSMUL dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FMUL, 4, 0): // FSMUL dst,src1,src2
FSPARAM0 = FSPARAM1 * FSPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FDIV, 4, 0): // FSDIV dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FDIV, 4, 0): // FSDIV dst,src1,src2
FSPARAM0 = FSPARAM1 / FSPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FNEG, 4, 0): // FSNEG dst,src1
+ case MAKE_OPCODE_SHORT(OP_FNEG, 4, 0): // FSNEG dst,src1
FSPARAM0 = -FSPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FABS, 4, 0): // FSABS dst,src1
+ case MAKE_OPCODE_SHORT(OP_FABS, 4, 0): // FSABS dst,src1
FSPARAM0 = fabs(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FSQRT, 4, 0): // FSSQRT dst,src1
+ case MAKE_OPCODE_SHORT(OP_FSQRT, 4, 0): // FSSQRT dst,src1
FSPARAM0 = sqrt(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FRECIP, 4, 0): // FSRECIP dst,src1
+ case MAKE_OPCODE_SHORT(OP_FRECIP, 4, 0): // FSRECIP dst,src1
FSPARAM0 = 1.0f / FSPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FRSQRT, 4, 0): // FSRSQRT dst,src1
+ case MAKE_OPCODE_SHORT(OP_FRSQRT, 4, 0): // FSRSQRT dst,src1
FSPARAM0 = 1.0f / sqrt(FSPARAM1);
break;
// ----------------------- 64-Bit Floating Point Operations -----------------------
- case MAKE_OPCODE_SHORT(OP_FLOAD, 8, 0): // FDLOAD dst,base,index
+ case MAKE_OPCODE_SHORT(OP_FLOAD, 8, 0): // FDLOAD dst,base,index
FDPARAM0 = inst[1].pdouble[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_FSTORE, 8, 0): // FDSTORE dst,base,index
+ case MAKE_OPCODE_SHORT(OP_FSTORE, 8, 0): // FDSTORE dst,base,index
inst[0].pdouble[PARAM1] = FDPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FREAD, 8, 0): // FDREAD dst,src1,space
+ case MAKE_OPCODE_SHORT(OP_FREAD, 8, 0): // FDREAD dst,src1,space
DPARAM0 = m_space[PARAM2]->read_qword(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FWRITE, 8, 0): // FDWRITE dst,src1,space
+ case MAKE_OPCODE_SHORT(OP_FWRITE, 8, 0): // FDWRITE dst,src1,space
m_space[PARAM2]->write_qword(PARAM0, DPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FMOV, 8, 1): // FDMOV dst,src[,c]
+ case MAKE_OPCODE_SHORT(OP_FMOV, 8, 1): // FDMOV dst,src[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -1961,114 +1961,114 @@ int drcbe_c::execute(code_handle &entry)
FDPARAM0 = FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4T, 8, 0): // FDTOI4T dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4T, 8, 0): // FDTOI4T dst,src1
if (FDPARAM1 >= 0)
*inst[0].pint32 = floor(FDPARAM1);
else
*inst[0].pint32 = ceil(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4R, 8, 0): // FDTOI4R dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4R, 8, 0): // FDTOI4R dst,src1
if (FDPARAM1 >= 0)
*inst[0].pint32 = floor(FDPARAM1 + 0.5);
else
*inst[0].pint32 = ceil(FDPARAM1 - 0.5);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4F, 8, 0): // FDTOI4F dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4F, 8, 0): // FDTOI4F dst,src1
*inst[0].pint32 = floor(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4C, 8, 0): // FDTOI4C dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4C, 8, 0): // FDTOI4C dst,src1
*inst[0].pint32 = ceil(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4, 8, 0): // FDTOI4 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4, 8, 0): // FDTOI4 dst,src1
*inst[0].pint32 = FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8T, 8, 0): // FDTOI8T dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8T, 8, 0): // FDTOI8T dst,src1
if (FDPARAM1 >= 0)
*inst[0].pint64 = floor(FDPARAM1);
else
*inst[0].pint64 = ceil(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8R, 8, 0): // FDTOI8R dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8R, 8, 0): // FDTOI8R dst,src1
if (FDPARAM1 >= 0)
*inst[0].pint64 = floor(FDPARAM1 + 0.5);
else
*inst[0].pint64 = ceil(FDPARAM1 - 0.5);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8F, 8, 0): // FDTOI8F dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8F, 8, 0): // FDTOI8F dst,src1
*inst[0].pint64 = floor(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8C, 8, 0): // FDTOI8C dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8C, 8, 0): // FDTOI8C dst,src1
*inst[0].pint64 = ceil(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8, 8, 0): // FDTOI8 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8, 8, 0): // FDTOI8 dst,src1
*inst[0].pint64 = FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FFRI4, 8, 0): // FDFRI4 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FFRI4, 8, 0): // FDFRI4 dst,src1
FDPARAM0 = *inst[1].pint32;
break;
- case MAKE_OPCODE_SHORT(OP_FFRI8, 8, 0): // FDFRI8 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FFRI8, 8, 0): // FDFRI8 dst,src1
FDPARAM0 = *inst[1].pint64;
break;
- case MAKE_OPCODE_SHORT(OP_FFRFS, 8, 0): // FDFRFS dst,src1
+ case MAKE_OPCODE_SHORT(OP_FFRFS, 8, 0): // FDFRFS dst,src1
FDPARAM0 = FSPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FRNDS, 8, 0): // FDRNDS dst,src1
+ case MAKE_OPCODE_SHORT(OP_FRNDS, 8, 0): // FDRNDS dst,src1
FDPARAM0 = (float)FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FADD, 8, 0): // FDADD dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FADD, 8, 0): // FDADD dst,src1,src2
FDPARAM0 = FDPARAM1 + FDPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FSUB, 8, 0): // FDSUB dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FSUB, 8, 0): // FDSUB dst,src1,src2
FDPARAM0 = FDPARAM1 - FDPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FCMP, 8, 1): // FDCMP src1,src2
+ case MAKE_OPCODE_SHORT(OP_FCMP, 8, 1): // FDCMP src1,src2
if (isnan(FDPARAM0) || isnan(FDPARAM1))
flags = FLAG_U;
else
flags = (FDPARAM0 < FDPARAM1) | ((FDPARAM0 == FDPARAM1) << 2);
break;
- case MAKE_OPCODE_SHORT(OP_FMUL, 8, 0): // FDMUL dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FMUL, 8, 0): // FDMUL dst,src1,src2
FDPARAM0 = FDPARAM1 * FDPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FDIV, 8, 0): // FDDIV dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FDIV, 8, 0): // FDDIV dst,src1,src2
FDPARAM0 = FDPARAM1 / FDPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FNEG, 8, 0): // FDNEG dst,src1
+ case MAKE_OPCODE_SHORT(OP_FNEG, 8, 0): // FDNEG dst,src1
FDPARAM0 = -FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FABS, 8, 0): // FDABS dst,src1
+ case MAKE_OPCODE_SHORT(OP_FABS, 8, 0): // FDABS dst,src1
FDPARAM0 = fabs(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FSQRT, 8, 0): // FDSQRT dst,src1
+ case MAKE_OPCODE_SHORT(OP_FSQRT, 8, 0): // FDSQRT dst,src1
FDPARAM0 = sqrt(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FRECIP, 8, 0): // FDRECIP dst,src1
+ case MAKE_OPCODE_SHORT(OP_FRECIP, 8, 0): // FDRECIP dst,src1
FDPARAM0 = 1.0 / FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FRSQRT, 8, 0): // FDRSQRT dst,src1
+ case MAKE_OPCODE_SHORT(OP_FRSQRT, 8, 0): // FDRSQRT dst,src1
FDPARAM0 = 1.0 / sqrt(FDPARAM1);
break;
@@ -2111,7 +2111,7 @@ void drcbe_c::output_parameter(drcbec_instruction **dstptr, void **immedptr, int
immed = (UINT8 *)immed + size;
}
break;
-
+
// int registers point to the appropriate part of the integer register state
case parameter::PTYPE_INT_REGISTER:
if (size == 4)
@@ -2137,7 +2137,7 @@ void drcbe_c::output_parameter(drcbec_instruction **dstptr, void **immedptr, int
case parameter::PTYPE_MEMORY:
(dst++)->v = param.memory();
break;
-
+
// ignore these parameters: they are directly encoded in the opcode
case parameter::PTYPE_SIZE:
case parameter::PTYPE_SIZE_SCALE:
@@ -2153,16 +2153,16 @@ void drcbe_c::output_parameter(drcbec_instruction **dstptr, void **immedptr, int
case parameter::PTYPE_CODE_HANDLE:
(dst++)->handle = &param.handle();
break;
-
+
// code label just contains the label value
case parameter::PTYPE_CODE_LABEL:
return output_parameter(dstptr, immedptr, size, UINT32(param.label()));
-
+
// c_function just points to the C function
case parameter::PTYPE_C_FUNCTION:
(dst++)->cfunc = param.cfunc();
break;
-
+
default:
fatalerror("Unexpected param->type");
break;
diff --git a/src/emu/cpu/drcbec.h b/src/emu/cpu/drcbec.h
index 93bdb68937f..f74face8497 100644
--- a/src/emu/cpu/drcbec.h
+++ b/src/emu/cpu/drcbec.h
@@ -59,7 +59,7 @@ public:
// construction/destruction
drcbe_c(drcuml_state &drcuml, device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits);
virtual ~drcbe_c();
-
+
// required overrides
virtual void reset();
virtual int execute(uml::code_handle &entry);
diff --git a/src/emu/cpu/drcbeut.c b/src/emu/cpu/drcbeut.c
index a2552b25dbe..b33d2207a1c 100644
--- a/src/emu/cpu/drcbeut.c
+++ b/src/emu/cpu/drcbeut.c
@@ -154,7 +154,7 @@ void drc_hash_table::block_end(drcuml_block &block)
//-------------------------------------------------
-// set_default_codeptr - change the default
+// set_default_codeptr - change the default
// codeptr
//-------------------------------------------------
@@ -182,7 +182,7 @@ void drc_hash_table::set_default_codeptr(drccodeptr nocodeptr)
//-------------------------------------------------
-// set_codeptr - set the codeptr for the given
+// set_codeptr - set the codeptr for the given
// mode/pc
//-------------------------------------------------
@@ -346,7 +346,7 @@ void drc_map_variables::block_end(drcuml_block &block)
//-------------------------------------------------
-// set_value - set a map value for the given
+// set_value - set a map value for the given
// code pointer
//-------------------------------------------------
@@ -374,7 +374,7 @@ void drc_map_variables::set_value(drccodeptr codebase, UINT32 mapvar, UINT32 new
//-------------------------------------------------
-// get_value - return a map value for the given
+// get_value - return a map value for the given
// code pointer
//-------------------------------------------------
@@ -442,7 +442,7 @@ UINT32 drc_map_variables::static_get_value(drc_map_variables &map, drccodeptr co
//-------------------------------------------------
-// get_last_value - return the most recently set
+// get_last_value - return the most recently set
// map value
//-------------------------------------------------
@@ -503,8 +503,8 @@ void drc_label_list::block_end(drcuml_block &block)
//-------------------------------------------------
-// get_codeptr - find or allocate a new label;
-// returns NULL and requests an OOB callback if
+// get_codeptr - find or allocate a new label;
+// returns NULL and requests an OOB callback if
// undefined
//-------------------------------------------------
@@ -534,7 +534,7 @@ void drc_label_list::set_codeptr(uml::code_label label, drccodeptr codeptr)
//-------------------------------------------------
-// reset - reset a label list (add all entries to
+// reset - reset a label list (add all entries to
// the free list)
//-------------------------------------------------
@@ -555,7 +555,7 @@ void drc_label_list::reset(bool fatal_on_leftovers)
//-------------------------------------------------
-// find_or_allocate - look up a label and
+// find_or_allocate - look up a label and
// allocate a new one if not found
//-------------------------------------------------
@@ -580,7 +580,7 @@ drc_label_list::label_entry *drc_label_list::find_or_allocate(uml::code_label la
//-------------------------------------------------
-// oob_callback - out-of-band codegen callback
+// oob_callback - out-of-band codegen callback
// for labels
//-------------------------------------------------
diff --git a/src/emu/cpu/drcbeut.h b/src/emu/cpu/drcbeut.h
index 4c707bb3c2e..250d3328000 100644
--- a/src/emu/cpu/drcbeut.h
+++ b/src/emu/cpu/drcbeut.h
@@ -57,7 +57,7 @@ class drc_hash_table
public:
// construction/destruction
drc_hash_table(drc_cache &cache, UINT32 modes, UINT8 addrbits, UINT8 ignorebits);
-
+
// getters
drccodeptr ***base() const { return m_base; }
UINT8 l1bits() const { return m_l1bits; }
@@ -67,7 +67,7 @@ public:
offs_t l1mask() const { return m_l1mask; }
offs_t l2mask() const { return m_l2mask; }
bool is_mode_populated(UINT32 mode) const { return m_base[mode] != m_emptyl1; }
-
+
// set up and configuration
bool reset();
void set_default_codeptr(drccodeptr code);
diff --git a/src/emu/cpu/drcbex64.c b/src/emu/cpu/drcbex64.c
index 4a3e5503194..aba05b1d608 100644
--- a/src/emu/cpu/drcbex64.c
+++ b/src/emu/cpu/drcbex64.c
@@ -332,89 +332,89 @@ static const UINT8 fprnd_map[4] =
const drcbe_x64::opcode_table_entry drcbe_x64::s_opcode_table_source[] =
{
// Compile-time opcodes
- { uml::OP_HANDLE, &drcbe_x64::op_handle }, // HANDLE handle
- { uml::OP_HASH, &drcbe_x64::op_hash }, // HASH mode,pc
- { uml::OP_LABEL, &drcbe_x64::op_label }, // LABEL imm
- { uml::OP_COMMENT, &drcbe_x64::op_comment }, // COMMENT string
- { uml::OP_MAPVAR, &drcbe_x64::op_mapvar }, // MAPVAR mapvar,value
+ { uml::OP_HANDLE, &drcbe_x64::op_handle }, // HANDLE handle
+ { uml::OP_HASH, &drcbe_x64::op_hash }, // HASH mode,pc
+ { uml::OP_LABEL, &drcbe_x64::op_label }, // LABEL imm
+ { uml::OP_COMMENT, &drcbe_x64::op_comment }, // COMMENT string
+ { uml::OP_MAPVAR, &drcbe_x64::op_mapvar }, // MAPVAR mapvar,value
// Control Flow Operations
- { uml::OP_NOP, &drcbe_x64::op_nop }, // NOP
- { uml::OP_DEBUG, &drcbe_x64::op_debug }, // DEBUG pc
- { uml::OP_EXIT, &drcbe_x64::op_exit }, // EXIT src1[,c]
- { uml::OP_HASHJMP, &drcbe_x64::op_hashjmp }, // HASHJMP mode,pc,handle
- { uml::OP_JMP, &drcbe_x64::op_jmp }, // JMP imm[,c]
- { uml::OP_EXH, &drcbe_x64::op_exh }, // EXH handle,param[,c]
- { uml::OP_CALLH, &drcbe_x64::op_callh }, // CALLH handle[,c]
- { uml::OP_RET, &drcbe_x64::op_ret }, // RET [c]
- { uml::OP_CALLC, &drcbe_x64::op_callc }, // CALLC func,ptr[,c]
- { uml::OP_RECOVER, &drcbe_x64::op_recover }, // RECOVER dst,mapvar
+ { uml::OP_NOP, &drcbe_x64::op_nop }, // NOP
+ { uml::OP_DEBUG, &drcbe_x64::op_debug }, // DEBUG pc
+ { uml::OP_EXIT, &drcbe_x64::op_exit }, // EXIT src1[,c]
+ { uml::OP_HASHJMP, &drcbe_x64::op_hashjmp }, // HASHJMP mode,pc,handle
+ { uml::OP_JMP, &drcbe_x64::op_jmp }, // JMP imm[,c]
+ { uml::OP_EXH, &drcbe_x64::op_exh }, // EXH handle,param[,c]
+ { uml::OP_CALLH, &drcbe_x64::op_callh }, // CALLH handle[,c]
+ { uml::OP_RET, &drcbe_x64::op_ret }, // RET [c]
+ { uml::OP_CALLC, &drcbe_x64::op_callc }, // CALLC func,ptr[,c]
+ { uml::OP_RECOVER, &drcbe_x64::op_recover }, // RECOVER dst,mapvar
// Internal Register Operations
- { uml::OP_SETFMOD, &drcbe_x64::op_setfmod }, // SETFMOD src
- { uml::OP_GETFMOD, &drcbe_x64::op_getfmod }, // GETFMOD dst
- { uml::OP_GETEXP, &drcbe_x64::op_getexp }, // GETEXP dst
- { uml::OP_GETFLGS, &drcbe_x64::op_getflgs }, // GETFLGS dst[,f]
- { uml::OP_SAVE, &drcbe_x64::op_save }, // SAVE dst
- { uml::OP_RESTORE, &drcbe_x64::op_restore }, // RESTORE dst
+ { uml::OP_SETFMOD, &drcbe_x64::op_setfmod }, // SETFMOD src
+ { uml::OP_GETFMOD, &drcbe_x64::op_getfmod }, // GETFMOD dst
+ { uml::OP_GETEXP, &drcbe_x64::op_getexp }, // GETEXP dst
+ { uml::OP_GETFLGS, &drcbe_x64::op_getflgs }, // GETFLGS dst[,f]
+ { uml::OP_SAVE, &drcbe_x64::op_save }, // SAVE dst
+ { uml::OP_RESTORE, &drcbe_x64::op_restore }, // RESTORE dst
// Integer Operations
- { uml::OP_LOAD, &drcbe_x64::op_load }, // LOAD dst,base,index,size
- { uml::OP_LOADS, &drcbe_x64::op_loads }, // LOADS dst,base,index,size
- { uml::OP_STORE, &drcbe_x64::op_store }, // STORE base,index,src,size
- { uml::OP_READ, &drcbe_x64::op_read }, // READ dst,src1,spacesize
+ { uml::OP_LOAD, &drcbe_x64::op_load }, // LOAD dst,base,index,size
+ { uml::OP_LOADS, &drcbe_x64::op_loads }, // LOADS dst,base,index,size
+ { uml::OP_STORE, &drcbe_x64::op_store }, // STORE base,index,src,size
+ { uml::OP_READ, &drcbe_x64::op_read }, // READ dst,src1,spacesize
{ uml::OP_READM, &drcbe_x64::op_readm }, // READM dst,src1,mask,spacesize
- { uml::OP_WRITE, &drcbe_x64::op_write }, // WRITE dst,src1,spacesize
- { uml::OP_WRITEM, &drcbe_x64::op_writem }, // WRITEM dst,src1,spacesize
- { uml::OP_CARRY, &drcbe_x64::op_carry }, // CARRY src,bitnum
- { uml::OP_SET, &drcbe_x64::op_set }, // SET dst,c
- { uml::OP_MOV, &drcbe_x64::op_mov }, // MOV dst,src[,c]
- { uml::OP_SEXT, &drcbe_x64::op_sext }, // SEXT dst,src
- { uml::OP_ROLAND, &drcbe_x64::op_roland }, // ROLAND dst,src1,src2,src3
- { uml::OP_ROLINS, &drcbe_x64::op_rolins }, // ROLINS dst,src1,src2,src3
- { uml::OP_ADD, &drcbe_x64::op_add }, // ADD dst,src1,src2[,f]
- { uml::OP_ADDC, &drcbe_x64::op_addc }, // ADDC dst,src1,src2[,f]
- { uml::OP_SUB, &drcbe_x64::op_sub }, // SUB dst,src1,src2[,f]
- { uml::OP_SUBB, &drcbe_x64::op_subc }, // SUBB dst,src1,src2[,f]
- { uml::OP_CMP, &drcbe_x64::op_cmp }, // CMP src1,src2[,f]
+ { uml::OP_WRITE, &drcbe_x64::op_write }, // WRITE dst,src1,spacesize
+ { uml::OP_WRITEM, &drcbe_x64::op_writem }, // WRITEM dst,src1,spacesize
+ { uml::OP_CARRY, &drcbe_x64::op_carry }, // CARRY src,bitnum
+ { uml::OP_SET, &drcbe_x64::op_set }, // SET dst,c
+ { uml::OP_MOV, &drcbe_x64::op_mov }, // MOV dst,src[,c]
+ { uml::OP_SEXT, &drcbe_x64::op_sext }, // SEXT dst,src
+ { uml::OP_ROLAND, &drcbe_x64::op_roland }, // ROLAND dst,src1,src2,src3
+ { uml::OP_ROLINS, &drcbe_x64::op_rolins }, // ROLINS dst,src1,src2,src3
+ { uml::OP_ADD, &drcbe_x64::op_add }, // ADD dst,src1,src2[,f]
+ { uml::OP_ADDC, &drcbe_x64::op_addc }, // ADDC dst,src1,src2[,f]
+ { uml::OP_SUB, &drcbe_x64::op_sub }, // SUB dst,src1,src2[,f]
+ { uml::OP_SUBB, &drcbe_x64::op_subc }, // SUBB dst,src1,src2[,f]
+ { uml::OP_CMP, &drcbe_x64::op_cmp }, // CMP src1,src2[,f]
{ uml::OP_MULU, &drcbe_x64::op_mulu }, // MULU dst,edst,src1,src2[,f]
{ uml::OP_MULS, &drcbe_x64::op_muls }, // MULS dst,edst,src1,src2[,f]
{ uml::OP_DIVU, &drcbe_x64::op_divu }, // DIVU dst,edst,src1,src2[,f]
{ uml::OP_DIVS, &drcbe_x64::op_divs }, // DIVS dst,edst,src1,src2[,f]
- { uml::OP_AND, &drcbe_x64::op_and }, // AND dst,src1,src2[,f]
- { uml::OP_TEST, &drcbe_x64::op_test }, // TEST src1,src2[,f]
- { uml::OP_OR, &drcbe_x64::op_or }, // OR dst,src1,src2[,f]
- { uml::OP_XOR, &drcbe_x64::op_xor }, // XOR dst,src1,src2[,f]
- { uml::OP_LZCNT, &drcbe_x64::op_lzcnt }, // LZCNT dst,src[,f]
- { uml::OP_BSWAP, &drcbe_x64::op_bswap }, // BSWAP dst,src
- { uml::OP_SHL, &drcbe_x64::op_shl }, // SHL dst,src,count[,f]
- { uml::OP_SHR, &drcbe_x64::op_shr }, // SHR dst,src,count[,f]
- { uml::OP_SAR, &drcbe_x64::op_sar }, // SAR dst,src,count[,f]
- { uml::OP_ROL, &drcbe_x64::op_rol }, // ROL dst,src,count[,f]
- { uml::OP_ROLC, &drcbe_x64::op_rolc }, // ROLC dst,src,count[,f]
- { uml::OP_ROR, &drcbe_x64::op_ror }, // ROR dst,src,count[,f]
- { uml::OP_RORC, &drcbe_x64::op_rorc }, // RORC dst,src,count[,f]
+ { uml::OP_AND, &drcbe_x64::op_and }, // AND dst,src1,src2[,f]
+ { uml::OP_TEST, &drcbe_x64::op_test }, // TEST src1,src2[,f]
+ { uml::OP_OR, &drcbe_x64::op_or }, // OR dst,src1,src2[,f]
+ { uml::OP_XOR, &drcbe_x64::op_xor }, // XOR dst,src1,src2[,f]
+ { uml::OP_LZCNT, &drcbe_x64::op_lzcnt }, // LZCNT dst,src[,f]
+ { uml::OP_BSWAP, &drcbe_x64::op_bswap }, // BSWAP dst,src
+ { uml::OP_SHL, &drcbe_x64::op_shl }, // SHL dst,src,count[,f]
+ { uml::OP_SHR, &drcbe_x64::op_shr }, // SHR dst,src,count[,f]
+ { uml::OP_SAR, &drcbe_x64::op_sar }, // SAR dst,src,count[,f]
+ { uml::OP_ROL, &drcbe_x64::op_rol }, // ROL dst,src,count[,f]
+ { uml::OP_ROLC, &drcbe_x64::op_rolc }, // ROLC dst,src,count[,f]
+ { uml::OP_ROR, &drcbe_x64::op_ror }, // ROR dst,src,count[,f]
+ { uml::OP_RORC, &drcbe_x64::op_rorc }, // RORC dst,src,count[,f]
// Floating Point Operations
- { uml::OP_FLOAD, &drcbe_x64::op_fload }, // FLOAD dst,base,index
- { uml::OP_FSTORE, &drcbe_x64::op_fstore }, // FSTORE base,index,src
- { uml::OP_FREAD, &drcbe_x64::op_fread }, // FREAD dst,space,src1
- { uml::OP_FWRITE, &drcbe_x64::op_fwrite }, // FWRITE space,dst,src1
- { uml::OP_FMOV, &drcbe_x64::op_fmov }, // FMOV dst,src1[,c]
- { uml::OP_FTOINT, &drcbe_x64::op_ftoint }, // FTOINT dst,src1,size,round
- { uml::OP_FFRINT, &drcbe_x64::op_ffrint }, // FFRINT dst,src1,size
- { uml::OP_FFRFLT, &drcbe_x64::op_ffrflt }, // FFRFLT dst,src1,size
- { uml::OP_FRNDS, &drcbe_x64::op_frnds }, // FRNDS dst,src1
- { uml::OP_FADD, &drcbe_x64::op_fadd }, // FADD dst,src1,src2
- { uml::OP_FSUB, &drcbe_x64::op_fsub }, // FSUB dst,src1,src2
- { uml::OP_FCMP, &drcbe_x64::op_fcmp }, // FCMP src1,src2
- { uml::OP_FMUL, &drcbe_x64::op_fmul }, // FMUL dst,src1,src2
- { uml::OP_FDIV, &drcbe_x64::op_fdiv }, // FDIV dst,src1,src2
- { uml::OP_FNEG, &drcbe_x64::op_fneg }, // FNEG dst,src1
- { uml::OP_FABS, &drcbe_x64::op_fabs }, // FABS dst,src1
- { uml::OP_FSQRT, &drcbe_x64::op_fsqrt }, // FSQRT dst,src1
- { uml::OP_FRECIP, &drcbe_x64::op_frecip }, // FRECIP dst,src1
- { uml::OP_FRSQRT, &drcbe_x64::op_frsqrt } // FRSQRT dst,src1
+ { uml::OP_FLOAD, &drcbe_x64::op_fload }, // FLOAD dst,base,index
+ { uml::OP_FSTORE, &drcbe_x64::op_fstore }, // FSTORE base,index,src
+ { uml::OP_FREAD, &drcbe_x64::op_fread }, // FREAD dst,space,src1
+ { uml::OP_FWRITE, &drcbe_x64::op_fwrite }, // FWRITE space,dst,src1
+ { uml::OP_FMOV, &drcbe_x64::op_fmov }, // FMOV dst,src1[,c]
+ { uml::OP_FTOINT, &drcbe_x64::op_ftoint }, // FTOINT dst,src1,size,round
+ { uml::OP_FFRINT, &drcbe_x64::op_ffrint }, // FFRINT dst,src1,size
+ { uml::OP_FFRFLT, &drcbe_x64::op_ffrflt }, // FFRFLT dst,src1,size
+ { uml::OP_FRNDS, &drcbe_x64::op_frnds }, // FRNDS dst,src1
+ { uml::OP_FADD, &drcbe_x64::op_fadd }, // FADD dst,src1,src2
+ { uml::OP_FSUB, &drcbe_x64::op_fsub }, // FSUB dst,src1,src2
+ { uml::OP_FCMP, &drcbe_x64::op_fcmp }, // FCMP src1,src2
+ { uml::OP_FMUL, &drcbe_x64::op_fmul }, // FMUL dst,src1,src2
+ { uml::OP_FDIV, &drcbe_x64::op_fdiv }, // FDIV dst,src1,src2
+ { uml::OP_FNEG, &drcbe_x64::op_fneg }, // FNEG dst,src1
+ { uml::OP_FABS, &drcbe_x64::op_fabs }, // FABS dst,src1
+ { uml::OP_FSQRT, &drcbe_x64::op_fsqrt }, // FSQRT dst,src1
+ { uml::OP_FRECIP, &drcbe_x64::op_frecip }, // FRECIP dst,src1
+ { uml::OP_FRSQRT, &drcbe_x64::op_frsqrt } // FRSQRT dst,src1
};
@@ -477,8 +477,8 @@ drcbe_x64::be_parameter::be_parameter(drcbe_x64 &drcbe, const parameter &param,
//-------------------------------------------------
-// select_register - select a register to use,
-// avoiding conflicts with the optional
+// select_register - select a register to use,
+// avoiding conflicts with the optional
// checkparam
//-------------------------------------------------
@@ -505,8 +505,8 @@ inline int drcbe_x64::be_parameter::select_register(int defreg, const be_paramet
//-------------------------------------------------
-// select_register - select a register to use,
-// avoiding conflicts with the optional
+// select_register - select a register to use,
+// avoiding conflicts with the optional
// checkparam
//-------------------------------------------------
@@ -777,7 +777,7 @@ void drcbe_x64::reset()
//-------------------------------------------------
-// execute - execute a block of code referenced
+// execute - execute a block of code referenced
// by the given handle
//-------------------------------------------------
@@ -853,7 +853,7 @@ void drcbe_x64::generate(drcuml_block &block, const instruction *instlist, UINT3
//-------------------------------------------------
-// hash_exists - return true if the given mode/pc
+// hash_exists - return true if the given mode/pc
// exists in the hash table
//-------------------------------------------------
@@ -864,7 +864,7 @@ bool drcbe_x64::hash_exists(UINT32 mode, UINT32 pc)
//-------------------------------------------------
-// get_info - return information about the
+// get_info - return information about the
// back-end implementation
//-------------------------------------------------
@@ -4018,7 +4018,7 @@ void drcbe_x64::op_set(x86code *&dst, const instruction &inst)
void drcbe_x64::op_mov(x86code *&dst, const instruction &inst)
{
x86code *savedst = dst;
-
+
// validate instruction
assert(inst.size() == 4 || inst.size() == 8);
assert_any_condition(inst);
diff --git a/src/emu/cpu/drcbex64.h b/src/emu/cpu/drcbex64.h
index 788ccfa5a66..277046d1df2 100644
--- a/src/emu/cpu/drcbex64.h
+++ b/src/emu/cpu/drcbex64.h
@@ -63,7 +63,7 @@ public:
// construction/destruction
drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits);
virtual ~drcbe_x64();
-
+
// required overrides
virtual void reset();
virtual int execute(uml::code_handle &entry);
@@ -96,7 +96,7 @@ private:
be_parameter(const be_parameter &param) : m_type(param.m_type), m_value(param.m_value) { }
be_parameter(UINT64 val) : m_type(PTYPE_IMMEDIATE), m_value(val) { }
be_parameter(drcbe_x64 &drcbe, const uml::parameter &param, UINT32 allowed);
-
+
// creators for types that don't safely default
static inline be_parameter make_ireg(int regnum) { assert(regnum >= 0 && regnum < x64emit::REG_MAX); return be_parameter(PTYPE_INT_REGISTER, regnum); }
static inline be_parameter make_freg(int regnum) { assert(regnum >= 0 && regnum < x64emit::REG_MAX); return be_parameter(PTYPE_FLOAT_REGISTER, regnum); }
@@ -107,7 +107,7 @@ private:
// operators
bool operator==(const be_parameter &rhs) const { return (m_type == rhs.m_type && m_value == rhs.m_value); }
bool operator!=(const be_parameter &rhs) const { return (m_type != rhs.m_type || m_value != rhs.m_value); }
-
+
// getters
be_parameter_type type() const { return m_type; }
UINT64 immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
@@ -115,14 +115,14 @@ private:
int freg() const { assert(m_type == PTYPE_FLOAT_REGISTER); assert(m_value >= 0 && m_value < x64emit::REG_MAX); return m_value; }
int vreg() const { assert(m_type == PTYPE_VECTOR_REGISTER); assert(m_value >= 0 && m_value < x64emit::REG_MAX); return m_value; }
void *memory() const { assert(m_type == PTYPE_MEMORY); return reinterpret_cast<void *>(m_value); }
-
+
// type queries
bool is_immediate() const { return (m_type == PTYPE_IMMEDIATE); }
bool is_int_register() const { return (m_type == PTYPE_INT_REGISTER); }
bool is_float_register() const { return (m_type == PTYPE_FLOAT_REGISTER); }
bool is_vector_register() const { return (m_type == PTYPE_VECTOR_REGISTER); }
bool is_memory() const { return (m_type == PTYPE_MEMORY); }
-
+
// other queries
bool is_immediate_value(UINT64 value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
@@ -130,7 +130,7 @@ private:
int select_register(int defreg) const;
int select_register(int defreg, const be_parameter &checkparam) const;
int select_register(int defreg, const be_parameter &checkparam, const be_parameter &checkparam2) const;
-
+
private:
// private constructor
be_parameter(be_parameter_type type, be_parameter_value value) : m_type(type), m_value(value) { }
diff --git a/src/emu/cpu/drcbex86.c b/src/emu/cpu/drcbex86.c
index 361f4662a24..3419a988125 100644
--- a/src/emu/cpu/drcbex86.c
+++ b/src/emu/cpu/drcbex86.c
@@ -1,6 +1,6 @@
/***************************************************************************
- drcbex86.c
+ drcbex86.c
32-bit x86 back-end for the universal machine language.
@@ -216,89 +216,89 @@ static const UINT16 fp_control[4] =
const drcbe_x86::opcode_table_entry drcbe_x86::s_opcode_table_source[] =
{
// Compile-time opcodes
- { uml::OP_HANDLE, &drcbe_x86::op_handle }, // HANDLE handle
- { uml::OP_HASH, &drcbe_x86::op_hash }, // HASH mode,pc
- { uml::OP_LABEL, &drcbe_x86::op_label }, // LABEL imm
- { uml::OP_COMMENT, &drcbe_x86::op_comment }, // COMMENT string
- { uml::OP_MAPVAR, &drcbe_x86::op_mapvar }, // MAPVAR mapvar,value
+ { uml::OP_HANDLE, &drcbe_x86::op_handle }, // HANDLE handle
+ { uml::OP_HASH, &drcbe_x86::op_hash }, // HASH mode,pc
+ { uml::OP_LABEL, &drcbe_x86::op_label }, // LABEL imm
+ { uml::OP_COMMENT, &drcbe_x86::op_comment }, // COMMENT string
+ { uml::OP_MAPVAR, &drcbe_x86::op_mapvar }, // MAPVAR mapvar,value
// Control Flow Operations
- { uml::OP_NOP, &drcbe_x86::op_nop }, // NOP
- { uml::OP_DEBUG, &drcbe_x86::op_debug }, // DEBUG pc
- { uml::OP_EXIT, &drcbe_x86::op_exit }, // EXIT src1[,c]
- { uml::OP_HASHJMP, &drcbe_x86::op_hashjmp }, // HASHJMP mode,pc,handle
- { uml::OP_JMP, &drcbe_x86::op_jmp }, // JMP imm[,c]
- { uml::OP_EXH, &drcbe_x86::op_exh }, // EXH handle,param[,c]
- { uml::OP_CALLH, &drcbe_x86::op_callh }, // CALLH handle[,c]
- { uml::OP_RET, &drcbe_x86::op_ret }, // RET [c]
- { uml::OP_CALLC, &drcbe_x86::op_callc }, // CALLC func,ptr[,c]
- { uml::OP_RECOVER, &drcbe_x86::op_recover }, // RECOVER dst,mapvar
+ { uml::OP_NOP, &drcbe_x86::op_nop }, // NOP
+ { uml::OP_DEBUG, &drcbe_x86::op_debug }, // DEBUG pc
+ { uml::OP_EXIT, &drcbe_x86::op_exit }, // EXIT src1[,c]
+ { uml::OP_HASHJMP, &drcbe_x86::op_hashjmp }, // HASHJMP mode,pc,handle
+ { uml::OP_JMP, &drcbe_x86::op_jmp }, // JMP imm[,c]
+ { uml::OP_EXH, &drcbe_x86::op_exh }, // EXH handle,param[,c]
+ { uml::OP_CALLH, &drcbe_x86::op_callh }, // CALLH handle[,c]
+ { uml::OP_RET, &drcbe_x86::op_ret }, // RET [c]
+ { uml::OP_CALLC, &drcbe_x86::op_callc }, // CALLC func,ptr[,c]
+ { uml::OP_RECOVER, &drcbe_x86::op_recover }, // RECOVER dst,mapvar
// Internal Register Operations
- { uml::OP_SETFMOD, &drcbe_x86::op_setfmod }, // SETFMOD src
- { uml::OP_GETFMOD, &drcbe_x86::op_getfmod }, // GETFMOD dst
- { uml::OP_GETEXP, &drcbe_x86::op_getexp }, // GETEXP dst
- { uml::OP_GETFLGS, &drcbe_x86::op_getflgs }, // GETFLGS dst[,f]
- { uml::OP_SAVE, &drcbe_x86::op_save }, // SAVE dst
- { uml::OP_RESTORE, &drcbe_x86::op_restore }, // RESTORE dst
+ { uml::OP_SETFMOD, &drcbe_x86::op_setfmod }, // SETFMOD src
+ { uml::OP_GETFMOD, &drcbe_x86::op_getfmod }, // GETFMOD dst
+ { uml::OP_GETEXP, &drcbe_x86::op_getexp }, // GETEXP dst
+ { uml::OP_GETFLGS, &drcbe_x86::op_getflgs }, // GETFLGS dst[,f]
+ { uml::OP_SAVE, &drcbe_x86::op_save }, // SAVE dst
+ { uml::OP_RESTORE, &drcbe_x86::op_restore }, // RESTORE dst
// Integer Operations
- { uml::OP_LOAD, &drcbe_x86::op_load }, // LOAD dst,base,index,size
- { uml::OP_LOADS, &drcbe_x86::op_loads }, // LOADS dst,base,index,size
- { uml::OP_STORE, &drcbe_x86::op_store }, // STORE base,index,src,size
- { uml::OP_READ, &drcbe_x86::op_read }, // READ dst,src1,spacesize
+ { uml::OP_LOAD, &drcbe_x86::op_load }, // LOAD dst,base,index,size
+ { uml::OP_LOADS, &drcbe_x86::op_loads }, // LOADS dst,base,index,size
+ { uml::OP_STORE, &drcbe_x86::op_store }, // STORE base,index,src,size
+ { uml::OP_READ, &drcbe_x86::op_read }, // READ dst,src1,spacesize
{ uml::OP_READM, &drcbe_x86::op_readm }, // READM dst,src1,mask,spacesize
- { uml::OP_WRITE, &drcbe_x86::op_write }, // WRITE dst,src1,spacesize
- { uml::OP_WRITEM, &drcbe_x86::op_writem }, // WRITEM dst,src1,spacesize
- { uml::OP_CARRY, &drcbe_x86::op_carry }, // CARRY src,bitnum
- { uml::OP_SET, &drcbe_x86::op_set }, // SET dst,c
- { uml::OP_MOV, &drcbe_x86::op_mov }, // MOV dst,src[,c]
- { uml::OP_SEXT, &drcbe_x86::op_sext }, // SEXT dst,src
- { uml::OP_ROLAND, &drcbe_x86::op_roland }, // ROLAND dst,src1,src2,src3
- { uml::OP_ROLINS, &drcbe_x86::op_rolins }, // ROLINS dst,src1,src2,src3
- { uml::OP_ADD, &drcbe_x86::op_add }, // ADD dst,src1,src2[,f]
- { uml::OP_ADDC, &drcbe_x86::op_addc }, // ADDC dst,src1,src2[,f]
- { uml::OP_SUB, &drcbe_x86::op_sub }, // SUB dst,src1,src2[,f]
- { uml::OP_SUBB, &drcbe_x86::op_subc }, // SUBB dst,src1,src2[,f]
- { uml::OP_CMP, &drcbe_x86::op_cmp }, // CMP src1,src2[,f]
+ { uml::OP_WRITE, &drcbe_x86::op_write }, // WRITE dst,src1,spacesize
+ { uml::OP_WRITEM, &drcbe_x86::op_writem }, // WRITEM dst,src1,spacesize
+ { uml::OP_CARRY, &drcbe_x86::op_carry }, // CARRY src,bitnum
+ { uml::OP_SET, &drcbe_x86::op_set }, // SET dst,c
+ { uml::OP_MOV, &drcbe_x86::op_mov }, // MOV dst,src[,c]
+ { uml::OP_SEXT, &drcbe_x86::op_sext }, // SEXT dst,src
+ { uml::OP_ROLAND, &drcbe_x86::op_roland }, // ROLAND dst,src1,src2,src3
+ { uml::OP_ROLINS, &drcbe_x86::op_rolins }, // ROLINS dst,src1,src2,src3
+ { uml::OP_ADD, &drcbe_x86::op_add }, // ADD dst,src1,src2[,f]
+ { uml::OP_ADDC, &drcbe_x86::op_addc }, // ADDC dst,src1,src2[,f]
+ { uml::OP_SUB, &drcbe_x86::op_sub }, // SUB dst,src1,src2[,f]
+ { uml::OP_SUBB, &drcbe_x86::op_subc }, // SUBB dst,src1,src2[,f]
+ { uml::OP_CMP, &drcbe_x86::op_cmp }, // CMP src1,src2[,f]
{ uml::OP_MULU, &drcbe_x86::op_mulu }, // MULU dst,edst,src1,src2[,f]
{ uml::OP_MULS, &drcbe_x86::op_muls }, // MULS dst,edst,src1,src2[,f]
{ uml::OP_DIVU, &drcbe_x86::op_divu }, // DIVU dst,edst,src1,src2[,f]
{ uml::OP_DIVS, &drcbe_x86::op_divs }, // DIVS dst,edst,src1,src2[,f]
- { uml::OP_AND, &drcbe_x86::op_and }, // AND dst,src1,src2[,f]
- { uml::OP_TEST, &drcbe_x86::op_test }, // TEST src1,src2[,f]
- { uml::OP_OR, &drcbe_x86::op_or }, // OR dst,src1,src2[,f]
- { uml::OP_XOR, &drcbe_x86::op_xor }, // XOR dst,src1,src2[,f]
- { uml::OP_LZCNT, &drcbe_x86::op_lzcnt }, // LZCNT dst,src[,f]
- { uml::OP_BSWAP, &drcbe_x86::op_bswap }, // BSWAP dst,src
- { uml::OP_SHL, &drcbe_x86::op_shl }, // SHL dst,src,count[,f]
- { uml::OP_SHR, &drcbe_x86::op_shr }, // SHR dst,src,count[,f]
- { uml::OP_SAR, &drcbe_x86::op_sar }, // SAR dst,src,count[,f]
- { uml::OP_ROL, &drcbe_x86::op_rol }, // ROL dst,src,count[,f]
- { uml::OP_ROLC, &drcbe_x86::op_rolc }, // ROLC dst,src,count[,f]
- { uml::OP_ROR, &drcbe_x86::op_ror }, // ROR dst,src,count[,f]
- { uml::OP_RORC, &drcbe_x86::op_rorc }, // RORC dst,src,count[,f]
+ { uml::OP_AND, &drcbe_x86::op_and }, // AND dst,src1,src2[,f]
+ { uml::OP_TEST, &drcbe_x86::op_test }, // TEST src1,src2[,f]
+ { uml::OP_OR, &drcbe_x86::op_or }, // OR dst,src1,src2[,f]
+ { uml::OP_XOR, &drcbe_x86::op_xor }, // XOR dst,src1,src2[,f]
+ { uml::OP_LZCNT, &drcbe_x86::op_lzcnt }, // LZCNT dst,src[,f]
+ { uml::OP_BSWAP, &drcbe_x86::op_bswap }, // BSWAP dst,src
+ { uml::OP_SHL, &drcbe_x86::op_shl }, // SHL dst,src,count[,f]
+ { uml::OP_SHR, &drcbe_x86::op_shr }, // SHR dst,src,count[,f]
+ { uml::OP_SAR, &drcbe_x86::op_sar }, // SAR dst,src,count[,f]
+ { uml::OP_ROL, &drcbe_x86::op_rol }, // ROL dst,src,count[,f]
+ { uml::OP_ROLC, &drcbe_x86::op_rolc }, // ROLC dst,src,count[,f]
+ { uml::OP_ROR, &drcbe_x86::op_ror }, // ROR dst,src,count[,f]
+ { uml::OP_RORC, &drcbe_x86::op_rorc }, // RORC dst,src,count[,f]
// Floating Point Operations
- { uml::OP_FLOAD, &drcbe_x86::op_fload }, // FLOAD dst,base,index
- { uml::OP_FSTORE, &drcbe_x86::op_fstore }, // FSTORE base,index,src
- { uml::OP_FREAD, &drcbe_x86::op_fread }, // FREAD dst,space,src1
- { uml::OP_FWRITE, &drcbe_x86::op_fwrite }, // FWRITE space,dst,src1
- { uml::OP_FMOV, &drcbe_x86::op_fmov }, // FMOV dst,src1[,c]
- { uml::OP_FTOINT, &drcbe_x86::op_ftoint }, // FTOINT dst,src1,size,round
- { uml::OP_FFRINT, &drcbe_x86::op_ffrint }, // FFRINT dst,src1,size
- { uml::OP_FFRFLT, &drcbe_x86::op_ffrflt }, // FFRFLT dst,src1,size
- { uml::OP_FRNDS, &drcbe_x86::op_frnds }, // FRNDS dst,src1
- { uml::OP_FADD, &drcbe_x86::op_fadd }, // FADD dst,src1,src2
- { uml::OP_FSUB, &drcbe_x86::op_fsub }, // FSUB dst,src1,src2
- { uml::OP_FCMP, &drcbe_x86::op_fcmp }, // FCMP src1,src2
- { uml::OP_FMUL, &drcbe_x86::op_fmul }, // FMUL dst,src1,src2
- { uml::OP_FDIV, &drcbe_x86::op_fdiv }, // FDIV dst,src1,src2
- { uml::OP_FNEG, &drcbe_x86::op_fneg }, // FNEG dst,src1
- { uml::OP_FABS, &drcbe_x86::op_fabs }, // FABS dst,src1
- { uml::OP_FSQRT, &drcbe_x86::op_fsqrt }, // FSQRT dst,src1
- { uml::OP_FRECIP, &drcbe_x86::op_frecip }, // FRECIP dst,src1
- { uml::OP_FRSQRT, &drcbe_x86::op_frsqrt } // FRSQRT dst,src1
+ { uml::OP_FLOAD, &drcbe_x86::op_fload }, // FLOAD dst,base,index
+ { uml::OP_FSTORE, &drcbe_x86::op_fstore }, // FSTORE base,index,src
+ { uml::OP_FREAD, &drcbe_x86::op_fread }, // FREAD dst,space,src1
+ { uml::OP_FWRITE, &drcbe_x86::op_fwrite }, // FWRITE space,dst,src1
+ { uml::OP_FMOV, &drcbe_x86::op_fmov }, // FMOV dst,src1[,c]
+ { uml::OP_FTOINT, &drcbe_x86::op_ftoint }, // FTOINT dst,src1,size,round
+ { uml::OP_FFRINT, &drcbe_x86::op_ffrint }, // FFRINT dst,src1,size
+ { uml::OP_FFRFLT, &drcbe_x86::op_ffrflt }, // FFRFLT dst,src1,size
+ { uml::OP_FRNDS, &drcbe_x86::op_frnds }, // FRNDS dst,src1
+ { uml::OP_FADD, &drcbe_x86::op_fadd }, // FADD dst,src1,src2
+ { uml::OP_FSUB, &drcbe_x86::op_fsub }, // FSUB dst,src1,src2
+ { uml::OP_FCMP, &drcbe_x86::op_fcmp }, // FCMP src1,src2
+ { uml::OP_FMUL, &drcbe_x86::op_fmul }, // FMUL dst,src1,src2
+ { uml::OP_FDIV, &drcbe_x86::op_fdiv }, // FDIV dst,src1,src2
+ { uml::OP_FNEG, &drcbe_x86::op_fneg }, // FNEG dst,src1
+ { uml::OP_FABS, &drcbe_x86::op_fabs }, // FABS dst,src1
+ { uml::OP_FSQRT, &drcbe_x86::op_fsqrt }, // FSQRT dst,src1
+ { uml::OP_FRECIP, &drcbe_x86::op_frecip }, // FRECIP dst,src1
+ { uml::OP_FRSQRT, &drcbe_x86::op_frsqrt } // FRSQRT dst,src1
};
@@ -357,8 +357,8 @@ drcbe_x86::be_parameter::be_parameter(drcbe_x86 &drcbe, const parameter &param,
//-------------------------------------------------
-// select_register - select a register to use,
-// avoiding conflicts with the optional
+// select_register - select a register to use,
+// avoiding conflicts with the optional
// checkparam
//-------------------------------------------------
@@ -385,8 +385,8 @@ inline int drcbe_x86::be_parameter::select_register(int defreg, const be_paramet
//-------------------------------------------------
-// select_register - select a register to use,
-// avoiding conflicts with the optional
+// select_register - select a register to use,
+// avoiding conflicts with the optional
// checkparam
//-------------------------------------------------
@@ -4210,7 +4210,7 @@ void drcbe_x86::op_set(x86code *&dst, const instruction &inst)
void drcbe_x86::op_mov(x86code *&dst, const instruction &inst)
{
x86code *savedst = dst;
-
+
// validate instruction
assert(inst.size() == 4 || inst.size() == 8);
assert_any_condition(inst);
diff --git a/src/emu/cpu/drcbex86.h b/src/emu/cpu/drcbex86.h
index 96617cfe164..bbe47b4b775 100644
--- a/src/emu/cpu/drcbex86.h
+++ b/src/emu/cpu/drcbex86.h
@@ -63,7 +63,7 @@ public:
// construction/destruction
drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits);
virtual ~drcbe_x86();
-
+
// required overrides
virtual void reset();
virtual int execute(uml::code_handle &entry);
@@ -96,7 +96,7 @@ private:
be_parameter(const be_parameter &param) : m_type(param.m_type), m_value(param.m_value) { }
be_parameter(UINT64 val) : m_type(PTYPE_IMMEDIATE), m_value(val) { }
be_parameter(drcbe_x86 &drcbe, const uml::parameter &param, UINT32 allowed);
-
+
// creators for types that don't safely default
static inline be_parameter make_ireg(int regnum) { assert(regnum >= 0 && regnum < x86emit::REG_MAX); return be_parameter(PTYPE_INT_REGISTER, regnum); }
static inline be_parameter make_freg(int regnum) { assert(regnum >= 0 && regnum < x86emit::REG_MAX); return be_parameter(PTYPE_FLOAT_REGISTER, regnum); }
@@ -107,7 +107,7 @@ private:
// operators
bool operator==(const be_parameter &rhs) const { return (m_type == rhs.m_type && m_value == rhs.m_value); }
bool operator!=(const be_parameter &rhs) const { return (m_type != rhs.m_type || m_value != rhs.m_value); }
-
+
// getters
be_parameter_type type() const { return m_type; }
UINT64 immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
@@ -115,14 +115,14 @@ private:
int freg() const { assert(m_type == PTYPE_FLOAT_REGISTER); assert(m_value >= 0 && m_value < x86emit::REG_MAX); return m_value; }
int vreg() const { assert(m_type == PTYPE_VECTOR_REGISTER); assert(m_value >= 0 && m_value < x86emit::REG_MAX); return m_value; }
void *memory(UINT32 offset = 0) const { assert(m_type == PTYPE_MEMORY); return reinterpret_cast<void *>(m_value + offset); }
-
+
// type queries
bool is_immediate() const { return (m_type == PTYPE_IMMEDIATE); }
bool is_int_register() const { return (m_type == PTYPE_INT_REGISTER); }
bool is_float_register() const { return (m_type == PTYPE_FLOAT_REGISTER); }
bool is_vector_register() const { return (m_type == PTYPE_VECTOR_REGISTER); }
bool is_memory() const { return (m_type == PTYPE_MEMORY); }
-
+
// other queries
bool is_immediate_value(UINT64 value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
@@ -130,7 +130,7 @@ private:
int select_register(int defreg) const;
int select_register(int defreg, const be_parameter &checkparam) const;
int select_register(int defreg, const be_parameter &checkparam, const be_parameter &checkparam2) const;
-
+
private:
// private constructor
be_parameter(be_parameter_type type, be_parameter_value value) : m_type(type), m_value(value) { }
@@ -317,7 +317,7 @@ private:
// floating-point code emission helpers
void emit_fld_p(x86code *&dst, int size, const be_parameter &param);
void emit_fstp_p(x86code *&dst, int size, const be_parameter &param);
-
+
// callback helpers
static int dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int flags);
static int dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int flags);
diff --git a/src/emu/cpu/drccache.c b/src/emu/cpu/drccache.c
index 533d403adbc..b5564458ae5 100644
--- a/src/emu/cpu/drccache.c
+++ b/src/emu/cpu/drccache.c
@@ -101,7 +101,7 @@ void drc_cache::flush()
//-------------------------------------------------
-// alloc - allocate permanent memory from the
+// alloc - allocate permanent memory from the
// cache
//-------------------------------------------------
@@ -186,7 +186,7 @@ void *drc_cache::alloc_temporary(size_t bytes)
//-------------------------------------------------
-// free - release permanent memory allocated from
+// free - release permanent memory allocated from
// the cache
//-------------------------------------------------
@@ -259,7 +259,7 @@ drccodeptr drc_cache::end_codegen()
//-------------------------------------------------
-// request_oob_codegen - request callback for
+// request_oob_codegen - request callback for
// out-of-band codegen
//-------------------------------------------------
diff --git a/src/emu/cpu/drccache.h b/src/emu/cpu/drccache.h
index efafef09ed6..b633eec3e4d 100644
--- a/src/emu/cpu/drccache.h
+++ b/src/emu/cpu/drccache.h
@@ -81,12 +81,12 @@ public:
// construction/destruction
drc_cache(size_t bytes);
~drc_cache();
-
+
// getters
drccodeptr near() const { return m_near; }
drccodeptr base() const { return m_base; }
drccodeptr top() const { return m_top; }
-
+
// pointer checking
bool contains_pointer(const void *ptr) const { return ((const drccodeptr)ptr >= m_near && (const drccodeptr)ptr < m_near + m_size); }
bool contains_near_pointer(const void *ptr) const { return ((const drccodeptr)ptr >= m_near && (const drccodeptr)ptr < m_neartop); }
@@ -129,7 +129,7 @@ private:
struct oob_handler
{
oob_handler *next() const { return m_next; }
-
+
oob_handler * m_next; // next handler
oob_func m_callback; // callback function
void * m_param1; // 1st pointer parameter
diff --git a/src/emu/cpu/drcfe.c b/src/emu/cpu/drcfe.c
index f39bfaf0bb1..ae6cbdb5ecc 100644
--- a/src/emu/cpu/drcfe.c
+++ b/src/emu/cpu/drcfe.c
@@ -106,8 +106,8 @@ drc_frontend::~drc_frontend()
//-------------------------------------------------
-// describe_code - describe a sequence of code
-// that falls within the configured window
+// describe_code - describe a sequence of code
+// that falls within the configured window
// relative to the specified startpc
//-------------------------------------------------
@@ -395,7 +395,7 @@ void drc_frontend::release_descriptions()
// release all delay slots first
for (opcode_desc *curdesc = m_desc_live_list.first(); curdesc != NULL; curdesc = curdesc->next())
m_desc_allocator.reclaim_all(curdesc->delay);
-
+
// reclaim all the descriptors
m_desc_allocator.reclaim_all(m_desc_live_list);
}
diff --git a/src/emu/cpu/drcfe.h b/src/emu/cpu/drcfe.h
index 7849aed73c9..68b94ffd481 100644
--- a/src/emu/cpu/drcfe.h
+++ b/src/emu/cpu/drcfe.h
@@ -158,11 +158,11 @@ public:
// construction/destruction
drc_frontend(device_t &cpu, UINT32 window_start, UINT32 window_end, UINT32 max_sequence);
virtual ~drc_frontend();
-
+
// describe a block
const opcode_desc *describe_code(offs_t startpc);
-protected:
+protected:
// required overrides
virtual bool describe(opcode_desc &desc, const opcode_desc *prev) = 0;
diff --git a/src/emu/cpu/drcuml.c b/src/emu/cpu/drcuml.c
index 245a3bfb11d..b682b0255e3 100644
--- a/src/emu/cpu/drcuml.c
+++ b/src/emu/cpu/drcuml.c
@@ -127,7 +127,7 @@ drcbe_interface::drcbe_interface(drcuml_state &drcuml, drc_cache &cache, device_
m_space[spacenum]->accessors(m_accessors[spacenum]);
}
}
-
+
//-------------------------------------------------
// ~drcbe_interface - destructor
@@ -150,9 +150,9 @@ drcbe_interface::~drcbe_interface()
drcuml_state::drcuml_state(device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits)
: m_device(device),
m_cache(cache),
- m_beintf((flags & DRCUML_OPTION_USE_C) ?
- *static_cast<drcbe_interface *>(auto_alloc(device.machine, drcbe_c(*this, device, cache, flags, modes, addrbits, ignorebits))) :
- *static_cast<drcbe_interface *>(auto_alloc(device.machine, drcbe_native(*this, device, cache, flags, modes, addrbits, ignorebits)))),
+ m_beintf((flags & DRCUML_OPTION_USE_C) ?
+ *static_cast<drcbe_interface *>(auto_alloc(device.machine, drcbe_c(*this, device, cache, flags, modes, addrbits, ignorebits))) :
+ *static_cast<drcbe_interface *>(auto_alloc(device.machine, drcbe_native(*this, device, cache, flags, modes, addrbits, ignorebits)))),
m_umllog(NULL),
m_blocklist(device.machine->m_respool),
m_symlist(device.machine->m_respool)
@@ -179,7 +179,7 @@ drcuml_state::~drcuml_state()
//-------------------------------------------------
-// reset - reset the state completely, flushing
+// reset - reset the state completely, flushing
// the cache and all information
//-------------------------------------------------
@@ -199,15 +199,15 @@ void drcuml_state::reset()
m_beintf.reset();
// do a one-time validation if requested
-/* if (VALIDATE_BACKEND)
- {
- static bool validated = false;
- if (!validated)
- {
- validated = true;
- validate_backend(this);
- }
- }*/
+/* if (VALIDATE_BACKEND)
+ {
+ static bool validated = false;
+ if (!validated)
+ {
+ validated = true;
+ validate_backend(this);
+ }
+ }*/
}
catch (drcuml_block::abort_compilation &)
{
@@ -232,7 +232,7 @@ drcuml_block *drcuml_state::begin_block(UINT32 maxinst)
if (bestblock == NULL)
bestblock = &m_blocklist.append(*auto_alloc(m_device.machine, drcuml_block(*this, maxinst * 3/2)));
- // start the block
+ // start the block
bestblock->begin();
return bestblock;
}
@@ -250,7 +250,7 @@ code_handle *drcuml_state::handle_alloc(const char *name)
//-------------------------------------------------
-// symbol_add - add a symbol to the internal
+// symbol_add - add a symbol to the internal
// symbol table
//-------------------------------------------------
@@ -261,7 +261,7 @@ void drcuml_state::symbol_add(void *base, UINT32 length, const char *name)
//-------------------------------------------------
-// symbol_find - look up a symbol from the
+// symbol_find - look up a symbol from the
// internal symbol table or return NULL if not
// found
//-------------------------------------------------
@@ -290,7 +290,7 @@ const char *drcuml_state::symbol_find(void *base, UINT32 *offset)
//-------------------------------------------------
-// log_printf - directly printf to the UML log
+// log_printf - directly printf to the UML log
// if generated
//-------------------------------------------------
@@ -353,7 +353,7 @@ void drcuml_block::begin()
//-------------------------------------------------
-// end - complete a code block and commit it to
+// end - complete a code block and commit it to
// the cache via the back-end
//-------------------------------------------------
@@ -402,13 +402,13 @@ uml::instruction &drcuml_block::append()
instruction &curinst = m_inst[m_nextinst++];
if (m_nextinst > m_maxinst)
fatalerror("Overran maxinst in drcuml_block_append");
-
+
return curinst;
}
//-------------------------------------------------
-// comment - attach a comment to the current
+// comment - attach a comment to the current
// output location in the specified block
//-------------------------------------------------
@@ -433,7 +433,7 @@ void drcuml_block::append_comment(const char *format, ...)
//-------------------------------------------------
-// optimize - apply various optimizations to a
+// optimize - apply various optimizations to a
// block of code
//-------------------------------------------------
@@ -480,7 +480,7 @@ void drcuml_block::optimize()
//-------------------------------------------------
-// disassemble - disassemble a block of
+// disassemble - disassemble a block of
// instructions to the log
//-------------------------------------------------
@@ -488,7 +488,7 @@ void drcuml_block::disassemble()
{
astring comment;
astring dasm;
-
+
// iterate over instructions and output
int firstcomment = -1;
for (int instnum = 0; instnum < m_nextinst; instnum++)
diff --git a/src/emu/cpu/drcuml.h b/src/emu/cpu/drcuml.h
index 1abbdf10676..b4c152fb6db 100644
--- a/src/emu/cpu/drcuml.h
+++ b/src/emu/cpu/drcuml.h
@@ -132,7 +132,7 @@ public:
bool inuse() const { return m_inuse; }
UINT32 maxinst() const { return m_maxinst; }
- // code generation
+ // code generation
void begin();
void end();
void abort();
@@ -171,7 +171,7 @@ public:
// construction/destruction
drcbe_interface(drcuml_state &drcuml, drc_cache &cache, device_t &device);
virtual ~drcbe_interface();
-
+
// required overrides
virtual void reset() = 0;
virtual int execute(uml::code_handle &entry) = 0;
@@ -197,7 +197,7 @@ public:
// construction/destruction
drcuml_state(device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits);
~drcuml_state();
-
+
// getters
device_t &device() const { return m_device; }
drc_cache &cache() const { return m_cache; }
@@ -206,7 +206,7 @@ public:
void reset();
int execute(uml::code_handle &entry) { return m_beintf.execute(entry); }
- // code generation
+ // code generation
drcuml_block *begin_block(UINT32 maxinst);
// back-end interface
@@ -216,7 +216,7 @@ public:
// handle management
uml::code_handle *handle_alloc(const char *name);
-
+
// symbol management
void symbol_add(void *base, UINT32 length, const char *name);
const char *symbol_find(void *base, UINT32 *offset = NULL);
@@ -232,7 +232,7 @@ private:
{
friend class drcuml_state;
template<class T> friend class simple_list;
-
+
// construction/destruction
symbol(void *base, UINT32 length, const char *name)
: m_next(NULL),
@@ -257,7 +257,7 @@ private:
drc_cache & m_cache; // pointer to the codegen cache
drcbe_interface & m_beintf; // backend interface pointer
FILE * m_umllog; // handle to the UML logfile
- simple_list<drcuml_block> m_blocklist; // list of active blocks
+ simple_list<drcuml_block> m_blocklist; // list of active blocks
simple_list<uml::code_handle> m_handlelist; // list of active handles
simple_list<symbol> m_symlist; // list of symbols
};
diff --git a/src/emu/cpu/i386/i386.h b/src/emu/cpu/i386/i386.h
index f8937c9823f..31a21250e9b 100644
--- a/src/emu/cpu/i386/i386.h
+++ b/src/emu/cpu/i386/i386.h
@@ -1,19 +1,19 @@
-#pragma once
-
-#ifndef __I386INTF_H__
-#define __I386INTF_H__
-
-#define INPUT_LINE_A20 1
-
-
-// mingw has this defined for 32-bit compiles
-#undef i386
-
-DECLARE_LEGACY_CPU_DEVICE(I386, i386);
-DECLARE_LEGACY_CPU_DEVICE(I486, i486);
-DECLARE_LEGACY_CPU_DEVICE(PENTIUM, pentium);
-DECLARE_LEGACY_CPU_DEVICE(MEDIAGX, mediagx);
-
-
-
-#endif /* __I386INTF_H__ */
+#pragma once
+
+#ifndef __I386INTF_H__
+#define __I386INTF_H__
+
+#define INPUT_LINE_A20 1
+
+
+// mingw has this defined for 32-bit compiles
+#undef i386
+
+DECLARE_LEGACY_CPU_DEVICE(I386, i386);
+DECLARE_LEGACY_CPU_DEVICE(I486, i486);
+DECLARE_LEGACY_CPU_DEVICE(PENTIUM, pentium);
+DECLARE_LEGACY_CPU_DEVICE(MEDIAGX, mediagx);
+
+
+
+#endif /* __I386INTF_H__ */
diff --git a/src/emu/cpu/i86/i86.h b/src/emu/cpu/i86/i86.h
index dc5cbf5941b..e8d1fd03738 100644
--- a/src/emu/cpu/i86/i86.h
+++ b/src/emu/cpu/i86/i86.h
@@ -1,65 +1,65 @@
-/* ASG 971222 -- rewrote this interface */
-#pragma once
-
-#ifndef __I86INTF_H__
-#define __I86INTF_H__
-
-
-#define INPUT_LINE_INT0 INPUT_LINE_IRQ0
-#define INPUT_LINE_INT1 INPUT_LINE_IRQ1
-#define INPUT_LINE_INT2 INPUT_LINE_IRQ2
-#define INPUT_LINE_INT3 INPUT_LINE_IRQ3
-#define INPUT_LINE_TEST 20 /* PJB 03/05 */
-#define INPUT_LINE_DRQ0 21
-#define INPUT_LINE_DRQ1 22
-#define INPUT_LINE_TMRIN0 23
-#define INPUT_LINE_TMRIN1 24
-
-
-typedef struct _i80186_interface i80186_interface;
-struct _i80186_interface
-{
- devcb_write_line out_tmrout0_func;
- devcb_write_line out_tmrout1_func;
-};
-#define I80186_INTERFACE(name) const i80186_interface (name) =
-
-
-enum
-{
- I8086_IP,
- I8086_AX,
- I8086_CX,
- I8086_DX,
- I8086_BX,
- I8086_SP,
- I8086_BP,
- I8086_SI,
- I8086_DI,
- I8086_AL,
- I8086_CL,
- I8086_DL,
- I8086_BL,
- I8086_AH,
- I8086_CH,
- I8086_DH,
- I8086_BH,
- I8086_FLAGS,
- I8086_ES,
- I8086_CS,
- I8086_SS,
- I8086_DS,
- I8086_VECTOR,
-
- I8086_GENPC = STATE_GENPC,
- I8086_GENSP = STATE_GENSP,
- I8086_GENPCBASE = STATE_GENPCBASE
-};
-
-/* Public functions */
-DECLARE_LEGACY_CPU_DEVICE(I8086, i8086);
-DECLARE_LEGACY_CPU_DEVICE(I8088, i8088);
-DECLARE_LEGACY_CPU_DEVICE(I80186, i80186);
-DECLARE_LEGACY_CPU_DEVICE(I80188, i80188);
-
-#endif /* __I86INTF_H__ */
+/* ASG 971222 -- rewrote this interface */
+#pragma once
+
+#ifndef __I86INTF_H__
+#define __I86INTF_H__
+
+
+#define INPUT_LINE_INT0 INPUT_LINE_IRQ0
+#define INPUT_LINE_INT1 INPUT_LINE_IRQ1
+#define INPUT_LINE_INT2 INPUT_LINE_IRQ2
+#define INPUT_LINE_INT3 INPUT_LINE_IRQ3
+#define INPUT_LINE_TEST 20 /* PJB 03/05 */
+#define INPUT_LINE_DRQ0 21
+#define INPUT_LINE_DRQ1 22
+#define INPUT_LINE_TMRIN0 23
+#define INPUT_LINE_TMRIN1 24
+
+
+typedef struct _i80186_interface i80186_interface;
+struct _i80186_interface
+{
+ devcb_write_line out_tmrout0_func;
+ devcb_write_line out_tmrout1_func;
+};
+#define I80186_INTERFACE(name) const i80186_interface (name) =
+
+
+enum
+{
+ I8086_IP,
+ I8086_AX,
+ I8086_CX,
+ I8086_DX,
+ I8086_BX,
+ I8086_SP,
+ I8086_BP,
+ I8086_SI,
+ I8086_DI,
+ I8086_AL,
+ I8086_CL,
+ I8086_DL,
+ I8086_BL,
+ I8086_AH,
+ I8086_CH,
+ I8086_DH,
+ I8086_BH,
+ I8086_FLAGS,
+ I8086_ES,
+ I8086_CS,
+ I8086_SS,
+ I8086_DS,
+ I8086_VECTOR,
+
+ I8086_GENPC = STATE_GENPC,
+ I8086_GENSP = STATE_GENSP,
+ I8086_GENPCBASE = STATE_GENPCBASE
+};
+
+/* Public functions */
+DECLARE_LEGACY_CPU_DEVICE(I8086, i8086);
+DECLARE_LEGACY_CPU_DEVICE(I8088, i8088);
+DECLARE_LEGACY_CPU_DEVICE(I80186, i80186);
+DECLARE_LEGACY_CPU_DEVICE(I80188, i80188);
+
+#endif /* __I86INTF_H__ */
diff --git a/src/emu/cpu/i86/instr86.c b/src/emu/cpu/i86/instr86.c
index ee0c5c0a50c..bbf6d2e44eb 100644
--- a/src/emu/cpu/i86/instr86.c
+++ b/src/emu/cpu/i86/instr86.c
@@ -10,19 +10,19 @@
* timing value should move to separate array
*/
-/*
- PHS - 2010-12-29
-
- Moved several instruction stubs so that they are compiled separately for
- the 8086 and 80186. The instructions affected are :
-
- _pop_ss, _es, _cs, _ss, _ds, _mov_sregw and _sti
-
- This is because they call the next instruction directly as it cannot be
- interrupted. If they are not compiled separately when executing on an
- 80186, the wrong set of instructions are used (the 8086 set). This has
- the serious effect of ignoring the next instruction, as invalid, *IF*
- it is an 80186 specific instruction.
+/*
+ PHS - 2010-12-29
+
+ Moved several instruction stubs so that they are compiled separately for
+ the 8086 and 80186. The instructions affected are :
+
+ _pop_ss, _es, _cs, _ss, _ds, _mov_sregw and _sti
+
+ This is because they call the next instruction directly as it cannot be
+ interrupted. If they are not compiled separately when executing on an
+ 80186, the wrong set of instructions are used (the 8086 set). This has
+ the serious effect of ignoring the next instruction, as invalid, *IF*
+ it is an 80186 specific instruction.
*/
diff --git a/src/emu/cpu/m6800/m6800.c b/src/emu/cpu/m6800/m6800.c
index 2e1f1a20805..a579fb1a9f9 100644
--- a/src/emu/cpu/m6800/m6800.c
+++ b/src/emu/cpu/m6800/m6800.c
@@ -53,29 +53,29 @@ TODO:
/*
- Chip RAM NVRAM ROM SCI r15-f ports
+ Chip RAM NVRAM ROM SCI r15-f ports
-----------------------------------------------------------------
- MC6800 - - - no no 4
- MC6802 128 32 - no no 4
- MC6802NS 128 - - no no 4
- MC6808 - - - no no 4
-
- MC6801 128 64 2K yes no 4
- MC68701 128 64 - yes no 4
- MC6803 128 64 - yes no 4
-
- MC6801U4 192 32 4K yes yes 4
- MC6803U4 192 32 - yes yes 4
-
- HD6801 128 64 2K yes no 4
- HD6301V 128 - 4K yes no 4
- HD63701V 192 - 4K yes no 4
- HD6303R 128 - - yes no 4
-
- HD6301X 192 - 4K yes yes 6
- HD6301Y 256 - 16K yes yes 6
- HD6303X 192 - - yes yes 6
- HD6303Y 256 - - yes yes 6
+ MC6800 - - - no no 4
+ MC6802 128 32 - no no 4
+ MC6802NS 128 - - no no 4
+ MC6808 - - - no no 4
+
+ MC6801 128 64 2K yes no 4
+ MC68701 128 64 - yes no 4
+ MC6803 128 64 - yes no 4
+
+ MC6801U4 192 32 4K yes yes 4
+ MC6803U4 192 32 - yes yes 4
+
+ HD6801 128 64 2K yes no 4
+ HD6301V 128 - 4K yes no 4
+ HD63701V 192 - 4K yes no 4
+ HD6303R 128 - - yes no 4
+
+ HD6301X 192 - 4K yes yes 6
+ HD6301Y 256 - 16K yes yes 6
+ HD6303X 192 - - yes yes 6
+ HD6303Y 256 - - yes yes 6
NSC8105
MS2010-A
@@ -827,7 +827,7 @@ static void serial_transmit(m6800_state *cpustate)
cpustate->tx = 0;
cpustate->txbits++;
-
+
//logerror("M6800 '%s' Transmit START Data %02x\n", cpustate->device->tag(), cpustate->tsr);
}
break;
@@ -866,7 +866,7 @@ static void serial_transmit(m6800_state *cpustate)
static void serial_receive(m6800_state *cpustate)
{
//logerror("M6800 '%s' Rx Tick TRCSR %02x bits %u check %02x\n", cpustate->device->tag(), cpustate->trcsr, cpustate->rxbits, cpustate->trcsr & M6800_TRCSR_RE);
-
+
if (cpustate->trcsr & M6800_TRCSR_RE)
{
if (cpustate->trcsr & M6800_TRCSR_WU)
@@ -903,7 +903,7 @@ static void serial_receive(m6800_state *cpustate)
{
// start bit found
cpustate->rxbits++;
-
+
//logerror("M6800 '%s' Received START bit\n", cpustate->device->tag());
}
break;
@@ -928,7 +928,7 @@ static void serial_receive(m6800_state *cpustate)
{
// transfer data into receive register
cpustate->rdr = cpustate->rsr;
-
+
//logerror("M6800 '%s' Receive Data Register: %02x\n", cpustate->device->tag(), cpustate->rdr);
// set RDRF flag
@@ -1387,7 +1387,7 @@ static READ8_HANDLER( m6801_io_r )
data = (cpustate->io->read_byte(M6803_PORT1) & (cpustate->port1_ddr ^ 0xff))
| (cpustate->port1_data & cpustate->port1_ddr);
break;
-
+
case IO_P2DATA:
if(cpustate->port2_ddr == 0xff)
data = cpustate->port2_data;
@@ -1395,7 +1395,7 @@ static READ8_HANDLER( m6801_io_r )
data = (cpustate->io->read_byte(M6803_PORT2) & (cpustate->port2_ddr ^ 0xff))
| (cpustate->port2_data & cpustate->port2_ddr);
break;
-
+
case IO_P3DDR:
logerror("M6801 '%s' Port 3 DDR is a write-only register\n", space->cpu->tag());
break;
@@ -1505,12 +1505,12 @@ static READ8_HANDLER( m6801_io_r )
{
cpustate->trcsr_read_tdre = 1;
}
-
+
if (cpustate->trcsr & M6800_TRCSR_ORFE)
{
cpustate->trcsr_read_orfe = 1;
}
-
+
if (cpustate->trcsr & M6800_TRCSR_RDRF)
{
cpustate->trcsr_read_rdrf = 1;
@@ -1750,7 +1750,7 @@ static WRITE8_HANDLER( m6801_io_w )
cpustate->txbits = 0;
cpustate->tx = 1;
}
-
+
if ((data & M6800_TRCSR_RE) && !(cpustate->trcsr & M6800_TRCSR_RE))
{
cpustate->rxbits = 0;
diff --git a/src/emu/cpu/mips/mips3fe.c b/src/emu/cpu/mips/mips3fe.c
index dbc5b8f40bd..f22c75aedc6 100644
--- a/src/emu/cpu/mips/mips3fe.c
+++ b/src/emu/cpu/mips/mips3fe.c
@@ -58,7 +58,7 @@ mips3_frontend::mips3_frontend(mips3_state &state, UINT32 window_start, UINT32 w
//-------------------------------------------------
-// describe - build a description of a single
+// describe - build a description of a single
// instruction
//-------------------------------------------------
@@ -255,7 +255,7 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
//-------------------------------------------------
-// describe_special - build a description of a
+// describe_special - build a description of a
// single instruction in the 'special' group
//-------------------------------------------------
@@ -406,7 +406,7 @@ bool mips3_frontend::describe_special(UINT32 op, opcode_desc &desc)
//-------------------------------------------------
-// describe_regimm - build a description of a
+// describe_regimm - build a description of a
// single instruction in the 'regimm' group
//-------------------------------------------------
@@ -463,7 +463,7 @@ bool mips3_frontend::describe_regimm(UINT32 op, opcode_desc &desc)
//-------------------------------------------------
-// describe_idt - build a description of a single
+// describe_idt - build a description of a single
// instruction in the IDT-specific group
//-------------------------------------------------
@@ -494,7 +494,7 @@ bool mips3_frontend::describe_idt(UINT32 op, opcode_desc &desc)
//-------------------------------------------------
-// describe_cop0 - build a description of a
+// describe_cop0 - build a description of a
// single instruction in the COP0 group
//-------------------------------------------------
@@ -569,7 +569,7 @@ bool mips3_frontend::describe_cop0(UINT32 op, opcode_desc &desc)
//-------------------------------------------------
-// describe_cop1 - build a description of a
+// describe_cop1 - build a description of a
// single instruction in the COP1 group
//-------------------------------------------------
@@ -687,7 +687,7 @@ bool mips3_frontend::describe_cop1(UINT32 op, opcode_desc &desc)
//-------------------------------------------------
-// describe_cop1x - build a description of a
+// describe_cop1x - build a description of a
// single instruction in the COP1X group
//-------------------------------------------------
@@ -730,7 +730,7 @@ bool mips3_frontend::describe_cop1x(UINT32 op, opcode_desc &desc)
//-------------------------------------------------
-// describe_cop2 - build a description of a
+// describe_cop2 - build a description of a
// single instruction in the COP2 group
//-------------------------------------------------
diff --git a/src/emu/cpu/nec/nec.h b/src/emu/cpu/nec/nec.h
index 89ec4c0c232..d0a6e4816c5 100644
--- a/src/emu/cpu/nec/nec.h
+++ b/src/emu/cpu/nec/nec.h
@@ -1,37 +1,37 @@
-/* ASG 971222 -- rewrote this interface */
-#ifndef __NEC_H_
-#define __NEC_H_
-
-
-typedef struct _nec_config nec_config;
-struct _nec_config
-{
- const UINT8* v25v35_decryptiontable; // internal decryption table
-};
-
-#define NEC_INPUT_LINE_INTP0 10
-#define NEC_INPUT_LINE_INTP1 11
-#define NEC_INPUT_LINE_INTP2 12
-#define NEC_INPUT_LINE_POLL 20
-
-#define V25_PORT_P0 0x10000
-#define V25_PORT_P1 0x10002
-#define V25_PORT_P2 0x10004
-#define V25_PORT_PT 0x10006
-
-enum
-{
- NEC_PC=0,
- NEC_IP, NEC_AW, NEC_CW, NEC_DW, NEC_BW, NEC_SP, NEC_BP, NEC_IX, NEC_IY,
- NEC_FLAGS, NEC_ES, NEC_CS, NEC_SS, NEC_DS,
- NEC_PENDING
-};
-
-/* Public functions */
-DECLARE_LEGACY_CPU_DEVICE(V20, v20);
-DECLARE_LEGACY_CPU_DEVICE(V25, v25);
-DECLARE_LEGACY_CPU_DEVICE(V30, v30);
-DECLARE_LEGACY_CPU_DEVICE(V33, v33);
-DECLARE_LEGACY_CPU_DEVICE(V35, v35);
-
-#endif
+/* ASG 971222 -- rewrote this interface */
+#ifndef __NEC_H_
+#define __NEC_H_
+
+
+typedef struct _nec_config nec_config;
+struct _nec_config
+{
+ const UINT8* v25v35_decryptiontable; // internal decryption table
+};
+
+#define NEC_INPUT_LINE_INTP0 10
+#define NEC_INPUT_LINE_INTP1 11
+#define NEC_INPUT_LINE_INTP2 12
+#define NEC_INPUT_LINE_POLL 20
+
+#define V25_PORT_P0 0x10000
+#define V25_PORT_P1 0x10002
+#define V25_PORT_P2 0x10004
+#define V25_PORT_PT 0x10006
+
+enum
+{
+ NEC_PC=0,
+ NEC_IP, NEC_AW, NEC_CW, NEC_DW, NEC_BW, NEC_SP, NEC_BP, NEC_IX, NEC_IY,
+ NEC_FLAGS, NEC_ES, NEC_CS, NEC_SS, NEC_DS,
+ NEC_PENDING
+};
+
+/* Public functions */
+DECLARE_LEGACY_CPU_DEVICE(V20, v20);
+DECLARE_LEGACY_CPU_DEVICE(V25, v25);
+DECLARE_LEGACY_CPU_DEVICE(V30, v30);
+DECLARE_LEGACY_CPU_DEVICE(V33, v33);
+DECLARE_LEGACY_CPU_DEVICE(V35, v35);
+
+#endif
diff --git a/src/emu/cpu/nec/v25instr.c b/src/emu/cpu/nec/v25instr.c
index 0ead0a9a89b..a18c4a24daa 100644
--- a/src/emu/cpu/nec/v25instr.c
+++ b/src/emu/cpu/nec/v25instr.c
@@ -38,7 +38,7 @@
nec_state->ISPR &= ~tmp; \
break; \
} \
- }
+ }
OP( 0x0f, i_pre_v25 ) { UINT32 ModRM, tmp, tmp2;
switch (FETCH()) {
diff --git a/src/emu/cpu/powerpc/ppcfe.c b/src/emu/cpu/powerpc/ppcfe.c
index b27cc783331..4acd13b9b19 100644
--- a/src/emu/cpu/powerpc/ppcfe.c
+++ b/src/emu/cpu/powerpc/ppcfe.c
@@ -93,7 +93,7 @@ ppc_frontend::ppc_frontend(powerpc_state &state, UINT32 window_start, UINT32 win
//-------------------------------------------------
-// describe - build a description of a single
+// describe - build a description of a single
// instruction
//-------------------------------------------------
diff --git a/src/emu/cpu/pps4/pps4.c b/src/emu/cpu/pps4/pps4.c
index 47addb75517..6791eb0c7f7 100644
--- a/src/emu/cpu/pps4/pps4.c
+++ b/src/emu/cpu/pps4/pps4.c
@@ -23,23 +23,23 @@ typedef struct _pps4_state pps4_state;
struct _pps4_state
{
UINT8 A; // Accumulator
- UINT8 X;
-
- PAIR P;
+ UINT8 X;
+
+ PAIR P;
PAIR SA;
PAIR SB;
- PAIR B; // BU + BM + BL
+ PAIR B; // BU + BM + BL
- UINT8 C; // Carry flag
+ UINT8 C; // Carry flag
UINT8 FF1; // Flip-flop 1
UINT8 FF2; // Flip-flop 2
-
+
legacy_cpu_device *device;
const address_space *program;
direct_read_data *direct;
const address_space *data;
const address_space *io;
-
+
int icount;
};
@@ -79,18 +79,18 @@ static void execute_one(pps4_state *cpustate, int opcode)
switch (opcode)
{
// Arithmetic instructions
- case 0x0b: // AD
+ case 0x0b: // AD
break;
- case 0x0a: // ADC
+ case 0x0a: // ADC
break;
- case 0x09: // ADSK
+ case 0x09: // ADSK
break;
case 0x08: // ADCSK
break;
case 0x60: case 0x61: case 0x62: case 0x63:
case 0x64: case 0x66: case 0x67: case 0x68:
case 0x69: case 0x6a: case 0x6b: case 0x6c:
- case 0x6d: case 0x6e:
+ case 0x6d: case 0x6e:
// ADI
break;
case 0x65: //DC
@@ -99,9 +99,9 @@ static void execute_one(pps4_state *cpustate, int opcode)
// Logical instructions
case 0x0d: // AND
break;
- case 0x0f: // OR
+ case 0x0f: // OR
break;
- case 0x0c: // EOR
+ case 0x0c: // EOR
break;
case 0x0e: // COMP
cpustate->A ^= 0x0f;
@@ -124,7 +124,7 @@ static void execute_one(pps4_state *cpustate, int opcode)
break;
case 0x25: // RF2
cpustate->FF2 = 0;
- break;
+ break;
case 0x30: case 0x31: case 0x32: case 0x33:
case 0x34: case 0x35: case 0x36: case 0x37:
// LD
@@ -206,14 +206,14 @@ static void execute_one(pps4_state *cpustate, int opcode)
UINT8 tmp = ARG(cpustate);
cpustate->icount -= 1;
cpustate->B.w.l = tmp;
- }
+ }
break;
case 0x17: // INCB
if ((cpustate->B.w.l & 0x0f) == 0x0f) {
cpustate->B.w.l &= 0xff0;
DO_SKIP(cpustate);
} else {
- cpustate->B.w.l += 1;
+ cpustate->B.w.l += 1;
}
break;
case 0x1f: // DECB
@@ -221,7 +221,7 @@ static void execute_one(pps4_state *cpustate, int opcode)
cpustate->B.w.l |= 0x00f;
DO_SKIP(cpustate);
} else {
- cpustate->B.w.l -= 1;
+ cpustate->B.w.l -= 1;
}
break;
// Control transfer instructions
@@ -243,7 +243,7 @@ static void execute_one(pps4_state *cpustate, int opcode)
case 0xbc: case 0xbd: case 0xbe: case 0xbf:
// T
cpustate->P.w.l = (cpustate->P.w.l & 0xfc0) | (opcode & 0x3f);
- break;
+ break;
case 0xd0: case 0xd1: case 0xd2: case 0xd3:
case 0xd4: case 0xd5: case 0xd6: case 0xd7:
case 0xd8: case 0xd9: case 0xda: case 0xdb:
@@ -295,7 +295,7 @@ static void execute_one(pps4_state *cpustate, int opcode)
break;
// Input/Output instructions
case 0x1c: // IOL
- {
+ {
//UINT8 tmp = ARG(cpustate);
cpustate->icount -= 1;
}
@@ -342,7 +342,7 @@ static CPU_INIT( pps4 )
cpustate->direct = &cpustate->program->direct();
cpustate->data = device->space(AS_DATA);
cpustate->io = device->space(AS_IO);
-
+
state_save_register_device_item(device, 0, cpustate->A);
state_save_register_device_item(device, 0, cpustate->X);
state_save_register_device_item(device, 0, cpustate->P);
@@ -364,7 +364,7 @@ static CPU_RESET( pps4 )
cpustate->A = cpustate->X = 0;
cpustate->C = cpustate->FF1 = cpustate->FF2 = 0;
-
+
cpustate->P.d = 0;
cpustate->SA.d = 0;
cpustate->SB.d = 0;
@@ -411,17 +411,17 @@ CPU_GET_INFO( pps4 )
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
- case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
+ case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 12; break;
case DEVINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 8; break; // 4 bit for RAM
- case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 12; break;
- case DEVINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
+ case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 12; break;
+ case DEVINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break; // 4 bit
- case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
- case DEVINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
+ case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
+ case DEVINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
/* --- the following bits of info are returned as pointers to functions --- */
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pps4); break;
diff --git a/src/emu/cpu/pps4/pps4dasm.c b/src/emu/cpu/pps4/pps4dasm.c
index ec7cac77284..51bdd5211c2 100644
--- a/src/emu/cpu/pps4/pps4dasm.c
+++ b/src/emu/cpu/pps4/pps4dasm.c
@@ -17,18 +17,18 @@ CPU_DISASSEMBLE( pps4 )
{
UINT32 flags = 0;
unsigned PC = pc;
- UINT8 op;
+ UINT8 op;
switch (op = OP(pc++))
{
// Arithmetic instructions
- case 0x0b: sprintf (buffer,"ad"); break;
- case 0x0a: sprintf (buffer,"adc"); break;
+ case 0x0b: sprintf (buffer,"ad"); break;
+ case 0x0a: sprintf (buffer,"adc"); break;
case 0x09: sprintf (buffer,"adsk"); break;
case 0x08: sprintf (buffer,"adcsk"); break;
case 0x60: case 0x61: case 0x62: case 0x63:
case 0x64: case 0x66: case 0x67: case 0x68:
case 0x69: case 0x6a: case 0x6b: case 0x6c:
- case 0x6d: case 0x6e:
+ case 0x6d: case 0x6e:
sprintf (buffer,"adi %01x",(op & 0x0f)); break;
case 0x65: sprintf (buffer,"dc"); break;
// Logical instructions
@@ -42,7 +42,7 @@ CPU_DISASSEMBLE( pps4 )
case 0x22: sprintf (buffer,"sf1"); break;
case 0x26: sprintf (buffer,"rf1"); break;
case 0x21: sprintf (buffer,"sf2"); break;
- case 0x25: sprintf (buffer,"rf2"); break;
+ case 0x25: sprintf (buffer,"rf2"); break;
case 0x30: case 0x31: case 0x32: case 0x33:
case 0x34: case 0x35: case 0x36: case 0x37:
sprintf (buffer,"ld %01x",(op & 0x07)); break;
@@ -90,7 +90,7 @@ CPU_DISASSEMBLE( pps4 )
case 0xb4: case 0xb5: case 0xb6: case 0xb7:
case 0xb8: case 0xb9: case 0xba: case 0xbb:
case 0xbc: case 0xbd: case 0xbe: case 0xbf:
- sprintf (buffer,"t %02x",(op & 0x3f)); break;
+ sprintf (buffer,"t %02x",(op & 0x3f)); break;
case 0xd0: case 0xd1: case 0xd2: case 0xd3:
case 0xd4: case 0xd5: case 0xd6: case 0xd7:
case 0xd8: case 0xd9: case 0xda: case 0xdb:
@@ -130,6 +130,6 @@ CPU_DISASSEMBLE( pps4 )
// Special instructions
case 0x13: sprintf (buffer,"sag"); break;
}
-
+
return (pc - PC) | flags | DASMFLAG_SUPPORTED;
}
diff --git a/src/emu/cpu/rsp/rspdrc.c b/src/emu/cpu/rsp/rspdrc.c
index 52926d64a2c..bbde2e951bb 100644
--- a/src/emu/cpu/rsp/rspdrc.c
+++ b/src/emu/cpu/rsp/rspdrc.c
@@ -663,29 +663,29 @@ static CPU_INIT( rsp )
rsp->impstate->regmap[regnum] = (regnum == 0) ? parameter(0) : parameter::make_memory(&rsp->r[regnum]);
/*
- drcbe_info beinfo;
- rsp->impstate->drcuml->get_backend_info(beinfo);
- if (beinfo.direct_iregs > 2)
- {
- rsp->impstate->regmap[30] = I2;
- }
- if (beinfo.direct_iregs > 3)
- {
- rsp->impstate->regmap[31] = I3;
- }
- if (beinfo.direct_iregs > 4)
- {
- rsp->impstate->regmap[2] = I4;
- }
- if (beinfo.direct_iregs > 5)
- {
- rsp->impstate->regmap[3] = I5;
- }
- if (beinfo.direct_iregs > 6)
- {
- rsp->impstate->regmap[4] = I6;
- }
- */
+ drcbe_info beinfo;
+ rsp->impstate->drcuml->get_backend_info(beinfo);
+ if (beinfo.direct_iregs > 2)
+ {
+ rsp->impstate->regmap[30] = I2;
+ }
+ if (beinfo.direct_iregs > 3)
+ {
+ rsp->impstate->regmap[31] = I3;
+ }
+ if (beinfo.direct_iregs > 4)
+ {
+ rsp->impstate->regmap[2] = I4;
+ }
+ if (beinfo.direct_iregs > 5)
+ {
+ rsp->impstate->regmap[3] = I5;
+ }
+ if (beinfo.direct_iregs > 6)
+ {
+ rsp->impstate->regmap[4] = I6;
+ }
+ */
/* mark the cache dirty so it is updated on next execute */
rsp->impstate->cache_dirty = TRUE;
@@ -2533,7 +2533,7 @@ INLINE void cfunc_rsp_vne(void *param)
int sel;
rsp->flag[1] = 0;
- for (i=0; i < 8; i++)//ïåðåïèñàíî ìíîé
+ for (i=0; i < 8; i++)//?????????? ????
{
sel = VEC_EL_2(EL, i);
@@ -2888,7 +2888,7 @@ INLINE void cfunc_rsp_vmrg(void *param)
}
else
{
- vres[i] = VREG_S(VS2REG, sel);//ìî¸ èñïðàâëåíèå
+ vres[i] = VREG_S(VS2REG, sel);//??? ???????????
}
ACCUM_L(i) = vres[i];
@@ -3050,7 +3050,7 @@ INLINE void cfunc_rsp_vrcp(void *param)
{
for (i = 0; i < 32; i++)
{
- if (datainput & (1 << ((~i) & 0x1f)))//ò.æ.÷òî 31 - i
+ if (datainput & (1 << ((~i) & 0x1f)))//?.?.??? 31 - i
{
shifter = i;
break;
@@ -3135,7 +3135,7 @@ INLINE void cfunc_rsp_vrcpl(void *param)
{
for (i = 0; i < 32; i++)
{
- if (datainput & (1 << ((~i) & 0x1f)))//ò.æ.÷òî 31 - i
+ if (datainput & (1 << ((~i) & 0x1f)))//?.?.??? 31 - i
{
shifter = i;
break;
diff --git a/src/emu/cpu/rsp/rspfe.c b/src/emu/cpu/rsp/rspfe.c
index 225d1d551ff..dca31e40f2d 100644
--- a/src/emu/cpu/rsp/rspfe.c
+++ b/src/emu/cpu/rsp/rspfe.c
@@ -30,7 +30,7 @@ rsp_frontend::rsp_frontend(rsp_state &state, UINT32 window_start, UINT32 window_
//-------------------------------------------------
-// describe - build a description of a single
+// describe - build a description of a single
// instruction
//-------------------------------------------------
@@ -155,7 +155,7 @@ bool rsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
//-------------------------------------------------
-// describe_special - build a description of a
+// describe_special - build a description of a
// single instruction in the 'special' group
//-------------------------------------------------
@@ -217,7 +217,7 @@ bool rsp_frontend::describe_special(UINT32 op, opcode_desc &desc)
//-------------------------------------------------
-// describe_regimm - build a description of a
+// describe_regimm - build a description of a
// single instruction in the 'regimm' group
//-------------------------------------------------
@@ -260,7 +260,7 @@ bool rsp_frontend::describe_regimm(UINT32 op, opcode_desc &desc)
//-------------------------------------------------
-// describe_cop0 - build a description of a
+// describe_cop0 - build a description of a
// single instruction in the COP0 group
//-------------------------------------------------
@@ -281,7 +281,7 @@ bool rsp_frontend::describe_cop0(UINT32 op, opcode_desc &desc)
}
//-------------------------------------------------
-// describe_cop2 - build a description of a
+// describe_cop2 - build a description of a
// single instruction in the COP2 group
//-------------------------------------------------
diff --git a/src/emu/cpu/sh2/sh2comn.h b/src/emu/cpu/sh2/sh2comn.h
index 3ea30d359f2..ddab61f65fe 100644
--- a/src/emu/cpu/sh2/sh2comn.h
+++ b/src/emu/cpu/sh2/sh2comn.h
@@ -191,7 +191,7 @@ class sh2_frontend : public drc_frontend
public:
sh2_frontend(sh2_state &state, UINT32 window_start, UINT32 window_end, UINT32 max_sequence);
-protected:
+protected:
virtual bool describe(opcode_desc &desc, const opcode_desc *prev);
private:
diff --git a/src/emu/cpu/sh2/sh2drc.c b/src/emu/cpu/sh2/sh2drc.c
index 10dc9313154..97c0906a820 100644
--- a/src/emu/cpu/sh2/sh2drc.c
+++ b/src/emu/cpu/sh2/sh2drc.c
@@ -1089,14 +1089,14 @@ static void static_generate_entry_point(sh2_state *sh2)
UML_LABEL(block, skip+1); // skip+1:
UML_CMP(block, mem(&sh2->evec), 0xffffffff); // cmp evec, 0xffffffff
- UML_JMPc(block, COND_Z, skip); // jz skip
+ UML_JMPc(block, COND_Z, skip); // jz skip
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
UML_MOV(block, I0, R32(15)); // mov r0, R15
UML_MOV(block, I1, mem(&sh2->irqsr)); // mov r1, irqsr
UML_CALLH(block, *sh2->write32); // call write32
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
UML_MOV(block, I0, R32(15)); // mov r0, R15
UML_MOV(block, I1, mem(&sh2->pc)); // mov r1, pc
UML_CALLH(block, *sh2->write32); // call write32
@@ -1186,7 +1186,7 @@ static void static_generate_memory_accessor(sh2_state *sh2, int size, int iswrit
UML_JMPc(block, COND_NZ, label); // if high bit is set, don't mask
UML_CMP(block, I0, 0x40000000); // cmp #0x40000000, r0
- UML_JMPc(block, COND_AE, label); // bae label
+ UML_JMPc(block, COND_AE, label); // bae label
UML_AND(block, I0, I0, AM); // and r0, r0, #AM (0xc7ffffff)
@@ -1462,14 +1462,14 @@ static void generate_update_cycles(sh2_state *sh2, drcuml_block *block, compiler
UML_LABEL(block, skip+1); // skip+1:
UML_CMP(block, mem(&sh2->evec), 0xffffffff); // cmp evec, 0xffffffff
- UML_JMPc(block, COND_Z, skip); // jz skip
+ UML_JMPc(block, COND_Z, skip); // jz skip
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
UML_MOV(block, I0, R32(15)); // mov r0, R15
UML_MOV(block, I1, mem(&sh2->irqsr)); // mov r1, irqsr
UML_CALLH(block, *sh2->write32); // call write32
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
UML_MOV(block, I0, R32(15)); // mov r0, R15
UML_MOV(block, I1, param); // mov r1, nextpc
UML_CALLH(block, *sh2->write32); // call write32
@@ -1848,7 +1848,7 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
case 0x24: // MOVBS0(Rm, Rn);
case 0x34: // MOVBS0(Rm, Rn);
UML_ADD(block, I0, R32(0), R32(Rn)); // add r0, R0, Rn
- UML_AND(block, I1, R32(Rm), 0x000000ff); // and r1, Rm, 0xff
+ UML_AND(block, I1, R32(Rm), 0x000000ff); // and r1, Rm, 0xff
UML_CALLH(block, *sh2->write8); // call write8
if (!in_delay_slot)
@@ -1860,7 +1860,7 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
case 0x25: // MOVWS0(Rm, Rn);
case 0x35: // MOVWS0(Rm, Rn);
UML_ADD(block, I0, R32(0), R32(Rn)); // add r0, R0, Rn
- UML_AND(block, I1, R32(Rm), 0x0000ffff); // and r1, Rm, 0xffff
+ UML_AND(block, I1, R32(Rm), 0x0000ffff); // and r1, Rm, 0xffff
UML_CALLH(block, *sh2->write16); // call write16
if (!in_delay_slot)
@@ -1980,14 +1980,14 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
UML_MOV(block, I0, mem(&sh2->evec)); // mov r0, evec
UML_CMP(block, I0, 0xffffffff); // cmp r0, 0xffffffff
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz skip
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jz skip
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
UML_MOV(block, I0, R32(15)); // mov r0, R15
UML_MOV(block, I1, mem(&sh2->irqsr)); // mov r1, irqsr
UML_CALLH(block, *sh2->write32); // call write32
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
UML_MOV(block, I0, R32(15)); // mov r0, R15
UML_MOV(block, I1, desc->pc+2); // mov r1, nextpc
UML_CALLH(block, *sh2->write32); // call write32
@@ -2100,7 +2100,7 @@ static int generate_group_2(sh2_state *sh2, drcuml_block *block, compiler_state
case 4: // MOVBM(Rm, Rn);
UML_MOV(block, I1, R32(Rm)); // mov r1, Rm
- UML_SUB(block, R32(Rn), R32(Rn), 1); // sub Rn, Rn, 1
+ UML_SUB(block, R32(Rn), R32(Rn), 1); // sub Rn, Rn, 1
UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
UML_CALLH(block, *sh2->write8); // call write8
@@ -2145,20 +2145,20 @@ static int generate_group_2(sh2_state *sh2, drcuml_block *block, compiler_state
UML_TEST(block, R32(Rn), 0x80000000); // test Rn, #0x80000000
UML_JMPc(block, COND_Z, compiler->labelnum); // jz labelnum
- UML_OR(block, I0, I0, Q); // or r0, r0, Q
+ UML_OR(block, I0, I0, Q); // or r0, r0, Q
UML_LABEL(block, compiler->labelnum++); // labelnum:
UML_TEST(block, R32(Rm), 0x80000000); // test Rm, #0x80000000
UML_JMPc(block, COND_Z, compiler->labelnum); // jz labelnum
- UML_OR(block, I0, I0, M); // or r0, r0, M
+ UML_OR(block, I0, I0, M); // or r0, r0, M
UML_LABEL(block, compiler->labelnum++); // labelnum:
UML_XOR(block, I1, R32(Rn), R32(Rm)); // xor r1, Rn, Rm
UML_TEST(block, I1, 0x80000000); // test r1, #0x80000000
UML_JMPc(block, COND_Z, compiler->labelnum); // jz labelnum
- UML_OR(block, I0, I0, T); // or r0, r0, T
+ UML_OR(block, I0, I0, T); // or r0, r0, T
UML_LABEL(block, compiler->labelnum++); // labelnum:
UML_MOV(block, mem(&sh2->sr), I0); // mov sr, r0
return TRUE;
@@ -2166,7 +2166,7 @@ static int generate_group_2(sh2_state *sh2, drcuml_block *block, compiler_state
case 8: // TST(Rm, Rn);
UML_AND(block, I0, mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
UML_TEST(block, R32(Rm), R32(Rn)); // test Rm, Rn
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
UML_OR(block, I0, I0, T); // or r0, r0, T
UML_LABEL(block, compiler->labelnum++); // desc->pc:
@@ -2481,7 +2481,7 @@ static int generate_group_4(sh2_state *sh2, drcuml_block *block, compiler_state
{
UML_AND(block, I0, mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
UML_SUB(block, R32(Rn), R32(Rn), 1); // sub Rn, Rn, 1
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jz compiler->labelnum
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // jz compiler->labelnum
UML_OR(block, I0, I0, T); // or r0, r0, T
UML_LABEL(block, compiler->labelnum++); // desc->pc:
@@ -2495,7 +2495,7 @@ static int generate_group_4(sh2_state *sh2, drcuml_block *block, compiler_state
UML_AND(block, I0, mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
UML_CMP(block, R32(Rn), 0); // cmp Rn, 0
- UML_JMPc(block, COND_S, compiler->labelnum); // js compiler->labelnum (if negative)
+ UML_JMPc(block, COND_S, compiler->labelnum); // js compiler->labelnum (if negative)
UML_OR(block, I0, I0, T); // or r0, r0, T
UML_LABEL(block, compiler->labelnum++); // desc->pc:
@@ -2508,8 +2508,8 @@ static int generate_group_4(sh2_state *sh2, drcuml_block *block, compiler_state
UML_CMP(block, R32(Rn), 0); // cmp Rn, 0
- UML_JMPc(block, COND_S, compiler->labelnum); // js compiler->labelnum (if negative)
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum (if zero)
+ UML_JMPc(block, COND_S, compiler->labelnum); // js compiler->labelnum (if negative)
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum (if zero)
UML_OR(block, I0, I0, T); // or r0, r0, T
@@ -2904,7 +2904,7 @@ static int generate_group_8(sh2_state *sh2, drcuml_block *block, compiler_state
UML_SEXT(block, I1, opcode&0xff, SIZE_BYTE); // sext r1, opcode&0xff, BYTE
UML_CMP(block, I1, R32(0)); // cmp r1, R0
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum (if negative)
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum (if negative)
UML_OR(block, I0, I0, T); // or r0, r0, T
@@ -2914,7 +2914,7 @@ static int generate_group_8(sh2_state *sh2, drcuml_block *block, compiler_state
case 9<< 8: // BT(opcode & 0xff);
UML_TEST(block, mem(&sh2->sr), T); // test sh2->sr, T
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum
disp = ((INT32)opcode << 24) >> 24;
sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination
@@ -2927,7 +2927,7 @@ static int generate_group_8(sh2_state *sh2, drcuml_block *block, compiler_state
case 11<< 8: // BF(opcode & 0xff);
UML_TEST(block, mem(&sh2->sr), T); // test sh2->sr, T
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
disp = ((INT32)opcode << 24) >> 24;
sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination
@@ -2942,7 +2942,7 @@ static int generate_group_8(sh2_state *sh2, drcuml_block *block, compiler_state
if (sh2->cpu_type > CPU_TYPE_SH1)
{
UML_TEST(block, mem(&sh2->sr), T); // test sh2->sr, T
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum
disp = ((INT32)opcode << 24) >> 24;
sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination
@@ -2963,7 +2963,7 @@ static int generate_group_8(sh2_state *sh2, drcuml_block *block, compiler_state
if (sh2->cpu_type > CPU_TYPE_SH1)
{
UML_TEST(block, mem(&sh2->sr), T); // test sh2->sr, T
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
disp = ((INT32)opcode << 24) >> 24;
sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination
@@ -3031,7 +3031,7 @@ static int generate_group_12(sh2_state *sh2, drcuml_block *block, compiler_state
UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
UML_MOV(block, I0, R32(15)); // mov r0, R15
- UML_MOV(block, I1, desc->pc+2); // mov r1, pc+2
+ UML_MOV(block, I1, desc->pc+2); // mov r1, pc+2
UML_CALLH(block, *sh2->write32); // write32
UML_MOV(block, I0, mem(&sh2->ea)); // mov r0, ea
diff --git a/src/emu/cpu/sh4/sh4.h b/src/emu/cpu/sh4/sh4.h
index 010bb1cfe1a..54879eee05a 100644
--- a/src/emu/cpu/sh4/sh4.h
+++ b/src/emu/cpu/sh4/sh4.h
@@ -105,7 +105,7 @@ void sh4_dma_ddt(device_t *device, struct sh4_ddt_dma *s);
COMPILER-SPECIFIC OPTIONS
***************************************************************************/
-#define SH4DRC_STRICT_VERIFY 0x0001 /* verify all instructions */
+#define SH4DRC_STRICT_VERIFY 0x0001 /* verify all instructions */
#define SH4DRC_FLUSH_PC 0x0002 /* flush the PC value before each memory access */
#define SH4DRC_STRICT_PCREL 0x0004 /* do actual loads on MOVLI/MOVWI instead of collapsing to immediates */
diff --git a/src/emu/cpu/sh4/sh4comn.h b/src/emu/cpu/sh4/sh4comn.h
index a65316939c3..42a88141158 100644
--- a/src/emu/cpu/sh4/sh4comn.h
+++ b/src/emu/cpu/sh4/sh4comn.h
@@ -119,13 +119,13 @@ typedef struct
int maxpcfsel; // highest valid pcflush entry
UINT32 pcflushes[16]; // pcflush entries
- drc_cache * cache; /* pointer to the DRC code cache */
+ drc_cache * cache; /* pointer to the DRC code cache */
drcuml_state * drcuml; /* DRC UML generator state */
sh4_frontend * drcfe; /* pointer to the DRC front-end class */
UINT32 drcoptions; /* configurable DRC options */
/* internal stuff */
- UINT8 cache_dirty; /* true if we need to flush the cache */
+ UINT8 cache_dirty; /* true if we need to flush the cache */
/* parameters for subroutines */
UINT64 numcycles; /* return value from gettotalcycles */
@@ -159,7 +159,7 @@ class sh4_frontend : public drc_frontend
public:
sh4_frontend(sh4_state &state, UINT32 window_start, UINT32 window_end, UINT32 max_sequence);
-protected:
+protected:
virtual bool describe(opcode_desc &desc, const opcode_desc *prev);
private:
@@ -233,8 +233,8 @@ enum
/* register flags 1 */
#define REGFLAG_PR (1 << 0)
-#define REGFLAG_MACL (1 << 1)
-#define REGFLAG_MACH (1 << 2)
+#define REGFLAG_MACL (1 << 1)
+#define REGFLAG_MACH (1 << 2)
#define REGFLAG_GBR (1 << 3)
#define REGFLAG_VBR (1 << 4)
#define REGFLAG_SR (1 << 5)
diff --git a/src/emu/cpu/uml.c b/src/emu/cpu/uml.c
index 0dc9ff63829..7d2ef743a13 100644
--- a/src/emu/cpu/uml.c
+++ b/src/emu/cpu/uml.c
@@ -432,8 +432,8 @@ void uml::instruction::configure(opcode_t op, UINT8 size, parameter p0, paramete
//-------------------------------------------------
-// simplify - simplify instructions that have
-// immediate values we can evaluate at compile
+// simplify - simplify instructions that have
+// immediate values we can evaluate at compile
// time
//-------------------------------------------------
@@ -767,22 +767,22 @@ void uml::instruction::simplify()
}
/*
- if (LOG_SIMPLIFICATIONS && memcmp(&orig, inst, sizeof(orig)) != 0)
- {
- astring disasm1, disasm2;
- orig.disasm(disasm1, block->drcuml);
- inst->disasm(disasm2, block->drcuml);
- mame_printf_debug("Simplified: %-50.50s -> %s\n", disasm1.cstr(), disasm2.cstr());
- }
- */
-
+ if (LOG_SIMPLIFICATIONS && memcmp(&orig, inst, sizeof(orig)) != 0)
+ {
+ astring disasm1, disasm2;
+ orig.disasm(disasm1, block->drcuml);
+ inst->disasm(disasm2, block->drcuml);
+ mame_printf_debug("Simplified: %-50.50s -> %s\n", disasm1.cstr(), disasm2.cstr());
+ }
+ */
+
// loop until we stop changing opcodes
} while (m_opcode != origop);
}
//-------------------------------------------------
-// validate - verify that the instruction created
+// validate - verify that the instruction created
// meets all requirements
//-------------------------------------------------
@@ -816,8 +816,8 @@ void uml::instruction::validate()
//-------------------------------------------------
-// input_flags - return the effective input flags
-// based on any conditions encoded in an
+// input_flags - return the effective input flags
+// based on any conditions encoded in an
// instruction
//-------------------------------------------------
@@ -826,21 +826,21 @@ UINT8 uml::instruction::input_flags() const
static const UINT8 flags_for_condition[] =
{
FLAG_Z, // COND_Z
- FLAG_Z, // COND_NZ
- FLAG_S, // COND_S
- FLAG_S, // COND_NS
- FLAG_C, // COND_C
- FLAG_C, // COND_NC
- FLAG_V, // COND_V
- FLAG_V, // COND_NV
- FLAG_U, // COND_U
- FLAG_U, // COND_NU
- FLAG_C | FLAG_Z, // COND_A
- FLAG_C | FLAG_Z, // COND_BE
- FLAG_S | FLAG_V | FLAG_Z, // COND_G
- FLAG_S | FLAG_V | FLAG_Z, // COND_LE
- FLAG_S | FLAG_V, // COND_L
- FLAG_S | FLAG_V // COND_GE
+ FLAG_Z, // COND_NZ
+ FLAG_S, // COND_S
+ FLAG_S, // COND_NS
+ FLAG_C, // COND_C
+ FLAG_C, // COND_NC
+ FLAG_V, // COND_V
+ FLAG_V, // COND_NV
+ FLAG_U, // COND_U
+ FLAG_U, // COND_NU
+ FLAG_C | FLAG_Z, // COND_A
+ FLAG_C | FLAG_Z, // COND_BE
+ FLAG_S | FLAG_V | FLAG_Z, // COND_G
+ FLAG_S | FLAG_V | FLAG_Z, // COND_LE
+ FLAG_S | FLAG_V, // COND_L
+ FLAG_S | FLAG_V // COND_GE
};
UINT8 flags = s_opcode_info_table[m_opcode].inflags;
@@ -853,8 +853,8 @@ UINT8 uml::instruction::input_flags() const
//-------------------------------------------------
-// output_flags - return the effective output
-// flags based on any conditions encoded in an
+// output_flags - return the effective output
+// flags based on any conditions encoded in an
// instruction
//-------------------------------------------------
@@ -868,8 +868,8 @@ UINT8 uml::instruction::output_flags() const
//-------------------------------------------------
-// modified_flags - return the effective output
-// flags based on any conditions encoded in an
+// modified_flags - return the effective output
+// flags based on any conditions encoded in an
// instruction
//-------------------------------------------------
@@ -880,7 +880,7 @@ UINT8 uml::instruction::modified_flags() const
//-------------------------------------------------
-// disasm - disassemble an instruction to the
+// disasm - disassemble an instruction to the
// given buffer
//-------------------------------------------------
diff --git a/src/emu/cpu/uml.h b/src/emu/cpu/uml.h
index 25e7e6de1d2..9175b5fb9b6 100644
--- a/src/emu/cpu/uml.h
+++ b/src/emu/cpu/uml.h
@@ -86,7 +86,7 @@ namespace uml
const UINT8 FLAG_S = 0x08; // sign flag (defined for integer only)
const UINT8 FLAG_U = 0x10; // unordered flag (defined for FP only)
- // testable conditions; note that these are defined such that (condition ^ 1) is
+ // testable conditions; note that these are defined such that (condition ^ 1) is
// always the opposite
enum condition_t
{
@@ -139,7 +139,7 @@ namespace uml
SIZE_SHORT = SIZE_DWORD, // 4-byte (float)
SIZE_DOUBLE = SIZE_QWORD // 8-byte (float)
};
-
+
// memory scale factors
enum memory_scale
{
@@ -164,89 +164,89 @@ namespace uml
OP_INVALID,
// compile-time opcodes
- OP_HANDLE, // HANDLE handle
- OP_HASH, // HASH mode,pc
- OP_LABEL, // LABEL imm
- OP_COMMENT, // COMMENT string
- OP_MAPVAR, // MAPVAR mapvar,value
+ OP_HANDLE, // HANDLE handle
+ OP_HASH, // HASH mode,pc
+ OP_LABEL, // LABEL imm
+ OP_COMMENT, // COMMENT string
+ OP_MAPVAR, // MAPVAR mapvar,value
// control flow operations
- OP_NOP, // NOP
- OP_DEBUG, // DEBUG pc
- OP_EXIT, // EXIT src1[,c]
- OP_HASHJMP, // HASHJMP mode,pc,handle
- OP_JMP, // JMP imm[,c]
- OP_EXH, // EXH handle,param[,c]
- OP_CALLH, // CALLH handle[,c]
- OP_RET, // RET [c]
- OP_CALLC, // CALLC func,ptr[,c]
- OP_RECOVER, // RECOVER dst,mapvar
+ OP_NOP, // NOP
+ OP_DEBUG, // DEBUG pc
+ OP_EXIT, // EXIT src1[,c]
+ OP_HASHJMP, // HASHJMP mode,pc,handle
+ OP_JMP, // JMP imm[,c]
+ OP_EXH, // EXH handle,param[,c]
+ OP_CALLH, // CALLH handle[,c]
+ OP_RET, // RET [c]
+ OP_CALLC, // CALLC func,ptr[,c]
+ OP_RECOVER, // RECOVER dst,mapvar
// internal register operations
- OP_SETFMOD, // SETFMOD src
- OP_GETFMOD, // GETFMOD dst
- OP_GETEXP, // GETEXP dst
- OP_GETFLGS, // GETFLGS dst[,f]
- OP_SAVE, // SAVE mem
- OP_RESTORE, // RESTORE mem
+ OP_SETFMOD, // SETFMOD src
+ OP_GETFMOD, // GETFMOD dst
+ OP_GETEXP, // GETEXP dst
+ OP_GETFLGS, // GETFLGS dst[,f]
+ OP_SAVE, // SAVE mem
+ OP_RESTORE, // RESTORE mem
// integer operations
- OP_LOAD, // LOAD dst,base,index,size
- OP_LOADS, // LOADS dst,base,index,size
- OP_STORE, // STORE base,index,src,size
- OP_READ, // READ dst,src1,space/size
+ OP_LOAD, // LOAD dst,base,index,size
+ OP_LOADS, // LOADS dst,base,index,size
+ OP_STORE, // STORE base,index,src,size
+ OP_READ, // READ dst,src1,space/size
OP_READM, // READM dst,src1,mask,space/size
- OP_WRITE, // WRITE dst,src1,space/size
+ OP_WRITE, // WRITE dst,src1,space/size
OP_WRITEM, // WRITEM dst,mask,src1,space/size
- OP_CARRY, // CARRY src,bitnum
- OP_SET, // SET dst,c
- OP_MOV, // MOV dst,src[,c]
- OP_SEXT, // SEXT dst,src,size
- OP_ROLAND, // ROLAND dst,src,shift,mask
- OP_ROLINS, // ROLINS dst,src,shift,mask
- OP_ADD, // ADD dst,src1,src2[,f]
- OP_ADDC, // ADDC dst,src1,src2[,f]
- OP_SUB, // SUB dst,src1,src2[,f]
- OP_SUBB, // SUBB dst,src1,src2[,f]
- OP_CMP, // CMP src1,src2[,f]
+ OP_CARRY, // CARRY src,bitnum
+ OP_SET, // SET dst,c
+ OP_MOV, // MOV dst,src[,c]
+ OP_SEXT, // SEXT dst,src,size
+ OP_ROLAND, // ROLAND dst,src,shift,mask
+ OP_ROLINS, // ROLINS dst,src,shift,mask
+ OP_ADD, // ADD dst,src1,src2[,f]
+ OP_ADDC, // ADDC dst,src1,src2[,f]
+ OP_SUB, // SUB dst,src1,src2[,f]
+ OP_SUBB, // SUBB dst,src1,src2[,f]
+ OP_CMP, // CMP src1,src2[,f]
OP_MULU, // MULU dst,edst,src1,src2[,f]
OP_MULS, // MULS dst,edst,src1,src2[,f]
OP_DIVU, // DIVU dst,edst,src1,src2[,f]
OP_DIVS, // DIVS dst,edst,src1,src2[,f]
- OP_AND, // AND dst,src1,src2[,f]
- OP_TEST, // TEST src1,src2[,f]
- OP_OR, // OR dst,src1,src2[,f]
- OP_XOR, // XOR dst,src1,src2[,f]
- OP_LZCNT, // LZCNT dst,src
- OP_BSWAP, // BSWAP dst,src
- OP_SHL, // SHL dst,src,count[,f]
- OP_SHR, // SHR dst,src,count[,f]
- OP_SAR, // SAR dst,src,count[,f]
- OP_ROL, // ROL dst,src,count[,f]
- OP_ROLC, // ROLC dst,src,count[,f]
- OP_ROR, // ROL dst,src,count[,f]
- OP_RORC, // ROLC dst,src,count[,f]
+ OP_AND, // AND dst,src1,src2[,f]
+ OP_TEST, // TEST src1,src2[,f]
+ OP_OR, // OR dst,src1,src2[,f]
+ OP_XOR, // XOR dst,src1,src2[,f]
+ OP_LZCNT, // LZCNT dst,src
+ OP_BSWAP, // BSWAP dst,src
+ OP_SHL, // SHL dst,src,count[,f]
+ OP_SHR, // SHR dst,src,count[,f]
+ OP_SAR, // SAR dst,src,count[,f]
+ OP_ROL, // ROL dst,src,count[,f]
+ OP_ROLC, // ROLC dst,src,count[,f]
+ OP_ROR, // ROL dst,src,count[,f]
+ OP_RORC, // ROLC dst,src,count[,f]
// floating point operations
- OP_FLOAD, // FLOAD dst,base,index
- OP_FSTORE, // FSTORE base,index,src
- OP_FREAD, // FREAD dst,space,src1
- OP_FWRITE, // FWRITE space,dst,src1
- OP_FMOV, // FMOV dst,src1[,c]
- OP_FTOINT, // FTOINT dst,src1,size,round
- OP_FFRINT, // FFRINT dst,src1,size
- OP_FFRFLT, // FFRFLT dst,src1,size
- OP_FRNDS, // FRNDS dst,src1
- OP_FADD, // FADD dst,src1,src2
- OP_FSUB, // FSUB dst,src1,src2
- OP_FCMP, // FCMP src1,src2
- OP_FMUL, // FMUL dst,src1,src2
- OP_FDIV, // FDIV dst,src1,src2
- OP_FNEG, // FNEG dst,src1
- OP_FABS, // FABS dst,src1
- OP_FSQRT, // FSQRT dst,src1
+ OP_FLOAD, // FLOAD dst,base,index
+ OP_FSTORE, // FSTORE base,index,src
+ OP_FREAD, // FREAD dst,space,src1
+ OP_FWRITE, // FWRITE space,dst,src1
+ OP_FMOV, // FMOV dst,src1[,c]
+ OP_FTOINT, // FTOINT dst,src1,size,round
+ OP_FFRINT, // FFRINT dst,src1,size
+ OP_FFRFLT, // FFRFLT dst,src1,size
+ OP_FRNDS, // FRNDS dst,src1
+ OP_FADD, // FADD dst,src1,src2
+ OP_FSUB, // FSUB dst,src1,src2
+ OP_FCMP, // FCMP src1,src2
+ OP_FMUL, // FMUL dst,src1,src2
+ OP_FDIV, // FDIV dst,src1,src2
+ OP_FNEG, // FNEG dst,src1
+ OP_FABS, // FABS dst,src1
+ OP_FSQRT, // FSQRT dst,src1
OP_FRECIP, // FRECIP dst,src1
- OP_FRSQRT, // FRSQRT dst,src1
+ OP_FRSQRT, // FRSQRT dst,src1
OP_MAX
};
@@ -259,12 +259,12 @@ namespace uml
{
friend class ::drcuml_state;
template<class T> friend class ::simple_list;
-
+
// construction/destruction
code_handle(drcuml_state &drcuml, const char *name);
public:
- // getters
+ // getters
code_handle *next() const { return m_next; }
drccodeptr codeptr() const { return *m_code; }
drccodeptr *codeptr_addr() { return m_code; }
@@ -280,22 +280,22 @@ namespace uml
code_handle * m_next; // link to next handle in the list
drcuml_state & m_drcuml; // pointer to owning object
};
-
+
// class describing a local code label
class code_label
{
public:
// construction
code_label(UINT32 label = 0) : m_label(label) { }
-
+
// operators
operator UINT32 &() { return m_label; }
bool operator==(const code_label &rhs) const { return (m_label == rhs.m_label); }
bool operator!=(const code_label &rhs) const { return (m_label != rhs.m_label); }
-
+
// getters
UINT32 label() const { return m_label; }
-
+
private:
UINT32 m_label;
};
@@ -336,7 +336,7 @@ namespace uml
parameter(operand_size size, memory_space space) : m_type(PTYPE_SIZE_SPACE), m_value((space << 4) | size) { assert(size >= SIZE_BYTE && size <= SIZE_DQWORD); assert(space >= SPACE_PROGRAM && space <= SPACE_IO); }
parameter(code_handle &handle) : m_type(PTYPE_CODE_HANDLE), m_value(reinterpret_cast<parameter_value>(&handle)) { }
parameter(code_label &label) : m_type(PTYPE_CODE_LABEL), m_value(label) { }
-
+
// creators for types that don't safely default
static inline parameter make_ireg(int regnum) { assert(regnum >= REG_I0 && regnum < REG_I_END); return parameter(PTYPE_INT_REGISTER, regnum); }
static inline parameter make_freg(int regnum) { assert(regnum >= REG_F0 && regnum < REG_F_END); return parameter(PTYPE_FLOAT_REGISTER, regnum); }
@@ -352,7 +352,7 @@ namespace uml
// operators
bool operator==(const parameter &rhs) const { return (m_type == rhs.m_type && m_value == rhs.m_value); }
bool operator!=(const parameter &rhs) const { return (m_type != rhs.m_type || m_value != rhs.m_value); }
-
+
// getters
parameter_type type() const { return m_type; }
UINT64 immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
@@ -362,14 +362,14 @@ namespace uml
int mapvar() const { assert(m_type == PTYPE_MAPVAR); assert(m_value >= MAPVAR_M0 && m_value < MAPVAR_END); return m_value; }
void *memory() const { assert(m_type == PTYPE_MEMORY); return reinterpret_cast<void *>(m_value); }
operand_size size() const { assert(m_type == PTYPE_SIZE || m_type == PTYPE_SIZE_SCALE || m_type == PTYPE_SIZE_SPACE); return operand_size(m_value & 15); }
- memory_scale scale() const { assert(m_type == PTYPE_SIZE_SCALE); return memory_scale(m_value >> 4); }
+ memory_scale scale() const { assert(m_type == PTYPE_SIZE_SCALE); return memory_scale(m_value >> 4); }
memory_space space() const { assert(m_type == PTYPE_SIZE_SPACE); return memory_space(m_value >> 4); }
code_handle &handle() const { assert(m_type == PTYPE_CODE_HANDLE); return *reinterpret_cast<code_handle *>(m_value); }
code_label label() const { assert(m_type == PTYPE_CODE_LABEL); return code_label(m_value); }
c_function cfunc() const { assert(m_type == PTYPE_C_FUNCTION); return reinterpret_cast<c_function>(m_value); }
float_rounding_mode rounding() const { assert(m_type == PTYPE_ROUNDING); return float_rounding_mode(m_value); }
const char *string() const { assert(m_type == PTYPE_STRING); return reinterpret_cast<const char *>(m_value); }
-
+
// type queries
bool is_immediate() const { return (m_type == PTYPE_IMMEDIATE); }
bool is_int_register() const { return (m_type == PTYPE_INT_REGISTER); }
@@ -385,10 +385,10 @@ namespace uml
bool is_c_function() const { return (m_type == PTYPE_C_FUNCTION); }
bool is_rounding() const { return (m_type == PTYPE_ROUNDING); }
bool is_string() const { return (m_type == PTYPE_STRING); }
-
+
// other queries
bool is_immediate_value(UINT64 value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
-
+
private:
// private constructor
parameter(parameter_type type, parameter_value value) : m_type(type), m_value(value) { }
@@ -415,7 +415,7 @@ namespace uml
UINT8 inflags; // input flags
UINT8 outflags; // output flags
UINT8 modflags; // modified flags
- parameter_info param[4]; // information about parameters
+ parameter_info param[4]; // information about parameters
};
// a single UML instructon is encoded like this
@@ -450,7 +450,7 @@ namespace uml
void label(code_label lab) { configure(OP_LABEL, 4, lab); }
void comment(const char *string) { configure(OP_COMMENT, 4, parameter::make_string(string)); }
void mapvar(parameter mapvar, UINT32 value) { assert(mapvar.is_mapvar()); configure(OP_MAPVAR, 4, mapvar, value); }
-
+
// control flow operations
void nop() { configure(OP_NOP, 4); }
void debug(UINT32 pc) { configure(OP_DEBUG, 4, pc); }
@@ -573,7 +573,7 @@ namespace uml
void fssqrt(parameter dst, parameter src1) { configure(OP_FSQRT, 4, dst, src1); }
void fsrecip(parameter dst, parameter src1) { configure(OP_FRECIP, 4, dst, src1); }
void fsrsqrt(parameter dst, parameter src1) { configure(OP_FRSQRT, 4, dst, src1); }
-
+
// 64-bit floating point operations
void fdload(parameter dst, const void *base, parameter index) { configure(OP_FLOAD, 8, dst, parameter::make_memory(base), index); }
void fdstore(void *base, parameter index, parameter src1) { configure(OP_FSTORE, 8, parameter::make_memory(base), index, src1); }
@@ -595,10 +595,10 @@ namespace uml
void fdsqrt(parameter dst, parameter src1) { configure(OP_FSQRT, 8, dst, src1); }
void fdrecip(parameter dst, parameter src1) { configure(OP_FRECIP, 8, dst, src1); }
void fdrsqrt(parameter dst, parameter src1) { configure(OP_FRSQRT, 8, dst, src1); }
-
+
// constants
static const int MAX_PARAMS = 4;
-
+
private:
// internal configuration
void configure(opcode_t op, UINT8 size, condition_t cond = COND_ALWAYS);
@@ -611,7 +611,7 @@ namespace uml
void validate();
void convert_to_mov_immediate(UINT64 immediate) { m_opcode = OP_MOV; m_numparams = 2; m_param[1] = immediate; }
void convert_to_mov_param(int pnum) { m_opcode = OP_MOV; m_numparams = 2; m_param[1] = m_param[pnum]; }
-
+
// internal state
opcode_t m_opcode; // opcode
condition_t m_condition; // condition
@@ -651,7 +651,7 @@ namespace uml
const parameter I7(parameter::make_ireg(REG_I0 + 7));
const parameter I8(parameter::make_ireg(REG_I0 + 8));
const parameter I9(parameter::make_ireg(REG_I0 + 9));
-
+
const parameter F0(parameter::make_freg(REG_F0 + 0));
const parameter F1(parameter::make_freg(REG_F0 + 1));
const parameter F2(parameter::make_freg(REG_F0 + 2));
@@ -662,7 +662,7 @@ namespace uml
const parameter F7(parameter::make_freg(REG_F0 + 7));
const parameter F8(parameter::make_freg(REG_F0 + 8));
const parameter F9(parameter::make_freg(REG_F0 + 9));
-
+
const parameter V0(parameter::make_vreg(REG_V0 + 0));
const parameter V1(parameter::make_vreg(REG_V0 + 1));
const parameter V2(parameter::make_vreg(REG_V0 + 2));
@@ -673,7 +673,7 @@ namespace uml
const parameter V7(parameter::make_vreg(REG_V0 + 7));
const parameter V8(parameter::make_vreg(REG_V0 + 8));
const parameter V9(parameter::make_vreg(REG_V0 + 9));
-
+
const parameter M0(parameter::make_mapvar(MAPVAR_M0 + 0));
const parameter M1(parameter::make_mapvar(MAPVAR_M0 + 1));
const parameter M2(parameter::make_mapvar(MAPVAR_M0 + 2));
diff --git a/src/emu/cpu/upd7725/upd7725.c b/src/emu/cpu/upd7725/upd7725.c
index 9f3d245c791..ec691b41eda 100755
--- a/src/emu/cpu/upd7725/upd7725.c
+++ b/src/emu/cpu/upd7725/upd7725.c
@@ -3,10 +3,10 @@
upd7725.c
Core implementation for the portable NEC uPD7725/uPD96050 emulator
-
+
Original by byuu in the public domain.
MAME conversion by R. Belmont
-
+
****************************************************************************/
#include "emu.h"
@@ -246,7 +246,7 @@ void necdsp_device::device_start()
void necdsp_device::device_reset()
{
- for (unsigned i = 0; i < 2048; i++)
+ for (unsigned i = 0; i < 2048; i++)
{
dataRAM[i] = 0x0000;
}
@@ -335,7 +335,7 @@ offs_t necdsp_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *o
return CPU_DISASSEMBLE_NAME(upd7725)(NULL, buffer, pc, oprom, opram, 0);
}
-void necdsp_device::execute_run()
+void necdsp_device::execute_run()
{
UINT32 opcode;
@@ -356,7 +356,7 @@ void necdsp_device::execute_run()
case 2: exec_jp(opcode); break;
case 3: exec_ld(opcode); break;
}
-
+
INT32 result = (INT32)regs.k * regs.l; //sign + 30-bit result
regs.m = result >> 15; //store sign + top 15-bits
regs.n = result << 1; //store low 15-bits + zero
@@ -584,12 +584,12 @@ void necdsp_device::exec_ld(UINT32 opcode) {
}
UINT8 necdsp_device::snesdsp_read(bool mode) {
-
+
if (!mode)
{
return regs.sr >> 8;
}
-
+
if (regs.sr.drc == 0)
{
//16-bit
@@ -597,14 +597,14 @@ UINT8 necdsp_device::snesdsp_read(bool mode) {
{
regs.sr.drs = 1;
return regs.dr >> 0;
- }
- else
+ }
+ else
{
regs.sr.rqm = 0;
regs.sr.drs = 0;
return regs.dr >> 8;
}
- }
+ }
else
{
//8-bit
@@ -615,23 +615,23 @@ UINT8 necdsp_device::snesdsp_read(bool mode) {
void necdsp_device::snesdsp_write(bool mode, UINT8 data) {
if (!mode) return;
-
- if (regs.sr.drc == 0)
+
+ if (regs.sr.drc == 0)
{
//16-bit
if (regs.sr.drs == 0)
{
regs.sr.drs = 1;
regs.dr = (regs.dr & 0xff00) | (data << 0);
- }
- else
+ }
+ else
{
regs.sr.rqm = 0;
regs.sr.drs = 0;
regs.dr = (data << 8) | (regs.dr & 0x00ff);
}
- }
- else
+ }
+ else
{
//8-bit
regs.sr.rqm = 0;
diff --git a/src/emu/cpu/upd7725/upd7725.h b/src/emu/cpu/upd7725/upd7725.h
index 82f65034a4c..4e64e74e57e 100755
--- a/src/emu/cpu/upd7725/upd7725.h
+++ b/src/emu/cpu/upd7725/upd7725.h
@@ -113,7 +113,7 @@ private:
struct Flag
{
bool s1, s0, c, z, ov1, ov0;
-
+
inline operator unsigned() const
{
return (s1 << 5) + (s0 << 4) + (c << 3) + (z << 2) + (ov1 << 1) + (ov0 << 0);
@@ -129,14 +129,14 @@ private:
struct Status
{
bool rqm, usf1, usf0, drs, dma, drc, soc, sic, ei, p1, p0;
-
+
inline operator unsigned() const
{
return (rqm << 15) + (usf1 << 14) + (usf0 << 13) + (drs << 12)
+ (dma << 11) + (drc << 10) + (soc << 9) + (sic << 8)
+ (ei << 7) + (p1 << 1) + (p0 << 0);
}
-
+
inline unsigned operator=(unsigned d)
{
rqm = d & 0x8000; usf1 = d & 0x4000; usf0 = d & 0x2000; drs = d & 0x1000;
@@ -146,7 +146,7 @@ private:
}
};
- struct Regs
+ struct Regs
{
UINT16 pc; //program counter
UINT16 stack[16]; //LIFO
diff --git a/src/emu/cpu/x86emit.h b/src/emu/cpu/x86emit.h
index 49dfe8256d4..7d4129d0def 100644
--- a/src/emu/cpu/x86emit.h
+++ b/src/emu/cpu/x86emit.h
@@ -301,7 +301,7 @@ const UINT32 OP_ADD_Ev_Gv = 0x01;
const UINT32 OP_ADD_Gb_Eb = (0x02 | OPFLAG_8BITRM | OPFLAG_8BITREG);
const UINT32 OP_ADD_Gv_Ev = 0x03;
const UINT32 OP_ADD_AL_Ib = 0x04;
-const UINT32 OP_ADD_rAX_Iz = 0x05;
+const UINT32 OP_ADD_rAX_Iz = 0x05;
const UINT32 OP_PUSH_ES = 0x06;
const UINT32 OP_POP_ES = 0x07;
const UINT32 OP_OR_Eb_Gb = (0x08 | OPFLAG_8BITRM | OPFLAG_8BITREG);
@@ -318,7 +318,7 @@ const UINT32 OP_ADC_Ev_Gv = 0x11;
const UINT32 OP_ADC_Gb_Eb = (0x12 | OPFLAG_8BITRM | OPFLAG_8BITREG);
const UINT32 OP_ADC_Gv_Ev = 0x13;
const UINT32 OP_ADC_AL_Ib = 0x14;
-const UINT32 OP_ADC_rAX_Iz = 0x15;
+const UINT32 OP_ADC_rAX_Iz = 0x15;
const UINT32 OP_PUSH_SS = 0x16;
const UINT32 OP_POP_SS = 0x17;
const UINT32 OP_SBB_Eb_Gb = (0x18 | OPFLAG_8BITRM | OPFLAG_8BITREG);
@@ -326,7 +326,7 @@ const UINT32 OP_SBB_Ev_Gv = 0x19;
const UINT32 OP_SBB_Gb_Eb = (0x1a | OPFLAG_8BITRM | OPFLAG_8BITREG);
const UINT32 OP_SBB_Gv_Ev = 0x1b;
const UINT32 OP_SBB_AL_Ib = 0x1c;
-const UINT32 OP_SBB_eAX_Iv = 0x1d;
+const UINT32 OP_SBB_eAX_Iv = 0x1d;
const UINT32 OP_PUSH_DS = 0x1e;
const UINT32 OP_POP_DS = 0x1f;
@@ -335,7 +335,7 @@ const UINT32 OP_AND_Ev_Gv = 0x21;
const UINT32 OP_AND_Gb_Eb = (0x22 | OPFLAG_8BITRM | OPFLAG_8BITREG);
const UINT32 OP_AND_Gv_Ev = 0x23;
const UINT32 OP_AND_AL_Ib = 0x24;
-const UINT32 OP_AND_rAX_Iz = 0x25;
+const UINT32 OP_AND_rAX_Iz = 0x25;
const UINT32 PREFIX_ES = 0x26;
const UINT32 OP_DAA = 0x27;
const UINT32 OP_SUB_Eb_Gb = (0x28 | OPFLAG_8BITRM | OPFLAG_8BITREG);
@@ -343,7 +343,7 @@ const UINT32 OP_SUB_Ev_Gv = 0x29;
const UINT32 OP_SUB_Gb_Eb = (0x2a | OPFLAG_8BITRM | OPFLAG_8BITREG);
const UINT32 OP_SUB_Gv_Ev = 0x2b;
const UINT32 OP_SUB_AL_Ib = 0x2c;
-const UINT32 OP_SUB_eAX_Iv = 0x2d;
+const UINT32 OP_SUB_eAX_Iv = 0x2d;
const UINT32 PREFIX_CS = 0x2e;
const UINT32 OP_DAS = 0x2f;
@@ -352,7 +352,7 @@ const UINT32 OP_XOR_Ev_Gv = 0x31;
const UINT32 OP_XOR_Gb_Eb = (0x32 | OPFLAG_8BITRM | OPFLAG_8BITREG);
const UINT32 OP_XOR_Gv_Ev = 0x33;
const UINT32 OP_XOR_AL_Ib = 0x34;
-const UINT32 OP_XOR_rAX_Iz = 0x35;
+const UINT32 OP_XOR_rAX_Iz = 0x35;
const UINT32 PREFIX_SS = 0x36;
const UINT32 OP_AAA = 0x37;
const UINT32 OP_CMP_Eb_Gb = (0x38 | OPFLAG_8BITRM | OPFLAG_8BITREG);
@@ -360,7 +360,7 @@ const UINT32 OP_CMP_Ev_Gv = 0x39;
const UINT32 OP_CMP_Gb_Eb = (0x3a | OPFLAG_8BITRM | OPFLAG_8BITREG);
const UINT32 OP_CMP_Gv_Ev = 0x3b;
const UINT32 OP_CMP_AL_Ib = 0x3c;
-const UINT32 OP_CMP_eAX_Iv = 0x3d;
+const UINT32 OP_CMP_eAX_Iv = 0x3d;
const UINT32 PREFIX_DS = 0x3e;
const UINT32 OP_AAS = 0x3f;
diff --git a/src/emu/devimage.c b/src/emu/devimage.c
index ee7986d688f..4986e56468f 100644
--- a/src/emu/devimage.c
+++ b/src/emu/devimage.c
@@ -353,7 +353,7 @@ bool legacy_image_device_base::load_software(char *swlist, char *swname, rom_ent
if (software_get_support(swlist, swname) == SOFTWARE_SUPPORTED_NO)
mame_printf_error("WARNING: support for software %s (in list %s) is only preliminary\n", swname, swlist);
-
+
// check if locationtag actually contains two locations separated by '%'
// (i.e. check if we are dealing with a clone in softwarelist)
astring tag2, tag3, tag4(locationtag), tag5;
diff --git a/src/emu/drivers/xtal.h b/src/emu/drivers/xtal.h
index d22481ca0c8..25d36294eef 100644
--- a/src/emu/drivers/xtal.h
+++ b/src/emu/drivers/xtal.h
@@ -67,7 +67,7 @@ enum
XTAL_5_7143MHz = 5714300, /* Cidelsa Destroyer */
XTAL_5_9904MHz = 5990400, /* Luxor ABC 800 keyboard */
XTAL_6MHz = 6000000, /* American Poker II */
- XTAL_6_5MHz = 6500000, /* Jupiter Ace */
+ XTAL_6_5MHz = 6500000, /* Jupiter Ace */
XTAL_6_144MHz = 6144000, /* Used on Alpha Denshi early 80's games sound board */
XTAL_7MHz = 7000000, /* Jaleco Mega System PCBs */
XTAL_7_15909MHz = 7159090, /* Blood Bros */
diff --git a/src/emu/emuopts.c b/src/emu/emuopts.c
index d78d0863efb..30c5df10bfa 100644
--- a/src/emu/emuopts.c
+++ b/src/emu/emuopts.c
@@ -159,7 +159,7 @@ const options_entry mame_core_options[] =
{ "cheat;c", "0", OPTION_BOOLEAN, "enable cheat subsystem" },
{ "skip_gameinfo", "0", OPTION_BOOLEAN, "skip displaying the information screen at startup" },
{ "uifont", "default", 0, "specify a font to use" },
- { "ramsize;ram", NULL, OPTION_DRIVER_ONLY,"size of RAM (if supported by driver)" },
+ { "ramsize;ram", NULL, OPTION_DRIVER_ONLY,"size of RAM (if supported by driver)" },
/* image device options */
{ OPTION_ADDED_DEVICE_OPTIONS, "0", OPTION_BOOLEAN | OPTION_INTERNAL, "image device-specific options have been added" },
diff --git a/src/emu/imagedev/cartslot.c b/src/emu/imagedev/cartslot.c
index daa7e44e961..9ac546c77cb 100644
--- a/src/emu/imagedev/cartslot.c
+++ b/src/emu/imagedev/cartslot.c
@@ -371,10 +371,10 @@ static const cartslot_pcb_type *identify_pcb(device_image_interface &image)
{
if (me != MCERR_NOT_MULTICART)
fatalerror("multicart error: %s", multicart_error_text(me));
-
+
/* Force fetching of image metadata */
image.crc();
-
+
if (image.pcb() != NULL)
{
/* read from hash file */
diff --git a/src/emu/imagedev/chd_cd.c b/src/emu/imagedev/chd_cd.c
index 2c3962b8804..008fa87fb2b 100644
--- a/src/emu/imagedev/chd_cd.c
+++ b/src/emu/imagedev/chd_cd.c
@@ -79,7 +79,7 @@ static DEVICE_IMAGE_LOAD(cdrom)
dev_cdrom_t *cdrom = get_safe_token(&image.device());
chd_error err = (chd_error)0;
chd_file *chd = NULL;
- astring tempstring;
+ astring tempstring;
if (image.software_entry() == NULL)
{
@@ -148,7 +148,7 @@ static DEVICE_START(cdrom)
static DEVICE_IMAGE_SOFTLIST_LOAD(cdrom)
{
load_software_part_region( &image.device(), swlist, swname, start_entry );
- return TRUE;
+ return TRUE;
}
/*-------------------------------------------------
diff --git a/src/emu/imagedev/snapquik.h b/src/emu/imagedev/snapquik.h
index db9bab25259..37ccfa12a2c 100644
--- a/src/emu/imagedev/snapquik.h
+++ b/src/emu/imagedev/snapquik.h
@@ -104,7 +104,7 @@ struct _z80bin_config
MCFG_DEVICE_CONFIG_DATA64(snapquick_config, delay_seconds, (seconds_t) (_delay)) \
MCFG_DEVICE_CONFIG_DATA64(snapquick_config, delay_attoseconds, (attoseconds_t) (((_delay) - (int)(_delay)) * ATTOSECONDS_PER_SECOND)) \
MCFG_DEVICE_CONFIG_DATAPTR(z80bin_config, execute, Z80BIN_EXECUTE_NAME(_execute))
-
+
/***************************************************************************
FUNCTION PROTOTYPES
***************************************************************************/
diff --git a/src/emu/info.c b/src/emu/info.c
index d58fe495858..e5558944259 100644
--- a/src/emu/info.c
+++ b/src/emu/info.c
@@ -1108,7 +1108,7 @@ static void print_game_info(FILE *out, const game_driver *game)
print_game_adjusters(out, game, portlist);
print_game_driver(out, game, config);
print_game_images( out, game, config );
- print_game_software_list( out, game, config );
+ print_game_software_list( out, game, config );
print_game_ramoptions( out, game, config );
/* close the topmost tag */
fprintf(out, "\t</" XML_TOP ">\n");
diff --git a/src/emu/mame.c b/src/emu/mame.c
index 58e1b6c6575..4f7006fe37c 100644
--- a/src/emu/mame.c
+++ b/src/emu/mame.c
@@ -554,9 +554,9 @@ void mame_parse_ini_files(core_options *options, const game_driver *driver)
parse_ini_file(options, gparent->name, OPTION_PRIORITY_GPARENT_INI);
if (parent != NULL)
parse_ini_file(options, parent->name, OPTION_PRIORITY_PARENT_INI);
-
+
options_revert_driver_only(options, OPTION_PRIORITY_CMDLINE);
-
+
parse_ini_file(options, driver->name, OPTION_PRIORITY_DRIVER_INI);
}
}
diff --git a/src/emu/romload.c b/src/emu/romload.c
index 7010aa25bbe..81539f92a0b 100644
--- a/src/emu/romload.c
+++ b/src/emu/romload.c
@@ -684,7 +684,7 @@ static int open_rom_file(rom_load_data *romdata, const char *regiontag, const ro
if (separator2 != -1)
{
has_parent = TRUE;
-
+
// we are loading a clone through softlists, split the setname from the parentname
tag5.cpysubstr(tag4, separator2 + 1, tag4.len() - separator2 + 1);
tag4.del(separator2, tag4.len() - separator2);
@@ -1073,17 +1073,17 @@ chd_error open_disk_image_options(core_options *options, const game_driver *game
astring tag1(locationtag), tag2, tag3, tag4, tag5;
bool is_list = FALSE;
bool has_parent = FALSE;
-
+
int separator1 = tag1.chr(0, '%');
if (separator1 != -1)
{
is_list = TRUE;
-
+
// we are loading through softlists, split the listname from the regiontag
tag4.cpysubstr(tag1, separator1 + 1, tag1.len() - separator1 + 1);
tag1.del(separator1, tag1.len() - separator1);
tag1.cat(PATH_SEPARATOR);
-
+
// check if we are loading a clone (if this is the case also tag1 have a separator '%')
int separator2 = tag4.chr(0, '%');
if (separator2 != -1)
@@ -1094,7 +1094,7 @@ chd_error open_disk_image_options(core_options *options, const game_driver *game
tag5.cpysubstr(tag4, separator2 + 1, tag4.len() - separator2 + 1);
tag4.del(separator2, tag4.len() - separator2);
}
-
+
// prepare locations where we have to load from: list/parentname (if any) & list/clonename
astring swlist(tag1.cstr());
tag2.cpy(swlist.cat(tag4));
@@ -1104,10 +1104,10 @@ chd_error open_disk_image_options(core_options *options, const game_driver *game
tag3.cpy(swlist.cat(tag5));
}
}
-
+
if (tag5.chr(0, '%') != -1)
fatalerror("We do not support clones of clones!\n");
-
+
// try to load from the available location(s):
// - if we are not using lists, we have locationtag only;
// - if we are using lists, we have: list/clonename, list/parentname, clonename, parentname
@@ -1421,7 +1421,7 @@ void load_software_part_region(device_t *device, char *swlist, char *swname, rom
romdata->errorstring.catprintf("WARNING: support for software %s (in list %s) is only preliminary\n", swname, swlist);
romdata->warnings++;
}
-
+
/* loop until we hit the end */
for (region = start_region; region != NULL; region = rom_next_region(region))
{
diff --git a/src/emu/softlist.c b/src/emu/softlist.c
index 8707edca41c..f354f97527b 100644
--- a/src/emu/softlist.c
+++ b/src/emu/softlist.c
@@ -832,7 +832,7 @@ const char *software_get_clone(char *swlist, const char *swname)
{
software_info *tmp = software_list_find(software_list_ptr, swname, NULL);
retval = core_strdup(tmp->parentname);
- software_list_close(software_list_ptr);
+ software_list_close(software_list_ptr);
}
return retval;
@@ -853,7 +853,7 @@ UINT32 software_get_support(char *swlist, const char *swname)
{
software_info *tmp = software_list_find(software_list_ptr, swname, NULL);
retval = tmp->supported;
- software_list_close(software_list_ptr);
+ software_list_close(software_list_ptr);
}
return retval;
@@ -1525,18 +1525,18 @@ bool load_software_part(device_image_interface *image, const char *path, softwar
const char *software_part_get_feature(software_part *part, const char *feature_name)
{
feature_list *feature;
-
+
if (part == NULL)
return NULL;
-
+
for (feature = part->featurelist; feature; feature = feature->next)
{
if (!strcmp(feature->name, feature_name))
return feature->value;
}
-
+
return NULL;
-
+
}
diff --git a/src/emu/sound/bsmt2000.c b/src/emu/sound/bsmt2000.c
index 0bcf51d402f..cf0c776ae50 100644
--- a/src/emu/sound/bsmt2000.c
+++ b/src/emu/sound/bsmt2000.c
@@ -139,7 +139,7 @@ device_t *bsmt2000_device_config::alloc_device(running_machine &machine) const
//-------------------------------------------------
-// static_set_ready_callback - configuration
+// static_set_ready_callback - configuration
// helper to set the ready callback
//-------------------------------------------------
@@ -228,7 +228,7 @@ void bsmt2000_device::device_start()
// internally at 24MHz the max output sample rate is 32kHz
// divided by 128 gives us 6x the max output rate which is plenty for oversampling
m_stream = stream_create(*this, 0, 2, clock() / 128);
-
+
// register for save states
state_save_register_device_item(this, 0, m_register_select);
state_save_register_device_item(this, 0, m_write_data);
@@ -264,12 +264,12 @@ void bsmt2000_device::device_timer(emu_timer &timer, device_timer_id id, int par
stream_update(m_stream);
m_cpu->reset();
break;
-
+
// deferred register write
case TIMER_ID_REG_WRITE:
m_register_select = param & 0xffff;
break;
-
+
// deferred data write
case TIMER_ID_DATA_WRITE:
m_write_data = param & 0xffff;
@@ -307,7 +307,7 @@ UINT16 bsmt2000_device::read_status()
//-------------------------------------------------
-// write_reg - handle writes to the BSMT2000
+// write_reg - handle writes to the BSMT2000
// register select interface
//-------------------------------------------------
@@ -318,14 +318,14 @@ void bsmt2000_device::write_reg(UINT16 data)
//-------------------------------------------------
-// write_data - handle writes to the BSMT2000
+// write_data - handle writes to the BSMT2000
// data port
//-------------------------------------------------
void bsmt2000_device::write_data(UINT16 data)
{
device_timer_call_after_resynch(*this, TIMER_ID_DATA_WRITE, data);
-
+
// boost the interleave on a write so that the caller detects the status more accurately
m_machine.scheduler().boost_interleave(ATTOTIME_IN_USEC(1), ATTOTIME_IN_USEC(10));
}
@@ -343,7 +343,7 @@ READ16_MEMBER( bsmt2000_device::tms_register_r )
//-------------------------------------------------
-// tms_data_r - return the value written to the
+// tms_data_r - return the value written to the
// data port
//-------------------------------------------------
@@ -392,7 +392,7 @@ WRITE16_MEMBER( bsmt2000_device::tms_rom_bank_w )
//-------------------------------------------------
-// tms_left_w - handle writes to the left channel
+// tms_left_w - handle writes to the left channel
// DAC
//-------------------------------------------------
@@ -404,7 +404,7 @@ WRITE16_MEMBER( bsmt2000_device::tms_left_w )
//-------------------------------------------------
-// tms_right_w - handle writes to the right
+// tms_right_w - handle writes to the right
// channel DAC
//-------------------------------------------------
diff --git a/src/emu/sound/bsmt2000.h b/src/emu/sound/bsmt2000.h
index 435f570ec42..4d5ffc76362 100644
--- a/src/emu/sound/bsmt2000.h
+++ b/src/emu/sound/bsmt2000.h
@@ -74,7 +74,7 @@ class bsmt2000_device_config : public device_config,
public device_config_memory_interface
{
friend class bsmt2000_device;
-
+
typedef void (*ready_callback)(bsmt2000_device &device);
// construction/destruction
@@ -98,7 +98,7 @@ protected:
// internal state
const address_space_config m_space_config;
-
+
// inline data
ready_callback m_ready_callback;
};
@@ -126,7 +126,7 @@ protected:
virtual void device_start();
virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
-
+
// sound interface overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
diff --git a/src/emu/sound/disc_cls.h b/src/emu/sound/disc_cls.h
index dfb36fea2a0..e6be420716f 100644
--- a/src/emu/sound/disc_cls.h
+++ b/src/emu/sound/disc_cls.h
@@ -15,7 +15,7 @@
*
* Additions/bugfix February 2003 - D.Renaud, F.Palazzolo, K.Wilkins
* Discrete parallel tasks 2009 - Couriersud
- * Discrete classes 2010 - Couriersud
+ * Discrete classes 2010 - Couriersud
*
***********************************************************************/
@@ -25,7 +25,7 @@
#define DISCRETE_CLASS_CONSTRUCTOR(_name, _base) \
public: \
- DISCRETE_CLASS_NAME(_name)() \
+ DISCRETE_CLASS_NAME(_name)() \
: DISCRETE_CLASS_NAME(_base)() { }
#define DISCRETE_CLASS_DESTRUCTOR(_name) \
@@ -45,7 +45,7 @@ private: \
_priv \
}
-#define DISCRETE_CLASS_STEP(_name, _maxout, _priv) \
+#define DISCRETE_CLASS_STEP(_name, _maxout, _priv) \
class DISCRETE_CLASS_NAME(_name): public discrete_base_node, public discrete_step_interface \
{ \
DISCRETE_CLASS_CONSTRUCTOR(_name, base) \
@@ -58,7 +58,7 @@ private: \
_priv \
}
-#define DISCRETE_CLASS_RESET(_name, _maxout) \
+#define DISCRETE_CLASS_RESET(_name, _maxout) \
class DISCRETE_CLASS_NAME(_name): public discrete_base_node \
{ \
DISCRETE_CLASS_CONSTRUCTOR(_name, base) \
@@ -68,7 +68,7 @@ public: \
int max_output(void) { return _maxout; } \
}
-#define DISCRETE_CLASS(_name, _maxout, _priv) \
+#define DISCRETE_CLASS(_name, _maxout, _priv) \
class DISCRETE_CLASS_NAME(_name): public discrete_base_node, public discrete_step_interface \
{ \
DISCRETE_CLASS_DESTRUCTOR(_name) \
@@ -105,7 +105,7 @@ public:
*
*************************************/
-class DISCRETE_CLASS_NAME(dso_output): public discrete_base_node,
+class DISCRETE_CLASS_NAME(dso_output): public discrete_base_node,
public discrete_sound_output_interface,
public discrete_step_interface
{
@@ -238,7 +238,7 @@ private:
UINT8 m_data; /* data written */
UINT8 m_is_buffered;
/* the buffer stream */
- sound_stream *m_buffer_stream;
+ sound_stream *m_buffer_stream;
};
class DISCRETE_CLASS_NAME(dss_input_buffer): public DISCRETE_CLASS_NAME(dss_input_stream)
diff --git a/src/emu/sound/disc_dev.h b/src/emu/sound/disc_dev.h
index e45cdde1e36..1915a47233b 100644
--- a/src/emu/sound/disc_dev.h
+++ b/src/emu/sound/disc_dev.h
@@ -15,7 +15,7 @@
*
* Additions/bugfix February 2003 - D.Renaud, F.Palazzolo, K.Wilkins
* Discrete parallel tasks 2009 - Couriersud
- * Discrete classes 2010 - Couriersud
+ * Discrete classes 2010 - Couriersud
*
***********************************************************************/
@@ -98,7 +98,7 @@ DISCRETE_CLASS_STEP_RESET(dsd_555_vco1, 1,
);
DISCRETE_CLASS_STEP_RESET(dsd_566, 1,
- unsigned int m_state[2]; /* keeps track of excess flip_flop changes during the current step */
+ unsigned int m_state[2]; /* keeps track of excess flip_flop changes during the current step */
int m_flip_flop; /* 566 flip/flop output state */
double m_cap_voltage; /* voltage on cap */
double m_v_sqr_low; /* voltage for a squarewave at low */
diff --git a/src/emu/sound/disc_flt.h b/src/emu/sound/disc_flt.h
index 8a8e586c058..3a62857a8b7 100644
--- a/src/emu/sound/disc_flt.h
+++ b/src/emu/sound/disc_flt.h
@@ -15,7 +15,7 @@
*
* Additions/bugfix February 2003 - D.Renaud, F.Palazzolo, K.Wilkins
* Discrete parallel tasks 2009 - Couriersud
- * Discrete classes 2010 - Couriersud
+ * Discrete classes 2010 - Couriersud
*
***********************************************************************/
@@ -72,35 +72,35 @@ DISCRETE_CLASS_STEP_RESET(dst_op_amp_filt, 1,
);
DISCRETE_CLASS_STEP_RESET(dst_rc_circuit_1, 1,
- double m_v_cap;
- double m_v_charge_1_2;
+ double m_v_cap;
+ double m_v_charge_1_2;
double m_v_drop;
- double m_exp_1;
- double m_exp_1_2;
- double m_exp_2;
+ double m_exp_1;
+ double m_exp_1_2;
+ double m_exp_2;
);
DISCRETE_CLASS_STEP_RESET(dst_rcdisc, 1,
int m_state;
- double m_t; /* time */
- double m_exponent0;
+ double m_t; /* time */
+ double m_exponent0;
);
DISCRETE_CLASS_STEP_RESET(dst_rcdisc2, 1,
int m_state;
double m_v_out;
- double m_t; /* time */
- double m_exponent0;
- double m_exponent1;
+ double m_t; /* time */
+ double m_exponent0;
+ double m_exponent1;
);
DISCRETE_CLASS_STEP_RESET(dst_rcdisc3, 1,
int m_state;
double m_v_out;
- double m_t; /* time */
- double m_exponent0;
- double m_exponent1;
- double m_v_diode; /* rcdisc3 */
+ double m_t; /* time */
+ double m_exponent0;
+ double m_exponent1;
+ double m_v_diode; /* rcdisc3 */
);
DISCRETE_CLASS_STEP_RESET(dst_rcdisc4, 1,
@@ -113,9 +113,9 @@ DISCRETE_CLASS_STEP_RESET(dst_rcdisc4, 1,
DISCRETE_CLASS_STEP_RESET(dst_rcdisc5, 1,
int m_state;
- double m_t; /* time */
- double m_exponent0;
- double m_v_cap; /* rcdisc5 */
+ double m_t; /* time */
+ double m_exponent0;
+ double m_v_cap; /* rcdisc5 */
);
DISCRETE_CLASS_STEP_RESET(dst_rcintegrate, 1,
@@ -130,7 +130,7 @@ DISCRETE_CLASS_STEP_RESET(dst_rcintegrate, 1,
double m_exp_exponent1;
double m_c_exp0;
double m_c_exp1;
- double m_EM_IC_0_7;
+ double m_EM_IC_0_7;
);
DISCRETE_CLASS_STEP_RESET(dst_rcdisc_mod, 1,
@@ -153,25 +153,25 @@ DISCRETE_CLASS_STEP_RESET(dst_rcfilter, 1,
DISCRETE_CLASS_STEP_RESET(dst_rcfilter_sw, 1,
double m_vCap[4];
double m_exp[4];
- double m_exp0; /* fast case bit 0 */
- double m_exp1; /* fast case bit 1 */
- double m_factor; /* fast case */
- double m_f1[16];
- double m_f2[16];
+ double m_exp0; /* fast case bit 0 */
+ double m_exp1; /* fast case bit 1 */
+ double m_factor; /* fast case */
+ double m_f1[16];
+ double m_f2[16];
);
DISCRETE_CLASS_STEP_RESET(dst_rcdiscN, 1,
- double m_x1; /* x[k-1], previous input value */
- double m_y1; /* y[k-1], previous output value */
- double m_a1; /* digital filter coefficients, denominator */
- double m_b[2]; /* digital filter coefficients, numerator */
+ double m_x1; /* x[k-1], previous input value */
+ double m_y1; /* y[k-1], previous output value */
+ double m_a1; /* digital filter coefficients, denominator */
+ double m_b[2]; /* digital filter coefficients, numerator */
);
DISCRETE_CLASS_STEP_RESET(dst_rcdisc2N, 1,
struct discrete_filter_coeff m_fc0;
struct discrete_filter_coeff m_fc1;
- double m_x1;
- double m_y1;
+ double m_x1;
+ double m_y1;
);
diff --git a/src/emu/sound/disc_inp.c b/src/emu/sound/disc_inp.c
index 57aad660197..054d2d485eb 100644
--- a/src/emu/sound/disc_inp.c
+++ b/src/emu/sound/disc_inp.c
@@ -23,7 +23,7 @@
READ8_DEVICE_HANDLER(discrete_sound_r)
{
discrete_device *disc_device = downcast<discrete_device *>(device);
- return disc_device->read( *disc_device->machine->firstcpu->space(), offset, 0xff);
+ return disc_device->read( *disc_device->machine->firstcpu->space(), offset, 0xff);
}
diff --git a/src/emu/sound/disc_mth.c b/src/emu/sound/disc_mth.c
index b04af0f0c0b..65cb10b2fff 100644
--- a/src/emu/sound/disc_mth.c
+++ b/src/emu/sound/disc_mth.c
@@ -1585,7 +1585,7 @@ DISCRETE_STEP(dst_transform)
{
switch (*fPTR++)
{
- case TOK_MULT: top = stack.pop() * top; break;
+ case TOK_MULT: top = stack.pop() * top; break;
case TOK_DIV: top = stack.pop() / top; break;
case TOK_ADD: top = stack.pop() + top; break;
case TOK_MINUS: top = stack.pop() - top; break;
@@ -1630,7 +1630,7 @@ DISCRETE_RESET(dst_transform)
case '4': *p = TOK_4; break;
case 'P': *p = TOK_DUP; break;
case 'a': *p = TOK_ABS; break; /* absolute value */
- case 'i': *p = TOK_NEG; break; /* * -1 */
+ case 'i': *p = TOK_NEG; break; /* * -1 */
case '!': *p = TOK_NOT; break; /* Logical NOT of Last Value */
case '=': *p = TOK_EQUAL; break; /* Logical = */
case '>': *p = TOK_GREATER; break; /* Logical > */
@@ -1863,7 +1863,7 @@ DISCRETE_STEP(dst_tvca_op_amp)
double i_pos = 0; /* current into + input */
double i_out = 0; /* current at output */
- double v_out;
+ double v_out;
trig0 = (int)DST_TVCA_OP_AMP__TRG0;
trig1 = (int)DST_TVCA_OP_AMP__TRG1;
diff --git a/src/emu/sound/disc_mth.h b/src/emu/sound/disc_mth.h
index ad797345567..5debe62bfb6 100644
--- a/src/emu/sound/disc_mth.h
+++ b/src/emu/sound/disc_mth.h
@@ -15,7 +15,7 @@
*
* Additions/bugfix February 2003 - D.Renaud, F.Palazzolo, K.Wilkins
* Discrete parallel tasks 2009 - Couriersud
- * Discrete classes 2010 - Couriersud
+ * Discrete classes 2010 - Couriersud
*
***********************************************************************/
@@ -56,7 +56,7 @@ DISCRETE_CLASS_STEP_RESET(dst_logic_dff, 1,
);
DISCRETE_CLASS_STEP_RESET(dst_logic_jkff, 1,
- double m_v_out;
+ double m_v_out;
int m_last_clk;
);
@@ -91,7 +91,7 @@ DISCRETE_CLASS_STEP_RESET(dst_ramp, 1,
);
DISCRETE_CLASS_STEP_RESET(dst_samphold, 1,
- double m_last_input;
+ double m_last_input;
int m_clocktype;
);
@@ -118,13 +118,13 @@ public:
TOK_4,
TOK_DUP,
TOK_ABS, /* absolute value */
- TOK_NEG, /* * -1 */
+ TOK_NEG, /* * -1 */
TOK_NOT, /* Logical NOT of Last Value */
TOK_EQUAL, /* Logical = */
TOK_GREATER, /* Logical > */
TOK_LESS, /* Logical < */
TOK_AND, /* Bitwise AND */
- TOK_OR, /* Bitwise OR */
+ TOK_OR, /* Bitwise OR */
TOK_XOR /* Bitwise XOR */
};
void step(void);
diff --git a/src/emu/sound/disc_wav.h b/src/emu/sound/disc_wav.h
index 0bbde51d10b..2c711205a13 100644
--- a/src/emu/sound/disc_wav.h
+++ b/src/emu/sound/disc_wav.h
@@ -15,7 +15,7 @@
*
* Additions/bugfix February 2003 - D.Renaud, F.Palazzolo, K.Wilkins
* Discrete parallel tasks 2009 - Couriersud
- * Discrete classes 2010 - Couriersud
+ * Discrete classes 2010 - Couriersud
*
***********************************************************************/
@@ -48,7 +48,7 @@ DISCRETE_CLASS_STEP_RESET(dss_lfsr_noise, 2,
);
DISCRETE_CLASS_STEP_RESET(dss_noise, 2,
- double m_phase;
+ double m_phase;
);
DISCRETE_CLASS_STEP_RESET(dss_note, 1,
@@ -128,12 +128,12 @@ protected:
inline double tftab(double x);
inline double tf(double x);
private:
- DISCRETE_CLASS_INPUT(I_ENABLE, 0);
+ DISCRETE_CLASS_INPUT(I_ENABLE, 0);
DISCRETE_CLASS_INPUT(I_MOD, 1);
- DISCRETE_CLASS_INPUT(I_RC, 2);
- DISCRETE_CLASS_INPUT(I_RP, 3);
- DISCRETE_CLASS_INPUT(I_C, 4);
- DISCRETE_CLASS_INPUT(I_R2, 5);
+ DISCRETE_CLASS_INPUT(I_RC, 2);
+ DISCRETE_CLASS_INPUT(I_RP, 3);
+ DISCRETE_CLASS_INPUT(I_C, 4);
+ DISCRETE_CLASS_INPUT(I_R2, 5);
double mc_v_cap;
double mc_v_g2_old;
diff --git a/src/emu/sound/discrete.c b/src/emu/sound/discrete.c
index c1477911f09..4a6585b06a1 100644
--- a/src/emu/sound/discrete.c
+++ b/src/emu/sound/discrete.c
@@ -112,7 +112,7 @@ public:
inline void unlock(void) { m_threadid = -1; }
//const linked_list_entry *list;
- node_step_list_t step_list;
+ node_step_list_t step_list;
/* list of source nodes */
dynamic_array_t<input_buffer> source_list; /* discrete_source_node */
@@ -135,7 +135,7 @@ protected:
void check(discrete_task *dest_task);
void prepare_for_queue(int samples);
- dynamic_array_t<output_buffer> m_buffers;
+ dynamic_array_t<output_buffer> m_buffers;
discrete_device & m_device;
private:
@@ -303,7 +303,7 @@ void discrete_task::check(discrete_task *dest_task)
output_buffer *pbuf = NULL;
for (i = 0; i < m_buffers.count(); i++)
-// if (m_buffers[i].node->block_node() == inputnode_num)
+// if (m_buffers[i].node->block_node() == inputnode_num)
if (m_buffers[i].node_num == inputnode_num)
{
found = i;
diff --git a/src/emu/sound/discrete.h b/src/emu/sound/discrete.h
index 885f11c5d1f..d8682640e57 100644
--- a/src/emu/sound/discrete.h
+++ b/src/emu/sound/discrete.h
@@ -3503,7 +3503,7 @@
#define DISCRETE_STOP(_class) void DISCRETE_CLASS_FUNC(_class, stop)(void)
#define DISCRETE_DECLARE_INFO(_name) const _name *info = (const _name *)this->custom_data();
-//#define DISCRETE_INPUT(_num) (*(this->m_input[_num]))
+//#define DISCRETE_INPUT(_num) (*(this->m_input[_num]))
#define DISCRETE_INPUT(_num) (input(_num))
/*************************************
@@ -3817,7 +3817,7 @@ public:
m_arr[i-1] = m_arr[i];
m_count--;
}
- inline void clear(void) { m_count = 0; }
+ inline void clear(void) { m_count = 0; }
inline int count(void) const { return m_count; }
inline T *begin_ptr(void) const { return m_arr; }
inline T *end_ptr(void) const { return m_arr + (m_count - 1); }
@@ -4383,7 +4383,7 @@ protected:
double m_neg_sample_time;
/* list of all nodes */
- node_list_t m_node_list; /* node_description * */
+ node_list_t m_node_list; /* node_description * */
private:
void discrete_build_list(const discrete_block *intf, sound_block_list_t &block_list);
@@ -4427,7 +4427,7 @@ public:
// ======================> discrete_sound_device
-class discrete_sound_device : public discrete_device,
+class discrete_sound_device : public discrete_device,
public device_sound_interface
{
friend class discrete_sound_device_config;
@@ -4462,7 +4462,7 @@ private:
/* the input streams */
istream_node_list_t m_input_stream_list;
/* output node tracking */
- node_output_list_t m_output_list;
+ node_output_list_t m_output_list;
};
// device type definition
diff --git a/src/emu/sound/okim6295.c b/src/emu/sound/okim6295.c
index 5377a236408..08a11f9cf31 100644
--- a/src/emu/sound/okim6295.c
+++ b/src/emu/sound/okim6295.c
@@ -324,7 +324,7 @@ void okim6295_device::write_command(UINT8 command)
// the manual explicitly says that it's not possible to start multiple voices at the same time
int voicemask = command >> 4;
//if (voicemask != 0 && voicemask != 1 && voicemask != 2 && voicemask != 4 && voicemask != 8)
- // popmessage("OKI6295 start %x contact MAMEDEV", voicemask);
+ // popmessage("OKI6295 start %x contact MAMEDEV", voicemask);
// update the stream
stream_update(m_stream);
diff --git a/src/emu/sound/segapcm.c b/src/emu/sound/segapcm.c
index fd2398494ac..377f151eae7 100644
--- a/src/emu/sound/segapcm.c
+++ b/src/emu/sound/segapcm.c
@@ -35,26 +35,26 @@ static STREAM_UPDATE( SEGAPCM_update )
memset(outputs[0], 0, samples*sizeof(*outputs[0]));
memset(outputs[1], 0, samples*sizeof(*outputs[1]));
- // reg function
+ // reg function
// ------------------------------------------------
- // 0x00 ?
- // 0x01 ?
- // 0x02 volume left
- // 0x03 volume right
- // 0x04 loop address (08-15)
- // 0x05 loop address (16-23)
- // 0x06 end address
- // 0x07 address delta
- // 0x80 ?
- // 0x81 ?
- // 0x82 ?
- // 0x83 ?
- // 0x84 current address (08-15), 00-07 is internal?
- // 0x85 current address (16-23)
- // 0x86 bit 0: channel disable?
- // bit 1: loop disable
- // other bits: bank
- // 0x87 ?
+ // 0x00 ?
+ // 0x01 ?
+ // 0x02 volume left
+ // 0x03 volume right
+ // 0x04 loop address (08-15)
+ // 0x05 loop address (16-23)
+ // 0x06 end address
+ // 0x07 address delta
+ // 0x80 ?
+ // 0x81 ?
+ // 0x82 ?
+ // 0x83 ?
+ // 0x84 current address (08-15), 00-07 is internal?
+ // 0x85 current address (16-23)
+ // 0x86 bit 0: channel disable?
+ // bit 1: loop disable
+ // other bits: bank
+ // 0x87 ?
/* loop over channels */
for (ch = 0; ch < 16; ch++)