diff options
| author | 2025-07-27 05:49:25 +1000 | |
|---|---|---|
| committer | 2025-07-27 05:49:25 +1000 | |
| commit | fe4cd123b9883db9feea09e2f09f48e9227f8739 (patch) | |
| tree | cdc2d84f5357bb73fea5e96c97f095215fca231b /src/devices | |
| parent | 464a760553200f364a591f2501ca5cf911ab80e0 (diff) | |
srcclean and cleanup
Diffstat (limited to 'src/devices')
| -rw-r--r-- | src/devices/bus/nscsi/hd.cpp | 12 | ||||
| -rw-r--r-- | src/devices/bus/spectrum/dma/cards.cpp | 10 | ||||
| -rw-r--r-- | src/devices/cpu/m68000/m68k_in.lst | 2 | ||||
| -rw-r--r-- | src/devices/cpu/m68000/mcf5206e.cpp | 204 | ||||
| -rw-r--r-- | src/devices/cpu/m68000/mcf5206e.h | 70 | ||||
| -rw-r--r-- | src/devices/cpu/sh/sh7604.cpp | 10 | ||||
| -rw-r--r-- | src/devices/machine/mb87030.cpp | 5 | ||||
| -rw-r--r-- | src/devices/machine/mc68681.cpp | 18 | ||||
| -rw-r--r-- | src/devices/machine/mcf5206e.h | 2 | ||||
| -rw-r--r-- | src/devices/machine/pl6_exp.cpp | 4 | ||||
| -rw-r--r-- | src/devices/machine/pl6_exp.h | 4 | ||||
| -rw-r--r-- | src/devices/machine/pl6_fpga.cpp | 68 | ||||
| -rw-r--r-- | src/devices/machine/pl6_fpga.h | 140 | ||||
| -rw-r--r-- | src/devices/machine/pl6_pic.cpp | 12 | ||||
| -rw-r--r-- | src/devices/machine/pl6_pic.h | 36 | ||||
| -rw-r--r-- | src/devices/sound/dac.h | 2 | ||||
| -rw-r--r-- | src/devices/sound/flt_biquad.cpp | 54 | ||||
| -rw-r--r-- | src/devices/sound/flt_biquad.h | 22 | ||||
| -rw-r--r-- | src/devices/sound/fz_pcm.h | 4 | ||||
| -rw-r--r-- | src/devices/video/serialvfd.cpp | 6 | ||||
| -rw-r--r-- | src/devices/video/serialvfd.h | 14 |
21 files changed, 346 insertions, 353 deletions
diff --git a/src/devices/bus/nscsi/hd.cpp b/src/devices/bus/nscsi/hd.cpp index 75767e7b701..86e0ef2ff8c 100644 --- a/src/devices/bus/nscsi/hd.cpp +++ b/src/devices/bus/nscsi/hd.cpp @@ -61,9 +61,7 @@ uint8_t nscsi_harddisk_device::scsi_get_data(int id, int pos) if(id != 2) { data = nscsi_full_device::scsi_get_data(id, pos); - } - else - { + } else { int clba = lba + pos / bytes_per_sector; if(clba != cur_lba) { cur_lba = clba; @@ -120,9 +118,7 @@ void nscsi_harddisk_device::scsi_command() if(image->read(lba, block)) { scsi_data_in(2, blocks*bytes_per_sector); scsi_status_complete(SS_GOOD); - } - else - { + } else { scsi_status_complete(SS_CHECK_CONDITION); sense(false, SK_ILLEGAL_REQUEST, SK_ASC_INVALID_FIELD_IN_CDB); } @@ -139,9 +135,7 @@ void nscsi_harddisk_device::scsi_command() if(image->write(lba, block)) { scsi_data_out(2, blocks*bytes_per_sector); scsi_status_complete(SS_GOOD); - } - else - { + } else { scsi_status_complete(SS_CHECK_CONDITION); sense(false, SK_ILLEGAL_REQUEST, SK_ASC_INVALID_FIELD_IN_CDB); } diff --git a/src/devices/bus/spectrum/dma/cards.cpp b/src/devices/bus/spectrum/dma/cards.cpp index 7adf0d7bcc4..7168d920c0b 100644 --- a/src/devices/bus/spectrum/dma/cards.cpp +++ b/src/devices/bus/spectrum/dma/cards.cpp @@ -9,7 +9,7 @@ namespace bus::spectrum::dma_slot { namespace { /********************************************************************** - DATAGEAR: UA858D, Port 0x6b + DATAGEAR: UA858D, Port 0x6b **********************************************************************/ class datagear_device : public dma_device { @@ -32,7 +32,7 @@ void datagear_device::device_add_mconfig(machine_config &config) /********************************************************************** - DATAGEAR: ZILOG, Port 0x6b + DATAGEAR: ZILOG, Port 0x6b **********************************************************************/ class datagear_zilog_device : public dma_device { @@ -47,7 +47,7 @@ protected: /********************************************************************** - DATAGEAR: UA858D, Port 0x6b + DATAGEAR: UA858D, Port 0x6b **********************************************************************/ void datagear_zilog_device::device_add_mconfig(machine_config &config) { @@ -59,7 +59,7 @@ void datagear_zilog_device::device_add_mconfig(machine_config &config) /********************************************************************** - MB02+: UA858D, Port 0x0b + MB02+: UA858D, Port 0x0b **********************************************************************/ class mb02p_device : public dma_device { @@ -82,7 +82,7 @@ void mb02p_device::device_add_mconfig(machine_config &config) /********************************************************************** - MB02+: ZILOG, Port 0x0b + MB02+: ZILOG, Port 0x0b **********************************************************************/ class mb02p_zilog_device : public dma_device { diff --git a/src/devices/cpu/m68000/m68k_in.lst b/src/devices/cpu/m68000/m68k_in.lst index 7fbd6bd7737..737e0c6ec56 100644 --- a/src/devices/cpu/m68000/m68k_in.lst +++ b/src/devices/cpu/m68000/m68k_in.lst @@ -7796,7 +7796,7 @@ e5c0 ffc0 roxl w A+-DXWL 01:8 7:14 234fc:5 m68ki_write_8(ea, dst | 0x80); -4ac8 ffff halt . . c:0p +4ac8 ffff halt . . c:0p m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ m_icount = 0; m_stopped = STOP_LEVEL_HALT; diff --git a/src/devices/cpu/m68000/mcf5206e.cpp b/src/devices/cpu/m68000/mcf5206e.cpp index 1ed5d1d5945..109230824fb 100644 --- a/src/devices/cpu/m68000/mcf5206e.cpp +++ b/src/devices/cpu/m68000/mcf5206e.cpp @@ -2,26 +2,26 @@ // copyright-holders: Karl Stenerud, NaokiS /* - Notes: - Chip Select Module: - * Not currently implemented, quite possible it doesn't need to be added for any functional reason aside from completeness/debugging - System Integration Module: - * MBAR: should be set up in m68000_musashi_device::x4e7a_movec_l_c() to move the ColdFire IO register map according to the contents of MBAR - could store m_mbar in m68000_musashi_device and move the address_space_map to the given offset? - * SIMR: Logged and stored, but not used as there is no BDM interface present - * MARB: Logged and stored, but not used, not required? - DRAM Controller Module: - * All functions just log and store the registers, again, possibly not required for any functional reasons. - UART Modules: - * Uses the MC68681 device driver as a base as effectively it is an integrated one. The difference however is both UART modules are entirely - independant of the other, so there is two command registers e.t.c. They also only have a single channel each. - * In this implementation, the driver uses two MC68681s at the appropriate offsets to emulate this, with the MC68681 driver having an - entry for the MCF5206E which changes the mapping a little bit. A more appropriate solution would be to have a single UART module and load - two of them. - Timer Modules: - * Slow, could be improved. - - * Some of these modules can probably be split back into the /devices/machine device, namely the MBUS and timer modules, possibly SIM too. + Notes: + Chip Select Module: + * Not currently implemented, quite possible it doesn't need to be added for any functional reason aside from completeness/debugging + System Integration Module: + * MBAR: should be set up in m68000_musashi_device::x4e7a_movec_l_c() to move the ColdFire IO register map according to the contents of MBAR + could store m_mbar in m68000_musashi_device and move the address_space_map to the given offset? + * SIMR: Logged and stored, but not used as there is no BDM interface present + * MARB: Logged and stored, but not used, not required? + DRAM Controller Module: + * All functions just log and store the registers, again, possibly not required for any functional reasons. + UART Modules: + * Uses the MC68681 device driver as a base as effectively it is an integrated one. The difference however is both UART modules are entirely + independant of the other, so there is two command registers e.t.c. They also only have a single channel each. + * In this implementation, the driver uses two MC68681s at the appropriate offsets to emulate this, with the MC68681 driver having an + entry for the MCF5206E which changes the mapping a little bit. A more appropriate solution would be to have a single UART module and load + two of them. + Timer Modules: + * Slow, could be improved. + + * Some of these modules can probably be split back into the /devices/machine device, namely the MBUS and timer modules, possibly SIM too. */ #include "emu.h" @@ -31,27 +31,27 @@ #define LOG_DEBUG (1U << 1) #define LOG_INVALID (1U << 2) #define LOG_TIMER (1U << 3) -#define LOG_UART (1U << 4) -#define LOG_SWDT (1U << 5) -#define LOG_MBUS (1U << 6) -#define LOG_DRAM (1U << 7) -#define LOG_SIM (1U << 8) -#define LOG_DMA (1U << 9) -#define VERBOSE ( LOG_DEBUG | LOG_UART | LOG_SWDT | LOG_MBUS | LOG_DRAM | LOG_SIM | LOG_DMA ) +#define LOG_UART (1U << 4) +#define LOG_SWDT (1U << 5) +#define LOG_MBUS (1U << 6) +#define LOG_DRAM (1U << 7) +#define LOG_SIM (1U << 8) +#define LOG_DMA (1U << 9) +#define VERBOSE ( LOG_DEBUG | LOG_UART | LOG_SWDT | LOG_MBUS | LOG_DRAM | LOG_SIM | LOG_DMA ) #include "logmacro.h" -#define INT_LEVEL(N) ((N&0x1c) >> 2) -#define INT_PRIORITY(N) (N&0x03) -#define ICR_USE_AUTOVEC(N) ((N & 0x80) != 0) +#define INT_LEVEL(N) ((N&0x1c) >> 2) +#define INT_PRIORITY(N) (N&0x03) +#define ICR_USE_AUTOVEC(N) ((N & 0x80) != 0) static constexpr int EXCEPTION_BUS_ERROR = 2; static constexpr int EXCEPTION_UNINITIALIZED_INTERRUPT = 15; static constexpr int EXCEPTION_SPURIOUS_INTERRUPT = 24; template <typename T, typename U> -inline void BITWRITE(T &var, U bit_number, bool state) +inline void BITWRITE(T &var, U bit_number, bool state) { - var = (var & ~(static_cast<T>(1) << bit_number)) | (static_cast<T>(state) << bit_number); + var = (var & ~(static_cast<T>(1) << bit_number)) | (static_cast<T>(state) << bit_number); } DEFINE_DEVICE_TYPE(MCF5206E, mcf5206e_device, "mcf5206e", "Freescale MCF5206E") @@ -224,7 +224,7 @@ void mcf5206e_device::coldfire_vector_map(address_map &map){ map(0xfffffe0, 0xffffffc).r(m_sim, FUNC(coldfire_sim_device::interrupt_callback)); } -/* +/* * DRAM Controller * Handles the DRAM refresh and access control circuits */ @@ -276,8 +276,8 @@ void mcf5206e_device::dccr1_w(u8 data) m_dccr1 = data; } -/* - * Chip Select Module +/* + * Chip Select Module * Controls what address spaces that the configurable chip select pins will be assigned to. */ @@ -306,7 +306,7 @@ void mcf5206e_device::csmr_x_w(offs_t offset, u32 data) } u8 mcf5206e_device::cscr_x_r(offs_t offset) -{ +{ LOGMASKED(LOG_DEBUG, "%s: (Chip Select Control Register) CSCR%d_r\n", this->machine().describe_context(), offset); return m_cscr[offset]; } @@ -324,8 +324,8 @@ void mcf5206e_device::dmcr_w(u16 data) } -/* - * Parallel port +/* + * Parallel port * Just a 8 bit GPIO. Nothing to see here */ @@ -346,8 +346,8 @@ void mcf5206e_device::ppddr_w(u8 data) if(m_ppddr != data){ // Updating the register updates the pins immediately u8 mask = 0; - if(!BIT(m_sim->get_par(), 4)) mask |= 0x0f; // PP 0-3 / DDATA 0-3 - if(!BIT(m_sim->get_par(), 5)) mask |= 0xf0; // PP 4-7 / PST 0-3 + if(!BIT(m_sim->get_par(), 4)) mask |= 0x0f; // PP 0-3 / DDATA 0-3 + if(!BIT(m_sim->get_par(), 5)) mask |= 0xf0; // PP 4-7 / PST 0-3 // GPIO pins will physically be set to the current input and output state, and masked according to PAR m_gpio_w_cb(((m_ppdat_out & m_ppddr) | (m_ppdat_in & ~m_ppddr)) & mask); @@ -362,19 +362,19 @@ void mcf5206e_device::ppdat_w(u8 data) m_ppdat_out = data; u8 mask = 0; - if(!BIT(m_sim->get_par(), 4)) mask |= 0x0f; // PP 0-3 / DDATA 0-3 - if(!BIT(m_sim->get_par(), 5)) mask |= 0xf0; // PP 4-7 / PST 0-3 + if(!BIT(m_sim->get_par(), 4)) mask |= 0x0f; // PP 0-3 / DDATA 0-3 + if(!BIT(m_sim->get_par(), 5)) mask |= 0xf0; // PP 4-7 / PST 0-3 m_gpio_w_cb(((m_ppdat_out & m_ppddr) | (m_ppdat_in & ~m_ppddr)) & mask); } -/* +/* * System Integration Module * Handles the interrupt system and bus */ -coldfire_sim_device::coldfire_sim_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : +coldfire_sim_device::coldfire_sim_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, COLDFIRE_SIM, tag, owner, clock) , irq_vector_cb(*this, (u8)EXCEPTION_BUS_ERROR) , m_maincpu(*this, finder_base::DUMMY_TAG) @@ -390,8 +390,8 @@ void coldfire_sim_device::device_add_mconfig(machine_config &config) void coldfire_sim_device::device_start() { m_swdt->watchdog_enable(0); - m_timer_swdt = timer_alloc( FUNC( coldfire_sim_device::swdt_callback ), this ); // For interrupt version - + m_timer_swdt = timer_alloc( FUNC( coldfire_sim_device::swdt_callback ), this ); // For interrupt version + save_item(NAME(m_simr)); save_item(NAME(m_marb)); @@ -409,13 +409,13 @@ void coldfire_sim_device::device_start() void coldfire_sim_device::device_reset() { - if(!(m_rsr & 0x20)) m_rsr = 0x00; // don't clear if watchdog triggered + if(!(m_rsr & 0x20)) m_rsr = 0x00; // don't clear if watchdog triggered else m_rsr = 0x70; m_simr = 0xc0; m_marb = 0x00; m_ipr = 0x3ffe; - m_sypcr = 0x00; + m_sypcr = 0x00; m_swivr = 0x0f; m_imr = 0x3ffe; m_ipr = 0x0000; @@ -494,10 +494,10 @@ void coldfire_sim_device::icr_w(offs_t offset, u8 data) case 4: m_icr[offset] = (data & 0x83) + (5 << 2); break; case 5: m_icr[offset] = (data & 0x83) + (6 << 2); break; case 6: m_icr[offset] = (data & 0x83) + (7 << 2); break; - case 7: m_icr[offset] = (data & 0x03) + (7 << 2); break; // IPL7 and SWDT share same level, also you cannot use autovector on SWT. - case 8: m_icr[offset] = (data & 0x1f) + 0x80; break; // Timer 1 *must* use autovector - case 9: m_icr[offset] = (data & 0x1f) + 0x80; break; // Timer 2 *must* use autovector - case 10: m_icr[offset] = (data & 0x1f) + 0x80; break; // MBUS *must* use autovector + case 7: m_icr[offset] = (data & 0x03) + (7 << 2); break; // IPL7 and SWDT share same level, also you cannot use autovector on SWT. + case 8: m_icr[offset] = (data & 0x1f) + 0x80; break; // Timer 1 *must* use autovector + case 9: m_icr[offset] = (data & 0x1f) + 0x80; break; // Timer 2 *must* use autovector + case 10: m_icr[offset] = (data & 0x1f) + 0x80; break; // MBUS *must* use autovector case 11: m_icr[offset] = (data & 0x9f); break; case 12: m_icr[offset] = (data & 0x9f); break; case 13: m_icr[offset] = (data & 0x9f); break; @@ -548,38 +548,38 @@ void coldfire_sim_device::set_external_interrupt(int level, int state) // Return the vector for the highest priority and level interrupt u8 coldfire_sim_device::interrupt_callback(offs_t level) { - u8 ipl = (level >> 1) & 7; // Should be 2 for coldFire, really + u8 ipl = (level >> 1) & 7; // Should be 2 for coldFire, really u8 highest_priority_icr = 0; - u8 highest_priority_device = 0; + u8 highest_priority_device = 0; - if(!this->machine().side_effects_disabled()) { + if(!this->machine().side_effects_disabled()) { //logerror("%s: interrupt_callback(%u), ipl: %x, m_ipr: %x, m_imr: %x\n", this->machine().describe_context(), level, ipl, m_ipr, m_imr); m_maincpu->set_input_line(ipl, CLEAR_LINE); } - for (int i = 0; i < 15; i++) { + for (int i = 0; i < 15; i++) { //if(!this->machine().side_effects_disabled()) logerror("i: %x, m_icr: %x, ipl: %x, ipr_bit: %x\n", i, INT_LEVEL(m_icr[i]), ipl, BIT(m_ipr, 1 + i)); - if (BIT(m_ipr, 1 +i) && (INT_LEVEL(m_icr[i]) == ipl)) { - if (highest_priority_device == 0 || INT_PRIORITY(m_icr[i]) > INT_PRIORITY(highest_priority_icr)) { - highest_priority_icr = m_icr[i]; - highest_priority_device = i + 1; - } - } - } - - if (highest_priority_device == 0) { - if(!this->machine().side_effects_disabled()) logerror("%s: Spurious interrupt detected: %u\n", this->machine().describe_context(), ipl); - return EXCEPTION_SPURIOUS_INTERRUPT; - } + if (BIT(m_ipr, 1 +i) && (INT_LEVEL(m_icr[i]) == ipl)) { + if (highest_priority_device == 0 || INT_PRIORITY(m_icr[i]) > INT_PRIORITY(highest_priority_icr)) { + highest_priority_icr = m_icr[i]; + highest_priority_device = i + 1; + } + } + } + + if (highest_priority_device == 0) { + if(!this->machine().side_effects_disabled()) logerror("%s: Spurious interrupt detected: %u\n", this->machine().describe_context(), ipl); + return EXCEPTION_SPURIOUS_INTERRUPT; + } BITWRITE(m_ipr, ipl, 0); u8 vector = 0xff; - // Check if ICR specifies to use autovectoring - if (BIT(highest_priority_icr, 7)) { - vector = m68000_base_device::autovector(ipl); - } else { + // Check if ICR specifies to use autovectoring + if (BIT(highest_priority_icr, 7)) { + vector = m68000_base_device::autovector(ipl); + } else { // Determine the correct vector to return switch (highest_priority_device) { case EXTERNAL_IPL_1: @@ -609,13 +609,13 @@ u8 coldfire_sim_device::interrupt_callback(offs_t level) //m_maincpu->m_dma[1]->dma_int_callback(); break; default: - if(!this->machine().side_effects_disabled()) logerror("%s: Vector required for device that only supports autovectoring: %u, %u\n", + if(!this->machine().side_effects_disabled()) logerror("%s: Vector required for device that only supports autovectoring: %u, %u\n", this->machine().describe_context(), ipl, highest_priority_device); vector = EXCEPTION_UNINITIALIZED_INTERRUPT; break; } } - + return vector; } @@ -637,15 +637,15 @@ void coldfire_sim_device::set_interrupt(int interrupt, int state) case EXTERNAL_IPL_5: icr = m_icr[ICR5]; break; case EXTERNAL_IPL_6: icr = m_icr[ICR6]; break; case EXTERNAL_IPL_7: icr = m_icr[ICR7]; break; - case WATCHDOG_IRQ: icr = m_icr[ICR_SWDT]; break; - case TIMER_1_IRQ: icr = m_icr[ICR_TMR1]; break; // Always autovector - case TIMER_2_IRQ: icr = m_icr[ICR_TMR2]; break; // Always autovector - case MBUS_IRQ: icr = m_icr[ICR_MBUS]; break; // Always autovector - case UART_1_IRQ: icr = m_icr[ICR_UART1]; break; - case UART_2_IRQ: icr = m_icr[ICR_UART2]; break; - case DMA_0_IRQ: icr = m_icr[ICR_DMA0]; break; - case DMA_1_IRQ: icr = m_icr[ICR_DMA1]; break; - default: + case WATCHDOG_IRQ: icr = m_icr[ICR_SWDT]; break; + case TIMER_1_IRQ: icr = m_icr[ICR_TMR1]; break; // Always autovector + case TIMER_2_IRQ: icr = m_icr[ICR_TMR2]; break; // Always autovector + case MBUS_IRQ: icr = m_icr[ICR_MBUS]; break; // Always autovector + case UART_1_IRQ: icr = m_icr[ICR_UART1]; break; + case UART_2_IRQ: icr = m_icr[ICR_UART2]; break; + case DMA_0_IRQ: icr = m_icr[ICR_DMA0]; break; + case DMA_1_IRQ: icr = m_icr[ICR_DMA1]; break; + default: logerror("%s: Unknown device trying to set interrupt level: %u\n", this->machine().describe_context(), interrupt); return; } @@ -709,11 +709,11 @@ TIMER_CALLBACK_MEMBER(coldfire_sim_device::swdt_callback) //set_interrupt(WDINT); } -/* - * Timer Module/s +/* + * Timer Module/s * Creates an MCF5206e compatible 16-bit timer */ -coldfire_timer_device::coldfire_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : +coldfire_timer_device::coldfire_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, COLDFIRE_TIMER, tag, owner, clock) , write_irq(*this) { @@ -723,7 +723,7 @@ void coldfire_timer_device::timer_map(address_map &map) { map(0x00, 0x01).rw(FUNC(coldfire_timer_device::tmr_r), FUNC(coldfire_timer_device::tmr_w)); map(0x04, 0x05).rw(FUNC(coldfire_timer_device::trr_r), FUNC(coldfire_timer_device::trr_w)); - map(0x08, 0x09).r(FUNC(coldfire_timer_device::tcr_r)); // TCR is r/only + map(0x08, 0x09).r(FUNC(coldfire_timer_device::tcr_r)); // TCR is r/only map(0x0c, 0x0d).rw(FUNC(coldfire_timer_device::tcn_r), FUNC(coldfire_timer_device::tcn_w)); map(0x11, 0x11).rw(FUNC(coldfire_timer_device::ter_r), FUNC(coldfire_timer_device::ter_w)); } @@ -777,10 +777,10 @@ void coldfire_timer_device::tmr_w(u16 data) // todo: add tin pin support int div, start, interval; start = (m_trr - m_tcn); - div = ((m_tmr & 0xff00) >> 8) + 1; // 1 -> 256 division scale - if ((m_tmr & T_CL1) && !(m_tmr & T_CL0)) div = div * 16; // input clock / 16 - if (!(m_tmr & T_FRR)) interval = (0xffff * div); // don't reset tcn to 0 - else interval = start; // else tcn is reset to 0 + div = ((m_tmr & 0xff00) >> 8) + 1; // 1 -> 256 division scale + if ((m_tmr & T_CL1) && !(m_tmr & T_CL0)) div = div * 16; // input clock / 16 + if (!(m_tmr & T_FRR)) interval = (0xffff * div); // don't reset tcn to 0 + else interval = start; // else tcn is reset to 0 m_timer_start_time = machine().time(); m_timer->adjust(clocks_to_attotime(start * div), 0, clocks_to_attotime(interval * div)); } @@ -798,7 +798,7 @@ void coldfire_timer_device::trr_w(u16 data) u16 coldfire_timer_device::tcn_r() { m_tcn = (attotime_to_clocks(machine().time() - m_timer_start_time) & 0xffff); - return m_tcn; + return m_tcn; } void coldfire_timer_device::tcn_w(u16 data) @@ -826,7 +826,7 @@ void coldfire_timer_device::ter_w(u8 data) void mcf5206e_device::init_regs(bool first_init) { m_dcrr = 0x0000; - m_dctr = 0x0000; + m_dctr = 0x0000; m_dcar0 = UNINIT; m_dcmr0 = UNINIT; m_dccr0 = 0x00; @@ -861,7 +861,7 @@ void mcf5206e_device::init_regs(bool first_init) * Hosts I2C and Motorola extensions to the format. Can act as a device or host. */ -coldfire_mbus_device::coldfire_mbus_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : +coldfire_mbus_device::coldfire_mbus_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, COLDFIRE_MBUS, tag, owner, clock) , write_sda(*this) , write_scl(*this) @@ -948,7 +948,7 @@ u8 coldfire_mbus_device::mbsr_r() void coldfire_mbus_device::mbsr_w(u8 data) { - m_mbsr = (data & 0x14); // MAL & MIF + m_mbsr = (data & 0x14); // MAL & MIF LOGMASKED(LOG_MBUS, "%s: (M-Bus Status Register) mbsr_w: %02x\n", this->machine().describe_context(), data); } @@ -969,10 +969,10 @@ void coldfire_mbus_device::mbdr_w(u8 data) /* * DMA Module - * + * */ -coldfire_dma_device::coldfire_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : +coldfire_dma_device::coldfire_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, COLDFIRE_DMA, tag, owner, clock) , write_irq(*this) { @@ -995,10 +995,10 @@ void coldfire_dma_device::device_reset() { m_sar = 0x00000000; m_dar = 0x00000000; - m_dcr = 0x0000; - m_bcr = 0x0000; - m_dsr = 0x00; - m_divr = 0x0F; + m_dcr = 0x0000; + m_bcr = 0x0000; + m_dsr = 0x00; + m_divr = 0x0F; //m_timer_dma->adjust(attotime::never); } @@ -1040,7 +1040,7 @@ void coldfire_dma_device::bcr_w(u16 data) void coldfire_dma_device::dsr_w(u8 data) { - BITWRITE(m_dsr, 0, BIT(data, 0)); // Manual states only writes to bit 0 has any effect on the register + BITWRITE(m_dsr, 0, BIT(data, 0)); // Manual states only writes to bit 0 has any effect on the register LOGMASKED(LOG_DMA, "%s: (DMA Status Register) dsr_w: %02x\n", this->machine().describe_context(), data); } diff --git a/src/devices/cpu/m68000/mcf5206e.h b/src/devices/cpu/m68000/mcf5206e.h index b712a1dcf69..936388e1984 100644 --- a/src/devices/cpu/m68000/mcf5206e.h +++ b/src/devices/cpu/m68000/mcf5206e.h @@ -30,19 +30,19 @@ enum { EXTERNAL_IRQ_7 = 7 }; -class mcf5206e_device; // Forward declaration +class mcf5206e_device; // Forward declaration class coldfire_sim_device : public device_t { - friend class mcf5206e_device; + friend class mcf5206e_device; public: enum { - ICR1 = 0, // Bit 1 - ICR2, // Bit 2 - ICR3, // Bit 3 - ICR4, // Bit 4 - ICR5, // Bit 5 - ICR6, // Bit 6 + ICR1 = 0, // Bit 1 + ICR2, // Bit 2 + ICR3, // Bit 3 + ICR4, // Bit 4 + ICR5, // Bit 5 + ICR6, // Bit 6 ICR7, // Bit 7 ICR_SWDT, // Bit 8 ICR_TMR1, // Bit 9 @@ -50,8 +50,8 @@ class coldfire_sim_device : public device_t { ICR_MBUS, // Bit 11 ICR_UART1, // Bit 12 ICR_UART2, // Bit 13 - ICR_DMA0, // Bit 14 - ICR_DMA1, // Bit 15 + ICR_DMA0, // Bit 14 + ICR_DMA1, // Bit 15 MAX_ICR }; @@ -87,30 +87,30 @@ class coldfire_sim_device : public device_t { void set_interrupt(int interrupt, int state); TIMER_CALLBACK_MEMBER(swdt_callback); - + void icr_info(u8 icr); devcb_read8 irq_vector_cb; - u8 simr_r(){ return m_simr; } // sim configuration register - u8 marb_r(){ return m_marb; } // bus master arbitration control - u8 icr_r(offs_t offset); // interrupt control register - u16 imr_r(){ return m_imr; } // interrupt mask register - u16 ipr_r(){ return m_ipr; } // interrupt pending register - u8 sypcr_r(){ return m_sypcr; } // system protection control register - u8 swivr_r(){ return m_swivr; } // software watchdog interrupt vector register - u8 rsr_r(){ return m_rsr; } // reset status register - u16 par_r(){ return m_par; } // pin assignment register - - void simr_w(u8 data); + u8 simr_r(){ return m_simr; } // sim configuration register + u8 marb_r(){ return m_marb; } // bus master arbitration control + u8 icr_r(offs_t offset); // interrupt control register + u16 imr_r(){ return m_imr; } // interrupt mask register + u16 ipr_r(){ return m_ipr; } // interrupt pending register + u8 sypcr_r(){ return m_sypcr; } // system protection control register + u8 swivr_r(){ return m_swivr; } // software watchdog interrupt vector register + u8 rsr_r(){ return m_rsr; } // reset status register + u16 par_r(){ return m_par; } // pin assignment register + + void simr_w(u8 data); void marb_w(u8 data); void icr_w(offs_t offset, u8 data); - void imr_w(u16 data); + void imr_w(u16 data); void sypcr_w(u8 data); void swivr_w(u8 data); - void swsr_w(u8 data); // software watchdog service routine (kick) + void swsr_w(u8 data); // software watchdog service routine (kick) void rsr_w(u8 data); - void par_w(u16 data); + void par_w(u16 data); const u8 swdt_reset_sequence[2] = { 0x55, 0xaa }; u8 m_swdt_w_count; @@ -129,10 +129,10 @@ class coldfire_sim_device : public device_t { u8 m_external_ipl; emu_timer *m_timer_swdt; - + required_device<mcf5206e_device> m_maincpu; required_device<watchdog_timer_device> m_swdt; - + }; class coldfire_dma_device : public device_t { @@ -149,7 +149,7 @@ class coldfire_dma_device : public device_t { void device_reset() override ATTR_COLD; private: - + //TIMER_CALLBACK_MEMBER(dma_callback); //IRQ_CALLBACK_MEMBER(dma_int_callback) @@ -209,7 +209,7 @@ class coldfire_mbus_device : public device_t { TIMER_CALLBACK_MEMBER(mbus_callback); IRQ_CALLBACK_MEMBER(mbus_int_callback); - inline u8 madr_r(){ return m_madr; } // madr is only for when the cpu is a slave i2c device + inline u8 madr_r(){ return m_madr; } // madr is only for when the cpu is a slave i2c device u8 mbdr_r(); inline u8 mbcr_r(){ return m_mbcr; } u8 mbsr_r(); @@ -240,7 +240,7 @@ class coldfire_mbus_device : public device_t { class coldfire_timer_device : public device_t { public: coldfire_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - + void timer_map(address_map &map) ATTR_COLD; auto irq_cb() { return write_irq.bind(); } @@ -328,7 +328,7 @@ public: auto gpio_w_cb() { return m_gpio_w_cb.bind(); } void gpio_pin_w(int pin, int state); void gpio_port_w(u8 state); - + // DUART auto tx1_w_cb() { return write_tx1.bind(); } auto tx2_w_cb() { return write_tx2.bind(); } @@ -375,7 +375,7 @@ private: void timer_2_irq(int state){ m_sim->set_internal_interrupt_request(TIMER_2_IRQ, state); } required_device_array<coldfire_timer_device, 2> m_timer; - + /* dram controller module */ inline u16 dcrr_r(){ return m_dcrr; } inline u16 dctr_r(){ return m_dctr; } @@ -462,7 +462,7 @@ private: inline void csmr7_w(u32 data){ csmr_x_w(7, data); } inline void cscr7_w(u8 data){ cscr_x_w(7, data); } void dmcr_w(u16 data); - + u16 m_csar[8]; u32 m_csmr[8]; u16 m_cscr[8]; @@ -470,7 +470,7 @@ private: devcb_write_line::array<8> write_chip_select; - /* UART Modules */ + /* UART Modules */ // Stick two 68681 A channels in the CPU with no timers. void uart_1_irq(int state){ m_sim->set_internal_interrupt_request(UART_1_IRQ, state); } void uart_2_irq(int state){ m_sim->set_internal_interrupt_request(UART_2_IRQ, state); } @@ -482,7 +482,7 @@ private: // just an 8 bit gpio port inline u8 ppddr_r(){ return m_ppddr; } inline u8 ppdat_r(){ return (m_ppdat_in | (m_ppdat_out & m_ppddr)); } - + void ppddr_w(u8 data); void ppdat_w(u8 data); diff --git a/src/devices/cpu/sh/sh7604.cpp b/src/devices/cpu/sh/sh7604.cpp index d91692d0ac8..54205d5c0cc 100644 --- a/src/devices/cpu/sh/sh7604.cpp +++ b/src/devices/cpu/sh/sh7604.cpp @@ -286,11 +286,11 @@ void sh7604_device::sh7604_map(address_map &map) // map(0xffffff64, 0xffffff65).rw(FUNC(sh7604_device::bamrbh_r), FUNC(sh7604_device::bamrbh_w)); // map(0xffffff66, 0xffffff67).rw(FUNC(sh7604_device::bamrbl_r), FUNC(sh7604_device::bamrbl_w)); // map(0xffffff68, ).rw(FUNC(sh7604_device::bbrb_r), FUNC(sh7604_device::bbrb_w)); -// map(0xffffff70, 0xffffff71).rw(FUNC(sh7604_device::bdrbh_r), FUNC(sh7604_device::bdrbh_w)); -// map(0xffffff72, 0xffffff73).rw(FUNC(sh7604_device::bdrbl_r), FUNC(sh7604_device::bdrbl_w)); -// map(0xffffff74, 0xffffff75).rw(FUNC(sh7604_device::bdmrbh_r), FUNC(sh7604_device::bdmrbh_w)); -// map(0xffffff76, 0xffffff77).rw(FUNC(sh7604_device::bdmrbl_r), FUNC(sh7604_device::bdmrbl_w)); -// map(0xffffff78, 0xffffff79).rw(FUNC(sh7604_device::brcr_r), FUNC(sh7604_device::brcr_w)); +// map(0xffffff70, 0xffffff71).rw(FUNC(sh7604_device::bdrbh_r), FUNC(sh7604_device::bdrbh_w)); +// map(0xffffff72, 0xffffff73).rw(FUNC(sh7604_device::bdrbl_r), FUNC(sh7604_device::bdrbl_w)); +// map(0xffffff74, 0xffffff75).rw(FUNC(sh7604_device::bdmrbh_r), FUNC(sh7604_device::bdmrbh_w)); +// map(0xffffff76, 0xffffff77).rw(FUNC(sh7604_device::bdmrbl_r), FUNC(sh7604_device::bdmrbl_w)); +// map(0xffffff78, 0xffffff79).rw(FUNC(sh7604_device::brcr_r), FUNC(sh7604_device::brcr_w)); // DMAC map(0xffffff80, 0xffffff83).rw(FUNC(sh7604_device::sar_r<0>), FUNC(sh7604_device::sar_w<0>)); diff --git a/src/devices/machine/mb87030.cpp b/src/devices/machine/mb87030.cpp index 9266a81821a..32117c81613 100644 --- a/src/devices/machine/mb87030.cpp +++ b/src/devices/machine/mb87030.cpp @@ -384,7 +384,7 @@ void mb87030_device::step(bool timeout) if (m_scsi_phase != (ctrl & S_PHASE_MASK)) { LOG("SCSI phase change during transfer\n"); - m_ints |= (INTS_SERVICE_REQUIRED | INTS_COMMAND_COMPLETE); + m_ints |= INTS_SERVICE_REQUIRED | INTS_COMMAND_COMPLETE; m_ssts &= ~SSTS_SPC_BUSY; scsi_bus->data_w(scsi_refid, 0); update_ints(); @@ -585,8 +585,7 @@ void mb87030_device::scmd_w(uint8_t data) LOG("%s: %02X\n", __FUNCTION__, data); m_scmd = data; - if (!(m_sctl & SCTL_RESET_AND_DISABLE)) - { + if (!(m_sctl & SCTL_RESET_AND_DISABLE)) { scsi_set_ctrl((m_scmd & SCMD_RST_OUT) ? S_RST : 0, S_RST); } diff --git a/src/devices/machine/mc68681.cpp b/src/devices/machine/mc68681.cpp index 94bf12b9b68..6ebde08c3e5 100644 --- a/src/devices/machine/mc68681.cpp +++ b/src/devices/machine/mc68681.cpp @@ -13,7 +13,7 @@ Rewrite and modernization in progress by R. Belmont Addition of the duart compatible 68340 serial module support by Edstrom Support for the Exar XR68C681 by Joseph Zatarski (July of 2018) - Support for Freescale/NXP ColdFire UART module by NaokiS (June 2025) + Support for Freescale/NXP ColdFire UART module by NaokiS (June 2025) The main incompatibility between the 2681 and 68681 (Signetics and Motorola each manufactured both versions of the chip) is that the 68681 has a R/W input and @@ -43,10 +43,10 @@ or CRB registers. Writing the commands to either register affects the whole DUART, not just one channel. Resetting the DUART also leaves low power mode. - On the ColdFire MCF5206e, the UART modules are essentially just a pair of - MC68681s with only the A port visible and no counter/timer. The ACR on the - coldfire uarts shoud be updated to reflect this. Additionally, the - Buad Rate Generator prescaler reg should be used to set the buad. + On the ColdFire MCF5206e, the UART modules are essentially just a pair of + MC68681s with only the A port visible and no counter/timer. The ACR on the + coldfire uarts shoud be updated to reflect this. Additionally, the + Buad Rate Generator prescaler reg should be used to set the buad. */ #include "emu.h" @@ -301,7 +301,7 @@ void mcf5206e_uart_device::device_reset() duart_base_device::device_reset(); IVR = 0x0f; /* Interrupt Vector Register */ - UBG = 0x00; /* UART Buad Rate Generator Register */ + UBG = 0x00; /* UART Buad Rate Generator Register */ m_read_vector = false; } @@ -590,7 +590,7 @@ uint8_t mcf5206e_uart_device::read(offs_t offset) case 0x0d: /* UIP */ r = duart_base_device::read(offset); break; - + case 0x06: /* UBG Buad Generator Prescale MSB */ LOG("%s: Reading mcf5206e (%s) reg %x (%s)\n", this->machine().describe_context(), tag(), offset, mcf5206e_duart_reg_read_names[offset]); r = (UBG & 0xFF00) >> 8; @@ -600,7 +600,7 @@ uint8_t mcf5206e_uart_device::read(offs_t offset) r = (UBG & 0x00FF); break; - case 0x0c: /* UIVR */ + case 0x0c: /* UIVR */ LOG("%s: Reading mcf5206e (%s) reg %x (%s)\n", this->machine().describe_context(), tag(), offset, mcf5206e_duart_reg_read_names[offset]); r = IVR; break; @@ -794,7 +794,7 @@ void mcf5206e_uart_device::write(offs_t offset, uint8_t data) case 0x01: /* UCSR */ case 0x02: /* UCR */ case 0x03: /* UTB */ - case 0x04: /* ACR */ // <-- TODO: This needs changing as ACR on ColdFire only handles interrupt enable for CTS + case 0x04: /* ACR */ // <-- TODO: This needs changing as ACR on ColdFire only handles interrupt enable for CTS case 0x05: /* IMR */ case 0x0e: /* Set Output Port (RTS) Bit */ case 0x0f: /* Reset Output Port (RTS) Bit */ diff --git a/src/devices/machine/mcf5206e.h b/src/devices/machine/mcf5206e.h index fb0eb8ce339..2a3bea0a847 100644 --- a/src/devices/machine/mcf5206e.h +++ b/src/devices/machine/mcf5206e.h @@ -42,7 +42,7 @@ protected: virtual space_config_vector memory_space_config() const override; private: - + uint32_t m_coldfire_regs[0x400/4]; }; diff --git a/src/devices/machine/pl6_exp.cpp b/src/devices/machine/pl6_exp.cpp index 78d55a2abbf..4995e9f4ba3 100644 --- a/src/devices/machine/pl6_exp.cpp +++ b/src/devices/machine/pl6_exp.cpp @@ -40,8 +40,8 @@ void pluto6_calypso32_device::device_add_mconfig(machine_config &config) { RAM(config, m_vram); m_vram->set_default_size("8M"); m_vram->set_default_value(0); - - MB86292(config, m_gpu, XTAL(14'318'181)); + + MB86292(config, m_gpu, XTAL(14'318'181)); m_gpu->set_vram("vram"); m_gpu->set_screen(m_screen); } diff --git a/src/devices/machine/pl6_exp.h b/src/devices/machine/pl6_exp.h index eb33b8f846b..6cf1aba25ca 100644 --- a/src/devices/machine/pl6_exp.h +++ b/src/devices/machine/pl6_exp.h @@ -49,13 +49,13 @@ class pluto6_calypso32_device : public device_t, public pluto6_expansion_card_in { public: pluto6_calypso32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - + protected: pluto6_calypso32_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); virtual void device_start() override ATTR_COLD {}; virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; - + private: required_device<mb86292_device> m_gpu; required_device<ram_device> m_vram; diff --git a/src/devices/machine/pl6_fpga.cpp b/src/devices/machine/pl6_fpga.cpp index 4c5b7aa5eda..dcc2781e2a2 100644 --- a/src/devices/machine/pl6_fpga.cpp +++ b/src/devices/machine/pl6_fpga.cpp @@ -5,17 +5,17 @@ #include "pl6_fpga.h" -#define LOG_FPGA (1U << 1) -#define LOG_OUTPUTS (1U << 2) -#define LOG_LAMPS (1U << 3) -#define LOG_UART (1U << 4) +#define LOG_FPGA (1U << 1) +#define LOG_OUTPUTS (1U << 2) +#define LOG_LAMPS (1U << 3) +#define LOG_UART (1U << 4) #define VERBOSE ( LOG_FPGA | LOG_UART ) #include "logmacro.h" -#define LOGFPGA(...) LOGMASKED(LOG_FPGA, __VA_ARGS__) +#define LOGFPGA(...) LOGMASKED(LOG_FPGA, __VA_ARGS__) #define LOGOUTPUTS(...) LOGMASKED(LOG_OUTPUTS, __VA_ARGS__) -#define LOGLAMPS(...) LOGMASKED(LOG_LAMPS, __VA_ARGS__) +#define LOGLAMPS(...) LOGMASKED(LOG_LAMPS, __VA_ARGS__) static const char *const PL6_ROUTE_NAMES[][16] = { {"BACTA Port (B)"}, @@ -32,13 +32,13 @@ static const char *const PL6_ROUTE_NAMES[][16] = { // FPGA Registers //************************************ -uint8_t pl6fpga_device::xcra_read(){ +uint8_t pl6fpga_device::xcra_read(){ if(!machine().side_effects_disabled()) LOGFPGA( "%s: xcra_read( %02x )\n", this->machine().describe_context(), xcra_reg ); // xcra & 0x1 is hard reset return xcra_reg; } -void pl6fpga_device::xcra_write(uint8_t data){ +void pl6fpga_device::xcra_write(uint8_t data){ LOGFPGA( "%s: xcra_write( %02x )\n", this->machine().describe_context(), data ); xcra_reg = data; } @@ -60,7 +60,7 @@ void pl6fpga_device::sfxr2_write(uint16_t data){ void pl6fpga_device::xmpx_write(uint8_t data){ LOGLAMPS("%s: xmpx_write( %02x )\n", this->machine().describe_context(), data ); - mpx_row = ((data + 1) & 0xF); // Lamp(0,0) starts at 0x0F. Dunno why. + mpx_row = ((data + 1) & 0xF); // Lamp(0,0) starts at 0x0F. Dunno why. } void pl6fpga_device::aux_write(offs_t offset, uint8_t data) @@ -88,14 +88,14 @@ void pl6fpga_device::lamp_write(offs_t offset, uint32_t data) // 15-23: LED Display x+0 // 24-31: LED Display x+1 // Offset 0-7: Light on period 0 - 7 - + LOGLAMPS( "%s: lamp_write_input( %02x, %08x )\n", this->machine().describe_context(), offset, data ); - + if(mpx_regs[mpx_row][offset] != data){ mpx_regs[mpx_row][offset] = data; - // As light period is stored across the 8 registers, - // its required to cycle through them. + // As light period is stored across the 8 registers, + // its required to cycle through them. for(int i = 0; i < 32; i++){ // i = Bit in reg number 0-7 int lampval = 0; @@ -104,7 +104,7 @@ void pl6fpga_device::lamp_write(offs_t offset, uint32_t data) if(mpx_regs[mpx_row][r] & (1 << i)) lampval++; } if(i < 16){ - if(xcra_reg & MPX_EN) lamp_cb((16 * mpx_row) + i, lampval); + if(xcra_reg & MPX_EN) lamp_cb((16 * mpx_row) + i, lampval); } else { if(xcra_reg & MPX_EN) led_cb((16 * mpx_row) + (i - 16), lampval); @@ -162,9 +162,9 @@ void pl6fpga_device::map_uart_endpoint(uint8_t device, uint8_t route){ return; } - // + // //for(int i = 0; i < device_invalid; i++){ - // if(uart_route_map[i] == route) uart_route_map[i] = endpoint_invalid; + // if(uart_route_map[i] == route) uart_route_map[i] = endpoint_invalid; //} uart_route_map[device] = route; } @@ -172,15 +172,15 @@ void pl6fpga_device::map_uart_endpoint(uint8_t device, uint8_t route){ void pl6fpga_device::uart_txd(uint8_t device, int state){ if(device >= device_invalid) return; switch (uart_route_map[device]){ - case endpoint_rs232a: m_rs232a->write_txd(state); break; - case endpoint_bacta: m_bacta->write_txd(state); break; - case endpoint_rs232c: m_rs232c->write_txd(state); break; - case endpoint_rs232d: m_rs232d->write_txd(state); break; - case endpoint_cctalk1: m_cctalk1->write_txd(state); break; - case endpoint_cctalk2: m_cctalk2->write_txd(state); break; - case endpoint_ttl: m_serttl->write_txd(state); break; + case endpoint_rs232a: m_rs232a->write_txd(state); break; + case endpoint_bacta: m_bacta->write_txd(state); break; + case endpoint_rs232c: m_rs232c->write_txd(state); break; + case endpoint_rs232d: m_rs232d->write_txd(state); break; + case endpoint_cctalk1: m_cctalk1->write_txd(state); break; + case endpoint_cctalk2: m_cctalk2->write_txd(state); break; + case endpoint_ttl: m_serttl->write_txd(state); break; case endpoint_rs485: m_rs485->write_txd(state); break; - default: break; + default: break; } } @@ -221,9 +221,9 @@ void pl6fpga_device::developer_map(address_map &map) map(0x0800, 0x081f).w(FUNC(pl6fpga_device::lamp_write)); // UART map(0x1002, 0x1002).rw(FUNC(pl6fpga_device::xfpurt0_read), FUNC(pl6fpga_device::xfpurt0_write)); - //map(0x1003, 0x1003).w(FUNC(pl6fpga_device::fpuart0_rx));? // FPUART0 RX + //map(0x1003, 0x1003).w(FUNC(pl6fpga_device::fpuart0_rx));? // FPUART0 RX map(0x1006, 0x1006).rw(FUNC(pl6fpga_device::xfpurt1_read), FUNC(pl6fpga_device::xfpurt1_write)); - //map(0x1007, 0x1007).w(FUNC(pl6fpga_device::fpuart1_rx));? // FPUART1 RX + //map(0x1007, 0x1007).w(FUNC(pl6fpga_device::fpuart1_rx));? // FPUART1 RX // DUART map(0x1010, 0x101f).rw(FUNC(pl6fpga_device::duart_r), FUNC(pl6fpga_device::duart_w)); // IO @@ -238,13 +238,13 @@ void pl6fpga_device::betcom_map(address_map &map){ } void pl6fpga_device::jpm_map(address_map &map){ - map(0x0010, 0x0010).rw(FUNC(pl6fpga_device::xcra_read), FUNC(pl6fpga_device::xcra_write)); // ? + map(0x0010, 0x0010).rw(FUNC(pl6fpga_device::xcra_read), FUNC(pl6fpga_device::xcra_write)); // ? //map(0x0011, 0x0011).rw(FUNC(pl6fpga_device::), FUNC(pl6fpga_device::)); map(0x0018, 0x0018).w(FUNC(pl6fpga_device::crcchk_write)); - map(0x0900, 0x091f).w(FUNC(pl6fpga_device::lamp_write)); // ? - map(0x1900, 0x1903).rw(FUNC(pl6fpga_device::input_r), FUNC(pl6fpga_device::output_write)); // ? - map(0x1904, 0x1904).w(FUNC(pl6fpga_device::xmpx_write)); // ? - map(0x1a00, 0x1a07).w(FUNC(pl6fpga_device::aux_write)); // ? + map(0x0900, 0x091f).w(FUNC(pl6fpga_device::lamp_write)); // ? + map(0x1900, 0x1903).rw(FUNC(pl6fpga_device::input_r), FUNC(pl6fpga_device::output_write)); // ? + map(0x1904, 0x1904).w(FUNC(pl6fpga_device::xmpx_write)); // ? + map(0x1a00, 0x1a07).w(FUNC(pl6fpga_device::aux_write)); // ? } //************************************ @@ -300,7 +300,7 @@ void pl6fpga_device::set_fpga_type(int type){ } } } - + void pl6fpga_device::device_start(){ save_item(NAME(xcra_reg)); save_item(NAME(xuctrl_reg)); @@ -376,8 +376,8 @@ INPUT_PORTS_START(pluto6_fpga) PORT_BIT( 0x01010101, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10101010, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_TOGGLE PORT_NAME("Meter Sense") PORT_BIT( 0x02020202, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("SW3") - PORT_BIT( 0x04040404, IP_ACTIVE_LOW, IPT_UNKNOWN ) // MPX Test? - PORT_BIT( 0x08080808, IP_ACTIVE_LOW, IPT_UNKNOWN ) // MPX Test? + PORT_BIT( 0x04040404, IP_ACTIVE_LOW, IPT_UNKNOWN ) // MPX Test? + PORT_BIT( 0x08080808, IP_ACTIVE_LOW, IPT_UNKNOWN ) // MPX Test? INPUT_PORTS_END ioport_constructor pl6fpga_device::device_input_ports() const diff --git a/src/devices/machine/pl6_fpga.h b/src/devices/machine/pl6_fpga.h index 768ce58231b..40345bef1c6 100644 --- a/src/devices/machine/pl6_fpga.h +++ b/src/devices/machine/pl6_fpga.h @@ -1,55 +1,55 @@ // license:BSD-3-Clause // copyright-holders: NaokiS /* - Heber Pluto 6 FPGA - - The FPGA is the backbone of the Pluto 6 system and handles a lot of items. - - Primarially it handles: - * Part of the initial boot security in conjunction with the Pluto 6 CPLD. - * Multiplexed inputs (32 or 64 through expansion) - * Multiplexed lamps (256 or 512 through expansion) - * Multiplexed LEDs (256 or 512 through expansion) - * Register to I2S conversion - * DMA requests for the DAC. This is probably an internally set timer at a fixed freq. - * 2x UART controllers (probably styled on mc68681s for programmer convenience) - * UART route mapping (all UART output ports are configurable) - * Part of the game protection - * GPU syncronisation - - Essentially, if you don't unlock it with a specific 256 byte (?), CRC obfuscated key, - you won't be able to do much of anything with the ColdFire, just read the CF card, PIC18 - and the I2C bus, everything else is locked out. - - TODO: - * Sound - * UART - * GPU Sync (?) - * "receive" FPGA bitstream from PIC18 - * Should outputs be implemented directly in here, rather than a call back? - - "Bitstream" mappings: - Each manufacturer could have their own bitstream made which would rearrange the register - mapping, and change the CRC encoding and unlock key. It's possible this could be changed - between games but it seems mostly just manufacturer based on a brief glance. To add a - mapping into this device, add a read and write function call and then add the manufacturer/ID - to the PlutoFPGA enum. Finally make sure to update the dev_r and dev_w functions so that - the mapping can be used. - - It's possible that extra features could exist in some bitstreams, but it's unlikely this - would have been done. Heber did a good job of shoehorning as much as they could into the chip. - - Supported bitstreams: - * Developer - Note: Has no protection check, no CRC/key upload is needed. - * Betcom - Partial mapping - * Top Dog - Unimplemented - * Astra - Unimplemented - * JPM - Unimplemented - - Notes: - FPGA UART routing is currently split into two functions. This is mainly due to the fact - the FPGA has different register offsets for port 0 and port 1. ColdFire UART and the DUART - share a common register and thus function. + Heber Pluto 6 FPGA + + The FPGA is the backbone of the Pluto 6 system and handles a lot of items. + + Primarially it handles: + * Part of the initial boot security in conjunction with the Pluto 6 CPLD. + * Multiplexed inputs (32 or 64 through expansion) + * Multiplexed lamps (256 or 512 through expansion) + * Multiplexed LEDs (256 or 512 through expansion) + * Register to I2S conversion + * DMA requests for the DAC. This is probably an internally set timer at a fixed freq. + * 2x UART controllers (probably styled on mc68681s for programmer convenience) + * UART route mapping (all UART output ports are configurable) + * Part of the game protection + * GPU syncronisation + + Essentially, if you don't unlock it with a specific 256 byte (?), CRC obfuscated key, + you won't be able to do much of anything with the ColdFire, just read the CF card, PIC18 + and the I2C bus, everything else is locked out. + + TODO: + * Sound + * UART + * GPU Sync (?) + * "receive" FPGA bitstream from PIC18 + * Should outputs be implemented directly in here, rather than a call back? + + "Bitstream" mappings: + Each manufacturer could have their own bitstream made which would rearrange the register + mapping, and change the CRC encoding and unlock key. It's possible this could be changed + between games but it seems mostly just manufacturer based on a brief glance. To add a + mapping into this device, add a read and write function call and then add the manufacturer/ID + to the PlutoFPGA enum. Finally make sure to update the dev_r and dev_w functions so that + the mapping can be used. + + It's possible that extra features could exist in some bitstreams, but it's unlikely this + would have been done. Heber did a good job of shoehorning as much as they could into the chip. + + Supported bitstreams: + * Developer - Note: Has no protection check, no CRC/key upload is needed. + * Betcom - Partial mapping + * Top Dog - Unimplemented + * Astra - Unimplemented + * JPM - Unimplemented + + Notes: + FPGA UART routing is currently split into two functions. This is mainly due to the fact + the FPGA has different register offsets for port 0 and port 1. ColdFire UART and the DUART + share a common register and thus function. */ #ifndef MAME_MACHINE_PL6_FPGA_H @@ -149,12 +149,12 @@ private: void uart_rxd(uint8_t device, int state); uint8_t uart_route_map[6] = { - endpoint_invalid, // ColdFire 0 - endpoint_invalid, // ColdFire 1 - endpoint_invalid, // FPGA UART 0 - endpoint_invalid, // FPGA UART 1 - endpoint_invalid, // DUART 0 - endpoint_invalid // DUART 1 + endpoint_invalid, // ColdFire 0 + endpoint_invalid, // ColdFire 1 + endpoint_invalid, // FPGA UART 0 + endpoint_invalid, // FPGA UART 1 + endpoint_invalid, // DUART 0 + endpoint_invalid // DUART 1 }; devcb_read32 input_cb; @@ -170,15 +170,15 @@ private: required_ioport m_in1; enum{ - GSYNC_EN = 0x10, - MPX_EN = 0x20, - FINT_EN = 0x40, - SFX_EN = 0x80 + GSYNC_EN = 0x10, + MPX_EN = 0x20, + FINT_EN = 0x40, + SFX_EN = 0x80 }; // FPGA int fpga_type; - + uint8_t xcra_reg; uint8_t xuctrl_reg; uint8_t xdurt_reg; @@ -186,8 +186,8 @@ private: uint8_t xfpurt1_reg; // Lamps - uint8_t mpx_row; // 0x00-0x0F range - uint32_t mpx_regs[16][8]; // MPX Lamp/LED state and period data. + uint8_t mpx_row; // 0x00-0x0F range + uint32_t mpx_regs[16][8]; // MPX Lamp/LED state and period data. // Mappings void developer_map(address_map &map); @@ -225,14 +225,14 @@ private: void map_uart_endpoint(uint8_t device, uint8_t route); enum { - endpoint_bacta = 0x00, - endpoint_rs232a = 0x01, - endpoint_rs232c = 0x02, - endpoint_rs232d = 0x03, - endpoint_cctalk1 = 0x04, - endpoint_cctalk2 = 0x05, - endpoint_ttl = 0x06, - endpoint_rs485 = 0x07, + endpoint_bacta = 0x00, + endpoint_rs232a = 0x01, + endpoint_rs232c = 0x02, + endpoint_rs232d = 0x03, + endpoint_cctalk1 = 0x04, + endpoint_cctalk2 = 0x05, + endpoint_ttl = 0x06, + endpoint_rs485 = 0x07, endpoint_invalid }; diff --git a/src/devices/machine/pl6_pic.cpp b/src/devices/machine/pl6_pic.cpp index dcc7efdfc36..61367a5f8d0 100644 --- a/src/devices/machine/pl6_pic.cpp +++ b/src/devices/machine/pl6_pic.cpp @@ -5,7 +5,7 @@ #include "pl6_pic.h" -#define LOG_PIC (1U << 1) +#define LOG_PIC (1U << 1) #define VERBOSE ( LOG_PIC ) #include "logmacro.h" @@ -34,16 +34,16 @@ void pl6pic_device::rtc_clock_updated(int year, int month, int day, int day_of_w void pl6pic_device::device_start() { - // Heartbeat LED flash - m_timer = timer_alloc(FUNC(pl6pic_device::heartbeat_callback), this); - m_timer->adjust(attotime::from_seconds(1), 0, attotime::from_seconds(1)); - save_item(NAME(m_heartbeat)); + // Heartbeat LED flash + m_timer = timer_alloc(FUNC(pl6pic_device::heartbeat_callback), this); + m_timer->adjust(attotime::from_seconds(1), 0, attotime::from_seconds(1)); + save_item(NAME(m_heartbeat)); m_hb_led.resolve(); } TIMER_CALLBACK_MEMBER(pl6pic_device::heartbeat_callback) { - if(m_heartbeat) m_heartbeat = 0; + if(m_heartbeat) m_heartbeat = 0; else m_heartbeat = 1; m_hb_led = m_heartbeat; } diff --git a/src/devices/machine/pl6_pic.h b/src/devices/machine/pl6_pic.h index 2fe56e5a0c3..d25ae8188f9 100644 --- a/src/devices/machine/pl6_pic.h +++ b/src/devices/machine/pl6_pic.h @@ -7,24 +7,24 @@ Heber Pluto 6 PIC18 Customer Security Device The CSD is used as part of the security, anti-tampering and system controller functions within the Pluto 6. When the pluto 6 is powered down, a Varta 3.3V Ni-MH battery keeps the PIC18 running in a lower power state. Is this state, the CSD does the following: - * Keeps the RTC running. - * Reads 4 inputs (called power down inputs) and logs the state of them if they change with a timestamp. - * Retains any current logs. + * Keeps the RTC running. + * Reads 4 inputs (called power down inputs) and logs the state of them if they change with a timestamp. + * Retains any current logs. When the Pluto 6 is powered up, it does the following: - * Go into a fully powered state - * Load the encrypted FPGA bitstream using the CPLD to decrypt it. - * Release reset on the CPU. - * Read and supply the following over I2C: - * Stake and Percentage dongles - * 2x 8-Way DIP switches - * PIC18 Revision - * PIC18 Signature - - TODO: - * _almost_ everything. - * "upload" FPGA bitstream - * Hold CPU in reset? + * Go into a fully powered state + * Load the encrypted FPGA bitstream using the CPLD to decrypt it. + * Release reset on the CPU. + * Read and supply the following over I2C: + * Stake and Percentage dongles + * 2x 8-Way DIP switches + * PIC18 Revision + * PIC18 Signature + + TODO: + * _almost_ everything. + * "upload" FPGA bitstream + * Hold CPU in reset? */ #ifndef MAME_MACHINE_PL6_PIC_H @@ -37,7 +37,7 @@ When the Pluto 6 is powered up, it does the following: INPUT_PORTS_EXTERN(pluto6_csd_pic); -class pl6pic_device : +class pl6pic_device : public device_t, public i2c_hle_interface, public device_rtc_interface @@ -63,7 +63,7 @@ protected: private: TIMER_CALLBACK_MEMBER(heartbeat_callback); - + uint8_t m_rtc_minute; uint8_t m_rtc_hour; uint8_t m_rtc_day; diff --git a/src/devices/sound/dac.h b/src/devices/sound/dac.h index 7dd0ea77a91..7a956b4eab3 100644 --- a/src/devices/sound/dac.h +++ b/src/devices/sound/dac.h @@ -213,7 +213,7 @@ DAC_GENERATOR(MC3410, mc3410_device, dac_word_device_base, dac_mapper_unsi DAC_GENERATOR(MP1210, mp1210_device, dac_word_device_base, dac_mapper_signed, 12, dac_gain_r2r, "MP1210 DAC", "mp1210") // also addressable with separate 8-bit and 4-bit input latches DAC_GENERATOR(PCM54HP, pcm54hp_device, dac_word_device_base, dac_mapper_unsigned, 16, dac_gain_r2r, "PCM54HP DAC", "pcm54hp") DAC_GENERATOR(UDA1341TS, uda1341ts_device, dac_word_device_base, dac_mapper_signed, 16, dac_gain_r2r, "UDA1341TS DAC", "uda1341ts") // I2C stereo audio codec -DAC_GENERATOR(CS4334, cs4334_device, dac_word_device_base, dac_mapper_signed, 16, dac_gain_r2r, "CS4334 DAC", "cs4334") // I2C stereo audio codec +DAC_GENERATOR(CS4334, cs4334_device, dac_word_device_base, dac_mapper_signed, 16, dac_gain_r2r, "CS4334 DAC", "cs4334") // I2C stereo audio codec DAC_GENERATOR(ZN425E, zn425e_device, dac_byte_device_base, dac_mapper_unsigned, 8, dac_gain_r2r, "ZN425E DAC", "zn425e") DAC_GENERATOR(ZN426E, zn426e_device, dac_byte_device_base, dac_mapper_unsigned, 8, dac_gain_r2r, "ZN426E-8 DAC", "zn426e") DAC_GENERATOR(ZN428E, zn428e_device, dac_byte_device_base, dac_mapper_unsigned, 8, dac_gain_r2r, "ZN428E-8 DAC", "zn428e") diff --git a/src/devices/sound/flt_biquad.cpp b/src/devices/sound/flt_biquad.cpp index 88d06bcd9ad..64c16aa555e 100644 --- a/src/devices/sound/flt_biquad.cpp +++ b/src/devices/sound/flt_biquad.cpp @@ -75,7 +75,7 @@ filter_biquad_device::filter_biquad_device(const machine_config &mconfig, const } // set up the filter with the specified parameters and return a pointer to the new device -filter_biquad_device& filter_biquad_device::setup(biquad_type type, double fc, double q, double gain) +filter_biquad_device &filter_biquad_device::setup(biquad_type type, double fc, double q, double gain) { m_type = type; m_fc = fc; @@ -83,7 +83,7 @@ filter_biquad_device& filter_biquad_device::setup(biquad_type type, double fc, d m_gain = gain; return *this; } -filter_biquad_device& filter_biquad_device::setup(filter_biquad_device::biquad_params p) +filter_biquad_device &filter_biquad_device::setup(filter_biquad_device::biquad_params p) { m_type = p.type; m_fc = p.fc; @@ -91,7 +91,7 @@ filter_biquad_device& filter_biquad_device::setup(filter_biquad_device::biquad_p m_gain = p.gain; return *this; } -filter_biquad_device& filter_biquad_device::setup_raw(double a1, double a2, double b0, double b1, double b2) +filter_biquad_device &filter_biquad_device::setup_raw(double a1, double a2, double b0, double b1, double b2) { m_type = biquad_type::RAWPARAMS; m_a1 = a1; @@ -113,7 +113,7 @@ void filter_biquad_device::modify(biquad_type type, double fc, double q, double m_gain = gain; recalc(); } -void filter_biquad_device::modify(filter_biquad_device::biquad_params p) +void filter_biquad_device::modify(biquad_params p) { m_stream->update(); m_type = p.type; @@ -155,7 +155,7 @@ void filter_biquad_device::modify_raw(double a1, double a2, double b0, double b1 */ filter_biquad_device::biquad_params filter_biquad_device::opamp_sk_lphp_calc(biquad_type type, double r1, double r2, double r3, double r4, double c1, double c2) { - filter_biquad_device::biquad_params r; + biquad_params r; if ((r1 == 0) || (r2 == 0) || (r3 == 0) || (r4 == 0) || (c1 == 0) || (c2 == 0)) { fatalerror("filter_biquad_device::opamp_sk_lphp_calc() - no parameters can be 0; parameters were: r1: %f, r2: %f, r3: %f, r4: %f, c1: %f, c2: %f", r1, r2, r3, r4, c1, c2); /* Filter can not be setup. Undefined results. */ @@ -197,15 +197,15 @@ filter_biquad_device::biquad_params filter_biquad_device::opamp_sk_lphp_calc(biq * | * gnd */ -filter_biquad_device& filter_biquad_device::opamp_sk_lowpass_setup(double r1, double r2, double r3, double r4, double c1, double c2) +filter_biquad_device &filter_biquad_device::opamp_sk_lowpass_setup(double r1, double r2, double r3, double r4, double c1, double c2) { - filter_biquad_device::biquad_params p = opamp_sk_lphp_calc(biquad_type::LOWPASS, r1, r2, r3, r4, c1, c2); + biquad_params p = opamp_sk_lphp_calc(biquad_type::LOWPASS, r1, r2, r3, r4, c1, c2); return setup(p); } void filter_biquad_device::opamp_sk_lowpass_modify(double r1, double r2, double r3, double r4, double c1, double c2) { - filter_biquad_device::biquad_params p = opamp_sk_lphp_calc(biquad_type::LOWPASS, r1, r2, r3, r4, c1, c2); + biquad_params p = opamp_sk_lphp_calc(biquad_type::LOWPASS, r1, r2, r3, r4, c1, c2); modify(p); } @@ -233,15 +233,15 @@ void filter_biquad_device::opamp_sk_lowpass_modify(double r1, double r2, double * | * gnd */ -filter_biquad_device& filter_biquad_device::opamp_sk_highpass_setup(double r1, double r2, double r3, double r4, double c1, double c2) +filter_biquad_device &filter_biquad_device::opamp_sk_highpass_setup(double r1, double r2, double r3, double r4, double c1, double c2) { - filter_biquad_device::biquad_params p = opamp_sk_lphp_calc(biquad_type::HIGHPASS, r1, r2, r3, r4, c1, c2); + biquad_params p = opamp_sk_lphp_calc(biquad_type::HIGHPASS, r1, r2, r3, r4, c1, c2); return setup(p); } void filter_biquad_device::opamp_sk_highpass_modify(double r1, double r2, double r3, double r4, double c1, double c2) { - filter_biquad_device::biquad_params p = opamp_sk_lphp_calc(biquad_type::HIGHPASS, r1, r2, r3, r4, c1, c2); + biquad_params p = opamp_sk_lphp_calc(biquad_type::HIGHPASS, r1, r2, r3, r4, c1, c2); modify(p); } @@ -288,21 +288,21 @@ void filter_biquad_device::opamp_sk_highpass_modify(double r1, double r2, double * vRef >--' |/ * */ -filter_biquad_device& filter_biquad_device::opamp_mfb_lowpass_setup(double r1, double r2, double r3, double c1, double c2) +filter_biquad_device &filter_biquad_device::opamp_mfb_lowpass_setup(double r1, double r2, double r3, double c1, double c2) { - filter_biquad_device::biquad_params p = opamp_mfb_lowpass_calc(r1, r2, r3, c1, c2); + biquad_params p = opamp_mfb_lowpass_calc(r1, r2, r3, c1, c2); return setup(p); } void filter_biquad_device::opamp_mfb_lowpass_modify(double r1, double r2, double r3, double c1, double c2) { - filter_biquad_device::biquad_params p = opamp_mfb_lowpass_calc(r1, r2, r3, c1, c2); + biquad_params p = opamp_mfb_lowpass_calc(r1, r2, r3, c1, c2); modify(p); } filter_biquad_device::biquad_params filter_biquad_device::opamp_mfb_lowpass_calc(double r1, double r2, double r3, double c1, double c2) { - filter_biquad_device::biquad_params r; + biquad_params r; if ((r1 == 0) || ((r2 == 0) && (c1 != 0)) || (r3 == 0) || (c2 == 0)) { fatalerror("filter_biquad_device::opamp_mfb_lowpass_calc() - only c1 can be 0 (and if c1 is 0, r2 can also be 0); parameters were: r1: %f, r2: %f, r3: %f, c1: %f, c2: %f", r1, r2, r3, c1, c2); /* Filter can not be setup. Undefined results. */ @@ -344,7 +344,7 @@ filter_biquad_device::biquad_params filter_biquad_device::opamp_mfb_lowpass_calc * gnd * */ -filter_biquad_device& filter_biquad_device::opamp_mfb_bandpass_setup(double r1, double r2, double r3, double c1, double c2) +filter_biquad_device &filter_biquad_device::opamp_mfb_bandpass_setup(double r1, double r2, double r3, double c1, double c2) { if ((r1 == 0) || (r2 == 0) || (r3 == 0) || (c1 == 0) || (c2 == 0)) { @@ -375,7 +375,7 @@ filter_biquad_device& filter_biquad_device::opamp_mfb_bandpass_setup(double r1, * gnd vRef >---' |/ * */ -filter_biquad_device& filter_biquad_device::opamp_mfb_highpass_setup(double r1, double r2, double c1, double c2, double c3) +filter_biquad_device &filter_biquad_device::opamp_mfb_highpass_setup(double r1, double r2, double c1, double c2, double c3) { if ((r1 == 0) || (r2 == 0) || (c1 == 0) || (c2 == 0) || (c3 == 0)) { @@ -411,21 +411,21 @@ filter_biquad_device& filter_biquad_device::opamp_mfb_highpass_setup(double r1, * vRef >---' |/ * */ -filter_biquad_device& filter_biquad_device::opamp_diff_bandpass_setup(double r1, double r2, double c1, double c2) +filter_biquad_device &filter_biquad_device::opamp_diff_bandpass_setup(double r1, double r2, double c1, double c2) { - filter_biquad_device::biquad_params p = opamp_diff_bandpass_calc(r1, r2, c1, c2); + biquad_params p = opamp_diff_bandpass_calc(r1, r2, c1, c2); return setup(p); } void filter_biquad_device::opamp_diff_bandpass_modify(double r1, double r2, double c1, double c2) { - filter_biquad_device::biquad_params p = opamp_diff_bandpass_calc(r1, r2, c1, c2); + biquad_params p = opamp_diff_bandpass_calc(r1, r2, c1, c2); modify(p); } filter_biquad_device::biquad_params filter_biquad_device::opamp_diff_bandpass_calc(double r1, double r2, double c1, double c2) { - filter_biquad_device::biquad_params r; + biquad_params r; if ((r1 == 0) || (r2 == 0) || (c1 == 0) || (c2 == 0)) { fatalerror("filter_biquad_device::opamp_diff_bandpass_calc() - no parameters can be 0; parameters were: r1: %f, r2: %f, c1: %f, c2: %f", r1, r2, c1, c2); /* Filter can not be setup. Undefined results. */ @@ -480,7 +480,7 @@ filter_biquad_device::biquad_params filter_biquad_device::opamp_diff_bandpass_ca * from the equations above, with some algebra. */ -filter_biquad_device& filter_biquad_device::rc_rr_bandpass_setup(double r1, double r2, double c1, double c2) +filter_biquad_device &filter_biquad_device::rc_rr_bandpass_setup(double r1, double r2, double c1, double c2) { return setup(rc_rr_bandpass_calc(r1, r2, c1, c2)); } @@ -499,8 +499,8 @@ filter_biquad_device::biquad_params filter_biquad_device::rc_rr_bandpass_calc(do const double x = sqrt(r1 * r2 * c1 * c2); const double y = r1 * c1 + r2 * c2 + r2 * c1; const double z = r2 * c1; - filter_biquad_device::biquad_params p; - p.type = filter_biquad_device::biquad_type::BANDPASS; + biquad_params p; + p.type = biquad_type::BANDPASS; p.fc = 1.0 / (2.0 * M_PI * x); p.q = x / y; p.gain = z / y; @@ -508,7 +508,7 @@ filter_biquad_device::biquad_params filter_biquad_device::rc_rr_bandpass_calc(do return p; } -filter_biquad_device& filter_biquad_device::rc_cc_bandpass_setup(double r1, double r2, double c1, double c2) +filter_biquad_device &filter_biquad_device::rc_cc_bandpass_setup(double r1, double r2, double c1, double c2) { return setup(rc_cc_bandpass_calc(r1, r2, c1, c2)); } @@ -527,8 +527,8 @@ filter_biquad_device::biquad_params filter_biquad_device::rc_cc_bandpass_calc(do const double x = sqrt(r1 * r2 * c1 * c2); const double y = r1 * c1 + r2 * c2 + r1 * c2; const double z = r2 * c2; - filter_biquad_device::biquad_params p; - p.type = filter_biquad_device::biquad_type::BANDPASS; + biquad_params p; + p.type = biquad_type::BANDPASS; p.fc = 1.0 / (2.0 * M_PI * x); p.q = x / y; p.gain = z / y; diff --git a/src/devices/sound/flt_biquad.h b/src/devices/sound/flt_biquad.h index ec292a462c8..d696f61fad5 100644 --- a/src/devices/sound/flt_biquad.h +++ b/src/devices/sound/flt_biquad.h @@ -40,14 +40,14 @@ public: filter_biquad_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); // set up the filter with the specified filter parameters and return a pointer to the new device - filter_biquad_device& setup(biquad_type type, double fc, double q, double gain); - filter_biquad_device& setup(biquad_params p); + filter_biquad_device &setup(biquad_type type, double fc, double q, double gain); + filter_biquad_device &setup(biquad_params p); // modify an existing instance with new filter parameters void modify(biquad_type type, double fc, double q, double gain); void modify(biquad_params p); // set up the filter with raw biquad coefficients - filter_biquad_device& setup_raw(double a1, double a2, double b0, double b1, double b2); + filter_biquad_device &setup_raw(double a1, double a2, double b0, double b1, double b2); void modify_raw(double a1, double a2, double b0, double b1, double b2); // Helper setup functions to create common filters representable by biquad filters: @@ -57,38 +57,38 @@ public: biquad_params opamp_sk_lphp_calc(biquad_type type, double r1, double r2, double r3, double r4, double c1, double c2); // Sallen-Key low-pass - filter_biquad_device& opamp_sk_lowpass_setup(double r1, double r2, double r3, double r4, double c1, double c2); + filter_biquad_device &opamp_sk_lowpass_setup(double r1, double r2, double r3, double r4, double c1, double c2); void opamp_sk_lowpass_modify(double r1, double r2, double r3, double r4, double c1, double c2); // Sallen-Key high-pass - filter_biquad_device& opamp_sk_highpass_setup(double r1, double r2, double r3, double r4, double c1, double c2); + filter_biquad_device &opamp_sk_highpass_setup(double r1, double r2, double r3, double r4, double c1, double c2); void opamp_sk_highpass_modify(double r1, double r2, double r3, double r4, double c1, double c2); // TODO when needed: Sallen-Key band-pass (there are several versions of this in the 1955 Sallen-Key paper) // Multiple-Feedback low-pass - filter_biquad_device& opamp_mfb_lowpass_setup(double r1, double r2, double r3, double c1, double c2); + filter_biquad_device &opamp_mfb_lowpass_setup(double r1, double r2, double r3, double c1, double c2); void opamp_mfb_lowpass_modify(double r1, double r2, double r3, double c1, double c2); biquad_params opamp_mfb_lowpass_calc(double r1, double r2, double r3, double c1, double c2); // Multiple-Feedback band-pass - filter_biquad_device& opamp_mfb_bandpass_setup(double r1, double r2, double r3, double c1, double c2); + filter_biquad_device &opamp_mfb_bandpass_setup(double r1, double r2, double r3, double c1, double c2); // Multiple-Feedback high-pass - filter_biquad_device& opamp_mfb_highpass_setup(double r1, double r2, double c1, double c2, double c3); + filter_biquad_device &opamp_mfb_highpass_setup(double r1, double r2, double c1, double c2, double c3); // Differentiator band-pass - filter_biquad_device& opamp_diff_bandpass_setup(double r1, double r2, double c1, double c2); + filter_biquad_device &opamp_diff_bandpass_setup(double r1, double r2, double c1, double c2); void opamp_diff_bandpass_modify(double r1, double r2, double c1, double c2); biquad_params opamp_diff_bandpass_calc(double r1, double r2, double c1, double c2); // RC-based band-pass, resistors connected to each other. - filter_biquad_device& rc_rr_bandpass_setup(double r1, double r2, double c1, double c2); + filter_biquad_device &rc_rr_bandpass_setup(double r1, double r2, double c1, double c2); void rc_rr_bandpass_modify(double r1, double r2, double c1, double c2); biquad_params rc_rr_bandpass_calc(double r1, double r2, double c1, double c2); // RC-based band-pass, capacitors connected to each other. - filter_biquad_device& rc_cc_bandpass_setup(double r1, double r2, double c1, double c2); + filter_biquad_device &rc_cc_bandpass_setup(double r1, double r2, double c1, double c2); void rc_cc_bandpass_modify(double r1, double r2, double c1, double c2); biquad_params rc_cc_bandpass_calc(double r1, double r2, double c1, double c2); diff --git a/src/devices/sound/fz_pcm.h b/src/devices/sound/fz_pcm.h index 0736429da06..c295d82d170 100644 --- a/src/devices/sound/fz_pcm.h +++ b/src/devices/sound/fz_pcm.h @@ -14,7 +14,7 @@ class fz_pcm_device : public device_t, public: static constexpr feature_type imperfect_features() { return feature::SOUND; } - fz_pcm_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + fz_pcm_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); auto irq_cb() { return m_irq_cb.bind(); } @@ -90,7 +90,7 @@ private: void update_pending_irq(); void voice_cmd(unsigned cmd); - sound_stream* m_stream; + sound_stream *m_stream; devcb_write_line m_irq_cb; emu_timer *m_irq_timer; diff --git a/src/devices/video/serialvfd.cpp b/src/devices/video/serialvfd.cpp index a84064a8ba8..a6ac758bc04 100644 --- a/src/devices/video/serialvfd.cpp +++ b/src/devices/video/serialvfd.cpp @@ -4,7 +4,7 @@ #include "serialvfd.h" #include "emu.h" -#define LOG_VFD (1U << 1) +#define LOG_VFD (1U << 1) //#define VERBOSE ( LOG_VFD ) #include "logmacro.h" @@ -27,7 +27,7 @@ void serial_vfd_device::write_clock(bool state){ if(m_bitCount >= 8){ m_bitCount = 0; run_command(); - m_cmd = 0x00; + m_cmd = 0x00; } } m_lastClock = m_clock; @@ -54,7 +54,7 @@ void serial_vfd_device::write_reset(bool state){ m_cmd = 0x00; // Reset doesn't actually seem to clear the display. //for(int i = 0; i < 16; i++){ - // m_vfd[i] = 0x0000; + // m_vfd[i] = 0x0000; //} } } diff --git a/src/devices/video/serialvfd.h b/src/devices/video/serialvfd.h index ca2a50e8b9b..5c012f05ad4 100644 --- a/src/devices/video/serialvfd.h +++ b/src/devices/video/serialvfd.h @@ -2,10 +2,10 @@ // copyright-holders: NaokiS /* - Serial VFD device driver for two/three wire 1 line vfds up to 16 characters. - - TODO: - * Brightness control, just as soon as MAME supports brightness on segment displays. + Serial VFD device driver for two/three wire 1 line vfds up to 16 characters. + + TODO: + * Brightness control, just as soon as MAME supports brightness on segment displays. */ @@ -14,7 +14,7 @@ #pragma once -class serial_vfd_device : +class serial_vfd_device : public device_t { public: @@ -35,8 +35,8 @@ private: 0x00F3, 0x203F, 0x20F3, 0x00ED, 0x0301, 0x003E, 0x1430, 0x2436, 0x3C00, 0x1A00, 0x1409, 0x0039, 0x2800, 0x0006, 0x2400, 0x0008, 0x0000, 0x0909, 0x0120, 0x03CE, 0x03ED, 0x17E5, 0x295D, 0x1000, - 0x3000, 0x0C00, 0x3FC0, 0x03C0, 0xC000, 0x00C0, 0x4000, 0x1400, - 0x143F, 0x0300, 0x00DB, 0x00CF, 0x00E6, 0x00ED, 0x00FD, 0x0007, + 0x3000, 0x0C00, 0x3FC0, 0x03C0, 0xC000, 0x00C0, 0x4000, 0x1400, + 0x143F, 0x0300, 0x00DB, 0x00CF, 0x00E6, 0x00ED, 0x00FD, 0x0007, 0x00FF, 0x00EF, 0x0009, 0x0401, 0x1408, 0x00C8, 0x2808, 0x0283 }; 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