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author Vas Crabb <vas@vastheman.com>2026-03-29 05:20:40 +1100
committer Vas Crabb <vas@vastheman.com>2026-03-29 05:20:40 +1100
commitb55ba81d2a417df3e0ee9260be06425550f13541 (patch)
treed17414652c9edb2f161daf254f9b2988970f4b76 /src/devices
parent8653a44cb144c66a3f199a08763a885adb121071 (diff)
Fixed things C++20 doesn't allow:
ui/info.cpp, imagedev/cassette.cpp: Deal with UTF-8 strings as a distint type. ui/inputmap.cpp, debugger/qt/dasmwindow.cpp, debugger/qt/mainwindow.cpp, sound/coreaudio_sound.cpp, cpu/drcbec.cpp, mit/tx0_v.cpp, konami/3dom2.cpp: machine/mc68328.cpp, cpu/mips/mips1.cpp, cpu/mips/r4000.cpp, cpu/romp, machine/cammu.cpp, machine/ns32081.cpp: Avoid arithmetic between different enum types. dec/pdp1.cpp, konami/firebeat.cpp, mit/tx0.cpp, sound/lc7535.cpp, sound/spkrdev.cpp: Avoid arithmetic between enum and floating point. gaelco/gaelco3d_m.cpp: Fixed deprecated uses of volatile variables. sound/discrete.h: Avoid comparing enum to floatint point. ui/toolbar.ipp: Don't use UTF-8 qualifier on pure ASCII strings, just assume char is ASCII-like. cpu/unsp: Use default constructor for compiler_state. sgi/pm2_mmu.cpp: Avoid conflict between file static access and identically named function in unistd.h. osd/interface/audio.h: Provide an explicit constructor. util/server_http_impl.hpp: Fixed uninitialised class member warning.
Diffstat (limited to 'src/devices')
-rw-r--r--src/devices/cpu/drcbec.cpp22
-rw-r--r--src/devices/cpu/mips/mips1.cpp33
-rw-r--r--src/devices/cpu/mips/r4000.h53
-rw-r--r--src/devices/cpu/romp/romp.h23
-rw-r--r--src/devices/cpu/unsp/unsp.h5
-rw-r--r--src/devices/cpu/unsp/unspdrc.cpp2
-rw-r--r--src/devices/imagedev/cassette.cpp17
-rw-r--r--src/devices/machine/cammu.h20
-rw-r--r--src/devices/machine/mc68328.h669
-rw-r--r--src/devices/machine/ns32081.cpp30
-rw-r--r--src/devices/sound/discrete.h20
-rw-r--r--src/devices/sound/lc7535.cpp8
-rw-r--r--src/devices/sound/lc7535.h8
-rw-r--r--src/devices/sound/spkrdev.cpp16
-rw-r--r--src/devices/sound/spkrdev.h5
15 files changed, 448 insertions, 483 deletions
diff --git a/src/devices/cpu/drcbec.cpp b/src/devices/cpu/drcbec.cpp
index 7450e6b8c94..da3df91c094 100644
--- a/src/devices/cpu/drcbec.cpp
+++ b/src/devices/cpu/drcbec.cpp
@@ -609,27 +609,27 @@ void drcbe_c::generate(drcuml_block &block, const instruction *instlist, uint32_
// pre-expand opcodes that encode size/scale in them
if (opcode == OP_LOAD)
- opcode = opcode_t(OP_LOAD1 + inst.param(3).size() * 4 + inst.param(3).scale());
+ opcode = opcode_t(OP_LOAD1 + unsigned(inst.param(3).size() * 4 + inst.param(3).scale()));
if (opcode == OP_LOADS)
- opcode = opcode_t(OP_LOADS1 + inst.param(3).size() * 4 + inst.param(3).scale());
+ opcode = opcode_t(OP_LOADS1 + unsigned(inst.param(3).size() * 4 + inst.param(3).scale()));
if (opcode == OP_STORE)
- opcode = opcode_t(OP_STORE1 + inst.param(3).size() * 4 + inst.param(3).scale());
+ opcode = opcode_t(OP_STORE1 + unsigned(inst.param(3).size() * 4 + inst.param(3).scale()));
if (opcode == OP_READ)
- opcode = opcode_t(OP_READ1 + inst.param(2).size());
+ opcode = opcode_t(OP_READ1 + unsigned(inst.param(2).size()));
if (opcode == OP_READM)
- opcode = opcode_t(OP_READM1 + inst.param(3).size());
+ opcode = opcode_t(OP_READM1 + unsigned(inst.param(3).size()));
if (opcode == OP_WRITE)
- opcode = opcode_t(OP_WRITE1 + inst.param(2).size());
+ opcode = opcode_t(OP_WRITE1 + unsigned(inst.param(2).size()));
if (opcode == OP_WRITEM)
- opcode = opcode_t(OP_WRITEM1 + inst.param(3).size());
+ opcode = opcode_t(OP_WRITEM1 + unsigned(inst.param(3).size()));
if (opcode == OP_SEXT)
- opcode = opcode_t(OP_SEXT1 + inst.param(2).size());
+ opcode = opcode_t(OP_SEXT1 + unsigned(inst.param(2).size()));
if (opcode == OP_FTOINT)
- opcode = opcode_t(OP_FTOI4T + 5 * (inst.param(2).size() - 2) + inst.param(3).rounding());
+ opcode = opcode_t(OP_FTOI4T + unsigned(5 * (inst.param(2).size() - 2) + inst.param(3).rounding()));
if (opcode == OP_FFRINT)
- opcode = opcode_t(OP_FFRI4 + (inst.param(2).size() - 2));
+ opcode = opcode_t(OP_FFRI4 + unsigned(inst.param(2).size() - 2));
if (opcode == OP_FFRFLT)
- opcode = opcode_t(OP_FFRFS + (inst.param(2).size() - 2));
+ opcode = opcode_t(OP_FFRFS + unsigned(inst.param(2).size() - 2));
// count how many bytes of immediates we need
int immedbytes = 0;
diff --git a/src/devices/cpu/mips/mips1.cpp b/src/devices/cpu/mips/mips1.cpp
index f61abd3cad6..542bcb53f6c 100644
--- a/src/devices/cpu/mips/mips1.cpp
+++ b/src/devices/cpu/mips/mips1.cpp
@@ -58,24 +58,21 @@ enum exception : u32
EXCEPTION_BADCOP3 = 0x3000002c,
};
-enum cop0_reg : u8
-{
- COP0_Index = 0,
- COP0_Random = 1,
- COP0_EntryLo = 2,
- COP0_BusCtrl = 2, // r3041 only
- COP0_Config = 3, // r3041/r3071/r3081 only
- COP0_Context = 4,
- COP0_BadVAddr = 8,
- COP0_Count = 9, // r3041 only
- COP0_EntryHi = 10,
- COP0_PortSize = 10, // r3041 only
- COP0_Compare = 11, // r3041 only
- COP0_Status = 12,
- COP0_Cause = 13,
- COP0_EPC = 14,
- COP0_PRId = 15,
-};
+constexpr u8 COP0_Index = 0;
+constexpr u8 COP0_Random = 1;
+constexpr u8 COP0_EntryLo = 2;
+constexpr u8 COP0_BusCtrl = 2; // r3041 only
+constexpr u8 COP0_Config = 3; // r3041/r3071/r3081 only
+constexpr u8 COP0_Context = 4;
+constexpr u8 COP0_BadVAddr = 8;
+constexpr u8 COP0_Count = 9; // r3041 only
+constexpr u8 COP0_EntryHi = 10;
+constexpr u8 COP0_PortSize = 10; // r3041 only
+constexpr u8 COP0_Compare = 11; // r3041 only
+constexpr u8 COP0_Status = 12;
+constexpr u8 COP0_Cause = 13;
+constexpr u8 COP0_EPC = 14;
+constexpr u8 COP0_PRId = 15;
enum sr_mask : u32
{
diff --git a/src/devices/cpu/mips/r4000.h b/src/devices/cpu/mips/r4000.h
index a6e0f816d9a..3f31817bb69 100644
--- a/src/devices/cpu/mips/r4000.h
+++ b/src/devices/cpu/mips/r4000.h
@@ -59,34 +59,31 @@ protected:
};
r4000_base_device(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock, u32 prid, u32 fcr, cache_size icache_size, cache_size dcache_size, unsigned m32, unsigned m64, unsigned d32, unsigned d64, bool timer_interrupt_disabled);
- enum cp0_reg : int
- {
- CP0_Index = 0,
- CP0_Random = 1,
- CP0_EntryLo0 = 2,
- CP0_EntryLo1 = 3,
- CP0_Context = 4,
- CP0_PageMask = 5,
- CP0_Wired = 6,
- CP0_BadVAddr = 8,
- CP0_Count = 9,
- CP0_EntryHi = 10,
- CP0_Compare = 11,
- CP0_Status = 12,
- CP0_Cause = 13,
- CP0_EPC = 14,
- CP0_PRId = 15,
- CP0_Config = 16,
- CP0_LLAddr = 17,
- CP0_WatchLo = 18,
- CP0_WatchHi = 19,
- CP0_XContext = 20,
- CP0_ECC = 26,
- CP0_CacheErr = 27,
- CP0_TagLo = 28,
- CP0_TagHi = 29,
- CP0_ErrorEPC = 30,
- };
+ static constexpr int CP0_Index = 0;
+ static constexpr int CP0_Random = 1;
+ static constexpr int CP0_EntryLo0 = 2;
+ static constexpr int CP0_EntryLo1 = 3;
+ static constexpr int CP0_Context = 4;
+ static constexpr int CP0_PageMask = 5;
+ static constexpr int CP0_Wired = 6;
+ static constexpr int CP0_BadVAddr = 8;
+ static constexpr int CP0_Count = 9;
+ static constexpr int CP0_EntryHi = 10;
+ static constexpr int CP0_Compare = 11;
+ static constexpr int CP0_Status = 12;
+ static constexpr int CP0_Cause = 13;
+ static constexpr int CP0_EPC = 14;
+ static constexpr int CP0_PRId = 15;
+ static constexpr int CP0_Config = 16;
+ static constexpr int CP0_LLAddr = 17;
+ static constexpr int CP0_WatchLo = 18;
+ static constexpr int CP0_WatchHi = 19;
+ static constexpr int CP0_XContext = 20;
+ static constexpr int CP0_ECC = 26;
+ static constexpr int CP0_CacheErr = 27;
+ static constexpr int CP0_TagLo = 28;
+ static constexpr int CP0_TagHi = 29;
+ static constexpr int CP0_ErrorEPC = 30;
enum cp0_sr_mask : u32
{
diff --git a/src/devices/cpu/romp/romp.h b/src/devices/cpu/romp/romp.h
index 8a69c8a0032..3555028c2e6 100644
--- a/src/devices/cpu/romp/romp.h
+++ b/src/devices/cpu/romp/romp.h
@@ -25,19 +25,16 @@ protected:
ROMP_GPR = 16,
};
- enum scr : unsigned
- {
- COUS = 6, // counter source
- COU = 7, // counter
- TS = 8, // timer status
- ECR = 9, // exception control (advanced/enhanced only)
- MQ = 10, // multiplier quotient
- MPCS = 11, // machine/program check status
- IRB = 12, // interrupt request buffer
- IAR = 13, // instruction address register
- ICS = 14, // interrupt control status
- CS = 15, // condition status
- };
+ static constexpr unsigned COUS = 6; // counter source
+ static constexpr unsigned COU = 7; // counter
+ static constexpr unsigned TS = 8; // timer status
+ static constexpr unsigned ECR = 9; // exception control (advanced/enhanced only)
+ static constexpr unsigned MQ = 10; // multiplier quotient
+ static constexpr unsigned MPCS = 11; // machine/program check status
+ static constexpr unsigned IRB = 12; // interrupt request buffer
+ static constexpr unsigned IAR = 13; // instruction address register
+ static constexpr unsigned ICS = 14; // interrupt control status
+ static constexpr unsigned CS = 15; // condition status
enum ts_mask : u32
{
diff --git a/src/devices/cpu/unsp/unsp.h b/src/devices/cpu/unsp/unsp.h
index 0372a491ffb..58a472695d4 100644
--- a/src/devices/cpu/unsp/unsp.h
+++ b/src/devices/cpu/unsp/unsp.h
@@ -131,11 +131,12 @@ protected:
/* internal compiler state */
struct compiler_state
{
+ compiler_state() = default;
compiler_state(compiler_state const&) = delete;
compiler_state& operator=(compiler_state const&) = delete;
- uint32_t m_cycles; /* accumulated cycles */
- uml::code_label m_labelnum; /* index for local labels */
+ uint32_t m_cycles = 0; /* accumulated cycles */
+ uml::code_label m_labelnum = 0; /* index for local labels */
};
struct internal_unsp_state
diff --git a/src/devices/cpu/unsp/unspdrc.cpp b/src/devices/cpu/unsp/unspdrc.cpp
index e041d1020d5..1c9e3556585 100644
--- a/src/devices/cpu/unsp/unspdrc.cpp
+++ b/src/devices/cpu/unsp/unspdrc.cpp
@@ -162,7 +162,7 @@ void unsp_device::code_flush_cache()
void unsp_device::code_compile_block(offs_t pc)
{
- compiler_state compiler = { 0 };
+ compiler_state compiler;
const opcode_desc *seqhead, *seqlast;
bool override = false;
diff --git a/src/devices/imagedev/cassette.cpp b/src/devices/imagedev/cassette.cpp
index cef022b57a5..699252534e8 100644
--- a/src/devices/imagedev/cassette.cpp
+++ b/src/devices/imagedev/cassette.cpp
@@ -17,6 +17,7 @@
#include "util/ioprocs.h"
#include "util/ioprocsfilter.h"
+#include <array>
#include <regex>
#define LOG_WARN (1U << 1) // Warnings
@@ -410,7 +411,7 @@ std::string cassette_image_device::call_display()
// only show the image when a cassette is loaded and the motor is on
if (exists() && !is_stopped() && motor_on())
{
- static char const *const shapes[] = { u8"\u2500", u8"\u2572", u8"\u2502", u8"\u2571" };
+ static std::array const shapes{ u8"\u2500", u8"\u2572", u8"\u2502", u8"\u2571" };
// figure out where we are in the cassette
double position = get_position();
@@ -421,7 +422,7 @@ std::string cassette_image_device::call_display()
int n = (int(position) / ANIMATION_FPS) % std::size(shapes);
// play or record
- const char *status_icon = (uistate == CASSETTE_PLAY)
+ auto const *const status_icon = (uistate == CASSETTE_PLAY)
? u8"\u25ba"
: u8"\u25cf";
@@ -429,12 +430,12 @@ std::string cassette_image_device::call_display()
result = string_format("%s %s %02d:%02d (%04d) [%02d:%02d (%04d)]",
shapes[n], // animation
status_icon, // play or record
- ((int)position / 60),
- ((int)position % 60),
- (int)position,
- ((int)length / 60),
- ((int)length % 60),
- (int)length);
+ int(position) / 60,
+ int(position) % 60,
+ int(position),
+ int(length) / 60,
+ int(length) % 60,
+ int(length));
// make sure tape stops at end when playing
if ((m_state & CASSETTE_MASK_UISTATE) == CASSETTE_PLAY)
diff --git a/src/devices/machine/cammu.h b/src/devices/machine/cammu.h
index 2f0760ddfa1..4905779295a 100644
--- a/src/devices/machine/cammu.h
+++ b/src/devices/machine/cammu.h
@@ -598,18 +598,14 @@ private:
CNTL_UST = 0x00000030, // unmapped system tag
CNTL_CV = 0x00000100, // clear valid
CNTL_ATE = 0x00000200, // alignment trap enable
- CNTL_CID = 0xff000000 // cammu id
- };
- enum control_ust_mask : u32
- {
- UST_0 = 0x00000000, // private, write-through, main memory space
- UST_1 = 0x00000010, // shared, write-through, main memory space
- UST_2 = 0x00000020, // private, copy-back, main memory space
- UST_3 = 0x00000030 // noncacheable, main memory space
- };
- enum control_cid_mask : u32
- {
- CID_C3 = 0x00000000 // unknown
+ CNTL_CID = 0xff000000, // cammu id
+
+ UST_0 = 0x00000000, // private, write-through, main memory space
+ UST_1 = 0x00000010, // shared, write-through, main memory space
+ UST_2 = 0x00000020, // private, copy-back, main memory space
+ UST_3 = 0x00000030, // noncacheable, main memory space
+
+ CID_C3 = 0x00000000 // unknown
};
enum reset_mask : u32
diff --git a/src/devices/machine/mc68328.h b/src/devices/machine/mc68328.h
index b76323eea67..652e4b1bbff 100644
--- a/src/devices/machine/mc68328.h
+++ b/src/devices/machine/mc68328.h
@@ -173,262 +173,256 @@ protected:
LFRCM_XMOD = 0xf0,
};
- enum : u16
- {
- GRPBASE_VALID = 0x0001,
- GRPBASE_BASE_ADDR = 0xfff0,
-
- GRPMASK_BASE_MASK = 0xfff0,
-
- PLLCR_DISPLL = 0x0008,
- PLLCR_CLKEN = 0x0010,
- PLLCR_SYSCLK_SEL_DIV2 = 0x0000,
- PLLCR_SYSCLK_SEL_DIV4 = 0x0100,
- PLLCR_SYSCLK_SEL_DIV8 = 0x0200,
- PLLCR_SYSCLK_SEL_DIV16 = 0x0300,
- PLLCR_SYSCLK_SEL_DIV1_0 = 0x0400,
- PLLCR_SYSCLK_SEL_DIV1_1 = 0x0500,
- PLLCR_SYSCLK_SEL_DIV1_2 = 0x0600,
- PLLCR_SYSCLK_SEL_DIV1_3 = 0x0700,
- PLLCR_SYSCLK_SEL = 0x0700,
- PLLCR_SYSCLK_SHIFT = 8,
- PLLCR_PIXCLK_SEL_DIV2 = 0x0000,
- PLLCR_PIXCLK_SEL_DIV4 = 0x0800,
- PLLCR_PIXCLK_SEL_DIV8 = 0x1000,
- PLLCR_PIXCLK_SEL_DIV16 = 0x1800,
- PLLCR_PIXCLK_SEL_DIV1_0 = 0x2000,
- PLLCR_PIXCLK_SEL_DIV1_1 = 0x2800,
- PLLCR_PIXCLK_SEL_DIV1_2 = 0x3000,
- PLLCR_PIXCLK_SEL_DIV1_3 = 0x3800,
- PLLCR_PIXCLK_SEL = 0x3800,
- PLLCR_PIXCLK_SHIFT = 11,
-
- PLLFSR_PCNT = 0x00ff,
- PLLFSR_QCNT = 0x0f00,
- PLLFSR_PROT = 0x4000,
- PLLFSR_CLK32 = 0x8000,
-
- ICR_ET6 = 0x0100,
- ICR_ET3 = 0x0200,
- ICR_ET2 = 0x0400,
- ICR_ET1 = 0x0800,
- ICR_POL6 = 0x1000,
- ICR_POL3 = 0x2000,
- ICR_POL2 = 0x4000,
- ICR_POL1 = 0x8000,
-
- PWMC_CLKSEL = 0x0007,
- PWMC_EN = 0x0010,
- PWMC_POL = 0x0040,
- PWMC_PIN = 0x0080,
- PWMC_LOAD = 0x0100,
- PWMC_IRQ_EN = 0x4000,
- PWMC_IRQ = 0x8000,
-
- TCTL_TEN = 0x0001,
- TCTL_TEN_ENABLE = 0x0001,
- TCTL_TEN_BIT = 0,
- TCTL_CLKSOURCE = 0x000e,
- TCTL_CLKSOURCE_STOP = 0x0000,
- TCTL_CLKSOURCE_SYSCLK = 0x0002,
- TCTL_CLKSOURCE_SYSCLK16 = 0x0004,
- TCTL_CLKSOURCE_TIN = 0x0006,
- TCTL_CLKSOURCE_32KHZ4 = 0x0008,
- TCTL_CLKSOURCE_32KHZ5 = 0x000a,
- TCTL_CLKSOURCE_32KHZ6 = 0x000c,
- TCTL_CLKSOURCE_32KHZ7 = 0x000e,
- TCTL_IRQEN = 0x0010,
- TCTL_IRQEN_ENABLE = 0x0010,
- TCTL_OM = 0x0020,
- TCTL_OM_ACTIVELOW = 0x0000,
- TCTL_OM_TOGGLE = 0x0020,
- TCTL_CAPTURE = 0x00c0,
- TCTL_CAPTURE_NOINT = 0x0000,
- TCTL_CAPTURE_RISING = 0x0040,
- TCTL_CAPTURE_FALLING = 0x0080,
- TCTL_CAPTURE_BOTH = 0x00c0,
- TCTL_FRR = 0x0100,
- TCTL_FRR_RESTART = 0x0000,
- TCTL_FRR_FREERUN = 0x0100,
-
- TSTAT_COMP = 0x0001,
- TSTAT_CAPT = 0x0002,
-
- SPIS_SPISEN = 0x0100,
- SPIS_POL = 0x0200,
- SPIS_PHA = 0x0400,
- SPIS_OVRWR = 0x0800,
- SPIS_DATA_RDY = 0x1000,
- SPIS_ENPOL = 0x2000,
- SPIS_IRQEN = 0x4000,
- SPIS_SPIS_IRQ = 0x8000,
-
- SPIM_BIT_COUNT = 0x000f,
- SPIM_POL_BIT = 4,
- SPIM_PHA_BIT = 5,
- SPIM_IRQEN_BIT = 6,
- SPIM_SPIMIRQ_BIT = 7,
- SPIM_XCH_BIT = 8,
- SPIM_SPMEN_BIT = 9,
- SPIM_RATE_MASK = 0xe000,
- SPIM_RATE_SHIFT = 13,
-
- USTCNT_TX_AVAIL_EN = 0x0001,
- USTCNT_TX_HALF_EN = 0x0002,
- USTCNT_TX_EMPTY_EN = 0x0004,
- USTCNT_RX_RDY_EN = 0x0008,
- USTCNT_RX_HALF_EN = 0x0010,
- USTCNT_RX_FULL_EN = 0x0020,
- USTCNT_CTS_DELTA_EN = 0x0040,
- USTCNT_GPIO_DELTA_EN = 0x0080,
- USTCNT_8_7 = 0x0100,
- USTCNT_STOP_BITS = 0x0200,
- USTCNT_ODD_EVEN = 0x0400,
- USTCNT_PARITY_EN = 0x0800,
- USTCNT_RX_CLK_CONT = 0x1000,
- USTCNT_TX_EN = 0x2000,
- USTCNT_RX_EN = 0x4000,
- USTCNT_UART_EN = 0x8000,
-
- UBAUD_PRESCALER = 0x00ff,
- UBAUD_DIVIDE = 0x0700,
- UBAUD_DIVIDE_1 = 0x0000,
- UBAUD_DIVIDE_2 = 0x0100,
- UBAUD_DIVIDE_4 = 0x0200,
- UBAUD_DIVIDE_8 = 0x0300,
- UBAUD_DIVIDE_16 = 0x0400,
- UBAUD_DIVIDE_32 = 0x0500,
- UBAUD_DIVIDE_64 = 0x0600,
- UBAUD_DIVIDE_128 = 0x0700,
- UBAUD_BAUD_SRC = 0x0800,
- UBAUD_GPIO_SRC = 0x1000,
- UBAUD_GPIO_DIR = 0x2000,
- UBAUD_GPIO = 0x4000,
- UBAUD_GPIO_DELTA = 0x8000,
-
- URX_PARITY_ERROR = 0x0100,
- URX_BREAK = 0x0200,
- URX_FRAME_ERROR = 0x0400,
- URX_OVRUN = 0x0800,
- URX_DATA_READY = 0x2000,
- URX_FIFO_HALF = 0x4000,
- URX_FIFO_FULL = 0x8000,
-
- UTX_CTS_DELTA = 0x0100,
- UTX_CTS_STATUS = 0x0200,
- UTX_IGNORE_CTS = 0x0800,
- UTX_SEND_BREAK = 0x1000,
- UTX_TX_AVAIL = 0x2000,
- UTX_FIFO_HALF = 0x4000,
- UTX_FIFO_EMPTY = 0x8000,
-
- UMISC_IRDA_LOOP = 0x0010,
- UMISC_IRDA_ENABLE = 0x0020,
- UMISC_RTS = 0x0040,
- UMISC_RTS_CONT = 0x0080,
- UMISC_LOOP = 0x1000,
- UMISC_FORCE_PERR = 0x2000,
- UMISC_CLK_SRC = 0x4000,
-
- CXP_MASK = 0x03ff,
- CXP_CC = 0xc000,
- CXP_CC_XLU = 0x0000,
- CXP_CC_BLACK = 0x4000,
- CXP_CC_INVERSE = 0x8000,
- CXP_CC_INVALID = 0xc000,
-
- CYP_MASK = 0x01ff,
-
- CWCH_CH = 0x001f,
- CWCH_CW = 0x1f00,
-
- LXMAX_MASK = 0x03ff,
-
- LYMAX_MASK = 0x03ff,
-
- RTCCTL_38_4_BIT = 5,
- RTCCTL_ENABLE_BIT = 7,
- RTCCTL_MASK = 0x00a0,
-
- RTCINT_STOPWATCH = 0x0001,
- RTCINT_MINUTE = 0x0002,
- RTCINT_ALARM = 0x0004,
- RTCINT_DAY = 0x0008,
- RTCINT_SECOND = 0x0010,
-
- RTCSTPWTCH_MASK = 0x003f,
- };
-
- enum : u32
- {
- CSAB_WAIT = 0x00000007,
- CSAB_RO = 0x00000008,
- CSAB_MASK = 0x0000ff00,
- CSAB_BSW = 0x00010000,
- CSAB_COMPARE = 0xff000000,
-
- CSCD_WAIT = 0x00000007,
- CSCD_RO = 0x00000008,
- CSCD_MASK = 0x0000fff0,
- CSCD_BSW = 0x00010000,
- CSCD_COMPARE = 0xfff00000,
-
- INT_SPIM = 0,
- INT_SPIM_MASK = (1 << INT_SPIM),
- INT_TIMER2 = 1,
- INT_TIMER2_MASK = (1 << INT_TIMER2),
- INT_UART = 2,
- INT_UART_MASK = (1 << INT_UART),
- INT_WDT = 3,
- INT_WDT_MASK = (1 << INT_WDT),
- INT_RTC = 4,
- INT_RTC_MASK = (1 << INT_RTC),
- INT_KB = 6,
- INT_KB_MASK = (1 << INT_KB),
- INT_PWM = 7,
- INT_PWM_MASK = (1 << INT_PWM),
- INT_INT0 = 8,
- INT_INT0_MASK = (1 << INT_INT0),
- INT_INT1 = 9,
- INT_INT1_MASK = (1 << INT_INT1),
- INT_INT2 = 10,
- INT_INT2_MASK = (1 << INT_INT2),
- INT_INT3 = 11,
- INT_INT3_MASK = (1 << INT_INT3),
- INT_INT4 = 12,
- INT_INT4_MASK = (1 << INT_INT4),
- INT_INT5 = 13,
- INT_INT5_MASK = (1 << INT_INT5),
- INT_INT6 = 14,
- INT_INT6_MASK = (1 << INT_INT6),
- INT_INT7 = 15,
- INT_INT7_MASK = (1 << INT_INT7),
- INT_KBDINTS = 8,
- INT_KBDINTS_MASK = (1 << INT_KBDINTS),
- INT_IRQ1 = 16,
- INT_IRQ1_MASK = (1 << INT_IRQ1),
- INT_IRQ2 = 17,
- INT_IRQ2_MASK = (1 << INT_IRQ2),
- INT_IRQ3 = 18,
- INT_IRQ3_MASK = (1 << INT_IRQ3),
- INT_IRQ6 = 19,
- INT_IRQ6_MASK = (1 << INT_IRQ6),
- INT_IRQ5 = 20,
- INT_IRQ5_MASK = (1 << INT_IRQ5),
- INT_SPIS = 21,
- INT_SPIS_MASK = (1 << INT_SPIS),
- INT_TIMER1 = 22,
- INT_TIMER1_MASK = (1 << INT_TIMER1),
- INT_IRQ7 = 23,
- INT_IRQ7_MASK = (1 << INT_IRQ7),
-
- RTCHMSR_SECONDS = 0x0000003f,
- RTCHMSR_SECONDS_SHIFT = 0,
- RTCHMSR_MINUTES = 0x003f0000,
- RTCHMSR_MINUTES_SHIFT = 16,
- RTCHMSR_HOURS = 0x1f000000,
- RTCHMSR_HOURS_SHIFT = 24,
- };
+ static constexpr u16 GRPBASE_VALID = 0x0001;
+ static constexpr u16 GRPBASE_BASE_ADDR = 0xfff0;
+
+ static constexpr u16 GRPMASK_BASE_MASK = 0xfff0;
+
+ static constexpr u16 PLLCR_DISPLL = 0x0008;
+ static constexpr u16 PLLCR_CLKEN = 0x0010;
+ static constexpr u16 PLLCR_SYSCLK_SEL_DIV2 = 0x0000;
+ static constexpr u16 PLLCR_SYSCLK_SEL_DIV4 = 0x0100;
+ static constexpr u16 PLLCR_SYSCLK_SEL_DIV8 = 0x0200;
+ static constexpr u16 PLLCR_SYSCLK_SEL_DIV16 = 0x0300;
+ static constexpr u16 PLLCR_SYSCLK_SEL_DIV1_0 = 0x0400;
+ static constexpr u16 PLLCR_SYSCLK_SEL_DIV1_1 = 0x0500;
+ static constexpr u16 PLLCR_SYSCLK_SEL_DIV1_2 = 0x0600;
+ static constexpr u16 PLLCR_SYSCLK_SEL_DIV1_3 = 0x0700;
+ static constexpr u16 PLLCR_SYSCLK_SEL = 0x0700;
+ static constexpr u16 PLLCR_SYSCLK_SHIFT = 8;
+ static constexpr u16 PLLCR_PIXCLK_SEL_DIV2 = 0x0000;
+ static constexpr u16 PLLCR_PIXCLK_SEL_DIV4 = 0x0800;
+ static constexpr u16 PLLCR_PIXCLK_SEL_DIV8 = 0x1000;
+ static constexpr u16 PLLCR_PIXCLK_SEL_DIV16 = 0x1800;
+ static constexpr u16 PLLCR_PIXCLK_SEL_DIV1_0 = 0x2000;
+ static constexpr u16 PLLCR_PIXCLK_SEL_DIV1_1 = 0x2800;
+ static constexpr u16 PLLCR_PIXCLK_SEL_DIV1_2 = 0x3000;
+ static constexpr u16 PLLCR_PIXCLK_SEL_DIV1_3 = 0x3800;
+ static constexpr u16 PLLCR_PIXCLK_SEL = 0x3800;
+ static constexpr u16 PLLCR_PIXCLK_SHIFT = 11;
+
+ static constexpr u16 PLLFSR_PCNT = 0x00ff;
+ static constexpr u16 PLLFSR_QCNT = 0x0f00;
+ static constexpr u16 PLLFSR_PROT = 0x4000;
+ static constexpr u16 PLLFSR_CLK32 = 0x8000;
+
+ static constexpr u16 ICR_ET6 = 0x0100;
+ static constexpr u16 ICR_ET3 = 0x0200;
+ static constexpr u16 ICR_ET2 = 0x0400;
+ static constexpr u16 ICR_ET1 = 0x0800;
+ static constexpr u16 ICR_POL6 = 0x1000;
+ static constexpr u16 ICR_POL3 = 0x2000;
+ static constexpr u16 ICR_POL2 = 0x4000;
+ static constexpr u16 ICR_POL1 = 0x8000;
+
+ static constexpr u16 PWMC_CLKSEL = 0x0007;
+ static constexpr u16 PWMC_EN = 0x0010;
+ static constexpr u16 PWMC_POL = 0x0040;
+ static constexpr u16 PWMC_PIN = 0x0080;
+ static constexpr u16 PWMC_LOAD = 0x0100;
+ static constexpr u16 PWMC_IRQ_EN = 0x4000;
+ static constexpr u16 PWMC_IRQ = 0x8000;
+
+ static constexpr u16 TCTL_TEN = 0x0001;
+ static constexpr u16 TCTL_TEN_ENABLE = 0x0001;
+ static constexpr u16 TCTL_TEN_BIT = 0;
+ static constexpr u16 TCTL_CLKSOURCE = 0x000e;
+ static constexpr u16 TCTL_CLKSOURCE_STOP = 0x0000;
+ static constexpr u16 TCTL_CLKSOURCE_SYSCLK = 0x0002;
+ static constexpr u16 TCTL_CLKSOURCE_SYSCLK16 = 0x0004;
+ static constexpr u16 TCTL_CLKSOURCE_TIN = 0x0006;
+ static constexpr u16 TCTL_CLKSOURCE_32KHZ4 = 0x0008;
+ static constexpr u16 TCTL_CLKSOURCE_32KHZ5 = 0x000a;
+ static constexpr u16 TCTL_CLKSOURCE_32KHZ6 = 0x000c;
+ static constexpr u16 TCTL_CLKSOURCE_32KHZ7 = 0x000e;
+ static constexpr u16 TCTL_IRQEN = 0x0010;
+ static constexpr u16 TCTL_IRQEN_ENABLE = 0x0010;
+ static constexpr u16 TCTL_OM = 0x0020;
+ static constexpr u16 TCTL_OM_ACTIVELOW = 0x0000;
+ static constexpr u16 TCTL_OM_TOGGLE = 0x0020;
+ static constexpr u16 TCTL_CAPTURE = 0x00c0;
+ static constexpr u16 TCTL_CAPTURE_NOINT = 0x0000;
+ static constexpr u16 TCTL_CAPTURE_RISING = 0x0040;
+ static constexpr u16 TCTL_CAPTURE_FALLING = 0x0080;
+ static constexpr u16 TCTL_CAPTURE_BOTH = 0x00c0;
+ static constexpr u16 TCTL_FRR = 0x0100;
+ static constexpr u16 TCTL_FRR_RESTART = 0x0000;
+ static constexpr u16 TCTL_FRR_FREERUN = 0x0100;
+
+ static constexpr u16 TSTAT_COMP = 0x0001;
+ static constexpr u16 TSTAT_CAPT = 0x0002;
+
+ static constexpr u16 SPIS_SPISEN = 0x0100;
+ static constexpr u16 SPIS_POL = 0x0200;
+ static constexpr u16 SPIS_PHA = 0x0400;
+ static constexpr u16 SPIS_OVRWR = 0x0800;
+ static constexpr u16 SPIS_DATA_RDY = 0x1000;
+ static constexpr u16 SPIS_ENPOL = 0x2000;
+ static constexpr u16 SPIS_IRQEN = 0x4000;
+ static constexpr u16 SPIS_SPIS_IRQ = 0x8000;
+
+ static constexpr u16 SPIM_BIT_COUNT = 0x000f;
+ static constexpr u16 SPIM_POL_BIT = 4;
+ static constexpr u16 SPIM_PHA_BIT = 5;
+ static constexpr u16 SPIM_IRQEN_BIT = 6;
+ static constexpr u16 SPIM_SPIMIRQ_BIT = 7;
+ static constexpr u16 SPIM_XCH_BIT = 8;
+ static constexpr u16 SPIM_SPMEN_BIT = 9;
+ static constexpr u16 SPIM_RATE_MASK = 0xe000;
+ static constexpr u16 SPIM_RATE_SHIFT = 13;
+
+ static constexpr u16 USTCNT_TX_AVAIL_EN = 0x0001;
+ static constexpr u16 USTCNT_TX_HALF_EN = 0x0002;
+ static constexpr u16 USTCNT_TX_EMPTY_EN = 0x0004;
+ static constexpr u16 USTCNT_RX_RDY_EN = 0x0008;
+ static constexpr u16 USTCNT_RX_HALF_EN = 0x0010;
+ static constexpr u16 USTCNT_RX_FULL_EN = 0x0020;
+ static constexpr u16 USTCNT_CTS_DELTA_EN = 0x0040;
+ static constexpr u16 USTCNT_GPIO_DELTA_EN = 0x0080;
+ static constexpr u16 USTCNT_8_7 = 0x0100;
+ static constexpr u16 USTCNT_STOP_BITS = 0x0200;
+ static constexpr u16 USTCNT_ODD_EVEN = 0x0400;
+ static constexpr u16 USTCNT_PARITY_EN = 0x0800;
+ static constexpr u16 USTCNT_RX_CLK_CONT = 0x1000;
+ static constexpr u16 USTCNT_TX_EN = 0x2000;
+ static constexpr u16 USTCNT_RX_EN = 0x4000;
+ static constexpr u16 USTCNT_UART_EN = 0x8000;
+
+ static constexpr u16 UBAUD_PRESCALER = 0x00ff;
+ static constexpr u16 UBAUD_DIVIDE = 0x0700;
+ static constexpr u16 UBAUD_DIVIDE_1 = 0x0000;
+ static constexpr u16 UBAUD_DIVIDE_2 = 0x0100;
+ static constexpr u16 UBAUD_DIVIDE_4 = 0x0200;
+ static constexpr u16 UBAUD_DIVIDE_8 = 0x0300;
+ static constexpr u16 UBAUD_DIVIDE_16 = 0x0400;
+ static constexpr u16 UBAUD_DIVIDE_32 = 0x0500;
+ static constexpr u16 UBAUD_DIVIDE_64 = 0x0600;
+ static constexpr u16 UBAUD_DIVIDE_128 = 0x0700;
+ static constexpr u16 UBAUD_BAUD_SRC = 0x0800;
+ static constexpr u16 UBAUD_GPIO_SRC = 0x1000;
+ static constexpr u16 UBAUD_GPIO_DIR = 0x2000;
+ static constexpr u16 UBAUD_GPIO = 0x4000;
+ static constexpr u16 UBAUD_GPIO_DELTA = 0x8000;
+
+ static constexpr u16 URX_PARITY_ERROR = 0x0100;
+ static constexpr u16 URX_BREAK = 0x0200;
+ static constexpr u16 URX_FRAME_ERROR = 0x0400;
+ static constexpr u16 URX_OVRUN = 0x0800;
+ static constexpr u16 URX_DATA_READY = 0x2000;
+ static constexpr u16 URX_FIFO_HALF = 0x4000;
+ static constexpr u16 URX_FIFO_FULL = 0x8000;
+
+ static constexpr u16 UTX_CTS_DELTA = 0x0100;
+ static constexpr u16 UTX_CTS_STATUS = 0x0200;
+ static constexpr u16 UTX_IGNORE_CTS = 0x0800;
+ static constexpr u16 UTX_SEND_BREAK = 0x1000;
+ static constexpr u16 UTX_TX_AVAIL = 0x2000;
+ static constexpr u16 UTX_FIFO_HALF = 0x4000;
+ static constexpr u16 UTX_FIFO_EMPTY = 0x8000;
+
+ static constexpr u16 UMISC_IRDA_LOOP = 0x0010;
+ static constexpr u16 UMISC_IRDA_ENABLE = 0x0020;
+ static constexpr u16 UMISC_RTS = 0x0040;
+ static constexpr u16 UMISC_RTS_CONT = 0x0080;
+ static constexpr u16 UMISC_LOOP = 0x1000;
+ static constexpr u16 UMISC_FORCE_PERR = 0x2000;
+ static constexpr u16 UMISC_CLK_SRC = 0x4000;
+
+ static constexpr u16 CXP_MASK = 0x03ff;
+ static constexpr u16 CXP_CC = 0xc000;
+ static constexpr u16 CXP_CC_XLU = 0x0000;
+ static constexpr u16 CXP_CC_BLACK = 0x4000;
+ static constexpr u16 CXP_CC_INVERSE = 0x8000;
+ static constexpr u16 CXP_CC_INVALID = 0xc000;
+
+ static constexpr u16 CYP_MASK = 0x01ff;
+
+ static constexpr u16 CWCH_CH = 0x001f;
+ static constexpr u16 CWCH_CW = 0x1f00;
+
+ static constexpr u16 LXMAX_MASK = 0x03ff;
+
+ static constexpr u16 LYMAX_MASK = 0x03ff;
+
+ static constexpr u16 RTCCTL_38_4_BIT = 5;
+ static constexpr u16 RTCCTL_ENABLE_BIT = 7;
+ static constexpr u16 RTCCTL_MASK = 0x00a0;
+
+ static constexpr u16 RTCINT_STOPWATCH = 0x0001;
+ static constexpr u16 RTCINT_MINUTE = 0x0002;
+ static constexpr u16 RTCINT_ALARM = 0x0004;
+ static constexpr u16 RTCINT_DAY = 0x0008;
+ static constexpr u16 RTCINT_SECOND = 0x0010;
+
+ static constexpr u16 RTCSTPWTCH_MASK = 0x003f;
+
+ static constexpr u32 CSAB_WAIT = 0x00000007;
+ static constexpr u32 CSAB_RO = 0x00000008;
+ static constexpr u32 CSAB_MASK = 0x0000ff00;
+ static constexpr u32 CSAB_BSW = 0x00010000;
+ static constexpr u32 CSAB_COMPARE = 0xff000000;
+
+ static constexpr u32 CSCD_WAIT = 0x00000007;
+ static constexpr u32 CSCD_RO = 0x00000008;
+ static constexpr u32 CSCD_MASK = 0x0000fff0;
+ static constexpr u32 CSCD_BSW = 0x00010000;
+ static constexpr u32 CSCD_COMPARE = 0xfff00000;
+
+ static constexpr u32 INT_SPIM = 0;
+ static constexpr u32 INT_SPIM_MASK = 1 << INT_SPIM;
+ static constexpr u32 INT_TIMER2 = 1;
+ static constexpr u32 INT_TIMER2_MASK = 1 << INT_TIMER2;
+ static constexpr u32 INT_UART = 2;
+ static constexpr u32 INT_UART_MASK = 1 << INT_UART;
+ static constexpr u32 INT_WDT = 3;
+ static constexpr u32 INT_WDT_MASK = 1 << INT_WDT;
+ static constexpr u32 INT_RTC = 4;
+ static constexpr u32 INT_RTC_MASK = 1 << INT_RTC;
+ static constexpr u32 INT_KB = 6;
+ static constexpr u32 INT_KB_MASK = 1 << INT_KB;
+ static constexpr u32 INT_PWM = 7;
+ static constexpr u32 INT_PWM_MASK = 1 << INT_PWM;
+ static constexpr u32 INT_INT0 = 8;
+ static constexpr u32 INT_INT0_MASK = 1 << INT_INT0;
+ static constexpr u32 INT_INT1 = 9;
+ static constexpr u32 INT_INT1_MASK = 1 << INT_INT1;
+ static constexpr u32 INT_INT2 = 10;
+ static constexpr u32 INT_INT2_MASK = 1 << INT_INT2;
+ static constexpr u32 INT_INT3 = 11;
+ static constexpr u32 INT_INT3_MASK = 1 << INT_INT3;
+ static constexpr u32 INT_INT4 = 12;
+ static constexpr u32 INT_INT4_MASK = 1 << INT_INT4;
+ static constexpr u32 INT_INT5 = 13;
+ static constexpr u32 INT_INT5_MASK = 1 << INT_INT5;
+ static constexpr u32 INT_INT6 = 14;
+ static constexpr u32 INT_INT6_MASK = 1 << INT_INT6;
+ static constexpr u32 INT_INT7 = 15;
+ static constexpr u32 INT_INT7_MASK = 1 << INT_INT7;
+ static constexpr u32 INT_KBDINTS = 8;
+ static constexpr u32 INT_KBDINTS_MASK = 1 << INT_KBDINTS;
+ static constexpr u32 INT_IRQ1 = 16;
+ static constexpr u32 INT_IRQ1_MASK = 1 << INT_IRQ1;
+ static constexpr u32 INT_IRQ2 = 17;
+ static constexpr u32 INT_IRQ2_MASK = 1 << INT_IRQ2;
+ static constexpr u32 INT_IRQ3 = 18;
+ static constexpr u32 INT_IRQ3_MASK = 1 << INT_IRQ3;
+ static constexpr u32 INT_IRQ6 = 19;
+ static constexpr u32 INT_IRQ6_MASK = 1 << INT_IRQ6;
+ static constexpr u32 INT_IRQ5 = 20;
+ static constexpr u32 INT_IRQ5_MASK = 1 << INT_IRQ5;
+ static constexpr u32 INT_SPIS = 21;
+ static constexpr u32 INT_SPIS_MASK = 1 << INT_SPIS;
+ static constexpr u32 INT_TIMER1 = 22;
+ static constexpr u32 INT_TIMER1_MASK = 1 << INT_TIMER1;
+ static constexpr u32 INT_IRQ7 = 23;
+ static constexpr u32 INT_IRQ7_MASK = 1 << INT_IRQ7;
+
+ static constexpr u32 RTCHMSR_SECONDS = 0x0000003f;
+ static constexpr u32 RTCHMSR_SECONDS_SHIFT = 0;
+ static constexpr u32 RTCHMSR_MINUTES = 0x003f0000;
+ static constexpr u32 RTCHMSR_MINUTES_SHIFT = 16;
+ static constexpr u32 RTCHMSR_HOURS = 0x1f000000;
+ static constexpr u32 RTCHMSR_HOURS_SHIFT = 24;
virtual void scr_w(u8 data);
@@ -850,28 +844,25 @@ private:
LCKCON_LCDON_BIT = 7,
};
- enum : u16
- {
- PWMC_CLKSEL = 0x0007,
- PWMC_PWMEN = 0x0010,
- PWMC_POL = 0x0040,
- PWMC_PIN = 0x0080,
- PWMC_LOAD = 0x0100,
- PWMC_IRQEN = 0x4000,
- PWMC_PWMIRQ = 0x8000,
-
- LGPMR_PAL2 = 0x0007,
- LGPMR_PAL3 = 0x0070,
- LGPMR_PAL0 = 0x0700,
- LGPMR_PAL1 = 0x7000,
-
- WCTLR_WDRST = 0x0008,
- WCTLR_LOCK = 0x0004,
- WCTLR_FI = 0x0002,
- WCTLR_WDEN = 0x0001,
-
- RTCIENR_MASK = 0x001f,
- };
+ static constexpr u16 PWMC_CLKSEL = 0x0007;
+ static constexpr u16 PWMC_PWMEN = 0x0010;
+ static constexpr u16 PWMC_POL = 0x0040;
+ static constexpr u16 PWMC_PIN = 0x0080;
+ static constexpr u16 PWMC_LOAD = 0x0100;
+ static constexpr u16 PWMC_IRQEN = 0x4000;
+ static constexpr u16 PWMC_PWMIRQ = 0x8000;
+
+ static constexpr u16 LGPMR_PAL2 = 0x0007;
+ static constexpr u16 LGPMR_PAL3 = 0x0070;
+ static constexpr u16 LGPMR_PAL0 = 0x0700;
+ static constexpr u16 LGPMR_PAL1 = 0x7000;
+
+ static constexpr u16 WCTLR_WDRST = 0x0008;
+ static constexpr u16 WCTLR_LOCK = 0x0004;
+ static constexpr u16 WCTLR_FI = 0x0002;
+ static constexpr u16 WCTLR_WDEN = 0x0001;
+
+ static constexpr u16 RTCIENR_MASK = 0x001f;
void grpmaska_w(u16 data);
void grpmaskb_w(u16 data);
@@ -1078,70 +1069,64 @@ private:
LCKCON_LCDON_BIT = 7,
};
- enum : u16
- {
- CSA_MASK = 0x81ff,
- CSB_MASK = 0xf9ff,
- CSC_MASK = 0xf9ff,
- CSD_MASK = 0xffff,
- EMUCS_MASK = 0x0070,
- CS_EN_BIT = 0,
- CS_SIZ_MASK = 0x000e,
- CS_SIZ_SHIFT = 1,
- CS_WS_MASK = 0x0070,
- CS_WS_SHIFT = 4,
- CS_BSW_BIT = 7,
- CS_FLASH_BIT = 8,
- CS_DRAM_BIT = 9,
- CS_COMB_BIT = 10,
- CS_UPSIZ_MASK = 0x1800,
- CS_UPSIZ_SHIFT = 11,
- CS_ROP_BIT = 13,
- CS_SOP_BIT = 14,
- CS_RO_BIT = 15,
-
- PWMC_CLKSEL = 0x0003,
- PWMC_REPEAT = 0x000c,
- PWMC_REPEAT_SHIFT = 2,
- PWMC_EN = 0x0010,
- PWMC_FIFO_AV = 0x0020,
- PWMC_IRQ_EN = 0x0040,
- PWMC_IRQ = 0x0080,
- PWMC_IRQ_BIT = 7,
- PWMC_PRESCALE = 0x7f00,
- PWMC_PRESCALE_SHIFT = 8,
- PWMC_CLK_SRC = 0x8000,
- PWMC_RECALC_MASK = PWMC_CLK_SRC | PWMC_PRESCALE | PWMC_CLKSEL | PWMC_EN,
-
- WATCHDOG_MASK = 0x0083,
- WATCHDOG_EN_BIT = 0,
- WATCHDOG_ISEL_BIT = 1,
- WATCHDOG_INTF = 0x0080,
- WATCHDOG_INTF_BIT = 7,
- WATCHDOG_CNT_MASK = 0x0300,
- WATCHDOG_CNT_SHIFT = 8,
-
- RTCINT_HOUR = 0x0020,
- RTCINT_SAM0 = 0x0100,
- RTCINT_SAM1 = 0x0200,
- RTCINT_SAM2 = 0x0400,
- RTCINT_SAM3 = 0x0800,
- RTCINT_SAM4 = 0x1000,
- RTCINT_SAM5 = 0x2000,
- RTCINT_SAM6 = 0x4000,
- RTCINT_SAM7 = 0x8000,
- RTCINT_RTCIRQ_MASK = 0x00ff,
-
- RTC_DAYS_MASK = 0x01ff,
- };
-
- enum : u32
- {
- INT_MSAM = 22,
- INT_MSAM_MASK = (1 << INT_MSAM),
- INT_MEMIQ = 23,
- INT_MEMIQ_MASK = (1 << INT_MEMIQ),
- };
+ static constexpr u16 CSA_MASK = 0x81ff;
+ static constexpr u16 CSB_MASK = 0xf9ff;
+ static constexpr u16 CSC_MASK = 0xf9ff;
+ static constexpr u16 CSD_MASK = 0xffff;
+ static constexpr u16 EMUCS_MASK = 0x0070;
+ static constexpr u16 CS_EN_BIT = 0;
+ static constexpr u16 CS_SIZ_MASK = 0x000e;
+ static constexpr u16 CS_SIZ_SHIFT = 1;
+ static constexpr u16 CS_WS_MASK = 0x0070;
+ static constexpr u16 CS_WS_SHIFT = 4;
+ static constexpr u16 CS_BSW_BIT = 7;
+ static constexpr u16 CS_FLASH_BIT = 8;
+ static constexpr u16 CS_DRAM_BIT = 9;
+ static constexpr u16 CS_COMB_BIT = 10;
+ static constexpr u16 CS_UPSIZ_MASK = 0x1800;
+ static constexpr u16 CS_UPSIZ_SHIFT = 11;
+ static constexpr u16 CS_ROP_BIT = 13;
+ static constexpr u16 CS_SOP_BIT = 14;
+ static constexpr u16 CS_RO_BIT = 15;
+
+ static constexpr u16 PWMC_CLKSEL = 0x0003;
+ static constexpr u16 PWMC_REPEAT = 0x000c;
+ static constexpr u16 PWMC_REPEAT_SHIFT = 2;
+ static constexpr u16 PWMC_EN = 0x0010;
+ static constexpr u16 PWMC_FIFO_AV = 0x0020;
+ static constexpr u16 PWMC_IRQ_EN = 0x0040;
+ static constexpr u16 PWMC_IRQ = 0x0080;
+ static constexpr u16 PWMC_IRQ_BIT = 7;
+ static constexpr u16 PWMC_PRESCALE = 0x7f00;
+ static constexpr u16 PWMC_PRESCALE_SHIFT = 8;
+ static constexpr u16 PWMC_CLK_SRC = 0x8000;
+ static constexpr u16 PWMC_RECALC_MASK = PWMC_CLK_SRC | PWMC_PRESCALE | PWMC_CLKSEL | PWMC_EN;
+
+ static constexpr u16 WATCHDOG_MASK = 0x0083;
+ static constexpr u16 WATCHDOG_EN_BIT = 0;
+ static constexpr u16 WATCHDOG_ISEL_BIT = 1;
+ static constexpr u16 WATCHDOG_INTF = 0x0080;
+ static constexpr u16 WATCHDOG_INTF_BIT = 7;
+ static constexpr u16 WATCHDOG_CNT_MASK = 0x0300;
+ static constexpr u16 WATCHDOG_CNT_SHIFT = 8;
+
+ static constexpr u16 RTCINT_HOUR = 0x0020;
+ static constexpr u16 RTCINT_SAM0 = 0x0100;
+ static constexpr u16 RTCINT_SAM1 = 0x0200;
+ static constexpr u16 RTCINT_SAM2 = 0x0400;
+ static constexpr u16 RTCINT_SAM3 = 0x0800;
+ static constexpr u16 RTCINT_SAM4 = 0x1000;
+ static constexpr u16 RTCINT_SAM5 = 0x2000;
+ static constexpr u16 RTCINT_SAM6 = 0x4000;
+ static constexpr u16 RTCINT_SAM7 = 0x8000;
+ static constexpr u16 RTCINT_RTCIRQ_MASK = 0x00ff;
+
+ static constexpr u16 RTC_DAYS_MASK = 0x01ff;
+
+ static constexpr u32 INT_MSAM = 22;
+ static constexpr u32 INT_MSAM_MASK = 1 << INT_MSAM;
+ static constexpr u32 INT_MEMIQ = 23;
+ static constexpr u32 INT_MEMIQ_MASK = 1 << INT_MEMIQ;
virtual void scr_w(u8 data) override;
diff --git a/src/devices/machine/ns32081.cpp b/src/devices/machine/ns32081.cpp
index 15459d04b58..1bc11d14c05 100644
--- a/src/devices/machine/ns32081.cpp
+++ b/src/devices/machine/ns32081.cpp
@@ -35,25 +35,19 @@ enum fsr_mask : u32
FSR_RM = 0x00000180, // rounding mode
FSR_SWF = 0x0000fe00, // software field
FSR_RMB = 0x00010000, // (32381 only) register modify bit
-};
-enum rm_mask : u32
-{
- RM_N = 0x00000000, // round to nearest value
- RM_Z = 0x00000080, // round toward zero
- RM_U = 0x00000100, // round toward positive infinity
- RM_D = 0x00000180, // round toward negative infinity
-};
-
-enum tt_mask : u32
-{
- TT_UND = 0x00000001, // underflow
- TT_OVF = 0x00000002, // overflow
- TT_DVZ = 0x00000003, // divide by zero
- TT_ILL = 0x00000004, // illegal instruction
- TT_INV = 0x00000005, // invalid operation
- TT_INX = 0x00000006, // inexact result
- TT_RSV = 0x00000007, // reserved
+ RM_N = 0x00000000, // round to nearest value
+ RM_Z = 0x00000080, // round toward zero
+ RM_U = 0x00000100, // round toward positive infinity
+ RM_D = 0x00000180, // round toward negative infinity
+
+ TT_UND = 0x00000001, // underflow
+ TT_OVF = 0x00000002, // overflow
+ TT_DVZ = 0x00000003, // divide by zero
+ TT_ILL = 0x00000004, // illegal instruction
+ TT_INV = 0x00000005, // invalid operation
+ TT_INX = 0x00000006, // inexact result
+ TT_RSV = 0x00000007, // reserved
};
enum state : unsigned
diff --git a/src/devices/sound/discrete.h b/src/devices/sound/discrete.h
index 9570a258b25..d8827d5cb2e 100644
--- a/src/devices/sound/discrete.h
+++ b/src/devices/sound/discrete.h
@@ -4033,26 +4033,26 @@ enum {
#define NODE(_x) (NODE_00 + (_x) * DISCRETE_MAX_OUTPUTS)
#define NODE_SUB(_x, _y) ((_x) + (_y))
+constexpr uint32_t NODE_NC = NODE_00;
+constexpr uint32_t NODE_SPECIAL = NODE(DISCRETE_MAX_NODES);
+
+constexpr uint32_t NODE_START = NODE_00;
+constexpr uint32_t NODE_END = NODE_SPECIAL;
+
#if DISCRETE_MAX_OUTPUTS == 8
-#define NODE_CHILD_NODE_NUM(_x) ((int)(_x) & 7)
-#define NODE_DEFAULT_NODE(_x) ((int)(_x) & ~7)
-#define NODE_INDEX(_x) (((int)(_x) - NODE_START)>>3)
+constexpr int NODE_CHILD_NODE_NUM(int x) { return x & 7; }
+constexpr int NODE_DEFAULT_NODE(int x) { return x & ~7; }
+constexpr int NODE_INDEX(int x) { return (x - NODE_START) >> 3; }
#else
#error "DISCRETE_MAX_OUTPUTS != 8"
#endif
#define NODE_RELATIVE(_x, _y) (NODE(NODE_INDEX(_x) + (_y)))
-#define NODE_NC NODE_00
-#define NODE_SPECIAL NODE(DISCRETE_MAX_NODES)
-
-#define NODE_START NODE_00
-#define NODE_END NODE_SPECIAL
-
#define IS_VALUE_A_NODE(val) (((val) > NODE_START) && ((val) <= NODE_END))
// Optional node such as used in CR_FILTER
-#define OPT_NODE(val) (int) val
+#define OPT_NODE(val) (int(val))
/*************************************
*
* Enumerated values for Node types
diff --git a/src/devices/sound/lc7535.cpp b/src/devices/sound/lc7535.cpp
index 8d79e1c6e5a..e63ecdd8a6c 100644
--- a/src/devices/sound/lc7535.cpp
+++ b/src/devices/sound/lc7535.cpp
@@ -117,14 +117,14 @@ void lc7535_device::clk_w(int state)
if (++m_count == 16)
{
// left channel
- int att_l = m_1db[(m_data >> 12) & 0x07];
+ int att_l = s_1db[(m_data >> 12) & 0x07];
if (att_l != MAX)
- att_l += m_5db[(m_data >> 8) & 0x0f];
+ att_l += s_5db[(m_data >> 8) & 0x0f];
// right channel
- int att_r = m_1db[(m_data >> 4) & 0x07];
+ int att_r = s_1db[(m_data >> 4) & 0x07];
if (att_r != MAX)
- att_r += m_5db[(m_data >> 0) & 0x0f];
+ att_r += s_5db[(m_data >> 0) & 0x0f];
m_loudness = bool(BIT(m_data, 7));
m_volume[0] = attenuation_to_gain(att_l);
diff --git a/src/devices/sound/lc7535.h b/src/devices/sound/lc7535.h
index 424cd7352a7..1ec17748992 100644
--- a/src/devices/sound/lc7535.h
+++ b/src/devices/sound/lc7535.h
@@ -47,13 +47,13 @@ protected:
virtual void sound_stream_update(sound_stream &stream) override;
private:
- float attenuation_to_gain(int attenuation);
+ static float attenuation_to_gain(int attenuation);
// maximum attenuation is -98 dB for infinity
- enum { MAX = -98 };
+ static inline constexpr int MAX = -98;
- static constexpr int m_5db[16] = { -75, -70, -65, -60, -55, -50, -45, -40, -35, -30, -25, -20, -15, -10, -5, -0 };
- static constexpr int m_1db[8] = { MAX, MAX, -4, -3, -2, -1, 0, MAX };
+ static inline constexpr int s_5db[16] = { -75, -70, -65, -60, -55, -50, -45, -40, -35, -30, -25, -20, -15, -10, -5, -0 };
+ static inline constexpr int s_1db[8] = { MAX, MAX, -4, -3, -2, -1, 0, MAX };
devcb_read_line m_select_cb;
diff --git a/src/devices/sound/spkrdev.cpp b/src/devices/sound/spkrdev.cpp
index 16dc6199c2f..2e2f2b63702 100644
--- a/src/devices/sound/spkrdev.cpp
+++ b/src/devices/sound/spkrdev.cpp
@@ -74,6 +74,9 @@
#include "emu.h"
#include "spkrdev.h"
+#include <algorithm>
+
+
// The default is 1-bit, but can be customized with set_levels.
static constexpr double default_levels[2] = { 0.0, 1.0 };
@@ -99,14 +102,10 @@ speaker_sound_device::speaker_sound_device(const machine_config &mconfig, const
void speaker_sound_device::device_start()
{
- int i;
- double x;
-
m_channel = stream_alloc(0, 1, machine().sample_rate());
m_level = 0;
- for (i = 0; i < FILTER_LENGTH; i++)
- m_composed_volume[i] = 0;
+ std::fill(std::begin(m_composed_volume), std::end(m_composed_volume), 0.0);
m_composed_sample_index = 0;
m_interm_sample_index = 0;
@@ -141,8 +140,10 @@ void speaker_sound_device::device_start()
* With -samplerate 96000, cutoff freq is ca 24kHz while the Nyq. freq is 48kHz.
* For a steeper, more efficient filter, increase FILTER_LENGTH at the expense of CPU usage.
*/
-#define FILTER_STEP (M_PI / 2 / RATE_MULTIPLIER)
+ constexpr double FILTER_STEP = M_PI / 2 / RATE_MULTIPLIER;
/* Distribute symmetrically on x axis; center has x=0 if length is odd */
+ int i;
+ double x;
for (i = 0, x = (0.5 - FILTER_LENGTH / 2.) * FILTER_STEP;
i < FILTER_LENGTH;
i++, x += FILTER_STEP)
@@ -157,8 +158,7 @@ void speaker_sound_device::device_start()
* First zero (frequency where amplification=0) = sample rate / filter length
* Cutoff frequency approx <= first zero / 2
*/
- for (i = 0, i < FILTER_LENGTH; i++)
- m_ampl[i] = 1;
+ std::fill(std::begin(m_ampl), std::end(m_ampl), 1.0);
#endif
save_item(NAME(m_level));
diff --git a/src/devices/sound/spkrdev.h b/src/devices/sound/spkrdev.h
index 175cc1f5996..e19322e494d 100644
--- a/src/devices/sound/spkrdev.h
+++ b/src/devices/sound/spkrdev.h
@@ -36,10 +36,7 @@ protected:
private:
// Length of anti-aliasing filter kernel, measured in number of intermediate samples
- enum
- {
- FILTER_LENGTH = 64
- };
+ static constexpr unsigned FILTER_LENGTH = 64;
// internal state