diff options
author | 2019-10-15 22:08:43 -0400 | |
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committer | 2019-10-15 22:08:43 -0400 | |
commit | a08fb6b38d217284e5b23bad570711f5e580567f (patch) | |
tree | da478a8ccf048addfbba719f0090670142d49f0c /src/devices/sound | |
parent | e5cceda2189fc04f4f4ed19748f78522b9033029 (diff) |
c140: Update comments (nw)
Diffstat (limited to 'src/devices/sound')
-rw-r--r-- | src/devices/sound/c140.cpp | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/src/devices/sound/c140.cpp b/src/devices/sound/c140.cpp index cb3288e4fd6..ca3bdc90977 100644 --- a/src/devices/sound/c140.cpp +++ b/src/devices/sound/c140.cpp @@ -10,12 +10,7 @@ This chip controls 24 channels (C140) or 16 (219) of PCM. 16 bytes are associated with each channel. Channels can be 8 bit signed PCM, or 12 bit signed PCM. -Timer behavior is not yet handled. - -Unmapped registers: - 0x1f8:timer interval? (Nx0.1 ms) - 0x1fa:irq ack? timer restart? - 0x1fe:timer switch?(0:off 1:on) +TODO: What does the INT0 pin do? Normally Namco tied it to VOL0 (with VOL1 = VCC). -------------- |