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author AJR <ajrhacker@users.noreply.github.com>2019-01-06 09:09:23 -0500
committer AJR <ajrhacker@users.noreply.github.com>2019-03-01 19:05:45 -0500
commitbe696a321a892f4c792418f3d5018df94168f739 (patch)
tree7015e26085b6a6ccfea29f8c1c5f03ceb02cbe0a /src/devices/machine/x2201.cpp
parenteb1b8e58e2245c9a2a5b910135f6f71e86d4844f (diff)
tms9900, tms9980a, tms9995: CRU addressing change
- Shift all CRU addresses by 1 in memory maps. This makes CRU addressing more consistent with both register values and external address lines. (CRUOUT is multiplexed with the lowest address line on the 8-bit bus versions.) - Addressing for CRU read accesses is now the same as it has been for CRU write accesses: one address for each bit. This simplifies the CPU cores (which were already emulating bit access times), though it means some read handlers now have to do some additional work. - CRU space is now little-endian, despite the big-endian memory organization, because less significant bits correspond to lower CRU addresses.
Diffstat (limited to 'src/devices/machine/x2201.cpp')
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