diff options
author | 2019-01-06 09:09:23 -0500 | |
---|---|---|
committer | 2019-03-01 19:05:45 -0500 | |
commit | be696a321a892f4c792418f3d5018df94168f739 (patch) | |
tree | 7015e26085b6a6ccfea29f8c1c5f03ceb02cbe0a /src/devices | |
parent | eb1b8e58e2245c9a2a5b910135f6f71e86d4844f (diff) |
tms9900, tms9980a, tms9995: CRU addressing change
- Shift all CRU addresses by 1 in memory maps. This makes CRU addressing more consistent with both register values and external address lines. (CRUOUT is multiplexed with the lowest address line on the 8-bit bus versions.)
- Addressing for CRU read accesses is now the same as it has been for CRU write accesses: one address for each bit. This simplifies the CPU cores (which were already emulating bit access times), though it means some read handlers now have to do some additional work.
- CRU space is now little-endian, despite the big-endian memory organization, because less significant bits correspond to lower CRU addresses.
Diffstat (limited to 'src/devices')
-rw-r--r-- | src/devices/bus/hexbus/hx5102.cpp | 5 | ||||
-rw-r--r-- | src/devices/bus/ti99/gromport/cartridges.cpp | 8 | ||||
-rw-r--r-- | src/devices/bus/ti99/internal/992board.cpp | 6 | ||||
-rw-r--r-- | src/devices/bus/ti99/peb/bwg.cpp | 4 | ||||
-rw-r--r-- | src/devices/bus/ti99/peb/evpc.cpp | 3 | ||||
-rw-r--r-- | src/devices/bus/ti99/peb/hfdc.cpp | 4 | ||||
-rw-r--r-- | src/devices/bus/ti99/peb/ti_fdc.cpp | 4 | ||||
-rw-r--r-- | src/devices/bus/ti99/peb/ti_rs232.cpp | 6 | ||||
-rw-r--r-- | src/devices/bus/ti99/peb/tn_ide.cpp | 6 | ||||
-rw-r--r-- | src/devices/bus/ti99/peb/tn_usbsm.cpp | 5 | ||||
-rw-r--r-- | src/devices/bus/ti99x/990_dk.cpp | 17 | ||||
-rw-r--r-- | src/devices/cpu/tms9900/tms9900.cpp | 64 | ||||
-rw-r--r-- | src/devices/cpu/tms9900/tms9995.cpp | 63 | ||||
-rw-r--r-- | src/devices/cpu/tms9900/tms9995.h | 2 | ||||
-rw-r--r-- | src/devices/machine/tms9901.cpp | 6 | ||||
-rw-r--r-- | src/devices/machine/tms9902.cpp | 123 |
16 files changed, 166 insertions, 160 deletions
diff --git a/src/devices/bus/hexbus/hx5102.cpp b/src/devices/bus/hexbus/hx5102.cpp index bf0f9d541cb..10558fd641d 100644 --- a/src/devices/bus/hexbus/hx5102.cpp +++ b/src/devices/bus/hexbus/hx5102.cpp @@ -121,8 +121,7 @@ void hx5102_device::memmap(address_map &map) */ void hx5102_device::crumap(address_map &map) { - map(0x17e0>>4, 0x17fe>>4).r(FUNC(hx5102_device::cruread)); - map(0x17e0>>1, 0x17fe>>1).w(FUNC(hx5102_device::cruwrite)); + map(0x17e0, 0x17ff).rw(FUNC(hx5102_device::cruread), FUNC(hx5102_device::cruwrite)); } hx5102_device::hx5102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock): @@ -475,7 +474,7 @@ READ8_MEMBER(hx5102_device::cruread) crubits |= ((ioport("HXDIP")->read())<<4); - return crubits; + return BIT(crubits, offset); } /* diff --git a/src/devices/bus/ti99/gromport/cartridges.cpp b/src/devices/bus/ti99/gromport/cartridges.cpp index 7e93029f97f..ddef0c5cd81 100644 --- a/src/devices/bus/ti99/gromport/cartridges.cpp +++ b/src/devices/bus/ti99/gromport/cartridges.cpp @@ -826,15 +826,11 @@ READ8Z_MEMBER(ti99_super_cartridge::crureadz) // SRL R0,1 Restore Bank Number (optional) // RT - // Our implementation in MESS always gets 8 bits in one go. Also, the address - // is twice the bit number. That is, the offset value is always a multiple - // of 0x10. - if ((offset & 0xfff0) == 0x0800) { LOGMASKED(LOG_CRU, "CRU accessed at %04x\n", offset); uint8_t val = 0x02 << (m_ram_page << 1); - *value = (val >> ((offset - 0x0800)>>1)) & 0xff; + *value = BIT(val, (offset & 0x000e) >> 1); } } @@ -1231,7 +1227,7 @@ READ8Z_MEMBER(ti99_pagedcru_cartridge::crureadz) { page = page-(bit/2); // 4 page flags per 8 bits } - *value = 1 << (page*2+1); + *value = (offset & 0x000e) == (page * 4 + 2) ? 1 : 0; } } diff --git a/src/devices/bus/ti99/internal/992board.cpp b/src/devices/bus/ti99/internal/992board.cpp index 330bcee4566..2f712d92712 100644 --- a/src/devices/bus/ti99/internal/992board.cpp +++ b/src/devices/bus/ti99/internal/992board.cpp @@ -458,13 +458,13 @@ void io992_device::device_start() READ8_MEMBER(io992_device::cruread) { - int address = offset << 4; + int address = offset << 1; uint8_t value = 0x7f; // All Hexbus lines high double inp = 0; int i; uint8_t bit = 1; - switch (address) + switch (address & 0xf800) { case 0xe000: // CRU E000-E7fE: Keyboard @@ -494,7 +494,7 @@ READ8_MEMBER(io992_device::cruread) LOGMASKED(LOG_CRU, "CRU %04x -> %02x\n", address, value); - return value; + return BIT(value, offset & 7); } WRITE8_MEMBER(io992_device::cruwrite) diff --git a/src/devices/bus/ti99/peb/bwg.cpp b/src/devices/bus/ti99/peb/bwg.cpp index c7aa2c903b7..e0a1b9c767a 100644 --- a/src/devices/bus/ti99/peb/bwg.cpp +++ b/src/devices/bus/ti99/peb/bwg.cpp @@ -338,7 +338,7 @@ READ8Z_MEMBER(snug_bwg_device::crureadz) if ((offset & 0xff00)==m_cru_base) { - if ((offset & 0x00ff)==0) + if ((offset & 0x00f0)==0) { // Check what drives are not connected reply = ((m_floppy[0] != nullptr)? 0 : 0x02) // DSK1 @@ -355,7 +355,7 @@ READ8Z_MEMBER(snug_bwg_device::crureadz) reply |= (m_dip34 << 6); // Invert all - *value = ~reply; + *value = ~BIT(reply, (offset >> 1) & 7); } else *value = 0; diff --git a/src/devices/bus/ti99/peb/evpc.cpp b/src/devices/bus/ti99/peb/evpc.cpp index fc5591112d5..7b2a74658c7 100644 --- a/src/devices/bus/ti99/peb/evpc.cpp +++ b/src/devices/bus/ti99/peb/evpc.cpp @@ -323,8 +323,9 @@ READ8Z_MEMBER(snug_enhanced_video_device::crureadz) { if ((offset & 0x00f0)==0) // offset 0 delivers bits 0-7 (address 00-0f) { - *value = ~(ioport("EVPC-SW1")->read() | (ioport("EVPC-SW3")->read()<<2) + uint8_t p = ~(ioport("EVPC-SW1")->read() | (ioport("EVPC-SW3")->read()<<2) | (ioport("EVPC-SW4")->read()<<3) | (ioport("EVPC-SW8")->read()<<7)); + *value = BIT(p, (offset >> 1) & 7); } } } diff --git a/src/devices/bus/ti99/peb/hfdc.cpp b/src/devices/bus/ti99/peb/hfdc.cpp index 97ac8d403ab..f9c2e9656cc 100644 --- a/src/devices/bus/ti99/peb/hfdc.cpp +++ b/src/devices/bus/ti99/peb/hfdc.cpp @@ -376,7 +376,7 @@ READ8Z_MEMBER(myarc_hfdc_device::crureadz) uint8_t reply; if ((offset & 0xff00)==m_cru_base) { - if ((offset & 0x00ff)==0) // CRU bits 0-7 + if ((offset & 0x00f0)==0) // CRU bits 0-7 { if (m_see_switches) { @@ -390,7 +390,7 @@ READ8Z_MEMBER(myarc_hfdc_device::crureadz) if (!m_motor_running) reply |= 0x04; if (m_wait_for_hd1) reply |= 0x08; } - *value = reply; + *value = BIT(reply, (offset >> 1) & 7); } else // CRU bits 8+ { diff --git a/src/devices/bus/ti99/peb/ti_fdc.cpp b/src/devices/bus/ti99/peb/ti_fdc.cpp index 530dc71d987..c2a4fe7490a 100644 --- a/src/devices/bus/ti99/peb/ti_fdc.cpp +++ b/src/devices/bus/ti99/peb/ti_fdc.cpp @@ -201,7 +201,7 @@ READ8Z_MEMBER(ti_fdc_device::crureadz) if ((offset & 0xff00)==m_cru_base) { uint8_t reply = 0; - if ((offset & 0x07) == 0) + if ((offset & 0x0070) == 0) { // Selected drive reply |= ((m_DSEL)<<1); @@ -212,7 +212,7 @@ READ8Z_MEMBER(ti_fdc_device::crureadz) // Selected side if (m_SIDSEL==ASSERT_LINE) reply |= 0x80; } - *value = reply; + *value = BIT(reply, (offset >> 1) & 0x07); LOGMASKED(LOG_CRU, "Read CRU = %02x\n", *value); } } diff --git a/src/devices/bus/ti99/peb/ti_rs232.cpp b/src/devices/bus/ti99/peb/ti_rs232.cpp index fb7ce4eaa0a..15194444851 100644 --- a/src/devices/bus/ti99/peb/ti_rs232.cpp +++ b/src/devices/bus/ti99/peb/ti_rs232.cpp @@ -254,17 +254,17 @@ READ8Z_MEMBER(ti_rs232_pio_device::crureadz) if ((m_signals[0] & tms9902_device::CTS)!=0) reply |= 0x20; if ((m_signals[1] & tms9902_device::CTS)!=0) reply |= 0x40; if (m_led) reply |= 0x80; - *value = reply; + *value = BIT(reply, (offset>>1) & 7); return; } if ((offset & 0x00c0)==0x0040) { - *value = m_uart0->cruread(space, offset>>4, 0xff); + *value = m_uart0->cruread(space, offset>>1, 0xff); return; } if ((offset & 0x00c0)==0x0080) { - *value = m_uart1->cruread(space, offset>>4, 0xff); + *value = m_uart1->cruread(space, offset>>1, 0xff); return; } } diff --git a/src/devices/bus/ti99/peb/tn_ide.cpp b/src/devices/bus/ti99/peb/tn_ide.cpp index 243450fd34f..e569fc090b4 100644 --- a/src/devices/bus/ti99/peb/tn_ide.cpp +++ b/src/devices/bus/ti99/peb/tn_ide.cpp @@ -71,9 +71,7 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::crureadz) uint8_t reply = 0; if ((offset & 0xff00)==m_cru_base) { - int bit = (offset >> 4) & 7; - - if (bit==0) + if ((offset & 0x0070) == 0) { reply = m_cru_register & 0x30; reply |= 8; /* IDE bus IORDY always set */ @@ -84,7 +82,7 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::crureadz) if (!m_ata_irq) reply |= 1; } - *value = reply; + *value = BIT(reply, (offset >> 1) & 7); } } diff --git a/src/devices/bus/ti99/peb/tn_usbsm.cpp b/src/devices/bus/ti99/peb/tn_usbsm.cpp index c558579445e..f4f198053df 100644 --- a/src/devices/bus/ti99/peb/tn_usbsm.cpp +++ b/src/devices/bus/ti99/peb/tn_usbsm.cpp @@ -93,9 +93,8 @@ READ8Z_MEMBER(nouspikel_usb_smartmedia_device::crureadz) if ((offset & 0xff00)==m_cru_base) { uint8_t reply = 0; - offset &= 3; - if (offset == 0) + if ((offset & 0x0030) == 0) { // bit // 0 >1x00 0: USB Host controller requests interrupt. @@ -117,7 +116,7 @@ READ8Z_MEMBER(nouspikel_usb_smartmedia_device::crureadz) else if (!m_smartmedia->is_protected()) reply |= 0x80; } - *value = reply; + *value = BIT(reply, (offset >> 1) & 7); } } diff --git a/src/devices/bus/ti99x/990_dk.cpp b/src/devices/bus/ti99x/990_dk.cpp index 118804ddb2b..a634bba7a24 100644 --- a/src/devices/bus/ti99x/990_dk.cpp +++ b/src/devices/bus/ti99x/990_dk.cpp @@ -709,19 +709,16 @@ READ8_MEMBER( fd800_legacy_device::cru_r ) { int reply = 0; - switch (offset) + offset &= 31; + if (offset < 16) { - case 0: - case 1: // receive buffer - reply = m_recv_buf >> (offset*8); - break; - - case 2: - case 3: + reply = BIT(m_recv_buf, offset); + } + else + { // status register - reply = m_stat_reg >> ((offset-2)*8); - break; + reply = BIT(m_stat_reg, offset - 16); } return reply; diff --git a/src/devices/cpu/tms9900/tms9900.cpp b/src/devices/cpu/tms9900/tms9900.cpp index 8f092a3159d..736b840d33a 100644 --- a/src/devices/cpu/tms9900/tms9900.cpp +++ b/src/devices/cpu/tms9900/tms9900.cpp @@ -182,11 +182,11 @@ tms99xx_device::tms99xx_device(const machine_config &mconfig, device_type type, : cpu_device(mconfig, type, tag, owner, clock), m_program_config("program", ENDIANNESS_BIG, data_width, prg_addr_bits), m_setoffset_config("setoffset", ENDIANNESS_BIG, data_width, prg_addr_bits), - m_io_config("cru", ENDIANNESS_BIG, 8, cru_addr_bits), + m_io_config("cru", ENDIANNESS_LITTLE, 8, cru_addr_bits + 1, 1), m_prgspace(nullptr), m_cru(nullptr), m_prgaddr_mask((1<<prg_addr_bits)-1), - m_cruaddr_mask((1<<cru_addr_bits)-1), + m_cruaddr_mask((2<<cru_addr_bits)-2), m_clock_out_line(*this), m_wait_line(*this), m_holda_line(*this), @@ -1637,55 +1637,45 @@ void tms99xx_device::register_write() void tms99xx_device::cru_input_operation() { - int value, value1; - int offset, location; + offs_t cruaddr = m_cru_address & m_cruaddr_mask; + uint16_t value = 0; - location = (m_cru_address >> 4) & (m_cruaddr_mask>>3); - offset = (m_cru_address>>1) & 0x07; - - // Read 8 bits (containing the desired bits) - value = m_cru->read_byte(location); - - if ((offset + m_count) > 8) // spans two 8 bit cluster + for (int i = 0; i < m_count; i++) { - // Read next 8 bits - location = (location + 1) & (m_cruaddr_mask>>3); - value1 = m_cru->read_byte(location); - value |= (value1 << 8); + // Poll one bit at a time + bool cruin = BIT(m_cru->read_byte(cruaddr), 0); + if (cruin) + value |= 1 << i; - if ((offset + m_count) > 16) // spans three 8 bit cluster - { - // Read next 8 bits - location = (location + 1) & (m_cruaddr_mask>>3); - value1 = m_cru->read_byte(location); - value |= (value1 << 16); - } - } + if (TRACE_CRU) logerror("CRU input operation, address %04x, value %d\n", cruaddr, cruin ? 1 : 0); - // On each machine cycle (2 clocks) only one CRU bit is transmitted - pulse_clock(m_count<<1); + // Increment the CRU address + cruaddr = (cruaddr + 2) & m_cruaddr_mask; - // Shift back the bits so that the first bit is at the rightmost place - m_value = (value >> offset); + // On each machine cycle (2 clocks) only one CRU bit is transmitted + pulse_clock(2); + } - // Mask out what we want - m_value &= (0x0000ffff >> (16-m_count)); + m_value = value; } void tms99xx_device::cru_output_operation() { - int value; - int location; - location = (m_cru_address >> 1) & m_cruaddr_mask; - value = m_value; + offs_t cruaddr = m_cru_address & m_cruaddr_mask; + uint16_t value = m_value; // Write m_count bits from cru_address - for (int i=0; i < m_count; i++) + for (int i = 0; i < m_count; i++) { - if (TRACE_CRU) logerror("CRU output operation, address %04x, value %d\n", location<<1, value & 0x01); - m_cru->write_byte(location, (value & 0x01)); + if (TRACE_CRU) logerror("CRU output operation, address %04x, value %d\n", cruaddr, BIT(value, 0)); + + // Write one bit at a time + m_cru->write_byte(cruaddr, BIT(value, 0)); value >>= 1; - location = (location + 1) & m_cruaddr_mask; + + // Increment the CRU address + cruaddr = (cruaddr + 2) & m_cruaddr_mask; + pulse_clock(2); } } diff --git a/src/devices/cpu/tms9900/tms9995.cpp b/src/devices/cpu/tms9900/tms9995.cpp index 67a0439a8ba..ae1b74e8237 100644 --- a/src/devices/cpu/tms9900/tms9995.cpp +++ b/src/devices/cpu/tms9900/tms9995.cpp @@ -170,7 +170,7 @@ tms9995_device::tms9995_device(const machine_config &mconfig, device_type type, PC_debug(0), m_program_config("program", ENDIANNESS_BIG, 8, 16), m_setoffset_config("setoffset", ENDIANNESS_BIG, 8, 16), - m_io_config("cru", ENDIANNESS_BIG, 8, 16), + m_io_config("cru", ENDIANNESS_LITTLE, 8, 16, 1), m_prgspace(nullptr), m_sospace(nullptr), m_cru(nullptr), @@ -288,8 +288,6 @@ void tms9995_device::device_start() save_item(NAME(m_cru_address)); save_item(NAME(m_cru_value)); save_item(NAME(m_cru_first_read)); - save_item(NAME(m_cru_bits_left)); - save_item(NAME(m_cru_read)); save_pointer(NAME(m_flag),16); save_item(NAME(IR)); save_item(NAME(m_pre_IR)); @@ -2096,8 +2094,8 @@ void tms9995_device::return_with_address_copy() */ -#define CRUREADMASK 0x0fff -#define CRUWRITEMASK 0x7fff +#define CRUREADMASK 0xfffe +#define CRUWRITEMASK 0xfffe void tms9995_device::cru_output_operation() { @@ -2133,7 +2131,7 @@ void tms9995_device::cru_output_operation() // of the CPU. However, no wait states are generated for internal // accesses. ([1], section 2.3.3.2) - m_cru->write_byte((m_cru_address >> 1)& CRUWRITEMASK, (m_cru_value & 0x01)); + m_cru->write_byte(m_cru_address & CRUWRITEMASK, (m_cru_value & 0x01)); m_cru_value >>= 1; m_cru_address = (m_cru_address + 2) & 0xfffe; m_count--; @@ -2154,55 +2152,28 @@ void tms9995_device::cru_output_operation() void tms9995_device::cru_input_operation() { - uint16_t crubit; - uint8_t crubyte; - - // Reading is different, since MESS uses 8 bit transfers - // We read 8 bits in one go, then iterate another min(n-1,7) times to allow - // for wait states. - - // read_byte for CRU delivers the first bit on the rightmost position - - int offset = (m_cru_address>>1) & 0x07; - - if (m_cru_first_read || m_cru_bits_left == 0) + if (m_cru_first_read) { - // Read next 8 bits - // 00000000 0rrrrrrr r - // v - // ........ ........ X....... ........ - // - crubyte = m_cru->read_byte((m_cru_address >> 4)& CRUREADMASK); - LOGMASKED(LOG_DETAIL, "Need to get next 8 bits (addresses %04x-%04x): %02x\n", (m_cru_address&0xfff0)+14, m_cru_address&0xfff0, crubyte); - m_cru_read = crubyte << 15; - m_cru_bits_left = 8; - - if (m_cru_first_read) - { - m_cru_read >>= offset; - m_cru_bits_left -= offset; - m_cru_value = 0; - m_cru_first_read = false; - m_pass = m_count; - } - LOGMASKED(LOG_DETAIL, "adjusted value for shift: %06x\n", m_cru_read); + m_cru_value = 0; + m_cru_first_read = false; + m_pass = m_count; } - crubit = (m_cru_read & 0x8000); + bool crubit = BIT(m_cru->read_byte(m_cru_address & CRUREADMASK), 0); m_cru_value = (m_cru_value >> 1) & 0x7fff; // During internal reading, the CRUIN line will be ignored. We emulate this // by overwriting the bit which we got from outside. Also, READY is ignored. if (m_cru_address == 0x1fda) { - crubit = m_mid_flag? 0x8000 : 0x0000; + crubit = m_mid_flag; m_check_ready = false; } else { if ((m_cru_address & 0xffe0)==0x1ee0) { - crubit = (m_flag[(m_cru_address>>1)&0x000f]==true)? 0x8000 : 0x0000; + crubit = m_flag[(m_cru_address>>1)&0x000f]; m_check_ready = false; } else @@ -2211,18 +2182,14 @@ void tms9995_device::cru_input_operation() } } - LOGMASKED(LOG_CRU, "CRU input operation, address %04x, value %d\n", m_cru_address, (crubit & 0x8000)>>15); + LOGMASKED(LOG_CRU, "CRU input operation, address %04x, value %d\n", m_cru_address, crubit ? 1 : 0); - m_cru_value |= crubit; + if (crubit) + m_cru_value |= 0x8000; m_cru_address = (m_cru_address + 2) & 0xfffe; - m_cru_bits_left--; - if (m_pass > 1) - { - m_cru_read >>= 1; - } - else + if (m_pass == 1) { // This is the final shift. For both byte and word length transfers, // the first bit is always m_cru_value & 0x0001. diff --git a/src/devices/cpu/tms9900/tms9995.h b/src/devices/cpu/tms9900/tms9995.h index 72dfc2960a1..531e5208a41 100644 --- a/src/devices/cpu/tms9900/tms9995.h +++ b/src/devices/cpu/tms9900/tms9995.h @@ -245,8 +245,6 @@ private: uint16_t m_cru_address; uint16_t m_cru_value; bool m_cru_first_read; - int m_cru_bits_left; - uint32_t m_cru_read; // CPU-internal CRU flags bool m_flag[16]; diff --git a/src/devices/machine/tms9901.cpp b/src/devices/machine/tms9901.cpp index af01c6ac7fe..aadfec82f20 100644 --- a/src/devices/machine/tms9901.cpp +++ b/src/devices/machine/tms9901.cpp @@ -279,9 +279,9 @@ READ8_MEMBER( tms9901_device::read ) { int answer = 0; - offset &= 0x003; + offset &= 0x01f; - switch (offset) + switch (offset >> 3) { case 0: if (m_clock_mode) @@ -356,7 +356,7 @@ READ8_MEMBER( tms9901_device::read ) break; } - return answer; + return BIT(answer, offset & 7); } /* diff --git a/src/devices/machine/tms9902.cpp b/src/devices/machine/tms9902.cpp index 93e48cf03a2..bf0071889f0 100644 --- a/src/devices/machine/tms9902.cpp +++ b/src/devices/machine/tms9902.cpp @@ -482,44 +482,105 @@ READ8_MEMBER( tms9902_device::cruread ) { uint8_t answer = 0; - offset &= 0x0003; - - switch (offset) + switch (offset & 31) { - case 3: // Bits 31-24 - if (m_INT) answer |= 0x80; - if (m_LDCTRL || m_LDIR || m_LRDR || m_LXDR || m_BRKON) answer |= 0x40; - if (m_DSCH) answer |= 0x20; - if (m_CTSin) answer |= 0x10; - if (m_DSRin) answer |= 0x08; - if (m_RTSout) answer |= 0x04; - if (m_TIMELP) answer |= 0x02; - if (m_TIMERR) answer |= 0x01; + case 31: + answer = m_INT; + break; + + case 30: + answer = (m_LDCTRL || m_LDIR || m_LRDR || m_LXDR || m_BRKON); + break; + + case 29: + answer = m_DSCH; + break; + + case 28: + answer = m_CTSin; + break; + + case 27: + answer = m_DSRin; + break; + + case 26: + answer = m_RTSout; + break; + + case 25: + answer = m_TIMELP; + break; + + case 24: + answer = m_TIMERR; + break; + + case 23: + answer = m_XSRE; + break; + + case 22: + answer = m_XBRE; + break; + + case 21: + answer = m_RBRL; + break; + + case 20: + answer = (m_DSCH && m_DSCENB); + break; + + case 19: + answer = (m_TIMELP && m_TIMENB); + break; + + case 17: + answer = (m_XBRE && m_XBIENB); + break; + + case 16: + answer = (m_RBRL && m_RIENB); + break; + + case 15: + answer = m_RIN; + break; + + case 14: + answer = m_RSBD; + break; + + case 13: + answer = m_RFBD; + break; + + case 12: + answer = m_RFER; + break; + + case 11: + answer = m_ROVER; break; - case 2: // Bits 23-16 - if (m_XSRE) answer |= 0x80; - if (m_XBRE) answer |= 0x40; - if (m_RBRL) answer |= 0x20; - if (m_DSCH && m_DSCENB) answer |= 0x10; - if (m_TIMELP && m_TIMENB) answer |= 0x08; - if (m_XBRE && m_XBIENB) answer |= 0x02; - if (m_RBRL && m_RIENB) answer |= 0x01; + case 10: + answer = m_RPER; break; - case 1: // Bits 15-8 - if (m_RIN) answer |= 0x80; - if (m_RSBD) answer |= 0x40; - if (m_RFBD) answer |= 0x20; - if (m_RFER) answer |= 0x10; - if (m_ROVER) answer |= 0x08; - if (m_RPER) answer |= 0x04; - if (m_RPER || m_RFER || m_ROVER) answer |= 0x02; + case 9: + answer = (m_RPER || m_RFER || m_ROVER); break; - case 0: // Bits 7-0 - LOGCRU("Reading received byte = %02x\n", m_RBR); - answer = m_RBR; + case 7: + case 6: + case 5: + case 4: + case 3: + case 2: + case 1: + case 0: + answer = BIT(m_RBR, offset & 31); break; } if (VERBOSE & LOG_DETAIL) LOGCRU("Reading flag bits %d - %d = %02x\n", ((offset+1)*8-1), offset*8, answer); |