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author hap <happppp@users.noreply.github.com>2026-04-05 12:16:28 +0200
committer hap <happppp@users.noreply.github.com>2026-04-05 14:51:08 +0200
commitbfe51451c04ab319196edef9e6ac7b3030006be7 (patch)
tree8fc223d466a0f98551479fb2ed4cf162d36278c3 /src/devices/cpu
parente1e48571a28543c15a962bc68ca41091175d73dd (diff)
h8_sci: add todo note
Diffstat (limited to 'src/devices/cpu')
-rw-r--r--src/devices/cpu/h8/h83002.h1
-rw-r--r--src/devices/cpu/h8/h83003.h1
-rw-r--r--src/devices/cpu/h8/h83006.h1
-rw-r--r--src/devices/cpu/h8/h83008.h1
-rw-r--r--src/devices/cpu/h8/h83032.h1
-rw-r--r--src/devices/cpu/h8/h83042.h1
-rw-r--r--src/devices/cpu/h8/h83048.h1
-rw-r--r--src/devices/cpu/h8/h8_adc.h1
-rw-r--r--src/devices/cpu/h8/h8_sci.cpp91
-rw-r--r--src/devices/cpu/h8/h8_sci.h1
-rw-r--r--src/devices/cpu/h8/h8h.h1
-rw-r--r--src/devices/cpu/h8/h8s2000.h1
-rw-r--r--src/devices/cpu/h8/h8s2245.h2
-rw-r--r--src/devices/cpu/h8/h8s2357.h2
-rw-r--r--src/devices/cpu/h8/h8s2600.h1
-rw-r--r--src/devices/cpu/h8/h8s2655.h1
-rw-r--r--src/devices/cpu/h8/swx00.h2
17 files changed, 51 insertions, 59 deletions
diff --git a/src/devices/cpu/h8/h83002.h b/src/devices/cpu/h8/h83002.h
index c0d0dc53f19..eaed0be529e 100644
--- a/src/devices/cpu/h8/h83002.h
+++ b/src/devices/cpu/h8/h83002.h
@@ -8,7 +8,6 @@
H8/300H-based mcus.
-
***************************************************************************/
#ifndef MAME_CPU_H8_H83002_H
diff --git a/src/devices/cpu/h8/h83003.h b/src/devices/cpu/h8/h83003.h
index 9953da73aab..5925255ec50 100644
--- a/src/devices/cpu/h8/h83003.h
+++ b/src/devices/cpu/h8/h83003.h
@@ -8,7 +8,6 @@
H8/300H-based mcus.
-
***************************************************************************/
#ifndef MAME_CPU_H8_H83003_H
diff --git a/src/devices/cpu/h8/h83006.h b/src/devices/cpu/h8/h83006.h
index 70075658da0..2dc404bb668 100644
--- a/src/devices/cpu/h8/h83006.h
+++ b/src/devices/cpu/h8/h83006.h
@@ -8,7 +8,6 @@
H8/300H-based mcus.
-
***************************************************************************/
#ifndef MAME_CPU_H8_H83006_H
diff --git a/src/devices/cpu/h8/h83008.h b/src/devices/cpu/h8/h83008.h
index bd859e134f3..0f396afe1e5 100644
--- a/src/devices/cpu/h8/h83008.h
+++ b/src/devices/cpu/h8/h83008.h
@@ -8,7 +8,6 @@
H8/300H-based mcu.
-
***************************************************************************/
#ifndef MAME_CPU_H8_H83008_H
diff --git a/src/devices/cpu/h8/h83032.h b/src/devices/cpu/h8/h83032.h
index f920205c047..1da51038a77 100644
--- a/src/devices/cpu/h8/h83032.h
+++ b/src/devices/cpu/h8/h83032.h
@@ -13,7 +13,6 @@
H8/3031 32K 1K
H8/3032 64K 2K
-
***************************************************************************/
#ifndef MAME_CPU_H8_H83032_H
diff --git a/src/devices/cpu/h8/h83042.h b/src/devices/cpu/h8/h83042.h
index 78db0b10568..5a7d12f6847 100644
--- a/src/devices/cpu/h8/h83042.h
+++ b/src/devices/cpu/h8/h83042.h
@@ -16,7 +16,6 @@
The 3394, 3396, and 3997 variants are the mask-rom versions.
-
***************************************************************************/
#ifndef MAME_CPU_H8_H83042_H
diff --git a/src/devices/cpu/h8/h83048.h b/src/devices/cpu/h8/h83048.h
index abf3cf97d47..3ce236e41e2 100644
--- a/src/devices/cpu/h8/h83048.h
+++ b/src/devices/cpu/h8/h83048.h
@@ -16,7 +16,6 @@
The 3394, 3396, and 3997 variants are the mask-rom versions.
-
***************************************************************************/
#ifndef MAME_CPU_H8_H83048_H
diff --git a/src/devices/cpu/h8/h8_adc.h b/src/devices/cpu/h8/h8_adc.h
index 66f9da51d58..10c31c2d1f6 100644
--- a/src/devices/cpu/h8/h8_adc.h
+++ b/src/devices/cpu/h8/h8_adc.h
@@ -6,7 +6,6 @@
H8 Analog to Digital Converter subsystem
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8_ADC_H
diff --git a/src/devices/cpu/h8/h8_sci.cpp b/src/devices/cpu/h8/h8_sci.cpp
index 3ec8951a22d..c378dfc5216 100644
--- a/src/devices/cpu/h8/h8_sci.cpp
+++ b/src/devices/cpu/h8/h8_sci.cpp
@@ -1,5 +1,56 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ H8 Serial Communications Interface
+
+ TODO:
+ - It should not immediately tx_start() or rx_start() after writing to a
+ register, it's likely done at the next internal SCI clock.
+
+ Clocking:
+ Async mode:
+ The circuit wants 16 events per bit.
+ * Internal clocking: the cpu clock is divided by one of (1, 4, 16, 64)
+ from the cks field of smr then by (brr+1) then by 2.
+ * External clocking: the external clock is supposed to be 16*bitrate.
+ Sync mode:
+ The circuit wants 2 events per bit, a positive and a negative edge.
+ * Internal clocking: the cpu clock is divided by one of (1, 4, 16, 64)
+ from the cks field of smr then by (brr+1) then by 2. Events are then
+ interpreted has been alternatively positive and negative (e.g. another
+ divide-by-two, sync-wise).
+ * External clocking: the external clock is supposed to be at bitrate,
+ both edges are used.
+
+ Synchronization:
+ Async mode:
+ Both modes use a 4-bits counter incremented on every event (16/bit).
+
+ * Transmit sets the counter to 0 at transmit start. Output data line
+ changes value on counter == 0. If the clock output is required, clk=1
+ outside of transmit, clk=0 on counter==0, clk=1 on counter==8.
+
+ * Receive sets the counter to 0 when the data line initially goes down
+ (start bit). Output line is read on counter==8. It is unknown whether
+ the counter is reset on every data line level change.
+
+ Sync mode:
+ * Transmit changes the data line on negative edges, the clock line,
+ following positive and negative edge definition, is output as long as
+ transmit is active and is otherwise 1.
+
+ * Receive reads the data line on positive edges.
+
+ Framing:
+ Async mode: 1 bit of start at 0, 7 or 8 bits of data, nothing or 1 bit of
+ parity or 1 bit of multiprocessing, 1 or 2 bits of stop at 1.
+ Sync mode: 8 bits of data.
+
+ Multiprocessing bit is an extra bit which value can be set on transmit
+ in bit zero of ssr. On receive when zero the byte is dropped.
+
+***************************************************************************/
#include "emu.h"
#include "h8_sci.h"
@@ -20,46 +71,6 @@
DEFINE_DEVICE_TYPE(H8_SCI, h8_sci_device, "h8_sci", "H8 Serial Communications Interface")
-
-// Clocking:
-// Async mode:
-// The circuit wants 16 events per bit.
-// * Internal clocking: the cpu clock is divided by one of (1, 4, 16, 64) from the cks field of smr
-// then by (brr+1) then by 2.
-// * External clocking: the external clock is supposed to be 16*bitrate.
-// Sync mode:
-// The circuit wants 2 events per bit, a positive and a negative edge.
-// * Internal clocking: the cpu clock is divided by one of (1, 4, 16, 64) from the cks field of smr
-// then by (brr+1) then by 2. Events are then interpreted has been alternatively positive and
-// negative (e.g. another divide-by-two, sync-wise).
-// * External clocking: the external clock is supposed to be at bitrate, both edges are used.
-//
-// Synchronization:
-// Async mode:
-// Both modes use a 4-bits counter incremented on every event (16/bit).
-//
-// * Transmit sets the counter to 0 at transmit start. Output data line changes value
-// on counter == 0. If the clock output is required, clk=1 outside of transmit,
-// clk=0 on counter==0, clk=1 on counter==8.
-//
-// * Receive sets the counter to 0 when the data line initially goes down (start bit)
-// Output line is read on counter==8. It is unknown whether the counter is reset
-// on every data line level change.
-//
-// Sync mode:
-// * Transmit changes the data line on negative edges, the clock line, following positive and
-// negative edge definition, is output as long as transmit is active and is otherwise 1.
-//
-// * Receive reads the data line on positive edges.
-//
-// Framing:
-// Async mode: 1 bit of start at 0, 7 or 8 bits of data, nothing or 1 bit of parity or 1 bit of multiprocessing, 1 or 2 bits of stop at 1.
-// Sync mode: 8 bits of data.
-//
-// Multiprocessing bit is an extra bit which value can be set on transmit in bit zero of ssr.
-// On receive when zero the byte is dropped.
-
-
const char *const h8_sci_device::state_names[] = { "idle", "start", "bit", "parity", "stop", "last-tick" };
h8_sci_device::h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
diff --git a/src/devices/cpu/h8/h8_sci.h b/src/devices/cpu/h8/h8_sci.h
index 32fbfe0442e..f919ab4b351 100644
--- a/src/devices/cpu/h8/h8_sci.h
+++ b/src/devices/cpu/h8/h8_sci.h
@@ -6,7 +6,6 @@
H8 Serial Communications Interface
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8_SCI_H
diff --git a/src/devices/cpu/h8/h8h.h b/src/devices/cpu/h8/h8h.h
index 0c4d6e277ea..1710622fa65 100644
--- a/src/devices/cpu/h8/h8h.h
+++ b/src/devices/cpu/h8/h8h.h
@@ -8,7 +8,6 @@
Adds 32-bits support and a bunch of other stuff.
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8H_H
diff --git a/src/devices/cpu/h8/h8s2000.h b/src/devices/cpu/h8/h8s2000.h
index ac41b1db6e9..aaa29aecf22 100644
--- a/src/devices/cpu/h8/h8s2000.h
+++ b/src/devices/cpu/h8/h8s2000.h
@@ -9,7 +9,6 @@
Adds the exr register, the move multiple instructions, the shifts by
two, tas and optionally the trace mode.
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8S2000_H
diff --git a/src/devices/cpu/h8/h8s2245.h b/src/devices/cpu/h8/h8s2245.h
index 5f2d489a7b7..ae2ed29da41 100644
--- a/src/devices/cpu/h8/h8s2245.h
+++ b/src/devices/cpu/h8/h8s2245.h
@@ -14,8 +14,6 @@
H8S/2245 128K 4K
H8S/2246 128K 8K
-
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8S2245_H
diff --git a/src/devices/cpu/h8/h8s2357.h b/src/devices/cpu/h8/h8s2357.h
index 7d7fc415b72..7f9ae9f18e3 100644
--- a/src/devices/cpu/h8/h8s2357.h
+++ b/src/devices/cpu/h8/h8s2357.h
@@ -16,8 +16,6 @@
H8S/2392 - 8K
H8S/2390 - 4K
-
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8S2357_H
diff --git a/src/devices/cpu/h8/h8s2600.h b/src/devices/cpu/h8/h8s2600.h
index 86b5089e628..38a20ce9fc8 100644
--- a/src/devices/cpu/h8/h8s2600.h
+++ b/src/devices/cpu/h8/h8s2600.h
@@ -8,7 +8,6 @@
Adds the multiply-and-accumulate register and related instructions
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8S2600_H
diff --git a/src/devices/cpu/h8/h8s2655.h b/src/devices/cpu/h8/h8s2655.h
index 80a55b2d234..6ae830967e6 100644
--- a/src/devices/cpu/h8/h8s2655.h
+++ b/src/devices/cpu/h8/h8s2655.h
@@ -9,7 +9,6 @@
They're both H8S/2600-based mcus, with 128K internal rom for the 2655
and 64K for the 2653.
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8S2655_H
diff --git a/src/devices/cpu/h8/swx00.h b/src/devices/cpu/h8/swx00.h
index 256dc497625..2df6afd1799 100644
--- a/src/devices/cpu/h8/swx00.h
+++ b/src/devices/cpu/h8/swx00.h
@@ -19,8 +19,6 @@
1 on effects ram program rom+ram QY100 main
3 off? wave rom effects ram PSR540
-
-
***************************************************************************/
#ifndef MAME_CPU_H8_SWX00_H