diff options
author | 2018-08-14 15:49:56 +0100 | |
---|---|---|
committer | 2018-08-14 10:49:56 -0400 | |
commit | 839e46c359a8f950ba5d1cf2bebdcc8efc13b8a9 (patch) | |
tree | dd343b66e3d00abb6b33b54b564de4a12c395dae /src/devices/cpu | |
parent | a14c3259aa98fc61f8213b7724b31b564ed2529b (diff) |
hng64: misc cleanups + kludge so that roadedge / xrally can be coined up and played without them crashing (#3842)
* hng64: misc cleanups
* hack so that the racing games don't crash when entering gameplay (previous handler here was just guesswork anyway)
* validation (nw)
Diffstat (limited to 'src/devices/cpu')
-rw-r--r-- | src/devices/cpu/tlcs870/tlcs870.cpp | 300 |
1 files changed, 151 insertions, 149 deletions
diff --git a/src/devices/cpu/tlcs870/tlcs870.cpp b/src/devices/cpu/tlcs870/tlcs870.cpp index 43a167f9427..79af9af88b4 100644 --- a/src/devices/cpu/tlcs870/tlcs870.cpp +++ b/src/devices/cpu/tlcs870/tlcs870.cpp @@ -17,6 +17,8 @@ #include "tlcs870d.h" #include "debugger.h" +//#define VERBOSE 1 +#include "logmacro.h" DEFINE_DEVICE_TYPE(TMP87PH40AN, tmp87ph40an_device, "tmp87ph40an", "Toshiba TMP87PH40AN") @@ -289,15 +291,15 @@ WRITE8_MEMBER(tlcs870_device::tc1cr_w) { m_TC1CR = data; - logerror("%s m_TC1CR (16-bit TC1 Timer Control Register) bits set to\n", machine().describe_context()); - logerror("%d: TFF1 (Timer F/F1 control for PPG mode)\n", (m_TC1CR & 0x80) ? 1 : 0); - logerror("%d: SCAP1/MCAP1/METT1/MPPG1\n", (m_TC1CR & 0x40) ? 1 : 0); - logerror("%d: TC1S-1 (TC1 Start Control)\n", (m_TC1CR & 0x20) ? 1 : 0); - logerror("%d: TC1S-0 (TC1 Start Control)\n", (m_TC1CR & 0x10) ? 1 : 0); - logerror("%d: TC1CK-1 (TC1 Source Clock select)\n", (m_TC1CR & 0x08) ? 1 : 0); - logerror("%d: TC1CK-0 (TC1 Source Clock select)\n", (m_TC1CR & 0x04) ? 1 : 0); - logerror("%d: TC1M-1 (TC1 Mode Select)\n", (m_TC1CR & 0x02) ? 1 : 0); - logerror("%d: TC1M-0 (TC1 Mode Select)\n", (m_TC1CR & 0x01) ? 1 : 0); + LOG("%s m_TC1CR (16-bit TC1 Timer Control Register) bits set to\n", machine().describe_context()); + LOG("%d: TFF1 (Timer F/F1 control for PPG mode)\n", (m_TC1CR & 0x80) ? 1 : 0); + LOG("%d: SCAP1/MCAP1/METT1/MPPG1\n", (m_TC1CR & 0x40) ? 1 : 0); + LOG("%d: TC1S-1 (TC1 Start Control)\n", (m_TC1CR & 0x20) ? 1 : 0); + LOG("%d: TC1S-0 (TC1 Start Control)\n", (m_TC1CR & 0x10) ? 1 : 0); + LOG("%d: TC1CK-1 (TC1 Source Clock select)\n", (m_TC1CR & 0x08) ? 1 : 0); + LOG("%d: TC1CK-0 (TC1 Source Clock select)\n", (m_TC1CR & 0x04) ? 1 : 0); + LOG("%d: TC1M-1 (TC1 Mode Select)\n", (m_TC1CR & 0x02) ? 1 : 0); + LOG("%d: TC1M-0 (TC1 Mode Select)\n", (m_TC1CR & 0x01) ? 1 : 0); } WRITE8_MEMBER(tlcs870_device::treg1a_l_w) @@ -364,15 +366,15 @@ WRITE8_MEMBER(tlcs870_device::tc2cr_w) m_TC2CR = data; - logerror("%s m_TC2CR (16-bit TC2 Timer Control Register) bits set to\n", machine().describe_context()); - logerror("%d: (invalid)\n", (m_TC2CR & 0x80) ? 1 : 0); - logerror("%d: (invalid)\n", (m_TC2CR & 0x40) ? 1 : 0); - logerror("%d: TC2S (TC2 Start Control)\n", (m_TC2CR & 0x20) ? 1 : 0); - logerror("%d: TC2CK-2 (TC2 Source Clock select)\n", (m_TC2CR & 0x10) ? 1 : 0); - logerror("%d: TC2CK-1 (TC2 Source Clock select)\n", (m_TC2CR & 0x08) ? 1 : 0); - logerror("%d: TC2CK-0 (TC2 Source Clock select)\n", (m_TC2CR & 0x04) ? 1 : 0); - logerror("%d: (invalid)\n", (m_TC2CR & 0x02) ? 1 : 0); - logerror("%d: TC2M (TC2 Mode Select)\n", (m_TC2CR & 0x01) ? 1 : 0); + LOG("%s m_TC2CR (16-bit TC2 Timer Control Register) bits set to\n", machine().describe_context()); + LOG("%d: (invalid)\n", (m_TC2CR & 0x80) ? 1 : 0); + LOG("%d: (invalid)\n", (m_TC2CR & 0x40) ? 1 : 0); + LOG("%d: TC2S (TC2 Start Control)\n", (m_TC2CR & 0x20) ? 1 : 0); + LOG("%d: TC2CK-2 (TC2 Source Clock select)\n", (m_TC2CR & 0x10) ? 1 : 0); + LOG("%d: TC2CK-1 (TC2 Source Clock select)\n", (m_TC2CR & 0x08) ? 1 : 0); + LOG("%d: TC2CK-0 (TC2 Source Clock select)\n", (m_TC2CR & 0x04) ? 1 : 0); + LOG("%d: (invalid)\n", (m_TC2CR & 0x02) ? 1 : 0); + LOG("%d: TC2M (TC2 Mode Select)\n", (m_TC2CR & 0x01) ? 1 : 0); } WRITE8_MEMBER(tlcs870_device::treg2_l_w) @@ -396,15 +398,15 @@ WRITE8_MEMBER(tlcs870_device::tc3cr_w) { m_TC3CR = data; - logerror("%s m_TC3CR (8-bit TC3 Timer Control Register) bits set to\n", machine().describe_context()); - logerror("%d: (invalid)\n", (m_TC3CR & 0x80) ? 1 : 0); - logerror("%d: SCAP (Software Capture Control)\n", (m_TC3CR & 0x40) ? 1 : 0); - logerror("%d: (invalid)\n", (m_TC3CR & 0x20) ? 1 : 0); - logerror("%d: TC3S (TC3 Start Control)\n", (m_TC3CR & 0x10) ? 1 : 0); - logerror("%d: TC3CK-1 (TC3 Source Clock select)\n", (m_TC3CR & 0x08) ? 1 : 0); - logerror("%d: TC3CK-0 (TC3 Source Clock select)\n", (m_TC3CR & 0x04) ? 1 : 0); - logerror("%d: (invalid)\n", (m_TC3CR & 0x02) ? 1 : 0); - logerror("%d: TC3M (TC3 Mode Select)\n", (m_TC3CR & 0x01) ? 1 : 0); + LOG("%s m_TC3CR (8-bit TC3 Timer Control Register) bits set to\n", machine().describe_context()); + LOG("%d: (invalid)\n", (m_TC3CR & 0x80) ? 1 : 0); + LOG("%d: SCAP (Software Capture Control)\n", (m_TC3CR & 0x40) ? 1 : 0); + LOG("%d: (invalid)\n", (m_TC3CR & 0x20) ? 1 : 0); + LOG("%d: TC3S (TC3 Start Control)\n", (m_TC3CR & 0x10) ? 1 : 0); + LOG("%d: TC3CK-1 (TC3 Source Clock select)\n", (m_TC3CR & 0x08) ? 1 : 0); + LOG("%d: TC3CK-0 (TC3 Source Clock select)\n", (m_TC3CR & 0x04) ? 1 : 0); + LOG("%d: (invalid)\n", (m_TC3CR & 0x02) ? 1 : 0); + LOG("%d: TC3M (TC3 Mode Select)\n", (m_TC3CR & 0x01) ? 1 : 0); } WRITE8_MEMBER(tlcs870_device::treg3a_w) @@ -433,15 +435,15 @@ WRITE8_MEMBER(tlcs870_device::tc4cr_w) { m_TC4CR = data; - logerror("%s m_TC4CR (8-bit TC4 Timer Control Register) bits set to\n", machine().describe_context()); - logerror("%d: TFF4-1 (Timer F/F 4 Control)\n", (m_TC4CR & 0x80) ? 1 : 0); - logerror("%d: TFF4-0 (Timer F/F 4 Control)\n", (m_TC4CR & 0x40) ? 1 : 0); - logerror("%d: (invalid)\n", (m_TC4CR & 0x20) ? 1 : 0); - logerror("%d: TC4S (TC4 Start Control)\n", (m_TC4CR & 0x10) ? 1 : 0); - logerror("%d: TC4CK-1 (TC4 Source Clock select)\n", (m_TC4CR & 0x08) ? 1 : 0); - logerror("%d: TC4CK-0 (TC4 Source Clock select)\n", (m_TC4CR & 0x04) ? 1 : 0); - logerror("%d: TC4M-1 (TC4 Mode Select)\n", (m_TC4CR & 0x02) ? 1 : 0); - logerror("%d: TC4M-0 (TC4 Mode Select)\n", (m_TC4CR & 0x01) ? 1 : 0); + LOG("%s m_TC4CR (8-bit TC4 Timer Control Register) bits set to\n", machine().describe_context()); + LOG("%d: TFF4-1 (Timer F/F 4 Control)\n", (m_TC4CR & 0x80) ? 1 : 0); + LOG("%d: TFF4-0 (Timer F/F 4 Control)\n", (m_TC4CR & 0x40) ? 1 : 0); + LOG("%d: (invalid)\n", (m_TC4CR & 0x20) ? 1 : 0); + LOG("%d: TC4S (TC4 Start Control)\n", (m_TC4CR & 0x10) ? 1 : 0); + LOG("%d: TC4CK-1 (TC4 Source Clock select)\n", (m_TC4CR & 0x08) ? 1 : 0); + LOG("%d: TC4CK-0 (TC4 Source Clock select)\n", (m_TC4CR & 0x04) ? 1 : 0); + LOG("%d: TC4M-1 (TC4 Mode Select)\n", (m_TC4CR & 0x02) ? 1 : 0); + LOG("%d: TC4M-0 (TC4 Mode Select)\n", (m_TC4CR & 0x01) ? 1 : 0); } WRITE8_MEMBER(tlcs870_device::treg4_w) @@ -457,15 +459,15 @@ WRITE8_MEMBER(tlcs870_device::tbtcr_w) { m_TBTCR = data; - logerror("%s m_TBTCR (Time Base Timer) bits set to\n", machine().describe_context()); - logerror("%d: DV0EN (Divider Output Enable)\n", (m_TBTCR & 0x80) ? 1 : 0); - logerror("%d: DVOCK-1 (Divide Output Frequency Selection)n", (m_TBTCR & 0x40) ? 1 : 0); - logerror("%d: DVOCK-0 (Divide Output Frequency Selection)\n", (m_TBTCR & 0x20) ? 1 : 0); - logerror("%d: DV7CK (?)\n", (m_TBTCR & 0x10) ? 1 : 0); - logerror("%d: TBTEN (Time Base Timer Enable)\n", (m_TBTCR & 0x08) ? 1 : 0); - logerror("%d: TBTCK-2 (Time Base Timer Interrupt Frequency)\n", (m_TBTCR & 0x04) ? 1 : 0); - logerror("%d: TBTCK-1 (Time Base Timer Interrupt Frequency)\n", (m_TBTCR & 0x02) ? 1 : 0); - logerror("%d: TBTCK-0 (Time Base Timer Interrupt Frequency)\n", (m_TBTCR & 0x01) ? 1 : 0); + LOG("%s m_TBTCR (Time Base Timer) bits set to\n", machine().describe_context()); + LOG("%d: DV0EN (Divider Output Enable)\n", (m_TBTCR & 0x80) ? 1 : 0); + LOG("%d: DVOCK-1 (Divide Output Frequency Selection)n", (m_TBTCR & 0x40) ? 1 : 0); + LOG("%d: DVOCK-0 (Divide Output Frequency Selection)\n", (m_TBTCR & 0x20) ? 1 : 0); + LOG("%d: DV7CK (?)\n", (m_TBTCR & 0x10) ? 1 : 0); + LOG("%d: TBTEN (Time Base Timer Enable)\n", (m_TBTCR & 0x08) ? 1 : 0); + LOG("%d: TBTCK-2 (Time Base Timer Interrupt Frequency)\n", (m_TBTCR & 0x04) ? 1 : 0); + LOG("%d: TBTCK-1 (Time Base Timer Interrupt Frequency)\n", (m_TBTCR & 0x02) ? 1 : 0); + LOG("%d: TBTCK-0 (Time Base Timer Interrupt Frequency)\n", (m_TBTCR & 0x01) ? 1 : 0); } READ8_MEMBER(tlcs870_device::tbtcr_r) @@ -482,50 +484,50 @@ WRITE8_MEMBER(tlcs870_device::sio1cr1_w) { m_SIOCR1[0] = data; - logerror("%s m_SIOCR1[0] (Serial IO Port 1 Control Register 1) bits set to\n", machine().describe_context()); - logerror("%d: SIOS1 (Start/Stop transfer)\n", (m_SIOCR1[0] & 0x80) ? 1 : 0); - logerror("%d: SIOINH1 (Abort/Continue transfer)\n", (m_SIOCR1[0] & 0x40) ? 1 : 0); - logerror("%d: SIOM1-2 (Serial Mode)\n", (m_SIOCR1[0] & 0x20) ? 1 : 0); - logerror("%d: SIOM1-1 (Serial Mode)\n", (m_SIOCR1[0] & 0x10) ? 1 : 0); - logerror("%d: SIOM1-0 (Serial Mode)\n", (m_SIOCR1[0] & 0x08) ? 1 : 0); - logerror("%d: SCK1-2 (Serial Clock)\n", (m_SIOCR1[0] & 0x04) ? 1 : 0); - logerror("%d: SCK1-1 (Serial Clock)\n", (m_SIOCR1[0] & 0x02) ? 1 : 0); - logerror("%d: SCK1-0 (Serial Clock)\n", (m_SIOCR1[0] & 0x01) ? 1 : 0); + LOG("%s m_SIOCR1[0] (Serial IO Port 1 Control Register 1) bits set to\n", machine().describe_context()); + LOG("%d: SIOS1 (Start/Stop transfer)\n", (m_SIOCR1[0] & 0x80) ? 1 : 0); + LOG("%d: SIOINH1 (Abort/Continue transfer)\n", (m_SIOCR1[0] & 0x40) ? 1 : 0); + LOG("%d: SIOM1-2 (Serial Mode)\n", (m_SIOCR1[0] & 0x20) ? 1 : 0); + LOG("%d: SIOM1-1 (Serial Mode)\n", (m_SIOCR1[0] & 0x10) ? 1 : 0); + LOG("%d: SIOM1-0 (Serial Mode)\n", (m_SIOCR1[0] & 0x08) ? 1 : 0); + LOG("%d: SCK1-2 (Serial Clock)\n", (m_SIOCR1[0] & 0x04) ? 1 : 0); + LOG("%d: SCK1-1 (Serial Clock)\n", (m_SIOCR1[0] & 0x02) ? 1 : 0); + LOG("%d: SCK1-0 (Serial Clock)\n", (m_SIOCR1[0] & 0x01) ? 1 : 0); m_transfer_mode[0] = (m_SIOCR1[0] & 0x38) >> 3; switch (m_transfer_mode[0]) { case 0x0: - logerror("(Serial set to 8-bit transmit mode)\n"); + LOG("(Serial set to 8-bit transmit mode)\n"); m_transmit_bits[0] = 8; m_receive_bits[0] = 0; break; case 0x2: - logerror("(Serial set to 4-bit transmit mode)\n"); + LOG("(Serial set to 4-bit transmit mode)\n"); m_transmit_bits[0] = 4; m_receive_bits[0] = 0; break; case 0x4: - logerror("(Serial set to 8-bit transmit/receive mode)\n"); + LOG("(Serial set to 8-bit transmit/receive mode)\n"); m_transmit_bits[0] = 8; m_receive_bits[0] = 8; break; - case 0x5: logerror("(Serial set to 8-bit receive mode)\n"); + case 0x5: LOG("(Serial set to 8-bit receive mode)\n"); m_transmit_bits[0] = 0; m_receive_bits[0] = 8; break; case 0x6: - logerror("(Serial set to 4-bit receive mode)\n"); + LOG("(Serial set to 4-bit receive mode)\n"); m_transmit_bits[0] = 0; m_receive_bits[0] = 4; break; default: - logerror("(Serial set to invalid mode)\n"); + LOG("(Serial set to invalid mode)\n"); m_transmit_bits[0] = 0; m_receive_bits[0] = 0; break; @@ -547,18 +549,18 @@ WRITE8_MEMBER(tlcs870_device::sio1cr2_w) { m_SIOCR2[0] = data; - logerror("%s m_SIOCR2[0] (Serial IO Port 1 Control Register 2) bits set to\n", machine().describe_context()); - logerror("%d: (invalid)\n", (m_SIOCR2[0] & 0x80) ? 1 : 0); - logerror("%d: (invalid)\n", (m_SIOCR2[0] & 0x40) ? 1 : 0); - logerror("%d: (invalid)\n", (m_SIOCR2[0] & 0x20) ? 1 : 0); - logerror("%d: WAIT1-1 (Wait Control\n", (m_SIOCR2[0] & 0x10) ? 1 : 0); - logerror("%d: WAIT1-0 (Wait Control)\n", (m_SIOCR2[0] & 0x08) ? 1 : 0); - logerror("%d: BUF1-2 (Number of Transfer Bytes)\n", (m_SIOCR2[0] & 0x04) ? 1 : 0); - logerror("%d: BUF1-1 (Number of Transfer Bytes)\n", (m_SIOCR2[0] & 0x02) ? 1 : 0); - logerror("%d: BUF1-0 (Number of Transfer Bytes)\n", (m_SIOCR2[0] & 0x01) ? 1 : 0); + LOG("%s m_SIOCR2[0] (Serial IO Port 1 Control Register 2) bits set to\n", machine().describe_context()); + LOG("%d: (invalid)\n", (m_SIOCR2[0] & 0x80) ? 1 : 0); + LOG("%d: (invalid)\n", (m_SIOCR2[0] & 0x40) ? 1 : 0); + LOG("%d: (invalid)\n", (m_SIOCR2[0] & 0x20) ? 1 : 0); + LOG("%d: WAIT1-1 (Wait Control\n", (m_SIOCR2[0] & 0x10) ? 1 : 0); + LOG("%d: WAIT1-0 (Wait Control)\n", (m_SIOCR2[0] & 0x08) ? 1 : 0); + LOG("%d: BUF1-2 (Number of Transfer Bytes)\n", (m_SIOCR2[0] & 0x04) ? 1 : 0); + LOG("%d: BUF1-1 (Number of Transfer Bytes)\n", (m_SIOCR2[0] & 0x02) ? 1 : 0); + LOG("%d: BUF1-0 (Number of Transfer Bytes)\n", (m_SIOCR2[0] & 0x01) ? 1 : 0); m_transfer_numbytes[0] = (m_SIOCR2[0] & 0x7); - logerror("(serial set to transfer %01x bytes)\n", m_transfer_numbytes[0]+1); + LOG("(serial set to transfer %01x bytes)\n", m_transfer_numbytes[0]+1); } @@ -581,7 +583,7 @@ TIMER_CALLBACK_MEMBER(tlcs870_device::sio0_transmit_cb) if (m_transfer_shiftpos[0] == 0) { m_transfer_shiftreg[0] = m_dbr[m_transfer_pos[0]]; - logerror("transmitting byte %02x\n", m_transfer_shiftreg[0]); + LOG("transmitting byte %02x\n", m_transfer_shiftreg[0]); } int dataout = m_transfer_shiftreg[0] & 0x01; @@ -593,14 +595,14 @@ TIMER_CALLBACK_MEMBER(tlcs870_device::sio0_transmit_cb) if (m_transfer_shiftpos[0] == 8) { - logerror("transmitted\n"); + LOG("transmitted\n"); m_transfer_shiftpos[0] = 0; m_transfer_pos[0]++; if (m_transfer_pos[0] > m_transfer_numbytes[0]) { - logerror("end of transmission\n"); + LOG("end of transmission\n"); m_SIOCR1[0] &= ~0x80; // set interrupt latch m_IL |= 1 << (15 - TLCS870_IRQ_INTSIO1); @@ -618,30 +620,30 @@ WRITE8_MEMBER(tlcs870_device::sio2cr1_w) { m_SIOCR1[1] = data; - logerror("%s m_SIOCR1[1] (Serial IO Port 2 Control Register 1) bits set to\n", machine().describe_context()); - logerror("%d: SIOS2 (Start/Stop transfer)\n", (m_SIOCR1[1] & 0x80) ? 1 : 0); - logerror("%d: SIOINH2 (Abort/Continue transfer)\n", (m_SIOCR1[1] & 0x40) ? 1 : 0); - logerror("%d: SIOM2-2 (Serial Mode)\n", (m_SIOCR1[1] & 0x20) ? 1 : 0); - logerror("%d: SIOM2-1 (Serial Mode)\n", (m_SIOCR1[1] & 0x10) ? 1 : 0); - logerror("%d: SIOM2-0 (Serial Mode)\n", (m_SIOCR1[1] & 0x08) ? 1 : 0); - logerror("%d: SCK2-2 (Serial Clock)\n", (m_SIOCR1[1] & 0x04) ? 1 : 0); - logerror("%d: SCK2-1 (Serial Clock)\n", (m_SIOCR1[1] & 0x02) ? 1 : 0); - logerror("%d: SCK2-0 (Serial Clock)\n", (m_SIOCR1[1] & 0x01) ? 1 : 0); + LOG("%s m_SIOCR1[1] (Serial IO Port 2 Control Register 1) bits set to\n", machine().describe_context()); + LOG("%d: SIOS2 (Start/Stop transfer)\n", (m_SIOCR1[1] & 0x80) ? 1 : 0); + LOG("%d: SIOINH2 (Abort/Continue transfer)\n", (m_SIOCR1[1] & 0x40) ? 1 : 0); + LOG("%d: SIOM2-2 (Serial Mode)\n", (m_SIOCR1[1] & 0x20) ? 1 : 0); + LOG("%d: SIOM2-1 (Serial Mode)\n", (m_SIOCR1[1] & 0x10) ? 1 : 0); + LOG("%d: SIOM2-0 (Serial Mode)\n", (m_SIOCR1[1] & 0x08) ? 1 : 0); + LOG("%d: SCK2-2 (Serial Clock)\n", (m_SIOCR1[1] & 0x04) ? 1 : 0); + LOG("%d: SCK2-1 (Serial Clock)\n", (m_SIOCR1[1] & 0x02) ? 1 : 0); + LOG("%d: SCK2-0 (Serial Clock)\n", (m_SIOCR1[1] & 0x01) ? 1 : 0); } WRITE8_MEMBER(tlcs870_device::sio2cr2_w) { m_SIOCR2[1] = data; - logerror("%s m_SIOCR2[1] (Serial IO Port 2 Control Register 2) bits set to\n", machine().describe_context()); - logerror("%d: (invalid)\n", (m_SIOCR2[1] & 0x80) ? 1 : 0); - logerror("%d: (invalid)\n", (m_SIOCR2[1] & 0x40) ? 1 : 0); - logerror("%d: (invalid)\n", (m_SIOCR2[1] & 0x20) ? 1 : 0); - logerror("%d: WAIT2-1 (Wait Control\n", (m_SIOCR2[1] & 0x10) ? 1 : 0); - logerror("%d: WAIT2-0 (Wait Control)\n", (m_SIOCR2[1] & 0x08) ? 1 : 0); - logerror("%d: BUF2-2 (Number of Transfer Bytes)\n", (m_SIOCR2[1] & 0x04) ? 1 : 0); - logerror("%d: BUF2-1 (Number of Transfer Bytes)\n", (m_SIOCR2[1] & 0x02) ? 1 : 0); - logerror("%d: BUF2-0 (Number of Transfer Bytes)\n", (m_SIOCR2[1] & 0x01) ? 1 : 0); + LOG("%s m_SIOCR2[1] (Serial IO Port 2 Control Register 2) bits set to\n", machine().describe_context()); + LOG("%d: (invalid)\n", (m_SIOCR2[1] & 0x80) ? 1 : 0); + LOG("%d: (invalid)\n", (m_SIOCR2[1] & 0x40) ? 1 : 0); + LOG("%d: (invalid)\n", (m_SIOCR2[1] & 0x20) ? 1 : 0); + LOG("%d: WAIT2-1 (Wait Control\n", (m_SIOCR2[1] & 0x10) ? 1 : 0); + LOG("%d: WAIT2-0 (Wait Control)\n", (m_SIOCR2[1] & 0x08) ? 1 : 0); + LOG("%d: BUF2-2 (Number of Transfer Bytes)\n", (m_SIOCR2[1] & 0x04) ? 1 : 0); + LOG("%d: BUF2-1 (Number of Transfer Bytes)\n", (m_SIOCR2[1] & 0x02) ? 1 : 0); + LOG("%d: BUF2-0 (Number of Transfer Bytes)\n", (m_SIOCR2[1] & 0x01) ? 1 : 0); } TIMER_CALLBACK_MEMBER(tlcs870_device::sio1_transmit_cb) @@ -665,15 +667,15 @@ WRITE8_MEMBER(tlcs870_device::wdtcr1_w) { m_WDTCR1 = data; - logerror("%s m_WDTCR1 (Watchdog Timer Control 1) bits set to\n", machine().describe_context()); - logerror("%d: (invalid)\n", (m_WDTCR1 & 0x80) ? 1 : 0); - logerror("%d: (invalid)\n", (m_WDTCR1 & 0x40) ? 1 : 0); - logerror("%d: (invalid)\n", (m_WDTCR1 & 0x20) ? 1 : 0); - logerror("%d: (invalid)\n", (m_WDTCR1 & 0x10) ? 1 : 0); - logerror("%d: WDTEN (Watchdog Timer Enable, also req disable code to WDTCR2)\n", (m_WDTCR1 & 0x08) ? 1 : 0); - logerror("%d: WDTT-1 (Watchdog Timer Detection Time)\n", (m_WDTCR1 & 0x04) ? 1 : 0); - logerror("%d: WDTT-0 (Watchdog Timer Detection Time)\n", (m_WDTCR1 & 0x02) ? 1 : 0); - logerror("%d: WDTOUT (Watchdog Timer Output select, 0 = interrupt, 1 = reset out)\n",(m_WDTCR1 & 0x01) ? 1 : 0); + LOG("%s m_WDTCR1 (Watchdog Timer Control 1) bits set to\n", machine().describe_context()); + LOG("%d: (invalid)\n", (m_WDTCR1 & 0x80) ? 1 : 0); + LOG("%d: (invalid)\n", (m_WDTCR1 & 0x40) ? 1 : 0); + LOG("%d: (invalid)\n", (m_WDTCR1 & 0x20) ? 1 : 0); + LOG("%d: (invalid)\n", (m_WDTCR1 & 0x10) ? 1 : 0); + LOG("%d: WDTEN (Watchdog Timer Enable, also req disable code to WDTCR2)\n", (m_WDTCR1 & 0x08) ? 1 : 0); + LOG("%d: WDTT-1 (Watchdog Timer Detection Time)\n", (m_WDTCR1 & 0x04) ? 1 : 0); + LOG("%d: WDTT-0 (Watchdog Timer Detection Time)\n", (m_WDTCR1 & 0x02) ? 1 : 0); + LOG("%d: WDTOUT (Watchdog Timer Output select, 0 = interrupt, 1 = reset out)\n",(m_WDTCR1 & 0x01) ? 1 : 0); // WDTOUT cannot be set to 1 by software } @@ -689,7 +691,7 @@ WRITE8_MEMBER(tlcs870_device::wdtcr2_w) // disable code if (!(m_WDTCR1 & 0x08)) { - logerror("%s wdtcr2_w - Watchdog disabled\n", machine().describe_context()); + LOG("%s wdtcr2_w - Watchdog disabled\n", machine().describe_context()); } } } @@ -701,30 +703,30 @@ WRITE8_MEMBER(tlcs870_device::syscr1_w) { m_SYSCR1 = data; - logerror("%s m_SYSCR1 (System Control Register 1) bits set to\n", machine().describe_context()); - logerror("%d: STOP (STOP mode start)\n", (m_SYSCR1 & 0x80) ? 1 : 0); - logerror("%d: RELM (release method for STOP, 0 edge, 1 level)\n", (m_SYSCR1 & 0x40) ? 1 : 0); - logerror("%d: RETM (return mode after STOP, 0 normal, 1 slow)\n", (m_SYSCR1 & 0x20) ? 1 : 0); - logerror("%d: OUTEN (port output control during STOP)\n", (m_SYSCR1 & 0x10) ? 1 : 0); - logerror("%d: WUT-1 (warm up time at STOP release)\n", (m_SYSCR1 & 0x08) ? 1 : 0); - logerror("%d: WUT-0 (warm up time at STOP release)\n", (m_SYSCR1 & 0x04) ? 1 : 0); - logerror("%d: (invalid)\n", (m_SYSCR1 & 0x02) ? 1 : 0); - logerror("%d: (invalid)\n", (m_SYSCR1 & 0x01) ? 1 : 0); + LOG("%s m_SYSCR1 (System Control Register 1) bits set to\n", machine().describe_context()); + LOG("%d: STOP (STOP mode start)\n", (m_SYSCR1 & 0x80) ? 1 : 0); + LOG("%d: RELM (release method for STOP, 0 edge, 1 level)\n", (m_SYSCR1 & 0x40) ? 1 : 0); + LOG("%d: RETM (return mode after STOP, 0 normal, 1 slow)\n", (m_SYSCR1 & 0x20) ? 1 : 0); + LOG("%d: OUTEN (port output control during STOP)\n", (m_SYSCR1 & 0x10) ? 1 : 0); + LOG("%d: WUT-1 (warm up time at STOP release)\n", (m_SYSCR1 & 0x08) ? 1 : 0); + LOG("%d: WUT-0 (warm up time at STOP release)\n", (m_SYSCR1 & 0x04) ? 1 : 0); + LOG("%d: (invalid)\n", (m_SYSCR1 & 0x02) ? 1 : 0); + LOG("%d: (invalid)\n", (m_SYSCR1 & 0x01) ? 1 : 0); } WRITE8_MEMBER(tlcs870_device::syscr2_w) { m_SYSCR2 = data; - logerror("%s m_SYSCR2 (System Control Register 2) bits set to\n", machine().describe_context()); - logerror("%d: XEN (High Frequency Oscillator control)\n", (m_SYSCR2 & 0x80) ? 1 : 0); - logerror("%d: XTEN (Low Frequency Oscillator control)\n", (m_SYSCR2 & 0x40) ? 1 : 0); - logerror("%d: SYSCK (system clock select 0 high, 1 low)\n", (m_SYSCR2 & 0x20) ? 1 : 0); - logerror("%d: IDLE (IDLE mode start)\n", (m_SYSCR2 & 0x10) ? 1 : 0); // hng64 sets this in case of ram test failures - logerror("%d: (invalid)\n", (m_SYSCR2 & 0x08) ? 1 : 0); - logerror("%d: (invalid)\n", (m_SYSCR2 & 0x04) ? 1 : 0); - logerror("%d: (invalid)\n", (m_SYSCR2 & 0x02) ? 1 : 0); - logerror("%d: (invalid)\n", (m_SYSCR2 & 0x01) ? 1 : 0); + LOG("%s m_SYSCR2 (System Control Register 2) bits set to\n", machine().describe_context()); + LOG("%d: XEN (High Frequency Oscillator control)\n", (m_SYSCR2 & 0x80) ? 1 : 0); + LOG("%d: XTEN (Low Frequency Oscillator control)\n", (m_SYSCR2 & 0x40) ? 1 : 0); + LOG("%d: SYSCK (system clock select 0 high, 1 low)\n", (m_SYSCR2 & 0x20) ? 1 : 0); + LOG("%d: IDLE (IDLE mode start)\n", (m_SYSCR2 & 0x10) ? 1 : 0); // hng64 sets this in case of ram test failures + LOG("%d: (invalid)\n", (m_SYSCR2 & 0x08) ? 1 : 0); + LOG("%d: (invalid)\n", (m_SYSCR2 & 0x04) ? 1 : 0); + LOG("%d: (invalid)\n", (m_SYSCR2 & 0x02) ? 1 : 0); + LOG("%d: (invalid)\n", (m_SYSCR2 & 0x01) ? 1 : 0); } READ8_MEMBER(tlcs870_device::syscr1_r) @@ -803,15 +805,15 @@ WRITE8_MEMBER(tlcs870_device::eintcr_w) { m_EINTCR = data; - logerror("%s m_EINTCR (External Interrupt Control) bits set to\n", machine().describe_context()); - logerror("%d: INT1NC (Interrupt noise reject)\n", (m_EINTCR & 0x80) ? 1 : 0); - logerror("%d: INT0EN (Interrupt 0 enable)\n", (m_EINTCR & 0x40) ? 1 : 0); - logerror("%d: (invalid)\n", (m_EINTCR & 0x20) ? 1 : 0); - logerror("%d: INT4ES (edge select)\n", (m_EINTCR & 0x10) ? 1 : 0); - logerror("%d: INT3ES (edge select)\n", (m_EINTCR & 0x08) ? 1 : 0); - logerror("%d: INT2ES (edge select)\n", (m_EINTCR & 0x04) ? 1 : 0); - logerror("%d: INT1ES (edge select)\n", (m_EINTCR & 0x02) ? 1 : 0); - logerror("%d: (invalid)\n", (m_EINTCR & 0x01) ? 1 : 0); + LOG("%s m_EINTCR (External Interrupt Control) bits set to\n", machine().describe_context()); + LOG("%d: INT1NC (Interrupt noise reject)\n", (m_EINTCR & 0x80) ? 1 : 0); + LOG("%d: INT0EN (Interrupt 0 enable)\n", (m_EINTCR & 0x40) ? 1 : 0); + LOG("%d: (invalid)\n", (m_EINTCR & 0x20) ? 1 : 0); + LOG("%d: INT4ES (edge select)\n", (m_EINTCR & 0x10) ? 1 : 0); + LOG("%d: INT3ES (edge select)\n", (m_EINTCR & 0x08) ? 1 : 0); + LOG("%d: INT2ES (edge select)\n", (m_EINTCR & 0x04) ? 1 : 0); + LOG("%d: INT1ES (edge select)\n", (m_EINTCR & 0x02) ? 1 : 0); + LOG("%d: (invalid)\n", (m_EINTCR & 0x01) ? 1 : 0); /* For edge select register 0 = rising edge, 1 = falling edge @@ -834,30 +836,30 @@ WRITE8_MEMBER(tlcs870_device::eir_l_w) { m_EIR = (m_EIR & 0xff00) | data; - logerror("%s m_EIR(LSB) (Interrupt Enable) bits set to\n", machine().describe_context()); - logerror("%d: EF7 (External Interrupt 2)\n", (m_EIR & 0x0080) ? 1 : 0); - logerror("%d: EF6 (Time Base Timer Interrupt)\n", (m_EIR & 0x0040) ? 1 : 0); - logerror("%d: EF5 (External Interrupt 1)\n", (m_EIR & 0x0020) ? 1 : 0); - logerror("%d: EF4 (16-bit TC1 Interrupt)\n", (m_EIR & 0x0010) ? 1 : 0); - logerror("%d: (invalid)\n", (m_EIR & 0x0008) ? 1 : 0); // can't be External Int 0 (bit in different register is used) - logerror("%d: (invalid)\n", (m_EIR & 0x0004) ? 1 : 0); // can't be Watchdog interrupt (non-maskable) - logerror("%d: (invalid)\n", (m_EIR & 0x0002) ? 1 : 0); // can't be Software interrupt (non-maskable) - logerror("%d: IMF\n", (m_EIR & 0x0001) ? 1 : 0); // can't be Reset interrupt (non-maskable) + LOG("%s m_EIR(LSB) (Interrupt Enable) bits set to\n", machine().describe_context()); + LOG("%d: EF7 (External Interrupt 2)\n", (m_EIR & 0x0080) ? 1 : 0); + LOG("%d: EF6 (Time Base Timer Interrupt)\n", (m_EIR & 0x0040) ? 1 : 0); + LOG("%d: EF5 (External Interrupt 1)\n", (m_EIR & 0x0020) ? 1 : 0); + LOG("%d: EF4 (16-bit TC1 Interrupt)\n", (m_EIR & 0x0010) ? 1 : 0); + LOG("%d: (invalid)\n", (m_EIR & 0x0008) ? 1 : 0); // can't be External Int 0 (bit in different register is used) + LOG("%d: (invalid)\n", (m_EIR & 0x0004) ? 1 : 0); // can't be Watchdog interrupt (non-maskable) + LOG("%d: (invalid)\n", (m_EIR & 0x0002) ? 1 : 0); // can't be Software interrupt (non-maskable) + LOG("%d: IMF\n", (m_EIR & 0x0001) ? 1 : 0); // can't be Reset interrupt (non-maskable) } WRITE8_MEMBER(tlcs870_device::eir_h_w) { m_EIR = (m_EIR & 0x00ff) | (data << 8); - logerror("%s m_EIR(MSB) (Interrupt Enable) bits set to\n", machine().describe_context()); - logerror("%d: EF15 (External Interrupt 5)\n", (m_EIR & 0x8000) ? 1 : 0); - logerror("%d: EF14 (16-bit TC2 Interrupt)\n", (m_EIR & 0x4000) ? 1 : 0); - logerror("%d: EF13 (Serial Interface 2 Interrupt)\n", (m_EIR & 0x2000) ? 1 : 0); - logerror("%d: EF12 (External Interrupt 4)\n", (m_EIR & 0x1000) ? 1 : 0); - logerror("%d: EF11 (External Interrupt 3)\n", (m_EIR & 0x0800) ? 1 : 0); - logerror("%d: EF10 (8-bit TC4 Interrupt)\n", (m_EIR & 0x0400) ? 1 : 0); - logerror("%d: EF9 (Serial Interface 1 Interrupt)\n", (m_EIR & 0x0200) ? 1 : 0); - logerror("%d: EF8 (8-bit TC3 Interrupt)\n", (m_EIR & 0x0100) ? 1 : 0); + LOG("%s m_EIR(MSB) (Interrupt Enable) bits set to\n", machine().describe_context()); + LOG("%d: EF15 (External Interrupt 5)\n", (m_EIR & 0x8000) ? 1 : 0); + LOG("%d: EF14 (16-bit TC2 Interrupt)\n", (m_EIR & 0x4000) ? 1 : 0); + LOG("%d: EF13 (Serial Interface 2 Interrupt)\n", (m_EIR & 0x2000) ? 1 : 0); + LOG("%d: EF12 (External Interrupt 4)\n", (m_EIR & 0x1000) ? 1 : 0); + LOG("%d: EF11 (External Interrupt 3)\n", (m_EIR & 0x0800) ? 1 : 0); + LOG("%d: EF10 (8-bit TC4 Interrupt)\n", (m_EIR & 0x0400) ? 1 : 0); + LOG("%d: EF9 (Serial Interface 1 Interrupt)\n", (m_EIR & 0x0200) ? 1 : 0); + LOG("%d: EF8 (8-bit TC3 Interrupt)\n", (m_EIR & 0x0100) ? 1 : 0); } /* @@ -928,7 +930,7 @@ void tlcs870_device::execute_set_input(int inputnum, int state) void tlcs870_device::set_irq_line(int irqline, int state) { - //logerror("set_irq_line %d %d\n", irqline, state); + //LOG("set_irq_line %d %d\n", irqline, state); if (!(m_irqstate & (1 << irqline))) { @@ -982,7 +984,7 @@ void tlcs870_device::take_interrupt(int priority) { m_IL &= ~(1<<priority); m_EIR &= ~1; - logerror("taken interrupt %d\n", priority); + LOG("taken interrupt %d\n", priority); uint16_t vector = RM16(0xffe0 + ((15-priority)*2)); @@ -991,7 +993,7 @@ void tlcs870_device::take_interrupt(int priority) m_sp.d -= 3; m_pc.d = vector; - logerror("setting PC to %04x\n", m_pc.d); + LOG("setting PC to %04x\n", m_pc.d); } |