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author Olivier Galibert <galibert@pobox.com>2024-02-18 15:49:57 +0100
committer Olivier Galibert <galibert@pobox.com>2024-02-18 15:50:41 +0100
commit2785a4df9ec1cfd7cb0130952aef1aa8f71988e0 (patch)
tree319a7d46d80237bfb61ae887f086906aa960ffb8 /src/devices/cpu
parente7a098b486681faff361ab9f2958979c5fda471a (diff)
New machines marked as MACHINE_NOT_WORKING
------------------------------------------ Yamaha MU128 [Matt, O. Galibert]
Diffstat (limited to 'src/devices/cpu')
-rw-r--r--src/devices/cpu/h8/h8.h2
-rw-r--r--src/devices/cpu/sh/sh7042.cpp70
-rw-r--r--src/devices/cpu/sh/sh7042.h48
-rw-r--r--src/devices/cpu/sh/sh_adc.cpp59
-rw-r--r--src/devices/cpu/sh/sh_adc.h67
5 files changed, 104 insertions, 142 deletions
diff --git a/src/devices/cpu/h8/h8.h b/src/devices/cpu/h8/h8.h
index 2aaf18fa2d8..ab59c2c2e7c 100644
--- a/src/devices/cpu/h8/h8.h
+++ b/src/devices/cpu/h8/h8.h
@@ -42,7 +42,7 @@ public:
m_sci[sci].lookup()->do_set_external_clock_period(period);
}
- template<int Sci> void sci_rx_w(int state) { if(Sci == 2) logerror("sci2 rx %d\n", state); m_sci[Sci]->do_rx_w(state); }
+ template<int Sci> void sci_rx_w(int state) { m_sci[Sci]->do_rx_w(state); }
template<int Sci> void sci_clk_w(int state) { m_sci[Sci]->do_clk_w(state); }
void nvram_set_battery(int state) { m_nvram_battery = bool(state); } // default is 1 (nvram_enable_backup needs to be true)
diff --git a/src/devices/cpu/sh/sh7042.cpp b/src/devices/cpu/sh/sh7042.cpp
index 4c195e787a2..1ae31e7077c 100644
--- a/src/devices/cpu/sh/sh7042.cpp
+++ b/src/devices/cpu/sh/sh7042.cpp
@@ -6,12 +6,23 @@
#include "emu.h"
#include "sh7042.h"
-DEFINE_DEVICE_TYPE(SH7042, sh7042_device, "sh7042", "Hitachi SH-2 (SH7042)")
+DEFINE_DEVICE_TYPE(SH7042, sh7042_device, "sh7042", "Hitachi SH-2 (SH7042)")
+DEFINE_DEVICE_TYPE(SH7043, sh7043_device, "sh7043", "Hitachi SH-2 (SH7043)")
sh7042_device::sh7042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- sh2_device(mconfig, SH7042, tag, owner, clock, CPU_TYPE_SH2, address_map_constructor(FUNC(sh7042_device::map), this), 32, 0xffffffff),
- m_adc(*this, "adc"),
- m_read_adc(*this, 0)
+ sh7042_device(mconfig, SH7042, tag, owner, clock)
+{
+}
+
+sh7043_device::sh7043_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ sh7042_device(mconfig, SH7043, tag, owner, clock)
+{
+}
+
+sh7042_device::sh7042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+ sh2_device(mconfig, type, tag, owner, clock, CPU_TYPE_SH2, address_map_constructor(FUNC(sh7042_device::map), this), 32, 0xffffffff),
+ m_read_adc(*this, 0),
+ m_sci_tx(*this)
{
for(unsigned int i=0; i != m_read_adc.size(); i++)
m_read_adc[i].bind().set([this, i]() { return adc_default(i); });
@@ -26,23 +37,64 @@ u16 sh7042_device::adc_default(int adc)
void sh7042_device::device_start()
{
sh2_device::device_start();
+
+ save_item(NAME(m_addr));
+ save_item(NAME(m_adcsr));
+ save_item(NAME(m_adcr));
}
void sh7042_device::device_reset()
{
sh2_device::device_reset();
+
+ memset(m_addr, 0, sizeof(m_addr));
+ m_adcsr = m_adcr = 0;
}
void sh7042_device::map(address_map &map)
{
- map(0xffff83e0, 0xffff83e0).rw(m_adc, FUNC(sh_adc_device::adcsr_r), FUNC(sh_adc_device::adcsr_w));
- map(0xffff83e1, 0xffff83e1).rw(m_adc, FUNC(sh_adc_device::adcr_r), FUNC(sh_adc_device::adcr_w));
- map(0xffff83f0, 0xffff83ff).r(m_adc, FUNC(sh_adc_device::addr_r));
+ map(0xffff83e0, 0xffff83e0).rw(FUNC(sh7042_device::adcsr_r), FUNC(sh7042_device::adcsr_w));
+ map(0xffff83e1, 0xffff83e1).rw(FUNC(sh7042_device::adcr_r), FUNC(sh7042_device::adcr_w));
+ map(0xffff83f0, 0xffff83ff).r(FUNC(sh7042_device::addr_r));
map(0xfffff000, 0xffffffff).ram();
}
-void sh7042_device::device_add_mconfig(machine_config &config)
+
+// ADC section
+
+u16 sh7042_device::addr_r(offs_t offset)
+{
+ logerror("addr16_r %d %03x\n", offset, m_addr[offset]);
+ return m_addr[offset];
+}
+
+u8 sh7042_device::adcsr_r()
+{
+ logerror("adcsr_r %02x\n", m_adcsr);
+ return m_adcsr;
+}
+
+u8 sh7042_device::adcr_r()
+{
+ logerror("adcr_r %02x\n", m_adcr);
+ return m_adcr;
+}
+
+void sh7042_device::adcsr_w(u8 data)
+{
+ logerror("adcsr_w %02x\n", data);
+ // u8 prev = m_adcsr;
+ m_adcsr = (data & 0x7f) | (m_adcsr & data & CSR_ADF);
+}
+
+void sh7042_device::adcr_w(u8 data)
+{
+ logerror("adcr_w %02x\n", data);
+ m_adcr = data;
+}
+
+void sh7042_device::do_sci_w(int sci, int state)
{
- SH_ADC(config, m_adc, *this);
+ logerror("sci %d %d\n", sci, state);
}
diff --git a/src/devices/cpu/sh/sh7042.h b/src/devices/cpu/sh/sh7042.h
index 7cf319f3ce4..9c73063d4a6 100644
--- a/src/devices/cpu/sh/sh7042.h
+++ b/src/devices/cpu/sh/sh7042.h
@@ -9,7 +9,6 @@
#pragma once
#include "sh2.h"
-#include "sh_adc.h"
class sh7042_device : public sh2_device
{
@@ -17,24 +16,61 @@ public:
sh7042_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template<int Port> auto read_adc() { return m_read_adc[Port].bind(); }
+ template<int Sci> void sci_rx_w(int state) { do_sci_w(Sci, state); }
+ template<int Sci> auto write_sci_tx() { return m_sci_tx[Sci].bind(); }
- u16 do_read_adc(int port) { return m_read_adc[port](); }
protected:
+ enum {
+ CSR_ADF = 0x80,
+ CSR_ADIE = 0x40,
+ CSR_ADST = 0x20,
+ CSR_CKS = 0x10,
+ CSR_GRP = 0x08,
+ CSR_CHAN = 0x07
+ };
+
+ enum {
+ CR_PWR = 0x40,
+ CR_TRGS = 0x30,
+ CR_SCAN = 0x08,
+ CR_SIM = 0x04,
+ CR_BUF = 0x03
+ };
+
+ sh7042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
+
virtual void device_start() override;
virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
private:
- required_device<sh_adc_device> m_adc;
-
devcb_read16::array<8> m_read_adc;
+ devcb_write_line::array<2> m_sci_tx;
+
+ void map(address_map &map);
+
+ // ADC section
+ uint16_t m_addr[8];
+ uint8_t m_adcsr, m_adcr;
u16 adc_default(int adc);
+ u16 addr_r(offs_t offset);
+ u8 adcsr_r();
+ u8 adcr_r();
+ void adcsr_w(u8 data);
+ void adcr_w(u8 data);
+
+ void do_sci_w(int sci, int state);
+};
- void map(address_map &map);
+class sh7043_device : public sh7042_device
+{
+public:
+ sh7043_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
+
DECLARE_DEVICE_TYPE(SH7042, sh7042_device)
+DECLARE_DEVICE_TYPE(SH7043, sh7043_device)
#endif // MAME_CPU_SH_SH7042_H
diff --git a/src/devices/cpu/sh/sh_adc.cpp b/src/devices/cpu/sh/sh_adc.cpp
deleted file mode 100644
index 40f9546dc15..00000000000
--- a/src/devices/cpu/sh/sh_adc.cpp
+++ /dev/null
@@ -1,59 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Olivier Galibert
-
-#include "emu.h"
-#include "sh_adc.h"
-#include "sh7042.h"
-
-DEFINE_DEVICE_TYPE(SH_ADC, sh_adc_device, "sh_adc", "SH7042 ADC")
-
-sh_adc_device::sh_adc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- device_t(mconfig, SH_ADC, tag, owner, clock),
- m_cpu(*this, finder_base::DUMMY_TAG),
- m_adcsr(0), m_adcr(0)
-{
-}
-
-u16 sh_adc_device::addr_r(offs_t offset)
-{
- logerror("addr16_r %d %03x\n", offset, m_addr[offset]);
- return m_addr[offset];
-}
-
-u8 sh_adc_device::adcsr_r()
-{
- logerror("adcsr_r %02x\n", m_adcsr);
- return m_adcsr;
-}
-
-u8 sh_adc_device::adcr_r()
-{
- logerror("adcr_r %02x\n", m_adcr);
- return m_adcr;
-}
-
-void sh_adc_device::adcsr_w(u8 data)
-{
- logerror("adcsr_w %02x\n", data);
- // u8 prev = m_adcsr;
- m_adcsr = (data & 0x7f) | (m_adcsr & data & CSR_ADF);
-}
-
-void sh_adc_device::adcr_w(u8 data)
-{
- logerror("adcr_w %02x\n", data);
- m_adcr = data;
-}
-
-void sh_adc_device::device_start()
-{
- save_item(NAME(m_addr));
- save_item(NAME(m_adcsr));
- save_item(NAME(m_adcr));
-}
-
-void sh_adc_device::device_reset()
-{
- memset(m_addr, 0, sizeof(m_addr));
- m_adcsr = m_adcr = 0;
-}
diff --git a/src/devices/cpu/sh/sh_adc.h b/src/devices/cpu/sh/sh_adc.h
deleted file mode 100644
index 4b8c371c31d..00000000000
--- a/src/devices/cpu/sh/sh_adc.h
+++ /dev/null
@@ -1,67 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Olivier Galibert
-/***************************************************************************
-
- sh_adc.h
-
- SH Analog to Digital Converter subsystem
-
-***************************************************************************/
-
-#ifndef MAME_CPU_SH_SH_ADC_H
-#define MAME_CPU_SH_SH_ADC_H
-
-#pragma once
-
-// To generalize eventually
-class sh7042_device;
-
-class sh_adc_device : public device_t {
-public:
- sh_adc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
-
- template <typename T> sh_adc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu)
- : sh_adc_device(mconfig, tag, owner)
- {
- set_info(cpu);
- }
-
- template<typename T> void set_info(T &&cpu) { m_cpu.set_tag(std::forward<T>(cpu)); }
-
- u16 addr_r(offs_t offset);
- u8 adcsr_r();
- u8 adcr_r();
- void adcsr_w(u8 data);
- void adcr_w(u8 data);
-
-protected:
- enum {
- CSR_ADF = 0x80,
- CSR_ADIE = 0x40,
- CSR_ADST = 0x20,
- CSR_CKS = 0x10,
- CSR_GRP = 0x08,
- CSR_CHAN = 0x07
- };
-
- enum {
- CR_PWR = 0x40,
- CR_TRGS = 0x30,
- CR_SCAN = 0x08,
- CR_SIM = 0x04,
- CR_BUF = 0x03
- };
-
- required_device<sh7042_device> m_cpu;
-
- uint16_t m_addr[8];
- uint8_t m_adcsr, m_adcr;
-
-
- virtual void device_start() override;
- virtual void device_reset() override;
-};
-
-DECLARE_DEVICE_TYPE(SH_ADC, sh_adc_device)
-
-#endif