diff options
author | 2020-01-01 12:29:16 -0500 | |
---|---|---|
committer | 2020-01-01 12:30:57 -0500 | |
commit | e3da013733c63667a805bc85006b96a5e6ebdcff (patch) | |
tree | 5a3d05c0a89e0fd27cd68b8b67ed7b6f6e7912c7 /src/devices/cpu/pace/pace.cpp | |
parent | 2240929c28b8ce6a4758b1da368fbcf470de543d (diff) |
pace, we32100: Notes (nw)
t11: Fix empty disassembler output for some invalid opcodes (nw)
Diffstat (limited to 'src/devices/cpu/pace/pace.cpp')
-rw-r--r-- | src/devices/cpu/pace/pace.cpp | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/devices/cpu/pace/pace.cpp b/src/devices/cpu/pace/pace.cpp index bc0e6f5b62a..03b36312930 100644 --- a/src/devices/cpu/pace/pace.cpp +++ b/src/devices/cpu/pace/pace.cpp @@ -6,10 +6,12 @@ The IPC-16A PACE (Processing and Control Element) was one of the first commercially available 16-bit microprocessors. It was a successor to - the multiple-chip IMP-16 processor and implemented a similar four- - accumulator architecture in a single PMOS LSI package using internal - microcode. PACE requires two clock inputs with non-overlapping low - phases and frequencies between 1.25 and 1.538 MHz. + the multiple-chip IMP-16 processor (itself loosely based on the Data + General Nova) and implemented a similar four-accumulator architecture + in a single PMOS LSI package using internal microcode. The two clock + inputs with non-overlapping low phases required by PACE may be + generated by the DP8302 STE (System Timing Element), which divides its + oscillator input by 2. The standard machine cycle takes 4 clock periods (and the shortest instructions take 4 cycles each), though cycles can be stretched by |