diff options
author | 2015-12-26 13:54:32 +0100 | |
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committer | 2015-12-26 13:54:32 +0100 | |
commit | 9f998d0afb69f4286f05e46efe27806b6aba32af (patch) | |
tree | 7a126081d7eb971c4cc9f8fa8952ad04a30ab231 /src/devices/cpu/arm7 | |
parent | a546ea128238feaa616451ed7b7f4fe389dd1460 (diff) |
cleanup (nw)
Diffstat (limited to 'src/devices/cpu/arm7')
-rw-r--r-- | src/devices/cpu/arm7/arm7ops.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/devices/cpu/arm7/arm7ops.cpp b/src/devices/cpu/arm7/arm7ops.cpp index ef0ae06cf63..9c1f0197764 100644 --- a/src/devices/cpu/arm7/arm7ops.cpp +++ b/src/devices/cpu/arm7/arm7ops.cpp @@ -822,7 +822,7 @@ void arm7_cpu_device::HandleSwap(UINT32 insn) void arm7_cpu_device::HandlePSRTransfer(UINT32 insn) { int reg = (insn & 0x400000) ? SPSR : eCPSR; // Either CPSR or SPSR - UINT32 newval, val = 0; + UINT32 newval, val; int oldmode = GET_CPSR & MODE_FLAG; // get old value of CPSR/SPSR @@ -1195,7 +1195,7 @@ void arm7_cpu_device::HandleSMulLong(UINT32 insn) { INT32 rm, rs; UINT32 rhi, rlo; - INT64 res = 0; + INT64 res; // MULL takes 1S + (m+1)I and MLAL 1S + (m+2)I cycles to execute, where m is the // number of 8 bit multiplier array cycles required to complete the multiply, which is @@ -1247,7 +1247,7 @@ void arm7_cpu_device::HandleUMulLong(UINT32 insn) { UINT32 rm, rs; UINT32 rhi, rlo; - UINT64 res = 0; + UINT64 res; // MULL takes 1S + (m+1)I and MLAL 1S + (m+2)I cycles to execute, where m is the // number of 8 bit multiplier array cycles required to complete the multiply, which is |