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author AJR <ajrhacker@users.noreply.github.com>2020-03-12 22:05:32 -0400
committer AJR <ajrhacker@users.noreply.github.com>2020-03-12 22:14:14 -0400
commite10fc0f95d661a7dc1933d24961632315230f919 (patch)
tree362e712453a3ef6751afeb38d6d3864596fa77ed
parent703e40e5936d0ef979d93bc7000b1b8899419429 (diff)
m6801: Attempt at cleaning up internal registers (nw)
- Split "HD6301" and "HD63701" devices into several different types (functionally identical now, but won't be compatible once accuracy improves) - Split the all-in-one m6801_io_r and m6801_io_w handlers into separate handlers for each register; use m() instead of rw() to map these for now - Make all port direction registers write-only - Delete the "unused" NOP mapping from $0020 to $007F in the MC6803 internal map (datasheets make clear that external accesses can be made here) mc10.cpp: Remove a bizarre and seemingly useless DDR hack for an unused port (nw) psion.cpp: Correct CPU types and clocks
-rw-r--r--src/devices/bus/adamnet/ddp.cpp2
-rw-r--r--src/devices/bus/adamnet/fdc.cpp2
-rw-r--r--src/devices/bus/adamnet/kb.cpp2
-rw-r--r--src/devices/bus/adamnet/printer.cpp2
-rw-r--r--src/devices/bus/adamnet/spi.cpp2
-rw-r--r--src/devices/cpu/m6800/m6801.cpp788
-rw-r--r--src/devices/cpu/m6800/m6801.h138
-rw-r--r--src/devices/machine/mpu401.cpp38
-rw-r--r--src/devices/machine/mpu401.h2
-rw-r--r--src/mame/drivers/adam.cpp2
-rw-r--r--src/mame/drivers/apricotp.cpp2
-rw-r--r--src/mame/drivers/atarist.cpp4
-rw-r--r--src/mame/drivers/baraduke.cpp4
-rw-r--r--src/mame/drivers/canon_s80.cpp2
-rw-r--r--src/mame/drivers/ddragon.cpp2
-rw-r--r--src/mame/drivers/hx20.cpp8
-rw-r--r--src/mame/drivers/korgdss1.cpp2
-rw-r--r--src/mame/drivers/mc10.cpp4
-rw-r--r--src/mame/drivers/namcos1.cpp4
-rw-r--r--src/mame/drivers/namcos86.cpp4
-rw-r--r--src/mame/drivers/novag_supremo.cpp2
-rw-r--r--src/mame/drivers/pacland.cpp4
-rw-r--r--src/mame/drivers/psion.cpp161
-rw-r--r--src/mame/drivers/rvoice.cpp2
-rw-r--r--src/mame/drivers/skykid.cpp4
-rw-r--r--src/mame/drivers/tceptor.cpp4
-rw-r--r--src/mame/includes/baraduke.h2
-rw-r--r--src/mame/includes/hx20.h4
-rw-r--r--src/mame/includes/namcos1.h2
-rw-r--r--src/mame/includes/namcos86.h2
-rw-r--r--src/mame/includes/pacland.h2
-rw-r--r--src/mame/includes/psion.h15
-rw-r--r--src/mame/includes/skykid.h2
-rw-r--r--src/mame/machine/eispc_kb.cpp2
34 files changed, 654 insertions, 568 deletions
diff --git a/src/devices/bus/adamnet/ddp.cpp b/src/devices/bus/adamnet/ddp.cpp
index ede3719c910..cc4c62ccd5b 100644
--- a/src/devices/bus/adamnet/ddp.cpp
+++ b/src/devices/bus/adamnet/ddp.cpp
@@ -52,7 +52,7 @@ const tiny_rom_entry *adam_digital_data_pack_device::device_rom_region() const
void adam_digital_data_pack_device::adam_ddp_mem(address_map &map)
{
- map(0x0000, 0x001f).rw(M6801_TAG, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0x0400, 0x07ff).ram();
map(0xf800, 0xffff).rom().region(M6801_TAG, 0);
diff --git a/src/devices/bus/adamnet/fdc.cpp b/src/devices/bus/adamnet/fdc.cpp
index e1c94c705a5..cd576e546be 100644
--- a/src/devices/bus/adamnet/fdc.cpp
+++ b/src/devices/bus/adamnet/fdc.cpp
@@ -79,7 +79,7 @@ const tiny_rom_entry *adam_fdc_device::device_rom_region() const
void adam_fdc_device::adam_fdc_mem(address_map &map)
{
- map(0x0000, 0x001f).rw(M6801_TAG, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0x0400, 0x07ff).ram().writeonly().share("ram");
map(0x0800, 0x0800).mirror(0x3ff).r(WD2793_TAG, FUNC(wd2793_device::status_r));
diff --git a/src/devices/bus/adamnet/kb.cpp b/src/devices/bus/adamnet/kb.cpp
index ea17493f5a9..37ed72669e1 100644
--- a/src/devices/bus/adamnet/kb.cpp
+++ b/src/devices/bus/adamnet/kb.cpp
@@ -52,7 +52,7 @@ const tiny_rom_entry *adam_keyboard_device::device_rom_region() const
void adam_keyboard_device::adam_kb_mem(address_map &map)
{
- map(0x0000, 0x001f).rw(M6801_TAG, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf800, 0xffff).rom().region(M6801_TAG, 0);
}
diff --git a/src/devices/bus/adamnet/printer.cpp b/src/devices/bus/adamnet/printer.cpp
index 637ce3a86e6..dcadb1a5a58 100644
--- a/src/devices/bus/adamnet/printer.cpp
+++ b/src/devices/bus/adamnet/printer.cpp
@@ -52,7 +52,7 @@ const tiny_rom_entry *adam_printer_device::device_rom_region() const
void adam_printer_device::adam_prn_mem(address_map &map)
{
- map(0x0000, 0x001f).rw(M6801_TAG, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf800, 0xffff).rom().region(M6801_TAG, 0);
}
diff --git a/src/devices/bus/adamnet/spi.cpp b/src/devices/bus/adamnet/spi.cpp
index 7b9f8e6ce00..e5aafceafa1 100644
--- a/src/devices/bus/adamnet/spi.cpp
+++ b/src/devices/bus/adamnet/spi.cpp
@@ -44,7 +44,7 @@ const tiny_rom_entry *adam_spi_device::device_rom_region() const
void adam_spi_device::adam_spi_mem(address_map &map)
{
- map(0x0000, 0x001f).rw(m_maincpu, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m(m_maincpu, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf800, 0xffff).rom().region("m6801", 0);
}
diff --git a/src/devices/cpu/m6800/m6801.cpp b/src/devices/cpu/m6800/m6801.cpp
index e92fbfe343c..df8cb5de6bf 100644
--- a/src/devices/cpu/m6800/m6801.cpp
+++ b/src/devices/cpu/m6800/m6801.cpp
@@ -11,6 +11,7 @@
#define LOG_RXTICK (1U << 4)
#define LOG_PORT (1U << 5)
#define LOG_SER (1U << 6)
+#define LOG_TIMER (1U << 7)
//#define VERBOSE (LOG_SER)
//#define LOG_OUTPUT_STREAM std::cout
@@ -23,6 +24,7 @@
#define LOGRXTICK(...) LOGMASKED(LOG_RXTICK, __VA_ARGS__)
#define LOGPORT(...) LOGMASKED(LOG_PORT, __VA_ARGS__)
#define LOGSER(...) LOGMASKED(LOG_SER, __VA_ARGS__)
+#define LOGTIMER(...) LOGMASKED(LOG_TIMER, __VA_ARGS__)
#define CT m_counter.w.l
@@ -48,44 +50,6 @@
SET_TIMER_EVENT; \
}
-// I/O registers
-
-enum
-{
- IO_P1DDR = 0,
- IO_P2DDR,
- IO_P1DATA,
- IO_P2DATA,
- IO_P3DDR,
- IO_P4DDR,
- IO_P3DATA,
- IO_P4DATA,
- IO_TCSR,
- IO_CH,
- IO_CL,
- IO_OCRH,
- IO_OCRL,
- IO_ICRH,
- IO_ICRL,
- IO_P3CSR,
- IO_RMCR,
- IO_TRCSR,
- IO_RDR,
- IO_TDR,
- IO_RCR,
- IO_CAAH,
- IO_CAAL,
- IO_TCR1,
- IO_TCR2,
- IO_TSR,
- IO_OCR2H,
- IO_OCR2L,
- IO_OCR3H,
- IO_OCR3L,
- IO_ICR2H,
- IO_ICR2L
-};
-
// serial I/O
#define M6801_RMCR_SS_MASK 0x03 // Speed Select
@@ -257,10 +221,34 @@ const m6800_cpu_device::op_func m6801_cpu_device::hd63701_insn[0x100] = {
};
+void m6801_cpu_device::m6801_io(address_map &map)
+{
+ map(0x0000, 0x0000).rw(FUNC(m6801_cpu_device::ff_r), FUNC(m6801_cpu_device::p1_ddr_w));
+ map(0x0001, 0x0001).rw(FUNC(m6801_cpu_device::ff_r), FUNC(m6801_cpu_device::p2_ddr_w));
+ map(0x0002, 0x0002).rw(FUNC(m6801_cpu_device::p1_data_r), FUNC(m6801_cpu_device::p1_data_w));
+ map(0x0003, 0x0003).rw(FUNC(m6801_cpu_device::p2_data_r), FUNC(m6801_cpu_device::p2_data_w));
+ map(0x0004, 0x0004).rw(FUNC(m6801_cpu_device::ff_r), FUNC(m6801_cpu_device::p3_ddr_w)); // TODO: external in 6801 modes 0–3 & 6
+ map(0x0005, 0x0005).rw(FUNC(m6801_cpu_device::ff_r), FUNC(m6801_cpu_device::p4_ddr_w)); // TODO: external in 6801 modes 0–3
+ map(0x0006, 0x0006).rw(FUNC(m6801_cpu_device::p3_data_r), FUNC(m6801_cpu_device::p3_data_w));
+ map(0x0007, 0x0007).rw(FUNC(m6801_cpu_device::p4_data_r), FUNC(m6801_cpu_device::p4_data_w));
+ map(0x0008, 0x0008).rw(FUNC(m6801_cpu_device::tcsr_r), FUNC(m6801_cpu_device::tcsr_w));
+ map(0x0009, 0x0009).rw(FUNC(m6801_cpu_device::ch_r), FUNC(m6801_cpu_device::ch_w));
+ map(0x000a, 0x000a).rw(FUNC(m6801_cpu_device::cl_r), FUNC(m6801_cpu_device::cl_w));
+ map(0x000b, 0x000b).rw(FUNC(m6801_cpu_device::ocrh_r), FUNC(m6801_cpu_device::ocrh_w));
+ map(0x000c, 0x000c).rw(FUNC(m6801_cpu_device::ocrl_r), FUNC(m6801_cpu_device::ocrl_w));
+ map(0x000d, 0x000d).r(FUNC(m6801_cpu_device::icrh_r));
+ map(0x000e, 0x000e).r(FUNC(m6801_cpu_device::icrl_r));
+ map(0x000f, 0x000f).rw(FUNC(m6801_cpu_device::p3_csr_r), FUNC(m6801_cpu_device::p3_csr_w)); // TODO: external in 6801 modes 0–3, 5 & 6
+ map(0x0010, 0x0010).rw(FUNC(m6801_cpu_device::sci_rmcr_r), FUNC(m6801_cpu_device::sci_rmcr_w));
+ map(0x0011, 0x0011).rw(FUNC(m6801_cpu_device::sci_trcsr_r), FUNC(m6801_cpu_device::sci_trcsr_w));
+ map(0x0012, 0x0012).r(FUNC(m6801_cpu_device::sci_rdr_r));
+ map(0x0013, 0x0013).w(FUNC(m6801_cpu_device::sci_tdr_w));
+ map(0x0014, 0x0014).rw(FUNC(m6801_cpu_device::rcr_r), FUNC(m6801_cpu_device::rcr_w));
+}
+
void m6801_cpu_device::m6803_mem(address_map &map)
{
- map(0x0000, 0x001f).rw(FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
- map(0x0020, 0x007f).noprw(); /* unused */
+ m6801_io(map);
map(0x0080, 0x00ff).ram(); /* 6803 internal RAM */
}
@@ -268,8 +256,12 @@ void m6801_cpu_device::m6803_mem(address_map &map)
DEFINE_DEVICE_TYPE(M6801, m6801_cpu_device, "m6801", "Motorola MC6801")
DEFINE_DEVICE_TYPE(M6803, m6803_cpu_device, "m6803", "Motorola MC6803")
DEFINE_DEVICE_TYPE(M6803E, m6803e_cpu_device, "m6803e", "Motorola MC6803E")
-DEFINE_DEVICE_TYPE(HD6301, hd6301_cpu_device, "hd6301", "Hitachi HD6301")
-DEFINE_DEVICE_TYPE(HD63701, hd63701_cpu_device, "hd63701", "Hitachi HD63701")
+DEFINE_DEVICE_TYPE(HD6301V1, hd6301v1_cpu_device, "hd6301v1", "Hitachi HD6301V1")
+DEFINE_DEVICE_TYPE(HD6301X0, hd6301x0_cpu_device, "hd6301x0", "Hitachi HD6301X0")
+DEFINE_DEVICE_TYPE(HD6301Y0, hd6301y0_cpu_device, "hd6301y0", "Hitachi HD6301Y0")
+DEFINE_DEVICE_TYPE(HD63701V0, hd63701v0_cpu_device, "hd63701v0", "Hitachi HD63701V0")
+DEFINE_DEVICE_TYPE(HD63701X0, hd63701x0_cpu_device, "hd63701x0", "Hitachi HD63701X0")
+DEFINE_DEVICE_TYPE(HD63701Y0, hd63701y0_cpu_device, "hd63701y0", "Hitachi HD63701Y0")
DEFINE_DEVICE_TYPE(HD6303R, hd6303r_cpu_device, "hd6303r", "Hitachi HD6303R")
DEFINE_DEVICE_TYPE(HD6303X, hd6303x_cpu_device, "hd6303x", "Hitachi HD6303X")
DEFINE_DEVICE_TYPE(HD6303Y, hd6303y_cpu_device, "hd6303y", "Hitachi HD6303Y")
@@ -298,18 +290,18 @@ m6803e_cpu_device::m6803e_cpu_device(const machine_config &mconfig, const char *
{
}
-hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hd6301_cpu_device(mconfig, HD6301, tag, owner, clock)
+hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+ : m6801_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701)
{
}
-hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
- : m6801_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701)
+hd6301v1_cpu_device::hd6301v1_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : hd6301_cpu_device(mconfig, HD6301V1, tag, owner, clock)
{
}
-hd63701_cpu_device::hd63701_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : m6801_cpu_device(mconfig, HD63701, tag, owner, clock, hd63701_insn, cycles_63701)
+hd63701v0_cpu_device::hd63701v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : hd6301_cpu_device(mconfig, HD63701V0, tag, owner, clock)
{
}
@@ -318,13 +310,38 @@ hd6303r_cpu_device::hd6303r_cpu_device(const machine_config &mconfig, const char
{
}
+hd6301x_cpu_device::hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+ : hd6301_cpu_device(mconfig, type, tag, owner, clock)
+{
+}
+
+hd6301x0_cpu_device::hd6301x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : hd6301x_cpu_device(mconfig, HD6301X0, tag, owner, clock)
+{
+}
+
+hd63701x0_cpu_device::hd63701x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : hd6301x_cpu_device(mconfig, HD63701X0, tag, owner, clock)
+{
+}
+
hd6303x_cpu_device::hd6303x_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hd6301_cpu_device(mconfig, HD6303X, tag, owner, clock)
+ : hd6301x_cpu_device(mconfig, HD6303X, tag, owner, clock)
+{
+}
+
+hd6301y0_cpu_device::hd6301y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : hd6301x_cpu_device(mconfig, HD6301Y0, tag, owner, clock)
+{
+}
+
+hd63701y0_cpu_device::hd63701y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : hd6301x_cpu_device(mconfig, HD63701Y0, tag, owner, clock)
{
}
hd6303y_cpu_device::hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hd6301_cpu_device(mconfig, HD6303Y, tag, owner, clock)
+ : hd6301x_cpu_device(mconfig, HD6303Y, tag, owner, clock)
{
}
@@ -428,13 +445,13 @@ void m6801_cpu_device::set_rmcr(uint8_t data)
switch ((m_rmcr & M6801_RMCR_CC_MASK) >> 2)
{
case 0:
- LOGSER("6801: Using external serial clock: false\n");
+ LOGSER("SCI: Using external serial clock: false\n");
m_sci_timer->enable(false);
m_use_ext_serclock = false;
break;
case 3: // external clock
- LOGSER("6801: Using external serial clock: true\n");
+ LOGSER("SCI: Using external serial clock: true\n");
m_use_ext_serclock = true;
m_sci_timer->enable(false);
break;
@@ -444,7 +461,7 @@ void m6801_cpu_device::set_rmcr(uint8_t data)
{
int divisor = M6801_RMCR_SS[m_rmcr & M6801_RMCR_SS_MASK];
attotime period = cycles_to_attotime(divisor);
- LOGSER("6801: Setting serial rate, Divisor: %d Hz: %d\n", divisor, period.as_hz());
+ LOGSER("SCI: Setting serial rate, Divisor: %d Hz: %d\n", divisor, period.as_hz());
m_sci_timer->adjust(period, 0, period);
m_use_ext_serclock = false;
}
@@ -459,7 +476,7 @@ int m6801_cpu_device::m6800_rx()
void m6801_cpu_device::serial_transmit()
{
- LOGTXTICK("6801 Tx Tick presenting: %d\n", m_tx);
+ LOGTXTICK("SCI Tx Tick presenting: %d\n", m_tx);
if (m_trcsr & M6801_TRCSR_TE)
{
@@ -505,7 +522,7 @@ void m6801_cpu_device::serial_transmit()
m_txbits++;
- LOGTX("6801 Transmit START Data %02x\n", m_tsr);
+ LOGTX("SCI Transmit START Data %02x\n", m_tsr);
}
break;
@@ -517,7 +534,7 @@ void m6801_cpu_device::serial_transmit()
m_txbits = M6801_SERIAL_START;
- LOGTX("6801 Transmit STOP\n");
+ LOGTX("SCI Transmit STOP\n");
break;
default:
@@ -527,7 +544,7 @@ void m6801_cpu_device::serial_transmit()
// shift transmit register
m_tsr >>= 1;
- LOGTX("6801 Tx Present Bit %u: %u\n", m_txbits, m_tx);
+ LOGTX("SCI Tx Present Bit %u: %u\n", m_txbits, m_tx);
m_txbits++;
break;
@@ -546,7 +563,7 @@ void m6801_cpu_device::serial_transmit()
void m6801_cpu_device::serial_receive()
{
- LOGRXTICK("6801 Rx Tick TRCSR %02x bits %u check %02x\n", m_trcsr, m_rxbits, m_trcsr & M6801_TRCSR_RE);
+ LOGRXTICK("SCI Rx Tick TRCSR %02x bits %u check %02x\n", m_trcsr, m_rxbits, m_trcsr & M6801_TRCSR_RE);
if (m_trcsr & M6801_TRCSR_RE)
{
@@ -557,11 +574,11 @@ void m6801_cpu_device::serial_receive()
{
m_rxbits++;
- LOGRX("6801 Received WAKE UP bit %u\n", m_rxbits);
+ LOGRX("SCI Received WAKE UP bit %u\n", m_rxbits);
if (m_rxbits == 10)
{
- LOGRX("6801 Receiver Wake Up\n");
+ LOGRX("SCI Receiver Wake Up\n");
m_trcsr &= ~M6801_TRCSR_WU;
m_rxbits = M6801_SERIAL_START;
@@ -569,7 +586,7 @@ void m6801_cpu_device::serial_receive()
}
else
{
- LOGRX("6801 Receiver Wake Up interrupted\n");
+ LOGRX("SCI Receiver Wake Up interrupted\n");
m_rxbits = M6801_SERIAL_START;
}
@@ -585,21 +602,21 @@ void m6801_cpu_device::serial_receive()
// start bit found
m_rxbits++;
- LOGRX("6801 Received START bit\n");
+ LOGRX("SCI Received START bit\n");
}
break;
case M6801_SERIAL_STOP:
if (m6800_rx() == 1)
{
- LOGRX("6801 Received STOP bit\n");
+ LOGRX("SCI Received STOP bit\n");
if (m_trcsr & M6801_TRCSR_RDRF)
{
// overrun error
m_trcsr |= M6801_TRCSR_ORFE;
- LOGRX("6801 Receive Overrun Error\n");
+ LOGRX("SCI Receive Overrun Error\n");
CHECK_IRQ_LINES();
}
@@ -610,7 +627,7 @@ void m6801_cpu_device::serial_receive()
// transfer data into receive register
m_rdr = m_rsr;
- LOGRX("6801 Receive Data Register: %02x\n", m_rdr);
+ LOGRX("SCI Receive Data Register: %02x\n", m_rdr);
// set RDRF flag
m_trcsr |= M6801_TRCSR_RDRF;
@@ -631,7 +648,7 @@ void m6801_cpu_device::serial_receive()
m_trcsr |= M6801_TRCSR_ORFE;
m_trcsr &= ~M6801_TRCSR_RDRF;
- LOGRX("6801 Receive Framing Error\n");
+ LOGRX("SCI Receive Framing Error\n");
CHECK_IRQ_LINES();
}
@@ -646,7 +663,7 @@ void m6801_cpu_device::serial_receive()
// receive bit into register
m_rsr |= (m6800_rx() << 7);
- LOGRX("6801 RX sampled DATA bit %u: %u\n", m_rxbits, BIT(m_rsr, 7));
+ LOGRX("SCI RX sampled DATA bit %u: %u\n", m_rxbits, BIT(m_rsr, 7));
m_rxbits++;
break;
@@ -854,421 +871,399 @@ void m6801_cpu_device::set_os3(int state)
m_out_sc2_func(state);
}
-READ8_MEMBER( m6801_cpu_device::m6801_io_r )
+
+void m6801_cpu_device::p1_ddr_w(uint8_t data)
{
- uint8_t data = 0;
+ LOGPORT("Port 1 Data Direction Register: %02x\n", data);
- switch (offset)
+ if (m_port_ddr[0] != data)
{
- case IO_P1DDR:
- data = m_port_ddr[0];
- break;
-
- case IO_P2DDR:
- data = m_port_ddr[1];
- break;
-
- case IO_P1DATA:
- if(m_port_ddr[0] == 0xff)
- data = m_port_data[0];
- else
- data = (m_in_port_func[0]() & (m_port_ddr[0] ^ 0xff))
- | (m_port_data[0] & m_port_ddr[0]);
- break;
-
- case IO_P2DATA:
- if(m_port_ddr[1] == 0xff)
- data = m_port_data[1];
- else
- data = (m_in_port_func[1]() & (m_port_ddr[1] ^ 0xff))
- | (m_port_data[1] & m_port_ddr[1]);
- break;
+ m_port_ddr[0] = data;
+ m_out_port_func[0]((m_port_data[0] & m_port_ddr[0]) | (m_port_ddr[0] ^ 0xff));
+ }
+}
- case IO_P3DDR:
- data = 0xff;
- break;
+uint8_t m6801_cpu_device::p1_data_r()
+{
+ if(m_port_ddr[0] == 0xff)
+ return m_port_data[0];
+ else
+ return (m_in_port_func[0]() & (m_port_ddr[0] ^ 0xff)) | (m_port_data[0] & m_port_ddr[0]);
+}
- case IO_P4DDR:
- data = m_port_ddr[3];
- break;
+void m6801_cpu_device::p1_data_w(uint8_t data)
+{
+ LOGPORT("Port 1 Data Register: %02x\n", data);
- case IO_P3DATA:
- if (!machine().side_effects_disabled())
- {
- if (m_p3csr_is3_flag_read)
- {
- LOGPORT("Cleared IS3\n");
- m_p3csr &= ~M6801_P3CSR_IS3_FLAG;
- m_p3csr_is3_flag_read = 0;
- }
+ m_port_data[0] = data;
+ m_out_port_func[0]((m_port_data[0] & m_port_ddr[0]) | (m_port_ddr[0] ^ 0xff));
+}
- if (!(m_p3csr & M6801_P3CSR_OSS))
- {
- set_os3(ASSERT_LINE);
- }
- }
+void m6801_cpu_device::p2_ddr_w(uint8_t data)
+{
+ LOGPORT("Port 2 Data Direction Register: %02x\n", data);
- if ((m_p3csr & M6801_P3CSR_LE) || (m_port_ddr[2] == 0xff))
- data = m_port_data[2];
- else
- data = (m_in_port_func[2]() & (m_port_ddr[2] ^ 0xff))
- | (m_port_data[2] & m_port_ddr[2]);
+ if (m_port_ddr[1] != data)
+ {
+ m_port_ddr[1] = data;
+ write_port2();
+ }
+}
- if (!machine().side_effects_disabled())
- {
- m_port3_latched = 0;
+uint8_t m6801_cpu_device::p2_data_r()
+{
+ if(m_port_ddr[1] == 0xff)
+ return m_port_data[1];
+ else
+ return (m_in_port_func[1]() & (m_port_ddr[1] ^ 0xff)) | (m_port_data[1] & m_port_ddr[1]);
+}
- if (!(m_p3csr & M6801_P3CSR_OSS))
- {
- set_os3(CLEAR_LINE);
- }
- }
- break;
+void m6801_cpu_device::p2_data_w(uint8_t data)
+{
+ LOGPORT("Port 2 Data Register: %02x\n", data);
- case IO_P4DATA:
- if(m_port_ddr[3] == 0xff)
- data = m_port_data[3];
- else
- data = (m_in_port_func[3]() & (m_port_ddr[3] ^ 0xff))
- | (m_port_data[3] & m_port_ddr[3]);
- break;
+ m_port_data[1] = data;
+ m_port2_written = 1;
+ write_port2();
+}
- case IO_TCSR:
- m_pending_tcsr = 0;
- data = m_tcsr;
- break;
+void m6801_cpu_device::p3_ddr_w(uint8_t data)
+{
+ LOGPORT("Port 3 Data Direction Register: %02x\n", data);
- case IO_CH:
- if(!(m_pending_tcsr&TCSR_TOF) && !machine().side_effects_disabled())
- {
- m_tcsr &= ~TCSR_TOF;
- MODIFIED_tcsr;
- }
- data = m_counter.b.h;
- break;
+ if (m_port_ddr[2] != data)
+ {
+ m_port_ddr[2] = data;
+ m_out_port_func[2]((m_port_data[2] & m_port_ddr[2]) | (m_port_ddr[2] ^ 0xff));
+ }
+}
- case IO_CL:
- data = m_counter.b.l;
- // HACK there should be a break here, but Coleco Adam won't boot with it present, proper fix required to the free-running counter
+uint8_t m6801_cpu_device::p3_data_r()
+{
+ uint8_t data;
- case IO_OCRH:
- if(!(m_pending_tcsr&TCSR_OCF) && !machine().side_effects_disabled())
+ if (!machine().side_effects_disabled())
+ {
+ if (m_p3csr_is3_flag_read)
{
- m_tcsr &= ~TCSR_OCF;
- MODIFIED_tcsr;
+ LOGPORT("Cleared IS3\n");
+ m_p3csr &= ~M6801_P3CSR_IS3_FLAG;
+ m_p3csr_is3_flag_read = 0;
}
- data = m_output_compare.b.h;
- break;
- case IO_OCRL:
- if(!(m_pending_tcsr&TCSR_OCF) && !machine().side_effects_disabled())
+ if (!(m_p3csr & M6801_P3CSR_OSS))
{
- m_tcsr &= ~TCSR_OCF;
- MODIFIED_tcsr;
+ set_os3(ASSERT_LINE);
}
- data = m_output_compare.b.l;
- break;
+ }
- case IO_ICRH:
- if(!(m_pending_tcsr&TCSR_ICF) && !machine().side_effects_disabled())
- {
- m_tcsr &= ~TCSR_ICF;
- MODIFIED_tcsr;
- }
- data = (m_input_capture >> 0) & 0xff;
- break;
+ if ((m_p3csr & M6801_P3CSR_LE) || (m_port_ddr[2] == 0xff))
+ data = m_port_data[2];
+ else
+ data = (m_in_port_func[2]() & (m_port_ddr[2] ^ 0xff))
+ | (m_port_data[2] & m_port_ddr[2]);
- case IO_ICRL:
- data = (m_input_capture >> 8) & 0xff;
- break;
+ if (!machine().side_effects_disabled())
+ {
+ m_port3_latched = 0;
- case IO_P3CSR:
- if ((m_p3csr & M6801_P3CSR_IS3_FLAG) && !machine().side_effects_disabled())
+ if (!(m_p3csr & M6801_P3CSR_OSS))
{
- m_p3csr_is3_flag_read = 1;
+ set_os3(CLEAR_LINE);
}
+ }
+ return data;
+}
- data = m_p3csr;
- break;
-
- case IO_RMCR:
- data = m_rmcr;
- break;
+void m6801_cpu_device::p3_data_w(uint8_t data)
+{
+ LOGPORT("Port 3 Data Register: %02x\n", data);
- case IO_TRCSR:
- if (!machine().side_effects_disabled())
- {
- if (m_trcsr & M6801_TRCSR_TDRE)
- {
- m_trcsr_read_tdre = 1;
- }
+ if (m_p3csr_is3_flag_read)
+ {
+ LOGPORT("Cleared IS3\n");
+ m_p3csr &= ~M6801_P3CSR_IS3_FLAG;
+ m_p3csr_is3_flag_read = 0;
+ }
- if (m_trcsr & M6801_TRCSR_ORFE)
- {
- m_trcsr_read_orfe = 1;
- }
+ if (m_p3csr & M6801_P3CSR_OSS)
+ {
+ set_os3(ASSERT_LINE);
+ }
- if (m_trcsr & M6801_TRCSR_RDRF)
- {
- m_trcsr_read_rdrf = 1;
- }
- }
+ m_port_data[2] = data;
+ m_out_port_func[2]((m_port_data[2] & m_port_ddr[2]) | (m_port_ddr[2] ^ 0xff));
- data = m_trcsr;
- break;
+ if (m_p3csr & M6801_P3CSR_OSS)
+ {
+ set_os3(CLEAR_LINE);
+ }
+}
- case IO_RDR:
- if (!machine().side_effects_disabled())
- {
- if (m_trcsr_read_orfe)
- {
- LOG("Cleared ORFE\n");
- m_trcsr_read_orfe = 0;
- m_trcsr &= ~M6801_TRCSR_ORFE;
- }
+uint8_t m6801_cpu_device::p3_csr_r()
+{
+ if ((m_p3csr & M6801_P3CSR_IS3_FLAG) && !machine().side_effects_disabled())
+ {
+ m_p3csr_is3_flag_read = 1;
+ }
- if (m_trcsr_read_rdrf)
- {
- LOG("Cleared RDRF\n");
- m_trcsr_read_rdrf = 0;
- m_trcsr &= ~M6801_TRCSR_RDRF;
- }
- }
+ return m_p3csr;
+}
- data = m_rdr;
- break;
+void m6801_cpu_device::p3_csr_w(uint8_t data)
+{
+ LOGPORT("Port 3 Control and Status Register: %02x\n", data);
- case IO_TDR:
- data = m_tdr;
- break;
+ m_p3csr = data;
+}
- case IO_RCR:
- data = m_ram_ctrl;
- break;
+void m6801_cpu_device::p4_ddr_w(uint8_t data)
+{
+ LOGPORT("Port 4 Data Direction Register: %02x\n", data);
- case IO_CAAH:
- case IO_CAAL:
- case IO_TCR1:
- case IO_TCR2:
- case IO_TSR:
- case IO_OCR2H:
- case IO_OCR2L:
- case IO_OCR3H:
- case IO_OCR3L:
- case IO_ICR2H:
- case IO_ICR2L:
- default:
- logerror("PC %04x: warning - read from reserved internal register %02x\n", pc(),offset);
+ if (m_port_ddr[3] != data)
+ {
+ m_port_ddr[3] = data;
+ m_out_port_func[3]((m_port_data[3] & m_port_ddr[3]) | (m_port_ddr[3] ^ 0xff));
}
-
- return data;
}
-WRITE8_MEMBER( m6801_cpu_device::m6801_io_w )
+uint8_t m6801_cpu_device::p4_data_r()
{
- switch (offset)
- {
- case IO_P1DDR:
- LOGPORT("Port 1 Data Direction Register: %02x\n", data);
-
- if (m_port_ddr[0] != data)
- {
- m_port_ddr[0] = data;
- m_out_port_func[0]((m_port_data[0] & m_port_ddr[0]) | (m_port_ddr[0] ^ 0xff));
- }
- break;
+ if(m_port_ddr[3] == 0xff)
+ return m_port_data[3];
+ else
+ return (m_in_port_func[3]() & (m_port_ddr[3] ^ 0xff)) | (m_port_data[3] & m_port_ddr[3]);
+}
- case IO_P2DDR:
- LOGPORT("Port 2 Data Direction Register: %02x\n", data);
+void m6801_cpu_device::p4_data_w(uint8_t data)
+{
+ LOGPORT("Port 4 Data Register: %02x\n", data);
- if (m_port_ddr[1] != data)
- {
- m_port_ddr[1] = data;
- write_port2();
- }
- break;
+ m_port_data[3] = data;
+ m_out_port_func[3]((m_port_data[3] & m_port_ddr[3]) | (m_port_ddr[3] ^ 0xff));
+}
- case IO_P1DATA:
- LOGPORT("Port 1 Data Register: %02x\n", data);
+uint8_t m6801_cpu_device::tcsr_r()
+{
+ if (!machine().side_effects_disabled())
+ m_pending_tcsr = 0;
+ return m_tcsr;
+}
- m_port_data[0] = data;
- m_out_port_func[0]((m_port_data[0] & m_port_ddr[0]) | (m_port_ddr[0] ^ 0xff));
- break;
+void m6801_cpu_device::tcsr_w(uint8_t data)
+{
+ LOGTIMER("Timer Control and Status Register: %02x\n", data);
- case IO_P2DATA:
- LOGPORT("Port 2 Data Register: %02x\n", data);
+ m_tcsr = data;
+ m_pending_tcsr &= m_tcsr;
+ MODIFIED_tcsr;
+ if( !(m_cc & 0x10) )
+ m6800_check_irq2();
+}
- m_port_data[1] = data;
- m_port2_written = 1;
- write_port2();
- break;
+uint8_t m6801_cpu_device::ch_r()
+{
+ if(!(m_pending_tcsr&TCSR_TOF) && !machine().side_effects_disabled())
+ {
+ m_tcsr &= ~TCSR_TOF;
+ MODIFIED_tcsr;
+ }
+ return m_counter.b.h;
+}
- case IO_P3DDR:
- LOGPORT("Port 3 Data Direction Register: %02x\n", data);
+uint8_t m6801_cpu_device::cl_r()
+{
+ uint8_t data = m_counter.b.l;
- if (m_port_ddr[2] != data)
- {
- m_port_ddr[2] = data;
- m_out_port_func[2]((m_port_data[2] & m_port_ddr[2]) | (m_port_ddr[2] ^ 0xff));
- }
- break;
+ // HACK there should be a break here, but Coleco Adam won't boot with it present, proper fix required to the free-running counter
+ (void)data;
+ return ocrh_r();
+}
- case IO_P4DDR:
- LOGPORT("Port 4 Data Direction Register: %02x\n", data);
+void m6801_cpu_device::ch_w(uint8_t data)
+{
+ LOGTIMER("Counter High Register: %02x\n", data);
- if (m_port_ddr[3] != data)
- {
- m_port_ddr[3] = data;
- m_out_port_func[3]((m_port_data[3] & m_port_ddr[3]) | (m_port_ddr[3] ^ 0xff));
- }
- break;
+ m_latch09 = data & 0xff; /* 6301 only */
+ CT = 0xfff8;
+ TOH = CTH;
+ MODIFIED_counters;
+}
- case IO_P3DATA:
- LOGPORT("Port 3 Data Register: %02x\n", data);
+void m6801_cpu_device::cl_w(uint8_t data)
+{
+ LOGTIMER("Counter Low Register: %02x\n", data);
- if (m_p3csr_is3_flag_read)
- {
- LOGPORT("Cleared IS3\n");
- m_p3csr &= ~M6801_P3CSR_IS3_FLAG;
- m_p3csr_is3_flag_read = 0;
- }
+ CT = (m_latch09 << 8) | (data & 0xff);
+ TOH = CTH;
+ MODIFIED_counters;
+}
- if (m_p3csr & M6801_P3CSR_OSS)
- {
- set_os3(ASSERT_LINE);
- }
+uint8_t m6801_cpu_device::ocrh_r()
+{
+ if(!(m_pending_tcsr&TCSR_OCF) && !machine().side_effects_disabled())
+ {
+ m_tcsr &= ~TCSR_OCF;
+ MODIFIED_tcsr;
+ }
+ return m_output_compare.b.h;
+}
- m_port_data[2] = data;
- m_out_port_func[2]((m_port_data[2] & m_port_ddr[2]) | (m_port_ddr[2] ^ 0xff));
+uint8_t m6801_cpu_device::ocrl_r()
+{
+ if(!(m_pending_tcsr&TCSR_OCF) && !machine().side_effects_disabled())
+ {
+ m_tcsr &= ~TCSR_OCF;
+ MODIFIED_tcsr;
+ }
+ return m_output_compare.b.l;
+}
- if (m_p3csr & M6801_P3CSR_OSS)
- {
- set_os3(CLEAR_LINE);
- }
- break;
+void m6801_cpu_device::ocrh_w(uint8_t data)
+{
+ LOGTIMER("Output Compare High Register: %02x\n", data);
- case IO_P4DATA:
- LOGPORT("Port 4 Data Register: %02x\n", data);
+ if( m_output_compare.b.h != data)
+ {
+ m_output_compare.b.h = data;
+ MODIFIED_counters;
+ }
+}
- m_port_data[3] = data;
- m_out_port_func[3]((m_port_data[3] & m_port_ddr[3]) | (m_port_ddr[3] ^ 0xff));
- break;
+void m6801_cpu_device::ocrl_w(uint8_t data)
+{
+ LOGTIMER("Output Compare Low Register: %02x\n", data);
- case IO_TCSR:
- LOG("Timer Control and Status Register: %02x\n", data);
+ if( m_output_compare.b.l != data)
+ {
+ m_output_compare.b.l = data;
+ MODIFIED_counters;
+ }
+}
- m_tcsr = data;
- m_pending_tcsr &= m_tcsr;
+uint8_t m6801_cpu_device::icrh_r()
+{
+ if(!(m_pending_tcsr&TCSR_ICF) && !machine().side_effects_disabled())
+ {
+ m_tcsr &= ~TCSR_ICF;
MODIFIED_tcsr;
- if( !(m_cc & 0x10) )
- m6800_check_irq2();
- break;
+ }
+ return (m_input_capture >> 0) & 0xff;
+}
- case IO_CH:
- LOG("Counter High Register: %02x\n", data);
+uint8_t m6801_cpu_device::icrl_r()
+{
+ return (m_input_capture >> 8) & 0xff;
+}
- m_latch09 = data & 0xff; /* 6301 only */
- CT = 0xfff8;
- TOH = CTH;
- MODIFIED_counters;
- break;
- case IO_CL: /* 6301 only */
- LOG("Counter Low Register: %02x\n", data);
+uint8_t m6801_cpu_device::sci_rmcr_r()
+{
+ return m_rmcr;
+}
- CT = (m_latch09 << 8) | (data & 0xff);
- TOH = CTH;
- MODIFIED_counters;
- break;
+void m6801_cpu_device::sci_rmcr_w(uint8_t data)
+{
+ LOGSER("SCI Rate and Mode Control Register: %02x\n", data);
- case IO_OCRH:
- LOG("Output Compare High Register: %02x\n", data);
+ set_rmcr(data);
+}
- if( m_output_compare.b.h != data)
+uint8_t m6801_cpu_device::sci_trcsr_r()
+{
+ if (!machine().side_effects_disabled())
+ {
+ if (m_trcsr & M6801_TRCSR_TDRE)
{
- m_output_compare.b.h = data;
- MODIFIED_counters;
+ m_trcsr_read_tdre = 1;
}
- break;
- case IO_OCRL:
- LOG("Output Compare Low Register: %02x\n", data);
-
- if( m_output_compare.b.l != data)
+ if (m_trcsr & M6801_TRCSR_ORFE)
{
- m_output_compare.b.l = data;
- MODIFIED_counters;
+ m_trcsr_read_orfe = 1;
}
- break;
- case IO_ICRH:
- case IO_ICRL:
- case IO_RDR:
- LOG("PC %04x: warning - write %02x to read only internal register %02x\n",pc(),data,offset);
- break;
+ if (m_trcsr & M6801_TRCSR_RDRF)
+ {
+ m_trcsr_read_rdrf = 1;
+ }
+ }
- case IO_P3CSR:
- LOGPORT("Port 3 Control and Status Register: %02x\n", data);
+ return m_trcsr;
+}
- m_p3csr = data;
- break;
+void m6801_cpu_device::sci_trcsr_w(uint8_t data)
+{
+ LOGSER("SCI Transmit/Receive Control and Status Register: %02x\n", data);
- case IO_RMCR:
- LOGSER("Rate and Mode Control Register: %02x\n", data);
+ if ((data & M6801_TRCSR_TE) && !(m_trcsr & M6801_TRCSR_TE))
+ {
+ m_txstate = M6801_TX_STATE_INIT;
+ m_txbits = 0;
+ m_tx = 1;
+ }
- set_rmcr(data);
- break;
+ if ((data & M6801_TRCSR_RE) && !(m_trcsr & M6801_TRCSR_RE))
+ {
+ m_rxbits = 0;
+ }
- case IO_TRCSR:
- LOGSER("Transmit/Receive Control and Status Register: %02x\n", data);
+ m_trcsr = (m_trcsr & 0xe0) | (data & 0x1f);
+}
- if ((data & M6801_TRCSR_TE) && !(m_trcsr & M6801_TRCSR_TE))
+uint8_t m6801_cpu_device::sci_rdr_r()
+{
+ if (!machine().side_effects_disabled())
+ {
+ if (m_trcsr_read_orfe)
{
- m_txstate = M6801_TX_STATE_INIT;
- m_txbits = 0;
- m_tx = 1;
+ LOGSER("Cleared ORFE\n");
+ m_trcsr_read_orfe = 0;
+ m_trcsr &= ~M6801_TRCSR_ORFE;
}
- if ((data & M6801_TRCSR_RE) && !(m_trcsr & M6801_TRCSR_RE))
+ if (m_trcsr_read_rdrf)
{
- m_rxbits = 0;
+ LOGSER("Cleared RDRF\n");
+ m_trcsr_read_rdrf = 0;
+ m_trcsr &= ~M6801_TRCSR_RDRF;
}
+ }
- m_trcsr = (m_trcsr & 0xe0) | (data & 0x1f);
- break;
+ return m_rdr;
+}
- case IO_TDR:
- LOGSER("6801 Transmit Data Register: $%02x/%d\n", data, data);
+void m6801_cpu_device::sci_tdr_w(uint8_t data)
+{
+ LOGSER("SCI Transmit Data Register: $%02x/%d\n", data, data);
- if (m_trcsr_read_tdre)
- {
- m_trcsr_read_tdre = 0;
- m_trcsr &= ~M6801_TRCSR_TDRE;
- }
- m_tdr = data;
- break;
+ if (m_trcsr_read_tdre)
+ {
+ m_trcsr_read_tdre = 0;
+ m_trcsr &= ~M6801_TRCSR_TDRE;
+ }
+ m_tdr = data;
+}
- case IO_RCR:
- LOG("RAM Control Register: %02x\n", data);
- m_ram_ctrl = data;
- break;
+uint8_t m6801_cpu_device::rcr_r()
+{
+ return m_ram_ctrl;
+}
- case IO_CAAH:
- case IO_CAAL:
- case IO_TCR1:
- case IO_TCR2:
- case IO_TSR:
- case IO_OCR2H:
- case IO_OCR2L:
- case IO_OCR3H:
- case IO_OCR3L:
- case IO_ICR2H:
- case IO_ICR2L:
- default:
- logerror("PC %04x: warning - write %02x to reserved internal register %02x\n", pc(),data,offset);
- break;
- }
+void m6801_cpu_device::rcr_w(uint8_t data)
+{
+ LOG("RAM Control Register: %02x\n", data);
+
+ m_ram_ctrl = data;
+}
+
+uint8_t m6801_cpu_device::ff_r()
+{
+ if (!machine().side_effects_disabled())
+ logerror("PC %04x: warning - read from write-only internal register\n", pc());
+ return 0xff;
}
@@ -1307,12 +1302,7 @@ std::unique_ptr<util::disasm_interface> hd6301_cpu_device::create_disassembler()
return std::make_unique<m680x_disassembler>(6301);
}
-std::unique_ptr<util::disasm_interface> hd63701_cpu_device::create_disassembler()
-{
- return std::make_unique<m680x_disassembler>(63701);
-}
-
-void hd63701_cpu_device::TAKE_TRAP()
+void hd6301_cpu_device::TAKE_TRAP()
{
enter_interrupt("take TRAP\n",0xffee);
}
diff --git a/src/devices/cpu/m6800/m6801.h b/src/devices/cpu/m6800/m6801.h
index c406eefd092..0e64db57981 100644
--- a/src/devices/cpu/m6800/m6801.h
+++ b/src/devices/cpu/m6800/m6801.h
@@ -56,10 +56,10 @@ public:
auto out_sc2_cb() { return m_out_sc2_func.bind(); }
auto out_ser_tx_cb() { return m_out_sertx_func.bind(); }
- DECLARE_READ8_MEMBER( m6801_io_r );
- DECLARE_WRITE8_MEMBER( m6801_io_w );
+ void m6801_io(address_map &map); // FIXME: privatize this
void m6801_clock_serial();
+
protected:
m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal = address_map_constructor());
@@ -76,6 +76,49 @@ protected:
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+ void p1_ddr_w(uint8_t data);
+ uint8_t p1_data_r();
+ void p1_data_w(uint8_t data);
+ void p2_ddr_w(uint8_t data);
+ uint8_t p2_data_r();
+ void p2_data_w(uint8_t data);
+ void p3_ddr_w(uint8_t data);
+ uint8_t p3_data_r();
+ void p3_data_w(uint8_t data);
+ uint8_t p3_csr_r();
+ void p3_csr_w(uint8_t data);
+ void p4_ddr_w(uint8_t data);
+ uint8_t p4_data_r();
+ void p4_data_w(uint8_t data);
+
+public: // FIXME: psion.cpp accesses this
+ uint8_t tcsr_r();
+ void tcsr_w(uint8_t data);
+protected:
+ uint8_t ch_r();
+ uint8_t cl_r();
+ void ch_w(uint8_t data);
+ void cl_w(uint8_t data);
+ uint8_t ocrh_r();
+ uint8_t ocrl_r();
+ void ocrh_w(uint8_t data);
+ void ocrl_w(uint8_t data);
+ uint8_t icrh_r();
+ uint8_t icrl_r();
+
+ uint8_t sci_rmcr_r();
+ void sci_rmcr_w(uint8_t data);
+ uint8_t sci_trcsr_r();
+ void sci_trcsr_w(uint8_t data);
+ uint8_t sci_rdr_r();
+ void sci_tdr_w(uint8_t data);
+
+public: // FIXME: psion.cpp accesses this
+ uint8_t rcr_r();
+protected:
+ void rcr_w(uint8_t data);
+ uint8_t ff_r();
+
void m6803_mem(address_map &map);
devcb_read8::array<4> m_in_port_func;
@@ -159,31 +202,40 @@ protected:
class hd6301_cpu_device : public m6801_cpu_device
{
-public:
- hd6301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
protected:
hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ virtual void TAKE_TRAP() override;
};
-class hd63701_cpu_device : public m6801_cpu_device
+// DP-40 package: HD6301V1P, HD63A01V1P, HD63B01V1P
+// FP-54 package: HD6301V1F, HD63A01V1F, HD63B01V1F
+// CG-40 package: HD6301V1CG, HD63A01V1CG, HD63B01V1CG
+// CP-52 package: HD6301V1CP, HD63A01V1CP, HD63B01V1CP
+// CP-44 package: HD6301V1L, HD63A01V1L, HD63B01V1L
+// Not fully emulated yet
+class hd6301v1_cpu_device : public hd6301_cpu_device
{
public:
- hd63701_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ hd6301v1_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
-protected:
- virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- virtual void TAKE_TRAP() override;
+// DC-40 package: HD63701V0C, HD63A701V0C, HD63B701V0C
+// Not fully emulated yet
+class hd63701v0_cpu_device : public hd6301_cpu_device
+{
+public:
+ hd63701v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
-// DP-40 package: HD6303RP, HD63A03RP, HD63B03RP,
-// FP-54 package: HD6303RF, HD63A03RF, HD63B03RF,
-// CG-40 package: HD6303RCG, HD63A03RCG, HD63B03RCG,
+// DP-40 package: HD6303RP, HD63A03RP, HD63B03RP
+// FP-54 package: HD6303RF, HD63A03RF, HD63B03RF
+// CG-40 package: HD6303RCG, HD63A03RCG, HD63B03RCG
// Not fully emulated yet
class hd6303r_cpu_device : public hd6301_cpu_device
{
@@ -192,23 +244,71 @@ public:
};
+class hd6301x_cpu_device : public hd6301_cpu_device
+{
+protected:
+ hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+};
+
+
+// DP-64S package: HD6301X0P, HD63A01X0P, HD63B01X0P
+// FP-80 package: HD6301X0F, HD63A01X0F, HD63B01X0F
+// CP-68 package: HD6301X0CP, HD63A01X0CP, HD63B01X0CP
+// Not fully emulated yet
+class hd6301x0_cpu_device : public hd6301x_cpu_device
+{
+public:
+ hd6301x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+
+// DC-64S package: HD63701X0C, HD63A701X0C, HD63B701X0C
+// Not fully emulated yet
+class hd63701x0_cpu_device : public hd6301x_cpu_device
+{
+public:
+ hd63701x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+
// DP-64S package: HD6303XP, HD63A03XP, HD63B03XP
// FP-80 package: HD6303XF, HD63A03XF, HD63B03XF
// CP-68 package: HD6303XCP, HD63A03XCP, HD63B03XCP
// Not fully emulated yet
-class hd6303x_cpu_device : public hd6301_cpu_device
+class hd6303x_cpu_device : public hd6301x_cpu_device
{
public:
hd6303x_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
+// DP-64S package: HD6301Y0P, HD63A01Y0P, HD63B01Y0P, HD63C01Y0P
+// FP-64 package: HD6301Y0F, HD63A01Y0F, HD63B01Y0F, HD63C01Y0F
+// FP-64A package: HD6301Y0H, HD63A01Y0H, HD63B01Y0H, HD63C01Y0H
+// CP-68 package: HD6301Y0CP, HD63A01Y0CP, HD63B01Y0CP, HD63C01Y0CP
+// Not fully emulated yet
+class hd6301y0_cpu_device : public hd6301x_cpu_device
+{
+public:
+ hd6301y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+
+// DC-64S package: HD63701Y0C, HD63A701Y0C, HD63B701Y0C, HD63C701Y0C
+// Not fully emulated yet
+class hd63701y0_cpu_device : public hd6301x_cpu_device
+{
+public:
+ hd63701y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+
// DP-64S package: HD6303YP, HD63A03YP, HD63B03YP, HD63C03YP
// FP-64 package: HD6303YF, HD63A03YF, HD63B03YF, HD63C03YF
// FP-64A package: HD6303YH, HD63A03YH, HD63B03YH, HD63C03YH
// CP-68 package: HD6303YCP, HD63A03YCP, HD63B03YCP, HD63C03YCP
// Not fully emulated yet
-class hd6303y_cpu_device : public hd6301_cpu_device
+class hd6303y_cpu_device : public hd6301x_cpu_device
{
public:
hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@@ -218,8 +318,12 @@ public:
DECLARE_DEVICE_TYPE(M6801, m6801_cpu_device)
DECLARE_DEVICE_TYPE(M6803, m6803_cpu_device)
DECLARE_DEVICE_TYPE(M6803E, m6803e_cpu_device)
-DECLARE_DEVICE_TYPE(HD6301, hd6301_cpu_device)
-DECLARE_DEVICE_TYPE(HD63701, hd63701_cpu_device)
+DECLARE_DEVICE_TYPE(HD6301V1, hd6301v1_cpu_device)
+DECLARE_DEVICE_TYPE(HD6301X0, hd6301x0_cpu_device)
+DECLARE_DEVICE_TYPE(HD6301Y0, hd6301y0_cpu_device)
+DECLARE_DEVICE_TYPE(HD63701V0, hd63701v0_cpu_device)
+DECLARE_DEVICE_TYPE(HD63701X0, hd63701x0_cpu_device)
+DECLARE_DEVICE_TYPE(HD63701Y0, hd63701y0_cpu_device)
DECLARE_DEVICE_TYPE(HD6303R, hd6303r_cpu_device)
DECLARE_DEVICE_TYPE(HD6303X, hd6303x_cpu_device)
DECLARE_DEVICE_TYPE(HD6303Y, hd6303y_cpu_device)
diff --git a/src/devices/machine/mpu401.cpp b/src/devices/machine/mpu401.cpp
index 48cc04b455d..a07587be87e 100644
--- a/src/devices/machine/mpu401.cpp
+++ b/src/devices/machine/mpu401.cpp
@@ -59,7 +59,7 @@
void mpu401_device::mpu401_map(address_map &map)
{
- map(0x0000, 0x001f).rw(FUNC(mpu401_device::regs_mode2_r), FUNC(mpu401_device::regs_mode2_w));
+ map(0x0000, 0x001f).m(m_ourcpu, FUNC(m6801_cpu_device::m6801_io));
map(0x0020, 0x0021).rw(FUNC(mpu401_device::asic_r), FUNC(mpu401_device::asic_w));
map(0x0080, 0x00ff).ram(); // on-chip RAM
map(0x0800, 0x0fff).ram(); // external RAM
@@ -153,42 +153,6 @@ void mpu401_device::device_timer(emu_timer &timer, device_timer_id tid, int para
m_ourcpu->m6801_clock_serial();
}
-READ8_MEMBER(mpu401_device::regs_mode2_r)
-{
- switch (offset)
- {
- case 4:
- case 5:
- case 6:
- case 7:
- case 0xf:
-// logerror("MPU401: read @ unk %x %s\n", offset, machine().describe_context());
- break;
-
- default:
- return m_ourcpu->m6801_io_r(space, offset);
- }
-
- return 0xff;
-}
-
-WRITE8_MEMBER(mpu401_device::regs_mode2_w)
-{
- switch (offset)
- {
- case 4:
- case 5:
- case 6:
- case 7:
- case 0xf:
-// logerror("MPU401: %02x @ unk %x %s\n", data, offset, machine().describe_context());
- break;
-
- default:
- return m_ourcpu->m6801_io_w(space, offset, data);
- }
-}
-
READ8_MEMBER(mpu401_device::port1_r)
{
return 0xff;
diff --git a/src/devices/machine/mpu401.h b/src/devices/machine/mpu401.h
index f557275152e..1cd4583b454 100644
--- a/src/devices/machine/mpu401.h
+++ b/src/devices/machine/mpu401.h
@@ -34,8 +34,6 @@ protected:
private:
DECLARE_WRITE_LINE_MEMBER(midi_rx_w);
- DECLARE_READ8_MEMBER(regs_mode2_r);
- DECLARE_WRITE8_MEMBER(regs_mode2_w);
DECLARE_READ8_MEMBER(asic_r);
DECLARE_WRITE8_MEMBER(asic_w);
DECLARE_READ8_MEMBER(port1_r);
diff --git a/src/mame/drivers/adam.cpp b/src/mame/drivers/adam.cpp
index 9db2280b9be..ad9e5f8a402 100644
--- a/src/mame/drivers/adam.cpp
+++ b/src/mame/drivers/adam.cpp
@@ -884,7 +884,7 @@ void adam_state::adam_io(address_map &map)
void adam_state::m6801_mem(address_map &map)
{
- map(0x0000, 0x001f).rw(m_netcpu, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m(m_netcpu, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf800, 0xffff).rom().region(M6801_TAG, 0);
}
diff --git a/src/mame/drivers/apricotp.cpp b/src/mame/drivers/apricotp.cpp
index 0e449e4b777..64b0530ab02 100644
--- a/src/mame/drivers/apricotp.cpp
+++ b/src/mame/drivers/apricotp.cpp
@@ -574,7 +574,7 @@ void fp_state::fp(machine_config &config)
m_maincpu->set_addrmap(AS_IO, &fp_state::fp_io);
m_maincpu->set_irq_acknowledge_callback(I8259A_TAG, FUNC(pic8259_device::inta_cb));
- HD6301(config, m_soundcpu, 2000000);
+ HD6301V1(config, m_soundcpu, 2000000);
m_soundcpu->set_addrmap(AS_PROGRAM, &fp_state::sound_mem);
m_soundcpu->set_disable();
diff --git a/src/mame/drivers/atarist.cpp b/src/mame/drivers/atarist.cpp
index 27b3fd6b514..812bc1190c1 100644
--- a/src/mame/drivers/atarist.cpp
+++ b/src/mame/drivers/atarist.cpp
@@ -1206,7 +1206,7 @@ WRITE16_MEMBER( stbook_state::lcd_control_w )
void st_state::ikbd_map(address_map &map)
{
- map(0x0000, 0x001f).rw(HD6301V1_TAG, FUNC(hd6301_cpu_device::m6801_io_r), FUNC(hd6301_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m(HD6301V1_TAG, FUNC(hd6301_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf000, 0xffff).rom().region(HD6301V1_TAG, 0);
}
@@ -2052,7 +2052,7 @@ void st_state::common(machine_config &config)
void st_state::keyboard(machine_config &config)
{
- hd6301_cpu_device &ikbd(HD6301(config, HD6301V1_TAG, Y2/8));
+ hd6301v1_cpu_device &ikbd(HD6301V1(config, HD6301V1_TAG, Y2/8));
ikbd.set_addrmap(AS_PROGRAM, &st_state::ikbd_map);
ikbd.in_p1_cb().set(FUNC(st_state::ikbd_port1_r));
ikbd.in_p2_cb().set(FUNC(st_state::ikbd_port2_r));
diff --git a/src/mame/drivers/baraduke.cpp b/src/mame/drivers/baraduke.cpp
index b6fe401ccfa..5633b8fdc3c 100644
--- a/src/mame/drivers/baraduke.cpp
+++ b/src/mame/drivers/baraduke.cpp
@@ -184,7 +184,7 @@ READ8_MEMBER(baraduke_state::soundkludge_r)
void baraduke_state::mcu_map(address_map &map)
{
- map(0x0000, 0x001f).rw("mcu", FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));/* internal registers */
+ map(0x0000, 0x001f).m("mcu", FUNC(hd63701v0_cpu_device::m6801_io));/* internal registers */
map(0x0080, 0x00ff).ram(); /* built in RAM */
map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w)); /* PSG device, shared RAM */
map(0x1105, 0x1105).r(FUNC(baraduke_state::soundkludge_r)); /* cures speech */
@@ -369,7 +369,7 @@ void baraduke_state::baraduke(machine_config &config)
MC6809E(config, m_maincpu, XTAL(49'152'000)/32); // 68A09E
m_maincpu->set_addrmap(AS_PROGRAM, &baraduke_state::baraduke_map);
- HD63701(config, m_mcu, XTAL(49'152'000)/8);
+ HD63701V0(config, m_mcu, XTAL(49'152'000)/8);
m_mcu->set_addrmap(AS_PROGRAM, &baraduke_state::mcu_map);
m_mcu->in_p1_cb().set(FUNC(baraduke_state::inputport_r)); /* input ports read */
m_mcu->out_p1_cb().set(FUNC(baraduke_state::inputport_select_w)); /* input port select */
diff --git a/src/mame/drivers/canon_s80.cpp b/src/mame/drivers/canon_s80.cpp
index d103fa2cfcc..50ba5881c03 100644
--- a/src/mame/drivers/canon_s80.cpp
+++ b/src/mame/drivers/canon_s80.cpp
@@ -42,7 +42,7 @@ void canons80_state::canons80_map(address_map &map)
void canons80_state::canons80(machine_config &config)
{
/* basic machine hardware */
- hd6301_cpu_device &maincpu(HD6301(config, "maincpu", 5000000)); /* hd63a01xop 5 MHz guessed: TODO: check on PCB */
+ hd6301x0_cpu_device &maincpu(HD6301X0(config, "maincpu", 5000000)); /* hd63a01xop 5 MHz guessed: TODO: check on PCB */
maincpu.set_addrmap(AS_PROGRAM, &canons80_state::canons80_map);
}
diff --git a/src/mame/drivers/ddragon.cpp b/src/mame/drivers/ddragon.cpp
index e2a5fcba217..b32cfa04b99 100644
--- a/src/mame/drivers/ddragon.cpp
+++ b/src/mame/drivers/ddragon.cpp
@@ -948,7 +948,7 @@ void ddragon_state::ddragon(machine_config &config)
m_maincpu->set_addrmap(AS_PROGRAM, &ddragon_state::ddragon_map);
TIMER(config, "scantimer").configure_scanline(FUNC(ddragon_state::ddragon_scanline), "screen", 0, 1);
- HD63701(config, m_subcpu, MAIN_CLOCK / 2); /* HD63701YOP, 6 MHz / 4 internally */
+ HD63701Y0(config, m_subcpu, MAIN_CLOCK / 2); /* HD63701YOP, 6 MHz / 4 internally */
m_subcpu->set_addrmap(AS_PROGRAM, &ddragon_state::sub_map);
MC6809(config, m_soundcpu, MAIN_CLOCK / 2); /* HD68A09P, 6 MHz / 4 internally */
diff --git a/src/mame/drivers/hx20.cpp b/src/mame/drivers/hx20.cpp
index 924664f719b..75facfb4d05 100644
--- a/src/mame/drivers/hx20.cpp
+++ b/src/mame/drivers/hx20.cpp
@@ -527,7 +527,7 @@ WRITE8_MEMBER( hx20_state::slave_p4_w )
void hx20_state::hx20_mem(address_map &map)
{
- map(0x0000, 0x001f).rw(m_maincpu, FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m(m_maincpu, FUNC(hd6301v1_cpu_device::m6801_io));
map(0x0020, 0x0020).w(FUNC(hx20_state::ksc_w));
map(0x0022, 0x0022).r(FUNC(hx20_state::krtn07_r));
map(0x0026, 0x0026).w(FUNC(hx20_state::lcd_cs_w));
@@ -549,7 +549,7 @@ void hx20_state::hx20_mem(address_map &map)
void hx20_state::hx20_sub_mem(address_map &map)
{
- map(0x0000, 0x001f).rw(m_subcpu, FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m(m_subcpu, FUNC(hd6301v1_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf000, 0xffff).rom().region(HD6301V1_SLAVE_TAG, 0);
}
@@ -886,7 +886,7 @@ void hx20_state::machine_start()
void hx20_state::hx20(machine_config &config)
{
// basic machine hardware
- HD63701(config, m_maincpu, 2.4576_MHz_XTAL);
+ HD6301V1(config, m_maincpu, 2.4576_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &hx20_state::hx20_mem);
m_maincpu->in_p1_cb().set(FUNC(hx20_state::main_p1_r));
m_maincpu->out_p1_cb().set(FUNC(hx20_state::main_p1_w));
@@ -895,7 +895,7 @@ void hx20_state::hx20(machine_config &config)
// Port 3 = A0-A7, D0-D7
// Port 4 = A8-A15
- HD63701(config, m_subcpu, 2.4576_MHz_XTAL);
+ HD6301V1(config, m_subcpu, 2.4576_MHz_XTAL);
m_subcpu->set_addrmap(AS_PROGRAM, &hx20_state::hx20_sub_mem);
m_subcpu->in_p1_cb().set(FUNC(hx20_state::slave_p1_r));
m_subcpu->out_p1_cb().set(FUNC(hx20_state::slave_p1_w));
diff --git a/src/mame/drivers/korgdss1.cpp b/src/mame/drivers/korgdss1.cpp
index 88c6e615106..0e3952ae6a3 100644
--- a/src/mame/drivers/korgdss1.cpp
+++ b/src/mame/drivers/korgdss1.cpp
@@ -405,7 +405,7 @@ void korg_dssmsrk_state::msrk_io_map(address_map &map)
void korg_dss1_state::cpu2_map(address_map &map)
{
- map(0x0000, 0x001f).rw(m_cpu2, FUNC(hd6303x_cpu_device::m6801_io_r), FUNC(hd6303x_cpu_device::m6801_io_w)); // FIXME: internalize this
+ map(0x0000, 0x001f).m(m_cpu2, FUNC(hd6303x_cpu_device::m6801_io)); // FIXME: internalize this
map(0x0015, 0x0015).r(FUNC(korg_dss1_state::cpu2_p5_r));
map(0x0017, 0x0017).w(FUNC(korg_dss1_state::ad_select_w));
map(0x0040, 0x00ff).ram(); // FIXME: internalize this
diff --git a/src/mame/drivers/mc10.cpp b/src/mame/drivers/mc10.cpp
index 465344d9a37..30eef718bca 100644
--- a/src/mame/drivers/mc10.cpp
+++ b/src/mame/drivers/mc10.cpp
@@ -286,8 +286,8 @@ void mc10_state::driver_start()
save_item(NAME(m_pr_counter));
//for alice32 force port4 DDR to 0xff at startup
- if (!strcmp(machine().system().name, "alice32") || !strcmp(machine().system().name, "alice90"))
- m_maincpu->m6801_io_w(prg, 0x05, 0xff);
+ //if (!strcmp(machine().system().name, "alice32") || !strcmp(machine().system().name, "alice90"))
+ //m_maincpu->m6801_io_w(prg, 0x05, 0xff);
}
diff --git a/src/mame/drivers/namcos1.cpp b/src/mame/drivers/namcos1.cpp
index f6544716c89..a670d407501 100644
--- a/src/mame/drivers/namcos1.cpp
+++ b/src/mame/drivers/namcos1.cpp
@@ -433,7 +433,7 @@ void namcos1_state::sound_map(address_map &map)
void namcos1_state::mcu_map(address_map &map)
{
- map(0x0000, 0x001f).rw(m_mcu, FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m(m_mcu, FUNC(hd63701v0_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram(); /* built in RAM */
map(0x1000, 0x1003).r(FUNC(namcos1_state::dsw_r));
map(0x1400, 0x1400).portr("CONTROL0");
@@ -1015,7 +1015,7 @@ void namcos1_state::ns1(machine_config &config)
MC6809E(config, m_audiocpu, XTAL(49'152'000)/32);
m_audiocpu->set_addrmap(AS_PROGRAM, &namcos1_state::sound_map);
- HD63701(config, m_mcu, XTAL(49'152'000)/8);
+ HD63701V0(config, m_mcu, XTAL(49'152'000)/8);
m_mcu->set_addrmap(AS_PROGRAM, &namcos1_state::mcu_map);
m_mcu->in_p1_cb().set_ioport("COIN");
m_mcu->out_p1_cb().set(FUNC(namcos1_state::coin_w));
diff --git a/src/mame/drivers/namcos86.cpp b/src/mame/drivers/namcos86.cpp
index e4514e17d53..d49779d44b7 100644
--- a/src/mame/drivers/namcos86.cpp
+++ b/src/mame/drivers/namcos86.cpp
@@ -420,7 +420,7 @@ void namcos86_state::wndrmomo_cpu2_map(address_map &map)
void namcos86_state::common_mcu_map(address_map &map)
{
- map(0x0000, 0x001f).rw("mcu", FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m("mcu", FUNC(hd63701v0_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w));
map(0x1400, 0x1fff).ram();
@@ -1057,7 +1057,7 @@ void namcos86_state::hopmappy(machine_config &config)
m_cpu2->set_addrmap(AS_PROGRAM, &namcos86_state::hopmappy_cpu2_map);
m_cpu2->set_vblank_int("screen", FUNC(namcos86_state::irq0_line_assert));
- HD63701(config, m_mcu, XTAL(49'152'000)/8); /* or compatible 6808 with extra instructions */
+ HD63701V0(config, m_mcu, XTAL(49'152'000)/8); /* or compatible 6808 with extra instructions */
m_mcu->set_addrmap(AS_PROGRAM, &namcos86_state::hopmappy_mcu_map);
m_mcu->in_p1_cb().set_ioport("IN2");
m_mcu->in_p2_cb().set_constant(0xff); /* leds won't work otherwise */
diff --git a/src/mame/drivers/novag_supremo.cpp b/src/mame/drivers/novag_supremo.cpp
index 647128057ee..dcbdcb0ad93 100644
--- a/src/mame/drivers/novag_supremo.cpp
+++ b/src/mame/drivers/novag_supremo.cpp
@@ -78,7 +78,7 @@ void supremo_state::machine_start()
void supremo_state::main_map(address_map &map)
{
- map(0x0000, 0x000e).rw(m_maincpu, FUNC(hd6303y_cpu_device::m6801_io_r), FUNC(hd6303y_cpu_device::m6801_io_w));
+ map(0x0000, 0x000e).m(m_maincpu, FUNC(hd6303y_cpu_device::m6801_io));
map(0x0040, 0x013f).ram(); // internal
map(0x4000, 0x47ff).ram();
map(0x8000, 0xffff).rom();
diff --git a/src/mame/drivers/pacland.cpp b/src/mame/drivers/pacland.cpp
index 625dd23e4a0..98cd13ae205 100644
--- a/src/mame/drivers/pacland.cpp
+++ b/src/mame/drivers/pacland.cpp
@@ -280,7 +280,7 @@ void pacland_state::main_map(address_map &map)
void pacland_state::mcu_map(address_map &map)
{
- map(0x0000, 0x001f).rw(m_mcu, FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m(m_mcu, FUNC(hd63701v0_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w)); /* PSG device, shared RAM */
map(0x2000, 0x3fff).w("watchdog", FUNC(watchdog_timer_device::reset_w)); /* watchdog? */
@@ -419,7 +419,7 @@ void pacland_state::pacland(machine_config &config)
MC6809E(config, m_maincpu, XTAL(49'152'000)/32); /* 1.536 MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &pacland_state::main_map);
- HD63701(config, m_mcu, XTAL(49'152'000)/8); /* 6.144 MHz? */
+ HD63701V0(config, m_mcu, XTAL(49'152'000)/8); /* 6.144 MHz? */
m_mcu->set_addrmap(AS_PROGRAM, &pacland_state::mcu_map);
m_mcu->in_p1_cb().set_ioport("IN2");
m_mcu->out_p1_cb().set(FUNC(pacland_state::coin_w));
diff --git a/src/mame/drivers/psion.cpp b/src/mame/drivers/psion.cpp
index 4374b176fcc..00478a0fd49 100644
--- a/src/mame/drivers/psion.cpp
+++ b/src/mame/drivers/psion.cpp
@@ -64,74 +64,81 @@ void psion_state::update_banks()
membank("rombank")->set_entry(m_rom_bank);
}
-WRITE8_MEMBER( psion_state::hd63701_int_reg_w )
+void psion_state::port2_ddr_w(uint8_t data)
{
- switch (offset)
- {
- case 0x01:
- m_port2_ddr = data;
- break;
- case 0x03:
- /* datapack i/o data bus */
- m_pack1->data_w(data & m_port2_ddr);
- m_pack2->data_w(data & m_port2_ddr);
- break;
- case 0x08:
- m_tcsr_value = data;
- break;
- case 0x15:
- /* read-only */
- break;
- case 0x16:
- m_port6_ddr = data;
- break;
- case 0x17:
- /*
- datapack control lines
- x--- ---- slot on/off
- -x-- ---- slot 3
- --x- ---- slot 2
- ---x ---- slot 1
- ---- x--- output enable
- ---- -x-- program line
- ---- --x- reset line
- ---- ---x clock line
- */
- m_port6 = (data & m_port6_ddr) | (m_port6 & ~m_port6_ddr);
-
- m_pack1->control_w((m_port6 & 0x8f) | (m_port6 & 0x10));
- m_pack2->control_w((m_port6 & 0x8f) | ((m_port6 & 0x20) >> 1));
- break;
- }
+ m_port2_ddr = data;
+}
- m_maincpu->m6801_io_w(space, offset, data);
+void psion_state::port2_w(uint8_t data)
+{
+ /* datapack i/o data bus */
+ m_pack1->data_w(data & m_port2_ddr);
+ m_pack2->data_w(data & m_port2_ddr);
}
-READ8_MEMBER( psion_state::hd63701_int_reg_r )
+uint8_t psion_state::port2_r()
{
- switch (offset)
- {
- case 0x03:
- /* datapack i/o data bus */
- return (m_pack1->data_r() | m_pack2->data_r()) & (~m_port2_ddr);
- case 0x14:
- return (m_maincpu->m6801_io_r(space, offset)&0x7f) | (m_stby_pwr<<7);
- case 0x15:
- /*
- x--- ---- ON key active high
- -xxx xx-- keys matrix active low
- ---- --x- pulse
- ---- ---x battery status
- */
- return kb_read() | ioport("BATTERY")->read() | ioport("ON")->read() | (m_kb_counter == 0x7ff)<<1 | m_pulse<<1;
- case 0x17:
- /* datapack control lines */
- return (m_pack1->control_r() | (m_pack2->control_r() & 0x8f)) | ((m_pack2->control_r() & 0x10)<<1);
- case 0x08:
- m_maincpu->m6801_io_w(space, offset, m_tcsr_value);
- default:
- return m_maincpu->m6801_io_r(space, offset);
- }
+ /* datapack i/o data bus */
+ return (m_pack1->data_r() | m_pack2->data_r()) & (~m_port2_ddr);
+}
+
+void psion_state::tcsr_w(uint8_t data)
+{
+ m_tcsr_value = data;
+ m_maincpu->tcsr_w(data);
+}
+
+uint8_t psion_state::tcsr_r()
+{
+ if (!machine().side_effects_disabled())
+ m_maincpu->tcsr_w(m_tcsr_value);
+ return m_maincpu->tcsr_r();
+}
+
+uint8_t psion_state::rcp5c_r()
+{
+ return (m_maincpu->rcr_r()&0x7f) | (m_stby_pwr<<7);
+}
+
+uint8_t psion_state::port5_r()
+{
+ /*
+ x--- ---- ON key active high
+ -xxx xx-- keys matrix active low
+ ---- --x- pulse
+ ---- ---x battery status
+ */
+ return kb_read() | ioport("BATTERY")->read() | ioport("ON")->read() | (m_kb_counter == 0x7ff)<<1 | m_pulse<<1;
+}
+
+void psion_state::port6_ddr_w(uint8_t data)
+{
+ m_port6_ddr = data;
+}
+
+void psion_state::port6_w(uint8_t data)
+{
+ /*
+ datapack control lines
+ x--- ---- slot on/off
+ -x-- ---- slot 3
+ --x- ---- slot 2
+ ---x ---- slot 1
+ ---- x--- output enable
+ ---- -x-- program line
+ ---- --x- reset line
+ ---- ---x clock line
+ */
+ m_port6 = (data & m_port6_ddr) | (m_port6 & ~m_port6_ddr);
+
+ m_pack1->control_w((m_port6 & 0x8f) | (m_port6 & 0x10));
+ m_pack2->control_w((m_port6 & 0x8f) | ((m_port6 & 0x20) >> 1));
+}
+
+uint8_t psion_state::port6_r()
+{
+ /* datapack control lines */
+ return (m_pack1->control_r() | (m_pack2->control_r() & 0x8f)) | ((m_pack2->control_r() & 0x10)<<1);
}
/* Read/Write common */
@@ -248,9 +255,22 @@ READ8_MEMBER( psion1_state::switchoff_r )
return 0;
}
+void psion_state::psion_int_reg(address_map &map)
+{
+ // FIXME: this should all be made internal to the CPU device
+ map(0x0000, 0x001f).m(m_maincpu, FUNC(hd6301x_cpu_device::m6801_io));
+ map(0x0001, 0x0001).w(FUNC(psion_state::port2_ddr_w));
+ map(0x0003, 0x0003).rw(FUNC(psion_state::port2_r), FUNC(psion_state::port2_w));
+ map(0x0008, 0x0008).rw(FUNC(psion_state::tcsr_r), FUNC(psion_state::tcsr_w));
+ map(0x0014, 0x0014).r(FUNC(psion_state::rcp5c_r));
+ map(0x0015, 0x0015).r(FUNC(psion_state::port5_r)).nopw();
+ map(0x0016, 0x0016).w(FUNC(psion_state::port6_ddr_w));
+ map(0x0017, 0x0017).rw(FUNC(psion_state::port6_r), FUNC(psion_state::port6_w));
+}
+
void psion1_state::psion1_mem(address_map &map)
{
- map(0x0000, 0x001f).rw(FUNC(psion1_state::hd63701_int_reg_r), FUNC(psion1_state::hd63701_int_reg_w));
+ psion_int_reg(map);
map(0x0040, 0x00ff).ram().share("sys_register");
map(0x2000, 0x2001).mirror(0x07fe).rw(m_lcdc, FUNC(hd44780_device::read), FUNC(hd44780_device::write));
map(0x2800, 0x2800).r(FUNC(psion1_state::reset_kb_counter_r));
@@ -263,7 +283,7 @@ void psion1_state::psion1_mem(address_map &map)
void psion_state::psioncm_mem(address_map &map)
{
map.unmap_value_low();
- map(0x0000, 0x001f).rw(FUNC(psion_state::hd63701_int_reg_r), FUNC(psion_state::hd63701_int_reg_w));
+ psion_int_reg(map);
map(0x0040, 0x00ff).ram().share("sys_register");
map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w));
map(0x2000, 0x3fff).ram().share("ram");
@@ -273,7 +293,7 @@ void psion_state::psioncm_mem(address_map &map)
void psion_state::psionla_mem(address_map &map)
{
map.unmap_value_low();
- map(0x0000, 0x001f).rw(FUNC(psion_state::hd63701_int_reg_r), FUNC(psion_state::hd63701_int_reg_w));
+ psion_int_reg(map);
map(0x0040, 0x00ff).ram().share("sys_register");
map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w));
map(0x0400, 0x5fff).ram().share("ram");
@@ -283,7 +303,7 @@ void psion_state::psionla_mem(address_map &map)
void psion_state::psionp350_mem(address_map &map)
{
map.unmap_value_low();
- map(0x0000, 0x001f).rw(FUNC(psion_state::hd63701_int_reg_r), FUNC(psion_state::hd63701_int_reg_w));
+ psion_int_reg(map);
map(0x0040, 0x00ff).ram().share("sys_register");
map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w));
map(0x0400, 0x3fff).ram().share("ram");
@@ -294,7 +314,7 @@ void psion_state::psionp350_mem(address_map &map)
void psion_state::psionlam_mem(address_map &map)
{
map.unmap_value_low();
- map(0x0000, 0x001f).rw(FUNC(psion_state::hd63701_int_reg_r), FUNC(psion_state::hd63701_int_reg_w));
+ psion_int_reg(map);
map(0x0040, 0x00ff).ram().share("sys_register");
map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w));
map(0x0400, 0x7fff).ram().share("ram");
@@ -305,7 +325,7 @@ void psion_state::psionlam_mem(address_map &map)
void psion_state::psionlz_mem(address_map &map)
{
map.unmap_value_low();
- map(0x0000, 0x001f).rw(FUNC(psion_state::hd63701_int_reg_r), FUNC(psion_state::hd63701_int_reg_w));
+ psion_int_reg(map);
map(0x0040, 0x00ff).ram().share("sys_register");
map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w));
map(0x0400, 0x3fff).ram().share("ram");
@@ -571,7 +591,7 @@ GFXDECODE_END
void psion_state::psion_2lines(machine_config &config)
{
/* basic machine hardware */
- HD63701(config, m_maincpu, 980000); // should be HD6303 at 0.98MHz
+ HD6303X(config, m_maincpu, 3.6864_MHz_XTAL); // internal operating frequency is 0.9216 MHz
/* video hardware */
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD));
@@ -620,6 +640,7 @@ void psion_state::psion_4lines(machine_config &config)
void psion1_state::psion1(machine_config &config)
{
psion_2lines(config);
+ HD6301X0(config.replace(), m_maincpu, 3.6864_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &psion1_state::psion1_mem);
subdevice<timer_device>("nmi_timer")->set_start_delay(attotime::from_seconds(1));
diff --git a/src/mame/drivers/rvoice.cpp b/src/mame/drivers/rvoice.cpp
index 967605323bf..6ceacadc76a 100644
--- a/src/mame/drivers/rvoice.cpp
+++ b/src/mame/drivers/rvoice.cpp
@@ -363,7 +363,7 @@ void rvoice_state::null_kbd_put(u8 data)
void rvoice_state::rvoicepc(machine_config &config)
{
/* basic machine hardware */
- HD63701(config, m_maincpu, XTAL(7'372'800));
+ HD63701Y0(config, m_maincpu, XTAL(7'372'800));
m_maincpu->set_addrmap(AS_PROGRAM, &rvoice_state::hd63701_main_mem);
//hd63701_cpu_device &playercpu(HD63701(config "playercpu", XTAL(7'372'800))); // not dumped yet
diff --git a/src/mame/drivers/skykid.cpp b/src/mame/drivers/skykid.cpp
index ee328fd9341..f80d7eeafc5 100644
--- a/src/mame/drivers/skykid.cpp
+++ b/src/mame/drivers/skykid.cpp
@@ -124,7 +124,7 @@ void skykid_state::skykid_map(address_map &map)
void skykid_state::mcu_map(address_map &map)
{
- map(0x0000, 0x001f).rw(m_mcu, FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m(m_mcu, FUNC(hd63701v0_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w)); /* PSG device, shared RAM */
map(0x2000, 0x3fff).w("watchdog", FUNC(watchdog_timer_device::reset_w)); /* watchdog? */
@@ -427,7 +427,7 @@ void skykid_state::skykid(machine_config &config)
MC6809E(config, m_maincpu, XTAL(49'152'000)/32);
m_maincpu->set_addrmap(AS_PROGRAM, &skykid_state::skykid_map);
- HD63701(config, m_mcu, XTAL(49'152'000)/8); /* or compatible 6808 with extra instructions */
+ HD63701V0(config, m_mcu, XTAL(49'152'000)/8); /* or compatible 6808 with extra instructions */
m_mcu->set_addrmap(AS_PROGRAM, &skykid_state::mcu_map);
m_mcu->in_p1_cb().set(FUNC(skykid_state::inputport_r)); /* input ports read */
m_mcu->out_p1_cb().set(FUNC(skykid_state::inputport_select_w)); /* input port select */
diff --git a/src/mame/drivers/tceptor.cpp b/src/mame/drivers/tceptor.cpp
index f9ea224dd4e..212f9a15a45 100644
--- a/src/mame/drivers/tceptor.cpp
+++ b/src/mame/drivers/tceptor.cpp
@@ -178,7 +178,7 @@ void tceptor_state::m68k_map(address_map &map)
void tceptor_state::mcu_map(address_map &map)
{
- map(0x0000, 0x001f).rw("mcu", FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m("mcu", FUNC(hd63701v0_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w));
map(0x1400, 0x154d).ram();
@@ -328,7 +328,7 @@ void tceptor_state::tceptor(machine_config &config)
M68000(config, m_subcpu, XTAL(49'152'000)/4);
m_subcpu->set_addrmap(AS_PROGRAM, &tceptor_state::m68k_map);
- HD63701(config, m_mcu, XTAL(49'152'000)/8); // or compatible 6808 with extra instructions
+ HD63701V0(config, m_mcu, XTAL(49'152'000)/8); // or compatible 6808 with extra instructions
m_mcu->set_addrmap(AS_PROGRAM, &tceptor_state::mcu_map);
config.set_maximum_quantum(attotime::from_hz(6000));
diff --git a/src/mame/includes/baraduke.h b/src/mame/includes/baraduke.h
index b2893b57a69..917bd500886 100644
--- a/src/mame/includes/baraduke.h
+++ b/src/mame/includes/baraduke.h
@@ -64,7 +64,7 @@ protected:
required_shared_ptr<uint8_t> m_videoram;
required_shared_ptr<uint8_t> m_textram;
required_device<cpu_device> m_maincpu;
- required_device<hd63701_cpu_device> m_mcu;
+ required_device<hd63701v0_cpu_device> m_mcu;
required_device<namco_cus30_device> m_cus30;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
diff --git a/src/mame/includes/hx20.h b/src/mame/includes/hx20.h
index f93e68aeb7c..aef16a6752e 100644
--- a/src/mame/includes/hx20.h
+++ b/src/mame/includes/hx20.h
@@ -54,8 +54,8 @@ public:
void cm6127(machine_config &config);
private:
- required_device<hd63701_cpu_device> m_maincpu;
- required_device<hd63701_cpu_device> m_subcpu;
+ required_device<hd6301v1_cpu_device> m_maincpu;
+ required_device<hd6301v1_cpu_device> m_subcpu;
required_device<mc146818_device> m_rtc;
required_device_array<upd7227_device, 6> m_lcdc;
required_device<speaker_sound_device> m_speaker;
diff --git a/src/mame/includes/namcos1.h b/src/mame/includes/namcos1.h
index 3b8f0604e29..fe6aa33f827 100644
--- a/src/mame/includes/namcos1.h
+++ b/src/mame/includes/namcos1.h
@@ -76,7 +76,7 @@ private:
required_device<mc6809e_device> m_maincpu;
required_device<mc6809e_device> m_subcpu;
required_device<mc6809e_device> m_audiocpu;
- required_device<hd63701_cpu_device> m_mcu;
+ required_device<hd63701v0_cpu_device> m_mcu;
required_device<namco_c116_device> m_c116;
required_device<namco_c117_device> m_c117;
required_device<namco_c123tmap_device> m_c123tmap;
diff --git a/src/mame/includes/namcos86.h b/src/mame/includes/namcos86.h
index 8ecfd39b9bf..0c919026a96 100644
--- a/src/mame/includes/namcos86.h
+++ b/src/mame/includes/namcos86.h
@@ -93,7 +93,7 @@ private:
required_device<cpu_device> m_cpu1;
required_device<cpu_device> m_cpu2;
- required_device<hd63701_cpu_device> m_mcu;
+ required_device<hd63701v0_cpu_device> m_mcu;
required_device<watchdog_timer_device> m_watchdog;
required_device<namco_cus30_device> m_cus30;
required_device<gfxdecode_device> m_gfxdecode;
diff --git a/src/mame/includes/pacland.h b/src/mame/includes/pacland.h
index 2598cac9350..a5b6ee94f5b 100644
--- a/src/mame/includes/pacland.h
+++ b/src/mame/includes/pacland.h
@@ -30,7 +30,7 @@ public:
{ }
required_device<cpu_device> m_maincpu;
- required_device<hd63701_cpu_device> m_mcu;
+ required_device<hd63701v0_cpu_device> m_mcu;
required_device<namco_cus30_device> m_cus30;
required_device<gfxdecode_device> m_gfxdecode;
required_device<screen_device> m_screen;
diff --git a/src/mame/includes/psion.h b/src/mame/includes/psion.h
index e81d4cc30b9..8e518c892cc 100644
--- a/src/mame/includes/psion.h
+++ b/src/mame/includes/psion.h
@@ -50,7 +50,7 @@ public:
DECLARE_INPUT_CHANGED_MEMBER(psion_on);
protected:
- required_device<hd63701_cpu_device> m_maincpu;
+ required_device<hd6301x_cpu_device> m_maincpu;
required_device<hd44780_device> m_lcdc;
required_device<beep_device> m_beep;
required_device<datapack_device> m_pack1;
@@ -85,8 +85,16 @@ protected:
uint8_t kb_read();
void update_banks();
- DECLARE_WRITE8_MEMBER( hd63701_int_reg_w );
- DECLARE_READ8_MEMBER( hd63701_int_reg_r );
+ void port2_ddr_w(uint8_t data);
+ void port2_w(uint8_t data);
+ uint8_t port2_r();
+ void tcsr_w(uint8_t data);
+ uint8_t tcsr_r();
+ uint8_t rcp5c_r();
+ uint8_t port5_r();
+ void port6_ddr_w(uint8_t data);
+ void port6_w(uint8_t data);
+ uint8_t port6_r();
void io_rw(address_space &space, uint16_t offset);
DECLARE_WRITE8_MEMBER( io_w );
DECLARE_READ8_MEMBER( io_r );
@@ -94,6 +102,7 @@ protected:
TIMER_DEVICE_CALLBACK_MEMBER(nmi_timer);
HD44780_PIXEL_UPDATE(lz_pixel_update);
+ void psion_int_reg(address_map &map);
void psioncm_mem(address_map &map);
void psionla_mem(address_map &map);
void psionlam_mem(address_map &map);
diff --git a/src/mame/includes/skykid.h b/src/mame/includes/skykid.h
index 7b3552c0e38..f95084e777f 100644
--- a/src/mame/includes/skykid.h
+++ b/src/mame/includes/skykid.h
@@ -63,7 +63,7 @@ private:
required_shared_ptr<uint8_t> m_textram;
required_shared_ptr<uint8_t> m_spriteram;
required_device<cpu_device> m_maincpu;
- required_device<hd63701_cpu_device> m_mcu;
+ required_device<hd63701v0_cpu_device> m_mcu;
required_device<namco_cus30_device> m_cus30;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
diff --git a/src/mame/machine/eispc_kb.cpp b/src/mame/machine/eispc_kb.cpp
index 2494102a0ab..cbcdcccb42e 100644
--- a/src/mame/machine/eispc_kb.cpp
+++ b/src/mame/machine/eispc_kb.cpp
@@ -406,7 +406,7 @@ ioport_constructor eispc_keyboard_device::device_input_ports() const
void eispc_keyboard_device::eispc_kb_mem(address_map &map)
{
- map(0x0000, 0x001f).rw(M6801_TAG, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
+ map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf800, 0xffff).rom().region(M6801_TAG, 0);
}