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author Ted Green <tedgreen99@protonmail.com>2018-07-13 12:03:16 -0600
committer Ted Green <tedgreen99@protonmail.com>2018-07-13 12:04:48 -0600
commite0912401ae4073f379e482df33d00a0648a0e74b (patch)
tree6906556daddb595ccba5323e431d84e286dd46b8
parente4a4f5f50ef2b3607d8cb5759c6158ea6acd1aad (diff)
iteagle: Use callbacks to access IO ports. (nw)
-rw-r--r--src/mame/drivers/iteagle.cpp10
-rw-r--r--src/mame/machine/iteagle_fpga.cpp35
-rw-r--r--src/mame/machine/iteagle_fpga.h19
3 files changed, 42 insertions, 22 deletions
diff --git a/src/mame/drivers/iteagle.cpp b/src/mame/drivers/iteagle.cpp
index 343e3c43426..e72941e749f 100644
--- a/src/mame/drivers/iteagle.cpp
+++ b/src/mame/drivers/iteagle.cpp
@@ -176,7 +176,15 @@ MACHINE_CONFIG_START(iteagle_state::iteagle)
ITEAGLE_PERIPH(config, PCI_ID_PERIPH, 0);
IDE_PCI(config, PCI_ID_IDE, 0, 0x1080C693, 0x00, 0x0).irq_handler().set_inputline(m_maincpu, MIPS3_IRQ2);
- ITEAGLE_FPGA(config, PCI_ID_FPGA, 0, "screen", m_maincpu, MIPS3_IRQ1, MIPS3_IRQ4);
+ iteagle_fpga_device &iteagle_fpga(ITEAGLE_FPGA(config, PCI_ID_FPGA, 0, "screen", m_maincpu, MIPS3_IRQ1, MIPS3_IRQ4));
+ iteagle_fpga.in_callback<iteagle_fpga_device::IO_SW5>().set_ioport("SW5");
+ iteagle_fpga.in_callback<iteagle_fpga_device::IO_IN1>().set_ioport("IN1");
+ iteagle_fpga.in_callback<iteagle_fpga_device::IO_SYSTEM>().set_ioport("SYSTEM");
+ iteagle_fpga.trackx_callback().set_ioport("TRACKX1");
+ iteagle_fpga.tracky_callback().set_ioport("TRACKY1");
+ iteagle_fpga.gunx_callback().set_ioport("GUNX1");
+ iteagle_fpga.guny_callback().set_ioport("GUNY1");
+
es1373_device &pci_sound(ES1373(config, PCI_ID_SOUND, 0));
pci_sound.add_route(0, PCI_ID_SOUND":lspeaker", 1.0).add_route(1, PCI_ID_SOUND":rspeaker", 1.0);
pci_sound.irq_handler().set_inputline(m_maincpu, MIPS3_IRQ3);
diff --git a/src/mame/machine/iteagle_fpga.cpp b/src/mame/machine/iteagle_fpga.cpp
index be8ff4f64a6..748f939d77e 100644
--- a/src/mame/machine/iteagle_fpga.cpp
+++ b/src/mame/machine/iteagle_fpga.cpp
@@ -40,13 +40,11 @@ iteagle_fpga_device::iteagle_fpga_device(const machine_config &mconfig, const ch
m_scc1(*this, AM85C30_TAG),
m_screen(*this, finder_base::DUMMY_TAG),
m_cpu(*this, finder_base::DUMMY_TAG),
- m_io_system(*this, ":SYSTEM"),
- m_io_in1(*this, ":IN1"),
- m_io_sw5(*this, ":SW5"),
- m_io_trackx(*this, ":TRACKX1"),
- m_io_tracky(*this, ":TRACKY1"),
- m_io_gunx(*this, ":GUNX1"),
- m_io_guny(*this, ":GUNY1"),
+ m_in_cb{ { *this },{ *this },{ *this } },
+ m_trackx_cb(*this),
+ m_tracky_cb(*this),
+ m_gunx_cb(*this),
+ m_guny_cb(*this),
m_version(0),
m_seq_init(0)
{
@@ -102,6 +100,16 @@ void iteagle_fpga_device::device_start()
m_timer = timer_alloc(0, nullptr);
+ // Switch IO
+ for (unsigned i = 0; i < IO_NUM; i++)
+ m_in_cb[i].resolve_safe(0xffff);
+ // Track IO
+ m_trackx_cb.resolve_safe(0xff);
+ m_tracky_cb.resolve_safe(0xff);
+ // Gun IO
+ m_gunx_cb.resolve_safe(0xffff);
+ m_guny_cb.resolve_safe(0xffff);
+
// Save states
save_item(NAME(m_fpga_regs));
save_item(NAME(m_rtc_regs));
@@ -218,8 +226,8 @@ WRITE_LINE_MEMBER(iteagle_fpga_device::vblank_update)
if (1 || (m_fpga_regs[0x14 / 4] & 0x01)) {
// Set the gun timer to first fire
const rectangle &visarea = m_screen->visible_area();
- m_gun_x = m_io_gunx->read() * (visarea.width() - 14) / 512;
- m_gun_y = m_io_guny->read() * visarea.height() / 512;
+ m_gun_x = m_gunx_cb(0) * (visarea.width() - 14) / 512;
+ m_gun_y = m_guny_cb(0) * visarea.height() / 512;
m_timer->adjust(attotime::zero);
//m_timer->adjust(m_screen->time_until_pos(std::max(0, m_gun_y - BEAM_DY), std::max(0, m_gun_x - BEAM_DX)));
//printf("w: %d h: %d x: %d y: %d\n", visarea.width(), visarea.height(), m_gun_x, m_gun_y);
@@ -254,23 +262,22 @@ READ32_MEMBER( iteagle_fpga_device::fpga_r )
switch (offset) {
case 0x00/4:
- result = ((m_io_system->read()&0xffff)<<16) | (m_io_in1->read()&0xffff);
+ result = (m_in_cb[IO_SYSTEM](0) << 16) | (m_in_cb[IO_IN1](0));
if (LOG_FPGA && m_prev_reg!=offset)
logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
break;
case 0x04/4:
- result = (result & 0xFF0FFFFF) | ((m_io_sw5->read()&0xf)<<20);
+ result = (result & 0xFF0FFFFF) | ((m_in_cb[IO_SW5](0) & 0xf) << 20);
if (0 && LOG_FPGA && !ACCESSING_BITS_0_7)
logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
break;
case 0x08/4:
- result = ((m_io_tracky->read()&0xff)<<8) | (m_io_trackx->read()&0xff);
+ result = (m_tracky_cb(0) << 8) | m_trackx_cb(0);
if (LOG_FPGA && m_prev_reg!=offset)
logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
break;
case 0x14/4: // GUN1-- Interrupt & 0x4==0x00080000
- //result = ((machine().root_device().ioport("GUNY1")->read())<<16) | (machine().root_device().ioport("GUNX1")->read());
- result = (m_gun_y << 16) | (m_gun_x << 0);
+ result = (m_guny_cb(0) << 16) | (m_gunx_cb(0) << 0);
if (LOG_FPGA)
logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
break;
diff --git a/src/mame/machine/iteagle_fpga.h b/src/mame/machine/iteagle_fpga.h
index c6ad0285edc..717e8f12e37 100644
--- a/src/mame/machine/iteagle_fpga.h
+++ b/src/mame/machine/iteagle_fpga.h
@@ -60,6 +60,13 @@ public:
DECLARE_WRITE_LINE_MEMBER(vblank_update);
DECLARE_WRITE8_MEMBER(serial_rx_w);
+ enum { IO_SYSTEM, IO_IN1, IO_SW5, IO_NUM };
+ template <unsigned N> auto in_callback() { return m_in_cb[N].bind(); }
+ auto trackx_callback() { return m_trackx_cb.bind(); }
+ auto tracky_callback() { return m_tracky_cb.bind(); }
+ auto gunx_callback() { return m_gunx_cb.bind(); }
+ auto guny_callback() { return m_guny_cb.bind(); }
+
protected:
virtual void device_start() override;
virtual void device_reset() override;
@@ -72,13 +79,11 @@ private:
required_device<scc85c30_device> m_scc1;
required_device<screen_device> m_screen;
required_device<device_execute_interface> m_cpu;
- required_ioport m_io_system;
- required_ioport m_io_in1;
- required_ioport m_io_sw5;
- optional_ioport m_io_trackx;
- optional_ioport m_io_tracky;
- optional_ioport m_io_gunx;
- optional_ioport m_io_guny;
+ devcb_read16 m_in_cb[3];
+ devcb_read8 m_trackx_cb;
+ devcb_read8 m_tracky_cb;
+ devcb_read16 m_gunx_cb;
+ devcb_read16 m_guny_cb;
emu_timer * m_timer;
int m_irq_num;